arch/mips/cavium-octeon/executive/cvmx-pko.c

152

config.s.pipe = (mode == CVMX_HELPER_INTERFACE_MODE_LOOP) ?

arch/mips/include/asm/octeon/cvmx-pko-defs.h

1240

uint64_t pipe:7;

arch/mips/include/asm/octeon/cvmx-pko-defs.h

1242

uint64_t pipe:7;

arch/mips/include/asm/octeon/cvmx-pko-defs.h

964

uint64_t pipe:7;

arch/mips/include/asm/octeon/cvmx-pko-defs.h

978

uint64_t pipe:7;

drivers/bluetooth/ath3k.c

207

int err, pipe, size, sent = 0;

drivers/bluetooth/ath3k.c

228

pipe = usb_sndbulkpipe(udev, 0x02);

drivers/bluetooth/ath3k.c

237

err = usb_bulk_msg(udev, pipe, send_buf, size,

drivers/bluetooth/ath3k.c

276

int err, pipe, size, count, sent = 0;

drivers/bluetooth/ath3k.c

301

pipe = usb_sndbulkpipe(udev, 0x02);

drivers/bluetooth/ath3k.c

310

err = usb_bulk_msg(udev, pipe, send_buf, size,

drivers/bluetooth/bfusb.c

115

int err, pipe;

drivers/bluetooth/bfusb.c

125

pipe = usb_sndbulkpipe(data->udev, data->bulk_out_ep);

drivers/bluetooth/bfusb.c

127

usb_fill_bulk_urb(urb, data->udev, pipe, skb->data, skb->len,

drivers/bluetooth/bfusb.c

205

int err, pipe, size = HCI_MAX_FRAME_SIZE + 32;

drivers/bluetooth/bfusb.c

226

pipe = usb_rcvbulkpipe(data->udev, data->bulk_in_ep);

drivers/bluetooth/bfusb.c

228

usb_fill_bulk_urb(urb, data->udev, pipe, skb->data, size,

drivers/bluetooth/bfusb.c

521

int err, pipe, len, size, sent = 0;

drivers/bluetooth/bfusb.c

533

pipe = usb_sndctrlpipe(data->udev, 0);

drivers/bluetooth/bfusb.c

535

if (usb_control_msg(data->udev, pipe, USB_REQ_SET_CONFIGURATION,

drivers/bluetooth/bfusb.c

544

pipe = usb_sndbulkpipe(data->udev, data->bulk_out_ep);

drivers/bluetooth/bfusb.c

551

err = usb_bulk_msg(data->udev, pipe, buf, size,

drivers/bluetooth/bfusb.c

563

err = usb_bulk_msg(data->udev, pipe, NULL, 0,

drivers/bluetooth/bfusb.c

570

pipe = usb_sndctrlpipe(data->udev, 0);

drivers/bluetooth/bfusb.c

572

err = usb_control_msg(data->udev, pipe, USB_REQ_SET_CONFIGURATION,

drivers/bluetooth/bfusb.c

589

pipe = usb_sndctrlpipe(data->udev, 0);

drivers/bluetooth/bfusb.c

591

usb_control_msg(data->udev, pipe, USB_REQ_SET_CONFIGURATION,

drivers/bluetooth/bpa10x.c

126

unsigned int pipe;

drivers/bluetooth/bpa10x.c

141

pipe = usb_rcvintpipe(data->udev, 0x81);

drivers/bluetooth/bpa10x.c

143

usb_fill_int_urb(urb, data->udev, pipe, buf, size,

drivers/bluetooth/bpa10x.c

166

unsigned int pipe;

drivers/bluetooth/bpa10x.c

181

pipe = usb_rcvbulkpipe(data->udev, 0x82);

drivers/bluetooth/bpa10x.c

183

usb_fill_bulk_urb(urb, data->udev, pipe,

drivers/bluetooth/bpa10x.c

271

unsigned int pipe;

drivers/bluetooth/bpa10x.c

299

pipe = usb_sndctrlpipe(data->udev, 0x00);

drivers/bluetooth/bpa10x.c

301

usb_fill_control_urb(urb, data->udev, pipe, (void *) dr,

drivers/bluetooth/bpa10x.c

308

pipe = usb_sndbulkpipe(data->udev, 0x02);

drivers/bluetooth/bpa10x.c

310

usb_fill_bulk_urb(urb, data->udev, pipe,

drivers/bluetooth/bpa10x.c

317

pipe = usb_sndbulkpipe(data->udev, 0x02);

drivers/bluetooth/bpa10x.c

319

usb_fill_bulk_urb(urb, data->udev, pipe,

drivers/bluetooth/bpa10x.c

98

bool idx = usb_pipebulk(urb->pipe);

drivers/bluetooth/btmtk.c

1032

unsigned int pipe;

drivers/bluetooth/btmtk.c

1044

pipe = usb_sndintpipe(btmtk_data->udev,

drivers/bluetooth/btmtk.c

1047

usb_fill_int_urb(urb, btmtk_data->udev, pipe,

drivers/bluetooth/btmtk.c

1165

unsigned int pipe;

drivers/bluetooth/btmtk.c

1185

pipe = usb_rcvintpipe(btmtk_data->udev,

drivers/bluetooth/btmtk.c

1188

usb_fill_int_urb(urb, btmtk_data->udev, pipe, buf, size,

drivers/bluetooth/btmtk.c

533

unsigned int pipe;

drivers/bluetooth/btmtk.c

559

pipe = usb_rcvctrlpipe(data->udev, 0);

drivers/bluetooth/btmtk.c

561

usb_fill_control_urb(urb, data->udev, pipe, (void *)dr,

drivers/bluetooth/btmtk.c

728

int pipe, err;

drivers/bluetooth/btmtk.c

737

pipe = usb_sndctrlpipe(data->udev, 0);

drivers/bluetooth/btmtk.c

738

err = usb_control_msg(data->udev, pipe, 0x02,

drivers/bluetooth/btmtk.c

753

int pipe, err;

drivers/bluetooth/btmtk.c

760

pipe = usb_rcvctrlpipe(data->udev, 0);

drivers/bluetooth/btmtk.c

761

err = usb_control_msg(data->udev, pipe, 0x01,

drivers/bluetooth/btmtk.c

782

int pipe, err, size = sizeof(u32);

drivers/bluetooth/btmtk.c

789

pipe = usb_rcvctrlpipe(data->udev, 0);

drivers/bluetooth/btmtk.c

790

err = usb_control_msg(data->udev, pipe, 0x63,

drivers/bluetooth/btusb.c

1478

unsigned int pipe;

drivers/bluetooth/btusb.c

1506

pipe = usb_rcvintpipe(data->udev, data->intr_ep->bEndpointAddress);

drivers/bluetooth/btusb.c

1508

usb_fill_int_urb(urb, data->udev, pipe, buf, size,

drivers/bluetooth/btusb.c

1600

unsigned int pipe;

drivers/bluetooth/btusb.c

1618

pipe = usb_rcvbulkpipe(data->udev, data->bulk_rx_ep->bEndpointAddress);

drivers/bluetooth/btusb.c

1620

usb_fill_bulk_urb(urb, data->udev, pipe, buf, size,

drivers/bluetooth/btusb.c

1760

unsigned int pipe;

drivers/bluetooth/btusb.c

1781

pipe = usb_rcvisocpipe(data->udev, data->isoc_rx_ep->bEndpointAddress);

drivers/bluetooth/btusb.c

1783

usb_fill_int_urb(urb, data->udev, pipe, buf, size, btusb_isoc_complete,

drivers/bluetooth/btusb.c

1852

unsigned int pipe;

drivers/bluetooth/btusb.c

1870

pipe = usb_rcvbulkpipe(data->udev, data->diag_rx_ep->bEndpointAddress);

drivers/bluetooth/btusb.c

1872

usb_fill_bulk_urb(urb, data->udev, pipe, buf, size,

drivers/bluetooth/btusb.c

2068

unsigned int pipe;

drivers/bluetooth/btusb.c

2086

pipe = usb_sndctrlpipe(data->udev, 0x00);

drivers/bluetooth/btusb.c

2088

usb_fill_control_urb(urb, data->udev, pipe, (void *)dr,

drivers/bluetooth/btusb.c

2100

unsigned int pipe;

drivers/bluetooth/btusb.c

2109

pipe = usb_sndbulkpipe(data->udev, data->bulk_tx_ep->bEndpointAddress);

drivers/bluetooth/btusb.c

2111

usb_fill_bulk_urb(urb, data->udev, pipe,

drivers/bluetooth/btusb.c

2123

unsigned int pipe;

drivers/bluetooth/btusb.c

2132

pipe = usb_sndisocpipe(data->udev, data->isoc_tx_ep->bEndpointAddress);

drivers/bluetooth/btusb.c

2134

usb_fill_int_urb(urb, data->udev, pipe,

drivers/bluetooth/btusb.c

3372

int pipe, err;

drivers/bluetooth/btusb.c

3382

pipe = usb_rcvctrlpipe(udev, 0);

drivers/bluetooth/btusb.c

3383

err = usb_control_msg(udev, pipe, request, USB_TYPE_VENDOR | USB_DIR_IN,

drivers/bluetooth/btusb.c

3405

int pipe, len, err;

drivers/bluetooth/btusb.c

3422

pipe = usb_sndctrlpipe(udev, 0);

drivers/bluetooth/btusb.c

3423

err = usb_control_msg(udev, pipe, QCA_DFU_DOWNLOAD, USB_TYPE_VENDOR,

drivers/bluetooth/btusb.c

3443

pipe = usb_sndbulkpipe(udev, 0x02);

drivers/bluetooth/btusb.c

3444

err = usb_bulk_msg(udev, pipe, buf, size, &len,

drivers/bluetooth/btusb.c

3714

unsigned int pipe;

drivers/bluetooth/btusb.c

3732

pipe = usb_sndbulkpipe(data->udev, data->diag_tx_ep->bEndpointAddress);

drivers/bluetooth/btusb.c

3734

usb_fill_bulk_urb(urb, data->udev, pipe,

drivers/char/mem.c

445

static ssize_t splice_write_null(struct pipe_inode_info *pipe, struct file *out,

drivers/char/mem.c

448

return splice_from_pipe(pipe, out, ppos, len, flags, pipe_to_null);

drivers/char/virtio_console.c

856

static int pipe_to_sg(struct pipe_inode_info *pipe, struct pipe_buffer *buf,

drivers/char/virtio_console.c

866

if (pipe_buf_try_steal(pipe, buf)) {

drivers/char/virtio_console.c

900

static ssize_t port_fops_splice_write(struct pipe_inode_info *pipe,

drivers/char/virtio_console.c

925

pipe_lock(pipe);

drivers/char/virtio_console.c

927

if (pipe_is_empty(pipe))

drivers/char/virtio_console.c

934

occupancy = pipe_buf_usage(pipe);

drivers/char/virtio_console.c

947

ret = __splice_from_pipe(pipe, &sd, pipe_to_sg);

drivers/char/virtio_console.c

948

pipe_unlock(pipe);

drivers/char/virtio_console.c

957

pipe_unlock(pipe);

drivers/comedi/drivers/usbdux.c

1463

urb->pipe = usb_rcvisocpipe(usb, 6);

drivers/comedi/drivers/usbdux.c

1485

urb->pipe = usb_sndisocpipe(usb, 2);

drivers/comedi/drivers/usbduxsigma.c

1355

urb->pipe = usb_rcvisocpipe(usb, 6);

drivers/comedi/drivers/usbduxsigma.c

1377

urb->pipe = usb_sndisocpipe(usb, 2);

drivers/comedi/drivers/vmk80xx.c

184

unsigned int pipe;

drivers/comedi/drivers/vmk80xx.c

192

pipe = usb_rcvintpipe(usb, ep->bEndpointAddress);

drivers/comedi/drivers/vmk80xx.c

193

return usb_interrupt_msg(usb, pipe, devpriv->usb_rx_buf,

drivers/comedi/drivers/vmk80xx.c

203

unsigned int pipe;

drivers/comedi/drivers/vmk80xx.c

213

pipe = usb_sndintpipe(usb, ep->bEndpointAddress);

drivers/comedi/drivers/vmk80xx.c

214

return usb_interrupt_msg(usb, pipe, devpriv->usb_tx_buf,

drivers/dma/qcom/bam_dma.c

410

static inline void __iomem *bam_addr(struct bam_device *bdev, u32 pipe,

drivers/dma/qcom/bam_dma.c

416

r.pipe_mult * pipe +

drivers/dma/qcom/bam_dma.c

417

r.evnt_mult * pipe +

drivers/gpio/gpio-mpsse.c

107

unsigned int pipe;

drivers/gpio/gpio-mpsse.c

111

pipe = usb_sndbulkpipe(udev, priv->bulk_out->bEndpointAddress);

drivers/gpio/gpio-mpsse.c

113

pipe = usb_rcvbulkpipe(udev, priv->bulk_in->bEndpointAddress);

drivers/gpio/gpio-mpsse.c

115

ret = usb_bulk_msg(udev, pipe, desc->data, desc->len,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

144

uint32_t pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

147

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

149

lock_srbm(adev, mec, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

296

uint32_t mec, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

304

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

307

mec, pipe, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

321

PACKET3_MAP_QUEUES_PIPE(pipe) |

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

44

static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

48

nv_grbm_select(adev, mec, pipe, queue, vmid);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

61

uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

63

lock_srbm(adev, mec, pipe, queue_id, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

113

uint32_t pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

116

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

118

lock_srbm(adev, mec, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

195

uint32_t value, mec, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

198

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

201

mec, pipe, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

204

((mec << 5) | (pipe << 3) | queue_id | 0x80));

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

282

uint32_t mec, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

290

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

293

mec, pipe, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

307

PACKET3_MAP_QUEUES_PIPE(pipe) |

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

44

static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

48

nv_grbm_select(adev, mec, pipe, queue, vmid);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

61

uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

63

lock_srbm(adev, mec, pipe, queue_id, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

109

uint32_t pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

112

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

114

lock_srbm(adev, mec, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

180

uint32_t value, mec, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

183

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

186

mec, pipe, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

189

((mec << 5) | (pipe << 3) | queue_id | 0x80));

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

267

uint32_t mec, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

275

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

278

mec, pipe, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

292

PACKET3_MAP_QUEUES_PIPE(pipe) |

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

42

static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

46

soc21_grbm_select(adev, mec, pipe, queue, vmid);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

59

uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

61

lock_srbm(adev, mec, pipe, queue_id, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

30

static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

34

soc24_grbm_select(adev, mec, pipe, queue, vmid);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

47

uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

49

lock_srbm(adev, mec, pipe, queue_id, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

60

uint32_t pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

63

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

65

lock_srbm(adev, mec, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

30

static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

34

amdgpu_gfx_select_me_pipe_q(adev, mec, pipe, queue, vmid, inst);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

47

uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

49

lock_srbm(adev, mec, pipe, queue_id, 0, inst);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

60

uint32_t pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

63

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

65

lock_srbm(adev, mec, pipe, 0, 0, inst);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

121

uint32_t pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

124

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

126

lock_srbm(adev, mec, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

48

static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

51

uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

67

uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

69

lock_srbm(adev, mec, pipe, queue_id, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

116

uint32_t pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

119

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

121

lock_srbm(adev, mec, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

170

uint32_t value, mec, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

173

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

176

mec, pipe, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

179

((mec << 5) | (pipe << 3) | queue_id | 0x80));

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

42

static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

45

uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

61

uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

63

lock_srbm(adev, mec, pipe, queue_id, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

164

uint32_t pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

167

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

169

kgd_gfx_v9_lock_srbm(adev, mec, pipe, 0, 0, inst);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

307

uint32_t mec, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

315

pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

318

mec, pipe, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

332

PACKET3_MAP_QUEUES_PIPE(pipe) |

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

50

static void kgd_gfx_v9_lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

54

soc15_grbm_select(adev, mec, pipe, queue, vmid, GET_INST(GC, inst));

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

67

uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

69

kgd_gfx_v9_lock_srbm(adev, mec, pipe, queue_id, 0, inst);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

106

pipe = (*pos & GENMASK_ULL(43, 34)) >> 34;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

141

amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue, vmid, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

269

amdgpu_gfx_select_me_pipe_q(adev, rd->id.srbm.me, rd->id.srbm.pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

352

rd->id.srbm.pipe = v1_data.srbm.pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

79

unsigned int instance_bank, sh_bank, se_bank, me, pipe, queue, vmid;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

82

instance_bank = sh_bank = se_bank = me = pipe = queue = vmid = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1608

unsigned int pipe, unsigned int flags, int *vpos,

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1624

if (amdgpu_display_page_flip_get_scanoutpos(adev, pipe, &vbl, &position) == 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1666

vbl_start -= adev->mode_info.crtcs[pipe]->lb_vblank_lead_lines;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1735

unsigned int pipe = crtc->index;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

1737

return amdgpu_display_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1217

*hdp_flush_mask = nbio_hf_reg->ref_and_mask_cp0 << ring->pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1221

*hdp_flush_mask = nbio_hf_reg->ref_and_mask_cp2 << ring->pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

175

int pipe = ring->pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

181

adev->gfx.num_gfx_rings > 1 && pipe == 1 && queue == 0) {

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

185

bit = amdgpu_gfx_me_queue_to_bit(adev, me, pipe, queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

208

int i, j, queue, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

220

pipe = i % adev->gfx.mec.num_pipe_per_mec;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

224

set_bit(pipe * adev->gfx.mec.num_queue_per_pipe + queue,

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

244

int i, queue, pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

253

pipe = i % adev->gfx.me.num_pipe_per_me;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

257

set_bit(pipe * num_queue_per_pipe + queue,

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

275

int mec, pipe, queue;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

285

amdgpu_queue_mask_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

292

if ((mec == 1 && pipe > 1) || queue != 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

296

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

333

(unsigned char)ring->pipe, (unsigned char)ring->queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

49

int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

55

bit += pipe * adev->gfx.mec.num_queue_per_pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

613

int mec, pipe, queue;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

616

amdgpu_queue_mask_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

618

set_resource_bit = mec * 4 * 8 + pipe * 8 + queue;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

62

int *mec, int *pipe, int *queue)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

65

*pipe = (bit / adev->gfx.mec.num_queue_per_pipe)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

693

kiq_ring->pipe, kiq_ring->queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

73

int xcc_id, int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

75

return test_bit(amdgpu_gfx_mec_queue_to_bit(adev, mec, pipe, queue),

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

80

int me, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

87

bit += pipe * num_queue_per_pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

94

int me, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

96

return test_bit(amdgpu_gfx_me_queue_to_bit(adev, me, pipe, queue),

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

348

void (*select_me_pipe_q)(struct amdgpu_device *adev, u32 me, u32 pipe,

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

555

#define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q, vmid, xcc_id) ((adev)->gfx.funcs->select_me_pipe_q((adev), (me), (pipe), (q), (vmid), (xcc_id)))

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

595

int pipe, int queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

597

int *mec, int *pipe, int *queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

599

int mec, int pipe, int queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

605

int pipe, int queue);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

167

WREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe], 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

169

RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe]);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

171

amdgpu_ring_write(ring, PACKET0(adev->jpeg.internal.jpeg_pitch[ring->pipe], 0));

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

176

tmp = RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe]);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

206

ib->ptr[0] = PACKETJ(adev->jpeg.internal.jpeg_pitch[ring->pipe], 0, 0, PACKETJ_TYPE0);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

253

tmp = RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe]);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1637

unsigned int pipe = crtc->index;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1642

if (pipe >= adev->mode_info.num_crtc) {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1643

DRM_ERROR("Invalid crtc %u\n", pipe);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1655

if (adev->mode_info.crtcs[pipe]) {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1660

count = amdgpu_display_vblank_get_counter(adev, pipe);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1666

dev, pipe, GET_DISTANCE_TO_VBLANKSTART,

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1668

&adev->mode_info.crtcs[pipe]->base.hwmode);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1669

} while (count != amdgpu_display_vblank_get_counter(adev, pipe));

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1676

pipe, vpos);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1687

count = amdgpu_display_vblank_get_counter(adev, pipe);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1705

unsigned int pipe = crtc->index;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1707

int idx = amdgpu_display_crtc_idx_to_irq_type(adev, pipe);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1722

unsigned int pipe = crtc->index;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1724

int idx = amdgpu_display_crtc_idx_to_irq_type(adev, pipe);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

343

queue_input.pipe_id = ring->pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

369

queue_input.pipe_id = ring->pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

398

queue_input.pipe_id = ring->pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

667

int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe)

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

686

pipe == AMDGPU_MES_SCHED_PIPE ? "_2" : "1");

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

691

pipe == AMDGPU_MES_SCHED_PIPE ? "" : "1");

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

694

r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe], AMDGPU_UCODE_REQUIRED,

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

696

if (r && need_retry && pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

698

r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe],

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

707

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

708

adev->mes.uc_start_addr[pipe] =

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

711

adev->mes.data_start_addr[pipe] =

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

714

ucode_ptr = (u32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

716

adev->mes.fw_version[pipe] =

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

722

if (pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

732

info->fw = adev->mes.fw[pipe];

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

739

info->fw = adev->mes.fw[pipe];

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

747

amdgpu_ucode_release(&adev->mes.fw[pipe]);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h

428

int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe);

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

681

unsigned int pipe, unsigned int flags, int *vpos,

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

379

u32 pipe;

drivers/gpu/drm/amd/amdgpu/amdgpu_umr.h

34

__u32 me, pipe, queue, vmid;

drivers/gpu/drm/amd/amdgpu/amdgpu_umr.h

44

__u32 me, pipe, queue, vmid;

drivers/gpu/drm/amd/amdgpu/cik.c

945

u32 me, u32 pipe, u32 queue, u32 vmid)

drivers/gpu/drm/amd/amdgpu/cik.c

948

(((pipe << SRBM_GFX_CNTL__PIPEID__SHIFT) & SRBM_GFX_CNTL__PIPEID_MASK)|

drivers/gpu/drm/amd/amdgpu/cik.h

30

u32 me, u32 pipe, u32 queue, u32 vmid);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

3753

PACKET3_MAP_QUEUES_PIPE(ring->pipe) |

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4548

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4550

nv_grbm_select(adev, me, pipe, q, vm);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4651

int me, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4660

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4671

sprintf(ring->name, "gfx_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4673

irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4681

int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4691

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4700

sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4704

+ ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5379

int me, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5384

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5395

int me, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5405

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6445

CP_PIPE_ID pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6450

tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6733

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6739

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6855

nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6872

nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7149

nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7158

nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7180

nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9043

uint32_t me, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9049

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9057

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9084

int me, int pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9096

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9110

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9208

(ring->pipe == pipe_id) &&

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9356

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9365

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9414

target += ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9529

if (ring->pipe == 0)

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9602

nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1046

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1048

soc21_grbm_select(adev, me, pipe, q, vm);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1136

int me, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1145

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1160

sprintf(ring->name, "gfx_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1162

irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1170

int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1181

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1190

sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1194

+ ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1475

int pipe, ucode_id, data_id;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1477

for (pipe = 0; pipe < 2; pipe++) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1478

if (pipe==0) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1487

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1489

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1496

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2177

int me, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2182

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2193

int me, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2203

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3691

CP_PIPE_ID pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3696

tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

401

PACKET3_MAP_QUEUES_PIPE(ring->pipe) |

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4062

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4205

soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4506

soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4515

soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4537

soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6315

uint32_t me, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6321

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6329

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6360

int me, int pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6372

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6386

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6488

(ring->pipe == pipe_id) &&

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6638

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6647

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6706

target += ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6782

soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6784

switch (ring->pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6874

soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6881

switch (ring->pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6915

switch (ring->pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6945

switch (ring->pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1010

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1019

sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1023

+ ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1282

int pipe, ucode_id, data_id;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1284

for (pipe = 0; pipe < 2; pipe++) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1285

if (pipe == 0) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1294

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1296

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1302

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1842

int me, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1847

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1856

int me, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1866

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2680

CP_PIPE_ID pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2685

tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2950

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3076

soc24_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

336

PACKET3_MAP_QUEUES_PIPE(ring->pipe) |

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3377

soc24_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3386

soc24_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3408

soc24_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4690

uint32_t me, uint32_t pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4696

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4701

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4732

int me, int pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4744

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4752

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4854

(ring->pipe == pipe_id) &&

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5004

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5013

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5245

soc24_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5247

switch (ring->pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5336

soc24_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5342

switch (ring->pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5375

switch (ring->pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

898

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

900

soc24_grbm_select(adev, me, pipe, q, vm);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

968

int me, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

977

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

988

sprintf(ring->name, "gfx_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

990

irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

999

int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1062

int pipe, ucode_id, data_id;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1064

for (pipe = 0; pipe < 2; pipe++) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1065

if (pipe == 0) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1074

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1076

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1082

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

136

PACKET3_MAP_QUEUES_PIPE(ring->pipe) |

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2090

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2367

soc_v1_0_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2376

soc_v1_0_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2399

soc_v1_0_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3503

int me, int pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3516

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3538

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3650

(ring->pipe == pipe_id) &&

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3727

if (ring->me == me_id && ring->pipe == pipe_id)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3737

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

711

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

713

soc_v1_0_grbm_select(adev, me, pipe, q, vm, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

767

int xcc_id, int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

781

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

794

ring->xcc_id, ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

798

+ ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3003

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3094

ring->pipe = i;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3096

sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3097

irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2762

int mec, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2766

size_t eop_offset = (mec * adev->gfx.mec.num_pipe_per_mec + pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2772

cik_srbm_select(adev, mec + 1, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2976

cik_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4065

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4067

cik_srbm_select(adev, me, pipe, q, vm);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4091

*ref_and_mask = GPU_HDP_FLUSH_DONE__CP2_MASK << ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4094

*ref_and_mask = GPU_HDP_FLUSH_DONE__CP6_MASK << ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4308

int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4316

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4322

sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4326

+ ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4638

int me, int pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4650

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4664

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4796

if ((ring->me == me_id) && (ring->pipe == pipe_id))

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4821

if ((ring->me == me_id) && (ring->pipe == pipe_id))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1847

int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1858

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1866

sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1870

+ ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3412

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3414

vi_srbm_select(adev, me, pipe, q, vm);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4300

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4352

PACKET3_MAP_QUEUES_PIPE(ring->pipe) |

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4599

vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4610

vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4634

vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4981

vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5076

vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5235

*ref_and_mask = GPU_HDP_FLUSH_DONE__CP2_MASK << ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5238

*ref_and_mask = GPU_HDP_FLUSH_DONE__CP6_MASK << ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6393

int me, int pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6405

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6419

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6599

if ((ring->me == me_id) && (ring->pipe == pipe_id) && (ring->queue == queue_id))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6626

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6793

uint32_t pipe, bool enable)

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6800

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6814

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6842

if (i != ring->pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1996

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1998

soc15_grbm_select(adev, me, pipe, q, vm, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2155

int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2165

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2174

sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2178

+ ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3532

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3858

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3869

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3900

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4084

adev->gfx.kiq[0].ring.pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5970

int me, int pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5982

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5996

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6023

int me, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6033

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6138

#define ENABLE_ECC_ON_ME_PIPE(me, pipe) \

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6139

WREG32_FIELD15(GC, 0, CP_ME##me##_PIPE##pipe##_INT_CNTL,\

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6142

#define DISABLE_ECC_ON_ME_PIPE(me, pipe) \

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6143

WREG32_FIELD15(GC, 0, CP_ME##me##_PIPE##pipe##_INT_CNTL,\

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6248

if ((ring->me == me_id) && (ring->pipe == pipe_id) && (ring->queue == queue_id))

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6275

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7104

uint32_t pipe, bool enable)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7113

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7127

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7156

if (i != ring->pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7297

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

964

PACKET3_MAP_QUEUES_PIPE(ring->pipe) |

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1002

+ ring->pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1809

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

213

PACKET3_MAP_QUEUES_PIPE(ring->pipe) |

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2134

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2145

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2177

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2205

ring->pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2336

adev->gfx.kiq[xcc_id].ring.pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3052

struct amdgpu_device *adev, int me, int pipe,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3064

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3078

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3105

int xcc_id, int me, int pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3115

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3312

if ((ring->me == me_id) && (ring->pipe == pipe_id) && (ring->queue == queue_id))

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3344

if (ring->me == me_id && ring->pipe == pipe_id &&

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3399

uint32_t pipe, bool enable)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3408

switch (pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3422

DRM_DEBUG("invalid pipe %d\n", pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3450

if (i != ring->pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3457

uint32_t pipe, uint32_t queue,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3464

soc15_grbm_select(adev, me, pipe, queue, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3508

switch (ring->pipe) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3529

if (ring->pipe)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3542

r = gfx_v9_4_3_unmap_done(adev, ring->me, ring->pipe, ring->queue, ring->xcc_id);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3582

r = gfx_v9_4_3_unmap_done(adev, ring->me, ring->pipe, ring->queue, ring->xcc_id);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

782

u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

784

soc15_grbm_select(adev, me, pipe, q, vm, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

972

int xcc_id, int mec, int pipe, int queue)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

985

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

998

ring->xcc_id, ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

103

static inline int jpeg_v4_0_3_core_reg_offset(u32 pipe)

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

105

if (pipe)

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

106

return ((0x40 * pipe) - 0xc80);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1123

int reg_offset = jpeg_v4_0_3_core_reg_offset(ring->pipe);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1134

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CORE_RST_CTRL, 1 << ring->pipe);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1219

adev->jpeg.inst[i].ring_dec[j].pipe = j;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

414

(ring->pipe ? (ring->pipe - 0x15) : 0),

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

576

int reg_offset = jpeg_v4_0_3_core_reg_offset(ring->pipe);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

580

JPEG_SYS_INT_EN__DJRBC0_MASK << ring->pipe,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

581

~(JPEG_SYS_INT_EN__DJRBC0_MASK << ring->pipe));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

681

jpeg_v4_0_3_core_reg_offset(ring->pipe));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

699

jpeg_v4_0_3_core_reg_offset(ring->pipe));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

725

jpeg_v4_0_3_core_reg_offset(ring->pipe),

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

101

if (pipe <= AMDGPU_MAX_JPEG_RINGS_4_0_3)

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

102

return ((0x40 * pipe) - 0xc80);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

104

return ((0x40 * pipe) - 0x440);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

286

ring->pipe,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

406

int reg_offset = ring->pipe ? jpeg_v5_0_1_core_reg_offset(ring->pipe) : 0;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

410

if (ring->pipe < AMDGPU_MAX_JPEG_RINGS_4_0_3) {

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

411

data = JPEG_SYS_INT_EN__DJRBC0_MASK << ring->pipe;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

412

mask = ~(JPEG_SYS_INT_EN__DJRBC0_MASK << ring->pipe);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

415

data = JPEG_SYS_INT_EN__DJRBC0_MASK << (ring->pipe+12);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

416

mask = ~(JPEG_SYS_INT_EN__DJRBC0_MASK << (ring->pipe+12));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

614

ring->pipe ? jpeg_v5_0_1_core_reg_offset(ring->pipe) : 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

632

ring->pipe ? jpeg_v5_0_1_core_reg_offset(ring->pipe) : 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

652

(ring->pipe ? jpeg_v5_0_1_core_reg_offset(ring->pipe) : 0),

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

822

int reg_offset = ring->pipe ? jpeg_v5_0_1_core_reg_offset(ring->pipe) : 0;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

833

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CORE_RST_CTRL, 1 << ring->pipe);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

924

adev->jpeg.inst[i].ring_dec[j].pipe = j;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

99

static int jpeg_v5_0_1_core_reg_offset(u32 pipe)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1014

enum amdgpu_mes_pipe pipe, bool prime_icache)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1022

if (!adev->mes.fw[pipe])

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1025

r = mes_v11_0_allocate_ucode_buffer(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1029

r = mes_v11_0_allocate_ucode_data_buffer(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1031

mes_v11_0_free_ucode_buffers(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1037

soc21_grbm_select(adev, 3, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1042

ucode_addr = adev->mes.uc_start_addr[pipe] >> 2;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1050

lower_32_bits(adev->mes.ucode_fw_gpu_addr[pipe]));

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1052

upper_32_bits(adev->mes.ucode_fw_gpu_addr[pipe]));

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1059

lower_32_bits(adev->mes.data_fw_gpu_addr[pipe]));

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1061

upper_32_bits(adev->mes.data_fw_gpu_addr[pipe]));

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1086

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1093

&adev->mes.eop_gpu_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1094

&adev->mes.eop_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1102

adev->mes.eop_gpu_obj[pipe]->tbo.base.size);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1104

amdgpu_bo_kunmap(adev->mes.eop_gpu_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1105

amdgpu_bo_unreserve(adev->mes.eop_gpu_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1221

soc21_grbm_select(adev, 3, ring->pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1297

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1302

if (pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1304

else if (pipe == AMDGPU_MES_SCHED_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1309

if ((pipe == AMDGPU_MES_SCHED_PIPE) &&

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1320

if (pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1340

ring->pipe = 0;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1348

sprintf(ring->name, "mes_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1363

ring->pipe = 1;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1373

ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1380

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1385

if (pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1387

else if (pipe == AMDGPU_MES_SCHED_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1407

adev->mes.mqd_backup[pipe] = kmalloc(mqd_size, GFP_KERNEL);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1408

if (!adev->mes.mqd_backup[pipe]) {

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1421

int pipe, r, bo_size;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1433

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1434

if (!adev->enable_mes_kiq && pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1437

r = mes_v11_0_allocate_eop_buf(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1441

r = mes_v11_0_mqd_sw_init(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1479

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1484

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1485

kfree(adev->mes.mqd_backup[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1487

amdgpu_bo_free_kernel(&adev->mes.eop_gpu_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1488

&adev->mes.eop_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1490

amdgpu_ucode_release(&adev->mes.fw[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1520

soc21_grbm_select(adev, 3, ring->pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1556

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1723

int pipe, r;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1728

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1729

if (!adev->enable_mes_kiq && pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1731

r = amdgpu_mes_init_microcode(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

836

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

844

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

846

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

854

&adev->mes.ucode_fw_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

855

&adev->mes.ucode_fw_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

856

(void **)&adev->mes.ucode_fw_ptr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

862

memcpy(adev->mes.ucode_fw_ptr[pipe], fw_data, fw_size);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

864

amdgpu_bo_kunmap(adev->mes.ucode_fw_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

865

amdgpu_bo_unreserve(adev->mes.ucode_fw_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

871

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

879

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

881

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

887

pipe, fw_size, GFX_MES_DRAM_SIZE);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

895

&adev->mes.data_fw_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

896

&adev->mes.data_fw_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

897

(void **)&adev->mes.data_fw_ptr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

903

memcpy(adev->mes.data_fw_ptr[pipe], fw_data, fw_size);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

905

amdgpu_bo_kunmap(adev->mes.data_fw_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

906

amdgpu_bo_unreserve(adev->mes.data_fw_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

912

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

914

amdgpu_bo_free_kernel(&adev->mes.data_fw_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

915

&adev->mes.data_fw_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

916

(void **)&adev->mes.data_fw_ptr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

918

amdgpu_bo_free_kernel(&adev->mes.ucode_fw_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

919

&adev->mes.ucode_fw_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

920

(void **)&adev->mes.ucode_fw_ptr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

925

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

934

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

935

soc21_grbm_select(adev, 3, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

937

if (pipe == AMDGPU_MES_SCHED_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

940

else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

952

uint32_t pipe, data = 0;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

972

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

974

pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

977

soc21_grbm_select(adev, 3, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

979

ucode_addr = adev->mes.uc_start_addr[pipe] >> 2;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1008

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1016

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1018

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1025

&adev->mes.ucode_fw_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1026

&adev->mes.ucode_fw_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1027

(void **)&adev->mes.ucode_fw_ptr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1033

memcpy(adev->mes.ucode_fw_ptr[pipe], fw_data, fw_size);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1035

amdgpu_bo_kunmap(adev->mes.ucode_fw_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1036

amdgpu_bo_unreserve(adev->mes.ucode_fw_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1042

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1050

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1052

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1059

&adev->mes.data_fw_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1060

&adev->mes.data_fw_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1061

(void **)&adev->mes.data_fw_ptr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1067

memcpy(adev->mes.data_fw_ptr[pipe], fw_data, fw_size);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1069

amdgpu_bo_kunmap(adev->mes.data_fw_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1070

amdgpu_bo_unreserve(adev->mes.data_fw_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1076

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1078

amdgpu_bo_free_kernel(&adev->mes.data_fw_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1079

&adev->mes.data_fw_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1080

(void **)&adev->mes.data_fw_ptr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1082

amdgpu_bo_free_kernel(&adev->mes.ucode_fw_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1083

&adev->mes.ucode_fw_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1084

(void **)&adev->mes.ucode_fw_ptr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1090

uint32_t pipe, data = 0;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1094

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1095

soc21_grbm_select(adev, 3, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1099

if (adev->mes.event_log_size >= (pipe + 1) * log_size) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1102

pipe * log_size + AMDGPU_MES_LOG_BUFFER_SIZE));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1105

pipe * log_size + AMDGPU_MES_LOG_BUFFER_SIZE));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1113

if (pipe == 0)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1119

ucode_addr = adev->mes.uc_start_addr[pipe] >> 2;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1127

if (pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1159

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1164

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1166

soc21_grbm_select(adev, 3, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1169

ucode_addr = adev->mes.uc_start_addr[pipe] >> 2;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1182

enum amdgpu_mes_pipe pipe, bool prime_icache)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1189

if (!adev->mes.fw[pipe])

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1192

r = mes_v12_0_allocate_ucode_buffer(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1196

r = mes_v12_0_allocate_ucode_data_buffer(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1198

mes_v12_0_free_ucode_buffers(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1204

soc21_grbm_select(adev, 3, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1210

lower_32_bits(adev->mes.ucode_fw_gpu_addr[pipe]));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1212

upper_32_bits(adev->mes.ucode_fw_gpu_addr[pipe]));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1219

lower_32_bits(adev->mes.data_fw_gpu_addr[pipe]));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1221

upper_32_bits(adev->mes.data_fw_gpu_addr[pipe]));

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1246

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1253

&adev->mes.eop_gpu_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1254

&adev->mes.eop_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1262

adev->mes.eop_gpu_obj[pipe]->tbo.base.size);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1264

amdgpu_bo_kunmap(adev->mes.eop_gpu_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1265

amdgpu_bo_unreserve(adev->mes.eop_gpu_obj[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1386

soc21_grbm_select(adev, 3, ring->pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1467

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1472

if (!adev->enable_uni_mes && pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1475

ring = &adev->mes.ring[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1477

if ((adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) &&

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1488

if (pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1499

if (((pipe == AMDGPU_MES_SCHED_PIPE) && !adev->mes.sched_version) ||

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

150

int pipe, void *pkt, int size,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1500

((pipe == AMDGPU_MES_KIQ_PIPE) && !adev->mes.kiq_version)) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1503

soc21_grbm_select(adev, 3, pipe, 0, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1505

if (pipe == AMDGPU_MES_SCHED_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1507

else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1517

static int mes_v12_0_ring_init(struct amdgpu_device *adev, int pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1521

ring = &adev->mes.ring[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1526

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1531

ring->eop_gpu_addr = adev->mes.eop_gpu_addr[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1533

sprintf(ring->name, "mes_%d.%d.%d", ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1535

if (pipe == AMDGPU_MES_SCHED_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1553

ring->pipe = 1;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

156

struct amdgpu_ring *ring = &mes->ring[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1563

ring->me, ring->pipe, ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

157

spinlock_t *ring_lock = &mes->ring_lock[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1570

enum amdgpu_mes_pipe pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1575

if (!adev->enable_uni_mes && pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1578

ring = &adev->mes.ring[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1594

adev->mes.mqd_backup[pipe] = kmalloc(mqd_size, GFP_KERNEL);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1595

if (!adev->mes.mqd_backup[pipe])

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1606

int pipe, r;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1620

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1621

r = mes_v12_0_allocate_eop_buf(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1625

r = mes_v12_0_mqd_sw_init(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1629

if (!adev->enable_uni_mes && pipe == AMDGPU_MES_KIQ_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1633

r = mes_v12_0_ring_init(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1638

&adev->mes.resource_1[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1639

&adev->mes.resource_1_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1640

&adev->mes.resource_1_addr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1642

dev_err(adev->dev, "(%d) failed to create mes resource_1 bo pipe[%d]\n", r, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1654

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1656

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1657

amdgpu_bo_free_kernel(&adev->mes.resource_1[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1658

&adev->mes.resource_1_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1659

&adev->mes.resource_1_addr[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1661

kfree(adev->mes.mqd_backup[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1663

amdgpu_bo_free_kernel(&adev->mes.eop_gpu_obj[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1664

&adev->mes.eop_gpu_addr[pipe],

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1666

amdgpu_ucode_release(&adev->mes.fw[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1668

if (adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1669

amdgpu_bo_free_kernel(&adev->mes.ring[pipe].mqd_obj,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1670

&adev->mes.ring[pipe].mqd_gpu_addr,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1671

&adev->mes.ring[pipe].mqd_ptr);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1672

amdgpu_ring_fini(&adev->mes.ring[pipe]);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1736

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1908

int pipe, r;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1913

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1914

r = amdgpu_mes_init_microcode(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

223

pipe, op_str, misc_op_str);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

226

pipe, op_str);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

229

pipe, x_pkt->header.opcode);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

241

pipe, op_str, misc_op_str);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

244

pipe, op_str);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

247

pipe, x_pkt->header.opcode);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

514

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

532

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

534

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

536

return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

545

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

571

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

573

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

575

return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

620

static int mes_v12_0_query_sched_status(struct amdgpu_mes *mes, int pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

630

return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

639

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

642

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

644

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

680

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

706

return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

711

static int mes_v12_0_set_hw_resources_1(struct amdgpu_mes *mes, int pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

722

mes->resource_1_gpu_addr[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

724

return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

729

static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes, int pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

734

uint32_t mes_rev = (pipe == AMDGPU_MES_SCHED_PIPE) ?

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

744

if (pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

768

mes->sch_ctx_gpu_addr[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

770

mes->query_status_fence_gpu_addr[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

797

pipe * (AMDGPU_MES_LOG_BUFFER_SIZE + AMDGPU_MES_MSCRATCH_SIZE);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

803

return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

887

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

917

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

919

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

921

return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1007

uint32_t pipe, data = 0;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1016

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1017

soc_v1_0_grbm_select(adev, 3, pipe, 0, 0,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1020

ucode_addr = adev->mes.uc_start_addr[pipe] >> 2;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1059

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1064

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1066

soc_v1_0_grbm_select(adev, 3, pipe, 0, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1069

ucode_addr = adev->mes.uc_start_addr[pipe] >> 2;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1082

enum amdgpu_mes_pipe pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1085

int r, inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1090

if (!adev->mes.fw[pipe])

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1093

r = mes_v12_1_allocate_ucode_buffer(adev, pipe, xcc_id);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1097

r = mes_v12_1_allocate_ucode_data_buffer(adev, pipe, xcc_id);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1099

mes_v12_1_free_ucode_buffers(adev, pipe, xcc_id);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1105

soc_v1_0_grbm_select(adev, 3, pipe, 0, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1147

enum amdgpu_mes_pipe pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1150

int r, inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1173

enum amdgpu_mes_pipe pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1176

int r, inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1178

if (pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1312

soc_v1_0_grbm_select(adev, 3, ring->pipe, 0, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1393

enum amdgpu_mes_pipe pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1399

if (!adev->enable_uni_mes && pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1402

ring = &adev->mes.ring[MES_PIPE_INST(xcc_id, pipe)];

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1404

if ((adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) &&

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1415

if (pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1428

soc_v1_0_grbm_select(adev, 3, pipe, 0, 0, GET_INST(GC, xcc_id));

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1430

if (pipe == AMDGPU_MES_SCHED_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1432

else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1442

int xcc_id, int pipe)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1445

int inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1452

ring->pipe = pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1463

(unsigned char)ring->pipe, (unsigned char)ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1465

if (pipe == AMDGPU_MES_SCHED_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

147

int xcc_id, int pipe, void *pkt,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1490

ring->pipe = 1;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1507

(unsigned char)ring->pipe, (unsigned char)ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1514

enum amdgpu_mes_pipe pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1519

int inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1521

if (!adev->enable_uni_mes && pipe == AMDGPU_MES_KIQ_PIPE)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

153

struct amdgpu_ring *ring = &mes->ring[MES_PIPE_INST(xcc_id, pipe)];

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

154

spinlock_t *ring_lock = &mes->ring_lock[MES_PIPE_INST(xcc_id, pipe)];

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1552

int pipe, r, xcc_id, num_xcc = NUM_XCC(adev->gfx.xcc_mask);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1567

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1568

r = mes_v12_1_allocate_eop_buf(adev, pipe, xcc_id);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1572

r = mes_v12_1_mqd_sw_init(adev, pipe, xcc_id);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1576

if (!adev->enable_uni_mes && pipe ==

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1580

r = mes_v12_1_ring_init(adev, xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1586

pipe, xcc_id);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1599

int pipe, inst, xcc_id, num_xcc = NUM_XCC(adev->gfx.xcc_mask);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1602

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1603

inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1616

if (adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1691

tmp |= (ring->me << 5) | (ring->pipe << 3) | (ring->queue);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1939

int pipe, r;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1941

for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1942

r = amdgpu_mes_init_microcode(adev, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

220

xcc_id, pipe, op_str, misc_op_str);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

223

xcc_id, pipe, op_str);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

226

xcc_id, pipe, x_pkt->header.opcode);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

233

xcc_id, pipe, op_str, misc_op_str);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

237

xcc_id, pipe, op_str);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

241

xcc_id, pipe, x_pkt->header.opcode);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

254

dev_err(adev->dev, "MES(%d, %d) ring buffer is full.\n", xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

370

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

383

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

385

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

388

input->xcc_id, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

397

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

415

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

417

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

420

input->xcc_id, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

429

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

455

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

457

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

460

input->xcc_id, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

478

int pipe, int xcc_id)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

488

return mes_v12_1_submit_pkt_and_poll_completion(mes, xcc_id, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

521

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

524

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

526

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

598

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

624

input->xcc_id, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

630

int pipe, int xcc_id)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

633

int master_xcc_id, inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

642

if (mes->enable_coop_mode && pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

649

return mes_v12_1_submit_pkt_and_poll_completion(mes, xcc_id, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

666

int pipe, int xcc_id)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

678

if (pipe == AMDGPU_MES_SCHED_PIPE) {

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

700

mes->sch_ctx_gpu_addr[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

702

mes->query_status_fence_gpu_addr[pipe];

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

730

mes->event_log_gpu_addr + MES_PIPE_INST(xcc_id, pipe) * AMDGPU_MES_LOG_BUFFER_SIZE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

736

return mes_v12_1_submit_pkt_and_poll_completion(mes, xcc_id, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

822

int pipe;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

847

pipe = AMDGPU_MES_KIQ_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

849

pipe = AMDGPU_MES_SCHED_PIPE;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

852

input->xcc_id, pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

919

enum amdgpu_mes_pipe pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

922

int r, inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

928

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

930

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

954

enum amdgpu_mes_pipe pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

957

int r, inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

963

adev->mes.fw[pipe]->data;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

965

fw_data = (const __le32 *)(adev->mes.fw[pipe]->data +

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

989

enum amdgpu_mes_pipe pipe,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

992

int inst = MES_PIPE_INST(xcc_id, pipe);

drivers/gpu/drm/amd/amdgpu/nv.c

318

u32 me, u32 pipe, u32 queue, u32 vmid)

drivers/gpu/drm/amd/amdgpu/nv.c

321

grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/nv.h

32

u32 me, u32 pipe, u32 queue, u32 vmid);

drivers/gpu/drm/amd/amdgpu/si.h

30

u32 me, u32 pipe, u32 queue, u32 vmid);

drivers/gpu/drm/amd/amdgpu/soc15.c

364

u32 me, u32 pipe, u32 queue, u32 vmid, int xcc_id)

drivers/gpu/drm/amd/amdgpu/soc15.c

367

grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/soc15.h

110

u32 me, u32 pipe, u32 queue, u32 vmid, int xcc_id);

drivers/gpu/drm/amd/amdgpu/soc21.c

270

u32 me, u32 pipe, u32 queue, u32 vmid)

drivers/gpu/drm/amd/amdgpu/soc21.c

273

grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/soc21.h

29

u32 me, u32 pipe, u32 queue, u32 vmid);

drivers/gpu/drm/amd/amdgpu/soc24.c

102

u32 me, u32 pipe, u32 queue, u32 vmid)

drivers/gpu/drm/amd/amdgpu/soc24.c

105

grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/soc24.h

29

u32 me, u32 pipe, u32 queue, u32 vmid);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

117

u32 me, u32 pipe,

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

122

grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.h

29

u32 me, u32 pipe,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1678

(ring->pipe ? (ring->pipe - 0x15) : 0),

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1341

(ring->pipe ? (ring->pipe - 0x15) : 0),

drivers/gpu/drm/amd/amdgpu/vi.c

579

u32 me, u32 pipe, u32 queue, u32 vmid)

drivers/gpu/drm/amd/amdgpu/vi.c

582

srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, PIPEID, pipe);

drivers/gpu/drm/amd/amdgpu/vi.h

30

u32 me, u32 pipe, u32 queue, u32 vmid);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

1045

q->pipe, q->queue,

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

1177

KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

1315

retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd, q->pipe,

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

1502

int pipe, queue;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

1517

for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

1518

int pipe_offset = pipe * get_queues_per_pipe(dqm);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

1523

dqm->allocated_queues[pipe] |= 1 << queue;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

2157

uint32_t mec, pipe, queue;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

2166

amdgpu_queue_mask_bit_to_mec_queue(dqm->dev->adev, i, &mec, &pipe, &queue);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

2170

dqm->dev->adev, pipe, queue, xcc_id);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

2176

hang_info.pipe_id = pipe;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3668

int pipe, queue;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3695

for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3696

int pipe_offset = pipe * get_queues_per_pipe(dqm);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3704

pipe, queue,

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3712

xcc_id, pipe, queue);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3721

for (pipe = sdma_engine_start;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3722

pipe < (sdma_engine_start + get_num_all_sdma_engines(dqm));

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3723

pipe++) {

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3728

dqm->dev->adev, pipe, queue, &dump, &n_regs);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

3733

pipe, queue);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

664

q->pipe, q->queue);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

705

retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd, q->pipe,

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

747

int pipe, bit, i;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

751

for (pipe = dqm->next_pipe_to_allocate, i = 0;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

753

pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) {

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

755

if (!is_pipe_enabled(dqm, 0, pipe))

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

758

if (dqm->allocated_queues[pipe] != 0) {

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

759

bit = ffs(dqm->allocated_queues[pipe]) - 1;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

760

dqm->allocated_queues[pipe] &= ~(1 << bit);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

761

q->pipe = pipe;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

771

pr_debug("hqd slot - pipe %d, queue %d\n", q->pipe, q->queue);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

773

dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

781

dqm->allocated_queues[q->pipe] |= (1 << q->queue);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

83

static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe)

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

87

+ pipe) * dqm->dev->kfd->shared_resources.num_queue_per_pipe;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

887

q->pipe, q->queue);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

998

KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);

drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c

144

kq->queue->pipe = KFD_CIK_HIQ_PIPE;

drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c

147

kq->queue->pipe, kq->queue->queue,

drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c

179

kq->queue->pipe,

drivers/gpu/drm/amd/amdkfd/kfd_priv.h

612

uint32_t pipe;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10620

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10646

pipe = &dm->dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10701

wb_info->writeback_source_plane = pipe->plane_state;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1107

int pipe, bool *enabled,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

506

e->pipe = amdgpu_crtc->crtc_id;

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2786

const struct pipe_ctx pipe[], int pipe_count, struct bw_calcs_data *data)

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2803

if (!pipe[i].stream || !pipe[i].bottom_pipe)

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2806

ASSERT(pipe[i].plane_state);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2809

if (!pipe[i].plane_state->visible)

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2814

if (!pipe[i].plane_state->visible)

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2822

data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2823

data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2824

data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->timing.pix_clk_100hz, 10000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2825

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2827

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2828

data->h_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.h_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2829

data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2830

data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.horz.value);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2831

data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2832

switch (pipe[i].plane_state->rotation) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2848

switch (pipe[i].plane_state->format) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2880

data->src_height[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.viewport.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2881

data->src_width[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.viewport.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2883

pipe[i].bottom_pipe->plane_state->plane_size.surface_pitch);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2884

data->h_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.h_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2885

data->v_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.v_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2887

pipe[i].bottom_pipe->plane_res.scl_data.ratios.horz.value);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2889

pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2890

switch (pipe[i].bottom_pipe->plane_state->rotation) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2915

if (!pipe[i].stream || pipe[i].bottom_pipe)

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2921

data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2922

data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2923

pixel_clock_100hz = pipe[i].stream->timing.pix_clk_100hz;

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2924

if (pipe[i].stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2927

if (pipe[i].plane_state) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2928

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2930

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2931

data->h_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.h_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2932

data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2933

data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.horz.value);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2934

data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2935

switch (pipe[i].plane_state->rotation) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2951

switch (pipe[i].plane_state->format) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2976

} else if (pipe[i].stream->dst.width != 0 &&

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2977

pipe[i].stream->dst.height != 0 &&

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2978

pipe[i].stream->src.width != 0 &&

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2979

pipe[i].stream->src.height != 0) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2980

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->src.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2982

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->src.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2983

data->h_taps[num_displays + 4] = pipe[i].stream->src.width == pipe[i].stream->dst.width ? bw_int_to_fixed(1) : bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2984

data->v_taps[num_displays + 4] = pipe[i].stream->src.height == pipe[i].stream->dst.height ? bw_int_to_fixed(1) : bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2985

data->h_scale_ratio[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->src.width, pipe[i].stream->dst.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2986

data->v_scale_ratio[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->src.height, pipe[i].stream->dst.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2990

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_addressable);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2992

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_addressable);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3009

static bool all_displays_in_sync(const struct pipe_ctx pipe[],

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3016

if (!resource_is_pipe_type(&pipe[i], OPP_HEAD))

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3019

active_pipes[num_active_pipes++] = &pipe[i];

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3044

const struct pipe_ctx pipe[],

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3052

populate_initial_data(pipe, pipe_count, data);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3055

calcs_output->all_displays_in_sync = all_displays_in_sync(pipe, pipe_count);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

120

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

122

if (pipe->top_pipe || pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

124

if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

126

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

129

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

155

struct pipe_ctx *pipe = safe_to_lower

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

159

if (pipe->top_pipe || pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

161

if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

163

if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

164

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

168

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

106

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

108

if (pipe->top_pipe || pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

110

if (pipe->stream && (pipe->stream->dpms_off || pipe->plane_state == NULL ||

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

111

dc_is_virtual_signal(pipe->stream->signal))) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

114

if (should_disable_otg(pipe)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

116

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

119

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

90

static bool should_disable_otg(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

94

if (pipe->stream->link->link_enc && pipe->stream->link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

95

pipe->stream->link->link_enc->funcs->is_dig_enabled(pipe->stream->link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

109

struct pipe_ctx *pipe = safe_to_lower

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

113

if (pipe->top_pipe || pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

115

if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

116

!pipe->stream->link_enc)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

118

if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

119

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

123

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

490

static bool dcn32_check_native_scaling(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

493

int width = pipe->plane_state->src_rect.width;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

494

int height = pipe->plane_state->src_rect.height;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

496

if (pipe->stream->timing.h_addressable == width &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

497

pipe->stream->timing.v_addressable == height &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

498

pipe->plane_state->dst_rect.width == width &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

499

pipe->plane_state->dst_rect.height == height)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

203

struct pipe_ctx *pipe = safe_to_lower

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

207

struct link_encoder *pipe_link_enc = pipe->link_res.dio_link_enc;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

211

if (pipe->top_pipe || pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

217

if (pipe->stream)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

218

pipe_link_enc = pipe->stream->link_enc;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

238

if (!has_active_hpo && !stream_changed_otg_dig_on && pipe->stream &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

239

(pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) || !pipe_link_enc) &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

240

!dccg->ctx->dc->link_srv->dp_is_128b_132b_signal(pipe)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

243

if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

244

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

248

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

395

static bool dcn401_check_native_scaling(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

398

int width = pipe->plane_state->src_rect.width;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

399

int height = pipe->plane_state->src_rect.height;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

401

if (pipe->stream->timing.h_addressable == width &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

402

pipe->stream->timing.v_addressable == height &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

403

pipe->plane_state->dst_rect.width == width &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

404

pipe->plane_state->dst_rect.height == height)

drivers/gpu/drm/amd/display/dc/core/dc.c

1316

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

1318

if (pipe->plane_state == plane_state) {

drivers/gpu/drm/amd/display/dc/core/dc.c

1319

memcpy(color, &pipe->visual_confirm_color, sizeof(struct tg_color));

drivers/gpu/drm/amd/display/dc/core/dc.c

1331

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

1374

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

1375

tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/core/dc.c

1385

dc->hwseq->funcs.blank_pixel_data(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/core/dc.c

1396

if (pipe->stream && pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/core/dc.c

1398

set_p_state_switch_method(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

1399

dc_update_visual_confirm_color(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

1444

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/core/dc.c

1446

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

1447

stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/core/dc.c

1455

if (pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/core/dc.c

1483

pipe->stream_res.pix_clk_params.requested_pix_clk_100hz;

drivers/gpu/drm/amd/display/dc/core/dc.c

1486

dc->link_srv->set_dpms_off(pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

1487

pipe->stream->dpms_off = false;

drivers/gpu/drm/amd/display/dc/core/dc.c

2023

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

2029

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

2032

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

2035

for (j = 0; pipe && j < stream_count; j++) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2036

if (should_update_pipe_for_stream(context, pipe, streams[j]) &&

drivers/gpu/drm/amd/display/dc/core/dc.c

2038

dc->hwss.setup_stereo(pipe, dc);

drivers/gpu/drm/amd/display/dc/core/dc.c

2089

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/core/dc.c

2097

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

2098

tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/core/dc.c

2100

if (!resource_is_pipe_type(pipe, OTG_MASTER) ||

drivers/gpu/drm/amd/display/dc/core/dc.c

2102

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2106

if (resource_calculate_det_for_stream(context, pipe) <

drivers/gpu/drm/amd/display/dc/core/dc.c

2128

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

2164

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

2166

if (resource_is_pipe_type(pipe, OTG_MASTER)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2168

dc->hwseq->funcs.wait_for_pipe_update_if_needed(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/core/dc.c

2209

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

2210

dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

2247

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

2248

dc->hwseq->funcs.set_wait_for_update_needed_for_pipe(dc, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

2284

pipe = &context->res_ctx.pipe_ctx[k];

drivers/gpu/drm/amd/display/dc/core/dc.c

2286

for (l = 0 ; pipe && l < context->stream_count; l++) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2288

context->streams[l] == pipe->stream &&

drivers/gpu/drm/amd/display/dc/core/dc.c

2290

dc->hwss.setup_stereo(pipe, dc);

drivers/gpu/drm/amd/display/dc/core/dc.c

2373

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

2421

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

2422

if (pipe->next_odm_pipe)

drivers/gpu/drm/amd/display/dc/core/dc.c

2532

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

2535

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

2538

if (!pipe->plane_state || (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM))

drivers/gpu/drm/amd/display/dc/core/dc.c

2542

pipe->plane_state->status.is_flip_pending = false;

drivers/gpu/drm/amd/display/dc/core/dc.c

2543

dc->hwss.update_pending_status(pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

2544

if (pipe->plane_state->status.is_flip_pending)

drivers/gpu/drm/amd/display/dc/core/dc.c

4102

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4104

if (pipe->stream && pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4106

set_p_state_switch_method(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

4109

dc_update_visual_confirm_color(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

4203

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4205

if (pipe->stream && pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4207

set_p_state_switch_method(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

4210

dc_update_visual_confirm_color(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

4244

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4246

if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/core/dc.c

432

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

434

if (pipe->stream == stream && pipe->stream_res.tg) {

drivers/gpu/drm/amd/display/dc/core/dc.c

436

dc->hwss.set_long_vtotal(&pipe, 1, adjust->v_total_min, adjust->v_total_max);

drivers/gpu/drm/amd/display/dc/core/dc.c

4679

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4681

if (dc_state_get_pipe_subvp_type(dc->current_state, pipe) != SUBVP_NONE) {

drivers/gpu/drm/amd/display/dc/core/dc.c

496

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4971

struct pipe_ctx *pipe = &transition_base_context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4973

if (pipe->plane_state)

drivers/gpu/drm/amd/display/dc/core/dc.c

498

if (pipe->stream == stream && pipe->stream_res.tg) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4981

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4983

if (pipe->stream && dc_state_get_pipe_subvp_type(dc->current_state, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/core/dc.c

499

dc->hwss.set_drr(&pipe,

drivers/gpu/drm/amd/display/dc/core/dc.c

4993

struct pipe_ctx *pipe = &transition_base_context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4995

if (resource_is_pipe_type(pipe, OTG_MASTER)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4996

odm_in_use = resource_get_odm_slice_count(pipe) > 1;

drivers/gpu/drm/amd/display/dc/core/dc.c

538

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

540

if (pipe->stream == stream && pipe->stream_res.tg) {

drivers/gpu/drm/amd/display/dc/core/dc.c

544

if (pipe->stream_res.tg->funcs->get_last_used_drr_vtotal) {

drivers/gpu/drm/amd/display/dc/core/dc.c

545

pipe->stream_res.tg->funcs->get_last_used_drr_vtotal(pipe->stream_res.tg, refresh_rate);

drivers/gpu/drm/amd/display/dc/core/dc.c

5695

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/core/dc.c

5732

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

5733

subvp_pipe_type[i] = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

5790

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

5794

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

5796

if (pipe->stream != NULL) {

drivers/gpu/drm/amd/display/dc/core/dc.c

5797

dc->hwss.disable_pixel_data(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/core/dc.c

5800

pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/core/dc.c

5801

pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/core/dc.c

5802

pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/core/dc.c

5804

hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/core/dc.c

5814

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

5816

if (pipe->stream != NULL) {

drivers/gpu/drm/amd/display/dc/core/dc.c

5817

dc->hwss.disable_pixel_data(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/core/dc.c

5819

hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/core/dc.c

599

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

604

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

605

if (pipe->stream == stream && !pipe->top_pipe && !pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/core/dc.c

614

mux_mapping.otg_output_num = pipe->stream_res.tg->inst;

drivers/gpu/drm/amd/display/dc/core/dc.c

6333

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/core/dc.c

6346

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

6348

if (pipe->stream == stream && pipe->stream_res.tg)

drivers/gpu/drm/amd/display/dc/core/dc.c

6369

if (pipe->stream_res.abm && pipe->stream_res.abm->funcs->set_abm_pause)

drivers/gpu/drm/amd/display/dc/core/dc.c

6370

pipe->stream_res.abm->funcs->set_abm_pause(pipe->stream_res.abm, !enable, i, pipe->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/core/dc.c

6388

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/core/dc.c

6397

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

6399

if (pipe->stream == stream && pipe->stream_res.tg)

drivers/gpu/drm/amd/display/dc/core/dc.c

6418

if (pipe->stream_res.abm &&

drivers/gpu/drm/amd/display/dc/core/dc.c

6419

pipe->stream_res.abm->funcs->save_restore)

drivers/gpu/drm/amd/display/dc/core/dc.c

6420

return pipe->stream_res.abm->funcs->save_restore(

drivers/gpu/drm/amd/display/dc/core/dc.c

6421

pipe->stream_res.abm,

drivers/gpu/drm/amd/display/dc/core/dc.c

665

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

670

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

671

if (pipe->stream == stream && !pipe->top_pipe && !pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/core/dc.c

680

mux_mapping.otg_output_num = pipe->stream_res.tg->inst;

drivers/gpu/drm/amd/display/dc/core/dc.c

715

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc.c

719

pipe = resource_get_otg_master_for_stream(

drivers/gpu/drm/amd/display/dc/core/dc.c

723

if (pipe == NULL)

drivers/gpu/drm/amd/display/dc/core/dc.c

731

param.windowa_x_end = pipe->stream->timing.h_addressable;

drivers/gpu/drm/amd/display/dc/core/dc.c

732

param.windowa_y_end = pipe->stream->timing.v_addressable;

drivers/gpu/drm/amd/display/dc/core/dc.c

735

param.windowb_x_end = pipe->stream->timing.h_addressable;

drivers/gpu/drm/amd/display/dc/core/dc.c

736

param.windowb_y_end = pipe->stream->timing.v_addressable;

drivers/gpu/drm/amd/display/dc/core/dc.c

750

param.dsc_mode = pipe->stream->timing.flags.DSC ? 1:0;

drivers/gpu/drm/amd/display/dc/core/dc.c

751

param.odm_mode = pipe->next_odm_pipe ? 1:0;

drivers/gpu/drm/amd/display/dc/core/dc.c

761

tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/core/dc.c

789

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/core/dc.c

795

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

796

if (pipe->stream == stream)

drivers/gpu/drm/amd/display/dc/core/dc.c

803

tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2134

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2136

if (!pipe->plane_state || dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2142

pipe->plane_state->status.is_flip_pending = false;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2143

dc->hwss.update_pending_status(pipe);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2144

if (!pipe->plane_state->status.is_flip_pending)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2149

ASSERT(!pipe->plane_state->status.is_flip_pending);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

669

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

671

if (pipe->stream && dc_state_get_paired_subvp_stream(context, pipe->stream) &&

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

672

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

677

if (pipe_ctx->stream == pipe->stream)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2037

struct pipe_ctx *pipe = &res_ctx->pipe_ctx[opp_head->pipe_idx];

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2044

while (pipe && resource_is_pipe_type(pipe, DPP_PIPE)) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2046

dpp_pipes[i++] = pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2047

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2057

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2060

pipe = &res_ctx->pipe_ctx[j];

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2061

if (pipe->plane_state == plane && pipe->prev_odm_pipe == NULL) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2062

if (resource_is_pipe_type(pipe, OPP_HEAD) ||

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2063

pipe->top_pipe->plane_state != plane)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2069

if (pipe->next_odm_pipe)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2070

while (pipe) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2071

dpp_pipes[i++] = pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2072

pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2075

while (pipe && pipe->plane_state == plane) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2076

dpp_pipes[i++] = pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2077

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2129

int resource_get_mpc_slice_count(const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2132

const struct pipe_ctx *other_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2134

while (other_pipe && other_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2138

other_pipe = pipe->top_pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2139

while (other_pipe && other_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2147

int resource_get_odm_slice_count(const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2151

pipe = resource_get_otg_master(pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2153

while (pipe->next_odm_pipe) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2155

pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2346

static void resource_log_pipe(struct dc *dc, struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2358

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2359

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2360

pipe->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2362

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2363

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2364

pipe->stream_res.tg->inst, is_phantom_pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2370

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2371

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2372

pipe->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2374

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2375

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2376

pipe->stream_res.tg->inst, is_phantom_pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2382

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2383

pipe->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2385

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2386

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2387

pipe->stream_res.tg->inst, is_phantom_pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2392

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2393

pipe->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2395

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2396

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2397

pipe->stream_res.tg->inst, is_phantom_pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2402

pipe->plane_res.dpp->inst);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2404

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2405

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2406

pipe->stream_res.tg->inst, is_phantom_pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2411

pipe->plane_res.dpp->inst);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2413

pipe->plane_res.dpp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2414

pipe->stream_res.opp->inst,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2415

pipe->stream_res.tg->inst, is_phantom_pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2559

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2563

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2564

if (pipe->stream == otg_master->stream && pipe->plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2565

result = resource_build_scaling_params(pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2582

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2586

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2587

if (pipe->plane_state == plane)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2588

result = resource_build_scaling_params(pipe);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

702

const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

711

(dc_is_dp_signal(pipe->stream->signal) &&

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

713

pipe->stream)))

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

717

&& dc_is_dual_link_signal(pipe->stream->signal))

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

720

if (dc_is_hdmi_signal(pipe->stream->signal)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

725

pipe_with_clk_src->stream, pipe->stream))

drivers/gpu/drm/amd/display/dc/core/dc_state.c

924

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc_state.c

926

if (pipe->plane_state && pipe->stream && dc_state_get_pipe_subvp_type(state, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/core/dc_state.c

927

phantom_stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

804

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

811

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

812

if (pipe->stream == stream)

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

821

return dc->hwss.dmdata_status_done(pipe);

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

883

struct pipe_ctx *pipe = &stream->ctx->dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

885

if (pipe->stream == stream)

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

886

return pipe;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1263

void dc_dmub_srv_program_cursor_now(struct dc *dc, const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1271

if (!pipe || !pipe->stream || !pipe->stream_res.tg)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1280

cntl->data.otg_inst = pipe->stream_res.tg->inst;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

421

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

423

if (pipe->stream == stream && pipe->stream_res.tg)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

469

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

471

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

478

stream_status = dc_state_get_stream_status(context, pipe->stream);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

487

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

489

if (!resource_is_pipe_type(pipe, OTG_MASTER))

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

492

stream_status = dc_state_get_stream_status(context, pipe->stream);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

494

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

495

uint8_t min_refresh_in_hz = (pipe->stream->timing.min_refresh_in_uhz + 999999) / 1000000;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

497

config_data->pipe_data[k].pix_clk_100hz = pipe->stream->timing.pix_clk_100hz;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

500

config_data->pipe_data[k].pipes = dc_dmub_srv_get_pipes_for_stream(dc, pipe->stream);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

501

dc_dmub_srv_populate_fams_pipe_info(dc, context, pipe, &config_data->pipe_data[k]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

668

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

674

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

678

if (!resource_is_pipe_type(pipe, OTG_MASTER) ||

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

679

!resource_is_pipe_type(pipe, DPP_PIPE))

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

683

if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

700

populate_subvp_cmd_drr_info(dc, context, pipe, vblank_pipe, pipe_data);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

897

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

901

if (resource_is_pipe_type(pipe, OTG_MASTER) &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

902

resource_is_pipe_type(pipe, DPP_PIPE) &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

903

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

904

subvp_pipes[subvp_count++] = pipe;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

910

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

911

pipe_mall_type = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

913

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

920

if (resource_is_pipe_type(pipe, OTG_MASTER) &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

921

resource_is_pipe_type(pipe, DPP_PIPE) &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

923

populate_subvp_cmd_pipe_info(dc, context, &cmd, pipe, cmd_pipe_index++);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

924

} else if (resource_is_pipe_type(pipe, OTG_MASTER) &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

925

resource_is_pipe_type(pipe, DPP_PIPE) &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

929

populate_subvp_cmd_vblank_pipe_info(dc, context, &cmd, pipe, cmd_pipe_index++);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

353

void dc_dmub_srv_program_cursor_now(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1004

pipe->plane_state->format, &bpe) ? dcn_bw_yes : dcn_bw_no;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1008

pipe->plane_state->format);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1010

pipe->plane_state->tiling_info.gfx9.swizzle);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1011

v->lb_bit_per_pixel[input_idx] = tl_lb_bpp_to_int(pipe->plane_res.scl_data.lb_params.depth);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1012

v->override_hta_ps[input_idx] = pipe->plane_res.scl_data.taps.h_taps;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1013

v->override_vta_ps[input_idx] = pipe->plane_res.scl_data.taps.v_taps;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1014

v->override_hta_pschroma[input_idx] = pipe->plane_res.scl_data.taps.h_taps_c;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1015

v->override_vta_pschroma[input_idx] = pipe->plane_res.scl_data.taps.v_taps_c;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1025

v->source_scan[input_idx] = (pipe->plane_state->rotation % 2) ? dcn_bw_vert : dcn_bw_hor;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1030

v->output_format[input_idx] = pipe->stream->timing.pixel_encoding ==

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1032

v->output[input_idx] = pipe->stream->signal ==

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1036

switch (pipe->stream->timing.display_color_depth) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1200

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1203

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1206

if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state)

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1209

pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx];

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1210

pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx];

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1211

pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx];

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1212

pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx];

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1214

pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1215

pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1216

vesa_sync_start = pipe->stream->timing.v_addressable +

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1217

pipe->stream->timing.v_border_bottom +

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1218

pipe->stream->timing.v_front_porch;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1220

asic_blank_end = (pipe->stream->timing.v_total -

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1222

pipe->stream->timing.v_border_top)

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1223

* (pipe->stream->timing.flags.INTERLACE ? 1 : 0);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1226

(pipe->stream->timing.v_border_top +

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1227

pipe->stream->timing.v_addressable +

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1228

pipe->stream->timing.v_border_bottom)

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1229

* (pipe->stream->timing.flags.INTERLACE ? 1 : 0);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1231

pipe->pipe_dlg_param.vblank_start = asic_blank_start;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1232

pipe->pipe_dlg_param.vblank_end = asic_blank_end;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1234

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1235

struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1237

pipe->plane_state->update_flags.bits.full_update = 1;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1240

((pipe->stream->view_format ==

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1242

pipe->stream->view_format ==

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1244

(pipe->stream->timing.timing_3d_format ==

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1246

pipe->stream->timing.timing_3d_format ==

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1248

if (hsplit_pipe && hsplit_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1255

hsplit_pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1256

hsplit_pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1257

hsplit_pipe->pipe_dlg_param.vblank_start = pipe->pipe_dlg_param.vblank_start;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1258

hsplit_pipe->pipe_dlg_param.vblank_end = pipe->pipe_dlg_param.vblank_end;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1261

hsplit_pipe = resource_find_free_secondary_pipe_legacy(&context->res_ctx, pool, pipe);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1263

split_stream_across_pipes(&context->res_ctx, pool, pipe, hsplit_pipe);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1267

} else if (hsplit_pipe && hsplit_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1269

pipe->bottom_pipe = hsplit_pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1271

hsplit_pipe->bottom_pipe->top_pipe = pipe;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1279

resource_build_scaling_params(pipe);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1282

dcn_bw_calc_rq_dlg_ttu(dc, v, pipe, input_idx);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

302

const struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

308

if (pipe->plane_state->stereo_format == PLANE_STEREO_FORMAT_SIDE_BY_SIDE ||

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

309

pipe->plane_state->stereo_format == PLANE_STEREO_FORMAT_TOP_AND_BOTTOM) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

311

input->src.hsplit_grp = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

312

} else if (pipe->top_pipe != NULL && pipe->top_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

314

} else if (pipe->bottom_pipe != NULL && pipe->bottom_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

318

if (pipe->plane_res.dpp->ctx->dc->debug.optimized_watermark) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

323

input->src.dcc = pipe->plane_state->dcc.enable ? 1 : 0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

333

input->src.dcc = pipe->plane_res.dpp->ctx->dc->res_pool->hubbub->funcs->

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

334

dcc_support_pixel_format(pipe->plane_state->format, &bpe) ? 1 : 0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

337

input->src.meta_pitch = pipe->plane_state->dcc.meta_pitch;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

339

input->src.sw_mode = pipe->plane_state->tiling_info.gfx9.swizzle;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

341

input->src.viewport_width = pipe->plane_res.scl_data.viewport.width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

342

input->src.viewport_height = pipe->plane_res.scl_data.viewport.height;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

343

input->src.data_pitch = pipe->plane_res.scl_data.viewport.width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

344

input->src.data_pitch_c = pipe->plane_res.scl_data.viewport.width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

348

input->src.macro_tile_size = swizzle_mode_to_macro_tile_size(pipe->plane_state->tiling_info.gfx9.swizzle);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

350

switch (pipe->plane_state->rotation) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

365

switch (pipe->plane_state->format) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

398

input->scale_taps.htaps = pipe->plane_res.scl_data.taps.h_taps;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

399

input->scale_ratio_depth.hscl_ratio = pipe->plane_res.scl_data.ratios.horz.value/4294967296.0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

400

input->scale_ratio_depth.vscl_ratio = pipe->plane_res.scl_data.ratios.vert.value/4294967296.0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

401

input->scale_ratio_depth.vinit = pipe->plane_res.scl_data.inits.v.value/4294967296.0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

404

input->scale_taps.vtaps = pipe->plane_res.scl_data.taps.v_taps;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

405

input->scale_taps.vtaps_c = pipe->plane_res.scl_data.taps.v_taps_c;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

406

input->scale_taps.htaps_c = pipe->plane_res.scl_data.taps.h_taps_c;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

407

input->scale_ratio_depth.hscl_ratio_c = pipe->plane_res.scl_data.ratios.horz_c.value/4294967296.0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

408

input->scale_ratio_depth.vscl_ratio_c = pipe->plane_res.scl_data.ratios.vert_c.value/4294967296.0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

409

input->scale_ratio_depth.vinit_c = pipe->plane_res.scl_data.inits.v_c.value/4294967296.0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

412

switch (pipe->plane_res.scl_data.lb_params.depth) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

422

input->dest.vactive = pipe->stream->timing.v_addressable + pipe->stream->timing.v_border_top

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

423

+ pipe->stream->timing.v_border_bottom;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

425

input->dest.recout_width = pipe->plane_res.scl_data.recout.width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

426

input->dest.recout_height = pipe->plane_res.scl_data.recout.height;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

428

input->dest.full_recout_width = pipe->plane_res.scl_data.recout.width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

429

input->dest.full_recout_height = pipe->plane_res.scl_data.recout.height;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

431

input->dest.htotal = pipe->stream->timing.h_total;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

432

input->dest.hblank_start = input->dest.htotal - pipe->stream->timing.h_front_porch;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

434

- pipe->stream->timing.h_addressable

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

435

- pipe->stream->timing.h_border_left

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

436

- pipe->stream->timing.h_border_right;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

438

input->dest.vtotal = pipe->stream->timing.v_total;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

439

input->dest.vblank_start = input->dest.vtotal - pipe->stream->timing.v_front_porch;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

441

- pipe->stream->timing.v_addressable

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

442

- pipe->stream->timing.v_border_bottom

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

443

- pipe->stream->timing.v_border_top;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

444

input->dest.pixel_rate_mhz = pipe->stream->timing.pix_clk_100hz/10000.0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

445

input->dest.vstartup_start = pipe->pipe_dlg_param.vstartup_start;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

446

input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

447

input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

448

input->dest.vupdate_width = pipe->pipe_dlg_param.vupdate_width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

455

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

459

struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &pipe->dlg_regs;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

460

struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &pipe->ttu_regs;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

461

struct _vcs_dpi_display_rq_regs_st *rq_regs = &pipe->rq_regs;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

462

struct _vcs_dpi_display_rq_params_st *rq_param = &pipe->dml_rq_param;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

463

struct _vcs_dpi_display_dlg_sys_params_st *dlg_sys_param = &pipe->dml_dlg_sys_param;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

464

struct _vcs_dpi_display_e2e_pipe_params_st *input = &pipe->dml_input;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

493

pipe_ctx_to_e2e_pipe_params(pipe, &input->pipe);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

507

dml1_rq_dlg_get_rq_params(dml, rq_param, &input->pipe.src);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

519

pipe->plane_state->flip_immediate);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

710

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

717

if (pipe->plane_state &&

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

718

(pipe->plane_state->dst_rect.width <= 16 ||

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

719

pipe->plane_state->dst_rect.height <= 16 ||

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

720

pipe->plane_state->src_rect.width <= 16 ||

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

721

pipe->plane_state->src_rect.height <= 16)) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

894

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

896

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

899

if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state)

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

905

v->htotal[input_idx] = pipe->stream->timing.h_total;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

906

v->vtotal[input_idx] = pipe->stream->timing.v_total;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

907

v->vactive[input_idx] = pipe->stream->timing.v_addressable +

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

908

pipe->stream->timing.v_border_top + pipe->stream->timing.v_border_bottom;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

909

v->v_sync_plus_back_porch[input_idx] = pipe->stream->timing.v_total

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

911

- pipe->stream->timing.v_front_porch;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

912

v->pixel_clock[input_idx] = pipe->stream->timing.pix_clk_100hz/10000.0;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

913

if (pipe->stream->timing.timing_3d_format == TIMING_3D_FORMAT_HW_FRAME_PACKING)

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

915

if (!pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

920

v->viewport_width[input_idx] = pipe->stream->timing.h_addressable;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

921

v->viewport_height[input_idx] = pipe->stream->timing.v_addressable;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

942

v->viewport_height[input_idx] = pipe->plane_res.scl_data.viewport.height;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

943

v->viewport_width[input_idx] = pipe->plane_res.scl_data.viewport.width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

944

v->scaler_rec_out_width[input_idx] = pipe->plane_res.scl_data.recout.width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

945

v->scaler_recout_height[input_idx] = pipe->plane_res.scl_data.recout.height;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

946

if (pipe->bottom_pipe && pipe->bottom_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

947

if (pipe->plane_state->rotation % 2 == 0) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

948

int viewport_end = pipe->plane_res.scl_data.viewport.width

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

949

+ pipe->plane_res.scl_data.viewport.x;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

950

int viewport_b_end = pipe->bottom_pipe->plane_res.scl_data.viewport.width

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

951

+ pipe->bottom_pipe->plane_res.scl_data.viewport.x;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

955

- pipe->bottom_pipe->plane_res.scl_data.viewport.x;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

958

- pipe->plane_res.scl_data.viewport.x;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

960

int viewport_end = pipe->plane_res.scl_data.viewport.height

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

961

+ pipe->plane_res.scl_data.viewport.y;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

962

int viewport_b_end = pipe->bottom_pipe->plane_res.scl_data.viewport.height

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

963

+ pipe->bottom_pipe->plane_res.scl_data.viewport.y;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

967

- pipe->bottom_pipe->plane_res.scl_data.viewport.y;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

970

- pipe->plane_res.scl_data.viewport.y;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

972

v->scaler_rec_out_width[input_idx] = pipe->plane_res.scl_data.recout.width

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

973

+ pipe->bottom_pipe->plane_res.scl_data.recout.width;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

976

if (pipe->plane_state->rotation % 2 == 0) {

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

977

ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

979

ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

982

ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

984

ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

993

v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1184

pipes[pipe_idx].pipe.dest.vstartup_start = get_vstartup(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1185

pipes[pipe_idx].pipe.dest.vupdate_offset = get_vupdate_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1186

pipes[pipe_idx].pipe.dest.vupdate_width = get_vupdate_width(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1187

pipes[pipe_idx].pipe.dest.vready_offset = get_vready_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1195

context->res_ctx.pipe_ctx[i].unbounded_req = pipes[pipe_idx].pipe.src.unbounded_req_mode;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1202

context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1246

&pipes[pipe_idx].pipe);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1369

pipes[pipe_cnt].pipe.dest.use_maximum_vstartup = dc->ctx->dce_version == DCN_VERSION_2_01;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1375

pipes[pipe_cnt].pipe.src.dynamic_metadata_enable = true;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1377

pipes[pipe_cnt].pipe.src.dynamic_metadata_lines_before_active =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1381

pipes[pipe_cnt].pipe.src.dynamic_metadata_xmit_bytes =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1384

pipes[pipe_cnt].pipe.src.dcc = false;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1385

pipes[pipe_cnt].pipe.src.dcc_rate = 1;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1386

pipes[pipe_cnt].pipe.dest.synchronized_vblank_all_planes = synchronized_vblank;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1387

pipes[pipe_cnt].pipe.dest.synchronize_timings = synchronized_vblank;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1388

pipes[pipe_cnt].pipe.dest.hblank_start = timing->h_total - timing->h_front_porch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1389

pipes[pipe_cnt].pipe.dest.hblank_end = pipes[pipe_cnt].pipe.dest.hblank_start

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1393

pipes[pipe_cnt].pipe.dest.vblank_start = v_total - front_porch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1394

pipes[pipe_cnt].pipe.dest.vblank_end = pipes[pipe_cnt].pipe.dest.vblank_start

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1398

pipes[pipe_cnt].pipe.dest.htotal = timing->h_total;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1399

pipes[pipe_cnt].pipe.dest.vtotal = v_total;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1400

pipes[pipe_cnt].pipe.dest.hactive =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1402

pipes[pipe_cnt].pipe.dest.vactive =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1404

pipes[pipe_cnt].pipe.dest.interlaced = timing->flags.INTERLACE;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1405

pipes[pipe_cnt].pipe.dest.pixel_rate_mhz = timing->pix_clk_100hz/10000.0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1407

pipes[pipe_cnt].pipe.dest.pixel_rate_mhz *= 2;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1408

pipes[pipe_cnt].pipe.dest.otg_inst = res_ctx->pipe_ctx[i].stream_res.tg->inst;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1412

pipes[pipe_cnt].pipe.dest.vtotal_min = res_ctx->pipe_ctx[i].stream->adjust.v_total_min;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1413

pipes[pipe_cnt].pipe.dest.vtotal_max = res_ctx->pipe_ctx[i].stream->adjust.v_total_max;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1416

pipes[pipe_cnt].pipe.dest.odm_combine = dm_odm_combine_mode_2to1;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1419

pipes[pipe_cnt].pipe.dest.odm_combine = dm_odm_combine_mode_4to1;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1422

pipes[pipe_cnt].pipe.dest.odm_combine = dm_odm_combine_mode_disabled;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1424

pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1437

pipes[pipe_cnt].pipe.src.hsplit_grp = first_pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1439

pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1441

pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].top_pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1447

pipes[pipe_cnt].pipe.src.hsplit_grp = first_pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1540

pipes[pipe_cnt].pipe.src.num_cursors = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1542

pipes[pipe_cnt].pipe.src.num_cursors = dc->dml.ip.number_of_cursors;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1544

pipes[pipe_cnt].pipe.src.cur0_src_width = 256;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1545

pipes[pipe_cnt].pipe.src.cur0_bpp = dm_cur_32bit;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1548

pipes[pipe_cnt].pipe.src.is_hsplit = pipes[pipe_cnt].pipe.dest.odm_combine != dm_odm_combine_mode_disabled;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1549

pipes[pipe_cnt].pipe.src.source_scan = dm_horz;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1550

pipes[pipe_cnt].pipe.src.source_rotation = dm_rotation_0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1551

pipes[pipe_cnt].pipe.src.sw_mode = dm_sw_4kb_s;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1552

pipes[pipe_cnt].pipe.src.macro_tile_size = dm_64k_tile;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1553

pipes[pipe_cnt].pipe.src.viewport_width = timing->h_addressable;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1554

if (pipes[pipe_cnt].pipe.src.viewport_width > 1920)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1555

pipes[pipe_cnt].pipe.src.viewport_width = 1920;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1556

pipes[pipe_cnt].pipe.src.viewport_height = timing->v_addressable;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1557

if (pipes[pipe_cnt].pipe.src.viewport_height > 1080)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1558

pipes[pipe_cnt].pipe.src.viewport_height = 1080;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1559

pipes[pipe_cnt].pipe.src.surface_height_y = pipes[pipe_cnt].pipe.src.viewport_height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1560

pipes[pipe_cnt].pipe.src.surface_width_y = pipes[pipe_cnt].pipe.src.viewport_width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1561

pipes[pipe_cnt].pipe.src.surface_height_c = pipes[pipe_cnt].pipe.src.viewport_height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1562

pipes[pipe_cnt].pipe.src.surface_width_c = pipes[pipe_cnt].pipe.src.viewport_width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1563

pipes[pipe_cnt].pipe.src.data_pitch = ((pipes[pipe_cnt].pipe.src.viewport_width + 255) / 256) * 256;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1564

pipes[pipe_cnt].pipe.src.source_format = dm_444_32;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1565

pipes[pipe_cnt].pipe.src.cur0_src_width = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1566

pipes[pipe_cnt].pipe.src.cur1_src_width = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1567

pipes[pipe_cnt].pipe.dest.recout_width = pipes[pipe_cnt].pipe.src.viewport_width; /*vp_width/hratio*/

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1568

pipes[pipe_cnt].pipe.dest.recout_height = pipes[pipe_cnt].pipe.src.viewport_height; /*vp_height/vratio*/

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1569

pipes[pipe_cnt].pipe.dest.full_recout_width = pipes[pipe_cnt].pipe.dest.recout_width; /*when is_hsplit != 1*/

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1570

pipes[pipe_cnt].pipe.dest.full_recout_height = pipes[pipe_cnt].pipe.dest.recout_height; /*when is_hsplit != 1*/

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1571

pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_16;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1572

pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio = 1.0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1573

pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio = 1.0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1574

pipes[pipe_cnt].pipe.scale_ratio_depth.scl_enable = 0; /*Lb only or Full scl*/

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1575

pipes[pipe_cnt].pipe.scale_taps.htaps = 1;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1576

pipes[pipe_cnt].pipe.scale_taps.vtaps = 1;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1577

pipes[pipe_cnt].pipe.dest.vtotal_min = v_total;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1578

pipes[pipe_cnt].pipe.dest.vtotal_max = v_total;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1580

if (pipes[pipe_cnt].pipe.dest.odm_combine == dm_odm_combine_mode_2to1) {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1581

pipes[pipe_cnt].pipe.src.viewport_width /= 2;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1582

pipes[pipe_cnt].pipe.dest.recout_width /= 2;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1583

} else if (pipes[pipe_cnt].pipe.dest.odm_combine == dm_odm_combine_mode_4to1) {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1584

pipes[pipe_cnt].pipe.src.viewport_width /= 4;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1585

pipes[pipe_cnt].pipe.dest.recout_width /= 4;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1591

pipes[pipe_cnt].pipe.src.immediate_flip = pln->flip_immediate;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1592

pipes[pipe_cnt].pipe.src.is_hsplit = (res_ctx->pipe_ctx[i].bottom_pipe && res_ctx->pipe_ctx[i].bottom_pipe->plane_state == pln)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1594

|| pipes[pipe_cnt].pipe.dest.odm_combine != dm_odm_combine_mode_disabled;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1599

pipes[pipe_cnt].pipe.src.is_hsplit = false;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1600

pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1603

pipes[pipe_cnt].pipe.src.source_scan = pln->rotation == ROTATION_ANGLE_90

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1607

pipes[pipe_cnt].pipe.src.source_rotation = dm_rotation_0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1610

pipes[pipe_cnt].pipe.src.source_rotation = dm_rotation_90;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1613

pipes[pipe_cnt].pipe.src.source_rotation = dm_rotation_180;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1616

pipes[pipe_cnt].pipe.src.source_rotation = dm_rotation_270;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1622

pipes[pipe_cnt].pipe.src.viewport_y_y = scl->viewport.y;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1623

pipes[pipe_cnt].pipe.src.viewport_y_c = scl->viewport_c.y;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1624

pipes[pipe_cnt].pipe.src.viewport_x_y = scl->viewport.x;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1625

pipes[pipe_cnt].pipe.src.viewport_x_c = scl->viewport_c.x;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1626

pipes[pipe_cnt].pipe.src.viewport_width = scl->viewport.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1627

pipes[pipe_cnt].pipe.src.viewport_width_c = scl->viewport_c.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1628

pipes[pipe_cnt].pipe.src.viewport_height = scl->viewport.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1629

pipes[pipe_cnt].pipe.src.viewport_height_c = scl->viewport_c.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1630

pipes[pipe_cnt].pipe.src.viewport_width_max = pln->src_rect.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1631

pipes[pipe_cnt].pipe.src.viewport_height_max = pln->src_rect.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1632

pipes[pipe_cnt].pipe.src.surface_width_y = pln->plane_size.surface_size.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1633

pipes[pipe_cnt].pipe.src.surface_height_y = pln->plane_size.surface_size.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1634

pipes[pipe_cnt].pipe.src.surface_width_c = pln->plane_size.chroma_size.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1635

pipes[pipe_cnt].pipe.src.surface_height_c = pln->plane_size.chroma_size.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1638

pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1639

pipes[pipe_cnt].pipe.src.data_pitch_c = pln->plane_size.chroma_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1640

pipes[pipe_cnt].pipe.src.meta_pitch = pln->dcc.meta_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1641

pipes[pipe_cnt].pipe.src.meta_pitch_c = pln->dcc.meta_pitch_c;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1643

pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1644

pipes[pipe_cnt].pipe.src.meta_pitch = pln->dcc.meta_pitch;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1646

pipes[pipe_cnt].pipe.src.dcc = pln->dcc.enable;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1647

pipes[pipe_cnt].pipe.dest.recout_width = scl->recout.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1648

pipes[pipe_cnt].pipe.dest.recout_height = scl->recout.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1649

pipes[pipe_cnt].pipe.dest.full_recout_height = scl->recout.height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1650

pipes[pipe_cnt].pipe.dest.full_recout_width = scl->recout.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1651

if (pipes[pipe_cnt].pipe.dest.odm_combine == dm_odm_combine_mode_2to1)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1652

pipes[pipe_cnt].pipe.dest.full_recout_width *= 2;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1653

else if (pipes[pipe_cnt].pipe.dest.odm_combine == dm_odm_combine_mode_4to1)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1654

pipes[pipe_cnt].pipe.dest.full_recout_width *= 4;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1659

pipes[pipe_cnt].pipe.dest.full_recout_width += split_pipe->plane_res.scl_data.recout.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1664

pipes[pipe_cnt].pipe.dest.full_recout_width += split_pipe->plane_res.scl_data.recout.width;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1669

pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_16;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1670

pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio = (double) scl->ratios.horz.value / (1ULL<<32);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1671

pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio_c = (double) scl->ratios.horz_c.value / (1ULL<<32);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1672

pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio = (double) scl->ratios.vert.value / (1ULL<<32);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1673

pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio_c = (double) scl->ratios.vert_c.value / (1ULL<<32);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1674

pipes[pipe_cnt].pipe.scale_ratio_depth.scl_enable =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1680

pipes[pipe_cnt].pipe.scale_taps.htaps = scl->taps.h_taps;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1681

pipes[pipe_cnt].pipe.scale_taps.htaps_c = scl->taps.h_taps_c;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1682

pipes[pipe_cnt].pipe.scale_taps.vtaps = scl->taps.v_taps;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1683

pipes[pipe_cnt].pipe.scale_taps.vtaps_c = scl->taps.v_taps_c;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1685

pipes[pipe_cnt].pipe.src.macro_tile_size =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1688

&pipes[pipe_cnt].pipe.src.sw_mode);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1693

pipes[pipe_cnt].pipe.src.source_format = dm_420_8;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1697

pipes[pipe_cnt].pipe.src.source_format = dm_420_10;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1703

pipes[pipe_cnt].pipe.src.source_format = dm_444_64;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1707

pipes[pipe_cnt].pipe.src.source_format = dm_444_16;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1710

pipes[pipe_cnt].pipe.src.source_format = dm_444_8;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1713

pipes[pipe_cnt].pipe.src.source_format = dm_rgbe_alpha;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1716

pipes[pipe_cnt].pipe.src.source_format = dm_444_32;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1752

pipes[pipe_cnt].pipe.dest.odm_combine =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1755

pipes[pipe_cnt].pipe.dest.odm_combine = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1761

pipes[pipe_cnt].pipe.dest.odm_combine =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1764

pipes[pipe_cnt].pipe.dest.odm_combine = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2168

pipes[i].pipe.src.hostvm = dc->res_pool->hubbub->riommu_active;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2169

pipes[i].pipe.src.gpuvm = 1;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2262

pipes[pipe_cnt].pipe.dest.odm_combine =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2265

pipes[pipe_cnt].pipe.dest.odm_combine = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2271

pipes[pipe_cnt].pipe.dest.odm_combine =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2274

pipes[pipe_cnt].pipe.dest.odm_combine = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2538

pipes[pipe_cnt].pipe.dest.pixel_rate_mhz,

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2546

pipes[pipe_cnt].pipe.dest.htotal,

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c

1565

dml20_rq_dlg_get_rq_params(mode_lib, &rq_param, &e2e_pipe_param[pipe_idx].pipe.src);

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c

787

const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c

788

const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c

791

const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c

792

const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c

1566

dml20v2_rq_dlg_get_rq_params(mode_lib, &rq_param, &e2e_pipe_param[pipe_idx].pipe.src);

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c

787

const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c

788

const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c

791

const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c

792

const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;

drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c

1677

dml_rq_dlg_get_rq_params(mode_lib, &rq_param, &e2e_pipe_param[pipe_idx].pipe);

drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c

833

const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c

834

const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c

837

const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;

drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c

838

const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

250

pipes[pipe_cnt].pipe.dest.pixel_rate_mhz,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

257

pipes[pipe_cnt].pipe.dest.htotal,

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

1190

if (e2e_pipe_param[i].pipe.src.is_hsplit && !visited[i]) {

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

1192

unsigned int grp = e2e_pipe_param[i].pipe.src.hsplit_grp;

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

1196

if (e2e_pipe_param[j].pipe.src.hsplit_grp == grp

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

1197

&& e2e_pipe_param[j].pipe.src.is_hsplit && !visited[j]) {

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

1762

dml_rq_dlg_get_rq_params(mode_lib, &rq_param, &e2e_pipe_param[pipe_idx].pipe);

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

899

const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

900

const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

903

const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

904

const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

450

pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

451

pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

1065

if (e2e_pipe_param[i].pipe.src.is_hsplit && !visited[i]) {

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

1067

unsigned int grp = e2e_pipe_param[i].pipe.src.hsplit_grp;

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

1071

if (e2e_pipe_param[j].pipe.src.hsplit_grp == grp && e2e_pipe_param[j].pipe.src.is_hsplit && !visited[j]) {

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

1574

dml_rq_dlg_get_rq_params(mode_lib, &rq_param, &e2e_pipe_param[pipe_idx].pipe);

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

862

const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

863

const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

865

const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

866

const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

313

struct pipe_ctx *pipe = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

328

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

329

timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

333

if (pipe->stream->adjust.v_total_min != 0)

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

334

pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

336

pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

340

pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

341

pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines);

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

346

pipes[pipe_cnt].pipe.dest.vblank_nom =

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

347

max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2);

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

348

pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblank_nom);

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

350

if (pipe->plane_state &&

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

351

(pipe->plane_state->src_rect.height < pipe->plane_state->dst_rect.height ||

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

352

pipe->plane_state->src_rect.width < pipe->plane_state->dst_rect.width))

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

357

pipes[i].pipe.src.hostvm = dc->vm_pa_config.is_hvm_enabled || dc->res_pool->hubbub->riommu_active;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

364

pipes[pipe_cnt].pipe.src.immediate_flip = true;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

366

pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

367

pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

368

pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

369

pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

370

pipes[pipe_cnt].pipe.src.dcc_rate = 3;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

395

if (pipe_cnt == 1 && pipe->plane_state

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

396

&& pipe->plane_state->rotation == ROTATION_ANGLE_0 && !dc->debug.disable_z9_mpc) {

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

397

if (is_dual_plane(pipe->plane_state->format)

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

398

&& pipe->plane_state->src_rect.width <= 1920 && pipe->plane_state->src_rect.height <= 1080) {

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

400

} else if (!is_dual_plane(pipe->plane_state->format) && pipe->plane_state->src_rect.width <= 5120) {

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

403

pipes[0].pipe.src.unbounded_req_mode = true;

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

416

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

418

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

421

if (pipe->stream->signal == SIGNAL_TYPE_EDP && dc->debug.seamless_boot_odm_combine &&

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

422

pipe->stream->apply_seamless_boot_optimization) {

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

424

if (pipe->stream->apply_boot_odm_mode == dm_odm_combine_policy_2to1) {

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

1152

if (e2e_pipe_param[i].pipe.src.is_hsplit && !visited[i]) {

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

1154

unsigned int grp = e2e_pipe_param[i].pipe.src.hsplit_grp;

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

1158

if (e2e_pipe_param[j].pipe.src.hsplit_grp == grp && e2e_pipe_param[j].pipe.src.is_hsplit && !visited[j]) {

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

1662

dml_rq_dlg_get_rq_params(mode_lib, &rq_param, &e2e_pipe_param[pipe_idx].pipe);

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

947

const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

948

const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

950

const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

951

const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1000

if (pipe->plane_state && !pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1001

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1002

refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1003

pipe->stream->timing.v_total * (uint64_t)pipe->stream->timing.h_total - (uint64_t)1);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1004

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1005

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1049

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1050

enum mall_stream_type pipe_mall_type = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1052

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1055

if (pipe->plane_state && !pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1225

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1232

pipe = &context->res_ctx.pipe_ctx[dc_pipe_idx];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1233

if (resource_is_pipe_type(pipe, FREE_PIPE))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1237

if (resource_is_pipe_type(pipe, OPP_HEAD))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1241

update_slice_table_for_stream(table, pipe->stream, -1);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1242

else if (resource_is_pipe_type(pipe, DPP_PIPE) &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1243

resource_get_odm_slice_index(resource_get_opp_head(pipe)) == 0)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1247

update_slice_table_for_plane(table, pipe, pipe->plane_state, -1);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1254

if (odm && resource_is_pipe_type(pipe, OPP_HEAD))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1256

table, pipe->stream, split[dc_pipe_idx] - 1);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1257

else if (!odm && resource_is_pipe_type(pipe, DPP_PIPE))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1258

update_slice_table_for_plane(table, pipe,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1259

pipe->plane_state, split[dc_pipe_idx] - 1);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1407

cur_policy[i] = pipes[i].pipe.dest.odm_combine_policy;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1408

pipes[i].pipe.dest.odm_combine_policy = dm_odm_combine_policy_2to1;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1420

pipes[i].pipe.dest.odm_combine_policy = cur_policy[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1705

pipes[pipe_idx].pipe.dest.vstartup_start = get_vstartup(&context->bw_ctx.dml, pipes, pipe_cnt,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1707

pipes[pipe_idx].pipe.dest.vupdate_offset = get_vupdate_offset(&context->bw_ctx.dml, pipes, pipe_cnt,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1709

pipes[pipe_idx].pipe.dest.vupdate_width = get_vupdate_width(&context->bw_ctx.dml, pipes, pipe_cnt,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1711

pipes[pipe_idx].pipe.dest.vready_offset = get_vready_offset(&context->bw_ctx.dml, pipes, pipe_cnt,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1730

context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1814

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1818

pipe = &context->res_ctx.pipe_ctx[old_index];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1819

pipe->pipe_idx = old_index;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1822

if (!pipe)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1827

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1828

pipe->pipe_idx = i;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1839

if (!pipe)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1842

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1843

pipe->pipe_idx = i;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1848

return pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1959

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1966

if (pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1968

pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1969

if (pipe->next_odm_pipe)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1970

pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1973

if (pipe->bottom_pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1974

if (pipe->bottom_pipe->prev_odm_pipe || pipe->bottom_pipe->next_odm_pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1976

pipe->bottom_pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1981

if (pipe->prev_odm_pipe->bottom_pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1983

pipe->bottom_pipe->top_pipe = pipe->prev_odm_pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1984

pipe->prev_odm_pipe->bottom_pipe->bottom_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1987

pipe->bottom_pipe->top_pipe = pipe->prev_odm_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1988

pipe->prev_odm_pipe->bottom_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1991

memcpy(&pipe->bottom_pipe->stream_res, &pipe->bottom_pipe->top_pipe->stream_res, sizeof(struct stream_resource));

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1995

if (pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1996

pipe->top_pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1999

pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2000

pipe->next_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2001

pipe->plane_state = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2002

pipe->stream = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2003

pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2004

pipe->prev_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2005

if (pipe->stream_res.dsc)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2006

dcn20_release_dsc(&context->res_ctx, dc->res_pool, &pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2007

memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2008

memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2009

memset(&pipe->link_res, 0, sizeof(pipe->link_res));

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2011

} else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2012

struct pipe_ctx *top_pipe = pipe->top_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2013

struct pipe_ctx *bottom_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2019

pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2020

pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2021

pipe->plane_state = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2022

pipe->stream = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2023

memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2024

memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2025

memset(&pipe->link_res, 0, sizeof(pipe->link_res));

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2033

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2039

if (!pipe->stream || newly_split[i])

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2045

if (!pipe->plane_state && !odm)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2069

pipe, hsplit_pipe, odm))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2091

pipe, pipe_4to1, odm))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2115

dcn20_build_mapped_resource(dc, context, pipe->stream);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2119

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2121

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2122

if (!resource_build_scaling_params(pipe))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2220

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2221

struct pipe_ctx *mpo_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2223

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2228

&& pipe->plane_state && mpo_pipe

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2230

&pipe->stream->src,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2232

ASSERT(mpo_pipe->plane_state != pipe->plane_state);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3387

pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3388

pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3391

bool dcn32_allow_subvp_with_active_margin(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3403

refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3404

(uint64_t)pipe->stream->timing.v_total * pipe->stream->timing.h_total - (uint64_t)1);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3405

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3406

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3409

dcn32_check_native_scaling_for_res(pipe, width, height)) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

343

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3433

bool dcn32_allow_subvp_high_refresh_rate(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

345

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3459

if (!dc->debug.disable_subvp_high_refresh && min_refresh >= subvp_min_refresh && pipe->stream &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3460

pipe->plane_state && !(pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3461

refresh_rate = (pipe->stream->timing.pix_clk_100hz * 100 +

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3462

pipe->stream->timing.v_total * pipe->stream->timing.h_total - 1)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3463

/ (double)(pipe->stream->timing.v_total * pipe->stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3469

if (dcn32_check_native_scaling_for_res(pipe, width, height)) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3470

if ((context->stream_count == 1 && !pipe->stream->allow_freesync) || context->stream_count > 1) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

348

if (pipe->plane_state && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

349

pipes[pipe_idx].pipe.dest.vstartup_start =

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

351

pipes[pipe_idx].pipe.dest.vupdate_offset =

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3529

const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

353

pipes[pipe_idx].pipe.dest.vupdate_width =

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3539

if (!pipe->stream || !pipe->plane_state)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3543

*fpo_candidate_stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

355

pipes[pipe_idx].pipe.dest.vready_offset =

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3568

const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

357

pipe->pipe_dlg_param = pipes[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3570

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3574

if (fpo_candidate_stream && pipe->stream == fpo_candidate_stream) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3582

blank_us = ((pipe->stream->timing.v_total - pipe->stream->timing.v_addressable) * pipe->stream->timing.h_total /

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3583

(double)(pipe->stream->timing.pix_clk_100hz * 100)) * 1000000;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3585

pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed || blank_us >= dc->debug.fpo_vactive_max_blank_us) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

475

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

488

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

490

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

565

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

567

if (pipe->stream && !pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

568

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

570

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

610

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

614

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

618

refresh_rate = (pipe->stream->timing.pix_clk_100hz * 100 +

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

619

pipe->stream->timing.v_total * pipe->stream->timing.h_total - 1)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

620

/ (double)(pipe->stream->timing.v_total * pipe->stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

628

if (pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe && !dcn32_is_center_timing(pipe) &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

629

!pipe->stream->hw_cursor_req &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

630

!dc_state_get_stream_cursor_subvp_limit(pipe->stream, context) &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

631

!(pipe->stream->timing.pix_clk_100hz / 10000 > DCN3_2_MAX_SUBVP_PIXEL_RATE_MHZ) &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

632

(!dcn32_is_psr_capable(pipe) || (context->stream_count == 1 && dc->caps.dmub_caps.subvp_psr)) &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

633

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_NONE &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

634

(refresh_rate < 120 || dcn32_allow_subvp_high_refresh_rate(dc, context, pipe)) &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

635

!pipe->plane_state->address.tmz_surface &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

638

dcn32_allow_subvp_with_active_margin(pipe)))) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

639

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

641

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

644

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

646

struct dc_stream_state *stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

687

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

690

if (resource_is_pipe_type(pipe, OPP_HEAD) &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

691

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_NONE) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

693

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

695

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

737

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

743

phantom = dc_state_get_paired_subvp_stream(context, pipe->stream);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

744

if (phantom && pipe->stream && pipe->plane_state && !pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

745

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

757

subvp_pipes[index] = pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

801

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

819

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

823

if (!resource_is_pipe_type(pipe, OTG_MASTER) ||

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

824

!resource_is_pipe_type(pipe, DPP_PIPE))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

828

if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

850

phantom_stream = dc_state_get_paired_subvp_stream(context, pipe->stream);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

852

main_timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

900

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

925

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

926

pipe_mall_type = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

930

if (!resource_is_pipe_type(pipe, OTG_MASTER) ||

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

931

!resource_is_pipe_type(pipe, DPP_PIPE))

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

941

subvp_pipe = pipe;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

995

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

997

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c

212

const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c

213

const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c

312

if (e2e_pipe_param[i].pipe.src.is_hsplit && !visited[i]) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c

314

unsigned int grp = e2e_pipe_param[i].pipe.src.hsplit_grp;

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c

318

if (e2e_pipe_param[j].pipe.src.hsplit_grp == grp

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c

319

&& e2e_pipe_param[j].pipe.src.is_hsplit && !visited[j]) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c

49

const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

444

struct pipe_ctx *pipe = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

461

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

462

timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

467

if (pipe->stream->adjust.v_total_max ==

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

468

pipe->stream->adjust.v_total_min &&

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

469

pipe->stream->adjust.v_total_min > timing->v_total) {

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

470

pipes[pipe_cnt].pipe.dest.vtotal =

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

471

pipe->stream->adjust.v_total_min;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

472

pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total -

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

473

pipes[pipe_cnt].pipe.dest.vactive;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

476

pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

477

pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines);

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

482

pipes[pipe_cnt].pipe.dest.vblank_nom =

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

483

max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2);

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

484

pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblank_nom);

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

486

if (pipe->plane_state &&

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

487

(pipe->plane_state->src_rect.height <

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

488

pipe->plane_state->dst_rect.height ||

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

489

pipe->plane_state->src_rect.width <

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

490

pipe->plane_state->dst_rect.width))

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

499

pipes[pipe_cnt].pipe.src.immediate_flip = true;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

501

pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

505

pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

506

pipes[pipe_cnt].pipe.src.dcc_rate = 3;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

508

pipes[pipe_cnt].pipe.src.gpuvm_min_page_size_kbytes = 256;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

533

if (pipe_cnt == 1 && pipe->plane_state && !dc->debug.disable_z9_mpc) {

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

534

if (is_dual_plane(pipe->plane_state->format)

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

535

&& pipe->plane_state->src_rect.width <= 1920 &&

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

536

pipe->plane_state->src_rect.height <= 1080) {

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

538

} else if (!is_dual_plane(pipe->plane_state->format) &&

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

539

pipe->plane_state->src_rect.width <= 5120) {

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

545

pipes[0].pipe.src.unbounded_req_mode = true;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

557

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

559

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

562

if (pipe->stream->signal == SIGNAL_TYPE_EDP &&

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

564

pipe->stream->apply_seamless_boot_optimization) {

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

566

if (pipe->stream->apply_boot_odm_mode ==

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

477

struct pipe_ctx *pipe = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

494

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

495

timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

500

if (pipe->stream->adjust.v_total_max ==

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

501

pipe->stream->adjust.v_total_min &&

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

502

pipe->stream->adjust.v_total_min > timing->v_total) {

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

503

pipes[pipe_cnt].pipe.dest.vtotal =

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

504

pipe->stream->adjust.v_total_min;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

505

pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total -

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

506

pipes[pipe_cnt].pipe.dest.vactive;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

509

pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

510

pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines);

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

515

pipes[pipe_cnt].pipe.dest.vblank_nom =

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

516

max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2);

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

517

pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblank_nom);

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

519

if (pipe->plane_state &&

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

520

(pipe->plane_state->src_rect.height <

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

521

pipe->plane_state->dst_rect.height ||

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

522

pipe->plane_state->src_rect.width <

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

523

pipe->plane_state->dst_rect.width))

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

532

pipes[pipe_cnt].pipe.src.immediate_flip = true;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

534

pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

538

pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

539

pipes[pipe_cnt].pipe.src.dcc_rate = 3;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

541

pipes[pipe_cnt].pipe.src.gpuvm_min_page_size_kbytes = 256;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

566

if (pipe_cnt == 1 && pipe->plane_state && !dc->debug.disable_z9_mpc) {

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

567

if (is_dual_plane(pipe->plane_state->format)

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

568

&& pipe->plane_state->src_rect.width <= 1920 &&

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

569

pipe->plane_state->src_rect.height <= 1080) {

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

571

} else if (!is_dual_plane(pipe->plane_state->format) &&

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

572

pipe->plane_state->src_rect.width <= 5120) {

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

578

pipes[0].pipe.src.unbounded_req_mode = true;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

590

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

592

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

595

if (pipe->stream->signal == SIGNAL_TYPE_EDP &&

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

597

pipe->stream->apply_seamless_boot_optimization) {

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

599

if (pipe->stream->apply_boot_odm_mode ==

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

174

pipe_src = &(pipes[i].pipe.src);

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

175

pipe_dest = &(pipes[i].pipe.dest);

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

176

scale_ratio_depth = &(pipes[i].pipe.scale_ratio_depth);

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

177

scale_taps = &(pipes[i].pipe.scale_taps);

drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h

558

display_pipe_params_st pipe;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

533

display_pipe_source_params_st *src = &pipes[j].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

534

display_pipe_dest_params_st *dst = &pipes[j].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

535

scaler_ratio_depth_st *scl = &pipes[j].pipe.scale_ratio_depth;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

536

scaler_taps_st *taps = &pipes[j].pipe.scale_taps;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

784

display_pipe_source_params_st *src_k = &pipes[k].pipe.src;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

785

display_pipe_dest_params_st *dst_k = &pipes[k].pipe.dest;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

827

if (pipes[j].pipe.src.immediate_flip) {

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

859

mode_lib->vba.SynchronizeTimingsFinal = pipes[0].pipe.dest.synchronize_timings;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

866

if (pipes[k].pipe.src.unbounded_req_mode == 0)

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

871

mode_lib->vba.SynchronizedVBlank = pipes[0].pipe.dest.synchronized_vblank_all_planes;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

873

ASSERT(mode_lib->vba.SynchronizedVBlank == pipes[k].pipe.dest.synchronized_vblank_all_planes);

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

882

mode_lib->vba.GPUVMEnable = mode_lib->vba.GPUVMEnable || !!pipes[k].pipe.src.gpuvm || !!pipes[k].pipe.src.vm;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

884

(pipes[k].pipe.src.gpuvm_levels_force_en

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

886

< pipes[k].pipe.src.gpuvm_levels_force) ?

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

887

pipes[k].pipe.src.gpuvm_levels_force :

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

890

mode_lib->vba.HostVMEnable = mode_lib->vba.HostVMEnable || !!pipes[k].pipe.src.hostvm || !!pipes[k].pipe.src.vm;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

892

(pipes[k].pipe.src.hostvm_levels_force_en

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

894

< pipes[k].pipe.src.hostvm_levels_force) ?

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

895

pipes[k].pipe.src.hostvm_levels_force :

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

909

mode_lib->vba.ForceOneRowForFrame[k] = pipes[k].pipe.src.force_one_row_for_frame;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

910

mode_lib->vba.PteBufferMode[k] = pipes[k].pipe.src.pte_buffer_mode;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1009

unsigned int htotal = e2e_pipe_param->pipe.dest.htotal;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1010

unsigned int hblank_end = e2e_pipe_param->pipe.dest.hblank_end;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1011

unsigned int vblank_start = e2e_pipe_param->pipe.dest.vblank_start;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1012

unsigned int vblank_end = e2e_pipe_param->pipe.dest.vblank_end;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1013

bool interlaced = e2e_pipe_param->pipe.dest.interlaced;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1016

double pclk_freq_in_mhz = e2e_pipe_param->pipe.dest.pixel_rate_mhz;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1199

dcc_en = e2e_pipe_param->pipe.src.dcc;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1201

(enum source_format_class) e2e_pipe_param->pipe.src.source_format);

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1203

access_dir = (e2e_pipe_param->pipe.src.source_scan == dm_vert); /* vp access direction: horizontal or vertical accessed */

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1205

(enum source_format_class) e2e_pipe_param->pipe.src.source_format,

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1208

(enum source_format_class) e2e_pipe_param->pipe.src.source_format,

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1210

vp_height_l = e2e_pipe_param->pipe.src.viewport_height;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1211

vp_width_l = e2e_pipe_param->pipe.src.viewport_width;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1212

vp_height_c = e2e_pipe_param->pipe.src.viewport_height_c;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1213

vp_width_c = e2e_pipe_param->pipe.src.viewport_width_c;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1216

htaps_l = e2e_pipe_param->pipe.scale_taps.htaps;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1217

htaps_c = e2e_pipe_param->pipe.scale_taps.htaps_c;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1218

hratios_l = e2e_pipe_param->pipe.scale_ratio_depth.hscl_ratio;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1219

hratios_c = e2e_pipe_param->pipe.scale_ratio_depth.hscl_ratio_c;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1220

vratio_l = e2e_pipe_param->pipe.scale_ratio_depth.vscl_ratio;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1221

vratio_c = e2e_pipe_param->pipe.scale_ratio_depth.vscl_ratio_c;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1224

vinit_l = e2e_pipe_param->pipe.scale_ratio_depth.vinit;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1225

vinit_c = e2e_pipe_param->pipe.scale_ratio_depth.vinit_c;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1226

vinit_bot_l = e2e_pipe_param->pipe.scale_ratio_depth.vinit_bot;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1227

vinit_bot_c = e2e_pipe_param->pipe.scale_ratio_depth.vinit_bot_c;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1242

vupdate_offset = e2e_pipe_param->pipe.dest.vupdate_offset;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1243

vupdate_width = e2e_pipe_param->pipe.dest.vupdate_width;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1244

vready_offset = e2e_pipe_param->pipe.dest.vready_offset;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1251

vstartup_start = e2e_pipe_param->pipe.dest.vstartup_start;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1278

if (e2e_pipe_param->pipe.src.is_hsplit)

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1280

+ e2e_pipe_param->pipe.dest.recout_width;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1643

if (e2e_pipe_param->pipe.src.is_hsplit) {

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1644

if (e2e_pipe_param->pipe.dest.full_recout_width == 0) {

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1646

full_recout_width = e2e_pipe_param->pipe.dest.recout_width * 2; /* assume half split for dcn1 */

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1648

full_recout_width = e2e_pipe_param->pipe.dest.full_recout_width;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1650

full_recout_width = e2e_pipe_param->pipe.dest.recout_width;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1817

hratios_cur0 = e2e_pipe_param->pipe.scale_ratio_depth.hscl_ratio;

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1818

cur0_src_width = e2e_pipe_param->pipe.src.cur0_src_width; /* cursor source width */

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1819

cur0_bpp = (enum cursor_bpp) e2e_pipe_param->pipe.src.cur0_bpp;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

186

struct dc_stream_state *stream, const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

194

if (check_dp2p0_output_encoder(pipe))

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

477

const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

479

if (pipe->plane_state == in && !pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

480

temp_pipe->stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

481

temp_pipe->plane_state = pipe->plane_state;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

482

temp_pipe->plane_res.scl_data.taps = pipe->plane_res.scl_data.taps;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

483

temp_pipe->stream_res = pipe->stream_res;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

484

temp_pipe->dsc_padding_params.dsc_hactive_padding = pipe->dsc_padding_params.dsc_hactive_padding;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

485

temp_pipe->dsc_padding_params.dsc_htotal_padding = pipe->dsc_padding_params.dsc_htotal_padding;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

486

temp_pipe->dsc_padding_params.dsc_pix_clk_100hz = pipe->dsc_padding_params.dsc_pix_clk_100hz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

73

struct pipe_ctx *pipe, unsigned int *pipe_regs_idx)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

75

struct pipe_ctx *opp_head = dml_ctx->config.callbacks.get_opp_head(pipe);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

79

if (pipe->plane_state)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

80

*pipe_regs_idx += dml_ctx->config.callbacks.get_mpc_slice_index(pipe);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.h

32

struct pipe_ctx *pipe, unsigned int *pipe_regs_idx);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

1158

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

1160

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

1161

if (!ctx->config.callbacks.build_scaling_params(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

1167

pipe->stream &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

1168

pipe->prev_odm_pipe == NULL &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

1169

pipe->top_pipe == NULL)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

1170

ctx->config.callbacks.build_test_pattern_params(&state->res_ctx, pipe);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

149

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

151

if (!pipe->plane_state || !pipe->stream)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

154

get_plane_id(ctx, state, pipe->plane_state, pipe->stream->stream_id,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

155

ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[pipe->pipe_idx],

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

157

if (plane_id_assigned_to_pipe == plane_id && !pipe->prev_odm_pipe

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

158

&& (!pipe->top_pipe || pipe->top_pipe->plane_state != pipe->plane_state)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

159

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

160

struct pipe_ctx *mpc_pipe = pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

167

if (mpc_pipe->plane_state != pipe->plane_state)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

170

pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

227

static bool is_plane_using_pipe(const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

229

if (pipe->plane_state)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

235

static bool is_pipe_free(const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

237

if (!pipe->plane_state && !pipe->stream)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

348

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

365

pipe = &state->res_ctx.pipe_ctx[preferred_pipe_candidates[i]];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

366

if (!is_plane_using_pipe(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

369

pipe->pipe_idx = preferred_pipe_candidates[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

370

assigned_pipes[(*assigned_pipe_count)++] = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

381

pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

382

if (!is_plane_using_pipe(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

385

pipe->pipe_idx = i;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

386

assigned_pipes[(*assigned_pipe_count)++] = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

392

pipe = &state->res_ctx.pipe_ctx[last_resort_pipe_candidates[i]];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

393

if (!is_plane_using_pipe(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

396

pipe->pipe_idx = last_resort_pipe_candidates[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

397

assigned_pipes[(*assigned_pipe_count)++] = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

414

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

431

pipe = &state->res_ctx.pipe_ctx[preferred_pipe_candidates[i]];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

432

if (is_pipe_free(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

435

pipe->pipe_idx = preferred_pipe_candidates[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

436

assigned_pipes[(*assigned_pipe_count)++] = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

447

pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

448

if (is_pipe_free(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

451

pipe->pipe_idx = i;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

452

assigned_pipes[(*assigned_pipe_count)++] = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

458

pipe = &state->res_ctx.pipe_ctx[last_resort_pipe_candidates[i]];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

459

if (is_pipe_free(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

462

pipe->pipe_idx = last_resort_pipe_candidates[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

463

assigned_pipes[(*assigned_pipe_count)++] = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

538

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

546

pipe = &state->res_ctx.pipe_ctx[scratch->pipe_pool.pipes_assigned_to_plane[odm_slice_index][i]];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

549

scratch->mpc_info.prev_odm_pipe->next_odm_pipe = pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

551

pipe->prev_odm_pipe = scratch->mpc_info.prev_odm_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

552

pipe->next_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

554

scratch->mpc_info.prev_odm_pipe = pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

589

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

591

if (pipe->stream && pipe->stream->stream_id == stream_id && !pipe->top_pipe && !pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

592

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

593

pipes[num_found++] = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

594

pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

695

static void free_pipe(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

697

memset(pipe, 0, sizeof(struct pipe_ctx));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

719

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

723

pipe = &state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][0]];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

724

if (pipe->top_pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

725

pipe->top_pipe->bottom_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

727

if (pipe->bottom_pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

728

pipe->bottom_pipe = pipe->top_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

108

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

113

if (pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

115

pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

116

if (pipe->next_odm_pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

117

pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

119

pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

120

pipe->next_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

121

pipe->plane_state = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

122

pipe->stream = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

123

pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

124

pipe->prev_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

125

if (pipe->stream_res.dsc)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

126

ctx->config.svp_pstate.callbacks.release_dsc(&context->res_ctx, ctx->config.svp_pstate.callbacks.dc->res_pool, &pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

127

memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

128

memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

129

} else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

130

struct pipe_ctx *top_pipe = pipe->top_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

131

struct pipe_ctx *bottom_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

137

pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

138

pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

139

pipe->plane_state = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

140

pipe->stream = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

141

memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

142

memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

152

const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

154

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

157

if (!pipe->plane_state)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

193

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

195

if (pipe->stream && !pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

196

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

198

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

239

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

243

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

247

refresh_rate = (pipe->stream->timing.pix_clk_100hz * 100 +

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

248

pipe->stream->timing.v_total * pipe->stream->timing.h_total - 1)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

249

/ (double)(pipe->stream->timing.v_total * pipe->stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

256

if (pipe->plane_state && !pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

257

ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(context, pipe) == SUBVP_NONE && refresh_rate < 120 &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

259

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

261

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

264

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

266

struct dc_stream_state *stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

317

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

320

if (pipe->stream && !pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

321

ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(state, pipe) == SUBVP_NONE) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

323

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

325

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

369

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

375

if (pipe->stream && pipe->plane_state && !pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

376

ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(context, pipe) == SUBVP_MAIN) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

377

phantom = ctx->config.svp_pstate.callbacks.get_paired_subvp_stream(context, pipe->stream);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

389

subvp_pipes[index] = pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

436

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

450

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

454

if (!pipe->stream || !pipe->plane_state || pipe->top_pipe || pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

458

if (ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(context, pipe) == SUBVP_MAIN)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

462

phantom_stream = ctx->config.svp_pstate.callbacks.get_paired_subvp_stream(context, pipe->stream);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

463

main_timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

51

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

510

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

535

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

536

pipe_mall_type = ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

54

if (pipe->stream && pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

540

if (!pipe->stream || !pipe->plane_state || pipe->top_pipe || pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

55

ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

550

subvp_pipe = pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

56

bytes_per_pixel = pipe->plane_state->format >= SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616 ? 8 : 4;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

611

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

612

enum mall_stream_type pipe_mall_type = ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

614

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

617

if (pipe->plane_state && !pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

63

full_vp_width_blk_aligned = ((pipe->plane_res.scl_data.viewport.x +

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

64

pipe->plane_res.scl_data.viewport.width + mblk_width - 1) / mblk_width * mblk_width) +

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

65

(pipe->plane_res.scl_data.viewport.x / mblk_width * mblk_width);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

660

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

666

pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

668

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

71

mall_alloc_height_blk_aligned = (pipe->stream->timing.v_addressable - 1 + mblk_height - 1) /

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

795

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

800

if (pipe->plane_state && pipe->stream && pipe->stream == phantom_stream &&

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

801

ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(state, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

802

pipe->stream->use_dynamic_meta = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

803

pipe->plane_state->flip_immediate = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

804

if (!ctx->config.svp_pstate.callbacks.build_scaling_params(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

848

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

850

if (pipe->plane_state && pipe->stream && ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(state, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

851

phantom_stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

860

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

861

pipe->plane_state->is_phantom = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

87

if (pipe->plane_state->dcc.enable)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1208

struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1210

if (!pipe || !pipe->stream || !pipe->plane_state)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1213

while (pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1214

pipe_index = pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1216

if (pipe->stream && dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] == false) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1222

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

783

const struct dc_stream_state *in, const struct pipe_ctx *pipe, struct dml2_context *dml2)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

990

const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

992

if (pipe->plane_state == in && !pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

993

temp_pipe->stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

994

temp_pipe->plane_state = pipe->plane_state;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

995

temp_pipe->plane_res.scl_data.taps = pipe->plane_res.scl_data.taps;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

996

temp_pipe->stream_res = pipe->stream_res;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.h

39

bool is_dp2p0_output_encoder(const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.h

84

bool dml2_predict_pipe_split(struct dc_state *context, display_pipe_params_st pipe, int index);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

180

struct pipe_ctx *pipe = &display_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

182

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

183

if (!dml2->config.callbacks.build_scaling_params(pipe)) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

288

struct pipe_ctx *pipe = &display_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

290

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

291

if (!dml2->config.callbacks.build_scaling_params(pipe)) {

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

48

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

56

if (lock && pipe->stream_res.tg->funcs->is_blanked &&

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

57

pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg))

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

60

val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst],

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

71

REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val,

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

76

REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val,

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

82

uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]);

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

83

REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value);

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

90

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

1283

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

1291

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1153

static int calculate_vready_offset_for_group(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1156

int vready_offset = pipe->pipe_dlg_param.vready_offset;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1159

for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1163

for (other_pipe = pipe->top_pipe; other_pipe != NULL; other_pipe = other_pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1167

for (other_pipe = pipe->next_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->next_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1171

for (other_pipe = pipe->prev_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2150

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2158

if (!pipe || pipe->top_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2165

pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2167

pipe->stream_res.tg->funcs->unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2239

void dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2242

if (!pipe || pipe->top_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2247

delay_cursor_until_vupdate(dc, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2249

if (pipe->stream && should_use_dmub_inbox1_lock(dc, pipe->stream->link)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2254

inst_flags.opp_inst = pipe->stream_res.opp->inst;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2262

pipe->stream_res.opp->inst, lock);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2354

static bool is_low_refresh_rate(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2357

pipe->stream->timing.pix_clk_100hz * 100 /

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2358

pipe->stream->timing.h_total /

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2359

pipe->stream->timing.v_total;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2363

static uint8_t get_clock_divider(struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2369

if (account_low_refresh_rate && is_low_refresh_rate(pipe))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2372

if (pipe->stream_res.pix_clk_params.pixel_encoding == PIXEL_ENCODING_YCBCR420)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2375

while (pipe->next_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2376

pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

62

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

64

void dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1378

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1387

if (!pipe || pipe->top_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1390

if (pipe->plane_state != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1391

flip_immediate = pipe->plane_state->flip_immediate;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1393

if (pipe->stream_res.gsl_group > 0) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1394

temp_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1407

temp_pipe = pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1426

if (lock && (pipe->bottom_pipe != NULL || !flip_immediate))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1427

if ((flip_immediate && pipe->stream_res.gsl_group == 0) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1428

(!flip_immediate && pipe->stream_res.gsl_group > 0))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1429

dcn20_setup_gsl_group_as_lock(dc, pipe, flip_immediate);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1431

if (pipe->plane_state != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1432

flip_immediate = pipe->plane_state->flip_immediate;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1434

temp_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1441

if (!lock && pipe->stream_res.gsl_group > 0 && pipe->plane_state &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1443

dcn20_setup_gsl_group_as_lock(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1445

if (pipe->stream && should_use_dmub_inbox1_lock(dc, pipe->stream->link)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1450

inst_flags.otg_inst = pipe->stream_res.tg->inst;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1452

if (pipe->plane_state != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1453

hw_locks.bits.triple_buffer_lock = pipe->plane_state->triplebuffer_flips;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1459

} else if (pipe->plane_state != NULL && pipe->plane_state->triplebuffer_flips) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1461

pipe->stream_res.tg->funcs->triplebuffer_lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1463

pipe->stream_res.tg->funcs->triplebuffer_unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1466

pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1469

dc->hwseq->funcs.perform_3dlut_wa_unlock(pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1471

pipe->stream_res.tg->funcs->unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1865

static int dcn20_calculate_vready_offset_for_group(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1868

int vready_offset = pipe->pipe_dlg_param.vready_offset;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1871

for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1875

for (other_pipe = pipe->top_pipe; other_pipe != NULL; other_pipe = other_pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1879

for (other_pipe = pipe->next_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->next_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1883

for (other_pipe = pipe->prev_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2040

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2049

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2051

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2052

ASSERT(!pipe->plane_state->triplebuffer_flips);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2055

dc, pipe, pipe->plane_state->triplebuffer_flips);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2085

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2088

dc_state_get_pipe_subvp_type(dc->current_state, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2093

dc->hwseq->funcs.blank_pixel_data(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2137

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2138

if (resource_is_pipe_type(pipe, OTG_MASTER) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2139

!resource_is_pipe_type(pipe, DPP_PIPE) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2140

pipe->update_flags.bits.odm &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2142

hws->funcs.update_odm(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2150

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2152

if (pipe->plane_state && !pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2153

while (pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2155

hws->funcs.program_pipe(dc, pipe, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2165

if (pipe->stream &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2166

dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_PHANTOM)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2167

dcn20_program_pipe(dc, pipe, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2170

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2175

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2176

if (!pipe->top_pipe && !pipe->prev_odm_pipe

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2177

&& pipe->stream && pipe->stream->num_wb_info > 0

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2178

&& (pipe->update_flags.raw || (pipe->plane_state && pipe->plane_state->update_flags.raw)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2179

|| pipe->stream->update_flags.raw)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2181

hws->funcs.program_all_writeback_pipes_in_tree(dc, pipe->stream, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2185

!pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2186

pipe->stream &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2187

pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2190

pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start(pipe->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2259

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2261

if (pipe->plane_state && !pipe->top_pipe && pipe->update_flags.bits.enable &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2262

dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2263

struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2273

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2280

if (resource_is_pipe_type(old_pipe, OTG_MASTER) && resource_is_pipe_type(pipe, OTG_MASTER) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2281

resource_get_odm_slice_count(old_pipe) < resource_get_odm_slice_count(pipe) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2282

dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2284

struct timing_generator *tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2299

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2301

if (pipe->plane_state && !pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2307

while (pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2308

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2313

dc->hwss.apply_update_flags_for_phantom(pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2315

dc->hwss.update_phantom_vp_position(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2316

dcn20_program_pipe(dc, pipe, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2318

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2377

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2380

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_NONE) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2421

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2424

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_NONE) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

68

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

530

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

537

if (pipe->top_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

543

if (pipe->plane_state != NULL && pipe->plane_state->triplebuffer_flips) {

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

545

pipe->stream_res.tg->funcs->triplebuffer_lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

547

pipe->stream_res.tg->funcs->triplebuffer_unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

550

pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

552

pipe->stream_res.tg->funcs->unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.h

41

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1157

struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1159

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1162

if (dc_state_get_pipe_subvp_type(dc->current_state, pipe) == SUBVP_MAIN) {

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

385

static bool dcn314_is_pipe_dig_fifo_on(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

387

return pipe && pipe->stream

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

389

&& pipe->stream_res.stream_enc

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

390

&& pipe->stream_res.stream_enc->funcs->dig_source_otg

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

391

&& pipe->stream_res.tg->inst == pipe->stream_res.stream_enc->funcs->dig_source_otg(pipe->stream_res.stream_enc)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

392

&& pipe->stream->link && pipe->stream->link->link_enc

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

393

&& pipe->stream->link->link_enc->funcs->is_dig_enabled

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

394

&& pipe->stream->link->link_enc->funcs->is_dig_enabled(pipe->stream->link->link_enc)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

395

&& pipe->stream_res.stream_enc->funcs->is_fifo_enabled

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

396

&& pipe->stream_res.stream_enc->funcs->is_fifo_enabled(pipe->stream_res.stream_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

402

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

407

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

409

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

412

if (pipe->top_pipe || pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

415

if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal)) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

416

!pipe->stream->apply_seamless_boot_optimization &&

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

417

!pipe->stream->apply_edp_fast_boot_optimization) {

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

418

if (dcn314_is_pipe_dig_fifo_on(pipe))

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

420

pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

430

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

432

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

435

int opp_inst[MAX_PIPES] = { pipe->stream_res.opp->inst };

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

437

int last_odm_slice_width = resource_get_odm_slice_dst_width(pipe, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

438

int odm_slice_width = resource_get_odm_slice_dst_width(pipe, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

441

for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

446

pipe->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

447

pipe->stream_res.tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

451

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1254

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1260

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1263

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1267

if (!resource_is_pipe_type(pipe, OTG_MASTER))

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1270

if ((pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1271

&& dc_state_get_pipe_subvp_type(dc_state, pipe) != SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1272

pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1282

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1284

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1287

int opp_inst[MAX_PIPES] = { pipe->stream_res.opp->inst };

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1289

int last_odm_slice_width = resource_get_odm_slice_dst_width(pipe, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1290

int odm_slice_width = resource_get_odm_slice_dst_width(pipe, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1293

for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1298

pipe->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1299

pipe->stream_res.tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1303

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1444

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1446

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1447

dc_state_get_paired_subvp_stream(context, pipe->stream) == phantom_pipe->stream) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1448

if (pipe->plane_state && pipe->plane_state->update_flags.bits.position_change) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1450

phantom_plane->src_rect.x = pipe->plane_state->src_rect.x;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1451

phantom_plane->src_rect.y = pipe->plane_state->src_rect.y;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1452

phantom_plane->clip_rect.x = pipe->plane_state->clip_rect.x;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1453

phantom_plane->dst_rect.x = pipe->plane_state->dst_rect.x;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1454

phantom_plane->dst_rect.y = pipe->plane_state->dst_rect.y;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1584

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1591

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1830

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1834

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1835

tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1837

if (!resource_is_pipe_type(pipe, OTG_MASTER) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1839

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1843

dc->hwss.pipe_control_lock(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1845

dc->hwss.pipe_control_lock(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

239

struct pipe_ctx *pipe = &ctx->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

241

if (!pipe->stream || !pipe->plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

244

mall_ss_size_bytes += dcn32_helper_calculate_mall_bytes_for_cursor(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

388

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

392

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

393

pipe_mall_type = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

395

if (pipe->stream && pipe->plane_state && pipe_mall_type == SUBVP_MAIN) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

413

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

414

if (pipe->stream && pipe->plane_state && pipe_mall_type == SUBVP_MAIN &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

416

pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

616

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

617

struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

620

if (pipe->stream)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

621

stream_status = dc_state_get_stream_status(context, pipe->stream);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

623

if (!pipe->stream || !(dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN ||

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

635

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

637

struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

653

if (pipe->stream)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

654

stream_status = dc_state_get_stream_status(context, pipe->stream);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

658

if (pipe->stream && (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN ||

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

681

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

682

struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

684

if (pipe->stream && pipe->plane_state && hubp && hubp->funcs->hubp_update_mall_sel) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

707

if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

713

pipe->stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

714

pipe->plane_state->address.type != PLN_ADDR_TYPE_GRPH_STEREO &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

715

!pipe->plane_state->address.tmz_surface ? 2 : 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

741

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

742

struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

744

if (pipe->stream && hubp && hubp->funcs->hubp_prepare_subvp_buffering) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

750

if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1592

void dcn35_abort_cursor_offload_update(struct dc *dc, const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1614

dc->hwss.begin_cursor_offload_update(dc, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1617

dc->hwss.commit_cursor_offload_update(dc, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1620

void dcn35_begin_cursor_offload_update(struct dc *dc, const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1623

const struct pipe_ctx *top_pipe = resource_get_otg_master(pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1636

if (pipe->plane_res.hubp)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1637

pipe->plane_res.hubp->cursor_offload = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1639

if (pipe->plane_res.dpp)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1640

pipe->plane_res.dpp->cursor_offload = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1643

void dcn35_commit_cursor_offload_update(struct dc *dc, const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1647

const struct pipe_ctx *top_pipe = resource_get_otg_master(pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1650

if (pipe->plane_res.hubp)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1651

pipe->plane_res.hubp->cursor_offload = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1653

if (pipe->plane_res.dpp)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1654

pipe->plane_res.dpp->cursor_offload = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1672

void dcn35_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1675

const struct pipe_ctx *top_pipe = resource_get_otg_master(pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1676

const struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1677

const struct dpp *dpp = pipe->plane_res.dpp;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1688

p = &cs->offload_streams[stream_idx].payloads[payload_idx].pipe_data[pipe->pipe_idx].dcn30;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1717

cs->offload_streams[stream_idx].payloads[payload_idx].pipe_mask |= (1u << pipe->pipe_idx);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1726

void dcn35_program_cursor_offload_now(struct dc *dc, const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1728

dc_dmub_srv_program_cursor_now(dc, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

104

void dcn35_abort_cursor_offload_update(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

105

void dcn35_begin_cursor_offload_update(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

106

void dcn35_commit_cursor_offload_update(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

107

void dcn35_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

110

void dcn35_program_cursor_offload_now(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1263

struct pipe_ctx *pipe = &ctx->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1265

if (!pipe->stream || !pipe->plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1268

mall_ss_size_bytes += dcn32_helper_calculate_mall_bytes_for_cursor(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1853

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1858

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1859

tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1861

if (!resource_is_pipe_type(pipe, OTG_MASTER) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1863

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1865

dc->hwss.pipe_control_lock(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1870

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1871

tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1873

if (!resource_is_pipe_type(pipe, OTG_MASTER) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1875

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1881

dc->hwss.pipe_control_lock(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1892

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1893

tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1894

if (!resource_is_pipe_type(pipe, OTG_MASTER) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1896

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1900

dc->hwss.pipe_control_lock(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2084

static unsigned int dcn401_calculate_vready_offset_for_group(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2087

unsigned int vready_offset = pipe->global_sync.dcn4x.vready_offset_pixels;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2090

for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2094

for (other_pipe = pipe->top_pipe; other_pipe != NULL; other_pipe = other_pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2098

for (other_pipe = pipe->next_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->next_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2102

for (other_pipe = pipe->prev_odm_pipe; other_pipe != NULL; other_pipe = other_pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2409

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2418

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2420

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2421

if (pipe->plane_state->triplebuffer_flips)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2426

dc, pipe, pipe->plane_state->triplebuffer_flips);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2456

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2459

dc_state_get_pipe_subvp_type(dc->current_state, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2464

dc->hwseq->funcs.blank_pixel_data(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2508

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2509

if (resource_is_pipe_type(pipe, OTG_MASTER) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2510

!resource_is_pipe_type(pipe, DPP_PIPE) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2511

pipe->update_flags.bits.odm &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2513

hws->funcs.update_odm(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2521

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2523

if (pipe->plane_state && !pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2524

while (pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2526

hws->funcs.program_pipe(dc, pipe, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2536

if (pipe->stream &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2537

dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_PHANTOM)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2538

dcn401_program_pipe(dc, pipe, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2541

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2546

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2547

if (!pipe->top_pipe && !pipe->prev_odm_pipe

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2548

&& pipe->stream && pipe->stream->num_wb_info > 0

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2549

&& (pipe->update_flags.raw || (pipe->plane_state && pipe->plane_state->update_flags.raw)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2550

|| pipe->stream->update_flags.raw)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2552

hws->funcs.program_all_writeback_pipes_in_tree(dc, pipe->stream, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2556

!pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2557

pipe->stream &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2558

pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2561

pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start(pipe->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2595

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2597

if (pipe->plane_state && !pipe->top_pipe && pipe->update_flags.bits.enable &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2598

dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2599

struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2609

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2616

if (resource_is_pipe_type(old_pipe, OTG_MASTER) && resource_is_pipe_type(pipe, OTG_MASTER) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2617

resource_get_odm_slice_count(old_pipe) < resource_get_odm_slice_count(pipe) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2618

dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2620

struct timing_generator *tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2636

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2638

if (pipe->plane_state && !pipe->top_pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2644

while (pipe) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2645

if (pipe->stream && dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2650

dc->hwss.apply_update_flags_for_phantom(pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2652

dc->hwss.update_phantom_vp_position(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2653

dcn401_program_pipe(dc, pipe, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2655

pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2986

void dcn401_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2989

const struct pipe_ctx *top_pipe = resource_get_otg_master(pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2990

const struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2991

const struct dpp *dpp = pipe->plane_res.dpp;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3002

p = &cs->offload_streams[stream_idx].payloads[payload_idx].pipe_data[pipe->pipe_idx].dcn401;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3039

cs->offload_streams[stream_idx].payloads[payload_idx].pipe_mask |= (1u << pipe->pipe_idx);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3940

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3941

struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3943

if (pipe->stream && pipe->plane_state && hubp && hubp->funcs->hubp_update_mall_sel) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3966

if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3971

pipe->stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3972

pipe->plane_state->address.type != PLN_ADDR_TYPE_GRPH_STEREO &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3973

!pipe->plane_state->address.tmz_surface) ? 2 : 0;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3981

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3982

struct hubp *hubp = pipe->plane_res.hubp;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3984

if (pipe->stream && hubp && hubp->funcs->hubp_prepare_subvp_buffering) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3985

if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

134

void dcn401_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1042

struct pipe_ctx *pipe, bool lock);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1047

void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1094

void (*set_dmdata_attributes)(struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1099

void (*set_cursor_position)(struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1100

void (*set_cursor_attribute)(struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1101

void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1102

void (*abort_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1103

void (*begin_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1104

void (*commit_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1105

void (*update_cursor_offload_pipe)(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1108

void (*program_cursor_offload_now)(struct dc *dc, const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/inc/core_types.h

153

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h

484

const struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/inc/resource.h

38

#define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)

drivers/gpu/drm/amd/display/dc/inc/resource.h

39

#define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)

drivers/gpu/drm/amd/display/dc/inc/resource.h

40

#define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))

drivers/gpu/drm/amd/display/dc/inc/resource.h

444

int resource_get_mpc_slice_count(const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/inc/resource.h

451

int resource_get_odm_slice_count(const struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

959

struct pipe_ctx *pipe;

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

974

pipe = &dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

975

if (pipe->stream && pipe->stream->link) {

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

976

if (pipe->stream->link == link) {

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

977

link_stream = pipe->stream;

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

197

const struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

199

return resource_is_pipe_type(pipe, OTG_MASTER) &&

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

200

pipe->stream->link == link;

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

213

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

217

pipe = &state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

219

if (is_master_pipe_for_link(link, pipe) &&

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

220

pipe->stream->dpms_off == false) {

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

221

pipes[(*count)++] = pipe;

drivers/gpu/drm/amd/display/dc/link/link_resource.c

36

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/link/link_resource.c

41

pipe = &link->dc->current_state->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/link/link_resource.c

42

if (pipe->stream && pipe->stream->link && pipe->top_pipe == NULL) {

drivers/gpu/drm/amd/display/dc/link/link_resource.c

43

if (pipe->stream->link == link) {

drivers/gpu/drm/amd/display/dc/link/link_resource.c

44

*link_res = pipe->link_res;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1800

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1801

struct pipe_ctx *odm_pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1803

if (pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1806

pipe->next_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1823

if (pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1824

resource_build_scaling_params(pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1829

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1830

struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1832

if (!hsplit_pipe || hsplit_pipe->plane_state != pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1835

pipe->bottom_pipe = hsplit_pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1837

hsplit_pipe->bottom_pipe->top_pipe = pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1846

if (pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1847

resource_build_scaling_params(pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1872

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1879

if (pipe->plane_state &&

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1880

(pipe->plane_state->dst_rect.width <= 16 ||

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1881

pipe->plane_state->dst_rect.height <= 16 ||

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1882

pipe->plane_state->src_rect.width <= 16 ||

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1883

pipe->plane_state->src_rect.height <= 16))

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1887

if (pipe->stream && !pipe->prev_odm_pipe &&

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1888

(!pipe->top_pipe || pipe->top_pipe->plane_state != pipe->plane_state))

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1896

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1899

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1902

timing = pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1933

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1946

if ((pipe->stream->view_format ==

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1948

pipe->stream->view_format ==

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1950

(pipe->stream->timing.timing_3d_format ==

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1952

pipe->stream->timing.timing_3d_format ==

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1955

if (dc->debug.force_odm_combine & (1 << pipe->stream_res.tg->inst)) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1959

if (dc->debug.force_odm_combine_4to1 & (1 << pipe->stream_res.tg->inst)) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1964

if (pipe->stream->timing.h_addressable > 7680 &&

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1965

pipe->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1972

if (resource_get_mpc_slice_count(pipe) == 2) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1978

else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1980

} else if (resource_get_mpc_slice_count(pipe) == 4) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1982

if (split[i] == 2 && ((pipe->top_pipe && !pipe->top_pipe->top_pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1983

|| !pipe->bottom_pipe)) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1985

} else if (split[i] == 0 && pipe->top_pipe &&

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1986

pipe->top_pipe->plane_state == pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1989

} else if (resource_get_odm_slice_count(pipe) > 1) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1991

if (pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1997

if (resource_get_odm_slice_count(pipe) == 2) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2003

else if (pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2007

} else if (resource_get_odm_slice_count(pipe) == 4) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2009

if (split[i] == 2 && ((pipe->prev_odm_pipe && !pipe->prev_odm_pipe->prev_odm_pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2010

|| !pipe->next_odm_pipe)) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2012

} else if (split[i] == 0 && pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2017

} else if (resource_get_mpc_slice_count(pipe) > 1) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2020

if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2080

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2081

struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2083

if (!pipe->stream || pipe_split_from[i] >= 0)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2088

if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2089

hsplit_pipe = dcn20_find_secondary_pipe(dc, &context->res_ctx, dc->res_pool, pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2093

pipe, hsplit_pipe))

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2096

dcn20_build_mapped_resource(dc, context, pipe->stream);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2099

if (!pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2102

if (pipe->top_pipe && pipe->plane_state == pipe->top_pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2106

if (hsplit_pipe && hsplit_pipe->plane_state != pipe->plane_state

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2111

if (!hsplit_pipe || hsplit_pipe->plane_state != pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2113

hsplit_pipe = dcn20_find_secondary_pipe(dc, &context->res_ctx, dc->res_pool, pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2124

pipe, hsplit_pipe))

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2126

dcn20_build_mapped_resource(dc, context, pipe->stream);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2130

pipe, hsplit_pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2131

resource_build_scaling_params(pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2136

} else if (hsplit_pipe && hsplit_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2246

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2249

if (resource_is_pipe_type(pipe, OPP_HEAD) && pipe->stream_res.dsc)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2250

dcn20_release_dsc(&context->res_ctx, pool, &pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2251

memset(pipe, 0, sizeof(*pipe));

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

67

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

849

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

850

struct pipe_ctx *mpo_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

853

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

858

&& pipe->plane_state && mpo_pipe

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

860

&pipe->stream->src,

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

862

ASSERT(mpo_pipe->plane_state != pipe->plane_state);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

873

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

874

struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

876

if (!pipe->stream || pipe_split_from[i] >= 0)

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

881

if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) {

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

882

hsplit_pipe = dcn20_find_secondary_pipe(dc, &context->res_ctx, dc->res_pool, pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

886

pipe, hsplit_pipe))

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

889

dcn20_build_mapped_resource(dc, context, pipe->stream);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

892

if (!pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

895

if (pipe->top_pipe && pipe->plane_state == pipe->top_pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

899

if (!hsplit_pipe || hsplit_pipe->plane_state != pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

901

hsplit_pipe = dcn20_find_secondary_pipe(dc, &context->res_ctx, dc->res_pool, pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

912

pipe, hsplit_pipe))

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

914

dcn20_build_mapped_resource(dc, context, pipe->stream);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

918

pipe, hsplit_pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

919

resource_build_scaling_params(pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

924

} else if (hsplit_pipe && hsplit_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1368

pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth =

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1620

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1624

pipe = &context->res_ctx.pipe_ctx[old_index];

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1625

pipe->pipe_idx = old_index;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1628

if (!pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1633

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1634

pipe->pipe_idx = i;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1645

if (!pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1648

pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1649

pipe->pipe_idx = i;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1654

return pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1734

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1735

struct pipe_ctx *mpo_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1737

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1742

&& pipe->plane_state && mpo_pipe

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1744

&pipe->stream->src,

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1746

ASSERT(mpo_pipe->plane_state != pipe->plane_state);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1755

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1762

if (pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1764

pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1765

if (pipe->next_odm_pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1766

pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1768

pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1769

pipe->next_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1770

pipe->plane_state = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1771

pipe->stream = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1772

pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1773

pipe->prev_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1774

if (pipe->stream_res.dsc)

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1775

dcn20_release_dsc(&context->res_ctx, dc->res_pool, &pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1776

memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1777

memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1779

} else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1780

struct pipe_ctx *top_pipe = pipe->top_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1781

struct pipe_ctx *bottom_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1787

pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1788

pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1789

pipe->plane_state = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1790

pipe->stream = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1791

memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1792

memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1800

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1806

if (!pipe->stream || newly_split[i])

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1812

if (!pipe->plane_state && !odm)

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1836

pipe, hsplit_pipe, odm))

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1858

pipe, pipe_4to1, odm))

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1882

dcn20_build_mapped_resource(dc, context, pipe->stream);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1886

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1888

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1889

if (!resource_build_scaling_params(pipe))

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1660

pipes[i].pipe.src.gpuvm = 1;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1663

pipes[i].pipe.src.hostvm = dc->vm_pa_config.is_hvm_enabled;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1665

pipes[i].pipe.src.hostvm = false;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1667

pipes[i].pipe.src.hostvm = true;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1679

struct pipe_ctx *pipe = 0;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1691

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1692

timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1693

if (pipe->plane_state &&

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1694

(pipe->plane_state->src_rect.height < pipe->plane_state->dst_rect.height ||

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1695

pipe->plane_state->src_rect.width < pipe->plane_state->dst_rect.width))

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1703

pipes[pipe_cnt].pipe.src.immediate_flip = true;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1704

pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1705

pipes[pipe_cnt].pipe.src.gpuvm = true;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1706

pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1707

pipes[pipe_cnt].pipe.src.dcc_rate = 3;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1735

if (pipe_cnt == 1 && pipe->plane_state && !dc->debug.disable_z9_mpc) {

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1736

if (is_dual_plane(pipe->plane_state->format)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1737

&& pipe->plane_state->src_rect.width <= 1920 && pipe->plane_state->src_rect.height <= 1080) {

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1739

} else if (!is_dual_plane(pipe->plane_state->format) && pipe->plane_state->src_rect.width <= 5120) {

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1742

pipes[0].pipe.src.unbounded_req_mode = true;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1703

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1717

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1718

timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1725

pipes[pipe_cnt].pipe.src.immediate_flip = true;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1727

pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1728

pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1729

pipes[pipe_cnt].pipe.src.dcc_rate = 3;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1734

int bpp = source_format_to_bpp(pipes[pipe_cnt].pipe.src.source_format);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1742

split_required = split_required || (pipe->plane_state && pipe->plane_state->src_rect.width > 5120);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1749

pipes[pipe_cnt].pipe.src.det_size_override = approx_det_segs_required_for_pstate;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1779

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1780

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1785

pipes[pipe_cnt].pipe.src.det_size_override = 0;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1790

bool split_required = pipe->stream->timing.pix_clk_100hz >= dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc)

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1791

|| (pipe->plane_state && pipe->plane_state->src_rect.width > 5120);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1794

pipes[pipe_cnt].pipe.src.det_size_override += (remaining_det_segs - MIN_RESERVED_DET_SEGS) / crb_pipes +

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1796

if (pipes[pipe_cnt].pipe.src.det_size_override > 2 * DCN3_15_MAX_DET_SEGS) {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1798

remaining_det_segs += pipes[pipe_cnt].pipe.src.det_size_override - 2 * (DCN3_15_MAX_DET_SEGS);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1799

pipes[pipe_cnt].pipe.src.det_size_override = 2 * DCN3_15_MAX_DET_SEGS;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1801

if (pipes[pipe_cnt].pipe.src.det_size_override > DCN3_15_MAX_DET_SEGS || split_required) {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1803

remaining_det_segs += pipes[pipe_cnt].pipe.src.det_size_override % 2;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1804

pipes[pipe_cnt].pipe.src.det_size_override -= pipes[pipe_cnt].pipe.src.det_size_override % 2;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1807

pipes[pipe_cnt].pipe.src.det_size_override *= DCN3_15_CRB_SEGMENT_SIZE_KB;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1821

if (pipe_cnt == 1 && pipe->plane_state && !dc->debug.disable_z9_mpc) {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1822

if (is_dual_plane(pipe->plane_state->format)

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1823

&& pipe->plane_state->src_rect.width <= 1920 && pipe->plane_state->src_rect.height <= 1080) {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1827

} else if (!is_dual_plane(pipe->plane_state->format)

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1828

&& pipe->plane_state->src_rect.width <= 5120

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1829

&& pipe->stream->timing.pix_clk_100hz < dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc)) {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1832

pipes[0].pipe.src.unbounded_req_mode = true;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1648

struct pipe_ctx *pipe = 0;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1660

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1661

timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1668

pipes[pipe_cnt].pipe.src.immediate_flip = true;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1670

pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1671

pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1672

pipes[pipe_cnt].pipe.src.dcc_rate = 3;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1705

if (pipe_cnt == 1 && pipe->plane_state && !dc->debug.disable_z9_mpc) {

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1706

if (is_dual_plane(pipe->plane_state->format)

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1707

&& pipe->plane_state->src_rect.width <= 1920 && pipe->plane_state->src_rect.height <= 1080) {

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1711

} else if (!is_dual_plane(pipe->plane_state->format)) {

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1713

pipes[0].pipe.src.unbounded_req_mode = true;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1764

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1769

if (pipe->plane_state && pipe->stream && pipe->stream == phantom_stream &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1770

dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1771

pipe->stream->use_dynamic_meta = false;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1772

pipe->plane_state->flip_immediate = false;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1773

if (!resource_build_scaling_params(pipe)) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1907

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1939

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1943

mall_type = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1945

if (resource_is_pipe_type(pipe, OTG_MASTER))

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1956

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1957

timing = &pipe->stream->timing;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1959

pipes[pipe_cnt].pipe.src.gpuvm = true;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1963

pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1969

mall_type = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1978

odm_slice_count = resource_get_odm_slice_count(pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1982

pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_2to1;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1985

pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_4to1;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1988

pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_dal;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1991

pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_dal;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1994

pipes[pipe_cnt].pipe.src.gpuvm_min_page_size_kbytes = 256; // according to spreadsheet

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1995

pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1996

pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_19;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2002

switch (dc_state_get_pipe_subvp_type(context, pipe)) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2004

pipes[pipe_cnt].pipe.src.use_mall_for_pstate_change = dm_use_mall_pstate_change_sub_viewport;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2008

pipes[pipe_cnt].pipe.src.use_mall_for_pstate_change = dm_use_mall_pstate_change_phantom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2009

pipes[pipe_cnt].pipe.src.use_mall_for_static_screen = dm_use_mall_static_screen_disable;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2011

pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2014

pipes[pipe_cnt].pipe.src.use_mall_for_pstate_change = dm_use_mall_pstate_change_disable;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2015

pipes[pipe_cnt].pipe.src.use_mall_for_static_screen = dm_use_mall_static_screen_disable;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2777

struct pipe_ctx *idle_pipe, *pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2793

pipe = &old_ctx->pipe_ctx[head_index];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2794

if (pipe->bottom_pipe && res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx].stream == NULL) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2795

idle_pipe = &res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2796

idle_pipe->pipe_idx = pipe->bottom_pipe->pipe_idx;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

137

bool dcn32_is_center_timing(struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

138

bool dcn32_is_psr_capable(struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

159

struct pipe_ctx *pipe,

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

171

bool dcn32_allow_subvp_with_active_margin(struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

173

bool dcn32_allow_subvp_high_refresh_rate(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

179

bool dcn32_check_native_scaling_for_res(struct pipe_ctx *pipe, unsigned int width, unsigned int height);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

114

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

119

if (pipe->prev_odm_pipe) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

121

pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

122

if (pipe->next_odm_pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

123

pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

125

pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

126

pipe->next_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

127

pipe->plane_state = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

128

pipe->stream = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

129

pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

130

pipe->prev_odm_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

131

if (pipe->stream_res.dsc)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

132

dcn20_release_dsc(&context->res_ctx, dc->res_pool, &pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

133

memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

134

memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

135

} else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

136

struct pipe_ctx *top_pipe = pipe->top_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

137

struct pipe_ctx *bottom_pipe = pipe->bottom_pipe;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

143

pipe->top_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

144

pipe->bottom_pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

145

pipe->plane_state = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

146

pipe->stream = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

147

memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

148

memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

159

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

161

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

164

if (!pipe->plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

176

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

178

if (dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_NONE)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

201

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

203

if (!pipe->stream)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

206

if (pipe->plane_state && pipe->plane_state->rotation != ROTATION_ANGLE_0)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

212

bool dcn32_is_center_timing(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

216

if (pipe->stream) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

217

if (pipe->stream->timing.v_addressable != pipe->stream->dst.height ||

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

218

pipe->stream->timing.v_addressable != pipe->stream->src.height) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

222

if (pipe->plane_state) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

223

if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

224

pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

233

bool dcn32_is_psr_capable(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

237

if (pipe->stream && pipe->stream->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

372

pipes[pipe_cnt].pipe.src.det_size_override = pipe_segments[i] * DCN3_2_DET_SEG_SIZE;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

377

pipes[i].pipe.src.det_size_override = 4 * DCN3_2_DET_SEG_SIZE; //DCN3_2_DEFAULT_DET_SIZE

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

386

struct pipe_ctx *pipe = 0;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

394

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

403

pipes[0].pipe.src.det_size_override = DCN3_2_MAX_DET_SIZE;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

404

if (pipe->plane_state && !disable_unbounded_requesting && pipe->plane_state->tiling_info.gfx9.swizzle != DC_SW_LINEAR) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

405

if (!is_dual_plane(pipe->plane_state->format)) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

406

pipes[0].pipe.src.det_size_override = DCN3_2_DEFAULT_DET_SIZE;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

407

pipes[0].pipe.src.unbounded_req_mode = true;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

408

if (pipe->plane_state->src_rect.width >= 5120 &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

409

pipe->plane_state->src_rect.height >= 2880)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

410

pipes[0].pipe.src.det_size_override = 320; // 5K or higher

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

591

bool dcn32_check_native_scaling_for_res(struct pipe_ctx *pipe, unsigned int width, unsigned int height)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

595

if (pipe->stream->timing.h_addressable == width &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

596

pipe->stream->timing.v_addressable == height &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

597

pipe->plane_state->src_rect.width == width &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

598

pipe->plane_state->src_rect.height == height &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

599

pipe->plane_state->dst_rect.width == width &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

600

pipe->plane_state->dst_rect.height == height)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

618

static bool disallow_subvp_in_active_plus_blank(struct pipe_ctx *pipe)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

622

if (resource_is_pipe_type(pipe, OPP_HEAD) &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

623

resource_is_pipe_type(pipe, DPP_PIPE)) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

624

if (pipe->stream->timing.v_addressable == 1080 && pipe->stream->timing.h_addressable == 1920)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

656

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

657

enum mall_stream_type pipe_mall_type = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

659

if (resource_is_pipe_type(pipe, OPP_HEAD) &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

660

resource_is_pipe_type(pipe, DPP_PIPE)) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

664

subvp_disallow |= disallow_subvp_in_active_plus_blank(pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

665

refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

666

pipe->stream->timing.v_total * (unsigned long long)pipe->stream->timing.h_total - (uint64_t)1);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

667

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

668

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

672

drr_psr_capable = (drr_psr_capable || dcn32_is_psr_capable(pipe));

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

673

if (pipe->stream->ignore_msa_timing_param &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

674

(pipe->stream->allow_freesync || pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

717

struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

718

enum mall_stream_type pipe_mall_type = dc_state_get_pipe_subvp_type(context, pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

720

if (resource_is_pipe_type(pipe, OPP_HEAD) &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

721

resource_is_pipe_type(pipe, DPP_PIPE)) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

725

subvp_disallow |= disallow_subvp_in_active_plus_blank(pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

726

refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

727

pipe->stream->timing.v_total * (unsigned long long)pipe->stream->timing.h_total - (uint64_t)1);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

728

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

729

refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

733

vblank_psr_capable = (vblank_psr_capable || dcn32_is_psr_capable(pipe));

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

734

if (pipe->stream->ignore_msa_timing_param &&

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

735

(pipe->stream->allow_freesync || pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

755

struct pipe_ctx *pipe = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

762

pipe = &res_ctx->pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

763

odm_slice_count = resource_get_odm_slice_count(pipe);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

766

pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_dal;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

768

pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_2to1;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

770

pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_4to1;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4204

u32 tmp, pipe;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4220

pipe = (tmp & DCCG_DISP1_SLOW_SELECT_MASK) >> DCCG_DISP1_SLOW_SELECT_SHIFT;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4222

if (cfg->num_display > 0 && pipe != cfg->crtc_index) {

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4223

pipe = cfg->crtc_index;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4226

tmp |= DCCG_DISP1_SLOW_SELECT(pipe);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1051

struct d71_pipeline *pipe = to_d71_pipeline(c->pipeline);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1066

malidp_write_group(pipe->dou_ft_coeff_addr, FT_COEFF0,

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1283

struct d71_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1293

pipe = d71->pipes[blk_id];

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1294

pipe->lpu_addr = reg;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1306

pipe = d71->pipes[blk_id];

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1307

pipe->cu_addr = reg;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1324

pipe = d71->pipes[blk_id];

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1325

pipe->dou_addr = reg;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1333

pipe = d71->pipes[blk_id];

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1334

pipe->dou_ft_coeff_addr = reg;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1385

static void d71_lpu_dump(struct d71_pipeline *pipe, struct seq_file *sf)

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1389

seq_printf(sf, "\n------ LPU%d ------\n", pipe->base.id);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1391

dump_block_header(sf, pipe->lpu_addr);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1393

get_values_from_reg(pipe->lpu_addr, 0xA0, 6, v);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1401

get_values_from_reg(pipe->lpu_addr, 0xC0, 1, v);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1404

get_values_from_reg(pipe->lpu_addr, 0xD0, 3, v);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1410

static void d71_dou_dump(struct d71_pipeline *pipe, struct seq_file *sf)

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1414

seq_printf(sf, "\n------ DOU%d ------\n", pipe->base.id);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1416

dump_block_header(sf, pipe->dou_addr);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1418

get_values_from_reg(pipe->dou_addr, 0xA0, 5, v);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1426

static void d71_pipeline_dump(struct komeda_pipeline *pipe, struct seq_file *sf)

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

1428

struct d71_pipeline *d71_pipe = to_d71_pipeline(pipe);

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

18

u32 pipe = id;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

28

pipe = id / D71_PIPELINE_MAX_SCALERS;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

36

pipe = id / D71_PIPELINE_MAX_LAYERS;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

57

*pipe_id = pipe;

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

871

static int d71_downscaling_clk_check(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

222

struct d71_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

228

pipe = d71->pipes[i];

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

229

malidp_write32_mask(pipe->cu_addr, BLK_IRQ_MASK,

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

231

malidp_write32_mask(pipe->lpu_addr, BLK_IRQ_MASK,

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

233

malidp_write32_mask(pipe->dou_addr, BLK_IRQ_MASK,

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

242

struct d71_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

247

pipe = d71->pipes[i];

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

248

malidp_write32_mask(pipe->cu_addr, BLK_IRQ_MASK,

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

250

malidp_write32_mask(pipe->lpu_addr, BLK_IRQ_MASK,

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

252

malidp_write32_mask(pipe->dou_addr, BLK_IRQ_MASK,

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

261

struct d71_pipeline *pipe = d71->pipes[master_pipe];

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

263

malidp_write32_mask(pipe->dou_addr, BLK_IRQ_MASK,

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

352

struct komeda_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

413

pipe = komeda_pipeline_add(mdev, sizeof(struct d71_pipeline),

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

415

if (IS_ERR(pipe)) {

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

416

err = PTR_ERR(pipe);

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

433

pipe->standalone_disabled_comps = value;

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

435

d71->pipes[i] = to_d71_pipeline(pipe);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

617

struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

624

bridge = devm_drm_of_get_bridge(dev, pipe->of_node,

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

628

of_node_full_name(pipe->of_node));

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

633

of_node_full_name(pipe->of_node));

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

643

struct komeda_pipeline *pipe = kcrtc->master;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

655

crtc->port = pipe->of_output_port;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

665

if (pipe->of_output_links[0]) {

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

666

err = komeda_attach_bridge(base->dev, pipe, encoder);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

673

komeda_pipeline_dump(pipe);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

108

static int komeda_parse_pipe_dt(struct komeda_pipeline *pipe)

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

110

struct device_node *np = pipe->of_node;

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

115

DRM_ERROR("get pxclk for pipeline %d failed!\n", pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

118

pipe->pxlclk = clk;

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

121

pipe->of_output_links[0] =

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

123

pipe->of_output_links[1] =

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

125

pipe->of_output_port =

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

128

pipe->dual_link = pipe->of_output_links[0] && pipe->of_output_links[1];

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

137

struct komeda_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

165

pipe = mdev->pipelines[pipe_id];

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

167

if (!pipe->of_node) {

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

169

pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

172

ret = komeda_parse_pipe_dt(pipe);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

69

struct komeda_pipeline *pipe = mdev->pipelines[0];

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

75

config_id.max_line_sz = pipe->layers[0]->hsize_in.end;

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

77

config_id.n_scalers = pipe->n_scalers;

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

78

config_id.n_layers = pipe->n_layers;

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

80

for (i = 0; i < pipe->n_layers; i++) {

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

81

if (pipe->layers[i]->layer_type == KOMEDA_FMT_RICH_LAYER)

drivers/gpu/drm/arm/display/komeda/komeda_kms.h

194

void komeda_pipeline_dump(struct komeda_pipeline *pipe);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

101

pos = to_cpos(pipe->splitter);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

104

pos = to_cpos(pipe->merger);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

116

pos = to_cpos(pipe->ctrlr);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

128

komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

133

pos = komeda_pipeline_get_component_pos(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

141

komeda_pipeline_get_first_component(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

150

c = komeda_pipeline_get_component(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

165

komeda_component_add(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

182

pos = komeda_pipeline_get_component_pos(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

188

num = &pipe->n_layers;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

189

if (idx != pipe->n_layers) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

195

num = &pipe->n_scalers;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

196

if (idx != pipe->n_scalers) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

202

c = devm_kzalloc(pipe->mdev->dev, comp_sz, GFP_KERNEL);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

209

c->pipeline = pipe;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

21

struct komeda_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

226

pipe->avail_comps |= BIT(c->id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

251

void komeda_pipeline_dump(struct komeda_pipeline *pipe)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

255

unsigned long avail_comps = pipe->avail_comps;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

258

pipe->id, pipe->n_layers, pipe->n_scalers,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

259

pipe->dual_link ? "dual-link" : "single-link");

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

261

pipe->of_output_links[0] ?

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

262

pipe->of_output_links[0]->full_name : "none");

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

264

pipe->of_output_links[1] ?

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

265

pipe->of_output_links[1]->full_name : "none");

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

268

c = komeda_pipeline_get_component(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

276

struct komeda_pipeline *pipe = c->pipeline;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

282

input = komeda_pipeline_get_component(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

29

if (size < sizeof(*pipe)) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

295

komeda_get_layer_split_right_layer(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

301

for (i = index + 1; i < pipe->n_layers; i++)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

302

if (left->layer_type == pipe->layers[i]->layer_type)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

303

return pipe->layers[i];

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

307

static void komeda_pipeline_assemble(struct komeda_pipeline *pipe)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

312

unsigned long avail_comps = pipe->avail_comps;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

315

c = komeda_pipeline_get_component(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

319

for (i = 0; i < pipe->n_layers; i++) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

320

layer = pipe->layers[i];

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

322

layer->right = komeda_get_layer_split_right_layer(pipe, layer);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

325

if (pipe->dual_link && !pipe->ctrlr->supports_dual_link) {

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

326

pipe->dual_link = false;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

328

pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

34

pipe = devm_kzalloc(mdev->dev, size, GFP_KERNEL);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

348

struct komeda_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

35

if (!pipe)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

352

pipe = mdev->pipelines[i];

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

354

komeda_pipeline_assemble(pipe);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

360

void komeda_pipeline_dump_register(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

367

seq_printf(sf, "\n======== Pipeline-%d ==========\n", pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

369

if (pipe->funcs && pipe->funcs->dump_register)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

370

pipe->funcs->dump_register(pipe, sf);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

372

avail_comps = pipe->avail_comps;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

374

c = komeda_pipeline_get_component(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

38

pipe->mdev = mdev;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

39

pipe->id = mdev->n_pipelines;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

40

pipe->funcs = funcs;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

42

mdev->pipelines[mdev->n_pipelines] = pipe;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

45

return pipe;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

49

struct komeda_pipeline *pipe)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

53

unsigned long avail_comps = pipe->avail_comps;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

56

c = komeda_pipeline_get_component(pipe, i);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

60

clk_put(pipe->pxlclk);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

62

of_node_put(pipe->of_output_links[0]);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

63

of_node_put(pipe->of_output_links[1]);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

64

of_node_put(pipe->of_output_port);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

65

of_node_put(pipe->of_node);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

67

devm_kfree(mdev->dev, pipe);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

71

komeda_pipeline_get_component_pos(struct komeda_pipeline *pipe, int id)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

73

struct komeda_dev *mdev = pipe->mdev;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

82

pos = to_cpos(pipe->layers[id - KOMEDA_COMPONENT_LAYER0]);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

85

pos = to_cpos(pipe->wb_layer);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

98

pos = to_cpos(pipe->scalers[id - KOMEDA_COMPONENT_SCALER0]);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

373

int (*downscaling_clk_check)(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

378

void (*dump_register)(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

454

struct komeda_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

489

struct komeda_pipeline *pipe);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

494

komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

496

komeda_pipeline_get_first_component(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

499

void komeda_pipeline_dump_register(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

505

komeda_component_add(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

550

int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

554

komeda_pipeline_get_old_state(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

556

bool komeda_pipeline_disable(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

558

void komeda_pipeline_update(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1091

struct komeda_pipeline *pipe = left->base.pipeline;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1096

komeda_split_data_flow(pipe->scalers[0], dflow, &l_dflow, &r_dflow);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1123

err = komeda_merger_validate(pipe->merger, plane, kcrtc_st,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1128

err = komeda_compiz_set_input(pipe->compiz, kcrtc_st, dflow);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1159

struct komeda_pipeline *pipe = wb_layer->base.pipeline;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1164

err = komeda_splitter_validate(pipe->splitter, conn_st,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1176

err = komeda_merger_validate(pipe->merger, conn_st, kcrtc_st,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1227

komeda_pipeline_unbound_components(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1231

struct komeda_pipeline_state *old = priv_to_pipe_st(pipe->obj.state);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1243

c = komeda_pipeline_get_component(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1255

int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1262

if (!pipe || !has_bit(pipe->id, kcrtc_st->affected_pipes))

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1265

if (has_bit(pipe->id, kcrtc_st->active_pipes))

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1266

st = komeda_pipeline_get_new_state(pipe, drm_st);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1268

st = komeda_pipeline_get_state_and_set_crtc(pipe, drm_st, NULL);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1273

return komeda_pipeline_unbound_components(pipe, st);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1287

bool komeda_pipeline_disable(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1296

old = komeda_pipeline_get_old_state(pipe, old_state);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1299

(~pipe->standalone_disabled_comps);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1302

pipe->standalone_disabled_comps;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1305

pipe->id, old->active_comps, disabling_comps);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1308

c = komeda_pipeline_get_component(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1332

void komeda_pipeline_update(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1335

struct komeda_pipeline_state *new = priv_to_pipe_st(pipe->obj.state);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1341

old = komeda_pipeline_get_old_state(pipe, old_state);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1346

pipe->id, new->active_comps, changed_comps);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1349

c = komeda_pipeline_get_component(pipe, id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

24

komeda_pipeline_get_state(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

29

priv_st = drm_atomic_get_private_obj_state(state, &pipe->obj);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

37

komeda_pipeline_get_old_state(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

42

priv_st = drm_atomic_get_old_private_obj_state(state, &pipe->obj);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

488

struct komeda_pipeline *pipe = scaler->base.pipeline;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

49

komeda_pipeline_get_new_state(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

491

err = pipe->funcs->downscaling_clk_check(pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

54

priv_st = drm_atomic_get_new_private_obj_state(state, &pipe->obj);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

62

komeda_pipeline_get_state_and_set_crtc(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

68

st = komeda_pipeline_get_state(pipe, state);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

74

drm_crtc_index(crtc), pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

80

DRM_DEBUG_ATOMIC("Disabling a busy pipeline:%d.\n", pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

873

static bool merger_is_available(struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

876

u32 avail_inputs = pipe->merger ?

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

877

pipe->merger->base.supported_inputs : 0;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

888

struct komeda_pipeline *pipe = layer->base.pipeline;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

905

if (dflow->en_split && merger_is_available(pipe, dflow))

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

908

err = komeda_compiz_set_input(pipe->compiz, kcrtc_st, dflow);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

92

kcrtc_st->active_pipes |= BIT(pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

93

kcrtc_st->affected_pipes |= BIT(pipe->id);

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

199

struct komeda_pipeline *pipe)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

208

if ((pipe == crtc->master) || (pipe == crtc->slave))

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

217

struct komeda_pipeline *pipe,

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

226

if (pipe == kcrtc->slave)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

23

struct komeda_pipeline *pipe = kplane->layer->base.pipeline;

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

28

if (pipe == to_kcrtc(st->crtc)->master)

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

321

struct komeda_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

325

pipe = mdev->pipelines[i];

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

327

for (j = 0; j < pipe->n_layers; j++) {

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

328

err = komeda_plane_add(kms, pipe->layers[j]);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

351

struct komeda_pipeline *pipe)

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

359

st->pipe = pipe;

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

360

drm_atomic_private_obj_init(&kms->base, &pipe->obj, &st->obj,

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

369

struct komeda_pipeline *pipe;

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

373

pipe = mdev->pipelines[i];

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

375

err = komeda_pipeline_obj_add(kms, pipe);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

379

for (j = 0; j < pipe->n_layers; j++) {

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

380

err = komeda_layer_obj_add(kms, pipe->layers[j]);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

385

if (pipe->wb_layer) {

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

386

err = komeda_layer_obj_add(kms, pipe->wb_layer);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

391

for (j = 0; j < pipe->n_scalers; j++) {

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

392

err = komeda_scaler_obj_add(kms, pipe->scalers[j]);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

397

err = komeda_compiz_obj_add(kms, pipe->compiz);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

401

if (pipe->splitter) {

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

402

err = komeda_splitter_obj_add(kms, pipe->splitter);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

407

if (pipe->merger) {

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

408

err = komeda_merger_obj_add(kms, pipe->merger);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

413

err = komeda_improc_obj_add(kms, pipe->improc);

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

417

err = komeda_timing_ctrlr_obj_add(kms, pipe->ctrlr);

drivers/gpu/drm/aspeed/aspeed_gfx.h

20

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

142

static void aspeed_gfx_pipe_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

146

struct aspeed_gfx *priv = drm_pipe_to_aspeed_gfx(pipe);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

147

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

154

static void aspeed_gfx_pipe_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

156

struct aspeed_gfx *priv = drm_pipe_to_aspeed_gfx(pipe);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

157

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

163

static void aspeed_gfx_pipe_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

166

struct aspeed_gfx *priv = drm_pipe_to_aspeed_gfx(pipe);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

167

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

168

struct drm_framebuffer *fb = pipe->plane.state->fb;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

193

static int aspeed_gfx_enable_vblank(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

195

struct aspeed_gfx *priv = drm_pipe_to_aspeed_gfx(pipe);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

207

static void aspeed_gfx_disable_vblank(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

209

struct aspeed_gfx *priv = drm_pipe_to_aspeed_gfx(pipe);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

21

drm_pipe_to_aspeed_gfx(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

23

return container_of(pipe, struct aspeed_gfx, pipe);

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

236

return drm_simple_display_pipe_init(drm, &priv->pipe, &aspeed_gfx_funcs,

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

28

struct drm_crtc *crtc = &priv->pipe.crtc;

drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c

82

struct drm_display_mode *m = &priv->pipe.crtc.state->adjusted_mode;

drivers/gpu/drm/aspeed/aspeed_gfx_drv.c

133

drm_crtc_handle_vblank(&priv->pipe.crtc);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

492

c->state->event->pipe = drm_crtc_index(c);

drivers/gpu/drm/drm_gem_atomic_helper.c

407

int drm_gem_simple_kms_begin_shadow_fb_access(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_gem_atomic_helper.c

410

return drm_gem_begin_shadow_fb_access(&pipe->plane, plane_state);

drivers/gpu/drm/drm_gem_atomic_helper.c

425

void drm_gem_simple_kms_end_shadow_fb_access(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_gem_atomic_helper.c

428

drm_gem_end_shadow_fb_access(&pipe->plane, plane_state);

drivers/gpu/drm/drm_gem_atomic_helper.c

439

void drm_gem_simple_kms_reset_shadow_plane(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/drm_gem_atomic_helper.c

441

drm_gem_reset_shadow_plane(&pipe->plane);

drivers/gpu/drm/drm_gem_atomic_helper.c

458

drm_gem_simple_kms_duplicate_shadow_plane_state(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/drm_gem_atomic_helper.c

460

return drm_gem_duplicate_shadow_plane_state(&pipe->plane);

drivers/gpu/drm/drm_gem_atomic_helper.c

473

void drm_gem_simple_kms_destroy_shadow_plane_state(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_gem_atomic_helper.c

476

drm_gem_destroy_shadow_plane_state(&pipe->plane, plane_state);

drivers/gpu/drm/drm_internal.h

114

void drm_vblank_disable_and_save(struct drm_device *dev, unsigned int pipe);

drivers/gpu/drm/drm_internal.h

115

int drm_vblank_get(struct drm_device *dev, unsigned int pipe);

drivers/gpu/drm/drm_internal.h

116

void drm_vblank_put(struct drm_device *dev, unsigned int pipe);

drivers/gpu/drm/drm_internal.h

117

u64 drm_vblank_count(struct drm_device *dev, unsigned int pipe);

drivers/gpu/drm/drm_mipi_dbi.c

328

enum drm_mode_status mipi_dbi_pipe_mode_valid(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_mipi_dbi.c

331

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/drm_mipi_dbi.c

333

return drm_crtc_helper_mode_valid_fixed(&pipe->crtc, mode, &dbidev->mode);

drivers/gpu/drm/drm_mipi_dbi.c

345

void mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_mipi_dbi.c

348

struct drm_plane_state *state = pipe->plane.state;

drivers/gpu/drm/drm_mipi_dbi.c

354

if (!pipe->crtc.state->active)

drivers/gpu/drm/drm_mipi_dbi.c

442

void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/drm_mipi_dbi.c

444

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/drm_mipi_dbi.c

473

int mipi_dbi_pipe_begin_fb_access(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_mipi_dbi.c

476

return drm_gem_begin_shadow_fb_access(&pipe->plane, plane_state);

drivers/gpu/drm/drm_mipi_dbi.c

489

void mipi_dbi_pipe_end_fb_access(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_mipi_dbi.c

492

drm_gem_end_shadow_fb_access(&pipe->plane, plane_state);

drivers/gpu/drm/drm_mipi_dbi.c

503

void mipi_dbi_pipe_reset_plane(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/drm_mipi_dbi.c

505

drm_gem_reset_shadow_plane(&pipe->plane);

drivers/gpu/drm/drm_mipi_dbi.c

521

struct drm_plane_state *mipi_dbi_pipe_duplicate_plane_state(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/drm_mipi_dbi.c

523

return drm_gem_duplicate_shadow_plane_state(&pipe->plane);

drivers/gpu/drm/drm_mipi_dbi.c

537

void mipi_dbi_pipe_destroy_plane_state(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_mipi_dbi.c

540

drm_gem_destroy_shadow_plane_state(&pipe->plane, plane_state);

drivers/gpu/drm/drm_mipi_dbi.c

651

ret = drm_simple_display_pipe_init(drm, &dbidev->pipe, funcs, formats, format_count,

drivers/gpu/drm/drm_mipi_dbi.c

656

drm_plane_enable_fb_damage_clips(&dbidev->pipe.plane);

drivers/gpu/drm/drm_simple_kms_helper.c

121

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

123

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

124

if (!pipe->funcs || !pipe->funcs->enable)

drivers/gpu/drm/drm_simple_kms_helper.c

127

plane = &pipe->plane;

drivers/gpu/drm/drm_simple_kms_helper.c

128

pipe->funcs->enable(pipe, crtc->state, plane->state);

drivers/gpu/drm/drm_simple_kms_helper.c

134

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

136

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

137

if (!pipe->funcs || !pipe->funcs->disable)

drivers/gpu/drm/drm_simple_kms_helper.c

140

pipe->funcs->disable(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

152

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

154

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

155

if (!pipe->funcs || !pipe->funcs->reset_crtc)

drivers/gpu/drm/drm_simple_kms_helper.c

158

return pipe->funcs->reset_crtc(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

163

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

165

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

166

if (!pipe->funcs || !pipe->funcs->duplicate_crtc_state)

drivers/gpu/drm/drm_simple_kms_helper.c

169

return pipe->funcs->duplicate_crtc_state(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

174

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

176

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

177

if (!pipe->funcs || !pipe->funcs->destroy_crtc_state)

drivers/gpu/drm/drm_simple_kms_helper.c

180

pipe->funcs->destroy_crtc_state(pipe, state);

drivers/gpu/drm/drm_simple_kms_helper.c

185

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

187

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

188

if (!pipe->funcs || !pipe->funcs->enable_vblank)

drivers/gpu/drm/drm_simple_kms_helper.c

191

return pipe->funcs->enable_vblank(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

196

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

198

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

199

if (!pipe->funcs || !pipe->funcs->disable_vblank)

drivers/gpu/drm/drm_simple_kms_helper.c

202

pipe->funcs->disable_vblank(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

221

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

225

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

227

&pipe->crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

239

if (!pipe->funcs || !pipe->funcs->check)

drivers/gpu/drm/drm_simple_kms_helper.c

242

return pipe->funcs->check(pipe, plane_state, crtc_state);

drivers/gpu/drm/drm_simple_kms_helper.c

250

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

252

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

253

if (!pipe->funcs || !pipe->funcs->update)

drivers/gpu/drm/drm_simple_kms_helper.c

256

pipe->funcs->update(pipe, old_pstate);

drivers/gpu/drm/drm_simple_kms_helper.c

262

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

264

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

265

if (!pipe->funcs || !pipe->funcs->prepare_fb) {

drivers/gpu/drm/drm_simple_kms_helper.c

269

WARN_ON_ONCE(pipe->funcs && pipe->funcs->cleanup_fb);

drivers/gpu/drm/drm_simple_kms_helper.c

274

return pipe->funcs->prepare_fb(pipe, state);

drivers/gpu/drm/drm_simple_kms_helper.c

280

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

282

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

283

if (!pipe->funcs || !pipe->funcs->cleanup_fb)

drivers/gpu/drm/drm_simple_kms_helper.c

286

pipe->funcs->cleanup_fb(pipe, state);

drivers/gpu/drm/drm_simple_kms_helper.c

292

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

294

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

295

if (!pipe->funcs || !pipe->funcs->begin_fb_access)

drivers/gpu/drm/drm_simple_kms_helper.c

298

return pipe->funcs->begin_fb_access(pipe, new_plane_state);

drivers/gpu/drm/drm_simple_kms_helper.c

304

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

306

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

307

if (!pipe->funcs || !pipe->funcs->end_fb_access)

drivers/gpu/drm/drm_simple_kms_helper.c

310

pipe->funcs->end_fb_access(pipe, new_plane_state);

drivers/gpu/drm/drm_simple_kms_helper.c

331

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

333

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

334

if (!pipe->funcs || !pipe->funcs->reset_plane)

drivers/gpu/drm/drm_simple_kms_helper.c

337

return pipe->funcs->reset_plane(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

342

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

344

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

345

if (!pipe->funcs || !pipe->funcs->duplicate_plane_state)

drivers/gpu/drm/drm_simple_kms_helper.c

348

return pipe->funcs->duplicate_plane_state(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

354

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

356

pipe = container_of(plane, struct drm_simple_display_pipe, plane);

drivers/gpu/drm/drm_simple_kms_helper.c

357

if (!pipe->funcs || !pipe->funcs->destroy_plane_state)

drivers/gpu/drm/drm_simple_kms_helper.c

360

pipe->funcs->destroy_plane_state(pipe, state);

drivers/gpu/drm/drm_simple_kms_helper.c

387

int drm_simple_display_pipe_attach_bridge(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_simple_kms_helper.c

390

return drm_bridge_attach(&pipe->encoder, bridge, NULL, 0);

drivers/gpu/drm/drm_simple_kms_helper.c

419

struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/drm_simple_kms_helper.c

425

struct drm_encoder *encoder = &pipe->encoder;

drivers/gpu/drm/drm_simple_kms_helper.c

426

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/drm_simple_kms_helper.c

427

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/drm_simple_kms_helper.c

430

pipe->connector = connector;

drivers/gpu/drm/drm_simple_kms_helper.c

431

pipe->funcs = funcs;

drivers/gpu/drm/drm_simple_kms_helper.c

90

struct drm_simple_display_pipe *pipe;

drivers/gpu/drm/drm_simple_kms_helper.c

92

pipe = container_of(crtc, struct drm_simple_display_pipe, crtc);

drivers/gpu/drm/drm_simple_kms_helper.c

93

if (!pipe->funcs || !pipe->funcs->mode_valid)

drivers/gpu/drm/drm_simple_kms_helper.c

97

return pipe->funcs->mode_valid(pipe, mode);

drivers/gpu/drm/drm_vblank.c

1064

trace_drm_vblank_event_delivered(e->base.file_priv, e->pipe, seq);

drivers/gpu/drm/drm_vblank.c

1117

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1121

e->pipe = pipe;

drivers/gpu/drm/drm_vblank.c

1143

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1147

seq = drm_vblank_count_and_time(dev, pipe, &now);

drivers/gpu/drm/drm_vblank.c

1153

e->pipe = pipe;

drivers/gpu/drm/drm_vblank.c

1158

static int __enable_vblank(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

1161

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1173

static int drm_vblank_enable(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

1175

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1190

ret = __enable_vblank(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1192

pipe, ret);

drivers/gpu/drm/drm_vblank.c

1196

drm_update_vblank_count(dev, pipe, 0);

drivers/gpu/drm/drm_vblank.c

1211

int drm_vblank_get(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

1213

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1220

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs))

drivers/gpu/drm/drm_vblank.c

1226

ret = drm_vblank_enable(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1254

void drm_vblank_put(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

1256

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1259

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs))

drivers/gpu/drm/drm_vblank.c

1304

int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1309

ret = drm_vblank_get(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1311

pipe, ret))

drivers/gpu/drm/drm_vblank.c

1314

last = drm_vblank_count(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1317

last != drm_vblank_count(dev, pipe),

drivers/gpu/drm/drm_vblank.c

1320

drm_WARN(dev, ret == 0, "vblank wait timed out on crtc %i\n", pipe);

drivers/gpu/drm/drm_vblank.c

1322

drm_vblank_put(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1342

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1348

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs))

drivers/gpu/drm/drm_vblank.c

1359

pipe, vblank->enabled, vblank->inmodeset);

drivers/gpu/drm/drm_vblank.c

1364

drm_vblank_disable_and_save(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1379

seq = drm_vblank_count_and_time(dev, pipe, &now);

drivers/gpu/drm/drm_vblank.c

1382

if (e->pipe != pipe)

drivers/gpu/drm/drm_vblank.c

1388

drm_vblank_put(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1486

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1489

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs))

drivers/gpu/drm/drm_vblank.c

1494

pipe, vblank->enabled, vblank->inmodeset);

drivers/gpu/drm/drm_vblank.c

1504

drm_reset_vblank_timestamp(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1511

drm_WARN_ON(dev, drm_vblank_enable(dev, pipe));

drivers/gpu/drm/drm_vblank.c

1539

static void drm_vblank_restore(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

1547

u32 max_vblank_count = drm_max_vblank_count(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1549

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs))

drivers/gpu/drm/drm_vblank.c

1555

vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1562

cur_vblank = __get_vblank_counter(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1563

drm_get_last_vbltimestamp(dev, pipe, &t_vblank, false);

drivers/gpu/drm/drm_vblank.c

1564

} while (cur_vblank != __get_vblank_counter(dev, pipe) && --count > 0);

drivers/gpu/drm/drm_vblank.c

1596

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

1597

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1603

drm_vblank_restore(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1607

static int drm_queue_vblank_event(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/drm_vblank.c

1612

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1624

e->pipe = pipe;

drivers/gpu/drm/drm_vblank.c

1630

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1655

seq = drm_vblank_count_and_time(dev, pipe, &now);

drivers/gpu/drm/drm_vblank.c

1658

req_seq, seq, pipe);

drivers/gpu/drm/drm_vblank.c

166

drm_get_last_vbltimestamp(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/drm_vblank.c

1660

trace_drm_vblank_event_queued(file_priv, pipe, req_seq);

drivers/gpu/drm/drm_vblank.c

1664

drm_vblank_put(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1681

drm_vblank_put(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1712

static void drm_wait_vblank_reply(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/drm_vblank.c

1723

reply->sequence = drm_vblank_count_and_time(dev, pipe, &now);

drivers/gpu/drm/drm_vblank.c

1743

unsigned int flags, pipe, high_pipe;

drivers/gpu/drm/drm_vblank.c

1771

pipe = 0;

drivers/gpu/drm/drm_vblank.c

1778

pipe++;

drivers/gpu/drm/drm_vblank.c

1781

pipe = pipe_index;

drivers/gpu/drm/drm_vblank.c

1784

if (pipe >= dev->num_crtcs)

drivers/gpu/drm/drm_vblank.c

1787

vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

179

drm_vblank_crtc(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

1795

drm_wait_vblank_reply(dev, pipe, &vblwait->reply);

drivers/gpu/drm/drm_vblank.c

1799

ret = drm_vblank_get(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1803

pipe, ret);

drivers/gpu/drm/drm_vblank.c

1806

seq = drm_vblank_count(dev, pipe);

drivers/gpu/drm/drm_vblank.c

181

return &dev->vblank[pipe];

drivers/gpu/drm/drm_vblank.c

1833

return drm_queue_vblank_event(dev, pipe, req_seq, vblwait, file_priv);

drivers/gpu/drm/drm_vblank.c

1840

req_seq, pipe);

drivers/gpu/drm/drm_vblank.c

1842

drm_vblank_passed(drm_vblank_count(dev, pipe), req_seq) ||

drivers/gpu/drm/drm_vblank.c

1862

drm_wait_vblank_reply(dev, pipe, &vblwait->reply);

drivers/gpu/drm/drm_vblank.c

1865

pipe, vblwait->reply.sequence);

drivers/gpu/drm/drm_vblank.c

1868

pipe);

drivers/gpu/drm/drm_vblank.c

1872

drm_vblank_put(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1876

static void drm_handle_vblank_events(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

1878

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1886

seq = drm_vblank_count_and_time(dev, pipe, &now);

drivers/gpu/drm/drm_vblank.c

1889

if (e->pipe != pipe)

drivers/gpu/drm/drm_vblank.c

1898

drm_vblank_put(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1905

trace_drm_vblank_event(pipe, seq, now, high_prec);

drivers/gpu/drm/drm_vblank.c

191

static void store_vblank(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/drm_vblank.c

1918

bool drm_handle_vblank(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

1920

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1927

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs))

drivers/gpu/drm/drm_vblank.c

1945

drm_update_vblank_count(dev, pipe, true);

drivers/gpu/drm/drm_vblank.c

195

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

1960

drm_handle_vblank_events(dev, pipe);

drivers/gpu/drm/drm_vblank.c

2011

int pipe;

drivers/gpu/drm/drm_vblank.c

2027

pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

2038

pipe, ret);

drivers/gpu/drm/drm_vblank.c

2048

get_seq->sequence = drm_vblank_count_and_time(dev, pipe, &now);

drivers/gpu/drm/drm_vblank.c

2068

int pipe;

drivers/gpu/drm/drm_vblank.c

207

static u32 drm_max_vblank_count(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

209

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

2093

pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

2105

pipe, ret);

drivers/gpu/drm/drm_vblank.c

2109

seq = drm_vblank_count_and_time(dev, pipe, &now);

drivers/gpu/drm/drm_vblank.c

2118

e->pipe = pipe;

drivers/gpu/drm/drm_vblank.c

218

static u32 drm_vblank_no_hw_counter(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

220

drm_WARN_ON_ONCE(dev, drm_max_vblank_count(dev, pipe) != 0);

drivers/gpu/drm/drm_vblank.c

224

static u32 __get_vblank_counter(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

227

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

236

return drm_vblank_no_hw_counter(dev, pipe);

drivers/gpu/drm/drm_vblank.c

248

static void drm_reset_vblank_timestamp(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

262

cur_vblank = __get_vblank_counter(dev, pipe);

drivers/gpu/drm/drm_vblank.c

263

rc = drm_get_last_vbltimestamp(dev, pipe, &t_vblank, false);

drivers/gpu/drm/drm_vblank.c

264

} while (cur_vblank != __get_vblank_counter(dev, pipe) && --count > 0);

drivers/gpu/drm/drm_vblank.c

278

store_vblank(dev, pipe, 1, t_vblank, cur_vblank);

drivers/gpu/drm/drm_vblank.c

295

static void drm_update_vblank_count(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/drm_vblank.c

298

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

304

u32 max_vblank_count = drm_max_vblank_count(dev, pipe);

drivers/gpu/drm/drm_vblank.c

319

cur_vblank = __get_vblank_counter(dev, pipe);

drivers/gpu/drm/drm_vblank.c

320

rc = drm_get_last_vbltimestamp(dev, pipe, &t_vblank, in_vblank_irq);

drivers/gpu/drm/drm_vblank.c

321

} while (cur_vblank != __get_vblank_counter(dev, pipe) && --count > 0);

drivers/gpu/drm/drm_vblank.c

337

pipe, (long long)diff_ns, framedur_ns);

drivers/gpu/drm/drm_vblank.c

343

pipe);

drivers/gpu/drm/drm_vblank.c

361

" due to pre-modeset.\n", pipe, diff);

drivers/gpu/drm/drm_vblank.c

367

pipe, (unsigned long long)atomic64_read(&vblank->count),

drivers/gpu/drm/drm_vblank.c

384

store_vblank(dev, pipe, diff, t_vblank, cur_vblank);

drivers/gpu/drm/drm_vblank.c

387

u64 drm_vblank_count(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

389

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

392

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs))

drivers/gpu/drm/drm_vblank.c

423

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

433

drm_update_vblank_count(dev, pipe, false);

drivers/gpu/drm/drm_vblank.c

434

vblank = drm_vblank_count(dev, pipe);

drivers/gpu/drm/drm_vblank.c

442

static void __disable_vblank(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

445

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

461

void drm_vblank_disable_and_save(struct drm_device *dev, unsigned int pipe)

drivers/gpu/drm/drm_vblank.c

463

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

489

drm_update_vblank_count(dev, pipe, false);

drivers/gpu/drm/drm_vblank.c

490

__disable_vblank(dev, pipe);

drivers/gpu/drm/drm_vblank.c

502

unsigned int pipe = vblank->pipe;

drivers/gpu/drm/drm_vblank.c

507

drm_dbg_core(dev, "disabling vblank on crtc %u\n", pipe);

drivers/gpu/drm/drm_vblank.c

508

drm_vblank_disable_and_save(dev, pipe);

drivers/gpu/drm/drm_vblank.c

557

vblank->pipe = i;

drivers/gpu/drm/drm_vblank.c

630

unsigned int pipe = drm_crtc_index(crtc);

drivers/gpu/drm/drm_vblank.c

638

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs))

drivers/gpu/drm/drm_vblank.c

714

unsigned int pipe = crtc->index;

drivers/gpu/drm/drm_vblank.c

722

if (pipe >= dev->num_crtcs) {

drivers/gpu/drm/drm_vblank.c

723

drm_err(dev, "Invalid crtc %u\n", pipe);

drivers/gpu/drm/drm_vblank.c

746

pipe);

drivers/gpu/drm/drm_vblank.c

772

pipe);

drivers/gpu/drm/drm_vblank.c

788

pipe, duration_ns / 1000, *max_error / 1000, i);

drivers/gpu/drm/drm_vblank.c

814

pipe, hpos, vpos, &ts_etime, &ts_vblank_time,

drivers/gpu/drm/drm_vblank.c

907

drm_get_last_vbltimestamp(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/drm_vblank.c

910

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/drm_vblank.c

956

static u64 drm_vblank_count_and_time(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/drm_vblank.c

959

struct drm_vblank_crtc *vblank = drm_vblank_crtc(dev, pipe);

drivers/gpu/drm/drm_vblank.c

963

if (drm_WARN_ON(dev, pipe >= dev->num_crtcs)) {

drivers/gpu/drm/drm_vblank_work.c

132

ret = drm_vblank_get(dev, vblank->pipe);

drivers/gpu/drm/drm_vblank_work.c

143

cur_vbl = drm_vblank_count(dev, vblank->pipe);

drivers/gpu/drm/drm_vblank_work.c

148

vblank->pipe, count, cur_vbl);

drivers/gpu/drm/drm_vblank_work.c

151

drm_vblank_put(dev, vblank->pipe);

drivers/gpu/drm/drm_vblank_work.c

196

drm_vblank_put(vblank->dev, vblank->pipe);

drivers/gpu/drm/drm_vblank_work.c

284

vblank->pipe);

drivers/gpu/drm/drm_vblank_work.c

61

drm_vblank_put(vblank->dev, vblank->pipe);

drivers/gpu/drm/drm_vblank_work.c

83

drm_vblank_put(vblank->dev, vblank->pipe);

drivers/gpu/drm/etnaviv/etnaviv_buffer.c

25

struct etnaviv_cmdbuf *buffer, u8 pipe)

drivers/gpu/drm/etnaviv/etnaviv_buffer.c

47

VIVS_GL_PIPE_SELECT_PIPE(pipe));

drivers/gpu/drm/etnaviv/etnaviv_drv.c

274

if (args->pipe >= ETNA_MAX_PIPES)

drivers/gpu/drm/etnaviv/etnaviv_drv.c

277

gpu = priv->gpu[args->pipe];

drivers/gpu/drm/etnaviv/etnaviv_drv.c

370

if (args->pipe >= ETNA_MAX_PIPES)

drivers/gpu/drm/etnaviv/etnaviv_drv.c

373

gpu = priv->gpu[args->pipe];

drivers/gpu/drm/etnaviv/etnaviv_drv.c

421

if (args->pipe >= ETNA_MAX_PIPES)

drivers/gpu/drm/etnaviv/etnaviv_drv.c

424

gpu = priv->gpu[args->pipe];

drivers/gpu/drm/etnaviv/etnaviv_drv.c

449

if (args->pipe >= ETNA_MAX_PIPES)

drivers/gpu/drm/etnaviv/etnaviv_drv.c

452

gpu = priv->gpu[args->pipe];

drivers/gpu/drm/etnaviv/etnaviv_drv.c

466

if (args->pipe >= ETNA_MAX_PIPES)

drivers/gpu/drm/etnaviv/etnaviv_drv.c

469

gpu = priv->gpu[args->pipe];

drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c

429

if (args->pipe >= ETNA_MAX_PIPES)

drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c

432

gpu = priv->gpu[args->pipe];

drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c

536

&ctx->sched_entity[args->pipe],

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

49

static inline void pipe_select(struct etnaviv_gpu *gpu, u32 clock, unsigned pipe)

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

52

clock |= VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE(pipe);

drivers/gpu/drm/gma500/cdv_intel_crt.c

100

if (gma_crtc->pipe == 0)

drivers/gpu/drm/gma500/cdv_intel_crt.c

123

if (gma_crtc->pipe == 0)

drivers/gpu/drm/gma500/cdv_intel_display.c

218

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/cdv_intel_display.c

221

int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;

drivers/gpu/drm/gma500/cdv_intel_display.c

222

int ref_sfr = (pipe == 0) ? SB_REF_DPLLA : SB_REF_DPLLB;

drivers/gpu/drm/gma500/cdv_intel_display.c

235

cdv_sb_write(dev, SB_REF_SFR(pipe), ref_value);

drivers/gpu/drm/gma500/cdv_intel_display.c

258

if (pipe == 1 && !is_lvds && !(ddi_select & DP_MASK)) {

drivers/gpu/drm/gma500/cdv_intel_display.c

269

ret = cdv_sb_read(dev, SB_M(pipe), &m);

drivers/gpu/drm/gma500/cdv_intel_display.c

274

ret = cdv_sb_write(dev, SB_M(pipe), m);

drivers/gpu/drm/gma500/cdv_intel_display.c

278

ret = cdv_sb_read(dev, SB_N_VCO(pipe), &n_vco);

drivers/gpu/drm/gma500/cdv_intel_display.c

305

ret = cdv_sb_write(dev, SB_N_VCO(pipe), n_vco);

drivers/gpu/drm/gma500/cdv_intel_display.c

309

ret = cdv_sb_read(dev, SB_P(pipe), &p);

drivers/gpu/drm/gma500/cdv_intel_display.c

331

ret = cdv_sb_write(dev, SB_P(pipe), p);

drivers/gpu/drm/gma500/cdv_intel_display.c

340

lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe);

drivers/gpu/drm/gma500/cdv_intel_display.c

346

lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe);

drivers/gpu/drm/gma500/cdv_intel_display.c

352

lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe);

drivers/gpu/drm/gma500/cdv_intel_display.c

358

lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe);

drivers/gpu/drm/gma500/cdv_intel_display.c

457

static bool cdv_intel_pipe_enabled(struct drm_device *dev, int pipe)

drivers/gpu/drm/gma500/cdv_intel_display.c

463

crtc = dev_priv->pipe_to_crtc_mapping[pipe];

drivers/gpu/drm/gma500/cdv_intel_display.c

520

if (gma_crtc->pipe == 1 &&

drivers/gpu/drm/gma500/cdv_intel_display.c

581

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/cdv_intel_display.c

582

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/cdv_intel_display.c

643

if (pipe == 0)

drivers/gpu/drm/gma500/cdv_intel_display.c

671

REG_WRITE(PIPE_GMCH_DATA_M(pipe), 0);

drivers/gpu/drm/gma500/cdv_intel_display.c

672

REG_WRITE(PIPE_GMCH_DATA_N(pipe), 0);

drivers/gpu/drm/gma500/cdv_intel_display.c

673

REG_WRITE(PIPE_DP_LINK_M(pipe), 0);

drivers/gpu/drm/gma500/cdv_intel_display.c

674

REG_WRITE(PIPE_DP_LINK_N(pipe), 0);

drivers/gpu/drm/gma500/cdv_intel_display.c

715

if (pipe == 0)

drivers/gpu/drm/gma500/cdv_intel_display.c

762

if (cdv_intel_panel_fitter_pipe(dev) == pipe)

drivers/gpu/drm/gma500/cdv_intel_display.c

765

DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');

drivers/gpu/drm/gma500/cdv_intel_display.c

841

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/cdv_intel_display.c

842

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/cdv_intel_display.c

847

struct psb_pipe *p = &dev_priv->regs.pipe[pipe];

drivers/gpu/drm/gma500/cdv_intel_display.c

855

is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN);

drivers/gpu/drm/gma500/cdv_intel_display.c

864

is_lvds = (pipe == 1) &&

drivers/gpu/drm/gma500/cdv_intel_display.c

919

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/cdv_intel_display.c

921

struct psb_pipe *p = &dev_priv->regs.pipe[pipe];

drivers/gpu/drm/gma500/cdv_intel_display.c

922

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/cdv_intel_dp.c

1025

REG_WRITE(PIPE_GMCH_DATA_M(pipe),

drivers/gpu/drm/gma500/cdv_intel_dp.c

1028

REG_WRITE(PIPE_GMCH_DATA_N(pipe), m_n.gmch_n);

drivers/gpu/drm/gma500/cdv_intel_dp.c

1029

REG_WRITE(PIPE_DP_LINK_M(pipe), m_n.link_m);

drivers/gpu/drm/gma500/cdv_intel_dp.c

1030

REG_WRITE(PIPE_DP_LINK_N(pipe), m_n.link_n);

drivers/gpu/drm/gma500/cdv_intel_dp.c

1082

if (gma_crtc->pipe == 1)

drivers/gpu/drm/gma500/cdv_intel_dp.c

1097

pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;

drivers/gpu/drm/gma500/cdv_intel_dp.c

992

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

80

if (gma_crtc->pipe == 1)

drivers/gpu/drm/gma500/cdv_intel_lvds.c

289

pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;

drivers/gpu/drm/gma500/cdv_intel_lvds.c

491

int pipe;

drivers/gpu/drm/gma500/cdv_intel_lvds.c

614

pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;

drivers/gpu/drm/gma500/cdv_intel_lvds.c

615

crtc = psb_intel_get_crtc_from_pipe(dev, pipe);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

639

if (pipe == 1)

drivers/gpu/drm/gma500/gma_display.c

149

const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];

drivers/gpu/drm/gma500/gma_display.c

173

dev_priv->regs.pipe[0].palette[i] =

drivers/gpu/drm/gma500/gma_display.c

202

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/gma_display.c

203

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/gma_display.c

336

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/gma_display.c

337

uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;

drivers/gpu/drm/gma500/gma_display.c

338

uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;

drivers/gpu/drm/gma500/gma_display.c

419

temp |= (pipe << 28);

drivers/gpu/drm/gma500/gma_display.c

448

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/gma_display.c

467

REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);

drivers/gpu/drm/gma500/gma_display.c

468

REG_WRITE((pipe == 0) ? CURABASE : CURBBASE, addr);

drivers/gpu/drm/gma500/gma_display.c

581

const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];

drivers/gpu/drm/gma500/gma_display.c

624

const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];

drivers/gpu/drm/gma500/gma_display.c

66

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/gma_display.c

67

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/oaktrail_crtc.c

223

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/oaktrail_crtc.c

224

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/oaktrail_crtc.c

369

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/oaktrail_crtc.c

370

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/oaktrail_crtc.c

427

if (oaktrail_panel_fitter_pipe(dev) == pipe)

drivers/gpu/drm/gma500/oaktrail_crtc.c

495

if (pipe == 0)

drivers/gpu/drm/gma500/oaktrail_crtc.c

600

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/oaktrail_crtc.c

601

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/oaktrail_device.c

125

struct psb_pipe *p = &regs->pipe[0];

drivers/gpu/drm/gma500/oaktrail_device.c

239

struct psb_pipe *p = &regs->pipe[0];

drivers/gpu/drm/gma500/oaktrail_hdmi.c

273

int pipe = 1;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

274

int htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

275

int hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

276

int hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

277

int vtot_reg = (pipe == 0) ? VTOTAL_A : VTOTAL_B;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

278

int vblank_reg = (pipe == 0) ? VBLANK_A : VBLANK_B;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

279

int vsync_reg = (pipe == 0) ? VSYNC_A : VSYNC_B;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

280

int dspsize_reg = (pipe == 0) ? DSPASIZE : DSPBSIZE;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

281

int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

282

int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

283

int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

744

struct psb_pipe *pipeb = &dev_priv->regs.pipe[1];

drivers/gpu/drm/gma500/oaktrail_hdmi.c

797

struct psb_pipe *pipeb = &dev_priv->regs.pipe[1];

drivers/gpu/drm/gma500/psb_drv.h

360

struct psb_pipe pipe[3];

drivers/gpu/drm/gma500/psb_intel_display.c

104

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/psb_intel_display.c

105

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/psb_intel_display.c

203

if (pipe == 0)

drivers/gpu/drm/gma500/psb_intel_display.c

214

if (psb_intel_panel_fitter_pipe(dev) == pipe)

drivers/gpu/drm/gma500/psb_intel_display.c

234

if (pipe == 1)

drivers/gpu/drm/gma500/psb_intel_display.c

309

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/psb_intel_display.c

310

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/psb_intel_display.c

315

struct psb_pipe *p = &dev_priv->regs.pipe[pipe];

drivers/gpu/drm/gma500/psb_intel_display.c

323

is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN);

drivers/gpu/drm/gma500/psb_intel_display.c

333

is_lvds = (pipe == 1) && (dev_priv->regs.psb.saveLVDS &

drivers/gpu/drm/gma500/psb_intel_display.c

384

int pipe = gma_crtc->pipe;

drivers/gpu/drm/gma500/psb_intel_display.c

391

struct psb_pipe *p = &dev_priv->regs.pipe[pipe];

drivers/gpu/drm/gma500/psb_intel_display.c

392

const struct psb_offset *map = &dev_priv->regmap[pipe];

drivers/gpu/drm/gma500/psb_intel_display.c

470

REG_WRITE(control[gma_crtc->pipe], 0);

drivers/gpu/drm/gma500/psb_intel_display.c

471

REG_WRITE(base[gma_crtc->pipe], 0);

drivers/gpu/drm/gma500/psb_intel_display.c

474

void psb_intel_crtc_init(struct drm_device *dev, int pipe,

drivers/gpu/drm/gma500/psb_intel_display.c

503

gma_crtc->pipe = pipe;

drivers/gpu/drm/gma500/psb_intel_display.c

504

gma_crtc->plane = pipe;

drivers/gpu/drm/gma500/psb_intel_display.c

517

BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||

drivers/gpu/drm/gma500/psb_intel_display.c

520

dev_priv->pipe_to_crtc_mapping[gma_crtc->pipe] = &gma_crtc->base;

drivers/gpu/drm/gma500/psb_intel_display.c

529

struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev, int pipe)

drivers/gpu/drm/gma500/psb_intel_display.c

536

if (gma_crtc->pipe == pipe)

drivers/gpu/drm/gma500/psb_intel_drv.h

139

int pipe;

drivers/gpu/drm/gma500/psb_intel_drv.h

186

extern void psb_intel_crtc_init(struct drm_device *dev, int pipe,

drivers/gpu/drm/gma500/psb_intel_drv.h

209

int pipe);

drivers/gpu/drm/gma500/psb_intel_lvds.c

378

if (!IS_MRST(dev) && gma_crtc->pipe == 0) {

drivers/gpu/drm/gma500/psb_intel_lvds.c

382

if (IS_MRST(dev) && gma_crtc->pipe != 0) {

drivers/gpu/drm/gma500/psb_intel_lvds.c

639

int pipe;

drivers/gpu/drm/gma500/psb_intel_lvds.c

762

pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;

drivers/gpu/drm/gma500/psb_intel_lvds.c

763

crtc = psb_intel_get_crtc_from_pipe(dev, pipe);

drivers/gpu/drm/gma500/psb_intel_reg.h

1241

#define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a)))

drivers/gpu/drm/gma500/psb_intel_reg.h

1282

#define SB_M(pipe) _PIPE(pipe, _SB_M_A, _SB_M_B)

drivers/gpu/drm/gma500/psb_intel_reg.h

1288

#define SB_N_VCO(pipe) _PIPE(pipe, _SB_N_VCO_A, _SB_N_VCO_B)

drivers/gpu/drm/gma500/psb_intel_reg.h

1307

#define SB_REF_SFR(pipe) _PIPE(pipe, _SB_REF_A, _SB_REF_B)

drivers/gpu/drm/gma500/psb_intel_reg.h

1311

#define SB_P(pipe) _PIPE(pipe, _SB_P_A, _SB_P_B)

drivers/gpu/drm/gma500/psb_intel_reg.h

1481

#define PIPE_GMCH_DATA_M(pipe) _PIPE(pipe, _PIPEA_GMCH_DATA_M, _PIPEB_GMCH_DATA_M)

drivers/gpu/drm/gma500/psb_intel_reg.h

1482

#define PIPE_GMCH_DATA_N(pipe) _PIPE(pipe, _PIPEA_GMCH_DATA_N, _PIPEB_GMCH_DATA_N)

drivers/gpu/drm/gma500/psb_intel_reg.h

1483

#define PIPE_DP_LINK_M(pipe) _PIPE(pipe, _PIPEA_DP_LINK_M, _PIPEB_DP_LINK_M)

drivers/gpu/drm/gma500/psb_intel_reg.h

1484

#define PIPE_DP_LINK_N(pipe) _PIPE(pipe, _PIPEA_DP_LINK_N, _PIPEB_DP_LINK_N)

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1082

if (gma_crtc->pipe == 1)

drivers/gpu/drm/gma500/psb_irq.c

113

__func__, pipe, PSB_RVDC32(pipe_stat_reg));

drivers/gpu/drm/gma500/psb_irq.c

116

struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe);

drivers/gpu/drm/gma500/psb_irq.c

120

drm_handle_vblank(dev, pipe);

drivers/gpu/drm/gma500/psb_irq.c

25

static inline u32 gma_pipestat(int pipe)

drivers/gpu/drm/gma500/psb_irq.c

27

if (pipe == 0)

drivers/gpu/drm/gma500/psb_irq.c

29

if (pipe == 1)

drivers/gpu/drm/gma500/psb_irq.c

31

if (pipe == 2)

drivers/gpu/drm/gma500/psb_irq.c

36

static inline u32 gma_pipeconf(int pipe)

drivers/gpu/drm/gma500/psb_irq.c

38

if (pipe == 0)

drivers/gpu/drm/gma500/psb_irq.c

380

unsigned int pipe = crtc->index;

drivers/gpu/drm/gma500/psb_irq.c

384

uint32_t pipeconf_reg = gma_pipeconf(pipe);

drivers/gpu/drm/gma500/psb_irq.c

396

if (pipe == 0)

drivers/gpu/drm/gma500/psb_irq.c

398

else if (pipe == 1)

drivers/gpu/drm/gma500/psb_irq.c

40

if (pipe == 1)

drivers/gpu/drm/gma500/psb_irq.c

403

gma_enable_pipestat(dev_priv, pipe, PIPE_VBLANK_INTERRUPT_ENABLE);

drivers/gpu/drm/gma500/psb_irq.c

413

unsigned int pipe = crtc->index;

drivers/gpu/drm/gma500/psb_irq.c

419

if (pipe == 0)

drivers/gpu/drm/gma500/psb_irq.c

42

if (pipe == 2)

drivers/gpu/drm/gma500/psb_irq.c

421

else if (pipe == 1)

drivers/gpu/drm/gma500/psb_irq.c

426

gma_disable_pipestat(dev_priv, pipe, PIPE_VBLANK_INTERRUPT_ENABLE);

drivers/gpu/drm/gma500/psb_irq.c

437

unsigned int pipe = crtc->index;

drivers/gpu/drm/gma500/psb_irq.c

444

switch (pipe) {

drivers/gpu/drm/gma500/psb_irq.c

469

pipe);

drivers/gpu/drm/gma500/psb_irq.c

47

void gma_enable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask)

drivers/gpu/drm/gma500/psb_irq.c

49

if ((dev_priv->pipestat[pipe] & mask) != mask) {

drivers/gpu/drm/gma500/psb_irq.c

50

u32 reg = gma_pipestat(pipe);

drivers/gpu/drm/gma500/psb_irq.c

51

dev_priv->pipestat[pipe] |= mask;

drivers/gpu/drm/gma500/psb_irq.c

63

void gma_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask)

drivers/gpu/drm/gma500/psb_irq.c

65

if ((dev_priv->pipestat[pipe] & mask) != 0) {

drivers/gpu/drm/gma500/psb_irq.c

66

u32 reg = gma_pipestat(pipe);

drivers/gpu/drm/gma500/psb_irq.c

67

dev_priv->pipestat[pipe] &= ~mask;

drivers/gpu/drm/gma500/psb_irq.c

81

static void gma_pipe_event_handler(struct drm_device *dev, int pipe)

drivers/gpu/drm/gma500/psb_irq.c

86

uint32_t pipe_stat_reg = gma_pipestat(pipe);

drivers/gpu/drm/gma500/psb_irq.c

87

uint32_t pipe_enable = dev_priv->pipestat[pipe];

drivers/gpu/drm/gma500/psb_irq.c

88

uint32_t pipe_status = dev_priv->pipestat[pipe] >> 16;

drivers/gpu/drm/gma500/psb_irq.h

26

void gma_enable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask);

drivers/gpu/drm/gma500/psb_irq.h

27

void gma_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask);

drivers/gpu/drm/gud/gud_drv.c

62

unsigned int pipe;

drivers/gpu/drm/gud/gud_drv.c

68

pipe = usb_rcvctrlpipe(usb, 0);

drivers/gpu/drm/gud/gud_drv.c

71

pipe = usb_sndctrlpipe(usb, 0);

drivers/gpu/drm/gud/gud_drv.c

75

return usb_control_msg(usb, pipe, request, requesttype, value,

drivers/gpu/drm/i915/display/g4x_dp.c

143

intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

147

intel_de_rmw(display, TRANS_DP_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/g4x_dp.c

165

intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

167

intel_dp->DP |= DP_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

226

intel_wait_for_vblank_if_active(display, !crtc->pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

254

enum port port, enum pipe *pipe)

drivers/gpu/drm/i915/display/g4x_dp.c

256

enum pipe p;

drivers/gpu/drm/i915/display/g4x_dp.c

262

*pipe = p;

drivers/gpu/drm/i915/display/g4x_dp.c

271

*pipe = PIPE_A;

drivers/gpu/drm/i915/display/g4x_dp.c

278

enum pipe *pipe)

drivers/gpu/drm/i915/display/g4x_dp.c

289

*pipe = REG_FIELD_GET(DP_PIPE_SEL_MASK_IVB, val);

drivers/gpu/drm/i915/display/g4x_dp.c

291

ret &= cpt_dp_port_selected(display, port, pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

293

*pipe = REG_FIELD_GET(DP_PIPE_SEL_MASK_CHV, val);

drivers/gpu/drm/i915/display/g4x_dp.c

295

*pipe = REG_FIELD_GET(DP_PIPE_SEL_MASK, val);

drivers/gpu/drm/i915/display/g4x_dp.c

301

enum pipe *pipe)

drivers/gpu/drm/i915/display/g4x_dp.c

314

encoder->port, pipe);

drivers/gpu/drm/i915/display/g4x_dp.c

356

TRANS_DP_CTL(crtc->pipe));

drivers/gpu/drm/i915/display/g4x_dp.c

436

if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B && port != PORT_A) {

drivers/gpu/drm/i915/display/g4x_dp.h

13

enum pipe;

drivers/gpu/drm/i915/display/g4x_dp.h

24

enum pipe *pipe);

drivers/gpu/drm/i915/display/g4x_dp.h

34

enum pipe *pipe)

drivers/gpu/drm/i915/display/g4x_hdmi.c

328

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/g4x_hdmi.c

346

intel_de_rmw(display, TRANS_CHICKEN1(pipe),

drivers/gpu/drm/i915/display/g4x_hdmi.c

363

intel_de_rmw(display, TRANS_CHICKEN1(pipe),

drivers/gpu/drm/i915/display/g4x_hdmi.c

398

if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B) {

drivers/gpu/drm/i915/display/g4x_hdmi.c

56

hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_hdmi.c

58

hdmi_val |= SDVO_PIPE_SEL_CHV(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_hdmi.c

60

hdmi_val |= SDVO_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/g4x_hdmi.c

67

enum pipe *pipe)

drivers/gpu/drm/i915/display/g4x_hdmi.c

79

ret = intel_sdvo_port_enabled(display, intel_hdmi->hdmi_reg, pipe);

drivers/gpu/drm/i915/display/hsw_ips.c

189

return HAS_IPS(display) && crtc->pipe == PIPE_A;

drivers/gpu/drm/i915/display/i9xx_plane.c

1081

"primary %c", pipe_name(pipe));

drivers/gpu/drm/i915/display/i9xx_plane.c

1096

if (display->platform.cherryview && pipe == PIPE_B) {

drivers/gpu/drm/i915/display/i9xx_plane.c

1165

enum pipe pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

1172

if (!plane->get_hw_state(plane, &pipe))

drivers/gpu/drm/i915/display/i9xx_plane.c

1175

drm_WARN_ON(display->drm, pipe != crtc->pipe);

drivers/gpu/drm/i915/display/i9xx_plane.c

1198

pipe == PIPE_B && val & DISP_MIRROR)

drivers/gpu/drm/i915/display/i9xx_plane.c

1226

val = intel_de_read(display, PIPESRC(display, pipe));

drivers/gpu/drm/i915/display/i9xx_plane.c

387

dspcntr |= DISP_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/i9xx_plane.c

635

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

638

bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE);

drivers/gpu/drm/i915/display/i9xx_plane.c

646

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

649

bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE);

drivers/gpu/drm/i915/display/i9xx_plane.c

697

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

700

i915_enable_pipestat(display, pipe, PLANE_FLIP_DONE_INT_STATUS_VLV);

drivers/gpu/drm/i915/display/i9xx_plane.c

708

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

711

i915_disable_pipestat(display, pipe, PLANE_FLIP_DONE_INT_STATUS_VLV);

drivers/gpu/drm/i915/display/i9xx_plane.c

721

enum pipe *pipe)

drivers/gpu/drm/i915/display/i9xx_plane.c

735

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/i9xx_plane.c

745

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

747

*pipe = REG_FIELD_GET(DISP_PIPE_SEL_MASK, val);

drivers/gpu/drm/i915/display/i9xx_plane.c

925

intel_primary_plane_create(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/i9xx_plane.c

939

plane->pipe = pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

946

plane->i9xx_plane = (enum i9xx_plane_id) !pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

948

plane->i9xx_plane = (enum i9xx_plane_id) pipe;

drivers/gpu/drm/i915/display/i9xx_plane.c

950

plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);

drivers/gpu/drm/i915/display/i9xx_plane.h

11

enum pipe;

drivers/gpu/drm/i915/display/i9xx_plane.h

31

intel_primary_plane_create(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/i9xx_plane.h

49

intel_primary_plane_create(struct intel_display *display, int pipe)

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

35

#define DISP_PIPE_SEL(pipe) REG_FIELD_PREP(DISP_PIPE_SEL_MASK, (pipe))

drivers/gpu/drm/i915/display/i9xx_wm.c

1420

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

1422

wm->pipe[pipe] = wm_state->wm;

drivers/gpu/drm/i915/display/i9xx_wm.c

1761

wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;

drivers/gpu/drm/i915/display/i9xx_wm.c

1897

switch (crtc->pipe) {

drivers/gpu/drm/i915/display/i9xx_wm.c

2058

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

2060

wm->pipe[pipe] = wm_state->wm[wm->level];

drivers/gpu/drm/i915/display/i9xx_wm.c

2064

wm->ddl[pipe].plane[PLANE_PRIMARY] = DDL_PRECISION_HIGH | 2;

drivers/gpu/drm/i915/display/i9xx_wm.c

2065

wm->ddl[pipe].plane[PLANE_SPRITE0] = DDL_PRECISION_HIGH | 2;

drivers/gpu/drm/i915/display/i9xx_wm.c

2066

wm->ddl[pipe].plane[PLANE_SPRITE1] = DDL_PRECISION_HIGH | 2;

drivers/gpu/drm/i915/display/i9xx_wm.c

2067

wm->ddl[pipe].plane[PLANE_CURSOR] = DDL_PRECISION_HIGH | 2;

drivers/gpu/drm/i915/display/i9xx_wm.c

2219

return intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/i9xx_wm.c

289

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

293

switch (pipe) {

drivers/gpu/drm/i915/display/i9xx_wm.c

313

MISSING_CASE(pipe);

drivers/gpu/drm/i915/display/i9xx_wm.c

3225

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3232

results->wm_pipe[pipe] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3270

#define WM_DIRTY_PIPE(pipe) (1 << (pipe))

drivers/gpu/drm/i915/display/i9xx_wm.c

3281

enum pipe pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3284

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3285

if (old->wm_pipe[pipe] != new->wm_pipe[pipe]) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3286

dirty |= WM_DIRTY_PIPE(pipe);

drivers/gpu/drm/i915/display/i9xx_wm.c

3501

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3503

hw->wm_pipe[pipe] = intel_de_read(display, WM0_PIPE_ILK(pipe));

drivers/gpu/drm/i915/display/i9xx_wm.c

3510

u32 tmp = hw->wm_pipe[pipe];

drivers/gpu/drm/i915/display/i9xx_wm.c

3671

wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3672

wm->pipe[PIPE_B].plane[PLANE_PRIMARY] = _FW_WM(tmp, PLANEB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3673

wm->pipe[PIPE_A].plane[PLANE_PRIMARY] = _FW_WM(tmp, PLANEA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3679

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3680

wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3681

wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3693

enum pipe pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3696

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/i9xx_wm.c

3697

tmp = intel_de_read(display, VLV_DDL(pipe));

drivers/gpu/drm/i915/display/i9xx_wm.c

3699

wm->ddl[pipe].plane[PLANE_PRIMARY] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3701

wm->ddl[pipe].plane[PLANE_CURSOR] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3703

wm->ddl[pipe].plane[PLANE_SPRITE0] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3705

wm->ddl[pipe].plane[PLANE_SPRITE1] =

drivers/gpu/drm/i915/display/i9xx_wm.c

3711

wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3712

wm->pipe[PIPE_B].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3713

wm->pipe[PIPE_A].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3716

wm->pipe[PIPE_A].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEB);

drivers/gpu/drm/i915/display/i9xx_wm.c

3717

wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3718

wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEA);

drivers/gpu/drm/i915/display/i9xx_wm.c

3725

wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED);

drivers/gpu/drm/i915/display/i9xx_wm.c

3726

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);

drivers/gpu/drm/i915/display/i9xx_wm.c

3729

wm->pipe[PIPE_C].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEF);

drivers/gpu/drm/i915/display/i9xx_wm.c

3730

wm->pipe[PIPE_C].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEE);

drivers/gpu/drm/i915/display/i9xx_wm.c

3733

wm->pipe[PIPE_C].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEC);

drivers/gpu/drm/i915/display/i9xx_wm.c

3734

wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC);

drivers/gpu/drm/i915/display/i9xx_wm.c

3738

wm->pipe[PIPE_C].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEF_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3739

wm->pipe[PIPE_C].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEE_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3740

wm->pipe[PIPE_C].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEC_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3741

wm->pipe[PIPE_B].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITED_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3742

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3743

wm->pipe[PIPE_B].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEB_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3744

wm->pipe[PIPE_A].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEB_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3745

wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3746

wm->pipe[PIPE_A].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEA_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3749

wm->pipe[PIPE_B].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITED);

drivers/gpu/drm/i915/display/i9xx_wm.c

3750

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);

drivers/gpu/drm/i915/display/i9xx_wm.c

3754

wm->pipe[PIPE_B].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITED_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3755

wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3756

wm->pipe[PIPE_B].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEB_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3757

wm->pipe[PIPE_A].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEB_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3758

wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3759

wm->pipe[PIPE_A].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEA_HI) << 8;

drivers/gpu/drm/i915/display/i9xx_wm.c

3780

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3793

wm->pipe[pipe].plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

3842

pipe_name(pipe),

drivers/gpu/drm/i915/display/i9xx_wm.c

3843

wm->pipe[pipe].plane[PLANE_PRIMARY],

drivers/gpu/drm/i915/display/i9xx_wm.c

3844

wm->pipe[pipe].plane[PLANE_CURSOR],

drivers/gpu/drm/i915/display/i9xx_wm.c

3845

wm->pipe[pipe].plane[PLANE_SPRITE0]);

drivers/gpu/drm/i915/display/i9xx_wm.c

3868

intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/i9xx_wm.c

3963

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

3981

wm->pipe[pipe].plane[plane_id];

drivers/gpu/drm/i915/display/i9xx_wm.c

3999

pipe_name(pipe),

drivers/gpu/drm/i915/display/i9xx_wm.c

4000

wm->pipe[pipe].plane[PLANE_PRIMARY],

drivers/gpu/drm/i915/display/i9xx_wm.c

4001

wm->pipe[pipe].plane[PLANE_CURSOR],

drivers/gpu/drm/i915/display/i9xx_wm.c

4002

wm->pipe[pipe].plane[PLANE_SPRITE0],

drivers/gpu/drm/i915/display/i9xx_wm.c

4003

wm->pipe[pipe].plane[PLANE_SPRITE1]);

drivers/gpu/drm/i915/display/i9xx_wm.c

4020

intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/i9xx_wm.c

780

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/i9xx_wm.c

809

enum pipe pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

811

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/i9xx_wm.c

812

trace_g4x_wm(intel_crtc_for_pipe(display, pipe), wm);

drivers/gpu/drm/i915/display/i9xx_wm.c

816

FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

817

FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

818

FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA));

drivers/gpu/drm/i915/display/i9xx_wm.c

823

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

824

FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |

drivers/gpu/drm/i915/display/i9xx_wm.c

825

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));

drivers/gpu/drm/i915/display/i9xx_wm.c

841

enum pipe pipe;

drivers/gpu/drm/i915/display/i9xx_wm.c

843

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/i9xx_wm.c

844

trace_vlv_wm(intel_crtc_for_pipe(display, pipe), wm);

drivers/gpu/drm/i915/display/i9xx_wm.c

846

intel_de_write(display, VLV_DDL(pipe),

drivers/gpu/drm/i915/display/i9xx_wm.c

847

(wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) |

drivers/gpu/drm/i915/display/i9xx_wm.c

848

(wm->ddl[pipe].plane[PLANE_SPRITE1] << DDL_SPRITE_SHIFT(1)) |

drivers/gpu/drm/i915/display/i9xx_wm.c

849

(wm->ddl[pipe].plane[PLANE_SPRITE0] << DDL_SPRITE_SHIFT(0)) |

drivers/gpu/drm/i915/display/i9xx_wm.c

850

(wm->ddl[pipe].plane[PLANE_PRIMARY] << DDL_PLANE_SHIFT));

drivers/gpu/drm/i915/display/i9xx_wm.c

866

FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

867

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_PRIMARY], PLANEB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

868

FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_PRIMARY], PLANEA));

drivers/gpu/drm/i915/display/i9xx_wm.c

870

FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE1], SPRITEB) |

drivers/gpu/drm/i915/display/i9xx_wm.c

871

FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |

drivers/gpu/drm/i915/display/i9xx_wm.c

872

FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));

drivers/gpu/drm/i915/display/i9xx_wm.c

878

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |

drivers/gpu/drm/i915/display/i9xx_wm.c

879

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));

drivers/gpu/drm/i915/display/i9xx_wm.c

881

FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) |

drivers/gpu/drm/i915/display/i9xx_wm.c

882

FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE));

drivers/gpu/drm/i915/display/i9xx_wm.c

884

FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) |

drivers/gpu/drm/i915/display/i9xx_wm.c

885

FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));

drivers/gpu/drm/i915/display/i9xx_wm.c

888

FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

889

FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

890

FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

891

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

892

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

893

FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

894

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

895

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

896

FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI));

drivers/gpu/drm/i915/display/i9xx_wm.c

899

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE1], SPRITED) |

drivers/gpu/drm/i915/display/i9xx_wm.c

900

FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));

drivers/gpu/drm/i915/display/i9xx_wm.c

903

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE1] >> 8, SPRITED_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

904

FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

905

FW_WM(wm->pipe[PIPE_B].plane[PLANE_PRIMARY] >> 8, PLANEB_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

906

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE1] >> 8, SPRITEB_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

907

FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |

drivers/gpu/drm/i915/display/i9xx_wm.c

908

FW_WM(wm->pipe[PIPE_A].plane[PLANE_PRIMARY] >> 8, PLANEA_HI));

drivers/gpu/drm/i915/display/i9xx_wm_regs.h

175

#define VLV_DDL(pipe) _MMIO(VLV_DISPLAY_BASE + 0x70050 + 4 * (pipe))

drivers/gpu/drm/i915/display/i9xx_wm_regs.h

220

#define WM0_PIPE_ILK(pipe) _MMIO_BASE_PIPE3(0, (pipe), _WM0_PIPEA_ILK, \

drivers/gpu/drm/i915/display/icl_dsi.c

1246

enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/icl_dsi.c

1250

if (DISPLAY_VER(display) == 11 && pipe == PIPE_B)

drivers/gpu/drm/i915/display/icl_dsi.c

1285

icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, true);

drivers/gpu/drm/i915/display/icl_dsi.c

1458

icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, false);

drivers/gpu/drm/i915/display/icl_dsi.c

1594

enum pipe pipe;

drivers/gpu/drm/i915/display/icl_dsi.c

1600

pipe = intel_crtc->pipe;

drivers/gpu/drm/i915/display/icl_dsi.c

1603

if (DISPLAY_VER(display) == 11 && pipe == PIPE_B &&

drivers/gpu/drm/i915/display/icl_dsi.c

1720

enum pipe *pipe)

drivers/gpu/drm/i915/display/icl_dsi.c

1741

*pipe = PIPE_A;

drivers/gpu/drm/i915/display/icl_dsi.c

1744

*pipe = PIPE_B;

drivers/gpu/drm/i915/display/icl_dsi.c

1747

*pipe = PIPE_C;

drivers/gpu/drm/i915/display/icl_dsi.c

1750

*pipe = PIPE_D;

drivers/gpu/drm/i915/display/icl_dsi.c

307

dss_ctl1_reg = ICL_PIPE_DSS_CTL1(crtc->pipe);

drivers/gpu/drm/i915/display/icl_dsi.c

308

dss_ctl2_reg = ICL_PIPE_DSS_CTL2(crtc->pipe);

drivers/gpu/drm/i915/display/icl_dsi.c

706

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/icl_dsi.c

829

switch (pipe) {

drivers/gpu/drm/i915/display/icl_dsi.c

831

MISSING_CASE(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

604

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_audio.c

608

regs->hdmiw_hdmiedid = VLV_HDMIW_HDMIEDID(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

609

regs->aud_config = VLV_AUD_CFG(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

610

regs->aud_cntl_st = VLV_AUD_CNTL_ST(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

613

regs->hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

614

regs->aud_config = CPT_AUD_CFG(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

615

regs->aud_cntl_st = CPT_AUD_CNTL_ST(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

618

regs->hdmiw_hdmiedid = IBX_HDMIW_HDMIEDID(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

619

regs->aud_config = IBX_AUD_CFG(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

620

regs->aud_cntl_st = IBX_AUD_CNTL_ST(pipe);

drivers/gpu/drm/i915/display/intel_audio.c

632

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_audio.c

638

ibx_audio_regs_init(display, pipe, &regs);

drivers/gpu/drm/i915/display/intel_audio.c

668

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_audio.c

676

ibx_audio_regs_init(display, pipe, &regs);

drivers/gpu/drm/i915/display/intel_audio_regs.h

137

#define HBLANK_EARLY_ENABLE_ICL(pipe) (0x1 << (20 - (pipe)))

drivers/gpu/drm/i915/display/intel_audio_regs.h

138

#define HBLANK_EARLY_ENABLE_TGL(pipe) (0x1 << (24 + (pipe)))

drivers/gpu/drm/i915/display/intel_audio_regs.h

139

#define HBLANK_START_COUNT_MASK(pipe) (0x7 << (3 + ((pipe) * 6)))

drivers/gpu/drm/i915/display/intel_audio_regs.h

140

#define HBLANK_START_COUNT(pipe, val) (((val) & 0x7) << (3 + ((pipe)) * 6))

drivers/gpu/drm/i915/display/intel_audio_regs.h

141

#define NUMBER_SAMPLES_PER_LINE_MASK(pipe) (0x3 << ((pipe) * 6))

drivers/gpu/drm/i915/display/intel_audio_regs.h

142

#define NUMBER_SAMPLES_PER_LINE(pipe, val) (((val) & 0x3) << ((pipe) * 6))

drivers/gpu/drm/i915/display/intel_audio_regs.h

20

#define IBX_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _IBX_HDMIW_HDMIEDID_A, \

drivers/gpu/drm/i915/display/intel_audio_regs.h

24

#define IBX_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _IBX_AUD_CNTL_ST_A, \

drivers/gpu/drm/i915/display/intel_audio_regs.h

35

#define CPT_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _CPT_HDMIW_HDMIEDID_A, _CPT_HDMIW_HDMIEDID_B)

drivers/gpu/drm/i915/display/intel_audio_regs.h

38

#define CPT_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _CPT_AUD_CNTL_ST_A, _CPT_AUD_CNTL_ST_B)

drivers/gpu/drm/i915/display/intel_audio_regs.h

43

#define VLV_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _VLV_HDMIW_HDMIEDID_A, _VLV_HDMIW_HDMIEDID_B)

drivers/gpu/drm/i915/display/intel_audio_regs.h

46

#define VLV_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _VLV_AUD_CNTL_ST_A, _VLV_AUD_CNTL_ST_B)

drivers/gpu/drm/i915/display/intel_audio_regs.h

51

#define IBX_AUD_CFG(pipe) _MMIO_PIPE(pipe, _IBX_AUD_CONFIG_A, _IBX_AUD_CONFIG_B)

drivers/gpu/drm/i915/display/intel_audio_regs.h

54

#define CPT_AUD_CFG(pipe) _MMIO_PIPE(pipe, _CPT_AUD_CONFIG_A, _CPT_AUD_CONFIG_B)

drivers/gpu/drm/i915/display/intel_audio_regs.h

57

#define VLV_AUD_CFG(pipe) _MMIO_PIPE(pipe, _VLV_AUD_CONFIG_A, _VLV_AUD_CONFIG_B)

drivers/gpu/drm/i915/display/intel_backlight.c

1233

static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

1290

static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

1321

static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

1363

static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

1396

static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_backlight.c

1402

if (drm_WARN_ON(display->drm, pipe != PIPE_A && pipe != PIPE_B))

drivers/gpu/drm/i915/display/intel_backlight.c

1405

ctl2 = intel_de_read(display, VLV_BLC_PWM_CTL2(pipe));

drivers/gpu/drm/i915/display/intel_backlight.c

1408

ctl = intel_de_read(display, VLV_BLC_PWM_CTL(pipe));

drivers/gpu/drm/i915/display/intel_backlight.c

1423

connector->base.base.id, connector->base.name, pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_backlight.c

1429

bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

1497

cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

150

static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

1542

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_backlight.c

157

static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

1607

static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_backlight.c

1612

panel->backlight.pwm_funcs->get(connector, pipe));

drivers/gpu/drm/i915/display/intel_backlight.c

1634

static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_backlight.c

1639

ret = panel->backlight.pwm_funcs->setup(connector, pipe);

drivers/gpu/drm/i915/display/intel_backlight.c

164

static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

1645

panel->backlight.level = intel_pwm_get_backlight(connector, pipe);

drivers/gpu/drm/i915/display/intel_backlight.c

1670

int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_backlight.c

1695

ret = panel->backlight.funcs->setup(connector, pipe);

drivers/gpu/drm/i915/display/intel_backlight.c

185

static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_backlight.c

189

if (drm_WARN_ON(display->drm, pipe != PIPE_A && pipe != PIPE_B))

drivers/gpu/drm/i915/display/intel_backlight.c

192

return intel_de_read(display, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

195

static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

203

static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_backlight.c

266

enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

269

tmp = intel_de_read(display, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;

drivers/gpu/drm/i915/display/intel_backlight.c

270

intel_de_write(display, VLV_BLC_PWM_CTL(pipe), tmp | level);

drivers/gpu/drm/i915/display/intel_backlight.c

399

enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

403

intel_de_rmw(display, VLV_BLC_PWM_CTL2(pipe), BLM_PWM_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_backlight.c

617

enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

636

ctl2 = BLM_PIPE(pipe);

drivers/gpu/drm/i915/display/intel_backlight.c

654

enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

657

ctl2 = intel_de_read(display, VLV_BLC_PWM_CTL2(pipe));

drivers/gpu/drm/i915/display/intel_backlight.c

663

intel_de_write(display, VLV_BLC_PWM_CTL2(pipe), ctl2);

drivers/gpu/drm/i915/display/intel_backlight.c

667

intel_de_write(display, VLV_BLC_PWM_CTL(pipe), ctl);

drivers/gpu/drm/i915/display/intel_backlight.c

675

intel_de_write(display, VLV_BLC_PWM_CTL2(pipe), ctl2);

drivers/gpu/drm/i915/display/intel_backlight.c

676

intel_de_posting_read(display, VLV_BLC_PWM_CTL2(pipe));

drivers/gpu/drm/i915/display/intel_backlight.c

677

intel_de_write(display, VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);

drivers/gpu/drm/i915/display/intel_backlight.c

686

enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

704

val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);

drivers/gpu/drm/i915/display/intel_backlight.c

803

enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_backlight.c

808

drm_dbg_kms(display->drm, "pipe %c\n", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_backlight.h

17

enum pipe;

drivers/gpu/drm/i915/display/intel_backlight.h

20

int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_backlight_regs.h

13

#define VLV_BLC_PWM_CTL2(pipe) _MMIO_PIPE(pipe, _VLV_BLC_PWM_CTL2_A, _VLV_BLC_PWM_CTL2_B)

drivers/gpu/drm/i915/display/intel_backlight_regs.h

17

#define VLV_BLC_PWM_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_PWM_CTL_A, _VLV_BLC_PWM_CTL_B)

drivers/gpu/drm/i915/display/intel_backlight_regs.h

21

#define VLV_BLC_HIST_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_HIST_CTL_A, _VLV_BLC_HIST_CTL_B)

drivers/gpu/drm/i915/display/intel_backlight_regs.h

36

#define BLM_PIPE(pipe) ((pipe) << 29)

drivers/gpu/drm/i915/display/intel_bw.c

1253

new_bw_state->data_rate[crtc->pipe] = new_data_rate;

drivers/gpu/drm/i915/display/intel_bw.c

1254

new_bw_state->num_active_planes[crtc->pipe] = new_active_planes;

drivers/gpu/drm/i915/display/intel_bw.c

1261

new_bw_state->data_rate[crtc->pipe],

drivers/gpu/drm/i915/display/intel_bw.c

1262

new_bw_state->num_active_planes[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_bw.c

1316

new_bw_state->pipe_sagv_reject &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_bw.c

1318

new_bw_state->pipe_sagv_reject |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_bw.c

1393

bw_state->data_rate[crtc->pipe] =

drivers/gpu/drm/i915/display/intel_bw.c

1395

bw_state->num_active_planes[crtc->pipe] =

drivers/gpu/drm/i915/display/intel_bw.c

1399

pipe_name(crtc->pipe),

drivers/gpu/drm/i915/display/intel_bw.c

1400

bw_state->data_rate[crtc->pipe],

drivers/gpu/drm/i915/display/intel_bw.c

1401

bw_state->num_active_planes[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_bw.c

1419

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_bw.c

1422

bw_state->active_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_bw.c

1428

bw_state->pipe_sagv_reject |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_bw.c

1437

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_bw.c

1442

bw_state->data_rate[pipe] = 0;

drivers/gpu/drm/i915/display/intel_bw.c

1443

bw_state->num_active_planes[pipe] = 0;

drivers/gpu/drm/i915/display/intel_bw.c

844

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_bw.c

846

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_bw.c

847

num_active_planes += bw_state->num_active_planes[pipe];

drivers/gpu/drm/i915/display/intel_bw.c

856

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_bw.c

858

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_bw.c

859

data_rate += bw_state->data_rate[pipe];

drivers/gpu/drm/i915/display/intel_casf.c

145

sharp = intel_de_read(display, SHARPNESS_CTL(crtc->pipe));

drivers/gpu/drm/i915/display/intel_casf.c

202

intel_de_write_fw(display, GLK_PS_COEF_INDEX_SET(crtc->pipe, id, 0),

drivers/gpu/drm/i915/display/intel_casf.c

215

intel_de_write_fw(display, GLK_PS_COEF_DATA_SET(crtc->pipe, id, 0),

drivers/gpu/drm/i915/display/intel_casf.c

276

intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);

drivers/gpu/drm/i915/display/intel_casf.c

286

intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0);

drivers/gpu/drm/i915/display/intel_casf.c

287

intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0);

drivers/gpu/drm/i915/display/intel_casf.c

288

intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_casf.c

289

intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);

drivers/gpu/drm/i915/display/intel_casf.c

71

intel_de_write(display, SHRPLUT_INDEX(crtc->pipe),

drivers/gpu/drm/i915/display/intel_casf.c

75

intel_de_write(display, SHRPLUT_DATA(crtc->pipe),

drivers/gpu/drm/i915/display/intel_casf.c

85

intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK,

drivers/gpu/drm/i915/display/intel_casf.c

88

win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));

drivers/gpu/drm/i915/display/intel_casf.c

90

intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size);

drivers/gpu/drm/i915/display/intel_casf_regs.h

13

#define SHARPNESS_CTL(pipe) _MMIO_PIPE(pipe, _SHARPNESS_CTL_A, _SHARPNESS_CTL_B)

drivers/gpu/drm/i915/display/intel_casf_regs.h

24

#define SHRPLUT_DATA(pipe) _MMIO_PIPE(pipe, _SHRPLUT_DATA_A, _SHRPLUT_DATA_B)

drivers/gpu/drm/i915/display/intel_casf_regs.h

28

#define SHRPLUT_INDEX(pipe) _MMIO_PIPE(pipe, _SHRPLUT_INDEX_A, _SHRPLUT_INDEX_B)

drivers/gpu/drm/i915/display/intel_cdclk.c

1160

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

145

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

165

enum pipe pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

178

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

180

display->funcs.cdclk->set_cdclk(display, cdclk_config, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

1928

static u32 bxt_cdclk_cd2x_pipe(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

1931

if (pipe == INVALID_PIPE)

drivers/gpu/drm/i915/display/intel_cdclk.c

1934

return TGL_CDCLK_CD2X_PIPE(pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

1936

if (pipe == INVALID_PIPE)

drivers/gpu/drm/i915/display/intel_cdclk.c

1939

return ICL_CDCLK_CD2X_PIPE(pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

1941

if (pipe == INVALID_PIPE)

drivers/gpu/drm/i915/display/intel_cdclk.c

1944

return BXT_CDCLK_CD2X_PIPE(pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

2160

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

2172

val |= bxt_cdclk_cd2x_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

2202

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

2227

intel_de_write(display, CDCLK_CTL, bxt_cdclk_ctl(display, cdclk_config, pipe));

drivers/gpu/drm/i915/display/intel_cdclk.c

2229

if (pipe != INVALID_PIPE)

drivers/gpu/drm/i915/display/intel_cdclk.c

2230

intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe));

drivers/gpu/drm/i915/display/intel_cdclk.c

2235

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

2275

_bxt_set_cdclk(display, &mid_cdclk_config, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

2276

_bxt_set_cdclk(display, cdclk_config, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

2278

_bxt_set_cdclk(display, cdclk_config, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

2614

enum pipe pipe, const char *context)

drivers/gpu/drm/i915/display/intel_cdclk.c

2647

intel_cdclk_set_cdclk(display, cdclk_config, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

2787

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

2801

pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_cdclk.c

2805

pipe = new_cdclk_state->pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

2808

pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_cdclk.c

2823

intel_set_cdclk(display, &cdclk_config, pipe,

drivers/gpu/drm/i915/display/intel_cdclk.c

2842

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

2856

pipe = new_cdclk_state->pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

2858

pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_cdclk.c

2862

intel_set_cdclk(display, &new_cdclk_state->actual, pipe,

drivers/gpu/drm/i915/display/intel_cdclk.c

2950

old_min_cdclk = cdclk_state->min_cdclk[crtc->pipe];

drivers/gpu/drm/i915/display/intel_cdclk.c

2958

cdclk_state->min_cdclk[crtc->pipe] = new_min_cdclk;

drivers/gpu/drm/i915/display/intel_cdclk.c

2996

old_min_voltage_level = cdclk_state->min_voltage_level[crtc->pipe];

drivers/gpu/drm/i915/display/intel_cdclk.c

3005

cdclk_state->min_voltage_level[crtc->pipe] = new_min_voltage_level;

drivers/gpu/drm/i915/display/intel_cdclk.c

3076

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

3081

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

3082

min_cdclk = max(min_cdclk, cdclk_state->min_cdclk[pipe]);

drivers/gpu/drm/i915/display/intel_cdclk.c

3127

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

3137

if (cdclk_state->min_voltage_level[crtc->pipe] == min_voltage_level)

drivers/gpu/drm/i915/display/intel_cdclk.c

3140

cdclk_state->min_voltage_level[crtc->pipe] = min_voltage_level;

drivers/gpu/drm/i915/display/intel_cdclk.c

3148

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

3150

cdclk_state->min_voltage_level[pipe]);

drivers/gpu/drm/i915/display/intel_cdclk.c

3348

cdclk_state->pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_cdclk.c

3495

enum pipe pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_cdclk.c

3532

pipe = ilog2(new_cdclk_state->active_pipes);

drivers/gpu/drm/i915/display/intel_cdclk.c

3533

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

3540

pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_cdclk.c

3558

} else if (pipe != INVALID_PIPE) {

drivers/gpu/drm/i915/display/intel_cdclk.c

3559

new_cdclk_state->pipe = pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

3563

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_cdclk.c

3652

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_cdclk.c

3655

cdclk_state->enabled_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

3657

cdclk_state->active_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

3659

cdclk_state->min_cdclk[pipe] = crtc_state->min_cdclk;

drivers/gpu/drm/i915/display/intel_cdclk.c

3660

cdclk_state->min_voltage_level[pipe] = crtc_state->min_voltage_level;

drivers/gpu/drm/i915/display/intel_cdclk.c

4155

int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

4157

return cdclk_state->min_cdclk[pipe];

drivers/gpu/drm/i915/display/intel_cdclk.c

667

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

757

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.c

877

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cdclk.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_cdclk.h

67

int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_color.c

1043

intel_de_write_fw(display, PIPE_CSC_MODE(crtc->pipe),

drivers/gpu/drm/i915/display/intel_color.c

1053

intel_de_write(display, GAMMA_MODE(crtc->pipe),

drivers/gpu/drm/i915/display/intel_color.c

1056

intel_de_write_fw(display, PIPE_CSC_MODE(crtc->pipe),

drivers/gpu/drm/i915/display/intel_color.c

1064

return intel_de_read(display, GAMMA_MODE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

1071

return intel_de_read(display, PIPE_CSC_MODE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

1110

u32 tmp = intel_de_read(display, SKL_BOTTOM_COLOR(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

1125

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1140

intel_de_write_dsb(display, dsb, SKL_BOTTOM_COLOR(pipe), val);

drivers/gpu/drm/i915/display/intel_color.c

1142

intel_de_write_dsb(display, dsb, GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode);

drivers/gpu/drm/i915/display/intel_color.c

1144

intel_de_write_dsb(display, dsb, PIPE_CSC_MODE(crtc->pipe), crtc_state->csc_mode);

drivers/gpu/drm/i915/display/intel_color.c

1152

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1158

intel_de_write_dsb(display, dsb, SKL_BOTTOM_COLOR(pipe), 0);

drivers/gpu/drm/i915/display/intel_color.c

1160

intel_de_write_dsb(display, dsb, GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode);

drivers/gpu/drm/i915/display/intel_color.c

1162

intel_de_write_dsb(display, dsb, PIPE_CSC_MODE(crtc->pipe), crtc_state->csc_mode);

drivers/gpu/drm/i915/display/intel_color.c

1184

intel_de_read_fw(display, PIPE_CSC_PREOFF_HI(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

1261

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1270

intel_de_write_fw(display, PALETTE(display, pipe, i),

drivers/gpu/drm/i915/display/intel_color.c

1280

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1284

PALETTE(display, pipe, 2 * i + 0),

drivers/gpu/drm/i915/display/intel_color.c

1287

PALETTE(display, pipe, 2 * i + 1),

drivers/gpu/drm/i915/display/intel_color.c

1316

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1320

PALETTE(display, pipe, 2 * i + 0),

drivers/gpu/drm/i915/display/intel_color.c

1323

PALETTE(display, pipe, 2 * i + 1),

drivers/gpu/drm/i915/display/intel_color.c

1327

intel_de_write_fw(display, PIPEGCMAX(display, pipe, 0), lut[i].red);

drivers/gpu/drm/i915/display/intel_color.c

1328

intel_de_write_fw(display, PIPEGCMAX(display, pipe, 1), lut[i].green);

drivers/gpu/drm/i915/display/intel_color.c

1329

intel_de_write_fw(display, PIPEGCMAX(display, pipe, 2), lut[i].blue);

drivers/gpu/drm/i915/display/intel_color.c

1377

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1403

ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),

drivers/gpu/drm/i915/display/intel_color.c

1406

ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),

drivers/gpu/drm/i915/display/intel_color.c

1417

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1420

ilk_lut_write(crtc_state, PREC_PALETTE(pipe, i),

drivers/gpu/drm/i915/display/intel_color.c

1463

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1466

ilk_lut_write(crtc_state, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1468

ilk_lut_write(crtc_state, PREC_PAL_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1476

ilk_lut_write(crtc_state, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1488

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1490

ilk_lut_write(crtc_state, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1492

ilk_lut_write(crtc_state, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1497

ilk_lut_write_indexed(crtc_state, PREC_PAL_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1504

ilk_lut_write(crtc_state, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1511

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1514

ilk_lut_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 0), 1 << 16);

drivers/gpu/drm/i915/display/intel_color.c

1515

ilk_lut_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 1), 1 << 16);

drivers/gpu/drm/i915/display/intel_color.c

1516

ilk_lut_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 2), 1 << 16);

drivers/gpu/drm/i915/display/intel_color.c

1522

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1525

ilk_lut_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 0), 1 << 16);

drivers/gpu/drm/i915/display/intel_color.c

1526

ilk_lut_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 1), 1 << 16);

drivers/gpu/drm/i915/display/intel_color.c

1527

ilk_lut_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 2), 1 << 16);

drivers/gpu/drm/i915/display/intel_color.c

1624

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1631

ilk_lut_write(crtc_state, PRE_CSC_GAMC_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1633

ilk_lut_write(crtc_state, PRE_CSC_GAMC_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1651

ilk_lut_write_indexed(crtc_state, PRE_CSC_GAMC_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1658

ilk_lut_write_indexed(crtc_state, PRE_CSC_GAMC_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1662

ilk_lut_write(crtc_state, PRE_CSC_GAMC_INDEX(pipe), 0);

drivers/gpu/drm/i915/display/intel_color.c

1693

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1696

ilk_lut_write(crtc_state, PREC_PAL_GC_MAX(pipe, 0), color->red);

drivers/gpu/drm/i915/display/intel_color.c

1697

ilk_lut_write(crtc_state, PREC_PAL_GC_MAX(pipe, 1), color->green);

drivers/gpu/drm/i915/display/intel_color.c

1698

ilk_lut_write(crtc_state, PREC_PAL_GC_MAX(pipe, 2), color->blue);

drivers/gpu/drm/i915/display/intel_color.c

1707

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1717

ilk_lut_write(crtc_state, PREC_PAL_MULTI_SEG_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1719

ilk_lut_write(crtc_state, PREC_PAL_MULTI_SEG_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1726

ilk_lut_write_indexed(crtc_state, PREC_PAL_MULTI_SEG_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1728

ilk_lut_write_indexed(crtc_state, PREC_PAL_MULTI_SEG_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1732

ilk_lut_write(crtc_state, PREC_PAL_MULTI_SEG_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1743

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1756

ilk_lut_write(crtc_state, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1758

ilk_lut_write(crtc_state, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1765

ilk_lut_write_indexed(crtc_state, PREC_PAL_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1767

ilk_lut_write_indexed(crtc_state, PREC_PAL_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1786

ilk_lut_write_indexed(crtc_state, PREC_PAL_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1788

ilk_lut_write_indexed(crtc_state, PREC_PAL_DATA(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1792

ilk_lut_write(crtc_state, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

1863

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1866

intel_de_write_fw(display, CGM_PIPE_DEGAMMA(pipe, i, 0),

drivers/gpu/drm/i915/display/intel_color.c

1868

intel_de_write_fw(display, CGM_PIPE_DEGAMMA(pipe, i, 1),

drivers/gpu/drm/i915/display/intel_color.c

1897

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

1900

intel_de_write_fw(display, CGM_PIPE_GAMMA(pipe, i, 0),

drivers/gpu/drm/i915/display/intel_color.c

1902

intel_de_write_fw(display, CGM_PIPE_GAMMA(pipe, i, 1),

drivers/gpu/drm/i915/display/intel_color.c

1925

intel_de_write_fw(display, CGM_PIPE_MODE(crtc->pipe),

drivers/gpu/drm/i915/display/intel_color.c

229

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

231

intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_HI(pipe),

drivers/gpu/drm/i915/display/intel_color.c

233

intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_ME(pipe),

drivers/gpu/drm/i915/display/intel_color.c

235

intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_LO(pipe),

drivers/gpu/drm/i915/display/intel_color.c

238

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RY_GY(pipe),

drivers/gpu/drm/i915/display/intel_color.c

240

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BY(pipe),

drivers/gpu/drm/i915/display/intel_color.c

243

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RU_GU(pipe),

drivers/gpu/drm/i915/display/intel_color.c

245

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BU(pipe),

drivers/gpu/drm/i915/display/intel_color.c

248

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RV_GV(pipe),

drivers/gpu/drm/i915/display/intel_color.c

250

intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_BV(pipe),

drivers/gpu/drm/i915/display/intel_color.c

256

intel_de_write_dsb(display, dsb, PIPE_CSC_POSTOFF_HI(pipe),

drivers/gpu/drm/i915/display/intel_color.c

258

intel_de_write_dsb(display, dsb, PIPE_CSC_POSTOFF_ME(pipe),

drivers/gpu/drm/i915/display/intel_color.c

260

intel_de_write_dsb(display, dsb, PIPE_CSC_POSTOFF_LO(pipe),

drivers/gpu/drm/i915/display/intel_color.c

268

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

271

csc->preoff[0] = intel_de_read_fw(display, PIPE_CSC_PREOFF_HI(pipe));

drivers/gpu/drm/i915/display/intel_color.c

272

csc->preoff[1] = intel_de_read_fw(display, PIPE_CSC_PREOFF_ME(pipe));

drivers/gpu/drm/i915/display/intel_color.c

273

csc->preoff[2] = intel_de_read_fw(display, PIPE_CSC_PREOFF_LO(pipe));

drivers/gpu/drm/i915/display/intel_color.c

275

tmp = intel_de_read_fw(display, PIPE_CSC_COEFF_RY_GY(pipe));

drivers/gpu/drm/i915/display/intel_color.c

278

tmp = intel_de_read_fw(display, PIPE_CSC_COEFF_BY(pipe));

drivers/gpu/drm/i915/display/intel_color.c

281

tmp = intel_de_read_fw(display, PIPE_CSC_COEFF_RU_GU(pipe));

drivers/gpu/drm/i915/display/intel_color.c

284

tmp = intel_de_read_fw(display, PIPE_CSC_COEFF_BU(pipe));

drivers/gpu/drm/i915/display/intel_color.c

287

tmp = intel_de_read_fw(display, PIPE_CSC_COEFF_RV_GV(pipe));

drivers/gpu/drm/i915/display/intel_color.c

290

tmp = intel_de_read_fw(display, PIPE_CSC_COEFF_BV(pipe));

drivers/gpu/drm/i915/display/intel_color.c

296

csc->postoff[0] = intel_de_read_fw(display, PIPE_CSC_POSTOFF_HI(pipe));

drivers/gpu/drm/i915/display/intel_color.c

297

csc->postoff[1] = intel_de_read_fw(display, PIPE_CSC_POSTOFF_ME(pipe));

drivers/gpu/drm/i915/display/intel_color.c

298

csc->postoff[2] = intel_de_read_fw(display, PIPE_CSC_POSTOFF_LO(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3299

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3314

PALETTE(display, pipe, i));

drivers/gpu/drm/i915/display/intel_color.c

3326

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3341

PALETTE(display, pipe, 2 * i + 0));

drivers/gpu/drm/i915/display/intel_color.c

3343

PALETTE(display, pipe, 2 * i + 1));

drivers/gpu/drm/i915/display/intel_color.c

335

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

337

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_PREOFF_HI(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3377

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

339

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_PREOFF_ME(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3391

PALETTE(display, pipe, 2 * i + 0));

drivers/gpu/drm/i915/display/intel_color.c

3393

PALETTE(display, pipe, 2 * i + 1));

drivers/gpu/drm/i915/display/intel_color.c

3398

lut[i].red = i965_lut_11p6_max_pack(intel_de_read_fw(display, PIPEGCMAX(display, pipe, 0)));

drivers/gpu/drm/i915/display/intel_color.c

3399

lut[i].green = i965_lut_11p6_max_pack(intel_de_read_fw(display, PIPEGCMAX(display, pipe, 1)));

drivers/gpu/drm/i915/display/intel_color.c

3400

lut[i].blue = i965_lut_11p6_max_pack(intel_de_read_fw(display, PIPEGCMAX(display, pipe, 2)));

drivers/gpu/drm/i915/display/intel_color.c

341

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_PREOFF_LO(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3429

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

344

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3442

u32 ldw = intel_de_read_fw(display, CGM_PIPE_DEGAMMA(pipe, i, 0));

drivers/gpu/drm/i915/display/intel_color.c

3443

u32 udw = intel_de_read_fw(display, CGM_PIPE_DEGAMMA(pipe, i, 1));

drivers/gpu/drm/i915/display/intel_color.c

3455

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

346

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_BY(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3468

u32 ldw = intel_de_read_fw(display, CGM_PIPE_GAMMA(pipe, i, 0));

drivers/gpu/drm/i915/display/intel_color.c

3469

u32 udw = intel_de_read_fw(display, CGM_PIPE_GAMMA(pipe, i, 1));

drivers/gpu/drm/i915/display/intel_color.c

3482

crtc_state->cgm_mode = intel_de_read(display, CGM_PIPE_MODE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_color.c

349

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3503

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

351

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_BU(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3517

u32 val = intel_de_read_fw(display, LGC_PALETTE(pipe, i));

drivers/gpu/drm/i915/display/intel_color.c

3529

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

354

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3542

u32 val = intel_de_read_fw(display, PREC_PALETTE(pipe, i));

drivers/gpu/drm/i915/display/intel_color.c

356

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_COEFF_BV(pipe),

drivers/gpu/drm/i915/display/intel_color.c

359

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_POSTOFF_HI(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3592

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3607

intel_de_write_fw(display, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3609

val = intel_de_read_fw(display, PREC_PAL_DATA(pipe));

drivers/gpu/drm/i915/display/intel_color.c

361

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_POSTOFF_ME(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3614

intel_de_write_fw(display, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

363

intel_de_write_dsb(display, dsb, PIPE_CSC_OUTPUT_POSTOFF_LO(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3657

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3669

intel_de_write_fw(display, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3671

intel_de_write_fw(display, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3676

u32 val = intel_de_read_fw(display, PREC_PAL_DATA(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3681

intel_de_write_fw(display, PREC_PAL_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

371

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3722

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3739

intel_de_write_fw(display, PRE_CSC_GAMC_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

374

csc->preoff[0] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_PREOFF_HI(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3741

intel_de_write_fw(display, PRE_CSC_GAMC_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3746

u32 val = intel_de_read_fw(display, PRE_CSC_GAMC_DATA(pipe));

drivers/gpu/drm/i915/display/intel_color.c

375

csc->preoff[1] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_PREOFF_ME(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3754

intel_de_write_fw(display, PRE_CSC_GAMC_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

376

csc->preoff[2] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_PREOFF_LO(pipe));

drivers/gpu/drm/i915/display/intel_color.c

378

tmp = intel_de_read_fw(display, PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3788

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

3800

intel_de_write_fw(display, PREC_PAL_MULTI_SEG_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3802

intel_de_write_fw(display, PREC_PAL_MULTI_SEG_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

3807

u32 ldw = intel_de_read_fw(display, PREC_PAL_MULTI_SEG_DATA(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3808

u32 udw = intel_de_read_fw(display, PREC_PAL_MULTI_SEG_DATA(pipe));

drivers/gpu/drm/i915/display/intel_color.c

381

tmp = intel_de_read_fw(display, PIPE_CSC_OUTPUT_COEFF_BY(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3813

intel_de_write_fw(display, PREC_PAL_MULTI_SEG_INDEX(pipe),

drivers/gpu/drm/i915/display/intel_color.c

384

tmp = intel_de_read_fw(display, PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3857

enum pipe pipe = to_intel_plane(state->plane)->pipe;

drivers/gpu/drm/i915/display/intel_color.c

387

tmp = intel_de_read_fw(display, PIPE_CSC_OUTPUT_COEFF_BU(pipe));

drivers/gpu/drm/i915/display/intel_color.c

390

tmp = intel_de_read_fw(display, PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3913

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3915

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 1),

drivers/gpu/drm/i915/display/intel_color.c

3918

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 2),

drivers/gpu/drm/i915/display/intel_color.c

3920

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 3),

drivers/gpu/drm/i915/display/intel_color.c

3923

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 4),

drivers/gpu/drm/i915/display/intel_color.c

3925

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane, 5),

drivers/gpu/drm/i915/display/intel_color.c

3928

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

3929

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 1), 0);

drivers/gpu/drm/i915/display/intel_color.c

393

tmp = intel_de_read_fw(display, PIPE_CSC_OUTPUT_COEFF_BV(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3930

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane, 2), 0);

drivers/gpu/drm/i915/display/intel_color.c

3936

PLANE_CSC_POSTOFF(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3939

PLANE_CSC_POSTOFF(pipe, plane, 1),

drivers/gpu/drm/i915/display/intel_color.c

3942

PLANE_CSC_POSTOFF(pipe, plane, 2),

drivers/gpu/drm/i915/display/intel_color.c

3952

enum pipe pipe = to_intel_plane(state->plane)->pipe;

drivers/gpu/drm/i915/display/intel_color.c

396

csc->postoff[0] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_POSTOFF_HI(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3961

PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3969

PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

397

csc->postoff[1] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_POSTOFF_ME(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3977

PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

398

csc->postoff[2] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_POSTOFF_LO(pipe));

drivers/gpu/drm/i915/display/intel_color.c

3985

PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);

drivers/gpu/drm/i915/display/intel_color.c

3990

PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

3995

intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

4005

enum pipe pipe = to_intel_plane(state->plane)->pipe;

drivers/gpu/drm/i915/display/intel_color.c

4011

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4014

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4022

PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4029

PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4039

PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);

drivers/gpu/drm/i915/display/intel_color.c

4044

PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),

drivers/gpu/drm/i915/display/intel_color.c

4049

intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

4051

PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0), 0);

drivers/gpu/drm/i915/display/intel_color.c

4079

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

4081

if (!dsb && intel_de_read(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {

drivers/gpu/drm/i915/display/intel_color.c

4087

intel_de_write_dsb(display, dsb, LUT_3D_INDEX(pipe), LUT_3D_AUTO_INCREMENT);

drivers/gpu/drm/i915/display/intel_color.c

4089

intel_de_write_dsb(display, dsb, LUT_3D_DATA(pipe), glk_3dlut_10(&lut[i]));

drivers/gpu/drm/i915/display/intel_color.c

4090

intel_de_write_dsb(display, dsb, LUT_3D_INDEX(pipe), 0);

drivers/gpu/drm/i915/display/intel_color.c

4096

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

4099

if (!dsb && intel_de_read(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {

drivers/gpu/drm/i915/display/intel_color.c

4108

intel_de_write_dsb(display, dsb, LUT_3D_CTL(pipe), val);

drivers/gpu/drm/i915/display/intel_color.c

4246

if (crtc && intel_color_crtc_has_3dlut(display, crtc->pipe))

drivers/gpu/drm/i915/display/intel_color.c

4271

intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_color.c

4274

return pipe == PIPE_A || pipe == PIPE_B;

drivers/gpu/drm/i915/display/intel_color.c

4286

if (crtc && intel_color_crtc_has_3dlut(display, crtc->pipe))

drivers/gpu/drm/i915/display/intel_color.c

4321

if (DISPLAY_VER(display) == 3 && crtc->pipe == PIPE_A)

drivers/gpu/drm/i915/display/intel_color.c

652

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

654

intel_de_write_fw(display, PIPE_WGC_C01_C00(display, pipe),

drivers/gpu/drm/i915/display/intel_color.c

656

intel_de_write_fw(display, PIPE_WGC_C02(display, pipe),

drivers/gpu/drm/i915/display/intel_color.c

659

intel_de_write_fw(display, PIPE_WGC_C11_C10(display, pipe),

drivers/gpu/drm/i915/display/intel_color.c

661

intel_de_write_fw(display, PIPE_WGC_C12(display, pipe),

drivers/gpu/drm/i915/display/intel_color.c

664

intel_de_write_fw(display, PIPE_WGC_C21_C20(display, pipe),

drivers/gpu/drm/i915/display/intel_color.c

666

intel_de_write_fw(display, PIPE_WGC_C22(display, pipe),

drivers/gpu/drm/i915/display/intel_color.c

674

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

677

tmp = intel_de_read_fw(display, PIPE_WGC_C01_C00(display, pipe));

drivers/gpu/drm/i915/display/intel_color.c

681

tmp = intel_de_read_fw(display, PIPE_WGC_C02(display, pipe));

drivers/gpu/drm/i915/display/intel_color.c

684

tmp = intel_de_read_fw(display, PIPE_WGC_C11_C10(display, pipe));

drivers/gpu/drm/i915/display/intel_color.c

688

tmp = intel_de_read_fw(display, PIPE_WGC_C12(display, pipe));

drivers/gpu/drm/i915/display/intel_color.c

691

tmp = intel_de_read_fw(display, PIPE_WGC_C21_C20(display, pipe));

drivers/gpu/drm/i915/display/intel_color.c

695

tmp = intel_de_read_fw(display, PIPE_WGC_C22(display, pipe));

drivers/gpu/drm/i915/display/intel_color.c

754

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

756

intel_de_write_fw(display, CGM_PIPE_CSC_COEFF01(pipe),

drivers/gpu/drm/i915/display/intel_color.c

758

intel_de_write_fw(display, CGM_PIPE_CSC_COEFF23(pipe),

drivers/gpu/drm/i915/display/intel_color.c

760

intel_de_write_fw(display, CGM_PIPE_CSC_COEFF45(pipe),

drivers/gpu/drm/i915/display/intel_color.c

762

intel_de_write_fw(display, CGM_PIPE_CSC_COEFF67(pipe),

drivers/gpu/drm/i915/display/intel_color.c

764

intel_de_write_fw(display, CGM_PIPE_CSC_COEFF8(pipe),

drivers/gpu/drm/i915/display/intel_color.c

772

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_color.c

775

tmp = intel_de_read_fw(display, CGM_PIPE_CSC_COEFF01(pipe));

drivers/gpu/drm/i915/display/intel_color.c

779

tmp = intel_de_read_fw(display, CGM_PIPE_CSC_COEFF23(pipe));

drivers/gpu/drm/i915/display/intel_color.c

783

tmp = intel_de_read_fw(display, CGM_PIPE_CSC_COEFF45(pipe));

drivers/gpu/drm/i915/display/intel_color.c

787

tmp = intel_de_read_fw(display, CGM_PIPE_CSC_COEFF67(pipe));

drivers/gpu/drm/i915/display/intel_color.c

791

tmp = intel_de_read_fw(display, CGM_PIPE_CSC_COEFF8(pipe));

drivers/gpu/drm/i915/display/intel_color.h

18

enum pipe;

drivers/gpu/drm/i915/display/intel_color.h

49

bool intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_color_pipeline.c

18

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_color_pipeline.c

51

intel_color_crtc_has_3dlut(display, pipe) &&

drivers/gpu/drm/i915/display/intel_color_pipeline.c

81

int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_color_pipeline.c

95

ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);

drivers/gpu/drm/i915/display/intel_color_pipeline.h

10

enum pipe;

drivers/gpu/drm/i915/display/intel_color_pipeline.h

12

int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_color_regs.h

120

#define PIPE_CSC_COEFF_RY_GY(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RY_GY, _PIPE_B_CSC_COEFF_RY_GY)

drivers/gpu/drm/i915/display/intel_color_regs.h

121

#define PIPE_CSC_COEFF_BY(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_BY, _PIPE_B_CSC_COEFF_BY)

drivers/gpu/drm/i915/display/intel_color_regs.h

122

#define PIPE_CSC_COEFF_RU_GU(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RU_GU, _PIPE_B_CSC_COEFF_RU_GU)

drivers/gpu/drm/i915/display/intel_color_regs.h

123

#define PIPE_CSC_COEFF_BU(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_BU, _PIPE_B_CSC_COEFF_BU)

drivers/gpu/drm/i915/display/intel_color_regs.h

124

#define PIPE_CSC_COEFF_RV_GV(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RV_GV, _PIPE_B_CSC_COEFF_RV_GV)

drivers/gpu/drm/i915/display/intel_color_regs.h

125

#define PIPE_CSC_COEFF_BV(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_BV, _PIPE_B_CSC_COEFF_BV)

drivers/gpu/drm/i915/display/intel_color_regs.h

126

#define PIPE_CSC_MODE(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_MODE, _PIPE_B_CSC_MODE)

drivers/gpu/drm/i915/display/intel_color_regs.h

127

#define PIPE_CSC_PREOFF_HI(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_HI, _PIPE_B_CSC_PREOFF_HI)

drivers/gpu/drm/i915/display/intel_color_regs.h

128

#define PIPE_CSC_PREOFF_ME(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_ME, _PIPE_B_CSC_PREOFF_ME)

drivers/gpu/drm/i915/display/intel_color_regs.h

129

#define PIPE_CSC_PREOFF_LO(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_LO, _PIPE_B_CSC_PREOFF_LO)

drivers/gpu/drm/i915/display/intel_color_regs.h

130

#define PIPE_CSC_POSTOFF_HI(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_POSTOFF_HI, _PIPE_B_CSC_POSTOFF_HI)

drivers/gpu/drm/i915/display/intel_color_regs.h

131

#define PIPE_CSC_POSTOFF_ME(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_POSTOFF_ME, _PIPE_B_CSC_POSTOFF_ME)

drivers/gpu/drm/i915/display/intel_color_regs.h

132

#define PIPE_CSC_POSTOFF_LO(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_POSTOFF_LO, _PIPE_B_CSC_POSTOFF_LO)

drivers/gpu/drm/i915/display/intel_color_regs.h

161

#define PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe) _MMIO_PIPE(pipe,\

drivers/gpu/drm/i915/display/intel_color_regs.h

164

#define PIPE_CSC_OUTPUT_COEFF_BY(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

167

#define PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

170

#define PIPE_CSC_OUTPUT_COEFF_BU(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

173

#define PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

176

#define PIPE_CSC_OUTPUT_COEFF_BV(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

179

#define PIPE_CSC_OUTPUT_PREOFF_HI(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

182

#define PIPE_CSC_OUTPUT_PREOFF_ME(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

185

#define PIPE_CSC_OUTPUT_PREOFF_LO(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

188

#define PIPE_CSC_OUTPUT_POSTOFF_HI(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

191

#define PIPE_CSC_OUTPUT_POSTOFF_ME(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

194

#define PIPE_CSC_OUTPUT_POSTOFF_LO(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

220

#define PREC_PAL_INDEX(pipe) _MMIO_PIPE(pipe, _PAL_PREC_INDEX_A, _PAL_PREC_INDEX_B)

drivers/gpu/drm/i915/display/intel_color_regs.h

221

#define PREC_PAL_DATA(pipe) _MMIO_PIPE(pipe, _PAL_PREC_DATA_A, _PAL_PREC_DATA_B)

drivers/gpu/drm/i915/display/intel_color_regs.h

222

#define PREC_PAL_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_GC_MAX_A, _PAL_PREC_GC_MAX_B) + (i) * 4) /* u1.16 */

drivers/gpu/drm/i915/display/intel_color_regs.h

223

#define PREC_PAL_EXT_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_EXT_GC_MAX_A, _PAL_PREC_EXT_GC_MAX_B) + (i) * 4) /* u3.16 */

drivers/gpu/drm/i915/display/intel_color_regs.h

224

#define PREC_PAL_EXT2_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_EXT2_GC_MAX_A, _PAL_PREC_EXT2_GC_MAX_B) + (i) * 4) /* glk+, u3.16 */

drivers/gpu/drm/i915/display/intel_color_regs.h

236

#define PRE_CSC_GAMC_INDEX(pipe) _MMIO_PIPE(pipe, _PRE_CSC_GAMC_INDEX_A, _PRE_CSC_GAMC_INDEX_B)

drivers/gpu/drm/i915/display/intel_color_regs.h

237

#define PRE_CSC_GAMC_DATA(pipe) _MMIO_PIPE(pipe, _PRE_CSC_GAMC_DATA_A, _PRE_CSC_GAMC_DATA_B)

drivers/gpu/drm/i915/display/intel_color_regs.h

250

#define PREC_PAL_MULTI_SEG_INDEX(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

253

#define PREC_PAL_MULTI_SEG_DATA(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_color_regs.h

264

#define PIPE_WGC_C01_C00(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C01_C00)

drivers/gpu/drm/i915/display/intel_color_regs.h

265

#define PIPE_WGC_C02(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C02)

drivers/gpu/drm/i915/display/intel_color_regs.h

266

#define PIPE_WGC_C11_C10(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C11_C10)

drivers/gpu/drm/i915/display/intel_color_regs.h

267

#define PIPE_WGC_C12(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C12)

drivers/gpu/drm/i915/display/intel_color_regs.h

268

#define PIPE_WGC_C21_C20(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C21_C20)

drivers/gpu/drm/i915/display/intel_color_regs.h

269

#define PIPE_WGC_C22(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C22)

drivers/gpu/drm/i915/display/intel_color_regs.h

303

#define CGM_PIPE_CSC_COEFF01(pipe) _MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF01, _CGM_PIPE_B_CSC_COEFF01)

drivers/gpu/drm/i915/display/intel_color_regs.h

304

#define CGM_PIPE_CSC_COEFF23(pipe) _MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF23, _CGM_PIPE_B_CSC_COEFF23)

drivers/gpu/drm/i915/display/intel_color_regs.h

305

#define CGM_PIPE_CSC_COEFF45(pipe) _MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF45, _CGM_PIPE_B_CSC_COEFF45)

drivers/gpu/drm/i915/display/intel_color_regs.h

306

#define CGM_PIPE_CSC_COEFF67(pipe) _MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF67, _CGM_PIPE_B_CSC_COEFF67)

drivers/gpu/drm/i915/display/intel_color_regs.h

307

#define CGM_PIPE_CSC_COEFF8(pipe) _MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF8, _CGM_PIPE_B_CSC_COEFF8)

drivers/gpu/drm/i915/display/intel_color_regs.h

308

#define CGM_PIPE_DEGAMMA(pipe, i, w) _MMIO(_PIPE(pipe, _CGM_PIPE_A_DEGAMMA, _CGM_PIPE_B_DEGAMMA) + (i) * 8 + (w) * 4)

drivers/gpu/drm/i915/display/intel_color_regs.h

309

#define CGM_PIPE_GAMMA(pipe, i, w) _MMIO(_PIPE(pipe, _CGM_PIPE_A_GAMMA, _CGM_PIPE_B_GAMMA) + (i) * 8 + (w) * 4)

drivers/gpu/drm/i915/display/intel_color_regs.h

310

#define CGM_PIPE_MODE(pipe) _MMIO_PIPE(pipe, _CGM_PIPE_A_MODE, _CGM_PIPE_B_MODE)

drivers/gpu/drm/i915/display/intel_color_regs.h

317

#define SKL_BOTTOM_COLOR(pipe) _MMIO_PIPE(pipe, _SKL_BOTTOM_COLOR_A, _SKL_BOTTOM_COLOR_B)

drivers/gpu/drm/i915/display/intel_color_regs.h

322

#define LUT_3D_CTL(pipe) _MMIO_PIPE(pipe, _LUT_3D_CTL_A, _LUT_3D_CTL_B)

drivers/gpu/drm/i915/display/intel_color_regs.h

33

#define PALETTE(dev_priv, pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) + \

drivers/gpu/drm/i915/display/intel_color_regs.h

333

#define LUT_3D_INDEX(pipe) _MMIO_PIPE(pipe, _LUT_3D_INDEX_A, _LUT_3D_INDEX_B)

drivers/gpu/drm/i915/display/intel_color_regs.h

34

_PICK_EVEN_2RANGES(pipe, 2, \

drivers/gpu/drm/i915/display/intel_color_regs.h

340

#define LUT_3D_DATA(pipe) _MMIO_PIPE(pipe, _LUT_3D_DATA_A, _LUT_3D_DATA_B)

drivers/gpu/drm/i915/display/intel_color_regs.h

42

#define PIPEGCMAX(dev_priv, pipe, i) _MMIO_PIPE2(dev_priv, pipe, _PIPEAGCMAX + (i) * 4) /* u1.16 */

drivers/gpu/drm/i915/display/intel_color_regs.h

48

#define LGC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _LGC_PALETTE_A, _LGC_PALETTE_B) + (i) * 4)

drivers/gpu/drm/i915/display/intel_color_regs.h

65

#define PREC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _PREC_PALETTE_A, _PREC_PALETTE_B) + (i) * 4)

drivers/gpu/drm/i915/display/intel_color_regs.h

69

#define PREC_PIPEGCMAX(pipe, i) _MMIO(_PIPE(pipe, _PIPEAGCMAX, _PIPEBGCMAX) + (i) * 4) /* u1.16 */

drivers/gpu/drm/i915/display/intel_color_regs.h

73

#define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)

drivers/gpu/drm/i915/display/intel_connector.c

190

enum pipe pipe = 0;

drivers/gpu/drm/i915/display/intel_connector.c

193

return encoder->get_hw_state(encoder, &pipe);

drivers/gpu/drm/i915/display/intel_connector.c

196

enum pipe intel_connector_get_pipe(struct intel_connector *connector)

drivers/gpu/drm/i915/display/intel_connector.c

205

return to_intel_crtc(connector->base.state->crtc)->pipe;

drivers/gpu/drm/i915/display/intel_connector.h

25

enum pipe intel_connector_get_pipe(struct intel_connector *connector);

drivers/gpu/drm/i915/display/intel_crt.c

100

*pipe = REG_FIELD_GET(ADPA_PIPE_SEL_MASK_CPT, val);

drivers/gpu/drm/i915/display/intel_crt.c

102

*pipe = REG_FIELD_GET(ADPA_PIPE_SEL_MASK, val);

drivers/gpu/drm/i915/display/intel_crt.c

108

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_crt.c

120

ret = intel_crt_port_enabled(display, crt->adpa_reg, pipe);

drivers/gpu/drm/i915/display/intel_crt.c

198

adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_crt.c

200

adpa |= ADPA_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_crt.c

203

intel_de_write(display, BCLRPAT(display, crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_crt.c

306

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_crt.c

310

intel_set_cpu_fifo_underrun_reporting(display, pipe, false);

drivers/gpu/drm/i915/display/intel_crt.c

324

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_crt.c

340

intel_set_cpu_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/intel_crt.c

695

intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_crt.c

698

enum transcoder cpu_transcoder = (enum transcoder)pipe;

drivers/gpu/drm/i915/display/intel_crt.c

738

intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe));

drivers/gpu/drm/i915/display/intel_crt.c

775

while (intel_de_read(display, PIPEDSL(display, pipe)) >= vactive)

drivers/gpu/drm/i915/display/intel_crt.c

777

while ((dsl = intel_de_read(display, PIPEDSL(display, pipe))) <= vsample)

drivers/gpu/drm/i915/display/intel_crt.c

790

} while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl));

drivers/gpu/drm/i915/display/intel_crt.c

92

i915_reg_t adpa_reg, enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_crt.c

920

to_intel_crtc(connector->state->crtc)->pipe);

drivers/gpu/drm/i915/display/intel_crt.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_crt.h

17

i915_reg_t adpa_reg, enum pipe *pipe);

drivers/gpu/drm/i915/display/intel_crt.h

22

i915_reg_t adpa_reg, enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_crt_regs.h

16

#define ADPA_PIPE_SEL(pipe) REG_FIELD_PREP(ADPA_PIPE_SEL_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_crt_regs.h

18

#define ADPA_PIPE_SEL_CPT(pipe) REG_FIELD_PREP(ADPA_PIPE_SEL_MASK_CPT, (pipe))

drivers/gpu/drm/i915/display/intel_crtc.c

311

static int __intel_crtc_init(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_crtc.c

322

crtc->pipe = pipe;

drivers/gpu/drm/i915/display/intel_crtc.c

323

crtc->num_scalers = DISPLAY_RUNTIME_INFO(display)->num_scalers[pipe];

drivers/gpu/drm/i915/display/intel_crtc.c

326

primary = skl_universal_plane_create(display, pipe, PLANE_1);

drivers/gpu/drm/i915/display/intel_crtc.c

328

primary = intel_primary_plane_create(display, pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

337

for_each_sprite(display, pipe, sprite) {

drivers/gpu/drm/i915/display/intel_crtc.c

341

plane = skl_universal_plane_create(display, pipe, PLANE_2 + sprite);

drivers/gpu/drm/i915/display/intel_crtc.c

343

plane = intel_sprite_plane_create(display, pipe, sprite);

drivers/gpu/drm/i915/display/intel_crtc.c

351

cursor = intel_cursor_plane_create(display, pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

381

funcs, "pipe %c", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_crtc.c

396

drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

411

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_crtc.c

417

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_crtc.c

418

ret = __intel_crtc_init(display, pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

438

pipe_from_crtc_id->pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_crtc.c

54

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_crtc.c

59

if (crtc->pipe == pipe)

drivers/gpu/drm/i915/display/intel_crtc.c

631

pipe_name(crtc->pipe),

drivers/gpu/drm/i915/display/intel_crtc.c

686

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_crtc.c

72

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_crtc.c

74

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_crtc.c

762

pipe_name(pipe), crtc->debug.start_vbl_count,

drivers/gpu/drm/i915/display/intel_crtc.h

12

enum pipe;

drivers/gpu/drm/i915/display/intel_crtc.h

56

enum pipe pipe);

drivers/gpu/drm/i915/display/intel_crtc.h

58

enum pipe pipe);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

393

if (plane->pipe == crtc->pipe)

drivers/gpu/drm/i915/display/intel_cursor.c

1004

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_cursor.c

1014

cursor->pipe = pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

1015

cursor->i9xx_plane = (enum i9xx_plane_id) pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

1017

cursor->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, cursor->id);

drivers/gpu/drm/i915/display/intel_cursor.c

1066

"cursor %c", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

1081

zpos = DISPLAY_RUNTIME_INFO(display)->num_sprites[pipe] + 1;

drivers/gpu/drm/i915/display/intel_cursor.c

323

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_cursor.c

337

*pipe = PIPE_A;

drivers/gpu/drm/i915/display/intel_cursor.c

395

cntl |= MCURSOR_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_cursor.c

476

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

519

if (display->platform.cherryview && pipe == PIPE_C &&

drivers/gpu/drm/i915/display/intel_cursor.c

537

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

542

intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), 0);

drivers/gpu/drm/i915/display/intel_cursor.c

553

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

558

intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), ctl);

drivers/gpu/drm/i915/display/intel_cursor.c

560

intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

570

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

580

intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe), val);

drivers/gpu/drm/i915/display/intel_cursor.c

583

intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), plane_state->ctl);

drivers/gpu/drm/i915/display/intel_cursor.c

622

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

629

intel_de_write_dsb(display, dsb, CUR_WM(pipe, level),

drivers/gpu/drm/i915/display/intel_cursor.c

632

intel_de_write_dsb(display, dsb, CUR_WM_TRANS(pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

638

intel_de_write_dsb(display, dsb, CUR_WM_SAGV(pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

640

intel_de_write_dsb(display, dsb, CUR_WM_SAGV_TRANS(pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

644

intel_de_write_dsb(display, dsb, CUR_BUF_CFG(pipe),

drivers/gpu/drm/i915/display/intel_cursor.c

655

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

704

intel_de_write_dsb(display, dsb, CUR_FBC_CTL(display, pipe), fbc_ctl);

drivers/gpu/drm/i915/display/intel_cursor.c

705

intel_de_write_dsb(display, dsb, CURCNTR(display, pipe), cntl);

drivers/gpu/drm/i915/display/intel_cursor.c

706

intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);

drivers/gpu/drm/i915/display/intel_cursor.c

707

intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);

drivers/gpu/drm/i915/display/intel_cursor.c

713

intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);

drivers/gpu/drm/i915/display/intel_cursor.c

714

intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);

drivers/gpu/drm/i915/display/intel_cursor.c

726

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_cursor.c

739

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/intel_cursor.c

744

val = intel_de_read(display, CURCNTR(display, plane->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

749

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_cursor.c

751

*pipe = REG_FIELD_GET(MCURSOR_PIPE_SEL_MASK, val);

drivers/gpu/drm/i915/display/intel_cursor.c

764

error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

765

error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

766

error->surflive = intel_de_read(display, CURSURFLIVE(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

775

error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.c

776

error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_cursor.h

16

enum pipe pipe);

drivers/gpu/drm/i915/display/intel_cursor.h

9

enum pipe;

drivers/gpu/drm/i915/display/intel_cursor_regs.h

100

#define CUR_BUF_CFG(pipe) _MMIO_PIPE((pipe), _CUR_BUF_CFG_A, _CUR_BUF_CFG_B)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

110

#define SEL_FETCH_CUR_CTL(pipe) _MMIO_PIPE((pipe), _SEL_FETCH_CUR_CTL_A, _SEL_FETCH_CUR_CTL_B)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

12

#define CURCNTR(dev_priv, pipe) _MMIO_CURSOR2((dev_priv), (pipe), _CURACNTR)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

28

#define MCURSOR_PIPE_SEL(pipe) REG_FIELD_PREP(MCURSOR_PIPE_SEL_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_cursor_regs.h

44

#define CURBASE(dev_priv, pipe) _MMIO_CURSOR2((dev_priv), (pipe), _CURABASE)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

47

#define CURPOS(dev_priv, pipe) _MMIO_CURSOR2((dev_priv), (pipe), _CURAPOS)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

56

#define CURPOS_ERLY_TPT(dev_priv, pipe) _MMIO_CURSOR2((dev_priv), (pipe), _CURAPOS_ERLY_TPT)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

59

#define CURSIZE(dev_priv, pipe) _MMIO_CURSOR2((dev_priv), (pipe), _CURASIZE)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

66

#define CUR_FBC_CTL(dev_priv, pipe) _MMIO_CURSOR2((dev_priv), (pipe), _CUR_FBC_CTL_A)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

72

#define CUR_CHICKEN(dev_priv, pipe) _MMIO_CURSOR2((dev_priv), (pipe), _CUR_CHICKEN_A)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

75

#define CURSURFLIVE(dev_priv, pipe) _MMIO_CURSOR2((dev_priv), (pipe), _CURASURFLIVE)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

80

#define CUR_WM(pipe, level) _MMIO(_PIPE((pipe), _CUR_WM_A_0, _CUR_WM_B_0) + (level) * 4)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

88

#define CUR_WM_SAGV(pipe) _MMIO_PIPE((pipe), _CUR_WM_SAGV_A, _CUR_WM_SAGV_B)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

92

#define CUR_WM_SAGV_TRANS(pipe) _MMIO_PIPE((pipe), _CUR_WM_SAGV_TRANS_A, _CUR_WM_SAGV_TRANS_B)

drivers/gpu/drm/i915/display/intel_cursor_regs.h

96

#define CUR_WM_TRANS(pipe) _MMIO_PIPE((pipe), _CUR_WM_TRANS_A, _CUR_WM_TRANS_B)

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

158

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

164

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

165

const struct intel_dbuf_bw *dbuf_bw = &dbuf_bw_state->dbuf_bw[pipe];

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

208

new_dbuf_bw_state->dbuf_bw[crtc->pipe] = new_dbuf_bw;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

243

skl_crtc_calc_dbuf_bw(&dbuf_bw_state->dbuf_bw[crtc->pipe], crtc_state);

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

252

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

257

memset(&dbuf_bw_state->dbuf_bw[pipe], 0, sizeof(dbuf_bw_state->dbuf_bw[pipe]));

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

82

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

84

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

86

&old_dbuf_bw_state->dbuf_bw[pipe];

drivers/gpu/drm/i915/display/intel_dbuf_bw.c

88

&new_dbuf_bw_state->dbuf_bw[pipe];

drivers/gpu/drm/i915/display/intel_ddi.c

2501

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

2507

dss1 = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));

drivers/gpu/drm/i915/display/intel_ddi.c

2513

if (drm_WARN_ON(display->drm, !(intel_ddi_splitter_pipe_mask(display) & BIT(pipe)))) {

drivers/gpu/drm/i915/display/intel_ddi.c

2538

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

2553

intel_de_rmw(display, ICL_PIPE_DSS_CTL1(pipe),

drivers/gpu/drm/i915/display/intel_ddi.c

3034

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

3038

intel_set_cpu_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/intel_ddi.c

4521

if (display->platform.haswell && crtc->pipe == PIPE_A &&

drivers/gpu/drm/i915/display/intel_ddi.c

4813

return intel_modeset_commit_pipes(display, BIT(crtc->pipe), ctx);

drivers/gpu/drm/i915/display/intel_ddi.c

517

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

553

switch (pipe) {

drivers/gpu/drm/i915/display/intel_ddi.c

555

MISSING_CASE(pipe);

drivers/gpu/drm/i915/display/intel_ddi.c

753

enum pipe pipe = 0;

drivers/gpu/drm/i915/display/intel_ddi.c

763

if (!encoder->get_hw_state(encoder, &pipe)) {

drivers/gpu/drm/i915/display/intel_ddi.c

771

cpu_transcoder = (enum transcoder) pipe;

drivers/gpu/drm/i915/display/intel_ddi.c

809

enum pipe p;

drivers/gpu/drm/i915/display/intel_ddi.c

938

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_ddi.c

948

*pipe = ffs(pipe_mask) - 1;

drivers/gpu/drm/i915/display/intel_ddi.h

22

enum pipe;

drivers/gpu/drm/i915/display/intel_ddi.h

59

bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);

drivers/gpu/drm/i915/display/intel_display.c

1022

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1033

intel_async_flip_vtd_wa(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

1037

skl_wa_827(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

1041

icl_wa_scalerclkgating(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

1045

icl_wa_cursorclkgating(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

1090

if (plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1107

if (plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1129

plane->pipe == crtc->pipe &&

drivers/gpu/drm/i915/display/intel_display.c

1153

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1180

intel_async_flip_vtd_wa(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

1185

skl_wa_827(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

1190

icl_wa_scalerclkgating(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

1195

icl_wa_cursorclkgating(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

1254

intel_set_cpu_fifo_underrun_reporting(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

1279

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_display.c

1496

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1511

intel_set_cpu_fifo_underrun_reporting(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

1512

intel_set_pch_fifo_underrun_reporting(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

152

skl_wa_827(struct intel_display *display, enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/intel_display.c

1525

assert_fdi_tx_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

1526

assert_fdi_rx_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

154

intel_de_rmw(display, CLKGATE_DIS_PSL(pipe),

drivers/gpu/drm/i915/display/intel_display.c

1560

intel_set_cpu_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

1561

intel_set_pch_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

1577

intel_de_rmw(display, CLKGATE_DIS_PSL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_display.c

1586

intel_de_write(display, WM_LINETIME(crtc->pipe),

drivers/gpu/drm/i915/display/intel_display.c

161

icl_wa_scalerclkgating(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_display.c

164

intel_de_rmw(display, CLKGATE_DIS_PSL(pipe),

drivers/gpu/drm/i915/display/intel_display.c

1704

enum pipe hsw_workaround_pipe;

drivers/gpu/drm/i915/display/intel_display.c

171

icl_wa_cursorclkgating(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_display.c

1732

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1739

intel_set_cpu_fifo_underrun_reporting(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

174

intel_de_rmw(display, CLKGATE_DIS_PSL(pipe),

drivers/gpu/drm/i915/display/intel_display.c

1740

intel_set_pch_fifo_underrun_reporting(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

1758

intel_set_cpu_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

1759

intel_set_pch_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

1954

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

1961

set_bit(POWER_DOMAIN_PIPE(pipe), mask->bits);

drivers/gpu/drm/i915/display/intel_display.c

1965

set_bit(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe), mask->bits);

drivers/gpu/drm/i915/display/intel_display.c

198

static enum pipe joiner_primary_pipe(const struct intel_crtc_state *crtc_state)

drivers/gpu/drm/i915/display/intel_display.c

2042

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2051

intel_de_write(display, VLV_PIPE_MSA_MISC(display, pipe), 0);

drivers/gpu/drm/i915/display/intel_display.c

2053

if (display->platform.cherryview && pipe == PIPE_B) {

drivers/gpu/drm/i915/display/intel_display.c

2054

intel_de_write(display, CHV_BLEND(display, pipe),

drivers/gpu/drm/i915/display/intel_display.c

2056

intel_de_write(display, CHV_CANVAS(display, pipe), 0);

drivers/gpu/drm/i915/display/intel_display.c

2061

intel_set_cpu_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

2090

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2102

intel_set_cpu_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

2131

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2152

chv_disable_pll(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

2154

vlv_disable_pll(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

2162

intel_set_cpu_fifo_underrun_reporting(display, pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

2169

i830_enable_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

2186

(crtc->pipe == PIPE_A || display->platform.i915g);

drivers/gpu/drm/i915/display/intel_display.c

235

return BIT(crtc->pipe) & bigjoiner_primary_pipes(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

245

return BIT(crtc->pipe) & bigjoiner_secondary_pipes(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

253

return BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

2608

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2618

PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe),

drivers/gpu/drm/i915/display/intel_display.c

2619

PIPE_LINK_M_G4X(pipe), PIPE_LINK_N_G4X(pipe));

drivers/gpu/drm/i915/display/intel_display.c

2651

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2738

(pipe == PIPE_B || pipe == PIPE_C))

drivers/gpu/drm/i915/display/intel_display.c

2739

intel_de_write(display, TRANS_VTOTAL(display, pipe),

drivers/gpu/drm/i915/display/intel_display.c

281

BIT(crtc->pipe) & ultrajoiner_primary_pipes(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

2826

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2831

intel_de_write(display, PIPESRC(display, pipe),

drivers/gpu/drm/i915/display/intel_display.c

2924

enum pipe primary_pipe, pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

2934

(pipe - primary_pipe) * width, 0);

drivers/gpu/drm/i915/display/intel_display.c

2943

tmp = intel_de_read(display, PIPESRC(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

302

BIT(crtc->pipe) & ultrajoiner_enable_pipes(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

3025

tmp = intel_de_read(display, PIPE_MISC(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

3050

enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3055

power_domain = POWER_DOMAIN_PIPE(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

318

crtc->pipe != joiner_primary_pipe(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

326

crtc->pipe == joiner_primary_pipe(crtc_state);

drivers/gpu/drm/i915/display/intel_display.c

3294

intel_de_write_dsb(display, dsb, PIPE_MISC(crtc->pipe), val);

drivers/gpu/drm/i915/display/intel_display.c

3302

tmp = intel_de_read(display, PIPE_MISC(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

3359

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3369

PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe),

drivers/gpu/drm/i915/display/intel_display.c

3370

PIPE_LINK_M_G4X(pipe), PIPE_LINK_N_G4X(pipe));

drivers/gpu/drm/i915/display/intel_display.c

338

return BIT(crtc->pipe) | crtc_state->joiner_pipes;

drivers/gpu/drm/i915/display/intel_display.c

3394

enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3399

power_domain = POWER_DOMAIN_PIPE(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

3510

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3512

power_domain = POWER_DOMAIN_PIPE(pipe);

drivers/gpu/drm/i915/display/intel_display.c

3514

u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));

drivers/gpu/drm/i915/display/intel_display.c

3517

*primary_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

3519

*secondary_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

3538

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3540

power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);

drivers/gpu/drm/i915/display/intel_display.c

3542

u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));

drivers/gpu/drm/i915/display/intel_display.c

3548

*primary_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

3550

*secondary_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

3575

static u8 get_joiner_primary_pipe(enum pipe pipe, u8 primary_pipes)

drivers/gpu/drm/i915/display/intel_display.c

3577

primary_pipes &= GENMASK(pipe, 0);

drivers/gpu/drm/i915/display/intel_display.c

3607

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3609

power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);

drivers/gpu/drm/i915/display/intel_display.c

3611

u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));

drivers/gpu/drm/i915/display/intel_display.c

3617

*primary_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

3619

*secondary_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

3625

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_display.c

3697

if (ultrajoiner_pipes & BIT(pipe)) {

drivers/gpu/drm/i915/display/intel_display.c

3698

*primary_pipe = get_joiner_primary_pipe(pipe, primary_ultrajoiner_pipes);

drivers/gpu/drm/i915/display/intel_display.c

3712

if (uncompressed_joiner_pipes & BIT(pipe)) {

drivers/gpu/drm/i915/display/intel_display.c

3713

*primary_pipe = get_joiner_primary_pipe(pipe, primary_uncompressed_joiner_pipes);

drivers/gpu/drm/i915/display/intel_display.c

3727

if (bigjoiner_pipes & BIT(pipe)) {

drivers/gpu/drm/i915/display/intel_display.c

3728

*primary_pipe = get_joiner_primary_pipe(pipe, primary_bigjoiner_pipes);

drivers/gpu/drm/i915/display/intel_display.c

3768

enum pipe trans_pipe;

drivers/gpu/drm/i915/display/intel_display.c

3800

if (trans_pipe == crtc->pipe)

drivers/gpu/drm/i915/display/intel_display.c

3805

cpu_transcoder = (enum transcoder) crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3810

enabled_joiner_pipes(display, crtc->pipe, &primary_pipe, &secondary_pipes);

drivers/gpu/drm/i915/display/intel_display.c

3811

if (secondary_pipes & BIT(crtc->pipe)) {

drivers/gpu/drm/i915/display/intel_display.c

3927

if ((tmp & BXT_PIPE_SELECT_MASK) != BXT_PIPE_SELECT(crtc->pipe))

drivers/gpu/drm/i915/display/intel_display.c

3942

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

3944

enabled_joiner_pipes(display, pipe, &primary_pipe, &secondary_pipes);

drivers/gpu/drm/i915/display/intel_display.c

3946

if (((primary_pipe | secondary_pipes) & BIT(pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

3960

POWER_DOMAIN_PIPE(crtc->pipe)))

drivers/gpu/drm/i915/display/intel_display.c

401

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display.c

4017

tmp = intel_de_read(display, WM_LINETIME(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

4024

POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe))) {

drivers/gpu/drm/i915/display/intel_display.c

404

cur_state = plane->get_hw_state(plane, &pipe);

drivers/gpu/drm/i915/display/intel_display.c

4117

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display.c

4119

if (!encoder->get_hw_state(encoder, &pipe))

drivers/gpu/drm/i915/display/intel_display.c

4122

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

429

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

432

drm_dbg_kms(display->drm, "enabling pipe %c\n", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_display.c

445

assert_pll_enabled(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

452

(enum pipe) cpu_transcoder);

drivers/gpu/drm/i915/display/intel_display.c

459

intel_de_rmw(display, PIPE_ARB_CTL(display, pipe),

drivers/gpu/drm/i915/display/intel_display.c

4659

crtc_state->cpu_transcoder = (enum transcoder) crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

4680

crtc_state->dsc.compression_enabled_on_link = limits->link_dsc_pipes & BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

4681

crtc_state->max_link_bpp_x16 = limits->max_bpp_x16[crtc->pipe];

drivers/gpu/drm/i915/display/intel_display.c

508

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

511

drm_dbg_kms(display->drm, "disabling pipe %c\n", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_display.c

5697

enum pipe first_pipe = INVALID_PIPE, enabled_pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_display.c

5711

first_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

5735

enabled_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

5755

enabled_pipes |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

5757

enabled_pipes &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

5772

active_pipes |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

5774

active_pipes &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

5884

pipes & BIT(crtc->pipe) &&

drivers/gpu/drm/i915/display/intel_display.c

5905

primary_crtc->pipe != joiner_primary_pipe(primary_crtc_state)))

drivers/gpu/drm/i915/display/intel_display.c

6043

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_display.c

6108

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_display.c

6304

enum pipe *failed_pipe)

drivers/gpu/drm/i915/display/intel_display.c

6363

*failed_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

6378

enum pipe failed_pipe;

drivers/gpu/drm/i915/display/intel_display.c

662

intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, false);

drivers/gpu/drm/i915/display/intel_display.c

6628

intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

6631

enum pipe pch_transcoder =

drivers/gpu/drm/i915/display/intel_display.c

683

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

686

tmp = intel_de_read(display, PIPE_CHICKEN(pipe));

drivers/gpu/drm/i915/display/intel_display.c

6940

disable_pipes |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display.c

6944

if ((disable_pipes & BIT(crtc->pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

6954

if ((disable_pipes & BIT(crtc->pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

6976

if ((disable_pipes & BIT(crtc->pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

7022

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7029

entries[pipe] = old_crtc_state->wm.skl.ddb;

drivers/gpu/drm/i915/display/intel_display.c

7030

update_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

7032

modeset_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

7046

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7048

if ((update_pipes & BIT(pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

7063

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7065

if ((update_pipes & BIT(pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

7069

entries, I915_MAX_PIPES, pipe))

drivers/gpu/drm/i915/display/intel_display.c

7072

entries[pipe] = new_crtc_state->wm.skl.ddb;

drivers/gpu/drm/i915/display/intel_display.c

7073

update_pipes &= ~BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

7099

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7101

if ((modeset_pipes & BIT(pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

7121

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7123

if ((modeset_pipes & BIT(pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

7138

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7140

if ((update_pipes & BIT(pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

715

intel_de_write(display, PIPE_CHICKEN(pipe), tmp);

drivers/gpu/drm/i915/display/intel_display.c

7151

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display.c

7153

if ((update_pipes & BIT(pipe)) == 0)

drivers/gpu/drm/i915/display/intel_display.c

7158

entries, I915_MAX_PIPES, pipe));

drivers/gpu/drm/i915/display/intel_display.c

7160

entries[pipe] = new_crtc_state->wm.skl.ddb;

drivers/gpu/drm/i915/display/intel_display.c

7161

update_pipes &= ~BIT(pipe);

drivers/gpu/drm/i915/display/intel_display.c

7476

intel_modeset_get_crtc_power_domains(new_crtc_state, &put_domains[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_display.c

7579

intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, true);

drivers/gpu/drm/i915/display/intel_display.c

7589

intel_modeset_put_crtc_power_domains(crtc, &put_domains[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_display.c

770

num_encoders, pipe_name(primary_crtc->pipe));

drivers/gpu/drm/i915/display/intel_display.c

824

enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/intel_display.c

831

intel_de_rmw(display, CHICKEN_PIPESL_1(pipe),

drivers/gpu/drm/i915/display/intel_display.c

8322

void i830_enable_pipe(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display.c

8324

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

8325

enum transcoder cpu_transcoder = (enum transcoder)pipe;

drivers/gpu/drm/i915/display/intel_display.c

8342

pipe_name(pipe), clock.vco, clock.dot);

drivers/gpu/drm/i915/display/intel_display.c

836

intel_de_rmw(display, CHICKEN_PIPESL_1(pipe),

drivers/gpu/drm/i915/display/intel_display.c

8364

intel_de_write(display, PIPESRC(display, pipe),

drivers/gpu/drm/i915/display/intel_display.c

8367

intel_de_write(display, FP0(pipe), fp);

drivers/gpu/drm/i915/display/intel_display.c

8368

intel_de_write(display, FP1(pipe), fp);

drivers/gpu/drm/i915/display/intel_display.c

8375

intel_de_write(display, DPLL(display, pipe),

drivers/gpu/drm/i915/display/intel_display.c

8377

intel_de_write(display, DPLL(display, pipe), dpll);

drivers/gpu/drm/i915/display/intel_display.c

8380

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_display.c

8388

intel_de_write(display, DPLL(display, pipe), dpll);

drivers/gpu/drm/i915/display/intel_display.c

8392

intel_de_write(display, DPLL(display, pipe), dpll);

drivers/gpu/drm/i915/display/intel_display.c

8393

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_display.c

8397

intel_de_write(display, TRANSCONF(display, pipe), TRANSCONF_ENABLE);

drivers/gpu/drm/i915/display/intel_display.c

8398

intel_de_posting_read(display, TRANSCONF(display, pipe));

drivers/gpu/drm/i915/display/intel_display.c

8403

void i830_disable_pipe(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display.c

8405

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display.c

8408

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_display.c

8421

intel_de_write(display, TRANSCONF(display, pipe), 0);

drivers/gpu/drm/i915/display/intel_display.c

8422

intel_de_posting_read(display, TRANSCONF(display, pipe));

drivers/gpu/drm/i915/display/intel_display.c

8426

intel_de_write(display, DPLL(display, pipe), DPLL_VGA_MODE_DIS);

drivers/gpu/drm/i915/display/intel_display.c

8427

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_display.h

239

for_each_if((intel_plane)->pipe == (intel_crtc)->pipe)

drivers/gpu/drm/i915/display/intel_display.h

250

for_each_if((pipe_mask) & BIT(intel_crtc->pipe))

drivers/gpu/drm/i915/display/intel_display.h

256

for_each_if((pipe_mask) & BIT((intel_crtc)->pipe))

drivers/gpu/drm/i915/display/intel_display.h

442

void i830_enable_pipe(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_display.h

443

void i830_disable_pipe(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_display_debugfs.c

1245

seq_printf(m, "%c\n", pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

668

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

671

seq_printf(m, "Pipe %c\n", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

791

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display_device.c

1762

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_device.c

1777

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_device.c

1778

display_runtime->num_scalers[pipe] = 0;

drivers/gpu/drm/i915/display/intel_display_device.c

1780

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_device.c

1781

display_runtime->num_scalers[pipe] = 2;

drivers/gpu/drm/i915/display/intel_display_device.c

1789

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_device.c

1790

display_runtime->num_sprites[pipe] = 4;

drivers/gpu/drm/i915/display/intel_display_device.c

1792

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_device.c

1793

display_runtime->num_sprites[pipe] = 6;

drivers/gpu/drm/i915/display/intel_display_device.c

1795

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_device.c

1796

display_runtime->num_sprites[pipe] = 3;

drivers/gpu/drm/i915/display/intel_display_device.c

1811

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_device.c

1812

display_runtime->num_sprites[pipe] = 2;

drivers/gpu/drm/i915/display/intel_display_device.c

1814

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_device.c

1815

display_runtime->num_sprites[pipe] = 1;

drivers/gpu/drm/i915/display/intel_display_device.c

1907

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_device.c

1908

if (display_runtime->num_scalers[pipe])

drivers/gpu/drm/i915/display/intel_display_device.c

1909

display_runtime->num_scalers[pipe] = 1;

drivers/gpu/drm/i915/display/intel_display_device.h

265

#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \

drivers/gpu/drm/i915/display/intel_display_device.h

266

(DISPLAY_INFO((display))->pipe_offsets[(pipe)] - \

drivers/gpu/drm/i915/display/intel_display_device.h

275

#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \

drivers/gpu/drm/i915/display/intel_display_device.h

276

(DISPLAY_INFO((display))->cursor_offsets[(pipe)] - \

drivers/gpu/drm/i915/display/intel_display_driver.c

165

plane->pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

128

enum pipe pipe, u32 fault_errors)

drivers/gpu/drm/i915/display/intel_display_irq.c

130

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1318

enum pipe pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_display_irq.c

1351

pipe = PIPE_A;

drivers/gpu/drm/i915/display/intel_display_irq.c

1354

pipe = PIPE_B;

drivers/gpu/drm/i915/display/intel_display_irq.c

1357

pipe = PIPE_C;

drivers/gpu/drm/i915/display/intel_display_irq.c

1364

intel_handle_vblank(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1410

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

146

intel_handle_vblank(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

148

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1488

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

1491

if (!(master_ctl & GEN8_DE_PIPE_IRQ(pipe)))

drivers/gpu/drm/i915/display/intel_display_irq.c

1494

iir = intel_de_read(display, GEN8_DE_PIPE_IIR(pipe));

drivers/gpu/drm/i915/display/intel_display_irq.c

1498

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_display_irq.c

1502

intel_de_write(display, GEN8_DE_PIPE_IIR(pipe), iir);

drivers/gpu/drm/i915/display/intel_display_irq.c

1505

intel_handle_vblank(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1508

flip_done_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1512

intel_dsb_irq_handler(display, pipe, INTEL_DSB_0);

drivers/gpu/drm/i915/display/intel_display_irq.c

1515

intel_dsb_irq_handler(display, pipe, INTEL_DSB_1);

drivers/gpu/drm/i915/display/intel_display_irq.c

1518

intel_dsb_irq_handler(display, pipe, INTEL_DSB_2);

drivers/gpu/drm/i915/display/intel_display_irq.c

1522

intel_pipedmc_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1525

hsw_pipe_crc_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1528

intel_cpu_fifo_underrun_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1534

pipe, fault_errors);

drivers/gpu/drm/i915/display/intel_display_irq.c

1649

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1653

i915_enable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS);

drivers/gpu/drm/i915/display/intel_display_irq.c

1662

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1666

i915_disable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS);

drivers/gpu/drm/i915/display/intel_display_irq.c

1691

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1695

i915_enable_pipestat(display, pipe,

drivers/gpu/drm/i915/display/intel_display_irq.c

1705

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1709

i915_disable_pipestat(display, pipe,

drivers/gpu/drm/i915/display/intel_display_irq.c

1717

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1720

DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1738

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1741

DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1784

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1794

bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_VBLANK);

drivers/gpu/drm/i915/display/intel_display_irq.c

1810

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1817

bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_VBLANK);

drivers/gpu/drm/i915/display/intel_display_irq.c

1824

static u32 vlv_dpinvgtt_pipe_fault_mask(enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

1826

switch (pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

1889

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

1891

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

1894

fault_errors = dpinvgtt & vlv_dpinvgtt_pipe_fault_mask(pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

1897

pipe, fault_errors);

drivers/gpu/drm/i915/display/intel_display_irq.c

2023

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

2039

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

2040

i915_enable_pipestat(display, pipe, pipestat_mask);

drivers/gpu/drm/i915/display/intel_display_irq.c

2097

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

2105

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

2107

POWER_DOMAIN_PIPE(pipe)))

drivers/gpu/drm/i915/display/intel_display_irq.c

2108

irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));

drivers/gpu/drm/i915/display/intel_display_irq.c

2119

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

2150

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

2152

POWER_DOMAIN_PIPE(pipe)))

drivers/gpu/drm/i915/display/intel_display_irq.c

2153

irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));

drivers/gpu/drm/i915/display/intel_display_irq.c

2172

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

2181

for_each_pipe_masked(display, pipe, pipe_mask)

drivers/gpu/drm/i915/display/intel_display_irq.c

2182

irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),

drivers/gpu/drm/i915/display/intel_display_irq.c

2183

display->irq.de_pipe_imr_mask[pipe],

drivers/gpu/drm/i915/display/intel_display_irq.c

2184

~display->irq.de_pipe_imr_mask[pipe] | extra_ier);

drivers/gpu/drm/i915/display/intel_display_irq.c

2192

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

2201

for_each_pipe_masked(display, pipe, pipe_mask)

drivers/gpu/drm/i915/display/intel_display_irq.c

2202

irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));

drivers/gpu/drm/i915/display/intel_display_irq.c

228

enum pipe pipe, u32 interrupt_mask,

drivers/gpu/drm/i915/display/intel_display_irq.c

2325

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

2391

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

2392

display->irq.de_pipe_imr_mask[pipe] = ~de_pipe_masked;

drivers/gpu/drm/i915/display/intel_display_irq.c

2395

POWER_DOMAIN_PIPE(pipe)))

drivers/gpu/drm/i915/display/intel_display_irq.c

2396

irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),

drivers/gpu/drm/i915/display/intel_display_irq.c

2397

display->irq.de_pipe_imr_mask[pipe],

drivers/gpu/drm/i915/display/intel_display_irq.c

240

new_val = display->irq.de_pipe_imr_mask[pipe];

drivers/gpu/drm/i915/display/intel_display_irq.c

244

if (new_val != display->irq.de_pipe_imr_mask[pipe]) {

drivers/gpu/drm/i915/display/intel_display_irq.c

245

display->irq.de_pipe_imr_mask[pipe] = new_val;

drivers/gpu/drm/i915/display/intel_display_irq.c

246

intel_de_write(display, GEN8_DE_PIPE_IMR(pipe), display->irq.de_pipe_imr_mask[pipe]);

drivers/gpu/drm/i915/display/intel_display_irq.c

247

intel_de_posting_read(display, GEN8_DE_PIPE_IMR(pipe));

drivers/gpu/drm/i915/display/intel_display_irq.c

252

enum pipe pipe, u32 bits)

drivers/gpu/drm/i915/display/intel_display_irq.c

254

bdw_update_pipe_irq(display, pipe, bits, bits);

drivers/gpu/drm/i915/display/intel_display_irq.c

258

enum pipe pipe, u32 bits)

drivers/gpu/drm/i915/display/intel_display_irq.c

260

bdw_update_pipe_irq(display, pipe, bits, 0);

drivers/gpu/drm/i915/display/intel_display_irq.c

300

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

302

u32 status_mask = display->irq.pipestat_irq_mask[pipe];

drivers/gpu/drm/i915/display/intel_display_irq.c

338

pipe_name(pipe), enable_mask, status_mask);

drivers/gpu/drm/i915/display/intel_display_irq.c

344

enum pipe pipe, u32 status_mask)

drivers/gpu/drm/i915/display/intel_display_irq.c

346

i915_reg_t reg = PIPESTAT(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

351

pipe_name(pipe), status_mask);

drivers/gpu/drm/i915/display/intel_display_irq.c

356

if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)

drivers/gpu/drm/i915/display/intel_display_irq.c

359

display->irq.pipestat_irq_mask[pipe] |= status_mask;

drivers/gpu/drm/i915/display/intel_display_irq.c

360

enable_mask = i915_pipestat_enable_mask(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

367

enum pipe pipe, u32 status_mask)

drivers/gpu/drm/i915/display/intel_display_irq.c

369

i915_reg_t reg = PIPESTAT(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

374

pipe_name(pipe), status_mask);

drivers/gpu/drm/i915/display/intel_display_irq.c

379

if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)

drivers/gpu/drm/i915/display/intel_display_irq.c

382

display->irq.pipestat_irq_mask[pipe] &= ~status_mask;

drivers/gpu/drm/i915/display/intel_display_irq.c

383

enable_mask = i915_pipestat_enable_mask(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

421

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_display_irq.c

426

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

456

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_display_irq.c

463

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

465

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

479

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

481

display_pipe_crc_irq_handler(display, pipe,

drivers/gpu/drm/i915/display/intel_display_irq.c

482

intel_de_read(display, PIPE_CRC_RES_HSW(pipe)),

drivers/gpu/drm/i915/display/intel_display_irq.c

487

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

489

display_pipe_crc_irq_handler(display, pipe,

drivers/gpu/drm/i915/display/intel_display_irq.c

490

intel_de_read(display, PIPE_CRC_RES_1_IVB(pipe)),

drivers/gpu/drm/i915/display/intel_display_irq.c

491

intel_de_read(display, PIPE_CRC_RES_2_IVB(pipe)),

drivers/gpu/drm/i915/display/intel_display_irq.c

492

intel_de_read(display, PIPE_CRC_RES_3_IVB(pipe)),

drivers/gpu/drm/i915/display/intel_display_irq.c

493

intel_de_read(display, PIPE_CRC_RES_4_IVB(pipe)),

drivers/gpu/drm/i915/display/intel_display_irq.c

494

intel_de_read(display, PIPE_CRC_RES_5_IVB(pipe)));

drivers/gpu/drm/i915/display/intel_display_irq.c

498

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

503

res1 = intel_de_read(display, PIPE_CRC_RES_RES1_I915(display, pipe));

drivers/gpu/drm/i915/display/intel_display_irq.c

508

res2 = intel_de_read(display, PIPE_CRC_RES_RES2_G4X(display, pipe));

drivers/gpu/drm/i915/display/intel_display_irq.c

512

display_pipe_crc_irq_handler(display, pipe,

drivers/gpu/drm/i915/display/intel_display_irq.c

513

intel_de_read(display, PIPE_CRC_RES_RED(display, pipe)),

drivers/gpu/drm/i915/display/intel_display_irq.c

514

intel_de_read(display, PIPE_CRC_RES_GREEN(display, pipe)),

drivers/gpu/drm/i915/display/intel_display_irq.c

515

intel_de_read(display, PIPE_CRC_RES_BLUE(display, pipe)),

drivers/gpu/drm/i915/display/intel_display_irq.c

521

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

523

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

525

PIPESTAT(display, pipe),

drivers/gpu/drm/i915/display/intel_display_irq.c

528

display->irq.pipestat_irq_mask[pipe] = 0;

drivers/gpu/drm/i915/display/intel_display_irq.c

535

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

545

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

560

switch (pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

573

status_mask |= display->irq.pipestat_irq_mask[pipe];

drivers/gpu/drm/i915/display/intel_display_irq.c

578

reg = PIPESTAT(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

579

pipe_stats[pipe] = intel_de_read(display, reg) & status_mask;

drivers/gpu/drm/i915/display/intel_display_irq.c

580

enable_mask = i915_pipestat_enable_mask(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

591

if (pipe_stats[pipe]) {

drivers/gpu/drm/i915/display/intel_display_irq.c

592

intel_de_write(display, reg, pipe_stats[pipe]);

drivers/gpu/drm/i915/display/intel_display_irq.c

603

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

605

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

606

if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

607

intel_handle_vblank(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

609

if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

612

if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

613

i9xx_pipe_crc_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

615

if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

616

intel_cpu_fifo_underrun_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

627

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

629

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

630

if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

631

intel_handle_vblank(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

633

if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

636

if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

637

i9xx_pipe_crc_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

639

if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

640

intel_cpu_fifo_underrun_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

653

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

655

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

656

if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

657

intel_handle_vblank(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

659

if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV)

drivers/gpu/drm/i915/display/intel_display_irq.c

660

flip_done_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

662

if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

663

i9xx_pipe_crc_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

665

if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)

drivers/gpu/drm/i915/display/intel_display_irq.c

666

intel_cpu_fifo_underrun_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

675

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

703

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

705

pipe_name(pipe),

drivers/gpu/drm/i915/display/intel_display_irq.c

706

intel_de_read(display, FDI_RX_IIR(pipe)));

drivers/gpu/drm/i915/display/intel_display_irq.c

723

static u32 ivb_err_int_pipe_fault_mask(enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

725

switch (pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

759

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

770

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

773

if (err_int & ERR_INT_FIFO_UNDERRUN(pipe))

drivers/gpu/drm/i915/display/intel_display_irq.c

774

intel_cpu_fifo_underrun_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

776

if (err_int & ERR_INT_PIPE_CRC_DONE(pipe)) {

drivers/gpu/drm/i915/display/intel_display_irq.c

778

ivb_pipe_crc_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

780

hsw_pipe_crc_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

783

fault_errors = err_int & ivb_err_int_pipe_fault_mask(pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

786

pipe, fault_errors);

drivers/gpu/drm/i915/display/intel_display_irq.c

795

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

800

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

801

if (serr_int & SERR_INT_TRANS_FIFO_UNDERRUN(pipe))

drivers/gpu/drm/i915/display/intel_display_irq.c

802

intel_pch_fifo_underrun_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

809

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

834

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

836

pipe_name(pipe),

drivers/gpu/drm/i915/display/intel_display_irq.c

837

intel_de_read(display, FDI_RX_IIR(pipe)));

drivers/gpu/drm/i915/display/intel_display_irq.c

844

static u32 ilk_gtt_fault_pipe_fault_mask(enum pipe pipe)

drivers/gpu/drm/i915/display/intel_display_irq.c

846

switch (pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

872

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

884

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

887

fault_errors = gtt_fault & ilk_gtt_fault_pipe_fault_mask(pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

890

pipe, fault_errors);

drivers/gpu/drm/i915/display/intel_display_irq.c

896

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

914

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

915

if (de_iir & DE_PIPE_VBLANK(pipe))

drivers/gpu/drm/i915/display/intel_display_irq.c

916

intel_handle_vblank(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

918

if (de_iir & DE_PLANE_FLIP_DONE(pipe))

drivers/gpu/drm/i915/display/intel_display_irq.c

919

flip_done_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

921

if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))

drivers/gpu/drm/i915/display/intel_display_irq.c

922

intel_cpu_fifo_underrun_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

924

if (de_iir & DE_PIPE_CRC_DONE(pipe))

drivers/gpu/drm/i915/display/intel_display_irq.c

925

i9xx_pipe_crc_irq_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

947

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_irq.c

975

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_irq.c

976

if (de_iir & DE_PIPE_VBLANK_IVB(pipe))

drivers/gpu/drm/i915/display/intel_display_irq.c

977

intel_handle_vblank(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.c

979

if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe))

drivers/gpu/drm/i915/display/intel_display_irq.c

980

flip_done_handler(display, pipe);

drivers/gpu/drm/i915/display/intel_display_irq.h

13

enum pipe;

drivers/gpu/drm/i915/display/intel_display_irq.h

30

void bdw_enable_pipe_irq(struct intel_display *display, enum pipe pipe, u32 bits);

drivers/gpu/drm/i915/display/intel_display_irq.h

31

void bdw_disable_pipe_irq(struct intel_display *display, enum pipe pipe, u32 bits);

drivers/gpu/drm/i915/display/intel_display_irq.h

76

u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_display_irq.h

77

void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);

drivers/gpu/drm/i915/display/intel_display_irq.h

78

void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);

drivers/gpu/drm/i915/display/intel_display_power.c

1209

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_display_power.h

122

#define POWER_DOMAIN_PIPE(pipe) \

drivers/gpu/drm/i915/display/intel_display_power.h

123

((enum intel_display_power_domain)((pipe) - PIPE_A + POWER_DOMAIN_PIPE_A))

drivers/gpu/drm/i915/display/intel_display_power.h

124

#define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \

drivers/gpu/drm/i915/display/intel_display_power.h

125

((enum intel_display_power_domain)((pipe) - PIPE_A + POWER_DOMAIN_PIPE_PANEL_FITTER_A))

drivers/gpu/drm/i915/display/intel_display_power_well.c

1245

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_power_well.c

1255

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_display_power_well.c

1256

u32 val = intel_de_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_display_power_well.c

1259

if (pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_display_power_well.c

1262

intel_de_write(display, DPLL(display, pipe), val);

drivers/gpu/drm/i915/display/intel_display_power_well.c

1345

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_power_well.c

1347

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_display_power_well.c

1348

assert_pll_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_display_power_well.c

1693

enum pipe pipe = PIPE_A;

drivers/gpu/drm/i915/display/intel_display_power_well.c

1699

state = vlv_punit_read(display->drm, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe);

drivers/gpu/drm/i915/display/intel_display_power_well.c

1704

drm_WARN_ON(display->drm, state != DP_SSS_PWR_ON(pipe) &&

drivers/gpu/drm/i915/display/intel_display_power_well.c

1705

state != DP_SSS_PWR_GATE(pipe));

drivers/gpu/drm/i915/display/intel_display_power_well.c

1706

enabled = state == DP_SSS_PWR_ON(pipe);

drivers/gpu/drm/i915/display/intel_display_power_well.c

1712

ctrl = vlv_punit_read(display->drm, PUNIT_REG_DSPSSPM) & DP_SSC_MASK(pipe);

drivers/gpu/drm/i915/display/intel_display_power_well.c

1724

enum pipe pipe = PIPE_A;

drivers/gpu/drm/i915/display/intel_display_power_well.c

1729

state = enable ? DP_SSS_PWR_ON(pipe) : DP_SSS_PWR_GATE(pipe);

drivers/gpu/drm/i915/display/intel_display_power_well.c

1734

if ((ctrl & DP_SSS_MASK(pipe)) == state)

drivers/gpu/drm/i915/display/intel_display_power_well.c

1737

ctrl &= ~DP_SSC_MASK(pipe);

drivers/gpu/drm/i915/display/intel_display_power_well.c

1738

ctrl |= enable ? DP_SSC_PWR_ON(pipe) : DP_SSC_PWR_GATE(pipe);

drivers/gpu/drm/i915/display/intel_display_power_well.c

1742

(ctrl & DP_SSS_MASK(pipe)) == state,

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

16

#define _PIPE(pipe, a, b) _PICK_EVEN(pipe, a, b)

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

23

#define _MMIO_PIPE(pipe, a, b) _MMIO(_PIPE(pipe, a, b))

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

30

#define _MMIO_BASE_PIPE3(base, pipe, a, b, c) _MMIO((base) + _PICK_EVEN_2RANGES(pipe, 1, a, a, b, c))

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

31

#define _MMIO_BASE_PORT3(base, pipe, a, b, c) _MMIO((base) + _PICK_EVEN_2RANGES(pipe, 1, a, a, b, c))

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

38

#define _MMIO_PIPE2(display, pipe, reg) _MMIO(INTEL_DISPLAY_DEVICE_PIPE_OFFSET((display), (pipe)) + (reg))

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

40

#define _MMIO_CURSOR2(display, pipe, reg) _MMIO(INTEL_DISPLAY_DEVICE_CURSOR_OFFSET((display), (pipe)) + (reg))

drivers/gpu/drm/i915/display/intel_display_regs.h

1064

#define SKL_PS_CTRL(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

11

#define GEN7_PIPE_DE_LOAD_SL(pipe) _MMIO_PIPE(pipe, _GEN7_PIPEA_DE_LOAD_SL, _GEN7_PIPEB_DE_LOAD_SL)

drivers/gpu/drm/i915/display/intel_display_regs.h

1119

#define SKL_PS_PWR_GATE(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1139

#define SKL_PS_WIN_POS(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1152

#define SKL_PS_WIN_SZ(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1165

#define SKL_PS_VSCALE(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1174

#define SKL_PS_HSCALE(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1183

#define SKL_PS_VPHASE(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1198

#define SKL_PS_HPHASE(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1207

#define SKL_PS_ECC_STAT(pipe, id) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1215

#define GLK_PS_COEF_INDEX_SET(pipe, id, set) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1224

#define GLK_PS_COEF_DATA_SET(pipe, id, set) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_display_regs.h

123

#define DPLL(dev_priv, pipe) _MMIO_BASE_PIPE3(DISPLAY_MMIO_BASE(dev_priv), \

drivers/gpu/drm/i915/display/intel_display_regs.h

124

(pipe), _DPLL_A, _DPLL_B, _CHV_DPLL_C)

drivers/gpu/drm/i915/display/intel_display_regs.h

1245

#define DE_PIPE_VBLANK_IVB(pipe) (1 << ((pipe) * 5))

drivers/gpu/drm/i915/display/intel_display_regs.h

1249

#define GEN8_DE_PIPE_ISR(pipe) _MMIO(0x44400 + (0x10 * (pipe)))

drivers/gpu/drm/i915/display/intel_display_regs.h

1250

#define GEN8_DE_PIPE_IMR(pipe) _MMIO(0x44404 + (0x10 * (pipe)))

drivers/gpu/drm/i915/display/intel_display_regs.h

1251

#define GEN8_DE_PIPE_IIR(pipe) _MMIO(0x44408 + (0x10 * (pipe)))

drivers/gpu/drm/i915/display/intel_display_regs.h

1252

#define GEN8_DE_PIPE_IER(pipe) _MMIO(0x4440c + (0x10 * (pipe)))

drivers/gpu/drm/i915/display/intel_display_regs.h

1293

#define GEN8_DE_PIPE_IRQ_REGS(pipe) I915_IRQ_REGS(GEN8_DE_PIPE_IMR(pipe), \

drivers/gpu/drm/i915/display/intel_display_regs.h

1294

GEN8_DE_PIPE_IER(pipe), \

drivers/gpu/drm/i915/display/intel_display_regs.h

1295

GEN8_DE_PIPE_IIR(pipe))

drivers/gpu/drm/i915/display/intel_display_regs.h

1572

#define PIPE_CHICKEN(pipe) _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\

drivers/gpu/drm/i915/display/intel_display_regs.h

1694

#define SERR_INT_TRANS_FIFO_UNDERRUN(pipe) (1 << ((pipe) * 3))

drivers/gpu/drm/i915/display/intel_display_regs.h

1825

#define TRANS_DPLLB_SEL(pipe) (1 << ((pipe) * 4))

drivers/gpu/drm/i915/display/intel_display_regs.h

1826

#define TRANS_DPLLA_SEL(pipe) 0

drivers/gpu/drm/i915/display/intel_display_regs.h

1827

#define TRANS_DPLL_ENABLE(pipe) (1 << ((pipe) * 4 + 3))

drivers/gpu/drm/i915/display/intel_display_regs.h

1832

#define PCH_TRANS_HTOTAL(pipe) _MMIO_PIPE(pipe, _PCH_TRANS_HTOTAL_A, _PCH_TRANS_HTOTAL_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1838

#define PCH_TRANS_HBLANK(pipe) _MMIO_PIPE(pipe, _PCH_TRANS_HBLANK_A, _PCH_TRANS_HBLANK_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1844

#define PCH_TRANS_HSYNC(pipe) _MMIO_PIPE(pipe, _PCH_TRANS_HSYNC_A, _PCH_TRANS_HSYNC_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1850

#define PCH_TRANS_VTOTAL(pipe) _MMIO_PIPE(pipe, _PCH_TRANS_VTOTAL_A, _PCH_TRANS_VTOTAL_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1856

#define PCH_TRANS_VBLANK(pipe) _MMIO_PIPE(pipe, _PCH_TRANS_VBLANK_A, _PCH_TRANS_VBLANK_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1862

#define PCH_TRANS_VSYNC(pipe) _MMIO_PIPE(pipe, _PCH_TRANS_VSYNC_A, _PCH_TRANS_VSYNC_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1868

#define PCH_TRANS_VSYNCSHIFT(pipe) _MMIO_PIPE(pipe, _PCH_TRANS_VSYNCSHIFT_A, _PCH_TRANS_VSYNCSHIFT_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1872

#define PCH_TRANS_DATA_M1(pipe) _MMIO_PIPE(pipe, _PCH_TRANSA_DATA_M1, _PCH_TRANSB_DATA_M1)

drivers/gpu/drm/i915/display/intel_display_regs.h

1876

#define PCH_TRANS_DATA_N1(pipe) _MMIO_PIPE(pipe, _PCH_TRANSA_DATA_N1, _PCH_TRANSB_DATA_N1)

drivers/gpu/drm/i915/display/intel_display_regs.h

1880

#define PCH_TRANS_DATA_M2(pipe) _MMIO_PIPE(pipe, _PCH_TRANSA_DATA_M2, _PCH_TRANSB_DATA_M2)

drivers/gpu/drm/i915/display/intel_display_regs.h

1884

#define PCH_TRANS_DATA_N2(pipe) _MMIO_PIPE(pipe, _PCH_TRANSA_DATA_N2, _PCH_TRANSB_DATA_N2)

drivers/gpu/drm/i915/display/intel_display_regs.h

1888

#define PCH_TRANS_LINK_M1(pipe) _MMIO_PIPE(pipe, _PCH_TRANSA_LINK_M1, _PCH_TRANSB_LINK_M1)

drivers/gpu/drm/i915/display/intel_display_regs.h

1892

#define PCH_TRANS_LINK_N1(pipe) _MMIO_PIPE(pipe, _PCH_TRANSA_LINK_N1, _PCH_TRANSB_LINK_N1)

drivers/gpu/drm/i915/display/intel_display_regs.h

1896

#define PCH_TRANS_LINK_M2(pipe) _MMIO_PIPE(pipe, _PCH_TRANSA_LINK_M2, _PCH_TRANSB_LINK_M2)

drivers/gpu/drm/i915/display/intel_display_regs.h

1900

#define PCH_TRANS_LINK_N2(pipe) _MMIO_PIPE(pipe, _PCH_TRANSA_LINK_N2, _PCH_TRANSB_LINK_N2)

drivers/gpu/drm/i915/display/intel_display_regs.h

1905

#define TVIDEO_DIP_CTL(pipe) _MMIO_PIPE(pipe, _VIDEO_DIP_CTL_A, _VIDEO_DIP_CTL_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1909

#define TVIDEO_DIP_DATA(pipe) _MMIO_PIPE(pipe, _VIDEO_DIP_DATA_A, _VIDEO_DIP_DATA_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1913

#define TVIDEO_DIP_GCP(pipe) _MMIO_PIPE(pipe, _VIDEO_DIP_GCP_A, _VIDEO_DIP_GCP_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

1922

#define VLV_TVIDEO_DIP_CTL(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \

drivers/gpu/drm/i915/display/intel_display_regs.h

1930

#define VLV_TVIDEO_DIP_DATA(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \

drivers/gpu/drm/i915/display/intel_display_regs.h

1938

#define VLV_TVIDEO_DIP_GCP(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \

drivers/gpu/drm/i915/display/intel_display_regs.h

2008

#define PCH_TRANSCONF(pipe) _MMIO_PIPE(pipe, _PCH_TRANSACONF, _PCH_TRANSBCONF)

drivers/gpu/drm/i915/display/intel_display_regs.h

2032

#define TRANS_DP_CTL(pipe) _MMIO_PIPE(pipe, _TRANS_DP_CTL_A, _TRANS_DP_CTL_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

223

#define DPLL_MD(dev_priv, pipe) _MMIO_BASE_PIPE3(DISPLAY_MMIO_BASE(dev_priv), \

drivers/gpu/drm/i915/display/intel_display_regs.h

224

(pipe), _DPLL_A_MD, _DPLL_B_MD, _CHV_DPLL_C_MD)

drivers/gpu/drm/i915/display/intel_display_regs.h

2388

#define DDI_DP_COMP_CTL(pipe) _MMIO_PIPE(pipe, _DDI_DP_COMP_CTL_A, _DDI_DP_COMP_CTL_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

2401

#define DDI_DP_COMP_PAT(pipe, i) _MMIO(_PIPE(pipe, _DDI_DP_COMP_PAT_A, _DDI_DP_COMP_PAT_B) + (i) * 4)

drivers/gpu/drm/i915/display/intel_display_regs.h

2532

#define BXT_CDCLK_CD2X_PIPE(pipe) ((pipe) << 20)

drivers/gpu/drm/i915/display/intel_display_regs.h

2535

#define ICL_CDCLK_CD2X_PIPE(pipe) (_PICK(pipe, 0, 2, 6) << 19)

drivers/gpu/drm/i915/display/intel_display_regs.h

2537

#define TGL_CDCLK_CD2X_PIPE(pipe) BXT_CDCLK_CD2X_PIPE(pipe)

drivers/gpu/drm/i915/display/intel_display_regs.h

269

#define FP0(pipe) _MMIO_PIPE(pipe, _FPA0, _FPB0)

drivers/gpu/drm/i915/display/intel_display_regs.h

270

#define FP1(pipe) _MMIO_PIPE(pipe, _FPA1, _FPB1)

drivers/gpu/drm/i915/display/intel_display_regs.h

2840

#define WM_LINETIME(pipe) _MMIO_PIPE(pipe, _WM_LINETIME_A, _WM_LINETIME_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

2865

#define PIPE_FRMTMSTMP(pipe) \

drivers/gpu/drm/i915/display/intel_display_regs.h

2866

_MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

2871

#define PIPE_FLIPTMSTMP(pipe) \

drivers/gpu/drm/i915/display/intel_display_regs.h

2872

_MMIO_PIPE(pipe, _PIPE_FLIPTMSTMP_A, _PIPE_FLIPTMSTMP_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

2877

#define PIPE_FLIPDONETIMSTMP(pipe) \

drivers/gpu/drm/i915/display/intel_display_regs.h

2878

_MMIO_PIPE(pipe, _PIPE_FLIPDONETMSTMP_A, _PIPE_FLIPDONETMSTMP_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

2881

#define VLV_PIPE_MSA_MISC(__display, pipe) \

drivers/gpu/drm/i915/display/intel_display_regs.h

2882

_MMIO_PIPE2(__display, pipe, _VLV_PIPE_MSA_MISC_A)

drivers/gpu/drm/i915/display/intel_display_regs.h

2940

#define MTL_PIPE_CLKGATE_DIS2(pipe) _MMIO_PIPE(pipe, _MTL_PIPE_CLKGATE_DIS2_A, _MTL_PIPE_CLKGATE_DIS2_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

332

#define CLKGATE_DIS_PSL(pipe) \

drivers/gpu/drm/i915/display/intel_display_regs.h

333

_MMIO_PIPE(pipe, _CLKGATE_DIS_PSL_A, _CLKGATE_DIS_PSL_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

339

#define CLKGATE_DIS_PSL_EXT(pipe) \

drivers/gpu/drm/i915/display/intel_display_regs.h

340

_MMIO_PIPE(pipe, _CLKGATE_DIS_PSL_EXT_A, _CLKGATE_DIS_PSL_EXT_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

396

#define PIPESRC(dev_priv, pipe) _MMIO_TRANS2(dev_priv, (pipe), _PIPEASRC)

drivers/gpu/drm/i915/display/intel_display_regs.h

527

#define SDVO_PIPE_SEL(pipe) ((pipe) << 30)

drivers/gpu/drm/i915/display/intel_display_regs.h

569

#define SDVO_PIPE_SEL_CPT(pipe) ((pipe) << 29)

drivers/gpu/drm/i915/display/intel_display_regs.h

574

#define SDVO_PIPE_SEL_CHV(pipe) ((pipe) << 24)

drivers/gpu/drm/i915/display/intel_display_regs.h

637

#define DP_PIPE_SEL(pipe) REG_FIELD_PREP(DP_PIPE_SEL_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_display_regs.h

639

#define DP_PIPE_SEL_IVB(pipe) REG_FIELD_PREP(DP_PIPE_SEL_MASK_IVB, (pipe))

drivers/gpu/drm/i915/display/intel_display_regs.h

642

#define DP_PIPE_SEL_CHV(pipe) REG_FIELD_PREP(DP_PIPE_SEL_MASK_CHV, (pipe))

drivers/gpu/drm/i915/display/intel_display_regs.h

695

#define PIPE_DATA_M_G4X(pipe) _MMIO_PIPE(pipe, _PIPEA_DATA_M_G4X, _PIPEB_DATA_M_G4X)

drivers/gpu/drm/i915/display/intel_display_regs.h

704

#define PIPE_DATA_N_G4X(pipe) _MMIO_PIPE(pipe, _PIPEA_DATA_N_G4X, _PIPEB_DATA_N_G4X)

drivers/gpu/drm/i915/display/intel_display_regs.h

718

#define PIPE_LINK_M_G4X(pipe) _MMIO_PIPE(pipe, _PIPEA_LINK_M_G4X, _PIPEB_LINK_M_G4X)

drivers/gpu/drm/i915/display/intel_display_regs.h

722

#define PIPE_LINK_N_G4X(pipe) _MMIO_PIPE(pipe, _PIPEA_LINK_N_G4X, _PIPEB_LINK_N_G4X)

drivers/gpu/drm/i915/display/intel_display_regs.h

726

#define PIPEDSL(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEADSL)

drivers/gpu/drm/i915/display/intel_display_regs.h

791

#define PIPESTAT(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEASTAT)

drivers/gpu/drm/i915/display/intel_display_regs.h

842

#define PIPE_ARB_CTL(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPE_ARB_CTL_A)

drivers/gpu/drm/i915/display/intel_display_regs.h

847

#define PIPE_MISC(pipe) _MMIO_PIPE(pipe, _PIPE_MISC_A, _PIPE_MISC_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

878

#define PIPE_MISC2(pipe) _MMIO_PIPE(pipe, _PIPE_MISC2_A, _PIPE_MISC2_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

887

#define UNDERRUN_DBG1(pipe) _MMIO_PIPE(pipe, _UNDERRUN_DBG1_A, _UNDERRUN_DBG1_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

895

#define UNDERRUN_DBG2(pipe) _MMIO_PIPE(pipe, _UNDERRUN_DBG2_A, _UNDERRUN_DBG2_B)

drivers/gpu/drm/i915/display/intel_display_regs.h

935

#define CBR_DPLLBMD_PIPE(pipe) (1 << (7 + (pipe) * 11)) /* pipes B and C */

drivers/gpu/drm/i915/display/intel_display_regs.h

953

#define PIPEFRAME(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEHIGH)

drivers/gpu/drm/i915/display/intel_display_regs.h

958

#define PIPEFRAMEPIXEL(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEPIXEL)

drivers/gpu/drm/i915/display/intel_display_regs.h

966

#define PIPE_FRMCOUNT_G4X(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEA_FRMCOUNT_G4X)

drivers/gpu/drm/i915/display/intel_display_regs.h

969

#define PIPE_FLIPCOUNT_G4X(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEA_FLIPCOUNT_G4X)

drivers/gpu/drm/i915/display/intel_display_regs.h

973

#define CHV_BLEND(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_BLEND_A)

drivers/gpu/drm/i915/display/intel_display_regs.h

980

#define CHV_CANVAS(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A)

drivers/gpu/drm/i915/display/intel_display_trace.h

118

__entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);

drivers/gpu/drm/i915/display/intel_display_trace.h

119

__entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);

drivers/gpu/drm/i915/display/intel_display_trace.h

121

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

141

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

165

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

180

TP_PROTO(struct intel_display *display, enum pipe pipe),

drivers/gpu/drm/i915/display/intel_display_trace.h

181

TP_ARGS(display, pipe),

drivers/gpu/drm/i915/display/intel_display_trace.h

191

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

193

__entry->pipe_name = pipe_name(pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

204

TP_PROTO(struct intel_display *display, enum pipe pch_transcoder),

drivers/gpu/drm/i915/display/intel_display_trace.h

215

enum pipe pipe = pch_transcoder;

drivers/gpu/drm/i915/display/intel_display_trace.h

216

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

218

__entry->pipe_name = pipe_name(pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

248

__entry->frame[crtc->pipe] = intel_crtc_get_vblank_counter(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

249

__entry->scanline[crtc->pipe] = intel_get_crtc_scanline(crtc);

drivers/gpu/drm/i915/display/intel_display_trace.h

285

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

288

__entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/intel_display_trace.h

289

__entry->sprite = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0];

drivers/gpu/drm/i915/display/intel_display_trace.h

290

__entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR];

drivers/gpu/drm/i915/display/intel_display_trace.h

332

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

337

__entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];

drivers/gpu/drm/i915/display/intel_display_trace.h

338

__entry->sprite0 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0];

drivers/gpu/drm/i915/display/intel_display_trace.h

339

__entry->sprite1 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE1];

drivers/gpu/drm/i915/display/intel_display_trace.h

340

__entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR];

drivers/gpu/drm/i915/display/intel_display_trace.h

369

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

399

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

428

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

461

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

491

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

521

struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

524

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

559

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

589

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

615

plane->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

618

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

643

plane->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

646

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

671

plane->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

674

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

697

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

720

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

745

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

773

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

799

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_trace.h

88

__entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);

drivers/gpu/drm/i915/display/intel_display_trace.h

89

__entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);

drivers/gpu/drm/i915/display/intel_display_trace.h

91

__entry->pipe_name = pipe_name(crtc->pipe);

drivers/gpu/drm/i915/display/intel_display_types.h

1243

enum pipe hsw_workaround_pipe;

drivers/gpu/drm/i915/display/intel_display_types.h

1483

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_types.h

1579

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_types.h

1629

bool (*get_hw_state)(struct intel_plane *plane, enum pipe *pipe);

drivers/gpu/drm/i915/display/intel_display_types.h

1711

enum pipe vlv_pps_pipe;

drivers/gpu/drm/i915/display/intel_display_types.h

1724

enum pipe vlv_active_pipe;

drivers/gpu/drm/i915/display/intel_display_types.h

1753

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_types.h

2020

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_display_types.h

223

bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);

drivers/gpu/drm/i915/display/intel_display_types.h

304

int (*setup)(struct intel_connector *connector, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_display_types.h

305

u32 (*get)(struct intel_connector *connector, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1696

void intel_pipedmc_irq_handler(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dmc.c

1698

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1702

tmp = intel_de_read(display, PIPEDMC_INTERRUPT(pipe));

drivers/gpu/drm/i915/display/intel_dmc.c

1703

intel_de_write(display, PIPEDMC_INTERRUPT(pipe), tmp);

drivers/gpu/drm/i915/display/intel_dmc.c

1733

int_vector = intel_de_read(display, PIPEDMC_STATUS(pipe)) & PIPEDMC_INT_VECTOR_MASK;

drivers/gpu/drm/i915/display/intel_dmc.c

1743

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1752

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1761

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

1769

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dmc.c

1771

intel_de_write_dsb(display, dsb, PIPEDMC_DCB_CTL(pipe),

drivers/gpu/drm/i915/display/intel_dmc.c

1778

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dmc.c

1780

intel_de_write_dsb(display, dsb, PIPEDMC_DCB_CTL(pipe), 0);

drivers/gpu/drm/i915/display/intel_dmc.c

260

#define PIPE_TO_DMC_ID(pipe) (DMC_FW_PIPEA + ((pipe) - PIPE_A))

drivers/gpu/drm/i915/display/intel_dmc.c

472

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dmc.c

482

for (pipe = PIPE_A; pipe <= PIPE_D; pipe++)

drivers/gpu/drm/i915/display/intel_dmc.c

483

intel_de_rmw(display, CLKGATE_DIS_PSL_EXT(pipe),

drivers/gpu/drm/i915/display/intel_dmc.c

486

for (pipe = PIPE_C; pipe <= PIPE_D; pipe++)

drivers/gpu/drm/i915/display/intel_dmc.c

487

intel_de_rmw(display, CLKGATE_DIS_PSL_EXT(pipe),

drivers/gpu/drm/i915/display/intel_dmc.c

718

static bool need_pipedmc_load_mmio(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dmc.c

726

return pipe >= PIPE_C;

drivers/gpu/drm/i915/display/intel_dmc.c

759

return pipe >= PIPE_C;

drivers/gpu/drm/i915/display/intel_dmc.c

783

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dmc.c

784

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

796

else if (need_pipedmc_load_mmio(display, pipe))

drivers/gpu/drm/i915/display/intel_dmc.c

802

intel_flipq_reset(display, pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

804

intel_de_write(display, PIPEDMC_INTERRUPT(pipe), pipedmc_interrupt_mask(display));

drivers/gpu/drm/i915/display/intel_dmc.c

805

intel_de_write(display, PIPEDMC_INTERRUPT_MASK(pipe), ~pipedmc_interrupt_mask(display));

drivers/gpu/drm/i915/display/intel_dmc.c

809

intel_de_rmw(display, MTL_PIPEDMC_CONTROL, 0, PIPEDMC_ENABLE_MTL(pipe));

drivers/gpu/drm/i915/display/intel_dmc.c

811

intel_de_rmw(display, PIPEDMC_CONTROL(pipe), 0, PIPEDMC_ENABLE);

drivers/gpu/drm/i915/display/intel_dmc.c

818

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dmc.c

819

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

825

intel_de_rmw(display, MTL_PIPEDMC_CONTROL, PIPEDMC_ENABLE_MTL(pipe), 0);

drivers/gpu/drm/i915/display/intel_dmc.c

827

intel_de_rmw(display, PIPEDMC_CONTROL(pipe), PIPEDMC_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_dmc.c

830

intel_de_write(display, PIPEDMC_INTERRUPT_MASK(pipe), ~0);

drivers/gpu/drm/i915/display/intel_dmc.c

831

intel_de_write(display, PIPEDMC_INTERRUPT(pipe), pipedmc_interrupt_mask(display));

drivers/gpu/drm/i915/display/intel_dmc.c

833

intel_flipq_reset(display, pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

863

enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/intel_dmc.c

865

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);

drivers/gpu/drm/i915/display/intel_dmc.c

879

void intel_dmc_block_pkgc(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_dmc.c

882

intel_de_rmw(display, PIPEDMC_BLOCK_PKGC_SW(pipe),

drivers/gpu/drm/i915/display/intel_dmc.c

898

enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/intel_dmc.c

900

enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);

drivers/gpu/drm/i915/display/intel_dmc.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_dmc.h

26

void intel_dmc_block_pkgc(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_dmc.h

29

enum pipe pipe, bool enable);

drivers/gpu/drm/i915/display/intel_dmc.h

31

enum pipe pipe, bool enable);

drivers/gpu/drm/i915/display/intel_dmc.h

44

void intel_pipedmc_irq_handler(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dmc.h

54

void intel_pipedmc_irq_handler(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dmc_regs.h

282

#define PIPEDMC_CONTROL(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

288

#define PIPEDMC_ENABLE_MTL(pipe) REG_BIT(((pipe) - PIPE_A) * 4)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

292

#define PIPEDMC_LOAD_HTP(pipe) _MMIO_PIPE((pipe), _PIPEDMC_LOAD_HTP_A, _PIPEDMC_LOAD_HTP_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

296

#define PIPEDMC_CTL(pipe) _MMIO_PIPE((pipe), _PIPEDMC_CTL_A, _PIPEDMC_CTL_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

303

#define PIPEDMC_STATUS(pipe) _MMIO_PIPE((pipe), _PIPEDMC_STATUS_A, _PIPEDMC_STATUS_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

314

#define PIPEDMC_FQ_CTRL(pipe) _MMIO_PIPE((pipe), _PIPEDMC_FQ_CTRL_A, _PIPEDMC_FQ_CTRL_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

321

#define PIPEDMC_FQ_STATUS(pipe) _MMIO_PIPE((pipe), _PIPEDMC_FQ_STATUS_A, _PIPEDMC_FQ_STATUS_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

328

#define PIPEDMC_FPQ_ATOMIC_TP(pipe) _MMIO_PIPE((pipe), _PIPEDMC_FPQ_ATOMIC_TP_A, _PIPEDMC_FPQ_ATOMIC_TP_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

342

#define PIPEDMC_FPQ_LINES_TO_W1 _MMIO_PIPE((pipe), _PIPEDMC_FPQ_LINES_TO_W1_A, _PIPEDMC_FPQ_LINES_TO_W1_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

346

#define PIPEDMC_FPQ_LINES_TO_W2 _MMIO_PIPE((pipe), _PIPEDMC_FPQ_LINES_TO_W2_A, _PIPEDMC_FPQ_LINES_TO_W2_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

350

#define PIPEDMC_SCANLINECMP(pipe) _MMIO_PIPE((pipe), _PIPEDMC_SCANLINECMP_A, _PIPEDMC_SCANLINECMP_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

356

#define PIPEDMC_SCANLINECMPLOWER(pipe) _MMIO_PIPE((pipe), _PIPEDMC_SCANLINECMPLOWER_A, _PIPEDMC_SCANLINECMPLOWER_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

364

#define PIPEDMC_SCANLINECMPUPPER(pipe) _MMIO_PIPE((pipe), _PIPEDMC_SCANLINECMPUPPER_A, _PIPEDMC_SCANLINECMPUPPER_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

368

#define _MMIO_PIPEDMC_FPQ(pipe, fq_id, \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

372

_PIPE((pipe), (reg_fpq1_a), (reg_fpq1_b)), \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

373

_PIPE((pipe), (reg_fpq2_a), (reg_fpq2_b)), \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

374

_PIPE((pipe), (reg_fpq3_a), (reg_fpq3_b)), \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

375

_PIPE((pipe), (reg_fpq4_a), (reg_fpq4_b))))

drivers/gpu/drm/i915/display/intel_dmc_regs.h

387

#define PIPEDMC_FPQ_HP(pipe, fq_id) _MMIO_PIPEDMC_FPQ((pipe), (fq_id), \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

403

#define PIPEDMC_FPQ_TP(pipe, fq_id) _MMIO_PIPEDMC_FPQ((pipe), (fq_id), \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

419

#define PIPEDMC_FPQ_CHP(pipe, fq_id) _MMIO_PIPEDMC_FPQ((pipe), (fq_id), \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

427

#define PIPEDMC_FPQ_TS(pipe) _MMIO_PIPE((pipe), _PIPEDMC_FPQ_TS_A, _PIPEDMC_FPQ_TS_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

431

#define PIPEDMC_SCANLINE_RO(pipe) _MMIO_PIPE((pipe), _PIPEDMC_SCANLINE_RO_A, _PIPEDMC_SCANLINE_RO_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

435

#define PIPEDMC_FPQ_CTL1(pipe) _MMIO_PIPE((pipe), _PIPEDMC_FPQ_CTL1_A, _PIPEDMC_FPQ_CTL1_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

440

#define PIPEDMC_FPQ_CTL2(pipe) _MMIO_PIPE((pipe), _PIPEDMC_FPQ_CTL2_A, _PIPEDMC_FPQ_CTL2_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

446

#define PIPEDMC_INTERRUPT(pipe) _MMIO_PIPE((pipe), _PIPEDMC_INTERRUPT_A, _PIPEDMC_INTERRUPT_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

449

#define PIPEDMC_INTERRUPT_MASK(pipe) _MMIO_PIPE((pipe), _PIPEDMC_INTERRUPT_MASK_A, _PIPEDMC_INTERRUPT_MASK_B)

drivers/gpu/drm/i915/display/intel_dmc_regs.h

457

#define PIPEDMC_BLOCK_PKGC_SW(pipe) _MMIO_PIPE(pipe, \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

542

#define PIPE_D_DMC_W2_PTS_CONFIG_SELECT(pipe) REG_FIELD_PREP(PIPE_D_DMC_W2_PTS_CONFIG_SELECT_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_dmc_regs.h

544

#define PIPE_C_DMC_W2_PTS_CONFIG_SELECT(pipe) REG_FIELD_PREP(PIPE_C_DMC_W2_PTS_CONFIG_SELECT_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_dmc_regs.h

546

#define PIPE_B_DMC_W2_PTS_CONFIG_SELECT(pipe) REG_FIELD_PREP(PIPE_B_DMC_W2_PTS_CONFIG_SELECT_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_dmc_regs.h

548

#define PIPE_A_DMC_W2_PTS_CONFIG_SELECT(pipe) REG_FIELD_PREP(PIPE_A_DMC_W2_PTS_CONFIG_SELECT_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_dmc_regs.h

589

#define PIPEDMC_DCB_CTL(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_CTL_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

595

#define PIPEDMC_DCB_VBLANK(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VBLANK_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

600

#define PIPEDMC_DCB_SLOPE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_SLOPE_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

605

#define PIPEDMC_DCB_GUARDBAND(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_GUARDBAND_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

610

#define PIPEDMC_DCB_MAX_INCREASE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_MAX_INCREASE_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

615

#define PIPEDMC_DCB_MAX_DECREASE(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_MAX_DECREASE_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

620

#define PIPEDMC_DCB_VMIN(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VMIN_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

625

#define PIPEDMC_DCB_VMAX(pipe) _MMIO_PIPE((pipe), _PIPEDMC_DCB_VMAX_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

630

#define PIPEDMC_DCB_DEBUG(pipe) _MMIO_PIPE(pipe, _PIPEDMC_DCB_DEBUG_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

635

#define PIPEDMC_EVT_CTL_3(pipe) _MMIO_PIPE(pipe, _PIPEDMC_EVT_CTL_3_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

640

#define PIPEDMC_DCB_FLIP_COUNT(pipe) _MMIO_PIPE(pipe, _PIPEDMC_DCB_FLIP_COUNT_A,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

645

#define PIPEDMC_DCB_BALANCE_RESET(pipe) _MMIO_PIPE(pipe, _PIPEDMC_DCB_BALANCE_RESET_A,\

drivers/gpu/drm/i915/display/intel_dp.c

2272

return pipe_bpp >= limits->pipe.min_bpp &&

drivers/gpu/drm/i915/display/intel_dp.c

2273

pipe_bpp <= limits->pipe.max_bpp;

drivers/gpu/drm/i915/display/intel_dp.c

2313

pipe_bpp = limits->pipe.max_bpp;

drivers/gpu/drm/i915/display/intel_dp.c

2589

fxp_q4_from_int(limits->pipe.max_bpp));

drivers/gpu/drm/i915/display/intel_dp.c

2594

if (max_link_bpp_x16 < fxp_q4_from_int(limits->pipe.min_bpp))

drivers/gpu/drm/i915/display/intel_dp.c

2597

limits->link.min_bpp_x16 = fxp_q4_from_int(limits->pipe.min_bpp);

drivers/gpu/drm/i915/display/intel_dp.c

2608

limits->pipe.max_bpp,

drivers/gpu/drm/i915/display/intel_dp.c

2622

limits->pipe.max_bpp,

drivers/gpu/drm/i915/display/intel_dp.c

2642

limits->pipe.min_bpp = max(limits->pipe.min_bpp, dsc_min_bpc * 3);

drivers/gpu/drm/i915/display/intel_dp.c

2643

limits->pipe.min_bpp = align_min_sink_dsc_input_bpp(connector, limits->pipe.min_bpp);

drivers/gpu/drm/i915/display/intel_dp.c

2645

limits->pipe.max_bpp = min(limits->pipe.max_bpp, dsc_max_bpc * 3);

drivers/gpu/drm/i915/display/intel_dp.c

2646

limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector, limits->pipe.max_bpp);

drivers/gpu/drm/i915/display/intel_dp.c

2648

if (limits->pipe.min_bpp <= 0 ||

drivers/gpu/drm/i915/display/intel_dp.c

2649

limits->pipe.min_bpp > limits->pipe.max_bpp) {

drivers/gpu/drm/i915/display/intel_dp.c

2654

orig_limits.pipe.min_bpp, orig_limits.pipe.max_bpp,

drivers/gpu/drm/i915/display/intel_dp.c

2655

limits->pipe.min_bpp, limits->pipe.max_bpp);

drivers/gpu/drm/i915/display/intel_dp.c

2684

limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);

drivers/gpu/drm/i915/display/intel_dp.c

2694

limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);

drivers/gpu/drm/i915/display/intel_dp.c

2696

limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,

drivers/gpu/drm/i915/display/intel_dp.c

2702

limits->pipe.max_bpp >= 30)

drivers/gpu/drm/i915/display/intel_dp.c

2703

limits->pipe.min_bpp = max(limits->pipe.min_bpp, 30);

drivers/gpu/drm/i915/display/intel_dp.c

2708

limits->pipe.min_bpp, limits->pipe.max_bpp,

drivers/gpu/drm/i915/display/intel_dp.c

2792

pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp.c

5487

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dp.c

5498

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_dp.c

5499

encoder = &intel_dp->mst.stream_encoders[pipe]->base;

drivers/gpu/drm/i915/display/intel_dp.c

5561

*pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp.c

6733

enum pipe pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_dp.c

6736

pipe = vlv_pps_backlight_initial_pipe(intel_dp);

drivers/gpu/drm/i915/display/intel_dp.c

6738

intel_backlight_setup(connector, pipe);

drivers/gpu/drm/i915/display/intel_dp.h

12

enum pipe;

drivers/gpu/drm/i915/display/intel_dp.h

33

} pipe;

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

174

intel_dp_aux_hdr_get_backlight(struct intel_connector *connector, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

191

u32 pwm_level = panel->backlight.pwm_funcs->get(connector, pipe);

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

395

intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

409

ret = panel->backlight.pwm_funcs->setup(connector, pipe);

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

433

panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector, pipe);

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

440

static u32 intel_dp_aux_vesa_get_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

518

static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

548

ret = panel->backlight.pwm_funcs->setup(connector, pipe);

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

585

panel->backlight.pwm_funcs->get(connector, pipe);

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

805

enum pipe pipe = (enum pipe)cpu_transcoder;

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

824

if (intel_de_wait_ms(display, HDCP2_STREAM_STATUS(display, cpu_transcoder, pipe),

drivers/gpu/drm/i915/display/intel_dp_mst.c

1319

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1322

*pipe = intel_mst->pipe;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1529

return &intel_dp->mst.stream_encoders[crtc->pipe]->base.base;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1579

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1584

return encoder->get_hw_state(encoder, &pipe);

drivers/gpu/drm/i915/display/intel_dp_mst.c

1692

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1717

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_dp_mst.c

1719

&intel_dp->mst.stream_encoders[pipe]->base.base;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1761

mst_stream_encoder_create(struct intel_digital_port *dig_port, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1773

intel_mst->pipe = pipe;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1778

DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_dp_mst.c

1819

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1821

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_dp_mst.c

1822

intel_dp->mst.stream_encoders[pipe] = mst_stream_encoder_create(dig_port, pipe);

drivers/gpu/drm/i915/display/intel_dp_mst.c

467

crtc_state->pipe_bpp = limits->pipe.max_bpp;

drivers/gpu/drm/i915/display/intel_dp_mst.c

626

pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp_mst.c

772

mask |= BIT(to_intel_crtc(conn_state->base.crtc)->pipe);

drivers/gpu/drm/i915/display/intel_dp_mst.c

799

dsc_pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp_test.c

228

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dp_test.c

234

intel_de_write(display, DDI_DP_COMP_CTL(pipe), 0x0);

drivers/gpu/drm/i915/display/intel_dp_test.c

242

intel_de_write(display, DDI_DP_COMP_CTL(pipe),

drivers/gpu/drm/i915/display/intel_dp_test.c

248

intel_de_write(display, DDI_DP_COMP_CTL(pipe),

drivers/gpu/drm/i915/display/intel_dp_test.c

254

intel_de_write(display, DDI_DP_COMP_CTL(pipe),

drivers/gpu/drm/i915/display/intel_dp_test.c

266

intel_de_write(display, DDI_DP_COMP_PAT(pipe, 0), pattern_val);

drivers/gpu/drm/i915/display/intel_dp_test.c

268

intel_de_write(display, DDI_DP_COMP_PAT(pipe, 1), pattern_val);

drivers/gpu/drm/i915/display/intel_dp_test.c

270

intel_de_write(display, DDI_DP_COMP_PAT(pipe, 2), pattern_val);

drivers/gpu/drm/i915/display/intel_dp_test.c

271

intel_de_write(display, DDI_DP_COMP_CTL(pipe),

drivers/gpu/drm/i915/display/intel_dp_test.c

284

intel_de_write(display, DDI_DP_COMP_CTL(pipe),

drivers/gpu/drm/i915/display/intel_dp_test.c

296

intel_de_write(display, DDI_DP_COMP_CTL(pipe), 0x0);

drivers/gpu/drm/i915/display/intel_dp_test.c

41

limits->pipe.min_bpp = bpp;

drivers/gpu/drm/i915/display/intel_dp_test.c

42

limits->pipe.max_bpp = bpp;

drivers/gpu/drm/i915/display/intel_dp_test.c

443

*pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

142

crtc->pipe,

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

342

pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

366

return state->inherited_dp_tunnels->ref[crtc->pipe].tunnel;

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

389

drm_dp_tunnel_ref_get(tunnel, &state->inherited_dp_tunnels->ref[crtc->pipe]);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

446

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

451

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

452

if (state->inherited_dp_tunnels->ref[pipe].tunnel)

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

453

drm_dp_tunnel_ref_put(&state->inherited_dp_tunnels->ref[pipe]);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

603

crtc->pipe,

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

607

crtc->pipe, required_rate);

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

638

crtc->pipe, 0);

drivers/gpu/drm/i915/display/intel_dpio_phy.c

1042

enum pipe pipe = to_intel_crtc(old_crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_dpio_phy.c

1048

if (pipe != PIPE_B) {

drivers/gpu/drm/i915/display/intel_dpio_phy.c

1137

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpio_phy.c

1144

if (pipe == PIPE_B)

drivers/gpu/drm/i915/display/intel_dpio_phy.c

687

enum dpio_phy vlv_pipe_to_phy(enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpio_phy.c

689

switch (pipe) {

drivers/gpu/drm/i915/display/intel_dpio_phy.c

691

MISSING_CASE(pipe);

drivers/gpu/drm/i915/display/intel_dpio_phy.c

701

enum dpio_channel vlv_pipe_to_channel(enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpio_phy.c

703

switch (pipe) {

drivers/gpu/drm/i915/display/intel_dpio_phy.c

705

MISSING_CASE(pipe);

drivers/gpu/drm/i915/display/intel_dpio_phy.c

875

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpio_phy.c

884

if (ch == DPIO_CH0 && pipe == PIPE_B)

drivers/gpu/drm/i915/display/intel_dpio_phy.c

896

if (pipe != PIPE_B) {

drivers/gpu/drm/i915/display/intel_dpio_phy.c

917

if (pipe == PIPE_B)

drivers/gpu/drm/i915/display/intel_dpio_phy.c

926

if (pipe == PIPE_B)

drivers/gpu/drm/i915/display/intel_dpio_phy.c

939

if (pipe == PIPE_B)

drivers/gpu/drm/i915/display/intel_dpio_phy.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_dpio_phy.h

122

static inline enum dpio_phy vlv_pipe_to_phy(enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpio_phy.h

126

static inline enum dpio_channel vlv_pipe_to_channel(enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpio_phy.h

47

enum dpio_phy vlv_pipe_to_phy(enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dpio_phy.h

48

enum dpio_channel vlv_pipe_to_channel(enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

1431

if (crtc->pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

1457

if (crtc->pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

1836

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

1843

assert_pps_unlocked(display, pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

1845

intel_de_write(display, FP0(pipe), hw_state->fp0);

drivers/gpu/drm/i915/display/intel_dpll.c

1846

intel_de_write(display, FP1(pipe), hw_state->fp1);

drivers/gpu/drm/i915/display/intel_dpll.c

1853

intel_de_write(display, DPLL(display, pipe),

drivers/gpu/drm/i915/display/intel_dpll.c

1855

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

drivers/gpu/drm/i915/display/intel_dpll.c

1858

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

1862

intel_de_write(display, DPLL_MD(display, pipe),

drivers/gpu/drm/i915/display/intel_dpll.c

1870

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

drivers/gpu/drm/i915/display/intel_dpll.c

1875

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

drivers/gpu/drm/i915/display/intel_dpll.c

1876

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

1915

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

1916

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

1917

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

1925

if (pipe == PIPE_B)

drivers/gpu/drm/i915/display/intel_dpll.c

1968

if (pipe == PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

1974

if (pipe == PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

1996

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

1998

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

drivers/gpu/drm/i915/display/intel_dpll.c

1999

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

2002

if (intel_de_wait_for_set_ms(display, DPLL(display, pipe), DPLL_LOCK_VLV, 1))

drivers/gpu/drm/i915/display/intel_dpll.c

2003

drm_err(display->drm, "DPLL %d failed to lock\n", pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2011

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2016

assert_pps_unlocked(display, pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2019

intel_de_write(display, DPLL(display, pipe),

drivers/gpu/drm/i915/display/intel_dpll.c

2027

intel_de_write(display, DPLL_MD(display, pipe), hw_state->dpll_md);

drivers/gpu/drm/i915/display/intel_dpll.c

2028

intel_de_posting_read(display, DPLL_MD(display, pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

2036

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2037

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2125

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2126

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2127

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2145

intel_de_write(display, DPLL(display, pipe), hw_state->dpll);

drivers/gpu/drm/i915/display/intel_dpll.c

2148

if (intel_de_wait_for_set_ms(display, DPLL(display, pipe), DPLL_LOCK_VLV, 1))

drivers/gpu/drm/i915/display/intel_dpll.c

2149

drm_err(display->drm, "PLL %d failed to lock\n", pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2157

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2162

assert_pps_unlocked(display, pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2165

intel_de_write(display, DPLL(display, pipe),

drivers/gpu/drm/i915/display/intel_dpll.c

2173

if (pipe != PIPE_A) {

drivers/gpu/drm/i915/display/intel_dpll.c

2180

intel_de_write(display, CBR4_VLV, CBR_DPLLBMD_PIPE(pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

2184

display->state.chv_dpll_md[pipe] = hw_state->dpll_md;

drivers/gpu/drm/i915/display/intel_dpll.c

2194

intel_de_write(display, DPLL_MD(display, pipe),

drivers/gpu/drm/i915/display/intel_dpll.c

2196

intel_de_posting_read(display, DPLL_MD(display, pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

2210

int vlv_force_pll_on(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_dpll.c

2213

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2220

crtc_state->cpu_transcoder = (enum transcoder)pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2238

void vlv_disable_pll(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpll.c

2243

assert_transcoder_disabled(display, (enum transcoder)pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2247

if (pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

2250

intel_de_write(display, DPLL(display, pipe), val);

drivers/gpu/drm/i915/display/intel_dpll.c

2251

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

2254

void chv_disable_pll(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpll.c

2256

enum dpio_channel ch = vlv_pipe_to_channel(pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2257

enum dpio_phy phy = vlv_pipe_to_phy(pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2261

assert_transcoder_disabled(display, (enum transcoder)pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2265

if (pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

2268

intel_de_write(display, DPLL(display, pipe), val);

drivers/gpu/drm/i915/display/intel_dpll.c

2269

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

2285

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

2294

intel_de_write(display, DPLL(display, pipe), DPLL_VGA_MODE_DIS);

drivers/gpu/drm/i915/display/intel_dpll.c

2295

intel_de_posting_read(display, DPLL(display, pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

2307

void vlv_force_pll_off(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpll.c

2310

chv_disable_pll(display, pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2312

vlv_disable_pll(display, pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

2317

enum pipe pipe, bool state)

drivers/gpu/drm/i915/display/intel_dpll.c

2321

cur_state = intel_de_read(display, DPLL(display, pipe)) & DPLL_VCO_ENABLE;

drivers/gpu/drm/i915/display/intel_dpll.c

2327

void assert_pll_enabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpll.c

2329

assert_pll(display, pipe, true);

drivers/gpu/drm/i915/display/intel_dpll.c

2332

void assert_pll_disabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_dpll.c

2334

assert_pll(display, pipe, false);

drivers/gpu/drm/i915/display/intel_dpll.c

401

if (display->platform.cherryview && crtc->pipe != PIPE_A)

drivers/gpu/drm/i915/display/intel_dpll.c

402

tmp = display->state.chv_dpll_md[crtc->pipe];

drivers/gpu/drm/i915/display/intel_dpll.c

405

DPLL_MD(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

410

hw_state->dpll = intel_de_read(display, DPLL(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

413

hw_state->fp0 = intel_de_read(display, FP0(crtc->pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

414

hw_state->fp1 = intel_de_read(display, FP1(crtc->pipe));

drivers/gpu/drm/i915/display/intel_dpll.c

478

enum pipe lvds_pipe;

drivers/gpu/drm/i915/display/intel_dpll.c

482

lvds_pipe == crtc->pipe) {

drivers/gpu/drm/i915/display/intel_dpll.c

520

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

521

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

548

enum dpio_channel ch = vlv_pipe_to_channel(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.c

549

enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_dpll.h

31

int vlv_force_pll_on(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_dpll.h

33

void vlv_force_pll_off(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dpll.h

36

void chv_disable_pll(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dpll.h

38

void vlv_disable_pll(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dpll.h

49

void assert_pll_enabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dpll.h

50

void assert_pll_disabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

445

drm_WARN_ON(display->drm, (dpll_state->pipe_mask & BIT(crtc->pipe)) != 0);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

447

dpll_state->pipe_mask |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

484

drm_WARN_ON(display->drm, (dpll_state->pipe_mask & BIT(crtc->pipe)) == 0);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

486

dpll_state->pipe_mask &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4930

pipe_mask = BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4935

pll->info->name, pipe_name(crtc->pipe), pll->active_mask);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4939

pll->info->name, pipe_name(crtc->pipe), pll->active_mask);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4981

u8 pipe_mask = BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4986

pll->info->name, pipe_name(crtc->pipe), pll->active_mask);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4993

pll->info->name, pipe_name(crtc->pipe), pll->state.pipe_mask);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

638

id = (enum intel_dpll_id) crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpt_common.c

17

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dpt_common.c

24

intel_de_rmw(display, PLANE_CHICKEN(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_drrs.c

138

frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);

drivers/gpu/drm/i915/display/intel_drrs.c

142

frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);

drivers/gpu/drm/i915/display/intel_dsb.c

1029

enum pipe pipe, enum intel_dsb_id dsb_id)

drivers/gpu/drm/i915/display/intel_dsb.c

1031

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_dsb.c

1034

tmp = intel_de_read_fw(display, DSB_INTERRUPT(pipe, dsb_id));

drivers/gpu/drm/i915/display/intel_dsb.c

1035

intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb_id), tmp);

drivers/gpu/drm/i915/display/intel_dsb.c

221

static bool is_dsb_busy(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_dsb.c

224

return intel_de_read_fw(display, DSB_CTRL(pipe, dsb_id)) & DSB_STATUS_BUSY;

drivers/gpu/drm/i915/display/intel_dsb.c

386

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

388

intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

396

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

398

intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

500

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

502

intel_dsb_reg_write(dsb, DSB_POLLMASK(pipe, dsb->id), mask);

drivers/gpu/drm/i915/display/intel_dsb.c

503

intel_dsb_reg_write(dsb, DSB_POLLFUNC(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

762

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

770

intel_dsb_reg_write(dsb, DSB_CTRL(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

773

intel_dsb_reg_write(dsb, DSB_CHICKEN(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

776

intel_dsb_reg_write(dsb, DSB_INTERRUPT(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

784

intel_dsb_reg_write(dsb, DSB_PMCTRL(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

788

intel_dsb_reg_write(dsb, DSB_PMCTRL(pipe, chained_dsb->id), 0);

drivers/gpu/drm/i915/display/intel_dsb.c

791

intel_dsb_reg_write(dsb, DSB_HEAD(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

794

intel_dsb_reg_write(dsb, DSB_TAIL(pipe, chained_dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

804

intel_dsb_reg_write_masked(dsb, DSB_PMCTRL_2(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

815

intel_dsb_reg_write_masked(dsb, DSB_PMCTRL_2(crtc->pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

878

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

883

if (is_dsb_busy(display, pipe, dsb->id)) {

drivers/gpu/drm/i915/display/intel_dsb.c

889

intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

892

intel_de_write_fw(display, DSB_CHICKEN(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

895

intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

899

intel_de_write_fw(display, DSB_PMCTRL(pipe, dsb->id), 0);

drivers/gpu/drm/i915/display/intel_dsb.c

901

intel_de_write_fw(display, DSB_HEAD(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

904

intel_de_write_fw(display, DSB_TAIL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

912

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dsb.c

916

ret = poll_timeout_us(is_busy = is_dsb_busy(display, pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

922

intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.c

928

intel_de_read_fw(display, DSB_CURRENT_HEAD(pipe, dsb->id)) - offset,

drivers/gpu/drm/i915/display/intel_dsb.c

929

intel_de_read_fw(display, DSB_HEAD(pipe, dsb->id)) - offset,

drivers/gpu/drm/i915/display/intel_dsb.c

930

intel_de_read_fw(display, DSB_TAIL(pipe, dsb->id)) - offset);

drivers/gpu/drm/i915/display/intel_dsb.c

941

intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), 0);

drivers/gpu/drm/i915/display/intel_dsb.c

943

intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id),

drivers/gpu/drm/i915/display/intel_dsb.h

19

enum pipe;

drivers/gpu/drm/i915/display/intel_dsb.h

75

enum pipe pipe, enum intel_dsb_id dsb_id);

drivers/gpu/drm/i915/display/intel_dsb_regs.h

13

#define DSBSL_INSTANCE(pipe, id) (_DSBSL_INSTANCE_BASE + \

drivers/gpu/drm/i915/display/intel_dsb_regs.h

14

(pipe) * 0x1000 + (id) * 0x100)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

15

#define DSB_HEAD(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x0)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

16

#define DSB_TAIL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x4)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

17

#define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

25

#define DSB_MMIOCTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0xc)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

31

#define DSB_POLLFUNC(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x10)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

37

#define DSB_DEBUG(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x14)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

38

#define DSB_POLLMASK(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x1c)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

39

#define DSB_STATUS(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x24)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

53

#define DSB_INTERRUPT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x28)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

66

#define DSB_CURRENT_HEAD(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x2c)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

67

#define DSB_RM_TIMEOUT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x30)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

74

#define DSB_RMTIMEOUTREG_CAPTURE(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x34)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

75

#define DSB_PMCTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x38)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

79

#define DSB_PMCTRL_2(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x3c)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

84

#define DSB_PF_LN_LOWER(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x40)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

85

#define DSB_PF_LN_UPPER(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x44)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

86

#define DSB_BUFRPT_CNT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x48)

drivers/gpu/drm/i915/display/intel_dsb_regs.h

87

#define DSB_CHICKEN(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0xf0)

drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c

164

enum pipe unused)

drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c

47

static u32 dcs_get_backlight(struct intel_connector *connector, enum pipe unused)

drivers/gpu/drm/i915/display/intel_dvo.c

148

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_dvo.c

156

*pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp);

drivers/gpu/drm/i915/display/intel_dvo.c

296

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_dvo.c

306

dvo_val |= DVO_PIPE_SEL(pipe);

drivers/gpu/drm/i915/display/intel_dvo.c

423

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_dvo.c

460

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/intel_dvo.c

461

dpll[pipe] = intel_de_rmw(display, DPLL(display, pipe), 0,

drivers/gpu/drm/i915/display/intel_dvo.c

467

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_dvo.c

468

intel_de_write(display, DPLL(display, pipe), dpll[pipe]);

drivers/gpu/drm/i915/display/intel_dvo_regs.h

17

#define DVO_PIPE_SEL(pipe) REG_FIELD_PREP(DVO_PIPE_SEL_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_fbc.c

130

static struct intel_fbc *intel_fbc_for_pipe(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

132

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fbc.c

1557

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

1856

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

1916

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

2097

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

2119

if (!fbc || plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_fbc.c

2152

intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, fbc->state.plane->pipe));

drivers/gpu/drm/i915/display/intel_fbc.c

2244

enum pipe pipe, bool log)

drivers/gpu/drm/i915/display/intel_fbc.c

2246

struct intel_fbc *fbc = intel_fbc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fbc.c

2261

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_fbc.h

12

enum pipe;

drivers/gpu/drm/i915/display/intel_fbc.h

51

enum pipe, bool log);

drivers/gpu/drm/i915/display/intel_fdi.c

1004

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

1008

temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;

drivers/gpu/drm/i915/display/intel_fdi.c

101

enum pipe pipe, bool state)

drivers/gpu/drm/i915/display/intel_fdi.c

1020

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

1033

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

1036

intel_de_rmw(display, FDI_RX_CTL(pipe), FDI_PCDCLK, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

1039

intel_de_rmw(display, FDI_TX_CTL(pipe), FDI_TX_PLL_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

1040

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

1044

intel_de_rmw(display, FDI_RX_CTL(pipe), FDI_RX_PLL_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

1045

intel_de_posting_read(display, FDI_RX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

105

cur_state = intel_de_read(display, FDI_RX_CTL(pipe)) & FDI_RX_PLL_ENABLE;

drivers/gpu/drm/i915/display/intel_fdi.c

1052

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

1057

intel_de_rmw(display, FDI_TX_CTL(pipe), FDI_TX_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

1058

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

1060

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

1063

temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;

drivers/gpu/drm/i915/display/intel_fdi.c

1071

intel_de_write(display, FDI_RX_CHICKEN(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

1075

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

1078

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

1089

temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;

drivers/gpu/drm/i915/display/intel_fdi.c

111

void assert_fdi_rx_pll_enabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fdi.c

113

assert_fdi_rx_pll(display, pipe, true);

drivers/gpu/drm/i915/display/intel_fdi.c

116

void assert_fdi_rx_pll_disabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fdi.c

118

assert_fdi_rx_pll(display, pipe, false);

drivers/gpu/drm/i915/display/intel_fdi.c

185

static int ilk_check_fdi_lanes(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_fdi.c

187

enum pipe *pipe_to_reduce)

drivers/gpu/drm/i915/display/intel_fdi.c

193

*pipe_to_reduce = pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

197

pipe_name(pipe), pipe_config->fdi_lanes);

drivers/gpu/drm/i915/display/intel_fdi.c

201

pipe_name(pipe), pipe_config->fdi_lanes);

drivers/gpu/drm/i915/display/intel_fdi.c

220

switch (pipe) {

drivers/gpu/drm/i915/display/intel_fdi.c

236

pipe_name(pipe), pipe_config->fdi_lanes);

drivers/gpu/drm/i915/display/intel_fdi.c

244

pipe_name(pipe), pipe_config->fdi_lanes);

drivers/gpu/drm/i915/display/intel_fdi.c

264

MISSING_CASE(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

30

enum pipe pipe, bool state)

drivers/gpu/drm/i915/display/intel_fdi.c

333

enum pipe pipe_to_reduce;

drivers/gpu/drm/i915/display/intel_fdi.c

336

ret = ilk_check_fdi_lanes(display, crtc->pipe, pipe_config,

drivers/gpu/drm/i915/display/intel_fdi.c

41

enum transcoder cpu_transcoder = (enum transcoder)pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

419

switch (crtc->pipe) {

drivers/gpu/drm/i915/display/intel_fdi.c

434

MISSING_CASE(crtc->pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

441

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

446

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

45

cur_state = intel_de_read(display, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE;

drivers/gpu/drm/i915/display/intel_fdi.c

457

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

482

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

490

intel_de_write(display, FDI_RX_TUSIZE1(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

491

intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK);

drivers/gpu/drm/i915/display/intel_fdi.c

498

reg = FDI_RX_IMR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

507

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

515

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

52

void assert_fdi_tx_enabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fdi.c

525

intel_de_write(display, FDI_RX_CHICKEN(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

527

intel_de_write(display, FDI_RX_CHICKEN(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

530

reg = FDI_RX_IIR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

54

assert_fdi_tx(display, pipe, true);

drivers/gpu/drm/i915/display/intel_fdi.c

545

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

547

intel_de_rmw(display, FDI_RX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

549

intel_de_posting_read(display, FDI_RX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

552

reg = FDI_RX_IIR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

57

void assert_fdi_tx_disabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fdi.c

583

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

59

assert_fdi_tx(display, pipe, false);

drivers/gpu/drm/i915/display/intel_fdi.c

591

intel_de_write(display, FDI_RX_TUSIZE1(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

592

intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK);

drivers/gpu/drm/i915/display/intel_fdi.c

596

reg = FDI_RX_IMR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

606

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

617

intel_de_write(display, FDI_RX_MISC(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

620

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

63

enum pipe pipe, bool state)

drivers/gpu/drm/i915/display/intel_fdi.c

635

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

637

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

641

reg = FDI_RX_IIR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

660

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

67

cur_state = intel_de_read(display, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE;

drivers/gpu/drm/i915/display/intel_fdi.c

671

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

686

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

688

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

692

reg = FDI_RX_IIR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

718

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.c

728

intel_de_write(display, FDI_RX_TUSIZE1(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

729

intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK);

drivers/gpu/drm/i915/display/intel_fdi.c

73

void assert_fdi_rx_enabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fdi.c

733

reg = FDI_RX_IMR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

743

intel_de_read(display, FDI_RX_IIR(pipe)));

drivers/gpu/drm/i915/display/intel_fdi.c

748

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

75

assert_fdi_rx(display, pipe, true);

drivers/gpu/drm/i915/display/intel_fdi.c

754

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

762

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

772

intel_de_write(display, FDI_RX_MISC(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

775

reg = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

78

void assert_fdi_rx_disabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fdi.c

785

reg = FDI_RX_IIR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

80

assert_fdi_rx(display, pipe, false);

drivers/gpu/drm/i915/display/intel_fdi.c

807

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

810

intel_de_rmw(display, FDI_RX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

813

intel_de_posting_read(display, FDI_RX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

817

reg = FDI_RX_IIR(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

83

void assert_fdi_tx_pll_enabled(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fdi.c

95

cur_state = intel_de_read(display, FDI_TX_CTL(pipe)) & FDI_TX_PLL_ENABLE;

drivers/gpu/drm/i915/display/intel_fdi.c

999

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fdi.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_fdi.h

40

void assert_fdi_tx_enabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_fdi.h

41

void assert_fdi_tx_disabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_fdi.h

42

void assert_fdi_rx_enabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_fdi.h

43

void assert_fdi_rx_disabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_fdi.h

44

void assert_fdi_tx_pll_enabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_fdi.h

45

void assert_fdi_rx_pll_enabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_fdi.h

46

void assert_fdi_rx_pll_disabled(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_fdi_regs.h

119

#define FDI_RX_MISC(pipe) _MMIO_PIPE(pipe, _FDI_RXA_MISC, _FDI_RXB_MISC)

drivers/gpu/drm/i915/display/intel_fdi_regs.h

125

#define FDI_RX_TUSIZE1(pipe) _MMIO_PIPE(pipe, _FDI_RXA_TUSIZE1, _FDI_RXB_TUSIZE1)

drivers/gpu/drm/i915/display/intel_fdi_regs.h

126

#define FDI_RX_TUSIZE2(pipe) _MMIO_PIPE(pipe, _FDI_RXA_TUSIZE2, _FDI_RXB_TUSIZE2)

drivers/gpu/drm/i915/display/intel_fdi_regs.h

145

#define FDI_RX_IIR(pipe) _MMIO_PIPE(pipe, _FDI_RXA_IIR, _FDI_RXB_IIR)

drivers/gpu/drm/i915/display/intel_fdi_regs.h

146

#define FDI_RX_IMR(pipe) _MMIO_PIPE(pipe, _FDI_RXA_IMR, _FDI_RXB_IMR)

drivers/gpu/drm/i915/display/intel_fdi_regs.h

28

#define FDI_RX_CHICKEN(pipe) _MMIO_PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)

drivers/gpu/drm/i915/display/intel_fdi_regs.h

33

#define FDI_TX_CTL(pipe) _MMIO_PIPE(pipe, _FDI_TXA_CTL, _FDI_TXB_CTL)

drivers/gpu/drm/i915/display/intel_fdi_regs.h

83

#define FDI_RX_CTL(pipe) _MMIO_PIPE(pipe, _FDI_RXA_CTL, _FDI_RXB_CTL)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

100

log_underrun_dbg1(display, pipe, REG_FIELD_GET(UNDERRUN_DDB_EMPTY_MASK, val),

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

102

log_underrun_dbg1(display, pipe, REG_FIELD_GET(UNDERRUN_DBUF_NOT_FILLED_MASK, val),

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

104

log_underrun_dbg1(display, pipe, REG_FIELD_GET(UNDERRUN_BELOW_WM0_MASK, val),

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

108

static void read_underrun_dbg2(struct intel_display *display, enum pipe pipe, bool log)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

110

u32 val = intel_de_read(display, UNDERRUN_DBG2(pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

115

intel_de_write(display, UNDERRUN_DBG2(pipe), UNDERRUN_FRAME_LINE_COUNTERS_FROZEN);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

120

pipe_name(pipe),

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

144

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

150

read_underrun_dbg1(display, pipe, log);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

151

read_underrun_dbg2(display, pipe, log);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

152

intel_fbc_read_underrun_dbg_info(display, pipe, log);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

159

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

163

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

164

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

175

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

180

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

181

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

193

i915_reg_t reg = PIPESTAT(display, crtc->pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

201

enable_mask = i915_pipestat_enable_mask(display, crtc->pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

205

trace_intel_cpu_fifo_underrun(display, crtc->pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

206

drm_err(display->drm, "pipe %c underrun\n", pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

210

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

213

i915_reg_t reg = PIPESTAT(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

218

u32 enable_mask = i915_pipestat_enable_mask(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

226

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

231

enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

233

u32 bit = (pipe == PIPE_A) ?

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

245

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

250

if ((err_int & ERR_INT_FIFO_UNDERRUN(pipe)) == 0)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

253

intel_de_write(display, GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

256

trace_intel_cpu_fifo_underrun(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

257

drm_err(display->drm, "fifo underrun on pipe %c\n", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

261

enum pipe pipe, bool enable,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

266

ERR_INT_FIFO_UNDERRUN(pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

276

intel_de_read(display, GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe)) {

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

279

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

285

enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

288

bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_FIFO_UNDERRUN);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

290

bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_FIFO_UNDERRUN);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

294

enum pipe pch_transcoder,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

309

enum pipe pch_transcoder = crtc->pipe;

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

327

enum pipe pch_transcoder,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

351

enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

353

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

370

read_underrun_dbg_info(display, pipe, false);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

373

i9xx_set_fifo_underrun_reporting(display, pipe, enable, old);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

375

ilk_set_fifo_underrun_reporting(display, pipe, enable);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

377

ivb_set_fifo_underrun_reporting(display, pipe, enable, old);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

379

bdw_set_fifo_underrun_reporting(display, pipe, enable);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

401

enum pipe pipe, bool enable)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

407

ret = __intel_set_cpu_fifo_underrun_reporting(display, pipe, enable);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

428

enum pipe pch_transcoder,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

472

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

474

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

485

if (intel_set_cpu_fifo_underrun_reporting(display, pipe, false)) {

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

486

trace_intel_cpu_fifo_underrun(display, pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

488

drm_err(display->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

490

read_underrun_dbg_info(display, pipe, true);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

506

enum pipe pch_transcoder)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

584

if (intel_has_pch_trancoder(display, crtc->pipe))

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

64

static void log_underrun_dbg1(struct intel_display *display, enum pipe pipe,

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

81

pipe_name(pipe), info, seq_buf_str(&planes_desc));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

86

static void read_underrun_dbg1(struct intel_display *display, enum pipe pipe, bool log)

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

88

u32 val = intel_de_read(display, UNDERRUN_DBG1(pipe));

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

93

intel_de_write(display, UNDERRUN_DBG1(pipe), val);

drivers/gpu/drm/i915/display/intel_fifo_underrun.c

98

log_underrun_dbg1(display, pipe, REG_FIELD_GET(UNDERRUN_DBUF_BLOCK_NOT_VALID_MASK, val),

drivers/gpu/drm/i915/display/intel_fifo_underrun.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_fifo_underrun.h

18

enum pipe pipe, bool enable);

drivers/gpu/drm/i915/display/intel_fifo_underrun.h

20

enum pipe pch_transcoder,

drivers/gpu/drm/i915/display/intel_fifo_underrun.h

23

enum pipe pipe);

drivers/gpu/drm/i915/display/intel_fifo_underrun.h

25

enum pipe pch_transcoder);

drivers/gpu/drm/i915/display/intel_flipq.c

162

intel_de_rmw(display, PIPEDMC_FQ_CTRL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

167

PIPEDMC_FQ_STATUS(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

178

return intel_de_read(display, PIPEDMC_FPQ_CHP(crtc->pipe, flipq_id));

drivers/gpu/drm/i915/display/intel_flipq.c

185

intel_de_write(display, PIPEDMC_FPQ_ATOMIC_TP(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

197

intel_de_write(display, PIPEDMC_FPQ_CTL1(crtc->pipe), PIPEDMC_SW_DMC_WAKE);

drivers/gpu/drm/i915/display/intel_flipq.c

229

intel_de_read(display, PIPEDMC_FPQ_CHP(crtc->pipe, flipq_id)),

drivers/gpu/drm/i915/display/intel_flipq.c

230

intel_de_read(display, PIPEDMC_FPQ_HP(crtc->pipe, flipq_id)));

drivers/gpu/drm/i915/display/intel_flipq.c

240

intel_de_read(display, PIPEDMC_FPQ_TS(crtc->pipe)));

drivers/gpu/drm/i915/display/intel_flipq.c

242

tmp = intel_de_read(display, PIPEDMC_FPQ_ATOMIC_TP(crtc->pipe));

drivers/gpu/drm/i915/display/intel_flipq.c

254

void intel_flipq_reset(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_flipq.c

256

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_flipq.c

259

intel_de_write(display, PIPEDMC_FQ_CTRL(pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

261

intel_de_write(display, PIPEDMC_SCANLINECMPLOWER(pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

262

intel_de_write(display, PIPEDMC_SCANLINECMPUPPER(pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

267

intel_de_write(display, PIPEDMC_FPQ_HP(pipe, flipq_id), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

268

intel_de_write(display, PIPEDMC_FPQ_CHP(pipe, flipq_id), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

273

intel_de_write(display, PIPEDMC_FPQ_ATOMIC_TP(pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

302

intel_de_write(display, PIPEDMC_SCANLINECMPUPPER(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

304

intel_de_write(display, PIPEDMC_SCANLINECMPLOWER(crtc->pipe),

drivers/gpu/drm/i915/display/intel_flipq.c

310

intel_de_write(display, PIPEDMC_FQ_CTRL(crtc->pipe), PIPEDMC_FQ_CTRL_ENABLE);

drivers/gpu/drm/i915/display/intel_flipq.c

320

intel_de_write(display, PIPEDMC_FQ_CTRL(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

324

intel_de_write(display, PIPEDMC_SCANLINECMPLOWER(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

325

intel_de_write(display, PIPEDMC_SCANLINECMPUPPER(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.c

433

pts += intel_de_read(display, PIPEDMC_FPQ_TS(crtc->pipe));

drivers/gpu/drm/i915/display/intel_flipq.c

471

intel_dsb_reg_write(dsb, PIPEDMC_CTL(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_flipq.h

13

enum pipe;

drivers/gpu/drm/i915/display/intel_flipq.h

21

void intel_flipq_reset(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_frontbuffer.h

58

#define INTEL_FRONTBUFFER(pipe, plane_id) \

drivers/gpu/drm/i915/display/intel_frontbuffer.h

59

BIT((plane_id) + INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe));

drivers/gpu/drm/i915/display/intel_frontbuffer.h

60

#define INTEL_FRONTBUFFER_OVERLAY(pipe) \

drivers/gpu/drm/i915/display/intel_frontbuffer.h

61

BIT(INTEL_FRONTBUFFER_BITS_PER_PIPE - 1 + INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe))

drivers/gpu/drm/i915/display/intel_frontbuffer.h

62

#define INTEL_FRONTBUFFER_ALL_MASK(pipe) \

drivers/gpu/drm/i915/display/intel_frontbuffer.h

63

GENMASK(INTEL_FRONTBUFFER_BITS_PER_PIPE * ((pipe) + 1) - 1, \

drivers/gpu/drm/i915/display/intel_frontbuffer.h

64

INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe))

drivers/gpu/drm/i915/display/intel_gvt_api.c

12

u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_gvt_api.c

14

return INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe);

drivers/gpu/drm/i915/display/intel_gvt_api.c

24

u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_gvt_api.c

26

return INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe);

drivers/gpu/drm/i915/display/intel_gvt_api.c

36

bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_gvt_api.c

38

if (pipe < PIPE_A || pipe >= I915_MAX_PIPES)

drivers/gpu/drm/i915/display/intel_gvt_api.c

41

return DISPLAY_RUNTIME_INFO(display)->pipe_mask & BIT(pipe);

drivers/gpu/drm/i915/display/intel_gvt_api.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_gvt_api.h

15

u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_gvt_api.h

17

u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_gvt_api.h

19

bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_hdcp_regs.h

238

#define PIPE_HDCP2_STREAM_STATUS(pipe) _MMIO(_PICK((pipe), \

drivers/gpu/drm/i915/display/intel_hdmi.c

1008

reg = VLV_TVIDEO_DIP_GCP(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1010

reg = TVIDEO_DIP_GCP(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1033

reg = VLV_TVIDEO_DIP_GCP(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1035

reg = TVIDEO_DIP_GCP(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1073

i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1131

i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1180

i915_reg_t reg = VLV_TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

1523

PIPEDSL(display, crtc->pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

302

i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

317

intel_de_write(display, TVIDEO_DIP_DATA(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

323

intel_de_write(display, TVIDEO_DIP_DATA(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_hdmi.c

343

intel_de_rmw(display, TVIDEO_DIP_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

347

*data++ = intel_de_read(display, TVIDEO_DIP_DATA(crtc->pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

354

enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_hdmi.c

355

i915_reg_t reg = TVIDEO_DIP_CTL(pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

377

i915_reg_t reg = TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

395

intel_de_write(display, TVIDEO_DIP_DATA(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

401

intel_de_write(display, TVIDEO_DIP_DATA(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_hdmi.c

421

intel_de_rmw(display, TVIDEO_DIP_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

425

*data++ = intel_de_read(display, TVIDEO_DIP_DATA(crtc->pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

432

enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_hdmi.c

433

u32 val = intel_de_read(display, TVIDEO_DIP_CTL(pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

451

i915_reg_t reg = VLV_TVIDEO_DIP_CTL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_hdmi.c

467

VLV_TVIDEO_DIP_DATA(crtc->pipe), *data);

drivers/gpu/drm/i915/display/intel_hdmi.c

473

VLV_TVIDEO_DIP_DATA(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_hdmi.c

493

intel_de_rmw(display, VLV_TVIDEO_DIP_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/intel_hdmi.c

498

VLV_TVIDEO_DIP_DATA(crtc->pipe));

drivers/gpu/drm/i915/display/intel_hdmi.c

505

enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_hdmi.c

506

u32 val = intel_de_read(display, VLV_TVIDEO_DIP_CTL(pipe));

drivers/gpu/drm/i915/display/intel_initial_plane.c

168

&plane_configs[crtc->pipe];

drivers/gpu/drm/i915/display/intel_initial_plane.c

42

if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base)

drivers/gpu/drm/i915/display/intel_initial_plane.c

75

struct intel_initial_plane_config *plane_config = &plane_configs[crtc->pipe];

drivers/gpu/drm/i915/display/intel_link_bw.c

107

enum pipe max_bpp_pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_link_bw.c

115

if (limits->bpp_limit_reached_pipes & BIT(crtc->pipe))

drivers/gpu/drm/i915/display/intel_link_bw.c

140

max_bpp_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_link_bw.c

218

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_link_bw.c

222

if (pipe == INVALID_PIPE)

drivers/gpu/drm/i915/display/intel_link_bw.c

225

if (new_limits->max_bpp_x16[pipe] ==

drivers/gpu/drm/i915/display/intel_link_bw.c

226

old_limits->max_bpp_x16[pipe])

drivers/gpu/drm/i915/display/intel_link_bw.c

230

new_limits->bpp_limit_reached_pipes & BIT(pipe)))

drivers/gpu/drm/i915/display/intel_link_bw.c

233

new_limits->max_bpp_x16[pipe] =

drivers/gpu/drm/i915/display/intel_link_bw.c

234

old_limits->max_bpp_x16[pipe];

drivers/gpu/drm/i915/display/intel_link_bw.c

235

new_limits->bpp_limit_reached_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_link_bw.c

267

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_link_bw.c

275

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_link_bw.c

278

new_limits->max_bpp_x16[pipe] >

drivers/gpu/drm/i915/display/intel_link_bw.c

279

old_limits->max_bpp_x16[pipe]))

drivers/gpu/drm/i915/display/intel_link_bw.c

282

if (new_limits->max_bpp_x16[pipe] <

drivers/gpu/drm/i915/display/intel_link_bw.c

283

old_limits->max_bpp_x16[pipe])

drivers/gpu/drm/i915/display/intel_link_bw.c

57

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_link_bw.c

61

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/intel_link_bw.c

62

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_link_bw.c

68

limits->max_bpp_x16[pipe] = crtc_state->max_link_bpp_x16;

drivers/gpu/drm/i915/display/intel_link_bw.c

70

limits->link_dsc_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/intel_link_bw.c

72

limits->max_bpp_x16[pipe] = INT_MAX;

drivers/gpu/drm/i915/display/intel_link_bw.c

76

limits->max_bpp_x16[pipe] = min(limits->max_bpp_x16[pipe], forced_bpp_x16);

drivers/gpu/drm/i915/display/intel_link_bw.h

34

enum pipe pipe);

drivers/gpu/drm/i915/display/intel_lpe_audio.c

123

pdata->port[0].pipe = -1;

drivers/gpu/drm/i915/display/intel_lpe_audio.c

124

pdata->port[1].pipe = -1;

drivers/gpu/drm/i915/display/intel_lpe_audio.c

125

pdata->port[2].pipe = -1;

drivers/gpu/drm/i915/display/intel_lpe_audio.c

345

ppdata->pipe = cpu_transcoder;

drivers/gpu/drm/i915/display/intel_lpe_audio.c

354

ppdata->pipe = -1;

drivers/gpu/drm/i915/display/intel_lvds.c

104

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_lvds.c

115

ret = intel_lvds_port_enabled(display, lvds_encoder->reg, pipe);

drivers/gpu/drm/i915/display/intel_lvds.c

247

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_lvds.c

251

assert_fdi_rx_pll_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_lvds.c

254

assert_pll_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_lvds.c

264

temp |= LVDS_PIPE_SEL_CPT(pipe);

drivers/gpu/drm/i915/display/intel_lvds.c

267

temp |= LVDS_PIPE_SEL(pipe);

drivers/gpu/drm/i915/display/intel_lvds.c

430

if (DISPLAY_VER(display) < 4 && crtc->pipe == 0) {

drivers/gpu/drm/i915/display/intel_lvds.c

88

i915_reg_t lvds_reg, enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_lvds.c

96

*pipe = REG_FIELD_GET(LVDS_PIPE_SEL_MASK_CPT, val);

drivers/gpu/drm/i915/display/intel_lvds.c

98

*pipe = REG_FIELD_GET(LVDS_PIPE_SEL_MASK, val);

drivers/gpu/drm/i915/display/intel_lvds.h

13

enum pipe;

drivers/gpu/drm/i915/display/intel_lvds.h

18

i915_reg_t lvds_reg, enum pipe *pipe);

drivers/gpu/drm/i915/display/intel_lvds.h

24

i915_reg_t lvds_reg, enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_lvds_regs.h

20

#define LVDS_PIPE_SEL(pipe) REG_FIELD_PREP(LVDS_PIPE_SEL_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_lvds_regs.h

22

#define LVDS_PIPE_SEL_CPT(pipe) REG_FIELD_PREP(LVDS_PIPE_SEL_MASK_CPT, (pipe))

drivers/gpu/drm/i915/display/intel_modeset_setup.c

164

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

182

intel_pmdemand_update_port_clock(display, pmdemand_state, pipe, 0);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

206

pipes |= BIT(temp_crtc->pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

227

*master_pipe_mask = BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

382

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

384

if (!plane->get_hw_state(plane, &pipe))

drivers/gpu/drm/i915/display/intel_modeset_setup.c

387

if (pipe == crtc->pipe)

drivers/gpu/drm/i915/display/intel_modeset_setup.c

394

plane_crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

49

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

596

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_modeset_setup.c

667

enum pipe pipe = PIPE_A;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

670

visible = plane->get_hw_state(plane, &pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

672

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

680

str_enabled_disabled(visible), pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_modeset_setup.c

695

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

727

pipe = 0;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

729

if (encoder->get_hw_state(encoder, &pipe)) {

drivers/gpu/drm/i915/display/intel_modeset_setup.c

730

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/intel_modeset_setup.c

75

BIT(pipe) |

drivers/gpu/drm/i915/display/intel_modeset_setup.c

770

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_modeset_setup.c

873

intel_pmdemand_update_port_clock(display, pmdemand_state, pipe,

drivers/gpu/drm/i915/display/intel_modeset_verify.c

123

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_modeset_verify.c

155

active = encoder->get_hw_state(encoder, &pipe);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

158

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_modeset_verify.c

201

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_modeset_verify.c

204

active = encoder->get_hw_state(encoder, &pipe);

drivers/gpu/drm/i915/display/intel_modeset_verify.c

210

INTEL_DISPLAY_STATE_WARN(display, active && primary_crtc->pipe != pipe,

drivers/gpu/drm/i915/display/intel_modeset_verify.c

212

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_overlay.c

296

enum pipe pipe = overlay->crtc->pipe;

drivers/gpu/drm/i915/display/intel_overlay.c

305

INTEL_FRONTBUFFER_OVERLAY(pipe));

drivers/gpu/drm/i915/display/intel_overlay.c

367

intel_frontbuffer_flip(display, INTEL_FRONTBUFFER_OVERLAY(overlay->crtc->pipe));

drivers/gpu/drm/i915/display/intel_overlay.c

803

enum pipe pipe = overlay->crtc->pipe;

drivers/gpu/drm/i915/display/intel_overlay.c

835

oconfig |= pipe == 0 ?

drivers/gpu/drm/i915/display/intel_pch_display.c

100

assert_pch_hdmi_disabled(display, pipe, PORT_B, PCH_HDMIB);

drivers/gpu/drm/i915/display/intel_pch_display.c

101

assert_pch_hdmi_disabled(display, pipe, PORT_C, PCH_HDMIC);

drivers/gpu/drm/i915/display/intel_pch_display.c

102

assert_pch_hdmi_disabled(display, pipe, PORT_D, PCH_HDMID);

drivers/gpu/drm/i915/display/intel_pch_display.c

106

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_pch_display.c

111

val = intel_de_read(display, PCH_TRANSCONF(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

115

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

183

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

186

PCH_TRANS_DATA_M1(pipe), PCH_TRANS_DATA_N1(pipe),

drivers/gpu/drm/i915/display/intel_pch_display.c

187

PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

194

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

197

PCH_TRANS_DATA_M2(pipe), PCH_TRANS_DATA_N2(pipe),

drivers/gpu/drm/i915/display/intel_pch_display.c

198

PCH_TRANS_LINK_M2(pipe), PCH_TRANS_LINK_N2(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

205

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

208

PCH_TRANS_DATA_M1(pipe), PCH_TRANS_DATA_N1(pipe),

drivers/gpu/drm/i915/display/intel_pch_display.c

209

PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

216

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

219

PCH_TRANS_DATA_M2(pipe), PCH_TRANS_DATA_N2(pipe),

drivers/gpu/drm/i915/display/intel_pch_display.c

220

PCH_TRANS_LINK_M2(pipe), PCH_TRANS_LINK_N2(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

224

enum pipe pch_transcoder)

drivers/gpu/drm/i915/display/intel_pch_display.c

250

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

258

assert_fdi_tx_enabled(display, pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

259

assert_fdi_rx_enabled(display, pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

26

enum pipe pch_transcoder)

drivers/gpu/drm/i915/display/intel_pch_display.c

262

reg = TRANS_CHICKEN2(pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

275

reg = PCH_TRANSCONF(pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

277

pipeconf_val = intel_de_read(display, TRANSCONF(display, pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

310

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

316

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

32

enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)

drivers/gpu/drm/i915/display/intel_pch_display.c

320

assert_fdi_tx_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

321

assert_fdi_rx_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

324

assert_pch_ports_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

326

reg = PCH_TRANSCONF(pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

331

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

335

intel_de_rmw(display, TRANS_CHICKEN2(pipe),

drivers/gpu/drm/i915/display/intel_pch_display.c

367

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

370

assert_pch_transcoder_disabled(display, pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

383

temp |= TRANS_DPLL_ENABLE(pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

384

sel = TRANS_DPLLB_SEL(pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

39

return crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

405

assert_pps_unlocked(display, pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

410

ilk_pch_transcoder_set_timings(crtc_state, pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

419

u32 bpc = (intel_de_read(display, TRANSCONF(display, pipe))

drivers/gpu/drm/i915/display/intel_pch_display.c

421

i915_reg_t reg = TRANS_DP_CTL(pipe);

drivers/gpu/drm/i915/display/intel_pch_display.c

43

enum pipe pipe, enum port port,

drivers/gpu/drm/i915/display/intel_pch_display.c

459

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

46

enum pipe port_pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

465

intel_de_rmw(display, TRANS_DP_CTL(pipe),

drivers/gpu/drm/i915/display/intel_pch_display.c

471

TRANS_DPLL_ENABLE(pipe) | TRANS_DPLLB_SEL(pipe), 0);

drivers/gpu/drm/i915/display/intel_pch_display.c

501

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

506

if ((intel_de_read(display, PCH_TRANSCONF(pipe)) & TRANS_ENABLE) == 0)

drivers/gpu/drm/i915/display/intel_pch_display.c

51

INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe,

drivers/gpu/drm/i915/display/intel_pch_display.c

511

tmp = intel_de_read(display, FDI_RX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

523

pll_id = (enum intel_dpll_id) pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

526

if (tmp & TRANS_DPLLB_SEL(pipe))

drivers/gpu/drm/i915/display/intel_pch_display.c

53

port_name(port), pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

554

assert_fdi_tx_enabled(display, (enum pipe)cpu_transcoder);

drivers/gpu/drm/i915/display/intel_pch_display.c

62

enum pipe pipe, enum port port,

drivers/gpu/drm/i915/display/intel_pch_display.c

65

enum pipe port_pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

70

INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe,

drivers/gpu/drm/i915/display/intel_pch_display.c

72

port_name(port), pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

81

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_pch_display.c

83

enum pipe port_pipe;

drivers/gpu/drm/i915/display/intel_pch_display.c

85

assert_pch_dp_disabled(display, pipe, PORT_B, PCH_DP_B);

drivers/gpu/drm/i915/display/intel_pch_display.c

86

assert_pch_dp_disabled(display, pipe, PORT_C, PCH_DP_C);

drivers/gpu/drm/i915/display/intel_pch_display.c

87

assert_pch_dp_disabled(display, pipe, PORT_D, PCH_DP_D);

drivers/gpu/drm/i915/display/intel_pch_display.c

90

intel_crt_port_enabled(display, PCH_ADPA, &port_pipe) && port_pipe == pipe,

drivers/gpu/drm/i915/display/intel_pch_display.c

92

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

95

intel_lvds_port_enabled(display, PCH_LVDS, &port_pipe) && port_pipe == pipe,

drivers/gpu/drm/i915/display/intel_pch_display.c

97

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pch_display.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_pch_display.h

20

enum pipe pch_transcoder);

drivers/gpu/drm/i915/display/intel_pch_display.h

21

enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);

drivers/gpu/drm/i915/display/intel_pch_display.h

47

enum pipe pch_transcoder)

drivers/gpu/drm/i915/display/intel_pfit.c

528

pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY;

drivers/gpu/drm/i915/display/intel_pfit.c

576

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pfit.c

590

intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE |

drivers/gpu/drm/i915/display/intel_pfit.c

591

PF_FILTER_MED_3x3 | PF_PIPE_SEL_IVB(pipe));

drivers/gpu/drm/i915/display/intel_pfit.c

593

intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE |

drivers/gpu/drm/i915/display/intel_pfit.c

595

intel_de_write_fw(display, PF_WIN_POS(pipe),

drivers/gpu/drm/i915/display/intel_pfit.c

597

intel_de_write_fw(display, PF_WIN_SZ(pipe),

drivers/gpu/drm/i915/display/intel_pfit.c

605

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pfit.c

614

intel_de_write_fw(display, PF_CTL(pipe), 0);

drivers/gpu/drm/i915/display/intel_pfit.c

615

intel_de_write_fw(display, PF_WIN_POS(pipe), 0);

drivers/gpu/drm/i915/display/intel_pfit.c

616

intel_de_write_fw(display, PF_WIN_SZ(pipe), 0);

drivers/gpu/drm/i915/display/intel_pfit.c

624

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_pfit.c

626

ctl = intel_de_read(display, PF_CTL(crtc->pipe));

drivers/gpu/drm/i915/display/intel_pfit.c

631

pipe = REG_FIELD_GET(PF_PIPE_SEL_MASK_IVB, ctl);

drivers/gpu/drm/i915/display/intel_pfit.c

633

pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pfit.c

637

pos = intel_de_read(display, PF_WIN_POS(crtc->pipe));

drivers/gpu/drm/i915/display/intel_pfit.c

638

size = intel_de_read(display, PF_WIN_SZ(crtc->pipe));

drivers/gpu/drm/i915/display/intel_pfit.c

651

drm_WARN_ON(display->drm, pipe != crtc->pipe);

drivers/gpu/drm/i915/display/intel_pfit.c

679

intel_de_write(display, BCLRPAT(display, crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_pfit.c

709

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_pfit.c

721

pipe = REG_FIELD_GET(PFIT_PIPE_MASK, tmp);

drivers/gpu/drm/i915/display/intel_pfit.c

723

pipe = PIPE_B;

drivers/gpu/drm/i915/display/intel_pfit.c

725

if (pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_pfit.c

90

max_src_w = crtc->pipe == PIPE_A ? 4096 : 2048;

drivers/gpu/drm/i915/display/intel_pfit_regs.h

13

#define PFIT_PIPE(pipe) REG_FIELD_PREP(PFIT_PIPE_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_pfit_regs.h

45

#define PF_CTL(pipe) _MMIO_PIPE(pipe, _PFA_CTL_1, _PFB_CTL_1)

drivers/gpu/drm/i915/display/intel_pfit_regs.h

48

#define PF_PIPE_SEL_IVB(pipe) REG_FIELD_PREP(PF_PIPE_SEL_MASK_IVB, (pipe))

drivers/gpu/drm/i915/display/intel_pfit_regs.h

57

#define PF_WIN_SZ(pipe) _MMIO_PIPE(pipe, _PFA_WIN_SZ, _PFB_WIN_SZ)

drivers/gpu/drm/i915/display/intel_pfit_regs.h

65

#define PF_WIN_POS(pipe) _MMIO_PIPE(pipe, _PFA_WIN_POS, _PFB_WIN_POS)

drivers/gpu/drm/i915/display/intel_pfit_regs.h

73

#define PF_VSCALE(pipe) _MMIO_PIPE(pipe, _PFA_VSCALE, _PFB_VSCALE)

drivers/gpu/drm/i915/display/intel_pfit_regs.h

77

#define PF_HSCALE(pipe) _MMIO_PIPE(pipe, _PFA_HSCALE, _PFB_HSCALE)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

130

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_pipe_crc.c

137

i9xx_pipe_crc_auto_source(display, pipe, source);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

177

switch (pipe) {

drivers/gpu/drm/i915/display/intel_pipe_crc.c

197

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_pipe_crc.c

202

i9xx_pipe_crc_auto_source(display, pipe, source);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

234

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

238

switch (pipe) {

drivers/gpu/drm/i915/display/intel_pipe_crc.c

316

pipe_config->hw.active && crtc->pipe == PIPE_A &&

drivers/gpu/drm/i915/display/intel_pipe_crc.c

338

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_pipe_crc.c

366

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_pipe_crc.c

409

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_pipe_crc.c

415

return i9xx_pipe_crc_ctl_reg(display, pipe, source, val);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

417

return vlv_pipe_crc_ctl_reg(display, pipe, source, val);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

421

return ivb_pipe_crc_ctl_reg(display, pipe, source, val);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

423

return skl_pipe_crc_ctl_reg(display, pipe, source, val);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

590

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

601

power_domain = POWER_DOMAIN_PIPE(pipe);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

613

ret = get_new_crc_ctl_reg(display, pipe, &source, &val);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

618

intel_de_write(display, PIPE_CRC_CTL(display, pipe), val);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

619

intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));

drivers/gpu/drm/i915/display/intel_pipe_crc.c

623

vlv_undo_pipe_scramble_reset(display, pipe);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

641

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

647

if (get_new_crc_ctl_reg(display, pipe, &pipe_crc->source, &val) < 0)

drivers/gpu/drm/i915/display/intel_pipe_crc.c

653

intel_de_write(display, PIPE_CRC_CTL(display, pipe), val);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

654

intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));

drivers/gpu/drm/i915/display/intel_pipe_crc.c

661

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pipe_crc.c

668

intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);

drivers/gpu/drm/i915/display/intel_pipe_crc.c

669

intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));

drivers/gpu/drm/i915/display/intel_pipe_crc.c

80

enum pipe pipe,

drivers/gpu/drm/i915/display/intel_pipe_crc.c

96

if (crtc->pipe != pipe)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

102

#define PIPE_CRC_EXP_3_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_EXP_3_A_IVB, _PIPE_CRC_EXP_3_B_IVB)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

108

#define PIPE_CRC_EXP_4_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_EXP_2_A_IVB, _PIPE_CRC_EXP_2_B_IVB)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

114

#define PIPE_CRC_EXP_5_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_EXP_2_A_IVB, _PIPE_CRC_EXP_2_B_IVB)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

12

#define PIPE_CRC_CTL(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_CTL_A)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

120

#define PIPE_CRC_RES_1_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_1_A_IVB, _PIPE_CRC_RES_1_B_IVB)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

125

#define PIPE_CRC_RES_2_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_2_A_IVB, _PIPE_CRC_RES_2_B_IVB)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

130

#define PIPE_CRC_RES_3_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_3_A_IVB, _PIPE_CRC_RES_3_B_IVB)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

135

#define PIPE_CRC_RES_4_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_4_A_IVB, _PIPE_CRC_RES_4_B_IVB)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

140

#define PIPE_CRC_RES_5_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_5_A_IVB, _PIPE_CRC_RES_5_B_IVB)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

145

#define PIPE_CRC_EXP_HSW(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_EXP_A_HSW, _PIPE_CRC_EXP_B_HSW)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

150

#define PIPE_CRC_RES_HSW(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_A_HSW, _PIPE_CRC_RES_B_HSW)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

63

#define PIPE_CRC_EXP_GREEN(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_GREEN_A)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

67

#define PIPE_CRC_EXP_BLUE(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_BLUE_A)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

71

#define PIPE_CRC_EXP_RES1_I915(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_RES1_A_I915)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

75

#define PIPE_CRC_EXP_RES2_G4X(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_RES2_A_G4X)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

79

#define PIPE_CRC_RES_RED(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RED_A)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

82

#define PIPE_CRC_RES_GREEN(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_GREEN_A)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

85

#define PIPE_CRC_RES_BLUE(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_BLUE_A)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

88

#define PIPE_CRC_RES_RES1_I915(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RES1_A_I915)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

91

#define PIPE_CRC_RES_RES2_G4X(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RES2_A_G4X)

drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h

96

#define PIPE_CRC_EXP_2_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_EXP_2_A_IVB, _PIPE_CRC_EXP_2_B_IVB)

drivers/gpu/drm/i915/display/intel_plane.c

1558

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_plane.c

1571

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/intel_plane.c

1658

if ((joined_pipes & BIT(plane->pipe)) == 0)

drivers/gpu/drm/i915/display/intel_plane.c

774

struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe);

drivers/gpu/drm/i915/display/intel_plane.c

832

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_plane.c

928

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_plane.c

986

if (crtc->pipe != plane->pipe ||

drivers/gpu/drm/i915/display/intel_pmdemand.c

173

enum pipe pipe, int port_clock)

drivers/gpu/drm/i915/display/intel_pmdemand.c

178

pmdemand_state->ddi_clocks[pipe] = port_clock;

drivers/gpu/drm/i915/display/intel_pmdemand.c

193

crtc->pipe,

drivers/gpu/drm/i915/display/intel_pmdemand.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_pmdemand.h

28

enum pipe pipe, int port_clock);

drivers/gpu/drm/i915/display/intel_pps.c

101

enum dpio_phy phy = vlv_pipe_to_phy(pipe);

drivers/gpu/drm/i915/display/intel_pps.c

102

enum dpio_channel ch = vlv_pipe_to_channel(pipe);

drivers/gpu/drm/i915/display/intel_pps.c

1158

enum pipe pipe = intel_dp->pps.vlv_pps_pipe;

drivers/gpu/drm/i915/display/intel_pps.c

1159

i915_reg_t pp_on_reg = PP_ON_DELAYS(display, pipe);

drivers/gpu/drm/i915/display/intel_pps.c

1163

if (drm_WARN_ON(display->drm, pipe != PIPE_A && pipe != PIPE_B))

drivers/gpu/drm/i915/display/intel_pps.c

1188

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_pps.c

1197

drm_WARN(display->drm, intel_dp->pps.vlv_active_pipe == pipe,

drivers/gpu/drm/i915/display/intel_pps.c

1199

pipe_name(pipe), encoder->base.base.id,

drivers/gpu/drm/i915/display/intel_pps.c

1202

if (intel_dp->pps.vlv_pps_pipe != pipe)

drivers/gpu/drm/i915/display/intel_pps.c

1207

pipe_name(pipe), encoder->base.base.id,

drivers/gpu/drm/i915/display/intel_pps.c

1215

static enum pipe vlv_active_pipe(struct intel_dp *intel_dp)

drivers/gpu/drm/i915/display/intel_pps.c

1219

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_pps.c

1222

encoder->port, &pipe))

drivers/gpu/drm/i915/display/intel_pps.c

1223

return pipe;

drivers/gpu/drm/i915/display/intel_pps.c

1242

enum pipe vlv_pps_backlight_initial_pipe(struct intel_dp *intel_dp)

drivers/gpu/drm/i915/display/intel_pps.c

1244

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_pps.c

1251

pipe = vlv_active_pipe(intel_dp);

drivers/gpu/drm/i915/display/intel_pps.c

1253

if (pipe != PIPE_A && pipe != PIPE_B)

drivers/gpu/drm/i915/display/intel_pps.c

1254

pipe = intel_dp->pps.vlv_pps_pipe;

drivers/gpu/drm/i915/display/intel_pps.c

1256

if (pipe != PIPE_A && pipe != PIPE_B)

drivers/gpu/drm/i915/display/intel_pps.c

1257

pipe = PIPE_A;

drivers/gpu/drm/i915/display/intel_pps.c

1259

return pipe;

drivers/gpu/drm/i915/display/intel_pps.c

126

DP |= DP_PIPE_SEL_CHV(pipe);

drivers/gpu/drm/i915/display/intel_pps.c

1275

intel_dp->pps.vlv_pps_pipe != crtc->pipe) {

drivers/gpu/drm/i915/display/intel_pps.c

128

DP |= DP_PIPE_SEL(pipe);

drivers/gpu/drm/i915/display/intel_pps.c

1288

vlv_steal_power_sequencer(display, crtc->pipe);

drivers/gpu/drm/i915/display/intel_pps.c

1290

intel_dp->pps.vlv_active_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pps.c

1296

intel_dp->pps.vlv_pps_pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_pps.c

130

pll_enabled = intel_de_read(display, DPLL(display, pipe)) & DPLL_VCO_ENABLE;

drivers/gpu/drm/i915/display/intel_pps.c

140

if (vlv_force_pll_on(display, pipe, vlv_get_dpll(display))) {

drivers/gpu/drm/i915/display/intel_pps.c

143

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pps.c

164

vlv_force_pll_off(display, pipe);

drivers/gpu/drm/i915/display/intel_pps.c

171

static enum pipe vlv_find_free_pps(struct intel_display *display)

drivers/gpu/drm/i915/display/intel_pps.c

1816

void assert_pps_unlocked(struct intel_display *display, enum pipe pipe)

drivers/gpu/drm/i915/display/intel_pps.c

1820

enum pipe panel_pipe = INVALID_PIPE;

drivers/gpu/drm/i915/display/intel_pps.c

1852

pp_reg = PP_CONTROL(display, pipe);

drivers/gpu/drm/i915/display/intel_pps.c

1853

panel_pipe = pipe;

drivers/gpu/drm/i915/display/intel_pps.c

1871

INTEL_DISPLAY_STATE_WARN(display, panel_pipe == pipe && locked,

drivers/gpu/drm/i915/display/intel_pps.c

1873

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_pps.c

206

static enum pipe

drivers/gpu/drm/i915/display/intel_pps.c

211

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_pps.c

224

pipe = vlv_find_free_pps(display);

drivers/gpu/drm/i915/display/intel_pps.c

230

if (drm_WARN_ON(display->drm, pipe == INVALID_PIPE))

drivers/gpu/drm/i915/display/intel_pps.c

231

pipe = PIPE_A;

drivers/gpu/drm/i915/display/intel_pps.c

233

vlv_steal_power_sequencer(display, pipe);

drivers/gpu/drm/i915/display/intel_pps.c

234

intel_dp->pps.vlv_pps_pipe = pipe;

drivers/gpu/drm/i915/display/intel_pps.c

29

enum pipe pipe);

drivers/gpu/drm/i915/display/intel_pps.c

296

static enum pipe

drivers/gpu/drm/i915/display/intel_pps.c

300

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_pps.c

302

for (pipe = PIPE_A; pipe <= PIPE_B; pipe++) {

drivers/gpu/drm/i915/display/intel_pps.c

304

PP_ON_DELAYS(display, pipe)) &

drivers/gpu/drm/i915/display/intel_pps.c

310

if (!check(display, pipe))

drivers/gpu/drm/i915/display/intel_pps.c

313

return pipe;

drivers/gpu/drm/i915/display/intel_pps.c

99

enum pipe pipe = intel_dp->pps.vlv_pps_pipe;

drivers/gpu/drm/i915/display/intel_pps.h

11

enum pipe;

drivers/gpu/drm/i915/display/intel_pps.h

52

enum pipe vlv_pps_backlight_initial_pipe(struct intel_dp *intel_dp);

drivers/gpu/drm/i915/display/intel_pps.h

65

void assert_pps_unlocked(struct intel_display *display, enum pipe pipe);

drivers/gpu/drm/i915/display/intel_psr.c

1228

enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_psr.c

1232

return pipe <= PIPE_B && port <= PORT_B;

drivers/gpu/drm/i915/display/intel_psr.c

1234

return pipe == PIPE_A && port == PORT_A;

drivers/gpu/drm/i915/display/intel_psr.c

1785

if (to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_A &&

drivers/gpu/drm/i915/display/intel_psr.c

1786

to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_B)

drivers/gpu/drm/i915/display/intel_psr.c

1842

active_pipes |= crtc->active ? BIT(crtc->pipe) : 0;

drivers/gpu/drm/i915/display/intel_psr.c

1847

~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);

drivers/gpu/drm/i915/display/intel_psr.c

1991

enum pipe pipe = intel_dp->psr.pipe;

drivers/gpu/drm/i915/display/intel_psr.c

2006

0, LATENCY_REPORTING_REMOVED(pipe));

drivers/gpu/drm/i915/display/intel_psr.c

2009

LATENCY_REPORTING_REMOVED(pipe), 0);

drivers/gpu/drm/i915/display/intel_psr.c

2130

intel_dmc_block_pkgc(display, intel_dp->psr.pipe, true);

drivers/gpu/drm/i915/display/intel_psr.c

2177

intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;

drivers/gpu/drm/i915/display/intel_psr.c

2273

intel_dp->psr.pipe,

drivers/gpu/drm/i915/display/intel_psr.c

2332

LATENCY_REPORTING_REMOVED(intel_dp->psr.pipe), 0);

drivers/gpu/drm/i915/display/intel_psr.c

2365

intel_dmc_block_pkgc(display, intel_dp->psr.pipe, false);

drivers/gpu/drm/i915/display/intel_psr.c

2527

CURSURFLIVE(display, crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_psr.c

2588

intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0);

drivers/gpu/drm/i915/display/intel_psr.c

2621

intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),

drivers/gpu/drm/i915/display/intel_psr.c

2952

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_psr.c

3077

intel_de_write_fw(display, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), 0);

drivers/gpu/drm/i915/display/intel_psr.c

3562

INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe);

drivers/gpu/drm/i915/display/intel_psr.c

3592

INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe)))

drivers/gpu/drm/i915/display/intel_psr.c

3669

INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe);

drivers/gpu/drm/i915/display/intel_psr.c

3982

intel_dp->psr.pipe,

drivers/gpu/drm/i915/display/intel_psr.c

4068

active_non_psr_pipes |= BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_psr.c

4070

active_non_psr_pipes &= ~BIT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_psr.c

929

struct intel_crtc *crtc = intel_crtc_for_pipe(display, intel_dp->psr.pipe);

drivers/gpu/drm/i915/display/intel_psr.c

972

intel_dp->psr.pipe,

drivers/gpu/drm/i915/display/intel_psr_regs.h

267

#define PIPE_SRCSZ_ERLY_TPT(pipe) _MMIO_PIPE((pipe), _PIPE_SRCSZ_ERLY_TPT_A, _PIPE_SRCSZ_ERLY_TPT_B)

drivers/gpu/drm/i915/display/intel_sdvo.c

1635

sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);

drivers/gpu/drm/i915/display/intel_sdvo.c

1637

sdvox |= SDVO_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_sdvo.c

1668

i915_reg_t sdvo_reg, enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_sdvo.c

1676

*pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;

drivers/gpu/drm/i915/display/intel_sdvo.c

1678

*pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;

drivers/gpu/drm/i915/display/intel_sdvo.c

1680

*pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;

drivers/gpu/drm/i915/display/intel_sdvo.c

1686

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_sdvo.c

1695

ret = intel_sdvo_port_enabled(display, intel_sdvo->sdvo_reg, pipe);

drivers/gpu/drm/i915/display/intel_sdvo.c

1859

if (HAS_PCH_IBX(display) && crtc->pipe == PIPE_B) {

drivers/gpu/drm/i915/display/intel_sdvo.h

13

enum pipe;

drivers/gpu/drm/i915/display/intel_sdvo.h

19

i915_reg_t sdvo_reg, enum pipe *pipe);

drivers/gpu/drm/i915/display/intel_sdvo.h

24

i915_reg_t sdvo_reg, enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_sprite.c

1083

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1096

intel_de_write_fw(display, DVSGAMC_G4X(pipe, i - 1),

drivers/gpu/drm/i915/display/intel_sprite.c

1113

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1125

intel_de_write_fw(display, DVSGAMC_ILK(pipe, i),

drivers/gpu/drm/i915/display/intel_sprite.c

1128

intel_de_write_fw(display, DVSGAMCMAX_ILK(pipe, 0), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

1129

intel_de_write_fw(display, DVSGAMCMAX_ILK(pipe, 1), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

1130

intel_de_write_fw(display, DVSGAMCMAX_ILK(pipe, 2), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

1141

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1155

intel_de_write_fw(display, DVSSTRIDE(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

1157

intel_de_write_fw(display, DVSPOS(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

1159

intel_de_write_fw(display, DVSSIZE(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

1161

intel_de_write_fw(display, DVSSCALE(pipe), dvsscale);

drivers/gpu/drm/i915/display/intel_sprite.c

1171

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1180

intel_de_write_fw(display, DVSKEYVAL(pipe), key->min_value);

drivers/gpu/drm/i915/display/intel_sprite.c

1181

intel_de_write_fw(display, DVSKEYMSK(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

1183

intel_de_write_fw(display, DVSKEYMAX(pipe), key->max_value);

drivers/gpu/drm/i915/display/intel_sprite.c

1186

intel_de_write_fw(display, DVSLINOFF(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

1188

intel_de_write_fw(display, DVSTILEOFF(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

1196

intel_de_write_fw(display, DVSCNTR(pipe), dvscntr);

drivers/gpu/drm/i915/display/intel_sprite.c

1197

intel_de_write_fw(display, DVSSURF(pipe), plane_state->surf);

drivers/gpu/drm/i915/display/intel_sprite.c

1211

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1213

intel_de_write_fw(display, DVSCNTR(pipe), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

1215

intel_de_write_fw(display, DVSSCALE(pipe), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

1216

intel_de_write_fw(display, DVSSURF(pipe), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

1225

error->ctl = intel_de_read(display, DVSCNTR(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

1226

error->surf = intel_de_read(display, DVSSURF(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

1227

error->surflive = intel_de_read(display, DVSSURFLIVE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

1232

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_sprite.c

1239

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/intel_sprite.c

1244

ret = intel_de_read(display, DVSCNTR(plane->pipe)) & DVS_ENABLE;

drivers/gpu/drm/i915/display/intel_sprite.c

1246

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

145

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1595

enum pipe pipe, int sprite)

drivers/gpu/drm/i915/display/intel_sprite.c

1625

if (display->platform.cherryview && pipe == PIPE_B) {

drivers/gpu/drm/i915/display/intel_sprite.c

1688

if (display->platform.cherryview && pipe == PIPE_B) {

drivers/gpu/drm/i915/display/intel_sprite.c

1697

plane->pipe = pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

1699

plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);

drivers/gpu/drm/i915/display/intel_sprite.c

1707

"sprite %c", sprite_name(display, pipe, sprite));

drivers/gpu/drm/i915/display/intel_sprite.c

172

intel_de_write_fw(display, SPCLRC0(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

174

intel_de_write_fw(display, SPCLRC1(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

347

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

361

intel_de_write_fw(display, SPGAMC(pipe, plane_id, i - 1),

drivers/gpu/drm/i915/display/intel_sprite.c

372

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

379

intel_de_write_fw(display, SPSTRIDE(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

381

intel_de_write_fw(display, SPPOS(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

383

intel_de_write_fw(display, SPSIZE(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

394

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

403

if (display->platform.cherryview && pipe == PIPE_B)

drivers/gpu/drm/i915/display/intel_sprite.c

407

intel_de_write_fw(display, SPKEYMINVAL(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

409

intel_de_write_fw(display, SPKEYMSK(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

411

intel_de_write_fw(display, SPKEYMAXVAL(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

415

intel_de_write_fw(display, SPCONSTALPHA(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

417

intel_de_write_fw(display, SPLINOFF(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

419

intel_de_write_fw(display, SPTILEOFF(pipe, plane_id),

drivers/gpu/drm/i915/display/intel_sprite.c

427

intel_de_write_fw(display, SPCNTR(pipe, plane_id), sprctl);

drivers/gpu/drm/i915/display/intel_sprite.c

428

intel_de_write_fw(display, SPSURF(pipe, plane_id), plane_state->surf);

drivers/gpu/drm/i915/display/intel_sprite.c

440

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

443

intel_de_write_fw(display, SPCNTR(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

444

intel_de_write_fw(display, SPSURF(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

453

error->ctl = intel_de_read(display, SPCNTR(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

454

error->surf = intel_de_read(display, SPSURF(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

455

error->surflive = intel_de_read(display, SPSURFLIVE(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/intel_sprite.c

460

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_sprite.c

468

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/intel_sprite.c

473

ret = intel_de_read(display, SPCNTR(plane->pipe, plane_id)) & SP_ENABLE;

drivers/gpu/drm/i915/display/intel_sprite.c

475

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

52

static char sprite_name(struct intel_display *display, enum pipe pipe, int sprite)

drivers/gpu/drm/i915/display/intel_sprite.c

54

return pipe * DISPLAY_RUNTIME_INFO(display)->num_sprites[pipe] + sprite + 'A';

drivers/gpu/drm/i915/display/intel_sprite.c

763

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

774

intel_de_write_fw(display, SPRGAMC(pipe, i),

drivers/gpu/drm/i915/display/intel_sprite.c

777

intel_de_write_fw(display, SPRGAMC16(pipe, 0), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

778

intel_de_write_fw(display, SPRGAMC16(pipe, 1), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

779

intel_de_write_fw(display, SPRGAMC16(pipe, 2), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

782

intel_de_write_fw(display, SPRGAMC17(pipe, 0), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

783

intel_de_write_fw(display, SPRGAMC17(pipe, 1), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

784

intel_de_write_fw(display, SPRGAMC17(pipe, 2), gamma[i]);

drivers/gpu/drm/i915/display/intel_sprite.c

795

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

809

intel_de_write_fw(display, SPRSTRIDE(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

811

intel_de_write_fw(display, SPRPOS(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

813

intel_de_write_fw(display, SPRSIZE(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

816

intel_de_write_fw(display, SPRSCALE(pipe), sprscale);

drivers/gpu/drm/i915/display/intel_sprite.c

826

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

835

intel_de_write_fw(display, SPRKEYVAL(pipe), key->min_value);

drivers/gpu/drm/i915/display/intel_sprite.c

836

intel_de_write_fw(display, SPRKEYMSK(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

838

intel_de_write_fw(display, SPRKEYMAX(pipe), key->max_value);

drivers/gpu/drm/i915/display/intel_sprite.c

844

intel_de_write_fw(display, SPROFFSET(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

847

intel_de_write_fw(display, SPRLINOFF(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

849

intel_de_write_fw(display, SPRTILEOFF(pipe),

drivers/gpu/drm/i915/display/intel_sprite.c

858

intel_de_write_fw(display, SPRCTL(pipe), sprctl);

drivers/gpu/drm/i915/display/intel_sprite.c

859

intel_de_write_fw(display, SPRSURF(pipe), plane_state->surf);

drivers/gpu/drm/i915/display/intel_sprite.c

870

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.c

872

intel_de_write_fw(display, SPRCTL(pipe), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

875

intel_de_write_fw(display, SPRSCALE(pipe), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

876

intel_de_write_fw(display, SPRSURF(pipe), 0);

drivers/gpu/drm/i915/display/intel_sprite.c

885

error->ctl = intel_de_read(display, SPRCTL(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

886

error->surf = intel_de_read(display, SPRSURF(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

887

error->surflive = intel_de_read(display, SPRSURFLIVE(crtc->pipe));

drivers/gpu/drm/i915/display/intel_sprite.c

892

enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_sprite.c

899

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/intel_sprite.c

904

ret = intel_de_read(display, SPRCTL(plane->pipe)) & SPRITE_ENABLE;

drivers/gpu/drm/i915/display/intel_sprite.c

906

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/intel_sprite.h

14

enum pipe;

drivers/gpu/drm/i915/display/intel_sprite.h

18

enum pipe pipe, int plane);

drivers/gpu/drm/i915/display/intel_sprite.h

30

int pipe, int plane)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

109

#define DVSGAMC_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_ILK, _DVSBGAMC_ILK) + (i) * 4) /* 16 x u0.10 */

drivers/gpu/drm/i915/display/intel_sprite_regs.h

113

#define DVSGAMCMAX_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMCMAX_ILK, _DVSBGAMCMAX_ILK) + (i) * 4) /* 3 x u1.10 */

drivers/gpu/drm/i915/display/intel_sprite_regs.h

118

#define SPRCTL(pipe) _MMIO_PIPE(pipe, _SPRA_CTL, _SPRB_CTL)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

12

#define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

147

#define SPRLINOFF(pipe) _MMIO_PIPE(pipe, _SPRA_LINOFF, _SPRB_LINOFF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

151

#define SPRSTRIDE(pipe) _MMIO_PIPE(pipe, _SPRA_STRIDE, _SPRB_STRIDE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

155

#define SPRPOS(pipe) _MMIO_PIPE(pipe, _SPRA_POS, _SPRB_POS)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

163

#define SPRSIZE(pipe) _MMIO_PIPE(pipe, _SPRA_SIZE, _SPRB_SIZE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

171

#define SPRKEYVAL(pipe) _MMIO_PIPE(pipe, _SPRA_KEYVAL, _SPRB_KEYVAL)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

175

#define SPRKEYMSK(pipe) _MMIO_PIPE(pipe, _SPRA_KEYMSK, _SPRB_KEYMSK)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

179

#define SPRSURF(pipe) _MMIO_PIPE(pipe, _SPRA_SURF, _SPRB_SURF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

184

#define SPRKEYMAX(pipe) _MMIO_PIPE(pipe, _SPRA_KEYMAX, _SPRB_KEYMAX)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

188

#define SPRTILEOFF(pipe) _MMIO_PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

196

#define SPROFFSET(pipe) _MMIO_PIPE(pipe, _SPRA_OFFSET, _SPRB_OFFSET)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

200

#define SPRSURFLIVE(pipe) _MMIO_PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

204

#define SPRSCALE(pipe) _MMIO_PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

219

#define SPRGAMC(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC) + (i) * 4) /* 16 x u0.10 */

drivers/gpu/drm/i915/display/intel_sprite_regs.h

223

#define SPRGAMC16(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC16, _SPRB_GAMC16) + (i) * 4) /* 3 x u1.10 */

drivers/gpu/drm/i915/display/intel_sprite_regs.h

227

#define SPRGAMC17(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC17, _SPRB_GAMC17) + (i) * 4) /* 3 x u2.10 */

drivers/gpu/drm/i915/display/intel_sprite_regs.h

230

#define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \

drivers/gpu/drm/i915/display/intel_sprite_regs.h

231

_PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))

drivers/gpu/drm/i915/display/intel_sprite_regs.h

232

#define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \

drivers/gpu/drm/i915/display/intel_sprite_regs.h

233

_MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))

drivers/gpu/drm/i915/display/intel_sprite_regs.h

237

#define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

266

#define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

270

#define SPSTRIDE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

274

#define SPPOS(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAPOS, _SPBPOS)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

282

#define SPSIZE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASIZE, _SPBSIZE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

290

#define SPKEYMINVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

294

#define SPKEYMSK(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMSK, _SPBKEYMSK)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

298

#define SPSURF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASURF, _SPBSURF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

303

#define SPKEYMAXVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMAXVAL, _SPBKEYMAXVAL)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

307

#define SPTILEOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPATILEOFF, _SPBTILEOFF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

315

#define SPCONSTALPHA(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACONSTALPHA, _SPBCONSTALPHA)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

322

#define SPSURFLIVE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASURFLIVE, _SPBSURFLIVE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

326

#define SPCLRC0(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC0, _SPBCLRC0)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

334

#define SPCLRC1(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC1, _SPBCLRC1)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

342

#define SPGAMC(pipe, plane_id, i) _MMIO(_VLV_SPR((pipe), (plane_id), _SPAGAMC, _SPBGAMC) + (5 - (i)) * 4) /* 6 x u0.10 */

drivers/gpu/drm/i915/display/intel_sprite_regs.h

37

#define DVSLINOFF(pipe) _MMIO_PIPE(pipe, _DVSALINOFF, _DVSBLINOFF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

41

#define DVSSTRIDE(pipe) _MMIO_PIPE(pipe, _DVSASTRIDE, _DVSBSTRIDE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

45

#define DVSPOS(pipe) _MMIO_PIPE(pipe, _DVSAPOS, _DVSBPOS)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

53

#define DVSSIZE(pipe) _MMIO_PIPE(pipe, _DVSASIZE, _DVSBSIZE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

61

#define DVSKEYVAL(pipe) _MMIO_PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

65

#define DVSKEYMSK(pipe) _MMIO_PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

69

#define DVSSURF(pipe) _MMIO_PIPE(pipe, _DVSASURF, _DVSBSURF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

74

#define DVSKEYMAX(pipe) _MMIO_PIPE(pipe, _DVSAKEYMAXVAL, _DVSBKEYMAXVAL)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

78

#define DVSTILEOFF(pipe) _MMIO_PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

86

#define DVSSURFLIVE(pipe) _MMIO_PIPE(pipe, _DVSASURFLIVE, _DVSBSURFLIVE)

drivers/gpu/drm/i915/display/intel_sprite_regs.h

90

#define DVSGAMC_G4X(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_G4X, _DVSBGAMC_G4X) + (5 - (i)) * 4) /* 6 x u0.8 */

drivers/gpu/drm/i915/display/intel_sprite_regs.h

94

#define DVSSCALE(pipe) _MMIO_PIPE(pipe, _DVSASCALE, _DVSBSCALE)

drivers/gpu/drm/i915/display/intel_sprite_uapi.c

104

to_intel_plane(plane)->pipe);

drivers/gpu/drm/i915/display/intel_tv.c

1481

tv_ctl |= TV_ENC_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_tv.c

1607

tv_ctl |= TV_ENC_PIPE_SEL(crtc->pipe);

drivers/gpu/drm/i915/display/intel_tv.c

916

intel_tv_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe)

drivers/gpu/drm/i915/display/intel_tv.c

921

*pipe = (tmp & TV_ENC_PIPE_SEL_MASK) >> TV_ENC_PIPE_SEL_SHIFT;

drivers/gpu/drm/i915/display/intel_tv_regs.h

18

# define TV_ENC_PIPE_SEL(pipe) ((pipe) << 30)

drivers/gpu/drm/i915/display/intel_vblank.c

112

frame = intel_de_read64_2x32(display, PIPEFRAMEPIXEL(display, pipe),

drivers/gpu/drm/i915/display/intel_vblank.c

113

PIPEFRAME(display, pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

130

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

135

return intel_de_read(display, PIPE_FRMCOUNT_G4X(display, pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

160

PIPE_FRMTMSTMP(crtc->pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

169

PIPE_FRMTMSTMP(crtc->pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

249

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

260

position = intel_de_read_fw(display, PIPEDSL(display, pipe)) & PIPEDSL_LINE_MASK;

drivers/gpu/drm/i915/display/intel_vblank.c

280

PIPEDSL(display, pipe)) & PIPEDSL_LINE_MASK;

drivers/gpu/drm/i915/display/intel_vblank.c

337

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

348

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

396

position = (intel_de_read_fw(display, PIPEFRAMEPIXEL(display, pipe)) & PIPE_PIXEL_MASK) >> PIPE_PIXEL_SHIFT;

drivers/gpu/drm/i915/display/intel_vblank.c

483

enum pipe pipe)

drivers/gpu/drm/i915/display/intel_vblank.c

485

i915_reg_t reg = PIPEDSL(display, pipe);

drivers/gpu/drm/i915/display/intel_vblank.c

498

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vblank.c

503

ret = poll_timeout_us(is_moving = pipe_scanline_is_moving(display, pipe),

drivers/gpu/drm/i915/display/intel_vblank.c

509

pipe_name(pipe), str_on_off(state));

drivers/gpu/drm/i915/display/intel_vblank.c

763

pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/intel_vblank.c

79

enum pipe pipe = to_intel_crtc(crtc)->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

395

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

409

pipe == PIPE_A)

drivers/gpu/drm/i915/display/intel_vdsc.c

412

return POWER_DOMAIN_PIPE(pipe);

drivers/gpu/drm/i915/display/intel_vdsc.c

437

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

445

dsc_reg[2] = BMG_DSC2_PPS(pipe, pps);

drivers/gpu/drm/i915/display/intel_vdsc.c

447

dsc_reg[1] = pipe_dsc ? ICL_DSC1_PPS(pipe, pps) : DSCC_PPS(pps);

drivers/gpu/drm/i915/display/intel_vdsc.c

449

dsc_reg[0] = pipe_dsc ? ICL_DSC0_PPS(pipe, pps) : DSCA_PPS(pps);

drivers/gpu/drm/i915/display/intel_vdsc.c

476

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

51

drm_WARN_ON(display->drm, crtc->pipe == PIPE_A);

drivers/gpu/drm/i915/display/intel_vdsc.c

604

intel_de_write(display, ICL_DSC0_RC_BUF_THRESH_0(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

606

intel_de_write(display, ICL_DSC0_RC_BUF_THRESH_0_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

608

intel_de_write(display, ICL_DSC0_RC_BUF_THRESH_1(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

610

intel_de_write(display, ICL_DSC0_RC_BUF_THRESH_1_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

614

ICL_DSC1_RC_BUF_THRESH_0(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

617

ICL_DSC1_RC_BUF_THRESH_0_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

620

ICL_DSC1_RC_BUF_THRESH_1(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

623

ICL_DSC1_RC_BUF_THRESH_1_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

678

intel_de_write(display, ICL_DSC0_RC_RANGE_PARAMETERS_0(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

681

ICL_DSC0_RC_RANGE_PARAMETERS_0_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

683

intel_de_write(display, ICL_DSC0_RC_RANGE_PARAMETERS_1(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

686

ICL_DSC0_RC_RANGE_PARAMETERS_1_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

688

intel_de_write(display, ICL_DSC0_RC_RANGE_PARAMETERS_2(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

691

ICL_DSC0_RC_RANGE_PARAMETERS_2_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

693

intel_de_write(display, ICL_DSC0_RC_RANGE_PARAMETERS_3(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

696

ICL_DSC0_RC_RANGE_PARAMETERS_3_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

700

ICL_DSC1_RC_RANGE_PARAMETERS_0(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

703

ICL_DSC1_RC_RANGE_PARAMETERS_0_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

706

ICL_DSC1_RC_RANGE_PARAMETERS_1(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

709

ICL_DSC1_RC_RANGE_PARAMETERS_1_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

712

ICL_DSC1_RC_RANGE_PARAMETERS_2(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

715

ICL_DSC1_RC_RANGE_PARAMETERS_2_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

718

ICL_DSC1_RC_RANGE_PARAMETERS_3(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

721

ICL_DSC1_RC_RANGE_PARAMETERS_3_UDW(pipe),

drivers/gpu/drm/i915/display/intel_vdsc.c

776

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vdsc.c

787

intel_de_write_dsb(display, dsb, LNL_DSC0_SU_PARAMETER_SET_0(pipe), val);

drivers/gpu/drm/i915/display/intel_vdsc.c

790

intel_de_write_dsb(display, dsb, LNL_DSC1_SU_PARAMETER_SET_0(pipe), val);

drivers/gpu/drm/i915/display/intel_vdsc.c

796

ICL_PIPE_DSS_CTL1(crtc->pipe) : DSS_CTL1;

drivers/gpu/drm/i915/display/intel_vdsc.c

802

ICL_PIPE_DSS_CTL2(crtc->pipe) : DSS_CTL2;

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

203

#define LNL_DSC0_SU_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe), _LNL_DSC0_SU_PARAMETER_SET_0_PA, _LNL_DSC0_SU_PARAMETER_SET_0_PB)

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

204

#define LNL_DSC1_SU_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe), _LNL_DSC1_SU_PARAMETER_SET_0_PA, _LNL_DSC1_SU_PARAMETER_SET_0_PB)

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

224

#define ICL_DSC0_RC_BUF_THRESH_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

227

#define ICL_DSC0_RC_BUF_THRESH_0_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

230

#define ICL_DSC1_RC_BUF_THRESH_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

233

#define ICL_DSC1_RC_BUF_THRESH_0_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

249

#define ICL_DSC0_RC_BUF_THRESH_1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

252

#define ICL_DSC0_RC_BUF_THRESH_1_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

255

#define ICL_DSC1_RC_BUF_THRESH_1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

258

#define ICL_DSC1_RC_BUF_THRESH_1_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

275

#define ICL_DSC0_RC_RANGE_PARAMETERS_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

278

#define ICL_DSC0_RC_RANGE_PARAMETERS_0_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

281

#define ICL_DSC1_RC_RANGE_PARAMETERS_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

284

#define ICL_DSC1_RC_RANGE_PARAMETERS_0_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

303

#define ICL_DSC0_RC_RANGE_PARAMETERS_1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

306

#define ICL_DSC0_RC_RANGE_PARAMETERS_1_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

309

#define ICL_DSC1_RC_RANGE_PARAMETERS_1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

312

#define ICL_DSC1_RC_RANGE_PARAMETERS_1_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

328

#define ICL_DSC0_RC_RANGE_PARAMETERS_2(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

33

#define ICL_PIPE_DSS_CTL1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

331

#define ICL_DSC0_RC_RANGE_PARAMETERS_2_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

334

#define ICL_DSC1_RC_RANGE_PARAMETERS_2(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

337

#define ICL_DSC1_RC_RANGE_PARAMETERS_2_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

353

#define ICL_DSC0_RC_RANGE_PARAMETERS_3(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

356

#define ICL_DSC0_RC_RANGE_PARAMETERS_3_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

359

#define ICL_DSC1_RC_RANGE_PARAMETERS_3(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

362

#define ICL_DSC1_RC_RANGE_PARAMETERS_3_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

49

#define ICL_PIPE_DSS_CTL2(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

66

#define ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

69

#define ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

72

#define _ICL_DSC0_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

75

#define _ICL_DSC1_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

78

#define _BMG_DSC2_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

81

#define ICL_DSC0_PPS(pipe, pps) _MMIO(_ICL_DSC0_PPS_0(pipe) + ((pps) * 4))

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

82

#define ICL_DSC1_PPS(pipe, pps) _MMIO(_ICL_DSC1_PPS_0(pipe) + ((pps) * 4))

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

83

#define BMG_DSC2_PPS(pipe, pps) _MMIO(_BMG_DSC2_PPS_0(pipe) + ((pps) * 4))

drivers/gpu/drm/i915/display/intel_vga.c

49

enum pipe pipe;

drivers/gpu/drm/i915/display/intel_vga.c

58

pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK_CHV, tmp);

drivers/gpu/drm/i915/display/intel_vga.c

60

pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK, tmp);

drivers/gpu/drm/i915/display/intel_vga.c

62

pipe = PIPE_A;

drivers/gpu/drm/i915/display/intel_vga.c

65

pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_vga_regs.h

17

#define VGA_PIPE_SEL(pipe) REG_FIELD_PREP(VGA_PIPE_SEL_MASK, (pipe))

drivers/gpu/drm/i915/display/intel_vga_regs.h

19

#define VGA_PIPE_SEL_CHV(pipe) REG_FIELD_PREP(VGA_PIPE_SEL_MASK_CHV, (pipe))

drivers/gpu/drm/i915/display/intel_vrr.c

1001

intel_de_read(display, PIPEDMC_DCB_MAX_INCREASE(pipe));

drivers/gpu/drm/i915/display/intel_vrr.c

1003

intel_de_read(display, PIPEDMC_DCB_MAX_DECREASE(pipe));

drivers/gpu/drm/i915/display/intel_vrr.c

1005

intel_de_read(display, PIPEDMC_DCB_SLOPE(pipe));

drivers/gpu/drm/i915/display/intel_vrr.c

1007

intel_de_read(display, PIPEDMC_DCB_VBLANK(pipe));

drivers/gpu/drm/i915/display/intel_vrr.c

359

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

367

((pipe == PIPE_A) || (pipe == PIPE_B)));

drivers/gpu/drm/i915/display/intel_vrr.c

668

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

673

intel_de_write(display, PIPEDMC_DCB_FLIP_COUNT(pipe),

drivers/gpu/drm/i915/display/intel_vrr.c

682

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

687

intel_de_write(display, PIPEDMC_DCB_FLIP_COUNT(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

688

intel_de_write(display, PIPEDMC_DCB_BALANCE_RESET(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

804

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

826

intel_de_write(display, PIPEDMC_DCB_VMIN(pipe),

drivers/gpu/drm/i915/display/intel_vrr.c

828

intel_de_write(display, PIPEDMC_DCB_VMAX(pipe),

drivers/gpu/drm/i915/display/intel_vrr.c

830

intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe),

drivers/gpu/drm/i915/display/intel_vrr.c

832

intel_de_write(display, PIPEDMC_DCB_MAX_DECREASE(pipe),

drivers/gpu/drm/i915/display/intel_vrr.c

834

intel_de_write(display, PIPEDMC_DCB_GUARDBAND(pipe),

drivers/gpu/drm/i915/display/intel_vrr.c

836

intel_de_write(display, PIPEDMC_DCB_SLOPE(pipe),

drivers/gpu/drm/i915/display/intel_vrr.c

838

intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe),

drivers/gpu/drm/i915/display/intel_vrr.c

840

intel_dmc_configure_dc_balance_event(display, pipe, true);

drivers/gpu/drm/i915/display/intel_vrr.c

855

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

862

intel_dmc_configure_dc_balance_event(display, pipe, false);

drivers/gpu/drm/i915/display/intel_vrr.c

864

intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

865

intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

866

intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

867

intel_de_write(display, PIPEDMC_DCB_MAX_DECREASE(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

868

intel_de_write(display, PIPEDMC_DCB_GUARDBAND(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

869

intel_de_write(display, PIPEDMC_DCB_SLOPE(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

870

intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe), 0);

drivers/gpu/drm/i915/display/intel_vrr.c

987

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/intel_vrr.c

992

reg_val = intel_de_read(display, PIPEDMC_DCB_VMIN(pipe));

drivers/gpu/drm/i915/display/intel_vrr.c

995

reg_val = intel_de_read(display, PIPEDMC_DCB_VMAX(pipe));

drivers/gpu/drm/i915/display/intel_vrr.c

999

intel_de_read(display, PIPEDMC_DCB_GUARDBAND(pipe));

drivers/gpu/drm/i915/display/intel_wm_types.h

42

struct g4x_pipe_wm pipe[3];

drivers/gpu/drm/i915/display/intel_wm_types.h

50

struct g4x_pipe_wm pipe[2];

drivers/gpu/drm/i915/display/skl_scaler.c

1034

SKL_PS_ECC_STAT(crtc->pipe, scaler_state->scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

214

crtc->pipe, scaler_user, *scaler_id,

drivers/gpu/drm/i915/display/skl_scaler.c

236

crtc->pipe, scaler_user, src_w, src_h,

drivers/gpu/drm/i915/display/skl_scaler.c

254

crtc->pipe, scaler_user, pipe_src_w, pipe_src_h);

drivers/gpu/drm/i915/display/skl_scaler.c

263

crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h,

drivers/gpu/drm/i915/display/skl_scaler.c

518

crtc->pipe, *scaler_id, name, idx);

drivers/gpu/drm/i915/display/skl_scaler.c

554

if (drm_WARN_ON(display->drm, plane->pipe != crtc->pipe))

drivers/gpu/drm/i915/display/skl_scaler.c

702

enum pipe pipe, int id, int set)

drivers/gpu/drm/i915/display/skl_scaler.c

707

GLK_PS_COEF_INDEX_SET(pipe, id, set),

drivers/gpu/drm/i915/display/skl_scaler.c

721

GLK_PS_COEF_DATA_SET(pipe, id, set), tmp);

drivers/gpu/drm/i915/display/skl_scaler.c

725

GLK_PS_COEF_INDEX_SET(pipe, id, set), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

741

struct intel_dsb *dsb, enum pipe pipe,

drivers/gpu/drm/i915/display/skl_scaler.c

748

glk_program_nearest_filter_coefs(display, dsb, pipe, id, set);

drivers/gpu/drm/i915/display/skl_scaler.c

773

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_scaler.c

794

intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);

drivers/gpu/drm/i915/display/skl_scaler.c

795

intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),

drivers/gpu/drm/i915/display/skl_scaler.c

797

intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),

drivers/gpu/drm/i915/display/skl_scaler.c

809

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_scaler.c

846

skl_scaler_setup_filter(display, NULL, pipe, id, 0,

drivers/gpu/drm/i915/display/skl_scaler.c

849

intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);

drivers/gpu/drm/i915/display/skl_scaler.c

851

intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id),

drivers/gpu/drm/i915/display/skl_scaler.c

853

intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id),

drivers/gpu/drm/i915/display/skl_scaler.c

855

intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),

drivers/gpu/drm/i915/display/skl_scaler.c

857

intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),

drivers/gpu/drm/i915/display/skl_scaler.c

869

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_scaler.c

913

skl_scaler_setup_filter(display, dsb, pipe, scaler_id, 0,

drivers/gpu/drm/i915/display/skl_scaler.c

916

intel_de_write_dsb(display, dsb, SKL_PS_CTRL(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

918

intel_de_write_dsb(display, dsb, SKL_PS_VPHASE(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

920

intel_de_write_dsb(display, dsb, SKL_PS_HPHASE(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

922

intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

924

intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(pipe, scaler_id),

drivers/gpu/drm/i915/display/skl_scaler.c

935

intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

936

intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

937

intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, id), 0);

drivers/gpu/drm/i915/display/skl_scaler.c

979

ctl = intel_de_read(display, SKL_PS_CTRL(crtc->pipe, i));

drivers/gpu/drm/i915/display/skl_scaler.c

992

pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));

drivers/gpu/drm/i915/display/skl_scaler.c

993

size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1383

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1385

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 0), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1386

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 1), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1388

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 2), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1389

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 3), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1391

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 4), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1392

intel_de_write_dsb(display, dsb, PLANE_CSC_COEFF(pipe, plane_id, 5), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1394

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane_id, 0), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1395

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane_id, 1), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1396

intel_de_write_dsb(display, dsb, PLANE_CSC_PREOFF(pipe, plane_id, 2), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1398

intel_de_write_dsb(display, dsb, PLANE_CSC_POSTOFF(pipe, plane_id, 0), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1399

intel_de_write_dsb(display, dsb, PLANE_CSC_POSTOFF(pipe, plane_id, 1), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1400

intel_de_write_dsb(display, dsb, PLANE_CSC_POSTOFF(pipe, plane_id, 2), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1411

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1424

intel_de_write_dsb(display, dsb, PLANE_STRIDE(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1426

intel_de_write_dsb(display, dsb, PLANE_POS(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1428

intel_de_write_dsb(display, dsb, PLANE_SIZE(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1442

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1459

intel_de_write_dsb(display, dsb, PLANE_KEYVAL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1461

intel_de_write_dsb(display, dsb, PLANE_KEYMSK(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1463

intel_de_write_dsb(display, dsb, PLANE_KEYMAX(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1466

intel_de_write_dsb(display, dsb, PLANE_OFFSET(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1469

intel_de_write_dsb(display, dsb, PLANE_AUX_DIST(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1472

intel_de_write_dsb(display, dsb, PLANE_AUX_OFFSET(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1477

intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1495

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1497

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1508

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1524

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_POS(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1539

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_OFFSET(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1544

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_SIZE(pipe, plane->id), val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1555

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1578

intel_de_write_dsb(display, dsb, PLANE_STRIDE(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1580

intel_de_write_dsb(display, dsb, PLANE_POS(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1582

intel_de_write_dsb(display, dsb, PLANE_SIZE(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1585

intel_de_write_dsb(display, dsb, PLANE_KEYVAL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1587

intel_de_write_dsb(display, dsb, PLANE_KEYMSK(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1589

intel_de_write_dsb(display, dsb, PLANE_KEYMAX(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1592

intel_de_write_dsb(display, dsb, PLANE_OFFSET(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1596

intel_de_write_dsb(display, dsb, PLANE_CC_VAL(pipe, plane_id, 0),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1598

intel_de_write_dsb(display, dsb, PLANE_CC_VAL(pipe, plane_id, 1),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1604

intel_de_write_dsb(display, dsb, PLANE_AUX_DIST(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1608

intel_de_write_dsb(display, dsb, PLANE_CUS_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1611

intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1635

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1641

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1655

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1682

PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1690

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1692

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1702

error->ctl = intel_de_read(display, PLANE_CTL(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1703

error->surf = intel_de_read(display, PLANE_SURF(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1704

error->surflive = intel_de_read(display, PLANE_SURFLIVE(crtc->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

1716

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1729

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

1731

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

2459

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2461

enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(pipe);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2470

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2476

if (pipe == PIPE_C)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2483

enum pipe pipe, enum plane_id plane_id,

drivers/gpu/drm/i915/display/skl_universal_plane.c

2486

if (skl_plane_has_planar(display, pipe, plane_id)) {

drivers/gpu/drm/i915/display/skl_universal_plane.c

2496

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2502

enum pipe pipe, enum plane_id plane_id,

drivers/gpu/drm/i915/display/skl_universal_plane.c

2505

if (glk_plane_has_planar(display, pipe, plane_id)) {

drivers/gpu/drm/i915/display/skl_universal_plane.c

2515

enum pipe pipe, enum plane_id plane_id,

drivers/gpu/drm/i915/display/skl_universal_plane.c

2724

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2727

bdw_enable_pipe_irq(display, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

2735

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2738

bdw_disable_pipe_irq(display, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

2743

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2745

if (pipe == PIPE_C)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2752

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2758

if (skl_plane_has_rc_ccs(display, pipe, plane_id))

drivers/gpu/drm/i915/display/skl_universal_plane.c

2765

enum pipe pipe)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2767

return pipe != PIPE_C;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2771

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2777

if (glk_plane_has_rc_ccs(display, pipe))

drivers/gpu/drm/i915/display/skl_universal_plane.c

2784

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2804

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2831

plane_ctl = intel_de_read(display, PLANE_CTL(plane->pipe, plane->id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

2841

intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

2844

intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2846

intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

2852

enum pipe pipe, enum plane_id plane_id)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2869

plane->pipe = pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

2871

plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2873

intel_fbc_add_plane(skl_plane_fbc(display, pipe, plane_id), plane);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2945

formats = icl_get_plane_formats(display, pipe,

drivers/gpu/drm/i915/display/skl_universal_plane.c

2948

formats = glk_get_plane_formats(display, pipe,

drivers/gpu/drm/i915/display/skl_universal_plane.c

2951

formats = skl_get_plane_formats(display, pipe,

drivers/gpu/drm/i915/display/skl_universal_plane.c

2967

caps = tgl_plane_caps(display, pipe, plane_id);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2969

caps = icl_plane_caps(display, pipe, plane_id);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2971

caps = glk_plane_caps(display, pipe, plane_id);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2973

caps = skl_plane_caps(display, pipe, plane_id);

drivers/gpu/drm/i915/display/skl_universal_plane.c

2982

pipe_name(pipe));

drivers/gpu/drm/i915/display/skl_universal_plane.c

3016

intel_color_pipeline_plane_init(&plane->base, pipe);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3052

enum pipe pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

3060

if (!plane->get_hw_state(plane, &pipe))

drivers/gpu/drm/i915/display/skl_universal_plane.c

3063

drm_WARN_ON(display->drm, pipe != crtc->pipe);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3082

val = intel_de_read(display, PLANE_CTL(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

3092

color_ctl = intel_de_read(display, PLANE_COLOR_CTL(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

3184

base = intel_de_read(display, PLANE_SURF(pipe, plane_id)) & PLANE_SURF_ADDR_MASK;

drivers/gpu/drm/i915/display/skl_universal_plane.c

3187

offset = intel_de_read(display, PLANE_OFFSET(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

3190

val = intel_de_read(display, PLANE_SIZE(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

3194

val = intel_de_read(display, PLANE_STRIDE(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_universal_plane.c

3225

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

3237

intel_de_write(display, PLANE_SURF(pipe, plane_id), plane_state->surf);

drivers/gpu/drm/i915/display/skl_universal_plane.c

443

static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe pipe)

drivers/gpu/drm/i915/display/skl_universal_plane.c

445

return pipe - PIPE_A + INTEL_FBC_A;

drivers/gpu/drm/i915/display/skl_universal_plane.c

681

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

724

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0),

drivers/gpu/drm/i915/display/skl_universal_plane.c

726

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 1),

drivers/gpu/drm/i915/display/skl_universal_plane.c

728

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 2),

drivers/gpu/drm/i915/display/skl_universal_plane.c

730

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 3),

drivers/gpu/drm/i915/display/skl_universal_plane.c

732

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 4),

drivers/gpu/drm/i915/display/skl_universal_plane.c

734

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 5),

drivers/gpu/drm/i915/display/skl_universal_plane.c

737

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 0),

drivers/gpu/drm/i915/display/skl_universal_plane.c

739

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 1),

drivers/gpu/drm/i915/display/skl_universal_plane.c

741

intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 2),

drivers/gpu/drm/i915/display/skl_universal_plane.c

744

PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 0), 0x0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

746

PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 1), 0x0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

748

PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

827

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

839

intel_de_write_dsb(display, dsb, PLANE_WM(pipe, plane_id, level),

drivers/gpu/drm/i915/display/skl_universal_plane.c

842

intel_de_write_dsb(display, dsb, PLANE_WM_TRANS(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

848

intel_de_write_dsb(display, dsb, PLANE_WM_SAGV(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

850

intel_de_write_dsb(display, dsb, PLANE_WM_SAGV_TRANS(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

854

intel_de_write_dsb(display, dsb, PLANE_BUF_CFG(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

858

intel_de_write_dsb(display, dsb, PLANE_NV12_BUF_CFG(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

862

intel_de_write_dsb(display, dsb, PLANE_MIN_BUF_CFG(pipe, plane_id),

drivers/gpu/drm/i915/display/skl_universal_plane.c

873

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

877

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

878

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

886

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

891

intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

917

enum pipe pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.c

920

intel_de_write_dsb(display, dsb, PLANE_CUS_CTL(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

928

PLANE_PIXEL_NORMALIZE(plane->pipe, plane->id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

930

intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

931

intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0);

drivers/gpu/drm/i915/display/skl_universal_plane.c

936

enum pipe *pipe)

drivers/gpu/drm/i915/display/skl_universal_plane.c

944

power_domain = POWER_DOMAIN_PIPE(plane->pipe);

drivers/gpu/drm/i915/display/skl_universal_plane.c

949

ret = intel_de_read(display, PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE;

drivers/gpu/drm/i915/display/skl_universal_plane.c

951

*pipe = plane->pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.h

18

enum pipe;

drivers/gpu/drm/i915/display/skl_universal_plane.h

23

enum pipe pipe, enum plane_id plane_id);

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

106

#define PLANE_STRIDE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

11

#define _SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

116

#define PLANE_POS(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

12

_PLANE((plane), _PIPE((pipe), (reg_1_a), (reg_1_b)), _PIPE((pipe), (reg_2_a), (reg_2_b)))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

128

#define PLANE_SIZE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

13

#define _SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

14

(_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)) + (dw) * 4)

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

140

#define PLANE_KEYVAL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

148

#define PLANE_KEYMSK(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

15

#define _MMIO_SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

157

#define PLANE_SURF(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

16

_MMIO(_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

168

#define PLANE_KEYMAX(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

17

#define _MMIO_SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

178

#define PLANE_OFFSET(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

18

_MMIO(_SKL_PLANE_DW((pipe), (plane), (dw), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

190

#define PLANE_SURFLIVE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

198

#define PLANE_CC_VAL(pipe, plane, dw) _MMIO_SKL_PLANE_DW((pipe), (plane), (dw), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

20

#define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_6_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

206

#define PLANE_AUX_DIST(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

217

#define PLANE_AUX_OFFSET(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

22

_PIPE((pipe), (reg_1_a), (reg_1_b)), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

225

#define PLANE_CUS_CTL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

23

_PIPE((pipe), (reg_2_a), (reg_2_b)), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

24

_PIPE((pipe), (reg_5_a), (reg_5_b)), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

249

#define PLANE_COLOR_CTL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

25

_PIPE((pipe), (reg_6_a), (reg_6_b)))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

26

#define _MMIO_SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_6_b) \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

27

_MMIO(_SEL_FETCH((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

275

#define PLANE_INPUT_CSC_COEFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

283

#define PLANE_INPUT_CSC_PREOFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

291

#define PLANE_INPUT_CSC_POSTOFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

301

#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

303

#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

305

#define PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

306

_PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

312

#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

314

#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

316

#define PLANE_POST_CSC_GAMC_SEG0_DATA_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

317

_PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

323

#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

325

#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

327

#define PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

328

_PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

334

#define _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_ENH_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

336

#define _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_ENH_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

338

#define PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

339

_PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

345

#define _PLANE_POST_CSC_GAMC_INDEX_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

347

#define _PLANE_POST_CSC_GAMC_INDEX_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

349

#define PLANE_POST_CSC_GAMC_INDEX(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

35

#define PLANE_CTL(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

350

_PLANE_POST_CSC_GAMC_INDEX_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

356

#define _PLANE_POST_CSC_GAMC_DATA_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

358

#define _PLANE_POST_CSC_GAMC_DATA_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

360

#define PLANE_POST_CSC_GAMC_DATA(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

361

_PLANE_POST_CSC_GAMC_DATA_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

367

#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_1(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

369

#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_2(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_INDEX_ENH_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

371

#define PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

372

_PLANE_PRE_CSC_GAMC_INDEX_ENH_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

379

#define _PLANE_PRE_CSC_GAMC_DATA_ENH_1(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_DATA_ENH_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

381

#define _PLANE_PRE_CSC_GAMC_DATA_ENH_2(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_DATA_ENH_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

383

#define PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_ENH_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

384

_PLANE_PRE_CSC_GAMC_DATA_ENH_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

390

#define _PLANE_PRE_CSC_GAMC_INDEX_1(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_INDEX_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

392

#define _PLANE_PRE_CSC_GAMC_INDEX_2(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_INDEX_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

394

#define PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

395

_PLANE_PRE_CSC_GAMC_INDEX_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

401

#define _PLANE_PRE_CSC_GAMC_DATA_1(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_DATA_1_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

403

#define _PLANE_PRE_CSC_GAMC_DATA_2(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_DATA_2_A, \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

405

#define PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i) _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_1(pipe), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

406

_PLANE_PRE_CSC_GAMC_DATA_2(pipe))

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

412

#define PLANE_CSC_COEFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

420

#define PLANE_CSC_PREOFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

428

#define PLANE_CSC_POSTOFF(pipe, plane, index) _MMIO_SKL_PLANE_DW((pipe), (plane), (index), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

435

#define PLANE_WM(pipe, plane, level) _MMIO_SKL_PLANE_DW((pipe), (plane), (level), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

448

#define PLANE_WM_SAGV(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

456

#define PLANE_WM_SAGV_TRANS(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

464

#define PLANE_WM_TRANS(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

472

#define PLANE_CHICKEN(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

481

#define PLANE_NV12_BUF_CFG(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

489

#define PLANE_BUF_CFG(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

503

#define PLANE_MIN_BUF_CFG(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

521

#define SEL_FETCH_PLANE_CTL(pipe, plane) _MMIO_SEL_FETCH((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

537

#define SEL_FETCH_PLANE_POS(pipe, plane) _MMIO_SEL_FETCH((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

552

#define SEL_FETCH_PLANE_SIZE(pipe, plane) _MMIO_SEL_FETCH((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

567

#define SEL_FETCH_PLANE_OFFSET(pipe, plane) _MMIO_SEL_FETCH((pipe), (plane),\

drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

577

#define PLANE_PIXEL_NORMALIZE(pipe, plane) _MMIO_SKL_PLANE((pipe), (plane), \

drivers/gpu/drm/i915/display/skl_watermark.c

1192

static u8 compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus,

drivers/gpu/drm/i915/display/skl_watermark.c

1200

return dbuf_slices[i].dbuf_mask[pipe];

drivers/gpu/drm/i915/display/skl_watermark.c

1210

static u8 icl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus)

drivers/gpu/drm/i915/display/skl_watermark.c

1224

return compute_dbuf_slices(pipe, active_pipes, join_mbus,

drivers/gpu/drm/i915/display/skl_watermark.c

1228

static u8 tgl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus)

drivers/gpu/drm/i915/display/skl_watermark.c

1230

return compute_dbuf_slices(pipe, active_pipes, join_mbus,

drivers/gpu/drm/i915/display/skl_watermark.c

1234

static u8 adlp_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus)

drivers/gpu/drm/i915/display/skl_watermark.c

1236

return compute_dbuf_slices(pipe, active_pipes, join_mbus,

drivers/gpu/drm/i915/display/skl_watermark.c

1240

static u8 dg2_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus)

drivers/gpu/drm/i915/display/skl_watermark.c

1242

return compute_dbuf_slices(pipe, active_pipes, join_mbus,

drivers/gpu/drm/i915/display/skl_watermark.c

1249

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

1252

return dg2_compute_dbuf_slices(pipe, active_pipes, join_mbus);

drivers/gpu/drm/i915/display/skl_watermark.c

1254

return adlp_compute_dbuf_slices(pipe, active_pipes, join_mbus);

drivers/gpu/drm/i915/display/skl_watermark.c

1256

return tgl_compute_dbuf_slices(pipe, active_pipes, join_mbus);

drivers/gpu/drm/i915/display/skl_watermark.c

1258

return icl_compute_dbuf_slices(pipe, active_pipes, join_mbus);

drivers/gpu/drm/i915/display/skl_watermark.c

1263

return active_pipes & BIT(pipe) ? BIT(DBUF_S1) : 0;

drivers/gpu/drm/i915/display/skl_watermark.c

1428

const struct skl_ddb_entry *alloc = &dbuf_state->ddb[crtc->pipe];

drivers/gpu/drm/i915/display/skl_watermark.c

2345

if (plane->pipe != crtc->pipe)

drivers/gpu/drm/i915/display/skl_watermark.c

2468

enum pipe pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

2476

for_each_pipe(display, pipe)

drivers/gpu/drm/i915/display/skl_watermark.c

2477

enabled_slices |= dbuf_state->slices[pipe];

drivers/gpu/drm/i915/display/skl_watermark.c

2525

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

2527

new_dbuf_state->slices[pipe] =

drivers/gpu/drm/i915/display/skl_watermark.c

2531

if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe])

drivers/gpu/drm/i915/display/skl_watermark.c

2557

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

2559

new_dbuf_state->weight[pipe] = intel_crtc_ddb_weight(new_crtc_state);

drivers/gpu/drm/i915/display/skl_watermark.c

2561

if (old_dbuf_state->weight[pipe] == new_dbuf_state->weight[pipe])

drivers/gpu/drm/i915/display/skl_watermark.c

2846

display->pkgc.disable[crtc->pipe] = crtc_state->vrr.enable;

drivers/gpu/drm/i915/display/skl_watermark.c

2847

display->pkgc.linetime[crtc->pipe] = DIV_ROUND_UP(crtc_state->linetime, 8);

drivers/gpu/drm/i915/display/skl_watermark.c

2852

if (display->pkgc.disable[crtc->pipe])

drivers/gpu/drm/i915/display/skl_watermark.c

2855

max_linetime = max(display->pkgc.linetime[crtc->pipe], max_linetime);

drivers/gpu/drm/i915/display/skl_watermark.c

2981

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

2991

val = intel_de_read(display, PLANE_WM(pipe, plane_id, level));

drivers/gpu/drm/i915/display/skl_watermark.c

2993

val = intel_de_read(display, CUR_WM(pipe, level));

drivers/gpu/drm/i915/display/skl_watermark.c

2999

val = intel_de_read(display, PLANE_WM_TRANS(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_watermark.c

3001

val = intel_de_read(display, CUR_WM_TRANS(pipe));

drivers/gpu/drm/i915/display/skl_watermark.c

3007

val = intel_de_read(display, PLANE_WM_SAGV(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_watermark.c

3009

val = intel_de_read(display, CUR_WM_SAGV(pipe));

drivers/gpu/drm/i915/display/skl_watermark.c

3014

val = intel_de_read(display, PLANE_WM_SAGV_TRANS(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_watermark.c

3016

val = intel_de_read(display, CUR_WM_SAGV_TRANS(pipe));

drivers/gpu/drm/i915/display/skl_watermark.c

3041

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

3050

dbuf_state->active_pipes |= BIT(pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3054

memset(&dbuf_state->ddb[pipe], 0, sizeof(dbuf_state->ddb[pipe]));

drivers/gpu/drm/i915/display/skl_watermark.c

3069

skl_ddb_get_hw_plane_state(display, crtc->pipe,

drivers/gpu/drm/i915/display/skl_watermark.c

3073

skl_ddb_entry_union(&dbuf_state->ddb[pipe], ddb);

drivers/gpu/drm/i915/display/skl_watermark.c

3074

skl_ddb_entry_union(&dbuf_state->ddb[pipe], ddb_y);

drivers/gpu/drm/i915/display/skl_watermark.c

3077

dbuf_state->weight[pipe] = intel_crtc_ddb_weight(crtc_state);

drivers/gpu/drm/i915/display/skl_watermark.c

3086

crtc_state->wm.skl.ddb.start = mbus_offset + dbuf_state->ddb[pipe].start;

drivers/gpu/drm/i915/display/skl_watermark.c

3087

crtc_state->wm.skl.ddb.end = mbus_offset + dbuf_state->ddb[pipe].end;

drivers/gpu/drm/i915/display/skl_watermark.c

3090

dbuf_state->slices[pipe] =

drivers/gpu/drm/i915/display/skl_watermark.c

3096

dbuf_state->slices[pipe], dbuf_state->ddb[pipe].start,

drivers/gpu/drm/i915/display/skl_watermark.c

3097

dbuf_state->ddb[pipe].end, dbuf_state->active_pipes,

drivers/gpu/drm/i915/display/skl_watermark.c

3379

static bool xelpdp_is_only_pipe_per_dbuf_bank(enum pipe pipe, u8 active_pipes)

drivers/gpu/drm/i915/display/skl_watermark.c

3381

switch (pipe) {

drivers/gpu/drm/i915/display/skl_watermark.c

3391

MISSING_CASE(pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3437

if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe, dbuf_state->active_pipes))

drivers/gpu/drm/i915/display/skl_watermark.c

3452

intel_de_write(display, PIPE_MBUS_DBOX_CTL(crtc->pipe),

drivers/gpu/drm/i915/display/skl_watermark.c

3541

static enum pipe intel_mbus_joined_pipe(struct intel_atomic_state *state,

drivers/gpu/drm/i915/display/skl_watermark.c

3545

enum pipe pipe = ffs(dbuf_state->active_pipes) - 1;

drivers/gpu/drm/i915/display/skl_watermark.c

3552

crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3556

return pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

3563

enum pipe pipe)

drivers/gpu/drm/i915/display/skl_watermark.c

3572

if (pipe != INVALID_PIPE)

drivers/gpu/drm/i915/display/skl_watermark.c

3573

mbus_ctl |= MBUS_JOIN_PIPE_SELECT(pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3583

enum pipe pipe)

drivers/gpu/drm/i915/display/skl_watermark.c

3594

pipe != INVALID_PIPE ? pipe_name(pipe) : '*');

drivers/gpu/drm/i915/display/skl_watermark.c

3596

mbus_ctl_join_update(display, new_dbuf_state, pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3610

enum pipe pipe = intel_mbus_joined_pipe(state, new_dbuf_state);

drivers/gpu/drm/i915/display/skl_watermark.c

3614

intel_dbuf_mbus_join_update(state, pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3632

enum pipe pipe = intel_mbus_joined_pipe(state, old_dbuf_state);

drivers/gpu/drm/i915/display/skl_watermark.c

3638

intel_dbuf_mbus_join_update(state, pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3640

if (pipe != INVALID_PIPE) {

drivers/gpu/drm/i915/display/skl_watermark.c

3641

struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3767

entries[crtc->pipe] = crtc_state->wm.skl.ddb;

drivers/gpu/drm/i915/display/skl_watermark.c

3777

if (dbuf_state->slices[crtc->pipe] & ~slices)

drivers/gpu/drm/i915/display/skl_watermark.c

3781

I915_MAX_PIPES, crtc->pipe))

drivers/gpu/drm/i915/display/skl_watermark.c

3837

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

3842

dbuf_state->active_pipes &= ~BIT(pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

3844

dbuf_state->weight[pipe] = 0;

drivers/gpu/drm/i915/display/skl_watermark.c

3845

dbuf_state->slices[pipe] = 0;

drivers/gpu/drm/i915/display/skl_watermark.c

3847

memset(&dbuf_state->ddb[pipe], 0, sizeof(dbuf_state->ddb[pipe]));

drivers/gpu/drm/i915/display/skl_watermark.c

490

enum pipe for_pipe,

drivers/gpu/drm/i915/display/skl_watermark.c

496

enum pipe pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

502

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/display/skl_watermark.c

503

int weight = dbuf_state->weight[pipe];

drivers/gpu/drm/i915/display/skl_watermark.c

512

if (dbuf_state->slices[pipe] != dbuf_state->slices[for_pipe])

drivers/gpu/drm/i915/display/skl_watermark.c

516

if (pipe < for_pipe) {

drivers/gpu/drm/i915/display/skl_watermark.c

519

} else if (pipe == for_pipe) {

drivers/gpu/drm/i915/display/skl_watermark.c

536

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

543

if (new_dbuf_state->weight[pipe] == 0) {

drivers/gpu/drm/i915/display/skl_watermark.c

544

skl_ddb_entry_init(&new_dbuf_state->ddb[pipe], 0, 0);

drivers/gpu/drm/i915/display/skl_watermark.c

548

dbuf_slice_mask = new_dbuf_state->slices[pipe];

drivers/gpu/drm/i915/display/skl_watermark.c

554

intel_crtc_dbuf_weights(new_dbuf_state, pipe,

drivers/gpu/drm/i915/display/skl_watermark.c

560

skl_ddb_entry_init(&new_dbuf_state->ddb[pipe],

drivers/gpu/drm/i915/display/skl_watermark.c

565

if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe] &&

drivers/gpu/drm/i915/display/skl_watermark.c

566

skl_ddb_entry_equal(&old_dbuf_state->ddb[pipe],

drivers/gpu/drm/i915/display/skl_watermark.c

567

&new_dbuf_state->ddb[pipe]))

drivers/gpu/drm/i915/display/skl_watermark.c

582

crtc_state->wm.skl.ddb.start = mbus_offset + new_dbuf_state->ddb[pipe].start;

drivers/gpu/drm/i915/display/skl_watermark.c

583

crtc_state->wm.skl.ddb.end = mbus_offset + new_dbuf_state->ddb[pipe].end;

drivers/gpu/drm/i915/display/skl_watermark.c

588

old_dbuf_state->slices[pipe], new_dbuf_state->slices[pipe],

drivers/gpu/drm/i915/display/skl_watermark.c

589

old_dbuf_state->ddb[pipe].start, old_dbuf_state->ddb[pipe].end,

drivers/gpu/drm/i915/display/skl_watermark.c

590

new_dbuf_state->ddb[pipe].start, new_dbuf_state->ddb[pipe].end,

drivers/gpu/drm/i915/display/skl_watermark.c

681

const enum pipe pipe,

drivers/gpu/drm/i915/display/skl_watermark.c

691

val = intel_de_read(display, CUR_BUF_CFG(pipe));

drivers/gpu/drm/i915/display/skl_watermark.c

696

val = intel_de_read(display, PLANE_BUF_CFG(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_watermark.c

700

val = intel_de_read(display, PLANE_MIN_BUF_CFG(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_watermark.c

709

val = intel_de_read(display, PLANE_NV12_BUF_CFG(pipe, plane_id));

drivers/gpu/drm/i915/display/skl_watermark.c

720

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/skl_watermark.c

724

power_domain = POWER_DOMAIN_PIPE(pipe);

drivers/gpu/drm/i915/display/skl_watermark.c

730

skl_ddb_get_hw_plane_state(display, pipe,

drivers/gpu/drm/i915/display/skl_watermark_regs.h

13

#define PIPE_MBUS_DBOX_CTL(pipe) _MMIO_PIPE(pipe, _PIPEA_MBUS_DBOX_CTL, \

drivers/gpu/drm/i915/display/skl_watermark_regs.h

41

#define MBUS_JOIN_PIPE_SELECT(pipe) REG_FIELD_PREP(MBUS_JOIN_PIPE_SELECT_MASK, pipe)

drivers/gpu/drm/i915/display/vlv_dsi.c

1315

drm_dbg_kms(display->drm, "pipe %c\n", pipe_name(crtc->pipe));

drivers/gpu/drm/i915/display/vlv_dsi.c

1342

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/vlv_dsi.c

1345

BXT_PIPE_SELECT_MASK, BXT_PIPE_SELECT(pipe));

drivers/gpu/drm/i915/display/vlv_dsi.c

1909

enum pipe pipe;

drivers/gpu/drm/i915/display/vlv_dsi.c

2016

intel_dsi_get_hw_state(encoder, &pipe));

drivers/gpu/drm/i915/display/vlv_dsi.c

649

temp |= crtc->pipe ?

drivers/gpu/drm/i915/display/vlv_dsi.c

731

enum pipe pipe = crtc->pipe;

drivers/gpu/drm/i915/display/vlv_dsi.c

739

intel_set_cpu_fifo_underrun_reporting(display, pipe, true);

drivers/gpu/drm/i915/display/vlv_dsi.c

935

enum pipe *pipe)

drivers/gpu/drm/i915/display/vlv_dsi.c

995

*pipe = tmp;

drivers/gpu/drm/i915/display/vlv_dsi.c

997

*pipe = port == PORT_A ? PIPE_A : PIPE_B;

drivers/gpu/drm/i915/display/vlv_dsi_regs.h

421

#define BXT_PIPE_SELECT(pipe) ((pipe) << 7)

drivers/gpu/drm/i915/gt/intel_gpu_commands.h

370

#define MEDIA_INSTR(pipe, op, sub_op, flags) \

drivers/gpu/drm/i915/gt/intel_gpu_commands.h

371

(__INSTR(INSTR_RC_CLIENT) | (pipe) << INSTR_SUBCLIENT_SHIFT | \

drivers/gpu/drm/i915/gvt/cmd_parser.c

1273

int pipe;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1286

int pipe;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1315

info->pipe = gen8_plane_code[v].pipe;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1324

info->ctrl_reg = DSPCNTR(display, info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1325

info->stride_reg = DSPSTRIDE(display, info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1326

info->surf_reg = DSPSURF(display, info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1328

info->ctrl_reg = SPRCTL(info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1329

info->stride_reg = SPRSTRIDE(info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1330

info->surf_reg = SPRSURF(info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1353

info->pipe = PIPE_A;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1357

info->pipe = PIPE_B;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1361

info->pipe = PIPE_C;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1366

info->pipe = PIPE_A;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1371

info->pipe = PIPE_B;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1376

info->pipe = PIPE_C;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1391

info->ctrl_reg = DSPCNTR(display, info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1392

info->stride_reg = DSPSTRIDE(display, info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1393

info->surf_reg = DSPSURF(display, info->pipe);

drivers/gpu/drm/i915/gvt/cmd_parser.c

1448

vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(display, info->pipe))++;

drivers/gpu/drm/i915/gvt/cmd_parser.c

1453

set_bit(info->event, vgpu->irq.flip_done_event[info->pipe]);

drivers/gpu/drm/i915/gvt/display.c

191

enum pipe pipe;

drivers/gpu/drm/i915/gvt/display.c

203

gvt_for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/gvt/display.c

204

vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &=

drivers/gpu/drm/i915/gvt/display.c

206

vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

207

vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

208

vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) &= ~MCURSOR_MODE_MASK;

drivers/gpu/drm/i915/gvt/display.c

209

vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) |= MCURSOR_MODE_DISABLE;

drivers/gpu/drm/i915/gvt/display.c

519

gvt_for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/gvt/display.c

520

vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

521

vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

522

vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) &= ~MCURSOR_MODE_MASK;

drivers/gpu/drm/i915/gvt/display.c

523

vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) |= MCURSOR_MODE_DISABLE;

drivers/gpu/drm/i915/gvt/display.c

56

int pipe = -1;

drivers/gpu/drm/i915/gvt/display.c

61

pipe = PIPE_A;

drivers/gpu/drm/i915/gvt/display.c

638

static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe)

drivers/gpu/drm/i915/gvt/display.c

64

pipe = PIPE_B;

drivers/gpu/drm/i915/gvt/display.c

650

if (pipe < PIPE_A || pipe > PIPE_C)

drivers/gpu/drm/i915/gvt/display.c

653

for_each_set_bit(event, irq->flip_done_event[pipe],

drivers/gpu/drm/i915/gvt/display.c

655

clear_bit(event, irq->flip_done_event[pipe]);

drivers/gpu/drm/i915/gvt/display.c

656

if (!pipe_is_enabled(vgpu, pipe))

drivers/gpu/drm/i915/gvt/display.c

662

if (pipe_is_enabled(vgpu, pipe)) {

drivers/gpu/drm/i915/gvt/display.c

663

vgpu_vreg_t(vgpu, PIPE_FRMCOUNT_G4X(display, pipe))++;

drivers/gpu/drm/i915/gvt/display.c

664

intel_vgpu_trigger_virtual_event(vgpu, vblank_event[pipe]);

drivers/gpu/drm/i915/gvt/display.c

67

pipe = PIPE_C;

drivers/gpu/drm/i915/gvt/display.c

672

enum pipe pipe;

drivers/gpu/drm/i915/gvt/display.c

675

gvt_for_each_pipe(display, pipe)

drivers/gpu/drm/i915/gvt/display.c

676

emulate_vblank_on_pipe(vgpu, pipe);

drivers/gpu/drm/i915/gvt/display.c

70

return pipe;

drivers/gpu/drm/i915/gvt/display.c

86

int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe)

drivers/gpu/drm/i915/gvt/display.c

92

pipe < PIPE_A || pipe >= I915_MAX_PIPES))

drivers/gpu/drm/i915/gvt/display.c

95

if (vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) & TRANSCONF_ENABLE)

drivers/gpu/drm/i915/gvt/display.c

99

get_edp_pipe(vgpu) == pipe)

drivers/gpu/drm/i915/gvt/display.h

167

int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe);

drivers/gpu/drm/i915/gvt/display_helpers.h

25

intel_display_device_pipe_offset((display), (enum pipe)(idx))

drivers/gpu/drm/i915/gvt/display_helpers.h

30

#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \

drivers/gpu/drm/i915/gvt/display_helpers.h

31

intel_display_device_cursor_offset((display), (pipe))

drivers/gpu/drm/i915/gvt/fb_decoder.c

155

static u32 intel_vgpu_get_stride(struct intel_vgpu *vgpu, int pipe,

drivers/gpu/drm/i915/gvt/fb_decoder.c

161

u32 stride_reg = vgpu_vreg_t(vgpu, DSPSTRIDE(display, pipe)) & stride_mask;

drivers/gpu/drm/i915/gvt/fb_decoder.c

218

int pipe;

drivers/gpu/drm/i915/gvt/fb_decoder.c

220

pipe = get_active_pipe(vgpu);

drivers/gpu/drm/i915/gvt/fb_decoder.c

221

if (pipe >= I915_MAX_PIPES)

drivers/gpu/drm/i915/gvt/fb_decoder.c

224

val = vgpu_vreg_t(vgpu, DSPCNTR(display, pipe));

drivers/gpu/drm/i915/gvt/fb_decoder.c

258

plane->base = vgpu_vreg_t(vgpu, DSPSURF(display, pipe)) & I915_GTT_PAGE_MASK;

drivers/gpu/drm/i915/gvt/fb_decoder.c

269

plane->stride = intel_vgpu_get_stride(vgpu, pipe, plane->tiled,

drivers/gpu/drm/i915/gvt/fb_decoder.c

274

plane->width = (vgpu_vreg_t(vgpu, PIPESRC(display, pipe)) & _PIPE_H_SRCSZ_MASK) >>

drivers/gpu/drm/i915/gvt/fb_decoder.c

277

plane->height = (vgpu_vreg_t(vgpu, PIPESRC(display, pipe)) &

drivers/gpu/drm/i915/gvt/fb_decoder.c

281

val = vgpu_vreg_t(vgpu, DSPTILEOFF(display, pipe));

drivers/gpu/drm/i915/gvt/fb_decoder.c

350

int pipe;

drivers/gpu/drm/i915/gvt/fb_decoder.c

352

pipe = get_active_pipe(vgpu);

drivers/gpu/drm/i915/gvt/fb_decoder.c

353

if (pipe >= I915_MAX_PIPES)

drivers/gpu/drm/i915/gvt/fb_decoder.c

356

val = vgpu_vreg_t(vgpu, CURCNTR(display, pipe));

drivers/gpu/drm/i915/gvt/fb_decoder.c

382

plane->base = vgpu_vreg_t(vgpu, CURBASE(display, pipe)) & I915_GTT_PAGE_MASK;

drivers/gpu/drm/i915/gvt/fb_decoder.c

393

val = vgpu_vreg_t(vgpu, CURPOS(display, pipe));

drivers/gpu/drm/i915/gvt/handlers.c

1035

u32 pipe = DSPSURF_TO_PIPE(display, offset);

drivers/gpu/drm/i915/gvt/handlers.c

1036

int event = SKL_FLIP_EVENT(pipe, PLANE_PRIMARY);

drivers/gpu/drm/i915/gvt/handlers.c

1039

vgpu_vreg_t(vgpu, DSPSURFLIVE(display, pipe)) = vgpu_vreg(vgpu, offset);

drivers/gpu/drm/i915/gvt/handlers.c

1041

vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(display, pipe))++;

drivers/gpu/drm/i915/gvt/handlers.c

1043

if (vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) & PLANE_CTL_ASYNC_FLIP)

drivers/gpu/drm/i915/gvt/handlers.c

1046

set_bit(event, vgpu->irq.flip_done_event[pipe]);

drivers/gpu/drm/i915/gvt/handlers.c

1057

u32 pipe = SPRSURF_TO_PIPE(offset);

drivers/gpu/drm/i915/gvt/handlers.c

1058

int event = SKL_FLIP_EVENT(pipe, PLANE_SPRITE0);

drivers/gpu/drm/i915/gvt/handlers.c

1061

vgpu_vreg_t(vgpu, SPRSURFLIVE(pipe)) = vgpu_vreg(vgpu, offset);

drivers/gpu/drm/i915/gvt/handlers.c

1063

if (vgpu_vreg_t(vgpu, SPRCTL(pipe)) & PLANE_CTL_ASYNC_FLIP)

drivers/gpu/drm/i915/gvt/handlers.c

1066

set_bit(event, vgpu->irq.flip_done_event[pipe]);

drivers/gpu/drm/i915/gvt/handlers.c

1077

enum pipe pipe = REG_50080_TO_PIPE(offset);

drivers/gpu/drm/i915/gvt/handlers.c

1079

int event = SKL_FLIP_EVENT(pipe, plane);

drivers/gpu/drm/i915/gvt/handlers.c

1083

vgpu_vreg_t(vgpu, DSPSURFLIVE(display, pipe)) = vgpu_vreg(vgpu, offset);

drivers/gpu/drm/i915/gvt/handlers.c

1084

vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(display, pipe))++;

drivers/gpu/drm/i915/gvt/handlers.c

1086

vgpu_vreg_t(vgpu, SPRSURFLIVE(pipe)) = vgpu_vreg(vgpu, offset);

drivers/gpu/drm/i915/gvt/handlers.c

1092

set_bit(event, vgpu->irq.flip_done_event[pipe]);

drivers/gpu/drm/i915/gvt/handlers.c

857

enum pipe pipe, unsigned int train_pattern)

drivers/gpu/drm/i915/gvt/handlers.c

864

fdi_rx_imr = FDI_RX_IMR(pipe);

drivers/gpu/drm/i915/gvt/handlers.c

865

fdi_tx_ctl = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/gvt/handlers.c

866

fdi_rx_ctl = FDI_RX_CTL(pipe);

drivers/gpu/drm/i915/gvt/reg.h

58

#define VGT_SPRSTRIDE(pipe) _PIPE(pipe, _SPRA_STRIDE, _PLANE_STRIDE_2_B)

drivers/gpu/drm/i915/gvt/reg.h

60

#define SKL_FLIP_EVENT(pipe, plane) (PRIMARY_A_FLIP_DONE + (plane) * 3 + (pipe))

drivers/gpu/drm/i915/i915_irq.h

14

enum pipe;

drivers/gpu/drm/i915/i915_reg.h

1021

#define TRANS_CHICKEN1(pipe) _MMIO_PIPE(pipe, _TRANSA_CHICKEN1, _TRANSB_CHICKEN1)

drivers/gpu/drm/i915/i915_reg.h

1027

#define TRANS_CHICKEN2(pipe) _MMIO_PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)

drivers/gpu/drm/i915/i915_reg.h

1048

#define FDI_PHASE_SYNC_OVR(pipe) (1 << (FDIA_PHASE_SYNC_SHIFT_OVR - ((pipe) * 2)))

drivers/gpu/drm/i915/i915_reg.h

1049

#define FDI_PHASE_SYNC_EN(pipe) (1 << (FDIA_PHASE_SYNC_SHIFT_EN - ((pipe) * 2)))

drivers/gpu/drm/i915/i915_reg.h

350

#define ERR_INT_PIPE_CRC_DONE(pipe) (1 << (2 + (pipe) * 3))

drivers/gpu/drm/i915/i915_reg.h

352

#define ERR_INT_FIFO_UNDERRUN(pipe) (1 << ((pipe) * 3))

drivers/gpu/drm/i915/i915_reg.h

766

#define MTL_PIPEDMC_GATING_DIS(pipe) REG_BIT(15 - (pipe))

drivers/gpu/drm/i915/i915_reg.h

830

#define DE_PIPE_VBLANK(pipe) (1 << (7 + 8 * (pipe)))

drivers/gpu/drm/i915/i915_reg.h

836

#define DE_PIPE_CRC_DONE(pipe) (1 << (2 + 8 * (pipe)))

drivers/gpu/drm/i915/i915_reg.h

838

#define DE_PIPE_FIFO_UNDERRUN(pipe) (1 << (8 * (pipe)))

drivers/gpu/drm/i915/i915_reg.h

870

#define GEN8_DE_PIPE_IRQ(pipe) (1 << (16 + (pipe)))

drivers/gpu/drm/i915/i915_reg.h

959

#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)

drivers/gpu/drm/i915/i915_reg.h

991

#define LATENCY_REPORTING_REMOVED(pipe) _PICK((pipe), \

drivers/gpu/drm/i915/intel_clock_gating.c

138

enum pipe pipe;

drivers/gpu/drm/i915/intel_clock_gating.c

140

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/intel_clock_gating.c

141

intel_uncore_rmw(&dev_priv->uncore, DSPCNTR(display, pipe),

drivers/gpu/drm/i915/intel_clock_gating.c

144

intel_uncore_rmw(&dev_priv->uncore, DSPSURF(display, pipe),

drivers/gpu/drm/i915/intel_clock_gating.c

147

DSPSURF(display, pipe));

drivers/gpu/drm/i915/intel_clock_gating.c

209

enum pipe pipe;

drivers/gpu/drm/i915/intel_clock_gating.c

224

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/intel_clock_gating.c

225

val = intel_uncore_read(&i915->uncore, TRANS_CHICKEN2(pipe));

drivers/gpu/drm/i915/intel_clock_gating.c

232

intel_uncore_write(&i915->uncore, TRANS_CHICKEN2(pipe), val);

drivers/gpu/drm/i915/intel_clock_gating.c

235

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/intel_clock_gating.c

236

intel_uncore_write(&i915->uncore, TRANS_CHICKEN1(pipe),

drivers/gpu/drm/i915/intel_clock_gating.c

432

enum pipe pipe;

drivers/gpu/drm/i915/intel_clock_gating.c

443

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/intel_clock_gating.c

445

intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(pipe),

drivers/gpu/drm/i915/intel_clock_gating.c

480

enum pipe pipe;

drivers/gpu/drm/i915/intel_clock_gating.c

488

for_each_pipe(display, pipe) {

drivers/gpu/drm/i915/intel_clock_gating.c

490

intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(pipe),

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

49

#define _DP_SSC(val, pipe) ((val) << (2 * (pipe)))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

50

#define DP_SSC_MASK(pipe) _DP_SSC(0x3, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

51

#define DP_SSC_PWR_ON(pipe) _DP_SSC(0x0, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

52

#define DP_SSC_CLK_GATE(pipe) _DP_SSC(0x1, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

53

#define DP_SSC_RESET(pipe) _DP_SSC(0x2, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

54

#define DP_SSC_PWR_GATE(pipe) _DP_SSC(0x3, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

55

#define _DP_SSS(val, pipe) ((val) << (2 * (pipe) + 16))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

56

#define DP_SSS_MASK(pipe) _DP_SSS(0x3, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

57

#define DP_SSS_PWR_ON(pipe) _DP_SSS(0x0, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

58

#define DP_SSS_CLK_GATE(pipe) _DP_SSS(0x1, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

59

#define DP_SSS_RESET(pipe) _DP_SSS(0x2, (pipe))

drivers/gpu/drm/i915/vlv_iosf_sb_reg.h

60

#define DP_SSS_PWR_GATE(pipe) _DP_SSS(0x3, (pipe))

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

105

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

138

static void imx_lcdc_update_hw_registers(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

142

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

143

struct drm_plane_state *new_state = pipe->plane.state;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

145

struct imx_lcdc *lcdc = imx_lcdc_from_drmdev(pipe->crtc.dev);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

191

static void imx_lcdc_pipe_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

198

struct imx_lcdc *lcdc = imx_lcdc_from_drmdev(pipe->crtc.dev);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

199

struct drm_display_mode *mode = &pipe->crtc.mode;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

234

dev_err(pipe->crtc.dev->dev, "Cannot enable ipg clock: %pe\n", ERR_PTR(ret));

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

239

dev_err(pipe->crtc.dev->dev, "Cannot enable ahb clock: %pe\n", ERR_PTR(ret));

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

246

imx_lcdc_update_hw_registers(pipe, NULL, true);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

252

static void imx_lcdc_pipe_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

254

struct imx_lcdc *lcdc = imx_lcdc_from_drmdev(pipe->crtc.dev);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

255

struct drm_crtc *crtc = &lcdc->pipe.crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

261

if (pipe->crtc.enabled)

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

276

static int imx_lcdc_pipe_check(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

281

const struct drm_display_mode *old_mode = &pipe->crtc.state->mode;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

286

drm_err(pipe->crtc.dev, "unsupported display mode (%u x %u)\n",

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

298

static void imx_lcdc_pipe_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

301

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

303

struct drm_plane_state *new_state = pipe->plane.state;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

314

imx_lcdc_update_hw_registers(pipe, old_state, mode_changed);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

372

struct drm_crtc *crtc = &lcdc->pipe.crtc;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

432

ret = drm_simple_display_pipe_init(drm, &lcdc->pipe,

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

443

ret = drm_bridge_attach(&lcdc->pipe.encoder, bridge, NULL, DRM_BRIDGE_ATTACH_NO_CONNECTOR);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

447

lcdc->connector = drm_bridge_connector_init(drm, &lcdc->pipe.encoder);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

451

drm_connector_attach_encoder(lcdc->connector, &lcdc->pipe.encoder);

drivers/gpu/drm/lima/lima_bcast.c

16

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_bcast.c

21

struct lima_ip *pp = pipe->processor[i];

drivers/gpu/drm/lima/lima_ctx.c

22

err = lima_sched_context_init(dev->pipe + i, ctx->context + i);

drivers/gpu/drm/lima/lima_ctx.c

38

lima_sched_context_fini(dev->pipe + i, ctx->context + i);

drivers/gpu/drm/lima/lima_ctx.c

49

lima_sched_context_fini(ctx->dev->pipe + i, ctx->context + i);

drivers/gpu/drm/lima/lima_device.c

274

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp;

drivers/gpu/drm/lima/lima_device.c

277

pipe->ldev = dev;

drivers/gpu/drm/lima/lima_device.c

279

err = lima_sched_pipe_init(pipe, "gp");

drivers/gpu/drm/lima/lima_device.c

283

pipe->l2_cache[pipe->num_l2_cache++] = dev->ip + lima_ip_l2_cache0;

drivers/gpu/drm/lima/lima_device.c

284

pipe->mmu[pipe->num_mmu++] = dev->ip + lima_ip_gpmmu;

drivers/gpu/drm/lima/lima_device.c

285

pipe->processor[pipe->num_processor++] = dev->ip + lima_ip_gp;

drivers/gpu/drm/lima/lima_device.c

289

lima_sched_pipe_fini(pipe);

drivers/gpu/drm/lima/lima_device.c

298

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp;

drivers/gpu/drm/lima/lima_device.c

301

lima_sched_pipe_fini(pipe);

drivers/gpu/drm/lima/lima_device.c

306

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_device.c

309

pipe->ldev = dev;

drivers/gpu/drm/lima/lima_device.c

311

err = lima_sched_pipe_init(pipe, "pp");

drivers/gpu/drm/lima/lima_device.c

326

pipe->mmu[pipe->num_mmu++] = ppmmu;

drivers/gpu/drm/lima/lima_device.c

327

pipe->processor[pipe->num_processor++] = pp;

drivers/gpu/drm/lima/lima_device.c

328

if (!pipe->l2_cache[i >> 2])

drivers/gpu/drm/lima/lima_device.c

329

pipe->l2_cache[pipe->num_l2_cache++] = l2_cache;

drivers/gpu/drm/lima/lima_device.c

334

pipe->bcast_processor = dev->ip + lima_ip_pp_bcast;

drivers/gpu/drm/lima/lima_device.c

335

pipe->bcast_mmu = dev->ip + lima_ip_ppmmu_bcast;

drivers/gpu/drm/lima/lima_device.c

340

lima_sched_pipe_fini(pipe);

drivers/gpu/drm/lima/lima_device.c

349

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_device.c

352

lima_sched_pipe_fini(pipe);

drivers/gpu/drm/lima/lima_device.c

517

if (atomic_read(&ldev->pipe[i].base.credit_count))

drivers/gpu/drm/lima/lima_device.h

94

struct lima_sched_pipe pipe[lima_pipe_num];

drivers/gpu/drm/lima/lima_dlbu.c

17

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_dlbu.c

22

struct lima_ip *pp = pipe->processor[i];

drivers/gpu/drm/lima/lima_drv.c

108

struct lima_sched_pipe *pipe;

drivers/gpu/drm/lima/lima_drv.c

115

if (args->pipe >= lima_pipe_num || args->nr_bos == 0)

drivers/gpu/drm/lima/lima_drv.c

121

pipe = ldev->pipe + args->pipe;

drivers/gpu/drm/lima/lima_drv.c

122

if (args->frame_size != pipe->frame_size)

drivers/gpu/drm/lima/lima_drv.c

135

task = kmem_cache_zalloc(pipe->task_slab, GFP_KERNEL);

drivers/gpu/drm/lima/lima_drv.c

147

err = pipe->task_validate(pipe, task);

drivers/gpu/drm/lima/lima_drv.c

157

submit.pipe = args->pipe;

drivers/gpu/drm/lima/lima_drv.c

173

kmem_cache_free(pipe->task_slab, task);

drivers/gpu/drm/lima/lima_drv.c

61

args->value = ldev->pipe[lima_pipe_pp].num_processor;

drivers/gpu/drm/lima/lima_drv.h

30

int pipe;

drivers/gpu/drm/lima/lima_gem.c

343

submit->task, submit->ctx->context + submit->pipe,

drivers/gpu/drm/lima/lima_gp.c

104

static int lima_gp_task_validate(struct lima_sched_pipe *pipe,

drivers/gpu/drm/lima/lima_gp.c

109

(void)pipe;

drivers/gpu/drm/lima/lima_gp.c

128

static void lima_gp_task_run(struct lima_sched_pipe *pipe,

drivers/gpu/drm/lima/lima_gp.c

131

struct lima_ip *ip = pipe->processor[0];

drivers/gpu/drm/lima/lima_gp.c

215

static void lima_gp_task_fini(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_gp.c

217

lima_gp_soft_reset_async(pipe->processor[0]);

drivers/gpu/drm/lima/lima_gp.c

220

static void lima_gp_task_error(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_gp.c

222

struct lima_ip *ip = pipe->processor[0];

drivers/gpu/drm/lima/lima_gp.c

231

static void lima_gp_task_mmu_error(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_gp.c

233

lima_sched_pipe_task_done(pipe);

drivers/gpu/drm/lima/lima_gp.c

236

static void lima_gp_task_mask_irq(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_gp.c

238

struct lima_ip *ip = pipe->processor[0];

drivers/gpu/drm/lima/lima_gp.c

24

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp;

drivers/gpu/drm/lima/lima_gp.c

243

static int lima_gp_task_recover(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_gp.c

245

struct lima_ip *ip = pipe->processor[0];

drivers/gpu/drm/lima/lima_gp.c

246

struct lima_sched_task *task = pipe->current_task;

drivers/gpu/drm/lima/lima_gp.c

25

struct lima_sched_task *task = pipe->current_task;

drivers/gpu/drm/lima/lima_gp.c

356

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp;

drivers/gpu/drm/lima/lima_gp.c

368

pipe->frame_size = frame_size;

drivers/gpu/drm/lima/lima_gp.c

369

pipe->task_slab = lima_gp_task_slab;

drivers/gpu/drm/lima/lima_gp.c

371

pipe->task_validate = lima_gp_task_validate;

drivers/gpu/drm/lima/lima_gp.c

372

pipe->task_run = lima_gp_task_run;

drivers/gpu/drm/lima/lima_gp.c

373

pipe->task_fini = lima_gp_task_fini;

drivers/gpu/drm/lima/lima_gp.c

374

pipe->task_error = lima_gp_task_error;

drivers/gpu/drm/lima/lima_gp.c

375

pipe->task_mmu_error = lima_gp_task_mmu_error;

drivers/gpu/drm/lima/lima_gp.c

376

pipe->task_recover = lima_gp_task_recover;

drivers/gpu/drm/lima/lima_gp.c

377

pipe->task_mask_irq = lima_gp_task_mask_irq;

drivers/gpu/drm/lima/lima_gp.c

49

pipe->error = true;

drivers/gpu/drm/lima/lima_gp.c

57

pipe->error = false;

drivers/gpu/drm/lima/lima_gp.c

63

lima_sched_pipe_task_done(pipe);

drivers/gpu/drm/lima/lima_mmu.c

35

struct lima_sched_pipe *pipe;

drivers/gpu/drm/lima/lima_mmu.c

56

pipe = dev->pipe + (ip->id == lima_ip_gpmmu ? lima_pipe_gp : lima_pipe_pp);

drivers/gpu/drm/lima/lima_mmu.c

57

lima_sched_pipe_mmu_error(pipe);

drivers/gpu/drm/lima/lima_pp.c

146

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_pp.c

147

struct drm_lima_m450_pp_frame *frame = pipe->current_task->frame;

drivers/gpu/drm/lima/lima_pp.c

150

err |= lima_pp_soft_reset_async_wait_one(pipe->processor[i]);

drivers/gpu/drm/lima/lima_pp.c

24

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_pp.c

32

pipe->error = true;

drivers/gpu/drm/lima/lima_pp.c

329

static int lima_pp_task_validate(struct lima_sched_pipe *pipe,

drivers/gpu/drm/lima/lima_pp.c

334

if (pipe->bcast_processor) {

drivers/gpu/drm/lima/lima_pp.c

347

if (num_pp == 0 || num_pp > pipe->num_processor)

drivers/gpu/drm/lima/lima_pp.c

353

static void lima_pp_task_run(struct lima_sched_pipe *pipe,

drivers/gpu/drm/lima/lima_pp.c

356

if (pipe->bcast_processor) {

drivers/gpu/drm/lima/lima_pp.c

358

struct lima_device *dev = pipe->bcast_processor->dev;

drivers/gpu/drm/lima/lima_pp.c

359

struct lima_ip *ip = pipe->bcast_processor;

drivers/gpu/drm/lima/lima_pp.c

362

pipe->done = 0;

drivers/gpu/drm/lima/lima_pp.c

363

atomic_set(&pipe->task, frame->num_pp);

drivers/gpu/drm/lima/lima_pp.c

380

struct lima_ip *ip = pipe->processor[i];

drivers/gpu/drm/lima/lima_pp.c

392

atomic_set(&pipe->task, frame->num_pp);

drivers/gpu/drm/lima/lima_pp.c

395

struct lima_ip *ip = pipe->processor[i];

drivers/gpu/drm/lima/lima_pp.c

411

static void lima_pp_task_fini(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_pp.c

413

if (pipe->bcast_processor)

drivers/gpu/drm/lima/lima_pp.c

414

lima_pp_soft_reset_async(pipe->bcast_processor);

drivers/gpu/drm/lima/lima_pp.c

418

for (i = 0; i < pipe->num_processor; i++)

drivers/gpu/drm/lima/lima_pp.c

419

lima_pp_soft_reset_async(pipe->processor[i]);

drivers/gpu/drm/lima/lima_pp.c

423

static void lima_pp_task_error(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_pp.c

427

for (i = 0; i < pipe->num_processor; i++) {

drivers/gpu/drm/lima/lima_pp.c

428

struct lima_ip *ip = pipe->processor[i];

drivers/gpu/drm/lima/lima_pp.c

437

if (pipe->bcast_processor)

drivers/gpu/drm/lima/lima_pp.c

438

lima_bcast_reset(pipe->bcast_processor);

drivers/gpu/drm/lima/lima_pp.c

441

static void lima_pp_task_mmu_error(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_pp.c

443

if (atomic_dec_and_test(&pipe->task))

drivers/gpu/drm/lima/lima_pp.c

444

lima_sched_pipe_task_done(pipe);

drivers/gpu/drm/lima/lima_pp.c

447

static void lima_pp_task_mask_irq(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_pp.c

45

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_pp.c

451

for (i = 0; i < pipe->num_processor; i++) {

drivers/gpu/drm/lima/lima_pp.c

452

struct lima_ip *ip = pipe->processor[i];

drivers/gpu/drm/lima/lima_pp.c

457

if (pipe->bcast_processor)

drivers/gpu/drm/lima/lima_pp.c

458

lima_bcast_mask_irq(pipe->bcast_processor);

drivers/gpu/drm/lima/lima_pp.c

467

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_pp.c

484

pipe->frame_size = frame_size;

drivers/gpu/drm/lima/lima_pp.c

485

pipe->task_slab = lima_pp_task_slab;

drivers/gpu/drm/lima/lima_pp.c

487

pipe->task_validate = lima_pp_task_validate;

drivers/gpu/drm/lima/lima_pp.c

488

pipe->task_run = lima_pp_task_run;

drivers/gpu/drm/lima/lima_pp.c

489

pipe->task_fini = lima_pp_task_fini;

drivers/gpu/drm/lima/lima_pp.c

490

pipe->task_error = lima_pp_task_error;

drivers/gpu/drm/lima/lima_pp.c

491

pipe->task_mmu_error = lima_pp_task_mmu_error;

drivers/gpu/drm/lima/lima_pp.c

492

pipe->task_mask_irq = lima_pp_task_mask_irq;

drivers/gpu/drm/lima/lima_pp.c

54

if (atomic_dec_and_test(&pipe->task))

drivers/gpu/drm/lima/lima_pp.c

55

lima_sched_pipe_task_done(pipe);

drivers/gpu/drm/lima/lima_pp.c

66

struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;

drivers/gpu/drm/lima/lima_pp.c

70

if (!pipe->current_task)

drivers/gpu/drm/lima/lima_pp.c

73

frame = pipe->current_task->frame;

drivers/gpu/drm/lima/lima_pp.c

76

struct lima_ip *ip = pipe->processor[i];

drivers/gpu/drm/lima/lima_pp.c

79

if (pipe->done & (1 << i))

drivers/gpu/drm/lima/lima_pp.c

96

pipe->done |= (1 << i);

drivers/gpu/drm/lima/lima_pp.c

97

if (atomic_dec_and_test(&pipe->task))

drivers/gpu/drm/lima/lima_pp.c

98

lima_sched_pipe_task_done(pipe);

drivers/gpu/drm/lima/lima_sched.c

100

pipe->fence_context, ++pipe->fence_seqno);

drivers/gpu/drm/lima/lima_sched.c

160

int lima_sched_context_init(struct lima_sched_pipe *pipe,

drivers/gpu/drm/lima/lima_sched.c

163

struct drm_gpu_scheduler *sched = &pipe->base;

drivers/gpu/drm/lima/lima_sched.c

169

void lima_sched_context_fini(struct lima_sched_pipe *pipe,

drivers/gpu/drm/lima/lima_sched.c

209

struct lima_sched_pipe *pipe = to_lima_pipe(job->sched);

drivers/gpu/drm/lima/lima_sched.c

210

struct lima_device *ldev = pipe->ldev;

drivers/gpu/drm/lima/lima_sched.c

218

fence = lima_fence_create(pipe);

drivers/gpu/drm/lima/lima_sched.c

235

pipe->current_task = task;

drivers/gpu/drm/lima/lima_sched.c

24

struct lima_sched_pipe *pipe;

drivers/gpu/drm/lima/lima_sched.c

252

for (i = 0; i < pipe->num_l2_cache; i++)

drivers/gpu/drm/lima/lima_sched.c

253

lima_l2_cache_flush(pipe->l2_cache[i]);

drivers/gpu/drm/lima/lima_sched.c

255

lima_vm_put(pipe->current_vm);

drivers/gpu/drm/lima/lima_sched.c

256

pipe->current_vm = lima_vm_get(task->vm);

drivers/gpu/drm/lima/lima_sched.c

258

if (pipe->bcast_mmu)

drivers/gpu/drm/lima/lima_sched.c

259

lima_mmu_switch_vm(pipe->bcast_mmu, pipe->current_vm);

drivers/gpu/drm/lima/lima_sched.c

261

for (i = 0; i < pipe->num_mmu; i++)

drivers/gpu/drm/lima/lima_sched.c

262

lima_mmu_switch_vm(pipe->mmu[i], pipe->current_vm);

drivers/gpu/drm/lima/lima_sched.c

267

pipe->error = false;

drivers/gpu/drm/lima/lima_sched.c

268

pipe->task_run(pipe, task);

drivers/gpu/drm/lima/lima_sched.c

276

struct lima_sched_pipe *pipe = to_lima_pipe(task->base.sched);

drivers/gpu/drm/lima/lima_sched.c

277

struct lima_ip *ip = pipe->processor[0];

drivers/gpu/drm/lima/lima_sched.c

303

size = sizeof(struct lima_dump_chunk) + pipe->frame_size;

drivers/gpu/drm/lima/lima_sched.c

336

chunk->size = pipe->frame_size;

drivers/gpu/drm/lima/lima_sched.c

337

memcpy(chunk + 1, task->frame, pipe->frame_size);

drivers/gpu/drm/lima/lima_sched.c

405

struct lima_sched_pipe *pipe = to_lima_pipe(job->sched);

drivers/gpu/drm/lima/lima_sched.c

407

struct lima_device *ldev = pipe->ldev;

drivers/gpu/drm/lima/lima_sched.c

408

struct lima_ip *ip = pipe->processor[0];

drivers/gpu/drm/lima/lima_sched.c

427

for (i = 0; i < pipe->num_processor; i++)

drivers/gpu/drm/lima/lima_sched.c

428

synchronize_irq(pipe->processor[i]->irq);

drivers/gpu/drm/lima/lima_sched.c

429

if (pipe->bcast_processor)

drivers/gpu/drm/lima/lima_sched.c

430

synchronize_irq(pipe->bcast_processor->irq);

drivers/gpu/drm/lima/lima_sched.c

442

pipe->task_mask_irq(pipe);

drivers/gpu/drm/lima/lima_sched.c

444

if (!pipe->error)

drivers/gpu/drm/lima/lima_sched.c

447

drm_sched_stop(&pipe->base, &task->base);

drivers/gpu/drm/lima/lima_sched.c

454

pipe->task_error(pipe);

drivers/gpu/drm/lima/lima_sched.c

456

if (pipe->bcast_mmu)

drivers/gpu/drm/lima/lima_sched.c

457

lima_mmu_page_fault_resume(pipe->bcast_mmu);

drivers/gpu/drm/lima/lima_sched.c

459

for (i = 0; i < pipe->num_mmu; i++)

drivers/gpu/drm/lima/lima_sched.c

460

lima_mmu_page_fault_resume(pipe->mmu[i]);

drivers/gpu/drm/lima/lima_sched.c

463

lima_vm_put(pipe->current_vm);

drivers/gpu/drm/lima/lima_sched.c

464

pipe->current_vm = NULL;

drivers/gpu/drm/lima/lima_sched.c

465

pipe->current_task = NULL;

drivers/gpu/drm/lima/lima_sched.c

469

drm_sched_resubmit_jobs(&pipe->base);

drivers/gpu/drm/lima/lima_sched.c

470

drm_sched_start(&pipe->base, 0);

drivers/gpu/drm/lima/lima_sched.c

478

struct lima_sched_pipe *pipe = to_lima_pipe(job->sched);

drivers/gpu/drm/lima/lima_sched.c

489

kmem_cache_free(pipe->task_slab, task);

drivers/gpu/drm/lima/lima_sched.c

500

struct lima_sched_pipe *pipe =

drivers/gpu/drm/lima/lima_sched.c

504

for (i = 0; i < pipe->num_l2_cache; i++)

drivers/gpu/drm/lima/lima_sched.c

505

lima_l2_cache_flush(pipe->l2_cache[i]);

drivers/gpu/drm/lima/lima_sched.c

507

if (pipe->bcast_mmu) {

drivers/gpu/drm/lima/lima_sched.c

508

lima_mmu_flush_tlb(pipe->bcast_mmu);

drivers/gpu/drm/lima/lima_sched.c

510

for (i = 0; i < pipe->num_mmu; i++)

drivers/gpu/drm/lima/lima_sched.c

511

lima_mmu_flush_tlb(pipe->mmu[i]);

drivers/gpu/drm/lima/lima_sched.c

514

if (pipe->task_recover(pipe))

drivers/gpu/drm/lima/lima_sched.c

515

drm_sched_fault(&pipe->base);

drivers/gpu/drm/lima/lima_sched.c

518

int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name)

drivers/gpu/drm/lima/lima_sched.c

529

.dev = pipe->ldev->dev,

drivers/gpu/drm/lima/lima_sched.c

532

pipe->fence_context = dma_fence_context_alloc(1);

drivers/gpu/drm/lima/lima_sched.c

533

spin_lock_init(&pipe->fence_lock);

drivers/gpu/drm/lima/lima_sched.c

535

INIT_WORK(&pipe->recover_work, lima_sched_recover_work);

drivers/gpu/drm/lima/lima_sched.c

537

return drm_sched_init(&pipe->base, &args);

drivers/gpu/drm/lima/lima_sched.c

540

void lima_sched_pipe_fini(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_sched.c

542

drm_sched_fini(&pipe->base);

drivers/gpu/drm/lima/lima_sched.c

545

void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_sched.c

547

struct lima_sched_task *task = pipe->current_task;

drivers/gpu/drm/lima/lima_sched.c

548

struct lima_device *ldev = pipe->ldev;

drivers/gpu/drm/lima/lima_sched.c

550

if (pipe->error) {

drivers/gpu/drm/lima/lima_sched.c

552

schedule_work(&pipe->recover_work);

drivers/gpu/drm/lima/lima_sched.c

554

drm_sched_fault(&pipe->base);

drivers/gpu/drm/lima/lima_sched.c

556

pipe->task_fini(pipe);

drivers/gpu/drm/lima/lima_sched.c

66

return f->pipe->base.name;

drivers/gpu/drm/lima/lima_sched.c

90

static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_sched.c

98

fence->pipe = pipe;

drivers/gpu/drm/lima/lima_sched.c

99

dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock,

drivers/gpu/drm/lima/lima_sched.h

101

int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name);

drivers/gpu/drm/lima/lima_sched.h

102

void lima_sched_pipe_fini(struct lima_sched_pipe *pipe);

drivers/gpu/drm/lima/lima_sched.h

103

void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe);

drivers/gpu/drm/lima/lima_sched.h

105

static inline void lima_sched_pipe_mmu_error(struct lima_sched_pipe *pipe)

drivers/gpu/drm/lima/lima_sched.h

107

pipe->error = true;

drivers/gpu/drm/lima/lima_sched.h

108

pipe->task_mmu_error(pipe);

drivers/gpu/drm/lima/lima_sched.h

77

int (*task_validate)(struct lima_sched_pipe *pipe, struct lima_sched_task *task);

drivers/gpu/drm/lima/lima_sched.h

78

void (*task_run)(struct lima_sched_pipe *pipe, struct lima_sched_task *task);

drivers/gpu/drm/lima/lima_sched.h

79

void (*task_fini)(struct lima_sched_pipe *pipe);

drivers/gpu/drm/lima/lima_sched.h

80

void (*task_error)(struct lima_sched_pipe *pipe);

drivers/gpu/drm/lima/lima_sched.h

81

void (*task_mmu_error)(struct lima_sched_pipe *pipe);

drivers/gpu/drm/lima/lima_sched.h

82

int (*task_recover)(struct lima_sched_pipe *pipe);

drivers/gpu/drm/lima/lima_sched.h

83

void (*task_mask_irq)(struct lima_sched_pipe *pipe);

drivers/gpu/drm/lima/lima_sched.h

95

int lima_sched_context_init(struct lima_sched_pipe *pipe,

drivers/gpu/drm/lima/lima_sched.h

97

void lima_sched_context_fini(struct lima_sched_pipe *pipe,

drivers/gpu/drm/lima/lima_trace.h

19

__string(pipe, task->base.sched->name)

drivers/gpu/drm/lima/lima_trace.h

25

__assign_str(pipe);

drivers/gpu/drm/lima/lima_trace.h

30

__get_str(pipe))

drivers/gpu/drm/loongson/lsdc_drv.h

377

u32 offset, u32 pipe)

drivers/gpu/drm/loongson/lsdc_drv.h

379

return readl(ldev->reg_base + offset + pipe * CRTC_PIPE_OFFSET);

drivers/gpu/drm/loongson/lsdc_drv.h

383

u32 offset, u32 pipe, u32 val)

drivers/gpu/drm/loongson/lsdc_drv.h

385

writel(val, ldev->reg_base + offset + pipe * CRTC_PIPE_OFFSET);

drivers/gpu/drm/loongson/lsdc_output_7a2000.c

517

unsigned int pipe)

drivers/gpu/drm/loongson/lsdc_output_7a2000.c

524

ret = drm_encoder_init(ddev, encoder, &ls7a2000_encoder_funcs[pipe],

drivers/gpu/drm/loongson/lsdc_output_7a2000.c

525

DRM_MODE_ENCODER_TMDS, "encoder-%u", pipe);

drivers/gpu/drm/loongson/lsdc_output_7a2000.c

529

encoder->possible_crtcs = BIT(pipe);

drivers/gpu/drm/loongson/lsdc_output_7a2000.c

534

&ls7a2000_hdmi_connector_funcs[pipe],

drivers/gpu/drm/loongson/lsdc_output_7a2000.c

539

drm_info(ddev, "display pipe-%u has HDMI %s\n", pipe, pipe ? "" : "and/or VGA");

drivers/gpu/drm/mcde/mcde_display.c

1152

static void mcde_display_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/mcde/mcde_display.c

1156

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1157

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/mcde/mcde_display.c

1301

static void mcde_display_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/mcde/mcde_display.c

1303

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

135

drm_crtc_handle_vblank(&mcde->pipe.crtc);

drivers/gpu/drm/mcde/mcde_display.c

1384

static void mcde_display_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/mcde/mcde_display.c

1387

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1391

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/mcde/mcde_display.c

1446

static int mcde_display_enable_vblank(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/mcde/mcde_display.c

1448

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1465

static void mcde_display_disable_vblank(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/mcde/mcde_display.c

1467

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/mcde/mcde_display.c

1513

ret = drm_simple_display_pipe_init(drm, &mcde->pipe,

drivers/gpu/drm/mcde/mcde_display.c

160

static int mcde_display_check(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/mcde/mcde_display.c

165

struct drm_framebuffer *old_fb = pipe->plane.state->fb;

drivers/gpu/drm/mcde/mcde_drm.h

75

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/mcde/mcde_drv.c

189

ret = drm_simple_display_pipe_attach_bridge(&mcde->pipe,

drivers/gpu/drm/mediatek/mtk_crtc.c

860

mtk_crtc_state->base.event->pipe = drm_crtc_index(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

907

unsigned int pipe)

drivers/gpu/drm/mediatek/mtk_crtc.c

966

int comp_idx, int pipe)

drivers/gpu/drm/mediatek/mtk_crtc.c

975

BIT(pipe),

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

927

if ((dyn_pwrup_reglist->regs[i].pipe & BIT(pipe_id)) == 0)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

19

static void a8xx_aperture_slice_set(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 slice)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

25

val = A8XX_CP_APERTURE_CNTL_HOST_PIPEID(pipe) | A8XX_CP_APERTURE_CNTL_HOST_SLICEID(slice);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

35

static void a8xx_aperture_acquire(struct msm_gpu *gpu, enum adreno_pipe pipe, unsigned long *flags)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

374

if (!(BIT(pipe_id) & regs[i].pipe))

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

42

a8xx_aperture_slice_set(gpu, pipe, 0);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

61

static void a8xx_write_pipe(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 offset, u32 data)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

65

a8xx_aperture_acquire(gpu, pipe, &flags);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

70

static u32 a8xx_read_pipe_slice(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 slice, u32 offset)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

78

a8xx_aperture_slice_set(gpu, pipe, slice);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

892

u32 pipe = 0;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

898

pipe |= BIT(PIPE_BR);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

902

pipe |= BIT(PIPE_BV);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

904

if (!pipe) {

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

910

if (!(BIT(pipe_id) & pipe))

drivers/gpu/drm/msm/adreno/adreno_gpu.h

96

u32 pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1744

if (!pstate->pipe[i].sspp)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1747

i, pstate->pipe[i].sspp->cap->name);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1749

i, pstate->pipe[i].multirect_mode,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1750

pstate->pipe[i].multirect_index);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

276

unsigned int pipe = crtc->index;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

282

DRM_ERROR("no encoder found for crtc %d\n", pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

407

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

416

sspp_idx = pipe->sspp->idx;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

422

format->pixel_format, pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

431

pipe->multirect_index);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

434

stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

480

if (!pstate->pipe[pipe_idx].sspp)

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

484

set_bit(pstate->pipe[pipe_idx].sspp->idx, active_fetch);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

485

set_bit(pstate->pipe[pipe_idx].sspp->idx, active_pipes);

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

491

&pstate->pipe[pipe_idx], i,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

541

enum dpu_sspp pipe = stage_cfg->stage[i][j];

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

543

&ctl_blend_config[pipe][rect_index == DPU_SSPP_RECT_1];

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

238

enum dpu_sspp pipe = stage_cfg->stage[stage][i];

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

243

if (!pipe)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

247

if (pipe >= SSPP_DMA0 && pipe <= SSPP_DMA5) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

249

pipe_id = pipe - SSPP_DMA0;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

250

} else if (pipe >= SSPP_VIG0 && pipe <= SSPP_VIG3) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

252

pipe_id = pipe - SSPP_VIG0;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

254

DPU_ERROR("invalid rec-%d pipe:%d\n", i, pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

147

static void dpu_hw_sspp_setup_multirect(struct dpu_sw_pipe *pipe)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

149

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

154

dpu_hw_setup_multirect_impl(pipe, ctx, SSPP_MULTIRECT_OPMODE);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

157

void dpu_hw_setup_multirect_impl(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

162

if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

171

mode_mask |= pipe->multirect_index;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

172

if (pipe->multirect_mode == DPU_SSPP_MULTIRECT_TIME_MX)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

219

static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

222

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

228

if (pipe->multirect_index == DPU_SSPP_RECT_SOLO ||

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

229

pipe->multirect_index == DPU_SSPP_RECT_0) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

258

dpu_hw_setup_format_impl(pipe, fmt, flags, ctx, op_mode_off,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

263

void dpu_hw_setup_format_impl(struct dpu_sw_pipe *pipe, const struct msm_format *fmt,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

445

static void dpu_hw_sspp_setup_rects(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

448

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

454

if (pipe->multirect_index == DPU_SSPP_RECT_SOLO ||

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

455

pipe->multirect_index == DPU_SSPP_RECT_0) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

467

dpu_hw_setup_rects_impl(pipe, cfg, ctx, src_size_off,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

471

static void dpu_hw_sspp_setup_sourceaddress(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

474

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

481

if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

485

} else if (pipe->multirect_index == DPU_SSPP_RECT_0) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

497

if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

506

if (pipe->multirect_index == DPU_SSPP_RECT_0) {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

544

static void dpu_hw_sspp_setup_solidfill(struct dpu_sw_pipe *pipe, u32 color)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

546

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

552

if (pipe->multirect_index == DPU_SSPP_RECT_SOLO ||

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

553

pipe->multirect_index == DPU_SSPP_RECT_0)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

558

dpu_hw_setup_solidfill_impl(pipe, color, ctx, const_clr_off);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

561

void dpu_hw_setup_solidfill_impl(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

569

ctx->ops.setup_sourceaddress(pipe, &cfg);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

601

static void dpu_hw_sspp_setup_cdp(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

605

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

611

if (pipe->multirect_index == DPU_SSPP_RECT_SOLO ||

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

612

pipe->multirect_index == DPU_SSPP_RECT_0)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

190

void (*setup_format)(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

198

void (*setup_rects)(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

230

void (*setup_solidfill)(struct dpu_sw_pipe *pipe, u32 color);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

237

void (*setup_multirect)(struct dpu_sw_pipe *pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

294

void (*setup_cdp)(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

348

void dpu_hw_setup_multirect_impl(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

352

void dpu_hw_setup_format_impl(struct dpu_sw_pipe *pipe, const struct msm_format *fmt,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

357

static inline void dpu_hw_setup_rects_impl(struct dpu_sw_pipe *pipe, struct dpu_sw_pipe_cfg *cfg,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

381

void dpu_hw_setup_solidfill_impl(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

119

static void dpu_hw_sspp_setup_multirect_v13(struct dpu_sw_pipe *pipe)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

121

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

126

dpu_hw_setup_multirect_impl(pipe, ctx, SSPP_CMN_MULTI_REC_OP_MODE);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

129

static void dpu_hw_sspp_setup_format_v13(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

132

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

140

offset = dpu_hw_sspp_calculate_rect_off(pipe->multirect_index, ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

148

dpu_hw_setup_format_impl(pipe, fmt, flags, ctx, op_mode_off,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

193

static void dpu_hw_sspp_setup_rects_v13(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

196

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

203

offset = dpu_hw_sspp_calculate_rect_off(pipe->multirect_index, ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

210

dpu_hw_setup_rects_impl(pipe, cfg, ctx, src_size_off,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

214

static void dpu_hw_sspp_setup_sourceaddress_v13(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

217

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

224

offset = dpu_hw_sspp_calculate_rect_off(pipe->multirect_index, ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

237

static void dpu_hw_sspp_setup_solidfill_v13(struct dpu_sw_pipe *pipe, u32 color)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

239

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

246

offset = dpu_hw_sspp_calculate_rect_off(pipe->multirect_index, ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

249

dpu_hw_setup_solidfill_impl(pipe, color, ctx, const_clr_off);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

270

static void dpu_hw_sspp_setup_cdp_v13(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

274

struct dpu_hw_sspp *ctx = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c

280

offset = dpu_hw_sspp_calculate_rect_off(pipe->multirect_index, ctx);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1011

static bool dpu_plane_try_multirect_parallel(struct dpu_sw_pipe *pipe, struct dpu_sw_pipe_cfg *pipe_cfg,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1018

pipe->multirect_index = DPU_SSPP_RECT_SOLO;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1019

pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1025

if (!dpu_plane_is_multirect_parallel_capable(pipe->sspp, pipe_cfg, fmt, max_linewidth) ||

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1026

!dpu_plane_is_multirect_parallel_capable(pipe->sspp, r_pipe_cfg, fmt, max_linewidth))

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1029

r_pipe->sspp = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1031

pipe->multirect_index = DPU_SSPP_RECT_0;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1032

pipe->multirect_mode = DPU_SSPP_MULTIRECT_PARALLEL;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1046

struct dpu_sw_pipe *pipe, *prev_pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1051

if (!dpu_plane_get_single_pipe_in_stage(pstate, &pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1062

if (!dpu_plane_is_multirect_capable(pipe->sspp, pipe_cfg, fmt) ||

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1076

pipe->sspp = prev_pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1078

pipe->multirect_index = DPU_SSPP_RECT_1;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1079

pipe->multirect_mode = DPU_SSPP_MULTIRECT_PARALLEL;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1089

pipe->sspp = prev_pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1091

pipe->multirect_index = DPU_SSPP_RECT_1;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1092

pipe->multirect_mode = DPU_SSPP_MULTIRECT_TIME_MX;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1112

struct dpu_sw_pipe *pipe = &pstate->pipe[0];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1113

struct dpu_sw_pipe *r_pipe = &pstate->pipe[1];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1123

pipe->sspp = dpu_rm_get_sspp(&dpu_kms->rm, pdpu->pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1125

if (!pipe->sspp)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1135

if (!dpu_plane_try_multirect_parallel(pipe, pipe_cfg, r_pipe, r_pipe_cfg,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1136

pipe->sspp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1178

pstate->pipe[i].sspp = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1200

static int dpu_plane_assign_resource_in_stage(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1209

struct dpu_sw_pipe *r_pipe = pipe + 1;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1215

pipe->sspp = dpu_rm_reserve_sspp(&dpu_kms->rm, global_state, crtc, reqs);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1216

if (!pipe->sspp)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1218

pipe->multirect_index = DPU_SSPP_RECT_SOLO;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1219

pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1224

if (dpu_plane_try_multirect_parallel(pipe, pipe_cfg, r_pipe, r_pipe_cfg,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1225

pipe->sspp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1250

struct dpu_sw_pipe *pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1265

pstate->pipe[i].sspp = NULL;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1284

if (dpu_plane_get_single_pipe_in_stage(pstate, &pipe, &pipe_cfg, i))

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1287

pipe = &pstate->pipe[i * PIPES_PER_STAGE];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1289

ret = dpu_plane_assign_resource_in_stage(pipe, pipe_cfg,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1326

static void dpu_plane_flush_csc(struct dpu_plane *pdpu, struct dpu_sw_pipe *pipe)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1332

if (!pipe->sspp || !pipe->sspp->ops.setup_csc)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1335

csc_ptr = _dpu_plane_get_csc(pipe, format);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1344

pipe->sspp->ops.setup_csc(pipe->sspp, csc_ptr);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1378

dpu_plane_flush_csc(pdpu, &pstate->pipe[i]);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1403

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1414

if (layout && pipe->sspp->ops.setup_sourceaddress) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1415

trace_dpu_plane_set_scanout(pipe, layout);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1416

pipe->sspp->ops.setup_sourceaddress(pipe, layout);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1421

_dpu_plane_set_qos_ctrl(plane, pipe, false);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1427

if (pipe->sspp->ops.setup_rects) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1428

pipe->sspp->ops.setup_rects(pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1432

_dpu_plane_setup_scaler(pipe, fmt, false, pipe_cfg);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1434

if (pipe->sspp->ops.setup_multirect)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1435

pipe->sspp->ops.setup_multirect(

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1436

pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1438

if (pipe->sspp->ops.setup_format) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1453

pipe->sspp->ops.setup_format(pipe, fmt, src_flags);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1455

if (pipe->sspp->ops.setup_cdp) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1458

pipe->sspp->ops.setup_cdp(pipe, fmt,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1463

_dpu_plane_set_qos_lut(plane, pipe, fmt, pipe_cfg);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1465

if (pipe->sspp->idx != SSPP_CURSOR0 &&

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1466

pipe->sspp->idx != SSPP_CURSOR1)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1467

_dpu_plane_set_ot_limit(plane, pipe, pipe_cfg, frame_rate);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1470

_dpu_plane_set_qos_remap(plane, pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1502

dpu_plane_sspp_update_pipe(plane, &pstate->pipe[i],

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1529

struct dpu_sw_pipe *pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1533

pipe = &pstate->pipe[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1534

if (!pipe->sspp)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1538

pstate->pipe[i].multirect_mode);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1547

pipe->multirect_index = DPU_SSPP_RECT_SOLO;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1548

pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1549

if (pipe->sspp->ops.setup_multirect)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1550

pipe->sspp->ops.setup_multirect(pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1645

const struct dpu_sw_pipe *pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1652

pipe = &pstate->pipe[i];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1653

if (!pipe->sspp)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1656

drm_printf(p, "\tsspp[%d]=%s\n", i, pipe->sspp->cap->name);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1658

dpu_get_multirect_mode(pipe->multirect_mode));

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1660

dpu_get_multirect_index(pipe->multirect_index));

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1709

if (!pstate->pipe[i].sspp)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1711

_dpu_plane_set_qos_ctrl(plane, &pstate->pipe[i], enable);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1765

enum dpu_sspp pipe)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1783

pdpu->pipe = pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1808

pipe, plane->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1822

uint32_t pipe, enum drm_plane_type type,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1831

pipe_hw = dpu_rm_get_sspp(&kms->rm, pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1833

DPU_ERROR("[%u]SSPP is invalid\n", pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1842

pipe);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1849

pipe, plane->base.id);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

197

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

205

if (!fmt || !pipe || !src_width || !fmt->bpp) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

229

if (pipe->multirect_mode == DPU_SSPP_MULTIRECT_PARALLEL) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

239

pipe->sspp->idx - SSPP_VIG0,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

254

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

270

total_fl = _dpu_plane_calc_fill_level(plane, pipe, lut_usage, fmt,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

277

if (pipe->sspp->idx != SSPP_CURSOR0 &&

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

278

pipe->sspp->idx != SSPP_CURSOR1 &&

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

283

pdpu->pipe - SSPP_VIG0,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

287

trace_dpu_perf_set_qos_luts(pipe->sspp->idx - SSPP_VIG0,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

292

pdpu->pipe - SSPP_VIG0,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

296

trace_dpu_perf_set_danger_luts(pdpu->pipe - SSPP_VIG0,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

303

pdpu->pipe - SSPP_VIG0,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

309

pipe->sspp->ops.setup_qos_lut(pipe->sspp, &cfg);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

319

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

328

pdpu->pipe - SSPP_VIG0,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

332

pipe->sspp->ops.setup_qos_ctrl(pipe->sspp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

361

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

371

ot_params.xin_id = pipe->sspp->cap->xin_id;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

372

ot_params.num = pipe->sspp->idx - SSPP_NONE;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

380

if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

387

_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

397

struct dpu_sw_pipe *pipe)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

406

qos_params.xin_id = pipe->sspp->cap->xin_id;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

407

qos_params.num = pipe->sspp->idx - SSPP_VIG0;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

415

if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

422

_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

515

static const struct dpu_csc_cfg *_dpu_plane_get_csc(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

523

if (BIT(DPU_SSPP_CSC_10BIT) & pipe->sspp->cap->features)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

531

static void _dpu_plane_setup_scaler(struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

535

struct dpu_hw_sspp *pipe_hw = pipe->sspp;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

572

pipe->multirect_index != DPU_SSPP_RECT_1)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

579

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

587

if (!pipe->sspp->ops.setup_solidfill)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

590

pipe->sspp->ops.setup_solidfill(pipe, fill_color);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

602

if (pipe->sspp->ops.setup_format)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

603

pipe->sspp->ops.setup_format(pipe, fmt, DPU_SSPP_SOLID_FILL);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

605

if (pipe->sspp->ops.setup_rects)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

606

pipe->sspp->ops.setup_rects(pipe, &pipe_cfg);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

608

_dpu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

640

if (!pstate->pipe[i].sspp)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

642

_dpu_plane_color_fill_pipe(pstate, &pstate->pipe[i],

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

694

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

698

const struct dpu_sspp_sub_blks *sblk = pipe->sspp->cap->sblk;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

702

if (!test_bit(DPU_SSPP_INLINE_ROTATION, &pipe->sspp->cap->features))

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

727

struct dpu_sw_pipe *pipe,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

740

pipe_hw_caps = pipe->sspp->cap;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

741

sblk = pipe->sspp->cap->sblk;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

747

if (!(sblk->scaler_blk.len && pipe->sspp->ops.setup_scaler) &&

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

767

!pipe->sspp->cap->sblk->csc_blk.len) {

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

801

ret = dpu_plane_check_inline_rotation(pdpu, pipe, pipe_cfg->src_rect, fmt);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

83

enum dpu_sspp pipe;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

972

*single_pipe = &pstate->pipe[pipe_idx];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

988

struct dpu_sw_pipe *pipe = &pstate->pipe[0];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

989

struct dpu_sw_pipe *r_pipe = &pstate->pipe[1];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

994

ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg,

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

34

struct dpu_sw_pipe pipe[PIPES_PER_PLANE];

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

56

uint32_t pipe, enum drm_plane_type type,

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

654

struct dpu_sw_pipe *pipe, uint64_t modifier),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

656

pixel_format, pipe, modifier),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

679

__entry->sspp = pipe->sspp->idx;

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

680

__entry->multirect_idx = pipe->multirect_index;

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

681

__entry->multirect_mode = pipe->multirect_mode;

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

782

TP_PROTO(struct dpu_sw_pipe *pipe, struct dpu_hw_fmt_layout *layout),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

783

TP_ARGS(pipe, layout),

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

790

__entry->index = pipe->sspp->idx;

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

792

__entry->multirect_index = pipe->multirect_index;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

161

static inline uint32_t mdp4_pipe_caps(enum mdp4_pipe pipe)

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

163

switch (pipe) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

55

static inline uint32_t pipe2flush(enum mdp4_pipe pipe)

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

57

switch (pipe) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

96

enum mdp4_pipe pipe, enum mdp_mixer_stage_id stage)

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

98

switch (pipe) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

139

enum mdp4_pipe pipe = mdp4_plane->pipe;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

141

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

145

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

149

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

151

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

153

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

155

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

160

enum mdp4_pipe pipe, struct csc_cfg *csc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

165

mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

170

mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

173

mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

178

mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

181

mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

198

enum mdp4_pipe pipe = mdp4_plane->pipe;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

22

enum mdp4_pipe pipe;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

277

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

281

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

285

mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

289

mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

295

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

309

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

320

mdp4_write_csc_config(mdp4_kms, pipe, csc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

323

mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

324

mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

325

mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

328

mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

344

return mdp4_plane->pipe;

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

426

mdp4_plane->pipe = pipe_id;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

428

unsigned int pipe = crtc->index;

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

435

DRM_ERROR("no encoder found for crtc %d\n", pipe);

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

289

static u32 mdp_ctl_blend_mask(enum mdp5_pipe pipe,

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

292

switch (pipe) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

309

static u32 mdp_ctl_blend_ext_mask(enum mdp5_pipe pipe,

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

312

if (stage < STAGE6 && (pipe != SSPP_CURSOR0 && pipe != SSPP_CURSOR1))

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

315

switch (pipe) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

441

u32 mdp_ctl_flush_mask_pipe(enum mdp5_pipe pipe)

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

443

switch (pipe) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.h

66

u32 mdp_ctl_flush_mask_pipe(enum mdp5_pipe pipe);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

195

static inline const char *pipe2name(enum mdp5_pipe pipe)

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

206

return names[pipe];

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

209

static inline int pipe2nclients(enum mdp5_pipe pipe)

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

211

switch (pipe) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

102

(*hwpipe)->pipe, blkcfg);

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

146

mdp5_smp_release(mdp5_kms->smp, &state->smp, hwpipe->pipe);

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

155

enum mdp5_pipe pipe,

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

164

hwpipe->name = pipe2name(pipe);

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

165

hwpipe->pipe = pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

168

hwpipe->flush_mask = mdp_ctl_flush_mask_pipe(pipe);

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c

74

if (cur->pipe > r_cur->pipe)

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.h

18

enum mdp5_pipe pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.h

43

enum mdp5_pipe pipe,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

462

enum mdp5_pipe pipe,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

465

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_A(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

469

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_B(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

473

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC0_ADDR(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

475

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC1_ADDR(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

477

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC2_ADDR(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

479

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC3_ADDR(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

484

static void csc_disable(struct mdp5_kms *mdp5_kms, enum mdp5_pipe pipe)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

486

uint32_t value = mdp5_read(mdp5_kms, REG_MDP5_PIPE_OP_MODE(pipe)) &

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

489

mdp5_write(mdp5_kms, REG_MDP5_PIPE_OP_MODE(pipe), value);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

493

static void csc_enable(struct mdp5_kms *mdp5_kms, enum mdp5_pipe pipe,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

507

mdp5_write(mdp5_kms, REG_MDP5_PIPE_OP_MODE(pipe), mode);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

510

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

513

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

516

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

519

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_3(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

522

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_4(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

529

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_PRE_CLAMP(pipe, i),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

533

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_POST_CLAMP(pipe, i),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

537

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_PRE_BIAS(pipe, i),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

540

mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_POST_BIAS(pipe, i),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

669

static void mdp5_write_pixel_ext(struct mdp5_kms *mdp5_kms, enum mdp5_pipe pipe,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

709

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SW_PIX_EXT_LR(pipe, i), lr);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

710

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SW_PIX_EXT_TB(pipe, i), tb);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

711

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SW_PIX_EXT_REQ_PIXELS(pipe, i), req);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

754

enum mdp5_pipe pipe = hwpipe->pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

759

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_IMG_SIZE(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

763

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_SIZE(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

767

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_XY(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

771

mdp5_write(mdp5_kms, REG_MDP5_PIPE_OUT_SIZE(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

775

mdp5_write(mdp5_kms, REG_MDP5_PIPE_OUT_XY(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

779

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_FORMAT(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

792

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_UNPACK(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

798

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_OP_MODE(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

805

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_ADDR_SW_STATUS(pipe), 0);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

808

mdp5_write_pixel_ext(mdp5_kms, pipe, format,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

813

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SCALE_PHASE_STEP_X(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

815

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SCALE_PHASE_STEP_Y(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

817

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SCALE_CR_PHASE_STEP_X(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

819

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SCALE_CR_PHASE_STEP_Y(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

821

mdp5_write(mdp5_kms, REG_MDP5_PIPE_DECIMATION(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

824

mdp5_write(mdp5_kms, REG_MDP5_PIPE_SCALE_CONFIG(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

830

csc_enable(mdp5_kms, pipe,

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

833

csc_disable(mdp5_kms, pipe);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

836

set_scanout_locked(mdp5_kms, pipe, fb);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

846

enum mdp5_pipe pipe = hwpipe->pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

866

if (WARN_ON(nplanes > pipe2nclients(pipe)))

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

962

return pstate->hwpipe->pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

972

return pstate->r_hwpipe->pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

105

smp->pipe_reqprio_fifo_wm0[pipe] = val * 1;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

106

smp->pipe_reqprio_fifo_wm1[pipe] = val * 2;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

107

smp->pipe_reqprio_fifo_wm2[pipe] = val * 3;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

165

enum mdp5_pipe pipe, uint32_t blkcfg)

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

171

for (i = 0; i < pipe2nclients(pipe); i++) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

172

u32 cid = pipe2client(pipe, i);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

178

DBG("%s[%d]: request %d SMP blocks", pipe2name(pipe), i, n);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

189

state->assigned |= (1 << pipe);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

196

enum mdp5_pipe pipe)

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

201

for (i = 0; i < pipe2nclients(pipe); i++) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

202

u32 cid = pipe2client(pipe, i);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

212

state->released |= (1 << pipe);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

277

enum mdp5_pipe pipe = hwpipe->pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

279

mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_0(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

280

smp->pipe_reqprio_fifo_wm0[pipe]);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

281

mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_1(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

282

smp->pipe_reqprio_fifo_wm1[pipe]);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

283

mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_2(pipe),

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

284

smp->pipe_reqprio_fifo_wm2[pipe]);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

290

enum mdp5_pipe pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

292

for_each_set_bit(pipe, &state->assigned, sizeof(state->assigned) * 8) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

295

for (i = 0; i < pipe2nclients(pipe); i++) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

296

u32 cid = pipe2client(pipe, i);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

302

pipe2name(pipe), i, nblks);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

305

set_fifo_thresholds(smp, pipe, nblks);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

316

enum mdp5_pipe pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

318

for_each_set_bit(pipe, &state->released, sizeof(state->released) * 8) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

319

DBG("release %s", pipe2name(pipe));

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

320

set_fifo_thresholds(smp, pipe, 0);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

346

enum mdp5_pipe pipe = hwpipe->pipe;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

347

for (j = 0; j < pipe2nclients(pipe); j++) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

348

u32 cid = pipe2client(pipe, j);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

353

pipe2name(pipe), j, inuse,

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

39

static inline u32 pipe2client(enum mdp5_pipe pipe, int plane)

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

43

if (WARN_ON(plane >= pipe2nclients(pipe)))

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

58

return mdp5_cfg->smp.clients[pipe] + plane;

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

97

enum mdp5_pipe pipe, int nblks)

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.h

81

enum mdp5_pipe pipe, uint32_t blkcfg);

drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.h

83

enum mdp5_pipe pipe);

drivers/gpu/drm/msm/msm_drv.c

313

if ((args->pipe != MSM_PIPE_3D0) || (args->pad != 0))

drivers/gpu/drm/msm/msm_drv.c

332

if ((args->pipe != MSM_PIPE_3D0) || (args->pad != 0))

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

435

struct pipe_state *pipe = &chan->pipe_state;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

448

PIPE_SAVE(device, pipe->pipe_0x0200, 0x0200);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

457

PIPE_SAVE(device, pipe->pipe_0x4400, 0x4400);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

483

PIPE_RESTORE(device, pipe->pipe_0x0200, 0x0200);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

495

PIPE_RESTORE(device, pipe->pipe_0x4400, 0x4400);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

563

struct pipe_state *pipe = &chan->pipe_state;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

566

PIPE_SAVE(gr, pipe->pipe_0x4400, 0x4400);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

567

PIPE_SAVE(gr, pipe->pipe_0x0200, 0x0200);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

568

PIPE_SAVE(gr, pipe->pipe_0x6400, 0x6400);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

569

PIPE_SAVE(gr, pipe->pipe_0x6800, 0x6800);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

570

PIPE_SAVE(gr, pipe->pipe_0x6c00, 0x6c00);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

571

PIPE_SAVE(gr, pipe->pipe_0x7000, 0x7000);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

572

PIPE_SAVE(gr, pipe->pipe_0x7400, 0x7400);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

573

PIPE_SAVE(gr, pipe->pipe_0x7800, 0x7800);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

574

PIPE_SAVE(gr, pipe->pipe_0x0040, 0x0040);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

575

PIPE_SAVE(gr, pipe->pipe_0x0000, 0x0000);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

582

struct pipe_state *pipe = &chan->pipe_state;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

611

PIPE_RESTORE(gr, pipe->pipe_0x0200, 0x0200);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

617

PIPE_RESTORE(gr, pipe->pipe_0x6400, 0x6400);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

618

PIPE_RESTORE(gr, pipe->pipe_0x6800, 0x6800);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

619

PIPE_RESTORE(gr, pipe->pipe_0x6c00, 0x6c00);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

620

PIPE_RESTORE(gr, pipe->pipe_0x7000, 0x7000);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

621

PIPE_RESTORE(gr, pipe->pipe_0x7400, 0x7400);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

622

PIPE_RESTORE(gr, pipe->pipe_0x7800, 0x7800);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

623

PIPE_RESTORE(gr, pipe->pipe_0x4400, 0x4400);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

624

PIPE_RESTORE(gr, pipe->pipe_0x0000, 0x0000);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

625

PIPE_RESTORE(gr, pipe->pipe_0x0040, 0x0040);

drivers/gpu/drm/omapdrm/omap_crtc.c

130

if (omap_crtc->pipe->output->type == OMAP_DISPLAY_TYPE_HDMI) {

drivers/gpu/drm/omapdrm/omap_crtc.c

35

struct omap_drm_pipeline *pipe;

drivers/gpu/drm/omapdrm/omap_crtc.c

353

struct omap_dss_device *dssdev = omap_crtc->pipe->output;

drivers/gpu/drm/omapdrm/omap_crtc.c

515

if (omap_crtc->pipe->output->type != OMAP_DISPLAY_TYPE_DSI) {

drivers/gpu/drm/omapdrm/omap_crtc.c

567

struct omap_dss_device *dssdev = omap_crtc->pipe->output;

drivers/gpu/drm/omapdrm/omap_crtc.c

783

struct omap_drm_pipeline *pipe,

drivers/gpu/drm/omapdrm/omap_crtc.c

792

channel = pipe->output->dispc_channel;

drivers/gpu/drm/omapdrm/omap_crtc.c

804

omap_crtc->pipe = pipe;

drivers/gpu/drm/omapdrm/omap_crtc.c

825

__func__, pipe->output->name);

drivers/gpu/drm/omapdrm/omap_crtc.h

26

struct omap_drm_pipeline *pipe,

drivers/gpu/drm/omapdrm/omap_drv.c

308

struct omap_drm_pipeline *pipe = &priv->pipes[i];

drivers/gpu/drm/omapdrm/omap_drv.c

310

omapdss_device_disconnect(priv->dss, pipe->output);

drivers/gpu/drm/omapdrm/omap_drv.c

312

omapdss_device_put(pipe->output);

drivers/gpu/drm/omapdrm/omap_drv.c

313

pipe->output = NULL;

drivers/gpu/drm/omapdrm/omap_drv.c

336

struct omap_drm_pipeline *pipe;

drivers/gpu/drm/omapdrm/omap_drv.c

338

pipe = &priv->pipes[priv->num_pipes++];

drivers/gpu/drm/omapdrm/omap_drv.c

339

pipe->output = omapdss_device_get(output);

drivers/gpu/drm/omapdrm/omap_drv.c

449

struct omap_drm_pipeline *pipe = &priv->pipes[i];

drivers/gpu/drm/omapdrm/omap_drv.c

452

pipe->encoder = omap_encoder_init(dev, pipe->output);

drivers/gpu/drm/omapdrm/omap_drv.c

453

if (!pipe->encoder)

drivers/gpu/drm/omapdrm/omap_drv.c

456

if (pipe->output->bridge) {

drivers/gpu/drm/omapdrm/omap_drv.c

457

ret = drm_bridge_attach(pipe->encoder,

drivers/gpu/drm/omapdrm/omap_drv.c

458

pipe->output->bridge, NULL,

drivers/gpu/drm/omapdrm/omap_drv.c

464

id = omap_display_id(pipe->output);

drivers/gpu/drm/omapdrm/omap_drv.c

465

pipe->alias_id = id >= 0 ? id : i;

drivers/gpu/drm/omapdrm/omap_drv.c

477

struct omap_drm_pipeline *pipe = &priv->pipes[i];

drivers/gpu/drm/omapdrm/omap_drv.c

478

enum omap_channel channel = pipe->output->dispc_channel;

drivers/gpu/drm/omapdrm/omap_drv.c

483

priv->channels[channel] = pipe;

drivers/gpu/drm/omapdrm/omap_drv.c

488

struct omap_drm_pipeline *pipe = &priv->pipes[i];

drivers/gpu/drm/omapdrm/omap_drv.c

489

struct drm_encoder *encoder = pipe->encoder;

drivers/gpu/drm/omapdrm/omap_drv.c

492

pipe->connector = drm_bridge_connector_init(dev, encoder);

drivers/gpu/drm/omapdrm/omap_drv.c

493

if (IS_ERR(pipe->connector)) {

drivers/gpu/drm/omapdrm/omap_drv.c

496

pipe->output->name);

drivers/gpu/drm/omapdrm/omap_drv.c

497

return PTR_ERR(pipe->connector);

drivers/gpu/drm/omapdrm/omap_drv.c

500

drm_connector_attach_encoder(pipe->connector, encoder);

drivers/gpu/drm/omapdrm/omap_drv.c

502

crtc = omap_crtc_init(dev, pipe, priv->planes[i]);

drivers/gpu/drm/omapdrm/omap_drv.c

507

pipe->crtc = crtc;

drivers/gpu/drm/pl111/pl111_display.c

120

static void pl111_display_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/pl111/pl111_display.c

124

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

125

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/pl111/pl111_display.c

358

static void pl111_display_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/pl111/pl111_display.c

360

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

390

static void pl111_display_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/pl111/pl111_display.c

393

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

397

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/pl111/pl111_display.c

40

drm_crtc_handle_vblank(&priv->pipe.crtc);

drivers/gpu/drm/pl111/pl111_display.c

419

static int pl111_display_enable_vblank(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/pl111/pl111_display.c

421

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

430

static void pl111_display_disable_vblank(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/pl111/pl111_display.c

432

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/pl111/pl111_display.c

52

pl111_mode_valid(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/pl111/pl111_display.c

55

struct drm_device *drm = pipe->crtc.dev;

drivers/gpu/drm/pl111/pl111_display.c

590

ret = drm_simple_display_pipe_init(drm, &priv->pipe,

drivers/gpu/drm/pl111/pl111_display.c

86

static int pl111_display_check(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/pl111/pl111_display.c

91

struct drm_framebuffer *old_fb = pipe->plane.state->fb;

drivers/gpu/drm/pl111/pl111_drm.h

138

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/pl111/pl111_drv.c

171

ret = drm_simple_display_pipe_attach_bridge(&priv->pipe,

drivers/gpu/drm/radeon/cik.c

1842

u32 me, u32 pipe, u32 queue, u32 vmid)

drivers/gpu/drm/radeon/cik.c

1844

u32 srbm_gfx_cntl = (PIPEID(pipe & 0x3) |

drivers/gpu/drm/radeon/cik.c

3506

ref_and_mask = CP2 << ring->pipe;

drivers/gpu/drm/radeon/cik.c

3509

ref_and_mask = CP6 << ring->pipe;

drivers/gpu/drm/radeon/cik.c

4148

cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/radeon/cik.c

4167

cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/radeon/cik.c

4189

cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0);

drivers/gpu/drm/radeon/cik.c

4534

int pipe = (i < 4) ? i : (i - 4);

drivers/gpu/drm/radeon/cik.c

4536

cik_srbm_select(rdev, me, pipe, 0, 0);

drivers/gpu/drm/radeon/cik.c

4606

rdev->ring[idx].pipe,

drivers/gpu/drm/radeon/cik.c

7069

switch (ring->pipe) {

drivers/gpu/drm/radeon/cik.c

7083

DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe);

drivers/gpu/drm/radeon/cik.c

7087

switch (ring->pipe) {

drivers/gpu/drm/radeon/cik.c

7101

DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe);

drivers/gpu/drm/radeon/cik.c

7112

switch (ring->pipe) {

drivers/gpu/drm/radeon/cik.c

7126

DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe);

drivers/gpu/drm/radeon/cik.c

7130

switch (ring->pipe) {

drivers/gpu/drm/radeon/cik.c

7144

DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe);

drivers/gpu/drm/radeon/cik.c

7940

if ((cp1_ring->me == me_id) & (cp1_ring->pipe == pipe_id))

drivers/gpu/drm/radeon/cik.c

7942

if ((cp2_ring->me == me_id) & (cp2_ring->pipe == pipe_id))

drivers/gpu/drm/radeon/cik.c

8411

ring->pipe = 0; /* first pipe */

drivers/gpu/drm/radeon/cik.c

8423

ring->pipe = 0; /* first pipe */

drivers/gpu/drm/radeon/cypress_dpm.c

1747

u32 tmp, pipe;

drivers/gpu/drm/radeon/cypress_dpm.c

1764

pipe = (tmp & DCCG_DISP1_SLOW_SELECT_MASK) >> DCCG_DISP1_SLOW_SELECT_SHIFT;

drivers/gpu/drm/radeon/cypress_dpm.c

1767

(!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) {

drivers/gpu/drm/radeon/cypress_dpm.c

1774

pipe = 0;

drivers/gpu/drm/radeon/cypress_dpm.c

1776

pipe = i;

drivers/gpu/drm/radeon/cypress_dpm.c

1779

tmp |= DCCG_DISP1_SLOW_SELECT(pipe);

drivers/gpu/drm/radeon/radeon.h

816

u32 pipe;

drivers/gpu/drm/radeon/radeon_audio.c

748

int pipe, bool *enabled,

drivers/gpu/drm/radeon/radeon_display.c

1819

int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/radeon/radeon_display.c

1837

if (pipe == 0) {

drivers/gpu/drm/radeon/radeon_display.c

1844

if (pipe == 1) {

drivers/gpu/drm/radeon/radeon_display.c

1851

if (pipe == 2) {

drivers/gpu/drm/radeon/radeon_display.c

1858

if (pipe == 3) {

drivers/gpu/drm/radeon/radeon_display.c

1865

if (pipe == 4) {

drivers/gpu/drm/radeon/radeon_display.c

1872

if (pipe == 5) {

drivers/gpu/drm/radeon/radeon_display.c

1880

if (pipe == 0) {

drivers/gpu/drm/radeon/radeon_display.c

1885

if (pipe == 1) {

drivers/gpu/drm/radeon/radeon_display.c

1892

if (pipe == 0) {

drivers/gpu/drm/radeon/radeon_display.c

1906

if (pipe == 1) {

drivers/gpu/drm/radeon/radeon_display.c

1958

vbl_start -= rdev->mode_info.crtcs[pipe]->lb_vblank_lead_lines;

drivers/gpu/drm/radeon/radeon_display.c

2000

unsigned int pipe = crtc->index;

drivers/gpu/drm/radeon/radeon_display.c

2002

return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,

drivers/gpu/drm/radeon/radeon_kms.c

753

unsigned int pipe = crtc->index;

drivers/gpu/drm/radeon/radeon_kms.c

758

if (pipe >= rdev->num_crtc) {

drivers/gpu/drm/radeon/radeon_kms.c

759

DRM_ERROR("Invalid crtc %u\n", pipe);

drivers/gpu/drm/radeon/radeon_kms.c

771

if (rdev->mode_info.crtcs[pipe]) {

drivers/gpu/drm/radeon/radeon_kms.c

776

count = radeon_get_vblank_counter(rdev, pipe);

drivers/gpu/drm/radeon/radeon_kms.c

782

dev, pipe, GET_DISTANCE_TO_VBLANKSTART,

drivers/gpu/drm/radeon/radeon_kms.c

784

&rdev->mode_info.crtcs[pipe]->base.hwmode);

drivers/gpu/drm/radeon/radeon_kms.c

785

} while (count != radeon_get_vblank_counter(rdev, pipe));

drivers/gpu/drm/radeon/radeon_kms.c

793

pipe, vpos);

drivers/gpu/drm/radeon/radeon_kms.c

805

count = radeon_get_vblank_counter(rdev, pipe);

drivers/gpu/drm/radeon/radeon_kms.c

823

unsigned int pipe = crtc->index;

drivers/gpu/drm/radeon/radeon_kms.c

828

if (pipe >= rdev->num_crtc) {

drivers/gpu/drm/radeon/radeon_kms.c

829

DRM_ERROR("Invalid crtc %d\n", pipe);

drivers/gpu/drm/radeon/radeon_kms.c

834

rdev->irq.crtc_vblank_int[pipe] = true;

drivers/gpu/drm/radeon/radeon_kms.c

850

unsigned int pipe = crtc->index;

drivers/gpu/drm/radeon/radeon_kms.c

854

if (pipe >= rdev->num_crtc) {

drivers/gpu/drm/radeon/radeon_kms.c

855

DRM_ERROR("Invalid crtc %d\n", pipe);

drivers/gpu/drm/radeon/radeon_kms.c

860

rdev->irq.crtc_vblank_int[pipe] = false;

drivers/gpu/drm/radeon/radeon_mode.h

830

extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,

drivers/gpu/drm/radeon/si_dpm.c

3626

u32 tmp, pipe;

drivers/gpu/drm/radeon/si_dpm.c

3643

pipe = (tmp & DCCG_DISP1_SLOW_SELECT_MASK) >> DCCG_DISP1_SLOW_SELECT_SHIFT;

drivers/gpu/drm/radeon/si_dpm.c

3646

(!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) {

drivers/gpu/drm/radeon/si_dpm.c

3653

pipe = 0;

drivers/gpu/drm/radeon/si_dpm.c

3655

pipe = i;

drivers/gpu/drm/radeon/si_dpm.c

3658

tmp |= DCCG_DISP1_SLOW_SELECT(pipe);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

323

event->pipe = 0;

drivers/gpu/drm/sitronix/st7586.c

150

static void st7586_pipe_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/sitronix/st7586.c

153

struct drm_plane_state *state = pipe->plane.state;

drivers/gpu/drm/sitronix/st7586.c

159

if (!pipe->crtc.state->active)

drivers/gpu/drm/sitronix/st7586.c

172

static void st7586_pipe_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/sitronix/st7586.c

176

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/sitronix/st7586.c

189

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/sitronix/st7586.c

253

static void st7586_pipe_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/sitronix/st7586.c

255

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/sitronix/st7735r.c

60

static void st7735r_pipe_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/sitronix/st7735r.c

64

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/sitronix/st7735r.c

71

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/sti/sti_crtc.c

248

unsigned int pipe;

drivers/gpu/drm/sti/sti_crtc.c

250

pipe = drm_crtc_index(crtc);

drivers/gpu/drm/sti/sti_crtc.c

251

compo = container_of(nb, struct sti_compositor, vtg_vblank_nb[pipe]);

drivers/gpu/drm/sti/sti_crtc.c

252

mixer = compo->mixer[pipe];

drivers/gpu/drm/sti/sti_crtc.c

284

unsigned int pipe = crtc->index;

drivers/gpu/drm/sti/sti_crtc.c

287

struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb[pipe];

drivers/gpu/drm/sti/sti_crtc.c

288

struct sti_vtg *vtg = compo->vtg[pipe];

drivers/gpu/drm/sti/sti_crtc.c

303

unsigned int pipe = crtc->index;

drivers/gpu/drm/sti/sti_crtc.c

306

struct notifier_block *vtg_vblank_nb = &compo->vtg_vblank_nb[pipe];

drivers/gpu/drm/sti/sti_crtc.c

307

struct sti_vtg *vtg = compo->vtg[pipe];

drivers/gpu/drm/sun4i/sun4i_backend.c

373

unsigned int pipe = p_state->pipe;

drivers/gpu/drm/sun4i/sun4i_backend.c

376

layer, priority, pipe);

drivers/gpu/drm/sun4i/sun4i_backend.c

380

SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(p_state->pipe) |

drivers/gpu/drm/sun4i/sun4i_backend.c

590

s_state->pipe = current_pipe;

drivers/gpu/drm/sun4i/sun4i_layer.h

23

unsigned int pipe;

drivers/gpu/drm/sun4i/sun4i_tcon.h

27

#define SUN4I_TCON_GINT0_VBLANK_ENABLE(pipe) BIT(31 - (pipe))

drivers/gpu/drm/sun4i/sun4i_tcon.h

30

#define SUN4I_TCON_GINT0_VBLANK_INT(pipe) BIT(15 - (pipe))

drivers/gpu/drm/sun4i/sun8i_mixer.h

64

#define SUN8I_MIXER_BLEND_PIPE_CTL_EN(pipe) BIT(8 + pipe)

drivers/gpu/drm/sun4i/sun8i_mixer.h

65

#define SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(pipe) BIT(pipe)

drivers/gpu/drm/tegra/dc.c

1322

if (wgrp->dc == dc->pipe) {

drivers/gpu/drm/tegra/dc.c

2595

if (wgrp->dc == dc->pipe && wgrp->num_windows > 0)

drivers/gpu/drm/tegra/dc.c

2626

host1x_syncpt_release_vblank_reservation(client, 26 + dc->pipe);

drivers/gpu/drm/tegra/dc.c

3119

dc->pipe = value;

drivers/gpu/drm/tegra/dc.c

3127

unsigned int pipe = (unsigned long)(void *)data;

drivers/gpu/drm/tegra/dc.c

3129

return dc->pipe == pipe;

drivers/gpu/drm/tegra/dc.c

3139

if (dc->soc->coupled_pm && dc->pipe == 1) {

drivers/gpu/drm/tegra/dc.c

3234

if (dc->pipe == 0)

drivers/gpu/drm/tegra/dc.h

89

int pipe;

drivers/gpu/drm/tegra/dsi.c

480

static void tegra_dsi_configure(struct tegra_dsi *dsi, unsigned int pipe,

drivers/gpu/drm/tegra/dsi.c

511

DSI_CONTROL_SOURCE(pipe);

drivers/gpu/drm/tegra/dsi.c

615

tegra_dsi_configure(dsi->slave, pipe, mode);

drivers/gpu/drm/tegra/dsi.c

937

tegra_dsi_configure(dsi, dc->pipe, mode);

drivers/gpu/drm/tegra/hdmi.c

1281

if (dc->pipe)

drivers/gpu/drm/tegra/hub.c

249

if (tegra_shared_plane_get_owner(plane, dc) == dc->pipe) {

drivers/gpu/drm/tegra/hub.c

254

dc->pipe, plane->index);

drivers/gpu/drm/tegra/hub.c

273

if (new && (owner != OWNER_MASK && owner != new->pipe)) {

drivers/gpu/drm/tegra/hub.c

285

old->pipe, owner);

drivers/gpu/drm/tegra/hub.c

290

value |= OWNER(new->pipe);

drivers/gpu/drm/tegra/sor.c

1300

SOR_STATE_ASY_OWNER(dc->pipe + 1);

drivers/gpu/drm/tegra/sor.c

1348

tegra_sor_writel(sor, value, sor->soc->regs->head_state1 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

1355

tegra_sor_writel(sor, value, sor->soc->regs->head_state2 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

1362

tegra_sor_writel(sor, value, sor->soc->regs->head_state3 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

1369

tegra_sor_writel(sor, value, sor->soc->regs->head_state4 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

1372

tegra_sor_writel(sor, 0x001, sor->soc->regs->head_state5 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

2434

value = SOR_INPUT_CONTROL_HDMI_SRC_SELECT(dc->pipe);

drivers/gpu/drm/tegra/sor.c

2589

value |= SOR_STATE_ASY_OWNER(1 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

2597

value = tegra_sor_readl(sor, sor->soc->regs->head_state0 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

2600

tegra_sor_writel(sor, value, sor->soc->regs->head_state0 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

2603

value = tegra_sor_readl(sor, sor->soc->regs->head_state0 + dc->pipe);

drivers/gpu/drm/tegra/sor.c

2606

tegra_sor_writel(sor, value, sor->soc->regs->head_state0 + dc->pipe);

drivers/gpu/drm/tidss/tidss_kms.c

142

struct pipe pipes[TIDSS_MAX_PORTS];

drivers/gpu/drm/tiny/arcpgu.c

120

const struct drm_framebuffer *fb = arcpgu->pipe.plane.state->fb;

drivers/gpu/drm/tiny/arcpgu.c

142

static enum drm_mode_status arc_pgu_mode_valid(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/arcpgu.c

145

struct arcpgu_drm_private *arcpgu = pipe_to_arcpgu_priv(pipe);

drivers/gpu/drm/tiny/arcpgu.c

158

struct drm_display_mode *m = &arcpgu->pipe.crtc.state->adjusted_mode;

drivers/gpu/drm/tiny/arcpgu.c

197

static void arc_pgu_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/arcpgu.c

201

struct arcpgu_drm_private *arcpgu = pipe_to_arcpgu_priv(pipe);

drivers/gpu/drm/tiny/arcpgu.c

211

static void arc_pgu_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/tiny/arcpgu.c

213

struct arcpgu_drm_private *arcpgu = pipe_to_arcpgu_priv(pipe);

drivers/gpu/drm/tiny/arcpgu.c

221

static void arc_pgu_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/arcpgu.c

227

if (!pipe->plane.state->fb)

drivers/gpu/drm/tiny/arcpgu.c

230

arcpgu = pipe_to_arcpgu_priv(pipe);

drivers/gpu/drm/tiny/arcpgu.c

231

gem = drm_fb_dma_get_gem_obj(pipe->plane.state->fb, 0);

drivers/gpu/drm/tiny/arcpgu.c

303

ret = drm_simple_display_pipe_init(drm, &arcpgu->pipe, &arc_pgu_pipe_funcs,

drivers/gpu/drm/tiny/arcpgu.c

317

ret = drm_simple_display_pipe_attach_bridge(&arcpgu->pipe, bridge);

drivers/gpu/drm/tiny/arcpgu.c

344

unsigned long mode_clock = arcpgu->pipe.crtc.mode.crtc_clock * 1000;

drivers/gpu/drm/tiny/arcpgu.c

55

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/tiny/arcpgu.c

61

#define pipe_to_arcpgu_priv(x) container_of(x, struct arcpgu_drm_private, pipe)

drivers/gpu/drm/tiny/gm12u320.c

559

static void gm12u320_pipe_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/gm12u320.c

564

struct gm12u320_device *gm12u320 = to_gm12u320(pipe->crtc.dev);

drivers/gpu/drm/tiny/gm12u320.c

571

static void gm12u320_pipe_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/tiny/gm12u320.c

573

struct gm12u320_device *gm12u320 = to_gm12u320(pipe->crtc.dev);

drivers/gpu/drm/tiny/gm12u320.c

578

static void gm12u320_pipe_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/gm12u320.c

581

struct drm_plane_state *state = pipe->plane.state;

drivers/gpu/drm/tiny/gm12u320.c

681

&gm12u320->pipe,

drivers/gpu/drm/tiny/gm12u320.c

90

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/tiny/hx8357d.c

49

static void yx240qv29_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/hx8357d.c

53

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/hx8357d.c

58

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9163.c

38

static void yx240qv29_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/ili9163.c

42

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9163.c

47

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9225.c

160

static void ili9225_pipe_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/ili9225.c

163

struct drm_plane_state *state = pipe->plane.state;

drivers/gpu/drm/tiny/ili9225.c

169

if (!pipe->crtc.state->active)

drivers/gpu/drm/tiny/ili9225.c

182

static void ili9225_pipe_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/ili9225.c

186

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9225.c

189

struct device *dev = pipe->crtc.dev->dev;

drivers/gpu/drm/tiny/ili9225.c

200

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9225.c

294

static void ili9225_pipe_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/tiny/ili9225.c

296

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9341.c

55

static void yx240qv29_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/ili9341.c

59

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9341.c

64

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9486.c

101

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/ili9486.c

106

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/ili9486.c

97

static void waveshare_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/mi0283qt.c

53

static void mi0283qt_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/mi0283qt.c

57

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/mi0283qt.c

62

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/panel-mipi-dbi.c

236

static void panel_mipi_dbi_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/panel-mipi-dbi.c

240

struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);

drivers/gpu/drm/tiny/panel-mipi-dbi.c

244

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/panel-mipi-dbi.c

247

drm_dbg(pipe->crtc.dev, "\n");

drivers/gpu/drm/tiny/repaper.c

1105

ret = drm_simple_display_pipe_init(drm, &epd->pipe, &repaper_pipe_funcs,

drivers/gpu/drm/tiny/repaper.c

625

static enum drm_mode_status repaper_pipe_mode_valid(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/repaper.c

628

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tiny/repaper.c

634

static void repaper_pipe_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/repaper.c

638

struct repaper_epd *epd = drm_to_epd(pipe->crtc.dev);

drivers/gpu/drm/tiny/repaper.c

644

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/tiny/repaper.c

68

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/tiny/repaper.c

774

static void repaper_pipe_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/tiny/repaper.c

776

struct repaper_epd *epd = drm_to_epd(pipe->crtc.dev);

drivers/gpu/drm/tiny/repaper.c

830

static void repaper_pipe_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tiny/repaper.c

833

struct drm_plane_state *state = pipe->plane.state;

drivers/gpu/drm/tiny/repaper.c

837

if (!pipe->crtc.state->active)

drivers/gpu/drm/tve200/tve200_display.c

122

static void tve200_display_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tve200/tve200_display.c

126

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

127

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/tve200/tve200_display.c

243

static void tve200_display_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/tve200/tve200_display.c

245

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

258

static void tve200_display_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tve200/tve200_display.c

261

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

265

struct drm_plane *plane = &pipe->plane;

drivers/gpu/drm/tve200/tve200_display.c

295

static int tve200_display_enable_vblank(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/tve200/tve200_display.c

297

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

307

static void tve200_display_disable_vblank(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/tve200/tve200_display.c

309

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/tve200/tve200_display.c

349

ret = drm_simple_display_pipe_init(drm, &priv->pipe,

drivers/gpu/drm/tve200/tve200_display.c

55

drm_crtc_handle_vblank(&priv->pipe.crtc);

drivers/gpu/drm/tve200/tve200_display.c

72

static int tve200_display_check(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/tve200/tve200_display.c

77

struct drm_framebuffer *old_fb = pipe->plane.state->fb;

drivers/gpu/drm/tve200/tve200_drm.h

110

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/tve200/tve200_drv.c

108

ret = drm_simple_display_pipe_attach_bridge(&priv->pipe,

drivers/gpu/drm/vc4/tests/vc4_mock.c

110

const struct vc4_mock_pipe_desc *pipe)

drivers/gpu/drm/vc4/tests/vc4_mock.c

120

dummy_crtc = vc4_mock_pv(test, drm, plane, pipe->data);

drivers/gpu/drm/vc4/tests/vc4_mock.c

124

for (i = 0; i < pipe->noutputs; i++) {

drivers/gpu/drm/vc4/tests/vc4_mock.c

125

const struct vc4_mock_output_desc *mock_output = &pipe->outputs[i];

drivers/gpu/drm/vc4/tests/vc4_mock.c

144

const struct vc4_mock_pipe_desc *pipe = &mock->pipes[i];

drivers/gpu/drm/vc4/tests/vc4_mock.c

147

ret = __build_one_pipe(test, drm, pipe);

drivers/gpu/drm/vc4/vc4_hvs.c

865

crtc->state->event->pipe = drm_crtc_index(crtc);

drivers/gpu/drm/xe/display/xe_initial_plane.c

32

struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe)));

drivers/gpu/drm/xen/xen_drm_front.h

103

struct drm_simple_display_pipe pipe;

drivers/gpu/drm/xen/xen_drm_front_kms.c

108

static void display_enable(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/xen/xen_drm_front_kms.c

113

to_xen_drm_pipeline(pipe);

drivers/gpu/drm/xen/xen_drm_front_kms.c

114

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/xen/xen_drm_front_kms.c

118

if (!drm_dev_enter(pipe->crtc.dev, &idx))

drivers/gpu/drm/xen/xen_drm_front_kms.c

134

static void display_disable(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/xen/xen_drm_front_kms.c

137

to_xen_drm_pipeline(pipe);

drivers/gpu/drm/xen/xen_drm_front_kms.c

140

if (drm_dev_enter(pipe->crtc.dev, &idx)) {

drivers/gpu/drm/xen/xen_drm_front_kms.c

180

static bool display_send_page_flip(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/xen/xen_drm_front_kms.c

185

&pipe->plane);

drivers/gpu/drm/xen/xen_drm_front_kms.c

197

to_xen_drm_pipeline(pipe);

drivers/gpu/drm/xen/xen_drm_front_kms.c

227

static int display_check(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/xen/xen_drm_front_kms.c

245

static void display_update(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/xen/xen_drm_front_kms.c

249

to_xen_drm_pipeline(pipe);

drivers/gpu/drm/xen/xen_drm_front_kms.c

250

struct drm_crtc *crtc = &pipe->crtc;

drivers/gpu/drm/xen/xen_drm_front_kms.c

268

if (!drm_dev_enter(pipe->crtc.dev, &idx)) {

drivers/gpu/drm/xen/xen_drm_front_kms.c

281

if (!display_send_page_flip(pipe, old_plane_state))

drivers/gpu/drm/xen/xen_drm_front_kms.c

288

display_mode_valid(struct drm_simple_display_pipe *pipe,

drivers/gpu/drm/xen/xen_drm_front_kms.c

292

container_of(pipe, struct xen_drm_front_drm_pipeline,

drivers/gpu/drm/xen/xen_drm_front_kms.c

293

pipe);

drivers/gpu/drm/xen/xen_drm_front_kms.c

334

return drm_simple_display_pipe_init(dev, &pipeline->pipe,

drivers/gpu/drm/xen/xen_drm_front_kms.c

34

to_xen_drm_pipeline(struct drm_simple_display_pipe *pipe)

drivers/gpu/drm/xen/xen_drm_front_kms.c

36

return container_of(pipe, struct xen_drm_front_drm_pipeline, pipe);

drivers/gpu/drm/xen/xen_drm_front_kms.c

97

struct drm_crtc *crtc = &pipeline->pipe.crtc;

drivers/gpu/drm/xlnx/zynqmp_kms.c

273

event->pipe = drm_crtc_index(crtc);

drivers/hid/hid-elo.c

109

unsigned int pipe;

drivers/hid/hid-elo.c

113

pipe = usb_sndctrlpipe(dev, 0);

drivers/hid/hid-elo.c

116

pipe = usb_rcvctrlpipe(dev, 0);

drivers/hid/hid-elo.c

121

return usb_control_msg(dev, pipe, command,

drivers/hid/hid-sony.c

586

unsigned int pipe;

drivers/hid/hid-sony.c

589

pipe = usb_sndctrlpipe(usbdev, 0);

drivers/hid/hid-sony.c

607

sc->ghl_urb, usbdev, pipe,

drivers/hid/hid-u2fzero.c

284

ep = usb_pipe_endpoint(udev, usbhid->urbin->pipe);

drivers/hid/hid-u2fzero.c

292

pipe_in = (usbhid->urbin->pipe & ~(3 << 30)) | (PIPE_INTERRUPT << 30);

drivers/hid/hid-uclogic-params.c

1059

unsigned int pipe = 0;

drivers/hid/hid-uclogic-params.c

1076

pipe = usb_sndintpipe(udev, endpoint);

drivers/hid/hid-uclogic-params.c

1078

rc = usb_interrupt_msg(udev, pipe, buf, magic_size, &sent, 1000);

drivers/hid/usbhid/hid-core.c

1113

int pipe;

drivers/hid/usbhid/hid-core.c

1154

pipe = usb_rcvintpipe(dev, endpoint->bEndpointAddress);

drivers/hid/usbhid/hid-core.c

1155

usb_fill_int_urb(usbhid->urbin, dev, pipe, usbhid->inbuf, insize,

drivers/hid/usbhid/hid-core.c

1164

pipe = usb_sndintpipe(dev, endpoint->bEndpointAddress);

drivers/hid/usbhid/hid-core.c

1165

usb_fill_int_urb(usbhid->urbout, dev, pipe, usbhid->outbuf, 0,

drivers/hid/usbhid/hid-core.c

127

rc = usb_clear_halt(hid_to_usb_dev(hid), usbhid->urbin->pipe);

drivers/hid/usbhid/hid-core.c

381

usbhid->urbctrl->pipe = usb_sndctrlpipe(hid_to_usb_dev(hid), 0);

drivers/hid/usbhid/hid-core.c

390

usbhid->urbctrl->pipe = usb_rcvctrlpipe(hid_to_usb_dev(hid), 0);

drivers/hid/usbhid/hid-core.c

392

usbhid->urbctrl->pipe);

drivers/hid/usbhid/hid-core.c

957

ret = usb_interrupt_msg(dev, usbhid->urbout->pipe,

drivers/hid/usbhid/usbkbd.c

269

int i, pipe, maxp;

drivers/hid/usbhid/usbkbd.c

281

pipe = usb_rcvintpipe(dev, endpoint->bEndpointAddress);

drivers/hid/usbhid/usbkbd.c

282

maxp = usb_maxpacket(dev, pipe);

drivers/hid/usbhid/usbkbd.c

335

usb_fill_int_urb(kbd->irq, dev, pipe,

drivers/hid/usbhid/usbmouse.c

113

int pipe, maxp;

drivers/hid/usbhid/usbmouse.c

125

pipe = usb_rcvintpipe(dev, endpoint->bEndpointAddress);

drivers/hid/usbhid/usbmouse.c

126

maxp = usb_maxpacket(dev, pipe);

drivers/hid/usbhid/usbmouse.c

180

usb_fill_int_urb(mouse->irq, dev, pipe, mouse->data,

drivers/i2c/busses/i2c-viperboard.c

361

int pipe;

drivers/i2c/busses/i2c-viperboard.c

383

pipe = usb_sndctrlpipe(vb->usb_dev, 0);

drivers/i2c/busses/i2c-viperboard.c

384

ret = usb_control_msg(vb->usb_dev, pipe,

drivers/input/misc/ati_remote2.c

601

int i, pipe, maxp;

drivers/input/misc/ati_remote2.c

612

pipe = usb_rcvintpipe(udev, ar2->ep[i]->bEndpointAddress);

drivers/input/misc/ati_remote2.c

613

maxp = usb_maxpacket(udev, pipe);

drivers/input/misc/ati_remote2.c

616

usb_fill_int_urb(ar2->urb[i], udev, pipe, ar2->buf[i], maxp,

drivers/input/misc/cm109.c

686

int ret, pipe, i;

drivers/input/misc/cm109.c

738

pipe = usb_rcvintpipe(udev, endpoint->bEndpointAddress);

drivers/input/misc/cm109.c

739

ret = usb_maxpacket(udev, pipe);

drivers/input/misc/cm109.c

745

usb_fill_int_urb(dev->urb_irq, udev, pipe, dev->irq_data,

drivers/input/misc/powermate.c

300

int pipe, maxp;

drivers/input/misc/powermate.c

369

pipe = usb_rcvintpipe(udev, endpoint->bEndpointAddress);

drivers/input/misc/powermate.c

370

maxp = usb_maxpacket(udev, pipe);

drivers/input/misc/powermate.c

378

usb_fill_int_urb(pm->irq, udev, pipe, pm->data,

drivers/input/misc/yealink.c

823

int ret, pipe, i;

drivers/input/misc/yealink.c

871

pipe = usb_rcvintpipe(udev, endpoint->bEndpointAddress);

drivers/input/misc/yealink.c

872

ret = usb_maxpacket(udev, pipe);

drivers/input/misc/yealink.c

878

usb_fill_int_urb(yld->urb_irq, udev, pipe, yld->irq_data,

drivers/input/tablet/acecad.c

118

int pipe, maxp;

drivers/input/tablet/acecad.c

129

pipe = usb_rcvintpipe(dev, endpoint->bEndpointAddress);

drivers/input/tablet/acecad.c

130

maxp = usb_maxpacket(dev, pipe);

drivers/input/tablet/acecad.c

205

usb_fill_int_urb(acecad->irq, dev, pipe,

drivers/input/tablet/pegasus_notetaker.c

282

int pipe;

drivers/input/tablet/pegasus_notetaker.c

309

pipe = usb_rcvintpipe(dev, endpoint->bEndpointAddress);

drivers/input/tablet/pegasus_notetaker.c

311

if (usb_pipe_type_check(dev, pipe)) {

drivers/input/tablet/pegasus_notetaker.c

316

pegasus->data_len = usb_maxpacket(dev, pipe);

drivers/input/tablet/pegasus_notetaker.c

337

usb_fill_int_urb(pegasus->irq, dev, pipe,

drivers/isdn/hardware/mISDN/hfcsusb.c

1064

fill_isoc_urb(urb, fifo->hw->dev, fifo->pipe,

drivers/isdn/hardware/mISDN/hfcsusb.c

1226

fill_isoc_urb(urb, fifo->hw->dev, fifo->pipe,

drivers/isdn/hardware/mISDN/hfcsusb.c

1410

fifo->hw->dev, fifo->pipe,

drivers/isdn/hardware/mISDN/hfcsusb.c

1511

usb_fill_int_urb(fifo->urb, fifo->hw->dev, fifo->pipe,

drivers/isdn/hardware/mISDN/hfcsusb.c

1760

if (hw->fifos[HFCUSB_PCM_RX].pipe)

drivers/isdn/hardware/mISDN/hfcsusb.c

1857

if (hw->fifos[HFCUSB_PCM_RX].pipe)

drivers/isdn/hardware/mISDN/hfcsusb.c

2046

f->pipe = usb_rcvintpipe(dev,

drivers/isdn/hardware/mISDN/hfcsusb.c

2053

f->pipe = usb_rcvbulkpipe(dev,

drivers/isdn/hardware/mISDN/hfcsusb.c

2056

f->pipe = usb_sndbulkpipe(dev,

drivers/isdn/hardware/mISDN/hfcsusb.c

2063

f->pipe = usb_rcvisocpipe(dev,

drivers/isdn/hardware/mISDN/hfcsusb.c

2066

f->pipe = usb_sndisocpipe(dev,

drivers/isdn/hardware/mISDN/hfcsusb.c

2072

f->pipe = 0;

drivers/isdn/hardware/mISDN/hfcsusb.c

2075

if (f->pipe) {

drivers/isdn/hardware/mISDN/hfcsusb.c

434

if (hw->fifos[HFCUSB_PCM_RX].pipe) {

drivers/isdn/hardware/mISDN/hfcsusb.c

553

if (hw->fifos[HFCUSB_PCM_RX].pipe)

drivers/isdn/hardware/mISDN/hfcsusb.c

60

hw->ctrl_urb->pipe = hw->ctrl_out_pipe;

drivers/isdn/hardware/mISDN/hfcsusb.c

941

fill_isoc_urb(struct urb *urb, struct usb_device *dev, unsigned int pipe,

drivers/isdn/hardware/mISDN/hfcsusb.c

947

usb_fill_bulk_urb(urb, dev, pipe, buf, packet_size * num_packets,

drivers/isdn/hardware/mISDN/hfcsusb.h

252

int pipe; /* address of endpoint */

drivers/media/dvb-core/dvb_frontend.c

127

struct media_pipeline pipe;

drivers/media/dvb-core/dvb_frontend.c

2853

&fepriv->pipe);

drivers/media/mc/mc-entity.c

1002

__media_pipeline_pad_iter_next(struct media_pipeline *pipe,

drivers/media/mc/mc-entity.c

1007

iter->cursor = pipe->pads.next;

drivers/media/mc/mc-entity.c

1009

if (iter->cursor == &pipe->pads)

drivers/media/mc/mc-entity.c

1019

int media_pipeline_entity_iter_init(struct media_pipeline *pipe,

drivers/media/mc/mc-entity.c

1022

return media_entity_enum_init(&iter->ent_enum, pipe->mdev);

drivers/media/mc/mc-entity.c

1033

__media_pipeline_entity_iter_next(struct media_pipeline *pipe,

drivers/media/mc/mc-entity.c

1038

iter->cursor = pipe->pads.next;

drivers/media/mc/mc-entity.c

1040

while (iter->cursor != &pipe->pads) {

drivers/media/mc/mc-entity.c

1516

if (pad->pipe)

drivers/media/mc/mc-entity.c

1517

return pad->pipe;

drivers/media/mc/mc-entity.c

1526

return pad->pipe;

drivers/media/mc/mc-entity.c

575

static int media_pipeline_add_pad(struct media_pipeline *pipe,

drivers/media/mc/mc-entity.c

581

list_for_each_entry(ppad, &pipe->pads, list) {

drivers/media/mc/mc-entity.c

594

ppad->pipe = pipe;

drivers/media/mc/mc-entity.c

597

list_add_tail(&ppad->list, &pipe->pads);

drivers/media/mc/mc-entity.c

607

static int media_pipeline_explore_next_link(struct media_pipeline *pipe,

drivers/media/mc/mc-entity.c

658

ret = media_pipeline_add_pad(pipe, walk, local);

drivers/media/mc/mc-entity.c

669

ret = media_pipeline_add_pad(pipe, walk, remote);

drivers/media/mc/mc-entity.c

699

ret = media_pipeline_add_pad(pipe, walk, local);

drivers/media/mc/mc-entity.c

707

static void media_pipeline_cleanup(struct media_pipeline *pipe)

drivers/media/mc/mc-entity.c

709

while (!list_empty(&pipe->pads)) {

drivers/media/mc/mc-entity.c

712

ppad = list_first_entry(&pipe->pads, typeof(*ppad), list);

drivers/media/mc/mc-entity.c

718

static int media_pipeline_populate(struct media_pipeline *pipe,

drivers/media/mc/mc-entity.c

729

INIT_LIST_HEAD(&pipe->pads);

drivers/media/mc/mc-entity.c

730

pipe->mdev = pad->graph_obj.mdev;

drivers/media/mc/mc-entity.c

732

walk.mdev = pipe->mdev;

drivers/media/mc/mc-entity.c

734

ret = media_pipeline_add_pad(pipe, &walk, pad);

drivers/media/mc/mc-entity.c

746

ret = media_pipeline_explore_next_link(pipe, &walk);

drivers/media/mc/mc-entity.c

754

list_for_each_entry(ppad, &pipe->pads, list)

drivers/media/mc/mc-entity.c

766

media_pipeline_cleanup(pipe);

drivers/media/mc/mc-entity.c

772

struct media_pipeline *pipe)

drivers/media/mc/mc-entity.c

785

if (WARN_ON(origin->pipe && origin->pipe != pipe))

drivers/media/mc/mc-entity.c

792

if (pipe->start_count) {

drivers/media/mc/mc-entity.c

793

pipe->start_count++;

drivers/media/mc/mc-entity.c

802

ret = media_pipeline_populate(pipe, origin);

drivers/media/mc/mc-entity.c

811

list_for_each_entry(ppad, &pipe->pads, list) {

drivers/media/mc/mc-entity.c

824

if (pad->pipe) {

drivers/media/mc/mc-entity.c

891

pad->pipe = pipe;

drivers/media/mc/mc-entity.c

894

pipe->start_count++;

drivers/media/mc/mc-entity.c

904

list_for_each_entry(err_ppad, &pipe->pads, list) {

drivers/media/mc/mc-entity.c

908

err_ppad->pad->pipe = NULL;

drivers/media/mc/mc-entity.c

911

media_pipeline_cleanup(pipe);

drivers/media/mc/mc-entity.c

918

struct media_pipeline *pipe)

drivers/media/mc/mc-entity.c

924

ret = __media_pipeline_start(origin, pipe);

drivers/media/mc/mc-entity.c

932

struct media_pipeline *pipe = pad->pipe;

drivers/media/mc/mc-entity.c

939

if (WARN_ON(!pipe))

drivers/media/mc/mc-entity.c

942

if (--pipe->start_count)

drivers/media/mc/mc-entity.c

945

list_for_each_entry(ppad, &pipe->pads, list)

drivers/media/mc/mc-entity.c

946

ppad->pad->pipe = NULL;

drivers/media/mc/mc-entity.c

948

media_pipeline_cleanup(pipe);

drivers/media/mc/mc-entity.c

950

if (pipe->allocated)

drivers/media/mc/mc-entity.c

951

kfree(pipe);

drivers/media/mc/mc-entity.c

969

struct media_pipeline *pipe;

drivers/media/mc/mc-entity.c

978

pipe = media_pad_pipeline(pad);

drivers/media/mc/mc-entity.c

979

if (!pipe) {

drivers/media/mc/mc-entity.c

986

pipe = new_pipe;

drivers/media/mc/mc-entity.c

987

pipe->allocated = true;

drivers/media/mc/mc-entity.c

990

ret = __media_pipeline_start(pad, pipe);

drivers/media/pci/intel/ipu3/ipu3-cio2.c

1008

r = video_device_pipeline_start(&q->vdev, &q->pipe);

drivers/media/pci/intel/ipu3/ipu3-cio2.h

347

struct media_pipeline pipe;

drivers/media/platform/amlogic/c3/isp/c3-isp-capture.c

624

ret = video_device_pipeline_start(&cap->vdev, &cap->isp->pipe);

drivers/media/platform/amlogic/c3/isp/c3-isp-common.h

307

struct media_pipeline pipe;

drivers/media/platform/amlogic/c3/isp/c3-isp-core.c

299

return n_links == core->isp->pipe.start_count;

drivers/media/platform/amlogic/c3/isp/c3-isp-core.c

344

if (core->isp->pipe.start_count != 1)

drivers/media/platform/arm/mali-c55/mali-c55-common.h

249

struct media_pipeline pipe;

drivers/media/platform/broadcom/bcm2835-unicam.c

1076

if (unicam->pipe.num_data_lanes == 1)

drivers/media/platform/broadcom/bcm2835-unicam.c

1085

if (unicam->pipe.num_data_lanes == 2)

drivers/media/platform/broadcom/bcm2835-unicam.c

1089

if (unicam->pipe.num_data_lanes == 3)

drivers/media/platform/broadcom/bcm2835-unicam.c

1432

if (unicam->pipe.nodes & BIT(UNICAM_METADATA_NODE))

drivers/media/platform/broadcom/bcm2835-unicam.c

1687

ret = video_device_pipeline_start(&node->video_dev, &unicam->pipe.pipe);

drivers/media/platform/broadcom/bcm2835-unicam.c

1697

if (unicam->pipe.pipe.start_count == 1) {

drivers/media/platform/broadcom/bcm2835-unicam.c

1698

unicam->pipe.nodes = 0;

drivers/media/platform/broadcom/bcm2835-unicam.c

1700

media_pipeline_for_each_pad(&unicam->pipe.pipe, &iter, pad) {

drivers/media/platform/broadcom/bcm2835-unicam.c

1705

unicam->pipe.nodes |= BIT(UNICAM_IMAGE_NODE);

drivers/media/platform/broadcom/bcm2835-unicam.c

1707

unicam->pipe.nodes |= BIT(UNICAM_METADATA_NODE);

drivers/media/platform/broadcom/bcm2835-unicam.c

1710

if (!(unicam->pipe.nodes & BIT(UNICAM_IMAGE_NODE))) {

drivers/media/platform/broadcom/bcm2835-unicam.c

1721

unicam->pipe.num_data_lanes = ret;

drivers/media/platform/broadcom/bcm2835-unicam.c

1724

unicam->pipe.num_data_lanes, unicam->pipe.nodes);

drivers/media/platform/broadcom/bcm2835-unicam.c

1745

if (unicam->pipe.pipe.start_count < hweight32(unicam->pipe.nodes))

drivers/media/platform/broadcom/bcm2835-unicam.c

1763

if (unicam->pipe.nodes & BIT(UNICAM_METADATA_NODE)) {

drivers/media/platform/broadcom/bcm2835-unicam.c

1793

if (unicam->pipe.pipe.start_count == hweight32(unicam->pipe.nodes)) {

drivers/media/platform/broadcom/bcm2835-unicam.c

1794

if (unicam->pipe.nodes & BIT(UNICAM_METADATA_NODE))

drivers/media/platform/broadcom/bcm2835-unicam.c

226

struct media_pipeline pipe;

drivers/media/platform/broadcom/bcm2835-unicam.c

229

} pipe;

drivers/media/platform/broadcom/bcm2835-unicam.c

956

val = 0x155 & GENMASK(unicam->pipe.num_data_lanes * 2 + 1, 0);

drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c

302

struct mdp_pipe_info pipe;

drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c

318

ret = mdp_path_subfrm_require(path, cmd, &pipe, count);

drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.c

343

ret = mdp_path_subfrm_run(path, cmd, &pipe, count);

drivers/media/platform/nxp/imx7-media-csi.c

1457

ret = __video_device_pipeline_start(csi->vdev, &csi->pipe);

drivers/media/platform/nxp/imx7-media-csi.c

237

struct media_pipeline pipe;

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

101

static int mxc_isi_pipe_register(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

105

ret = v4l2_device_register_subdev(&pipe->isi->v4l2_dev, &pipe->sd);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

109

return mxc_isi_video_register(pipe, &pipe->isi->v4l2_dev);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

112

static void mxc_isi_pipe_unregister(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

114

mxc_isi_video_unregister(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

152

struct mxc_isi_pipe *pipe = &isi->pipes[i];

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

154

ret = mxc_isi_pipe_register(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

163

&pipe->sd.entity,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

383

struct mxc_isi_pipe *pipe = &isi->pipes[i];

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

385

mxc_isi_video_suspend(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

405

struct mxc_isi_pipe *pipe = &isi->pipes[i];

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

407

ret = mxc_isi_video_resume(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

543

struct mxc_isi_pipe *pipe = &isi->pipes[i];

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c

545

mxc_isi_pipe_cleanup(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

201

struct mxc_isi_pipe *pipe;

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

238

struct media_pipeline pipe;

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

263

struct mxc_isi_pipe *pipe;

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

316

mxc_isi_format_try(struct mxc_isi_pipe *pipe, struct v4l2_pix_format_mplane *pix,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

320

void mxc_isi_pipe_cleanup(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

321

int mxc_isi_pipe_acquire(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

323

void mxc_isi_pipe_release(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

324

int mxc_isi_pipe_enable(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

325

void mxc_isi_pipe_disable(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

327

int mxc_isi_video_register(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

329

void mxc_isi_video_unregister(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

330

void mxc_isi_video_suspend(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

331

int mxc_isi_video_resume(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

367

int mxc_isi_channel_acquire(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

369

void mxc_isi_channel_release(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

370

void mxc_isi_channel_get(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

371

void mxc_isi_channel_put(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

372

void mxc_isi_channel_enable(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

373

void mxc_isi_channel_disable(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

374

int mxc_isi_channel_chain(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

375

void mxc_isi_channel_unchain(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

377

void mxc_isi_channel_config(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

385

void mxc_isi_channel_set_input_format(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

388

void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

391

void mxc_isi_channel_m2m_start(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

393

void mxc_isi_channel_set_alpha(struct mxc_isi_pipe *pipe, u8 alpha);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

394

void mxc_isi_channel_set_flip(struct mxc_isi_pipe *pipe, bool hflip, bool vflip);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

396

void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

397

void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

401

u32 mxc_isi_channel_irq_status(struct mxc_isi_pipe *pipe, bool clear);

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

402

void mxc_isi_channel_irq_clear(struct mxc_isi_pipe *pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

101

mxc_isi_read(pipe, reg->offset));

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

105

pm_runtime_put(pipe->isi->dev);

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

118

struct mxc_isi_pipe *pipe = &isi->pipes[i];

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

121

sprintf(name, "pipe%u", pipe->id);

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

122

debugfs_create_file(name, 0444, isi->debugfs_root, pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

17

static inline u32 mxc_isi_read(struct mxc_isi_pipe *pipe, u32 reg)

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

19

return readl(pipe->regs + reg);

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

82

struct mxc_isi_pipe *pipe = m->private;

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

85

if (!pm_runtime_get_if_in_use(pipe->isi->dev))

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

88

seq_printf(m, "--- ISI pipe %u registers ---\n", pipe->id);

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

93

mxc_isi_read(pipe, registers[i].offset));

drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c

95

if (pipe->isi->pdata->has_36bit_dma) {

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

118

static void mxc_isi_channel_set_scaling(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

128

dev_dbg(pipe->isi->dev, "input %ux%u, output %ux%u\n",

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

137

val = mxc_isi_read(pipe, CHNL_IMG_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

153

mxc_isi_write(pipe, CHNL_IMG_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

155

mxc_isi_write(pipe, CHNL_SCALE_FACTOR,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

159

mxc_isi_write(pipe, CHNL_SCALE_OFFSET, 0);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

16

static inline u32 mxc_isi_read(struct mxc_isi_pipe *pipe, u32 reg)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

161

mxc_isi_write(pipe, CHNL_SCL_IMG_CFG,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

169

static void mxc_isi_channel_set_crop(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

175

val = mxc_isi_read(pipe, CHNL_IMG_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

179

mxc_isi_write(pipe, CHNL_IMG_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

18

return readl(pipe->regs + reg);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

187

mxc_isi_write(pipe, CHNL_CROP_ULC, val0);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

188

mxc_isi_write(pipe, CHNL_CROP_LRC, val1 + val0);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

189

mxc_isi_write(pipe, CHNL_IMG_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

208

static void mxc_isi_channel_set_csc(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

21

static inline void mxc_isi_write(struct mxc_isi_pipe *pipe, u32 reg, u32 val)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

221

val = mxc_isi_read(pipe, CHNL_IMG_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

23

writel(val, pipe->regs + reg);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

240

dev_dbg(pipe->isi->dev, "CSC: %s -> %s\n",

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

244

mxc_isi_write(pipe, CHNL_CSC_COEFF0, coeffs[0]);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

245

mxc_isi_write(pipe, CHNL_CSC_COEFF1, coeffs[1]);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

246

mxc_isi_write(pipe, CHNL_CSC_COEFF2, coeffs[2]);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

247

mxc_isi_write(pipe, CHNL_CSC_COEFF3, coeffs[3]);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

248

mxc_isi_write(pipe, CHNL_CSC_COEFF4, coeffs[4]);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

249

mxc_isi_write(pipe, CHNL_CSC_COEFF5, coeffs[5]);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

252

mxc_isi_write(pipe, CHNL_IMG_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

257

void mxc_isi_channel_set_alpha(struct mxc_isi_pipe *pipe, u8 alpha)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

261

val = mxc_isi_read(pipe, CHNL_IMG_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

265

mxc_isi_write(pipe, CHNL_IMG_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

268

void mxc_isi_channel_set_flip(struct mxc_isi_pipe *pipe, bool hflip, bool vflip)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

272

val = mxc_isi_read(pipe, CHNL_IMG_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

280

mxc_isi_write(pipe, CHNL_IMG_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

283

static void mxc_isi_channel_set_panic_threshold(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

285

const struct mxc_isi_set_thd *set_thd = pipe->isi->pdata->set_thd;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

288

val = mxc_isi_read(pipe, CHNL_OUT_BUF_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

299

mxc_isi_write(pipe, CHNL_OUT_BUF_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

30

void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

302

static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

308

mutex_lock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

310

val = mxc_isi_read(pipe, CHNL_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

32

mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, lower_32_bits(dma_addr));

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

323

if (pipe->chained)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

33

if (pipe->isi->pdata->has_36bit_dma)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

339

val |= CHNL_CTRL_SRC_INPUT(pipe->isi->pdata->num_ports);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

34

mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

346

mxc_isi_write(pipe, CHNL_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

348

mutex_unlock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

351

void mxc_isi_channel_config(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

363

mxc_isi_write(pipe, CHNL_IMG_CFG,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

368

mxc_isi_channel_set_scaling(pipe, in_encoding, in_size, scale,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

370

mxc_isi_channel_set_crop(pipe, scale, crop);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

373

mxc_isi_channel_set_csc(pipe, in_encoding, out_encoding, &csc_bypass);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

376

mxc_isi_channel_set_panic_threshold(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

379

mxc_isi_channel_set_control(pipe, input, csc_bypass && scaler_bypass);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

38

void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

382

void mxc_isi_channel_set_input_format(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

388

mxc_isi_write(pipe, CHNL_MEM_RD_CTRL,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

390

mxc_isi_write(pipe, CHNL_IN_BUF_PITCH,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

394

void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

401

dev_dbg(pipe->isi->dev, "output format %p4cc", &format->pixelformat);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

403

val = mxc_isi_read(pipe, CHNL_IMG_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

406

mxc_isi_write(pipe, CHNL_IMG_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

409

mxc_isi_write(pipe, CHNL_OUT_BUF_PITCH,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

417

u32 mxc_isi_channel_irq_status(struct mxc_isi_pipe *pipe, bool clear)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

421

status = mxc_isi_read(pipe, CHNL_STS);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

423

mxc_isi_write(pipe, CHNL_STS, status);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

428

void mxc_isi_channel_irq_clear(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

430

mxc_isi_write(pipe, CHNL_STS, 0xffffffff);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

433

static void mxc_isi_channel_irq_enable(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

435

const struct mxc_isi_ier_reg *ier_reg = pipe->isi->pdata->ier_reg;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

44

val = mxc_isi_read(pipe, CHNL_OUT_BUF_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

458

mxc_isi_channel_irq_clear(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

459

mxc_isi_write(pipe, CHNL_IER, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

462

static void mxc_isi_channel_irq_disable(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

464

mxc_isi_write(pipe, CHNL_IER, 0);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

47

mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

471

static void mxc_isi_channel_sw_reset(struct mxc_isi_pipe *pipe, bool enable_clk)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

473

mxc_isi_write(pipe, CHNL_CTRL, CHNL_CTRL_SW_RST);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

475

mxc_isi_write(pipe, CHNL_CTRL, enable_clk ? CHNL_CTRL_CLK_EN : 0);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

478

static void __mxc_isi_channel_get(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

480

if (!pipe->use_count++)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

481

mxc_isi_channel_sw_reset(pipe, true);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

484

void mxc_isi_channel_get(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

486

mutex_lock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

487

__mxc_isi_channel_get(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

488

mutex_unlock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

49

mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

491

static void __mxc_isi_channel_put(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

493

if (!--pipe->use_count)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

494

mxc_isi_channel_sw_reset(pipe, false);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

497

void mxc_isi_channel_put(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

499

mutex_lock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

500

__mxc_isi_channel_put(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

501

mutex_unlock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

504

void mxc_isi_channel_enable(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

508

mxc_isi_channel_irq_enable(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

51

mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

510

mutex_lock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

512

val = mxc_isi_read(pipe, CHNL_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

514

mxc_isi_write(pipe, CHNL_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

516

mutex_unlock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

519

void mxc_isi_channel_disable(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

523

mxc_isi_channel_irq_disable(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

525

mutex_lock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

527

val = mxc_isi_read(pipe, CHNL_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

529

mxc_isi_write(pipe, CHNL_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

53

if (pipe->isi->pdata->has_36bit_dma) {

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

531

mutex_unlock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

537

int mxc_isi_channel_acquire(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

54

mxc_isi_write(pipe, CHNL_Y_BUF1_XTND_ADDR,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

543

mutex_lock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

545

if (pipe->irq_handler) {

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

557

if ((pipe->available_res & resources) != resources) {

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

56

mxc_isi_write(pipe, CHNL_U_BUF1_XTND_ADDR,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

563

pipe->acquired_res = resources;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

564

pipe->available_res &= ~resources;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

565

pipe->irq_handler = irq_handler;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

568

mutex_unlock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

573

void mxc_isi_channel_release(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

575

mutex_lock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

577

pipe->irq_handler = NULL;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

578

pipe->available_res |= pipe->acquired_res;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

579

pipe->acquired_res = 0;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

58

mxc_isi_write(pipe, CHNL_V_BUF1_XTND_ADDR,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

581

mutex_unlock(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

590

int mxc_isi_channel_chain(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

595

struct mxc_isi_pipe *chained_pipe = pipe + 1;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

604

if (WARN_ON(pipe->id == pipe->isi->pdata->num_channels - 1))

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

610

if (WARN_ON(pipe->chained || chained_pipe->chained_res)) {

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

620

pipe->chained = true;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

63

mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

632

void mxc_isi_channel_unchain(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

634

struct mxc_isi_pipe *chained_pipe = pipe + 1;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

636

if (!pipe->chained)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

639

pipe->chained = false;

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

65

mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

67

mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

69

if (pipe->isi->pdata->has_36bit_dma) {

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

70

mxc_isi_write(pipe, CHNL_Y_BUF2_XTND_ADDR,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

72

mxc_isi_write(pipe, CHNL_U_BUF2_XTND_ADDR,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

74

mxc_isi_write(pipe, CHNL_V_BUF2_XTND_ADDR,

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

80

mxc_isi_write(pipe, CHNL_OUT_BUF_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

83

void mxc_isi_channel_m2m_start(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

87

val = mxc_isi_read(pipe, CHNL_MEM_RD_CTRL);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

89

mxc_isi_write(pipe, CHNL_MEM_RD_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

94

mxc_isi_write(pipe, CHNL_MEM_RD_CTRL, val);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

128

mxc_isi_channel_disable(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

147

mxc_isi_channel_config(m2m->pipe, MXC_ISI_INPUT_MEM,

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

151

mxc_isi_channel_set_input_format(m2m->pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

154

mxc_isi_channel_set_output_format(m2m->pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

164

mxc_isi_channel_set_alpha(m2m->pipe, ctx->ctrls.alpha);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

165

mxc_isi_channel_set_flip(m2m->pipe, ctx->ctrls.hflip, ctx->ctrls.vflip);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

174

mxc_isi_channel_set_inbuf(m2m->pipe, src_buf->dma_addrs[0]);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

175

mxc_isi_channel_set_outbuf(m2m->pipe, dst_buf->dma_addrs, MXC_ISI_BUF1);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

176

mxc_isi_channel_set_outbuf(m2m->pipe, dst_buf->dma_addrs, MXC_ISI_BUF2);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

178

mxc_isi_channel_enable(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

180

mxc_isi_channel_m2m_start(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

266

ret = mxc_isi_channel_acquire(m2m->pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

272

mxc_isi_channel_get(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

282

ret = mxc_isi_channel_chain(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

294

mxc_isi_channel_put(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

295

mxc_isi_channel_release(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

347

mxc_isi_channel_unchain(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

352

mxc_isi_channel_disable(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

353

mxc_isi_channel_put(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

354

mxc_isi_channel_release(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

517

return mxc_isi_format_try(ctx->m2m->pipe, pix, type);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

617

qdata->info = mxc_isi_format_try(ctx->m2m->pipe, &qdata->format, type);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

701

mxc_isi_channel_unchain(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

703

mxc_isi_channel_disable(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

704

mxc_isi_channel_put(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

712

mxc_isi_channel_get(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

715

mxc_isi_channel_chain(m2m->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

735

m2m->pipe = &isi->pipes[0];

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

817

link = media_create_intf_link(&m2m->pipe->video.vdev.entity,

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

94

static void mxc_isi_m2m_frame_write_done(struct mxc_isi_pipe *pipe, u32 status)

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

96

struct mxc_isi_m2m *m2m = &pipe->isi->m2m;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

235

int mxc_isi_pipe_enable(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

237

struct mxc_isi_crossbar *xbar = &pipe->isi->crossbar;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

244

struct v4l2_subdev *sd = &pipe->sd;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

256

xbar->num_sinks + pipe->id,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

284

mxc_isi_channel_config(pipe, input, &in_size, &scale, &crop,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

287

mxc_isi_channel_enable(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

290

ret = v4l2_subdev_enable_streams(&xbar->sd, xbar->num_sinks + pipe->id,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

293

mxc_isi_channel_disable(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

294

dev_err(pipe->isi->dev, "Failed to enable pipe %u\n",

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

295

pipe->id);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

302

void mxc_isi_pipe_disable(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

304

struct mxc_isi_crossbar *xbar = &pipe->isi->crossbar;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

307

ret = v4l2_subdev_disable_streams(&xbar->sd, xbar->num_sinks + pipe->id,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

310

dev_err(pipe->isi->dev, "Failed to disable pipe %u\n",

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

311

pipe->id);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

313

mxc_isi_channel_disable(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

321

mxc_isi_pipe_get_pad_format(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

329

mxc_isi_pipe_get_pad_crop(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

337

mxc_isi_pipe_get_pad_compose(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

347

struct mxc_isi_pipe *pipe = to_isi_pipe(sd);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

353

fmt_sink = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

355

fmt_source = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

372

compose = mxc_isi_pipe_get_pad_compose(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

374

crop = mxc_isi_pipe_get_pad_crop(pipe, state, MXC_ISI_PIPE_PAD_SOURCE);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

394

struct mxc_isi_pipe *pipe = to_isi_pipe(sd);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

402

format = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

454

struct mxc_isi_pipe *pipe = to_isi_pipe(sd);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

460

if (vb2_is_busy(&pipe->video.vb2_q))

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

476

max_width = pipe->id == pipe->isi->pdata->num_channels - 1

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

486

rect = mxc_isi_pipe_get_pad_compose(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

491

rect = mxc_isi_pipe_get_pad_crop(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

498

format = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

509

format = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

529

rect = mxc_isi_pipe_get_pad_crop(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

536

format = mxc_isi_pipe_get_pad_format(pipe, state, fmt->pad);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

539

dev_dbg(pipe->isi->dev, "pad%u: code: 0x%04x, %ux%u",

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

549

struct mxc_isi_pipe *pipe = to_isi_pipe(sd);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

560

format = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

574

rect = mxc_isi_pipe_get_pad_compose(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

584

rect = mxc_isi_pipe_get_pad_crop(pipe, state, sel->pad);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

593

rect = mxc_isi_pipe_get_pad_compose(pipe, state, sel->pad);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

608

struct mxc_isi_pipe *pipe = to_isi_pipe(sd);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

619

rect = mxc_isi_pipe_get_pad_compose(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

628

rect = mxc_isi_pipe_get_pad_crop(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

633

format = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

645

format = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

655

rect = mxc_isi_pipe_get_pad_compose(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

660

rect = mxc_isi_pipe_get_pad_crop(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

667

format = mxc_isi_pipe_get_pad_format(pipe, state,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

677

dev_dbg(pipe->isi->dev, "%s, target %#x: (%d,%d)/%dx%d", __func__,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

706

struct mxc_isi_pipe *pipe = priv;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

707

const struct mxc_isi_ier_reg *ier_reg = pipe->isi->pdata->ier_reg;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

710

status = mxc_isi_channel_irq_status(pipe, true);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

713

if (!WARN_ON(!pipe->irq_handler))

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

714

pipe->irq_handler(pipe, status);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

720

dev_dbg(pipe->isi->dev, "%s: IRQ AXI Error stat=0x%X\n",

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

726

dev_dbg(pipe->isi->dev, "%s: IRQ Panic OFLW Error stat=0x%X\n",

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

732

dev_dbg(pipe->isi->dev, "%s: IRQ OFLW Error stat=0x%X\n",

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

738

dev_dbg(pipe->isi->dev, "%s: IRQ EXCS OFLW Error stat=0x%X\n",

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

754

struct mxc_isi_pipe *pipe = &isi->pipes[id];

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

759

pipe->id = id;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

760

pipe->isi = isi;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

761

pipe->regs = isi->regs + id * isi->pdata->reg_offset;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

763

mutex_init(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

765

pipe->available_res = MXC_ISI_CHANNEL_RES_LINE_BUF

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

767

pipe->acquired_res = 0;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

768

pipe->chained_res = 0;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

769

pipe->chained = false;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

771

sd = &pipe->sd;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

775

snprintf(sd->name, sizeof(sd->name), "mxc_isi.%d", pipe->id);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

781

pipe->pads[MXC_ISI_PIPE_PAD_SINK].flags = MEDIA_PAD_FL_SINK;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

782

pipe->pads[MXC_ISI_PIPE_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

785

pipe->pads);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

794

mxc_isi_channel_irq_clear(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

803

0, dev_name(isi->dev), pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

813

mutex_destroy(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

818

void mxc_isi_pipe_cleanup(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

820

struct v4l2_subdev *sd = &pipe->sd;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

823

mutex_destroy(&pipe->lock);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

826

int mxc_isi_pipe_acquire(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

833

struct v4l2_subdev *sd = &pipe->sd;

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

852

ret = mxc_isi_channel_acquire(pipe, irq_handler, bypass);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

858

ret = mxc_isi_channel_chain(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

860

mxc_isi_channel_release(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

866

void mxc_isi_pipe_release(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

868

mxc_isi_channel_release(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-pipe.c

869

mxc_isi_channel_unchain(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1007

ret = mxc_isi_pipe_enable(video->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1014

mxc_isi_channel_put(video->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1023

mxc_isi_pipe_disable(video->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1024

mxc_isi_channel_put(video->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1035

mxc_isi_pipe_release(video->pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1181

mxc_isi_format_try(video->pipe, &f->fmt.pix_mp, MXC_ISI_VIDEO_CAP);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1194

video->fmtinfo = mxc_isi_format_try(video->pipe, pix, MXC_ISI_VIDEO_CAP);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1219

max_width = video->pipe->id == video->pipe->isi->pdata->num_channels - 1

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1277

ret = pm_runtime_resume_and_get(video->pipe->isi->dev);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1293

dev_err(video->pipe->isi->dev, "%s fail\n", __func__);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1295

pm_runtime_put(video->pipe->isi->dev);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1312

void mxc_isi_video_suspend(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1314

struct mxc_isi_video *video = &pipe->video;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1319

mxc_isi_pipe_disable(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1320

mxc_isi_channel_put(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1343

int mxc_isi_video_resume(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1345

struct mxc_isi_video *video = &pipe->video;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1356

return mxc_isi_pipe_enable(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1363

int mxc_isi_video_register(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1366

struct mxc_isi_video *video = &pipe->video;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1372

video->pipe = pipe;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1384

video->fmtinfo = mxc_isi_format_try(video->pipe, pix, MXC_ISI_VIDEO_CAP);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1387

snprintf(vdev->name, sizeof(vdev->name), "mxc_isi.%d.capture", pipe->id);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1415

q->dev = pipe->isi->dev;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1435

ret = media_create_pad_link(&pipe->sd.entity,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1455

void mxc_isi_video_unregister(struct mxc_isi_pipe *pipe)

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1457

struct mxc_isi_video *video = &pipe->video;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

409

mxc_isi_format_try(struct mxc_isi_pipe *pipe, struct v4l2_pix_format_mplane *pix,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

416

max_width = pipe->id == pipe->isi->pdata->num_channels - 1

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

491

static void mxc_isi_video_frame_write_done(struct mxc_isi_pipe *pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

494

struct mxc_isi_video *video = &pipe->video;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

495

struct device *dev = pipe->isi->dev;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

556

buf_id = pipe->isi->pdata->buf_active_reverse

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

609

mxc_isi_channel_set_outbuf(pipe, next_buf->dma_addrs, buf_id);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

626

status = mxc_isi_channel_irq_status(pipe, false);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

664

dma_free_coherent(video->pipe->isi->dev, buf->size, buf->addr,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

679

buf->addr = dma_alloc_coherent(video->pipe->isi->dev, buf->size,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

686

dev_dbg(video->pipe->isi->dev,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

709

struct v4l2_subdev *sd = &video->pipe->sd;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

721

dev_dbg(video->pipe->isi->dev,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

798

mxc_isi_channel_set_outbuf(video->pipe, buf->dma_addrs, buf_id);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

911

return mxc_isi_video_buffer_prepare(video->pipe->isi, vb2,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

928

struct mxc_isi_pipe *pipe = video->pipe;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

930

mxc_isi_channel_get(pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

933

mxc_isi_channel_set_alpha(pipe, video->ctrls.alpha);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

934

mxc_isi_channel_set_flip(pipe, video->ctrls.hflip, video->ctrls.vflip);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

937

mxc_isi_channel_set_output_format(pipe, video->fmtinfo, &video->pix);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

943

struct media_device *mdev = &video->pipe->isi->media_dev;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

944

struct media_pipeline *pipe;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

949

ret = mxc_isi_pipe_acquire(video->pipe,

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

954

pipe = media_entity_pipeline(&video->vdev.entity)

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

955

? : &video->pipe->pipe;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

957

ret = __video_device_pipeline_start(&video->vdev, pipe);

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

977

mxc_isi_pipe_release(video->pipe);

drivers/media/platform/qcom/camss/camss-video.h

43

struct media_pipeline pipe;

drivers/media/platform/raspberrypi/rp1-cfe/cfe.c

1179

ret = media_pipeline_start(&node->pad, &cfe->pipe);

drivers/media/platform/raspberrypi/rp1-cfe/cfe.c

282

struct media_pipeline pipe;

drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c

508

struct media_pipeline *pipe;

drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c

537

pipe = media_entity_pipeline(&sd->entity) ? : &cru->vdev.pipe;

drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c

538

ret = video_device_pipeline_start(&cru->vdev, pipe);

drivers/media/platform/renesas/vsp1/vsp1_brx.c

283

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_brx.c

305

flags = pipe->output ? pipe->output->format.flags : 0;

drivers/media/platform/renesas/vsp1/vsp1_clu.c

174

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_clu.c

190

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

117

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

191

ret = vsp1_du_insert_uif(vsp1, pipe, uif, &rpf->entity, RWPF_PAD_SOURCE,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

192

pipe->brx, brx_input);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

199

ret = v4l2_subdev_call(&pipe->brx->subdev, pad, set_fmt, NULL,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

206

format.format.code, BRX_NAME(pipe->brx), format.pad);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

212

ret = v4l2_subdev_call(&pipe->brx->subdev, pad, set_selection, NULL,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

219

BRX_NAME(pipe->brx), sel.pad);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

226

struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

227

static void vsp1_du_pipeline_configure(struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

230

struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

232

struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

245

if (pipe->num_inputs > 2)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

247

else if (pipe->brx && !drm_pipe->force_brx_release)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

248

brx = pipe->brx;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

249

else if (vsp1_feature(vsp1, VSP1_HAS_BRU) && !vsp1->bru->entity.pipe)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

255

if (brx != pipe->brx) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

259

if (pipe->brx) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

261

__func__, pipe->lif->index,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

262

BRX_NAME(pipe->brx));

drivers/media/platform/renesas/vsp1/vsp1_drm.c

278

released_brx = pipe->brx;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

280

list_del(&pipe->brx->list_pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

281

pipe->brx->sink = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

282

pipe->brx->pipe = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

283

pipe->brx = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

290

if (brx->pipe) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

294

__func__, pipe->lif->index, BRX_NAME(brx));

drivers/media/platform/renesas/vsp1/vsp1_drm.c

296

owner_pipe = to_vsp1_drm_pipeline(brx->pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

299

vsp1_du_pipeline_setup_inputs(vsp1, &owner_pipe->pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

300

vsp1_du_pipeline_configure(&owner_pipe->pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

308

owner_pipe->pipe.lif->index);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

317

if (released_brx && !released_brx->pipe)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

319

&pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

326

__func__, pipe->lif->index, BRX_NAME(brx));

drivers/media/platform/renesas/vsp1/vsp1_drm.c

328

pipe->brx = brx;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

329

pipe->brx->pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

330

pipe->brx->sink = &pipe->output->entity;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

331

pipe->brx->sink_pad = 0;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

333

list_add_tail(&pipe->brx->list_pipe,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

334

&pipe->output->entity.list_pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

34

static void vsp1_du_pipeline_frame_end(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

37

struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

373

struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

375

struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

384

pipe->num_inputs = 0;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

390

if (!pipe->inputs[i])

drivers/media/platform/renesas/vsp1/vsp1_drm.c

394

for (j = pipe->num_inputs++; j > 0; --j) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

408

ret = vsp1_du_pipeline_setup_brx(vsp1, pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

411

BRX_NAME(pipe->brx));

drivers/media/platform/renesas/vsp1/vsp1_drm.c

415

brx = to_brx(&pipe->brx->subdev);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

418

for (i = 0; i < pipe->brx->source_pad; ++i) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

426

if (!rpf->entity.pipe) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

427

rpf->entity.pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

428

list_add(&rpf->entity.list_pipe, &pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

433

rpf->entity.sink = pipe->brx;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

437

__func__, rpf->entity.index, BRX_NAME(pipe->brx), i);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

443

ret = vsp1_du_pipeline_setup_rpf(vsp1, pipe, rpf, uif, i);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

456

ret = vsp1_du_insert_uif(vsp1, pipe, uif,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

457

pipe->brx, pipe->brx->source_pad,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

458

&pipe->output->entity, 0);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

461

__func__, BRX_NAME(pipe->brx));

drivers/media/platform/renesas/vsp1/vsp1_drm.c

475

drm_pipe->uif->pipe = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

476

} else if (!drm_pipe->uif->pipe) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

477

drm_pipe->uif->pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

478

list_add_tail(&drm_pipe->uif->list_pipe, &pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

486

struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

488

struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

500

ret = v4l2_subdev_call(&pipe->output->entity.subdev, pad, set_fmt, NULL,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

507

format.format.code, pipe->output->entity.index);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

510

ret = v4l2_subdev_call(&pipe->output->entity.subdev, pad, get_fmt, NULL,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

517

format.format.code, pipe->output->entity.index);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

520

ret = v4l2_subdev_call(&pipe->lif->subdev, pad, set_fmt, NULL,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

527

format.format.code, pipe->lif->index);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

537

pipe->lif->index);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

545

static void vsp1_du_pipeline_configure(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

547

struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

554

vsp1_pipeline_calculate_partition(pipe, &pipe->part_table[0],

drivers/media/platform/renesas/vsp1/vsp1_drm.c

559

if (pipe->output->writeback)

drivers/media/platform/renesas/vsp1/vsp1_drm.c

562

dl = vsp1_dl_list_get(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

565

list_for_each_entry_safe(entity, next, &pipe->entities, list_pipe) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

567

if (!entity->pipe) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

577

vsp1_entity_route_setup(entity, pipe, dlb);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

578

vsp1_entity_configure_stream(entity, entity->state, pipe,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

580

vsp1_entity_configure_frame(entity, pipe, dl, dlb);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

581

vsp1_entity_configure_partition(entity, pipe,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

582

&pipe->part_table[0], dl, dlb);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

65

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

659

struct vsp1_pipeline *pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

667

drm_pipe = &vsp1->drm->pipe[pipe_index];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

668

pipe = &drm_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

675

brx = to_brx(&pipe->brx->subdev);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

681

ret = vsp1_pipeline_stop(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

685

for (i = 0; i < ARRAY_SIZE(pipe->inputs); ++i) {

drivers/media/platform/renesas/vsp1/vsp1_drm.c

686

struct vsp1_rwpf *rpf = pipe->inputs[i];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

695

WARN_ON(!rpf->entity.pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

696

rpf->entity.pipe = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

698

pipe->inputs[i] = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

704

pipe->num_inputs = 0;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

707

__func__, pipe->lif->index,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

708

BRX_NAME(pipe->brx));

drivers/media/platform/renesas/vsp1/vsp1_drm.c

710

list_del(&pipe->brx->list_pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

711

pipe->brx->pipe = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

712

pipe->brx = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

716

vsp1_dlm_reset(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

725

pipe->underrun_count = 0;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

729

pipe->interlaced = cfg->interlaced;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

733

pipe->interlaced ? "i" : "");

drivers/media/platform/renesas/vsp1/vsp1_drm.c

738

ret = vsp1_du_pipeline_setup_inputs(vsp1, pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

742

ret = vsp1_du_pipeline_setup_output(vsp1, pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

746

vsp1_pipeline_dump(pipe, "LIF setup");

drivers/media/platform/renesas/vsp1/vsp1_drm.c

765

vsp1_du_pipeline_configure(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

774

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

775

vsp1_pipeline_run(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

776

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

829

struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

849

rpf->entity.pipe = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

850

drm_pipe->pipe.inputs[rpf_index] = NULL;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

885

drm_pipe->pipe.inputs[rpf_index] = rpf;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

901

struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

902

struct vsp1_pipeline *pipe = &drm_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

912

ret = vsp1_du_pipeline_set_rwpf_format(vsp1, pipe->output,

drivers/media/platform/renesas/vsp1/vsp1_drm.c

918

pipe->output->mem.addr[0] = wb_cfg->mem[0];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

919

pipe->output->mem.addr[1] = wb_cfg->mem[1];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

920

pipe->output->mem.addr[2] = wb_cfg->mem[2];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

921

pipe->output->writeback = true;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

924

vsp1_du_pipeline_setup_inputs(vsp1, pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

926

vsp1_pipeline_dump(pipe, "atomic update");

drivers/media/platform/renesas/vsp1/vsp1_drm.c

928

vsp1_du_pipeline_configure(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

974

struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[i];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

975

struct vsp1_pipeline *pipe = &drm_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

979

vsp1_pipeline_init(pipe);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

981

pipe->partitions = 1;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

982

pipe->part_table = &drm_pipe->partition;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

984

pipe->frame_end = vsp1_du_pipeline_frame_end;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

990

pipe->output = vsp1->wpf[i];

drivers/media/platform/renesas/vsp1/vsp1_drm.c

991

pipe->lif = &vsp1->lif[i]->entity;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

993

pipe->output->entity.pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

994

pipe->output->entity.sink = pipe->lif;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

995

pipe->output->entity.sink_pad = 0;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

996

list_add_tail(&pipe->output->entity.list_pipe, &pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_drm.c

998

pipe->lif->pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

999

list_add_tail(&pipe->lif->list_pipe, &pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_drm.h

34

struct vsp1_pipeline pipe;

drivers/media/platform/renesas/vsp1/vsp1_drm.h

59

struct vsp1_drm_pipeline pipe[VSP1_MAX_LIF];

drivers/media/platform/renesas/vsp1/vsp1_drm.h

72

to_vsp1_drm_pipeline(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_drm.h

74

return container_of(pipe, struct vsp1_drm_pipeline, pipe);

drivers/media/platform/renesas/vsp1/vsp1_drv.c

66

if ((status & VI6_WPF_IRQ_STA_UND) && wpf->entity.pipe) {

drivers/media/platform/renesas/vsp1/vsp1_drv.c

67

wpf->entity.pipe->underrun_count++;

drivers/media/platform/renesas/vsp1/vsp1_drv.c

71

i, wpf->entity.pipe->underrun_count);

drivers/media/platform/renesas/vsp1/vsp1_drv.c

75

vsp1_pipeline_frame_end(wpf->entity.pipe);

drivers/media/platform/renesas/vsp1/vsp1_entity.c

103

entity->ops->configure_partition(entity, pipe, partition,

drivers/media/platform/renesas/vsp1/vsp1_entity.c

24

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.c

38

smppt = (pipe->output->entity.index << VI6_DPR_SMPPT_TGW_SHIFT)

drivers/media/platform/renesas/vsp1/vsp1_entity.c

51

smppt = (pipe->output->entity.index << VI6_DPR_SMPPT_TGW_SHIFT)

drivers/media/platform/renesas/vsp1/vsp1_entity.c

79

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.c

84

entity->ops->configure_stream(entity, state, pipe, dl, dlb);

drivers/media/platform/renesas/vsp1/vsp1_entity.c

88

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.c

93

entity->ops->configure_frame(entity, pipe, dl, dlb);

drivers/media/platform/renesas/vsp1/vsp1_entity.c

97

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

101

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

116

struct vsp1_pipeline *pipe;

drivers/media/platform/renesas/vsp1/vsp1_entity.h

154

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

159

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

164

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

169

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

84

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

88

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

92

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_entity.h

98

struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_hgo.c

134

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_hgt.c

130

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_histo.c

59

struct vsp1_pipeline *pipe = histo->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_histo.c

66

buf->buf.sequence = pipe->sequence;

drivers/media/platform/renesas/vsp1/vsp1_hsit.c

140

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_iif.c

83

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_lif.c

87

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_lut.c

150

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_lut.c

160

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

407

void vsp1_pipeline_reset(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

412

if (pipe->brx) {

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

413

struct vsp1_brx *brx = to_brx(&pipe->brx->subdev);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

419

for (i = 0; i < ARRAY_SIZE(pipe->inputs); ++i)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

420

pipe->inputs[i] = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

422

pipe->output = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

424

list_for_each_entry(entity, &pipe->entities, list_pipe)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

425

entity->pipe = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

427

INIT_LIST_HEAD(&pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

428

pipe->state = VSP1_PIPELINE_STOPPED;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

429

pipe->buffers_ready = 0;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

430

pipe->num_inputs = 0;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

431

pipe->brx = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

432

pipe->hgo = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

433

pipe->hgt = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

434

pipe->iif = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

435

pipe->lif = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

436

pipe->uds = NULL;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

439

void vsp1_pipeline_init(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

441

mutex_init(&pipe->lock);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

442

spin_lock_init(&pipe->irqlock);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

443

init_waitqueue_head(&pipe->wq);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

444

kref_init(&pipe->kref);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

446

INIT_LIST_HEAD(&pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

447

pipe->state = VSP1_PIPELINE_STOPPED;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

450

void __vsp1_pipeline_dump(struct _ddebug *dbg, struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

453

struct vsp1_device *vsp1 = pipe->output->entity.vsp1;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

459

list_for_each_entry(entity, &pipe->entities, list_pipe) {

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

473

void vsp1_pipeline_run(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

475

struct vsp1_device *vsp1 = pipe->output->entity.vsp1;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

477

lockdep_assert_held(&pipe->irqlock);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

479

if (pipe->state == VSP1_PIPELINE_STOPPED) {

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

480

vsp1_write(vsp1, VI6_CMD(pipe->output->entity.index),

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

482

pipe->state = VSP1_PIPELINE_RUNNING;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

485

pipe->buffers_ready = 0;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

488

bool vsp1_pipeline_stopped(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

493

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

494

stopped = pipe->state == VSP1_PIPELINE_STOPPED;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

495

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

500

int vsp1_pipeline_stop(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

502

struct vsp1_device *vsp1 = pipe->output->entity.vsp1;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

507

if (pipe->lif) {

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

512

ret = vsp1_reset_wpf(vsp1, pipe->output->entity.index);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

514

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

515

pipe->state = VSP1_PIPELINE_STOPPED;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

516

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

520

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

521

if (pipe->state == VSP1_PIPELINE_RUNNING)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

522

pipe->state = VSP1_PIPELINE_STOPPING;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

523

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

525

ret = wait_event_timeout(pipe->wq, vsp1_pipeline_stopped(pipe),

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

530

list_for_each_entry(entity, &pipe->entities, list_pipe) {

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

536

if (pipe->hgo)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

541

if (pipe->hgt)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

546

vsp1_wpf_stop(pipe->output);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

551

bool vsp1_pipeline_ready(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

555

mask = ((1 << pipe->num_inputs) - 1) << 1;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

556

if (!pipe->lif)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

559

return pipe->buffers_ready == mask;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

562

void vsp1_pipeline_frame_end(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

566

if (pipe == NULL)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

574

flags = vsp1_dlm_irq_frame_end(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

576

if (pipe->hgo)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

577

vsp1_hgo_frame_end(pipe->hgo);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

579

if (pipe->hgt)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

580

vsp1_hgt_frame_end(pipe->hgt);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

586

if (pipe->frame_end)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

587

pipe->frame_end(pipe, flags);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

589

pipe->sequence++;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

600

void vsp1_pipeline_propagate_alpha(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

603

if (!pipe->uds)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

610

if (pipe->uds_input->type == VSP1_ENTITY_BRU ||

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

611

pipe->uds_input->type == VSP1_ENTITY_BRS)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

614

vsp1_uds_set_alpha(pipe->uds, dlb, alpha);

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

629

static void vsp1_pipeline_propagate_partition(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

636

list_for_each_entry_reverse(entity, &pipe->entities, list_pipe) {

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

638

entity->ops->partition(entity, entity->state, pipe,

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

652

void vsp1_pipeline_calculate_partition(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

665

format = v4l2_subdev_state_get_format(pipe->output->entity.state,

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

690

unsigned int partitions = pipe->partitions - 1;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

706

vsp1_pipeline_propagate_partition(pipe, partition, index, &window);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

102

struct media_pipeline pipe;

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

108

void (*frame_end)(struct vsp1_pipeline *pipe, unsigned int completion);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

144

void vsp1_pipeline_reset(struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

145

void vsp1_pipeline_init(struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

147

void __vsp1_pipeline_dump(struct _ddebug *, struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

152

#define vsp1_pipeline_dump(pipe, msg) \

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

153

_dynamic_func_call("vsp1_pipeline_dump()", __vsp1_pipeline_dump, pipe, msg)

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

155

#define vsp1_pipeline_dump(pipe, msg) \

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

156

__vsp1_pipeline_dump(NULL, pipe, msg)

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

158

#define vsp1_pipeline_dump(pipe, msg) \

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

161

__vsp1_pipeline_dump(NULL, pipe, msg); \

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

165

void vsp1_pipeline_run(struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

166

bool vsp1_pipeline_stopped(struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

167

int vsp1_pipeline_stop(struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

168

bool vsp1_pipeline_ready(struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

170

void vsp1_pipeline_frame_end(struct vsp1_pipeline *pipe);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

172

void vsp1_pipeline_propagate_alpha(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

176

void vsp1_pipeline_calculate_partition(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

127

if (pipe->iif) {

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

186

if (pipe->brx) {

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

189

compose = v4l2_subdev_state_get_compose(pipe->brx->state,

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

195

if (pipe->interlaced)

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

298

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

309

vsp1_pipeline_propagate_alpha(pipe, dlb, rpf->alpha);

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

313

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

334

if (pipe->interlaced) {

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

371

if (pipe->interlaced) {

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

382

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

401

if (pipe->partitions > 1) {

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

52

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

78

if (pipe->interlaced)

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

87

infmt = (pipe->iif ? 0 : VI6_RPF_INFMT_CIPM)

drivers/media/platform/renesas/vsp1/vsp1_sru.c

276

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_sru.c

309

struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_sru.c

330

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_uds.c

263

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_uds.c

309

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_uds.c

332

struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_uds.c

366

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_uif.c

192

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_video.c

1009

pipe = vsp1_video_pipeline_get(video);

drivers/media/platform/renesas/vsp1/vsp1_video.c

1010

if (IS_ERR(pipe)) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

1012

return PTR_ERR(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

1015

ret = __video_device_pipeline_start(&video->video, &pipe->pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

1041

vsp1_video_pipeline_put(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

1151

struct vsp1_pipeline *pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

1156

pipe = wpf->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

1157

if (pipe == NULL)

drivers/media/platform/renesas/vsp1/vsp1_video.c

1160

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

1161

if (pipe->state == VSP1_PIPELINE_RUNNING)

drivers/media/platform/renesas/vsp1/vsp1_video.c

1162

pipe->state = VSP1_PIPELINE_STOPPING;

drivers/media/platform/renesas/vsp1/vsp1_video.c

1163

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

1168

struct vsp1_pipeline *pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

1173

pipe = wpf->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

1174

if (pipe == NULL)

drivers/media/platform/renesas/vsp1/vsp1_video.c

1177

ret = wait_event_timeout(pipe->wq, vsp1_pipeline_stopped(pipe),

drivers/media/platform/renesas/vsp1/vsp1_video.c

1193

struct vsp1_pipeline *pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

1198

pipe = wpf->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

1199

if (pipe == NULL)

drivers/media/platform/renesas/vsp1/vsp1_video.c

1206

pipe->configured = false;

drivers/media/platform/renesas/vsp1/vsp1_video.c

1208

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

1209

if (vsp1_pipeline_ready(pipe))

drivers/media/platform/renesas/vsp1/vsp1_video.c

1210

vsp1_video_pipeline_run(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

1211

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

209

struct vsp1_pipeline *pipe = video->rwpf->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

233

done->buf.sequence = pipe->sequence;

drivers/media/platform/renesas/vsp1/vsp1_video.c

243

static void vsp1_video_frame_end(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_video.c

254

pipe->buffers_ready |= 1 << video->pipe_index;

drivers/media/platform/renesas/vsp1/vsp1_video.c

257

static void vsp1_video_pipeline_run_partition(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_video.c

261

struct vsp1_partition *part = &pipe->part_table[partition];

drivers/media/platform/renesas/vsp1/vsp1_video.c

265

list_for_each_entry(entity, &pipe->entities, list_pipe)

drivers/media/platform/renesas/vsp1/vsp1_video.c

266

vsp1_entity_configure_partition(entity, pipe, part, dl, dlb);

drivers/media/platform/renesas/vsp1/vsp1_video.c

269

static void vsp1_video_pipeline_run(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_video.c

271

struct vsp1_device *vsp1 = pipe->output->entity.vsp1;

drivers/media/platform/renesas/vsp1/vsp1_video.c

277

dl = vsp1_dl_list_get(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_video.c

285

if (!pipe->configured)

drivers/media/platform/renesas/vsp1/vsp1_video.c

286

vsp1_dl_list_add_body(dl, pipe->stream_config);

drivers/media/platform/renesas/vsp1/vsp1_video.c

290

list_for_each_entry(entity, &pipe->entities, list_pipe)

drivers/media/platform/renesas/vsp1/vsp1_video.c

291

vsp1_entity_configure_frame(entity, pipe, dl, dlb);

drivers/media/platform/renesas/vsp1/vsp1_video.c

294

vsp1_video_pipeline_run_partition(pipe, dl, 0);

drivers/media/platform/renesas/vsp1/vsp1_video.c

297

for (partition = 1; partition < pipe->partitions; ++partition) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

300

dl_next = vsp1_dl_list_get(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_video.c

312

vsp1_video_pipeline_run_partition(pipe, dl_next, partition);

drivers/media/platform/renesas/vsp1/vsp1_video.c

318

pipe->configured = true;

drivers/media/platform/renesas/vsp1/vsp1_video.c

320

vsp1_pipeline_run(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

323

static void vsp1_video_pipeline_frame_end(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_video.c

326

struct vsp1_device *vsp1 = pipe->output->entity.vsp1;

drivers/media/platform/renesas/vsp1/vsp1_video.c

334

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

338

if (!pipe->inputs[i])

drivers/media/platform/renesas/vsp1/vsp1_video.c

341

vsp1_video_frame_end(pipe, pipe->inputs[i]);

drivers/media/platform/renesas/vsp1/vsp1_video.c

344

vsp1_video_frame_end(pipe, pipe->output);

drivers/media/platform/renesas/vsp1/vsp1_video.c

346

state = pipe->state;

drivers/media/platform/renesas/vsp1/vsp1_video.c

347

pipe->state = VSP1_PIPELINE_STOPPED;

drivers/media/platform/renesas/vsp1/vsp1_video.c

354

wake_up(&pipe->wq);

drivers/media/platform/renesas/vsp1/vsp1_video.c

355

else if (vsp1_pipeline_ready(pipe))

drivers/media/platform/renesas/vsp1/vsp1_video.c

356

vsp1_video_pipeline_run(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

358

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

361

static int vsp1_video_pipeline_build_branch(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_video.c

427

if (pipe->uds) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

432

pipe->uds = entity;

drivers/media/platform/renesas/vsp1/vsp1_video.c

433

pipe->uds_input = brx ? &brx->entity : &input->entity;

drivers/media/platform/renesas/vsp1/vsp1_video.c

451

static int vsp1_video_pipeline_build(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_video.c

477

list_add_tail(&e->list_pipe, &pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_video.c

478

e->pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

483

pipe->inputs[rwpf->entity.index] = rwpf;

drivers/media/platform/renesas/vsp1/vsp1_video.c

484

rwpf->video->pipe_index = ++pipe->num_inputs;

drivers/media/platform/renesas/vsp1/vsp1_video.c

489

pipe->output = rwpf;

drivers/media/platform/renesas/vsp1/vsp1_video.c

494

pipe->lif = e;

drivers/media/platform/renesas/vsp1/vsp1_video.c

499

pipe->brx = e;

drivers/media/platform/renesas/vsp1/vsp1_video.c

503

pipe->hgo = e;

drivers/media/platform/renesas/vsp1/vsp1_video.c

507

pipe->hgt = e;

drivers/media/platform/renesas/vsp1/vsp1_video.c

518

if (pipe->num_inputs == 0 || !pipe->output)

drivers/media/platform/renesas/vsp1/vsp1_video.c

526

if (!pipe->inputs[i])

drivers/media/platform/renesas/vsp1/vsp1_video.c

529

ret = vsp1_video_pipeline_build_branch(pipe, pipe->inputs[i],

drivers/media/platform/renesas/vsp1/vsp1_video.c

530

pipe->output);

drivers/media/platform/renesas/vsp1/vsp1_video.c

538

static int vsp1_video_pipeline_init(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_video.c

543

vsp1_pipeline_init(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

545

pipe->frame_end = vsp1_video_pipeline_frame_end;

drivers/media/platform/renesas/vsp1/vsp1_video.c

547

ret = vsp1_video_pipeline_build(pipe, video);

drivers/media/platform/renesas/vsp1/vsp1_video.c

551

vsp1_pipeline_dump(pipe, "video");

drivers/media/platform/renesas/vsp1/vsp1_video.c

558

struct vsp1_pipeline *pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

567

if (!video->rwpf->entity.pipe) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

568

pipe = kzalloc_obj(*pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

569

if (!pipe)

drivers/media/platform/renesas/vsp1/vsp1_video.c

572

ret = vsp1_video_pipeline_init(pipe, video);

drivers/media/platform/renesas/vsp1/vsp1_video.c

574

vsp1_pipeline_reset(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

575

kfree(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

579

pipe = video->rwpf->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

580

kref_get(&pipe->kref);

drivers/media/platform/renesas/vsp1/vsp1_video.c

583

return pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

588

struct vsp1_pipeline *pipe = container_of(kref, typeof(*pipe), kref);

drivers/media/platform/renesas/vsp1/vsp1_video.c

590

vsp1_pipeline_reset(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

591

kfree(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

594

static void vsp1_video_pipeline_put(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_video.c

596

struct media_device *mdev = &pipe->output->entity.vsp1->media_dev;

drivers/media/platform/renesas/vsp1/vsp1_video.c

599

kref_put(&pipe->kref, vsp1_video_pipeline_release);

drivers/media/platform/renesas/vsp1/vsp1_video.c

662

struct vsp1_pipeline *pipe = video->rwpf->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

675

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

678

pipe->buffers_ready |= 1 << video->pipe_index;

drivers/media/platform/renesas/vsp1/vsp1_video.c

681

vsp1_pipeline_ready(pipe))

drivers/media/platform/renesas/vsp1/vsp1_video.c

682

vsp1_video_pipeline_run(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

684

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

687

static int vsp1_video_pipeline_setup_partitions(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_video.c

689

struct vsp1_device *vsp1 = pipe->output->entity.vsp1;

drivers/media/platform/renesas/vsp1/vsp1_video.c

699

format = v4l2_subdev_state_get_format(pipe->output->entity.state,

drivers/media/platform/renesas/vsp1/vsp1_video.c

708

list_for_each_entry(entity, &pipe->entities, list_pipe) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

716

pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

722

pipe->partitions = DIV_ROUND_UP(format->width, div_size);

drivers/media/platform/renesas/vsp1/vsp1_video.c

723

pipe->part_table = kzalloc_objs(*pipe->part_table, pipe->partitions);

drivers/media/platform/renesas/vsp1/vsp1_video.c

724

if (!pipe->part_table)

drivers/media/platform/renesas/vsp1/vsp1_video.c

727

for (i = 0; i < pipe->partitions; ++i)

drivers/media/platform/renesas/vsp1/vsp1_video.c

728

vsp1_pipeline_calculate_partition(pipe, &pipe->part_table[i],

drivers/media/platform/renesas/vsp1/vsp1_video.c

734

static int vsp1_video_setup_pipeline(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_video.c

740

ret = vsp1_video_pipeline_setup_partitions(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

744

if (pipe->uds) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

745

struct vsp1_uds *uds = to_uds(&pipe->uds->subdev);

drivers/media/platform/renesas/vsp1/vsp1_video.c

754

if (pipe->uds_input->type == VSP1_ENTITY_BRU ||

drivers/media/platform/renesas/vsp1/vsp1_video.c

755

pipe->uds_input->type == VSP1_ENTITY_BRS) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

759

to_rwpf(&pipe->uds_input->subdev);

drivers/media/platform/renesas/vsp1/vsp1_video.c

770

pipe->stream_config = vsp1_dlm_dl_body_get(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_video.c

771

if (!pipe->stream_config)

drivers/media/platform/renesas/vsp1/vsp1_video.c

774

list_for_each_entry(entity, &pipe->entities, list_pipe) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

775

vsp1_entity_route_setup(entity, pipe, pipe->stream_config);

drivers/media/platform/renesas/vsp1/vsp1_video.c

776

vsp1_entity_configure_stream(entity, entity->state, pipe, NULL,

drivers/media/platform/renesas/vsp1/vsp1_video.c

777

pipe->stream_config);

drivers/media/platform/renesas/vsp1/vsp1_video.c

796

static void vsp1_video_cleanup_pipeline(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_video.c

798

lockdep_assert_held(&pipe->lock);

drivers/media/platform/renesas/vsp1/vsp1_video.c

801

vsp1_dl_body_put(pipe->stream_config);

drivers/media/platform/renesas/vsp1/vsp1_video.c

802

pipe->stream_config = NULL;

drivers/media/platform/renesas/vsp1/vsp1_video.c

803

pipe->configured = false;

drivers/media/platform/renesas/vsp1/vsp1_video.c

806

kfree(pipe->part_table);

drivers/media/platform/renesas/vsp1/vsp1_video.c

807

pipe->part_table = NULL;

drivers/media/platform/renesas/vsp1/vsp1_video.c

813

struct vsp1_pipeline *pipe = video->rwpf->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

818

mutex_lock(&pipe->lock);

drivers/media/platform/renesas/vsp1/vsp1_video.c

819

if (pipe->stream_count == pipe->num_inputs) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

820

ret = vsp1_video_setup_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

823

vsp1_video_cleanup_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

824

mutex_unlock(&pipe->lock);

drivers/media/platform/renesas/vsp1/vsp1_video.c

831

pipe->stream_count++;

drivers/media/platform/renesas/vsp1/vsp1_video.c

832

mutex_unlock(&pipe->lock);

drivers/media/platform/renesas/vsp1/vsp1_video.c

844

spin_lock_irqsave(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

845

if (vsp1_pipeline_ready(pipe))

drivers/media/platform/renesas/vsp1/vsp1_video.c

846

vsp1_video_pipeline_run(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

847

spin_unlock_irqrestore(&pipe->irqlock, flags);

drivers/media/platform/renesas/vsp1/vsp1_video.c

855

struct vsp1_pipeline *pipe = video->rwpf->entity.pipe;

drivers/media/platform/renesas/vsp1/vsp1_video.c

864

pipe->buffers_ready &= ~(1 << video->pipe_index);

drivers/media/platform/renesas/vsp1/vsp1_video.c

867

mutex_lock(&pipe->lock);

drivers/media/platform/renesas/vsp1/vsp1_video.c

868

if (--pipe->stream_count == pipe->num_inputs) {

drivers/media/platform/renesas/vsp1/vsp1_video.c

870

ret = vsp1_pipeline_stop(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

874

vsp1_video_cleanup_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

876

mutex_unlock(&pipe->lock);

drivers/media/platform/renesas/vsp1/vsp1_video.c

880

vsp1_video_pipeline_put(pipe);

drivers/media/platform/renesas/vsp1/vsp1_video.c

996

struct vsp1_pipeline *pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

135

struct vsp1_vspx_pipeline *vspx_pipe = &vsp1->vspx->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

136

struct vsp1_pipeline *pipe = &vspx_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

137

struct vsp1_rwpf *rpf0 = pipe->inputs[0];

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

145

ret = vsp1_vspx_rwpf_set_subdev_fmt(vsp1, pipe->output, isp_fourcc,

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

150

vsp1_pipeline_calculate_partition(pipe, &pipe->part_table[0], width, 0);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

161

vsp1_entity_route_setup(&rpf0->entity, pipe, dlb);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

162

vsp1_entity_configure_stream(&rpf0->entity, rpf0->entity.state, pipe,

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

164

vsp1_entity_configure_partition(&rpf0->entity, pipe,

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

165

&pipe->part_table[0], dl, dlb);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

174

static void vsp1_vspx_pipeline_frame_end(struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

177

struct vsp1_vspx_pipeline *vspx_pipe = to_vsp1_vspx_pipeline(pipe);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

179

scoped_guard(spinlock_irqsave, &pipe->irqlock) {

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

185

pipe->state = VSP1_PIPELINE_STOPPED;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

306

struct vsp1_vspx_pipeline *vspx_pipe = &vsp1->vspx->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

307

struct vsp1_pipeline *pipe = &vspx_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

325

vsp1_pipeline_dump(pipe, "VSPX job");

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

376

struct vsp1_vspx_pipeline *vspx_pipe = &vsp1->vspx->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

377

struct vsp1_pipeline *pipe = &vspx_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

388

WARN_ON_ONCE(vsp1_pipeline_stop(pipe));

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

391

vsp1_dlm_reset(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

41

struct vsp1_pipeline pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

414

struct vsp1_vspx_pipeline *vspx_pipe = &vsp1->vspx->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

415

struct vsp1_pipeline *pipe = &vspx_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

427

job->dl = vsp1_dl_list_get(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

435

vsp1_entity_route_setup(pipe->iif, pipe, dlb);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

436

vsp1_entity_configure_stream(pipe->iif, pipe->iif->state, pipe,

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

440

vsp1_entity_route_setup(&pipe->output->entity, pipe, dlb);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

441

vsp1_entity_configure_stream(&pipe->output->entity,

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

442

pipe->output->entity.state, pipe,

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

469

second_dl = vsp1_dl_list_get(pipe->output->dlm);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

524

struct vsp1_vspx_pipeline *vspx_pipe = &vsp1->vspx->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

525

struct vsp1_pipeline *pipe = &vspx_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

554

scoped_guard(spinlock_irqsave, &pipe->irqlock) {

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

555

vsp1_pipeline_run(pipe);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

584

struct vsp1_pipeline *pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

592

vspx_pipe = &vsp1->vspx->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

595

pipe = &vspx_pipe->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

597

vsp1_pipeline_init(pipe);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

599

pipe->partitions = 1;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

600

pipe->part_table = &vspx_pipe->partition;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

601

pipe->interlaced = false;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

602

pipe->frame_end = vsp1_vspx_pipeline_frame_end;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

611

pipe->inputs[0] = vsp1->rpf[0];

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

612

pipe->inputs[0]->entity.pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

613

pipe->inputs[0]->entity.sink = &vsp1->iif->entity;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

614

list_add_tail(&pipe->inputs[0]->entity.list_pipe, &pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

616

pipe->iif = &vsp1->iif->entity;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

617

pipe->iif->pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

618

pipe->iif->sink = &vsp1->wpf[0]->entity;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

619

pipe->iif->sink_pad = RWPF_PAD_SINK;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

620

list_add_tail(&pipe->iif->list_pipe, &pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

622

pipe->output = vsp1->wpf[0];

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

623

pipe->output->entity.pipe = pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

624

list_add_tail(&pipe->output->entity.list_pipe, &pipe->entities);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

631

struct vsp1_vspx_pipeline *vspx_pipe = &vsp1->vspx->pipe;

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

69

to_vsp1_vspx_pipeline(struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

71

return container_of(pipe, struct vsp1_vspx_pipeline, pipe);

drivers/media/platform/renesas/vsp1/vsp1_vspx.c

81

struct vsp1_vspx_pipeline pipe;

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

233

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

254

if (!pipe->iif && (!pipe->lif || wpf->writeback)) {

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

325

struct vsp1_rwpf *input = pipe->inputs[i];

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

330

srcrpf |= (pipe->iif || (!pipe->brx && pipe->num_inputs == 1))

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

335

if (pipe->brx)

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

336

srcrpf |= pipe->brx->type == VSP1_ENTITY_BRU

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

347

if (pipe->iif)

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

369

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

395

struct vsp1_pipeline *pipe,

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

431

if (pipe->lif && !wpf->writeback)

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

530

struct vsp1_pipeline *pipe)

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

539

struct vsp1_pipeline *pipe,

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

1073

if (rkisp1->pipe.start_count < 2)

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

1103

if (rkisp1->pipe.start_count > 1)

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

1152

ret = video_device_pipeline_start(&cap->vnode.vdev, &cap->rkisp1->pipe);

drivers/media/platform/rockchip/rkisp1/rkisp1-common.h

530

struct media_pipeline pipe;

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

1068

sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

1105

struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

1188

ret = video_device_pipeline_start(&vc->ve.vdev, &vc->ve.pipe->mp);

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

1192

sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

181

struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

1823

fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

1828

fimc->vid_cap.ve.pipe = NULL;

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

1851

fimc->vid_cap.ve.pipe = NULL;

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

762

struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);

drivers/media/platform/samsung/exynos4-is/fimc-capture.c

970

sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);

drivers/media/platform/samsung/exynos4-is/fimc-isp-video.c

497

ret = video_device_pipeline_start(&ve->vdev, &ve->pipe->mp);

drivers/media/platform/samsung/exynos4-is/fimc-isp-video.c

653

ve->pipe = NULL;

drivers/media/platform/samsung/exynos4-is/fimc-isp.c

398

isp->video_capture.ve.pipe = v4l2_get_subdev_hostdata(sd);

drivers/media/platform/samsung/exynos4-is/fimc-isp.c

403

isp->video_capture.ve.pipe = NULL;

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1284

fimc->ve.pipe = v4l2_get_subdev_hostdata(sd);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1289

fimc->ve.pipe = NULL;

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1310

fimc->ve.pipe = NULL;

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

819

ret = video_device_pipeline_start(&fimc->ve.vdev, &fimc->ve.pipe->mp);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1132

p = to_fimc_pipeline(ve->pipe);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1141

ret = __fimc_pipeline_open(ve->pipe, entity, true);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1143

ret = __fimc_pipeline_close(ve->pipe);

drivers/media/platform/samsung/exynos4-is/media-dev.c

772

dev->vid_cap.ve.pipe = NULL;

drivers/media/platform/samsung/exynos4-is/media-dev.c

780

dev->ve.pipe = NULL;

drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-bytecap.c

134

struct media_pipeline pipe;

drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-bytecap.c

417

ret = media_pipeline_start(entity->pads, &vcap->pipe);

drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c

107

struct media_pipeline pipe;

drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c

852

ret = video_device_pipeline_start(&csi->vdev, &csi->pipe);

drivers/media/platform/ti/omap3isp/isp.c

1191

struct isp_pipeline *pipe = to_isp_pipeline(me);

drivers/media/platform/ti/omap3isp/isp.c

1193

if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||

drivers/media/platform/ti/omap3isp/isp.c

1194

(pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&

drivers/media/platform/ti/omap3isp/isp.c

1195

!isp_pipeline_ready(pipe)))

drivers/media/platform/ti/omap3isp/isp.c

1215

struct isp_video *video = pipe->output;

drivers/media/platform/ti/omap3isp/isp.c

530

struct isp_pipeline *pipe;

drivers/media/platform/ti/omap3isp/isp.c

545

pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);

drivers/media/platform/ti/omap3isp/isp.c

546

if (pipe != NULL)

drivers/media/platform/ti/omap3isp/isp.c

547

pipe->error = true;

drivers/media/platform/ti/omap3isp/isp.c

551

pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);

drivers/media/platform/ti/omap3isp/isp.c

552

if (pipe != NULL)

drivers/media/platform/ti/omap3isp/isp.c

553

pipe->error = true;

drivers/media/platform/ti/omap3isp/isp.c

557

pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);

drivers/media/platform/ti/omap3isp/isp.c

558

if (pipe != NULL)

drivers/media/platform/ti/omap3isp/isp.c

559

pipe->error = true;

drivers/media/platform/ti/omap3isp/isp.c

563

pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);

drivers/media/platform/ti/omap3isp/isp.c

564

if (pipe != NULL)

drivers/media/platform/ti/omap3isp/isp.c

565

pipe->error = true;

drivers/media/platform/ti/omap3isp/isp.c

572

pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);

drivers/media/platform/ti/omap3isp/isp.c

573

if (pipe != NULL)

drivers/media/platform/ti/omap3isp/isp.c

574

pipe->error = true;

drivers/media/platform/ti/omap3isp/isp.c

671

static int isp_pipeline_enable(struct isp_pipeline *pipe,

drivers/media/platform/ti/omap3isp/isp.c

674

struct isp_device *isp = pipe->output->isp;

drivers/media/platform/ti/omap3isp/isp.c

686

if (media_entity_enum_intersects(&pipe->ent_enum, &isp->crashed))

drivers/media/platform/ti/omap3isp/isp.c

689

spin_lock_irqsave(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/isp.c

690

pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);

drivers/media/platform/ti/omap3isp/isp.c

691

spin_unlock_irqrestore(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/isp.c

693

pipe->do_propagation = false;

drivers/media/platform/ti/omap3isp/isp.c

697

entity = &pipe->output->video.entity;

drivers/media/platform/ti/omap3isp/isp.c

723

pipe->do_propagation = true;

drivers/media/platform/ti/omap3isp/isp.c

781

static int isp_pipeline_disable(struct isp_pipeline *pipe)

drivers/media/platform/ti/omap3isp/isp.c

783

struct isp_device *isp = pipe->output->isp;

drivers/media/platform/ti/omap3isp/isp.c

794

entity = &pipe->output->video.entity;

drivers/media/platform/ti/omap3isp/isp.c

866

int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,

drivers/media/platform/ti/omap3isp/isp.c

872

ret = isp_pipeline_disable(pipe);

drivers/media/platform/ti/omap3isp/isp.c

874

ret = isp_pipeline_enable(pipe, state);

drivers/media/platform/ti/omap3isp/isp.c

877

pipe->stream_state = state;

drivers/media/platform/ti/omap3isp/isp.c

891

void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)

drivers/media/platform/ti/omap3isp/isp.c

893

if (pipe->input)

drivers/media/platform/ti/omap3isp/isp.c

894

omap3isp_video_cancel_stream(pipe->input);

drivers/media/platform/ti/omap3isp/isp.c

895

if (pipe->output)

drivers/media/platform/ti/omap3isp/isp.c

896

omap3isp_video_cancel_stream(pipe->output);

drivers/media/platform/ti/omap3isp/isp.c

905

static void isp_pipeline_resume(struct isp_pipeline *pipe)

drivers/media/platform/ti/omap3isp/isp.c

907

int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;

drivers/media/platform/ti/omap3isp/isp.c

909

omap3isp_video_resume(pipe->output, !singleshot);

drivers/media/platform/ti/omap3isp/isp.c

911

omap3isp_video_resume(pipe->input, 0);

drivers/media/platform/ti/omap3isp/isp.c

912

isp_pipeline_enable(pipe, pipe->stream_state);

drivers/media/platform/ti/omap3isp/isp.c

921

static void isp_pipeline_suspend(struct isp_pipeline *pipe)

drivers/media/platform/ti/omap3isp/isp.c

923

isp_pipeline_disable(pipe);

drivers/media/platform/ti/omap3isp/isp.c

937

struct isp_pipeline *pipe;

drivers/media/platform/ti/omap3isp/isp.c

940

pipe = to_isp_pipeline(me);

drivers/media/platform/ti/omap3isp/isp.c

941

if (!pipe || pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)

drivers/media/platform/ti/omap3isp/isp.c

943

pad = media_pad_remote_pad_first(&pipe->output->pad);

drivers/media/platform/ti/omap3isp/isp.h

252

int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,

drivers/media/platform/ti/omap3isp/isp.h

254

void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe);

drivers/media/platform/ti/omap3isp/ispccdc.c

1468

struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccdc.c

1473

atomic_inc(&pipe->frame_number);

drivers/media/platform/ti/omap3isp/ispccdc.c

1477

event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);

drivers/media/platform/ti/omap3isp/ispccdc.c

1492

struct isp_pipeline *pipe =

drivers/media/platform/ti/omap3isp/ispccdc.c

1496

pipe->error = true;

drivers/media/platform/ti/omap3isp/ispccdc.c

1546

struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccdc.c

1564

pipe->field = field;

drivers/media/platform/ti/omap3isp/ispccdc.c

1590

struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccdc.c

1616

omap3isp_pipeline_cancel_stream(pipe);

drivers/media/platform/ti/omap3isp/ispccdc.c

1632

pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;

drivers/media/platform/ti/omap3isp/ispccdc.c

1635

isp_pipeline_ready(pipe))

drivers/media/platform/ti/omap3isp/ispccdc.c

1636

omap3isp_pipeline_set_stream(pipe,

drivers/media/platform/ti/omap3isp/ispccdc.c

1657

struct isp_pipeline *pipe =

drivers/media/platform/ti/omap3isp/ispccdc.c

1660

atomic_inc(&pipe->frame_number);

drivers/media/platform/ti/omap3isp/ispccdc.c

805

struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccdc.c

809

unsigned long l3_ick = pipe->l3_ick;

drivers/media/platform/ti/omap3isp/ispccdc.c

853

if (pipe->input)

drivers/media/platform/ti/omap3isp/ispccdc.c

854

div = DIV_ROUND_UP(l3_ick, pipe->max_rate);

drivers/media/platform/ti/omap3isp/ispccdc.c

855

else if (pipe->external_rate)

drivers/media/platform/ti/omap3isp/ispccdc.c

856

div = l3_ick / pipe->external_rate;

drivers/media/platform/ti/omap3isp/ispccdc.c

938

struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccdc.c

941

if (pipe == NULL)

drivers/media/platform/ti/omap3isp/ispccdc.c

949

rate = pipe->l3_ick / 2 * 9 / 10;

drivers/media/platform/ti/omap3isp/ispccdc.c

951

rate = pipe->l3_ick / 2;

drivers/media/platform/ti/omap3isp/ispccp2.c

350

struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccp2.c

362

buscfg = v4l2_subdev_to_bus_cfg(pipe->external);

drivers/media/platform/ti/omap3isp/ispccp2.c

388

struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccp2.c

391

unsigned long l3_ick = pipe->l3_ick;

drivers/media/platform/ti/omap3isp/ispccp2.c

402

vpclk_div = max_t(unsigned int, DIV_ROUND_UP(l3_ick, pipe->max_rate),

drivers/media/platform/ti/omap3isp/ispccp2.c

409

timeperframe = &pipe->max_timeperframe;

drivers/media/platform/ti/omap3isp/ispccp2.c

540

struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccp2.c

547

pipe->state |= ISP_PIPELINE_IDLE_INPUT;

drivers/media/platform/ti/omap3isp/ispccp2.c

550

if (isp_pipeline_ready(pipe))

drivers/media/platform/ti/omap3isp/ispccp2.c

551

omap3isp_pipeline_set_stream(pipe,

drivers/media/platform/ti/omap3isp/ispccp2.c

564

struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity);

drivers/media/platform/ti/omap3isp/ispccp2.c

587

pipe->error = true;

drivers/media/platform/ti/omap3isp/ispccp2.c

593

pipe->error = true;

drivers/media/platform/ti/omap3isp/ispcsi2.c

548

struct isp_pipeline *pipe = to_isp_pipeline(&csi2->subdev.entity);

drivers/media/platform/ti/omap3isp/ispcsi2.c

566

buscfg = v4l2_subdev_to_bus_cfg(pipe->external);

drivers/media/platform/ti/omap3isp/ispcsi2.c

574

clamp_t(unsigned int, pipe->l3_ick / pipe->external_rate - 1,

drivers/media/platform/ti/omap3isp/ispcsi2.c

577

__func__, pipe->l3_ick, pipe->external_rate,

drivers/media/platform/ti/omap3isp/ispcsi2.c

739

struct isp_pipeline *pipe = to_isp_pipeline(&csi2->subdev.entity);

drivers/media/platform/ti/omap3isp/ispcsi2.c

757

pipe->error = true;

drivers/media/platform/ti/omap3isp/ispcsi2.c

777

pipe->error = true;

drivers/media/platform/ti/omap3isp/ispcsiphy.c

165

struct isp_pipeline *pipe = to_isp_pipeline(phy->entity);

drivers/media/platform/ti/omap3isp/ispcsiphy.c

173

buscfg = v4l2_subdev_to_bus_cfg(pipe->external);

drivers/media/platform/ti/omap3isp/ispcsiphy.c

216

csi2_ddrclk_khz = pipe->external_rate / 1000

drivers/media/platform/ti/omap3isp/ispcsiphy.c

217

/ (2 * hweight32(used_lanes)) * pipe->external_width;

drivers/media/platform/ti/omap3isp/ispcsiphy.c

312

struct isp_pipeline *pipe = to_isp_pipeline(phy->entity);

drivers/media/platform/ti/omap3isp/ispcsiphy.c

315

buscfg = v4l2_subdev_to_bus_cfg(pipe->external);

drivers/media/platform/ti/omap3isp/isppreview.c

1164

struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);

drivers/media/platform/ti/omap3isp/isppreview.c

1167

unsigned long l3_ick = pipe->l3_ick;

drivers/media/platform/ti/omap3isp/isppreview.c

1186

cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1,

drivers/media/platform/ti/omap3isp/isppreview.c

1187

pipe->max_rate);

drivers/media/platform/ti/omap3isp/isppreview.c

1195

timeperframe = &pipe->max_timeperframe;

drivers/media/platform/ti/omap3isp/isppreview.c

1476

struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);

drivers/media/platform/ti/omap3isp/isppreview.c

1486

pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;

drivers/media/platform/ti/omap3isp/isppreview.c

1493

pipe->state |= ISP_PIPELINE_IDLE_INPUT;

drivers/media/platform/ti/omap3isp/isppreview.c

1498

if (isp_pipeline_ready(pipe))

drivers/media/platform/ti/omap3isp/isppreview.c

1499

omap3isp_pipeline_set_stream(pipe,

drivers/media/platform/ti/omap3isp/ispresizer.c

1016

struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);

drivers/media/platform/ti/omap3isp/ispresizer.c

1032

pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;

drivers/media/platform/ti/omap3isp/ispresizer.c

1038

pipe->state |= ISP_PIPELINE_IDLE_INPUT;

drivers/media/platform/ti/omap3isp/ispresizer.c

1042

if (isp_pipeline_ready(pipe))

drivers/media/platform/ti/omap3isp/ispresizer.c

1043

omap3isp_pipeline_set_stream(pipe,

drivers/media/platform/ti/omap3isp/ispresizer.c

1552

struct isp_pipeline *pipe = to_isp_pipeline(&sd->entity);

drivers/media/platform/ti/omap3isp/ispresizer.c

1554

omap3isp_resizer_max_rate(res, &pipe->max_rate);

drivers/media/platform/ti/omap3isp/ispresizer.c

502

struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);

drivers/media/platform/ti/omap3isp/ispresizer.c

504

unsigned long limit = min(pipe->l3_ick, 200000000UL);

drivers/media/platform/ti/omap3isp/ispresizer.c

543

struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);

drivers/media/platform/ti/omap3isp/ispresizer.c

545

unsigned long l3_ick = pipe->l3_ick;

drivers/media/platform/ti/omap3isp/ispresizer.c

577

cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1,

drivers/media/platform/ti/omap3isp/ispresizer.c

578

pipe->max_rate);

drivers/media/platform/ti/omap3isp/ispresizer.c

586

timeperframe = &pipe->max_timeperframe;

drivers/media/platform/ti/omap3isp/ispstat.c

856

struct isp_pipeline *pipe;

drivers/media/platform/ti/omap3isp/ispstat.c

916

pipe = to_isp_pipeline(&stat->subdev.entity);

drivers/media/platform/ti/omap3isp/ispstat.c

917

stat->frame_number = atomic_read(&pipe->frame_number);

drivers/media/platform/ti/omap3isp/ispvideo.c

1025

struct isp_pipeline *pipe)

drivers/media/platform/ti/omap3isp/ispvideo.c

1046

if (pipe->input != NULL)

drivers/media/platform/ti/omap3isp/ispvideo.c

1051

if (!media_entity_enum_test(&pipe->ent_enum, ents[i]))

drivers/media/platform/ti/omap3isp/ispvideo.c

1072

pipe->external = media_entity_to_v4l2_subdev(source);

drivers/media/platform/ti/omap3isp/ispvideo.c

1082

pipe->external_width =

drivers/media/platform/ti/omap3isp/ispvideo.c

1092

ret = v4l2_g_ext_ctrls(pipe->external->ctrl_handler, &video->video,

drivers/media/platform/ti/omap3isp/ispvideo.c

1096

pipe->external->name);

drivers/media/platform/ti/omap3isp/ispvideo.c

1100

pipe->external_rate = ctrl.value64;

drivers/media/platform/ti/omap3isp/ispvideo.c

1102

if (media_entity_enum_test(&pipe->ent_enum,

drivers/media/platform/ti/omap3isp/ispvideo.c

1110

if (pipe->external_rate > rate)

drivers/media/platform/ti/omap3isp/ispvideo.c

1154

struct isp_pipeline *pipe;

drivers/media/platform/ti/omap3isp/ispvideo.c

1166

pipe = to_isp_pipeline(&video->video.entity) ? : &video->pipe;

drivers/media/platform/ti/omap3isp/ispvideo.c

1168

ret = media_entity_enum_init(&pipe->ent_enum, &video->isp->media_dev);

drivers/media/platform/ti/omap3isp/ispvideo.c

1173

pipe->l3_ick = clk_get_rate(video->isp->clock[ISP_CLK_L3_ICK]);

drivers/media/platform/ti/omap3isp/ispvideo.c

1174

pipe->max_rate = pipe->l3_ick;

drivers/media/platform/ti/omap3isp/ispvideo.c

1176

ret = video_device_pipeline_start(&video->video, &pipe->pipe);

drivers/media/platform/ti/omap3isp/ispvideo.c

1190

ret = isp_video_get_graph_data(video, pipe);

drivers/media/platform/ti/omap3isp/ispvideo.c

1199

ret = isp_video_check_external_subdevs(video, pipe);

drivers/media/platform/ti/omap3isp/ispvideo.c

1203

pipe->error = false;

drivers/media/platform/ti/omap3isp/ispvideo.c

1205

spin_lock_irqsave(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/ispvideo.c

1206

pipe->state &= ~ISP_PIPELINE_STREAM;

drivers/media/platform/ti/omap3isp/ispvideo.c

1207

pipe->state |= state;

drivers/media/platform/ti/omap3isp/ispvideo.c

1208

spin_unlock_irqrestore(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/ispvideo.c

1215

pipe->max_timeperframe = vfh->timeperframe;

drivers/media/platform/ti/omap3isp/ispvideo.c

1219

atomic_set(&pipe->frame_number, -1);

drivers/media/platform/ti/omap3isp/ispvideo.c

1220

pipe->field = vfh->format.fmt.pix.field;

drivers/media/platform/ti/omap3isp/ispvideo.c

1246

media_entity_enum_cleanup(&pipe->ent_enum);

drivers/media/platform/ti/omap3isp/ispvideo.c

1259

struct isp_pipeline *pipe = to_isp_pipeline(&video->video.entity);

drivers/media/platform/ti/omap3isp/ispvideo.c

1285

spin_lock_irqsave(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/ispvideo.c

1286

pipe->state &= ~state;

drivers/media/platform/ti/omap3isp/ispvideo.c

1287

spin_unlock_irqrestore(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/ispvideo.c

1290

omap3isp_pipeline_set_stream(pipe, ISP_PIPELINE_STREAM_STOPPED);

drivers/media/platform/ti/omap3isp/ispvideo.c

1302

media_entity_enum_cleanup(&pipe->ent_enum);

drivers/media/platform/ti/omap3isp/ispvideo.c

1524

spin_lock_init(&video->pipe.lock);

drivers/media/platform/ti/omap3isp/ispvideo.c

1549

video->pipe.stream_state = ISP_PIPELINE_STREAM_STOPPED;

drivers/media/platform/ti/omap3isp/ispvideo.c

226

struct isp_pipeline *pipe)

drivers/media/platform/ti/omap3isp/ispvideo.c

233

ret = media_pipeline_entity_iter_init(&pipe->pipe, &iter);

drivers/media/platform/ti/omap3isp/ispvideo.c

237

media_pipeline_for_each_entity(&pipe->pipe, &iter, entity) {

drivers/media/platform/ti/omap3isp/ispvideo.c

240

media_entity_enum_set(&pipe->ent_enum, entity);

drivers/media/platform/ti/omap3isp/ispvideo.c

259

pipe->input = far_end;

drivers/media/platform/ti/omap3isp/ispvideo.c

260

pipe->output = video;

drivers/media/platform/ti/omap3isp/ispvideo.c

265

pipe->input = video;

drivers/media/platform/ti/omap3isp/ispvideo.c

266

pipe->output = far_end;

drivers/media/platform/ti/omap3isp/ispvideo.c

402

struct isp_pipeline *pipe = to_isp_pipeline(&video->video.entity);

drivers/media/platform/ti/omap3isp/ispvideo.c

427

spin_lock_irqsave(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/ispvideo.c

428

pipe->state |= state;

drivers/media/platform/ti/omap3isp/ispvideo.c

432

start = isp_pipeline_ready(pipe);

drivers/media/platform/ti/omap3isp/ispvideo.c

434

pipe->state |= ISP_PIPELINE_STREAM;

drivers/media/platform/ti/omap3isp/ispvideo.c

435

spin_unlock_irqrestore(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/ispvideo.c

438

omap3isp_pipeline_set_stream(pipe,

drivers/media/platform/ti/omap3isp/ispvideo.c

472

struct isp_pipeline *pipe = to_isp_pipeline(&video->video.entity);

drivers/media/platform/ti/omap3isp/ispvideo.c

480

if (pipe->input)

drivers/media/platform/ti/omap3isp/ispvideo.c

483

ret = omap3isp_pipeline_set_stream(pipe,

drivers/media/platform/ti/omap3isp/ispvideo.c

525

struct isp_pipeline *pipe = to_isp_pipeline(&video->video.entity);

drivers/media/platform/ti/omap3isp/ispvideo.c

549

if (video == pipe->output && !pipe->do_propagation)

drivers/media/platform/ti/omap3isp/ispvideo.c

551

atomic_inc_return(&pipe->frame_number);

drivers/media/platform/ti/omap3isp/ispvideo.c

553

buf->vb.sequence = atomic_read(&pipe->frame_number);

drivers/media/platform/ti/omap3isp/ispvideo.c

555

if (pipe->field != V4L2_FIELD_NONE)

drivers/media/platform/ti/omap3isp/ispvideo.c

558

buf->vb.field = pipe->field;

drivers/media/platform/ti/omap3isp/ispvideo.c

561

if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE && pipe->error) {

drivers/media/platform/ti/omap3isp/ispvideo.c

563

pipe->error = false;

drivers/media/platform/ti/omap3isp/ispvideo.c

584

spin_lock_irqsave(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/ispvideo.c

585

pipe->state &= ~state;

drivers/media/platform/ti/omap3isp/ispvideo.c

586

if (video->pipe.stream_state == ISP_PIPELINE_STREAM_CONTINUOUS)

drivers/media/platform/ti/omap3isp/ispvideo.c

588

spin_unlock_irqrestore(&pipe->lock, flags);

drivers/media/platform/ti/omap3isp/ispvideo.c

592

if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE && pipe->input != NULL) {

drivers/media/platform/ti/omap3isp/ispvideo.c

593

spin_lock(&pipe->lock);

drivers/media/platform/ti/omap3isp/ispvideo.c

594

pipe->state &= ~ISP_PIPELINE_STREAM;

drivers/media/platform/ti/omap3isp/ispvideo.c

595

spin_unlock(&pipe->lock);

drivers/media/platform/ti/omap3isp/ispvideo.h

104

struct media_pipeline *pipe = media_entity_pipeline(entity);

drivers/media/platform/ti/omap3isp/ispvideo.h

106

if (!pipe)

drivers/media/platform/ti/omap3isp/ispvideo.h

109

return container_of(pipe, struct isp_pipeline, pipe);

drivers/media/platform/ti/omap3isp/ispvideo.h

112

static inline int isp_pipeline_ready(struct isp_pipeline *pipe)

drivers/media/platform/ti/omap3isp/ispvideo.h

114

return pipe->state == (ISP_PIPELINE_STREAM_INPUT |

drivers/media/platform/ti/omap3isp/ispvideo.h

173

struct isp_pipeline pipe;

drivers/media/platform/ti/omap3isp/ispvideo.h

83

struct media_pipeline pipe;

drivers/media/platform/xilinx/xilinx-dma.c

151

static int xvip_pipeline_set_stream(struct xvip_pipeline *pipe, bool on)

drivers/media/platform/xilinx/xilinx-dma.c

155

mutex_lock(&pipe->lock);

drivers/media/platform/xilinx/xilinx-dma.c

158

if (pipe->stream_count == pipe->num_dmas - 1) {

drivers/media/platform/xilinx/xilinx-dma.c

159

ret = xvip_pipeline_start_stop(pipe, true);

drivers/media/platform/xilinx/xilinx-dma.c

163

pipe->stream_count++;

drivers/media/platform/xilinx/xilinx-dma.c

165

if (--pipe->stream_count == 0)

drivers/media/platform/xilinx/xilinx-dma.c

166

xvip_pipeline_start_stop(pipe, false);

drivers/media/platform/xilinx/xilinx-dma.c

170

mutex_unlock(&pipe->lock);

drivers/media/platform/xilinx/xilinx-dma.c

174

static int xvip_pipeline_validate(struct xvip_pipeline *pipe,

drivers/media/platform/xilinx/xilinx-dma.c

183

media_pipeline_for_each_pad(&pipe->pipe, &iter, pad) {

drivers/media/platform/xilinx/xilinx-dma.c

192

pipe->output = dma;

drivers/media/platform/xilinx/xilinx-dma.c

203

pipe->num_dmas = num_inputs + num_outputs;

drivers/media/platform/xilinx/xilinx-dma.c

208

static void __xvip_pipeline_cleanup(struct xvip_pipeline *pipe)

drivers/media/platform/xilinx/xilinx-dma.c

210

pipe->num_dmas = 0;

drivers/media/platform/xilinx/xilinx-dma.c

211

pipe->output = NULL;

drivers/media/platform/xilinx/xilinx-dma.c

220

static void xvip_pipeline_cleanup(struct xvip_pipeline *pipe)

drivers/media/platform/xilinx/xilinx-dma.c

222

mutex_lock(&pipe->lock);

drivers/media/platform/xilinx/xilinx-dma.c

225

if (--pipe->use_count == 0)

drivers/media/platform/xilinx/xilinx-dma.c

226

__xvip_pipeline_cleanup(pipe);

drivers/media/platform/xilinx/xilinx-dma.c

228

mutex_unlock(&pipe->lock);

drivers/media/platform/xilinx/xilinx-dma.c

241

static int xvip_pipeline_prepare(struct xvip_pipeline *pipe,

drivers/media/platform/xilinx/xilinx-dma.c

246

mutex_lock(&pipe->lock);

drivers/media/platform/xilinx/xilinx-dma.c

249

if (pipe->use_count == 0) {

drivers/media/platform/xilinx/xilinx-dma.c

250

ret = xvip_pipeline_validate(pipe, dma);

drivers/media/platform/xilinx/xilinx-dma.c

252

__xvip_pipeline_cleanup(pipe);

drivers/media/platform/xilinx/xilinx-dma.c

257

pipe->use_count++;

drivers/media/platform/xilinx/xilinx-dma.c

261

mutex_unlock(&pipe->lock);

drivers/media/platform/xilinx/xilinx-dma.c

378

struct xvip_pipeline *pipe;

drivers/media/platform/xilinx/xilinx-dma.c

390

pipe = to_xvip_pipeline(&dma->video) ? : &dma->pipe;

drivers/media/platform/xilinx/xilinx-dma.c

392

ret = video_device_pipeline_start(&dma->video, &pipe->pipe);

drivers/media/platform/xilinx/xilinx-dma.c

403

ret = xvip_pipeline_prepare(pipe, dma);

drivers/media/platform/xilinx/xilinx-dma.c

413

xvip_pipeline_set_stream(pipe, true);

drivers/media/platform/xilinx/xilinx-dma.c

435

struct xvip_pipeline *pipe = to_xvip_pipeline(&dma->video);

drivers/media/platform/xilinx/xilinx-dma.c

439

xvip_pipeline_set_stream(pipe, false);

drivers/media/platform/xilinx/xilinx-dma.c

445

xvip_pipeline_cleanup(pipe);

drivers/media/platform/xilinx/xilinx-dma.c

638

mutex_init(&dma->pipe.lock);

drivers/media/platform/xilinx/xilinx-dma.c

740

mutex_destroy(&dma->pipe.lock);

drivers/media/platform/xilinx/xilinx-dma.c

97

static int xvip_pipeline_start_stop(struct xvip_pipeline *pipe, bool start)

drivers/media/platform/xilinx/xilinx-dma.c

99

struct xvip_dma *dma = pipe->output;

drivers/media/platform/xilinx/xilinx-dma.h

38

struct media_pipeline pipe;

drivers/media/platform/xilinx/xilinx-dma.h

50

struct media_pipeline *pipe = video_device_pipeline(vdev);

drivers/media/platform/xilinx/xilinx-dma.h

52

if (!pipe)

drivers/media/platform/xilinx/xilinx-dma.h

55

return container_of(pipe, struct xvip_pipeline, pipe);

drivers/media/platform/xilinx/xilinx-dma.h

84

struct xvip_pipeline pipe;

drivers/media/rc/ati_remote.c

768

int pipe, maxp;

drivers/media/rc/ati_remote.c

773

pipe = usb_rcvintpipe(udev, ati_remote->endpoint_in->bEndpointAddress);

drivers/media/rc/ati_remote.c

774

maxp = usb_maxpacket(udev, pipe);

drivers/media/rc/ati_remote.c

777

usb_fill_int_urb(ati_remote->irq_urb, udev, pipe, ati_remote->inbuf,

drivers/media/rc/ati_remote.c

784

pipe = usb_sndintpipe(udev, ati_remote->endpoint_out->bEndpointAddress);

drivers/media/rc/ati_remote.c

785

maxp = usb_maxpacket(udev, pipe);

drivers/media/rc/ati_remote.c

788

usb_fill_int_urb(ati_remote->out_urb, udev, pipe, ati_remote->outbuf,

drivers/media/rc/imon.c

592

unsigned int pipe;

drivers/media/rc/imon.c

605

pipe = usb_sndintpipe(ictx->usbdev_intf0,

drivers/media/rc/imon.c

609

usb_fill_int_urb(ictx->tx_urb, ictx->usbdev_intf0, pipe,

drivers/media/rc/imon.c

629

pipe = usb_sndctrlpipe(ictx->usbdev_intf0, 0);

drivers/media/rc/imon.c

633

pipe, (unsigned char *)control_req,

drivers/media/rc/ir_toy.c

402

int i, pipe, err = -ENOMEM;

drivers/media/rc/ir_toy.c

441

pipe = usb_rcvbulkpipe(usbdev, ep_in->bEndpointAddress);

drivers/media/rc/ir_toy.c

442

usb_fill_bulk_urb(urb, usbdev, pipe, irtoy->in, MAX_PACKET,

drivers/media/rc/ir_toy.c

450

pipe = usb_sndbulkpipe(usbdev, ep_out->bEndpointAddress);

drivers/media/rc/ir_toy.c

451

usb_fill_bulk_urb(urb, usbdev, pipe, irtoy->out, MAX_PACKET,

drivers/media/rc/mceusb.c

1660

int pipe, maxp, i, res;

drivers/media/rc/mceusb.c

1713

pipe = usb_rcvintpipe(dev, ep_in->bEndpointAddress);

drivers/media/rc/mceusb.c

1715

pipe = usb_rcvbulkpipe(dev, ep_in->bEndpointAddress);

drivers/media/rc/mceusb.c

1716

maxp = usb_maxpacket(dev, pipe);

drivers/media/rc/mceusb.c

1722

ir->pipe_in = pipe;

drivers/media/rc/mceusb.c

1772

usb_fill_int_urb(ir->urb_in, dev, pipe, ir->buf_in, maxp,

drivers/media/rc/mceusb.c

1775

usb_fill_bulk_urb(ir->urb_in, dev, pipe, ir->buf_in, maxp,

drivers/media/rc/redrat3.c

1047

pipe = usb_rcvbulkpipe(udev, ep_narrow->bEndpointAddress);

drivers/media/rc/redrat3.c

1048

usb_fill_bulk_urb(rr3->narrow_urb, udev, pipe, rr3->bulk_in_buf,

drivers/media/rc/redrat3.c

1054

pipe = usb_rcvbulkpipe(udev, ep_wide->bEndpointAddress);

drivers/media/rc/redrat3.c

1055

usb_fill_bulk_urb(rr3->wide_urb, udev, pipe, rr3->bulk_in_buf,

drivers/media/rc/redrat3.c

473

int len, ret, pipe;

drivers/media/rc/redrat3.c

480

pipe = usb_rcvctrlpipe(rr3->udev, 0);

drivers/media/rc/redrat3.c

481

ret = usb_control_msg(rr3->udev, pipe, RR3_GET_IR_PARAM,

drivers/media/rc/redrat3.c

755

int lencheck, cur_sample_len, pipe;

drivers/media/rc/redrat3.c

824

pipe = usb_sndbulkpipe(rr3->udev, rr3->ep_out->bEndpointAddress);

drivers/media/rc/redrat3.c

825

ret = usb_bulk_msg(rr3->udev, pipe, irdata,

drivers/media/rc/redrat3.c

830

pipe = usb_rcvctrlpipe(rr3->udev, 0);

drivers/media/rc/redrat3.c

831

ret = usb_control_msg(rr3->udev, pipe, RR3_TX_SEND_SIGNAL,

drivers/media/rc/redrat3.c

983

int pipe, i;

drivers/media/rc/streamzap.c

285

int pipe, maxp;

drivers/media/rc/streamzap.c

317

pipe = usb_rcvintpipe(usbdev, endpoint->bEndpointAddress);

drivers/media/rc/streamzap.c

318

maxp = usb_maxpacket(usbdev, pipe);

drivers/media/rc/streamzap.c

354

usb_fill_int_urb(sz->urb_in, usbdev, pipe, sz->buf_in,

drivers/media/rc/ttusbir.c

249

urb->pipe = usb_rcvisocpipe(tt->udev, tt->iso_in_endp);

drivers/media/rc/xbox_remote.c

170

int pipe, maxp;

drivers/media/rc/xbox_remote.c

173

pipe = usb_rcvintpipe(udev, endpoint_in->bEndpointAddress);

drivers/media/rc/xbox_remote.c

174

maxp = usb_maxpacket(udev, pipe);

drivers/media/rc/xbox_remote.c

177

usb_fill_int_urb(xbox_remote->irq_urb, udev, pipe, xbox_remote->inbuf,

drivers/media/test-drivers/vimc/vimc-capture.c

248

ret = video_device_pipeline_start(&vcapture->vdev, &vcapture->stream.pipe);

drivers/media/test-drivers/vimc/vimc-streamer.h

35

struct media_pipeline pipe;

drivers/media/usb/airspy/airspy.c

164

unsigned int pipe;

drivers/media/usb/airspy/airspy.c

170

pipe = usb_sndctrlpipe(s->udev, 0);

drivers/media/usb/airspy/airspy.c

181

pipe = usb_rcvctrlpipe(s->udev, 0);

drivers/media/usb/airspy/airspy.c

194

ret = usb_control_msg(s->udev, pipe, request, requesttype, value,

drivers/media/usb/au0828/au0828-core.c

289

struct media_pipeline *pipe)

drivers/media/usb/au0828/au0828-core.c

378

dev->active_link_user_pipe = pipe;

drivers/media/usb/au0828/au0828-core.c

413

ret = __media_pipeline_start(entity->pads, pipe);

drivers/media/usb/au0828/au0828-dvb.c

111

int ptype = usb_pipetype(purb->pipe);

drivers/media/usb/au0828/au0828-video.c

201

int sb_size, pipe;

drivers/media/usb/au0828/au0828-video.c

249

pipe = usb_rcvisocpipe(dev->usbdev,

drivers/media/usb/au0828/au0828-video.c

252

usb_fill_int_urb(urb, dev->usbdev, pipe,

drivers/media/usb/b2c2/flexcop-usb.c

114

int nWaitTime, pipe, ret;

drivers/media/usb/b2c2/flexcop-usb.c

126

pipe = B2C2_USB_CTRL_PIPE_IN;

drivers/media/usb/b2c2/flexcop-usb.c

132

pipe = B2C2_USB_CTRL_PIPE_OUT;

drivers/media/usb/b2c2/flexcop-usb.c

137

pipe = B2C2_USB_CTRL_PIPE_OUT;

drivers/media/usb/b2c2/flexcop-usb.c

151

ret = usb_control_msg(fc_usb->udev, pipe,

drivers/media/usb/b2c2/flexcop-usb.c

234

int nWaitTime, pipe, ret;

drivers/media/usb/b2c2/flexcop-usb.c

248

pipe = B2C2_USB_CTRL_PIPE_OUT;

drivers/media/usb/b2c2/flexcop-usb.c

254

pipe = B2C2_USB_CTRL_PIPE_IN;

drivers/media/usb/b2c2/flexcop-usb.c

275

ret = usb_control_msg(fc_usb->udev, pipe,

drivers/media/usb/b2c2/flexcop-usb.c

466

urb->pipe = B2C2_USB_DATA_PIPE;

drivers/media/usb/cx231xx/cx231xx-audio.c

291

urb->pipe = usb_rcvisocpipe(dev->udev,

drivers/media/usb/cx231xx/cx231xx-audio.c

352

urb->pipe = usb_rcvbulkpipe(dev->udev,

drivers/media/usb/cx231xx/cx231xx-core.c

1072

pipe =

drivers/media/usb/cx231xx/cx231xx-core.c

1075

usb_fill_int_urb(urb, dev->udev, pipe,

drivers/media/usb/cx231xx/cx231xx-core.c

1124

int sb_size, pipe;

drivers/media/usb/cx231xx/cx231xx-core.c

1207

pipe = usb_rcvbulkpipe(dev->udev,

drivers/media/usb/cx231xx/cx231xx-core.c

1209

usb_fill_bulk_urb(urb, dev->udev, pipe,

drivers/media/usb/cx231xx/cx231xx-core.c

1215

rc = usb_clear_halt(dev->udev, dev->video_mode.bulk_ctl.urb[0]->pipe);

drivers/media/usb/cx231xx/cx231xx-core.c

221

static int __usb_control_msg(struct cx231xx *dev, unsigned int pipe,

drivers/media/usb/cx231xx/cx231xx-core.c

230

pipe,

drivers/media/usb/cx231xx/cx231xx-core.c

249

rc = usb_control_msg(dev->udev, pipe, request, requesttype, value,

drivers/media/usb/cx231xx/cx231xx-core.c

283

int pipe = usb_rcvctrlpipe(dev->udev, 0);

drivers/media/usb/cx231xx/cx231xx-core.c

311

ret = __usb_control_msg(dev, pipe, req,

drivers/media/usb/cx231xx/cx231xx-core.c

321

int pipe = 0;

drivers/media/usb/cx231xx/cx231xx-core.c

332

pipe = usb_rcvctrlpipe(dev->udev, 0);

drivers/media/usb/cx231xx/cx231xx-core.c

334

pipe = usb_sndctrlpipe(dev->udev, 0);

drivers/media/usb/cx231xx/cx231xx-core.c

357

ret = __usb_control_msg(dev, pipe, ven_req->bRequest,

drivers/media/usb/cx231xx/cx231xx-core.c

367

ret = __usb_control_msg(dev, pipe,

drivers/media/usb/cx231xx/cx231xx-core.c

378

ret = __usb_control_msg(dev, pipe, ven_req->bRequest,

drivers/media/usb/cx231xx/cx231xx-core.c

383

ret = __usb_control_msg(dev, pipe, ven_req->bRequest,

drivers/media/usb/cx231xx/cx231xx-core.c

401

int pipe = usb_sndctrlpipe(dev->udev, 0);

drivers/media/usb/cx231xx/cx231xx-core.c

433

pipe,

drivers/media/usb/cx231xx/cx231xx-core.c

443

ret = __usb_control_msg(dev, pipe, req,

drivers/media/usb/cx231xx/cx231xx-core.c

988

int sb_size, pipe;

drivers/media/usb/cx231xx/cx231xx-vbi.c

345

int sb_size, pipe;

drivers/media/usb/cx231xx/cx231xx-vbi.c

415

pipe = usb_rcvbulkpipe(dev->udev, dev->vbi_mode.end_point_addr);

drivers/media/usb/cx231xx/cx231xx-vbi.c

416

usb_fill_bulk_urb(urb, dev->udev, pipe,

drivers/media/usb/dvb-usb-v2/ce6230.c

15

unsigned int pipe;

drivers/media/usb/dvb-usb-v2/ce6230.c

53

pipe = usb_sndctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/ce6230.c

56

pipe = usb_rcvctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/ce6230.c

61

ret = usb_control_msg(d->udev, pipe, request, requesttype, value, index,

drivers/media/usb/dvb-usb-v2/ec168.c

17

unsigned int pipe;

drivers/media/usb/dvb-usb-v2/ec168.c

65

pipe = usb_sndctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/ec168.c

68

pipe = usb_rcvctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/ec168.c

73

ret = usb_control_msg(d->udev, pipe, request, requesttype, req->value,

drivers/media/usb/dvb-usb-v2/gl861.c

36

unsigned int pipe;

drivers/media/usb/dvb-usb-v2/gl861.c

46

pipe = usb_sndctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/gl861.c

50

pipe = usb_rcvctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/gl861.c

58

ret = usb_control_msg(d->udev, pipe, request, requesttype, value,

drivers/media/usb/dvb-usb-v2/lmedm04.c

393

ep = usb_pipe_endpoint(d->udev, lme_int->lme_urb->pipe);

drivers/media/usb/dvb-usb-v2/lmedm04.c

400

lme_int->lme_urb->pipe = usb_rcvbulkpipe(d->udev, 0xa);

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

21

unsigned int pipe;

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

36

pipe = usb_sndctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

47

pipe = usb_rcvctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

49

pipe = usb_sndctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

52

ret = usb_control_msg(d->udev, pipe, 0, requesttype, req->value,

drivers/media/usb/dvb-usb-v2/usb_urb.c

186

urb->pipe = usb_rcvisocpipe(stream->udev,

drivers/media/usb/dvb-usb-v2/usb_urb.c

22

int ptype = usb_pipetype(urb->pipe);

drivers/media/usb/dvb-usb/cxusb-analog.c

840

surb->pipe = usb_rcvisocpipe(dvbdev->udev, 2);

drivers/media/usb/dvb-usb/dib0700_core.c

813

unsigned int pipe = 0;

drivers/media/usb/dvb-usb/dib0700_core.c

844

pipe = usb_rcvbulkpipe(d->udev, rc_ep);

drivers/media/usb/dvb-usb/dib0700_core.c

845

usb_fill_bulk_urb(purb, d->udev, pipe,

drivers/media/usb/dvb-usb/dib0700_core.c

851

pipe = usb_rcvintpipe(d->udev, rc_ep);

drivers/media/usb/dvb-usb/dib0700_core.c

852

usb_fill_int_urb(purb, d->udev, pipe,

drivers/media/usb/dvb-usb/dib0700_core.c

859

if (!pipe) {

drivers/media/usb/dvb-usb/dtv5100.c

29

unsigned int pipe;

drivers/media/usb/dvb-usb/dtv5100.c

38

pipe = usb_rcvctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb/dtv5100.c

46

pipe = usb_sndctrlpipe(d->udev, 0);

drivers/media/usb/dvb-usb/dtv5100.c

65

return usb_control_msg(d->udev, pipe, request,

drivers/media/usb/dvb-usb/dw2102.c

103

ret = usb_control_msg(dev, pipe, request, request_type | USB_TYPE_VENDOR,

drivers/media/usb/dvb-usb/dw2102.c

93

unsigned int pipe = (flags == DW210X_READ_MSG) ?

drivers/media/usb/dvb-usb/opera1.c

51

unsigned int pipe = (flags == OPERA_READ_MSG) ?

drivers/media/usb/dvb-usb/opera1.c

61

ret = usb_control_msg(dev, pipe, request,

drivers/media/usb/dvb-usb/usb-urb.c

18

int ptype = usb_pipetype(urb->pipe);

drivers/media/usb/dvb-usb/usb-urb.c

194

urb->pipe = usb_rcvisocpipe(stream->udev,stream->props.endpoint);

drivers/media/usb/em28xx/em28xx-audio.c

785

urb->pipe = usb_rcvisocpipe(udev, EM28XX_EP_AUDIO);

drivers/media/usb/em28xx/em28xx-core.c

100

pipe, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,

drivers/media/usb/em28xx/em28xx-core.c

1029

rc = usb_clear_halt(udev, usb_bufs->urb[0]->pipe);

drivers/media/usb/em28xx/em28xx-core.c

139

int pipe = usb_sndctrlpipe(udev, 0);

drivers/media/usb/em28xx/em28xx-core.c

149

ret = usb_control_msg(udev, pipe, req,

drivers/media/usb/em28xx/em28xx-core.c

156

pipe,

drivers/media/usb/em28xx/em28xx-core.c

165

pipe,

drivers/media/usb/em28xx/em28xx-core.c

71

int pipe = usb_rcvctrlpipe(udev, 0);

drivers/media/usb/em28xx/em28xx-core.c

80

ret = usb_control_msg(udev, pipe, req,

drivers/media/usb/em28xx/em28xx-core.c

85

pipe,

drivers/media/usb/em28xx/em28xx-core.c

884

int sb_size, pipe;

drivers/media/usb/em28xx/em28xx-core.c

962

pipe = usb_rcvbulkpipe(udev,

drivers/media/usb/em28xx/em28xx-core.c

966

usb_fill_bulk_urb(urb, udev, pipe, usb_bufs->buf[i],

drivers/media/usb/em28xx/em28xx-core.c

969

pipe = usb_rcvisocpipe(udev,

drivers/media/usb/em28xx/em28xx-core.c

973

usb_fill_int_urb(urb, udev, pipe, usb_bufs->buf[i],

drivers/media/usb/em28xx/em28xx-dvb.c

157

xfer_bulk = usb_pipebulk(urb->pipe);

drivers/media/usb/em28xx/em28xx-video.c

794

xfer_bulk = usb_pipebulk(urb->pipe);

drivers/media/usb/go7007/go7007-usb.c

882

int transferred, pipe;

drivers/media/usb/go7007/go7007-usb.c

888

pipe = usb_sndbulkpipe(usb->usbdev, 2);

drivers/media/usb/go7007/go7007-usb.c

890

pipe = usb_sndbulkpipe(usb->usbdev, 3);

drivers/media/usb/go7007/go7007-usb.c

892

return usb_bulk_msg(usb->usbdev, pipe, data, len,

drivers/media/usb/gspca/benq.c

100

urb->pipe = usb_rcvisocpipe(gspca_dev->dev,

drivers/media/usb/gspca/cpia1.c

402

unsigned int pipe;

drivers/media/usb/gspca/cpia1.c

408

pipe = usb_rcvctrlpipe(gspca_dev->dev, 0);

drivers/media/usb/gspca/cpia1.c

411

pipe = usb_sndctrlpipe(gspca_dev->dev, 0);

drivers/media/usb/gspca/cpia1.c

420

ret = usb_control_msg(gspca_dev->dev, pipe,

drivers/media/usb/gspca/finepix.c

109

urb->pipe,

drivers/media/usb/gspca/finepix.c

196

gspca_dev->urb[0]->pipe,

drivers/media/usb/gspca/finepix.c

213

usb_clear_halt(gspca_dev->dev, gspca_dev->urb[0]->pipe);

drivers/media/usb/gspca/gspca.c

715

urb->pipe = usb_rcvisocpipe(gspca_dev->dev,

drivers/media/usb/gspca/gspca.c

727

urb->pipe = usb_rcvbulkpipe(gspca_dev->dev,

drivers/media/usb/gspca/gspca.c

839

gspca_dev->urb[0]->pipe);

drivers/media/usb/gspca/jeilinj.c

336

gspca_dev->urb[0]->pipe,

drivers/media/usb/gspca/konica.c

221

urb->pipe = usb_rcvisocpipe(gspca_dev->dev,

drivers/media/usb/gspca/stv0680.c

40

unsigned int pipe = 0;

drivers/media/usb/gspca/stv0680.c

45

pipe = usb_rcvctrlpipe(gspca_dev->dev, 0);

drivers/media/usb/gspca/stv0680.c

49

pipe = usb_sndctrlpipe(gspca_dev->dev, 0);

drivers/media/usb/gspca/stv0680.c

53

pipe = usb_rcvctrlpipe(gspca_dev->dev, 0);

drivers/media/usb/gspca/stv0680.c

57

pipe = usb_sndctrlpipe(gspca_dev->dev, 0);

drivers/media/usb/gspca/stv0680.c

61

ret = usb_control_msg(gspca_dev->dev, pipe,

drivers/media/usb/gspca/xirlink_cit.c

1416

usb_clear_halt(gspca_dev->dev, gspca_dev->urb[0]->pipe);

drivers/media/usb/gspca/xirlink_cit.c

1422

usb_clear_halt(gspca_dev->dev, gspca_dev->urb[0]->pipe);

drivers/media/usb/hackrf/hackrf.c

186

unsigned int pipe;

drivers/media/usb/hackrf/hackrf.c

195

pipe = usb_sndctrlpipe(dev->udev, 0);

drivers/media/usb/hackrf/hackrf.c

203

pipe = usb_rcvctrlpipe(dev->udev, 0);

drivers/media/usb/hackrf/hackrf.c

216

ret = usb_control_msg(dev->udev, pipe, request, requesttype, value,

drivers/media/usb/hackrf/hackrf.c

669

unsigned int pipe;

drivers/media/usb/hackrf/hackrf.c

673

pipe = usb_rcvbulkpipe(dev->udev, 0x81);

drivers/media/usb/hackrf/hackrf.c

676

pipe = usb_sndbulkpipe(dev->udev, 0x02);

drivers/media/usb/hackrf/hackrf.c

691

pipe,

drivers/media/usb/msi2500/msi2500.c

504

urb->pipe = usb_rcvisocpipe(dev->udev, 0x81);

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

1410

unsigned int pipe;

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

1436

pipe = usb_sndctrlpipe(hdw->usb_dev, 0);

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

1469

ret += usb_control_msg(hdw->usb_dev, pipe, 0xa0, 0x40, address,

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

1504

unsigned int pipe, fw_len, fw_done, bcnt, icnt;

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

1585

pipe = usb_sndbulkpipe(hdw->usb_dev, PVR2_FIRMWARE_ENDPOINT);

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

1607

ret |= usb_bulk_msg(hdw->usb_dev, pipe, fw_ptr,bcnt,

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

3400

unsigned int pipe;

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

3439

pipe = usb_rcvctrlpipe(hdw->usb_dev, 0);

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

3442

ret = usb_control_msg(hdw->usb_dev,pipe,

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

3972

unsigned int pipe;

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

3991

pipe = usb_sndctrlpipe(hdw->usb_dev, 0);

drivers/media/usb/pvrusb2/pvrusb2-hdw.c

3992

ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0x40,0xe600,0,da,1,1000);

drivers/media/usb/pwc/pwc-if.c

464

urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint);

drivers/media/usb/s2255/s2255drv.c

1970

struct s2255_pipeinfo *pipe = &dev->pipe;

drivers/media/usb/s2255/s2255drv.c

1972

memset(pipe, 0, sizeof(*pipe));

drivers/media/usb/s2255/s2255drv.c

1973

pipe->dev = dev;

drivers/media/usb/s2255/s2255drv.c

1974

pipe->cur_transfer_size = S2255_USB_XFER_SIZE;

drivers/media/usb/s2255/s2255drv.c

1975

pipe->max_transfer_size = S2255_USB_XFER_SIZE;

drivers/media/usb/s2255/s2255drv.c

1977

pipe->transfer_buffer = kzalloc(pipe->max_transfer_size,

drivers/media/usb/s2255/s2255drv.c

1979

if (pipe->transfer_buffer == NULL) {

drivers/media/usb/s2255/s2255drv.c

2028

kfree(dev->pipe.transfer_buffer);

drivers/media/usb/s2255/s2255drv.c

2037

int pipe;

drivers/media/usb/s2255/s2255drv.c

2068

pipe = usb_rcvbulkpipe(dev->udev, dev->read_endpoint);

drivers/media/usb/s2255/s2255drv.c

2071

pipe,

drivers/media/usb/s2255/s2255drv.c

2087

int pipe;

drivers/media/usb/s2255/s2255drv.c

2089

struct s2255_pipeinfo *pipe_info = &dev->pipe;

drivers/media/usb/s2255/s2255drv.c

2090

pipe = usb_rcvbulkpipe(dev->udev, dev->read_endpoint);

drivers/media/usb/s2255/s2255drv.c

2099

pipe,

drivers/media/usb/s2255/s2255drv.c

2168

struct s2255_pipeinfo *pipe = &dev->pipe;

drivers/media/usb/s2255/s2255drv.c

2170

pipe->state = 0;

drivers/media/usb/s2255/s2255drv.c

2171

if (pipe->stream_urb) {

drivers/media/usb/s2255/s2255drv.c

2173

usb_kill_urb(pipe->stream_urb);

drivers/media/usb/s2255/s2255drv.c

2174

usb_free_urb(pipe->stream_urb);

drivers/media/usb/s2255/s2255drv.c

2175

pipe->stream_urb = NULL;

drivers/media/usb/s2255/s2255drv.c

259

struct s2255_pipeinfo pipe;

drivers/media/usb/s2255/s2255drv.c

887

int pipe;

drivers/media/usb/s2255/s2255drv.c

891

pipe = usb_sndbulkpipe(udev, S2255_CONFIG_EP);

drivers/media/usb/s2255/s2255drv.c

892

retval = usb_bulk_msg(udev, pipe, pbuf, size, &done, 500);

drivers/media/usb/stk1160/stk1160-core.c

58

int pipe = usb_rcvctrlpipe(dev->udev, 0);

drivers/media/usb/stk1160/stk1160-core.c

66

ret = usb_control_msg(dev->udev, pipe, 0x00,

drivers/media/usb/stk1160/stk1160-core.c

84

int pipe = usb_sndctrlpipe(dev->udev, 0);

drivers/media/usb/stk1160/stk1160-core.c

86

ret = usb_control_msg(dev->udev, pipe, 0x01,

drivers/media/usb/stk1160/stk1160-video.c

476

urb->pipe = usb_rcvisocpipe(dev->udev, STK1160_EP_VIDEO);

drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c

812

urb->pipe = ttusb->isoc_in_pipe;

drivers/media/usb/ttusb-dec/ttusb_dec.c

852

urb->pipe = dec->in_pipe;

drivers/media/usb/usbtv/usbtv-audio.c

174

unsigned int pipe;

drivers/media/usb/usbtv/usbtv-audio.c

204

pipe = usb_rcvbulkpipe(chip->udev, USBTV_AUDIO_ENDP);

drivers/media/usb/usbtv/usbtv-audio.c

211

usb_fill_bulk_urb(chip->snd_bulk_urb, chip->udev, pipe,

drivers/media/usb/usbtv/usbtv-audio.c

218

usb_clear_halt(chip->udev, pipe);

drivers/media/usb/usbtv/usbtv-core.c

50

int pipe = usb_sndctrlpipe(usbtv->udev, 0);

drivers/media/usb/usbtv/usbtv-core.c

57

ret = usb_control_msg(usbtv->udev, pipe, USBTV_REQUEST_REG,

drivers/media/usb/usbtv/usbtv-video.c

514

ip->pipe = usb_rcvisocpipe(usbtv->udev, USBTV_VIDEO_ENDP);

drivers/media/usb/uvc/uvc_status.c

258

unsigned int pipe;

drivers/media/usb/uvc/uvc_status.c

277

pipe = usb_rcvintpipe(dev->udev, ep->desc.bEndpointAddress);

drivers/media/usb/uvc/uvc_status.c

288

usb_fill_int_urb(dev->int_urb, dev->udev, pipe,

drivers/media/usb/uvc/uvc_video.c

1906

urb->pipe = usb_rcvisocpipe(stream->dev->udev,

drivers/media/usb/uvc/uvc_video.c

1937

unsigned int npackets, pipe;

drivers/media/usb/uvc/uvc_video.c

1952

pipe = usb_rcvbulkpipe(stream->dev->udev,

drivers/media/usb/uvc/uvc_video.c

1955

pipe = usb_sndbulkpipe(stream->dev->udev,

drivers/media/usb/uvc/uvc_video.c

1968

usb_fill_bulk_urb(urb, stream->dev->udev, pipe, uvc_urb->buffer,

drivers/media/usb/uvc/uvc_video.c

2338

unsigned int pipe;

drivers/media/usb/uvc/uvc_video.c

2340

pipe = usb_sndbulkpipe(stream->dev->udev, epnum) | dir;

drivers/media/usb/uvc/uvc_video.c

2341

usb_clear_halt(stream->dev->udev, pipe);

drivers/media/usb/uvc/uvc_video.c

37

unsigned int pipe;

drivers/media/usb/uvc/uvc_video.c

39

pipe = (query & 0x80) ? usb_rcvctrlpipe(dev->udev, 0)

drivers/media/usb/uvc/uvc_video.c

43

return usb_control_msg(dev->udev, pipe, query, type, cs << 8,

drivers/media/v4l2-core/v4l2-dev.c

1147

struct media_pipeline *pipe)

drivers/media/v4l2-core/v4l2-dev.c

1154

return media_pipeline_start(&entity->pads[0], pipe);

drivers/media/v4l2-core/v4l2-dev.c

1159

struct media_pipeline *pipe)

drivers/media/v4l2-core/v4l2-dev.c

1166

return __media_pipeline_start(&entity->pads[0], pipe);

drivers/media/v4l2-core/v4l2-mc.c

292

err = mdev->enable_source(&vdev->entity, &vdev->pipe);

drivers/memstick/host/rtsx_usb_ms.c

241

unsigned int pipe;

drivers/memstick/host/rtsx_usb_ms.c

255

pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);

drivers/memstick/host/rtsx_usb_ms.c

263

pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);

drivers/memstick/host/rtsx_usb_ms.c

299

err = rtsx_usb_transfer_data(ucr, pipe, sg, length,

drivers/mfd/viperboard.c

53

int pipe, ret;

drivers/mfd/viperboard.c

69

pipe = usb_rcvctrlpipe(vb->usb_dev, 0);

drivers/mfd/viperboard.c

70

ret = usb_control_msg(vb->usb_dev, pipe, VPRBRD_USB_REQUEST_MAJOR,

drivers/mfd/viperboard.c

76

ret = usb_control_msg(vb->usb_dev, pipe, VPRBRD_USB_REQUEST_MINOR,

drivers/misc/cardreader/rtsx_usb.c

41

unsigned int pipe, struct scatterlist *sg, int num_sg,

drivers/misc/cardreader/rtsx_usb.c

48

ret = usb_sg_init(&ucr->current_sg, ucr->pusb_dev, pipe, 0,

drivers/misc/cardreader/rtsx_usb.c

67

int rtsx_usb_transfer_data(struct rtsx_ucr *ucr, unsigned int pipe,

drivers/misc/cardreader/rtsx_usb.c

75

return rtsx_usb_bulk_transfer_sglist(ucr, pipe,

drivers/misc/cardreader/rtsx_usb.c

79

return usb_bulk_msg(ucr->pusb_dev, pipe, buf, len, act_len,

drivers/mmc/host/rtsx_usb_sdmmc.c

455

unsigned int pipe;

drivers/mmc/host/rtsx_usb_sdmmc.c

514

pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);

drivers/mmc/host/rtsx_usb_sdmmc.c

516

pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);

drivers/mmc/host/rtsx_usb_sdmmc.c

518

err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,

drivers/mmc/host/ushc.c

291

int pipe;

drivers/mmc/host/ushc.c

294

pipe = usb_rcvbulkpipe(ushc->usb_dev, 6);

drivers/mmc/host/ushc.c

296

pipe = usb_sndbulkpipe(ushc->usb_dev, 2);

drivers/mmc/host/ushc.c

298

usb_fill_bulk_urb(ushc->data_urb, ushc->usb_dev, pipe,

drivers/mmc/host/vub300.c

1394

unsigned int pipe, void *data, int len,

drivers/mmc/host/vub300.c

1404

usb_fill_bulk_urb(vub300->urb, usb_dev, pipe, data, len,

drivers/mmc/host/vub300.c

1436

unsigned pipe;

drivers/mmc/host/vub300.c

1437

pipe = usb_rcvbulkpipe(vub300->udev, vub300->data_inp_ep);

drivers/mmc/host/vub300.c

1439

pipe, 0, data->sg,

drivers/mmc/host/vub300.c

1467

unsigned pipe = usb_rcvbulkpipe(vub300->udev,

drivers/mmc/host/vub300.c

1470

result = vub300_usb_bulk_msg(vub300, pipe, buf,

drivers/mmc/host/vub300.c

1502

unsigned pipe = usb_sndbulkpipe(vub300->udev, vub300->data_out_ep);

drivers/mmc/host/vub300.c

1514

result = vub300_usb_bulk_msg(vub300, pipe, vub300->padded_buffer,

drivers/mmc/host/vub300.c

1538

vub300_usb_bulk_msg(vub300, pipe, buf,

drivers/mmc/host/vub300.c

1557

pipe, 0, data->sg,

drivers/mmc/host/vub300.c

460

unsigned int pipe =

drivers/mmc/host/vub300.c

462

usb_fill_bulk_urb(vub300->command_res_urb, vub300->udev, pipe,

drivers/mmc/host/vub300.c

825

unsigned int pipe =

drivers/mmc/host/vub300.c

827

usb_fill_bulk_urb(vub300->command_res_urb, vub300->udev, pipe,

drivers/most/core.c

57

struct pipe pipe0;

drivers/most/core.c

58

struct pipe pipe1;

drivers/most/most_usb.c

364

mdev->clear_work[channel].pipe = urb->pipe;

drivers/most/most_usb.c

421

mdev->clear_work[channel].pipe = urb->pipe;

drivers/most/most_usb.c

733

int pipe = clear_work->pipe;

drivers/most/most_usb.c

740

if (usb_clear_halt(mdev->usb_device, pipe))

drivers/most/most_usb.c

79

int pipe;

drivers/net/ethernet/sfc/tc.c

1023

pipe = false;

drivers/net/ethernet/sfc/tc.c

1065

if (pipe) {

drivers/net/ethernet/sfc/tc.c

978

bool pipe = true;

drivers/net/ethernet/sfc/tc.c

987

if (!pipe) {

drivers/net/usb/catc.c

488

urb->pipe = q->dir ? usb_rcvctrlpipe(usbdev, 0) : usb_sndctrlpipe(usbdev, 0);

drivers/net/usb/hso.c

1749

int pipe;

drivers/net/usb/hso.c

1768

pipe = usb_rcvctrlpipe(serial->parent->usb, 0);

drivers/net/usb/hso.c

1775

pipe = usb_sndctrlpipe(serial->parent->usb, 0);

drivers/net/usb/hso.c

1786

pipe,

drivers/net/usb/r8152.c

1223

int r8152_control_msg(struct r8152 *tp, unsigned int pipe, __u8 request,

drivers/net/usb/r8152.c

1233

ret = usb_control_msg(udev, pipe, request, requesttype,

drivers/net/usb/usbnet.c

228

unsigned pipe = 0;

drivers/net/usb/usbnet.c

235

pipe = usb_rcvintpipe(dev->udev,

drivers/net/usb/usbnet.c

238

maxp = usb_maxpacket(dev->udev, pipe);

drivers/net/usb/usbnet.c

251

usb_fill_int_urb(dev->interrupt, dev->udev, pipe,

drivers/net/usb/usbnet.c

256

usb_pipeendpoint(pipe), maxp, period);

drivers/net/wireless/ath/ath10k/ce.c

574

void __ath10k_ce_send_revert(struct ath10k_ce_pipe *pipe)

drivers/net/wireless/ath/ath10k/ce.c

576

struct ath10k *ar = pipe->ar;

drivers/net/wireless/ath/ath10k/ce.c

578

struct ath10k_ce_ring *src_ring = pipe->src_ring;

drivers/net/wireless/ath/ath10k/ce.c

579

u32 ctrl_addr = pipe->ctrl_addr;

drivers/net/wireless/ath/ath10k/ce.c

622

int ath10k_ce_num_free_src_entries(struct ath10k_ce_pipe *pipe)

drivers/net/wireless/ath/ath10k/ce.c

624

struct ath10k *ar = pipe->ar;

drivers/net/wireless/ath/ath10k/ce.c

629

delta = CE_RING_DELTA(pipe->src_ring->nentries_mask,

drivers/net/wireless/ath/ath10k/ce.c

630

pipe->src_ring->write_index,

drivers/net/wireless/ath/ath10k/ce.c

631

pipe->src_ring->sw_index - 1);

drivers/net/wireless/ath/ath10k/ce.c

638

int __ath10k_ce_rx_num_free_bufs(struct ath10k_ce_pipe *pipe)

drivers/net/wireless/ath/ath10k/ce.c

640

struct ath10k *ar = pipe->ar;

drivers/net/wireless/ath/ath10k/ce.c

642

struct ath10k_ce_ring *dest_ring = pipe->dest_ring;

drivers/net/wireless/ath/ath10k/ce.c

653

static int __ath10k_ce_rx_post_buf(struct ath10k_ce_pipe *pipe, void *ctx,

drivers/net/wireless/ath/ath10k/ce.c

656

struct ath10k *ar = pipe->ar;

drivers/net/wireless/ath/ath10k/ce.c

658

struct ath10k_ce_ring *dest_ring = pipe->dest_ring;

drivers/net/wireless/ath/ath10k/ce.c

664

u32 ctrl_addr = pipe->ctrl_addr;

drivers/net/wireless/ath/ath10k/ce.c

668

if ((pipe->id != 5) &&

drivers/net/wireless/ath/ath10k/ce.c

683

static int __ath10k_ce_rx_post_buf_64(struct ath10k_ce_pipe *pipe,

drivers/net/wireless/ath/ath10k/ce.c

687

struct ath10k *ar = pipe->ar;

drivers/net/wireless/ath/ath10k/ce.c

689

struct ath10k_ce_ring *dest_ring = pipe->dest_ring;

drivers/net/wireless/ath/ath10k/ce.c

696

u32 ctrl_addr = pipe->ctrl_addr;

drivers/net/wireless/ath/ath10k/ce.c

716

void ath10k_ce_rx_update_write_idx(struct ath10k_ce_pipe *pipe, u32 nentries)

drivers/net/wireless/ath/ath10k/ce.c

718

struct ath10k *ar = pipe->ar;

drivers/net/wireless/ath/ath10k/ce.c

719

struct ath10k_ce_ring *dest_ring = pipe->dest_ring;

drivers/net/wireless/ath/ath10k/ce.c

722

u32 ctrl_addr = pipe->ctrl_addr;

drivers/net/wireless/ath/ath10k/ce.c

737

int ath10k_ce_rx_post_buf(struct ath10k_ce_pipe *pipe, void *ctx,

drivers/net/wireless/ath/ath10k/ce.c

740

struct ath10k *ar = pipe->ar;

drivers/net/wireless/ath/ath10k/ce.c

745

ret = pipe->ops->ce_rx_post_buf(pipe, ctx, paddr);

drivers/net/wireless/ath/ath10k/ce.h

189

void __ath10k_ce_send_revert(struct ath10k_ce_pipe *pipe);

drivers/net/wireless/ath/ath10k/ce.h

191

int ath10k_ce_num_free_src_entries(struct ath10k_ce_pipe *pipe);

drivers/net/wireless/ath/ath10k/ce.h

195

int __ath10k_ce_rx_num_free_bufs(struct ath10k_ce_pipe *pipe);

drivers/net/wireless/ath/ath10k/ce.h

196

int ath10k_ce_rx_post_buf(struct ath10k_ce_pipe *pipe, void *ctx,

drivers/net/wireless/ath/ath10k/ce.h

198

void ath10k_ce_rx_update_write_idx(struct ath10k_ce_pipe *pipe, u32 nentries);

drivers/net/wireless/ath/ath10k/ce.h

312

int (*ce_rx_post_buf)(struct ath10k_ce_pipe *pipe, void *ctx,

drivers/net/wireless/ath/ath10k/ce.h

325

int (*ce_send_nolock)(struct ath10k_ce_pipe *pipe,

drivers/net/wireless/ath/ath10k/pci.c

1428

u16 ath10k_pci_hif_get_free_queue_number(struct ath10k *ar, u8 pipe)

drivers/net/wireless/ath/ath10k/pci.c

1434

return ath10k_ce_num_free_src_entries(ar_pci->pipe_info[pipe].ce_hdl);

drivers/net/wireless/ath/ath10k/pci.c

1790

void ath10k_pci_hif_send_complete_check(struct ath10k *ar, u8 pipe,

drivers/net/wireless/ath/ath10k/pci.c

1806

resources = ath10k_pci_hif_get_free_queue_number(ar, pipe);

drivers/net/wireless/ath/ath10k/pci.c

1812

if (resources > (ar_pci->attr[pipe].src_nentries >> 1))

drivers/net/wireless/ath/ath10k/pci.c

1815

ath10k_ce_per_engine_service(ar, pipe);

drivers/net/wireless/ath/ath10k/pci.c

2494

struct ath10k_pci_pipe *pipe;

drivers/net/wireless/ath/ath10k/pci.c

2499

pipe = &ar_pci->pipe_info[i];

drivers/net/wireless/ath/ath10k/pci.c

2500

pipe->ce_hdl = &ce->ce_states[i];

drivers/net/wireless/ath/ath10k/pci.c

2501

pipe->pipe_num = i;

drivers/net/wireless/ath/ath10k/pci.c

2502

pipe->hif_ce_state = ar;

drivers/net/wireless/ath/ath10k/pci.c

2513

ar_pci->ce_diag = pipe->ce_hdl;

drivers/net/wireless/ath/ath10k/pci.c

2517

pipe->buf_sz = (size_t)(ar_pci->attr[i].src_sz_max);

drivers/net/wireless/ath/ath10k/pci.c

766

static int __ath10k_pci_rx_post_buf(struct ath10k_pci_pipe *pipe)

drivers/net/wireless/ath/ath10k/pci.c

768

struct ath10k *ar = pipe->hif_ce_state;

drivers/net/wireless/ath/ath10k/pci.c

770

struct ath10k_ce_pipe *ce_pipe = pipe->ce_hdl;

drivers/net/wireless/ath/ath10k/pci.c

775

skb = dev_alloc_skb(pipe->buf_sz);

drivers/net/wireless/ath/ath10k/pci.c

805

static void ath10k_pci_rx_post_pipe(struct ath10k_pci_pipe *pipe)

drivers/net/wireless/ath/ath10k/pci.c

807

struct ath10k *ar = pipe->hif_ce_state;

drivers/net/wireless/ath/ath10k/pci.c

810

struct ath10k_ce_pipe *ce_pipe = pipe->ce_hdl;

drivers/net/wireless/ath/ath10k/pci.c

813

if (pipe->buf_sz == 0)

drivers/net/wireless/ath/ath10k/pci.c

824

ret = __ath10k_pci_rx_post_buf(pipe);

drivers/net/wireless/ath/ath10k/pci.h

233

void ath10k_pci_hif_send_complete_check(struct ath10k *ar, u8 pipe,

drivers/net/wireless/ath/ath10k/pci.h

235

u16 ath10k_pci_hif_get_free_queue_number(struct ath10k *ar, u8 pipe);

drivers/net/wireless/ath/ath10k/snoc.c

1409

struct ath10k_snoc_pipe *pipe;

drivers/net/wireless/ath/ath10k/snoc.c

1415

pipe = &ar_snoc->pipe_info[i];

drivers/net/wireless/ath/ath10k/snoc.c

1416

pipe->ce_hdl = &ce->ce_states[i];

drivers/net/wireless/ath/ath10k/snoc.c

1417

pipe->pipe_num = i;

drivers/net/wireless/ath/ath10k/snoc.c

1418

pipe->hif_ce_state = ar;

drivers/net/wireless/ath/ath10k/snoc.c

1427

pipe->buf_sz = host_ce_config_wlan[i].src_sz_max;

drivers/net/wireless/ath/ath10k/snoc.c

493

static int __ath10k_snoc_rx_post_buf(struct ath10k_snoc_pipe *pipe)

drivers/net/wireless/ath/ath10k/snoc.c

495

struct ath10k_ce_pipe *ce_pipe = pipe->ce_hdl;

drivers/net/wireless/ath/ath10k/snoc.c

496

struct ath10k *ar = pipe->hif_ce_state;

drivers/net/wireless/ath/ath10k/snoc.c

502

skb = dev_alloc_skb(pipe->buf_sz);

drivers/net/wireless/ath/ath10k/snoc.c

532

static void ath10k_snoc_rx_post_pipe(struct ath10k_snoc_pipe *pipe)

drivers/net/wireless/ath/ath10k/snoc.c

534

struct ath10k *ar = pipe->hif_ce_state;

drivers/net/wireless/ath/ath10k/snoc.c

537

struct ath10k_ce_pipe *ce_pipe = pipe->ce_hdl;

drivers/net/wireless/ath/ath10k/snoc.c

540

if (pipe->buf_sz == 0)

drivers/net/wireless/ath/ath10k/snoc.c

550

ret = __ath10k_snoc_rx_post_buf(pipe);

drivers/net/wireless/ath/ath10k/snoc.c

751

static u16 ath10k_snoc_hif_get_free_queue_number(struct ath10k *ar, u8 pipe)

drivers/net/wireless/ath/ath10k/snoc.c

757

return ath10k_ce_num_free_src_entries(ar_snoc->pipe_info[pipe].ce_hdl);

drivers/net/wireless/ath/ath10k/snoc.c

760

static void ath10k_snoc_hif_send_complete_check(struct ath10k *ar, u8 pipe,

drivers/net/wireless/ath/ath10k/snoc.c

768

resources = ath10k_snoc_hif_get_free_queue_number(ar, pipe);

drivers/net/wireless/ath/ath10k/snoc.c

770

if (resources > (host_ce_config_wlan[pipe].src_nentries >> 1))

drivers/net/wireless/ath/ath10k/snoc.c

773

ath10k_ce_per_engine_service(ar, pipe);

drivers/net/wireless/ath/ath10k/usb.c

100

pipe->logical_pipe_num, pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath10k/usb.c

101

pipe->urb_alloc, pipe->urb_cnt);

drivers/net/wireless/ath/ath10k/usb.c

105

urb_context = ath10k_usb_alloc_urb_from_pipe(pipe);

drivers/net/wireless/ath/ath10k/usb.c

128

struct ath10k_usb_pipe *pipe = urb_context->pipe;

drivers/net/wireless/ath/ath10k/usb.c

129

struct ath10k *ar = pipe->ar_usb->ar;

drivers/net/wireless/ath/ath10k/usb.c

135

pipe->logical_pipe_num, urb->status, urb->actual_length,

drivers/net/wireless/ath/ath10k/usb.c

152

pipe->logical_pipe_num,

drivers/net/wireless/ath/ath10k/usb.c

153

pipe->ep_address, urb->status);

drivers/net/wireless/ath/ath10k/usb.c

169

skb_queue_tail(&pipe->io_comp_queue, skb);

drivers/net/wireless/ath/ath10k/usb.c

170

schedule_work(&pipe->io_complete_work);

drivers/net/wireless/ath/ath10k/usb.c

176

pipe->urb_cnt >= pipe->urb_cnt_thresh) {

drivers/net/wireless/ath/ath10k/usb.c

178

ath10k_usb_post_recv_transfers(ar, pipe);

drivers/net/wireless/ath/ath10k/usb.c

185

struct ath10k_usb_pipe *pipe = urb_context->pipe;

drivers/net/wireless/ath/ath10k/usb.c

186

struct ath10k *ar = pipe->ar_usb->ar;

drivers/net/wireless/ath/ath10k/usb.c

192

pipe->logical_pipe_num, urb->status);

drivers/net/wireless/ath/ath10k/usb.c

197

ath10k_usb_free_urb_to_pipe(urb_context->pipe, urb_context);

drivers/net/wireless/ath/ath10k/usb.c

200

skb_queue_tail(&pipe->io_comp_queue, skb);

drivers/net/wireless/ath/ath10k/usb.c

201

schedule_work(&pipe->io_complete_work);

drivers/net/wireless/ath/ath10k/usb.c

36

ath10k_usb_alloc_urb_from_pipe(struct ath10k_usb_pipe *pipe)

drivers/net/wireless/ath/ath10k/usb.c

362

struct ath10k_usb_pipe *pipe = container_of(work,

drivers/net/wireless/ath/ath10k/usb.c

365

struct ath10k *ar = pipe->ar_usb->ar;

drivers/net/wireless/ath/ath10k/usb.c

368

while ((skb = skb_dequeue(&pipe->io_comp_queue))) {

drivers/net/wireless/ath/ath10k/usb.c

369

if (pipe->flags & ATH10K_USB_PIPE_FLAG_TX)

drivers/net/wireless/ath/ath10k/usb.c

413

struct ath10k_usb_pipe *pipe = &ar_usb->pipes[pipe_id];

drivers/net/wireless/ath/ath10k/usb.c

42

if (!pipe->ar_usb)

drivers/net/wireless/ath/ath10k/usb.c

420

urb_context = ath10k_usb_alloc_urb_from_pipe(pipe);

drivers/net/wireless/ath/ath10k/usb.c

437

pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath10k/usb.c

442

if (!(skb->len % pipe->max_packet_size)) {

drivers/net/wireless/ath/ath10k/usb.c

447

usb_anchor_urb(urb, &pipe->urb_submitted);

drivers/net/wireless/ath/ath10k/usb.c

45

spin_lock_irqsave(&pipe->ar_usb->cs_lock, flags);

drivers/net/wireless/ath/ath10k/usb.c

46

if (!list_empty(&pipe->urb_list_head)) {

drivers/net/wireless/ath/ath10k/usb.c

464

ath10k_usb_free_urb_to_pipe(urb_context->pipe, urb_context);

drivers/net/wireless/ath/ath10k/usb.c

47

urb_context = list_first_entry(&pipe->urb_list_head,

drivers/net/wireless/ath/ath10k/usb.c

50

pipe->urb_cnt--;

drivers/net/wireless/ath/ath10k/usb.c

52

spin_unlock_irqrestore(&pipe->ar_usb->cs_lock, flags);

drivers/net/wireless/ath/ath10k/usb.c

57

static void ath10k_usb_free_urb_to_pipe(struct ath10k_usb_pipe *pipe,

drivers/net/wireless/ath/ath10k/usb.c

63

if (!pipe->ar_usb)

drivers/net/wireless/ath/ath10k/usb.c

66

spin_lock_irqsave(&pipe->ar_usb->cs_lock, flags);

drivers/net/wireless/ath/ath10k/usb.c

68

pipe->urb_cnt++;

drivers/net/wireless/ath/ath10k/usb.c

69

list_add(&urb_context->link, &pipe->urb_list_head);

drivers/net/wireless/ath/ath10k/usb.c

71

spin_unlock_irqrestore(&pipe->ar_usb->cs_lock, flags);

drivers/net/wireless/ath/ath10k/usb.c

79

ath10k_usb_free_urb_to_pipe(urb_context->pipe, urb_context);

drivers/net/wireless/ath/ath10k/usb.c

792

struct ath10k_usb_pipe *pipe,

drivers/net/wireless/ath/ath10k/usb.c

798

INIT_LIST_HEAD(&pipe->urb_list_head);

drivers/net/wireless/ath/ath10k/usb.c

799

init_usb_anchor(&pipe->urb_submitted);

drivers/net/wireless/ath/ath10k/usb.c

806

urb_context->pipe = pipe;

drivers/net/wireless/ath/ath10k/usb.c

811

pipe->urb_alloc++;

drivers/net/wireless/ath/ath10k/usb.c

812

ath10k_usb_free_urb_to_pipe(pipe, urb_context);

drivers/net/wireless/ath/ath10k/usb.c

817

pipe->logical_pipe_num, pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath10k/usb.c

818

pipe->urb_alloc);

drivers/net/wireless/ath/ath10k/usb.c

829

struct ath10k_usb_pipe *pipe;

drivers/net/wireless/ath/ath10k/usb.c

83

struct ath10k_usb_pipe *pipe)

drivers/net/wireless/ath/ath10k/usb.c

87

if (!pipe->ar_usb) {

drivers/net/wireless/ath/ath10k/usb.c

877

pipe = &ar_usb->pipes[pipe_num];

drivers/net/wireless/ath/ath10k/usb.c

878

if (pipe->ar_usb)

drivers/net/wireless/ath/ath10k/usb.c

882

pipe->ar_usb = ar_usb;

drivers/net/wireless/ath/ath10k/usb.c

883

pipe->logical_pipe_num = pipe_num;

drivers/net/wireless/ath/ath10k/usb.c

884

pipe->ep_address = endpoint->bEndpointAddress;

drivers/net/wireless/ath/ath10k/usb.c

885

pipe->max_packet_size = le16_to_cpu(endpoint->wMaxPacketSize);

drivers/net/wireless/ath/ath10k/usb.c

888

if (ATH10K_USB_IS_DIR_IN(pipe->ep_address)) {

drivers/net/wireless/ath/ath10k/usb.c

889

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath10k/usb.c

891

pipe->ep_address);

drivers/net/wireless/ath/ath10k/usb.c

893

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath10k/usb.c

895

pipe->ep_address);

drivers/net/wireless/ath/ath10k/usb.c

898

if (ATH10K_USB_IS_DIR_IN(pipe->ep_address)) {

drivers/net/wireless/ath/ath10k/usb.c

899

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath10k/usb.c

901

pipe->ep_address);

drivers/net/wireless/ath/ath10k/usb.c

903

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath10k/usb.c

905

pipe->ep_address);

drivers/net/wireless/ath/ath10k/usb.c

909

if (ATH10K_USB_IS_DIR_IN(pipe->ep_address)) {

drivers/net/wireless/ath/ath10k/usb.c

910

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath10k/usb.c

912

pipe->ep_address);

drivers/net/wireless/ath/ath10k/usb.c

914

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath10k/usb.c

916

pipe->ep_address);

drivers/net/wireless/ath/ath10k/usb.c

920

pipe->ep_desc = endpoint;

drivers/net/wireless/ath/ath10k/usb.c

922

if (!ATH10K_USB_IS_DIR_IN(pipe->ep_address))

drivers/net/wireless/ath/ath10k/usb.c

923

pipe->flags |= ATH10K_USB_PIPE_FLAG_TX;

drivers/net/wireless/ath/ath10k/usb.c

925

ret = ath10k_usb_alloc_pipe_resources(ar, pipe, urbcount);

drivers/net/wireless/ath/ath10k/usb.c

938

struct ath10k_usb_pipe *pipe;

drivers/net/wireless/ath/ath10k/usb.c

94

pipe->logical_pipe_num, pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath10k/usb.c

947

pipe = &ar_usb->pipes[i];

drivers/net/wireless/ath/ath10k/usb.c

948

INIT_WORK(&pipe->io_complete_work,

drivers/net/wireless/ath/ath10k/usb.c

95

pipe->urb_alloc, pipe->urb_cnt);

drivers/net/wireless/ath/ath10k/usb.c

950

skb_queue_head_init(&pipe->io_comp_queue);

drivers/net/wireless/ath/ath10k/usb.c

97

if (pipe->urb_alloc != pipe->urb_cnt) {

drivers/net/wireless/ath/ath10k/usb.h

108

struct ath10k_usb_pipe *pipe;

drivers/net/wireless/ath/ath11k/ce.c

1000

ce_ring = pipe->dest_ring;

drivers/net/wireless/ath/ath11k/ce.c

1002

pipe->dest_ring->nentries * desc_sz +

drivers/net/wireless/ath/ath11k/ce.c

1006

kfree(pipe->dest_ring);

drivers/net/wireless/ath/ath11k/ce.c

1007

pipe->dest_ring = NULL;

drivers/net/wireless/ath/ath11k/ce.c

1010

if (pipe->status_ring) {

drivers/net/wireless/ath/ath11k/ce.c

1013

ce_ring = pipe->status_ring;

drivers/net/wireless/ath/ath11k/ce.c

1015

pipe->status_ring->nentries * desc_sz +

drivers/net/wireless/ath/ath11k/ce.c

1019

kfree(pipe->status_ring);

drivers/net/wireless/ath/ath11k/ce.c

1020

pipe->status_ring = NULL;

drivers/net/wireless/ath/ath11k/ce.c

1028

struct ath11k_ce_pipe *pipe;

drivers/net/wireless/ath/ath11k/ce.c

1037

pipe = &ab->ce.ce_pipe[i];

drivers/net/wireless/ath/ath11k/ce.c

1038

pipe->pipe_num = i;

drivers/net/wireless/ath/ath11k/ce.c

1039

pipe->ab = ab;

drivers/net/wireless/ath/ath11k/ce.c

1040

pipe->buf_sz = attr->src_sz_max;

drivers/net/wireless/ath/ath11k/ce.c

273

static int ath11k_ce_rx_buf_enqueue_pipe(struct ath11k_ce_pipe *pipe,

drivers/net/wireless/ath/ath11k/ce.c

276

struct ath11k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath11k/ce.c

277

struct ath11k_ce_ring *ring = pipe->dest_ring;

drivers/net/wireless/ath/ath11k/ce.c

311

pipe->rx_buf_needed--;

drivers/net/wireless/ath/ath11k/ce.c

322

static int ath11k_ce_rx_post_pipe(struct ath11k_ce_pipe *pipe)

drivers/net/wireless/ath/ath11k/ce.c

324

struct ath11k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath11k/ce.c

329

if (!(pipe->dest_ring || pipe->status_ring))

drivers/net/wireless/ath/ath11k/ce.c

333

while (pipe->rx_buf_needed) {

drivers/net/wireless/ath/ath11k/ce.c

334

skb = dev_alloc_skb(pipe->buf_sz);

drivers/net/wireless/ath/ath11k/ce.c

354

ret = ath11k_ce_rx_buf_enqueue_pipe(pipe, skb, paddr);

drivers/net/wireless/ath/ath11k/ce.c

372

static int ath11k_ce_completed_recv_next(struct ath11k_ce_pipe *pipe,

drivers/net/wireless/ath/ath11k/ce.c

375

struct ath11k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath11k/ce.c

384

sw_index = pipe->dest_ring->sw_index;

drivers/net/wireless/ath/ath11k/ce.c

385

nentries_mask = pipe->dest_ring->nentries_mask;

drivers/net/wireless/ath/ath11k/ce.c

387

srng = &ab->hal.srng_list[pipe->status_ring->hal_ring_id];

drivers/net/wireless/ath/ath11k/ce.c

401

*skb = pipe->dest_ring->skb[sw_index];

drivers/net/wireless/ath/ath11k/ce.c

402

pipe->dest_ring->skb[sw_index] = NULL;

drivers/net/wireless/ath/ath11k/ce.c

405

pipe->dest_ring->sw_index = sw_index;

drivers/net/wireless/ath/ath11k/ce.c

407

pipe->rx_buf_needed++;

drivers/net/wireless/ath/ath11k/ce.c

418

static void ath11k_ce_recv_process_cb(struct ath11k_ce_pipe *pipe)

drivers/net/wireless/ath/ath11k/ce.c

420

struct ath11k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath11k/ce.c

427

while (ath11k_ce_completed_recv_next(pipe, &skb, &nbytes) == 0) {

drivers/net/wireless/ath/ath11k/ce.c

445

pipe->pipe_num, skb->len);

drivers/net/wireless/ath/ath11k/ce.c

446

pipe->recv_cb(ab, skb);

drivers/net/wireless/ath/ath11k/ce.c

449

ret = ath11k_ce_rx_post_pipe(pipe);

drivers/net/wireless/ath/ath11k/ce.c

452

pipe->pipe_num, ret);

drivers/net/wireless/ath/ath11k/ce.c

458

static struct sk_buff *ath11k_ce_completed_send_next(struct ath11k_ce_pipe *pipe)

drivers/net/wireless/ath/ath11k/ce.c

460

struct ath11k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath11k/ce.c

469

sw_index = pipe->src_ring->sw_index;

drivers/net/wireless/ath/ath11k/ce.c

470

nentries_mask = pipe->src_ring->nentries_mask;

drivers/net/wireless/ath/ath11k/ce.c

472

srng = &ab->hal.srng_list[pipe->src_ring->hal_ring_id];

drivers/net/wireless/ath/ath11k/ce.c

484

skb = pipe->src_ring->skb[sw_index];

drivers/net/wireless/ath/ath11k/ce.c

486

pipe->src_ring->skb[sw_index] = NULL;

drivers/net/wireless/ath/ath11k/ce.c

489

pipe->src_ring->sw_index = sw_index;

drivers/net/wireless/ath/ath11k/ce.c

499

static void ath11k_ce_tx_process_cb(struct ath11k_ce_pipe *pipe)

drivers/net/wireless/ath/ath11k/ce.c

501

struct ath11k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath11k/ce.c

506

while (!IS_ERR(skb = ath11k_ce_completed_send_next(pipe))) {

drivers/net/wireless/ath/ath11k/ce.c

513

if ((!pipe->send_cb) || ab->hw_params.credit_flow) {

drivers/net/wireless/ath/ath11k/ce.c

523

pipe->pipe_num, skb->len);

drivers/net/wireless/ath/ath11k/ce.c

524

pipe->send_cb(ab, skb);

drivers/net/wireless/ath/ath11k/ce.c

651

struct ath11k_ce_pipe *pipe = &ab->ce.ce_pipe[ce_id];

drivers/net/wireless/ath/ath11k/ce.c

657

pipe->attr_flags = attr->flags;

drivers/net/wireless/ath/ath11k/ce.c

660

pipe->send_cb = attr->send_cb;

drivers/net/wireless/ath/ath11k/ce.c

666

pipe->src_ring = ring;

drivers/net/wireless/ath/ath11k/ce.c

670

pipe->recv_cb = attr->recv_cb;

drivers/net/wireless/ath/ath11k/ce.c

676

pipe->dest_ring = ring;

drivers/net/wireless/ath/ath11k/ce.c

682

pipe->status_ring = ring;

drivers/net/wireless/ath/ath11k/ce.c

690

struct ath11k_ce_pipe *pipe = &ab->ce.ce_pipe[ce_id];

drivers/net/wireless/ath/ath11k/ce.c

694

ath11k_ce_tx_process_cb(pipe);

drivers/net/wireless/ath/ath11k/ce.c

696

if (pipe->recv_cb)

drivers/net/wireless/ath/ath11k/ce.c

697

ath11k_ce_recv_process_cb(pipe);

drivers/net/wireless/ath/ath11k/ce.c

702

struct ath11k_ce_pipe *pipe = &ab->ce.ce_pipe[pipe_id];

drivers/net/wireless/ath/ath11k/ce.c

705

if ((pipe->attr_flags & CE_ATTR_DIS_INTR) && attr->src_nentries)

drivers/net/wireless/ath/ath11k/ce.c

706

ath11k_ce_tx_process_cb(pipe);

drivers/net/wireless/ath/ath11k/ce.c

713

struct ath11k_ce_pipe *pipe = &ab->ce.ce_pipe[pipe_id];

drivers/net/wireless/ath/ath11k/ce.c

726

if (pipe->attr_flags & CE_ATTR_DIS_INTR) {

drivers/net/wireless/ath/ath11k/ce.c

728

write_index = pipe->src_ring->write_index;

drivers/net/wireless/ath/ath11k/ce.c

730

sw_index = pipe->src_ring->sw_index;

drivers/net/wireless/ath/ath11k/ce.c

735

num_used = pipe->src_ring->nentries - sw_index +

drivers/net/wireless/ath/ath11k/ce.c

741

ath11k_ce_poll_send_completed(ab, pipe->pipe_num);

drivers/net/wireless/ath/ath11k/ce.c

749

write_index = pipe->src_ring->write_index;

drivers/net/wireless/ath/ath11k/ce.c

750

nentries_mask = pipe->src_ring->nentries_mask;

drivers/net/wireless/ath/ath11k/ce.c

752

srng = &ab->hal.srng_list[pipe->src_ring->hal_ring_id];

drivers/net/wireless/ath/ath11k/ce.c

771

if (pipe->attr_flags & CE_ATTR_BYTE_SWAP_DATA)

drivers/net/wireless/ath/ath11k/ce.c

777

pipe->src_ring->skb[write_index] = skb;

drivers/net/wireless/ath/ath11k/ce.c

778

pipe->src_ring->write_index = CE_RING_IDX_INCR(nentries_mask,

drivers/net/wireless/ath/ath11k/ce.c

800

static void ath11k_ce_rx_pipe_cleanup(struct ath11k_ce_pipe *pipe)

drivers/net/wireless/ath/ath11k/ce.c

802

struct ath11k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath11k/ce.c

803

struct ath11k_ce_ring *ring = pipe->dest_ring;

drivers/net/wireless/ath/ath11k/ce.c

807

if (!(ring && pipe->buf_sz))

drivers/net/wireless/ath/ath11k/ce.c

867

struct ath11k_ce_pipe *pipe;

drivers/net/wireless/ath/ath11k/ce.c

873

pipe = &ab->ce.ce_pipe[pipe_num];

drivers/net/wireless/ath/ath11k/ce.c

874

ath11k_ce_rx_pipe_cleanup(pipe);

drivers/net/wireless/ath/ath11k/ce.c

886

struct ath11k_ce_pipe *pipe;

drivers/net/wireless/ath/ath11k/ce.c

891

pipe = &ab->ce.ce_pipe[i];

drivers/net/wireless/ath/ath11k/ce.c

892

ret = ath11k_ce_rx_post_pipe(pipe);

drivers/net/wireless/ath/ath11k/ce.c

917

struct ath11k_ce_pipe *pipe;

drivers/net/wireless/ath/ath11k/ce.c

922

pipe = &ab->ce.ce_pipe[i];

drivers/net/wireless/ath/ath11k/ce.c

924

if (pipe->src_ring) {

drivers/net/wireless/ath/ath11k/ce.c

925

ret = ath11k_ce_init_ring(ab, pipe->src_ring, i,

drivers/net/wireless/ath/ath11k/ce.c

934

pipe->src_ring->write_index = 0;

drivers/net/wireless/ath/ath11k/ce.c

935

pipe->src_ring->sw_index = 0;

drivers/net/wireless/ath/ath11k/ce.c

938

if (pipe->dest_ring) {

drivers/net/wireless/ath/ath11k/ce.c

939

ret = ath11k_ce_init_ring(ab, pipe->dest_ring, i,

drivers/net/wireless/ath/ath11k/ce.c

948

pipe->rx_buf_needed = pipe->dest_ring->nentries ?

drivers/net/wireless/ath/ath11k/ce.c

949

pipe->dest_ring->nentries - 2 : 0;

drivers/net/wireless/ath/ath11k/ce.c

951

pipe->dest_ring->write_index = 0;

drivers/net/wireless/ath/ath11k/ce.c

952

pipe->dest_ring->sw_index = 0;

drivers/net/wireless/ath/ath11k/ce.c

955

if (pipe->status_ring) {

drivers/net/wireless/ath/ath11k/ce.c

956

ret = ath11k_ce_init_ring(ab, pipe->status_ring, i,

drivers/net/wireless/ath/ath11k/ce.c

965

pipe->status_ring->write_index = 0;

drivers/net/wireless/ath/ath11k/ce.c

966

pipe->status_ring->sw_index = 0;

drivers/net/wireless/ath/ath11k/ce.c

975

struct ath11k_ce_pipe *pipe;

drivers/net/wireless/ath/ath11k/ce.c

981

pipe = &ab->ce.ce_pipe[i];

drivers/net/wireless/ath/ath11k/ce.c

986

if (pipe->src_ring) {

drivers/net/wireless/ath/ath11k/ce.c

988

ce_ring = pipe->src_ring;

drivers/net/wireless/ath/ath11k/ce.c

990

pipe->src_ring->nentries * desc_sz +

drivers/net/wireless/ath/ath11k/ce.c

994

kfree(pipe->src_ring);

drivers/net/wireless/ath/ath11k/ce.c

995

pipe->src_ring = NULL;

drivers/net/wireless/ath/ath11k/ce.c

998

if (pipe->dest_ring) {

drivers/net/wireless/ath/ath12k/ce.c

109

static int ath12k_ce_completed_recv_next(struct ath12k_ce_pipe *pipe,

drivers/net/wireless/ath/ath12k/ce.c

11

static int ath12k_ce_rx_buf_enqueue_pipe(struct ath12k_ce_pipe *pipe,

drivers/net/wireless/ath/ath12k/ce.c

112

struct ath12k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath12k/ce.c

121

sw_index = pipe->dest_ring->sw_index;

drivers/net/wireless/ath/ath12k/ce.c

122

nentries_mask = pipe->dest_ring->nentries_mask;

drivers/net/wireless/ath/ath12k/ce.c

124

srng = &ab->hal.srng_list[pipe->status_ring->hal_ring_id];

drivers/net/wireless/ath/ath12k/ce.c

138

*skb = pipe->dest_ring->skb[sw_index];

drivers/net/wireless/ath/ath12k/ce.c

139

pipe->dest_ring->skb[sw_index] = NULL;

drivers/net/wireless/ath/ath12k/ce.c

14

struct ath12k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath12k/ce.c

142

pipe->dest_ring->sw_index = sw_index;

drivers/net/wireless/ath/ath12k/ce.c

144

pipe->rx_buf_needed++;

drivers/net/wireless/ath/ath12k/ce.c

15

struct ath12k_ce_ring *ring = pipe->dest_ring;

drivers/net/wireless/ath/ath12k/ce.c

155

static void ath12k_ce_recv_process_cb(struct ath12k_ce_pipe *pipe)

drivers/net/wireless/ath/ath12k/ce.c

157

struct ath12k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath12k/ce.c

164

while (ath12k_ce_completed_recv_next(pipe, &skb, &nbytes) == 0) {

drivers/net/wireless/ath/ath12k/ce.c

182

pipe->pipe_num, skb->len);

drivers/net/wireless/ath/ath12k/ce.c

183

pipe->recv_cb(ab, skb);

drivers/net/wireless/ath/ath12k/ce.c

186

ret = ath12k_ce_rx_post_pipe(pipe);

drivers/net/wireless/ath/ath12k/ce.c

189

pipe->pipe_num, ret);

drivers/net/wireless/ath/ath12k/ce.c

195

static struct sk_buff *ath12k_ce_completed_send_next(struct ath12k_ce_pipe *pipe)

drivers/net/wireless/ath/ath12k/ce.c

197

struct ath12k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath12k/ce.c

206

sw_index = pipe->src_ring->sw_index;

drivers/net/wireless/ath/ath12k/ce.c

207

nentries_mask = pipe->src_ring->nentries_mask;

drivers/net/wireless/ath/ath12k/ce.c

209

srng = &ab->hal.srng_list[pipe->src_ring->hal_ring_id];

drivers/net/wireless/ath/ath12k/ce.c

221

skb = pipe->src_ring->skb[sw_index];

drivers/net/wireless/ath/ath12k/ce.c

223

pipe->src_ring->skb[sw_index] = NULL;

drivers/net/wireless/ath/ath12k/ce.c

226

pipe->src_ring->sw_index = sw_index;

drivers/net/wireless/ath/ath12k/ce.c

236

static void ath12k_ce_send_done_cb(struct ath12k_ce_pipe *pipe)

drivers/net/wireless/ath/ath12k/ce.c

238

struct ath12k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath12k/ce.c

241

while (!IS_ERR(skb = ath12k_ce_completed_send_next(pipe))) {

drivers/net/wireless/ath/ath12k/ce.c

369

struct ath12k_ce_pipe *pipe = &ab->ce.ce_pipe[ce_id];

drivers/net/wireless/ath/ath12k/ce.c

375

pipe->attr_flags = attr->flags;

drivers/net/wireless/ath/ath12k/ce.c

378

pipe->send_cb = ath12k_ce_send_done_cb;

drivers/net/wireless/ath/ath12k/ce.c

384

pipe->src_ring = ring;

drivers/net/wireless/ath/ath12k/ce.c

388

pipe->recv_cb = attr->recv_cb;

drivers/net/wireless/ath/ath12k/ce.c

394

pipe->dest_ring = ring;

drivers/net/wireless/ath/ath12k/ce.c

400

pipe->status_ring = ring;

drivers/net/wireless/ath/ath12k/ce.c

408

struct ath12k_ce_pipe *pipe = &ab->ce.ce_pipe[ce_id];

drivers/net/wireless/ath/ath12k/ce.c

410

if (pipe->send_cb)

drivers/net/wireless/ath/ath12k/ce.c

411

pipe->send_cb(pipe);

drivers/net/wireless/ath/ath12k/ce.c

413

if (pipe->recv_cb)

drivers/net/wireless/ath/ath12k/ce.c

414

ath12k_ce_recv_process_cb(pipe);

drivers/net/wireless/ath/ath12k/ce.c

419

struct ath12k_ce_pipe *pipe = &ab->ce.ce_pipe[pipe_id];

drivers/net/wireless/ath/ath12k/ce.c

421

if ((pipe->attr_flags & CE_ATTR_DIS_INTR) && pipe->send_cb)

drivers/net/wireless/ath/ath12k/ce.c

422

pipe->send_cb(pipe);

drivers/net/wireless/ath/ath12k/ce.c

428

struct ath12k_ce_pipe *pipe = &ab->ce.ce_pipe[pipe_id];

drivers/net/wireless/ath/ath12k/ce.c

441

if (pipe->attr_flags & CE_ATTR_DIS_INTR) {

drivers/net/wireless/ath/ath12k/ce.c

443

write_index = pipe->src_ring->write_index;

drivers/net/wireless/ath/ath12k/ce.c

445

sw_index = pipe->src_ring->sw_index;

drivers/net/wireless/ath/ath12k/ce.c

450

num_used = pipe->src_ring->nentries - sw_index +

drivers/net/wireless/ath/ath12k/ce.c

456

ath12k_ce_poll_send_completed(ab, pipe->pipe_num);

drivers/net/wireless/ath/ath12k/ce.c

464

write_index = pipe->src_ring->write_index;

drivers/net/wireless/ath/ath12k/ce.c

465

nentries_mask = pipe->src_ring->nentries_mask;

drivers/net/wireless/ath/ath12k/ce.c

467

srng = &ab->hal.srng_list[pipe->src_ring->hal_ring_id];

drivers/net/wireless/ath/ath12k/ce.c

486

if (pipe->attr_flags & CE_ATTR_BYTE_SWAP_DATA)

drivers/net/wireless/ath/ath12k/ce.c

49

pipe->rx_buf_needed--;

drivers/net/wireless/ath/ath12k/ce.c

492

pipe->src_ring->skb[write_index] = skb;

drivers/net/wireless/ath/ath12k/ce.c

493

pipe->src_ring->write_index = CE_RING_IDX_INCR(nentries_mask,

drivers/net/wireless/ath/ath12k/ce.c

506

static void ath12k_ce_rx_pipe_cleanup(struct ath12k_ce_pipe *pipe)

drivers/net/wireless/ath/ath12k/ce.c

508

struct ath12k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath12k/ce.c

509

struct ath12k_ce_ring *ring = pipe->dest_ring;

drivers/net/wireless/ath/ath12k/ce.c

513

if (!(ring && pipe->buf_sz))

drivers/net/wireless/ath/ath12k/ce.c

530

struct ath12k_ce_pipe *pipe;

drivers/net/wireless/ath/ath12k/ce.c

534

pipe = &ab->ce.ce_pipe[pipe_num];

drivers/net/wireless/ath/ath12k/ce.c

535

ath12k_ce_rx_pipe_cleanup(pipe);

drivers/net/wireless/ath/ath12k/ce.c

546

struct ath12k_ce_pipe *pipe;

drivers/net/wireless/ath/ath12k/ce.c

551

pipe = &ab->ce.ce_pipe[i];

drivers/net/wireless/ath/ath12k/ce.c

552

ret = ath12k_ce_rx_post_pipe(pipe);

drivers/net/wireless/ath/ath12k/ce.c

60

static int ath12k_ce_rx_post_pipe(struct ath12k_ce_pipe *pipe)

drivers/net/wireless/ath/ath12k/ce.c

614

struct ath12k_ce_pipe *pipe;

drivers/net/wireless/ath/ath12k/ce.c

62

struct ath12k_base *ab = pipe->ab;

drivers/net/wireless/ath/ath12k/ce.c

622

pipe = &ab->ce.ce_pipe[i];

drivers/net/wireless/ath/ath12k/ce.c

624

if (pipe->src_ring) {

drivers/net/wireless/ath/ath12k/ce.c

625

ret = ath12k_ce_init_ring(ab, pipe->src_ring, i,

drivers/net/wireless/ath/ath12k/ce.c

634

pipe->src_ring->write_index = 0;

drivers/net/wireless/ath/ath12k/ce.c

635

pipe->src_ring->sw_index = 0;

drivers/net/wireless/ath/ath12k/ce.c

638

if (pipe->dest_ring) {

drivers/net/wireless/ath/ath12k/ce.c

639

ret = ath12k_ce_init_ring(ab, pipe->dest_ring, i,

drivers/net/wireless/ath/ath12k/ce.c

648

pipe->rx_buf_needed = pipe->dest_ring->nentries ?

drivers/net/wireless/ath/ath12k/ce.c

649

pipe->dest_ring->nentries - 2 : 0;

drivers/net/wireless/ath/ath12k/ce.c

651

pipe->dest_ring->write_index = 0;

drivers/net/wireless/ath/ath12k/ce.c

652

pipe->dest_ring->sw_index = 0;

drivers/net/wireless/ath/ath12k/ce.c

655

if (pipe->status_ring) {

drivers/net/wireless/ath/ath12k/ce.c

656

ret = ath12k_ce_init_ring(ab, pipe->status_ring, i,

drivers/net/wireless/ath/ath12k/ce.c

665

pipe->status_ring->write_index = 0;

drivers/net/wireless/ath/ath12k/ce.c

666

pipe->status_ring->sw_index = 0;

drivers/net/wireless/ath/ath12k/ce.c

67

if (!(pipe->dest_ring || pipe->status_ring))

drivers/net/wireless/ath/ath12k/ce.c

676

struct ath12k_ce_pipe *pipe;

drivers/net/wireless/ath/ath12k/ce.c

681

pipe = &ab->ce.ce_pipe[i];

drivers/net/wireless/ath/ath12k/ce.c

683

if (pipe->src_ring) {

drivers/net/wireless/ath/ath12k/ce.c

687

pipe->src_ring->nentries * desc_sz +

drivers/net/wireless/ath/ath12k/ce.c

689

pipe->src_ring->base_addr_owner_space_unaligned,

drivers/net/wireless/ath/ath12k/ce.c

690

pipe->src_ring->base_addr_ce_space_unaligned);

drivers/net/wireless/ath/ath12k/ce.c

691

kfree(pipe->src_ring);

drivers/net/wireless/ath/ath12k/ce.c

692

pipe->src_ring = NULL;

drivers/net/wireless/ath/ath12k/ce.c

695

if (pipe->dest_ring) {

drivers/net/wireless/ath/ath12k/ce.c

699

pipe->dest_ring->nentries * desc_sz +

drivers/net/wireless/ath/ath12k/ce.c

701

pipe->dest_ring->base_addr_owner_space_unaligned,

drivers/net/wireless/ath/ath12k/ce.c

702

pipe->dest_ring->base_addr_ce_space_unaligned);

drivers/net/wireless/ath/ath12k/ce.c

703

kfree(pipe->dest_ring);

drivers/net/wireless/ath/ath12k/ce.c

704

pipe->dest_ring = NULL;

drivers/net/wireless/ath/ath12k/ce.c

707

if (pipe->status_ring) {

drivers/net/wireless/ath/ath12k/ce.c

71

while (pipe->rx_buf_needed) {

drivers/net/wireless/ath/ath12k/ce.c

712

pipe->status_ring->nentries * desc_sz +

drivers/net/wireless/ath/ath12k/ce.c

714

pipe->status_ring->base_addr_owner_space_unaligned,

drivers/net/wireless/ath/ath12k/ce.c

715

pipe->status_ring->base_addr_ce_space_unaligned);

drivers/net/wireless/ath/ath12k/ce.c

716

kfree(pipe->status_ring);

drivers/net/wireless/ath/ath12k/ce.c

717

pipe->status_ring = NULL;

drivers/net/wireless/ath/ath12k/ce.c

72

skb = dev_alloc_skb(pipe->buf_sz);

drivers/net/wireless/ath/ath12k/ce.c

724

struct ath12k_ce_pipe *pipe;

drivers/net/wireless/ath/ath12k/ce.c

733

pipe = &ab->ce.ce_pipe[i];

drivers/net/wireless/ath/ath12k/ce.c

734

pipe->pipe_num = i;

drivers/net/wireless/ath/ath12k/ce.c

735

pipe->ab = ab;

drivers/net/wireless/ath/ath12k/ce.c

736

pipe->buf_sz = attr->src_sz_max;

drivers/net/wireless/ath/ath12k/ce.c

92

ret = ath12k_ce_rx_buf_enqueue_pipe(pipe, skb, paddr);

drivers/net/wireless/ath/ath12k/ce.h

160

void (*send_cb)(struct ath12k_ce_pipe *pipe);

drivers/net/wireless/ath/ath6kl/core.c

60

void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe)

drivers/net/wireless/ath/ath6kl/core.c

62

ath6kl_htc_rx_complete(ar, skb, pipe);

drivers/net/wireless/ath/ath6kl/core.h

977

void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);

drivers/net/wireless/ath/ath6kl/hif-ops.h

154

u8 pipe, struct sk_buff *hdr_buf,

drivers/net/wireless/ath/ath6kl/hif-ops.h

159

return ar->hif_ops->pipe_send(ar, pipe, hdr_buf, buf);

drivers/net/wireless/ath/ath6kl/hif-ops.h

180

u8 pipe)

drivers/net/wireless/ath/ath6kl/hif-ops.h

184

return ar->hif_ops->pipe_get_free_queue_number(ar, pipe);

drivers/net/wireless/ath/ath6kl/hif.h

253

int (*pipe_send)(struct ath6kl *ar, u8 pipe, struct sk_buff *hdr_buf,

drivers/net/wireless/ath/ath6kl/hif.h

258

u16 (*pipe_get_free_queue_number)(struct ath6kl *ar, u8 pipe);

drivers/net/wireless/ath/ath6kl/htc-ops.h

107

struct sk_buff *skb, u8 pipe)

drivers/net/wireless/ath/ath6kl/htc-ops.h

109

ar->htc_ops->rx_complete(ar, skb, pipe);

drivers/net/wireless/ath/ath6kl/htc.h

537

} pipe;

drivers/net/wireless/ath/ath6kl/htc.h

578

int (*rx_complete)(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);

drivers/net/wireless/ath/ath6kl/htc.h

636

} pipe;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1043

target->pipe.ctrl_response_valid = true;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1044

target->pipe.ctrl_response_len = min_t(int, netlen,

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1046

memcpy(target->pipe.ctrl_response_buf, netdata,

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1047

target->pipe.ctrl_response_len);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1138

if (target->pipe.ctrl_response_valid) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1139

target->pipe.ctrl_response_valid = false;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1183

INIT_LIST_HEAD(&ep->pipe.tx_lookup_queue);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1186

ep->pipe.tx_credit_flow_enabled = true;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1203

if (target->pipe.txcredit_alloc[i].service_id == service_id)

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1205

target->pipe.txcredit_alloc[i].credit_alloc;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1309

target->pipe.ctrl_response_buf;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1312

(target->pipe.ctrl_response_len < sizeof(*resp_msg))) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1380

&ep->pipe.pipeid_ul,

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1381

&ep->pipe.pipeid_dl);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1387

ep->svc_id, ep->pipe.pipeid_ul,

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1388

ep->pipe.pipeid_dl, ep->eid);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1390

if (disable_credit_flowctrl && ep->pipe.tx_credit_flow_enabled) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1391

ep->pipe.tx_credit_flow_enabled = false;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1444

ath6kl_hif_pipe_get_default(ar, &ep->pipe.pipeid_ul,

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1445

&ep->pipe.pipeid_dl);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1566

if (target->pipe.ctrl_response_len < sizeof(*ready_msg)) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1568

target->pipe.ctrl_response_len);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

1572

ready_msg = (struct htc_ready_ext_msg *) target->pipe.ctrl_response_buf;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

249

list_add_tail(&packet->list, &ep->pipe.tx_lookup_queue);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

254

ep->pipe.pipeid_ul, NULL, skb);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

409

if (!ep->pipe.tx_credit_flow_enabled) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

412

ep->pipe.pipeid_ul);

drivers/net/wireless/ath/ath6kl/htc_pipe.c

453

if (ep->pipe.tx_credit_flow_enabled) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

483

if (!ep->pipe.tx_credit_flow_enabled) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

484

pipeid = ep->pipe.pipeid_ul;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

560

entry = &target->pipe.txcredit_alloc[0];

drivers/net/wireless/ath/ath6kl/htc_pipe.c

638

if (target->pipe.txcredit_alloc[i].service_id != 0) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

642

target->pipe.txcredit_alloc[i].

drivers/net/wireless/ath/ath6kl/htc_pipe.c

644

target->pipe.txcredit_alloc[i].

drivers/net/wireless/ath/ath6kl/htc_pipe.c

725

list_for_each_entry_safe(packet, tmp_pkt, &ep->pipe.tx_lookup_queue,

drivers/net/wireless/ath/ath6kl/htc_pipe.c

767

if (!ep->pipe.tx_credit_flow_enabled) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

817

if (target->pipe.htc_packet_pool == NULL) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

822

packet = target->pipe.htc_packet_pool;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

823

target->pipe.htc_packet_pool = (struct htc_packet *) packet->list.next;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

838

if (target->pipe.htc_packet_pool == NULL) {

drivers/net/wireless/ath/ath6kl/htc_pipe.c

839

target->pipe.htc_packet_pool = packet;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

842

lh = (struct list_head *) target->pipe.htc_packet_pool;

drivers/net/wireless/ath/ath6kl/htc_pipe.c

844

target->pipe.htc_packet_pool = packet;

drivers/net/wireless/ath/ath6kl/usb.c

131

ath6kl_usb_alloc_urb_from_pipe(struct ath6kl_usb_pipe *pipe)

drivers/net/wireless/ath/ath6kl/usb.c

137

if (!pipe->ar_usb)

drivers/net/wireless/ath/ath6kl/usb.c

140

spin_lock_irqsave(&pipe->ar_usb->cs_lock, flags);

drivers/net/wireless/ath/ath6kl/usb.c

141

if (!list_empty(&pipe->urb_list_head)) {

drivers/net/wireless/ath/ath6kl/usb.c

143

list_first_entry(&pipe->urb_list_head,

drivers/net/wireless/ath/ath6kl/usb.c

146

pipe->urb_cnt--;

drivers/net/wireless/ath/ath6kl/usb.c

148

spin_unlock_irqrestore(&pipe->ar_usb->cs_lock, flags);

drivers/net/wireless/ath/ath6kl/usb.c

153

static void ath6kl_usb_free_urb_to_pipe(struct ath6kl_usb_pipe *pipe,

drivers/net/wireless/ath/ath6kl/usb.c

159

if (!pipe->ar_usb)

drivers/net/wireless/ath/ath6kl/usb.c

162

spin_lock_irqsave(&pipe->ar_usb->cs_lock, flags);

drivers/net/wireless/ath/ath6kl/usb.c

163

pipe->urb_cnt++;

drivers/net/wireless/ath/ath6kl/usb.c

165

list_add(&urb_context->link, &pipe->urb_list_head);

drivers/net/wireless/ath/ath6kl/usb.c

166

spin_unlock_irqrestore(&pipe->ar_usb->cs_lock, flags);

drivers/net/wireless/ath/ath6kl/usb.c

174

ath6kl_usb_free_urb_to_pipe(urb_context->pipe, urb_context);

drivers/net/wireless/ath/ath6kl/usb.c

183

static int ath6kl_usb_alloc_pipe_resources(struct ath6kl_usb_pipe *pipe,

drivers/net/wireless/ath/ath6kl/usb.c

189

INIT_LIST_HEAD(&pipe->urb_list_head);

drivers/net/wireless/ath/ath6kl/usb.c

190

init_usb_anchor(&pipe->urb_submitted);

drivers/net/wireless/ath/ath6kl/usb.c

199

urb_context->pipe = pipe;

drivers/net/wireless/ath/ath6kl/usb.c

205

pipe->urb_alloc++;

drivers/net/wireless/ath/ath6kl/usb.c

206

ath6kl_usb_free_urb_to_pipe(pipe, urb_context);

drivers/net/wireless/ath/ath6kl/usb.c

211

pipe->logical_pipe_num, pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath6kl/usb.c

212

pipe->urb_alloc);

drivers/net/wireless/ath/ath6kl/usb.c

218

static void ath6kl_usb_free_pipe_resources(struct ath6kl_usb_pipe *pipe)

drivers/net/wireless/ath/ath6kl/usb.c

222

if (pipe->ar_usb == NULL) {

drivers/net/wireless/ath/ath6kl/usb.c

230

pipe->logical_pipe_num, pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath6kl/usb.c

231

pipe->urb_alloc, pipe->urb_cnt);

drivers/net/wireless/ath/ath6kl/usb.c

233

if (pipe->urb_alloc != pipe->urb_cnt) {

drivers/net/wireless/ath/ath6kl/usb.c

237

pipe->logical_pipe_num, pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath6kl/usb.c

238

pipe->urb_alloc, pipe->urb_cnt);

drivers/net/wireless/ath/ath6kl/usb.c

242

urb_context = ath6kl_usb_alloc_urb_from_pipe(pipe);

drivers/net/wireless/ath/ath6kl/usb.c

308

struct ath6kl_usb_pipe *pipe;

drivers/net/wireless/ath/ath6kl/usb.c

357

pipe = &ar_usb->pipes[pipe_num];

drivers/net/wireless/ath/ath6kl/usb.c

358

if (pipe->ar_usb != NULL) {

drivers/net/wireless/ath/ath6kl/usb.c

363

pipe->ar_usb = ar_usb;

drivers/net/wireless/ath/ath6kl/usb.c

364

pipe->logical_pipe_num = pipe_num;

drivers/net/wireless/ath/ath6kl/usb.c

365

pipe->ep_address = endpoint->bEndpointAddress;

drivers/net/wireless/ath/ath6kl/usb.c

366

pipe->max_packet_size = le16_to_cpu(endpoint->wMaxPacketSize);

drivers/net/wireless/ath/ath6kl/usb.c

369

if (ATH6KL_USB_IS_DIR_IN(pipe->ep_address)) {

drivers/net/wireless/ath/ath6kl/usb.c

370

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath6kl/usb.c

372

pipe->ep_address);

drivers/net/wireless/ath/ath6kl/usb.c

374

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath6kl/usb.c

376

pipe->ep_address);

drivers/net/wireless/ath/ath6kl/usb.c

379

if (ATH6KL_USB_IS_DIR_IN(pipe->ep_address)) {

drivers/net/wireless/ath/ath6kl/usb.c

380

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath6kl/usb.c

382

pipe->ep_address);

drivers/net/wireless/ath/ath6kl/usb.c

384

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath6kl/usb.c

386

pipe->ep_address);

drivers/net/wireless/ath/ath6kl/usb.c

390

if (ATH6KL_USB_IS_DIR_IN(pipe->ep_address)) {

drivers/net/wireless/ath/ath6kl/usb.c

391

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath6kl/usb.c

393

pipe->ep_address);

drivers/net/wireless/ath/ath6kl/usb.c

395

pipe->usb_pipe_handle =

drivers/net/wireless/ath/ath6kl/usb.c

397

pipe->ep_address);

drivers/net/wireless/ath/ath6kl/usb.c

401

pipe->ep_desc = endpoint;

drivers/net/wireless/ath/ath6kl/usb.c

403

if (!ATH6KL_USB_IS_DIR_IN(pipe->ep_address))

drivers/net/wireless/ath/ath6kl/usb.c

404

pipe->flags |= ATH6KL_USB_PIPE_FLAG_TX;

drivers/net/wireless/ath/ath6kl/usb.c

406

status = ath6kl_usb_alloc_pipe_resources(pipe, urbcount);

drivers/net/wireless/ath/ath6kl/usb.c

505

struct ath6kl_usb_pipe *pipe = urb_context->pipe;

drivers/net/wireless/ath/ath6kl/usb.c

511

pipe->logical_pipe_num, urb->status, urb->actual_length,

drivers/net/wireless/ath/ath6kl/usb.c

529

__func__, pipe->logical_pipe_num,

drivers/net/wireless/ath/ath6kl/usb.c

530

pipe->ep_address, urb->status);

drivers/net/wireless/ath/ath6kl/usb.c

546

skb_queue_tail(&pipe->io_comp_queue, skb);

drivers/net/wireless/ath/ath6kl/usb.c

547

queue_work(pipe->ar_usb->wq, &pipe->io_complete_work);

drivers/net/wireless/ath/ath6kl/usb.c

553

pipe->urb_cnt >= pipe->urb_cnt_thresh) {

drivers/net/wireless/ath/ath6kl/usb.c

555

ath6kl_usb_post_recv_transfers(pipe, ATH6KL_USB_RX_BUFFER_SIZE);

drivers/net/wireless/ath/ath6kl/usb.c

562

struct ath6kl_usb_pipe *pipe = urb_context->pipe;

drivers/net/wireless/ath/ath6kl/usb.c

567

__func__, pipe->logical_pipe_num, urb->status,

drivers/net/wireless/ath/ath6kl/usb.c

573

__func__, pipe->logical_pipe_num, urb->status);

drivers/net/wireless/ath/ath6kl/usb.c

578

ath6kl_usb_free_urb_to_pipe(urb_context->pipe, urb_context);

drivers/net/wireless/ath/ath6kl/usb.c

581

skb_queue_tail(&pipe->io_comp_queue, skb);

drivers/net/wireless/ath/ath6kl/usb.c

582

queue_work(pipe->ar_usb->wq, &pipe->io_complete_work);

drivers/net/wireless/ath/ath6kl/usb.c

587

struct ath6kl_usb_pipe *pipe = container_of(work,

drivers/net/wireless/ath/ath6kl/usb.c

593

ar_usb = pipe->ar_usb;

drivers/net/wireless/ath/ath6kl/usb.c

595

while ((skb = skb_dequeue(&pipe->io_comp_queue))) {

drivers/net/wireless/ath/ath6kl/usb.c

596

if (pipe->flags & ATH6KL_USB_PIPE_FLAG_TX) {

drivers/net/wireless/ath/ath6kl/usb.c

604

pipe->logical_pipe_num);

drivers/net/wireless/ath/ath6kl/usb.c

631

struct ath6kl_usb_pipe *pipe;

drivers/net/wireless/ath/ath6kl/usb.c

651

pipe = &ar_usb->pipes[i];

drivers/net/wireless/ath/ath6kl/usb.c

652

INIT_WORK(&pipe->io_complete_work,

drivers/net/wireless/ath/ath6kl/usb.c

654

skb_queue_head_init(&pipe->io_comp_queue);

drivers/net/wireless/ath/ath6kl/usb.c

716

struct ath6kl_usb_pipe *pipe = &device->pipes[PipeID];

drivers/net/wireless/ath/ath6kl/usb.c

726

urb_context = ath6kl_usb_alloc_urb_from_pipe(pipe);

drivers/net/wireless/ath/ath6kl/usb.c

735

__func__, PipeID, pipe->urb_cnt);

drivers/net/wireless/ath/ath6kl/usb.c

748

ath6kl_usb_free_urb_to_pipe(urb_context->pipe,

drivers/net/wireless/ath/ath6kl/usb.c

755

pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath6kl/usb.c

760

if ((len % pipe->max_packet_size) == 0) {

drivers/net/wireless/ath/ath6kl/usb.c

767

pipe->logical_pipe_num, pipe->usb_pipe_handle,

drivers/net/wireless/ath/ath6kl/usb.c

768

pipe->ep_address, len);

drivers/net/wireless/ath/ath6kl/usb.c

770

usb_anchor_urb(urb, &pipe->urb_submitted);

drivers/net/wireless/ath/ath6kl/usb.c

778

ath6kl_usb_free_urb_to_pipe(urb_context->pipe,

drivers/net/wireless/ath/ath6kl/usb.c

80

struct ath6kl_usb_pipe *pipe;

drivers/net/wireless/ath/ath9k/htc_hst.h

39

int (*send) (void *hif_handle, u8 pipe, struct sk_buff *buf);

drivers/net/wireless/mediatek/mt76/mt76.h

1806

unsigned int pipe;

drivers/net/wireless/mediatek/mt76/mt76.h

1809

pipe = usb_rcvbulkpipe(udev, usb->in_ep[ep]);

drivers/net/wireless/mediatek/mt76/mt76.h

1811

pipe = usb_sndbulkpipe(udev, usb->out_ep[ep]);

drivers/net/wireless/mediatek/mt76/mt76.h

1813

return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout);

drivers/net/wireless/mediatek/mt76/usb.c

23

unsigned int pipe;

drivers/net/wireless/mediatek/mt76/usb.c

28

pipe = (req_type & USB_DIR_IN) ? usb_rcvctrlpipe(udev, 0)

drivers/net/wireless/mediatek/mt76/usb.c

34

ret = usb_control_msg(udev, pipe, req, req_type, val,

drivers/net/wireless/mediatek/mt76/usb.c

424

unsigned int pipe;

drivers/net/wireless/mediatek/mt76/usb.c

427

pipe = usb_rcvbulkpipe(udev, dev->usb.in_ep[index]);

drivers/net/wireless/mediatek/mt76/usb.c

429

pipe = usb_sndbulkpipe(udev, dev->usb.out_ep[index]);

drivers/net/wireless/mediatek/mt76/usb.c

432

urb->pipe = pipe;

drivers/net/wireless/mediatek/mt76/usb_trace.h

58

DEV_ENTRY __field(unsigned int, pipe) __field(u32, len)

drivers/net/wireless/mediatek/mt76/usb_trace.h

62

__entry->pipe = u->pipe;

drivers/net/wireless/mediatek/mt76/usb_trace.h

66

DEV_PR_ARG, __entry->pipe, __entry->len)

drivers/net/wireless/mediatek/mt7601u/dma.c

403

unsigned pipe;

drivers/net/wireless/mediatek/mt7601u/dma.c

406

pipe = usb_rcvbulkpipe(usb_dev, dev->in_eps[MT_EP_IN_PKT_RX]);

drivers/net/wireless/mediatek/mt7601u/dma.c

408

usb_fill_bulk_urb(e->urb, usb_dev, pipe, buf, MT_RX_URB_SIZE,

drivers/net/wireless/mediatek/mt7601u/trace.h

101

TP_ARGS(dev, pipe, req, req_type, val, offset, buf, buflen, ret),

drivers/net/wireless/mediatek/mt7601u/trace.h

104

__field(unsigned, pipe) __field(u8, req) __field(u8, req_type)

drivers/net/wireless/mediatek/mt7601u/trace.h

110

__entry->pipe = pipe;

drivers/net/wireless/mediatek/mt7601u/trace.h

121

DEV_PR_ARG, __entry->ret, __entry->pipe, __entry->req,

drivers/net/wireless/mediatek/mt7601u/trace.h

60

DEV_ENTRY __field(unsigned, pipe) __field(u32, len)

drivers/net/wireless/mediatek/mt7601u/trace.h

64

__entry->pipe = u->pipe;

drivers/net/wireless/mediatek/mt7601u/trace.h

68

DEV_PR_ARG, __entry->pipe, __entry->len)

drivers/net/wireless/mediatek/mt7601u/trace.h

73

u.pipe = __pipe; \

drivers/net/wireless/mediatek/mt7601u/trace.h

99

TP_PROTO(struct mt7601u_dev *dev, unsigned pipe, u8 req, u8 req_type,

drivers/net/wireless/mediatek/mt7601u/usb.c

102

trace_mt_vend_req(dev, pipe, req, req_type, val, offset,

drivers/net/wireless/mediatek/mt7601u/usb.c

60

unsigned pipe;

drivers/net/wireless/mediatek/mt7601u/usb.c

64

pipe = usb_rcvbulkpipe(usb_dev, dev->in_eps[ep_idx]);

drivers/net/wireless/mediatek/mt7601u/usb.c

66

pipe = usb_sndbulkpipe(usb_dev, dev->out_eps[ep_idx]);

drivers/net/wireless/mediatek/mt7601u/usb.c

68

usb_fill_bulk_urb(buf->urb, usb_dev, pipe, buf->buf, buf->len,

drivers/net/wireless/mediatek/mt7601u/usb.c

95

const unsigned int pipe = (direction == USB_DIR_IN) ?

drivers/net/wireless/mediatek/mt7601u/usb.c

99

ret = usb_control_msg(usb_dev, pipe, req, req_type,

drivers/net/wireless/ralink/rt2x00/rt2500usb.c

1124

int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);

drivers/net/wireless/ralink/rt2x00/rt2500usb.c

1159

usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,

drivers/net/wireless/ralink/rt2x00/rt2500usb.c

1169

usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,

drivers/net/wireless/ralink/rt2x00/rt2x00usb.c

53

unsigned int pipe =

drivers/net/wireless/ralink/rt2x00/rt2x00usb.c

583

int pipe;

drivers/net/wireless/ralink/rt2x00/rt2x00usb.c

588

pipe = usb_rcvbulkpipe(usb_dev, queue->usb_endpoint);

drivers/net/wireless/ralink/rt2x00/rt2x00usb.c

589

queue->usb_maxpacket = usb_maxpacket(usb_dev, pipe);

drivers/net/wireless/ralink/rt2x00/rt2x00usb.c

591

pipe = usb_sndbulkpipe(usb_dev, queue->usb_endpoint);

drivers/net/wireless/ralink/rt2x00/rt2x00usb.c

592

queue->usb_maxpacket = usb_maxpacket(usb_dev, pipe);

drivers/net/wireless/ralink/rt2x00/rt2x00usb.c

62

status = usb_control_msg(usb_dev, pipe, request, requesttype,

drivers/net/wireless/realtek/rtlwifi/usb.c

31

unsigned int pipe;

drivers/net/wireless/realtek/rtlwifi/usb.c

37

pipe = usb_rcvctrlpipe(udev, 0); /* read_in */

drivers/net/wireless/realtek/rtlwifi/usb.c

39

pipe = usb_sndctrlpipe(udev, 0); /* write_out */

drivers/net/wireless/realtek/rtlwifi/usb.c

42

status = usb_control_msg(udev, pipe, REALTEK_USB_VENQT_CMD_REQ,

drivers/net/wireless/realtek/rtw88/usb.c

371

unsigned int pipe;

drivers/net/wireless/realtek/rtw88/usb.c

378

pipe = usb_sndbulkpipe(usbd, rtwusb->out_ep[ep]);

drivers/net/wireless/realtek/rtw88/usb.c

383

usb_fill_bulk_urb(urb, usbd, pipe, skb->data, skb->len, cb, context);

drivers/net/wireless/realtek/rtw89/usb.c

19

unsigned int pipe;

drivers/net/wireless/realtek/rtw89/usb.c

243

unsigned int pipe;

drivers/net/wireless/realtek/rtw89/usb.c

253

pipe = usb_sndbulkpipe(usbd, rtwusb->out_pipe[bulkout_id]);

drivers/net/wireless/realtek/rtw89/usb.c

255

usb_fill_bulk_urb(urb, usbd, pipe, data, len,

drivers/net/wireless/realtek/rtw89/usb.c

33

pipe = usb_rcvctrlpipe(udev, 0);

drivers/net/wireless/realtek/rtw89/usb.c

35

pipe = usb_sndctrlpipe(udev, 0);

drivers/net/wireless/realtek/rtw89/usb.c

40

ret = usb_control_msg(udev, pipe, RTW89_USB_VENQT, reqtype,

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1582

unsigned int pipe;

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1584

pipe = usb_sndintpipe(udev, EP_REGS_OUT);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1585

ep = usb_pipe_endpoint(udev, pipe);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1590

return usb_interrupt_msg(udev, pipe, data, len,

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1593

pipe = usb_sndbulkpipe(udev, EP_REGS_OUT);

drivers/net/wireless/zydas/zd1211rw/zd_usb.c

1594

return usb_bulk_msg(udev, pipe, data, len, actual_length,

drivers/net/wwan/iosm/iosm_ipc_imem.c

1184

void ipc_imem_pipe_cleanup(struct iosm_imem *ipc_imem, struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_imem.c

1191

pipe->is_open = false;

drivers/net/wwan/iosm/iosm_ipc_imem.c

1194

while ((skb = skb_dequeue(&pipe->channel->ul_list)))

drivers/net/wwan/iosm/iosm_ipc_imem.c

1197

ipc_protocol_pipe_cleanup(ipc_imem->ipc_protocol, pipe);

drivers/net/wwan/iosm/iosm_ipc_imem.c

225

struct ipc_pipe *pipe;

drivers/net/wwan/iosm/iosm_ipc_imem.c

235

pipe = &channel->ul_pipe;

drivers/net/wwan/iosm/iosm_ipc_imem.c

244

pipe, ul_list);

drivers/net/wwan/iosm/iosm_ipc_imem.c

248

pipe, ul_list);

drivers/net/wwan/iosm/iosm_ipc_imem.c

299

struct ipc_pipe *pipe, struct sk_buff *skb)

drivers/net/wwan/iosm/iosm_ipc_imem.c

307

switch (pipe->channel->ctype) {

drivers/net/wwan/iosm/iosm_ipc_imem.c

309

port_id = pipe->channel->channel_id;

drivers/net/wwan/iosm/iosm_ipc_imem.c

324

if (pipe->channel->if_id == IPC_MEM_MUX_IP_CH_IF_ID)

drivers/net/wwan/iosm/iosm_ipc_imem.c

335

struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_imem.c

343

channel = pipe->channel;

drivers/net/wwan/iosm/iosm_ipc_imem.c

345

ipc_protocol_get_head_tail_index(ipc_imem->ipc_protocol, pipe, &head,

drivers/net/wwan/iosm/iosm_ipc_imem.c

347

if (pipe->old_tail != tail) {

drivers/net/wwan/iosm/iosm_ipc_imem.c

348

if (pipe->old_tail < tail)

drivers/net/wwan/iosm/iosm_ipc_imem.c

349

cnt = tail - pipe->old_tail;

drivers/net/wwan/iosm/iosm_ipc_imem.c

351

cnt = pipe->nr_of_entries - pipe->old_tail + tail;

drivers/net/wwan/iosm/iosm_ipc_imem.c

358

skb = ipc_protocol_dl_td_process(ipc_imem->ipc_protocol, pipe);

drivers/net/wwan/iosm/iosm_ipc_imem.c

361

ipc_imem_dl_skb_process(ipc_imem, pipe, skb);

drivers/net/wwan/iosm/iosm_ipc_imem.c

365

while (ipc_imem_dl_skb_alloc(ipc_imem, pipe))

drivers/net/wwan/iosm/iosm_ipc_imem.c

382

if (processed && (processed_td_cnt == pipe->nr_of_entries - 1)) {

drivers/net/wwan/iosm/iosm_ipc_imem.c

39

struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_imem.c

395

struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_imem.c

402

channel = pipe->channel;

drivers/net/wwan/iosm/iosm_ipc_imem.c

405

ipc_protocol_get_head_tail_index(ipc_imem->ipc_protocol, pipe, &head,

drivers/net/wwan/iosm/iosm_ipc_imem.c

408

if (pipe->old_tail != tail) {

drivers/net/wwan/iosm/iosm_ipc_imem.c

409

if (pipe->old_tail < tail)

drivers/net/wwan/iosm/iosm_ipc_imem.c

410

cnt = tail - pipe->old_tail;

drivers/net/wwan/iosm/iosm_ipc_imem.c

412

cnt = pipe->nr_of_entries - pipe->old_tail + tail;

drivers/net/wwan/iosm/iosm_ipc_imem.c

417

skb = ipc_protocol_ul_td_process(ipc_imem->ipc_protocol, pipe);

drivers/net/wwan/iosm/iosm_ipc_imem.c

42

if (pipe->nr_of_queued_entries >= pipe->max_nr_of_queued_entries)

drivers/net/wwan/iosm/iosm_ipc_imem.c

442

if (ipc_imem_check_wwan_ips(pipe->channel))

drivers/net/wwan/iosm/iosm_ipc_imem.c

45

return ipc_protocol_dl_td_prepare(ipc_imem->ipc_protocol, pipe);

drivers/net/wwan/iosm/iosm_ipc_imem.c

59

struct ipc_pipe *pipe = &ipc_imem->channels[i].dl_pipe;

drivers/net/wwan/iosm/iosm_ipc_imem.c

61

if (!pipe->is_open || pipe->nr_of_queued_entries > 0)

drivers/net/wwan/iosm/iosm_ipc_imem.c

64

while (ipc_imem_dl_skb_alloc(ipc_imem, pipe))

drivers/net/wwan/iosm/iosm_ipc_imem.c

67

if (pipe->nr_of_queued_entries == 0)

drivers/net/wwan/iosm/iosm_ipc_imem.c

864

struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_imem.c

867

.pipe_open.pipe = pipe,

drivers/net/wwan/iosm/iosm_ipc_imem.c

872

pipe->is_open = true;

drivers/net/wwan/iosm/iosm_ipc_imem.c

874

return pipe->is_open;

drivers/net/wwan/iosm/iosm_ipc_imem.c

951

void ipc_imem_pipe_close(struct iosm_imem *ipc_imem, struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_imem.c

953

union ipc_msg_prep_args prep_args = { .pipe_close.pipe = pipe };

drivers/net/wwan/iosm/iosm_ipc_imem.c

955

pipe->is_open = false;

drivers/net/wwan/iosm/iosm_ipc_imem.c

959

ipc_imem_pipe_cleanup(ipc_imem, pipe);

drivers/net/wwan/iosm/iosm_ipc_imem.h

523

void ipc_imem_pipe_cleanup(struct iosm_imem *ipc_imem, struct ipc_pipe *pipe);

drivers/net/wwan/iosm/iosm_ipc_imem.h

530

void ipc_imem_pipe_close(struct iosm_imem *ipc_imem, struct ipc_pipe *pipe);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

100

msg->open_pipe.irq_vector = cpu_to_le32(pipe->irq);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

111

struct ipc_pipe *pipe = args->pipe_close.pipe;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

117

msg->close_pipe.pipe_nr = pipe->pipe_nr;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

219

struct ipc_pipe *pipe,

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

237

head = le32_to_cpu(ipc_protocol->p_ap_shm->head_array[pipe->pipe_nr]);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

238

tail = pipe->old_tail;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

245

pipe->nr_of_entries - head + ((s32)tail - 1);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

250

pipe->pipe_nr);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

255

td = &pipe->tdr_start[head];

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

265

pipe->skbr_start[head] = skb;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

271

pipe->nr_of_queued_entries++;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

275

if (head >= pipe->nr_of_entries)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

278

ipc_protocol->p_ap_shm->head_array[pipe->pipe_nr] =

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

282

if (pipe->old_head != head) {

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

283

dev_dbg(ipc_protocol->dev, "New UL TDs Pipe:%d", pipe->pipe_nr);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

285

pipe->old_head = head;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

295

struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

297

struct ipc_protocol_td *p_td = &pipe->tdr_start[pipe->old_tail];

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

298

struct sk_buff *skb = pipe->skbr_start[pipe->old_tail];

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

300

pipe->nr_of_queued_entries--;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

301

pipe->old_tail++;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

302

if (pipe->old_tail >= pipe->nr_of_entries)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

303

pipe->old_tail = 0;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

313

pipe->pipe_nr);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

324

struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

335

head = le32_to_cpu(ipc_protocol->p_ap_shm->head_array[pipe->pipe_nr]);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

336

tail = le32_to_cpu(ipc_protocol->p_ap_shm->tail_array[pipe->pipe_nr]);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

339

if (new_head >= pipe->nr_of_entries)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

346

td = &pipe->tdr_start[head];

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

349

skb = ipc_pcie_alloc_skb(ipc_protocol->pcie, pipe->buf_size, GFP_ATOMIC,

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

356

td->scs = cpu_to_le32(pipe->buf_size) & cpu_to_le32(SIZE_MASK);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

360

ipc_protocol->p_ap_shm->head_array[pipe->pipe_nr] =

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

364

pipe->skbr_start[head] = skb;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

366

pipe->nr_of_queued_entries++;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

373

struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

378

if (!pipe->tdr_start)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

382

p_td = &pipe->tdr_start[pipe->old_tail];

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

383

skb = pipe->skbr_start[pipe->old_tail];

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

386

pipe->skbr_start[pipe->old_tail] = NULL;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

388

pipe->nr_of_queued_entries--;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

390

pipe->old_tail++;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

391

if (pipe->old_tail >= pipe->nr_of_entries)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

392

pipe->old_tail = 0;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

410

} else if ((le32_to_cpu(p_td->scs) & SIZE_MASK) > pipe->buf_size) {

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

413

pipe->buf_size);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

434

struct ipc_pipe *pipe, u32 *head,

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

440

*head = le32_to_cpu(ipc_ap_shm->head_array[pipe->pipe_nr]);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

443

*tail = le32_to_cpu(ipc_ap_shm->tail_array[pipe->pipe_nr]);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

448

struct ipc_pipe *pipe)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

455

head = le32_to_cpu(ipc_protocol->p_ap_shm->head_array[pipe->pipe_nr]);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

456

tail = pipe->old_tail;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

459

ipc_protocol->p_ap_shm->tail_array[pipe->pipe_nr] = 0;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

460

ipc_protocol->p_ap_shm->head_array[pipe->pipe_nr] = 0;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

463

if (pipe->skbr_start) {

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

468

skb = pipe->skbr_start[tail];

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

473

if (tail >= pipe->nr_of_entries)

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

477

kfree(pipe->skbr_start);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

478

pipe->skbr_start = NULL;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

481

pipe->old_tail = 0;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

484

if (pipe->tdr_start) {

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

486

sizeof(*pipe->tdr_start) * pipe->nr_of_entries,

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

487

pipe->tdr_start, pipe->phy_tdr_start);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

489

pipe->tdr_start = NULL;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

59

struct ipc_pipe *pipe = args->pipe_open.pipe;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

72

skbr = kzalloc_objs(*skbr, pipe->nr_of_entries, GFP_ATOMIC);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

78

pipe->nr_of_entries * sizeof(*tdr),

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

79

&pipe->phy_tdr_start, GFP_ATOMIC);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

86

pipe->max_nr_of_queued_entries = pipe->nr_of_entries - 1;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

87

pipe->nr_of_queued_entries = 0;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

88

pipe->tdr_start = tdr;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

89

pipe->skbr_start = skbr;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

90

pipe->old_tail = 0;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

92

ipc_protocol->p_ap_shm->head_array[pipe->pipe_nr] = 0;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

95

msg->open_pipe.pipe_nr = pipe->pipe_nr;

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

96

msg->open_pipe.tdr_addr = cpu_to_le64(pipe->phy_tdr_start);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

97

msg->open_pipe.tdr_entries = cpu_to_le16(pipe->nr_of_entries);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c

99

cpu_to_le32(pipe->accumulation_backoff);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h

365

struct ipc_pipe *pipe,

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h

376

struct ipc_pipe *pipe);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h

386

struct ipc_pipe *pipe);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h

396

struct ipc_pipe *pipe);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h

407

struct ipc_pipe *pipe, u32 *head,

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h

424

struct ipc_pipe *pipe);

drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h

49

struct ipc_pipe *pipe;

drivers/nfc/microread/microread.c

547

static int microread_event_received(struct nfc_hci_dev *hdev, u8 pipe,

drivers/nfc/microread/microread.c

551

u8 gate = hdev->pipes[pipe].gate;

drivers/nfc/nfcmrvl/usb.c

107

unsigned int pipe;

drivers/nfc/nfcmrvl/usb.c

123

pipe = usb_rcvbulkpipe(drv_data->udev,

drivers/nfc/nfcmrvl/usb.c

126

usb_fill_bulk_urb(urb, drv_data->udev, pipe, buf, size,

drivers/nfc/nfcmrvl/usb.c

225

unsigned int pipe;

drivers/nfc/nfcmrvl/usb.c

235

pipe = usb_sndbulkpipe(drv_data->udev,

drivers/nfc/nfcmrvl/usb.c

238

usb_fill_bulk_urb(urb, drv_data->udev, pipe, skb->data, skb->len,

drivers/nfc/pn533/usb.c

403

rc = usb_bulk_msg(phy->udev, phy->out_urb->pipe, buffer, sizeof(cmd),

drivers/nfc/pn544/pn544.c

715

static int pn544_hci_event_received(struct nfc_hci_dev *hdev, u8 pipe, u8 event,

drivers/nfc/pn544/pn544.c

719

u8 gate = hdev->pipes[pipe].gate;

drivers/nfc/st-nci/se.c

226

ndev->hci_dev->init_data.gates[j].pipe = pipe_info[2];

drivers/nfc/st-nci/se.c

382

void st_nci_hci_event_received(struct nci_dev *ndev, u8 pipe,

drivers/nfc/st-nci/se.c

385

u8 gate = ndev->hci_dev->pipes[pipe].gate;

drivers/nfc/st-nci/se.c

386

u8 host = ndev->hci_dev->pipes[pipe].host;

drivers/nfc/st-nci/se.c

402

void st_nci_hci_cmd_received(struct nci_dev *ndev, u8 pipe, u8 cmd,

drivers/nfc/st-nci/se.c

406

u8 gate = ndev->hci_dev->pipes[pipe].gate;

drivers/nfc/st-nci/se.c

413

ndev->hci_dev->pipes[pipe].host != ST_NCI_UICC_HOST_ID)

drivers/nfc/st-nci/st-nci.h

135

void st_nci_hci_event_received(struct nci_dev *ndev, u8 pipe,

drivers/nfc/st-nci/st-nci.h

137

void st_nci_hci_cmd_received(struct nci_dev *ndev, u8 pipe, u8 cmd,

drivers/nfc/st21nfca/core.c

181

hdev->init_data.gates[j].pipe = pipe_info[2];

drivers/nfc/st21nfca/core.c

832

static void st21nfca_hci_cmd_received(struct nfc_hci_dev *hdev, u8 pipe, u8 cmd,

drivers/nfc/st21nfca/core.c

836

u8 gate = hdev->pipes[pipe].gate;

drivers/nfc/st21nfca/core.c

843

hdev->pipes[pipe].dest_host != NFC_HCI_UICC_HOST_ID)

drivers/nfc/st21nfca/core.c

889

static int st21nfca_hci_event_received(struct nfc_hci_dev *hdev, u8 pipe,

drivers/nfc/st21nfca/core.c

892

u8 gate = hdev->pipes[pipe].gate;

drivers/nfc/st21nfca/core.c

893

u8 host = hdev->pipes[pipe].dest_host;

drivers/platform/goldfish/goldfish_pipe.c

217

static int goldfish_pipe_cmd_locked(struct goldfish_pipe *pipe,

drivers/platform/goldfish/goldfish_pipe.c

220

pipe->command_buffer->cmd = cmd;

drivers/platform/goldfish/goldfish_pipe.c

222

pipe->command_buffer->status = PIPE_ERROR_INVAL;

drivers/platform/goldfish/goldfish_pipe.c

223

writel(pipe->id, pipe->dev->base + PIPE_REG_CMD);

drivers/platform/goldfish/goldfish_pipe.c

224

return pipe->command_buffer->status;

drivers/platform/goldfish/goldfish_pipe.c

227

static int goldfish_pipe_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)

drivers/platform/goldfish/goldfish_pipe.c

231

if (mutex_lock_interruptible(&pipe->lock))

drivers/platform/goldfish/goldfish_pipe.c

233

status = goldfish_pipe_cmd_locked(pipe, cmd);

drivers/platform/goldfish/goldfish_pipe.c

234

mutex_unlock(&pipe->lock);

drivers/platform/goldfish/goldfish_pipe.c

324

static int transfer_max_buffers(struct goldfish_pipe *pipe,

drivers/platform/goldfish/goldfish_pipe.c

338

if (mutex_lock_interruptible(&pipe->lock))

drivers/platform/goldfish/goldfish_pipe.c

343

pipe->pages, &iter_last_page_size);

drivers/platform/goldfish/goldfish_pipe.c

345

mutex_unlock(&pipe->lock);

drivers/platform/goldfish/goldfish_pipe.c

349

populate_rw_params(pipe->pages, pages_count, address, address_end,

drivers/platform/goldfish/goldfish_pipe.c

351

pipe->command_buffer);

drivers/platform/goldfish/goldfish_pipe.c

354

*status = goldfish_pipe_cmd_locked(pipe,

drivers/platform/goldfish/goldfish_pipe.c

357

*consumed_size = pipe->command_buffer->rw_params.consumed_size;

drivers/platform/goldfish/goldfish_pipe.c

359

unpin_user_pages_dirty_lock(pipe->pages, pages_count,

drivers/platform/goldfish/goldfish_pipe.c

362

mutex_unlock(&pipe->lock);

drivers/platform/goldfish/goldfish_pipe.c

366

static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write)

drivers/platform/goldfish/goldfish_pipe.c

370

set_bit(wake_bit, &pipe->flags);

drivers/platform/goldfish/goldfish_pipe.c

373

goldfish_pipe_cmd(pipe,

drivers/platform/goldfish/goldfish_pipe.c

376

while (test_bit(wake_bit, &pipe->flags)) {

drivers/platform/goldfish/goldfish_pipe.c

377

if (wait_event_interruptible(pipe->wake_queue,

drivers/platform/goldfish/goldfish_pipe.c

378

!test_bit(wake_bit, &pipe->flags)))

drivers/platform/goldfish/goldfish_pipe.c

381

if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))

drivers/platform/goldfish/goldfish_pipe.c

393

struct goldfish_pipe *pipe = filp->private_data;

drivers/platform/goldfish/goldfish_pipe.c

399

if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)))

drivers/platform/goldfish/goldfish_pipe.c

417

ret = transfer_max_buffers(pipe, address, address_end, is_write,

drivers/platform/goldfish/goldfish_pipe.c

445

dev_err_ratelimited(pipe->dev->pdev_dev,

drivers/platform/goldfish/goldfish_pipe.c

461

status = wait_for_host_signal(pipe, is_write);

drivers/platform/goldfish/goldfish_pipe.c

491

struct goldfish_pipe *pipe = filp->private_data;

drivers/platform/goldfish/goldfish_pipe.c

495

poll_wait(filp, &pipe->wake_queue, wait);

drivers/platform/goldfish/goldfish_pipe.c

497

status = goldfish_pipe_cmd(pipe, PIPE_CMD_POLL);

drivers/platform/goldfish/goldfish_pipe.c

507

if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))

drivers/platform/goldfish/goldfish_pipe.c

516

struct goldfish_pipe *pipe;

drivers/platform/goldfish/goldfish_pipe.c

521

pipe = dev->pipes[id];

drivers/platform/goldfish/goldfish_pipe.c

522

if (!pipe)

drivers/platform/goldfish/goldfish_pipe.c

524

pipe->signalled_flags |= flags;

drivers/platform/goldfish/goldfish_pipe.c

526

if (pipe->prev_signalled || pipe->next_signalled ||

drivers/platform/goldfish/goldfish_pipe.c

527

dev->first_signalled_pipe == pipe)

drivers/platform/goldfish/goldfish_pipe.c

529

pipe->next_signalled = dev->first_signalled_pipe;

drivers/platform/goldfish/goldfish_pipe.c

531

dev->first_signalled_pipe->prev_signalled = pipe;

drivers/platform/goldfish/goldfish_pipe.c

532

dev->first_signalled_pipe = pipe;

drivers/platform/goldfish/goldfish_pipe.c

536

struct goldfish_pipe *pipe)

drivers/platform/goldfish/goldfish_pipe.c

538

if (pipe->prev_signalled)

drivers/platform/goldfish/goldfish_pipe.c

539

pipe->prev_signalled->next_signalled = pipe->next_signalled;

drivers/platform/goldfish/goldfish_pipe.c

540

if (pipe->next_signalled)

drivers/platform/goldfish/goldfish_pipe.c

541

pipe->next_signalled->prev_signalled = pipe->prev_signalled;

drivers/platform/goldfish/goldfish_pipe.c

542

if (pipe == dev->first_signalled_pipe)

drivers/platform/goldfish/goldfish_pipe.c

543

dev->first_signalled_pipe = pipe->next_signalled;

drivers/platform/goldfish/goldfish_pipe.c

544

pipe->prev_signalled = NULL;

drivers/platform/goldfish/goldfish_pipe.c

545

pipe->next_signalled = NULL;

drivers/platform/goldfish/goldfish_pipe.c

551

struct goldfish_pipe *pipe;

drivers/platform/goldfish/goldfish_pipe.c

556

pipe = dev->first_signalled_pipe;

drivers/platform/goldfish/goldfish_pipe.c

557

if (pipe) {

drivers/platform/goldfish/goldfish_pipe.c

558

*wakes = pipe->signalled_flags;

drivers/platform/goldfish/goldfish_pipe.c

559

pipe->signalled_flags = 0;

drivers/platform/goldfish/goldfish_pipe.c

566

dev->first_signalled_pipe = pipe->next_signalled;

drivers/platform/goldfish/goldfish_pipe.c

569

pipe->next_signalled = NULL;

drivers/platform/goldfish/goldfish_pipe.c

573

return pipe;

drivers/platform/goldfish/goldfish_pipe.c

580

struct goldfish_pipe *pipe;

drivers/platform/goldfish/goldfish_pipe.c

583

while ((pipe = signalled_pipes_pop_front(dev, &wakes)) != NULL) {

drivers/platform/goldfish/goldfish_pipe.c

585

pipe->flags = 1 << BIT_CLOSED_ON_HOST;

drivers/platform/goldfish/goldfish_pipe.c

588

clear_bit(BIT_WAKE_ON_READ, &pipe->flags);

drivers/platform/goldfish/goldfish_pipe.c

590

clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);

drivers/platform/goldfish/goldfish_pipe.c

596

wake_up_interruptible(&pipe->wake_queue);

drivers/platform/goldfish/goldfish_pipe.c

702

struct goldfish_pipe *pipe = kzalloc_obj(*pipe);

drivers/platform/goldfish/goldfish_pipe.c

704

if (!pipe)

drivers/platform/goldfish/goldfish_pipe.c

707

pipe->dev = dev;

drivers/platform/goldfish/goldfish_pipe.c

708

mutex_init(&pipe->lock);

drivers/platform/goldfish/goldfish_pipe.c

709

init_waitqueue_head(&pipe->wake_queue);

drivers/platform/goldfish/goldfish_pipe.c

716

pipe->command_buffer =

drivers/platform/goldfish/goldfish_pipe.c

718

if (!pipe->command_buffer) {

drivers/platform/goldfish/goldfish_pipe.c

731

dev->pipes[id] = pipe;

drivers/platform/goldfish/goldfish_pipe.c

732

pipe->id = id;

drivers/platform/goldfish/goldfish_pipe.c

733

pipe->command_buffer->id = id;

drivers/platform/goldfish/goldfish_pipe.c

739

(u64)(unsigned long)__pa(pipe->command_buffer);

drivers/platform/goldfish/goldfish_pipe.c

740

status = goldfish_pipe_cmd_locked(pipe, PIPE_CMD_OPEN);

drivers/platform/goldfish/goldfish_pipe.c

745

file->private_data = pipe;

drivers/platform/goldfish/goldfish_pipe.c

753

free_page((unsigned long)pipe->command_buffer);

drivers/platform/goldfish/goldfish_pipe.c

755

kfree(pipe);

drivers/platform/goldfish/goldfish_pipe.c

762

struct goldfish_pipe *pipe = filp->private_data;

drivers/platform/goldfish/goldfish_pipe.c

763

struct goldfish_pipe_dev *dev = pipe->dev;

drivers/platform/goldfish/goldfish_pipe.c

766

goldfish_pipe_cmd(pipe, PIPE_CMD_CLOSE);

drivers/platform/goldfish/goldfish_pipe.c

769

dev->pipes[pipe->id] = NULL;

drivers/platform/goldfish/goldfish_pipe.c

770

signalled_pipes_remove_locked(dev, pipe);

drivers/platform/goldfish/goldfish_pipe.c

774

free_page((unsigned long)pipe->command_buffer);

drivers/platform/goldfish/goldfish_pipe.c

775

kfree(pipe);

drivers/rpmsg/qcom_glink_rpm.c

103

__ioread32_copy(data + len, pipe->fifo,

drivers/rpmsg/qcom_glink_rpm.c

111

struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);

drivers/rpmsg/qcom_glink_rpm.c

114

tail = readl(pipe->tail);

drivers/rpmsg/qcom_glink_rpm.c

117

if (tail >= pipe->native.length)

drivers/rpmsg/qcom_glink_rpm.c

118

tail -= pipe->native.length;

drivers/rpmsg/qcom_glink_rpm.c

120

writel(tail, pipe->tail);

drivers/rpmsg/qcom_glink_rpm.c

125

struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);

drivers/rpmsg/qcom_glink_rpm.c

129

head = readl(pipe->head);

drivers/rpmsg/qcom_glink_rpm.c

130

tail = readl(pipe->tail);

drivers/rpmsg/qcom_glink_rpm.c

133

return pipe->native.length - head + tail;

drivers/rpmsg/qcom_glink_rpm.c

138

static unsigned int glink_rpm_tx_write_one(struct glink_rpm_pipe *pipe,

drivers/rpmsg/qcom_glink_rpm.c

144

len = min_t(size_t, count, pipe->native.length - head);

drivers/rpmsg/qcom_glink_rpm.c

146

__iowrite32_copy(pipe->fifo + head, data,

drivers/rpmsg/qcom_glink_rpm.c

151

__iowrite32_copy(pipe->fifo, data + len,

drivers/rpmsg/qcom_glink_rpm.c

156

if (head >= pipe->native.length)

drivers/rpmsg/qcom_glink_rpm.c

157

head -= pipe->native.length;

drivers/rpmsg/qcom_glink_rpm.c

166

struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);

drivers/rpmsg/qcom_glink_rpm.c

185

head = readl(pipe->head);

drivers/rpmsg/qcom_glink_rpm.c

186

head = glink_rpm_tx_write_one(pipe, head, hdr, hlen);

drivers/rpmsg/qcom_glink_rpm.c

187

head = glink_rpm_tx_write_one(pipe, head, data, aligned_dlen);

drivers/rpmsg/qcom_glink_rpm.c

191

head = glink_rpm_tx_write_one(pipe, head, padding, pad);

drivers/rpmsg/qcom_glink_rpm.c

192

writel(head, pipe->head);

drivers/rpmsg/qcom_glink_rpm.c

197

struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);

drivers/rpmsg/qcom_glink_rpm.c

198

struct glink_rpm *rpm = container_of(pipe, struct glink_rpm, tx_pipe);

drivers/rpmsg/qcom_glink_rpm.c

71

struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);

drivers/rpmsg/qcom_glink_rpm.c

75

head = readl(pipe->head);

drivers/rpmsg/qcom_glink_rpm.c

76

tail = readl(pipe->tail);

drivers/rpmsg/qcom_glink_rpm.c

79

return pipe->native.length - tail + head;

drivers/rpmsg/qcom_glink_rpm.c

87

struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);

drivers/rpmsg/qcom_glink_rpm.c

91

tail = readl(pipe->tail);

drivers/rpmsg/qcom_glink_rpm.c

93

if (tail >= pipe->native.length)

drivers/rpmsg/qcom_glink_rpm.c

94

tail -= pipe->native.length;

drivers/rpmsg/qcom_glink_rpm.c

96

len = min_t(size_t, count, pipe->native.length - tail);

drivers/rpmsg/qcom_glink_rpm.c

98

__ioread32_copy(data, pipe->fifo + tail,

drivers/rpmsg/qcom_glink_smem.c

101

tail = le32_to_cpu(*pipe->tail);

drivers/rpmsg/qcom_glink_smem.c

103

if (tail >= pipe->native.length)

drivers/rpmsg/qcom_glink_smem.c

104

tail -= pipe->native.length;

drivers/rpmsg/qcom_glink_smem.c

106

len = min_t(size_t, count, pipe->native.length - tail);

drivers/rpmsg/qcom_glink_smem.c

108

memcpy_fromio(data, pipe->fifo + tail, len);

drivers/rpmsg/qcom_glink_smem.c

111

memcpy_fromio(data + len, pipe->fifo, (count - len));

drivers/rpmsg/qcom_glink_smem.c

117

struct glink_smem_pipe *pipe = to_smem_pipe(np);

drivers/rpmsg/qcom_glink_smem.c

120

tail = le32_to_cpu(*pipe->tail);

drivers/rpmsg/qcom_glink_smem.c

123

if (tail >= pipe->native.length)

drivers/rpmsg/qcom_glink_smem.c

124

tail -= pipe->native.length;

drivers/rpmsg/qcom_glink_smem.c

126

*pipe->tail = cpu_to_le32(tail);

drivers/rpmsg/qcom_glink_smem.c

131

struct glink_smem_pipe *pipe = to_smem_pipe(np);

drivers/rpmsg/qcom_glink_smem.c

136

head = le32_to_cpu(*pipe->head);

drivers/rpmsg/qcom_glink_smem.c

137

tail = le32_to_cpu(*pipe->tail);

drivers/rpmsg/qcom_glink_smem.c

140

avail = pipe->native.length - head + tail;

drivers/rpmsg/qcom_glink_smem.c

152

static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,

drivers/rpmsg/qcom_glink_smem.c

158

len = min_t(size_t, count, pipe->native.length - head);

drivers/rpmsg/qcom_glink_smem.c

160

memcpy(pipe->fifo + head, data, len);

drivers/rpmsg/qcom_glink_smem.c

163

memcpy(pipe->fifo, data + len, count - len);

drivers/rpmsg/qcom_glink_smem.c

166

if (head >= pipe->native.length)

drivers/rpmsg/qcom_glink_smem.c

167

head -= pipe->native.length;

drivers/rpmsg/qcom_glink_smem.c

176

struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);

drivers/rpmsg/qcom_glink_smem.c

179

head = le32_to_cpu(*pipe->head);

drivers/rpmsg/qcom_glink_smem.c

181

head = glink_smem_tx_write_one(pipe, head, hdr, hlen);

drivers/rpmsg/qcom_glink_smem.c

182

head = glink_smem_tx_write_one(pipe, head, data, dlen);

drivers/rpmsg/qcom_glink_smem.c

186

if (head >= pipe->native.length)

drivers/rpmsg/qcom_glink_smem.c

187

head -= pipe->native.length;

drivers/rpmsg/qcom_glink_smem.c

192

*pipe->head = cpu_to_le32(head);

drivers/rpmsg/qcom_glink_smem.c

197

struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);

drivers/rpmsg/qcom_glink_smem.c

198

struct qcom_glink_smem *smem = pipe->smem;

drivers/rpmsg/qcom_glink_smem.c

65

struct glink_smem_pipe *pipe = to_smem_pipe(np);

drivers/rpmsg/qcom_glink_smem.c

66

struct qcom_glink_smem *smem = pipe->smem;

drivers/rpmsg/qcom_glink_smem.c

72

if (!pipe->fifo) {

drivers/rpmsg/qcom_glink_smem.c

81

pipe->fifo = fifo;

drivers/rpmsg/qcom_glink_smem.c

82

pipe->native.length = len;

drivers/rpmsg/qcom_glink_smem.c

85

head = le32_to_cpu(*pipe->head);

drivers/rpmsg/qcom_glink_smem.c

86

tail = le32_to_cpu(*pipe->tail);

drivers/rpmsg/qcom_glink_smem.c

89

return pipe->native.length - tail + head;

drivers/rpmsg/qcom_glink_smem.c

97

struct glink_smem_pipe *pipe = to_smem_pipe(np);

drivers/sbus/char/oradax.c

122

u32 pipe:1; /* Pipeline */

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2861

struct atomisp_video_pipe *pipe = vb_to_pipe(&frame->vb.vb2_buf);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2864

pipe->frame_params[frame->vb.vb2_buf.index] = param;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2865

spin_lock_irqsave(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2866

list_move_tail(&frame->queue, &pipe->activeq);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2867

spin_unlock_irqrestore(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2877

void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe)

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2879

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2894

if (list_empty(&pipe->per_frame_params) ||

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2895

list_empty(&pipe->buffers_waiting_for_param))

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2899

&pipe->buffers_waiting_for_param, queue) {

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2901

if (pipe->frame_request_config_id[i]) {

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2903

&pipe->per_frame_params, list) {

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2904

if (pipe->frame_request_config_id[i] != param->params.isp_config_id)

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2913

pipe->frame_request_config_id[i] = 0;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2920

if (list_entry_is_head(param, &pipe->per_frame_params, list))

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2940

struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2941

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2996

list_add_tail(&param->list, &pipe->per_frame_params);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

2997

atomisp_handle_parameter_and_buffer(pipe);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4249

struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4250

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4324

struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4325

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4334

ret = atomisp_pipe_check(pipe, true);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4347

pipe->sh_fmt = format_bridge->sh_fmt;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4348

pipe->pix.pixelformat = format_bridge->pixelformat;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4430

atomisp_fill_pix_format(&pipe->pix, f->fmt.pix.width, f->fmt.pix.height, format_bridge);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

4432

f->fmt.pix = pipe->pix;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

561

int atomisp_buffers_in_css(struct atomisp_video_pipe *pipe)

drivers/staging/media/atomisp/pci/atomisp_cmd.c

567

spin_lock_irqsave(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

569

list_for_each(pos, &pipe->buffers_in_css)

drivers/staging/media/atomisp/pci/atomisp_cmd.c

572

spin_unlock_irqrestore(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

579

struct atomisp_video_pipe *pipe = vb_to_pipe(&frame->vb.vb2_buf);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

581

lockdep_assert_held(&pipe->irq_lock);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

584

frame->vb.field = pipe->pix.field;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

585

frame->vb.sequence = atomic_read(&pipe->asd->sequence);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

588

vb2_set_plane_payload(&frame->vb.vb2_buf, 0, pipe->pix.sizeimage);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

592

void atomisp_flush_video_pipe(struct atomisp_video_pipe *pipe, enum vb2_buffer_state state,

drivers/staging/media/atomisp/pci/atomisp_cmd.c

598

spin_lock_irqsave(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

600

list_for_each_entry_safe(frame, _frame, &pipe->buffers_in_css, queue) {

drivers/staging/media/atomisp/pci/atomisp_cmd.c

602

dev_warn(pipe->isp->dev, "Warning: CSS frames queued on flush\n");

drivers/staging/media/atomisp/pci/atomisp_cmd.c

606

list_for_each_entry_safe(frame, _frame, &pipe->activeq, queue)

drivers/staging/media/atomisp/pci/atomisp_cmd.c

609

list_for_each_entry_safe(frame, _frame, &pipe->buffers_waiting_for_param, queue) {

drivers/staging/media/atomisp/pci/atomisp_cmd.c

610

pipe->frame_request_config_id[frame->vb.vb2_buf.index] = 0;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

614

spin_unlock_irqrestore(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

618

void atomisp_flush_params_queue(struct atomisp_video_pipe *pipe)

drivers/staging/media/atomisp/pci/atomisp_cmd.c

622

while (!list_empty(&pipe->per_frame_params)) {

drivers/staging/media/atomisp/pci/atomisp_cmd.c

623

param = list_entry(pipe->per_frame_params.next,

drivers/staging/media/atomisp/pci/atomisp_cmd.c

632

static void atomisp_recover_params_queue(struct atomisp_video_pipe *pipe)

drivers/staging/media/atomisp/pci/atomisp_cmd.c

638

param = pipe->frame_params[i];

drivers/staging/media/atomisp/pci/atomisp_cmd.c

640

list_add_tail(&param->list, &pipe->per_frame_params);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

641

pipe->frame_params[i] = NULL;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

643

atomisp_handle_parameter_and_buffer(pipe);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

651

struct atomisp_video_pipe *pipe = NULL;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

771

pipe = vb_to_pipe(&frame->vb.vb2_buf);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

775

pipe->frame_config_id[frame->vb.vb2_buf.index] = frame->isp_config_id;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

788

pipe = vb_to_pipe(&frame->vb.vb2_buf);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

796

if (pipe->frame_params[i]) {

drivers/staging/media/atomisp/pci/atomisp_cmd.c

797

if (asd->params.dvs_6axis == pipe->frame_params[i]->params.dvs_6axis)

drivers/staging/media/atomisp/pci/atomisp_cmd.c

799

atomisp_free_css_parameters(&pipe->frame_params[i]->params);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

800

kvfree(pipe->frame_params[i]);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

801

pipe->frame_params[i] = NULL;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

804

pipe->frame_config_id[i] = frame->isp_config_id;

drivers/staging/media/atomisp/pci/atomisp_cmd.c

842

spin_lock_irqsave(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_cmd.c

844

spin_unlock_irqrestore(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_cmd.h

273

void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe);

drivers/staging/media/atomisp/pci/atomisp_cmd.h

40

int atomisp_buffers_in_css(struct atomisp_video_pipe *pipe);

drivers/staging/media/atomisp/pci/atomisp_cmd.h

42

void atomisp_flush_video_pipe(struct atomisp_video_pipe *pipe, enum vb2_buffer_state state,

drivers/staging/media/atomisp/pci/atomisp_compat.h

74

struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

1028

struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

1032

if (!pipe) {

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

1040

asd->params.config.isp_config_id, pipe);

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

1044

&asd->params.config, pipe);

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

1423

ia_css_temp_pipe_to_pipe_id(current_event->event.pipe,

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

1424

&current_event->pipe);

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

1426

current_event->pipe == IA_CSS_PIPE_ID_CAPTURE)

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

1427

current_event->pipe = IA_CSS_PIPE_ID_COPY;

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

3201

if (!atomisp_css_isr_get_stream_id(current_event.event.pipe, isp, &stream_id)) {

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

3217

current_event.pipe, true, stream_id);

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

3222

current_event.pipe, true, stream_id);

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

3228

current_event.pipe,

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

3235

current_event.pipe,

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

3242

current_event.pipe, true, stream_id);

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

3248

current_event.pipe, true, stream_id);

drivers/staging/media/atomisp/pci/atomisp_compat_css20.c

3254

current_event.pipe,

drivers/staging/media/atomisp/pci/atomisp_compat_css20.h

93

enum ia_css_pipe_id pipe;

drivers/staging/media/atomisp/pci/atomisp_fops.c

221

struct atomisp_video_pipe *pipe,

drivers/staging/media/atomisp/pci/atomisp_fops.c

237

space = ATOMISP_CSS_Q_DEPTH - atomisp_buffers_in_css(pipe);

drivers/staging/media/atomisp/pci/atomisp_fops.c

241

spin_lock_irqsave(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_fops.c

242

frame = list_first_entry_or_null(&pipe->activeq, struct ia_css_frame, queue);

drivers/staging/media/atomisp/pci/atomisp_fops.c

244

list_move_tail(&frame->queue, &pipe->buffers_in_css);

drivers/staging/media/atomisp/pci/atomisp_fops.c

245

spin_unlock_irqrestore(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_fops.c

254

param = pipe->frame_params[frame->vb.vb2_buf.index];

drivers/staging/media/atomisp/pci/atomisp_fops.c

293

pipe->frame_params[frame->vb.vb2_buf.index] = NULL;

drivers/staging/media/atomisp/pci/atomisp_fops.c

299

spin_lock_irqsave(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_fops.c

300

list_move_tail(&frame->queue, &pipe->activeq);

drivers/staging/media/atomisp/pci/atomisp_fops.c

301

spin_unlock_irqrestore(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_fops.c

358

struct atomisp_video_pipe *pipe = vb_to_pipe(vb);

drivers/staging/media/atomisp/pci/atomisp_fops.c

360

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_fops.c

366

ret = atomisp_pipe_check(pipe, false);

drivers/staging/media/atomisp/pci/atomisp_fops.c

368

spin_lock_irqsave(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_fops.c

370

spin_unlock_irqrestore(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_fops.c

378

pipe->frame_params[vb->index] = NULL;

drivers/staging/media/atomisp/pci/atomisp_fops.c

38

struct atomisp_video_pipe *pipe = container_of(vq, struct atomisp_video_pipe, vb_queue);

drivers/staging/media/atomisp/pci/atomisp_fops.c

380

spin_lock_irqsave(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_fops.c

391

if (pipe->frame_request_config_id[vb->index] ||

drivers/staging/media/atomisp/pci/atomisp_fops.c

392

!list_empty(&pipe->buffers_waiting_for_param))

drivers/staging/media/atomisp/pci/atomisp_fops.c

393

list_add_tail(&frame->queue, &pipe->buffers_waiting_for_param);

drivers/staging/media/atomisp/pci/atomisp_fops.c

395

list_add_tail(&frame->queue, &pipe->activeq);

drivers/staging/media/atomisp/pci/atomisp_fops.c

397

spin_unlock_irqrestore(&pipe->irq_lock, irqflags);

drivers/staging/media/atomisp/pci/atomisp_fops.c

401

if (!list_empty(&pipe->buffers_waiting_for_param))

drivers/staging/media/atomisp/pci/atomisp_fops.c

402

atomisp_handle_parameter_and_buffer(pipe);

drivers/staging/media/atomisp/pci/atomisp_fops.c

41

mutex_lock(&pipe->asd->isp->mutex); /* for get_css_frame_info() / set_fmt() */

drivers/staging/media/atomisp/pci/atomisp_fops.c

413

struct atomisp_video_pipe *pipe = vb_to_pipe(vb);

drivers/staging/media/atomisp/pci/atomisp_fops.c

417

pipe->frame_request_config_id[index] = 0;

drivers/staging/media/atomisp/pci/atomisp_fops.c

418

pipe->frame_params[index] = NULL;

drivers/staging/media/atomisp/pci/atomisp_fops.c

47

ret = atomisp_get_css_frame_info(pipe->asd, &pipe->frame_info);

drivers/staging/media/atomisp/pci/atomisp_fops.c

474

struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_fops.c

475

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_fops.c

495

if (pipe->users) {

drivers/staging/media/atomisp/pci/atomisp_fops.c

511

pipe->users++;

drivers/staging/media/atomisp/pci/atomisp_fops.c

525

struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_fops.c

526

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_fops.c

538

pipe->users--;

drivers/staging/media/atomisp/pci/atomisp_fops.c

55

ret = atomisp_set_fmt(&pipe->vdev, &f);

drivers/staging/media/atomisp/pci/atomisp_fops.c

59

ret = atomisp_get_css_frame_info(pipe->asd, &pipe->frame_info);

drivers/staging/media/atomisp/pci/atomisp_fops.c

64

atomisp_alloc_css_stat_bufs(pipe->asd, ATOMISP_INPUT_STREAM_GENERAL);

drivers/staging/media/atomisp/pci/atomisp_fops.c

67

sizes[0] = PAGE_ALIGN(pipe->pix.sizeimage);

drivers/staging/media/atomisp/pci/atomisp_fops.c

70

mutex_unlock(&pipe->asd->isp->mutex);

drivers/staging/media/atomisp/pci/atomisp_fops.c

76

struct atomisp_video_pipe *pipe = vb_to_pipe(vb);

drivers/staging/media/atomisp/pci/atomisp_fops.c

80

ret = ia_css_frame_init_from_info(frame, &pipe->frame_info);

drivers/staging/media/atomisp/pci/atomisp_fops.c

85

dev_err(pipe->asd->isp->dev, "Internal error frame.data_bytes(%u) > vb.length(%lu)\n",

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

1008

atomisp_stop_stream(pipe, false, VB2_BUF_STATE_QUEUED);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

1018

struct atomisp_video_pipe *pipe = vq_to_pipe(vq);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

1019

struct atomisp_device *isp = pipe->asd->isp;

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

1024

atomisp_stop_stream(pipe, true, VB2_BUF_STATE_ERROR);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

344

int atomisp_pipe_check(struct atomisp_video_pipe *pipe, bool settings_change)

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

346

lockdep_assert_held(&pipe->isp->mutex);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

348

if (pipe->isp->isp_fatal_error)

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

351

if (settings_change && vb2_is_busy(&pipe->vb_queue)) {

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

352

dev_err(pipe->isp->dev, "Set fmt/input IOCTL while streaming\n");

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

430

struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

439

ret = atomisp_pipe_check(pipe, true);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

664

struct atomisp_video_pipe *pipe;

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

666

pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

668

f->fmt.pix = pipe->pix;

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

793

struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

800

pipe->frame_request_config_id[buf->index] = buf->reserved2 &

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

804

pipe->frame_request_config_id[buf->index]);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

806

pipe->frame_request_config_id[buf->index] = 0;

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

815

struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

825

vb = vb2_get_buffer(&pipe->vb_queue, buf->index);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

832

buf->reserved2 = pipe->frame_config_id[buf->index];

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

858

static void atomisp_stop_stream(struct atomisp_video_pipe *pipe,

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

861

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

904

atomisp_flush_video_pipe(pipe, state, false);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

916

struct atomisp_video_pipe *pipe = vq_to_pipe(vq);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

917

struct atomisp_sub_device *asd = pipe->asd;

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

927

ret = atomisp_pipe_check(pipe, false);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

929

atomisp_flush_video_pipe(pipe, VB2_BUF_STATE_QUEUED, true);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

940

ret = __media_pipeline_start(&asd->video_out.vdev.entity.pads[0], &asd->video_out.pipe);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

944

atomisp_flush_video_pipe(pipe, VB2_BUF_STATE_QUEUED, true);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

967

atomisp_flush_video_pipe(pipe, VB2_BUF_STATE_QUEUED, true);

drivers/staging/media/atomisp/pci/atomisp_ioctl.c

985

atomisp_handle_parameter_and_buffer(pipe);

drivers/staging/media/atomisp/pci/atomisp_ioctl.h

26

int atomisp_pipe_check(struct atomisp_video_pipe *pipe, bool streaming_ok);

drivers/staging/media/atomisp/pci/atomisp_subdev.c

765

struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type)

drivers/staging/media/atomisp/pci/atomisp_subdev.c

769

pipe->type = buf_type;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

770

pipe->asd = asd;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

771

pipe->isp = asd->isp;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

772

spin_lock_init(&pipe->irq_lock);

drivers/staging/media/atomisp/pci/atomisp_subdev.c

773

mutex_init(&pipe->vb_queue_mutex);

drivers/staging/media/atomisp/pci/atomisp_subdev.c

776

pipe->vb_queue.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

777

pipe->vb_queue.io_modes = VB2_MMAP | VB2_DMABUF;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

778

pipe->vb_queue.buf_struct_size = sizeof(struct ia_css_frame);

drivers/staging/media/atomisp/pci/atomisp_subdev.c

779

pipe->vb_queue.ops = &atomisp_vb2_ops;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

780

pipe->vb_queue.mem_ops = &vb2_vmalloc_memops;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

781

pipe->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

782

pipe->vb_queue.lock = &pipe->vb_queue_mutex;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

783

ret = vb2_queue_init(&pipe->vb_queue);

drivers/staging/media/atomisp/pci/atomisp_subdev.c

787

pipe->vdev.queue = &pipe->vb_queue;

drivers/staging/media/atomisp/pci/atomisp_subdev.c

789

INIT_LIST_HEAD(&pipe->buffers_in_css);

drivers/staging/media/atomisp/pci/atomisp_subdev.c

790

INIT_LIST_HEAD(&pipe->activeq);

drivers/staging/media/atomisp/pci/atomisp_subdev.c

791

INIT_LIST_HEAD(&pipe->buffers_waiting_for_param);

drivers/staging/media/atomisp/pci/atomisp_subdev.c

792

INIT_LIST_HEAD(&pipe->per_frame_params);

drivers/staging/media/atomisp/pci/atomisp_subdev.h

41

struct media_pipeline pipe;

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

109

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

126

struct ia_css_pipe *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

143

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

160

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

175

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

191

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

207

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

222

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

237

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

253

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

269

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

27

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

43

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

71

struct ia_css_pipe *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h

89

struct ia_css_pipe *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_util.h

21

const struct ia_css_pipe *const pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

107

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

116

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_VF_PP,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

189

struct ia_css_pipe *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

201

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

211

in_info->res = pipe->config.input_effective_res;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

213

in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

215

if (ia_css_util_is_input_format_yuv(pipe->stream->config.input_config.format))

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

224

pipe_binarydesc_get_offline(pipe, mode,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

226

if (pipe->stream->config.online) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

227

preview_descr->online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

229

(pipe->stream->config.pixels_per_clock == 2);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

231

preview_descr->stream_format = pipe->stream->config.input_config.format;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

236

if (pipe->extra_config.enable_raw_binning) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

237

if (pipe->config.bayer_ds_out_res.width != 0 &&

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

238

pipe->config.bayer_ds_out_res.height != 0) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

240

pipe->config.bayer_ds_out_res.width;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

242

pipe->config.bayer_ds_out_res.height;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

244

pipe->config.bayer_ds_out_res.width;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

265

pipe->required_bds_factor = preview_descr->required_bds_factor;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

269

if (!pipe->extra_config.enable_fractional_ds)

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

28

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

291

if (!pipe->extra_config.enable_fractional_ds) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

298

pipe->extra_config.enable_fractional_ds;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

300

preview_descr->enable_dpc = pipe->config.enable_dpc;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

302

preview_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

308

struct ia_css_pipe *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

323

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

332

if (ia_css_util_is_input_format_yuv(pipe->stream->config.input_config.format))

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

335

in_info->res = pipe->config.input_effective_res;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

338

in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

343

pipe_binarydesc_get_offline(pipe, mode,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

346

if (pipe->stream->config.online) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

347

video_descr->online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

349

(pipe->stream->config.pixels_per_clock == 2);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

354

((pipe->stream->isp_params_configs->dz_config.dx !=

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

356

|| (pipe->stream->isp_params_configs->dz_config.dy !=

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

359

video_descr->enable_dz = pipe->config.enable_dz

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

361

video_descr->dvs_env = pipe->config.dvs_envelope;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

362

video_descr->enable_yuv_ds = pipe->extra_config.enable_yuv_ds;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

364

pipe->extra_config.enable_high_speed;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

366

pipe->extra_config.enable_dvs_6axis;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

368

pipe->extra_config.enable_reduced_pipe;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

369

video_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

37

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

371

pipe->extra_config.enable_fractional_ds;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

373

pipe->config.enable_dpc;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

375

pipe->config.enable_tnr;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

377

if (pipe->extra_config.enable_raw_binning) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

378

if (pipe->config.bayer_ds_out_res.width != 0 &&

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

379

pipe->config.bayer_ds_out_res.height != 0) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

381

pipe->config.bayer_ds_out_res.width;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

383

pipe->config.bayer_ds_out_res.height;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

385

pipe->config.bayer_ds_out_res.width;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

410

pipe->required_bds_factor = video_descr->required_bds_factor;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

415

if (!pipe->extra_config.enable_fractional_ds)

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

421

pipe->extra_config.enable_fractional_ds;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

429

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

439

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

44

descr->continuous = pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

463

pipe_binarydesc_get_offline(pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

473

struct ia_css_pipe *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

482

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

489

if (pipe->out_yuv_ds_input_info.res.width)

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

490

*in_info = pipe->out_yuv_ds_input_info;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

501

pipe_binarydesc_get_offline(pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

507

pipe->config.default_capture_config.enable_capture_pp_bli;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

510

pipe->config.default_capture_config.enable_xnr != 0;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

525

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

532

enum ia_css_pipe_version pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

537

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

550

if (ia_css_util_is_input_format_yuv(pipe->stream->config.input_config.format))

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

553

in_info->res = pipe->config.input_effective_res;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

556

if (pipe->stream->config.pack_raw_pixels)

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

561

in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

566

pipe_binarydesc_get_offline(pipe, mode,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

569

if (pipe->stream->config.online &&

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

570

pipe->stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

573

(pipe->stream->config.pixels_per_clock == 2);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

574

prim_descr->stream_format = pipe->stream->config.input_config.format;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

577

prim_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

579

pipe->extra_config.enable_fractional_ds;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

588

(!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

59

descr->stream_format = pipe->stream->config.input_config.format;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

594

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

602

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

609

in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

614

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

616

pre_gdc_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

621

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

629

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

640

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_GDC,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

646

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

65

descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

655

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

668

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_POST_ISP,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

671

post_gdc_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

676

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

684

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

691

in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

696

if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1)

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

697

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

699

else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

700

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_DE,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

704

if (pipe->stream->config.online) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

707

(pipe->stream->config.pixels_per_clock == 2);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

708

pre_de_descr->stream_format = pipe->stream->config.input_config.format;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

71

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

710

pre_de_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

715

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

723

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

730

in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

735

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

738

if (pipe->stream->config.online) {

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

741

(pipe->stream->config.pixels_per_clock == 2);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

742

pre_anr_descr->stream_format = pipe->stream->config.input_config.format;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

744

pre_anr_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

749

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

757

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

769

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_ANR,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

772

anr_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

777

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

786

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

799

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_POST_ISP,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

80

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

802

post_anr_descr->isp_pipe_version = pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

807

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

815

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

830

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_CAPTURE_PP,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

833

pipe->extra_config.enable_dvs_6axis;

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

88

pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_COPY,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

92

copy_descr->two_ppc = (pipe->stream->config.pixels_per_clock == 2);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c

99

struct ia_css_pipe const *const pipe,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_util.c

14

const struct ia_css_pipe *const pipe)

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_util.c

16

assert(pipe);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_util.c

17

assert(pipe->stream);

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_util.c

19

return ia_css_util_input_format_bpp(pipe->stream->config.input_config.format,

drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_util.c

20

pipe->stream->config.pixels_per_clock == 2);

drivers/staging/media/atomisp/pci/ia_css_event_public.h

92

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/ia_css_irq.h

126

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/ia_css_pipe.h

166

void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map);

drivers/staging/media/atomisp/pci/ia_css_pipe.h

171

bool commit, struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

230

struct ia_css_pipe **pipe);

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

239

ia_css_pipe_destroy(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

249

ia_css_pipe_get_info(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

261

ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

337

ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

358

ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

381

ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

401

ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

410

ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

430

ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_pipe_public.h

460

ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/ia_css_stream_public.h

475

struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c

19

.pipe = (struct sh_css_sp_pipeline *)NULL,

drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c

39

to->inout_port_config = from->pipe->inout_port_config;

drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c

45

int ia_css_qplane_configure(const struct sh_css_sp_pipeline *pipe,

drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c

51

config.pipe = pipe;

drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h

27

int ia_css_qplane_configure(const struct sh_css_sp_pipeline *pipe,

drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h

19

const struct sh_css_sp_pipeline *pipe;

drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c

105

config.pipe = pipe;

drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c

20

.pipe = (struct sh_css_sp_pipeline *)NULL,

drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c

79

to->inout_port_config = from->pipe->inout_port_config;

drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c

81

to->required_bds_factor = from->pipe->required_bds_factor;

drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c

95

int ia_css_raw_configure(const struct sh_css_sp_pipeline *pipe,

drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h

19

int ia_css_raw_configure(const struct sh_css_sp_pipeline *pipe,

drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw_types.h

19

const struct sh_css_sp_pipeline *pipe;

drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h

193

struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h

198

struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h

204

struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c

312

struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c

316

(void)pipe;

drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c

343

struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c

345

(void)pipe;

drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c

353

struct ia_css_pipe *pipe) {

drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c

358

binary, info, pipe);

drivers/staging/media/atomisp/pci/runtime/debug/interface/ia_css_debug.h

397

struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c

868

struct ia_css_pipe *pipe = stream->pipes[i];

drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c

869

struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe);

drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ia_css_pipeline.h

129

bool ia_css_pipeline_has_stopped(struct ia_css_pipeline *pipe);

drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c

444

return sp_group.pipe[thread_id].num_stages == 0;

drivers/staging/media/atomisp/pci/sh_css.c

1100

start_binary(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

1103

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

1109

if (!IS_ISP2401 && pipe->stream->reconfigure_css_rx) {

drivers/staging/media/atomisp/pci/sh_css.c

1110

ia_css_isys_rx_configure(&pipe->stream->csi_rx_config,

drivers/staging/media/atomisp/pci/sh_css.c

1111

pipe->stream->config.mode);

drivers/staging/media/atomisp/pci/sh_css.c

1112

pipe->stream->reconfigure_css_rx = false;

drivers/staging/media/atomisp/pci/sh_css.c

1118

start_copy_on_sp(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

1123

if ((!pipe) || (!pipe->stream))

drivers/staging/media/atomisp/pci/sh_css.c

1126

if (!IS_ISP2401 && pipe->stream->reconfigure_css_rx)

drivers/staging/media/atomisp/pci/sh_css.c

1129

if (pipe->stream->config.input_config.format != ATOMISP_INPUT_FORMAT_BINARY_8)

drivers/staging/media/atomisp/pci/sh_css.c

1131

sh_css_sp_start_binary_copy(ia_css_pipe_get_pipe_num(pipe), out_frame, pipe->stream->config.pixels_per_clock == 2);

drivers/staging/media/atomisp/pci/sh_css.c

1133

if (!IS_ISP2401 && pipe->stream->reconfigure_css_rx) {

drivers/staging/media/atomisp/pci/sh_css.c

1134

ia_css_isys_rx_configure(&pipe->stream->csi_rx_config,

drivers/staging/media/atomisp/pci/sh_css.c

1135

pipe->stream->config.mode);

drivers/staging/media/atomisp/pci/sh_css.c

1136

pipe->stream->reconfigure_css_rx = false;

drivers/staging/media/atomisp/pci/sh_css.c

173

allocate_delay_frames(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

1772

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

1775

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

1781

memcpy(pipe, &default_pipe, sizeof(default_pipe));

drivers/staging/media/atomisp/pci/sh_css.c

1786

pipe->mode = IA_CSS_PIPE_ID_PREVIEW;

drivers/staging/media/atomisp/pci/sh_css.c

1787

memcpy(&pipe->pipe_settings.preview, &preview, sizeof(preview));

drivers/staging/media/atomisp/pci/sh_css.c

1791

pipe->mode = IA_CSS_PIPE_ID_COPY;

drivers/staging/media/atomisp/pci/sh_css.c

1793

pipe->mode = IA_CSS_PIPE_ID_CAPTURE;

drivers/staging/media/atomisp/pci/sh_css.c

1795

memcpy(&pipe->pipe_settings.capture, &capture, sizeof(capture));

drivers/staging/media/atomisp/pci/sh_css.c

1798

pipe->mode = IA_CSS_PIPE_ID_VIDEO;

drivers/staging/media/atomisp/pci/sh_css.c

1799

memcpy(&pipe->pipe_settings.video, &video, sizeof(video));

drivers/staging/media/atomisp/pci/sh_css.c

1802

pipe->mode = IA_CSS_PIPE_ID_CAPTURE;

drivers/staging/media/atomisp/pci/sh_css.c

1805

pipe->mode = IA_CSS_PIPE_ID_YUVPP;

drivers/staging/media/atomisp/pci/sh_css.c

1806

memcpy(&pipe->pipe_settings.yuvpp, &yuvpp, sizeof(yuvpp));

drivers/staging/media/atomisp/pci/sh_css.c

1826

pipe_generate_pipe_num(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

1833

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

1842

my_css.all_pipes[i] = (struct ia_css_pipe *)pipe;

drivers/staging/media/atomisp/pci/sh_css.c

1872

struct ia_css_pipe **pipe,

drivers/staging/media/atomisp/pci/sh_css.c

1878

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

1899

*pipe = me;

drivers/staging/media/atomisp/pci/sh_css.c

1918

ia_css_pipe_destroy(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

192

ia_css_pipe_check_format(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

1922

IA_CSS_ENTER("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

1924

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

1929

if (pipe->stream) {

drivers/staging/media/atomisp/pci/sh_css.c

1935

switch (pipe->config.mode) {

drivers/staging/media/atomisp/pci/sh_css.c

1941

if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) {

drivers/staging/media/atomisp/pci/sh_css.c

1943

pipe->continuous_frames);

drivers/staging/media/atomisp/pci/sh_css.c

1945

pipe->cont_md_buffers);

drivers/staging/media/atomisp/pci/sh_css.c

1946

if (pipe->pipe_settings.preview.copy_pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

1947

err = ia_css_pipe_destroy(pipe->pipe_settings.preview.copy_pipe);

drivers/staging/media/atomisp/pci/sh_css.c

1955

if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) {

drivers/staging/media/atomisp/pci/sh_css.c

1957

pipe->continuous_frames);

drivers/staging/media/atomisp/pci/sh_css.c

1959

pipe->cont_md_buffers);

drivers/staging/media/atomisp/pci/sh_css.c

1960

if (pipe->pipe_settings.video.copy_pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

1961

err = ia_css_pipe_destroy(pipe->pipe_settings.video.copy_pipe);

drivers/staging/media/atomisp/pci/sh_css.c

1968

pipe->pipe_settings.video.tnr_frames);

drivers/staging/media/atomisp/pci/sh_css.c

1970

pipe->pipe_settings.video.delay_frames);

drivers/staging/media/atomisp/pci/sh_css.c

1974

pipe->pipe_settings.capture.delay_frames);

drivers/staging/media/atomisp/pci/sh_css.c

1982

if (pipe->scaler_pp_lut != mmgr_NULL) {

drivers/staging/media/atomisp/pci/sh_css.c

1983

hmm_free(pipe->scaler_pp_lut);

drivers/staging/media/atomisp/pci/sh_css.c

1984

pipe->scaler_pp_lut = mmgr_NULL;

drivers/staging/media/atomisp/pci/sh_css.c

1987

my_css.active_pipes[ia_css_pipe_get_pipe_num(pipe)] = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

1988

sh_css_pipe_free_shading_table(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

1990

ia_css_pipeline_destroy(&pipe->pipeline);

drivers/staging/media/atomisp/pci/sh_css.c

1991

pipe_release_pipe_num(ia_css_pipe_get_pipe_num(pipe));

drivers/staging/media/atomisp/pci/sh_css.c

1993

kfree(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

206

need_capture_pp(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

209

need_yuv_scaler_stage(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2170

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2180

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2189

copy_out_info = pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

2190

copy_vf_info = pipe->vf_output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

2195

ia_css_pipe_get_copy_binarydesc(pipe, &copy_descr,

drivers/staging/media/atomisp/pci/sh_css.c

2206

alloc_continuous_frames(struct ia_css_pipe *pipe, bool init_time)

drivers/staging/media/atomisp/pci/sh_css.c

2215

IA_CSS_ENTER_PRIVATE("pipe = %p, init_time = %d", pipe, init_time);

drivers/staging/media/atomisp/pci/sh_css.c

2217

if ((!pipe) || (!pipe->stream)) {

drivers/staging/media/atomisp/pci/sh_css.c

2222

pipe_id = pipe->mode;

drivers/staging/media/atomisp/pci/sh_css.c

2223

continuous = pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/sh_css.c

2227

num_frames = pipe->stream->config.init_num_cont_raw_buf;

drivers/staging/media/atomisp/pci/sh_css.c

2228

pipe->stream->continuous_pipe = pipe;

drivers/staging/media/atomisp/pci/sh_css.c

2230

num_frames = pipe->stream->config.target_num_cont_raw_buf;

drivers/staging/media/atomisp/pci/sh_css.c

2237

ref_info = pipe->pipe_settings.preview.preview_binary.in_frame_info;

drivers/staging/media/atomisp/pci/sh_css.c

2239

ref_info = pipe->pipe_settings.video.video_binary.in_frame_info;

drivers/staging/media/atomisp/pci/sh_css.c

224

static bool need_capt_ldc(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2248

ref_info.res.width = pipe->stream->config.input_config.input_res.width;

drivers/staging/media/atomisp/pci/sh_css.c

2249

ref_info.res.height = pipe->stream->config.input_config.input_res.height;

drivers/staging/media/atomisp/pci/sh_css.c

2255

if (pipe->stream->config.pack_raw_pixels) {

drivers/staging/media/atomisp/pci/sh_css.c

2268

pipe->pipe_settings.preview.preview_binary.in_frame_info.format =

drivers/staging/media/atomisp/pci/sh_css.c

227

sh_css_pipe_load_binaries(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2271

pipe->pipe_settings.video.video_binary.in_frame_info.format = ref_info.format;

drivers/staging/media/atomisp/pci/sh_css.c

2281

idx = pipe->stream->config.init_num_cont_raw_buf;

drivers/staging/media/atomisp/pci/sh_css.c

2285

if (pipe->continuous_frames[i]) {

drivers/staging/media/atomisp/pci/sh_css.c

2286

ia_css_frame_free(pipe->continuous_frames[i]);

drivers/staging/media/atomisp/pci/sh_css.c

2287

pipe->continuous_frames[i] = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

2290

ia_css_metadata_free(pipe->cont_md_buffers[i]);

drivers/staging/media/atomisp/pci/sh_css.c

2291

pipe->cont_md_buffers[i] = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

2297

&pipe->continuous_frames[i],

drivers/staging/media/atomisp/pci/sh_css.c

2304

pipe->cont_md_buffers[i] = ia_css_metadata_allocate(

drivers/staging/media/atomisp/pci/sh_css.c

2305

&pipe->stream->info.metadata_info);

drivers/staging/media/atomisp/pci/sh_css.c

231

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2321

load_preview_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

2336

struct ia_css_frame_info *pipe_out_info = &pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

2337

struct ia_css_preview_settings *mycs = &pipe->pipe_settings.preview;

drivers/staging/media/atomisp/pci/sh_css.c

2340

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2341

assert(pipe->stream);

drivers/staging/media/atomisp/pci/sh_css.c

2342

assert(pipe->mode == IA_CSS_PIPE_ID_PREVIEW);

drivers/staging/media/atomisp/pci/sh_css.c

2344

online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/sh_css.c

2346

sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR;

drivers/staging/media/atomisp/pci/sh_css.c

2347

continuous = pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/sh_css.c

2352

err = ia_css_util_check_input(&pipe->stream->config, false, false);

drivers/staging/media/atomisp/pci/sh_css.c

236

sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2374

need_vf_pp = pipe->config.enable_dz;

drivers/staging/media/atomisp/pci/sh_css.c

2381

if (pipe->vf_yuv_ds_input_info.res.width)

drivers/staging/media/atomisp/pci/sh_css.c

2382

prev_vf_info = pipe->vf_yuv_ds_input_info;

drivers/staging/media/atomisp/pci/sh_css.c

2396

pipe,

drivers/staging/media/atomisp/pci/sh_css.c

241

capture_start(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2420

if (pipe->vf_yuv_ds_input_info.res.width)

drivers/staging/media/atomisp/pci/sh_css.c

2421

prev_vf_info = pipe->vf_yuv_ds_input_info;

drivers/staging/media/atomisp/pci/sh_css.c

2429

pipe,

drivers/staging/media/atomisp/pci/sh_css.c

244

video_start(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2447

ia_css_pipe_get_vfpp_binarydesc(pipe, &vf_pp_descr,

drivers/staging/media/atomisp/pci/sh_css.c

247

preview_start(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2475

err = load_copy_binary(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2482

if (pipe->shading_table) {

drivers/staging/media/atomisp/pci/sh_css.c

2483

ia_css_shading_table_free(pipe->shading_table);

drivers/staging/media/atomisp/pci/sh_css.c

2484

pipe->shading_table = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

2497

unload_preview_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

2499

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

250

yuvpp_start(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2501

if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) {

drivers/staging/media/atomisp/pci/sh_css.c

2505

ia_css_binary_unload(&pipe->pipe_settings.preview.copy_binary);

drivers/staging/media/atomisp/pci/sh_css.c

2506

ia_css_binary_unload(&pipe->pipe_settings.preview.preview_binary);

drivers/staging/media/atomisp/pci/sh_css.c

2507

ia_css_binary_unload(&pipe->pipe_settings.preview.vf_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

252

static bool copy_on_sp(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

255

init_vf_frameinfo_defaults(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2581

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

259

init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2595

if (!pipe)

drivers/staging/media/atomisp/pci/sh_css.c

2605

me = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

2612

last_fw = last_output_firmware(pipe->vf_stage);

drivers/staging/media/atomisp/pci/sh_css.c

2613

if (!pipe->extra_config.disable_vf_pp) {

drivers/staging/media/atomisp/pci/sh_css.c

2628

err = add_firmwares(me, vf_pp_binary, pipe->vf_stage, last_fw,

drivers/staging/media/atomisp/pci/sh_css.c

263

init_out_frameinfo_defaults(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2636

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2652

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2662

last_fw = last_output_firmware(pipe->output_stage);

drivers/staging/media/atomisp/pci/sh_css.c

267

alloc_continuous_frames(struct ia_css_pipe *pipe, bool init_time);

drivers/staging/media/atomisp/pci/sh_css.c

2680

err = add_firmwares(me, yuv_scaler_binary, pipe->output_stage, last_fw,

drivers/staging/media/atomisp/pci/sh_css.c

2694

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2709

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2719

last_fw = last_output_firmware(pipe->output_stage);

drivers/staging/media/atomisp/pci/sh_css.c

273

pipe_generate_pipe_num(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2737

err = add_firmwares(me, capture_pp_binary, pipe->output_stage, last_fw,

drivers/staging/media/atomisp/pci/sh_css.c

2772

init_vf_frameinfo_defaults(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2781

sh_css_pipe_get_viewfinder_frame_info(pipe, &vf_frame->frame_info, idx);

drivers/staging/media/atomisp/pci/sh_css.c

2782

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

2817

static void get_pipe_extra_pixel(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2820

enum ia_css_pipe_id pipe_id = pipe->mode;

drivers/staging/media/atomisp/pci/sh_css.c

2823

struct ia_css_resolution dvs_env = pipe->config.dvs_envelope;

drivers/staging/media/atomisp/pci/sh_css.c

2832

if (pipe->pipe_settings.preview.preview_binary.info) {

drivers/staging/media/atomisp/pci/sh_css.c

2834

pipe->pipe_settings.preview.preview_binary.info->sp.pipeline.left_cropping;

drivers/staging/media/atomisp/pci/sh_css.c

2836

pipe->pipe_settings.preview.preview_binary.info->sp.pipeline.top_cropping;

drivers/staging/media/atomisp/pci/sh_css.c

2838

dvs_env = pipe->pipe_settings.preview.preview_binary.dvs_envelope;

drivers/staging/media/atomisp/pci/sh_css.c

2841

if (pipe->pipe_settings.video.video_binary.info) {

drivers/staging/media/atomisp/pci/sh_css.c

2843

pipe->pipe_settings.video.video_binary.info->sp.pipeline.left_cropping;

drivers/staging/media/atomisp/pci/sh_css.c

2845

pipe->pipe_settings.video.video_binary.info->sp.pipeline.top_cropping;

drivers/staging/media/atomisp/pci/sh_css.c

2847

dvs_env = pipe->pipe_settings.video.video_binary.dvs_envelope;

drivers/staging/media/atomisp/pci/sh_css.c

2850

for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) {

drivers/staging/media/atomisp/pci/sh_css.c

2851

if (pipe->pipe_settings.capture.primary_binary[i].info) {

drivers/staging/media/atomisp/pci/sh_css.c

2853

pipe->pipe_settings.capture.primary_binary[i].info->sp.pipeline.left_cropping;

drivers/staging/media/atomisp/pci/sh_css.c

2855

pipe->pipe_settings.capture.primary_binary[i].info->sp.pipeline.top_cropping;

drivers/staging/media/atomisp/pci/sh_css.c

2858

pipe->pipe_settings.capture.primary_binary[i].dvs_envelope.width;

drivers/staging/media/atomisp/pci/sh_css.c

286

create_host_preview_pipeline(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2860

pipe->pipe_settings.capture.primary_binary[i].dvs_envelope.height;

drivers/staging/media/atomisp/pci/sh_css.c

2873

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2883

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2884

assert(pipe->stream);

drivers/staging/media/atomisp/pci/sh_css.c

2888

pipe, pipe->config.input_effective_res.width,

drivers/staging/media/atomisp/pci/sh_css.c

2889

pipe->config.input_effective_res.height);

drivers/staging/media/atomisp/pci/sh_css.c

289

create_host_video_pipeline(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2891

input_res = &pipe->stream->config.input_config.input_res;

drivers/staging/media/atomisp/pci/sh_css.c

2894

effective_res = &pipe->config.input_effective_res;

drivers/staging/media/atomisp/pci/sh_css.c

2896

effective_res = &pipe->stream->config.input_config.effective_res;

drivers/staging/media/atomisp/pci/sh_css.c

2898

get_pipe_extra_pixel(pipe, &extra_row, &extra_col);

drivers/staging/media/atomisp/pci/sh_css.c

2900

in_frame->raw_bayer_order = pipe->stream->config.input_config.bayer_order;

drivers/staging/media/atomisp/pci/sh_css.c

292

create_host_copy_pipeline(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2924

column += get_crop_columns_for_bayer_order(&pipe->stream->config);

drivers/staging/media/atomisp/pci/sh_css.c

2925

row += get_crop_lines_for_bayer_order(&pipe->stream->config);

drivers/staging/media/atomisp/pci/sh_css.c

2936

init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2950

in_frame->frame_info.format = (pipe->stream->config.pack_raw_pixels) ?

drivers/staging/media/atomisp/pci/sh_css.c

2954

in_frame->frame_info.res.width = pipe->stream->config.input_config.input_res.width;

drivers/staging/media/atomisp/pci/sh_css.c

2955

in_frame->frame_info.res.height = pipe->stream->config.input_config.input_res.height;

drivers/staging/media/atomisp/pci/sh_css.c

2956

in_frame->frame_info.raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2958

pipe->stream->config.input_config.input_res.width, 0);

drivers/staging/media/atomisp/pci/sh_css.c

2959

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

2965

ia_css_get_crop_offsets(pipe, &in_frame->frame_info);

drivers/staging/media/atomisp/pci/sh_css.c

297

create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

2976

init_out_frameinfo_defaults(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

2985

sh_css_pipe_get_output_frame_info(pipe, &out_frame->frame_info, idx);

drivers/staging/media/atomisp/pci/sh_css.c

2986

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

2996

static int create_host_video_pipeline(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

300

create_host_capture_pipeline(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3019

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3020

if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) {

drivers/staging/media/atomisp/pci/sh_css.c

3025

out_frame = &pipe->out_frame_struct;

drivers/staging/media/atomisp/pci/sh_css.c

3028

me = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

303

create_host_yuvpp_pipeline(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3031

me->dvs_frame_delay = pipe->dvs_frame_delay;

drivers/staging/media/atomisp/pci/sh_css.c

3038

need_in_frameinfo_memory = !(pipe->stream->config.online ||

drivers/staging/media/atomisp/pci/sh_css.c

3039

pipe->stream->config.continuous);

drivers/staging/media/atomisp/pci/sh_css.c

3042

need_in_frameinfo_memory = pipe->stream->config.mode ==

drivers/staging/media/atomisp/pci/sh_css.c

3048

in_frame = &pipe->in_frame_struct;

drivers/staging/media/atomisp/pci/sh_css.c

3049

err = init_in_frameinfo_memory_defaults(pipe, in_frame,

drivers/staging/media/atomisp/pci/sh_css.c

3056

err = init_out_frameinfo_defaults(pipe, out_frame, 0);

drivers/staging/media/atomisp/pci/sh_css.c

3060

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) {

drivers/staging/media/atomisp/pci/sh_css.c

3061

vf_frame = &pipe->vf_frame_struct;

drivers/staging/media/atomisp/pci/sh_css.c

3063

err = init_vf_frameinfo_defaults(pipe, vf_frame, 0);

drivers/staging/media/atomisp/pci/sh_css.c

3068

copy_binary = &pipe->pipe_settings.video.copy_binary;

drivers/staging/media/atomisp/pci/sh_css.c

3069

video_binary = &pipe->pipe_settings.video.video_binary;

drivers/staging/media/atomisp/pci/sh_css.c

3070

vf_pp_binary = &pipe->pipe_settings.video.vf_pp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

3072

yuv_scaler_binary = pipe->pipe_settings.video.yuv_scaler_binary;

drivers/staging/media/atomisp/pci/sh_css.c

3073

num_yuv_scaler = pipe->pipe_settings.video.num_yuv_scaler;

drivers/staging/media/atomisp/pci/sh_css.c

3074

is_output_stage = pipe->pipe_settings.video.is_output_stage;

drivers/staging/media/atomisp/pci/sh_css.c

3089

} else if (pipe->stream->config.continuous) {

drivers/staging/media/atomisp/pci/sh_css.c

309

const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3095

in_frame = pipe->stream->last_pipe->continuous_frames[0];

drivers/staging/media/atomisp/pci/sh_css.c

3097

in_frame = pipe->continuous_frames[0];

drivers/staging/media/atomisp/pci/sh_css.c

312

ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3130

err = add_vf_pp_stage(pipe, in_frame, vf_frame, vf_pp_binary,

drivers/staging/media/atomisp/pci/sh_css.c

3140

pipe->pipe_settings.video.tnr_frames[frm];

drivers/staging/media/atomisp/pci/sh_css.c

3144

pipe->pipe_settings.video.delay_frames[frm];

drivers/staging/media/atomisp/pci/sh_css.c

315

ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3155

err = add_yuv_scaler_stage(pipe, me, tmp_in_frame,

drivers/staging/media/atomisp/pci/sh_css.c

3170

pipe->pipeline.acquire_isp_each_stage = false;

drivers/staging/media/atomisp/pci/sh_css.c

3171

ia_css_pipeline_finalize_stages(&pipe->pipeline,

drivers/staging/media/atomisp/pci/sh_css.c

3172

pipe->stream->config.continuous);

drivers/staging/media/atomisp/pci/sh_css.c

3181

create_host_preview_pipeline(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

3199

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3200

if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) {

drivers/staging/media/atomisp/pci/sh_css.c

3207

me = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

3219

sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR);

drivers/staging/media/atomisp/pci/sh_css.c

3220

buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR);

drivers/staging/media/atomisp/pci/sh_css.c

3221

online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/sh_css.c

3222

continuous = pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/sh_css.c

3228

need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY;

drivers/staging/media/atomisp/pci/sh_css.c

3231

err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame,

drivers/staging/media/atomisp/pci/sh_css.c

3240

err = init_out_frameinfo_defaults(pipe, &me->out_frame[0], 0);

drivers/staging/media/atomisp/pci/sh_css.c

3245

copy_binary = &pipe->pipe_settings.preview.copy_binary;

drivers/staging/media/atomisp/pci/sh_css.c

3246

preview_binary = &pipe->pipe_settings.preview.preview_binary;

drivers/staging/media/atomisp/pci/sh_css.c

3247

if (pipe->pipe_settings.preview.vf_pp_binary.info)

drivers/staging/media/atomisp/pci/sh_css.c

3248

vf_pp_binary = &pipe->pipe_settings.preview.vf_pp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

3250

if (pipe->pipe_settings.preview.copy_binary.info) {

drivers/staging/media/atomisp/pci/sh_css.c

3259

} else if (pipe->stream->config.continuous) {

drivers/staging/media/atomisp/pci/sh_css.c

3266

in_frame = pipe->stream->last_pipe->continuous_frames[0];

drivers/staging/media/atomisp/pci/sh_css.c

3268

in_frame = pipe->continuous_frames[0];

drivers/staging/media/atomisp/pci/sh_css.c

3299

err = add_vf_pp_stage(pipe, in_frame, out_frame, vf_pp_binary,

drivers/staging/media/atomisp/pci/sh_css.c

3305

pipe->pipeline.acquire_isp_each_stage = false;

drivers/staging/media/atomisp/pci/sh_css.c

3306

ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous);

drivers/staging/media/atomisp/pci/sh_css.c

3313

static void send_raw_frames(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

3315

if (pipe->stream->config.continuous) {

drivers/staging/media/atomisp/pci/sh_css.c

3319

(pipe->stream->config.init_num_cont_raw_buf, true);

drivers/staging/media/atomisp/pci/sh_css.c

3321

(pipe->stream->config.target_num_cont_raw_buf, false);

drivers/staging/media/atomisp/pci/sh_css.c

3324

for (i = 0; i < pipe->stream->config.init_num_cont_raw_buf; i++) {

drivers/staging/media/atomisp/pci/sh_css.c

3326

pipe->continuous_frames[i], pipe->cont_md_buffers[i]);

drivers/staging/media/atomisp/pci/sh_css.c

3334

preview_start(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

3342

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3343

if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) {

drivers/staging/media/atomisp/pci/sh_css.c

3348

preview_pipe_input_mode = pipe->stream->config.mode;

drivers/staging/media/atomisp/pci/sh_css.c

3350

copy_pipe = pipe->pipe_settings.preview.copy_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

3351

capture_pipe = pipe->pipe_settings.preview.capture_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

3356

err = send_mipi_frames(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3361

send_raw_frames(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

3363

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

3366

if (pipe->stream->cont_capt) {

drivers/staging/media/atomisp/pci/sh_css.c

3373

if (pipe->stream->config.continuous) {

drivers/staging/media/atomisp/pci/sh_css.c

3378

pipe->stream->config.pixels_per_clock == 2, false,

drivers/staging/media/atomisp/pci/sh_css.c

3379

false, pipe->required_bds_factor,

drivers/staging/media/atomisp/pci/sh_css.c

3381

pipe->stream->config.mode,

drivers/staging/media/atomisp/pci/sh_css.c

3382

&pipe->stream->config.metadata_config,

drivers/staging/media/atomisp/pci/sh_css.c

3383

&pipe->stream->info.metadata_info,

drivers/staging/media/atomisp/pci/sh_css.c

3384

pipe->stream->config.source.port.port);

drivers/staging/media/atomisp/pci/sh_css.c

339

static void get_pipe_extra_pixel(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

3394

if (pipe->stream->cont_capt) {

drivers/staging/media/atomisp/pci/sh_css.c

3405

&pipe->stream->config.metadata_config,

drivers/staging/media/atomisp/pci/sh_css.c

3406

&pipe->stream->info.metadata_info,

drivers/staging/media/atomisp/pci/sh_css.c

3410

start_pipe(pipe, copy_ovrd, preview_pipe_input_mode);

drivers/staging/media/atomisp/pci/sh_css.c

3417

ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

343

sh_css_pipe_free_shading_table(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

3432

IA_CSS_ENTER("pipe=%p, buffer=%p", pipe, buffer);

drivers/staging/media/atomisp/pci/sh_css.c

3434

if ((!pipe) || (!buffer)) {

drivers/staging/media/atomisp/pci/sh_css.c

3441

pipe_id = pipe->mode;

drivers/staging/media/atomisp/pci/sh_css.c

345

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

3454

ret_err = ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

3478

pipeline = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

350

if (pipe->shading_table)

drivers/staging/media/atomisp/pci/sh_css.c

351

ia_css_shading_table_free(pipe->shading_table);

drivers/staging/media/atomisp/pci/sh_css.c

352

pipe->shading_table = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

3625

ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

3638

IA_CSS_ENTER("pipe=%p, buffer=%p", pipe, buffer);

drivers/staging/media/atomisp/pci/sh_css.c

3640

if ((!pipe) || (!buffer)) {

drivers/staging/media/atomisp/pci/sh_css.c

3645

pipe_id = pipe->mode;

drivers/staging/media/atomisp/pci/sh_css.c

3653

ret_err = ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

3749

frame->valid = pipe->num_invalid_frames == 0;

drivers/staging/media/atomisp/pci/sh_css.c

3751

pipe->num_invalid_frames--;

drivers/staging/media/atomisp/pci/sh_css.c

385

verify_copy_out_frame_format(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

387

enum ia_css_frame_format out_fmt = pipe->output_info[0].format;

drivers/staging/media/atomisp/pci/sh_css.c

3892

event->pipe = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

390

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

391

assert(pipe->stream);

drivers/staging/media/atomisp/pci/sh_css.c

393

switch (pipe->stream->config.input_config.format) {

drivers/staging/media/atomisp/pci/sh_css.c

3965

event->pipe = find_pipe_by_num(payload[1]);

drivers/staging/media/atomisp/pci/sh_css.c

3968

if (!event->pipe)

drivers/staging/media/atomisp/pci/sh_css.c

3975

n = event->pipe->stream->num_pipes;

drivers/staging/media/atomisp/pci/sh_css.c

3978

event->pipe->stream->pipes[i];

drivers/staging/media/atomisp/pci/sh_css.c

3980

event->pipe = p;

drivers/staging/media/atomisp/pci/sh_css.c

3991

&event->pipe->pipeline,

drivers/staging/media/atomisp/pci/sh_css.c

4002

if (event->pipe)

drivers/staging/media/atomisp/pci/sh_css.c

4040

event->pipe = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

4053

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4063

pipe = stream->last_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4064

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

4069

pipe_id = pipe->mode;

drivers/staging/media/atomisp/pci/sh_css.c

4079

err = preview_start(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4082

err = video_start(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4085

err = capture_start(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4088

err = yuvpp_start(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4127

if (!copy_on_sp(pipe)) {

drivers/staging/media/atomisp/pci/sh_css.c

4129

err = sh_css_param_update_isp_params(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4139

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

4164

if (pipe->stream->config.continuous) {

drivers/staging/media/atomisp/pci/sh_css.c

4168

copy_pipe = pipe->pipe_settings.preview.copy_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4170

copy_pipe = pipe->pipe_settings.video.copy_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4183

if (pipe->stream->cont_capt) {

drivers/staging/media/atomisp/pci/sh_css.c

4187

capture_pipe = pipe->pipe_settings.preview.capture_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4189

capture_pipe = pipe->pipe_settings.video.capture_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4222

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4228

pipe = find_pipe_by_num(pipe_num);

drivers/staging/media/atomisp/pci/sh_css.c

4229

continuous = pipe && pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/sh_css.c

4287

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4297

pipe, width, height, padded_width, format, idx);

drivers/staging/media/atomisp/pci/sh_css.c

4298

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

4308

if (pipe->output_info[idx].res.width != width ||

drivers/staging/media/atomisp/pci/sh_css.c

4309

pipe->output_info[idx].res.height != height ||

drivers/staging/media/atomisp/pci/sh_css.c

4310

pipe->output_info[idx].format != format) {

drivers/staging/media/atomisp/pci/sh_css.c

4312

&pipe->output_info[idx],

drivers/staging/media/atomisp/pci/sh_css.c

4323

sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4333

binary = ia_css_pipe_get_shading_correction_binary(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4338

pipe->required_bds_factor,

drivers/staging/media/atomisp/pci/sh_css.c

4339

(const struct ia_css_stream_config *)&pipe->stream->config,

drivers/staging/media/atomisp/pci/sh_css.c

4359

sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4365

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4370

binary = ia_css_pipe_get_s3a_binary(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4373

err = ia_css_binary_3a_grid_info(binary, info, pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4380

binary = ia_css_pipe_get_sdis_binary(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4383

ia_css_binary_dvs_grid_info(binary, info, pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4384

ia_css_binary_dvs_stat_grid_info(binary, info, pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4410

ia_css_pipe_check_format(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4420

if (NULL == pipe || NULL == pipe->pipe_settings.video.video_binary.info) {

drivers/staging/media/atomisp/pci/sh_css.c

4426

supported_formats = pipe->pipe_settings.video.video_binary.info->output_formats;

drivers/staging/media/atomisp/pci/sh_css.c

4427

number_of_formats = sizeof(pipe->pipe_settings.video.video_binary.info->output_formats) / sizeof(enum ia_css_frame_format);

drivers/staging/media/atomisp/pci/sh_css.c

4444

static int load_video_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

4450

bool continuous = pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/sh_css.c

4458

struct ia_css_video_settings *mycs = &pipe->pipe_settings.video;

drivers/staging/media/atomisp/pci/sh_css.c

4461

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4462

assert(pipe->mode == IA_CSS_PIPE_ID_VIDEO);

drivers/staging/media/atomisp/pci/sh_css.c

4471

online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/sh_css.c

4472

pipe_out_info = &pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

4473

pipe_vf_out_info = &pipe->vf_output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

4482

err = ia_css_util_check_input(&pipe->stream->config, false, false);

drivers/staging/media/atomisp/pci/sh_css.c

4486

if (online && pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY)

drivers/staging/media/atomisp/pci/sh_css.c

4488

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) {

drivers/staging/media/atomisp/pci/sh_css.c

4499

if (pipe->out_yuv_ds_input_info.res.width)

drivers/staging/media/atomisp/pci/sh_css.c

4500

video_bin_out_info = pipe->out_yuv_ds_input_info;

drivers/staging/media/atomisp/pci/sh_css.c

4505

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) {

drivers/staging/media/atomisp/pci/sh_css.c

4550

ia_css_pipe_get_yuvscaler_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4570

err = ia_css_pipe_get_video_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4573

pipe->stream->config.left_padding);

drivers/staging/media/atomisp/pci/sh_css.c

460

struct ia_css_pipe *pipe = stream->last_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4622

if (!pipe->config.enable_vfpp_bci)

drivers/staging/media/atomisp/pci/sh_css.c

4644

pipe->dvs_frame_delay = 0;

drivers/staging/media/atomisp/pci/sh_css.c

465

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4650

pipe->num_invalid_frames = pipe->dvs_frame_delay;

drivers/staging/media/atomisp/pci/sh_css.c

4651

pipe->info.num_invalid_frames = pipe->num_invalid_frames;

drivers/staging/media/atomisp/pci/sh_css.c

4659

pipe->num_invalid_frames *= 2;

drivers/staging/media/atomisp/pci/sh_css.c

4663

pipe->num_invalid_frames, pipe->dvs_frame_delay);

drivers/staging/media/atomisp/pci/sh_css.c

4673

err = load_copy_binary(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4681

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && need_vf_pp) {

drivers/staging/media/atomisp/pci/sh_css.c

4686

ia_css_pipe_get_vfpp_binarydesc(pipe, &vf_pp_descr,

drivers/staging/media/atomisp/pci/sh_css.c

4695

assert(pipe->config.enable_vfpp_bci);

drivers/staging/media/atomisp/pci/sh_css.c

4696

ia_css_pipe_get_yuvscaler_binarydesc(pipe, &vf_pp_descr,

drivers/staging/media/atomisp/pci/sh_css.c

470

if (pipe->pipeline.stages)

drivers/staging/media/atomisp/pci/sh_css.c

4707

err = allocate_delay_frames(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

471

binary = pipe->pipeline.stages->binary;

drivers/staging/media/atomisp/pci/sh_css.c

4740

unload_video_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

4744

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4746

if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) {

drivers/staging/media/atomisp/pci/sh_css.c

4750

ia_css_binary_unload(&pipe->pipe_settings.video.copy_binary);

drivers/staging/media/atomisp/pci/sh_css.c

4751

ia_css_binary_unload(&pipe->pipe_settings.video.video_binary);

drivers/staging/media/atomisp/pci/sh_css.c

4752

ia_css_binary_unload(&pipe->pipe_settings.video.vf_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

4754

for (i = 0; i < pipe->pipe_settings.video.num_yuv_scaler; i++)

drivers/staging/media/atomisp/pci/sh_css.c

4755

ia_css_binary_unload(&pipe->pipe_settings.video.yuv_scaler_binary[i]);

drivers/staging/media/atomisp/pci/sh_css.c

4757

kfree(pipe->pipe_settings.video.is_output_stage);

drivers/staging/media/atomisp/pci/sh_css.c

4758

pipe->pipe_settings.video.is_output_stage = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

4759

kfree(pipe->pipe_settings.video.yuv_scaler_binary);

drivers/staging/media/atomisp/pci/sh_css.c

4760

pipe->pipe_settings.video.yuv_scaler_binary = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

4766

static int video_start(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

4774

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4775

if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) {

drivers/staging/media/atomisp/pci/sh_css.c

4780

video_pipe_input_mode = pipe->stream->config.mode;

drivers/staging/media/atomisp/pci/sh_css.c

4782

copy_pipe = pipe->pipe_settings.video.copy_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4783

capture_pipe = pipe->pipe_settings.video.capture_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

4789

err = send_mipi_frames(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4793

send_raw_frames(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4795

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

4798

if (pipe->stream->cont_capt) {

drivers/staging/media/atomisp/pci/sh_css.c

4805

if (pipe->stream->config.continuous) {

drivers/staging/media/atomisp/pci/sh_css.c

4810

pipe->stream->config.pixels_per_clock == 2, false,

drivers/staging/media/atomisp/pci/sh_css.c

4811

false, pipe->required_bds_factor,

drivers/staging/media/atomisp/pci/sh_css.c

4813

pipe->stream->config.mode,

drivers/staging/media/atomisp/pci/sh_css.c

4814

&pipe->stream->config.metadata_config,

drivers/staging/media/atomisp/pci/sh_css.c

4815

&pipe->stream->info.metadata_info,

drivers/staging/media/atomisp/pci/sh_css.c

4816

pipe->stream->config.source.port.port);

drivers/staging/media/atomisp/pci/sh_css.c

4826

if (pipe->stream->cont_capt) {

drivers/staging/media/atomisp/pci/sh_css.c

4837

&pipe->stream->config.metadata_config,

drivers/staging/media/atomisp/pci/sh_css.c

4838

&pipe->stream->info.metadata_info,

drivers/staging/media/atomisp/pci/sh_css.c

484

pipe->config.mode == IA_CSS_PIPE_MODE_COPY) {

drivers/staging/media/atomisp/pci/sh_css.c

4842

start_pipe(pipe, copy_ovrd, video_pipe_input_mode);

drivers/staging/media/atomisp/pci/sh_css.c

4850

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4854

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4861

if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE &&

drivers/staging/media/atomisp/pci/sh_css.c

4862

(pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW ||

drivers/staging/media/atomisp/pci/sh_css.c

4863

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER))

drivers/staging/media/atomisp/pci/sh_css.c

4866

*info = pipe->vf_output_info[idx];

drivers/staging/media/atomisp/pci/sh_css.c

4881

sh_css_pipe_configure_viewfinder(struct ia_css_pipe *pipe, unsigned int width,

drivers/staging/media/atomisp/pci/sh_css.c

4889

pipe, width, height, min_width, format, idx);

drivers/staging/media/atomisp/pci/sh_css.c

4891

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

4901

if (pipe->vf_output_info[idx].res.width != width ||

drivers/staging/media/atomisp/pci/sh_css.c

4902

pipe->vf_output_info[idx].res.height != height ||

drivers/staging/media/atomisp/pci/sh_css.c

4903

pipe->vf_output_info[idx].format != format)

drivers/staging/media/atomisp/pci/sh_css.c

4904

ia_css_frame_info_init(&pipe->vf_output_info[idx], width, height,

drivers/staging/media/atomisp/pci/sh_css.c

4911

static int load_copy_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

4915

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4918

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE ||

drivers/staging/media/atomisp/pci/sh_css.c

4919

pipe->mode == IA_CSS_PIPE_ID_COPY);

drivers/staging/media/atomisp/pci/sh_css.c

4920

if (pipe->pipe_settings.capture.copy_binary.info)

drivers/staging/media/atomisp/pci/sh_css.c

4923

err = ia_css_frame_check_info(&pipe->output_info[0]);

drivers/staging/media/atomisp/pci/sh_css.c

4927

err = verify_copy_out_frame_format(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4931

err = load_copy_binary(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

4932

&pipe->pipe_settings.capture.copy_binary,

drivers/staging/media/atomisp/pci/sh_css.c

4941

const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

4943

const struct ia_css_frame_info *out_info = &pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

4946

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4947

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE);

drivers/staging/media/atomisp/pci/sh_css.c

4955

if (pipe->out_yuv_ds_input_info.res.width &&

drivers/staging/media/atomisp/pci/sh_css.c

4956

((pipe->out_yuv_ds_input_info.res.width != out_info->res.width) ||

drivers/staging/media/atomisp/pci/sh_css.c

4957

(pipe->out_yuv_ds_input_info.res.height != out_info->res.height)))

drivers/staging/media/atomisp/pci/sh_css.c

4960

if (pipe->config.default_capture_config.enable_xnr != 0)

drivers/staging/media/atomisp/pci/sh_css.c

4963

if ((pipe->stream->isp_params_configs->dz_config.dx < HRT_GDC_N) ||

drivers/staging/media/atomisp/pci/sh_css.c

4964

(pipe->stream->isp_params_configs->dz_config.dy < HRT_GDC_N) ||

drivers/staging/media/atomisp/pci/sh_css.c

4965

pipe->config.enable_dz)

drivers/staging/media/atomisp/pci/sh_css.c

4972

const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

4975

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

4976

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE);

drivers/staging/media/atomisp/pci/sh_css.c

4977

return (pipe->extra_config.enable_dvs_6axis) ? true : false;

drivers/staging/media/atomisp/pci/sh_css.c

5005

struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5026

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5027

assert(pipe->stream);

drivers/staging/media/atomisp/pci/sh_css.c

5028

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE ||

drivers/staging/media/atomisp/pci/sh_css.c

5029

pipe->mode == IA_CSS_PIPE_ID_COPY);

drivers/staging/media/atomisp/pci/sh_css.c

5031

online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/sh_css.c

5032

sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR);

drivers/staging/media/atomisp/pci/sh_css.c

5033

memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY;

drivers/staging/media/atomisp/pci/sh_css.c

5034

continuous = pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/sh_css.c

5036

mycs = &pipe->pipe_settings.capture;

drivers/staging/media/atomisp/pci/sh_css.c

5037

pipe_out_info = &pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

5038

pipe_vf_out_info = &pipe->vf_output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

5044

pipe->config.isp_pipe_version);

drivers/staging/media/atomisp/pci/sh_css.c

5050

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) {

drivers/staging/media/atomisp/pci/sh_css.c

5063

need_pp = need_capture_pp(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5090

capt_pp_out_info = pipe->out_yuv_ds_input_info;

drivers/staging/media/atomisp/pci/sh_css.c

5130

ia_css_pipe_get_yuvscaler_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5145

capt_pp_out_info = pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

5149

need_ldc = need_capt_ldc(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5158

ia_css_pipe_get_capturepp_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5174

ia_css_pipe_get_ldc_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5194

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] &&

drivers/staging/media/atomisp/pci/sh_css.c

5197

ia_css_pipe_get_primary_binarydesc(pipe, &prim_descr[i],

drivers/staging/media/atomisp/pci/sh_css.c

5223

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) {

drivers/staging/media/atomisp/pci/sh_css.c

5226

ia_css_pipe_get_vfpp_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5234

err = allocate_delay_frames(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5250

err = load_copy_binary(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5263

allocate_delay_frames(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5274

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

5275

IA_CSS_ERROR("Invalid args - pipe %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5279

mode = pipe->mode;

drivers/staging/media/atomisp/pci/sh_css.c

5280

dvs_frame_delay = pipe->dvs_frame_delay;

drivers/staging/media/atomisp/pci/sh_css.c

5287

struct ia_css_capture_settings *mycs_capture = &pipe->pipe_settings.capture;

drivers/staging/media/atomisp/pci/sh_css.c

5293

struct ia_css_video_settings *mycs_video = &pipe->pipe_settings.video;

drivers/staging/media/atomisp/pci/sh_css.c

5314

struct ia_css_preview_settings *mycs_preview = &pipe->pipe_settings.preview;

drivers/staging/media/atomisp/pci/sh_css.c

5350

static int load_advanced_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5362

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5363

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE ||

drivers/staging/media/atomisp/pci/sh_css.c

5364

pipe->mode == IA_CSS_PIPE_ID_COPY);

drivers/staging/media/atomisp/pci/sh_css.c

5365

if (pipe->pipe_settings.capture.pre_isp_binary.info)

drivers/staging/media/atomisp/pci/sh_css.c

5367

pipe_out_info = &pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

5368

pipe_vf_out_info = &pipe->vf_output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

5374

need_pp = need_capture_pp(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5384

ia_css_pipe_get_capturepp_binarydesc(pipe, &capture_pp_descr,

drivers/staging/media/atomisp/pci/sh_css.c

5388

&pipe->pipe_settings.capture.capture_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5399

ia_css_pipe_get_post_gdc_binarydesc(pipe, &post_gdc_descr,

drivers/staging/media/atomisp/pci/sh_css.c

5403

&pipe->pipe_settings.capture.post_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5412

ia_css_pipe_get_gdc_binarydesc(pipe, &gdc_descr, &gdc_in_info,

drivers/staging/media/atomisp/pci/sh_css.c

5413

&pipe->pipe_settings.capture.post_isp_binary.in_frame_info);

drivers/staging/media/atomisp/pci/sh_css.c

5415

&pipe->pipe_settings.capture.anr_gdc_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5419

pipe->pipe_settings.capture.anr_gdc_binary.left_padding =

drivers/staging/media/atomisp/pci/sh_css.c

5420

pipe->pipe_settings.capture.post_isp_binary.left_padding;

drivers/staging/media/atomisp/pci/sh_css.c

5426

ia_css_pipe_get_pre_gdc_binarydesc(pipe, &pre_gdc_descr, &pre_in_info,

drivers/staging/media/atomisp/pci/sh_css.c

5427

&pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info);

drivers/staging/media/atomisp/pci/sh_css.c

5429

&pipe->pipe_settings.capture.pre_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5433

pipe->pipe_settings.capture.pre_isp_binary.left_padding =

drivers/staging/media/atomisp/pci/sh_css.c

5434

pipe->pipe_settings.capture.anr_gdc_binary.left_padding;

drivers/staging/media/atomisp/pci/sh_css.c

5439

&pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info;

drivers/staging/media/atomisp/pci/sh_css.c

5442

&pipe->pipe_settings.capture.post_isp_binary.vf_frame_info;

drivers/staging/media/atomisp/pci/sh_css.c

5448

ia_css_pipe_get_vfpp_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5451

&pipe->pipe_settings.capture.vf_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5459

need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR;

drivers/staging/media/atomisp/pci/sh_css.c

5462

load_copy_binary(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5463

&pipe->pipe_settings.capture.copy_binary,

drivers/staging/media/atomisp/pci/sh_css.c

5464

&pipe->pipe_settings.capture.pre_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5469

static int load_bayer_isp_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5476

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5477

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE ||

drivers/staging/media/atomisp/pci/sh_css.c

5478

pipe->mode == IA_CSS_PIPE_ID_COPY);

drivers/staging/media/atomisp/pci/sh_css.c

5479

pipe_out_info = &pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

5481

if (pipe->pipe_settings.capture.pre_isp_binary.info)

drivers/staging/media/atomisp/pci/sh_css.c

5488

ia_css_pipe_get_pre_de_binarydesc(pipe, &pre_de_descr,

drivers/staging/media/atomisp/pci/sh_css.c

5493

&pipe->pipe_settings.capture.pre_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5498

static int load_low_light_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5509

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5510

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE ||

drivers/staging/media/atomisp/pci/sh_css.c

5511

pipe->mode == IA_CSS_PIPE_ID_COPY);

drivers/staging/media/atomisp/pci/sh_css.c

5513

if (pipe->pipe_settings.capture.pre_isp_binary.info)

drivers/staging/media/atomisp/pci/sh_css.c

5515

pipe_vf_out_info = &pipe->vf_output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

5516

pipe_out_info = &pipe->output_info[0];

drivers/staging/media/atomisp/pci/sh_css.c

5523

need_pp = need_capture_pp(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5533

ia_css_pipe_get_capturepp_binarydesc(pipe, &capture_pp_descr,

drivers/staging/media/atomisp/pci/sh_css.c

5537

&pipe->pipe_settings.capture.capture_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5548

ia_css_pipe_get_post_anr_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5551

&pipe->pipe_settings.capture.post_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5560

ia_css_pipe_get_anr_binarydesc(pipe, &anr_descr, &anr_in_info,

drivers/staging/media/atomisp/pci/sh_css.c

5561

&pipe->pipe_settings.capture.post_isp_binary.in_frame_info);

drivers/staging/media/atomisp/pci/sh_css.c

5563

&pipe->pipe_settings.capture.anr_gdc_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5567

pipe->pipe_settings.capture.anr_gdc_binary.left_padding =

drivers/staging/media/atomisp/pci/sh_css.c

5568

pipe->pipe_settings.capture.post_isp_binary.left_padding;

drivers/staging/media/atomisp/pci/sh_css.c

5574

ia_css_pipe_get_pre_anr_binarydesc(pipe, &pre_anr_descr, &pre_in_info,

drivers/staging/media/atomisp/pci/sh_css.c

5575

&pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info);

drivers/staging/media/atomisp/pci/sh_css.c

5577

&pipe->pipe_settings.capture.pre_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5581

pipe->pipe_settings.capture.pre_isp_binary.left_padding =

drivers/staging/media/atomisp/pci/sh_css.c

5582

pipe->pipe_settings.capture.anr_gdc_binary.left_padding;

drivers/staging/media/atomisp/pci/sh_css.c

5587

&pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info;

drivers/staging/media/atomisp/pci/sh_css.c

5590

&pipe->pipe_settings.capture.post_isp_binary.vf_frame_info;

drivers/staging/media/atomisp/pci/sh_css.c

5596

ia_css_pipe_get_vfpp_binarydesc(pipe, &vf_pp_descr,

drivers/staging/media/atomisp/pci/sh_css.c

5599

&pipe->pipe_settings.capture.vf_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5607

need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR;

drivers/staging/media/atomisp/pci/sh_css.c

5610

err = load_copy_binary(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5611

&pipe->pipe_settings.capture.copy_binary,

drivers/staging/media/atomisp/pci/sh_css.c

5612

&pipe->pipe_settings.capture.pre_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5617

static bool copy_on_sp(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5621

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5626

rval &= (pipe->mode == IA_CSS_PIPE_ID_CAPTURE);

drivers/staging/media/atomisp/pci/sh_css.c

5628

rval &= (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW);

drivers/staging/media/atomisp/pci/sh_css.c

5630

rval &= ((pipe->stream->config.input_config.format ==

drivers/staging/media/atomisp/pci/sh_css.c

5632

(pipe->config.mode == IA_CSS_PIPE_MODE_COPY));

drivers/staging/media/atomisp/pci/sh_css.c

5637

static int load_capture_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5643

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5644

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE ||

drivers/staging/media/atomisp/pci/sh_css.c

5645

pipe->mode == IA_CSS_PIPE_ID_COPY);

drivers/staging/media/atomisp/pci/sh_css.c

5647

if (pipe->pipe_settings.capture.primary_binary[0].info) {

drivers/staging/media/atomisp/pci/sh_css.c

5655

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED ||

drivers/staging/media/atomisp/pci/sh_css.c

5656

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER ||

drivers/staging/media/atomisp/pci/sh_css.c

5657

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT;

drivers/staging/media/atomisp/pci/sh_css.c

5658

err = ia_css_util_check_input(&pipe->stream->config, must_be_raw, false);

drivers/staging/media/atomisp/pci/sh_css.c

5663

if (copy_on_sp(pipe) &&

drivers/staging/media/atomisp/pci/sh_css.c

5664

pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) {

drivers/staging/media/atomisp/pci/sh_css.c

5666

&pipe->output_info[0],

drivers/staging/media/atomisp/pci/sh_css.c

5675

switch (pipe->config.default_capture_config.mode) {

drivers/staging/media/atomisp/pci/sh_css.c

5677

err = load_copy_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5679

pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/sh_css.c

5683

err = load_bayer_isp_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5686

err = load_primary_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5689

err = load_advanced_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5692

err = load_low_light_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5705

unload_capture_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5709

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5711

if (!pipe || (pipe->mode != IA_CSS_PIPE_ID_CAPTURE &&

drivers/staging/media/atomisp/pci/sh_css.c

5712

pipe->mode != IA_CSS_PIPE_ID_COPY)) {

drivers/staging/media/atomisp/pci/sh_css.c

5716

ia_css_binary_unload(&pipe->pipe_settings.capture.copy_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5718

ia_css_binary_unload(&pipe->pipe_settings.capture.primary_binary[i]);

drivers/staging/media/atomisp/pci/sh_css.c

5719

ia_css_binary_unload(&pipe->pipe_settings.capture.pre_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5720

ia_css_binary_unload(&pipe->pipe_settings.capture.anr_gdc_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5721

ia_css_binary_unload(&pipe->pipe_settings.capture.post_isp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5722

ia_css_binary_unload(&pipe->pipe_settings.capture.capture_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5723

ia_css_binary_unload(&pipe->pipe_settings.capture.capture_ldc_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5724

ia_css_binary_unload(&pipe->pipe_settings.capture.vf_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5726

for (i = 0; i < pipe->pipe_settings.capture.num_yuv_scaler; i++)

drivers/staging/media/atomisp/pci/sh_css.c

5727

ia_css_binary_unload(&pipe->pipe_settings.capture.yuv_scaler_binary[i]);

drivers/staging/media/atomisp/pci/sh_css.c

5729

kfree(pipe->pipe_settings.capture.is_output_stage);

drivers/staging/media/atomisp/pci/sh_css.c

5730

pipe->pipe_settings.capture.is_output_stage = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

5731

kfree(pipe->pipe_settings.capture.yuv_scaler_binary);

drivers/staging/media/atomisp/pci/sh_css.c

5732

pipe->pipe_settings.capture.yuv_scaler_binary = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

5749

need_yuv_scaler_stage(const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

5757

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

5758

assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP);

drivers/staging/media/atomisp/pci/sh_css.c

5762

((pipe->stream->config.input_config.format ==

drivers/staging/media/atomisp/pci/sh_css.c

5764

(pipe->output_info[0].format != IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8));

drivers/staging/media/atomisp/pci/sh_css.c

5766

in_res = pipe->config.input_effective_res;

drivers/staging/media/atomisp/pci/sh_css.c

5768

if (pipe->config.enable_dz)

drivers/staging/media/atomisp/pci/sh_css.c

5771

if ((pipe->output_info[0].res.width != 0) && need_format_conversion)

drivers/staging/media/atomisp/pci/sh_css.c

5775

out_res = pipe->output_info[i].res;

drivers/staging/media/atomisp/pci/sh_css.c

5913

ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

5939

in_info.res = pipe->config.input_effective_res;

drivers/staging/media/atomisp/pci/sh_css.c

5944

if (pipe->output_info[i].res.width != 0) {

drivers/staging/media/atomisp/pci/sh_css.c

5945

out_info[i] = &pipe->output_info[i];

drivers/staging/media/atomisp/pci/sh_css.c

5946

if (pipe->vf_output_info[i].res.width != 0)

drivers/staging/media/atomisp/pci/sh_css.c

5947

vf_out_info[i] = &pipe->vf_output_info[i];

drivers/staging/media/atomisp/pci/sh_css.c

5966

if (need_yuv_scaler_stage(pipe) && (num_stages == 0))

drivers/staging/media/atomisp/pci/sh_css.c

6014

tmp_in_info.res = pipe->config.input_effective_res;

drivers/staging/media/atomisp/pci/sh_css.c

6094

load_yuvpp_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

6106

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6107

assert(pipe->stream);

drivers/staging/media/atomisp/pci/sh_css.c

6108

assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP);

drivers/staging/media/atomisp/pci/sh_css.c

6110

if (pipe->pipe_settings.yuvpp.copy_binary.info)

drivers/staging/media/atomisp/pci/sh_css.c

6114

err = ia_css_util_check_input(&pipe->stream->config, false, false);

drivers/staging/media/atomisp/pci/sh_css.c

6118

mycs = &pipe->pipe_settings.yuvpp;

drivers/staging/media/atomisp/pci/sh_css.c

6121

if (pipe->vf_output_info[i].res.width != 0) {

drivers/staging/media/atomisp/pci/sh_css.c

6122

err = ia_css_util_check_vf_out_info(&pipe->output_info[i],

drivers/staging/media/atomisp/pci/sh_css.c

6123

&pipe->vf_output_info[i]);

drivers/staging/media/atomisp/pci/sh_css.c

6130

need_scaler = need_yuv_scaler_stage(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6137

err = ia_css_pipe_create_cas_scaler_desc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

6157

ia_css_pipe_get_yuvscaler_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

6197

(pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8);

drivers/staging/media/atomisp/pci/sh_css.c

6202

err = load_copy_binary(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

6227

pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/sh_css.c

6259

if (pipe->vf_output_info[i].res.width != 0) {

drivers/staging/media/atomisp/pci/sh_css.c

6260

ia_css_pipe_get_vfpp_binarydesc(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

6261

&vf_pp_descr, vf_pp_in_info[i], &pipe->vf_output_info[i]);

drivers/staging/media/atomisp/pci/sh_css.c

6279

unload_yuvpp_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

6283

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6285

if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) {

drivers/staging/media/atomisp/pci/sh_css.c

6289

ia_css_binary_unload(&pipe->pipe_settings.yuvpp.copy_binary);

drivers/staging/media/atomisp/pci/sh_css.c

6290

for (i = 0; i < pipe->pipe_settings.yuvpp.num_yuv_scaler; i++)

drivers/staging/media/atomisp/pci/sh_css.c

6291

ia_css_binary_unload(&pipe->pipe_settings.yuvpp.yuv_scaler_binary[i]);

drivers/staging/media/atomisp/pci/sh_css.c

6293

for (i = 0; i < pipe->pipe_settings.yuvpp.num_vf_pp; i++)

drivers/staging/media/atomisp/pci/sh_css.c

6294

ia_css_binary_unload(&pipe->pipe_settings.yuvpp.vf_pp_binary[i]);

drivers/staging/media/atomisp/pci/sh_css.c

6296

kfree(pipe->pipe_settings.yuvpp.is_output_stage);

drivers/staging/media/atomisp/pci/sh_css.c

6297

pipe->pipe_settings.yuvpp.is_output_stage = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

6298

kfree(pipe->pipe_settings.yuvpp.yuv_scaler_binary);

drivers/staging/media/atomisp/pci/sh_css.c

6299

pipe->pipe_settings.yuvpp.yuv_scaler_binary = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

6300

kfree(pipe->pipe_settings.yuvpp.vf_pp_binary);

drivers/staging/media/atomisp/pci/sh_css.c

6301

pipe->pipe_settings.yuvpp.vf_pp_binary = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

6307

static int yuvpp_start(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

6314

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6315

if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) {

drivers/staging/media/atomisp/pci/sh_css.c

6320

yuvpp_pipe_input_mode = pipe->stream->config.mode;

drivers/staging/media/atomisp/pci/sh_css.c

6326

err = send_mipi_frames(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6332

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

6335

start_pipe(pipe, copy_ovrd, yuvpp_pipe_input_mode);

drivers/staging/media/atomisp/pci/sh_css.c

6342

sh_css_pipe_unload_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

6346

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6348

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

6353

if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) {

drivers/staging/media/atomisp/pci/sh_css.c

6358

switch (pipe->mode) {

drivers/staging/media/atomisp/pci/sh_css.c

6360

err = unload_preview_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6363

err = unload_video_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6366

err = unload_capture_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6369

err = unload_yuvpp_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6379

sh_css_pipe_load_binaries(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

6383

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6387

if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY)

drivers/staging/media/atomisp/pci/sh_css.c

6390

switch (pipe->mode) {

drivers/staging/media/atomisp/pci/sh_css.c

6392

err = load_preview_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6395

err = load_video_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6398

err = load_capture_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6401

err = load_yuvpp_binaries(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6408

if (sh_css_pipe_unload_binaries(pipe)) {

drivers/staging/media/atomisp/pci/sh_css.c

6421

create_host_yuvpp_pipeline(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

6446

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6447

if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) {

drivers/staging/media/atomisp/pci/sh_css.c

6451

me = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

6458

num_stage = pipe->pipe_settings.yuvpp.num_yuv_scaler;

drivers/staging/media/atomisp/pci/sh_css.c

6459

num_output_stage = pipe->pipe_settings.yuvpp.num_output;

drivers/staging/media/atomisp/pci/sh_css.c

6469

sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR;

drivers/staging/media/atomisp/pci/sh_css.c

6470

buffered_sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR;

drivers/staging/media/atomisp/pci/sh_css.c

6471

online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/sh_css.c

6472

continuous = pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/sh_css.c

6477

need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY;

drivers/staging/media/atomisp/pci/sh_css.c

6498

if (pipe->stream->config.input_config.format ==

drivers/staging/media/atomisp/pci/sh_css.c

6501

} else if (pipe->stream->config.input_config.format ==

drivers/staging/media/atomisp/pci/sh_css.c

6525

err = init_in_frameinfo_memory_defaults(pipe,

drivers/staging/media/atomisp/pci/sh_css.c

6541

if (pipe->output_info[i].res.width != 0) {

drivers/staging/media/atomisp/pci/sh_css.c

6542

err = init_out_frameinfo_defaults(pipe, &me->out_frame[i], i);

drivers/staging/media/atomisp/pci/sh_css.c

6551

if (pipe->vf_output_info[i].res.width != 0) {

drivers/staging/media/atomisp/pci/sh_css.c

6552

err = init_vf_frameinfo_defaults(pipe, &me->vf_frame[i], i);

drivers/staging/media/atomisp/pci/sh_css.c

6561

copy_binary = &pipe->pipe_settings.yuvpp.copy_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6562

vf_pp_binary = pipe->pipe_settings.yuvpp.vf_pp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6563

yuv_scaler_binary = pipe->pipe_settings.yuvpp.yuv_scaler_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6564

need_scaler = need_yuv_scaler_stage(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6566

if (pipe->pipe_settings.yuvpp.copy_binary.info) {

drivers/staging/media/atomisp/pci/sh_css.c

6618

if (pipe->pipe_settings.yuvpp.is_output_stage[i]) {

drivers/staging/media/atomisp/pci/sh_css.c

6626

err = add_yuv_scaler_stage(pipe, me, tmp_in_frame,

drivers/staging/media/atomisp/pci/sh_css.c

6638

if (pipe->pipe_settings.yuvpp.is_output_stage[i]) {

drivers/staging/media/atomisp/pci/sh_css.c

6641

err = add_vf_pp_stage(pipe, in_frame,

drivers/staging/media/atomisp/pci/sh_css.c

6657

err = add_vf_pp_stage(pipe, in_frame, vf_frame[0],

drivers/staging/media/atomisp/pci/sh_css.c

6666

ia_css_pipeline_finalize_stages(&pipe->pipeline,

drivers/staging/media/atomisp/pci/sh_css.c

6667

pipe->stream->config.continuous);

drivers/staging/media/atomisp/pci/sh_css.c

6675

create_host_copy_pipeline(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

6687

me = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

6691

if (copy_on_sp(pipe) &&

drivers/staging/media/atomisp/pci/sh_css.c

6692

pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) {

drivers/staging/media/atomisp/pci/sh_css.c

6697

ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6702

pipe->mode = IA_CSS_PIPE_ID_COPY;

drivers/staging/media/atomisp/pci/sh_css.c

6709

ia_css_pipeline_finalize_stages(&pipe->pipeline,

drivers/staging/media/atomisp/pci/sh_css.c

6710

pipe->stream->config.continuous);

drivers/staging/media/atomisp/pci/sh_css.c

6719

create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

6721

struct ia_css_pipeline *me = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

6735

err = sh_css_pipe_get_output_frame_info(pipe, &out_frame->frame_info, 0);

drivers/staging/media/atomisp/pci/sh_css.c

6738

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

6745

pipe->mode = IA_CSS_PIPE_ID_CAPTURE;

drivers/staging/media/atomisp/pci/sh_css.c

6754

ia_css_pipeline_finalize_stages(me, pipe->stream->config.continuous);

drivers/staging/media/atomisp/pci/sh_css.c

6763

create_host_regular_capture_pipeline(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

6798

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

6799

assert(pipe->stream);

drivers/staging/media/atomisp/pci/sh_css.c

6800

assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE ||

drivers/staging/media/atomisp/pci/sh_css.c

6801

pipe->mode == IA_CSS_PIPE_ID_COPY);

drivers/staging/media/atomisp/pci/sh_css.c

6803

me = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

6804

mode = pipe->config.default_capture_config.mode;

drivers/staging/media/atomisp/pci/sh_css.c

6818

sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR);

drivers/staging/media/atomisp/pci/sh_css.c

6819

buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR);

drivers/staging/media/atomisp/pci/sh_css.c

6820

online = pipe->stream->config.online;

drivers/staging/media/atomisp/pci/sh_css.c

6821

continuous = pipe->stream->config.continuous;

drivers/staging/media/atomisp/pci/sh_css.c

6827

need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY;

drivers/staging/media/atomisp/pci/sh_css.c

6831

err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame,

drivers/staging/media/atomisp/pci/sh_css.c

6843

err = init_out_frameinfo_defaults(pipe, &me->out_frame[0], 0);

drivers/staging/media/atomisp/pci/sh_css.c

6851

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) {

drivers/staging/media/atomisp/pci/sh_css.c

6856

init_vf_frameinfo_defaults(pipe, &me->vf_frame[0], 0);

drivers/staging/media/atomisp/pci/sh_css.c

6863

copy_binary = &pipe->pipe_settings.capture.copy_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6864

num_primary_stage = pipe->pipe_settings.capture.num_primary_stage;

drivers/staging/media/atomisp/pci/sh_css.c

6871

primary_binary[i] = &pipe->pipe_settings.capture.primary_binary[i];

drivers/staging/media/atomisp/pci/sh_css.c

6873

vf_pp_binary = &pipe->pipe_settings.capture.vf_pp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6874

pre_isp_binary = &pipe->pipe_settings.capture.pre_isp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6875

anr_gdc_binary = &pipe->pipe_settings.capture.anr_gdc_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6876

post_isp_binary = &pipe->pipe_settings.capture.post_isp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6877

capture_pp_binary = &pipe->pipe_settings.capture.capture_pp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6878

yuv_scaler_binary = pipe->pipe_settings.capture.yuv_scaler_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6879

num_yuv_scaler = pipe->pipe_settings.capture.num_yuv_scaler;

drivers/staging/media/atomisp/pci/sh_css.c

6880

is_output_stage = pipe->pipe_settings.capture.is_output_stage;

drivers/staging/media/atomisp/pci/sh_css.c

6881

capture_ldc_binary = &pipe->pipe_settings.capture.capture_ldc_binary;

drivers/staging/media/atomisp/pci/sh_css.c

6883

need_pp = (need_capture_pp(pipe) || pipe->output_stage) &&

drivers/staging/media/atomisp/pci/sh_css.c

6889

if (pipe->pipe_settings.capture.copy_binary.info) {

drivers/staging/media/atomisp/pci/sh_css.c

6900

in_frame = pipe->stream->last_pipe->continuous_frames[0];

drivers/staging/media/atomisp/pci/sh_css.c

6929

} else if (pipe->stream->config.continuous) {

drivers/staging/media/atomisp/pci/sh_css.c

6930

in_frame = pipe->stream->last_pipe->continuous_frames[0];

drivers/staging/media/atomisp/pci/sh_css.c

7046

err = add_capture_pp_stage(pipe, me, local_in_frame,

drivers/staging/media/atomisp/pci/sh_css.c

7066

err = add_yuv_scaler_stage(pipe, me, tmp_in_frame,

drivers/staging/media/atomisp/pci/sh_css.c

7092

err = add_vf_pp_stage(pipe, in_frame, vf_frame, vf_pp_binary,

drivers/staging/media/atomisp/pci/sh_css.c

7099

ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous);

drivers/staging/media/atomisp/pci/sh_css.c

7108

create_host_capture_pipeline(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

7112

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7114

if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY)

drivers/staging/media/atomisp/pci/sh_css.c

7115

err = create_host_isyscopy_capture_pipeline(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7117

err = create_host_regular_capture_pipeline(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7128

static int capture_start(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

7136

IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7137

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

7142

me = &pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

7144

if ((pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW ||

drivers/staging/media/atomisp/pci/sh_css.c

7145

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) &&

drivers/staging/media/atomisp/pci/sh_css.c

7146

(pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) {

drivers/staging/media/atomisp/pci/sh_css.c

7147

if (copy_on_sp(pipe)) {

drivers/staging/media/atomisp/pci/sh_css.c

7148

err = start_copy_on_sp(pipe, &me->out_frame[0]);

drivers/staging/media/atomisp/pci/sh_css.c

7154

if (!IS_ISP2401 || pipe->config.mode != IA_CSS_PIPE_MODE_COPY) {

drivers/staging/media/atomisp/pci/sh_css.c

7155

err = send_mipi_frames(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7162

ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id);

drivers/staging/media/atomisp/pci/sh_css.c

7165

start_pipe(pipe, copy_ovrd, pipe->stream->config.mode);

drivers/staging/media/atomisp/pci/sh_css.c

7173

pipe->config.mode == IA_CSS_PIPE_MODE_COPY &&

drivers/staging/media/atomisp/pci/sh_css.c

7174

pipe->stream->reconfigure_css_rx) {

drivers/staging/media/atomisp/pci/sh_css.c

7175

ia_css_isys_rx_configure(&pipe->stream->csi_rx_config,

drivers/staging/media/atomisp/pci/sh_css.c

7176

pipe->stream->config.mode);

drivers/staging/media/atomisp/pci/sh_css.c

7177

pipe->stream->reconfigure_css_rx = false;

drivers/staging/media/atomisp/pci/sh_css.c

7185

sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

7189

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7195

*info = pipe->output_info[idx];

drivers/staging/media/atomisp/pci/sh_css.c

7196

if (copy_on_sp(pipe) &&

drivers/staging/media/atomisp/pci/sh_css.c

7197

pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) {

drivers/staging/media/atomisp/pci/sh_css.c

7207

ia_css_pipe_util_pipe_input_format_bpp(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7495

struct ia_css_pipe **pipe)

drivers/staging/media/atomisp/pci/sh_css.c

7499

IA_CSS_ENTER_PRIVATE("config = %p, pipe = %p", config, pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7501

if (!config || !pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

7506

err = ia_css_pipe_create_extra(config, NULL, pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7509

IA_CSS_LOG("pipe created successfully = %p", *pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7519

struct ia_css_pipe **pipe)

drivers/staging/media/atomisp/pci/sh_css.c

7525

IA_CSS_ENTER_PRIVATE("config = %p, extra_config = %p and pipe = %p", config, extra_config, pipe);

drivers/staging/media/atomisp/pci/sh_css.c

7533

if ((!pipe) || (!config)) {

drivers/staging/media/atomisp/pci/sh_css.c

7652

*pipe = internal_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

7658

ia_css_pipe_get_info(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

7668

if (!pipe || !pipe->stream) {

drivers/staging/media/atomisp/pci/sh_css.c

7674

*pipe_info = pipe->info;

drivers/staging/media/atomisp/pci/sh_css.c

7694

ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

7700

IA_CSS_ENTER_PRIVATE("pipe = %p, pin_index = %d, new_formats = %d", pipe, pin_index, new_format);

drivers/staging/media/atomisp/pci/sh_css.c

7702

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css.c

7720

err = ia_css_pipe_check_format(pipe, new_format);

drivers/staging/media/atomisp/pci/sh_css.c

7723

pipe->output_info[0].format = new_format;

drivers/staging/media/atomisp/pci/sh_css.c

7725

pipe->vf_output_info[0].format = new_format;

drivers/staging/media/atomisp/pci/sh_css.c

8452

ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css.c

8456

if (pipe)

drivers/staging/media/atomisp/pci/sh_css.c

8457

*pipe_id = pipe->mode;

drivers/staging/media/atomisp/pci/sh_css.c

8480

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css.c

8484

pipe = stream->pipes[0];

drivers/staging/media/atomisp/pci/sh_css.c

8490

pipe = stream->pipes[1];

drivers/staging/media/atomisp/pci/sh_css.c

8493

return ia_css_pipe_get_shading_correction_binary(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8504

struct ia_css_pipe *pipe = stream->pipes[i];

drivers/staging/media/atomisp/pci/sh_css.c

8506

if (pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) {

drivers/staging/media/atomisp/pci/sh_css.c

8507

video_pipe = pipe;

drivers/staging/media/atomisp/pci/sh_css.c

8519

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css.c

8524

pipe = stream->pipes[0];

drivers/staging/media/atomisp/pci/sh_css.c

8530

pipe = stream->pipes[1];

drivers/staging/media/atomisp/pci/sh_css.c

8533

s3a_binary = ia_css_pipe_get_s3a_binary(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8542

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css.c

8546

pipe = stream->last_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

8548

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8551

pipe->config.output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width;

drivers/staging/media/atomisp/pci/sh_css.c

8552

pipe->output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width;

drivers/staging/media/atomisp/pci/sh_css.c

8558

ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

8562

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8564

switch (pipe->config.mode) {

drivers/staging/media/atomisp/pci/sh_css.c

8566

binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8569

binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8572

if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) {

drivers/staging/media/atomisp/pci/sh_css.c

8575

for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) {

drivers/staging/media/atomisp/pci/sh_css.c

8576

if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.sc) {

drivers/staging/media/atomisp/pci/sh_css.c

8577

binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i];

drivers/staging/media/atomisp/pci/sh_css.c

8581

} else if (pipe->config.default_capture_config.mode ==

drivers/staging/media/atomisp/pci/sh_css.c

8583

binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8584

else if (pipe->config.default_capture_config.mode ==

drivers/staging/media/atomisp/pci/sh_css.c

8586

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) {

drivers/staging/media/atomisp/pci/sh_css.c

8587

if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1)

drivers/staging/media/atomisp/pci/sh_css.c

8588

binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8589

else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2)

drivers/staging/media/atomisp/pci/sh_css.c

8590

binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8604

ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

8608

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8610

switch (pipe->config.mode) {

drivers/staging/media/atomisp/pci/sh_css.c

8612

binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8615

binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8618

if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) {

drivers/staging/media/atomisp/pci/sh_css.c

8621

for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) {

drivers/staging/media/atomisp/pci/sh_css.c

8622

if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) {

drivers/staging/media/atomisp/pci/sh_css.c

8623

binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i];

drivers/staging/media/atomisp/pci/sh_css.c

8627

} else if (pipe->config.default_capture_config.mode ==

drivers/staging/media/atomisp/pci/sh_css.c

8629

binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8630

} else if (pipe->config.default_capture_config.mode ==

drivers/staging/media/atomisp/pci/sh_css.c

8632

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) {

drivers/staging/media/atomisp/pci/sh_css.c

8633

if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1)

drivers/staging/media/atomisp/pci/sh_css.c

8634

binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8635

else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2)

drivers/staging/media/atomisp/pci/sh_css.c

8636

binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8652

ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

8656

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8658

switch (pipe->config.mode) {

drivers/staging/media/atomisp/pci/sh_css.c

8660

binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary;

drivers/staging/media/atomisp/pci/sh_css.c

8673

ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

8675

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8677

return (struct ia_css_pipeline *)&pipe->pipeline;

drivers/staging/media/atomisp/pci/sh_css.c

8681

ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

8683

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8691

assert(pipe->pipe_num < IA_CSS_PIPELINE_NUM_MAX);

drivers/staging/media/atomisp/pci/sh_css.c

8693

if (pipe->pipe_num >= IA_CSS_PIPELINE_NUM_MAX)

drivers/staging/media/atomisp/pci/sh_css.c

8696

return pipe->pipe_num;

drivers/staging/media/atomisp/pci/sh_css.c

8700

ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css.c

8702

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8704

return (unsigned int)pipe->config.isp_pipe_version;

drivers/staging/media/atomisp/pci/sh_css.c

8809

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css.c

8823

pipe = stream->continuous_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

8828

pipe->continuous_frames[i], pipe->cont_md_buffers[i]);

drivers/staging/media/atomisp/pci/sh_css.c

8839

void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map)

drivers/staging/media/atomisp/pci/sh_css.c

8846

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css.c

8848

pipe_num = pipe->pipe_num;

drivers/staging/media/atomisp/pci/sh_css.c

8855

need_input_queue = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY;

drivers/staging/media/atomisp/pci/sh_css.c

8859

if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) {

drivers/staging/media/atomisp/pci/sh_css.c

8866

if (pipe->pipe_settings.preview.preview_binary.info &&

drivers/staging/media/atomisp/pci/sh_css.c

8867

pipe->pipe_settings.preview.preview_binary.info->sp.enable.s3a)

drivers/staging/media/atomisp/pci/sh_css.c

8869

} else if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE) {

drivers/staging/media/atomisp/pci/sh_css.c

8879

if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) {

drivers/staging/media/atomisp/pci/sh_css.c

8880

for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) {

drivers/staging/media/atomisp/pci/sh_css.c

8881

if (pipe->pipe_settings.capture.primary_binary[i].info &&

drivers/staging/media/atomisp/pci/sh_css.c

8882

pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) {

drivers/staging/media/atomisp/pci/sh_css.c

8887

} else if (pipe->config.default_capture_config.mode ==

drivers/staging/media/atomisp/pci/sh_css.c

8889

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT ||

drivers/staging/media/atomisp/pci/sh_css.c

8890

pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) {

drivers/staging/media/atomisp/pci/sh_css.c

8891

if (pipe->pipe_settings.capture.pre_isp_binary.info &&

drivers/staging/media/atomisp/pci/sh_css.c

8892

pipe->pipe_settings.capture.pre_isp_binary.info->sp.enable.s3a)

drivers/staging/media/atomisp/pci/sh_css.c

8895

} else if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) {

drivers/staging/media/atomisp/pci/sh_css.c

8899

if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0])

drivers/staging/media/atomisp/pci/sh_css.c

8904

if (pipe->pipe_settings.video.video_binary.info &&

drivers/staging/media/atomisp/pci/sh_css.c

8905

pipe->pipe_settings.video.video_binary.info->sp.enable.s3a)

drivers/staging/media/atomisp/pci/sh_css.c

8907

if (pipe->pipe_settings.video.video_binary.info &&

drivers/staging/media/atomisp/pci/sh_css.c

8908

(pipe->pipe_settings.video.video_binary.info->sp.enable.dis

drivers/staging/media/atomisp/pci/sh_css.c

8911

} else if (pipe->mode == IA_CSS_PIPE_ID_COPY) {

drivers/staging/media/atomisp/pci/sh_css.c

8914

if (!pipe->stream->config.continuous)

drivers/staging/media/atomisp/pci/sh_css.c

8917

} else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) {

drivers/staging/media/atomisp/pci/sh_css.c

8922

if (pipe->enable_viewfinder[idx])

drivers/staging/media/atomisp/pci/sh_css.c

894

struct ia_css_pipe *pipe = NULL;

drivers/staging/media/atomisp/pci/sh_css.c

906

pipe = stream->last_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

908

pipe = stream->last_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

910

pipe = stream->last_pipe->pipe_settings.preview.copy_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

912

pipe = stream->last_pipe->pipe_settings.video.copy_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

914

pipe = stream->last_pipe;

drivers/staging/media/atomisp/pci/sh_css.c

917

if (!pipe)

drivers/staging/media/atomisp/pci/sh_css.c

920

if (pipe->pipeline.stages)

drivers/staging/media/atomisp/pci/sh_css.c

921

if (pipe->pipeline.stages->binary)

drivers/staging/media/atomisp/pci/sh_css.c

922

binary = pipe->pipeline.stages->binary;

drivers/staging/media/atomisp/pci/sh_css.c

930

ia_css_get_crop_offsets(pipe, &binary->in_frame_info);

drivers/staging/media/atomisp/pci/sh_css.c

934

rc = ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &sp_thread_id);

drivers/staging/media/atomisp/pci/sh_css_internal.h

618

struct sh_css_sp_pipeline pipe[SH_CSS_MAX_SP_THREADS];

drivers/staging/media/atomisp/pci/sh_css_internal.h

914

sh_css_store_sp_stage_to_ddr(unsigned int pipe, unsigned int stage);

drivers/staging/media/atomisp/pci/sh_css_internal.h

917

sh_css_store_isp_stage_to_ddr(unsigned int pipe, unsigned int stage);

drivers/staging/media/atomisp/pci/sh_css_internal.h

937

ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_internal.h

940

ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_internal.h

943

ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_internal.h

953

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_legacy.h

42

struct ia_css_pipe **pipe);

drivers/staging/media/atomisp/pci/sh_css_legacy.h

49

ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_mipi.c

296

allocate_mipi_frames(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_mipi.c

303

"allocate_mipi_frames(%p) enter:\n", pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

305

if (IS_ISP2401 && pipe->stream->config.online) {

drivers/staging/media/atomisp/pci/sh_css_mipi.c

308

pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

312

if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) {

drivers/staging/media/atomisp/pci/sh_css_mipi.c

315

pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

319

port = (unsigned int)pipe->stream->config.source.port.port;

drivers/staging/media/atomisp/pci/sh_css_mipi.c

322

pipe, port);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

327

err = calculate_mipi_buff_size(&pipe->stream->config,

drivers/staging/media/atomisp/pci/sh_css_mipi.c

342

pipe, port);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

375

pipe, port);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

392

pipe, port);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

400

"allocate_mipi_frames(%p) exit:\n", pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

406

free_mipi_frames(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css_mipi.c

412

"free_mipi_frames(%p) enter:\n", pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

415

if (pipe) {

drivers/staging/media/atomisp/pci/sh_css_mipi.c

416

assert(pipe->stream);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

417

if ((!pipe) || (!pipe->stream)) {

drivers/staging/media/atomisp/pci/sh_css_mipi.c

419

pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

423

if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) {

drivers/staging/media/atomisp/pci/sh_css_mipi.c

425

pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

429

port = (unsigned int)pipe->stream->config.source.port.port;

drivers/staging/media/atomisp/pci/sh_css_mipi.c

433

pipe, port);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

442

pipe, ref_count_mipi_allocation[port]);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

467

"free_mipi_frames(%p) exit (deallocated).\n", pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

494

send_mipi_frames(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css_mipi.c

500

IA_CSS_ENTER_PRIVATE("pipe=%p", pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.c

504

if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) {

drivers/staging/media/atomisp/pci/sh_css_mipi.c

510

port = (unsigned int)pipe->stream->config.source.port.port;

drivers/staging/media/atomisp/pci/sh_css_mipi.c

514

pipe, port);

drivers/staging/media/atomisp/pci/sh_css_mipi.h

18

allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info);

drivers/staging/media/atomisp/pci/sh_css_mipi.h

21

free_mipi_frames(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_mipi.h

24

send_mipi_frames(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1584

ia_css_set_param_exceptions(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

1651

sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

1658

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1661

assert(pipe->mode < IA_CSS_PIPE_ID_NUM);

drivers/staging/media/atomisp/pci/sh_css_params.c

1665

copy_dvs_6axis_table(params->pipe_dvs_6axis_config[pipe->mode], dvs_config);

drivers/staging/media/atomisp/pci/sh_css_params.c

1667

params->pipe_dvs_6axis_config_changed[pipe->mode] = true;

drivers/staging/media/atomisp/pci/sh_css_params.c

1673

sh_css_get_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

1680

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1686

if ((pipe->mode < IA_CSS_PIPE_ID_NUM) &&

drivers/staging/media/atomisp/pci/sh_css_params.c

1687

(dvs_config->width_y == params->pipe_dvs_6axis_config[pipe->mode]->width_y) &&

drivers/staging/media/atomisp/pci/sh_css_params.c

1688

(dvs_config->height_y == params->pipe_dvs_6axis_config[pipe->mode]->height_y) &&

drivers/staging/media/atomisp/pci/sh_css_params.c

1689

(dvs_config->width_uv == params->pipe_dvs_6axis_config[pipe->mode]->width_uv) &&

drivers/staging/media/atomisp/pci/sh_css_params.c

1690

(dvs_config->height_uv == params->pipe_dvs_6axis_config[pipe->mode]->height_uv)

drivers/staging/media/atomisp/pci/sh_css_params.c

1696

copy_dvs_6axis_table(dvs_config, params->pipe_dvs_6axis_config[pipe->mode]);

drivers/staging/media/atomisp/pci/sh_css_params.c

1803

sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css_params.c

1805

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css_params.c

1809

return pipe->config.p_isp_config;

drivers/staging/media/atomisp/pci/sh_css_params.c

1824

struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css_params.c

1831

IA_CSS_ENTER("stream=%p, config=%p, pipe=%p", stream, config, pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1834

err = sh_css_set_per_frame_isp_config_on_pipe(stream, config, pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1836

err = sh_css_set_global_isp_config_on_pipe(stream->pipes[0], config, pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1843

ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

1846

struct ia_css_pipe *pipe_in = pipe;

drivers/staging/media/atomisp/pci/sh_css_params.c

1849

IA_CSS_ENTER("pipe=%p", pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1851

if ((!pipe) || (!pipe->stream))

drivers/staging/media/atomisp/pci/sh_css_params.c

1857

err = sh_css_set_per_frame_isp_config_on_pipe(pipe->stream, config, pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1859

err = sh_css_set_global_isp_config_on_pipe(pipe, config, pipe_in);

drivers/staging/media/atomisp/pci/sh_css_params.c

1868

struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css_params.c

1874

IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", curr_pipe, config, pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1876

err1 = sh_css_init_isp_params_from_config(curr_pipe, curr_pipe->stream->isp_params_configs, config, pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1879

err2 = sh_css_param_update_isp_params(curr_pipe, curr_pipe->stream->isp_params_configs, sh_css_sp_is_running(), pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1897

struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css_params.c

1910

IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", stream, config, pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1912

if (!pipe) {

drivers/staging/media/atomisp/pci/sh_css_params.c

1931

if (!sh_css_init_isp_params_from_global(stream, params, false, pipe)) {

drivers/staging/media/atomisp/pci/sh_css_params.c

1935

err2 = sh_css_init_isp_params_from_config(stream->pipes[0], params, config, pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1948

err3 = sh_css_param_update_isp_params(stream->pipes[0], params, sh_css_sp_is_running(), pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1964

sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

1972

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

1974

IA_CSS_ENTER_PRIVATE("pipe=%p, config=%p, params=%p", pipe, config, params);

drivers/staging/media/atomisp/pci/sh_css_params.c

1981

if ((pipe->mode < IA_CSS_PIPE_ID_NUM) &&

drivers/staging/media/atomisp/pci/sh_css_params.c

1982

(params->pipe_dvs_6axis_config[pipe->mode]))

drivers/staging/media/atomisp/pci/sh_css_params.c

1983

sh_css_set_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config);

drivers/staging/media/atomisp/pci/sh_css_params.c

1986

sh_css_set_shading_table(pipe->stream, params, config->shading_table);

drivers/staging/media/atomisp/pci/sh_css_params.c

2002

sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) {

drivers/staging/media/atomisp/pci/sh_css_params.c

2015

ia_css_set_param_exceptions(pipe, params);

drivers/staging/media/atomisp/pci/sh_css_params.c

2033

ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

2042

params = pipe->stream->isp_params_configs;

drivers/staging/media/atomisp/pci/sh_css_params.c

2049

sh_css_get_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config);

drivers/staging/media/atomisp/pci/sh_css_params.c

2631

int ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

2637

IA_CSS_ENTER("pipe=%p lut=%p", pipe, lut);

drivers/staging/media/atomisp/pci/sh_css_params.c

2639

if (!lut || !pipe) {

drivers/staging/media/atomisp/pci/sh_css_params.c

2649

if (pipe->stream && pipe->stream->started) {

drivers/staging/media/atomisp/pci/sh_css_params.c

2657

if (pipe->scaler_pp_lut != mmgr_NULL) {

drivers/staging/media/atomisp/pci/sh_css_params.c

2658

hmm_free(pipe->scaler_pp_lut);

drivers/staging/media/atomisp/pci/sh_css_params.c

2659

pipe->scaler_pp_lut = mmgr_NULL;

drivers/staging/media/atomisp/pci/sh_css_params.c

2663

pipe->scaler_pp_lut = hmm_alloc(sizeof(zoom_table));

drivers/staging/media/atomisp/pci/sh_css_params.c

2665

if (pipe->scaler_pp_lut == mmgr_NULL) {

drivers/staging/media/atomisp/pci/sh_css_params.c

2672

hmm_store(pipe->scaler_pp_lut,

drivers/staging/media/atomisp/pci/sh_css_params.c

2678

IA_CSS_LEAVE("lut(%u) err=%d", pipe->scaler_pp_lut, err);

drivers/staging/media/atomisp/pci/sh_css_params.c

2683

ia_css_ptr sh_css_pipe_get_pp_gdc_lut(const struct ia_css_pipe *pipe)

drivers/staging/media/atomisp/pci/sh_css_params.c

2685

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

2687

if (pipe->scaler_pp_lut != mmgr_NULL)

drivers/staging/media/atomisp/pci/sh_css_params.c

2688

return pipe->scaler_pp_lut;

drivers/staging/media/atomisp/pci/sh_css_params.c

3083

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css_params.c

3092

pipe = curr_pipe->stream->pipes[i];

drivers/staging/media/atomisp/pci/sh_css_params.c

3093

pipeline = ia_css_pipe_get_pipeline(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

3094

pipe_num = ia_css_pipe_get_pipe_num(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

3095

isp_pipe_version = ia_css_pipe_get_isp_pipe_version(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

3126

if (pipe_in && (pipe != pipe_in)) {

drivers/staging/media/atomisp/pci/sh_css_params.c

3127

IA_CSS_LOG("skipping pipe %p", pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

3144

pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

3252

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

3369

binary, pipe->required_bds_factor);

drivers/staging/media/atomisp/pci/sh_css_params.c

3675

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css_params.c

3680

pipe = stream->pipes[0];

drivers/staging/media/atomisp/pci/sh_css_params.c

3686

pipe = stream->pipes[1];

drivers/staging/media/atomisp/pci/sh_css_params.c

3698

binary, pipe->required_bds_factor);

drivers/staging/media/atomisp/pci/sh_css_params.c

3736

memcpy(buf_ptr, &sh_css_sp_group.pipe, sizeof(sh_css_sp_group.pipe));

drivers/staging/media/atomisp/pci/sh_css_params.c

3737

buf_ptr += sizeof(sh_css_sp_group.pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

3759

unsigned int pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

3763

hmm_store(xmem_sp_stage_ptrs[pipe][stage],

drivers/staging/media/atomisp/pci/sh_css_params.c

3766

return xmem_sp_stage_ptrs[pipe][stage];

drivers/staging/media/atomisp/pci/sh_css_params.c

3770

unsigned int pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

3774

hmm_store(xmem_isp_stage_ptrs[pipe][stage],

drivers/staging/media/atomisp/pci/sh_css_params.c

3777

return xmem_isp_stage_ptrs[pipe][stage];

drivers/staging/media/atomisp/pci/sh_css_params.c

4524

struct ia_css_pipe *pipe;

drivers/staging/media/atomisp/pci/sh_css_params.c

4535

pipe = stream->pipes[i];

drivers/staging/media/atomisp/pci/sh_css_params.c

4536

pipeline = ia_css_pipe_get_pipeline(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

699

struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

717

sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

726

struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

732

struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

872

struct ia_css_pipe *pipe = stream->pipes[i];

drivers/staging/media/atomisp/pci/sh_css_params.c

873

struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe);

drivers/staging/media/atomisp/pci/sh_css_params.c

885

sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_params.c

896

if ((!pipe) || (!is_dp_10bpp)) {

drivers/staging/media/atomisp/pci/sh_css_params.c

903

if (pipe->config.enable_dpc) {

drivers/staging/media/atomisp/pci/sh_css_params.c

907

if ((pipe->config.bayer_ds_out_res.width != 0) &&

drivers/staging/media/atomisp/pci/sh_css_params.c

908

(pipe->config.bayer_ds_out_res.height != 0)) {

drivers/staging/media/atomisp/pci/sh_css_params.c

910

pipe->config.input_effective_res,

drivers/staging/media/atomisp/pci/sh_css_params.c

911

pipe->config.bayer_ds_out_res,

drivers/staging/media/atomisp/pci/sh_css_params.h

158

sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_params.h

170

sh_css_pipe_get_pp_gdc_lut(const struct ia_css_pipe *pipe);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1001

err = configure_isp_from_args(&sh_css_sp_group.pipe[thread_id],

drivers/staging/media/atomisp/pci/sh_css_sp.c

117

sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] =

drivers/staging/media/atomisp/pci/sh_css_sp.c

1177

struct ia_css_pipe *pipe = NULL;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1204

memset(&sh_css_sp_group.pipe[thread_id], 0, sizeof(struct sh_css_sp_pipeline));

drivers/staging/media/atomisp/pci/sh_css_sp.c

1227

sh_css_sp_group.pipe[thread_id].num_stages = 0;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1228

sh_css_sp_group.pipe[thread_id].pipe_id = pipe_id;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1229

sh_css_sp_group.pipe[thread_id].thread_id = thread_id;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1230

sh_css_sp_group.pipe[thread_id].pipe_num = pipe_num;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1231

sh_css_sp_group.pipe[thread_id].num_execs = me->num_execs;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1232

sh_css_sp_group.pipe[thread_id].pipe_qos_config = QOS_INVALID;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1233

sh_css_sp_group.pipe[thread_id].required_bds_factor = required_bds_factor;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1234

sh_css_sp_group.pipe[thread_id].input_system_mode

drivers/staging/media/atomisp/pci/sh_css_sp.c

1236

sh_css_sp_group.pipe[thread_id].port_id = port_id;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1237

sh_css_sp_group.pipe[thread_id].dvs_frame_delay = (uint32_t)me->dvs_frame_delay;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1242

sh_css_sp_group.pipe[thread_id].pipe_config =

drivers/staging/media/atomisp/pci/sh_css_sp.c

1251

sh_css_sp_group.pipe[thread_id].pipe_config = 0;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1253

sh_css_sp_group.pipe[thread_id].inout_port_config = me->inout_port_config;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1255

pipe = find_pipe_by_num(pipe_num);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1256

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1257

if (!pipe)

drivers/staging/media/atomisp/pci/sh_css_sp.c

1260

sh_css_sp_group.pipe[thread_id].scaler_pp_lut = sh_css_pipe_get_pp_gdc_lut(pipe);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1263

sh_css_sp_group.pipe[thread_id].metadata.width = md_info->resolution.width;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1264

sh_css_sp_group.pipe[thread_id].metadata.height = md_info->resolution.height;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1265

sh_css_sp_group.pipe[thread_id].metadata.stride = md_info->stride;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1266

sh_css_sp_group.pipe[thread_id].metadata.size = md_info->size;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1269

&sh_css_sp_group.pipe[thread_id].metadata.format);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1272

sh_css_sp_group.pipe[thread_id].output_frame_queue_id = (uint32_t)SH_CSS_INVALID_QUEUE_ID;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1276

&sh_css_sp_group.pipe[thread_id].output_frame_queue_id));

drivers/staging/media/atomisp/pci/sh_css_sp.c

1280

pipe_id, sh_css_sp_group.pipe[thread_id].inout_port_config);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1283

sh_css_sp_group.pipe[thread_id].num_stages++;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1299

sh_css_sp_group.pipe[thread_id].pipe_config |= (uint32_t)

drivers/staging/media/atomisp/pci/sh_css_sp.c

1311

sh_css_sp_group.pipe[thread_id].num_stages = 0;

drivers/staging/media/atomisp/pci/sh_css_sp.c

1519

ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_sp.c

1528

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1546

pipe_num = ia_css_pipe_get_pipe_num(pipe);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1560

ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe,

drivers/staging/media/atomisp/pci/sh_css_sp.c

1573

assert(pipe);

drivers/staging/media/atomisp/pci/sh_css_sp.c

1576

pipe_num = ia_css_pipe_get_pipe_num(pipe);

drivers/staging/media/atomisp/pci/sh_css_sp.c

188

struct sh_css_sp_pipeline *pipe;

drivers/staging/media/atomisp/pci/sh_css_sp.c

194

pipe = &sh_css_sp_group.pipe[thread_id];

drivers/staging/media/atomisp/pci/sh_css_sp.c

196

pipe->copy.bin.bytes_available = out_frame->data_bytes;

drivers/staging/media/atomisp/pci/sh_css_sp.c

197

pipe->num_stages = 1;

drivers/staging/media/atomisp/pci/sh_css_sp.c

198

pipe->pipe_id = pipe_id;

drivers/staging/media/atomisp/pci/sh_css_sp.c

199

pipe->pipe_num = pipe_num;

drivers/staging/media/atomisp/pci/sh_css_sp.c

200

pipe->thread_id = thread_id;

drivers/staging/media/atomisp/pci/sh_css_sp.c

201

pipe->pipe_config = 0x0; /* No parameters */

drivers/staging/media/atomisp/pci/sh_css_sp.c

202

pipe->pipe_qos_config = QOS_INVALID;

drivers/staging/media/atomisp/pci/sh_css_sp.c

204

if (pipe->inout_port_config == 0) {

drivers/staging/media/atomisp/pci/sh_css_sp.c

205

SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config,

drivers/staging/media/atomisp/pci/sh_css_sp.c

208

SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config,

drivers/staging/media/atomisp/pci/sh_css_sp.c

213

pipe->pipe_id, pipe->inout_port_config);

drivers/staging/media/atomisp/pci/sh_css_sp.c

241

struct sh_css_sp_pipeline *pipe;

drivers/staging/media/atomisp/pci/sh_css_sp.c

260

pipe = &sh_css_sp_group.pipe[thread_id];

drivers/staging/media/atomisp/pci/sh_css_sp.c

262

pipe->copy.raw.height = out_frame->frame_info.res.height;

drivers/staging/media/atomisp/pci/sh_css_sp.c

263

pipe->copy.raw.width = out_frame->frame_info.res.width;

drivers/staging/media/atomisp/pci/sh_css_sp.c

264

pipe->copy.raw.padded_width = out_frame->frame_info.padded_width;

drivers/staging/media/atomisp/pci/sh_css_sp.c

265

pipe->copy.raw.raw_bit_depth = out_frame->frame_info.raw_bit_depth;

drivers/staging/media/atomisp/pci/sh_css_sp.c

266

pipe->copy.raw.max_input_width = max_input_width;

drivers/staging/media/atomisp/pci/sh_css_sp.c

267

pipe->num_stages = 1;

drivers/staging/media/atomisp/pci/sh_css_sp.c

268

pipe->pipe_id = pipe_id;

drivers/staging/media/atomisp/pci/sh_css_sp.c

272

pipe->pipe_config =

drivers/staging/media/atomisp/pci/sh_css_sp.c

275

pipe->pipe_config = pipe_conf_override;

drivers/staging/media/atomisp/pci/sh_css_sp.c

277

pipe->pipe_qos_config = QOS_INVALID;

drivers/staging/media/atomisp/pci/sh_css_sp.c

279

if (pipe->inout_port_config == 0) {

drivers/staging/media/atomisp/pci/sh_css_sp.c

280

SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config,

drivers/staging/media/atomisp/pci/sh_css_sp.c

283

SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config,

drivers/staging/media/atomisp/pci/sh_css_sp.c

288

pipe->pipe_id, pipe->inout_port_config);

drivers/staging/media/atomisp/pci/sh_css_sp.c

311

struct sh_css_sp_pipeline *pipe;

drivers/staging/media/atomisp/pci/sh_css_sp.c

331

pipe = &sh_css_sp_group.pipe[thread_id];

drivers/staging/media/atomisp/pci/sh_css_sp.c

333

pipe->copy.raw.height = out_frame->frame_info.res.height;

drivers/staging/media/atomisp/pci/sh_css_sp.c

334

pipe->copy.raw.width = out_frame->frame_info.res.width;

drivers/staging/media/atomisp/pci/sh_css_sp.c

335

pipe->copy.raw.padded_width = out_frame->frame_info.padded_width;

drivers/staging/media/atomisp/pci/sh_css_sp.c

336

pipe->copy.raw.raw_bit_depth = out_frame->frame_info.raw_bit_depth;

drivers/staging/media/atomisp/pci/sh_css_sp.c

337

pipe->copy.raw.max_input_width = max_input_width;

drivers/staging/media/atomisp/pci/sh_css_sp.c

338

pipe->num_stages = 1;

drivers/staging/media/atomisp/pci/sh_css_sp.c

339

pipe->pipe_id = pipe_id;

drivers/staging/media/atomisp/pci/sh_css_sp.c

340

pipe->pipe_config = 0x0; /* No parameters */

drivers/staging/media/atomisp/pci/sh_css_sp.c

341

pipe->pipe_qos_config = QOS_INVALID;

drivers/staging/media/atomisp/pci/sh_css_sp.c

352

if (pipe->metadata.height > 0) {

drivers/staging/media/atomisp/pci/sh_css_sp.c

879

struct ia_css_pipe *pipe = NULL;

drivers/staging/media/atomisp/pci/sh_css_sp.c

907

sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = mmgr_NULL;

drivers/staging/media/atomisp/pci/sh_css_sp.c

991

pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num);

drivers/staging/media/atomisp/pci/sh_css_sp.c

992

if (!pipe)

drivers/staging/media/atomisp/pci/sh_css_sp.c

996

ia_css_get_crop_offsets(pipe, &args->in_frame->frame_info);

drivers/staging/media/atomisp/pci/sh_css_sp.c

998

ia_css_get_crop_offsets(pipe, &binary->in_frame_info);

drivers/staging/media/imx/imx-media-utils.c

765

ret = __media_pipeline_start(entity->pads, &imxmd->pipe);

drivers/staging/media/imx/imx-media.h

149

struct media_pipeline pipe;

drivers/staging/media/ipu3/ipu3-abi.h

1841

struct imgu_abi_sp_pipeline pipe[IMGU_ABI_MAX_SP_THREADS];

drivers/staging/media/ipu3/ipu3-css-fw.c

72

void *imgu_css_fw_pipeline_params(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-fw.c

79

&css->fwp->binary_header[css->pipes[pipe].bindex];

drivers/staging/media/ipu3/ipu3-css-fw.h

187

void *imgu_css_fw_pipeline_params(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

1631

static int imgu_css_af_ops_calc(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

1636

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

1659

imgu_css_awb_fr_ops_calc(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

1664

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

1685

static int imgu_css_awb_ops_calc(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

1690

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

1727

static int imgu_css_cfg_acc_stripe(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

1730

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

1742

if (imgu_css_osys_calc(css, pipe, stripes, &acc->osys, &scaler_luma,

drivers/staging/media/ipu3/ipu3-css-params.c

1901

unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css-params.c

1904

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

1920

const int i, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css-params.c

1922

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

1943

int imgu_css_cfg_acc(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

1949

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

1966

if (imgu_css_cfg_acc_stripe(css, pipe, acc))

drivers/staging/media/ipu3/ipu3-css-params.c

2141

imgu_css_cfg_acc_dvs(css, acc, pipe);

drivers/staging/media/ipu3/ipu3-css-params.c

2316

acc_bds_per_stripe_data(css, acc, i, pipe);

drivers/staging/media/ipu3/ipu3-css-params.c

2438

if (imgu_css_awb_fr_ops_calc(css, pipe, &acc->awb_fr))

drivers/staging/media/ipu3/ipu3-css-params.c

2609

if (imgu_css_af_ops_calc(css, pipe, &acc->af))

drivers/staging/media/ipu3/ipu3-css-params.c

2689

if (imgu_css_awb_ops_calc(css, pipe, &acc->awb))

drivers/staging/media/ipu3/ipu3-css-params.c

2705

unsigned int pipe, bool use_user,

drivers/staging/media/ipu3/ipu3-css-params.c

2715

new_setting = imgu_css_fw_pipeline_params(css, pipe, c, m, par,

drivers/staging/media/ipu3/ipu3-css-params.c

2725

old_setting = imgu_css_fw_pipeline_params(css, pipe, c, m, par,

drivers/staging/media/ipu3/ipu3-css-params.c

2741

int imgu_css_cfg_vmem0(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

2747

&css->fwp->binary_header[css->pipes[pipe].bindex];

drivers/staging/media/ipu3/ipu3-css-params.c

2763

lin_vmem = imgu_css_cfg_copy(css, pipe, use && use->lin_vmem_params,

drivers/staging/media/ipu3/ipu3-css-params.c

2782

if (css->pipes[pipe].pipe_id == IPU3_CSS_PIPE_ID_VIDEO) {

drivers/staging/media/ipu3/ipu3-css-params.c

2783

tnr_vmem = imgu_css_cfg_copy(css, pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

2799

xnr_vmem = imgu_css_cfg_copy(css, pipe, use && use->xnr3_vmem_params,

drivers/staging/media/ipu3/ipu3-css-params.c

2820

int imgu_css_cfg_dmem0(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

2825

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

2843

tnr_dmem = imgu_css_cfg_copy(css, pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

2858

xnr_dmem = imgu_css_cfg_copy(css, pipe, use && use->xnr3_dmem_params,

drivers/staging/media/ipu3/ipu3-css-params.c

367

unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css-params.c

373

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

845

static int imgu_css_osys_calc(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.c

856

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css-params.c

865

stripe_params, pipe))

drivers/staging/media/ipu3/ipu3-css-params.h

13

int imgu_css_cfg_vmem0(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.h

18

int imgu_css_cfg_dmem0(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css-params.h

7

int imgu_css_cfg_acc(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css.c

1003

memset(&sp_group->pipe[pipe], 0, sizeof(struct imgu_abi_sp_pipeline));

drivers/staging/media/ipu3/ipu3-css.c

1005

sp_group->pipe[pipe].num_stages = 1;

drivers/staging/media/ipu3/ipu3-css.c

1006

sp_group->pipe[pipe].pipe_id = css_pipe->pipe_id;

drivers/staging/media/ipu3/ipu3-css.c

1007

sp_group->pipe[pipe].thread_id = pipe;

drivers/staging/media/ipu3/ipu3-css.c

1008

sp_group->pipe[pipe].pipe_num = pipe;

drivers/staging/media/ipu3/ipu3-css.c

1009

sp_group->pipe[pipe].num_execs = -1;

drivers/staging/media/ipu3/ipu3-css.c

1010

sp_group->pipe[pipe].pipe_qos_config = -1;

drivers/staging/media/ipu3/ipu3-css.c

1011

sp_group->pipe[pipe].required_bds_factor = 0;

drivers/staging/media/ipu3/ipu3-css.c

1012

sp_group->pipe[pipe].dvs_frame_delay = IPU3_CSS_AUX_FRAMES - 1;

drivers/staging/media/ipu3/ipu3-css.c

1013

sp_group->pipe[pipe].inout_port_config =

drivers/staging/media/ipu3/ipu3-css.c

1016

sp_group->pipe[pipe].scaler_pp_lut = 0;

drivers/staging/media/ipu3/ipu3-css.c

1017

sp_group->pipe[pipe].shading.internal_frame_origin_x_bqs_on_sctbl = 0;

drivers/staging/media/ipu3/ipu3-css.c

1018

sp_group->pipe[pipe].shading.internal_frame_origin_y_bqs_on_sctbl = 0;

drivers/staging/media/ipu3/ipu3-css.c

1019

sp_group->pipe[pipe].sp_stage_addr[stage] =

drivers/staging/media/ipu3/ipu3-css.c

1020

css_pipe->xmem_sp_stage_ptrs[pipe][stage].daddr;

drivers/staging/media/ipu3/ipu3-css.c

1021

sp_group->pipe[pipe].pipe_config =

drivers/staging/media/ipu3/ipu3-css.c

1022

bi->info.isp.sp.enable.params ? (1 << pipe) : 0;

drivers/staging/media/ipu3/ipu3-css.c

1023

sp_group->pipe[pipe].pipe_config |= IMGU_ABI_PIPE_CONFIG_ACQUIRE_ISP;

drivers/staging/media/ipu3/ipu3-css.c

1050

imgu_css_pipeline_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1054

imgu_css_pipeline_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1157

static void imgu_css_binary_cleanup(struct imgu_css *css, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

1162

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1180

static int imgu_css_binary_preallocate(struct imgu_css *css, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

1185

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1210

imgu_css_binary_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1215

static int imgu_css_binary_setup(struct imgu_css *css, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

1217

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1281

imgu_css_binary_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1288

int r, pipe;

drivers/staging/media/ipu3/ipu3-css.c

1293

for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

1294

r = imgu_css_binary_setup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1307

for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

1308

r = imgu_css_pipeline_init(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1318

for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

1319

r = imgu_css_set_parameters(css, pipe, NULL);

drivers/staging/media/ipu3/ipu3-css.c

1334

for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

1335

r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe,

drivers/staging/media/ipu3/ipu3-css.c

1337

pipe << 16);

drivers/staging/media/ipu3/ipu3-css.c

1347

for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

1348

imgu_css_pipeline_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1349

imgu_css_binary_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1358

int q, r, pipe;

drivers/staging/media/ipu3/ipu3-css.c

1360

for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

1361

r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe,

drivers/staging/media/ipu3/ipu3-css.c

1374

for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

1375

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1377

imgu_css_pipeline_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1393

bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

1396

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1408

unsigned int pipe;

drivers/staging/media/ipu3/ipu3-css.c

1411

for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++)

drivers/staging/media/ipu3/ipu3-css.c

1412

ret &= imgu_css_pipe_queue_empty(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1422

static int imgu_css_map_init(struct imgu_css *css, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

1425

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1456

if (imgu_css_binary_preallocate(css, pipe)) {

drivers/staging/media/ipu3/ipu3-css.c

1457

imgu_css_binary_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1464

static void imgu_css_pipe_cleanup(struct imgu_css *css, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

1467

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1470

imgu_css_binary_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1492

unsigned int pipe;

drivers/staging/media/ipu3/ipu3-css.c

1495

for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++)

drivers/staging/media/ipu3/ipu3-css.c

1496

imgu_css_pipe_cleanup(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1505

int r, q, pipe;

drivers/staging/media/ipu3/ipu3-css.c

1512

for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) {

drivers/staging/media/ipu3/ipu3-css.c

1513

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1524

r = imgu_css_map_init(css, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1550

unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css.c

1556

(css->pipes[pipe].pipe_id == IPU3_CSS_PIPE_ID_CAPTURE) ?

drivers/staging/media/ipu3/ipu3-css.c

1676

unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

1788

ret = imgu_css_find_binary(css, pipe, q, r);

drivers/staging/media/ipu3/ipu3-css.c

1794

css->pipes[pipe].bindex = ret;

drivers/staging/media/ipu3/ipu3-css.c

1797

css->pipes[pipe].bindex, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1832

unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

1837

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1846

r = imgu_css_fmt_try(css, fmts, all_rects, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1892

int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css.c

1899

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

1908

pipe);

drivers/staging/media/ipu3/ipu3-css.c

1910

if (b->queue_pos >= ARRAY_SIZE(css->pipes[pipe].abi_buffers[b->queue]))

drivers/staging/media/ipu3/ipu3-css.c

1912

abi_buf = css->pipes[pipe].abi_buffers[b->queue][b->queue_pos].vaddr;

drivers/staging/media/ipu3/ipu3-css.c

1936

data = css->pipes[pipe].abi_buffers[b->queue][b->queue_pos].daddr;

drivers/staging/media/ipu3/ipu3-css.c

1938

pipe, data);

drivers/staging/media/ipu3/ipu3-css.c

1942

data = IMGU_ABI_EVENT_BUFFER_ENQUEUED(pipe,

drivers/staging/media/ipu3/ipu3-css.c

1944

r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, data);

drivers/staging/media/ipu3/ipu3-css.c

1949

b, b->queue, pipe);

drivers/staging/media/ipu3/ipu3-css.c

1976

int evtype, pipe, pipeid, queue, qid, r;

drivers/staging/media/ipu3/ipu3-css.c

1994

pipe = (event & IMGU_ABI_EVTTYPE_PIPE_MASK) >>

drivers/staging/media/ipu3/ipu3-css.c

2001

if (pipe >= IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

2002

dev_err(css->dev, "Invalid pipe: %i\n", pipe);

drivers/staging/media/ipu3/ipu3-css.c

2010

css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

2013

event, queue, pipe, pipeid);

drivers/staging/media/ipu3/ipu3-css.c

2022

r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe,

drivers/staging/media/ipu3/ipu3-css.c

2045

dev_dbg(css->dev, "buffer 0x%8x done from pipe %d\n", daddr, pipe);

drivers/staging/media/ipu3/ipu3-css.c

2046

b->pipe = pipe;

drivers/staging/media/ipu3/ipu3-css.c

2052

pipe = (event & IMGU_ABI_EVTTYPE_PIPE_MASK) >>

drivers/staging/media/ipu3/ipu3-css.c

2054

if (pipe >= IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-css.c

2055

dev_err(css->dev, "Invalid pipe: %i\n", pipe);

drivers/staging/media/ipu3/ipu3-css.c

2060

event, pipe);

drivers/staging/media/ipu3/ipu3-css.c

2101

int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css.c

2105

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

2127

dev_dbg(css->dev, "%s for pipe %d", __func__, pipe);

drivers/staging/media/ipu3/ipu3-css.c

2171

r = imgu_css_cfg_acc(css, pipe, use, acc, map->vaddr,

drivers/staging/media/ipu3/ipu3-css.c

2181

r = imgu_css_cfg_vmem0(css, pipe, use, vmem0,

drivers/staging/media/ipu3/ipu3-css.c

2190

r = imgu_css_cfg_dmem0(css, pipe, use, dmem0,

drivers/staging/media/ipu3/ipu3-css.c

2255

r = imgu_css_queue_data(css, queue_id, pipe, map->daddr);

drivers/staging/media/ipu3/ipu3-css.c

2259

r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe,

drivers/staging/media/ipu3/ipu3-css.c

2260

IMGU_ABI_EVENT_BUFFER_ENQUEUED(pipe,

drivers/staging/media/ipu3/ipu3-css.c

2275

r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe,

drivers/staging/media/ipu3/ipu3-css.c

650

static void imgu_css_pipeline_cleanup(struct imgu_css *css, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

653

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

669

static int imgu_css_pipeline_init(struct imgu_css *css, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-css.c

687

struct imgu_css_pipe *css_pipe = &css->pipes[pipe];

drivers/staging/media/ipu3/ipu3-css.c

720

dev_dbg(css->dev, "%s for pipe %d", __func__, pipe);

drivers/staging/media/ipu3/ipu3-css.c

724

cfg_iter = imgu_css_fw_pipeline_params(css, pipe, cfg, m0,

drivers/staging/media/ipu3/ipu3-css.c

773

cfg_ref = imgu_css_fw_pipeline_params(css, pipe, cfg, m0,

drivers/staging/media/ipu3/ipu3-css.c

803

cfg_dvs = imgu_css_fw_pipeline_params(css, pipe, cfg, m0,

drivers/staging/media/ipu3/ipu3-css.c

819

cfg_tnr = imgu_css_fw_pipeline_params(css, pipe, cfg, m0,

drivers/staging/media/ipu3/ipu3-css.c

850

cfg_ref_state = imgu_css_fw_pipeline_params(css, pipe, cfg, m0,

drivers/staging/media/ipu3/ipu3-css.c

863

imgu_css_fw_pipeline_params(css, pipe, cfg, m0,

drivers/staging/media/ipu3/ipu3-css.c

880

isp_stage = css_pipe->xmem_isp_stage_ptrs[pipe][stage].vaddr;

drivers/staging/media/ipu3/ipu3-css.c

895

sp_stage = css_pipe->xmem_sp_stage_ptrs[pipe][stage].vaddr;

drivers/staging/media/ipu3/ipu3-css.c

998

css_pipe->xmem_isp_stage_ptrs[pipe][stage].daddr;

drivers/staging/media/ipu3/ipu3-css.h

173

unsigned int pipe);

drivers/staging/media/ipu3/ipu3-css.h

177

unsigned int pipe);

drivers/staging/media/ipu3/ipu3-css.h

179

int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css.h

186

bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe);

drivers/staging/media/ipu3/ipu3-css.h

195

int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-css.h

75

unsigned int pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

1014

ctrl->val, ctrl->id, imgu_sd->pipe);

drivers/staging/media/ipu3/ipu3-v4l2.c

105

dev_dbg(dev, "IPU3 pipe %u pipe_id %u", pipe, css_pipe->pipe_id);

drivers/staging/media/ipu3/ipu3-v4l2.c

1086

unsigned int pipe)

drivers/staging/media/ipu3/ipu3-v4l2.c

1090

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

111

r = imgu_css_fmt_set(&imgu->css, fmts, rects, pipe);

drivers/staging/media/ipu3/ipu3-v4l2.c

1113

"%s %u", IMGU_NAME, pipe);

drivers/staging/media/ipu3/ipu3-v4l2.c

1132

imgu_sd->pipe = pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

114

pipe, r);

drivers/staging/media/ipu3/ipu3-v4l2.c

1142

static int imgu_v4l2_node_setup(struct imgu_device *imgu, unsigned int pipe,

drivers/staging/media/ipu3/ipu3-v4l2.c

1150

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

1188

node->pipe = pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

1234

IMGU_NAME, pipe, node->name);

drivers/staging/media/ipu3/ipu3-v4l2.c

1275

unsigned int pipe, int node)

drivers/staging/media/ipu3/ipu3-v4l2.c

1278

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

1287

static int imgu_v4l2_nodes_setup_pipe(struct imgu_device *imgu, int pipe)

drivers/staging/media/ipu3/ipu3-v4l2.c

1292

int r = imgu_v4l2_node_setup(imgu, pipe, i);

drivers/staging/media/ipu3/ipu3-v4l2.c

1295

imgu_v4l2_nodes_cleanup_pipe(imgu, pipe, i);

drivers/staging/media/ipu3/ipu3-v4l2.c

1311

static void imgu_v4l2_cleanup_pipes(struct imgu_device *imgu, unsigned int pipe)

drivers/staging/media/ipu3/ipu3-v4l2.c

1315

for (i = 0; i < pipe; i++) {

drivers/staging/media/ipu3/ipu3-v4l2.c

134

unsigned int pipe = imgu_sd->pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

136

imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

158

unsigned int pipe = imgu_sd->pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

161

pipe, pad, fmt->format.width, fmt->format.height);

drivers/staging/media/ipu3/ipu3-v4l2.c

163

imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

249

imgu_sd->pipe, sel->which, sel->target,

drivers/staging/media/ipu3/ipu3-v4l2.c

25

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[imgu_sd->pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

285

unsigned int pipe = imgu_sd->pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

290

dev_dbg(&imgu->pci_dev->dev, "pipe %u pad %u is %s", pipe, pad,

drivers/staging/media/ipu3/ipu3-v4l2.c

293

imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

301

__set_bit(pipe, imgu->css.enabled_pipes);

drivers/staging/media/ipu3/ipu3-v4l2.c

303

__clear_bit(pipe, imgu->css.enabled_pipes);

drivers/staging/media/ipu3/ipu3-v4l2.c

305

dev_dbg(&imgu->pci_dev->dev, "pipe %u is %s", pipe,

drivers/staging/media/ipu3/ipu3-v4l2.c

380

imgu_queue_buffers(imgu, false, node->pipe);

drivers/staging/media/ipu3/ipu3-v4l2.c

384

node->pipe, node->id);

drivers/staging/media/ipu3/ipu3-v4l2.c

427

unsigned int i, pipe, p;

drivers/staging/media/ipu3/ipu3-v4l2.c

431

pipe = except->pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

432

if (!test_bit(pipe, imgu->css.enabled_pipes)) {

drivers/staging/media/ipu3/ipu3-v4l2.c

434

"pipe %u link is not ready yet", pipe);

drivers/staging/media/ipu3/ipu3-v4l2.c

476

unsigned int pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

479

node->name, node->pipe, node->id);

drivers/staging/media/ipu3/ipu3-v4l2.c

495

pipe = node->pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

496

imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

505

for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3-v4l2.c

506

r = v4l2_subdev_call(&imgu->imgu_pipe[pipe].imgu_sd.subdev,

drivers/staging/media/ipu3/ipu3-v4l2.c

538

unsigned int pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

544

pipe = node->pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

545

dev_dbg(dev, "Try to stream off node [%u][%u]", pipe, node->id);

drivers/staging/media/ipu3/ipu3-v4l2.c

571

for_each_set_bit(pipe, imgu->css.enabled_pipes,

drivers/staging/media/ipu3/ipu3-v4l2.c

573

imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

63

unsigned int pipe = imgu_sd->pipe;

drivers/staging/media/ipu3/ipu3-v4l2.c

67

struct imgu_css_pipe *css_pipe = &imgu->css.pipes[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

68

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

693

static int imgu_fmt(struct imgu_device *imgu, unsigned int pipe, int node,

drivers/staging/media/ipu3/ipu3-v4l2.c

70

dev_dbg(dev, "%s %d for pipe %u", __func__, enable, pipe);

drivers/staging/media/ipu3/ipu3-v4l2.c

702

struct imgu_css_pipe *css_pipe = &imgu->css.pipes[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

703

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3-v4l2.c

706

dev_dbg(dev, "set fmt node [%u][%u](try = %u)", pipe, node, try);

drivers/staging/media/ipu3/ipu3-v4l2.c

710

pipe, i, imgu_pipe->nodes[i].enabled);

drivers/staging/media/ipu3/ipu3-v4l2.c

720

dev_dbg(dev, "IPU3 pipe %u pipe_id = %u", pipe, css_pipe->pipe_id);

drivers/staging/media/ipu3/ipu3-v4l2.c

776

ret = imgu_css_fmt_try(&imgu->css, fmts, rects, pipe);

drivers/staging/media/ipu3/ipu3-v4l2.c

778

ret = imgu_css_fmt_set(&imgu->css, fmts, rects, pipe);

drivers/staging/media/ipu3/ipu3-v4l2.c

834

return imgu_fmt(imgu, node->pipe, node->id, f, true);

drivers/staging/media/ipu3/ipu3-v4l2.c

852

return imgu_fmt(imgu, node->pipe, node->id, f, false);

drivers/staging/media/ipu3/ipu3.c

107

static int imgu_dummybufs_init(struct imgu_device *imgu, unsigned int pipe)

drivers/staging/media/ipu3/ipu3.c

113

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3.c

140

imgu_dummybufs_cleanup(imgu, pipe);

drivers/staging/media/ipu3/ipu3.c

154

int queue, unsigned int pipe)

drivers/staging/media/ipu3/ipu3.c

157

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3.c

184

unsigned int pipe)

drivers/staging/media/ipu3/ipu3.c

187

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3.c

206

unsigned int pipe)

drivers/staging/media/ipu3/ipu3.c

209

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3.c

221

return imgu_dummybufs_get(imgu, imgu_node_map[node].css_queue, pipe);

drivers/staging/media/ipu3/ipu3.c

228

int imgu_queue_buffers(struct imgu_device *imgu, bool initial, unsigned int pipe)

drivers/staging/media/ipu3/ipu3.c

232

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3.c

237

dev_dbg(&imgu->pci_dev->dev, "Queue buffers to pipe %d", pipe);

drivers/staging/media/ipu3/ipu3.c

240

if (!imgu_css_pipe_queue_empty(&imgu->css, pipe)) {

drivers/staging/media/ipu3/ipu3.c

247

imgu_queue_getbuf(imgu, IMGU_NODE_IN, pipe);

drivers/staging/media/ipu3/ipu3.c

267

r = imgu_css_set_parameters(&imgu->css, pipe,

drivers/staging/media/ipu3/ipu3.c

281

imgu_queue_getbuf(imgu, node, pipe);

drivers/staging/media/ipu3/ipu3.c

288

r = imgu_css_buf_queue(&imgu->css, pipe, buf);

drivers/staging/media/ipu3/ipu3.c

291

dummy = imgu_dummybufs_check(imgu, buf, pipe);

drivers/staging/media/ipu3/ipu3.c

349

unsigned int pipe;

drivers/staging/media/ipu3/ipu3.c

354

for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3.c

355

fmt = &imgu->imgu_pipe[pipe].nodes[IMGU_NODE_IN].pad_fmt;

drivers/staging/media/ipu3/ipu3.c

357

pipe, fmt->width, fmt->height);

drivers/staging/media/ipu3/ipu3.c

379

int r, pipe;

drivers/staging/media/ipu3/ipu3.c

416

for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3.c

418

r = imgu_dummybufs_init(imgu, pipe);

drivers/staging/media/ipu3/ipu3.c

425

r = imgu_queue_buffers(imgu, true, pipe);

drivers/staging/media/ipu3/ipu3.c

434

for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM)

drivers/staging/media/ipu3/ipu3.c

435

imgu_dummybufs_cleanup(imgu, pipe);

drivers/staging/media/ipu3/ipu3.c

521

unsigned int node, pipe;

drivers/staging/media/ipu3/ipu3.c

538

pipe = b->pipe;

drivers/staging/media/ipu3/ipu3.c

539

dummy = imgu_dummybufs_check(imgu, b, pipe);

drivers/staging/media/ipu3/ipu3.c

554

imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3.c

70

static void imgu_dummybufs_cleanup(struct imgu_device *imgu, unsigned int pipe)

drivers/staging/media/ipu3/ipu3.c

73

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3.c

792

unsigned int pipe;

drivers/staging/media/ipu3/ipu3.c

81

unsigned int pipe)

drivers/staging/media/ipu3/ipu3.c

812

for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) {

drivers/staging/media/ipu3/ipu3.c

813

r = imgu_queue_buffers(imgu, true, pipe);

drivers/staging/media/ipu3/ipu3.c

816

pipe, r);

drivers/staging/media/ipu3/ipu3.c

85

struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe];

drivers/staging/media/ipu3/ipu3.c

99

imgu_dummybufs_cleanup(imgu, pipe);

drivers/staging/media/ipu3/ipu3.h

101

unsigned int pipe;

drivers/staging/media/ipu3/ipu3.h

158

unsigned int pipe);

drivers/staging/media/ipu3/ipu3.h

82

unsigned int pipe;

drivers/staging/media/ipu3/ipu3.h

86

unsigned int pipe;

drivers/staging/media/starfive/camss/stf-camss.h

53

struct media_pipeline pipe;

drivers/staging/media/starfive/camss/stf-video.c

275

ret = video_device_pipeline_start(vdev, &video->stfcamss->pipe);

drivers/staging/media/tegra-video/tegra20.c

508

struct media_pipeline *pipe = &chan->video.pipe;

drivers/staging/media/tegra-video/tegra20.c

513

err = video_device_pipeline_start(&chan->video, pipe);

drivers/staging/media/tegra-video/tegra210.c

613

struct media_pipeline *pipe = &chan->video.pipe;

drivers/staging/media/tegra-video/tegra210.c

635

ret = video_device_pipeline_start(&chan->video, pipe);

drivers/usb/atm/usbatm.c

524

if (usb_pipeisoc(urb->pipe)) {

drivers/usb/c67x00/c67x00-sched.c

1030

usb_settoggle(td_udev(td), usb_pipeendpoint(td->pipe),

drivers/usb/c67x00/c67x00-sched.c

1031

usb_pipeout(td->pipe),

drivers/usb/c67x00/c67x00-sched.c

142

dev_dbg(dev, "endpoint: %4d\n", usb_pipeendpoint(td->pipe));

drivers/usb/c67x00/c67x00-sched.c

143

dev_dbg(dev, "pipeout: %4d\n", usb_pipeout(td->pipe));

drivers/usb/c67x00/c67x00-sched.c

207

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/c67x00/c67x00-sched.c

267

type = usb_pipetype(urb->pipe);

drivers/usb/c67x00/c67x00-sched.c

388

switch (usb_pipetype(urb->pipe)) {

drivers/usb/c67x00/c67x00-sched.c

518

if (usb_pipein(urb->pipe))

drivers/usb/c67x00/c67x00-sched.c

524

if (usb_pipeisoc(urb->pipe))

drivers/usb/c67x00/c67x00-sched.c

525

bit_time = usb_pipein(urb->pipe) ? 9050 : 7840;

drivers/usb/c67x00/c67x00-sched.c

573

if (c67x00_claim_frame_bw(c67x00, urb, len, usb_pipeisoc(urb->pipe)

drivers/usb/c67x00/c67x00-sched.c

574

|| usb_pipeint(urb->pipe)))

drivers/usb/c67x00/c67x00-sched.c

581

td->pipe = urb->pipe;

drivers/usb/c67x00/c67x00-sched.c

588

switch (usb_pipetype(td->pipe)) {

drivers/usb/c67x00/c67x00-sched.c

618

(usb_pipeendpoint(td->pipe) & 0xF);

drivers/usb/c67x00/c67x00-sched.c

619

td->dev_addr = usb_pipedevice(td->pipe) & 0x7F;

drivers/usb/c67x00/c67x00-sched.c

654

toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/c67x00/c67x00-sched.c

655

usb_pipeout(urb->pipe));

drivers/usb/c67x00/c67x00-sched.c

658

maxps = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/c67x00/c67x00-sched.c

661

usb_pipeout(urb->pipe) && !(remaining % maxps);

drivers/usb/c67x00/c67x00-sched.c

671

pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;

drivers/usb/c67x00/c67x00-sched.c

681

if (usb_pipecontrol(urb->pipe))

drivers/usb/c67x00/c67x00-sched.c

70

unsigned int pipe;

drivers/usb/c67x00/c67x00-sched.c

704

usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/c67x00/c67x00-sched.c

705

usb_pipeout(urb->pipe), 1);

drivers/usb/c67x00/c67x00-sched.c

716

pid = !usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;

drivers/usb/c67x00/c67x00-sched.c

755

pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;

drivers/usb/c67x00/c67x00-sched.c

835

if (usb_pipein(td->pipe) && td_actual_bytes(td))

drivers/usb/c67x00/c67x00-sched.c

869

maxps = usb_maxpacket(td_udev(td), td->pipe);

drivers/usb/c67x00/c67x00-sched.c

876

usb_pipeout(urb->pipe) && !(remaining % maxps);

drivers/usb/c67x00/c67x00-sched.c

897

if (td->pipe == last_td->pipe) {

drivers/usb/c67x00/c67x00-sched.c

917

switch (usb_pipetype(td->pipe)) {

drivers/usb/c67x00/c67x00-sched.c

993

if (usb_pipeisoc(td->pipe)) {

drivers/usb/chipidea/host.c

404

if (usb_pipeisoc(urb->pipe))

drivers/usb/class/usbtmc.c

1941

unsigned int is_in, pipe;

drivers/usb/class/usbtmc.c

1969

pipe = usb_rcvctrlpipe(data->usb_dev, 0);

drivers/usb/class/usbtmc.c

1971

pipe = usb_sndctrlpipe(data->usb_dev, 0);

drivers/usb/class/usbtmc.c

1973

pipe,

drivers/usb/core/devio.c

1176

int i, pipe, ret;

drivers/usb/core/devio.c

1217

pipe = usb_rcvctrlpipe(dev, 0);

drivers/usb/core/devio.c

1218

usb_fill_control_urb(urb, dev, pipe, (unsigned char *) dr, tbuf,

drivers/usb/core/devio.c

1220

snoop_urb(dev, NULL, pipe, wLength, tmo, SUBMIT, NULL, 0);

drivers/usb/core/devio.c

1229

snoop_urb(dev, NULL, pipe, actlen, i, COMPLETE, tbuf, actlen);

drivers/usb/core/devio.c

1243

pipe = usb_sndctrlpipe(dev, 0);

drivers/usb/core/devio.c

1244

usb_fill_control_urb(urb, dev, pipe, (unsigned char *) dr, tbuf,

drivers/usb/core/devio.c

1246

snoop_urb(dev, NULL, pipe, wLength, tmo, SUBMIT, tbuf, wLength);

drivers/usb/core/devio.c

1255

snoop_urb(dev, NULL, pipe, actlen, i, COMPLETE, NULL, 0);

drivers/usb/core/devio.c

1287

unsigned int tmo, len1, len2, pipe;

drivers/usb/core/devio.c

1305

pipe = usb_rcvbulkpipe(dev, bulk->ep & 0x7f);

drivers/usb/core/devio.c

1307

pipe = usb_sndbulkpipe(dev, bulk->ep & 0x7f);

drivers/usb/core/devio.c

1308

ep = usb_pipe_endpoint(dev, pipe);

drivers/usb/core/devio.c

1329

pipe = (pipe & ~(3 << 30)) | (PIPE_INTERRUPT << 30);

drivers/usb/core/devio.c

1330

usb_fill_int_urb(urb, dev, pipe, tbuf, len1,

drivers/usb/core/devio.c

1333

usb_fill_bulk_urb(urb, dev, pipe, tbuf, len1, NULL, NULL);

drivers/usb/core/devio.c

1338

snoop_urb(dev, NULL, pipe, len1, tmo, SUBMIT, NULL, 0);

drivers/usb/core/devio.c

1343

snoop_urb(dev, NULL, pipe, len2, i, COMPLETE, tbuf, len2);

drivers/usb/core/devio.c

1358

snoop_urb(dev, NULL, pipe, len1, tmo, SUBMIT, tbuf, len1);

drivers/usb/core/devio.c

1363

snoop_urb(dev, NULL, pipe, len2, i, COMPLETE, NULL, 0);

drivers/usb/core/devio.c

1417

int pipe;

drivers/usb/core/devio.c

1430

pipe = usb_rcvbulkpipe(ps->dev, ep & 0x7f);

drivers/usb/core/devio.c

1432

pipe = usb_sndbulkpipe(ps->dev, ep & 0x7f);

drivers/usb/core/devio.c

1434

return usb_clear_halt(ps->dev, pipe);

drivers/usb/core/devio.c

1869

as->urb->pipe = (uurb->type << 30) |

drivers/usb/core/devio.c

1934

snoop_urb(ps->dev, as->userurb, as->urb->pipe,

drivers/usb/core/devio.c

1976

snoop_urb(ps->dev, as->userurb, as->urb->pipe,

drivers/usb/core/devio.c

490

void __user *userurb, int pipe, unsigned length,

drivers/usb/core/devio.c

502

ep = usb_pipeendpoint(pipe);

drivers/usb/core/devio.c

503

t = types[usb_pipetype(pipe)];

drivers/usb/core/devio.c

504

d = dirs[!!usb_pipein(pipe)];

drivers/usb/core/devio.c

644

snoop_urb(urb->dev, as->userurb, urb->pipe, urb->actual_length,

drivers/usb/core/hcd.c

1745

if (usb_pipeisoc(urb->pipe) || usb_pipeint(urb->pipe))

drivers/usb/core/hcd.c

2153

urb->pipe = usb_rcvctrlpipe(udev, 0);

drivers/usb/core/hub.c

1457

unsigned int pipe;

drivers/usb/core/hub.c

1713

pipe = usb_rcvintpipe(hdev, endpoint->bEndpointAddress);

drivers/usb/core/hub.c

1714

maxp = usb_maxpacket(hdev, pipe);

drivers/usb/core/hub.c

1725

usb_fill_int_urb(hub->urb, hdev, pipe, *hub->buffer, maxp, hub_irq,

drivers/usb/core/hub.c

923

int pipe = urb->pipe;

drivers/usb/core/hub.c

941

clear->devinfo = usb_pipeendpoint (pipe);

drivers/usb/core/hub.c

943

clear->devinfo |= usb_pipecontrol(pipe)

drivers/usb/core/hub.c

946

if (usb_pipein(pipe))

drivers/usb/core/message.c

102

unsigned int pipe,

drivers/usb/core/message.c

114

usb_fill_control_urb(urb, usb_dev, pipe, (unsigned char *)cmd, data,

drivers/usb/core/message.c

1265

int usb_clear_halt(struct usb_device *dev, int pipe)

drivers/usb/core/message.c

1268

int endp = usb_pipeendpoint(pipe);

drivers/usb/core/message.c

1270

if (usb_pipein(pipe))

drivers/usb/core/message.c

150

int usb_control_msg(struct usb_device *dev, unsigned int pipe, __u8 request,

drivers/usb/core/message.c

1592

unsigned int pipe;

drivers/usb/core/message.c

167

ret = usb_internal_control_msg(dev, pipe, dr, data, size, timeout);

drivers/usb/core/message.c

1696

pipe = __create_pipe(dev,

drivers/usb/core/message.c

1701

usb_clear_halt(dev, pipe);

drivers/usb/core/message.c

216

unsigned int pipe = usb_sndctrlpipe(dev, endpoint);

drivers/usb/core/message.c

226

ret = usb_control_msg(dev, pipe, request, requesttype, value, index,

drivers/usb/core/message.c

280

unsigned int pipe = usb_rcvctrlpipe(dev, endpoint);

drivers/usb/core/message.c

291

ret = usb_control_msg(dev, pipe, request, requesttype, value, index,

drivers/usb/core/message.c

335

int usb_interrupt_msg(struct usb_device *usb_dev, unsigned int pipe,

drivers/usb/core/message.c

338

return usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout);

drivers/usb/core/message.c

373

int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe,

drivers/usb/core/message.c

379

ep = usb_pipe_endpoint(usb_dev, pipe);

drivers/usb/core/message.c

389

pipe = (pipe & ~(3 << 30)) | (PIPE_INTERRUPT << 30);

drivers/usb/core/message.c

390

usb_fill_int_urb(urb, usb_dev, pipe, data, len,

drivers/usb/core/message.c

394

usb_fill_bulk_urb(urb, usb_dev, pipe, data, len,

drivers/usb/core/message.c

422

int usb_bulk_msg_killable(struct usb_device *usb_dev, unsigned int pipe,

drivers/usb/core/message.c

428

ep = usb_pipe_endpoint(usb_dev, pipe);

drivers/usb/core/message.c

438

pipe = (pipe & ~(3 << 30)) | (PIPE_INTERRUPT << 30);

drivers/usb/core/message.c

439

usb_fill_int_urb(urb, usb_dev, pipe, data, len,

drivers/usb/core/message.c

443

usb_fill_bulk_urb(urb, usb_dev, pipe, data, len,

drivers/usb/core/message.c

561

unsigned pipe, unsigned period, struct scatterlist *sg,

drivers/usb/core/message.c

569

|| usb_pipecontrol(pipe)

drivers/usb/core/message.c

570

|| usb_pipeisoc(pipe)

drivers/usb/core/message.c

576

io->pipe = pipe;

drivers/usb/core/message.c

592

if (usb_pipein(pipe))

drivers/usb/core/message.c

607

urb->pipe = pipe;

drivers/usb/core/urb.c

203

int usb_pipe_type_check(struct usb_device *dev, unsigned int pipe)

drivers/usb/core/urb.c

207

ep = usb_pipe_endpoint(dev, pipe);

drivers/usb/core/urb.c

210

if (usb_pipetype(pipe) != pipetypes[usb_endpoint_type(&ep->desc)])

drivers/usb/core/urb.c

226

return usb_pipe_type_check(urb->dev, urb->pipe);

drivers/usb/core/urb.c

391

ep = usb_pipe_endpoint(dev, urb->pipe);

drivers/usb/core/urb.c

411

dev_WARN_ONCE(&dev->dev, (usb_pipeout(urb->pipe) != is_out),

drivers/usb/core/urb.c

413

urb->pipe, setup->bRequestType);

drivers/usb/core/urb.c

507

if (usb_pipe_type_check(urb->dev, urb->pipe))

drivers/usb/core/urb.c

509

usb_pipetype(urb->pipe), pipetypes[xfertype]);

drivers/usb/dwc2/hcd.c

2455

if (usb_pipeisoc(urb->pipe))

drivers/usb/dwc2/hcd.c

4090

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)

drivers/usb/dwc2/hcd.c

4103

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)

drivers/usb/dwc2/hcd.c

4142

__func__, urb, usb_pipedevice(urb->pipe),

drivers/usb/dwc2/hcd.c

4143

usb_pipeendpoint(urb->pipe),

drivers/usb/dwc2/hcd.c

4144

usb_pipein(urb->pipe) ? "IN" : "OUT", status,

drivers/usb/dwc2/hcd.c

4147

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/dwc2/hcd.c

4160

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS && dbg_perio()) {

drivers/usb/dwc2/hcd.c

4173

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS ||

drivers/usb/dwc2/hcd.c

4174

usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {

drivers/usb/dwc2/hcd.c

4543

usb_pipedevice(urb->pipe));

drivers/usb/dwc2/hcd.c

4545

usb_pipeendpoint(urb->pipe),

drivers/usb/dwc2/hcd.c

4546

usb_pipein(urb->pipe) ? "IN" : "OUT");

drivers/usb/dwc2/hcd.c

4548

switch (usb_pipetype(urb->pipe)) {

drivers/usb/dwc2/hcd.c

4564

usb_urb_dir_in(urb) ? "IN" : "OUT", usb_pipein(urb->pipe) ?

drivers/usb/dwc2/hcd.c

4595

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/dwc2/hcd.c

4667

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS ||

drivers/usb/dwc2/hcd.c

4668

usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {

drivers/usb/dwc2/hcd.c

4675

switch (usb_pipetype(urb->pipe)) {

drivers/usb/dwc2/hcd.c

4695

dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, usb_pipedevice(urb->pipe),

drivers/usb/dwc2/hcd.c

4696

usb_pipeendpoint(urb->pipe), ep_type,

drivers/usb/dwc2/hcd.c

4697

usb_pipein(urb->pipe),

drivers/usb/dwc2/hcd.h

470

static inline u8 dwc2_hcd_get_ep_num(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

472

return pipe->ep_num;

drivers/usb/dwc2/hcd.h

475

static inline u8 dwc2_hcd_get_pipe_type(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

477

return pipe->pipe_type;

drivers/usb/dwc2/hcd.h

480

static inline u16 dwc2_hcd_get_maxp(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

482

return pipe->maxp;

drivers/usb/dwc2/hcd.h

485

static inline u16 dwc2_hcd_get_maxp_mult(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

487

return pipe->maxp_mult;

drivers/usb/dwc2/hcd.h

490

static inline u8 dwc2_hcd_get_dev_addr(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

492

return pipe->dev_addr;

drivers/usb/dwc2/hcd.h

495

static inline u8 dwc2_hcd_is_pipe_isoc(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

497

return pipe->pipe_type == USB_ENDPOINT_XFER_ISOC;

drivers/usb/dwc2/hcd.h

500

static inline u8 dwc2_hcd_is_pipe_int(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

502

return pipe->pipe_type == USB_ENDPOINT_XFER_INT;

drivers/usb/dwc2/hcd.h

505

static inline u8 dwc2_hcd_is_pipe_bulk(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

507

return pipe->pipe_type == USB_ENDPOINT_XFER_BULK;

drivers/usb/dwc2/hcd.h

510

static inline u8 dwc2_hcd_is_pipe_control(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

512

return pipe->pipe_type == USB_ENDPOINT_XFER_CONTROL;

drivers/usb/dwc2/hcd.h

515

static inline u8 dwc2_hcd_is_pipe_in(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

517

return pipe->pipe_dir == USB_DIR_IN;

drivers/usb/dwc2/hcd.h

520

static inline u8 dwc2_hcd_is_pipe_out(struct dwc2_hcd_pipe_info *pipe)

drivers/usb/dwc2/hcd.h

522

return !dwc2_hcd_is_pipe_in(pipe);

drivers/usb/dwc2/hcd.h

594

return usb_pipetype(urb->pipe) == PIPE_BULK ||

drivers/usb/dwc2/hcd.h

595

usb_pipetype(urb->pipe) == PIPE_CONTROL;

drivers/usb/fotg210/fotg210-hcd.c

2113

if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {

drivers/usb/fotg210/fotg210-hcd.c

2119

usb_pipeendpoint(urb->pipe), token);

drivers/usb/fotg210/fotg210-hcd.c

2170

usb_pipeendpoint(urb->pipe),

drivers/usb/fotg210/fotg210-hcd.c

2171

usb_pipein(urb->pipe) ? "in" : "out");

drivers/usb/fotg210/fotg210-hcd.c

2179

usb_pipedevice(urb->pipe),

drivers/usb/fotg210/fotg210-hcd.c

2180

usb_pipeendpoint(urb->pipe),

drivers/usb/fotg210/fotg210-hcd.c

2181

usb_pipein(urb->pipe) ? "in" : "out",

drivers/usb/fotg210/fotg210-hcd.c

2217

usb_pipeendpoint(urb->pipe),

drivers/usb/fotg210/fotg210-hcd.c

2218

usb_pipein(urb->pipe) ? "in" : "out",

drivers/usb/fotg210/fotg210-hcd.c

2547

is_input = usb_pipein(urb->pipe);

drivers/usb/fotg210/fotg210-hcd.c

2548

if (usb_pipecontrol(urb->pipe)) {

drivers/usb/fotg210/fotg210-hcd.c

2591

maxpacket = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/fotg210/fotg210-hcd.c

2642

usb_pipecontrol(urb->pipe)))

drivers/usb/fotg210/fotg210-hcd.c

2653

if (usb_pipecontrol(urb->pipe)) {

drivers/usb/fotg210/fotg210-hcd.c

2657

} else if (usb_pipeout(urb->pipe)

drivers/usb/fotg210/fotg210-hcd.c

2719

info1 |= usb_pipeendpoint(urb->pipe) << 8;

drivers/usb/fotg210/fotg210-hcd.c

2720

info1 |= usb_pipedevice(urb->pipe) << 0;

drivers/usb/fotg210/fotg210-hcd.c

2722

is_input = usb_pipein(urb->pipe);

drivers/usb/fotg210/fotg210-hcd.c

2723

type = usb_pipetype(urb->pipe);

drivers/usb/fotg210/fotg210-hcd.c

2724

ep = usb_pipe_endpoint(urb->dev, urb->pipe);

drivers/usb/fotg210/fotg210-hcd.c

2869

usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);

drivers/usb/fotg210/fotg210-hcd.c

2961

if (usb_pipedevice(urb->pipe) == 0)

drivers/usb/fotg210/fotg210-hcd.c

3913

int pipe, unsigned interval)

drivers/usb/fotg210/fotg210-hcd.c

3926

epnum = usb_pipeendpoint(pipe);

drivers/usb/fotg210/fotg210-hcd.c

3927

is_input = usb_pipein(pipe) ? USB_DIR_IN : 0;

drivers/usb/fotg210/fotg210-hcd.c

3928

ep = usb_pipe_endpoint(dev, pipe);

drivers/usb/fotg210/fotg210-hcd.c

3973

epnum = usb_pipeendpoint(urb->pipe);

drivers/usb/fotg210/fotg210-hcd.c

3974

if (usb_pipein(urb->pipe))

drivers/usb/fotg210/fotg210-hcd.c

3987

iso_stream_init(fotg210, stream, urb->dev, urb->pipe,

drivers/usb/fotg210/fotg210-hcd.c

3995

usb_pipein(urb->pipe) ? "in" : "out");

drivers/usb/fotg210/fotg210-hcd.c

4445

desc->status = usb_pipein(urb->pipe)

drivers/usb/fotg210/fotg210-hcd.c

4536

usb_pipeendpoint(urb->pipe),

drivers/usb/fotg210/fotg210-hcd.c

4537

usb_pipein(urb->pipe) ? "in" : "out",

drivers/usb/fotg210/fotg210-hcd.c

5260

switch (usb_pipetype(urb->pipe)) {

drivers/usb/fotg210/fotg210-hcd.c

5300

switch (usb_pipetype(urb->pipe)) {

drivers/usb/gadget/udc/dummy_hcd.c

1212

unsigned int pipe)

drivers/usb/gadget/udc/dummy_hcd.c

1216

max_streams = dum_hcd->num_stream[usb_pipeendpoint(pipe)];

drivers/usb/gadget/udc/dummy_hcd.c

1217

if (usb_pipeout(pipe))

drivers/usb/gadget/udc/dummy_hcd.c

1226

unsigned int pipe, unsigned int streams)

drivers/usb/gadget/udc/dummy_hcd.c

1231

max_streams = dum_hcd->num_stream[usb_pipeendpoint(pipe)];

drivers/usb/gadget/udc/dummy_hcd.c

1232

if (usb_pipeout(pipe)) {

drivers/usb/gadget/udc/dummy_hcd.c

1239

dum_hcd->num_stream[usb_pipeendpoint(pipe)] = max_streams;

drivers/usb/gadget/udc/dummy_hcd.c

1257

usb_pipeendpoint(urb->pipe));

drivers/usb/gadget/udc/dummy_hcd.c

1308

if (usb_pipetype(urb->pipe) == PIPE_CONTROL)

drivers/usb/gadget/udc/dummy_hcd.c

1871

address = usb_pipeendpoint (urb->pipe);

drivers/usb/gadget/udc/dummy_hcd.c

1964

switch (usb_pipetype(urb->pipe)) {

drivers/usb/gadget/udc/dummy_hcd.c

2426

int ep = usb_pipeendpoint(urb->pipe);

drivers/usb/gadget/udc/dummy_hcd.c

2451

switch (usb_pipetype(urb->pipe)) { \

drivers/usb/gadget/udc/fsl_qe_udc.c

1899

static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)

drivers/usb/gadget/udc/fsl_qe_udc.c

1901

struct qe_ep *ep = &udc->eps[pipe];

drivers/usb/gadget/udc/fsl_qe_udc.c

1910

u8 pipe;

drivers/usb/gadget/udc/fsl_qe_udc.c

1912

for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)

drivers/usb/gadget/udc/fsl_qe_udc.c

1913

udc_reset_ep_queue(udc, pipe);

drivers/usb/gadget/udc/fsl_qe_udc.c

1962

int pipe = index & USB_ENDPOINT_NUMBER_MASK;

drivers/usb/gadget/udc/fsl_qe_udc.c

1963

if (pipe >= USB_MAX_ENDPOINTS)

drivers/usb/gadget/udc/fsl_qe_udc.c

1965

struct qe_ep *target_ep = &udc->eps[pipe];

drivers/usb/gadget/udc/fsl_qe_udc.c

1972

usep = in_be16(&udc->usb_regs->usb_usep[pipe]);

drivers/usb/gadget/udc/fsl_qe_udc.c

2051

int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;

drivers/usb/gadget/udc/fsl_qe_udc.c

2055

|| pipe >= USB_MAX_ENDPOINTS)

drivers/usb/gadget/udc/fsl_qe_udc.c

2057

ep = &udc->eps[pipe];

drivers/usb/gadget/udc/fsl_udc_core.c

1309

static void udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)

drivers/usb/gadget/udc/fsl_udc_core.c

1311

struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);

drivers/usb/gadget/udc/fsl_udc_core.c

1436

int pipe = get_pipe_by_windex(wIndex);

drivers/usb/gadget/udc/fsl_udc_core.c

1439

if (wValue != 0 || wLength != 0 || pipe >= udc->max_ep)

drivers/usb/gadget/udc/fsl_udc_core.c

1441

ep = get_ep_by_pipe(udc, pipe);

drivers/usb/gadget/udc/fsl_udc_core.c

1598

static int process_ep_req(struct fsl_udc *udc, int pipe,

drivers/usb/gadget/udc/fsl_udc_core.c

1605

struct ep_queue_head *curr_qh = &udc->ep_qh[pipe];

drivers/usb/gadget/udc/fsl_udc_core.c

1606

int direction = pipe % 2;

drivers/usb/gadget/udc/fsl_udc_core.c

1620

dev_err(&udc->gadget.dev, "dTD error %08x QH=%d\n", errors, pipe);

drivers/usb/gadget/udc/fsl_udc_core.c

1783

u8 pipe;

drivers/usb/gadget/udc/fsl_udc_core.c

1785

for (pipe = 0; pipe < udc->max_pipes; pipe++)

drivers/usb/gadget/udc/fsl_udc_core.c

1786

udc_reset_ep_queue(udc, pipe);

drivers/usb/gadget/udc/fsl_usb2_udc.h

528

#define get_ep_by_pipe(udc, pipe) ((pipe == 1)? &udc->eps[0]: \

drivers/usb/gadget/udc/fsl_usb2_udc.h

529

&udc->eps[pipe])

drivers/usb/gadget/udc/m66592-udc.c

232

if (info->pipe == 0)

drivers/usb/gadget/udc/m66592-udc.c

235

m66592_write(m66592, info->pipe, M66592_PIPESEL);

drivers/usb/gadget/udc/m66592-udc.c

243

bufnum = 4 + (info->pipe - M66592_BASE_PIPENUM_INT);

drivers/usb/gadget/udc/m66592-udc.c

248

if (info->pipe >= M66592_BASE_PIPENUM_BULK)

drivers/usb/gadget/udc/m66592-udc.c

249

bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;

drivers/usb/gadget/udc/m66592-udc.c

251

bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;

drivers/usb/gadget/udc/m66592-udc.c

261

(info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;

drivers/usb/gadget/udc/m66592-udc.c

284

if (info->pipe == 0)

drivers/usb/gadget/udc/m66592-udc.c

287

if (is_bulk_pipe(info->pipe)) {

drivers/usb/gadget/udc/m66592-udc.c

289

} else if (is_interrupt_pipe(info->pipe))

drivers/usb/gadget/udc/m66592-udc.c

291

else if (is_isoc_pipe(info->pipe)) {

drivers/usb/gadget/udc/m66592-udc.c

297

info->pipe);

drivers/usb/gadget/udc/m66592-udc.c

401

info.pipe = M66592_BASE_PIPENUM_ISOC

drivers/usb/gadget/udc/m66592-udc.c

406

info.pipe = M66592_BASE_PIPENUM_BULK + m66592->bulk;

drivers/usb/gadget/udc/m66592-udc.c

417

info.pipe = M66592_BASE_PIPENUM_INT + m66592->interrupt;

drivers/usb/gadget/udc/m66592-udc.c

426

info.pipe = M66592_BASE_PIPENUM_ISOC + m66592->isochronous;

drivers/usb/gadget/udc/m66592-udc.c

454

m66592_ep_setting(m66592, ep, desc, info.pipe, dma);

drivers/usb/gadget/udc/m66592-udc.c

465

info.pipe = ep->pipenum;

drivers/usb/gadget/udc/m66592-udc.h

428

u16 pipe;

drivers/usb/gadget/udc/r8a66597-udc.c

322

if (info->pipe == 0)

drivers/usb/gadget/udc/r8a66597-udc.c

325

r8a66597_write(r8a66597, info->pipe, PIPESEL);

drivers/usb/gadget/udc/r8a66597-udc.c

333

bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT);

drivers/usb/gadget/udc/r8a66597-udc.c

338

if (info->pipe >= R8A66597_BASE_PIPENUM_BULK)

drivers/usb/gadget/udc/r8a66597-udc.c

339

bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK;

drivers/usb/gadget/udc/r8a66597-udc.c

341

bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC;

drivers/usb/gadget/udc/r8a66597-udc.c

351

(info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16;

drivers/usb/gadget/udc/r8a66597-udc.c

374

if (info->pipe == 0)

drivers/usb/gadget/udc/r8a66597-udc.c

377

if (is_bulk_pipe(info->pipe)) {

drivers/usb/gadget/udc/r8a66597-udc.c

379

} else if (is_interrupt_pipe(info->pipe)) {

drivers/usb/gadget/udc/r8a66597-udc.c

381

} else if (is_isoc_pipe(info->pipe)) {

drivers/usb/gadget/udc/r8a66597-udc.c

387

"ep_release: unexpect pipenum (%d)\n", info->pipe);

drivers/usb/gadget/udc/r8a66597-udc.c

472

info.pipe = R8A66597_BASE_PIPENUM_ISOC

drivers/usb/gadget/udc/r8a66597-udc.c

477

info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk;

drivers/usb/gadget/udc/r8a66597-udc.c

489

info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt;

drivers/usb/gadget/udc/r8a66597-udc.c

499

info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous;

drivers/usb/gadget/udc/r8a66597-udc.c

528

r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma);

drivers/usb/gadget/udc/r8a66597-udc.c

539

info.pipe = ep->pipenum;

drivers/usb/gadget/udc/r8a66597-udc.h

42

u16 pipe;

drivers/usb/host/ehci-hcd.c

891

switch (usb_pipetype (urb->pipe)) {

drivers/usb/host/ehci-hcd.c

934

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/host/ehci-hcd.c

945

if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)

drivers/usb/host/ehci-q.c

1047

if (usb_pipedevice (urb->pipe) == 0)

drivers/usb/host/ehci-q.c

162

if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {

drivers/usb/host/ehci-q.c

168

usb_pipeendpoint(urb->pipe), token);

drivers/usb/host/ehci-q.c

236

usb_pipeendpoint(urb->pipe),

drivers/usb/host/ehci-q.c

237

usb_pipein(urb->pipe) ? "in" : "out");

drivers/usb/host/ehci-q.c

250

if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {

drivers/usb/host/ehci-q.c

268

usb_pipeendpoint (urb->pipe),

drivers/usb/host/ehci-q.c

269

usb_pipein (urb->pipe) ? "in" : "out",

drivers/usb/host/ehci-q.c

600

is_input = usb_pipein (urb->pipe);

drivers/usb/host/ehci-q.c

601

if (usb_pipecontrol (urb->pipe)) {

drivers/usb/host/ehci-q.c

695

|| usb_pipecontrol (urb->pipe)))

drivers/usb/host/ehci-q.c

706

if (usb_pipecontrol (urb->pipe)) {

drivers/usb/host/ehci-q.c

710

} else if (usb_pipeout(urb->pipe)

drivers/usb/host/ehci-q.c

777

info1 |= usb_pipeendpoint (urb->pipe) << 8;

drivers/usb/host/ehci-q.c

778

info1 |= usb_pipedevice (urb->pipe) << 0;

drivers/usb/host/ehci-q.c

780

is_input = usb_pipein (urb->pipe);

drivers/usb/host/ehci-q.c

781

type = usb_pipetype (urb->pipe);

drivers/usb/host/ehci-q.c

782

ep = usb_pipe_endpoint (urb->dev, urb->pipe);

drivers/usb/host/ehci-q.c

944

usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);

drivers/usb/host/ehci-sched.c

1034

epnum = usb_pipeendpoint(urb->pipe);

drivers/usb/host/ehci-sched.c

1035

is_input = usb_pipein(urb->pipe) ? USB_DIR_IN : 0;

drivers/usb/host/ehci-sched.c

1132

epnum = usb_pipeendpoint (urb->pipe);

drivers/usb/host/ehci-sched.c

1133

if (usb_pipein(urb->pipe))

drivers/usb/host/ehci-sched.c

1152

usb_pipein(urb->pipe) ? "in" : "out");

drivers/usb/host/ehci-sched.c

1844

desc->status = usb_pipein(urb->pipe)

drivers/usb/host/ehci-sched.c

1936

usb_pipeendpoint(urb->pipe),

drivers/usb/host/ehci-sched.c

1937

usb_pipein(urb->pipe) ? "in" : "out",

drivers/usb/host/ehci-sched.c

2231

desc->status = usb_pipein(urb->pipe)

drivers/usb/host/ehci-sched.c

2315

usb_pipeendpoint(urb->pipe),

drivers/usb/host/ehci-sched.c

2316

usb_pipein(urb->pipe) ? "in" : "out",

drivers/usb/host/fhci-hcd.c

389

u32 pipe = urb->pipe;

drivers/usb/host/fhci-hcd.c

396

switch (usb_pipetype(pipe)) {

drivers/usb/host/fhci-hcd.c

412

% usb_maxpacket(urb->dev, pipe)) != 0)

drivers/usb/host/fhci-q.c

226

if (usb_pipeout(urb->pipe))

drivers/usb/host/fhci-sched.c

709

ed->dev_addr = usb_pipedevice(urb->pipe);

drivers/usb/host/fhci-sched.c

710

ed->ep_addr = usb_pipeendpoint(urb->pipe);

drivers/usb/host/fhci-sched.c

711

switch (usb_pipetype(urb->pipe)) {

drivers/usb/host/fhci-sched.c

748

if (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/host/fhci-sched.c

749

usb_pipeout(urb->pipe)))

drivers/usb/host/fhci-sched.c

753

usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/host/fhci-sched.c

754

usb_pipeout(urb->pipe), 1);

drivers/usb/host/fhci-sched.c

773

usb_pipeout(urb->pipe) ? FHCI_TA_OUT :

drivers/usb/host/fhci-sched.c

784

usb_pipeout(urb->pipe) ? FHCI_TA_OUT : FHCI_TA_IN,

drivers/usb/host/fhci-sched.c

792

usb_pipeout(urb->pipe) ? FHCI_TA_OUT :

drivers/usb/host/fhci-sched.c

801

usb_pipeout(urb->pipe) ? FHCI_TA_OUT : FHCI_TA_IN,

drivers/usb/host/fhci-sched.c

806

ed->dev_addr = usb_pipedevice(urb->pipe);

drivers/usb/host/fhci-sched.c

816

usb_pipeout(urb->pipe) ? FHCI_TA_OUT :

drivers/usb/host/fhci-sched.c

825

(usb_pipeout(urb->pipe) ? FHCI_TA_IN :

drivers/usb/host/fhci-sched.c

847

usb_pipeout(urb->pipe) ? FHCI_TA_OUT :

drivers/usb/host/fhci-sched.c

864

urb->pipe &= ~0x1f;

drivers/usb/host/fhci-sched.c

865

urb->pipe |= urb_state & 0x1f;

drivers/usb/host/isp116x-hcd.c

266

&& usb_pipein(urb->pipe))

drivers/usb/host/isp116x-hcd.c

280

ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));

drivers/usb/host/isp116x-hcd.c

302

if (usb_pipecontrol(urb->pipe))

drivers/usb/host/isp116x-hcd.c

375

usb_pipecontrol(urb->pipe)) {

drivers/usb/host/isp116x-hcd.c

401

if (usb_pipeint(urb->pipe) && !PTD_GET_LEN(ptd)) {

drivers/usb/host/isp116x-hcd.c

440

if (usb_pipecontrol(urb->pipe))

drivers/usb/host/isp116x-hcd.c

451

else if (usb_pipeout(urb->pipe)) {

drivers/usb/host/isp116x-hcd.c

687

unsigned int pipe = urb->pipe;

drivers/usb/host/isp116x-hcd.c

688

int is_out = !usb_pipein(pipe);

drivers/usb/host/isp116x-hcd.c

689

int type = usb_pipetype(pipe);

drivers/usb/host/isp116x-hcd.c

690

int epnum = usb_pipeendpoint(pipe);

drivers/usb/host/isp116x-hcd.c

729

ep->maxpacket = usb_maxpacket(udev, urb->pipe);

drivers/usb/host/isp116x-hcd.c

760

usb_maxpacket(udev, pipe)) /

drivers/usb/host/isp116x.h

508

#define PIPETYPE(pipe) ({ char *__s; \

drivers/usb/host/isp116x.h

509

if (usb_pipecontrol(pipe)) __s = "ctrl"; \

drivers/usb/host/isp116x.h

510

else if (usb_pipeint(pipe)) __s = "int"; \

drivers/usb/host/isp116x.h

511

else if (usb_pipebulk(pipe)) __s = "bulk"; \

drivers/usb/host/isp116x.h

514

#define PIPEDIR(pipe) ({ usb_pipein(pipe) ? "in" : "out"; })

drivers/usb/host/isp116x.h

521

unsigned int pipe;

drivers/usb/host/isp116x.h

527

pipe = urb->pipe;

drivers/usb/host/isp116x.h

529

usb_pipedevice(pipe), usb_pipeendpoint(pipe),

drivers/usb/host/isp116x.h

530

PIPEDIR(pipe), PIPETYPE(pipe),

drivers/usb/host/max3421-hcd.c

1051

if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {

drivers/usb/host/max3421-hcd.c

1168

usb_pipetype(urb->pipe),

drivers/usb/host/max3421-hcd.c

1507

switch (usb_pipetype(urb->pipe)) {

drivers/usb/host/max3421-hcd.c

515

int epnum = usb_pipeendpoint(urb->pipe);

drivers/usb/host/max3421-hcd.c

527

int epnum = usb_pipeendpoint(urb->pipe);

drivers/usb/host/max3421-hcd.c

543

max_packet = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/host/max3421-hcd.c

952

max_packet = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/host/max3421-hcd.c

998

u32 max_packet = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/host/octeon-hcd.c

1099

struct cvmx_usb_pipe *pipe;

drivers/usb/host/octeon-hcd.c

1101

pipe = kzalloc_obj(*pipe, GFP_ATOMIC);

drivers/usb/host/octeon-hcd.c

1102

if (!pipe)

drivers/usb/host/octeon-hcd.c

1107

pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING;

drivers/usb/host/octeon-hcd.c

1108

pipe->device_addr = device_addr;

drivers/usb/host/octeon-hcd.c

1109

pipe->endpoint_num = endpoint_num;

drivers/usb/host/octeon-hcd.c

1110

pipe->device_speed = device_speed;

drivers/usb/host/octeon-hcd.c

1111

pipe->max_packet = max_packet;

drivers/usb/host/octeon-hcd.c

1112

pipe->transfer_type = transfer_type;

drivers/usb/host/octeon-hcd.c

1113

pipe->transfer_dir = transfer_dir;

drivers/usb/host/octeon-hcd.c

1114

INIT_LIST_HEAD(&pipe->transactions);

drivers/usb/host/octeon-hcd.c

1122

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

1123

pipe->interval = interval * 8;

drivers/usb/host/octeon-hcd.c

1125

pipe->next_tx_frame = ((usb->frame_number + 7) & ~7) +

drivers/usb/host/octeon-hcd.c

1126

pipe->interval;

drivers/usb/host/octeon-hcd.c

1128

pipe->interval = interval;

drivers/usb/host/octeon-hcd.c

1129

pipe->next_tx_frame = usb->frame_number + pipe->interval;

drivers/usb/host/octeon-hcd.c

1131

pipe->multi_count = multi_count;

drivers/usb/host/octeon-hcd.c

1132

pipe->hub_device_addr = hub_device_addr;

drivers/usb/host/octeon-hcd.c

1133

pipe->hub_port = hub_port;

drivers/usb/host/octeon-hcd.c

1134

pipe->pid_toggle = 0;

drivers/usb/host/octeon-hcd.c

1135

pipe->split_sc_frame = -1;

drivers/usb/host/octeon-hcd.c

1136

list_add_tail(&pipe->node, &usb->idle_pipes);

drivers/usb/host/octeon-hcd.c

1143

return pipe;

drivers/usb/host/octeon-hcd.c

1350

struct cvmx_usb_pipe *pipe)

drivers/usb/host/octeon-hcd.c

1355

list_first_entry(&pipe->transactions, typeof(*transaction),

drivers/usb/host/octeon-hcd.c

1399

usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);

drivers/usb/host/octeon-hcd.c

1400

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

1403

else if (bytes_to_transfer > pipe->max_packet)

drivers/usb/host/octeon-hcd.c

1404

bytes_to_transfer = pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1413

usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);

drivers/usb/host/octeon-hcd.c

1425

usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);

drivers/usb/host/octeon-hcd.c

1434

usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);

drivers/usb/host/octeon-hcd.c

1452

bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1453

bytes_to_transfer *= pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1461

pipe->max_packet);

drivers/usb/host/octeon-hcd.c

1472

bytes_to_transfer = packets_to_transfer * pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1479

bytes_to_transfer = packets_to_transfer * pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1497

struct cvmx_usb_pipe *pipe)

drivers/usb/host/octeon-hcd.c

1500

list_first_entry(&pipe->transactions, typeof(*transaction),

drivers/usb/host/octeon-hcd.c

1507

usb->pipe_for_channel[channel] = pipe;

drivers/usb/host/octeon-hcd.c

1508

pipe->channel = channel;

drivers/usb/host/octeon-hcd.c

1509

pipe->flags |= CVMX_USB_PIPE_FLAGS_SCHEDULED;

drivers/usb/host/octeon-hcd.c

1539

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

1574

if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT)

drivers/usb/host/octeon-hcd.c

1602

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

1611

pipe->split_sc_frame =

drivers/usb/host/octeon-hcd.c

1614

pipe->split_sc_frame =

drivers/usb/host/octeon-hcd.c

1617

pipe->split_sc_frame = -1;

drivers/usb/host/octeon-hcd.c

1621

usbc_hcsplt.s.hubaddr = pipe->hub_device_addr;

drivers/usb/host/octeon-hcd.c

1622

usbc_hcsplt.s.prtaddr = pipe->hub_port;

drivers/usb/host/octeon-hcd.c

1631

if (bytes_to_transfer > pipe->max_packet)

drivers/usb/host/octeon-hcd.c

1632

bytes_to_transfer = pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1640

(pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&

drivers/usb/host/octeon-hcd.c

1641

(pipe->transfer_type ==

drivers/usb/host/octeon-hcd.c

1647

pipe->split_sc_frame = -1;

drivers/usb/host/octeon-hcd.c

1695

pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1696

bytes_to_transfer *= pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1704

DIV_ROUND_UP(bytes_to_transfer, pipe->max_packet);

drivers/usb/host/octeon-hcd.c

1718

pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1726

pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1733

usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);

drivers/usb/host/octeon-hcd.c

1737

if (pipe->flags & CVMX_USB_PIPE_FLAGS_NEED_PING)

drivers/usb/host/octeon-hcd.c

1764

if (cvmx_usb_pipe_needs_split(usb, pipe))

drivers/usb/host/octeon-hcd.c

1766

else if (pipe->multi_count < 1)

drivers/usb/host/octeon-hcd.c

1768

else if (pipe->multi_count > 3)

drivers/usb/host/octeon-hcd.c

1771

usbc_hcchar.s.ec = pipe->multi_count;

drivers/usb/host/octeon-hcd.c

1774

usbc_hcchar.s.devaddr = pipe->device_addr;

drivers/usb/host/octeon-hcd.c

1777

(pipe->device_speed == CVMX_USB_SPEED_LOW);

drivers/usb/host/octeon-hcd.c

1778

usbc_hcchar.s.epdir = pipe->transfer_dir;

drivers/usb/host/octeon-hcd.c

1779

usbc_hcchar.s.epnum = pipe->endpoint_num;

drivers/usb/host/octeon-hcd.c

1780

usbc_hcchar.s.mps = pipe->max_packet;

drivers/usb/host/octeon-hcd.c

1789

cvmx_usb_start_channel_control(usb, channel, pipe);

drivers/usb/host/octeon-hcd.c

1795

if (!cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

1800

if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {

drivers/usb/host/octeon-hcd.c

1801

if (pipe->multi_count < 2) /* Need DATA0 */

drivers/usb/host/octeon-hcd.c

1825

if (cvmx_usb_pipe_needs_split(usb, pipe))

drivers/usb/host/octeon-hcd.c

1845

struct cvmx_usb_pipe *pipe;

drivers/usb/host/octeon-hcd.c

1847

list_for_each_entry(pipe, list, node) {

drivers/usb/host/octeon-hcd.c

1849

list_first_entry(&pipe->transactions, typeof(*t),

drivers/usb/host/octeon-hcd.c

1851

if (!(pipe->flags & CVMX_USB_PIPE_FLAGS_SCHEDULED) && t &&

drivers/usb/host/octeon-hcd.c

1852

(pipe->next_tx_frame <= current_frame) &&

drivers/usb/host/octeon-hcd.c

1853

((pipe->split_sc_frame == -1) ||

drivers/usb/host/octeon-hcd.c

1854

((((int)current_frame - pipe->split_sc_frame) & 0x7f) <

drivers/usb/host/octeon-hcd.c

1858

return pipe;

drivers/usb/host/octeon-hcd.c

1867

struct cvmx_usb_pipe *pipe;

drivers/usb/host/octeon-hcd.c

1876

pipe = cvmx_usb_find_ready_pipe(usb,

drivers/usb/host/octeon-hcd.c

1878

if (pipe)

drivers/usb/host/octeon-hcd.c

1879

return pipe;

drivers/usb/host/octeon-hcd.c

1880

pipe = cvmx_usb_find_ready_pipe(usb,

drivers/usb/host/octeon-hcd.c

1882

if (pipe)

drivers/usb/host/octeon-hcd.c

1883

return pipe;

drivers/usb/host/octeon-hcd.c

1885

pipe = cvmx_usb_find_ready_pipe(usb, CVMX_USB_TRANSFER_CONTROL);

drivers/usb/host/octeon-hcd.c

1886

if (pipe)

drivers/usb/host/octeon-hcd.c

1887

return pipe;

drivers/usb/host/octeon-hcd.c

1901

struct cvmx_usb_pipe *pipe;

drivers/usb/host/octeon-hcd.c

1930

pipe = cvmx_usb_next_pipe(usb, is_sof);

drivers/usb/host/octeon-hcd.c

1931

if (!pipe)

drivers/usb/host/octeon-hcd.c

1934

cvmx_usb_start_channel(usb, channel, pipe);

drivers/usb/host/octeon-hcd.c

1945

list_for_each_entry(pipe, &usb->active_pipes[ttype], node) {

drivers/usb/host/octeon-hcd.c

1946

if (pipe->next_tx_frame > usb->frame_number) {

drivers/usb/host/octeon-hcd.c

1958

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

1977

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/host/octeon-hcd.c

1997

iso_packet[i].status, pipe,

drivers/usb/host/octeon-hcd.c

2017

pipe, transaction, bytes_transferred);

drivers/usb/host/octeon-hcd.c

2022

pipe, transaction, bytes_transferred);

drivers/usb/host/octeon-hcd.c

2027

pipe, transaction, bytes_transferred);

drivers/usb/host/octeon-hcd.c

2035

status, pipe, transaction, bytes_transferred);

drivers/usb/host/octeon-hcd.c

2057

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2093

if (list_empty(&pipe->transactions))

drivers/usb/host/octeon-hcd.c

2094

list_move_tail(&pipe->node, &usb->idle_pipes);

drivers/usb/host/octeon-hcd.c

2095

octeon_usb_urb_complete_callback(usb, complete_code, pipe,

drivers/usb/host/octeon-hcd.c

2126

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2138

if (unlikely(pipe->transfer_type != type))

drivers/usb/host/octeon-hcd.c

2159

if (!list_empty(&pipe->transactions)) {

drivers/usb/host/octeon-hcd.c

2160

list_add_tail(&transaction->node, &pipe->transactions);

drivers/usb/host/octeon-hcd.c

2162

list_add_tail(&transaction->node, &pipe->transactions);

drivers/usb/host/octeon-hcd.c

2163

list_move_tail(&pipe->node,

drivers/usb/host/octeon-hcd.c

2164

&usb->active_pipes[pipe->transfer_type]);

drivers/usb/host/octeon-hcd.c

2187

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2190

return cvmx_usb_submit_transaction(usb, pipe, CVMX_USB_TRANSFER_BULK,

drivers/usb/host/octeon-hcd.c

2211

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2214

return cvmx_usb_submit_transaction(usb, pipe,

drivers/usb/host/octeon-hcd.c

2236

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2246

return cvmx_usb_submit_transaction(usb, pipe,

drivers/usb/host/octeon-hcd.c

2267

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2273

return cvmx_usb_submit_transaction(usb, pipe,

drivers/usb/host/octeon-hcd.c

2297

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2304

if (list_first_entry(&pipe->transactions, typeof(*transaction), node) ==

drivers/usb/host/octeon-hcd.c

2305

transaction && (pipe->flags & CVMX_USB_PIPE_FLAGS_SCHEDULED)) {

drivers/usb/host/octeon-hcd.c

2308

usb->pipe_for_channel[pipe->channel] = NULL;

drivers/usb/host/octeon-hcd.c

2309

pipe->flags &= ~CVMX_USB_PIPE_FLAGS_SCHEDULED;

drivers/usb/host/octeon-hcd.c

2314

CVMX_USBCX_HCCHARX(pipe->channel,

drivers/usb/host/octeon-hcd.c

2323

CVMX_USBCX_HCCHARX(pipe->channel,

drivers/usb/host/octeon-hcd.c

2328

cvmx_usb_complete(usb, pipe, transaction, CVMX_USB_STATUS_CANCEL);

drivers/usb/host/octeon-hcd.c

2342

struct cvmx_usb_pipe *pipe)

drivers/usb/host/octeon-hcd.c

2347

list_for_each_entry_safe(transaction, next, &pipe->transactions, node) {

drivers/usb/host/octeon-hcd.c

2348

int result = cvmx_usb_cancel(usb, pipe, transaction);

drivers/usb/host/octeon-hcd.c

2366

struct cvmx_usb_pipe *pipe)

drivers/usb/host/octeon-hcd.c

2369

if (!list_empty(&pipe->transactions))

drivers/usb/host/octeon-hcd.c

2372

list_del(&pipe->node);

drivers/usb/host/octeon-hcd.c

2373

kfree(pipe);

drivers/usb/host/octeon-hcd.c

2396

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2406

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2410

pipe->pid_toggle = 1;

drivers/usb/host/octeon-hcd.c

2411

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

2434

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

2443

if (buffer_space_left < pipe->max_packet)

drivers/usb/host/octeon-hcd.c

2448

pipe->max_packet;

drivers/usb/host/octeon-hcd.c

2451

(bytes_in_last_packet < pipe->max_packet)) {

drivers/usb/host/octeon-hcd.c

2452

pipe->pid_toggle = 1;

drivers/usb/host/octeon-hcd.c

2458

(bytes_in_last_packet < pipe->max_packet)) {

drivers/usb/host/octeon-hcd.c

2459

pipe->pid_toggle = 1;

drivers/usb/host/octeon-hcd.c

2466

if (cvmx_usb_pipe_needs_split(usb, pipe))

drivers/usb/host/octeon-hcd.c

2470

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2474

cvmx_usb_complete(usb, pipe, transaction, CVMX_USB_STATUS_OK);

drivers/usb/host/octeon-hcd.c

2480

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2491

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

2496

(bytes_in_last_packet == pipe->max_packet))

drivers/usb/host/octeon-hcd.c

2499

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2502

if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&

drivers/usb/host/octeon-hcd.c

2503

(pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) &&

drivers/usb/host/octeon-hcd.c

2505

pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING;

drivers/usb/host/octeon-hcd.c

2507

(bytes_in_last_packet < pipe->max_packet))

drivers/usb/host/octeon-hcd.c

2508

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2514

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2519

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

2524

(bytes_in_last_packet == pipe->max_packet)) {

drivers/usb/host/octeon-hcd.c

2527

pipe->next_tx_frame += pipe->interval;

drivers/usb/host/octeon-hcd.c

2528

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2532

(bytes_in_last_packet < pipe->max_packet)) {

drivers/usb/host/octeon-hcd.c

2533

pipe->next_tx_frame += pipe->interval;

drivers/usb/host/octeon-hcd.c

2534

cvmx_usb_complete(usb, pipe, transaction, CVMX_USB_STATUS_OK);

drivers/usb/host/octeon-hcd.c

2539

struct cvmx_usb_pipe *pipe,

drivers/usb/host/octeon-hcd.c

2545

if (cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

2552

if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) {

drivers/usb/host/octeon-hcd.c

2559

pipe->next_tx_frame += pipe->interval;

drivers/usb/host/octeon-hcd.c

2560

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2572

(bytes_in_last_packet < pipe->max_packet)) {

drivers/usb/host/octeon-hcd.c

2573

pipe->next_tx_frame += pipe->interval;

drivers/usb/host/octeon-hcd.c

2574

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2582

pipe->next_tx_frame += pipe->interval;

drivers/usb/host/octeon-hcd.c

2583

cvmx_usb_complete(usb, pipe, transaction, CVMX_USB_STATUS_OK);

drivers/usb/host/octeon-hcd.c

2602

struct cvmx_usb_pipe *pipe;

drivers/usb/host/octeon-hcd.c

2674

pipe = usb->pipe_for_channel[channel];

drivers/usb/host/octeon-hcd.c

2675

prefetch(pipe);

drivers/usb/host/octeon-hcd.c

2676

if (!pipe)

drivers/usb/host/octeon-hcd.c

2678

transaction = list_first_entry(&pipe->transactions,

drivers/usb/host/octeon-hcd.c

2688

pipe->flags &= ~CVMX_USB_PIPE_FLAGS_SCHEDULED;

drivers/usb/host/octeon-hcd.c

2761

pipe->pid_toggle = !(usbc_hctsiz.s.pid == 0);

drivers/usb/host/octeon-hcd.c

2768

if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&

drivers/usb/host/octeon-hcd.c

2769

(pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&

drivers/usb/host/octeon-hcd.c

2770

(pipe->transfer_dir == CVMX_USB_DIRECTION_OUT))

drivers/usb/host/octeon-hcd.c

2771

pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING;

drivers/usb/host/octeon-hcd.c

2779

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2791

pipe->pid_toggle = 0;

drivers/usb/host/octeon-hcd.c

2792

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2800

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2804

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2808

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2817

if (!cvmx_usb_pipe_needs_split(usb, pipe)) {

drivers/usb/host/octeon-hcd.c

2824

(bytes_in_last_packet < pipe->max_packet))

drivers/usb/host/octeon-hcd.c

2825

cvmx_usb_complete(usb, pipe,

drivers/usb/host/octeon-hcd.c

2841

pipe->split_sc_frame = -1;

drivers/usb/host/octeon-hcd.c

2857

pipe->flags &= ~CVMX_USB_PIPE_FLAGS_NEED_PING;

drivers/usb/host/octeon-hcd.c

2861

cvmx_usb_transfer_control(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2867

cvmx_usb_transfer_bulk(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2872

cvmx_usb_transfer_intr(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2877

cvmx_usb_transfer_isoc(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

2897

pipe->next_tx_frame += pipe->interval;

drivers/usb/host/octeon-hcd.c

2898

if (pipe->next_tx_frame < usb->frame_number)

drivers/usb/host/octeon-hcd.c

2899

pipe->next_tx_frame = usb->frame_number +

drivers/usb/host/octeon-hcd.c

2900

pipe->interval -

drivers/usb/host/octeon-hcd.c

2901

(usb->frame_number - pipe->next_tx_frame) %

drivers/usb/host/octeon-hcd.c

2902

pipe->interval;

drivers/usb/host/octeon-hcd.c

2915

cvmx_usb_complete(usb, pipe, transaction,

drivers/usb/host/octeon-hcd.c

3074

struct cvmx_usb_pipe *pipe;

drivers/usb/host/octeon-hcd.c

3095

switch (usb_pipetype(urb->pipe)) {

drivers/usb/host/octeon-hcd.c

3151

pipe = cvmx_usb_open_pipe(usb, usb_pipedevice(urb->pipe),

drivers/usb/host/octeon-hcd.c

3152

usb_pipeendpoint(urb->pipe), speed,

drivers/usb/host/octeon-hcd.c

3156

usb_pipein(urb->pipe) ?

drivers/usb/host/octeon-hcd.c

3163

if (!pipe) {

drivers/usb/host/octeon-hcd.c

3169

ep->hcpriv = pipe;

drivers/usb/host/octeon-hcd.c

3171

pipe = ep->hcpriv;

drivers/usb/host/octeon-hcd.c

3174

switch (usb_pipetype(urb->pipe)) {

drivers/usb/host/octeon-hcd.c

3177

usb_pipedevice(urb->pipe),

drivers/usb/host/octeon-hcd.c

3178

usb_pipeendpoint(urb->pipe));

drivers/usb/host/octeon-hcd.c

3202

pipe, urb);

drivers/usb/host/octeon-hcd.c

3215

usb_pipedevice(urb->pipe),

drivers/usb/host/octeon-hcd.c

3216

usb_pipeendpoint(urb->pipe));

drivers/usb/host/octeon-hcd.c

3217

transaction = cvmx_usb_submit_interrupt(usb, pipe, urb);

drivers/usb/host/octeon-hcd.c

3221

usb_pipedevice(urb->pipe),

drivers/usb/host/octeon-hcd.c

3222

usb_pipeendpoint(urb->pipe));

drivers/usb/host/octeon-hcd.c

3223

transaction = cvmx_usb_submit_control(usb, pipe, urb);

drivers/usb/host/octeon-hcd.c

3227

usb_pipedevice(urb->pipe),

drivers/usb/host/octeon-hcd.c

3228

usb_pipeendpoint(urb->pipe));

drivers/usb/host/octeon-hcd.c

3229

transaction = cvmx_usb_submit_bulk(usb, pipe, urb);

drivers/usb/host/octeon-hcd.c

3276

struct cvmx_usb_pipe *pipe = ep->hcpriv;

drivers/usb/host/octeon-hcd.c

3280

cvmx_usb_cancel_all(usb, pipe);

drivers/usb/host/octeon-hcd.c

3281

if (cvmx_usb_close_pipe(usb, pipe))

drivers/usb/host/octeon-hcd.c

3282

dev_dbg(dev, "Closing pipe %p failed\n", pipe);

drivers/usb/host/octeon-hcd.c

469

if (usb_pipeisoc(urb->pipe))

drivers/usb/host/octeon-hcd.c

555

struct cvmx_usb_pipe *pipe)

drivers/usb/host/octeon-hcd.c

557

return pipe->device_speed != CVMX_USB_SPEED_HIGH &&

drivers/usb/host/octeon-hcd.c

568

static inline int cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe)

drivers/usb/host/octeon-hcd.c

570

if (pipe->pid_toggle)

drivers/usb/host/ohci-dbg.c

20

#define pipestring(pipe) edstring(usb_pipetype(pipe))

drivers/usb/host/ohci-hcd.c

155

unsigned int pipe = urb->pipe;

drivers/usb/host/ohci-hcd.c

161

ed = ed_get(ohci, urb->ep, urb->dev, pipe, urb->interval);

drivers/usb/host/ohci-hcd.c

184

% usb_maxpacket(urb->dev, pipe)) == 0)

drivers/usb/host/ohci-q.c

404

unsigned int pipe,

drivers/usb/host/ohci-q.c

442

info = usb_pipedevice (pipe);

drivers/usb/host/ohci-q.c

443

ed->type = usb_pipetype(pipe);

drivers/usb/host/ohci-q.c

57

switch (usb_pipetype (urb->pipe)) {

drivers/usb/host/ohci-q.c

601

int is_out = usb_pipeout (urb->pipe);

drivers/usb/host/ohci-q.c

610

if (!usb_gettoggle (urb->dev, usb_pipeendpoint (urb->pipe), is_out)) {

drivers/usb/host/ohci-q.c

611

usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe),

drivers/usb/host/ohci-q.c

777

if (usb_pipeout (urb->pipe))

drivers/usb/host/ohci-q.c

799

int type = usb_pipetype (urb->pipe);

drivers/usb/host/ohci-q.c

884

if (usb_pipecontrol (urb->pipe))

drivers/usb/host/ohci-q.c

891

usb_pipeendpoint (urb->pipe),

drivers/usb/host/ohci-q.c

892

usb_pipein (urb->pipe) ? "in" : "out",

drivers/usb/host/oxu210hp-hcd.c

1306

usb_pipeendpoint(urb->pipe),

drivers/usb/host/oxu210hp-hcd.c

1307

usb_pipein(urb->pipe) ? "in" : "out");

drivers/usb/host/oxu210hp-hcd.c

1317

usb_pipedevice(urb->pipe),

drivers/usb/host/oxu210hp-hcd.c

1318

usb_pipeendpoint(urb->pipe),

drivers/usb/host/oxu210hp-hcd.c

1319

usb_pipein(urb->pipe) ? "in" : "out",

drivers/usb/host/oxu210hp-hcd.c

1359

usb_pipeendpoint(urb->pipe),

drivers/usb/host/oxu210hp-hcd.c

1360

usb_pipein(urb->pipe) ? "in" : "out",

drivers/usb/host/oxu210hp-hcd.c

1506

if ((usb_pipein(qtd->urb->pipe)) &&

drivers/usb/host/oxu210hp-hcd.c

1510

&& usb_pipecontrol(urb->pipe);

drivers/usb/host/oxu210hp-hcd.c

1616

is_input = usb_pipein(urb->pipe);

drivers/usb/host/oxu210hp-hcd.c

1620

if (usb_pipecontrol(urb->pipe)) {

drivers/usb/host/oxu210hp-hcd.c

1664

maxpacket = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/host/oxu210hp-hcd.c

1707

|| usb_pipecontrol(urb->pipe)))

drivers/usb/host/oxu210hp-hcd.c

1717

if (usb_pipecontrol(urb->pipe)) {

drivers/usb/host/oxu210hp-hcd.c

1721

} else if (usb_pipebulk(urb->pipe)

drivers/usb/host/oxu210hp-hcd.c

1770

info1 |= usb_pipeendpoint(urb->pipe) << 8;

drivers/usb/host/oxu210hp-hcd.c

1771

info1 |= usb_pipedevice(urb->pipe) << 0;

drivers/usb/host/oxu210hp-hcd.c

1773

is_input = usb_pipein(urb->pipe);

drivers/usb/host/oxu210hp-hcd.c

1774

type = usb_pipetype(urb->pipe);

drivers/usb/host/oxu210hp-hcd.c

1775

maxp = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/host/oxu210hp-hcd.c

1885

usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);

drivers/usb/host/oxu210hp-hcd.c

1963

if (usb_pipedevice(urb->pipe) == 0)

drivers/usb/host/oxu210hp-hcd.c

3217

switch (usb_pipetype(urb->pipe)) {

drivers/usb/host/oxu210hp-hcd.c

3251

if (!usb_pipebulk(urb->pipe))

drivers/usb/host/oxu210hp-hcd.c

3339

switch (usb_pipetype(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1088

if (usb_pipecontrol(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1093

r8a66597_pipe_toggle(r8a66597, td->pipe, 1);

drivers/usb/host/r8a66597-hcd.c

1097

pipe_start(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1103

pipe_stop(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1106

if (td->pipe->pipetre) {

drivers/usb/host/r8a66597-hcd.c

1108

td->pipe->pipetre);

drivers/usb/host/r8a66597-hcd.c

1113

td->pipe->pipetrn);

drivers/usb/host/r8a66597-hcd.c

1115

td->pipe->pipetre);

drivers/usb/host/r8a66597-hcd.c

1118

pipe_start(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1131

if (usb_pipecontrol(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1132

pipe_stop(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1137

r8a66597_pipe_toggle(r8a66597, td->pipe, 1);

drivers/usb/host/r8a66597-hcd.c

1143

if (td->pipe->pipetre)

drivers/usb/host/r8a66597-hcd.c

1144

r8a66597_bclr(r8a66597, TRENB, td->pipe->pipetre);

drivers/usb/host/r8a66597-hcd.c

1148

fifo_change_from_pipe(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1149

tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);

drivers/usb/host/r8a66597-hcd.c

1154

pipe_start(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1163

r8a66597_pipe_toggle(r8a66597, td->pipe, 1);

drivers/usb/host/r8a66597-hcd.c

1164

pipe_stop(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1181

pipe_start(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1228

if (usb_pipeisoc(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1249

!usb_pipecontrol(td->urb->pipe) && usb_pipein(td->urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1251

switch (usb_pipetype(td->urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1280

pipe_toggle_save(r8a66597, td->pipe, urb);

drivers/usb/host/r8a66597-hcd.c

1289

if (usb_pipeisoc(urb->pipe))

drivers/usb/host/r8a66597-hcd.c

1319

fifo_change_from_pipe(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1320

tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);

drivers/usb/host/r8a66597-hcd.c

1322

pipe_stop(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1331

if (usb_pipeisoc(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1355

if (usb_pipeisoc(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1364

pipe_stop(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1372

r8a66597_write(r8a66597, BCLR, td->pipe->fifoctr);

drivers/usb/host/r8a66597-hcd.c

1374

r8a66597_read_fifo(r8a66597, td->pipe->fifoaddr,

drivers/usb/host/r8a66597-hcd.c

1394

fifo_change_from_pipe(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1395

tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);

drivers/usb/host/r8a66597-hcd.c

1397

pipe_stop(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1406

if (usb_pipeisoc(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1421

r8a66597_write_fifo(r8a66597, td->pipe, buf, size);

drivers/usb/host/r8a66597-hcd.c

1422

if (!usb_pipebulk(urb->pipe) || td->maxpacket != size)

drivers/usb/host/r8a66597-hcd.c

1423

r8a66597_write(r8a66597, BVAL, td->pipe->fifoctr);

drivers/usb/host/r8a66597-hcd.c

1428

if (usb_pipeisoc(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

1438

if (!usb_pipeisoc(urb->pipe))

drivers/usb/host/r8a66597-hcd.c

1464

else if (usb_pipeout(urb->pipe))

drivers/usb/host/r8a66597-hcd.c

1485

u16 pid = r8a66597_read(r8a66597, td->pipe->pipectr) & PID;

drivers/usb/host/r8a66597-hcd.c

1556

tmp = r8a66597_read(r8a66597, td->pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

1594

pipe_stop(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1753

struct r8a66597_pipe *pipe;

drivers/usb/host/r8a66597-hcd.c

1773

pipe = td->pipe;

drivers/usb/host/r8a66597-hcd.c

1774

pipe_stop(r8a66597, pipe);

drivers/usb/host/r8a66597-hcd.c

1787

td->pipe->info.epnum == new_td->pipe->info.epnum);

drivers/usb/host/r8a66597-hcd.c

1842

unsigned int usb_address = usb_pipedevice(urb->pipe);

drivers/usb/host/r8a66597-hcd.c

1868

td->pipe = hep->hcpriv;

drivers/usb/host/r8a66597-hcd.c

1871

td->maxpacket = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/host/r8a66597-hcd.c

1872

if (usb_pipecontrol(urb->pipe))

drivers/usb/host/r8a66597-hcd.c

1874

else if (usb_pipein(urb->pipe))

drivers/usb/host/r8a66597-hcd.c

1910

if (usb_pipeendpoint(urb->pipe))

drivers/usb/host/r8a66597-hcd.c

1929

if (td->pipe->info.timer_interval) {

drivers/usb/host/r8a66597-hcd.c

1933

td->pipe->info.timer_interval));

drivers/usb/host/r8a66597-hcd.c

1967

pipe_stop(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

1983

struct r8a66597_pipe *pipe = (struct r8a66597_pipe *)hep->hcpriv;

drivers/usb/host/r8a66597-hcd.c

1989

if (pipe == NULL)

drivers/usb/host/r8a66597-hcd.c

1991

pipenum = pipe->info.pipenum;

drivers/usb/host/r8a66597-hcd.c

2001

pipe_stop(r8a66597, pipe);

drivers/usb/host/r8a66597-hcd.c

297

static void set_pipe_reg_addr(struct r8a66597_pipe *pipe, u8 dma_ch)

drivers/usb/host/r8a66597-hcd.c

299

u16 pipenum = pipe->info.pipenum;

drivers/usb/host/r8a66597-hcd.c

307

pipe->fifoaddr = fifoaddr[dma_ch];

drivers/usb/host/r8a66597-hcd.c

308

pipe->fifosel = fifosel[dma_ch];

drivers/usb/host/r8a66597-hcd.c

309

pipe->fifoctr = fifoctr[dma_ch];

drivers/usb/host/r8a66597-hcd.c

312

pipe->pipectr = DCPCTR;

drivers/usb/host/r8a66597-hcd.c

314

pipe->pipectr = get_pipectr_addr(pipenum);

drivers/usb/host/r8a66597-hcd.c

317

pipe->pipetre = get_pipetre_addr(pipenum);

drivers/usb/host/r8a66597-hcd.c

318

pipe->pipetrn = get_pipetrn_addr(pipenum);

drivers/usb/host/r8a66597-hcd.c

320

pipe->pipetre = 0;

drivers/usb/host/r8a66597-hcd.c

321

pipe->pipetrn = 0;

drivers/usb/host/r8a66597-hcd.c

328

if (usb_pipedevice(urb->pipe) == 0)

drivers/usb/host/r8a66597-hcd.c

452

static void pipe_start(struct r8a66597 *r8a66597, struct r8a66597_pipe *pipe)

drivers/usb/host/r8a66597-hcd.c

456

tmp = r8a66597_read(r8a66597, pipe->pipectr) & PID;

drivers/usb/host/r8a66597-hcd.c

457

if ((pipe->info.pipenum != 0) & ((tmp & PID_STALL) != 0)) /* stall? */

drivers/usb/host/r8a66597-hcd.c

458

r8a66597_mdfy(r8a66597, PID_NAK, PID, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

459

r8a66597_mdfy(r8a66597, PID_BUF, PID, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

463

static void pipe_stop(struct r8a66597 *r8a66597, struct r8a66597_pipe *pipe)

drivers/usb/host/r8a66597-hcd.c

467

tmp = r8a66597_read(r8a66597, pipe->pipectr) & PID;

drivers/usb/host/r8a66597-hcd.c

469

r8a66597_mdfy(r8a66597, PID_STALL, PID, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

470

r8a66597_mdfy(r8a66597, PID_NAK, PID, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

471

r8a66597_reg_wait(r8a66597, pipe->pipectr, PBUSY, 0);

drivers/usb/host/r8a66597-hcd.c

476

struct r8a66597_pipe *pipe)

drivers/usb/host/r8a66597-hcd.c

478

if (!pipe || pipe->info.pipenum == 0)

drivers/usb/host/r8a66597-hcd.c

481

pipe_stop(r8a66597, pipe);

drivers/usb/host/r8a66597-hcd.c

482

r8a66597_bset(r8a66597, ACLRM, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

483

r8a66597_read(r8a66597, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

484

r8a66597_read(r8a66597, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

485

r8a66597_read(r8a66597, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

486

r8a66597_bclr(r8a66597, ACLRM, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

491

struct r8a66597_pipe *pipe, int toggle)

drivers/usb/host/r8a66597-hcd.c

494

r8a66597_bset(r8a66597, SQSET, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

496

r8a66597_bset(r8a66597, SQCLR, pipe->pipectr);

drivers/usb/host/r8a66597-hcd.c

518

struct r8a66597_pipe *pipe)

drivers/usb/host/r8a66597-hcd.c

526

r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum, mbw | CURPIPE,

drivers/usb/host/r8a66597-hcd.c

527

pipe->fifosel);

drivers/usb/host/r8a66597-hcd.c

528

r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum);

drivers/usb/host/r8a66597-hcd.c

533

struct r8a66597_pipe *pipe = hep->hcpriv;

drivers/usb/host/r8a66597-hcd.c

535

if (usb_pipeendpoint(urb->pipe) == 0)

drivers/usb/host/r8a66597-hcd.c

538

return pipe->info.pipenum;

drivers/usb/host/r8a66597-hcd.c

545

return (usb_pipedevice(urb->pipe) == 0) ? 0 : dev->address;

drivers/usb/host/r8a66597-hcd.c

559

struct r8a66597_pipe *pipe,

drivers/usb/host/r8a66597-hcd.c

563

unsigned char endpoint = usb_pipeendpoint(urb->pipe);

drivers/usb/host/r8a66597-hcd.c

564

unsigned short *toggle = get_toggle_pointer(dev, urb->pipe);

drivers/usb/host/r8a66597-hcd.c

577

struct r8a66597_pipe *pipe,

drivers/usb/host/r8a66597-hcd.c

580

if (r8a66597_read(r8a66597, pipe->pipectr) & SQMON)

drivers/usb/host/r8a66597-hcd.c

581

pipe_toggle_set(r8a66597, pipe, urb, 1);

drivers/usb/host/r8a66597-hcd.c

583

pipe_toggle_set(r8a66597, pipe, urb, 0);

drivers/usb/host/r8a66597-hcd.c

588

struct r8a66597_pipe *pipe,

drivers/usb/host/r8a66597-hcd.c

592

unsigned char endpoint = usb_pipeendpoint(urb->pipe);

drivers/usb/host/r8a66597-hcd.c

593

unsigned short *toggle = get_toggle_pointer(dev, urb->pipe);

drivers/usb/host/r8a66597-hcd.c

598

r8a66597_pipe_toggle(r8a66597, pipe, *toggle & (1 << endpoint));

drivers/usb/host/r8a66597-hcd.c

634

info = &td->pipe->info;

drivers/usb/host/r8a66597-hcd.c

638

if (!usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/host/r8a66597-hcd.c

639

usb_pipeout(urb->pipe)) &&

drivers/usb/host/r8a66597-hcd.c

640

!usb_pipecontrol(urb->pipe)) {

drivers/usb/host/r8a66597-hcd.c

641

r8a66597_pipe_toggle(r8a66597, td->pipe, 0);

drivers/usb/host/r8a66597-hcd.c

642

pipe_toggle_set(r8a66597, td->pipe, urb, 0);

drivers/usb/host/r8a66597-hcd.c

643

clear_all_buffer(r8a66597, td->pipe);

drivers/usb/host/r8a66597-hcd.c

644

usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/host/r8a66597-hcd.c

645

usb_pipeout(urb->pipe), 1);

drivers/usb/host/r8a66597-hcd.c

647

pipe_toggle_restore(r8a66597, td->pipe, urb);

drivers/usb/host/r8a66597-hcd.c

755

struct r8a66597_pipe *pipe,

drivers/usb/host/r8a66597-hcd.c

759

struct r8a66597_pipe_info *info = &pipe->info;

drivers/usb/host/r8a66597-hcd.c

766

if ((pipe->info.pipenum != 0) && (info->type != R8A66597_INT)) {

drivers/usb/host/r8a66597-hcd.c

773

"DMA FIFO\n", usb_pipedevice(urb->pipe),

drivers/usb/host/r8a66597-hcd.c

780

set_pipe_reg_addr(pipe, i);

drivers/usb/host/r8a66597-hcd.c

783

r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum,

drivers/usb/host/r8a66597-hcd.c

784

mbw | CURPIPE, pipe->fifosel);

drivers/usb/host/r8a66597-hcd.c

786

r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE,

drivers/usb/host/r8a66597-hcd.c

787

pipe->info.pipenum);

drivers/usb/host/r8a66597-hcd.c

788

r8a66597_bset(r8a66597, BCLR, pipe->fifoctr);

drivers/usb/host/r8a66597-hcd.c

800

struct r8a66597_pipe *pipe = hep->hcpriv;

drivers/usb/host/r8a66597-hcd.c

804

pipe->info = *info;

drivers/usb/host/r8a66597-hcd.c

805

set_pipe_reg_addr(pipe, R8A66597_PIPE_NO_DMA);

drivers/usb/host/r8a66597-hcd.c

806

r8a66597->pipe_cnt[pipe->info.pipenum]++;

drivers/usb/host/r8a66597-hcd.c

807

dev->pipe_cnt[pipe->info.pipenum]++;

drivers/usb/host/r8a66597-hcd.c

809

enable_r8a66597_pipe_dma(r8a66597, dev, pipe, urb);

drivers/usb/host/r8a66597-hcd.c

817

if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {

drivers/usb/host/r8a66597-hcd.c

918

if (usb_pipeisoc(urb->pipe))

drivers/usb/host/r8a66597-hcd.c

972

if (pipenum == 0 && usb_pipeout(urb->pipe))

drivers/usb/host/r8a66597-hcd.c

977

if (!usb_pipeisoc(urb->pipe))

drivers/usb/host/r8a66597.h

209

struct r8a66597_pipe *pipe, u16 *buf,

drivers/usb/host/r8a66597.h

212

void __iomem *fifoaddr = r8a66597->reg + pipe->fifoaddr;

drivers/usb/host/r8a66597.h

238

r8a66597_bclr(r8a66597, MBW_16, pipe->fifosel);

drivers/usb/host/r8a66597.h

241

r8a66597_bset(r8a66597, MBW_16, pipe->fifosel);

drivers/usb/host/r8a66597.h

56

struct r8a66597_pipe *pipe;

drivers/usb/host/sl811-hcd.c

156

writeb(usb_pipedevice(urb->pipe), data_reg);

drivers/usb/host/sl811-hcd.c

177

do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);

drivers/usb/host/sl811-hcd.c

184

writeb(usb_pipedevice(urb->pipe), data_reg);

drivers/usb/host/sl811-hcd.c

224

writeb(usb_pipedevice(urb->pipe), data_reg);

drivers/usb/host/sl811-hcd.c

267

writeb(usb_pipedevice(urb->pipe), data_reg);

drivers/usb/host/sl811-hcd.c

430

if (usb_pipecontrol(urb->pipe))

drivers/usb/host/sl811-hcd.c

512

if (usb_pipecontrol(urb->pipe))

drivers/usb/host/sl811-hcd.c

542

if (usb_pipecontrol(urb->pipe))

drivers/usb/host/sl811-hcd.c

552

else if (usb_pipeout(urb->pipe)) {

drivers/usb/host/sl811-hcd.c

800

unsigned int pipe = urb->pipe;

drivers/usb/host/sl811-hcd.c

801

int is_out = !usb_pipein(pipe);

drivers/usb/host/sl811-hcd.c

802

int type = usb_pipetype(pipe);

drivers/usb/host/sl811-hcd.c

803

int epnum = usb_pipeendpoint(pipe);

drivers/usb/host/sl811-hcd.c

848

ep->maxpacket = usb_maxpacket(udev, urb->pipe);

drivers/usb/host/sl811-hcd.c

885

usb_maxpacket(udev, pipe))

drivers/usb/host/uhci-debug.c

112

out += sprintf(out, "Dev=%d ", usb_pipedevice(urbp->urb->pipe));

drivers/usb/host/uhci-debug.c

113

out += sprintf(out, "EP=%x(%s) ", usb_pipeendpoint(urbp->urb->pipe),

drivers/usb/host/uhci-debug.c

114

(usb_pipein(urbp->urb->pipe) ? "IN" : "OUT"));

drivers/usb/host/uhci-debug.c

118

switch (usb_pipetype(urbp->urb->pipe)) {

drivers/usb/host/uhci-hcd.h

9

#define usb_packetid(pipe) (usb_pipein(pipe) ? USB_PID_IN : USB_PID_OUT)

drivers/usb/host/uhci-q.c

1008

usb_pipeout(urb->pipe) && len == 0 &&

drivers/usb/host/uhci-q.c

1046

usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/host/uhci-q.c

1047

usb_pipeout(urb->pipe), toggle);

drivers/usb/host/uhci-q.c

1334

destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);

drivers/usb/host/uhci-q.c

1390

usb_pipeout(urb->pipe));

drivers/usb/host/uhci-q.c

1547

usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/host/uhci-q.c

1548

usb_pipeout(urb->pipe), qh->initial_toggle);

drivers/usb/host/uhci-q.c

378

unsigned int pipe;

drivers/usb/host/uhci-q.c

415

pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;

drivers/usb/host/uhci-q.c

416

usb_settoggle(qh->udev, usb_pipeendpoint(pipe),

drivers/usb/host/uhci-q.c

417

usb_pipeout(pipe), toggle);

drivers/usb/host/uhci-q.c

802

destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;

drivers/usb/host/uhci-q.c

826

if (usb_pipeout(urb->pipe) || len == 0)

drivers/usb/host/uhci-q.c

934

destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);

drivers/usb/host/uhci-q.c

935

toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),

drivers/usb/host/uhci-q.c

936

usb_pipeout(urb->pipe));

drivers/usb/host/uhci-q.c

942

if (usb_pipein(urb->pipe))

drivers/usb/host/xen-hcd.c

617

static __u32 pipe;

drivers/usb/host/xen-hcd.c

619

pipe = usb_pipedevice(urb_pipe) << XENUSB_PIPE_DEV_SHIFT;

drivers/usb/host/xen-hcd.c

620

pipe |= usb_pipeendpoint(urb_pipe) << XENUSB_PIPE_EP_SHIFT;

drivers/usb/host/xen-hcd.c

622

pipe |= XENUSB_PIPE_DIR;

drivers/usb/host/xen-hcd.c

625

pipe |= XENUSB_PIPE_TYPE_ISOC << XENUSB_PIPE_TYPE_SHIFT;

drivers/usb/host/xen-hcd.c

628

pipe |= XENUSB_PIPE_TYPE_INT << XENUSB_PIPE_TYPE_SHIFT;

drivers/usb/host/xen-hcd.c

631

pipe |= XENUSB_PIPE_TYPE_CTRL << XENUSB_PIPE_TYPE_SHIFT;

drivers/usb/host/xen-hcd.c

634

pipe |= XENUSB_PIPE_TYPE_BULK << XENUSB_PIPE_TYPE_SHIFT;

drivers/usb/host/xen-hcd.c

637

pipe = xenusb_setportnum_pipe(pipe, port);

drivers/usb/host/xen-hcd.c

639

return pipe;

drivers/usb/host/xen-hcd.c

654

if (usb_pipeisoc(urb->pipe))

drivers/usb/host/xen-hcd.c

674

usb_pipein(urb->pipe) ? 0 : GTF_readonly);

drivers/usb/host/xen-hcd.c

677

req->pipe = xenhcd_pipe_urb_to_xenusb(urb->pipe, urb->dev->portnum);

drivers/usb/host/xen-hcd.c

684

switch (usb_pipetype(urb->pipe)) {

drivers/usb/host/xen-hcd.c

730

if (xenusb_pipeisoc(shadow->req.pipe))

drivers/usb/host/xen-hcd.c

794

req->pipe = xenusb_setunlink_pipe(xenhcd_pipe_urb_to_xenusb(

drivers/usb/host/xen-hcd.c

795

urb->pipe, urb->dev->portnum));

drivers/usb/host/xen-hcd.c

983

if (likely(xenusb_pipesubmit(info->shadow[id].req.pipe))) {

drivers/usb/host/xhci-ring.c

2173

if (td->urb->dev->tt && !usb_pipeint(td->urb->pipe) &&

drivers/usb/host/xhci-ring.c

832

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/host/xhci-ring.c

919

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)

drivers/usb/host/xhci-trace.h

249

__field(unsigned int, pipe)

drivers/usb/host/xhci-trace.h

265

__entry->pipe = urb->pipe;

drivers/usb/host/xhci-trace.h

286

__entry->urb, __entry->pipe, __entry->slot_id,

drivers/usb/image/microtek.c

366

int pipe,

drivers/usb/image/microtek.c

380

pipe,

drivers/usb/image/microtek.c

524

int pipe;

drivers/usb/image/microtek.c

547

) { pipe = usb_rcvbulkpipe(desc->usb_dev,desc->ep_image);

drivers/usb/image/microtek.c

551

pipe = usb_rcvbulkpipe(desc->usb_dev,desc->ep_response);

drivers/usb/image/microtek.c

557

pipe = usb_sndbulkpipe(desc->usb_dev,desc->ep_out);

drivers/usb/image/microtek.c

559

desc->context.data_pipe = pipe;

drivers/usb/isp1760/isp1760-hcd.c

1049

return (usb_pipebulk(qtd->urb->pipe) &&

drivers/usb/isp1760/isp1760-hcd.c

1138

qtd_list)->urb->pipe)) {

drivers/usb/isp1760/isp1760-hcd.c

1179

if (usb_pipeint(qtd->urb->pipe))

drivers/usb/isp1760/isp1760-hcd.c

1415

if ((usb_pipeint(qtd->urb->pipe)) &&

drivers/usb/isp1760/isp1760-hcd.c

1793

if (usb_pipein(urb->pipe))

drivers/usb/isp1760/isp1760-hcd.c

1798

if (usb_pipecontrol(urb->pipe)) {

drivers/usb/isp1760/isp1760-hcd.c

1810

maxpacketsize = usb_maxpacket(urb->dev, urb->pipe);

drivers/usb/isp1760/isp1760-hcd.c

1849

if (usb_pipecontrol(urb->pipe)) {

drivers/usb/isp1760/isp1760-hcd.c

1855

} else if (usb_pipebulk(urb->pipe) && maxpacketsize

drivers/usb/isp1760/isp1760-hcd.c

1889

switch (usb_pipetype(urb->pipe)) {

drivers/usb/isp1760/isp1760-hcd.c

1913

if (usb_pipein(urb->pipe))

drivers/usb/isp1760/isp1760-hcd.c

1974

if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe)) {

drivers/usb/isp1760/isp1760-hcd.c

828

maxpacket = usb_maxpacket(qtd->urb->dev, qtd->urb->pipe);

drivers/usb/isp1760/isp1760-hcd.c

836

ptd->dw0 |= TO_DW0_ENDPOINT(usb_pipeendpoint(qtd->urb->pipe));

drivers/usb/isp1760/isp1760-hcd.c

839

ptd->dw1 = TO_DW((usb_pipeendpoint(qtd->urb->pipe) >> 1));

drivers/usb/isp1760/isp1760-hcd.c

840

ptd->dw1 |= TO_DW1_DEVICE_ADDR(usb_pipedevice(qtd->urb->pipe));

drivers/usb/isp1760/isp1760-hcd.c

843

if (usb_pipebulk(qtd->urb->pipe))

drivers/usb/isp1760/isp1760-hcd.c

845

else if (usb_pipeint(qtd->urb->pipe))

drivers/usb/isp1760/isp1760-hcd.c

859

if (usb_pipeint(qtd->urb->pipe) &&

drivers/usb/isp1760/isp1760-hcd.c

867

if (usb_pipecontrol(qtd->urb->pipe) ||

drivers/usb/isp1760/isp1760-hcd.c

868

usb_pipebulk(qtd->urb->pipe))

drivers/usb/isp1760/isp1760-hcd.c

879

if (usb_pipecontrol(qtd->urb->pipe)) {

drivers/usb/isp1760/isp1760-hcd.c

961

if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {

drivers/usb/misc/cypress_cy7c63.c

73

unsigned int pipe;

drivers/usb/misc/cypress_cy7c63.c

86

pipe = usb_rcvctrlpipe(dev->udev, 0);

drivers/usb/misc/cypress_cy7c63.c

87

retval = usb_control_msg(dev->udev, pipe, request,

drivers/usb/misc/lvstest.c

399

unsigned int pipe;

drivers/usb/misc/lvstest.c

439

pipe = usb_rcvintpipe(hdev, endpoint->bEndpointAddress);

drivers/usb/misc/lvstest.c

440

maxp = usb_maxpacket(hdev, pipe);

drivers/usb/misc/lvstest.c

441

usb_fill_int_urb(lvs->urb, hdev, pipe, &lvs->buffer[0], maxp,

drivers/usb/misc/sisusbvga/sisusbvga.c

200

unsigned int pipe, void *data, int len, int *actual_length,

drivers/usb/misc/sisusbvga/sisusbvga.c

209

usb_fill_bulk_urb(urb, sisusb->sisusb_dev, pipe, data, len,

drivers/usb/misc/sisusbvga/sisusbvga.c

264

unsigned int pipe, void *data, int len,

drivers/usb/misc/sisusbvga/sisusbvga.c

272

usb_fill_bulk_urb(urb, sisusb->sisusb_dev, pipe, data, len,

drivers/usb/misc/sisusbvga/sisusbvga.c

323

unsigned int pipe;

drivers/usb/misc/sisusbvga/sisusbvga.c

345

pipe = usb_sndbulkpipe(sisusb->sisusb_dev, ep);

drivers/usb/misc/sisusbvga/sisusbvga.c

379

result = sisusb_bulkout_msg(sisusb, index, pipe,

drivers/usb/misc/sisusbvga/sisusbvga.c

442

unsigned int pipe;

drivers/usb/misc/sisusbvga/sisusbvga.c

451

pipe = usb_rcvbulkpipe(sisusb->sisusb_dev, ep);

drivers/usb/misc/sisusbvga/sisusbvga.c

469

result = sisusb_bulkin_msg(sisusb, pipe, buffer, thispass,

drivers/usb/misc/usbio.c

142

unsigned int pipe;

drivers/usb/misc/usbio.c

165

pipe = usb_sndctrlpipe(usbio->udev, usbio->ctrl_pipe);

drivers/usb/misc/usbio.c

167

ret = usb_control_msg(usbio->udev, pipe, 0, request | USB_DIR_OUT, 0, 0,

drivers/usb/misc/usbio.c

180

pipe = usb_rcvctrlpipe(usbio->udev, usbio->ctrl_pipe);

drivers/usb/misc/usbio.c

182

ret = usb_control_msg(usbio->udev, pipe, 0, request | USB_DIR_IN, 0, 0,

drivers/usb/misc/usbtest.c

1228

int pipe = usb_rcvctrlpipe(udev, 0);

drivers/usb/misc/usbtest.c

1300

pipe = usb_sndctrlpipe(udev, 0);

drivers/usb/misc/usbtest.c

1369

urb[i] = u = simple_alloc_urb(udev, pipe, len, 0);

drivers/usb/misc/usbtest.c

1435

static int unlink1(struct usbtest_dev *dev, int pipe, int size, int async)

drivers/usb/misc/usbtest.c

1442

urb = simple_alloc_urb(testdev_to_usbdev(dev), pipe, size, 0);

drivers/usb/misc/usbtest.c

1448

if (usb_pipeout(urb->pipe)) {

drivers/usb/misc/usbtest.c

1473

if (retval == 0 && usb_pipein(urb->pipe))

drivers/usb/misc/usbtest.c

1513

static int unlink_simple(struct usbtest_dev *dev, int pipe, int len)

drivers/usb/misc/usbtest.c

1518

retval = unlink1(dev, pipe, len, 1);

drivers/usb/misc/usbtest.c

1520

retval = unlink1(dev, pipe, len, 0);

drivers/usb/misc/usbtest.c

1554

static int unlink_queued(struct usbtest_dev *dev, int pipe, unsigned num,

drivers/usb/misc/usbtest.c

1582

usb_fill_bulk_urb(ctx.urbs[i], udev, pipe, buf, size,

drivers/usb/misc/usbtest.c

1587

if (usb_pipeout(ctx.urbs[i]->pipe)) {

drivers/usb/misc/usbtest.c

1699

ret = usb_clear_halt(urb->dev, urb->pipe);

drivers/usb/misc/usbtest.c

1708

retval = usb_clear_halt(urb->dev, urb->pipe);

drivers/usb/misc/usbtest.c

1727

retval = usb_clear_halt(urb->dev, urb->pipe);

drivers/usb/misc/usbtest.c

1739

retval = usb_clear_halt(urb->dev, urb->pipe);

drivers/usb/misc/usbtest.c

1767

urb->pipe = dev->in_pipe;

drivers/usb/misc/usbtest.c

1775

urb->pipe = dev->out_pipe;

drivers/usb/misc/usbtest.c

1803

urb->pipe = dev->out_pipe;

drivers/usb/misc/usbtest.c

1976

int pipe,

drivers/usb/misc/usbtest.c

1990

maxp *= ss_isoc_get_packet_num(udev, pipe);

drivers/usb/misc/usbtest.c

2000

urb->pipe = pipe;

drivers/usb/misc/usbtest.c

2019

usb_pipein(urb->pipe) ? GUARD_BYTE : 0,

drivers/usb/misc/usbtest.c

2040

int pipe, struct usb_endpoint_descriptor *desc, unsigned offset)

drivers/usb/misc/usbtest.c

2070

urbs[i] = iso_alloc_urb(udev, pipe, desc,

drivers/usb/misc/usbtest.c

2073

urbs[i] = complicated_alloc_urb(udev, pipe,

drivers/usb/misc/usbtest.c

2089

transaction_num = ss_isoc_get_packet_num(udev, pipe);

drivers/usb/misc/usbtest.c

2161

int pipe,

drivers/usb/misc/usbtest.c

2169

pipe, length, transfer_flags, 1, 0, simple_callback);

drivers/usb/misc/usbtest.c

259

int pipe,

drivers/usb/misc/usbtest.c

273

usb_fill_int_urb(urb, udev, pipe, NULL, bytes, complete_fn,

drivers/usb/misc/usbtest.c

276

usb_fill_bulk_urb(urb, udev, pipe, NULL, bytes, complete_fn,

drivers/usb/misc/usbtest.c

283

if (usb_pipein(pipe))

drivers/usb/misc/usbtest.c

312

usb_pipein(urb->pipe) ? GUARD_BYTE : 0,

drivers/usb/misc/usbtest.c

319

int pipe,

drivers/usb/misc/usbtest.c

323

return usbtest_alloc_urb(udev, pipe, bytes, URB_NO_TRANSFER_DMA_MAP, 0,

drivers/usb/misc/usbtest.c

329

int pipe,

drivers/usb/misc/usbtest.c

333

return usbtest_alloc_urb(udev, pipe, bytes, URB_NO_TRANSFER_DMA_MAP, 0,

drivers/usb/misc/usbtest.c

342

static unsigned get_maxpacket(struct usb_device *udev, int pipe)

drivers/usb/misc/usbtest.c

346

ep = usb_pipe_endpoint(udev, pipe);

drivers/usb/misc/usbtest.c

350

static int ss_isoc_get_packet_num(struct usb_device *udev, int pipe)

drivers/usb/misc/usbtest.c

352

struct usb_host_endpoint *ep = usb_pipe_endpoint(udev, pipe);

drivers/usb/misc/usbtest.c

372

maxpacket = get_maxpacket(urb->dev, urb->pipe);

drivers/usb/misc/usbtest.c

406

unsigned maxpacket = get_maxpacket(urb->dev, urb->pipe);

drivers/usb/misc/usbtest.c

472

if (usb_pipeout(urb->pipe)) {

drivers/usb/misc/usbtest.c

490

if (retval == 0 && usb_pipein(urb->pipe))

drivers/usb/misc/usbtest.c

536

alloc_sglist(int nents, int max, int vary, struct usbtest_dev *dev, int pipe)

drivers/usb/misc/usbtest.c

543

get_maxpacket(interface_to_usbdev(dev->intf), pipe);

drivers/usb/misc/usbtest.c

603

int pipe,

drivers/usb/misc/usbtest.c

618

retval = usb_sg_init(req, udev, pipe,

drivers/usb/musb/musb_host.c

1148

if (usb_pipeout(urb->pipe)

drivers/usb/musb/musb_host.c

1197

int pipe;

drivers/usb/musb/musb_host.c

1220

pipe = urb->pipe;

drivers/usb/musb/musb_host.c

1358

if (!status || dma || usb_pipeisoc(pipe)) {

drivers/usb/musb/musb_host.c

1365

if (usb_pipeisoc(pipe)) {

drivers/usb/musb/musb_host.c

1411

} else if ((usb_pipeisoc(pipe) || transfer_pending) && dma) {

drivers/usb/musb/musb_host.c

1544

int pipe;

drivers/usb/musb/musb_host.c

1547

pipe = urb->pipe;

drivers/usb/musb/musb_host.c

1549

if (usb_pipeisoc(pipe)) {

drivers/usb/musb/musb_host.c

1616

int length, pipe, done;

drivers/usb/musb/musb_host.c

1620

pipe = urb->pipe;

drivers/usb/musb/musb_host.c

1622

if (usb_pipeisoc(pipe)) {

drivers/usb/musb/musb_host.c

1804

if (usb_pipebulk(urb->pipe)

drivers/usb/musb/musb_host.c

2182

ok = (usb_pipein(urb->pipe) && musb->hb_iso_rx)

drivers/usb/musb/musb_host.c

2183

|| (usb_pipeout(urb->pipe) && musb->hb_iso_tx);

drivers/usb/musb/musb_host.c

2198

qh->addr_reg = (u8) usb_pipedevice(urb->pipe);

drivers/usb/musb/musb_host.c

2315

int is_in = usb_pipein(urb->pipe);

drivers/usb/musb/musb_host.c

2368

int is_in = usb_pipein(urb->pipe);

drivers/usb/musb/musb_host.c

2571

if (usb_pipeisoc(urb->pipe))

drivers/usb/musb/musb_host.c

425

int pipe = urb->pipe;

drivers/usb/musb/musb_host.c

435

if (usb_pipeisoc(pipe)) {

drivers/usb/musb/musb_trace.h

180

__field(unsigned int, pipe)

drivers/usb/musb/musb_trace.h

189

__entry->pipe = urb->pipe;

drivers/usb/musb/musb_trace.h

197

usb_pipedevice(__entry->pipe),

drivers/usb/musb/musb_trace.h

198

usb_pipeendpoint(__entry->pipe),

drivers/usb/musb/musb_trace.h

199

usb_pipein(__entry->pipe) ? "in" : "out",

drivers/usb/renesas_usbhs/fifo.c

1000

usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))

drivers/usb/renesas_usbhs/fifo.c

1011

if (usbhs_pipe_is_running(pipe))

drivers/usb/renesas_usbhs/fifo.c

1014

usbhs_pipe_config_change_bfre(pipe, 1);

drivers/usb/renesas_usbhs/fifo.c

1016

ret = usbhsf_fifo_select(pipe, fifo, 0);

drivers/usb/renesas_usbhs/fifo.c

1030

usbhsf_rx_irq_ctrl(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

1039

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

104

static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable);

drivers/usb/renesas_usbhs/fifo.c

1046

usbhs_pipe_config_change_bfre(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

105

static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable);

drivers/usb/renesas_usbhs/fifo.c

1053

struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);

drivers/usb/renesas_usbhs/fifo.c

106

struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)

drivers/usb/renesas_usbhs/fifo.c

1063

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

1064

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

1068

if (usbhs_pipe_is_busy(pipe))

drivers/usb/renesas_usbhs/fifo.c

1071

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/fifo.c

108

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

1082

ret = usbhsf_fifo_select(pipe, fifo, 0);

drivers/usb/renesas_usbhs/fifo.c

109

struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);

drivers/usb/renesas_usbhs/fifo.c

1109

usbhsf_rx_irq_ctrl(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

1119

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

1132

struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);

drivers/usb/renesas_usbhs/fifo.c

1141

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

1142

int maxp = usbhs_pipe_get_maxpacket(pipe);

drivers/usb/renesas_usbhs/fifo.c

1144

usbhsf_dma_stop(pipe, pipe->fifo);

drivers/usb/renesas_usbhs/fifo.c

1146

usbhsf_fifo_unselect(pipe, pipe->fifo);

drivers/usb/renesas_usbhs/fifo.c

115

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/fifo.c

1153

usbhs_pipe_running(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

1156

usbhs_pipe_running(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

1166

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

1168

int maxp = usbhs_pipe_get_maxpacket(pipe);

drivers/usb/renesas_usbhs/fifo.c

118

pkt = __usbhsf_pkt_get(pipe);

drivers/usb/renesas_usbhs/fifo.c

1184

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

1185

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

1186

struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);

drivers/usb/renesas_usbhs/fifo.c

1195

usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));

drivers/usb/renesas_usbhs/fifo.c

1198

usbhsf_fifo_clear(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

1201

usbhs_pipe_running(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

1202

usbhsf_dma_stop(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

1204

usbhsf_fifo_unselect(pipe, pipe->fifo);

drivers/usb/renesas_usbhs/fifo.c

1214

struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);

drivers/usb/renesas_usbhs/fifo.c

129

if (usbhs_pipe_is_dir_in(pipe))

drivers/usb/renesas_usbhs/fifo.c

130

usbhsf_rx_irq_ctrl(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

1319

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/fifo.c

132

usbhsf_tx_irq_ctrl(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

1334

usbhs_for_each_pipe_with_dcp(pipe, priv, i) {

drivers/usb/renesas_usbhs/fifo.c

1338

ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);

drivers/usb/renesas_usbhs/fifo.c

1349

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/fifo.c

135

usbhs_pipe_clear_without_sequence(pipe, 0, 0);

drivers/usb/renesas_usbhs/fifo.c

136

usbhs_pipe_running(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

1364

usbhs_for_each_pipe_with_dcp(pipe, priv, i) {

drivers/usb/renesas_usbhs/fifo.c

1368

ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);

drivers/usb/renesas_usbhs/fifo.c

1380

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

1381

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

1386

ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);

drivers/usb/renesas_usbhs/fifo.c

1389

usbhs_pipe_number(pipe), ret);

drivers/usb/renesas_usbhs/fifo.c

1392

void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/fifo.c

1394

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

1398

if (usbhsf_fifo_select(pipe, fifo, 1) < 0)

drivers/usb/renesas_usbhs/fifo.c

1400

usbhsf_fifo_clear(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

1401

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

1404

if (usbhsf_fifo_select(pipe, fifo, 0) < 0)

drivers/usb/renesas_usbhs/fifo.c

1406

usbhsf_fifo_clear(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

1407

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

142

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

1425

cfifo->pipe = NULL;

drivers/usb/renesas_usbhs/fifo.c

1427

dfifo->pipe = NULL;

drivers/usb/renesas_usbhs/fifo.c

156

static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)

drivers/usb/renesas_usbhs/fifo.c

158

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

169

pkt = __usbhsf_pkt_get(pipe);

drivers/usb/renesas_usbhs/fifo.c

17

#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */

drivers/usb/renesas_usbhs/fifo.c

202

usbhs_pkt_start(pipe);

drivers/usb/renesas_usbhs/fifo.c

208

void usbhs_pkt_start(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/fifo.c

210

usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);

drivers/usb/renesas_usbhs/fifo.c

218

#define usbhsf_irq_callback_ctrl(pipe, status, enable) \

drivers/usb/renesas_usbhs/fifo.c

220

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \

drivers/usb/renesas_usbhs/fifo.c

222

u16 status = (1 << usbhs_pipe_number(pipe)); \

drivers/usb/renesas_usbhs/fifo.c

232

static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)

drivers/usb/renesas_usbhs/fifo.c

243

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/fifo.c

244

usbhsf_irq_empty_ctrl(pipe, enable);

drivers/usb/renesas_usbhs/fifo.c

246

usbhsf_irq_ready_ctrl(pipe, enable);

drivers/usb/renesas_usbhs/fifo.c

249

static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)

drivers/usb/renesas_usbhs/fifo.c

251

usbhsf_irq_ready_ctrl(pipe, enable);

drivers/usb/renesas_usbhs/fifo.c

257

static void usbhsf_send_terminator(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/fifo.c

260

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

275

static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/fifo.c

278

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

281

if (!usbhs_pipe_is_dcp(pipe)) {

drivers/usb/renesas_usbhs/fifo.c

287

if (usbhs_pipe_is_dir_in(pipe))

drivers/usb/renesas_usbhs/fifo.c

288

ret = usbhs_pipe_is_accessible(pipe);

drivers/usb/renesas_usbhs/fifo.c

307

static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/fifo.c

310

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

312

usbhs_pipe_select_fifo(pipe, NULL);

drivers/usb/renesas_usbhs/fifo.c

316

static int usbhsf_fifo_select(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/fifo.c

32

struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);

drivers/usb/renesas_usbhs/fifo.c

320

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

324

u16 base = usbhs_pipe_number(pipe); /* CURPIPE */

drivers/usb/renesas_usbhs/fifo.c

326

if (usbhs_pipe_is_busy(pipe) ||

drivers/usb/renesas_usbhs/fifo.c

330

if (usbhs_pipe_is_dcp(pipe)) {

drivers/usb/renesas_usbhs/fifo.c

334

usbhs_dcp_dir_for_host(pipe, write);

drivers/usb/renesas_usbhs/fifo.c

343

usbhs_pipe_select_fifo(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

359

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

360

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

365

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/fifo.c

367

ret = usbhsf_fifo_select(pipe, fifo, 1);

drivers/usb/renesas_usbhs/fifo.c

373

usbhs_pipe_sequence_data1(pipe); /* DATA1 */

drivers/usb/renesas_usbhs/fifo.c

375

usbhsf_fifo_clear(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

376

usbhsf_send_terminator(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

378

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

380

usbhsf_tx_irq_ctrl(pipe, 1);

drivers/usb/renesas_usbhs/fifo.c

381

usbhs_pipe_enable(pipe);

drivers/usb/renesas_usbhs/fifo.c

388

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

389

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

394

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/fifo.c

396

ret = usbhsf_fifo_select(pipe, fifo, 0);

drivers/usb/renesas_usbhs/fifo.c

402

usbhs_pipe_sequence_data1(pipe); /* DATA1 */

drivers/usb/renesas_usbhs/fifo.c

403

usbhsf_fifo_clear(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

405

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

407

usbhsf_rx_irq_ctrl(pipe, 1);

drivers/usb/renesas_usbhs/fifo.c

408

usbhs_pipe_enable(pipe);

drivers/usb/renesas_usbhs/fifo.c

416

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

419

usbhsf_tx_irq_ctrl(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

421

usbhsf_rx_irq_ctrl(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

444

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

446

usbhs_pipe_sequence_data1(pipe); /* DATA1 */

drivers/usb/renesas_usbhs/fifo.c

45

void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,

drivers/usb/renesas_usbhs/fifo.c

466

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

467

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

470

if (usbhs_pipe_is_busy(pipe))

drivers/usb/renesas_usbhs/fifo.c

479

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/fifo.c

481

usbhs_pipe_sequence_data1(pipe); /* DATA1 */

drivers/usb/renesas_usbhs/fifo.c

483

usbhsf_fifo_select(pipe, fifo, 0);

drivers/usb/renesas_usbhs/fifo.c

484

usbhsf_fifo_clear(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

485

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

50

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

504

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

505

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

510

int maxp = usbhs_pipe_get_maxpacket(pipe);

drivers/usb/renesas_usbhs/fifo.c

515

usbhs_pipe_data_sequence(pipe, pkt->sequence);

drivers/usb/renesas_usbhs/fifo.c

518

usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);

drivers/usb/renesas_usbhs/fifo.c

520

ret = usbhsf_fifo_select(pipe, fifo, 1);

drivers/usb/renesas_usbhs/fifo.c

524

ret = usbhs_pipe_is_accessible(pipe);

drivers/usb/renesas_usbhs/fifo.c

577

usbhsf_send_terminator(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

579

usbhsf_tx_irq_ctrl(pipe, !*is_done);

drivers/usb/renesas_usbhs/fifo.c

580

usbhs_pipe_running(pipe, !*is_done);

drivers/usb/renesas_usbhs/fifo.c

581

usbhs_pipe_enable(pipe);

drivers/usb/renesas_usbhs/fifo.c

584

usbhs_pipe_number(pipe),

drivers/usb/renesas_usbhs/fifo.c

587

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

592

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

598

usbhsf_tx_irq_ctrl(pipe, 1);

drivers/usb/renesas_usbhs/fifo.c

599

usbhs_pipe_running(pipe, 1);

drivers/usb/renesas_usbhs/fifo.c

606

if (usbhs_pipe_is_running(pkt->pipe))

drivers/usb/renesas_usbhs/fifo.c

62

if (!pipe->handler) {

drivers/usb/renesas_usbhs/fifo.c

622

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

623

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

626

if (usbhs_pipe_is_busy(pipe))

drivers/usb/renesas_usbhs/fifo.c

629

if (usbhs_pipe_is_running(pipe))

drivers/usb/renesas_usbhs/fifo.c

635

usbhs_pipe_data_sequence(pipe, pkt->sequence);

drivers/usb/renesas_usbhs/fifo.c

638

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/fifo.c

639

usbhsf_fifo_clear(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

64

pipe->handler = &usbhsf_null_handler;

drivers/usb/renesas_usbhs/fifo.c

641

usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);

drivers/usb/renesas_usbhs/fifo.c

642

usbhs_pipe_enable(pipe);

drivers/usb/renesas_usbhs/fifo.c

643

usbhs_pipe_running(pipe, 1);

drivers/usb/renesas_usbhs/fifo.c

644

usbhsf_rx_irq_ctrl(pipe, 1);

drivers/usb/renesas_usbhs/fifo.c

651

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

652

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

658

int maxp = usbhs_pipe_get_maxpacket(pipe);

drivers/usb/renesas_usbhs/fifo.c

663

ret = usbhsf_fifo_select(pipe, fifo, 0);

drivers/usb/renesas_usbhs/fifo.c

67

list_move_tail(&pkt->node, &pipe->list);

drivers/usb/renesas_usbhs/fifo.c

688

usbhsf_rx_irq_ctrl(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

689

usbhs_pipe_running(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

696

if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/fifo.c

697

usbhs_pipe_disable(pipe); /* disable pipe first */

drivers/usb/renesas_usbhs/fifo.c

708

usbhsf_fifo_clear(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

733

usbhs_pipe_number(pipe),

drivers/usb/renesas_usbhs/fifo.c

737

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

74

pkt->pipe = pipe;

drivers/usb/renesas_usbhs/fifo.c

752

usbhs_dcp_control_transfer_done(pkt->pipe);

drivers/usb/renesas_usbhs/fifo.c

76

pkt->handler = pipe->handler;

drivers/usb/renesas_usbhs/fifo.c

796

static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/fifo.c

800

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

807

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

808

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

810

struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);

drivers/usb/renesas_usbhs/fifo.c

820

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

822

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

829

fifo = usbhs_pipe_to_fifo(pipe);

drivers/usb/renesas_usbhs/fifo.c

834

dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;

drivers/usb/renesas_usbhs/fifo.c

852

fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);

drivers/usb/renesas_usbhs/fifo.c

854

usbhs_pipe_running(pipe, 1);

drivers/usb/renesas_usbhs/fifo.c

855

usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);

drivers/usb/renesas_usbhs/fifo.c

857

usbhsf_dma_start(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

858

usbhs_pipe_enable(pipe);

drivers/usb/renesas_usbhs/fifo.c

864

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

865

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

878

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

879

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

885

if (usbhs_pipe_is_busy(pipe))

drivers/usb/renesas_usbhs/fifo.c

890

usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))

drivers/usb/renesas_usbhs/fifo.c

904

if (usbhs_pipe_is_running(pipe))

drivers/usb/renesas_usbhs/fifo.c

912

ret = usbhsf_fifo_select(pipe, fifo, 0);

drivers/usb/renesas_usbhs/fifo.c

92

struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/fifo.c

921

usbhsf_tx_irq_ctrl(pipe, 0);

drivers/usb/renesas_usbhs/fifo.c

933

usbhsf_fifo_unselect(pipe, fifo);

drivers/usb/renesas_usbhs/fifo.c

94

return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);

drivers/usb/renesas_usbhs/fifo.c

945

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

946

int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);

drivers/usb/renesas_usbhs/fifo.c

957

usbhs_pipe_running(pipe, !*is_done);

drivers/usb/renesas_usbhs/fifo.c

959

usbhsf_dma_stop(pipe, pipe->fifo);

drivers/usb/renesas_usbhs/fifo.c

961

usbhsf_fifo_unselect(pipe, pipe->fifo);

drivers/usb/renesas_usbhs/fifo.c

97

static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/fifo.c

990

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/fifo.c

991

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/fifo.c

995

if (usbhs_pipe_is_busy(pipe))

drivers/usb/renesas_usbhs/fifo.h

100

struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/fifo.h

23

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/fifo.h

47

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/fifo.h

75

void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/fifo.h

94

void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,

drivers/usb/renesas_usbhs/fifo.h

98

struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt);

drivers/usb/renesas_usbhs/fifo.h

99

void usbhs_pkt_start(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

1139

uep->pipe = NULL;

drivers/usb/renesas_usbhs/mod_gadget.c

123

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

127

if (pipe)

drivers/usb/renesas_usbhs/mod_gadget.c

128

dev_dbg(dev, "pipe %d : queue pop\n", usbhs_pipe_number(pipe));

drivers/usb/renesas_usbhs/mod_gadget.c

151

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/mod_gadget.c

152

struct usbhsg_uep *uep = usbhsg_pipe_to_uep(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

169

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

175

usbhs_pkt_push(pipe, pkt, usbhsg_queue_done,

drivers/usb/renesas_usbhs/mod_gadget.c

177

usbhs_pkt_start(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

180

usbhs_pipe_number(pipe),

drivers/usb/renesas_usbhs/mod_gadget.c

192

struct usbhs_pipe *pipe = pkt->pipe;

drivers/usb/renesas_usbhs/mod_gadget.c

196

dir = usbhs_pipe_is_dir_host(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

223

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(dcp);

drivers/usb/renesas_usbhs/mod_gadget.c

225

usbhs_dcp_control_transfer_done(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

235

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

238

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

239

usbhs_pipe_sequence_data0(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

240

usbhs_pipe_enable(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

245

usbhs_pkt_start(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

282

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

284

usbhs_pipe_stall(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

31

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/mod_gadget.c

315

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(dcp);

drivers/usb/renesas_usbhs/mod_gadget.c

344

pipe->handler = &usbhs_fifo_pio_push_handler;

drivers/usb/renesas_usbhs/mod_gadget.c

380

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

383

if (usbhs_pipe_is_stall(pipe))

drivers/usb/renesas_usbhs/mod_gadget.c

408

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/mod_gadget.c

417

pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

418

if (!pipe) {

drivers/usb/renesas_usbhs/mod_gadget.c

481

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(dcp);

drivers/usb/renesas_usbhs/mod_gadget.c

501

pipe->handler = &usbhs_fifo_pio_push_handler;

drivers/usb/renesas_usbhs/mod_gadget.c

504

pipe->handler = &usbhs_fifo_pio_pop_handler;

drivers/usb/renesas_usbhs/mod_gadget.c

507

pipe->handler = &usbhs_ctrl_stage_end_handler;

drivers/usb/renesas_usbhs/mod_gadget.c

511

usbhs_dcp_control_transfer_done(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

546

usbhs_pipe_stall(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

558

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

562

pkt = usbhs_pkt_pop(pipe, NULL);

drivers/usb/renesas_usbhs/mod_gadget.c

569

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

585

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/mod_gadget.c

595

if (uep->pipe) {

drivers/usb/renesas_usbhs/mod_gadget.c

596

usbhs_pipe_clear(uep->pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

597

usbhs_pipe_sequence_data0(uep->pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

602

pipe = usbhs_pipe_malloc(priv,

drivers/usb/renesas_usbhs/mod_gadget.c

605

if (pipe) {

drivers/usb/renesas_usbhs/mod_gadget.c

606

uep->pipe = pipe;

drivers/usb/renesas_usbhs/mod_gadget.c

607

pipe->mod_private = uep;

drivers/usb/renesas_usbhs/mod_gadget.c

610

usbhs_pipe_config_update(pipe, 0,

drivers/usb/renesas_usbhs/mod_gadget.c

620

pipe->handler = &usbhs_fifo_dma_push_handler;

drivers/usb/renesas_usbhs/mod_gadget.c

622

pipe->handler = &usbhs_fifo_dma_pop_handler;

drivers/usb/renesas_usbhs/mod_gadget.c

624

usbhs_pipe_number(pipe));

drivers/usb/renesas_usbhs/mod_gadget.c

639

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/mod_gadget.c

643

pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

644

if (!pipe)

drivers/usb/renesas_usbhs/mod_gadget.c

648

usbhs_pipe_free(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

650

uep->pipe->mod_private = NULL;

drivers/usb/renesas_usbhs/mod_gadget.c

651

uep->pipe = NULL;

drivers/usb/renesas_usbhs/mod_gadget.c

688

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

693

unlikely(!pipe))

drivers/usb/renesas_usbhs/mod_gadget.c

705

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/mod_gadget.c

709

pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

710

if (pipe)

drivers/usb/renesas_usbhs/mod_gadget.c

711

usbhs_pkt_pop(pipe, usbhsg_ureq_to_pkt(ureq));

drivers/usb/renesas_usbhs/mod_gadget.c

726

struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_gadget.c

734

halt, usbhs_pipe_number(pipe));

drivers/usb/renesas_usbhs/mod_gadget.c

745

if (!usbhs_pipe_is_dir_in(pipe) && (__usbhsf_pkt_get(pipe) ||

drivers/usb/renesas_usbhs/mod_gadget.c

746

usbhs_pipe_contains_transmittable_data(pipe))) {

drivers/usb/renesas_usbhs/mod_gadget.c

752

usbhs_pipe_stall(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

754

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/mod_gadget.c

850

dcp->pipe = usbhs_dcp_malloc(priv);

drivers/usb/renesas_usbhs/mod_gadget.c

851

dcp->pipe->mod_private = dcp;

drivers/usb/renesas_usbhs/mod_gadget.c

852

usbhs_pipe_config_update(dcp->pipe, 0, 0, 64);

drivers/usb/renesas_usbhs/mod_gadget.c

99

#define usbhsg_uep_to_pipe(u) ((u)->pipe)

drivers/usb/renesas_usbhs/mod_host.c

1012

if (usb_pipecontrol(urb->pipe))

drivers/usb/renesas_usbhs/mod_host.c

1040

usbhs_pkt_pop(pkt->pipe, pkt);

drivers/usb/renesas_usbhs/mod_host.c

124

#define usbhsh_uep_to_pipe(u) ((u)->pipe)

drivers/usb/renesas_usbhs/mod_host.c

1402

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/mod_host.c

1436

pipe = usbhs_dcp_malloc(priv);

drivers/usb/renesas_usbhs/mod_host.c

1437

usbhsh_hpriv_to_dcp(hpriv) = pipe;

drivers/usb/renesas_usbhs/mod_host.c

1439

pipe = usbhs_pipe_malloc(priv,

drivers/usb/renesas_usbhs/mod_host.c

1444

pipe->mod_private = NULL;

drivers/usb/renesas_usbhs/mod_host.c

208

if (usb_pipecontrol(urb->pipe))

drivers/usb/renesas_usbhs/mod_host.c

237

usb_pipeendpoint(urb->pipe),

drivers/usb/renesas_usbhs/mod_host.c

238

usb_pipeout(urb->pipe));

drivers/usb/renesas_usbhs/mod_host.c

250

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/mod_host.c

254

int dir_in_req = !!usb_pipein(urb->pipe);

drivers/usb/renesas_usbhs/mod_host.c

271

usbhs_for_each_pipe_with_dcp(pipe, priv, i) {

drivers/usb/renesas_usbhs/mod_host.c

274

if (!usbhs_pipe_type_is(pipe, usb_endpoint_type(desc)))

drivers/usb/renesas_usbhs/mod_host.c

279

dir_in = !!usbhs_pipe_is_dir_in(pipe);

drivers/usb/renesas_usbhs/mod_host.c

285

if (usbhsh_pipe_to_uep(pipe))

drivers/usb/renesas_usbhs/mod_host.c

296

usbhsh_uep_to_pipe(uep) = pipe;

drivers/usb/renesas_usbhs/mod_host.c

297

usbhsh_pipe_to_uep(pipe) = uep;

drivers/usb/renesas_usbhs/mod_host.c

299

usbhs_pipe_config_update(pipe,

drivers/usb/renesas_usbhs/mod_host.c

307

usbhs_pipe_name(pipe),

drivers/usb/renesas_usbhs/mod_host.c

328

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/mod_host.c

340

pipe = usbhsh_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_host.c

342

if (unlikely(!pipe)) {

drivers/usb/renesas_usbhs/mod_host.c

350

usbhsh_pipe_to_uep(pipe) = NULL;

drivers/usb/renesas_usbhs/mod_host.c

355

usbhs_pipe_name(pipe));

drivers/usb/renesas_usbhs/mod_host.c

475

if (0 == usb_pipedevice(urb->pipe))

drivers/usb/renesas_usbhs/mod_host.c

503

if (0 != usb_pipedevice(urb->pipe)) {

drivers/usb/renesas_usbhs/mod_host.c

665

struct usbhs_pipe *pipe = usbhsh_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_host.c

671

if (usb_pipeisoc(urb->pipe)) {

drivers/usb/renesas_usbhs/mod_host.c

683

if (usb_pipein(urb->pipe))

drivers/usb/renesas_usbhs/mod_host.c

684

pipe->handler = &usbhs_fifo_dma_pop_handler;

drivers/usb/renesas_usbhs/mod_host.c

686

pipe->handler = &usbhs_fifo_dma_push_handler;

drivers/usb/renesas_usbhs/mod_host.c

692

usb_pipeendpoint(urb->pipe),

drivers/usb/renesas_usbhs/mod_host.c

693

usb_pipeout(urb->pipe));

drivers/usb/renesas_usbhs/mod_host.c

696

usbhs_pkt_push(pipe, &ureq->pkt, usbhsh_queue_done,

drivers/usb/renesas_usbhs/mod_host.c

700

usbhs_pkt_start(pipe);

drivers/usb/renesas_usbhs/mod_host.c

706

struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/mod_host.c

711

pkt = usbhs_pkt_pop(pipe, NULL);

drivers/usb/renesas_usbhs/mod_host.c

75

struct usbhs_pipe *pipe; /* attached pipe */

drivers/usb/renesas_usbhs/mod_host.c

751

struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/mod_host.c

810

struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/mod_host.c

821

if (usb_pipein(urb->pipe))

drivers/usb/renesas_usbhs/mod_host.c

822

pipe->handler = &usbhs_dcp_data_stage_in_handler;

drivers/usb/renesas_usbhs/mod_host.c

824

pipe->handler = &usbhs_dcp_data_stage_out_handler;

drivers/usb/renesas_usbhs/mod_host.c

826

usbhs_pkt_push(pipe, &ureq->pkt,

drivers/usb/renesas_usbhs/mod_host.c

841

struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/mod_host.c

851

if (usb_pipein(urb->pipe))

drivers/usb/renesas_usbhs/mod_host.c

852

pipe->handler = &usbhs_dcp_status_stage_in_handler;

drivers/usb/renesas_usbhs/mod_host.c

854

pipe->handler = &usbhs_dcp_status_stage_out_handler;

drivers/usb/renesas_usbhs/mod_host.c

856

usbhs_pkt_push(pipe, &ureq->pkt,

drivers/usb/renesas_usbhs/mod_host.c

871

struct usbhs_pipe *pipe = usbhsh_uep_to_pipe(uep);

drivers/usb/renesas_usbhs/mod_host.c

882

usbhsh_setup_stage_packet_push(hpriv, urb, pipe);

drivers/usb/renesas_usbhs/mod_host.c

890

ret = usbhsh_data_stage_packet_push(hpriv, urb, pipe, mflags);

drivers/usb/renesas_usbhs/mod_host.c

900

ret = usbhsh_status_stage_packet_push(hpriv, urb, pipe, mflags);

drivers/usb/renesas_usbhs/mod_host.c

909

usbhs_pkt_start(pipe);

drivers/usb/renesas_usbhs/mod_host.c

957

int is_dir_in = usb_pipein(urb->pipe);

drivers/usb/renesas_usbhs/pipe.c

101

static void usbhsp_pipe_cfg_set(struct usbhs_pipe *pipe, u16 mask, u16 val)

drivers/usb/renesas_usbhs/pipe.c

103

__usbhsp_pipe_xxx_set(pipe, DCPCFG, PIPECFG, mask, val);

drivers/usb/renesas_usbhs/pipe.c

106

static u16 usbhsp_pipe_cfg_get(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

108

return __usbhsp_pipe_xxx_get(pipe, DCPCFG, PIPECFG);

drivers/usb/renesas_usbhs/pipe.c

114

static void usbhsp_pipe_trn_set(struct usbhs_pipe *pipe, u16 mask, u16 val)

drivers/usb/renesas_usbhs/pipe.c

116

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

118

int num = usbhs_pipe_number(pipe);

drivers/usb/renesas_usbhs/pipe.c

147

__usbhsp_pipe_xxx_set(pipe, 0, reg, mask, val);

drivers/usb/renesas_usbhs/pipe.c

150

static void usbhsp_pipe_tre_set(struct usbhs_pipe *pipe, u16 mask, u16 val)

drivers/usb/renesas_usbhs/pipe.c

152

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

154

int num = usbhs_pipe_number(pipe);

drivers/usb/renesas_usbhs/pipe.c

184

__usbhsp_pipe_xxx_set(pipe, 0, reg, mask, val);

drivers/usb/renesas_usbhs/pipe.c

190

static void usbhsp_pipe_buf_set(struct usbhs_pipe *pipe, u16 mask, u16 val)

drivers/usb/renesas_usbhs/pipe.c

192

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.c

195

__usbhsp_pipe_xxx_set(pipe, 0, PIPEBUF, mask, val);

drivers/usb/renesas_usbhs/pipe.c

201

static void usbhsp_pipe_maxp_set(struct usbhs_pipe *pipe, u16 mask, u16 val)

drivers/usb/renesas_usbhs/pipe.c

203

__usbhsp_pipe_xxx_set(pipe, DCPMAXP, PIPEMAXP, mask, val);

drivers/usb/renesas_usbhs/pipe.c

209

static void usbhsp_pipe_select(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

211

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

228

usbhs_write(priv, PIPESEL, 0xF & usbhs_pipe_number(pipe));

drivers/usb/renesas_usbhs/pipe.c

231

static int usbhsp_pipe_barrier(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

233

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

256

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/pipe.c

259

if (!(usbhsp_pipectrl_get(pipe) & mask))

drivers/usb/renesas_usbhs/pipe.c

269

int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

273

val = usbhsp_pipectrl_get(pipe);

drivers/usb/renesas_usbhs/pipe.c

280

bool usbhs_pipe_contains_transmittable_data(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

285

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.c

288

val = usbhsp_pipectrl_get(pipe);

drivers/usb/renesas_usbhs/pipe.c

298

static void __usbhsp_pid_try_nak_if_stall(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

300

u16 pid = usbhsp_pipectrl_get(pipe);

drivers/usb/renesas_usbhs/pipe.c

310

usbhsp_pipectrl_set(pipe, PID_MASK, PID_STALL10);

drivers/usb/renesas_usbhs/pipe.c

313

usbhsp_pipectrl_set(pipe, PID_MASK, PID_NAK);

drivers/usb/renesas_usbhs/pipe.c

317

void usbhs_pipe_disable(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

323

__usbhsp_pid_try_nak_if_stall(pipe);

drivers/usb/renesas_usbhs/pipe.c

325

usbhsp_pipectrl_set(pipe, PID_MASK, PID_NAK);

drivers/usb/renesas_usbhs/pipe.c

328

val = usbhsp_pipectrl_get(pipe);

drivers/usb/renesas_usbhs/pipe.c

33

char *usbhs_pipe_name(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

337

void usbhs_pipe_enable(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

340

__usbhsp_pid_try_nak_if_stall(pipe);

drivers/usb/renesas_usbhs/pipe.c

342

usbhsp_pipectrl_set(pipe, PID_MASK, PID_BUF);

drivers/usb/renesas_usbhs/pipe.c

345

void usbhs_pipe_stall(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

347

u16 pid = usbhsp_pipectrl_get(pipe);

drivers/usb/renesas_usbhs/pipe.c

35

return usbhsp_pipe_name[usbhs_pipe_type(pipe)];

drivers/usb/renesas_usbhs/pipe.c

357

usbhsp_pipectrl_set(pipe, PID_MASK, PID_STALL10);

drivers/usb/renesas_usbhs/pipe.c

360

usbhsp_pipectrl_set(pipe, PID_MASK, PID_STALL11);

drivers/usb/renesas_usbhs/pipe.c

365

int usbhs_pipe_is_stall(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

367

u16 pid = usbhsp_pipectrl_get(pipe) & PID_MASK;

drivers/usb/renesas_usbhs/pipe.c

372

void usbhs_pipe_set_trans_count_if_bulk(struct usbhs_pipe *pipe, int len)

drivers/usb/renesas_usbhs/pipe.c

374

if (!usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_BULK))

drivers/usb/renesas_usbhs/pipe.c

380

usbhsp_pipe_tre_set(pipe, TRCLR | TRENB, TRCLR);

drivers/usb/renesas_usbhs/pipe.c

388

if (usbhs_pipe_is_dir_in(pipe)) {

drivers/usb/renesas_usbhs/pipe.c

389

int maxp = usbhs_pipe_get_maxpacket(pipe);

drivers/usb/renesas_usbhs/pipe.c

391

usbhsp_pipe_trn_set(pipe, 0xffff, DIV_ROUND_UP(len, maxp));

drivers/usb/renesas_usbhs/pipe.c

392

usbhsp_pipe_tre_set(pipe, TRENB, TRENB); /* enable */

drivers/usb/renesas_usbhs/pipe.c

400

static int usbhsp_setup_pipecfg(struct usbhs_pipe *pipe, int is_host,

drivers/usb/renesas_usbhs/pipe.c

416

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.c

429

type = type_array[usbhs_pipe_type(pipe)];

drivers/usb/renesas_usbhs/pipe.c

432

if (usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC) ||

drivers/usb/renesas_usbhs/pipe.c

433

usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_BULK))

drivers/usb/renesas_usbhs/pipe.c

439

if (usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_BULK))

drivers/usb/renesas_usbhs/pipe.c

444

usbhsp_flags_set(pipe, IS_DIR_HOST);

drivers/usb/renesas_usbhs/pipe.c

450

usbhsp_flags_set(pipe, IS_DIR_IN);

drivers/usb/renesas_usbhs/pipe.c

453

if (usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_BULK) &&

drivers/usb/renesas_usbhs/pipe.c

469

static u16 usbhsp_setup_pipebuff(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

471

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

473

int pipe_num = usbhs_pipe_number(pipe);

drivers/usb/renesas_usbhs/pipe.c

50

static void usbhsp_pipectrl_set(struct usbhs_pipe *pipe, u16 mask, u16 val)

drivers/usb/renesas_usbhs/pipe.c

502

void usbhs_pipe_config_update(struct usbhs_pipe *pipe, u16 devsel,

drivers/usb/renesas_usbhs/pipe.c

505

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

506

int pipe_num = usbhs_pipe_number(pipe);

drivers/usb/renesas_usbhs/pipe.c

519

usbhsp_pipe_barrier(pipe);

drivers/usb/renesas_usbhs/pipe.c

52

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

521

pipe->maxp = maxp;

drivers/usb/renesas_usbhs/pipe.c

523

usbhsp_pipe_select(pipe);

drivers/usb/renesas_usbhs/pipe.c

524

usbhsp_pipe_maxp_set(pipe, 0xFFFF,

drivers/usb/renesas_usbhs/pipe.c

528

if (!usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.c

529

usbhsp_pipe_cfg_set(pipe, 0x000F | DBLB, epnum | dblb);

drivers/usb/renesas_usbhs/pipe.c

53

int offset = usbhsp_addr_offset(pipe);

drivers/usb/renesas_usbhs/pipe.c

535

int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

542

return pipe->maxp;

drivers/usb/renesas_usbhs/pipe.c

545

int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

547

return usbhsp_flags_has(pipe, IS_DIR_IN);

drivers/usb/renesas_usbhs/pipe.c

55

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.c

550

int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

552

return usbhsp_flags_has(pipe, IS_DIR_HOST);

drivers/usb/renesas_usbhs/pipe.c

555

int usbhs_pipe_is_running(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

557

return usbhsp_flags_has(pipe, IS_RUNNING);

drivers/usb/renesas_usbhs/pipe.c

560

void usbhs_pipe_running(struct usbhs_pipe *pipe, int running)

drivers/usb/renesas_usbhs/pipe.c

563

usbhsp_flags_set(pipe, IS_RUNNING);

drivers/usb/renesas_usbhs/pipe.c

565

usbhsp_flags_clr(pipe, IS_RUNNING);

drivers/usb/renesas_usbhs/pipe.c

568

void usbhs_pipe_data_sequence(struct usbhs_pipe *pipe, int sequence)

drivers/usb/renesas_usbhs/pipe.c

590

usbhsp_pipectrl_set(pipe, mask, val);

drivers/usb/renesas_usbhs/pipe.c

593

static int usbhs_pipe_get_data_sequence(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

595

return !!(usbhsp_pipectrl_get(pipe) & SQMON);

drivers/usb/renesas_usbhs/pipe.c

598

void usbhs_pipe_clear(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

600

if (usbhs_pipe_is_dcp(pipe)) {

drivers/usb/renesas_usbhs/pipe.c

601

usbhs_fifo_clear_dcp(pipe);

drivers/usb/renesas_usbhs/pipe.c

603

usbhsp_pipectrl_set(pipe, ACLRM, ACLRM);

drivers/usb/renesas_usbhs/pipe.c

604

usbhsp_pipectrl_set(pipe, ACLRM, 0);

drivers/usb/renesas_usbhs/pipe.c

609

void usbhs_pipe_clear_without_sequence(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/pipe.c

61

static u16 usbhsp_pipectrl_get(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

614

usbhsp_pipe_select(pipe);

drivers/usb/renesas_usbhs/pipe.c

615

sequence = usbhs_pipe_get_data_sequence(pipe);

drivers/usb/renesas_usbhs/pipe.c

617

usbhsp_pipe_cfg_set(pipe, BFRE, bfre_enable ? BFRE : 0);

drivers/usb/renesas_usbhs/pipe.c

618

usbhs_pipe_clear(pipe);

drivers/usb/renesas_usbhs/pipe.c

619

usbhs_pipe_data_sequence(pipe, sequence);

drivers/usb/renesas_usbhs/pipe.c

622

void usbhs_pipe_config_change_bfre(struct usbhs_pipe *pipe, int enable)

drivers/usb/renesas_usbhs/pipe.c

624

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.c

627

usbhsp_pipe_select(pipe);

drivers/usb/renesas_usbhs/pipe.c

629

if (!(enable ^ !!(usbhsp_pipe_cfg_get(pipe) & BFRE)))

drivers/usb/renesas_usbhs/pipe.c

63

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

632

usbhs_pipe_clear_without_sequence(pipe, 1, enable);

drivers/usb/renesas_usbhs/pipe.c

637

struct usbhs_pipe *pos, *pipe;

drivers/usb/renesas_usbhs/pipe.c

64

int offset = usbhsp_addr_offset(pipe);

drivers/usb/renesas_usbhs/pipe.c

643

pipe = NULL;

drivers/usb/renesas_usbhs/pipe.c

650

pipe = pos;

drivers/usb/renesas_usbhs/pipe.c

654

if (!pipe)

drivers/usb/renesas_usbhs/pipe.c

66

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.c

660

usbhsp_flags_init(pipe);

drivers/usb/renesas_usbhs/pipe.c

661

usbhsp_flags_set(pipe, IS_USED);

drivers/usb/renesas_usbhs/pipe.c

663

return pipe;

drivers/usb/renesas_usbhs/pipe.c

666

static void usbhsp_put_pipe(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

668

usbhsp_flags_init(pipe);

drivers/usb/renesas_usbhs/pipe.c

676

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/pipe.c

679

usbhs_for_each_pipe_with_dcp(pipe, priv, i) {

drivers/usb/renesas_usbhs/pipe.c

680

usbhsp_flags_init(pipe);

drivers/usb/renesas_usbhs/pipe.c

681

pipe->fifo = NULL;

drivers/usb/renesas_usbhs/pipe.c

682

pipe->mod_private = NULL;

drivers/usb/renesas_usbhs/pipe.c

683

INIT_LIST_HEAD(&pipe->list);

drivers/usb/renesas_usbhs/pipe.c

686

usbhs_pipe_clear(pipe);

drivers/usb/renesas_usbhs/pipe.c

697

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/pipe.c

702

pipe = usbhsp_get_pipe(priv, endpoint_type);

drivers/usb/renesas_usbhs/pipe.c

703

if (!pipe) {

drivers/usb/renesas_usbhs/pipe.c

709

INIT_LIST_HEAD(&pipe->list);

drivers/usb/renesas_usbhs/pipe.c

711

usbhs_pipe_disable(pipe);

drivers/usb/renesas_usbhs/pipe.c

714

ret = usbhsp_pipe_barrier(pipe);

drivers/usb/renesas_usbhs/pipe.c

716

usbhsp_put_pipe(pipe);

drivers/usb/renesas_usbhs/pipe.c

717

dev_err(dev, "pipe setup failed %d\n", usbhs_pipe_number(pipe));

drivers/usb/renesas_usbhs/pipe.c

721

if (usbhsp_setup_pipecfg(pipe, is_host, dir_in, &pipecfg)) {

drivers/usb/renesas_usbhs/pipe.c

722

usbhsp_put_pipe(pipe);

drivers/usb/renesas_usbhs/pipe.c

727

pipebuf = usbhsp_setup_pipebuff(pipe);

drivers/usb/renesas_usbhs/pipe.c

729

usbhsp_pipe_select(pipe);

drivers/usb/renesas_usbhs/pipe.c

730

usbhsp_pipe_cfg_set(pipe, 0xFFFF, pipecfg);

drivers/usb/renesas_usbhs/pipe.c

731

usbhsp_pipe_buf_set(pipe, 0xFFFF, pipebuf);

drivers/usb/renesas_usbhs/pipe.c

732

usbhs_pipe_clear(pipe);

drivers/usb/renesas_usbhs/pipe.c

734

usbhs_pipe_sequence_data0(pipe);

drivers/usb/renesas_usbhs/pipe.c

737

usbhs_pipe_number(pipe),

drivers/usb/renesas_usbhs/pipe.c

738

usbhs_pipe_name(pipe),

drivers/usb/renesas_usbhs/pipe.c

739

usbhs_pipe_is_dir_in(pipe) ? "in" : "out");

drivers/usb/renesas_usbhs/pipe.c

746

return pipe;

drivers/usb/renesas_usbhs/pipe.c

749

void usbhs_pipe_free(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

75

static void __usbhsp_pipe_xxx_set(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/pipe.c

751

usbhsp_pipe_select(pipe);

drivers/usb/renesas_usbhs/pipe.c

752

usbhsp_pipe_cfg_set(pipe, 0xFFFF, 0);

drivers/usb/renesas_usbhs/pipe.c

753

usbhsp_put_pipe(pipe);

drivers/usb/renesas_usbhs/pipe.c

756

void usbhs_pipe_select_fifo(struct usbhs_pipe *pipe, struct usbhs_fifo *fifo)

drivers/usb/renesas_usbhs/pipe.c

758

if (pipe->fifo)

drivers/usb/renesas_usbhs/pipe.c

759

pipe->fifo->pipe = NULL;

drivers/usb/renesas_usbhs/pipe.c

761

pipe->fifo = fifo;

drivers/usb/renesas_usbhs/pipe.c

764

fifo->pipe = pipe;

drivers/usb/renesas_usbhs/pipe.c

773

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/pipe.c

775

pipe = usbhsp_get_pipe(priv, USB_ENDPOINT_XFER_CONTROL);

drivers/usb/renesas_usbhs/pipe.c

776

if (!pipe)

drivers/usb/renesas_usbhs/pipe.c

779

INIT_LIST_HEAD(&pipe->list);

drivers/usb/renesas_usbhs/pipe.c

785

return pipe;

drivers/usb/renesas_usbhs/pipe.c

788

void usbhs_dcp_control_transfer_done(struct usbhs_pipe *pipe)

drivers/usb/renesas_usbhs/pipe.c

79

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

790

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

792

WARN_ON(!usbhs_pipe_is_dcp(pipe));

drivers/usb/renesas_usbhs/pipe.c

794

usbhs_pipe_enable(pipe);

drivers/usb/renesas_usbhs/pipe.c

797

usbhsp_pipectrl_set(pipe, CCPL, CCPL);

drivers/usb/renesas_usbhs/pipe.c

800

void usbhs_dcp_dir_for_host(struct usbhs_pipe *pipe, int dir_out)

drivers/usb/renesas_usbhs/pipe.c

802

usbhsp_pipe_cfg_set(pipe, DIR_OUT,

drivers/usb/renesas_usbhs/pipe.c

81

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.c

812

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/pipe.c

825

info->pipe = kzalloc_objs(struct usbhs_pipe, pipe_size);

drivers/usb/renesas_usbhs/pipe.c

826

if (!info->pipe)

drivers/usb/renesas_usbhs/pipe.c

834

usbhs_for_each_pipe_with_dcp(pipe, priv, i) {

drivers/usb/renesas_usbhs/pipe.c

835

pipe->priv = priv;

drivers/usb/renesas_usbhs/pipe.c

837

usbhs_pipe_type(pipe) =

drivers/usb/renesas_usbhs/pipe.c

851

kfree(info->pipe);

drivers/usb/renesas_usbhs/pipe.c

87

static u16 __usbhsp_pipe_xxx_get(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/pipe.c

90

struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

drivers/usb/renesas_usbhs/pipe.c

92

if (usbhs_pipe_is_dcp(pipe))

drivers/usb/renesas_usbhs/pipe.h

102

#define usbhs_pipe_number(p) (int)((p) - (p)->priv->pipe_info.pipe)

drivers/usb/renesas_usbhs/pipe.h

103

#define usbhs_pipe_is_dcp(p) ((p)->priv->pipe_info.pipe == (p))

drivers/usb/renesas_usbhs/pipe.h

114

void usbhs_dcp_control_transfer_done(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

115

void usbhs_dcp_dir_for_host(struct usbhs_pipe *pipe, int dir_out);

drivers/usb/renesas_usbhs/pipe.h

38

struct usbhs_pipe *pipe;

drivers/usb/renesas_usbhs/pipe.h

50

((i) < (info)->size) && ((pos) = (info)->pipe + (i)); \

drivers/usb/renesas_usbhs/pipe.h

67

char *usbhs_pipe_name(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

70

void usbhs_pipe_free(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

73

int usbhs_pipe_is_dir_in(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

74

int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

75

int usbhs_pipe_is_running(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

76

void usbhs_pipe_running(struct usbhs_pipe *pipe, int running);

drivers/usb/renesas_usbhs/pipe.h

81

int usbhs_pipe_get_maxpacket(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

82

void usbhs_pipe_clear(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

83

void usbhs_pipe_clear_without_sequence(struct usbhs_pipe *pipe,

drivers/usb/renesas_usbhs/pipe.h

85

int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

86

bool usbhs_pipe_contains_transmittable_data(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

87

void usbhs_pipe_enable(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

88

void usbhs_pipe_disable(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

89

void usbhs_pipe_stall(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

90

int usbhs_pipe_is_stall(struct usbhs_pipe *pipe);

drivers/usb/renesas_usbhs/pipe.h

91

void usbhs_pipe_set_trans_count_if_bulk(struct usbhs_pipe *pipe, int len);

drivers/usb/renesas_usbhs/pipe.h

92

void usbhs_pipe_select_fifo(struct usbhs_pipe *pipe, struct usbhs_fifo *fifo);

drivers/usb/renesas_usbhs/pipe.h

93

void usbhs_pipe_config_update(struct usbhs_pipe *pipe, u16 devsel,

drivers/usb/renesas_usbhs/pipe.h

95

void usbhs_pipe_config_change_bfre(struct usbhs_pipe *pipe, int enable);

drivers/usb/renesas_usbhs/pipe.h

97

#define usbhs_pipe_sequence_data0(pipe) usbhs_pipe_data_sequence(pipe, 0)

drivers/usb/renesas_usbhs/pipe.h

98

#define usbhs_pipe_sequence_data1(pipe) usbhs_pipe_data_sequence(pipe, 1)

drivers/usb/renesas_usbhs/pipe.h

99

void usbhs_pipe_data_sequence(struct usbhs_pipe *pipe, int data);

drivers/usb/serial/cyberjack.c

139

usb_clear_halt(port->serial->dev, port->write_urb->pipe);

drivers/usb/serial/io_ti.c

1935

usb_clear_halt(dev, port->write_urb->pipe);

drivers/usb/serial/io_ti.c

1936

usb_clear_halt(dev, port->read_urb->pipe);

drivers/usb/serial/iuu_phoenix.c

970

usb_clear_halt(serial->dev, port->write_urb->pipe);

drivers/usb/serial/iuu_phoenix.c

971

usb_clear_halt(serial->dev, port->read_urb->pipe);

drivers/usb/serial/keyspan.c

1125

endpoint = usb_pipeendpoint(urb->pipe);

drivers/usb/serial/keyspan.c

1254

endpoint = usb_pipeendpoint(urb->pipe);

drivers/usb/serial/keyspan.c

1527

usb_clear_halt(urb->dev, urb->pipe);

drivers/usb/serial/keyspan.c

2055

__func__, usb_pipeendpoint(this_urb->pipe));

drivers/usb/serial/keyspan.c

2322

__func__, usb_pipeendpoint(this_urb->pipe), device_port);

drivers/usb/serial/keyspan.c

734

__func__, usb_pipeendpoint(this_urb->pipe), flip);

drivers/usb/serial/keyspan.c

775

endpoint = usb_pipeendpoint(urb->pipe);

drivers/usb/serial/keyspan.c

931

__func__, status, usb_pipeendpoint(urb->pipe));

drivers/usb/serial/mct_u232.c

461

port->read_urb->pipe, retval);

drivers/usb/serial/mct_u232.c

470

port->interrupt_in_urb->pipe, retval);

drivers/usb/serial/metro-usb.c

184

usb_clear_halt(serial->dev, port->interrupt_in_urb->pipe);

drivers/usb/serial/mos7720.c

187

unsigned int pipe = usb_sndctrlpipe(usbdev, 0);

drivers/usb/serial/mos7720.c

192

int status = usb_control_msg(usbdev, pipe, request, requesttype, value,

drivers/usb/serial/mos7720.c

209

unsigned int pipe = usb_rcvctrlpipe(usbdev, 0);

drivers/usb/serial/mos7720.c

223

status = usb_control_msg(usbdev, pipe, request, requesttype, value,

drivers/usb/serial/mos7720.c

859

usb_clear_halt(serial->dev, port->write_urb->pipe);

drivers/usb/serial/mos7720.c

860

usb_clear_halt(serial->dev, port->read_urb->pipe);

drivers/usb/serial/mos7840.c

509

usb_clear_halt(serial->dev, port->write_urb->pipe);

drivers/usb/serial/mos7840.c

510

usb_clear_halt(serial->dev, port->read_urb->pipe);

drivers/usb/serial/opticon.c

142

usb_clear_halt(port->serial->dev, port->read_urb->pipe);

drivers/usb/serial/oti6858.c

507

usb_clear_halt(serial->dev, port->write_urb->pipe);

drivers/usb/serial/oti6858.c

508

usb_clear_halt(serial->dev, port->read_urb->pipe);

drivers/usb/serial/pl2303.c

1000

usb_clear_halt(serial->dev, port->write_urb->pipe);

drivers/usb/serial/pl2303.c

1001

usb_clear_halt(serial->dev, port->read_urb->pipe);

drivers/usb/serial/sierra.c

529

endpoint = usb_pipeendpoint(urb->pipe);

drivers/usb/serial/spcp8x5.c

386

usb_clear_halt(serial->dev, port->write_urb->pipe);

drivers/usb/serial/spcp8x5.c

387

usb_clear_halt(serial->dev, port->read_urb->pipe);

drivers/usb/serial/ti_usb_3410_5052.c

1543

static int ti_do_download(struct usb_device *dev, int pipe,

drivers/usb/serial/ti_usb_3410_5052.c

1563

status = usb_bulk_msg(dev, pipe, buffer + pos, len,

drivers/usb/serial/ti_usb_3410_5052.c

1577

unsigned int pipe = usb_sndbulkpipe(dev,

drivers/usb/serial/ti_usb_3410_5052.c

1646

status = ti_do_download(dev, pipe, buffer, fw_p->size);

drivers/usb/serial/ti_usb_3410_5052.c

710

usb_clear_halt(dev, port->write_urb->pipe);

drivers/usb/serial/ti_usb_3410_5052.c

711

usb_clear_halt(dev, port->read_urb->pipe);

drivers/usb/serial/usb_wwan.c

168

usb_pipeendpoint(this_urb->pipe), i);

drivers/usb/serial/usb_wwan.c

222

endpoint = usb_pipeendpoint(urb->pipe);

drivers/usb/serial/whiteheat.c

218

int pipe;

drivers/usb/serial/whiteheat.c

226

pipe = usb_sndbulkpipe(serial->dev,

drivers/usb/serial/whiteheat.c

242

usb_clear_halt(serial->dev, pipe);

drivers/usb/serial/whiteheat.c

243

ret = usb_bulk_msg(serial->dev, pipe, command, 2,

drivers/usb/serial/whiteheat.c

255

pipe = usb_rcvbulkpipe(serial->dev,

drivers/usb/serial/whiteheat.c

258

usb_clear_halt(serial->dev, pipe);

drivers/usb/serial/whiteheat.c

259

ret = usb_bulk_msg(serial->dev, pipe, result,

drivers/usb/serial/whiteheat.c

375

usb_clear_halt(port->serial->dev, port->read_urb->pipe);

drivers/usb/serial/whiteheat.c

376

usb_clear_halt(port->serial->dev, port->write_urb->pipe);

drivers/usb/serial/whiteheat.c

767

usb_clear_halt(serial->dev, command_port->read_urb->pipe);

drivers/usb/storage/ene_ub6250.c

510

unsigned int pipe = fDir;

drivers/usb/storage/ene_ub6250.c

513

pipe = us->recv_bulk_pipe;

drivers/usb/storage/ene_ub6250.c

515

pipe = us->send_bulk_pipe;

drivers/usb/storage/ene_ub6250.c

519

result = usb_stor_bulk_srb(us, pipe, us->srb);

drivers/usb/storage/ene_ub6250.c

521

result = usb_stor_bulk_transfer_sg(us, pipe, buf,

drivers/usb/storage/onetouch.c

170

int pipe, maxp;

drivers/usb/storage/onetouch.c

182

pipe = usb_rcvintpipe(udev, endpoint->bEndpointAddress);

drivers/usb/storage/onetouch.c

183

maxp = usb_maxpacket(udev, pipe);

drivers/usb/storage/onetouch.c

235

usb_fill_int_urb(onetouch->irq, udev, pipe, onetouch->data, maxp,

drivers/usb/storage/realtek_cr.c

234

unsigned int pipe = (dir == DMA_FROM_DEVICE) ?

drivers/usb/storage/realtek_cr.c

236

result = usb_stor_bulk_transfer_buf(us, pipe,

drivers/usb/storage/realtek_cr.c

323

unsigned int pipe = (dir == DMA_FROM_DEVICE) ?

drivers/usb/storage/realtek_cr.c

325

result = usb_stor_bulk_transfer_buf(us, pipe,

drivers/usb/storage/sddr09.c

1721

unsigned int pipe = (srb->sc_data_direction == DMA_TO_DEVICE)

drivers/usb/storage/sddr09.c

1729

result = usb_stor_bulk_srb(us, pipe, srb);

drivers/usb/storage/sddr09.c

294

unsigned int pipe;

drivers/usb/storage/sddr09.c

301

pipe = us->recv_ctrl_pipe;

drivers/usb/storage/sddr09.c

303

pipe = us->send_ctrl_pipe;

drivers/usb/storage/sddr09.c

305

rc = usb_stor_ctrl_transfer(us, pipe, request, requesttype,

drivers/usb/storage/sddr55.c

113

unsigned int pipe = (direction == DMA_FROM_DEVICE) ?

drivers/usb/storage/sddr55.c

119

return usb_stor_bulk_transfer_buf(us, pipe, data, len, NULL);

drivers/usb/storage/shuttle_usbat.c

529

unsigned int pipe = (direction == DMA_FROM_DEVICE) ?

drivers/usb/storage/shuttle_usbat.c

603

pipe, buf, len, use_sg, NULL);

drivers/usb/storage/transport.c

1064

if (pipe)

drivers/usb/storage/transport.c

1065

usb_stor_clear_halt(us, pipe);

drivers/usb/storage/transport.c

1167

unsigned int pipe = srb->sc_data_direction == DMA_FROM_DEVICE ?

drivers/usb/storage/transport.c

1169

result = usb_stor_bulk_srb(us, pipe, srb);

drivers/usb/storage/transport.c

185

int usb_stor_control_msg(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.c

202

usb_fill_control_urb(us->current_urb, us->pusb_dev, pipe,

drivers/usb/storage/transport.c

227

int usb_stor_clear_halt(struct us_data *us, unsigned int pipe)

drivers/usb/storage/transport.c

230

int endp = usb_pipeendpoint(pipe);

drivers/usb/storage/transport.c

232

if (usb_pipein (pipe))

drivers/usb/storage/transport.c

256

static int interpret_urb_result(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.c

279

if (usb_pipecontrol(pipe)) {

drivers/usb/storage/transport.c

286

pipe);

drivers/usb/storage/transport.c

287

if (usb_stor_clear_halt(us, pipe) < 0)

drivers/usb/storage/transport.c

322

int usb_stor_ctrl_transfer(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.c

339

usb_fill_control_urb(us->current_urb, us->pusb_dev, pipe,

drivers/usb/storage/transport.c

344

return interpret_urb_result(us, pipe, size, result,

drivers/usb/storage/transport.c

360

unsigned int pipe = us->recv_intr_pipe;

drivers/usb/storage/transport.c

366

maxp = usb_maxpacket(us->pusb_dev, pipe);

drivers/usb/storage/transport.c

371

usb_fill_int_urb(us->current_urb, us->pusb_dev, pipe, buf,

drivers/usb/storage/transport.c

376

return interpret_urb_result(us, pipe, length, result,

drivers/usb/storage/transport.c

385

int usb_stor_bulk_transfer_buf(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.c

393

usb_fill_bulk_urb(us->current_urb, us->pusb_dev, pipe, buf, length,

drivers/usb/storage/transport.c

400

return interpret_urb_result(us, pipe, length, result,

drivers/usb/storage/transport.c

411

static int usb_stor_bulk_transfer_sglist(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.c

423

result = usb_sg_init(&us->current_sg, us->pusb_dev, pipe, 0,

drivers/usb/storage/transport.c

453

return interpret_urb_result(us, pipe, length, result,

drivers/usb/storage/transport.c

466

int usb_stor_bulk_srb(struct us_data* us, unsigned int pipe,

drivers/usb/storage/transport.c

470

int result = usb_stor_bulk_transfer_sglist(us, pipe, scsi_sglist(srb),

drivers/usb/storage/transport.c

488

int usb_stor_bulk_transfer_sg(struct us_data* us, unsigned int pipe,

drivers/usb/storage/transport.c

497

result = usb_stor_bulk_transfer_sglist(us, pipe,

drivers/usb/storage/transport.c

503

result = usb_stor_bulk_transfer_buf(us, pipe, buf,

drivers/usb/storage/transport.c

960

unsigned int pipe = 0;

drivers/usb/storage/transport.c

992

pipe = srb->sc_data_direction == DMA_FROM_DEVICE ?

drivers/usb/storage/transport.c

994

result = usb_stor_bulk_srb(us, pipe, srb);

drivers/usb/storage/transport.h

72

extern int usb_stor_control_msg(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.h

75

extern int usb_stor_clear_halt(struct us_data *us, unsigned int pipe);

drivers/usb/storage/transport.h

77

extern int usb_stor_ctrl_transfer(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.h

80

extern int usb_stor_bulk_transfer_buf(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.h

82

extern int usb_stor_bulk_transfer_sg(struct us_data *us, unsigned int pipe,

drivers/usb/storage/transport.h

84

extern int usb_stor_bulk_srb(struct us_data* us, unsigned int pipe,

drivers/usb/storage/uas.c

457

unsigned int pipe = (dir == DMA_FROM_DEVICE)

drivers/usb/storage/uas.c

462

usb_fill_bulk_urb(urb, udev, pipe, NULL, sdb->length,

drivers/usb/usbip/stub_rx.c

180

if (usb_pipetype(urb->pipe) != PIPE_CONTROL)

drivers/usb/usbip/stub_rx.c

413

ep = (usb_pipein(urb->pipe) ? dev->ep_in : dev->ep_out)

drivers/usb/usbip/stub_rx.c

414

[usb_pipeendpoint(urb->pipe)];

drivers/usb/usbip/stub_rx.c

475

int pipe = get_pipe(sdev, pdu);

drivers/usb/usbip/stub_rx.c

482

if (pipe == -1)

drivers/usb/usbip/stub_rx.c

544

if (usb_pipeisoc(pipe))

drivers/usb/usbip/stub_rx.c

590

priv->urbs[i]->pipe = pipe;

drivers/usb/usbip/stub_tx.c

184

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)

drivers/usb/usbip/stub_tx.c

186

else if (usb_pipein(urb->pipe) && urb->actual_length > 0 &&

drivers/usb/usbip/stub_tx.c

189

else if (usb_pipein(urb->pipe) && priv->sgl)

drivers/usb/usbip/stub_tx.c

224

if (usb_pipein(urb->pipe) && priv->sgl) {

drivers/usb/usbip/stub_tx.c

238

} else if (usb_pipein(urb->pipe) &&

drivers/usb/usbip/stub_tx.c

239

usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS &&

drivers/usb/usbip/stub_tx.c

262

} else if (usb_pipein(urb->pipe) &&

drivers/usb/usbip/stub_tx.c

263

usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/usbip/stub_tx.c

296

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/usbip/stub_tx.c

63

usb_pipeendpoint(urb->pipe));

drivers/usb/usbip/usbip_common.c

238

dev_dbg(dev, " pipe :%08x ", urb->pipe);

drivers/usb/usbip/usbip_common.c

240

usbip_dump_pipe(urb->pipe);

drivers/usb/usbip/usbip_common.c

248

if (urb->setup_packet && usb_pipetype(urb->pipe) == PIPE_CONTROL)

drivers/usb/usbip/usbip_common.c

670

if (!usb_pipeisoc(urb->pipe))

drivers/usb/usbip/usbip_common.c

734

if (!usb_pipeisoc(urb->pipe))

drivers/usb/usbip/usbip_common.c

773

if (usb_pipein(urb->pipe))

drivers/usb/usbip/usbip_common.c

779

if (usb_pipeout(urb->pipe))

drivers/usb/usbip/vhci_hcd.c

751

if (usb_pipedevice(urb->pipe) == 0) {

drivers/usb/usbip/vhci_hcd.c

753

__u8 type = usb_pipetype(urb->pipe);

drivers/usb/usbip/vhci_tx.c

105

if (!usb_pipein(urb->pipe) && urb->transfer_buffer_length > 0) {

drivers/usb/usbip/vhci_tx.c

123

if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {

drivers/usb/usbip/vhci_tx.c

19

usb_pipedevice(urb->pipe), vdev->devid);

drivers/usb/usbip/vhci_tx.c

24

pdup->base.direction = usb_pipein(urb->pipe) ?

drivers/usb/usbip/vhci_tx.c

26

pdup->base.ep = usb_pipeendpoint(urb->pipe);

drivers/usb/usbip/vhci_tx.c

80

if (urb->num_sgs && usb_pipeout(urb->pipe))

drivers/usb/usbip/vudc_rx.c

154

urb_p->urb->pipe &= ~(PIPE_BULK << 30);

drivers/usb/usbip/vudc_rx.c

157

urb_p->urb->pipe |= (PIPE_BULK << 30);

drivers/usb/usbip/vudc_rx.c

160

urb_p->urb->pipe |= (PIPE_INTERRUPT << 30);

drivers/usb/usbip/vudc_rx.c

163

urb_p->urb->pipe |= (PIPE_CONTROL << 30);

drivers/usb/usbip/vudc_rx.c

166

urb_p->urb->pipe |= (PIPE_ISOCHRONOUS << 30);

drivers/usb/usbip/vudc_rx.c

47

urb->pipe |= pdu->base.direction == USBIP_DIR_IN ?

drivers/usb/usbip/vudc_transfer.c

208

to_host = usb_pipein(urb->pipe);

drivers/usb/usbip/vudc_transfer.c

225

if (urb->pipe & USB_DIR_IN)

drivers/usb/usbip/vudc_tx.c

121

usb_pipein(urb->pipe) && urb->actual_length > 0) {

drivers/usb/usbip/vudc_tx.c

127

usb_pipein(urb->pipe)) {

drivers/watchdog/pcwd_usb.c

606

int pipe;

drivers/watchdog/pcwd_usb.c

641

pipe = usb_rcvintpipe(udev, endpoint->bEndpointAddress);

drivers/watchdog/pcwd_usb.c

671

usb_fill_int_urb(usb_pcwd->intr_urb, udev, pipe,

fs/9p/vfs_file.c

381

struct pipe_inode_info *pipe,

fs/9p/vfs_file.c

390

return copy_splice_read(in, ppos, pipe, len, flags);

fs/9p/vfs_file.c

391

return filemap_splice_read(in, ppos, pipe, len, flags);

fs/afs/file.c

26

struct pipe_inode_info *pipe,

fs/afs/file.c

550

struct pipe_inode_info *pipe,

fs/afs/file.c

563

ret = filemap_splice_read(in, ppos, pipe, len, flags);

fs/autofs/autofs_i.h

119

struct file *pipe;

fs/autofs/autofs_i.h

224

static inline int autofs_check_pipe(struct file *pipe)

fs/autofs/autofs_i.h

226

if (pipe->f_mode & FMODE_PATH)

fs/autofs/autofs_i.h

228

if (!(pipe->f_mode & FMODE_CAN_WRITE))

fs/autofs/autofs_i.h

230

if (!S_ISFIFO(file_inode(pipe)->i_mode))

fs/autofs/autofs_i.h

235

static inline void autofs_set_packet_pipe_flags(struct file *pipe)

fs/autofs/autofs_i.h

238

pipe->f_flags |= O_DIRECT;

fs/autofs/autofs_i.h

240

pipe->f_flags &= ~O_NONBLOCK;

fs/autofs/autofs_i.h

243

static inline int autofs_prepare_pipe(struct file *pipe)

fs/autofs/autofs_i.h

245

int ret = autofs_check_pipe(pipe);

fs/autofs/autofs_i.h

248

autofs_set_packet_pipe_flags(pipe);

fs/autofs/dev-ioctl.c

343

struct file *pipe;

fs/autofs/dev-ioctl.c

353

pipe = fget(pipefd);

fs/autofs/dev-ioctl.c

354

if (!pipe) {

fs/autofs/dev-ioctl.c

358

if (autofs_prepare_pipe(pipe) < 0) {

fs/autofs/dev-ioctl.c

360

fput(pipe);

fs/autofs/dev-ioctl.c

365

sbi->pipe = pipe;

fs/autofs/inode.c

159

struct file *pipe;

fs/autofs/inode.c

164

pipe = param->file;

fs/autofs/inode.c

167

pipe = fget(result->uint_32);

fs/autofs/inode.c

169

if (!pipe) {

fs/autofs/inode.c

174

ret = autofs_check_pipe(pipe);

fs/autofs/inode.c

177

fput(pipe);

fs/autofs/inode.c

181

autofs_set_packet_pipe_flags(pipe);

fs/autofs/inode.c

183

if (sbi->pipe)

fs/autofs/inode.c

184

fput(sbi->pipe);

fs/autofs/inode.c

187

sbi->pipe = pipe;

fs/autofs/inode.c

387

if (sbi->pipe)

fs/autofs/inode.c

388

fput(sbi->pipe);

fs/autofs/inode.c

94

if (sbi->pipe)

fs/autofs/inode.c

95

seq_printf(m, ",pipe_ino=%ld", file_inode(sbi->pipe)->i_ino);

fs/autofs/waitq.c

138

struct user_namespace *user_ns = sbi->pipe->f_cred->user_ns;

fs/autofs/waitq.c

160

pipe = get_file(sbi->pipe);

fs/autofs/waitq.c

164

switch (ret = autofs_write(sbi, pipe, &pkt, pktsz)) {

fs/autofs/waitq.c

176

fput(pipe);

fs/autofs/waitq.c

40

fput(sbi->pipe); /* Close the pipe */

fs/autofs/waitq.c

41

sbi->pipe = NULL;

fs/autofs/waitq.c

88

struct file *pipe = NULL;

fs/backing-file.c

276

struct pipe_inode_info *pipe, size_t len,

fs/backing-file.c

286

ret = vfs_splice_read(in, &iocb->ki_pos, pipe, len, flags);

fs/backing-file.c

295

ssize_t backing_file_splice_write(struct pipe_inode_info *pipe,

fs/backing-file.c

314

ret = out->f_op->splice_write(pipe, out, &iocb->ki_pos, len, flags);

fs/btrfs/file.c

3841

struct pipe_inode_info *pipe,

fs/btrfs/file.c

3847

return filemap_splice_read(in, ppos, pipe, len, flags);

fs/ceph/file.c

2258

struct pipe_inode_info *pipe,

fs/ceph/file.c

2276

return copy_splice_read(in, ppos, pipe, len, flags);

fs/ceph/file.c

2297

return copy_splice_read(in, ppos, pipe, len, flags);

fs/ceph/file.c

2305

ret = filemap_splice_read(in, ppos, pipe, len, flags);

fs/coda/file.c

113

ret = vfs_splice_read(in, ppos, pipe, len, flags);

fs/coda/file.c

98

struct pipe_inode_info *pipe,

fs/coredump.c

589

struct pipe_inode_info *pipe = file->private_data;

fs/coredump.c

591

pipe_lock(pipe);

fs/coredump.c

592

pipe->readers++;

fs/coredump.c

593

pipe->writers--;

fs/coredump.c

594

wake_up_interruptible_sync(&pipe->rd_wait);

fs/coredump.c

595

kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);

fs/coredump.c

596

pipe_unlock(pipe);

fs/coredump.c

602

wait_event_interruptible(pipe->rd_wait, pipe->readers == 1);

fs/coredump.c

604

pipe_lock(pipe);

fs/coredump.c

605

pipe->readers--;

fs/coredump.c

606

pipe->writers++;

fs/coredump.c

607

pipe_unlock(pipe);

fs/ecryptfs/file.c

57

struct pipe_inode_info *pipe,

fs/ecryptfs/file.c

62

rc = filemap_splice_read(in, ppos, pipe, len, flags);

fs/exfat/file.c

754

struct pipe_inode_info *pipe, size_t len, unsigned int flags)

fs/exfat/file.c

759

return filemap_splice_read(in, ppos, pipe, len, flags);

fs/ext4/file.c

152

struct pipe_inode_info *pipe,

fs/ext4/file.c

159

return filemap_splice_read(in, ppos, pipe, len, flags);

fs/f2fs/file.c

4904

struct pipe_inode_info *pipe,

fs/f2fs/file.c

4917

ret = filemap_splice_read(in, ppos, pipe, len, flags);

fs/fuse/dev.c

1006

if (!pipe_buf_try_steal(cs->pipe, buf))

fs/fuse/dev.c

1042

pipe_buf_release(cs->pipe, buf);

fs/fuse/dev.c

1088

if (cs->nr_segs >= cs->pipe->max_usage)

fs/fuse/dev.c

1589

struct pipe_inode_info *pipe,

fs/fuse/dev.c

1601

bufs = kvmalloc_objs(struct pipe_buffer, pipe->max_usage);

fs/fuse/dev.c

1607

cs.pipe = pipe;

fs/fuse/dev.c

1612

if (pipe_buf_usage(pipe) + cs.nr_segs > pipe->max_usage) {

fs/fuse/dev.c

1624

ret = add_to_pipe(pipe, &bufs[page_nr++]);

fs/fuse/dev.c

2291

static ssize_t fuse_dev_splice_write(struct pipe_inode_info *pipe,

fs/fuse/dev.c

2307

pipe_lock(pipe);

fs/fuse/dev.c

2309

head = pipe->head;

fs/fuse/dev.c

2310

tail = pipe->tail;

fs/fuse/dev.c

2315

pipe_unlock(pipe);

fs/fuse/dev.c

2322

rem += pipe_buf(pipe, idx)->len;

fs/fuse/dev.c

2336

ibuf = pipe_buf(pipe, tail);

fs/fuse/dev.c

2343

pipe->tail = tail;

fs/fuse/dev.c

2345

if (!pipe_buf_get(pipe, ibuf))

fs/fuse/dev.c

2357

pipe_unlock(pipe);

fs/fuse/dev.c

2362

cs.pipe = pipe;

fs/fuse/dev.c

2369

pipe_lock(pipe);

fs/fuse/dev.c

2375

pipe_buf_release(pipe, buf);

fs/fuse/dev.c

2377

pipe_unlock(pipe);

fs/fuse/dev.c

885

err = pipe_buf_confirm(cs->pipe, buf);

fs/fuse/dev.c

897

if (cs->nr_segs >= cs->pipe->max_usage)

fs/fuse/dev.c

993

err = pipe_buf_confirm(cs->pipe, buf);

fs/fuse/file.c

1853

struct pipe_inode_info *pipe, size_t len,

fs/fuse/file.c

1860

return fuse_passthrough_splice_read(in, ppos, pipe, len, flags);

fs/fuse/file.c

1862

return filemap_splice_read(in, ppos, pipe, len, flags);

fs/fuse/file.c

1865

static ssize_t fuse_splice_write(struct pipe_inode_info *pipe, struct file *out,

fs/fuse/file.c

1872

return fuse_passthrough_splice_write(pipe, out, ppos, len, flags);

fs/fuse/file.c

1874

return iter_file_splice_write(pipe, out, ppos, len, flags);

fs/fuse/fuse_dev_i.h

29

struct pipe_inode_info *pipe;

fs/fuse/fuse_i.h

1612

struct pipe_inode_info *pipe,

fs/fuse/fuse_i.h

1614

ssize_t fuse_passthrough_splice_write(struct pipe_inode_info *pipe,

fs/fuse/passthrough.c

105

ssize_t fuse_passthrough_splice_write(struct pipe_inode_info *pipe,

fs/fuse/passthrough.c

125

ret = backing_file_splice_write(pipe, backing_file, &iocb, len, flags, &ctx);

fs/fuse/passthrough.c

82

struct pipe_inode_info *pipe,

fs/fuse/passthrough.c

99

ret = backing_file_splice_read(backing_file, &iocb, pipe, len, flags, &ctx);

fs/gfs2/file.c

1417

static ssize_t gfs2_file_splice_write(struct pipe_inode_info *pipe,

fs/gfs2/file.c

1425

ret = iter_file_splice_write(pipe, out, ppos, len, flags);

fs/nfs/blocklayout/rpc_pipefs.c

145

struct rpc_pipe *pipe)

fs/nfs/blocklayout/rpc_pipefs.c

153

err = rpc_mkpipe_dentry(dir, "blocklayout", NULL, pipe);

fs/nfs/blocklayout/rpc_pipefs.c

193

static int nfs4blocklayout_register_net(struct net *net, struct rpc_pipe *pipe)

fs/nfs/blocklayout/rpc_pipefs.c

201

ret = nfs4blocklayout_register_sb(pipefs_sb, pipe);

fs/nfs/blocklayout/rpc_pipefs.c

207

struct rpc_pipe *pipe)

fs/nfs/blocklayout/rpc_pipefs.c

213

rpc_unlink(pipe);

fs/nfs/file.c

189

nfs_file_splice_read(struct file *in, loff_t *ppos, struct pipe_inode_info *pipe,

fs/nfs/file.c

203

result = filemap_splice_read(in, ppos, pipe, len, flags);

fs/nfs/internal.h

427

ssize_t nfs_file_splice_read(struct file *in, loff_t *ppos, struct pipe_inode_info *pipe,

fs/nfs/nfs4idmap.c

445

struct rpc_pipe *pipe;

fs/nfs/nfs4idmap.c

459

pipe = rpc_mkpipe_data(&idmap_upcall_ops, 0);

fs/nfs/nfs4idmap.c

460

if (IS_ERR(pipe)) {

fs/nfs/nfs4idmap.c

461

error = PTR_ERR(pipe);

fs/nfs/nfs4idmap.c

464

idmap->idmap_pipe = pipe;

fs/nfsd/nfs4recover.c

1385

struct rpc_pipe *pipe = cn->cn_pipe;

fs/nfsd/nfs4recover.c

1387

return pipe->nreaders || pipe->nwriters;

fs/nfsd/nfs4recover.c

654

__cld_pipe_upcall(struct rpc_pipe *pipe, void *cmsg, struct nfsd_net *nn)

fs/nfsd/nfs4recover.c

664

ret = rpc_queue_upcall(pipe, &msg);

fs/nfsd/nfs4recover.c

678

cld_pipe_upcall(struct rpc_pipe *pipe, void *cmsg, struct nfsd_net *nn)

fs/nfsd/nfs4recover.c

687

ret = __cld_pipe_upcall(pipe, cmsg, nn);

fs/nfsd/nfs4recover.c

850

nfsd4_cld_register_sb(struct super_block *sb, struct rpc_pipe *pipe)

fs/nfsd/nfs4recover.c

858

err = rpc_mkpipe_dentry(dir, NFSD_CLD_PIPE, NULL, pipe);

fs/nfsd/nfs4recover.c

864

nfsd4_cld_register_net(struct net *net, struct rpc_pipe *pipe)

fs/nfsd/nfs4recover.c

872

err = nfsd4_cld_register_sb(sb, pipe);

fs/nfsd/nfs4recover.c

878

nfsd4_cld_unregister_net(struct net *net, struct rpc_pipe *pipe)

fs/nfsd/nfs4recover.c

884

rpc_unlink(pipe);

fs/nfsd/vfs.c

1003

nfsd_splice_actor(struct pipe_inode_info *pipe, struct pipe_buffer *buf,

fs/nfsd/vfs.c

1031

static int nfsd_direct_splice_actor(struct pipe_inode_info *pipe,

fs/nfsd/vfs.c

1034

return __splice_from_pipe(pipe, sd, nfsd_splice_actor);

fs/ntfs3/file.c

1470

static ssize_t ntfs_file_splice_write(struct pipe_inode_info *pipe,

fs/ntfs3/file.c

1481

return iter_file_splice_write(pipe, file, ppos, len, flags);

fs/ntfs3/file.c

916

struct pipe_inode_info *pipe, size_t len,

fs/ntfs3/file.c

931

return filemap_splice_read(in, ppos, pipe, len, flags);

fs/ocfs2/file.c

2615

struct pipe_inode_info *pipe,

fs/ocfs2/file.c

2645

ret = filemap_splice_read(in, ppos, pipe, len, flags);

fs/orangefs/file.c

341

struct pipe_inode_info *pipe,

fs/orangefs/file.c

354

ret = filemap_splice_read(in, ppos, pipe, len, flags);

fs/overlayfs/file.c

379

struct pipe_inode_info *pipe, size_t len,

fs/overlayfs/file.c

396

ret = backing_file_splice_read(realfile, &iocb, pipe, len, flags, &ctx);

fs/overlayfs/file.c

410

static ssize_t ovl_splice_write(struct pipe_inode_info *pipe, struct file *out,

fs/overlayfs/file.c

433

ret = backing_file_splice_write(pipe, realfile, &iocb, len, flags, &ctx);

fs/pipe.c

1059

SYSCALL_DEFINE1(pipe, int __user *, fildes)

fs/pipe.c

1073

void pipe_wait_readable(struct pipe_inode_info *pipe)

fs/pipe.c

1075

pipe_unlock(pipe);

fs/pipe.c

1076

wait_event_interruptible(pipe->rd_wait, pipe_readable(pipe));

fs/pipe.c

1077

pipe_lock(pipe);

fs/pipe.c

1080

void pipe_wait_writable(struct pipe_inode_info *pipe)

fs/pipe.c

1082

pipe_unlock(pipe);

fs/pipe.c

1083

wait_event_interruptible(pipe->wr_wait, pipe_writable(pipe));

fs/pipe.c

1084

pipe_lock(pipe);

fs/pipe.c

1099

static int wait_for_partner(struct pipe_inode_info *pipe, unsigned int *cnt)

fs/pipe.c

1105

prepare_to_wait(&pipe->rd_wait, &rdwait, TASK_INTERRUPTIBLE);

fs/pipe.c

1106

pipe_unlock(pipe);

fs/pipe.c

1108

finish_wait(&pipe->rd_wait, &rdwait);

fs/pipe.c

1109

pipe_lock(pipe);

fs/pipe.c

1116

static void wake_up_partner(struct pipe_inode_info *pipe)

fs/pipe.c

1118

wake_up_interruptible_all(&pipe->rd_wait);

fs/pipe.c

1124

struct pipe_inode_info *pipe;

fs/pipe.c

1131

pipe = inode->i_pipe;

fs/pipe.c

1132

pipe->files++;

fs/pipe.c

1136

pipe = alloc_pipe_info();

fs/pipe.c

1137

if (!pipe)

fs/pipe.c

1139

pipe->files = 1;

fs/pipe.c

114

static struct page *anon_pipe_get_page(struct pipe_inode_info *pipe)

fs/pipe.c

1144

free_pipe_info(pipe);

fs/pipe.c

1145

pipe = inode->i_pipe;

fs/pipe.c

1147

inode->i_pipe = pipe;

fs/pipe.c

1151

filp->private_data = pipe;

fs/pipe.c

1154

mutex_lock(&pipe->mutex);

fs/pipe.c

116

for (int i = 0; i < ARRAY_SIZE(pipe->tmp_page); i++) {

fs/pipe.c

1166

pipe->r_counter++;

fs/pipe.c

1167

if (pipe->readers++ == 0)

fs/pipe.c

1168

wake_up_partner(pipe);

fs/pipe.c

117

if (pipe->tmp_page[i]) {

fs/pipe.c

1170

if (!is_pipe && !pipe->writers) {

fs/pipe.c

1174

filp->f_pipe = pipe->w_counter;

fs/pipe.c

1176

if (wait_for_partner(pipe, &pipe->w_counter))

fs/pipe.c

118

struct page *page = pipe->tmp_page[i];

fs/pipe.c

1189

if (!is_pipe && (filp->f_flags & O_NONBLOCK) && !pipe->readers)

fs/pipe.c

119

pipe->tmp_page[i] = NULL;

fs/pipe.c

1192

pipe->w_counter++;

fs/pipe.c

1193

if (!pipe->writers++)

fs/pipe.c

1194

wake_up_partner(pipe);

fs/pipe.c

1196

if (!is_pipe && !pipe->readers) {

fs/pipe.c

1197

if (wait_for_partner(pipe, &pipe->r_counter))

fs/pipe.c

1210

pipe->readers++;

fs/pipe.c

1211

pipe->writers++;

fs/pipe.c

1212

pipe->r_counter++;

fs/pipe.c

1213

pipe->w_counter++;

fs/pipe.c

1214

if (pipe->readers == 1 || pipe->writers == 1)

fs/pipe.c

1215

wake_up_partner(pipe);

fs/pipe.c

1224

mutex_unlock(&pipe->mutex);

fs/pipe.c

1228

if (!--pipe->readers)

fs/pipe.c

1229

wake_up_interruptible(&pipe->wr_wait);

fs/pipe.c

1234

if (!--pipe->writers)

fs/pipe.c

1235

wake_up_interruptible_all(&pipe->rd_wait);

fs/pipe.c

1240

mutex_unlock(&pipe->mutex);

fs/pipe.c

1242

put_pipe_info(inode, pipe);

fs/pipe.c

127

static void anon_pipe_put_page(struct pipe_inode_info *pipe,

fs/pipe.c

1291

int pipe_resize_ring(struct pipe_inode_info *pipe, unsigned int nr_slots)

fs/pipe.c

1304

spin_lock_irq(&pipe->rd_wait.lock);

fs/pipe.c

1305

mask = pipe->ring_size - 1;

fs/pipe.c

1306

head = pipe->head;

fs/pipe.c

1307

tail = pipe->tail;

fs/pipe.c

131

for (int i = 0; i < ARRAY_SIZE(pipe->tmp_page); i++) {

fs/pipe.c

1311

spin_unlock_irq(&pipe->rd_wait.lock);

fs/pipe.c

132

if (!pipe->tmp_page[i]) {

fs/pipe.c

1324

memcpy(bufs, pipe->bufs + t,

fs/pipe.c

1327

unsigned int tsize = pipe->ring_size - t;

fs/pipe.c

1329

memcpy(bufs + tsize, pipe->bufs,

fs/pipe.c

133

pipe->tmp_page[i] = page;

fs/pipe.c

1331

memcpy(bufs, pipe->bufs + t,

fs/pipe.c

1339

kfree(pipe->bufs);

fs/pipe.c

1340

pipe->bufs = bufs;

fs/pipe.c

1341

pipe->ring_size = nr_slots;

fs/pipe.c

1342

if (pipe->max_usage > nr_slots)

fs/pipe.c

1343

pipe->max_usage = nr_slots;

fs/pipe.c

1344

pipe->tail = tail;

fs/pipe.c

1345

pipe->head = head;

fs/pipe.c

1347

if (!pipe_has_watch_queue(pipe)) {

fs/pipe.c

1348

pipe->max_usage = nr_slots;

fs/pipe.c

1349

pipe->nr_accounted = nr_slots;

fs/pipe.c

1352

spin_unlock_irq(&pipe->rd_wait.lock);

fs/pipe.c

1355

wake_up_interruptible(&pipe->wr_wait);

fs/pipe.c

1363

static long pipe_set_size(struct pipe_inode_info *pipe, unsigned int arg)

fs/pipe.c

1369

if (pipe_has_watch_queue(pipe))

fs/pipe.c

1385

if (nr_slots > pipe->max_usage &&

fs/pipe.c

1389

user_bufs = account_pipe_buffers(pipe->user, pipe->nr_accounted, nr_slots);

fs/pipe.c

1391

if (nr_slots > pipe->max_usage &&

fs/pipe.c

1399

ret = pipe_resize_ring(pipe, nr_slots);

fs/pipe.c

1403

return pipe->max_usage * PAGE_SIZE;

fs/pipe.c

1406

(void) account_pipe_buffers(pipe->user, nr_slots, pipe->nr_accounted);

fs/pipe.c

1416

struct pipe_inode_info *pipe = file->private_data;

fs/pipe.c

1418

if (!pipe)

fs/pipe.c

142

static void anon_pipe_buf_release(struct pipe_inode_info *pipe,

fs/pipe.c

1422

if (for_splice && pipe_has_watch_queue(pipe))

fs/pipe.c

1424

return pipe;

fs/pipe.c

1429

struct pipe_inode_info *pipe;

fs/pipe.c

1432

pipe = get_pipe_info(file, false);

fs/pipe.c

1433

if (!pipe)

fs/pipe.c

1436

mutex_lock(&pipe->mutex);

fs/pipe.c

1440

ret = pipe_set_size(pipe, arg);

fs/pipe.c

1443

ret = pipe->max_usage * PAGE_SIZE;

fs/pipe.c

1450

mutex_unlock(&pipe->mutex);

fs/pipe.c

147

anon_pipe_put_page(pipe, page);

fs/pipe.c

150

static bool anon_pipe_buf_try_steal(struct pipe_inode_info *pipe,

fs/pipe.c

174

bool generic_pipe_buf_try_steal(struct pipe_inode_info *pipe,

fs/pipe.c

202

bool generic_pipe_buf_get(struct pipe_inode_info *pipe, struct pipe_buffer *buf)

fs/pipe.c

216

void generic_pipe_buf_release(struct pipe_inode_info *pipe,

fs/pipe.c

230

static inline bool pipe_readable(const struct pipe_inode_info *pipe)

fs/pipe.c

232

union pipe_index idx = { .head_tail = READ_ONCE(pipe->head_tail) };

fs/pipe.c

233

unsigned int writers = READ_ONCE(pipe->writers);

fs/pipe.c

238

static inline unsigned int pipe_update_tail(struct pipe_inode_info *pipe,

fs/pipe.c

242

pipe_buf_release(pipe, buf);

fs/pipe.c

249

if (pipe_has_watch_queue(pipe)) {

fs/pipe.c

250

spin_lock_irq(&pipe->rd_wait.lock);

fs/pipe.c

253

pipe->note_loss = true;

fs/pipe.c

255

pipe->tail = ++tail;

fs/pipe.c

256

spin_unlock_irq(&pipe->rd_wait.lock);

fs/pipe.c

264

pipe->tail = ++tail;

fs/pipe.c

273

struct pipe_inode_info *pipe = filp->private_data;

fs/pipe.c

282

mutex_lock(&pipe->mutex);

fs/pipe.c

294

unsigned int head = smp_load_acquire(&pipe->head);

fs/pipe.c

295

unsigned int tail = pipe->tail;

fs/pipe.c

298

if (pipe->note_loss) {

fs/pipe.c

317

pipe->note_loss = false;

fs/pipe.c

322

struct pipe_buffer *buf = pipe_buf(pipe, tail);

fs/pipe.c

336

error = pipe_buf_confirm(pipe, buf);

fs/pipe.c

360

wake_writer |= pipe_full(head, tail, pipe->max_usage);

fs/pipe.c

361

tail = pipe_update_tail(pipe, buf, tail);

fs/pipe.c

370

if (!pipe->writers)

fs/pipe.c

379

mutex_unlock(&pipe->mutex);

fs/pipe.c

388

if (wait_event_interruptible_exclusive(pipe->rd_wait, pipe_readable(pipe)) < 0)

fs/pipe.c

392

mutex_lock(&pipe->mutex);

fs/pipe.c

394

if (pipe_is_empty(pipe))

fs/pipe.c

396

mutex_unlock(&pipe->mutex);

fs/pipe.c

399

wake_up_interruptible_sync_poll(&pipe->wr_wait, EPOLLOUT | EPOLLWRNORM);

fs/pipe.c

401

wake_up_interruptible_sync_poll(&pipe->rd_wait, EPOLLIN | EPOLLRDNORM);

fs/pipe.c

402

kill_fasync(&pipe->fasync_writers, SIGIO, POLL_OUT);

fs/pipe.c

421

static inline bool pipe_writable(const struct pipe_inode_info *pipe)

fs/pipe.c

423

union pipe_index idx = { .head_tail = READ_ONCE(pipe->head_tail) };

fs/pipe.c

424

unsigned int max_usage = READ_ONCE(pipe->max_usage);

fs/pipe.c

427

!READ_ONCE(pipe->readers);

fs/pipe.c

434

struct pipe_inode_info *pipe = filp->private_data;

fs/pipe.c

451

if (pipe_has_watch_queue(pipe))

fs/pipe.c

458

mutex_lock(&pipe->mutex);

fs/pipe.c

460

if (!pipe->readers) {

fs/pipe.c

475

head = pipe->head;

fs/pipe.c

476

was_empty = pipe_empty(head, pipe->tail);

fs/pipe.c

479

struct pipe_buffer *buf = pipe_buf(pipe, head - 1);

fs/pipe.c

484

ret = pipe_buf_confirm(pipe, buf);

fs/pipe.c

501

if (!pipe->readers) {

fs/pipe.c

509

head = pipe->head;

fs/pipe.c

510

if (!pipe_full(head, pipe->tail, pipe->max_usage)) {

fs/pipe.c

515

page = anon_pipe_get_page(pipe);

fs/pipe.c

524

anon_pipe_put_page(pipe, page);

fs/pipe.c

530

pipe->head = head + 1;

fs/pipe.c

532

buf = pipe_buf(pipe, head);

fs/pipe.c

569

mutex_unlock(&pipe->mutex);

fs/pipe.c

571

wake_up_interruptible_sync_poll(&pipe->rd_wait, EPOLLIN | EPOLLRDNORM);

fs/pipe.c

572

kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);

fs/pipe.c

573

wait_event_interruptible_exclusive(pipe->wr_wait, pipe_writable(pipe));

fs/pipe.c

574

mutex_lock(&pipe->mutex);

fs/pipe.c

575

was_empty = pipe_is_empty(pipe);

fs/pipe.c

579

if (pipe_is_full(pipe))

fs/pipe.c

581

mutex_unlock(&pipe->mutex);

fs/pipe.c

595

if (was_empty || pipe->poll_usage)

fs/pipe.c

596

wake_up_interruptible_sync_poll(&pipe->rd_wait, EPOLLIN | EPOLLRDNORM);

fs/pipe.c

597

kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);

fs/pipe.c

599

wake_up_interruptible_sync_poll(&pipe->wr_wait, EPOLLOUT | EPOLLWRNORM);

fs/pipe.c

621

struct pipe_inode_info *pipe = filp->private_data;

fs/pipe.c

626

mutex_lock(&pipe->mutex);

fs/pipe.c

628

head = pipe->head;

fs/pipe.c

629

tail = pipe->tail;

fs/pipe.c

632

count += pipe_buf(pipe, tail)->len;

fs/pipe.c

635

mutex_unlock(&pipe->mutex);

fs/pipe.c

642

mutex_lock(&pipe->mutex);

fs/pipe.c

643

ret = watch_queue_set_size(pipe, arg);

fs/pipe.c

644

mutex_unlock(&pipe->mutex);

fs/pipe.c

650

pipe, (struct watch_notification_filter __user *)arg);

fs/pipe.c

663

struct pipe_inode_info *pipe = filp->private_data;

fs/pipe.c

667

WRITE_ONCE(pipe->poll_usage, true);

fs/pipe.c

676

poll_wait(filp, &pipe->rd_wait, wait);

fs/pipe.c

678

poll_wait(filp, &pipe->wr_wait, wait);

fs/pipe.c

685

idx.head_tail = READ_ONCE(pipe->head_tail);

fs/pipe.c

691

if (!pipe->writers && filp->f_pipe != pipe->w_counter)

fs/pipe.c

696

if (!pipe_full(idx.head, idx.tail, pipe->max_usage))

fs/pipe.c

702

if (!pipe->readers)

fs/pipe.c

709

static void put_pipe_info(struct inode *inode, struct pipe_inode_info *pipe)

fs/pipe.c

714

if (!--pipe->files) {

fs/pipe.c

721

free_pipe_info(pipe);

fs/pipe.c

727

struct pipe_inode_info *pipe = file->private_data;

fs/pipe.c

729

mutex_lock(&pipe->mutex);

fs/pipe.c

731

pipe->readers--;

fs/pipe.c

733

pipe->writers--;

fs/pipe.c

736

if (!pipe->readers != !pipe->writers) {

fs/pipe.c

737

wake_up_interruptible_all(&pipe->rd_wait);

fs/pipe.c

738

wake_up_interruptible_all(&pipe->wr_wait);

fs/pipe.c

739

kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);

fs/pipe.c

740

kill_fasync(&pipe->fasync_writers, SIGIO, POLL_OUT);

fs/pipe.c

742

mutex_unlock(&pipe->mutex);

fs/pipe.c

744

put_pipe_info(inode, pipe);

fs/pipe.c

751

struct pipe_inode_info *pipe = filp->private_data;

fs/pipe.c

754

mutex_lock(&pipe->mutex);

fs/pipe.c

756

retval = fasync_helper(fd, filp, on, &pipe->fasync_readers);

fs/pipe.c

758

retval = fasync_helper(fd, filp, on, &pipe->fasync_writers);

fs/pipe.c

761

fasync_helper(-1, filp, 0, &pipe->fasync_readers);

fs/pipe.c

763

mutex_unlock(&pipe->mutex);

fs/pipe.c

794

struct pipe_inode_info *pipe;

fs/pipe.c

800

pipe = kzalloc_obj(struct pipe_inode_info, GFP_KERNEL_ACCOUNT);

fs/pipe.c

801

if (pipe == NULL)

fs/pipe.c

817

pipe->bufs = kzalloc_objs(struct pipe_buffer, pipe_bufs,

fs/pipe.c

820

if (pipe->bufs) {

fs/pipe.c

821

init_waitqueue_head(&pipe->rd_wait);

fs/pipe.c

822

init_waitqueue_head(&pipe->wr_wait);

fs/pipe.c

823

pipe->r_counter = pipe->w_counter = 1;

fs/pipe.c

824

pipe->max_usage = pipe_bufs;

fs/pipe.c

825

pipe->ring_size = pipe_bufs;

fs/pipe.c

826

pipe->nr_accounted = pipe_bufs;

fs/pipe.c

827

pipe->user = user;

fs/pipe.c

828

mutex_init(&pipe->mutex);

fs/pipe.c

829

lock_set_cmp_fn(&pipe->mutex, pipe_lock_cmp_fn, NULL);

fs/pipe.c

830

return pipe;

fs/pipe.c

835

kfree(pipe);

fs/pipe.c

841

void free_pipe_info(struct pipe_inode_info *pipe)

fs/pipe.c

846

if (pipe->watch_queue)

fs/pipe.c

847

watch_queue_clear(pipe->watch_queue);

fs/pipe.c

850

(void) account_pipe_buffers(pipe->user, pipe->nr_accounted, 0);

fs/pipe.c

851

free_uid(pipe->user);

fs/pipe.c

852

for (i = 0; i < pipe->ring_size; i++) {

fs/pipe.c

853

struct pipe_buffer *buf = pipe->bufs + i;

fs/pipe.c

855

pipe_buf_release(pipe, buf);

fs/pipe.c

858

if (pipe->watch_queue)

fs/pipe.c

859

put_watch_queue(pipe->watch_queue);

fs/pipe.c

861

for (i = 0; i < ARRAY_SIZE(pipe->tmp_page); i++) {

fs/pipe.c

862

if (pipe->tmp_page[i])

fs/pipe.c

863

__free_page(pipe->tmp_page[i]);

fs/pipe.c

865

kfree(pipe->bufs);

fs/pipe.c

866

kfree(pipe);

fs/pipe.c

88

void pipe_lock(struct pipe_inode_info *pipe)

fs/pipe.c

889

struct pipe_inode_info *pipe;

fs/pipe.c

896

pipe = alloc_pipe_info();

fs/pipe.c

897

if (!pipe)

fs/pipe.c

90

if (pipe->files)

fs/pipe.c

900

inode->i_pipe = pipe;

fs/pipe.c

901

pipe->files = 2;

fs/pipe.c

902

pipe->readers = pipe->writers = 1;

fs/pipe.c

91

mutex_lock(&pipe->mutex);

fs/pipe.c

95

void pipe_unlock(struct pipe_inode_info *pipe)

fs/pipe.c

97

if (pipe->files)

fs/pipe.c

98

mutex_unlock(&pipe->mutex);

fs/smb/client/cifsglob.h

1251

bool pipe:1; /* set if connection to pipe share */

fs/smb/client/cifssmb.c

631

tcon->pipe = true;

fs/smb/client/connect.c

3655

if (!tcon->pipe && server->ops->qfs_tcon) {

fs/smb/client/inode.c

1708

if (rc && tcon->pipe) {

fs/smb/client/smb2pdu.c

2188

tcon->pipe = true;

fs/splice.c

1008

return do_splice_read(in, ppos, pipe, len, flags);

fs/splice.c

1028

struct pipe_inode_info *pipe;

fs/splice.c

1045

pipe = current->splice_pipe;

fs/splice.c

1046

if (unlikely(!pipe)) {

fs/splice.c

1047

pipe = alloc_pipe_info();

fs/splice.c

1048

if (!pipe)

fs/splice.c

1056

pipe->readers = 1;

fs/splice.c

1058

current->splice_pipe = pipe;

fs/splice.c

1078

WARN_ON_ONCE(!pipe_is_empty(pipe));

fs/splice.c

108

static void page_cache_pipe_buf_release(struct pipe_inode_info *pipe,

fs/splice.c

1084

ret = do_splice_read(in, &pos, pipe, len, flags);

fs/splice.c

1103

ret = actor(pipe, sd);

fs/splice.c

1120

pipe->tail = pipe->head = 0;

fs/splice.c

1138

for (i = 0; i < pipe->ring_size; i++) {

fs/splice.c

1139

struct pipe_buffer *buf = &pipe->bufs[i];

fs/splice.c

1142

pipe_buf_release(pipe, buf);

fs/splice.c

1152

static int direct_splice_actor(struct pipe_inode_info *pipe,

fs/splice.c

1159

ret = do_splice_from(pipe, file, sd->opos, sd->total_len, sd->flags);

fs/splice.c

1164

static int splice_file_range_actor(struct pipe_inode_info *pipe,

fs/splice.c

1169

return do_splice_from(pipe, file, sd->opos, sd->total_len, sd->flags);

fs/splice.c

119

static int page_cache_pipe_buf_confirm(struct pipe_inode_info *pipe,

fs/splice.c

1259

static int wait_for_space(struct pipe_inode_info *pipe, unsigned flags)

fs/splice.c

1262

if (unlikely(!pipe->readers)) {

fs/splice.c

1266

if (!pipe_is_full(pipe))

fs/splice.c

1272

pipe_wait_writable(pipe);

fs/splice.c

1444

struct pipe_inode_info *pipe,

fs/splice.c

1473

ret = add_to_pipe(pipe, &buf);

fs/splice.c

1490

static int pipe_to_user(struct pipe_inode_info *pipe, struct pipe_buffer *buf,

fs/splice.c

1504

struct pipe_inode_info *pipe = get_pipe_info(file, true);

fs/splice.c

1512

if (!pipe)

fs/splice.c

1518

pipe_lock(pipe);

fs/splice.c

1519

ret = __splice_from_pipe(pipe, &sd, pipe_to_user);

fs/splice.c

1520

pipe_unlock(pipe);

fs/splice.c

1537

struct pipe_inode_info *pipe;

fs/splice.c

1544

pipe = get_pipe_info(file, true);

fs/splice.c

1545

if (!pipe)

fs/splice.c

1550

pipe_lock(pipe);

fs/splice.c

1551

ret = wait_for_space(pipe, flags);

fs/splice.c

1553

ret = iter_to_pipe(iter, pipe, buf_flag);

fs/splice.c

1554

pipe_unlock(pipe);

fs/splice.c

1556

wakeup_pipe_readers(pipe);

fs/splice.c

162

static bool user_page_pipe_buf_try_steal(struct pipe_inode_info *pipe,

fs/splice.c

1642

static int ipipe_prep(struct pipe_inode_info *pipe, unsigned int flags)

fs/splice.c

1650

if (!pipe_is_empty(pipe))

fs/splice.c

1654

pipe_lock(pipe);

fs/splice.c

1656

while (pipe_is_empty(pipe)) {

fs/splice.c

1661

if (!pipe->writers)

fs/splice.c

1667

pipe_wait_readable(pipe);

fs/splice.c

1670

pipe_unlock(pipe);

fs/splice.c

1678

static int opipe_prep(struct pipe_inode_info *pipe, unsigned int flags)

fs/splice.c

1686

if (!pipe_is_full(pipe))

fs/splice.c

169

return generic_pipe_buf_try_steal(pipe, buf);

fs/splice.c

1690

pipe_lock(pipe);

fs/splice.c

1692

while (pipe_is_full(pipe)) {

fs/splice.c

1693

if (!pipe->readers) {

fs/splice.c

1706

pipe_wait_writable(pipe);

fs/splice.c

1709

pipe_unlock(pipe);

fs/splice.c

178

static void wakeup_pipe_readers(struct pipe_inode_info *pipe)

fs/splice.c

181

if (waitqueue_active(&pipe->rd_wait))

fs/splice.c

182

wake_up_interruptible(&pipe->rd_wait);

fs/splice.c

183

kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);

fs/splice.c

197

ssize_t splice_to_pipe(struct pipe_inode_info *pipe,

fs/splice.c

201

unsigned int tail = pipe->tail;

fs/splice.c

202

unsigned int head = pipe->head;

fs/splice.c

209

if (unlikely(!pipe->readers)) {

fs/splice.c

215

while (!pipe_full(head, tail, pipe->max_usage)) {

fs/splice.c

216

struct pipe_buffer *buf = pipe_buf(pipe, head);

fs/splice.c

226

pipe->head = head;

fs/splice.c

245

ssize_t add_to_pipe(struct pipe_inode_info *pipe, struct pipe_buffer *buf)

fs/splice.c

247

unsigned int head = pipe->head;

fs/splice.c

248

unsigned int tail = pipe->tail;

fs/splice.c

251

if (unlikely(!pipe->readers)) {

fs/splice.c

254

} else if (pipe_full(head, tail, pipe->max_usage)) {

fs/splice.c

257

*pipe_buf(pipe, head) = *buf;

fs/splice.c

258

pipe->head = head + 1;

fs/splice.c

261

pipe_buf_release(pipe, buf);

fs/splice.c

270

int splice_grow_spd(const struct pipe_inode_info *pipe, struct splice_pipe_desc *spd)

fs/splice.c

272

unsigned int max_usage = READ_ONCE(pipe->max_usage);

fs/splice.c

319

struct pipe_inode_info *pipe,

fs/splice.c

331

used = pipe_buf_usage(pipe);

fs/splice.c

332

npages = max_t(ssize_t, pipe->max_usage - used, 0);

fs/splice.c

383

struct pipe_buffer *buf = pipe_head_buf(pipe);

fs/splice.c

392

pipe->head++;

fs/splice.c

414

static void wakeup_pipe_writers(struct pipe_inode_info *pipe)

fs/splice.c

417

if (waitqueue_active(&pipe->wr_wait))

fs/splice.c

418

wake_up_interruptible(&pipe->wr_wait);

fs/splice.c

419

kill_fasync(&pipe->fasync_writers, SIGIO, POLL_OUT);

fs/splice.c

442

static int splice_from_pipe_feed(struct pipe_inode_info *pipe, struct splice_desc *sd,

fs/splice.c

445

unsigned int head = pipe->head;

fs/splice.c

446

unsigned int tail = pipe->tail;

fs/splice.c

450

struct pipe_buffer *buf = pipe_buf(pipe, tail);

fs/splice.c

456

ret = pipe_buf_confirm(pipe, buf);

fs/splice.c

463

ret = actor(pipe, buf, sd);

fs/splice.c

476

pipe_buf_release(pipe, buf);

fs/splice.c

478

pipe->tail = tail;

fs/splice.c

479

if (pipe->files)

fs/splice.c

491

static inline bool eat_empty_buffer(struct pipe_inode_info *pipe)

fs/splice.c

493

unsigned int tail = pipe->tail;

fs/splice.c

494

struct pipe_buffer *buf = pipe_buf(pipe, tail);

fs/splice.c

497

pipe_buf_release(pipe, buf);

fs/splice.c

498

pipe->tail = tail+1;

fs/splice.c

515

static int splice_from_pipe_next(struct pipe_inode_info *pipe, struct splice_desc *sd)

fs/splice.c

525

while (pipe_is_empty(pipe)) {

fs/splice.c

526

if (!pipe->writers)

fs/splice.c

539

wakeup_pipe_writers(pipe);

fs/splice.c

543

pipe_wait_readable(pipe);

fs/splice.c

546

if (eat_empty_buffer(pipe))

fs/splice.c

577

static void splice_from_pipe_end(struct pipe_inode_info *pipe, struct splice_desc *sd)

fs/splice.c

580

wakeup_pipe_writers(pipe);

fs/splice.c

596

ssize_t __splice_from_pipe(struct pipe_inode_info *pipe, struct splice_desc *sd,

fs/splice.c

604

ret = splice_from_pipe_next(pipe, sd);

fs/splice.c

606

ret = splice_from_pipe_feed(pipe, sd, actor);

fs/splice.c

608

splice_from_pipe_end(pipe, sd);

fs/splice.c

628

ssize_t splice_from_pipe(struct pipe_inode_info *pipe, struct file *out,

fs/splice.c

64

static bool page_cache_pipe_buf_try_steal(struct pipe_inode_info *pipe,

fs/splice.c

640

pipe_lock(pipe);

fs/splice.c

641

ret = __splice_from_pipe(pipe, &sd, actor);

fs/splice.c

642

pipe_unlock(pipe);

fs/splice.c

662

iter_file_splice_write(struct pipe_inode_info *pipe, struct file *out,

fs/splice.c

671

int nbufs = pipe->max_usage;

fs/splice.c

682

pipe_lock(pipe);

fs/splice.c

692

ret = splice_from_pipe_next(pipe, &sd);

fs/splice.c

696

if (unlikely(nbufs < pipe->max_usage)) {

fs/splice.c

698

nbufs = pipe->max_usage;

fs/splice.c

706

head = pipe->head;

fs/splice.c

707

tail = pipe->tail;

fs/splice.c

712

struct pipe_buffer *buf = pipe_buf(pipe, tail);

fs/splice.c

720

ret = pipe_buf_confirm(pipe, buf);

fs/splice.c

749

tail = pipe->tail;

fs/splice.c

751

struct pipe_buffer *buf = pipe_buf(pipe, tail);

fs/splice.c

755

pipe_buf_release(pipe, buf);

fs/splice.c

757

pipe->tail = tail;

fs/splice.c

758

if (pipe->files)

fs/splice.c

769

splice_from_pipe_end(pipe, &sd);

fs/splice.c

771

pipe_unlock(pipe);

fs/splice.c

795

ssize_t splice_to_socket(struct pipe_inode_info *pipe, struct file *out,

fs/splice.c

805

pipe_lock(pipe);

fs/splice.c

819

while (pipe_is_empty(pipe)) {

fs/splice.c

821

if (!pipe->writers)

fs/splice.c

836

wakeup_pipe_writers(pipe);

fs/splice.c

840

pipe_wait_readable(pipe);

fs/splice.c

843

head = pipe->head;

fs/splice.c

844

tail = pipe->tail;

fs/splice.c

847

struct pipe_buffer *buf = pipe_buf(pipe, tail);

fs/splice.c

857

ret = pipe_buf_confirm(pipe, buf);

fs/splice.c

877

if (remain && pipe_occupancy(pipe->head, tail) > 0)

fs/splice.c

890

tail = pipe->tail;

fs/splice.c

892

struct pipe_buffer *buf = pipe_buf(pipe, tail);

fs/splice.c

900

pipe_buf_release(pipe, buf);

fs/splice.c

905

if (tail != pipe->tail) {

fs/splice.c

906

pipe->tail = tail;

fs/splice.c

907

if (pipe->files)

fs/splice.c

913

pipe_unlock(pipe);

fs/splice.c

915

wakeup_pipe_writers(pipe);

fs/splice.c

931

static ssize_t do_splice_from(struct pipe_inode_info *pipe, struct file *out,

fs/splice.c

936

return out->f_op->splice_write(pipe, out, ppos, len, flags);

fs/splice.c

955

struct pipe_inode_info *pipe, size_t len,

fs/splice.c

966

p_space = pipe->max_usage - pipe_buf_usage(pipe);

fs/splice.c

979

return copy_splice_read(in, ppos, pipe, len, flags);

fs/splice.c

980

return in->f_op->splice_read(in, ppos, pipe, len, flags);

fs/splice.c

999

struct pipe_inode_info *pipe, size_t len,

fs/xfs/xfs_file.c

351

struct pipe_inode_info *pipe,

fs/xfs/xfs_file.c

368

ret = filemap_splice_read(in, ppos, pipe, len, flags);

fs/zonefs/file.c

689

struct pipe_inode_info *pipe,

fs/zonefs/file.c

717

ret = filemap_splice_read(in, ppos, pipe, len, flags);

include/drm/drm_audio_component.h

50

int (*sync_audio_rate)(struct device *, int port, int pipe, int rate);

include/drm/drm_audio_component.h

63

int (*get_eld)(struct device *, int port, int pipe, bool *enabled,

include/drm/drm_audio_component.h

83

void (*pin_eld_notify)(void *audio_ptr, int port, int pipe);

include/drm/drm_gem_atomic_helper.h

129

int drm_gem_simple_kms_begin_shadow_fb_access(struct drm_simple_display_pipe *pipe,

include/drm/drm_gem_atomic_helper.h

131

void drm_gem_simple_kms_end_shadow_fb_access(struct drm_simple_display_pipe *pipe,

include/drm/drm_gem_atomic_helper.h

133

void drm_gem_simple_kms_reset_shadow_plane(struct drm_simple_display_pipe *pipe);

include/drm/drm_gem_atomic_helper.h

135

drm_gem_simple_kms_duplicate_shadow_plane_state(struct drm_simple_display_pipe *pipe);

include/drm/drm_gem_atomic_helper.h

136

void drm_gem_simple_kms_destroy_shadow_plane_state(struct drm_simple_display_pipe *pipe,

include/drm/drm_mipi_dbi.h

175

enum drm_mode_status mipi_dbi_pipe_mode_valid(struct drm_simple_display_pipe *pipe,

include/drm/drm_mipi_dbi.h

177

void mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe,

include/drm/drm_mipi_dbi.h

182

void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe);

include/drm/drm_mipi_dbi.h

183

int mipi_dbi_pipe_begin_fb_access(struct drm_simple_display_pipe *pipe,

include/drm/drm_mipi_dbi.h

185

void mipi_dbi_pipe_end_fb_access(struct drm_simple_display_pipe *pipe,

include/drm/drm_mipi_dbi.h

187

void mipi_dbi_pipe_reset_plane(struct drm_simple_display_pipe *pipe);

include/drm/drm_mipi_dbi.h

188

struct drm_plane_state *mipi_dbi_pipe_duplicate_plane_state(struct drm_simple_display_pipe *pipe);

include/drm/drm_mipi_dbi.h

189

void mipi_dbi_pipe_destroy_plane_state(struct drm_simple_display_pipe *pipe,

include/drm/drm_mipi_dbi.h

92

struct drm_simple_display_pipe pipe;

include/drm/drm_simple_kms_helper.h

109

void (*update)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

125

int (*prepare_fb)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

135

void (*cleanup_fb)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

145

int (*begin_fb_access)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

155

void (*end_fb_access)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

165

int (*enable_vblank)(struct drm_simple_display_pipe *pipe);

include/drm/drm_simple_kms_helper.h

174

void (*disable_vblank)(struct drm_simple_display_pipe *pipe);

include/drm/drm_simple_kms_helper.h

182

void (*reset_crtc)(struct drm_simple_display_pipe *pipe);

include/drm/drm_simple_kms_helper.h

191

struct drm_crtc_state * (*duplicate_crtc_state)(struct drm_simple_display_pipe *pipe);

include/drm/drm_simple_kms_helper.h

200

void (*destroy_crtc_state)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

209

void (*reset_plane)(struct drm_simple_display_pipe *pipe);

include/drm/drm_simple_kms_helper.h

218

struct drm_plane_state * (*duplicate_plane_state)(struct drm_simple_display_pipe *pipe);

include/drm/drm_simple_kms_helper.h

227

void (*destroy_plane_state)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

251

int drm_simple_display_pipe_attach_bridge(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

255

struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

52

enum drm_mode_status (*mode_valid)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

62

void (*enable)(struct drm_simple_display_pipe *pipe,

include/drm/drm_simple_kms_helper.h

72

void (*disable)(struct drm_simple_display_pipe *pipe);

include/drm/drm_simple_kms_helper.h

91

int (*check)(struct drm_simple_display_pipe *pipe,

include/drm/drm_vblank.h

224

unsigned int pipe;

include/drm/drm_vblank.h

301

bool drm_handle_vblank(struct drm_device *dev, unsigned int pipe);

include/drm/drm_vblank.h

51

unsigned int pipe;

include/drm/intel/intel_lpe_audio.h

37

int pipe;

include/linux/backing-file.h

34

struct pipe_inode_info *pipe, size_t len,

include/linux/backing-file.h

37

ssize_t backing_file_splice_write(struct pipe_inode_info *pipe,

include/linux/fs.h

3064

struct pipe_inode_info *pipe,

include/linux/fs.h

3067

struct pipe_inode_info *pipe,

include/linux/hyperv.h

327

} pipe;

include/linux/net.h

211

struct pipe_inode_info *pipe, size_t len, unsigned int flags);

include/linux/pipe_fs_i.h

161

static inline bool pipe_has_watch_queue(const struct pipe_inode_info *pipe)

include/linux/pipe_fs_i.h

164

return pipe->watch_queue != NULL;

include/linux/pipe_fs_i.h

206

static inline bool pipe_is_full(const struct pipe_inode_info *pipe)

include/linux/pipe_fs_i.h

208

return pipe_full(pipe->head, pipe->tail, pipe->max_usage);

include/linux/pipe_fs_i.h

215

static inline bool pipe_is_empty(const struct pipe_inode_info *pipe)

include/linux/pipe_fs_i.h

217

return pipe_empty(pipe->head, pipe->tail);

include/linux/pipe_fs_i.h

224

static inline unsigned int pipe_buf_usage(const struct pipe_inode_info *pipe)

include/linux/pipe_fs_i.h

226

return pipe_occupancy(pipe->head, pipe->tail);

include/linux/pipe_fs_i.h

234

static inline struct pipe_buffer *pipe_buf(const struct pipe_inode_info *pipe,

include/linux/pipe_fs_i.h

237

return &pipe->bufs[slot & (pipe->ring_size - 1)];

include/linux/pipe_fs_i.h

244

static inline struct pipe_buffer *pipe_head_buf(const struct pipe_inode_info *pipe)

include/linux/pipe_fs_i.h

246

return pipe_buf(pipe, pipe->head);

include/linux/pipe_fs_i.h

256

static inline __must_check bool pipe_buf_get(struct pipe_inode_info *pipe,

include/linux/pipe_fs_i.h

259

return buf->ops->get(pipe, buf);

include/linux/pipe_fs_i.h

267

static inline void pipe_buf_release(struct pipe_inode_info *pipe,

include/linux/pipe_fs_i.h

273

ops->release(pipe, buf);

include/linux/pipe_fs_i.h

281

static inline int pipe_buf_confirm(struct pipe_inode_info *pipe,

include/linux/pipe_fs_i.h

286

return buf->ops->confirm(pipe, buf);

include/linux/pipe_fs_i.h

294

static inline bool pipe_buf_try_steal(struct pipe_inode_info *pipe,

include/linux/pipe_fs_i.h

299

return buf->ops->try_steal(pipe, buf);

include/linux/pipe_fs_i.h

332

int pipe_resize_ring(struct pipe_inode_info *pipe, unsigned int nr_slots);

include/linux/rtsx_usb.h

85

extern int rtsx_usb_transfer_data(struct rtsx_ucr *ucr, unsigned int pipe,

include/linux/skbuff.h

4236

struct pipe_inode_info *pipe, unsigned int len,

include/linux/splice.h

100

ssize_t splice_to_socket(struct pipe_inode_info *pipe, struct file *out,

include/linux/splice.h

71

ssize_t splice_from_pipe(struct pipe_inode_info *pipe, struct file *out,

include/linux/splice.h

74

ssize_t __splice_from_pipe(struct pipe_inode_info *pipe,

include/linux/splice.h

76

ssize_t splice_to_pipe(struct pipe_inode_info *pipe,

include/linux/splice.h

78

ssize_t add_to_pipe(struct pipe_inode_info *pipe, struct pipe_buffer *buf);

include/linux/splice.h

80

struct pipe_inode_info *pipe, size_t len,

include/linux/sunrpc/rpc_pipe_fs.h

129

void rpc_destroy_pipe_data(struct rpc_pipe *pipe);

include/linux/sunrpc/rpc_pipe_fs.h

44

struct list_head pipe;

include/linux/sunrpc/rpc_pipe_fs.h

61

struct rpc_pipe *pipe;

include/linux/usb.h

1644

unsigned int pipe; /* (in) pipe information */

include/linux/usb.h

1698

unsigned int pipe,

include/linux/usb.h

1706

urb->pipe = pipe;

include/linux/usb.h

1733

unsigned int pipe,

include/linux/usb.h

1740

urb->pipe = pipe;

include/linux/usb.h

1773

unsigned int pipe,

include/linux/usb.h

1781

urb->pipe = pipe;

include/linux/usb.h

1849

int usb_pipe_type_check(struct usb_device *dev, unsigned int pipe);

include/linux/usb.h

1874

extern int usb_control_msg(struct usb_device *dev, unsigned int pipe,

include/linux/usb.h

1877

extern int usb_interrupt_msg(struct usb_device *usb_dev, unsigned int pipe,

include/linux/usb.h

1879

extern int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe,

include/linux/usb.h

1881

extern int usb_bulk_msg_killable(struct usb_device *usb_dev, unsigned int pipe,

include/linux/usb.h

1916

extern int usb_clear_halt(struct usb_device *dev, int pipe);

include/linux/usb.h

1965

int pipe;

include/linux/usb.h

1977

unsigned pipe,

include/linux/usb.h

2014

#define usb_pipein(pipe) ((pipe) & USB_DIR_IN)

include/linux/usb.h

2015

#define usb_pipeout(pipe) (!usb_pipein(pipe))

include/linux/usb.h

2017

#define usb_pipedevice(pipe) (((pipe) >> 8) & 0x7f)

include/linux/usb.h

2018

#define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf)

include/linux/usb.h

2020

#define usb_pipetype(pipe) (((pipe) >> 30) & 3)

include/linux/usb.h

2021

#define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS)

include/linux/usb.h

2022

#define usb_pipeint(pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT)

include/linux/usb.h

2023

#define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL)

include/linux/usb.h

2024

#define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK)

include/linux/usb.h

2051

usb_pipe_endpoint(struct usb_device *dev, unsigned int pipe)

include/linux/usb.h

2054

eps = usb_pipein(pipe) ? dev->ep_in : dev->ep_out;

include/linux/usb.h

2055

return eps[usb_pipeendpoint(pipe)];

include/linux/usb.h

2058

static inline u16 usb_maxpacket(struct usb_device *udev, int pipe)

include/linux/usb.h

2060

struct usb_host_endpoint *ep = usb_pipe_endpoint(udev, pipe);

include/linux/watch_queue.h

126

static inline int watch_queue_init(struct pipe_inode_info *pipe)

include/linux/watch_queue.h

41

struct pipe_inode_info *pipe; /* Pipe we use as a buffer, NULL if queue closed */

include/media/drv-intf/exynos-fimc.h

138

struct exynos_media_pipeline *pipe;

include/media/drv-intf/exynos-fimc.h

153

((!(ent) || !(ent)->pipe) ? -ENOENT : \

include/media/drv-intf/exynos-fimc.h

154

(((ent)->pipe->ops && (ent)->pipe->ops->op) ? \

include/media/drv-intf/exynos-fimc.h

155

(ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \

include/media/media-device.h

180

struct media_pipeline *pipe);

include/media/media-entity.h

1005

return pad->pipe;

include/media/media-entity.h

1159

struct media_pipeline *pipe);

include/media/media-entity.h

1169

struct media_pipeline *pipe);

include/media/media-entity.h

1195

__media_pipeline_pad_iter_next(struct media_pipeline *pipe,

include/media/media-entity.h

1209

#define media_pipeline_for_each_pad(pipe, iter, pad) \

include/media/media-entity.h

1210

for (pad = __media_pipeline_pad_iter_next((pipe), iter, NULL); \

include/media/media-entity.h

1212

pad = __media_pipeline_pad_iter_next((pipe), iter, pad))

include/media/media-entity.h

1229

int media_pipeline_entity_iter_init(struct media_pipeline *pipe,

include/media/media-entity.h

1242

__media_pipeline_entity_iter_next(struct media_pipeline *pipe,

include/media/media-entity.h

1259

#define media_pipeline_for_each_entity(pipe, iter, entity) \

include/media/media-entity.h

1260

for (entity = __media_pipeline_entity_iter_next((pipe), iter, NULL); \

include/media/media-entity.h

1262

entity = __media_pipeline_entity_iter_next((pipe), iter, entity))

include/media/media-entity.h

129

struct media_pipeline *pipe;

include/media/media-entity.h

248

struct media_pipeline *pipe;

include/media/v4l2-dev.h

268

struct media_pipeline pipe;

include/media/v4l2-dev.h

585

struct media_pipeline *pipe);

include/media/v4l2-dev.h

599

struct media_pipeline *pipe);

include/net/nfc/hci.h

250

void nfc_hci_cmd_received(struct nfc_hci_dev *hdev, u8 pipe, u8 cmd,

include/net/nfc/hci.h

252

void nfc_hci_event_received(struct nfc_hci_dev *hdev, u8 pipe, u8 event,

include/net/nfc/hci.h

258

u8 pipe);

include/net/nfc/hci.h

42

int (*event_received)(struct nfc_hci_dev *hdev, u8 pipe, u8 event,

include/net/nfc/hci.h

44

void (*cmd_received)(struct nfc_hci_dev *hdev, u8 pipe, u8 cmd,

include/net/nfc/hci.h

65

u8 pipe;

include/net/nfc/nci_core.h

162

u8 pipe;

include/net/nfc/nci_core.h

314

int nci_hci_open_pipe(struct nci_dev *ndev, u8 pipe);

include/net/nfc/nci_core.h

316

u8 dest_gate, u8 pipe);

include/net/nfc/nci_core.h

81

void (*hci_event_received)(struct nci_dev *ndev, u8 pipe, u8 event,

include/net/nfc/nci_core.h

83

void (*hci_cmd_received)(struct nci_dev *ndev, u8 pipe, u8 cmd,

include/net/tcp.h

355

struct pipe_inode_info *pipe;

include/net/tcp.h

394

struct pipe_inode_info *pipe, size_t len,

include/sound/vx_core.h

276

struct vx_pipe *pipe, int count)

include/sound/vx_core.h

278

chip->ops->dma_write(chip, runtime, pipe, count);

include/sound/vx_core.h

282

struct vx_pipe *pipe, int count)

include/sound/vx_core.h

284

chip->ops->dma_read(chip, runtime, pipe, count);

include/sound/vx_core.h

96

struct vx_pipe *pipe, int count);

include/sound/vx_core.h

98

struct vx_pipe *pipe, int count);

include/uapi/drm/etnaviv_drm.h

199

__u32 pipe; /* in */

include/uapi/drm/etnaviv_drm.h

223

__u32 pipe; /* in */

include/uapi/drm/etnaviv_drm.h

240

__u32 pipe; /* in */

include/uapi/drm/etnaviv_drm.h

252

__u32 pipe; /* in */

include/uapi/drm/etnaviv_drm.h

260

__u32 pipe; /* in */

include/uapi/drm/etnaviv_drm.h

84

__u32 pipe; /* in */

include/uapi/drm/i915_drm.h

1812

__u32 pipe;

include/uapi/drm/i915_drm.h

887

int pipe;

include/uapi/drm/lima_drm.h

118

__u32 pipe; /* in, which pipe to use, GP/PP */

include/uapi/drm/msm_drm.h

130

__u32 pipe; /* in, MSM_PIPE_x */

include/xen/interface/io/usbif.h

296

#define xenusb_pipeportnum(pipe) ((pipe) & XENUSB_PIPE_PORT_MASK)

include/xen/interface/io/usbif.h

297

#define xenusb_setportnum_pipe(pipe, portnum) ((pipe) | (portnum))

include/xen/interface/io/usbif.h

299

#define xenusb_pipeunlink(pipe) ((pipe) & XENUSB_PIPE_UNLINK)

include/xen/interface/io/usbif.h

300

#define xenusb_pipesubmit(pipe) (!xenusb_pipeunlink(pipe))

include/xen/interface/io/usbif.h

301

#define xenusb_setunlink_pipe(pipe) ((pipe) | XENUSB_PIPE_UNLINK)

include/xen/interface/io/usbif.h

303

#define xenusb_pipein(pipe) ((pipe) & XENUSB_PIPE_DIR)

include/xen/interface/io/usbif.h

304

#define xenusb_pipeout(pipe) (!xenusb_pipein(pipe))

include/xen/interface/io/usbif.h

306

#define xenusb_pipedevice(pipe) \

include/xen/interface/io/usbif.h

307

(((pipe) >> XENUSB_PIPE_DEV_SHIFT) & XENUSB_PIPE_DEV_MASK)

include/xen/interface/io/usbif.h

309

#define xenusb_pipeendpoint(pipe) \

include/xen/interface/io/usbif.h

310

(((pipe) >> XENUSB_PIPE_EP_SHIFT) & XENUSB_PIPE_EP_MASK)

include/xen/interface/io/usbif.h

312

#define xenusb_pipetype(pipe) \

include/xen/interface/io/usbif.h

313

(((pipe) >> XENUSB_PIPE_TYPE_SHIFT) & XENUSB_PIPE_TYPE_MASK)

include/xen/interface/io/usbif.h

314

#define xenusb_pipeisoc(pipe) (xenusb_pipetype(pipe) == XENUSB_PIPE_TYPE_ISOC)

include/xen/interface/io/usbif.h

315

#define xenusb_pipeint(pipe) (xenusb_pipetype(pipe) == XENUSB_PIPE_TYPE_INT)

include/xen/interface/io/usbif.h

316

#define xenusb_pipectrl(pipe) (xenusb_pipetype(pipe) == XENUSB_PIPE_TYPE_CTRL)

include/xen/interface/io/usbif.h

317

#define xenusb_pipebulk(pipe) (xenusb_pipetype(pipe) == XENUSB_PIPE_TYPE_BULK)

include/xen/interface/io/usbif.h

337

uint32_t pipe;

kernel/trace/trace.c

6122

struct pipe_inode_info *pipe,

kernel/trace/trace.c

6141

if (splice_grow_spd(pipe, &spd))

kernel/trace/trace.c

6148

ppos, pipe, len, flags);

kernel/trace/trace.c

6195

ret = splice_to_pipe(pipe, &spd);

kernel/trace/trace.c

7305

struct pipe_inode_info *pipe, size_t len, unsigned int flags);

kernel/trace/trace.c

7998

static void buffer_pipe_buf_release(struct pipe_inode_info *pipe,

kernel/trace/trace.c

8007

static bool buffer_pipe_buf_get(struct pipe_inode_info *pipe,

kernel/trace/trace.c

8040

struct pipe_inode_info *pipe, size_t len,

kernel/trace/trace.c

8073

if (splice_grow_spd(pipe, &spd))

kernel/trace/trace.c

8152

ret = splice_to_pipe(pipe, &spd);

kernel/trace/trace.h

635

struct pipe_inode_info *pipe,

kernel/watch_queue.c

101

struct pipe_inode_info *pipe = wqueue->pipe;

kernel/watch_queue.c

107

spin_lock_irq(&pipe->rd_wait.lock);

kernel/watch_queue.c

109

head = pipe->head;

kernel/watch_queue.c

110

tail = pipe->tail;

kernel/watch_queue.c

111

if (pipe_full(head, tail, pipe->ring_size))

kernel/watch_queue.c

126

buf = pipe_buf(pipe, head);

kernel/watch_queue.c

133

smp_store_release(&pipe->head, head + 1); /* vs pipe_read() */

kernel/watch_queue.c

136

spin_unlock_irq(&pipe->rd_wait.lock);

kernel/watch_queue.c

139

wake_up_interruptible_sync_poll_locked(&pipe->rd_wait, EPOLLIN | EPOLLRDNORM);

kernel/watch_queue.c

143

spin_unlock_irq(&pipe->rd_wait.lock);

kernel/watch_queue.c

145

kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);

kernel/watch_queue.c

149

buf = pipe_buf(pipe, head - 1);

kernel/watch_queue.c

237

long watch_queue_set_size(struct pipe_inode_info *pipe, unsigned int nr_notes)

kernel/watch_queue.c

239

struct watch_queue *wqueue = pipe->watch_queue;

kernel/watch_queue.c

256

user_bufs = account_pipe_buffers(pipe->user, pipe->nr_accounted, nr_pages);

kernel/watch_queue.c

258

if (nr_pages > pipe->max_usage &&

kernel/watch_queue.c

267

ret = pipe_resize_ring(pipe, roundup_pow_of_two(nr_notes));

kernel/watch_queue.c

277

pipe->max_usage = nr_pages;

kernel/watch_queue.c

278

pipe->nr_accounted = nr_pages;

kernel/watch_queue.c

308

(void) account_pipe_buffers(pipe->user, nr_pages, pipe->nr_accounted);

kernel/watch_queue.c

315

long watch_queue_set_filter(struct pipe_inode_info *pipe,

kernel/watch_queue.c

322

struct watch_queue *wqueue = pipe->watch_queue;

kernel/watch_queue.c

381

pipe_lock(pipe);

kernel/watch_queue.c

383

lockdep_is_held(&pipe->mutex));

kernel/watch_queue.c

384

pipe_unlock(pipe);

kernel/watch_queue.c

45

if (unlikely(!wqueue->pipe)) {

kernel/watch_queue.c

57

static void watch_queue_pipe_buf_release(struct pipe_inode_info *pipe,

kernel/watch_queue.c

615

wqueue->pipe = NULL;

kernel/watch_queue.c

672

struct pipe_inode_info *pipe;

kernel/watch_queue.c

677

pipe = get_pipe_info(fd_file(f), false);

kernel/watch_queue.c

678

if (pipe && pipe->watch_queue) {

kernel/watch_queue.c

679

wqueue = pipe->watch_queue;

kernel/watch_queue.c

691

int watch_queue_init(struct pipe_inode_info *pipe)

kernel/watch_queue.c

699

wqueue->pipe = pipe;

kernel/watch_queue.c

704

pipe->watch_queue = wqueue;

kernel/watch_queue.c

77

generic_pipe_buf_release(pipe, buf);

mm/filemap.c

3004

size_t splice_folio_into_pipe(struct pipe_inode_info *pipe,

mm/filemap.c

3014

while (spliced < size && !pipe_is_full(pipe)) {

mm/filemap.c

3015

struct pipe_buffer *buf = pipe_head_buf(pipe);

mm/filemap.c

3025

pipe->head++;

mm/filemap.c

3054

struct pipe_inode_info *pipe,

mm/filemap.c

3071

used = pipe_buf_usage(pipe);

mm/filemap.c

3072

npages = max_t(ssize_t, pipe->max_usage - used, 0);

mm/filemap.c

3124

n = splice_folio_into_pipe(pipe, folio, *ppos, n);

mm/filemap.c

3131

if (pipe_is_full(pipe))

mm/internal.h

1429

size_t splice_folio_into_pipe(struct pipe_inode_info *pipe,

mm/shmem.c

3508

static bool zero_pipe_buf_get(struct pipe_inode_info *pipe,

mm/shmem.c

3514

static void zero_pipe_buf_release(struct pipe_inode_info *pipe,

mm/shmem.c

3519

static bool zero_pipe_buf_try_steal(struct pipe_inode_info *pipe,

mm/shmem.c

3531

static size_t splice_zeropage_into_pipe(struct pipe_inode_info *pipe,

mm/shmem.c

3538

if (!pipe_is_full(pipe)) {

mm/shmem.c

3539

struct pipe_buffer *buf = pipe_head_buf(pipe);

mm/shmem.c

3547

pipe->head++;

mm/shmem.c

3554

struct pipe_inode_info *pipe,

mm/shmem.c

3565

used = pipe_buf_usage(pipe);

mm/shmem.c

3566

npages = max_t(ssize_t, pipe->max_usage - used, 0);

mm/shmem.c

3639

n = splice_folio_into_pipe(pipe, folio, *ppos, part);

mm/shmem.c

3643

n = splice_zeropage_into_pipe(pipe, *ppos, part);

mm/shmem.c

3652

if (pipe_is_full(pipe))

net/core/skbuff.c

3199

static bool __skb_splice_bits(struct sk_buff *skb, struct pipe_inode_info *pipe,

net/core/skbuff.c

3246

if (__skb_splice_bits(iter, pipe, offset, len, spd, sk))

net/core/skbuff.c

3258

struct pipe_inode_info *pipe, unsigned int tlen,

net/core/skbuff.c

3272

__skb_splice_bits(skb, pipe, &offset, &tlen, &spd, sk);

net/core/skbuff.c

3275

ret = splice_to_pipe(pipe, &spd);

net/ipv4/tcp.c

792

ret = skb_splice_bits(skb, skb->sk, offset, tss->pipe,

net/ipv4/tcp.c

823

struct pipe_inode_info *pipe, size_t len,

net/ipv4/tcp.c

828

.pipe = pipe,

net/kcm/kcmsock.c

1040

struct pipe_inode_info *pipe, size_t len,

net/kcm/kcmsock.c

1068

copied = skb_splice_bits(skb, sk, stm->offset, pipe, len, flags);

net/mptcp/protocol.c

4431

struct pipe_inode_info *pipe, size_t len,

net/mptcp/protocol.c

4435

.pipe = pipe,

net/nfc/hci/command.c

102

return nfc_hci_hcp_message_tx(hdev, pipe, NFC_HCI_HCP_EVENT, event,

net/nfc/hci/command.c

115

u8 pipe;

net/nfc/hci/command.c

117

pipe = hdev->gate2pipe[gate];

net/nfc/hci/command.c

118

if (pipe == NFC_HCI_INVALID_PIPE)

net/nfc/hci/command.c

121

return nfc_hci_execute_cmd(hdev, pipe, cmd, param, param_len, skb);

net/nfc/hci/command.c

129

u8 pipe;

net/nfc/hci/command.c

131

pipe = hdev->gate2pipe[gate];

net/nfc/hci/command.c

132

if (pipe == NFC_HCI_INVALID_PIPE)

net/nfc/hci/command.c

135

return nfc_hci_execute_cmd_async(hdev, pipe, cmd, param, param_len,

net/nfc/hci/command.c

182

static int nfc_hci_open_pipe(struct nfc_hci_dev *hdev, u8 pipe)

net/nfc/hci/command.c

187

pr_debug("pipe=%d\n", pipe);

net/nfc/hci/command.c

189

r = nfc_hci_execute_cmd(hdev, pipe, NFC_HCI_ANY_OPEN_PIPE,

net/nfc/hci/command.c

19

static int nfc_hci_execute_cmd_async(struct nfc_hci_dev *hdev, u8 pipe, u8 cmd,

net/nfc/hci/command.c

202

static int nfc_hci_close_pipe(struct nfc_hci_dev *hdev, u8 pipe)

net/nfc/hci/command.c

204

return nfc_hci_execute_cmd(hdev, pipe, NFC_HCI_ANY_CLOSE_PIPE,

net/nfc/hci/command.c

214

u8 pipe;

net/nfc/hci/command.c

229

pipe = resp->pipe;

net/nfc/hci/command.c

23

pr_debug("exec cmd async through pipe=%d, cmd=%d, plen=%zd\n", pipe,

net/nfc/hci/command.c

232

pr_debug("pipe created=%d\n", pipe);

net/nfc/hci/command.c

234

return pipe;

net/nfc/hci/command.c

237

static int nfc_hci_delete_pipe(struct nfc_hci_dev *hdev, u8 pipe)

net/nfc/hci/command.c

240

NFC_HCI_ADM_DELETE_PIPE, &pipe, 1, NULL);

net/nfc/hci/command.c

262

u8 pipe = hdev->gate2pipe[gate];

net/nfc/hci/command.c

264

if (pipe == NFC_HCI_INVALID_PIPE)

net/nfc/hci/command.c

267

r = nfc_hci_close_pipe(hdev, pipe);

net/nfc/hci/command.c

271

if (pipe != NFC_HCI_LINK_MGMT_PIPE && pipe != NFC_HCI_ADMIN_PIPE) {

net/nfc/hci/command.c

272

r = nfc_hci_delete_pipe(hdev, pipe);

net/nfc/hci/command.c

29

return nfc_hci_hcp_message_tx(hdev, pipe, NFC_HCI_HCP_COMMAND, cmd,

net/nfc/hci/command.c

298

u8 pipe)

net/nfc/hci/command.c

303

if (pipe == NFC_HCI_DO_NOT_CREATE_PIPE)

net/nfc/hci/command.c

309

if (pipe != NFC_HCI_INVALID_PIPE)

net/nfc/hci/command.c

314

pipe = NFC_HCI_LINK_MGMT_PIPE;

net/nfc/hci/command.c

317

pipe = NFC_HCI_ADMIN_PIPE;

net/nfc/hci/command.c

320

pipe = nfc_hci_create_pipe(hdev, dest_host, dest_gate, &r);

net/nfc/hci/command.c

321

if (pipe == NFC_HCI_INVALID_PIPE)

net/nfc/hci/command.c

328

r = nfc_hci_open_pipe(hdev, pipe);

net/nfc/hci/command.c

331

if (nfc_hci_delete_pipe(hdev, pipe) < 0) {

net/nfc/hci/command.c

338

hdev->pipes[pipe].gate = dest_gate;

net/nfc/hci/command.c

339

hdev->pipes[pipe].dest_host = dest_host;

net/nfc/hci/command.c

340

hdev->gate2pipe[dest_gate] = pipe;

net/nfc/hci/command.c

55

static int nfc_hci_execute_cmd(struct nfc_hci_dev *hdev, u8 pipe, u8 cmd,

net/nfc/hci/command.c

65

pr_debug("exec cmd sync through pipe=%d, cmd=%d, plen=%zd\n", pipe,

net/nfc/hci/command.c

71

hcp_ew.exec_result = nfc_hci_hcp_message_tx(hdev, pipe,

net/nfc/hci/command.c

94

u8 pipe;

net/nfc/hci/command.c

98

pipe = hdev->gate2pipe[gate];

net/nfc/hci/command.c

99

if (pipe == NFC_HCI_INVALID_PIPE)

net/nfc/hci/core.c

132

u8 pipe;

net/nfc/hci/core.c

137

pipe = skb->data[0];

net/nfc/hci/core.c

144

nfc_hci_hcp_message_rx(hdev, pipe, type, instruction, skb);

net/nfc/hci/core.c

181

void nfc_hci_cmd_received(struct nfc_hci_dev *hdev, u8 pipe, u8 cmd,

net/nfc/hci/core.c

190

pr_debug("from pipe %x cmd %x\n", pipe, cmd);

net/nfc/hci/core.c

192

if (pipe >= NFC_HCI_MAX_PIPES) {

net/nfc/hci/core.c

197

gate = hdev->pipes[pipe].gate;

net/nfc/hci/core.c

207

if (create_info->pipe >= NFC_HCI_MAX_PIPES) {

net/nfc/hci/core.c

217

hdev->gate2pipe[create_info->dest_gate] = create_info->pipe;

net/nfc/hci/core.c

218

hdev->pipes[create_info->pipe].gate = create_info->dest_gate;

net/nfc/hci/core.c

219

hdev->pipes[create_info->pipe].dest_host =

net/nfc/hci/core.c

235

if (delete_info->pipe >= NFC_HCI_MAX_PIPES) {

net/nfc/hci/core.c

240

hdev->pipes[delete_info->pipe].gate = NFC_HCI_INVALID_GATE;

net/nfc/hci/core.c

241

hdev->pipes[delete_info->pipe].dest_host = NFC_HCI_INVALID_HOST;

net/nfc/hci/core.c

258

hdev->ops->cmd_received(hdev, pipe, cmd, skb);

net/nfc/hci/core.c

261

nfc_hci_hcp_message_tx(hdev, pipe, NFC_HCI_HCP_RESPONSE,

net/nfc/hci/core.c

381

void nfc_hci_event_received(struct nfc_hci_dev *hdev, u8 pipe, u8 event,

net/nfc/hci/core.c

387

if (pipe >= NFC_HCI_MAX_PIPES) {

net/nfc/hci/core.c

388

pr_err("Discarded event %x to invalid pipe %x\n", event, pipe);

net/nfc/hci/core.c

392

gate = hdev->pipes[pipe].gate;

net/nfc/hci/core.c

394

pr_err("Discarded event %x to unopened pipe %x\n", event, pipe);

net/nfc/hci/core.c

399

r = hdev->ops->event_received(hdev, pipe, event, skb);

net/nfc/hci/core.c

455

gates->gate, gates->pipe);

net/nfc/hci/core.c

474

hdev->init_data.gates[0].pipe);

net/nfc/hci/core.c

860

u8 pipe;

net/nfc/hci/core.c

872

pipe = packet->header & NFC_HCI_FRAGMENT;

net/nfc/hci/core.c

888

skb_put_u8(hcp_skb, pipe);

net/nfc/hci/core.c

910

pipe = packet->header;

net/nfc/hci/core.c

914

nfc_hci_hcp_message_rx(hdev, pipe, type, instruction, hcp_skb);

net/nfc/hci/hci.h

13

u8 pipe;

net/nfc/hci/hci.h

53

u8 pipe;

net/nfc/hci/hci.h

57

u8 pipe;

net/nfc/hci/hci.h

70

int nfc_hci_hcp_message_tx(struct nfc_hci_dev *hdev, u8 pipe,

net/nfc/hci/hci.h

76

void nfc_hci_hcp_message_rx(struct nfc_hci_dev *hdev, u8 pipe, u8 type,

net/nfc/hci/hcp.c

117

void nfc_hci_hcp_message_rx(struct nfc_hci_dev *hdev, u8 pipe, u8 type,

net/nfc/hci/hcp.c

125

nfc_hci_cmd_received(hdev, pipe, instruction, skb);

net/nfc/hci/hcp.c

128

nfc_hci_event_received(hdev, pipe, instruction, skb);

net/nfc/hci/hcp.c

21

int nfc_hci_hcp_message_tx(struct nfc_hci_dev *hdev, u8 pipe,

net/nfc/hci/hcp.c

72

packet->header = pipe;

net/nfc/nci/hci.c

142

static int nci_hci_send_data(struct nci_dev *ndev, u8 pipe,

net/nfc/nci/hci.c

149

u8 cb = pipe;

net/nfc/nci/hci.c

203

nci_hci_send_data(ndev, data->pipe, data->cmd,

net/nfc/nci/hci.c

21

u8 pipe;

net/nfc/nci/hci.c

210

u8 pipe = ndev->hci_dev->gate2pipe[gate];

net/nfc/nci/hci.c

212

if (pipe == NCI_HCI_INVALID_PIPE)

net/nfc/nci/hci.c

215

return nci_hci_send_data(ndev, pipe,

net/nfc/nci/hci.c

229

u8 pipe = ndev->hci_dev->gate2pipe[gate];

net/nfc/nci/hci.c

231

if (pipe == NCI_HCI_INVALID_PIPE)

net/nfc/nci/hci.c

239

data.pipe = pipe;

net/nfc/nci/hci.c

274

static void nci_hci_event_received(struct nci_dev *ndev, u8 pipe,

net/nfc/nci/hci.c

278

ndev->ops->hci_event_received(ndev, pipe, event, skb);

net/nfc/nci/hci.c

281

static void nci_hci_cmd_received(struct nci_dev *ndev, u8 pipe,

net/nfc/nci/hci.c

284

u8 gate = ndev->hci_dev->pipes[pipe].gate;

net/nfc/nci/hci.c

291

pr_debug("from gate %x pipe %x cmd %x\n", gate, pipe, cmd);

net/nfc/nci/hci.c

301

new_pipe = create_info->pipe;

net/nfc/nci/hci.c

330

if (delete_info->pipe >= NCI_HCI_MAX_PIPES) {

net/nfc/nci/hci.c

335

ndev->hci_dev->pipes[delete_info->pipe].gate =

net/nfc/nci/hci.c

337

ndev->hci_dev->pipes[delete_info->pipe].host =

net/nfc/nci/hci.c

356

ndev->ops->hci_cmd_received(ndev, pipe, cmd, skb);

net/nfc/nci/hci.c

359

nci_hci_send_data(ndev, pipe, status, NULL, 0);

net/nfc/nci/hci.c

364

static void nci_hci_resp_received(struct nci_dev *ndev, u8 pipe,

net/nfc/nci/hci.c

38

u8 pipe;

net/nfc/nci/hci.c

382

static void nci_hci_hcp_message_rx(struct nci_dev *ndev, u8 pipe,

net/nfc/nci/hci.c

387

nci_hci_resp_received(ndev, pipe, skb);

net/nfc/nci/hci.c

390

nci_hci_cmd_received(ndev, pipe, instruction, skb);

net/nfc/nci/hci.c

393

nci_hci_event_received(ndev, pipe, instruction, skb);

net/nfc/nci/hci.c

411

u8 pipe, type, instruction;

net/nfc/nci/hci.c

415

pipe = NCI_HCP_MSG_GET_PIPE(skb->data[0]);

net/nfc/nci/hci.c

42

u8 pipe;

net/nfc/nci/hci.c

422

nci_hci_hcp_message_rx(hdev->ndev, pipe,

net/nfc/nci/hci.c

432

u8 pipe, type;

net/nfc/nci/hci.c

450

pipe = NCI_HCP_MSG_GET_PIPE(packet->header);

net/nfc/nci/hci.c

466

skb_put_u8(hcp_skb, pipe);

net/nfc/nci/hci.c

488

pipe = NCI_HCP_MSG_GET_PIPE(packet->header);

net/nfc/nci/hci.c

490

nci_hci_hcp_message_rx(ndev, pipe, type,

net/nfc/nci/hci.c

498

int nci_hci_open_pipe(struct nci_dev *ndev, u8 pipe)

net/nfc/nci/hci.c

508

data.pipe = pipe;

net/nfc/nci/hci.c

522

u8 pipe;

net/nfc/nci/hci.c

540

pipe = resp->pipe;

net/nfc/nci/hci.c

543

pr_debug("pipe created=%d\n", pipe);

net/nfc/nci/hci.c

545

if (pipe >= NCI_HCI_MAX_PIPES)

net/nfc/nci/hci.c

546

pipe = NCI_HCI_INVALID_PIPE;

net/nfc/nci/hci.c

547

return pipe;

net/nfc/nci/hci.c

550

static int nci_hci_delete_pipe(struct nci_dev *ndev, u8 pipe)

net/nfc/nci/hci.c

553

NCI_HCI_ADM_DELETE_PIPE, &pipe, 1, NULL);

net/nfc/nci/hci.c

564

u8 pipe = ndev->hci_dev->gate2pipe[gate];

net/nfc/nci/hci.c

568

if (pipe == NCI_HCI_INVALID_PIPE)

net/nfc/nci/hci.c

583

data.pipe = pipe;

net/nfc/nci/hci.c

610

u8 pipe = ndev->hci_dev->gate2pipe[gate];

net/nfc/nci/hci.c

614

if (pipe == NCI_HCI_INVALID_PIPE)

net/nfc/nci/hci.c

622

data.pipe = pipe;

net/nfc/nci/hci.c

646

u8 dest_host, u8 dest_gate, u8 pipe)

net/nfc/nci/hci.c

651

if (pipe == NCI_HCI_DO_NOT_OPEN_PIPE)

net/nfc/nci/hci.c

657

if (pipe != NCI_HCI_INVALID_PIPE)

net/nfc/nci/hci.c

662

pipe = NCI_HCI_LINK_MGMT_PIPE;

net/nfc/nci/hci.c

665

pipe = NCI_HCI_ADMIN_PIPE;

net/nfc/nci/hci.c

668

pipe = nci_hci_create_pipe(ndev, dest_host, dest_gate, &r);

net/nfc/nci/hci.c

669

if (pipe == NCI_HCI_INVALID_PIPE)

net/nfc/nci/hci.c

676

r = nci_hci_open_pipe(ndev, pipe);

net/nfc/nci/hci.c

679

if (nci_hci_delete_pipe(ndev, pipe) < 0) {

net/nfc/nci/hci.c

688

ndev->hci_dev->pipes[pipe].gate = dest_gate;

net/nfc/nci/hci.c

689

ndev->hci_dev->pipes[pipe].host = dest_host;

net/nfc/nci/hci.c

690

ndev->hci_dev->gate2pipe[dest_gate] = pipe;

net/nfc/nci/hci.c

704

gates->gate, gates->pipe);

net/nfc/nci/hci.c

737

ndev->hci_dev->init_data.gates[0].pipe);

net/smc/af_smc.c

3286

struct pipe_inode_info *pipe, size_t len,

net/smc/af_smc.c

3312

pipe, len, flags);

net/smc/af_smc.c

3323

rc = smc_rx_recvmsg(smc, NULL, pipe, len, flags);

net/smc/smc.h

67

struct pipe_inode_info *pipe, size_t len,

net/smc/smc_rx.c

114

static void smc_rx_pipe_buf_release(struct pipe_inode_info *pipe,

net/smc/smc_rx.c

138

static bool smc_rx_pipe_buf_get(struct pipe_inode_info *pipe,

net/smc/smc_rx.c

156

static int smc_rx_splice(struct pipe_inode_info *pipe, char *src, size_t len,

net/smc/smc_rx.c

219

bytes = splice_to_pipe(pipe, &spd);

net/smc/smc_rx.c

353

struct pipe_inode_info *pipe, size_t len, int flags)

net/smc/smc_rx.c

389

if (read_done >= target || (pipe && read_done))

net/smc/smc_rx.c

481

rc = smc_rx_splice(pipe, rcvbuf_base +

net/smc/smc_rx.h

23

struct pipe_inode_info *pipe, size_t len, int flags);

net/socket.c

1130

struct pipe_inode_info *pipe, size_t len,

net/socket.c

1138

return copy_splice_read(file, ppos, pipe, len, flags);

net/socket.c

1140

return ops->splice_read(sock, ppos, pipe, len, flags);

net/socket.c

134

struct pipe_inode_info *pipe, size_t len,

net/sunrpc/auth_gss/auth_gss.c

1000

rpc_destroy_pipe_data(p->pipe);

net/sunrpc/auth_gss/auth_gss.c

268

struct rpc_pipe *pipe;

net/sunrpc/auth_gss/auth_gss.c

317

__gss_find_upcall(struct rpc_pipe *pipe, kuid_t uid, const struct gss_auth *auth)

net/sunrpc/auth_gss/auth_gss.c

320

list_for_each_entry(pos, &pipe->in_downcall, list) {

net/sunrpc/auth_gss/auth_gss.c

338

struct rpc_pipe *pipe = gss_msg->pipe;

net/sunrpc/auth_gss/auth_gss.c

341

spin_lock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

342

old = __gss_find_upcall(pipe, gss_msg->uid, gss_msg->auth);

net/sunrpc/auth_gss/auth_gss.c

345

list_add(&gss_msg->list, &pipe->in_downcall);

net/sunrpc/auth_gss/auth_gss.c

348

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

364

struct rpc_pipe *pipe = gss_msg->pipe;

net/sunrpc/auth_gss/auth_gss.c

368

spin_lock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

371

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

398

struct rpc_pipe *pipe = gss_msg->pipe;

net/sunrpc/auth_gss/auth_gss.c

400

spin_lock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

402

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

539

gss_msg->pipe = gss_auth->gss_pipe[vers]->pipe;

net/sunrpc/auth_gss/auth_gss.c

579

res = rpc_queue_upcall(gss_new->pipe, &gss_new->msg);

net/sunrpc/auth_gss/auth_gss.c

605

struct rpc_pipe *pipe;

net/sunrpc/auth_gss/auth_gss.c

622

pipe = gss_msg->pipe;

net/sunrpc/auth_gss/auth_gss.c

623

spin_lock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

635

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

648

struct rpc_pipe *pipe;

net/sunrpc/auth_gss/auth_gss.c

678

pipe = gss_msg->pipe;

net/sunrpc/auth_gss/auth_gss.c

681

spin_lock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

685

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

698

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

709

gss_find_downcall(struct rpc_pipe *pipe, kuid_t uid)

net/sunrpc/auth_gss/auth_gss.c

712

list_for_each_entry(pos, &pipe->in_downcall, list) {

net/sunrpc/auth_gss/auth_gss.c

731

struct rpc_pipe *pipe = RPC_I(file_inode(filp))->pipe;

net/sunrpc/auth_gss/auth_gss.c

768

spin_lock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

769

gss_msg = gss_find_downcall(pipe, uid);

net/sunrpc/auth_gss/auth_gss.c

771

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

775

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

80

struct rpc_pipe *pipe;

net/sunrpc/auth_gss/auth_gss.c

803

spin_lock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

805

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

853

struct rpc_pipe *pipe = RPC_I(inode)->pipe;

net/sunrpc/auth_gss/auth_gss.c

857

spin_lock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

858

list_for_each_entry(gss_msg, &pipe->in_downcall, list) {

net/sunrpc/auth_gss/auth_gss.c

865

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

869

spin_unlock(&pipe->lock);

net/sunrpc/auth_gss/auth_gss.c

894

rpc_unlink(gss_pipe->pipe);

net/sunrpc/auth_gss/auth_gss.c

902

return rpc_mkpipe_dentry(dir, p->name, p->clnt, p->pipe);

net/sunrpc/auth_gss/auth_gss.c

920

p->pipe = rpc_mkpipe_data(upcall_ops, RPC_PIPE_WAIT_FOR_OPEN);

net/sunrpc/auth_gss/auth_gss.c

921

if (IS_ERR(p->pipe)) {

net/sunrpc/auth_gss/auth_gss.c

922

err = PTR_ERR(p->pipe);

net/sunrpc/rpc_pipe.c

1158

struct rpc_pipe *pipe = sn->gssd_dummy;

net/sunrpc/rpc_pipe.c

1160

return pipe->nreaders || pipe->nwriters;

net/sunrpc/rpc_pipe.c

1226

rpci->pipe = NULL;

net/sunrpc/rpc_pipe.c

135

rpc_queue_upcall(struct rpc_pipe *pipe, struct rpc_pipe_msg *msg)

net/sunrpc/rpc_pipe.c

140

spin_lock(&pipe->lock);

net/sunrpc/rpc_pipe.c

141

if (pipe->nreaders) {

net/sunrpc/rpc_pipe.c

142

list_add_tail(&msg->list, &pipe->pipe);

net/sunrpc/rpc_pipe.c

143

pipe->pipelen += msg->len;

net/sunrpc/rpc_pipe.c

145

} else if (pipe->flags & RPC_PIPE_WAIT_FOR_OPEN) {

net/sunrpc/rpc_pipe.c

146

if (list_empty(&pipe->pipe))

net/sunrpc/rpc_pipe.c

148

&pipe->queue_timeout,

net/sunrpc/rpc_pipe.c

150

list_add_tail(&msg->list, &pipe->pipe);

net/sunrpc/rpc_pipe.c

151

pipe->pipelen += msg->len;

net/sunrpc/rpc_pipe.c

154

dentry = dget(pipe->dentry);

net/sunrpc/rpc_pipe.c

155

spin_unlock(&pipe->lock);

net/sunrpc/rpc_pipe.c

174

struct rpc_pipe *pipe = RPC_I(inode)->pipe;

net/sunrpc/rpc_pipe.c

179

spin_lock(&pipe->lock);

net/sunrpc/rpc_pipe.c

180

need_release = pipe->nreaders != 0 || pipe->nwriters != 0;

net/sunrpc/rpc_pipe.c

181

pipe->nreaders = 0;

net/sunrpc/rpc_pipe.c

182

list_splice_init(&pipe->in_upcall, &free_list);

net/sunrpc/rpc_pipe.c

183

list_splice_init(&pipe->pipe, &free_list);

net/sunrpc/rpc_pipe.c

184

pipe->pipelen = 0;

net/sunrpc/rpc_pipe.c

185

pipe->dentry = NULL;

net/sunrpc/rpc_pipe.c

186

spin_unlock(&pipe->lock);

net/sunrpc/rpc_pipe.c

187

rpc_purge_list(&RPC_I(inode)->waitq, &free_list, pipe->ops->destroy_msg, -EPIPE);

net/sunrpc/rpc_pipe.c

188

pipe->nwriters = 0;

net/sunrpc/rpc_pipe.c

189

if (need_release && pipe->ops->release_pipe)

net/sunrpc/rpc_pipe.c

190

pipe->ops->release_pipe(inode);

net/sunrpc/rpc_pipe.c

191

cancel_delayed_work_sync(&pipe->queue_timeout);

net/sunrpc/rpc_pipe.c

193

RPC_I(inode)->pipe = NULL;

net/sunrpc/rpc_pipe.c

216

struct rpc_pipe *pipe;

net/sunrpc/rpc_pipe.c

221

pipe = RPC_I(inode)->pipe;

net/sunrpc/rpc_pipe.c

222

if (pipe == NULL)

net/sunrpc/rpc_pipe.c

224

first_open = pipe->nreaders == 0 && pipe->nwriters == 0;

net/sunrpc/rpc_pipe.c

225

if (first_open && pipe->ops->open_pipe) {

net/sunrpc/rpc_pipe.c

226

res = pipe->ops->open_pipe(inode);

net/sunrpc/rpc_pipe.c

231

pipe->nreaders++;

net/sunrpc/rpc_pipe.c

233

pipe->nwriters++;

net/sunrpc/rpc_pipe.c

243

struct rpc_pipe *pipe;

net/sunrpc/rpc_pipe.c

248

pipe = RPC_I(inode)->pipe;

net/sunrpc/rpc_pipe.c

249

if (pipe == NULL)

net/sunrpc/rpc_pipe.c

253

spin_lock(&pipe->lock);

net/sunrpc/rpc_pipe.c

256

spin_unlock(&pipe->lock);

net/sunrpc/rpc_pipe.c

257

pipe->ops->destroy_msg(msg);

net/sunrpc/rpc_pipe.c

260

pipe->nwriters --;

net/sunrpc/rpc_pipe.c

262

pipe->nreaders --;

net/sunrpc/rpc_pipe.c

263

if (pipe->nreaders == 0) {

net/sunrpc/rpc_pipe.c

265

spin_lock(&pipe->lock);

net/sunrpc/rpc_pipe.c

266

list_splice_init(&pipe->pipe, &free_list);

net/sunrpc/rpc_pipe.c

267

pipe->pipelen = 0;

net/sunrpc/rpc_pipe.c

268

spin_unlock(&pipe->lock);

net/sunrpc/rpc_pipe.c

270

pipe->ops->destroy_msg, -EAGAIN);

net/sunrpc/rpc_pipe.c

273

last_close = pipe->nwriters == 0 && pipe->nreaders == 0;

net/sunrpc/rpc_pipe.c

274

if (last_close && pipe->ops->release_pipe)

net/sunrpc/rpc_pipe.c

275

pipe->ops->release_pipe(inode);

net/sunrpc/rpc_pipe.c

285

struct rpc_pipe *pipe;

net/sunrpc/rpc_pipe.c

290

pipe = RPC_I(inode)->pipe;

net/sunrpc/rpc_pipe.c

291

if (pipe == NULL) {

net/sunrpc/rpc_pipe.c

297

spin_lock(&pipe->lock);

net/sunrpc/rpc_pipe.c

298

if (!list_empty(&pipe->pipe)) {

net/sunrpc/rpc_pipe.c

299

msg = list_entry(pipe->pipe.next,

net/sunrpc/rpc_pipe.c

302

list_move(&msg->list, &pipe->in_upcall);

net/sunrpc/rpc_pipe.c

303

pipe->pipelen -= msg->len;

net/sunrpc/rpc_pipe.c

307

spin_unlock(&pipe->lock);

net/sunrpc/rpc_pipe.c

312

res = pipe->ops->upcall(filp, msg, buf, len);

net/sunrpc/rpc_pipe.c

315

spin_lock(&pipe->lock);

net/sunrpc/rpc_pipe.c

317

spin_unlock(&pipe->lock);

net/sunrpc/rpc_pipe.c

318

pipe->ops->destroy_msg(msg);

net/sunrpc/rpc_pipe.c

333

if (RPC_I(inode)->pipe != NULL)

net/sunrpc/rpc_pipe.c

334

res = RPC_I(inode)->pipe->ops->downcall(filp, buf, len);

net/sunrpc/rpc_pipe.c

349

if (rpci->pipe == NULL)

net/sunrpc/rpc_pipe.c

351

else if (filp->private_data || !list_empty(&rpci->pipe->pipe))

net/sunrpc/rpc_pipe.c

361

struct rpc_pipe *pipe;

net/sunrpc/rpc_pipe.c

367

pipe = RPC_I(inode)->pipe;

net/sunrpc/rpc_pipe.c

368

if (pipe == NULL) {

net/sunrpc/rpc_pipe.c

372

spin_lock(&pipe->lock);

net/sunrpc/rpc_pipe.c

373

len = pipe->pipelen;

net/sunrpc/rpc_pipe.c

379

spin_unlock(&pipe->lock);

net/sunrpc/rpc_pipe.c

489

init_pipe(struct rpc_pipe *pipe)

net/sunrpc/rpc_pipe.c

491

pipe->nreaders = 0;

net/sunrpc/rpc_pipe.c

492

pipe->nwriters = 0;

net/sunrpc/rpc_pipe.c

493

INIT_LIST_HEAD(&pipe->in_upcall);

net/sunrpc/rpc_pipe.c

494

INIT_LIST_HEAD(&pipe->in_downcall);

net/sunrpc/rpc_pipe.c

495

INIT_LIST_HEAD(&pipe->pipe);

net/sunrpc/rpc_pipe.c

496

pipe->pipelen = 0;

net/sunrpc/rpc_pipe.c

497

INIT_DELAYED_WORK(&pipe->queue_timeout,

net/sunrpc/rpc_pipe.c

499

pipe->ops = NULL;

net/sunrpc/rpc_pipe.c

500

spin_lock_init(&pipe->lock);

net/sunrpc/rpc_pipe.c

501

pipe->dentry = NULL;

net/sunrpc/rpc_pipe.c

504

void rpc_destroy_pipe_data(struct rpc_pipe *pipe)

net/sunrpc/rpc_pipe.c

506

kfree(pipe);

net/sunrpc/rpc_pipe.c

512

struct rpc_pipe *pipe;

net/sunrpc/rpc_pipe.c

514

pipe = kzalloc_obj(struct rpc_pipe);

net/sunrpc/rpc_pipe.c

515

if (!pipe)

net/sunrpc/rpc_pipe.c

517

init_pipe(pipe);

net/sunrpc/rpc_pipe.c

518

pipe->ops = ops;

net/sunrpc/rpc_pipe.c

519

pipe->flags = flags;

net/sunrpc/rpc_pipe.c

520

return pipe;

net/sunrpc/rpc_pipe.c

636

void *private, struct rpc_pipe *pipe)

net/sunrpc/rpc_pipe.c

645

if (pipe->ops->upcall == NULL)

net/sunrpc/rpc_pipe.c

647

if (pipe->ops->downcall == NULL)

net/sunrpc/rpc_pipe.c

666

rpci->pipe = pipe;

net/sunrpc/rpc_pipe.c

668

pipe->dentry = dentry; // borrowed

net/sunrpc/rpc_pipe.c

690

rpc_unlink(struct rpc_pipe *pipe)

net/sunrpc/rpc_pipe.c

692

if (pipe->dentry) {

net/sunrpc/rpc_pipe.c

693

simple_recursive_removal(pipe->dentry, rpc_close_pipes);

net/sunrpc/rpc_pipe.c

694

pipe->dentry = NULL;

net/sunrpc/rpc_pipe.c

86

struct rpc_pipe *pipe =

net/sunrpc/rpc_pipe.c

91

spin_lock(&pipe->lock);

net/sunrpc/rpc_pipe.c

92

destroy_msg = pipe->ops->destroy_msg;

net/sunrpc/rpc_pipe.c

93

if (pipe->nreaders == 0) {

net/sunrpc/rpc_pipe.c

94

list_splice_init(&pipe->pipe, &free_list);

net/sunrpc/rpc_pipe.c

95

pipe->pipelen = 0;

net/sunrpc/rpc_pipe.c

97

dentry = dget(pipe->dentry);

net/sunrpc/rpc_pipe.c

98

spin_unlock(&pipe->lock);

net/tls/tls.h

167

struct pipe_inode_info *pipe,

net/tls/tls_sw.c

2258

struct pipe_inode_info *pipe,

net/tls/tls_sw.c

2307

copied = skb_splice_bits(skb, sk, rxm->offset, pipe, chunk, flags);

net/unix/af_unix.c

2736

struct pipe_inode_info *pipe;

net/unix/af_unix.c

3155

state->pipe, chunk, state->splice_flags);

net/unix/af_unix.c

3159

struct pipe_inode_info *pipe,

net/unix/af_unix.c

3165

.pipe = pipe,

net/vmw_vsock/hyperv_transport.c

311

conn_from_host = chan->offermsg.offer.u.pipe.user_def[0];

sound/drivers/vx/vx_cmd.h

226

static inline void vx_set_stream_cmd_params(struct vx_rmh *rmh, int is_capture, int pipe)

sound/drivers/vx/vx_cmd.h

230

rmh->Cmd[0] |= (((u32)pipe & MASK_FIRST_FIELD) << FIELD_SIZE) & MASK_DSP_WORD;

sound/drivers/vx/vx_pcm.c

100

vx_set_pcx_time(chip, &pipe->pcx_time, &rmh->Cmd[1]);

sound/drivers/vx/vx_pcm.c

1012

if ((pipe->hw_ptr % pipe->align) == 0)

sound/drivers/vx/vx_pcm.c

1016

vx_pcm_read_per_bytes(chip, runtime, pipe);

sound/drivers/vx/vx_pcm.c

1021

int align = pipe->align * 3;

sound/drivers/vx/vx_pcm.c

1024

vx_pseudo_dma_read(chip, runtime, pipe, space);

sound/drivers/vx/vx_pcm.c

103

if (pipe->differed_type & DC_NOTIFY_DELAY)

sound/drivers/vx/vx_pcm.c

1032

vx_pcm_read_per_bytes(chip, runtime, pipe);

sound/drivers/vx/vx_pcm.c

1040

vx_pcm_read_per_bytes(chip, runtime, pipe);

sound/drivers/vx/vx_pcm.c

1044

pipe->transferred += size;

sound/drivers/vx/vx_pcm.c

1045

if (pipe->transferred >= pipe->period_bytes) {

sound/drivers/vx/vx_pcm.c

1046

pipe->transferred %= pipe->period_bytes;

sound/drivers/vx/vx_pcm.c

1063

struct vx_pipe *pipe = runtime->private_data;

sound/drivers/vx/vx_pcm.c

1064

return bytes_to_frames(runtime, pipe->hw_ptr);

sound/drivers/vx/vx_pcm.c

107

if (pipe->differed_type & DC_MULTIPLE_DELAY)

sound/drivers/vx/vx_pcm.c

1085

struct vx_pipe *pipe;

sound/drivers/vx/vx_pcm.c

111

if (pipe->differed_type & DC_STREAM_TIME_DELAY)

sound/drivers/vx/vx_pcm.c

1120

pipe = chip->playback_pipes[p];

sound/drivers/vx/vx_pcm.c

1121

if (pipe && pipe->substream) {

sound/drivers/vx/vx_pcm.c

1122

vx_pcm_playback_update(chip, pipe->substream, pipe);

sound/drivers/vx/vx_pcm.c

1123

vx_pcm_playback_transfer(chip, pipe->substream, pipe, buf);

sound/drivers/vx/vx_pcm.c

1130

pipe = chip->capture_pipes[i];

sound/drivers/vx/vx_pcm.c

1131

if (pipe && pipe->substream)

sound/drivers/vx/vx_pcm.c

1132

vx_pcm_capture_update(chip, pipe->substream, pipe);

sound/drivers/vx/vx_pcm.c

123

static int vx_set_stream_format(struct vx_core *chip, struct vx_pipe *pipe,

sound/drivers/vx/vx_pcm.c

128

vx_init_rmh(&rmh, pipe->is_capture ?

sound/drivers/vx/vx_pcm.c

130

rmh.Cmd[0] |= pipe->number << FIELD_SIZE;

sound/drivers/vx/vx_pcm.c

133

vx_set_differed_time(chip, &rmh, pipe);

sound/drivers/vx/vx_pcm.c

150

static int vx_set_format(struct vx_core *chip, struct vx_pipe *pipe,

sound/drivers/vx/vx_pcm.c

173

return vx_set_stream_format(chip, pipe, header);

sound/drivers/vx/vx_pcm.c

211

static int vx_get_pipe_state(struct vx_core *chip, struct vx_pipe *pipe, int *state)

sound/drivers/vx/vx_pcm.c

217

vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);

sound/drivers/vx/vx_pcm.c

220

*state = (rmh.Stat[0] & (1 << pipe->number)) ? 1 : 0;

sound/drivers/vx/vx_pcm.c

236

static int vx_query_hbuffer_size(struct vx_core *chip, struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

242

vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);

sound/drivers/vx/vx_pcm.c

243

if (pipe->is_capture)

sound/drivers/vx/vx_pcm.c

260

static int vx_pipe_can_start(struct vx_core *chip, struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

266

vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);

sound/drivers/vx/vx_pcm.c

281

static int vx_conf_pipe(struct vx_core *chip, struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

286

if (pipe->is_capture)

sound/drivers/vx/vx_pcm.c

288

rmh.Cmd[1] = 1 << pipe->number;

sound/drivers/vx/vx_pcm.c

320

static int vx_toggle_pipe(struct vx_core *chip, struct vx_pipe *pipe, int state)

sound/drivers/vx/vx_pcm.c

325

if (vx_get_pipe_state(chip, pipe, &cur_state) < 0)

sound/drivers/vx/vx_pcm.c

336

err = vx_pipe_can_start(chip, pipe);

sound/drivers/vx/vx_pcm.c

346

err = vx_conf_pipe(chip, pipe);

sound/drivers/vx/vx_pcm.c

359

err = vx_get_pipe_state(chip, pipe, &cur_state);

sound/drivers/vx/vx_pcm.c

375

static int vx_stop_pipe(struct vx_core *chip, struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

379

vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);

sound/drivers/vx/vx_pcm.c

398

struct vx_pipe *pipe;

sound/drivers/vx/vx_pcm.c

417

pipe = kzalloc_obj(*pipe);

sound/drivers/vx/vx_pcm.c

418

if (! pipe) {

sound/drivers/vx/vx_pcm.c

427

pipe->number = audioid;

sound/drivers/vx/vx_pcm.c

428

pipe->is_capture = capture;

sound/drivers/vx/vx_pcm.c

429

pipe->channels = num_audio;

sound/drivers/vx/vx_pcm.c

430

pipe->differed_type = 0;

sound/drivers/vx/vx_pcm.c

431

pipe->pcx_time = 0;

sound/drivers/vx/vx_pcm.c

432

pipe->data_mode = data_mode;

sound/drivers/vx/vx_pcm.c

433

*pipep = pipe;

sound/drivers/vx/vx_pcm.c

443

static int vx_free_pipe(struct vx_core *chip, struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

448

vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);

sound/drivers/vx/vx_pcm.c

451

kfree(pipe);

sound/drivers/vx/vx_pcm.c

46

struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

461

static int vx_start_stream(struct vx_core *chip, struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

466

vx_set_stream_cmd_params(&rmh, pipe->is_capture, pipe->number);

sound/drivers/vx/vx_pcm.c

467

vx_set_differed_time(chip, &rmh, pipe);

sound/drivers/vx/vx_pcm.c

477

static int vx_stop_stream(struct vx_core *chip, struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

48

int offset = pipe->hw_ptr;

sound/drivers/vx/vx_pcm.c

482

vx_set_stream_cmd_params(&rmh, pipe->is_capture, pipe->number);

sound/drivers/vx/vx_pcm.c

51

if (++offset >= pipe->buffer_bytes) {

sound/drivers/vx/vx_pcm.c

518

struct vx_pipe *pipe = NULL;

sound/drivers/vx/vx_pcm.c

530

pipe = chip->playback_pipes[audio];

sound/drivers/vx/vx_pcm.c

531

if (! pipe) {

sound/drivers/vx/vx_pcm.c

533

err = vx_alloc_pipe(chip, 0, audio, 2, &pipe); /* stereo playback */

sound/drivers/vx/vx_pcm.c

538

pipe->references++;

sound/drivers/vx/vx_pcm.c

540

pipe->substream = subs;

sound/drivers/vx/vx_pcm.c

541

chip->playback_pipes[audio] = pipe;

sound/drivers/vx/vx_pcm.c

545

runtime->private_data = pipe;

sound/drivers/vx/vx_pcm.c

56

if (++offset >= pipe->buffer_bytes) {

sound/drivers/vx/vx_pcm.c

560

struct vx_pipe *pipe;

sound/drivers/vx/vx_pcm.c

565

pipe = subs->runtime->private_data;

sound/drivers/vx/vx_pcm.c

567

if (--pipe->references == 0) {

sound/drivers/vx/vx_pcm.c

568

chip->playback_pipes[pipe->number] = NULL;

sound/drivers/vx/vx_pcm.c

569

vx_free_pipe(chip, pipe);

sound/drivers/vx/vx_pcm.c

583

static int vx_notify_end_of_buffer(struct vx_core *chip, struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

591

vx_set_stream_cmd_params(&rmh, 0, pipe->number);

sound/drivers/vx/vx_pcm.c

61

if (++offset >= pipe->buffer_bytes) {

sound/drivers/vx/vx_pcm.c

613

struct vx_pipe *pipe, int size)

sound/drivers/vx/vx_pcm.c

617

space = vx_query_hbuffer_size(chip, pipe);

sound/drivers/vx/vx_pcm.c

634

vx_pseudo_dma_write(chip, runtime, pipe, size);

sound/drivers/vx/vx_pcm.c

635

err = vx_notify_end_of_buffer(chip, pipe);

sound/drivers/vx/vx_pcm.c

64

pipe->hw_ptr = offset;

sound/drivers/vx/vx_pcm.c

650

struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

657

vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0);

sound/drivers/vx/vx_pcm.c

663

update = (int)(count - pipe->cur_count);

sound/drivers/vx/vx_pcm.c

664

pipe->cur_count = count;

sound/drivers/vx/vx_pcm.c

665

pipe->position += update;

sound/drivers/vx/vx_pcm.c

666

if (pipe->position >= (int)runtime->buffer_size)

sound/drivers/vx/vx_pcm.c

667

pipe->position %= runtime->buffer_size;

sound/drivers/vx/vx_pcm.c

668

pipe->transferred += update;

sound/drivers/vx/vx_pcm.c

678

struct vx_pipe *pipe, int nchunks)

sound/drivers/vx/vx_pcm.c

683

if (! pipe->prepared || (chip->chip_status & VX_STAT_IS_STALE))

sound/drivers/vx/vx_pcm.c

686

err = vx_pcm_playback_transfer_chunk(chip, runtime, pipe,

sound/drivers/vx/vx_pcm.c

699

struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

704

if (pipe->running && ! (chip->chip_status & VX_STAT_IS_STALE)) {

sound/drivers/vx/vx_pcm.c

705

err = vx_update_pipe_position(chip, runtime, pipe);

sound/drivers/vx/vx_pcm.c

708

if (pipe->transferred >= (int)runtime->period_size) {

sound/drivers/vx/vx_pcm.c

709

pipe->transferred %= runtime->period_size;

sound/drivers/vx/vx_pcm.c

721

struct vx_pipe *pipe = subs->runtime->private_data;

sound/drivers/vx/vx_pcm.c

730

if (! pipe->is_capture)

sound/drivers/vx/vx_pcm.c

731

vx_pcm_playback_transfer(chip, subs, pipe, 2);

sound/drivers/vx/vx_pcm.c

732

err = vx_start_stream(chip, pipe);

sound/drivers/vx/vx_pcm.c

737

err = vx_toggle_pipe(chip, pipe, 1);

sound/drivers/vx/vx_pcm.c

740

vx_stop_stream(chip, pipe);

sound/drivers/vx/vx_pcm.c

744

pipe->running = 1;

sound/drivers/vx/vx_pcm.c

748

vx_toggle_pipe(chip, pipe, 0);

sound/drivers/vx/vx_pcm.c

749

vx_stop_pipe(chip, pipe);

sound/drivers/vx/vx_pcm.c

750

vx_stop_stream(chip, pipe);

sound/drivers/vx/vx_pcm.c

752

pipe->running = 0;

sound/drivers/vx/vx_pcm.c

755

err = vx_toggle_pipe(chip, pipe, 0);

sound/drivers/vx/vx_pcm.c

760

err = vx_toggle_pipe(chip, pipe, 1);

sound/drivers/vx/vx_pcm.c

776

struct vx_pipe *pipe = runtime->private_data;

sound/drivers/vx/vx_pcm.c

777

return pipe->position;

sound/drivers/vx/vx_pcm.c

787

struct vx_pipe *pipe = runtime->private_data;

sound/drivers/vx/vx_pcm.c

795

if (data_mode != pipe->data_mode && ! pipe->is_capture) {

sound/drivers/vx/vx_pcm.c

802

vx_set_pipe_cmd_params(&rmh, 0, pipe->number, 0);

sound/drivers/vx/vx_pcm.c

807

vx_set_pipe_cmd_params(&rmh, 0, pipe->number, pipe->channels);

sound/drivers/vx/vx_pcm.c

813

pipe->data_mode = data_mode;

sound/drivers/vx/vx_pcm.c

824

err = vx_set_format(chip, pipe, runtime);

sound/drivers/vx/vx_pcm.c

829

pipe->align = 2; /* 16bit word */

sound/drivers/vx/vx_pcm.c

831

pipe->align = 4; /* 32bit word */

sound/drivers/vx/vx_pcm.c

834

pipe->buffer_bytes = frames_to_bytes(runtime, runtime->buffer_size);

sound/drivers/vx/vx_pcm.c

835

pipe->period_bytes = frames_to_bytes(runtime, runtime->period_size);

sound/drivers/vx/vx_pcm.c

836

pipe->hw_ptr = 0;

sound/drivers/vx/vx_pcm.c

839

vx_update_pipe_position(chip, runtime, pipe);

sound/drivers/vx/vx_pcm.c

841

pipe->transferred = 0;

sound/drivers/vx/vx_pcm.c

842

pipe->position = 0;

sound/drivers/vx/vx_pcm.c

844

pipe->prepared = 1;

sound/drivers/vx/vx_pcm.c

893

struct vx_pipe *pipe;

sound/drivers/vx/vx_pcm.c

90

struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

904

err = vx_alloc_pipe(chip, 1, audio, 2, &pipe);

sound/drivers/vx/vx_pcm.c

907

pipe->substream = subs;

sound/drivers/vx/vx_pcm.c

908

chip->capture_pipes[audio] = pipe;

sound/drivers/vx/vx_pcm.c

93

if (! (pipe->differed_type & DC_DIFFERED_DELAY))

sound/drivers/vx/vx_pcm.c

932

pipe->monitoring_pipe = pipe_out_monitoring; /* default value NULL */

sound/drivers/vx/vx_pcm.c

936

runtime->private_data = pipe;

sound/drivers/vx/vx_pcm.c

951

struct vx_pipe *pipe;

sound/drivers/vx/vx_pcm.c

956

pipe = subs->runtime->private_data;

sound/drivers/vx/vx_pcm.c

957

chip->capture_pipes[pipe->number] = NULL;

sound/drivers/vx/vx_pcm.c

959

pipe_out_monitoring = pipe->monitoring_pipe;

sound/drivers/vx/vx_pcm.c

968

chip->playback_pipes[pipe->number] = NULL;

sound/drivers/vx/vx_pcm.c

969

pipe->monitoring_pipe = NULL;

sound/drivers/vx/vx_pcm.c

973

vx_free_pipe(chip, pipe);

sound/drivers/vx/vx_pcm.c

985

struct vx_pipe *pipe)

sound/drivers/vx/vx_pcm.c

990

if (!pipe->running || (chip->chip_status & VX_STAT_IS_STALE))

sound/drivers/vx/vx_pcm.c

997

space = vx_query_hbuffer_size(chip, pipe);

sound/hda/codecs/hdmi/intelhdmi.c

157

static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)

sound/hda/codecs/hdmi/intelhdmi.c

161

int dev_id = pipe;

sound/hda/core/component.c

123

int port, pipe;

sound/hda/core/component.c

133

pipe = dev_id;

sound/hda/core/component.c

134

return acomp->ops->sync_audio_rate(acomp->dev, port, pipe, rate);

sound/hda/core/component.c

164

int port, pipe;

sound/hda/core/component.c

175

pipe = dev_id;

sound/hda/core/component.c

176

return acomp->ops->get_eld(acomp->dev, port, pipe, audio_enabled,

sound/pci/echoaudio/echoaudio.c

1787

struct audiopipe *pipe = runtime->private_data;

sound/pci/echoaudio/echoaudio.c

1791

if (pipe->state != PIPE_STATE_STARTED)

sound/pci/echoaudio/echoaudio.c

1796

counter = le32_to_cpu(*pipe->dma_counter); /* presumed atomic */

sound/pci/echoaudio/echoaudio.c

1798

step = counter - pipe->last_period; /* handles wrapping */

sound/pci/echoaudio/echoaudio.c

1804

pipe->last_period += step; /* used exclusively by us */

sound/pci/echoaudio/echoaudio.c

259

struct audiopipe *pipe;

sound/pci/echoaudio/echoaudio.c

268

pipe = kzalloc_obj(struct audiopipe);

sound/pci/echoaudio/echoaudio.c

269

if (!pipe)

sound/pci/echoaudio/echoaudio.c

271

pipe->index = -1; /* Not configured yet */

sound/pci/echoaudio/echoaudio.c

274

memcpy(&pipe->hw, &pcm_hardware_skel, sizeof(struct snd_pcm_hardware));

sound/pci/echoaudio/echoaudio.c

276

pipe->constr.list = channels_list;

sound/pci/echoaudio/echoaudio.c

277

pipe->constr.mask = 0;

sound/pci/echoaudio/echoaudio.c

279

pipe->constr.count = i;

sound/pci/echoaudio/echoaudio.c

280

if (pipe->hw.channels_max > max_channels)

sound/pci/echoaudio/echoaudio.c

281

pipe->hw.channels_max = max_channels;

sound/pci/echoaudio/echoaudio.c

283

pipe->hw.rate_max = 48000;

sound/pci/echoaudio/echoaudio.c

284

pipe->hw.rates &= SNDRV_PCM_RATE_8000_48000;

sound/pci/echoaudio/echoaudio.c

287

runtime->hw = pipe->hw;

sound/pci/echoaudio/echoaudio.c

288

runtime->private_data = pipe;

sound/pci/echoaudio/echoaudio.c

295

&pipe->constr);

sound/pci/echoaudio/echoaudio.c

327

PAGE_SIZE, &pipe->sgpage);

sound/pci/echoaudio/echoaudio.c

526

struct audiopipe *pipe;

sound/pci/echoaudio/echoaudio.c

529

pipe = (struct audiopipe *) substream->runtime->private_data;

sound/pci/echoaudio/echoaudio.c

535

if (pipe->index >= 0) {

sound/pci/echoaudio/echoaudio.c

536

dev_dbg(chip->card->dev, "hwp_ie free(%d)\n", pipe->index);

sound/pci/echoaudio/echoaudio.c

537

err = free_pipes(chip, pipe);

sound/pci/echoaudio/echoaudio.c

539

chip->substream[pipe->index] = NULL;

sound/pci/echoaudio/echoaudio.c

542

err = allocate_pipes(chip, pipe, pipe_index, interleave);

sound/pci/echoaudio/echoaudio.c

556

sglist_init(chip, pipe);

sound/pci/echoaudio/echoaudio.c

567

sglist_add_mapping(chip, pipe, addr, rest);

sound/pci/echoaudio/echoaudio.c

568

sglist_add_irq(chip, pipe);

sound/pci/echoaudio/echoaudio.c

572

sglist_add_mapping(chip, pipe, addr,

sound/pci/echoaudio/echoaudio.c

585

sglist_wrap(chip, pipe);

sound/pci/echoaudio/echoaudio.c

590

pipe->last_period = 0;

sound/pci/echoaudio/echoaudio.c

591

pipe->last_counter = 0;

sound/pci/echoaudio/echoaudio.c

592

pipe->position = 0;

sound/pci/echoaudio/echoaudio.c

654

struct audiopipe *pipe;

sound/pci/echoaudio/echoaudio.c

657

pipe = (struct audiopipe *) substream->runtime->private_data;

sound/pci/echoaudio/echoaudio.c

660

if (pipe->index >= 0) {

sound/pci/echoaudio/echoaudio.c

661

dev_dbg(chip->card->dev, "pcm_hw_free(%d)\n", pipe->index);

sound/pci/echoaudio/echoaudio.c

662

free_pipes(chip, pipe);

sound/pci/echoaudio/echoaudio.c

663

chip->substream[pipe->index] = NULL;

sound/pci/echoaudio/echoaudio.c

664

pipe->index = -1;

sound/pci/echoaudio/echoaudio.c

730

struct audiopipe *pipe;

sound/pci/echoaudio/echoaudio.c

751

pipe = chip->substream[i]->runtime->private_data;

sound/pci/echoaudio/echoaudio.c

752

switch (pipe->state) {

sound/pci/echoaudio/echoaudio.c

754

pipe->last_period = 0;

sound/pci/echoaudio/echoaudio.c

755

pipe->last_counter = 0;

sound/pci/echoaudio/echoaudio.c

756

pipe->position = 0;

sound/pci/echoaudio/echoaudio.c

757

*pipe->dma_counter = 0;

sound/pci/echoaudio/echoaudio.c

760

pipe->state = PIPE_STATE_STARTED;

sound/pci/echoaudio/echoaudio.c

774

pipe = chip->substream[i]->runtime->private_data;

sound/pci/echoaudio/echoaudio.c

775

pipe->state = PIPE_STATE_STOPPED;

sound/pci/echoaudio/echoaudio.c

783

pipe = chip->substream[i]->runtime->private_data;

sound/pci/echoaudio/echoaudio.c

784

pipe->state = PIPE_STATE_PAUSED;

sound/pci/echoaudio/echoaudio.c

800

struct audiopipe *pipe = runtime->private_data;

sound/pci/echoaudio/echoaudio.c

808

counter = le32_to_cpu(*pipe->dma_counter); /* presumed atomic */

sound/pci/echoaudio/echoaudio.c

810

step = counter - pipe->last_counter; /* handles wrapping */

sound/pci/echoaudio/echoaudio.c

811

pipe->last_counter = counter;

sound/pci/echoaudio/echoaudio.c

817

pipe->position += step;

sound/pci/echoaudio/echoaudio.c

818

pipe->position %= frames_to_bytes(runtime, runtime->buffer_size); /* wrap */

sound/pci/echoaudio/echoaudio.c

820

return bytes_to_frames(runtime, pipe->position);

sound/pci/echoaudio/echoaudio.c

87

struct audiopipe *pipe = runtime->private_data;

sound/pci/echoaudio/echoaudio.c

89

if (pipe->sgpage.area)

sound/pci/echoaudio/echoaudio.c

90

snd_dma_free_pages(&pipe->sgpage);

sound/pci/echoaudio/echoaudio.c

91

kfree(pipe);

sound/pci/echoaudio/echoaudio.h

421

static int free_pipes(struct echoaudio *chip, struct audiopipe *pipe);

sound/pci/echoaudio/echoaudio_dsp.c

1039

static int allocate_pipes(struct echoaudio *chip, struct audiopipe *pipe,

sound/pci/echoaudio/echoaudio_dsp.c

1063

pipe->index = pipe_index;

sound/pci/echoaudio/echoaudio_dsp.c

1064

pipe->interleave = interleave;

sound/pci/echoaudio/echoaudio_dsp.c

1065

pipe->state = PIPE_STATE_STOPPED;

sound/pci/echoaudio/echoaudio_dsp.c

1070

pipe->dma_counter = (__le32 *)&chip->comm_page->position[pipe_index];

sound/pci/echoaudio/echoaudio_dsp.c

1071

*pipe->dma_counter = 0;

sound/pci/echoaudio/echoaudio_dsp.c

1077

static int free_pipes(struct echoaudio *chip, struct audiopipe *pipe)

sound/pci/echoaudio/echoaudio_dsp.c

1082

if (snd_BUG_ON(!is_pipe_allocated(chip, pipe->index)))

sound/pci/echoaudio/echoaudio_dsp.c

1084

if (snd_BUG_ON(pipe->state != PIPE_STATE_STOPPED))

sound/pci/echoaudio/echoaudio_dsp.c

1087

for (channel_mask = i = 0; i < pipe->interleave; i++)

sound/pci/echoaudio/echoaudio_dsp.c

1088

channel_mask |= 1 << (pipe->index + i);

sound/pci/echoaudio/echoaudio_dsp.c

1101

static int sglist_init(struct echoaudio *chip, struct audiopipe *pipe)

sound/pci/echoaudio/echoaudio_dsp.c

1103

pipe->sglist_head = 0;

sound/pci/echoaudio/echoaudio_dsp.c

1104

memset(pipe->sgpage.area, 0, PAGE_SIZE);

sound/pci/echoaudio/echoaudio_dsp.c

1105

chip->comm_page->sglist_addr[pipe->index].addr =

sound/pci/echoaudio/echoaudio_dsp.c

1106

cpu_to_le32(pipe->sgpage.addr);

sound/pci/echoaudio/echoaudio_dsp.c

1112

static int sglist_add_mapping(struct echoaudio *chip, struct audiopipe *pipe,

sound/pci/echoaudio/echoaudio_dsp.c

1115

int head = pipe->sglist_head;

sound/pci/echoaudio/echoaudio_dsp.c

1116

struct sg_entry *list = (struct sg_entry *)pipe->sgpage.area;

sound/pci/echoaudio/echoaudio_dsp.c

1121

pipe->sglist_head++;

sound/pci/echoaudio/echoaudio_dsp.c

1131

static inline int sglist_add_irq(struct echoaudio *chip, struct audiopipe *pipe)

sound/pci/echoaudio/echoaudio_dsp.c

1133

return sglist_add_mapping(chip, pipe, 0, 0);

sound/pci/echoaudio/echoaudio_dsp.c

1138

static inline int sglist_wrap(struct echoaudio *chip, struct audiopipe *pipe)

sound/pci/echoaudio/echoaudio_dsp.c

1140

return sglist_add_mapping(chip, pipe, pipe->sgpage.addr, 0);

sound/pci/echoaudio/indigo_dsp.c

121

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/echoaudio/indigo_dsp.c

126

if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||

sound/pci/echoaudio/indigo_dsp.c

133

chip->vmixer_gain[output][pipe] = gain;

sound/pci/echoaudio/indigo_dsp.c

134

index = output * num_pipes_out(chip) + pipe;

sound/pci/echoaudio/indigo_dsp.c

138

"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);

sound/pci/echoaudio/indigo_dsp.c

17

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/echoaudio/indigo_express_dsp.c

62

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/echoaudio/indigo_express_dsp.c

67

if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||

sound/pci/echoaudio/indigo_express_dsp.c

74

chip->vmixer_gain[output][pipe] = gain;

sound/pci/echoaudio/indigo_express_dsp.c

75

index = output * num_pipes_out(chip) + pipe;

sound/pci/echoaudio/indigo_express_dsp.c

79

"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);

sound/pci/echoaudio/indigodj_dsp.c

121

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/echoaudio/indigodj_dsp.c

126

if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||

sound/pci/echoaudio/indigodj_dsp.c

133

chip->vmixer_gain[output][pipe] = gain;

sound/pci/echoaudio/indigodj_dsp.c

134

index = output * num_pipes_out(chip) + pipe;

sound/pci/echoaudio/indigodj_dsp.c

138

"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);

sound/pci/echoaudio/indigodj_dsp.c

17

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/echoaudio/indigodjx_dsp.c

16

u16 pipe, int gain);

sound/pci/echoaudio/indigoio_dsp.c

103

chip->vmixer_gain[output][pipe] = gain;

sound/pci/echoaudio/indigoio_dsp.c

104

index = output * num_pipes_out(chip) + pipe;

sound/pci/echoaudio/indigoio_dsp.c

108

"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);

sound/pci/echoaudio/indigoio_dsp.c

17

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/echoaudio/indigoio_dsp.c

91

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/echoaudio/indigoio_dsp.c

96

if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||

sound/pci/echoaudio/indigoiox_dsp.c

16

u16 pipe, int gain);

sound/pci/echoaudio/mia_dsp.c

155

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/echoaudio/mia_dsp.c

160

if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||

sound/pci/echoaudio/mia_dsp.c

167

chip->vmixer_gain[output][pipe] = gain;

sound/pci/echoaudio/mia_dsp.c

168

index = output * num_pipes_out(chip) + pipe;

sound/pci/echoaudio/mia_dsp.c

172

"set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);

sound/pci/echoaudio/mia_dsp.c

20

static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,

sound/pci/lx6464es/lx_core.c

406

#define PIPE_INFO_TO_CMD(capture, pipe) \

sound/pci/lx6464es/lx_core.c

407

((u32)((u32)(pipe) | ((capture) ? ID_IS_CAPTURE : 0L)) << ID_OFFSET)

sound/pci/lx6464es/lx_core.c

412

int lx_pipe_allocate(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.c

416

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

432

int lx_pipe_release(struct lx6464es *chip, u32 pipe, int is_capture)

sound/pci/lx6464es/lx_core.c

434

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

444

int lx_buffer_ask(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.c

448

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

495

int lx_pipe_stop(struct lx6464es *chip, u32 pipe, int is_capture)

sound/pci/lx6464es/lx_core.c

497

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

507

static int lx_pipe_toggle_state(struct lx6464es *chip, u32 pipe, int is_capture)

sound/pci/lx6464es/lx_core.c

509

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

520

int lx_pipe_start(struct lx6464es *chip, u32 pipe, int is_capture)

sound/pci/lx6464es/lx_core.c

524

err = lx_pipe_wait_for_idle(chip, pipe, is_capture);

sound/pci/lx6464es/lx_core.c

528

err = lx_pipe_toggle_state(chip, pipe, is_capture);

sound/pci/lx6464es/lx_core.c

533

int lx_pipe_pause(struct lx6464es *chip, u32 pipe, int is_capture)

sound/pci/lx6464es/lx_core.c

537

err = lx_pipe_wait_for_start(chip, pipe, is_capture);

sound/pci/lx6464es/lx_core.c

541

err = lx_pipe_toggle_state(chip, pipe, is_capture);

sound/pci/lx6464es/lx_core.c

547

int lx_pipe_sample_count(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.c

551

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

573

int lx_pipe_state(struct lx6464es *chip, u32 pipe, int is_capture, u16 *rstate)

sound/pci/lx6464es/lx_core.c

576

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

593

static int lx_pipe_wait_for_state(struct lx6464es *chip, u32 pipe,

sound/pci/lx6464es/lx_core.c

602

int err = lx_pipe_state(chip, pipe, is_capture, &current_state);

sound/pci/lx6464es/lx_core.c

616

int lx_pipe_wait_for_start(struct lx6464es *chip, u32 pipe, int is_capture)

sound/pci/lx6464es/lx_core.c

618

return lx_pipe_wait_for_state(chip, pipe, is_capture, PSTATE_RUN);

sound/pci/lx6464es/lx_core.c

621

int lx_pipe_wait_for_idle(struct lx6464es *chip, u32 pipe, int is_capture)

sound/pci/lx6464es/lx_core.c

623

return lx_pipe_wait_for_state(chip, pipe, is_capture, PSTATE_IDLE);

sound/pci/lx6464es/lx_core.c

627

int lx_stream_set_state(struct lx6464es *chip, u32 pipe,

sound/pci/lx6464es/lx_core.c

630

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

642

u32 pipe, int is_capture)

sound/pci/lx6464es/lx_core.c

644

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

665

int lx_stream_state(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.c

669

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

683

int lx_stream_sample_position(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.c

687

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

704

int lx_buffer_give(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.c

709

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

750

int lx_buffer_free(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.c

754

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.c

771

int lx_buffer_cancel(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.c

774

u32 pipe_cmd = PIPE_INFO_TO_CMD(is_capture, pipe);

sound/pci/lx6464es/lx_core.h

105

int lx_pipe_allocate(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.h

107

int lx_pipe_release(struct lx6464es *chip, u32 pipe, int is_capture);

sound/pci/lx6464es/lx_core.h

108

int lx_pipe_sample_count(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.h

110

int lx_pipe_state(struct lx6464es *chip, u32 pipe, int is_capture, u16 *rstate);

sound/pci/lx6464es/lx_core.h

111

int lx_pipe_stop(struct lx6464es *chip, u32 pipe, int is_capture);

sound/pci/lx6464es/lx_core.h

112

int lx_pipe_start(struct lx6464es *chip, u32 pipe, int is_capture);

sound/pci/lx6464es/lx_core.h

113

int lx_pipe_pause(struct lx6464es *chip, u32 pipe, int is_capture);

sound/pci/lx6464es/lx_core.h

115

int lx_pipe_wait_for_start(struct lx6464es *chip, u32 pipe, int is_capture);

sound/pci/lx6464es/lx_core.h

116

int lx_pipe_wait_for_idle(struct lx6464es *chip, u32 pipe, int is_capture);

sound/pci/lx6464es/lx_core.h

120

u32 pipe, int is_capture);

sound/pci/lx6464es/lx_core.h

121

int lx_stream_state(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.h

123

int lx_stream_sample_position(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.h

126

int lx_stream_set_state(struct lx6464es *chip, u32 pipe,

sound/pci/lx6464es/lx_core.h

129

static inline int lx_stream_start(struct lx6464es *chip, u32 pipe,

sound/pci/lx6464es/lx_core.h

132

return lx_stream_set_state(chip, pipe, is_capture, SSTATE_RUN);

sound/pci/lx6464es/lx_core.h

135

static inline int lx_stream_pause(struct lx6464es *chip, u32 pipe,

sound/pci/lx6464es/lx_core.h

138

return lx_stream_set_state(chip, pipe, is_capture, SSTATE_PAUSE);

sound/pci/lx6464es/lx_core.h

141

static inline int lx_stream_stop(struct lx6464es *chip, u32 pipe,

sound/pci/lx6464es/lx_core.h

144

return lx_stream_set_state(chip, pipe, is_capture, SSTATE_STOP);

sound/pci/lx6464es/lx_core.h

148

int lx_buffer_ask(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.h

150

int lx_buffer_give(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.h

153

int lx_buffer_free(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/lx6464es/lx_core.h

155

int lx_buffer_cancel(struct lx6464es *chip, u32 pipe, int is_capture,

sound/pci/mixart/mixart.c

101

group_state.pipe_uid = pipe->group_uid;

sound/pci/mixart/mixart.c

108

request.uid = pipe->group_uid; /*(struct mixart_uid){0,0};*/

sound/pci/mixart/mixart.c

148

pipe->status = PIPE_RUNNING;

sound/pci/mixart/mixart.c

151

pipe->status = PIPE_STOPPED;

sound/pci/mixart/mixart.c

158

struct mixart_pipe *pipe, unsigned int rate)

sound/pci/mixart/mixart.c

165

switch(pipe->status) {

sound/pci/mixart/mixart.c

188

clock_properties.uid_caller = pipe->group_uid;

sound/pci/mixart/mixart.c

205

if(rate) pipe->status = PIPE_CLOCK_SET;

sound/pci/mixart/mixart.c

206

else pipe->status = PIPE_RUNNING;

sound/pci/mixart/mixart.c

220

struct mixart_pipe *pipe;

sound/pci/mixart/mixart.c

225

pipe = &(chip->pipe_in_ana); /* analog inputs */

sound/pci/mixart/mixart.c

227

pipe = &(chip->pipe_in_dig); /* digital inputs */

sound/pci/mixart/mixart.c

233

pipe = &(chip->pipe_out_ana); /* analog outputs */

sound/pci/mixart/mixart.c

235

pipe = &(chip->pipe_out_dig); /* digital outputs */

sound/pci/mixart/mixart.c

242

if( (monitoring == 0) && (pipe->references >= stream_count) ) {

sound/pci/mixart/mixart.c

247

if( pipe->status == PIPE_UNDEFINED ) {

sound/pci/mixart/mixart.c

271

buf->sgroup_req.connector = pipe->uid_left_connector; /* the left connector */

sound/pci/mixart/mixart.c

313

pipe->group_uid = buf->sgroup_resp.group; /* id of the pipe, as returned by embedded */

sound/pci/mixart/mixart.c

314

pipe->stream_count = buf->sgroup_resp.stream_count;

sound/pci/mixart/mixart.c

317

pipe->status = PIPE_STOPPED;

sound/pci/mixart/mixart.c

321

if(monitoring) pipe->monitoring = 1;

sound/pci/mixart/mixart.c

322

else pipe->references++;

sound/pci/mixart/mixart.c

324

return pipe;

sound/pci/mixart/mixart.c

329

struct mixart_pipe *pipe, int monitoring)

sound/pci/mixart/mixart.c

333

if(pipe->status == PIPE_UNDEFINED)

sound/pci/mixart/mixart.c

337

pipe->monitoring = 0;

sound/pci/mixart/mixart.c

339

pipe->references--;

sound/pci/mixart/mixart.c

341

if((pipe->references <= 0) && (pipe->monitoring == 0)) {

sound/pci/mixart/mixart.c

347

err = mixart_set_clock( mgr, pipe, 0);

sound/pci/mixart/mixart.c

354

err = mixart_set_pipe_state(mgr, pipe, 0);

sound/pci/mixart/mixart.c

361

request.data = &pipe->group_uid; /* the streaming group ! */

sound/pci/mixart/mixart.c

362

request.size = sizeof(pipe->group_uid);

sound/pci/mixart/mixart.c

372

pipe->group_uid = (struct mixart_uid){0,0};

sound/pci/mixart/mixart.c

373

pipe->stream_count = 0;

sound/pci/mixart/mixart.c

374

pipe->status = PIPE_UNDEFINED;

sound/pci/mixart/mixart.c

391

stream_state_req.stream_info.stream_desc.uid_pipe = stream->pipe->group_uid;

sound/pci/mixart/mixart.c

494

if(stream->pipe->references == 1) {

sound/pci/mixart/mixart.c

495

if( mixart_set_clock(chip->mgr, stream->pipe, subs->runtime->rate) )

sound/pci/mixart/mixart.c

568

stream_param.stream_desc.uid_pipe = stream->pipe->group_uid;

sound/pci/mixart/mixart.c

59

struct mixart_pipe *pipe, int start)

sound/pci/mixart/mixart.c

67

switch(pipe->status) {

sound/pci/mixart/mixart.c

708

struct mixart_pipe *pipe;

sound/pci/mixart/mixart.c

738

pipe = snd_mixart_add_ref_pipe(chip, pcm_number, 0, 0);

sound/pci/mixart/mixart.c

740

if (pipe == NULL)

sound/pci/mixart/mixart.c

744

err = mixart_set_pipe_state(chip->mgr, pipe, 1);

sound/pci/mixart/mixart.c

747

snd_mixart_kill_ref_pipe(chip->mgr, pipe, 0);

sound/pci/mixart/mixart.c

751

stream->pipe = pipe;

sound/pci/mixart/mixart.c

780

struct mixart_pipe *pipe;

sound/pci/mixart/mixart.c

812

pipe = snd_mixart_add_ref_pipe(chip, pcm_number, 1, 0);

sound/pci/mixart/mixart.c

814

if (pipe == NULL)

sound/pci/mixart/mixart.c

818

err = mixart_set_pipe_state(chip->mgr, pipe, 1);

sound/pci/mixart/mixart.c

821

snd_mixart_kill_ref_pipe(chip->mgr, pipe, 0);

sound/pci/mixart/mixart.c

825

stream->pipe = pipe;

sound/pci/mixart/mixart.c

865

if (snd_mixart_kill_ref_pipe(mgr, stream->pipe, 0 ) < 0) {

sound/pci/mixart/mixart.c

872

stream->pipe = NULL;

sound/pci/mixart/mixart.h

121

struct mixart_pipe *pipe;

sound/pci/mixart/mixart.h

205

int snd_mixart_kill_ref_pipe(struct mixart_mgr *mgr, struct mixart_pipe *pipe, int monitoring);

sound/pci/mixart/mixart_hwdep.c

164

struct mixart_pipe *pipe;

sound/pci/mixart/mixart_hwdep.c

167

pipe = &mgr->chip[k/2]->pipe_out_ana;

sound/pci/mixart/mixart_hwdep.c

169

pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_out_dig;

sound/pci/mixart/mixart_hwdep.c

172

pipe->uid_right_connector = connector->uid[k]; /* odd */

sound/pci/mixart/mixart_hwdep.c

174

pipe->uid_left_connector = connector->uid[k]; /* even */

sound/pci/mixart/mixart_hwdep.c

208

struct mixart_pipe *pipe;

sound/pci/mixart/mixart_hwdep.c

211

pipe = &mgr->chip[k/2]->pipe_in_ana;

sound/pci/mixart/mixart_hwdep.c

213

pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_in_dig;

sound/pci/mixart/mixart_hwdep.c

216

pipe->uid_right_connector = connector->uid[k]; /* odd */

sound/pci/mixart/mixart_hwdep.c

218

pipe->uid_left_connector = connector->uid[k]; /* even */

sound/pci/mixart/mixart_mixer.c

715

struct mixart_pipe *pipe;

sound/pci/mixart/mixart_mixer.c

722

pipe = &chip->pipe_out_dig; /* AES playback */

sound/pci/mixart/mixart_mixer.c

725

pipe = &chip->pipe_out_ana; /* analog playback */

sound/pci/mixart/mixart_mixer.c

729

if(pipe->status == PIPE_UNDEFINED)

sound/pci/mixart/mixart_mixer.c

732

set_level.stream_level.desc.uid_pipe = pipe->group_uid;

sound/pci/mixart/mixart_mixer.c

763

struct mixart_pipe *pipe;

sound/pci/mixart/mixart_mixer.c

770

pipe = &chip->pipe_in_dig;

sound/pci/mixart/mixart_mixer.c

773

pipe = &chip->pipe_in_ana;

sound/pci/mixart/mixart_mixer.c

777

if(pipe->status == PIPE_UNDEFINED)

sound/pci/mixart/mixart_mixer.c

782

set_level.level[0].connector = pipe->uid_left_connector;

sound/pci/mixart/mixart_mixer.c

783

set_level.level[1].connector = pipe->uid_right_connector;

sound/pci/pcxhr/pcxhr.c

516

stream->pipe->is_capture ? 1 : 1<<stream->substream->number;

sound/pci/pcxhr/pcxhr.c

519

pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,

sound/pci/pcxhr/pcxhr.c

520

stream->pipe->first_audio, 0, stream_mask);

sound/pci/pcxhr/pcxhr.c

587

is_capture = stream->pipe->is_capture;

sound/pci/pcxhr/pcxhr.c

592

pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,

sound/pci/pcxhr/pcxhr.c

639

pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,

sound/pci/pcxhr/pcxhr.c

669

pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0,

sound/pci/pcxhr/pcxhr.c

670

1<<stream->pipe->first_audio);

sound/pci/pcxhr/pcxhr.c

682

struct pcxhr_pipe **pipe)

sound/pci/pcxhr/pcxhr.c

685

*pipe = stream->pipe;

sound/pci/pcxhr/pcxhr.c

694

struct pcxhr_pipe *pipe;

sound/pci/pcxhr/pcxhr.c

710

if (pcxhr_stream_scheduled_get_pipe(&chip->capture_stream[j], &pipe))

sound/pci/pcxhr/pcxhr.c

711

capture_mask |= (1 << pipe->first_audio);

sound/pci/pcxhr/pcxhr.c

714

if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) {

sound/pci/pcxhr/pcxhr.c

715

playback_mask |= (1 << pipe->first_audio);

sound/pci/pcxhr/pcxhr.c

745

if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {

sound/pci/pcxhr/pcxhr.c

752

if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {

sound/pci/pcxhr/pcxhr.c

764

if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))

sound/pci/pcxhr/pcxhr.c

769

if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))

sound/pci/pcxhr/pcxhr.c

839

stream->pipe->is_capture ? 'C' : 'P',

sound/pci/pcxhr/pcxhr.c

840

stream->pipe->first_audio);

sound/pci/pcxhr/pcxhr.h

128

struct pcxhr_pipe *pipe;

sound/pci/pcxhr/pcxhr_core.c

1000

enum pcxhr_async_err_src err_src, int pipe,

sound/pci/pcxhr/pcxhr_core.c

1017

is_capture ? "Record" : "Play", pipe, err);

sound/pci/pcxhr/pcxhr_core.c

1068

int pipe = prmh->stat[i] & MASK_FIRST_FIELD;

sound/pci/pcxhr/pcxhr_core.c

1076

pipe);

sound/pci/pcxhr/pcxhr_core.c

1083

pipe, is_capture);

sound/pci/pcxhr/pcxhr_core.c

1091

pipe,

sound/pci/pcxhr/pcxhr_core.c

1101

pipe,

sound/pci/pcxhr/pcxhr_core.c

1116

stream_mask = stream->pipe->is_capture ? 1 : 1<<stream->substream->number;

sound/pci/pcxhr/pcxhr_core.c

1120

pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,

sound/pci/pcxhr/pcxhr_core.c

1121

stream->pipe->first_audio, 0, stream_mask);

sound/pci/pcxhr/pcxhr_core.c

1133

stream->pipe->is_capture ? 'C' : 'P',

sound/pci/pcxhr/pcxhr_hwdep.c

154

struct pcxhr_pipe *pipe,

sound/pci/pcxhr/pcxhr_hwdep.c

173

pipe->is_capture = is_capture;

sound/pci/pcxhr/pcxhr_hwdep.c

174

pipe->first_audio = pin;

sound/pci/pcxhr/pcxhr_hwdep.c

190

pipe->status = PCXHR_PIPE_DEFINED;

sound/pci/pcxhr/pcxhr_hwdep.c

199

static int pcxhr_dsp_free_pipe( struct pcxhr_mgr *mgr, struct pcxhr_pipe *pipe)

sound/pci/pcxhr/pcxhr_hwdep.c

206

if (pipe->is_capture)

sound/pci/pcxhr/pcxhr_hwdep.c

207

capture_mask = (1 << pipe->first_audio);

sound/pci/pcxhr/pcxhr_hwdep.c

209

playback_mask = (1 << pipe->first_audio);

sound/pci/pcxhr/pcxhr_hwdep.c

217

pcxhr_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->first_audio,

sound/pci/pcxhr/pcxhr_hwdep.c

223

pipe->status = PCXHR_PIPE_UNDEFINED;

sound/pci/pcxhr/pcxhr_hwdep.c

233

struct pcxhr_pipe *pipe;

sound/pci/pcxhr/pcxhr_hwdep.c

239

pipe = &chip->playback_pipe;

sound/pci/pcxhr/pcxhr_hwdep.c

240

err = pcxhr_dsp_allocate_pipe( mgr, pipe, 0, i*2);

sound/pci/pcxhr/pcxhr_hwdep.c

244

chip->playback_stream[j].pipe = pipe;

sound/pci/pcxhr/pcxhr_hwdep.c

247

pipe = &chip->capture_pipe[j];

sound/pci/pcxhr/pcxhr_hwdep.c

248

err = pcxhr_dsp_allocate_pipe(mgr, pipe, 1, i*2 + j);

sound/pci/pcxhr/pcxhr_hwdep.c

251

chip->capture_stream[j].pipe = pipe;

sound/pci/pcxhr/pcxhr_mixer.c

248

struct pcxhr_pipe *pipe = &chip->playback_pipe;

sound/pci/pcxhr/pcxhr_mixer.c

262

pcxhr_set_pipe_cmd_params(&rmh, 0, pipe->first_audio, 0, 1<<idx);

sound/pci/pcxhr/pcxhr_mixer.c

292

struct pcxhr_pipe *pipe;

sound/pci/pcxhr/pcxhr_mixer.c

295

pipe = &chip->capture_pipe[0];

sound/pci/pcxhr/pcxhr_mixer.c

297

pipe = &chip->playback_pipe;

sound/pci/pcxhr/pcxhr_mixer.c

302

1 << (channel + pipe->first_audio));

sound/pci/vx222/vx222_ops.c

246

struct vx_pipe *pipe, int count)

sound/pci/vx222/vx222_ops.c

249

int offset = pipe->hw_ptr;

sound/pci/vx222/vx222_ops.c

259

if (offset + count >= pipe->buffer_bytes) {

sound/pci/vx222/vx222_ops.c

260

int length = pipe->buffer_bytes - offset;

sound/pci/vx222/vx222_ops.c

269

pipe->hw_ptr = 0;

sound/pci/vx222/vx222_ops.c

271

pipe->hw_ptr += count;

sound/pci/vx222/vx222_ops.c

285

struct vx_pipe *pipe, int count)

sound/pci/vx222/vx222_ops.c

287

int offset = pipe->hw_ptr;

sound/pci/vx222/vx222_ops.c

297

if (offset + count >= pipe->buffer_bytes) {

sound/pci/vx222/vx222_ops.c

298

int length = pipe->buffer_bytes - offset;

sound/pci/vx222/vx222_ops.c

305

pipe->hw_ptr = 0;

sound/pci/vx222/vx222_ops.c

307

pipe->hw_ptr += count;

sound/pcmcia/vx/vxp_ops.c

356

struct vx_pipe *pipe, int count)

sound/pcmcia/vx/vxp_ops.c

359

int offset = pipe->hw_ptr;

sound/pcmcia/vx/vxp_ops.c

363

if (offset + count >= pipe->buffer_bytes) {

sound/pcmcia/vx/vxp_ops.c

364

int length = pipe->buffer_bytes - offset;

sound/pcmcia/vx/vxp_ops.c

373

pipe->hw_ptr = 0;

sound/pcmcia/vx/vxp_ops.c

375

pipe->hw_ptr += count;

sound/pcmcia/vx/vxp_ops.c

395

struct vx_pipe *pipe, int count)

sound/pcmcia/vx/vxp_ops.c

399

int offset = pipe->hw_ptr;

sound/pcmcia/vx/vxp_ops.c

405

if (offset + count >= pipe->buffer_bytes) {

sound/pcmcia/vx/vxp_ops.c

406

int length = pipe->buffer_bytes - offset;

sound/pcmcia/vx/vxp_ops.c

413

pipe->hw_ptr = 0;

sound/pcmcia/vx/vxp_ops.c

415

pipe->hw_ptr += count;

sound/soc/codecs/hdac_hdmi.c

1589

static void hdac_hdmi_eld_notify_cb(void *aptr, int port, int pipe)

sound/soc/codecs/hdac_hdmi.c

1602

pin_nid, pipe);

sound/soc/codecs/hdac_hdmi.c

1622

if (pipe == -1) {

sound/soc/codecs/hdac_hdmi.c

1629

if (pin->ports[i].id == pipe) {

sound/soc/intel/atom/sst-atom-controls.c

298

const char *pipe, struct sst_ids *ids)

sound/soc/intel/atom/sst-atom-controls.c

304

dev_dbg(&drv->pdev->dev, "Enter: widget=%s\n", pipe);

sound/soc/intel/atom/sst-atom-controls.c

310

algo->kctl->id.name, pipe);

sound/sparc/dbri.c

1000

static void xmit_fixed(struct snd_dbri *dbri, int pipe, unsigned int data)

sound/sparc/dbri.c

1004

if (pipe < 16 || pipe > DBRI_MAX_PIPE) {

sound/sparc/dbri.c

1009

if (D_SDP_MODE(dbri->pipes[pipe].sdp) == 0) {

sound/sparc/dbri.c

1011

"Uninitialized pipe %d\n", pipe);

sound/sparc/dbri.c

1015

if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) {

sound/sparc/dbri.c

1016

printk(KERN_ERR "DBRI: xmit_fixed: Non-fixed pipe %d\n", pipe);

sound/sparc/dbri.c

1020

if (!(dbri->pipes[pipe].sdp & D_SDP_TO_SER)) {

sound/sparc/dbri.c

1022

pipe);

sound/sparc/dbri.c

1028

if (dbri->pipes[pipe].sdp & D_SDP_MSB)

sound/sparc/dbri.c

1029

data = reverse_bytes(data, dbri->pipes[pipe].length);

sound/sparc/dbri.c

1033

*(cmd++) = DBRI_CMD(D_SSP, 0, pipe);

sound/sparc/dbri.c

1045

static void recv_fixed(struct snd_dbri *dbri, int pipe, volatile __u32 *ptr)

sound/sparc/dbri.c

1047

if (pipe < 16 || pipe > DBRI_MAX_PIPE) {

sound/sparc/dbri.c

1053

if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) {

sound/sparc/dbri.c

1055

"non-fixed pipe %d\n", pipe);

sound/sparc/dbri.c

1059

if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) {

sound/sparc/dbri.c

1061

"transmit pipe %d\n", pipe);

sound/sparc/dbri.c

1065

dbri->pipes[pipe].recv_fixed_ptr = ptr;

sound/sparc/dbri.c

1094

if (info->pipe < 0 || info->pipe > 15) {

sound/sparc/dbri.c

1099

if (dbri->pipes[info->pipe].sdp == 0) {

sound/sparc/dbri.c

1101

info->pipe);

sound/sparc/dbri.c

1109

if (!(dbri->pipes[info->pipe].sdp & D_SDP_TO_SER)) {

sound/sparc/dbri.c

1111

"Called on receive pipe %d\n", info->pipe);

sound/sparc/dbri.c

1115

if (dbri->pipes[info->pipe].sdp & D_SDP_TO_SER) {

sound/sparc/dbri.c

1118

info->pipe);

sound/sparc/dbri.c

1124

if (pipe_active(dbri, info->pipe)) {

sound/sparc/dbri.c

1126

"Called on active pipe %d\n", info->pipe);

sound/sparc/dbri.c

1135

desc = dbri->pipes[info->pipe].first_desc;

sound/sparc/dbri.c

1142

desc != dbri->pipes[info->pipe].first_desc);

sound/sparc/dbri.c

1144

dbri->pipes[info->pipe].desc = -1;

sound/sparc/dbri.c

1145

dbri->pipes[info->pipe].first_desc = -1;

sound/sparc/dbri.c

1205

dbri->pipes[info->pipe].first_desc = first_desc;

sound/sparc/dbri.c

1206

dbri->pipes[info->pipe].desc = first_desc;

sound/sparc/dbri.c

1715

if (info->pipe >= 0) {

sound/sparc/dbri.c

1716

first_td = dbri->pipes[info->pipe].first_desc;

sound/sparc/dbri.c

1724

dbri->pipes[info->pipe].sdp

sound/sparc/dbri.c

1731

dbri->pipes[info->pipe].desc = first_td;

sound/sparc/dbri.c

1737

if (info->pipe >= 0) {

sound/sparc/dbri.c

1738

first_td = dbri->pipes[info->pipe].first_desc;

sound/sparc/dbri.c

1746

dbri->pipes[info->pipe].sdp

sound/sparc/dbri.c

1753

dbri->pipes[info->pipe].desc = first_td;

sound/sparc/dbri.c

1772

static void transmission_complete_intr(struct snd_dbri *dbri, int pipe)

sound/sparc/dbri.c

1775

int td = dbri->pipes[pipe].desc;

sound/sparc/dbri.c

1780

printk(KERN_ERR "DBRI: invalid td on pipe %d\n", pipe);

sound/sparc/dbri.c

1794

dbri->pipes[pipe].desc = td;

sound/sparc/dbri.c

1803

static void reception_complete_intr(struct snd_dbri *dbri, int pipe)

sound/sparc/dbri.c

1806

int rd = dbri->pipes[pipe].desc;

sound/sparc/dbri.c

1810

printk(KERN_ERR "DBRI: invalid rd on pipe %d\n", pipe);

sound/sparc/dbri.c

1814

dbri->pipes[pipe].desc = dbri->next_desc[rd];

sound/sparc/dbri.c

1871

int pipe = channel;

sound/sparc/dbri.c

1872

int td = dbri->pipes[pipe].desc;

sound/sparc/dbri.c

1877

dbri->pipes[pipe].sdp

sound/sparc/dbri.c

2046

info->pipe = -1;

sound/sparc/dbri.c

2131

if (info->pipe != -1) {

sound/sparc/dbri.c

2132

reset_pipe(dbri, info->pipe);

sound/sparc/dbri.c

2133

info->pipe = -1;

sound/sparc/dbri.c

2147

info->pipe = 4; /* Send pipe */

sound/sparc/dbri.c

2149

info->pipe = 6; /* Receive pipe */

sound/sparc/dbri.c

2179

reset_pipe(dbri, info->pipe);

sound/sparc/dbri.c

2472

int pipe;

sound/sparc/dbri.c

2475

for (pipe = 0; pipe < 32; pipe++) {

sound/sparc/dbri.c

2476

if (pipe_active(dbri, pipe)) {

sound/sparc/dbri.c

2477

struct dbri_pipe *pptr = &dbri->pipes[pipe];

sound/sparc/dbri.c

2481

pipe,

sound/sparc/dbri.c

296

int pipe; /* Data pipe used */

sound/sparc/dbri.c

810

static inline int pipe_active(struct snd_dbri *dbri, int pipe)

sound/sparc/dbri.c

812

return ((pipe >= 0) && (dbri->pipes[pipe].desc != -1));

sound/sparc/dbri.c

820

static void reset_pipe(struct snd_dbri *dbri, int pipe)

sound/sparc/dbri.c

826

if (pipe < 0 || pipe > DBRI_MAX_PIPE) {

sound/sparc/dbri.c

832

sdp = dbri->pipes[pipe].sdp;

sound/sparc/dbri.c

845

desc = dbri->pipes[pipe].first_desc;

sound/sparc/dbri.c

851

} while (desc != -1 && desc != dbri->pipes[pipe].first_desc);

sound/sparc/dbri.c

853

dbri->pipes[pipe].desc = -1;

sound/sparc/dbri.c

854

dbri->pipes[pipe].first_desc = -1;

sound/sparc/dbri.c

860

static void setup_pipe(struct snd_dbri *dbri, int pipe, int sdp)

sound/sparc/dbri.c

862

if (pipe < 0 || pipe > DBRI_MAX_PIPE) {

sound/sparc/dbri.c

880

sdp |= D_PIPE(pipe);

sound/sparc/dbri.c

881

dbri->pipes[pipe].sdp = sdp;

sound/sparc/dbri.c

882

dbri->pipes[pipe].desc = -1;

sound/sparc/dbri.c

883

dbri->pipes[pipe].first_desc = -1;

sound/sparc/dbri.c

885

reset_pipe(dbri, pipe);

sound/sparc/dbri.c

891

static void link_time_slot(struct snd_dbri *dbri, int pipe,

sound/sparc/dbri.c

898

if (pipe < 0 || pipe > DBRI_MAX_PIPE

sound/sparc/dbri.c

906

if (dbri->pipes[pipe].sdp == 0

sound/sparc/dbri.c

914

dbri->pipes[prevpipe].nextpipe = pipe;

sound/sparc/dbri.c

915

dbri->pipes[pipe].nextpipe = nextpipe;

sound/sparc/dbri.c

916

dbri->pipes[pipe].length = length;

sound/sparc/dbri.c

920

if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) {

sound/sparc/dbri.c

929

val = D_DTS_VO | D_DTS_INS | D_DTS_PRVOUT(prevpipe) | pipe;

sound/sparc/dbri.c

935

val = D_DTS_VI | D_DTS_INS | D_DTS_PRVIN(prevpipe) | pipe;

sound/sparc/dbri.c

950

static void unlink_time_slot(struct snd_dbri *dbri, int pipe,

sound/sparc/dbri.c

957

if (pipe < 0 || pipe > DBRI_MAX_PIPE

sound/sparc/dbri.c

968

val = D_DTS_VI | D_DTS_DEL | D_DTS_PRVIN(prevpipe) | pipe;

sound/sparc/dbri.c

973

val = D_DTS_VO | D_DTS_DEL | D_DTS_PRVOUT(prevpipe) | pipe;

sound/usb/6fire/comm.c

168

urb->pipe = usb_rcvintpipe(chip->dev, COMM_EP);

sound/usb/6fire/comm.c

26

urb->pipe = usb_sndintpipe(rt->chip->dev, COMM_EP);

sound/usb/6fire/pcm.c

547

urb->instance.pipe = in ? usb_rcvisocpipe(chip->dev, ep)

sound/usb/caiaq/audio.c

678

unsigned int pipe;

sound/usb/caiaq/audio.c

680

pipe = (dir == SNDRV_PCM_STREAM_PLAYBACK) ?

sound/usb/caiaq/audio.c

714

urbs[i]->pipe = pipe;

sound/usb/card.h

107

unsigned int pipe; /* the data i/o pipe */

sound/usb/endpoint.c

1106

usb_pipeout(ep->pipe));

sound/usb/endpoint.c

1109

ep->ep_num, ep->pipe);

sound/usb/endpoint.c

1196

if (usb_pipein(ep->pipe) || ep->implicit_fb_sync) {

sound/usb/endpoint.c

1257

u->urb->pipe = ep->pipe;

sound/usb/endpoint.c

1281

ep->ep_num, ep->pipe);

sound/usb/endpoint.c

1300

u->urb->pipe = ep->pipe;

sound/usb/endpoint.c

153

return ep->implicit_fb_sync && usb_pipeout(ep->pipe);

sound/usb/endpoint.c

1558

bool is_playback = usb_pipeout(ep->pipe);

sound/usb/endpoint.c

1696

usb_pipeout(ep->pipe)) {

sound/usb/endpoint.c

558

if (usb_pipeout(ep->pipe)) {

sound/usb/endpoint.c

716

ep->pipe = usb_sndisocpipe(chip->dev, ep_num);

sound/usb/endpoint.c

718

ep->pipe = usb_rcvisocpipe(chip->dev, ep_num);

sound/usb/fcp.c

968

unsigned int pipe = usb_rcvintpipe(dev, private->bEndpointAddress);

sound/usb/fcp.c

976

if (usb_pipe_type_check(dev, pipe))

sound/usb/fcp.c

990

usb_fill_int_urb(mixer->urb, dev, pipe,

sound/usb/helper.c

101

snd_usb_ctl_msg_quirk(dev, pipe, request, requesttype,

sound/usb/helper.c

71

int snd_usb_ctl_msg(struct usb_device *dev, unsigned int pipe, __u8 request,

sound/usb/helper.c

79

if (usb_pipe_type_check(dev, pipe))

sound/usb/helper.c

93

err = usb_control_msg(dev, pipe, request, requesttype,

sound/usb/helper.h

10

int snd_usb_ctl_msg(struct usb_device *dev, unsigned int pipe,

sound/usb/line6/capture.c

274

urb->pipe =

sound/usb/line6/driver.c

502

int pipe;

sound/usb/line6/driver.c

507

pipe = usb_rcvintpipe(line6->usbdev,

sound/usb/line6/driver.c

510

pipe = usb_rcvbulkpipe(line6->usbdev,

sound/usb/line6/driver.c

513

ep = usbdev->ep_in[usb_pipeendpoint(pipe)];

sound/usb/line6/playback.c

423

urb->pipe =

sound/usb/midi.c

1325

unsigned int pipe;

sound/usb/midi.c

1344

pipe = usb_rcvintpipe(umidi->dev, ep_info->in_ep);

sound/usb/midi.c

1346

pipe = usb_rcvbulkpipe(umidi->dev, ep_info->in_ep);

sound/usb/midi.c

1347

length = usb_maxpacket(umidi->dev, pipe);

sound/usb/midi.c

1357

pipe, buffer, length,

sound/usb/midi.c

1362

pipe, buffer, length,

sound/usb/midi.c

1412

unsigned int pipe;

sound/usb/midi.c

1431

pipe = usb_sndintpipe(umidi->dev, ep_info->out_ep);

sound/usb/midi.c

1433

pipe = usb_sndbulkpipe(umidi->dev, ep_info->out_ep);

sound/usb/midi.c

1436

ep->max_transfer = usb_maxpacket(umidi->dev, pipe);

sound/usb/midi.c

1469

pipe, buffer, ep->max_transfer,

sound/usb/midi.c

1474

pipe, buffer, ep->max_transfer,

sound/usb/midi.c

370

err = usb_bulk_msg(ep->umidi->dev, ep->urbs[0].urb->pipe,

sound/usb/midi2.c

309

usb_fill_int_urb(ctx->urb, ep->dev, ep->pipe,

sound/usb/midi2.c

312

usb_fill_bulk_urb(ctx->urb, ep->dev, ep->pipe,

sound/usb/midi2.c

454

ep->pipe = usb_rcvintpipe(ep->dev, endpoint);

sound/usb/midi2.c

456

ep->pipe = usb_rcvbulkpipe(ep->dev, endpoint);

sound/usb/midi2.c

459

ep->pipe = usb_sndintpipe(ep->dev, endpoint);

sound/usb/midi2.c

461

ep->pipe = usb_sndbulkpipe(ep->dev, endpoint);

sound/usb/midi2.c

463

ep->packets = usb_maxpacket(ep->dev, ep->pipe);

sound/usb/midi2.c

63

unsigned int pipe; /* URB pipe */

sound/usb/misc/ua101.c

1070

urb->urb.pipe = stream->usb_pipe;

sound/usb/mixer_scarlett2.c

8301

unsigned int pipe = usb_rcvintpipe(dev, private->bEndpointAddress);

sound/usb/mixer_scarlett2.c

8310

if (usb_pipe_type_check(dev, pipe))

sound/usb/mixer_scarlett2.c

8321

usb_fill_int_urb(mixer->urb, dev, pipe,

sound/usb/qcom/qc_audio_offload.c

1112

ep = usb_pipe_endpoint(subs->dev, endpoint->pipe);

sound/usb/qcom/qc_audio_offload.c

1470

subs->data_endpoint->pipe : 0;

sound/usb/qcom/qc_audio_offload.c

1472

subs->sync_endpoint->pipe : 0;

sound/usb/qcom/qc_audio_offload.c

1499

usb_pipe_endpoint(subs->dev, subs->sync_endpoint->pipe));

sound/usb/qcom/qc_audio_offload.c

1505

usb_pipe_endpoint(subs->dev, subs->data_endpoint->pipe));

sound/usb/quirks.c

1958

void snd_usb_ctl_msg_quirk(struct usb_device *dev, unsigned int pipe,

sound/usb/quirks.h

36

void snd_usb_ctl_msg_quirk(struct usb_device *dev, unsigned int pipe,

sound/usb/usx2y/us144mkii.c

136

urb->pipe = usb_sndisocpipe(tascam->dev, EP_AUDIO_OUT);

sound/usb/usx2y/us144mkii.c

161

f_urb->pipe =

sound/usb/usx2y/usb_stream.c

47

struct usb_device *dev, int pipe)

sound/usb/usx2y/usb_stream.c

51

use_packsize : usb_maxpacket(dev, pipe);

sound/usb/usx2y/usb_stream.c

61

urb->pipe = pipe;

sound/usb/usx2y/usb_stream.c

65

if (usb_pipeout(pipe))

sound/usb/usx2y/usbusx2yaudio.c

286

subs->endpoint, usb_pipein(urb->pipe) ? "in" : "out",

sound/usb/usx2y/usbusx2yaudio.c

398

unsigned int pipe;

sound/usb/usx2y/usbusx2yaudio.c

403

pipe = is_playback ? usb_sndisocpipe(dev, subs->endpoint) :

sound/usb/usx2y/usbusx2yaudio.c

405

subs->maxpacksize = usb_maxpacket(dev, pipe);

sound/usb/usx2y/usbusx2yaudio.c

437

(*purb)->pipe = pipe;

sound/usb/usx2y/usbusx2yaudio.c

478

if (usb_pipein(urb->pipe)) {

sound/usb/usx2y/usx2yhwdeppcm.c

240

subs->endpoint, usb_pipein(urb->pipe) ? "in" : "out",

sound/usb/usx2y/usx2yhwdeppcm.c

318

unsigned int pipe;

sound/usb/usx2y/usx2yhwdeppcm.c

323

pipe = is_playback ? usb_sndisocpipe(dev, subs->endpoint) :

sound/usb/usx2y/usx2yhwdeppcm.c

325

subs->maxpacksize = usb_maxpacket(dev, pipe);

sound/usb/usx2y/usx2yhwdeppcm.c

348

(*purb)->pipe = pipe;

sound/usb/usx2y/usx2yhwdeppcm.c

448

if (usb_pipein(urb->pipe)) {

sound/x86/intel_hdmi_audio.c

1469

int pipe, port;

sound/x86/intel_hdmi_audio.c

1471

for_each_pipe(card_ctx, pipe) {

sound/x86/intel_hdmi_audio.c

1473

audio_stat[pipe] = had_read_register_raw(card_ctx, pipe,

sound/x86/intel_hdmi_audio.c

1477

if (audio_stat[pipe])

sound/x86/intel_hdmi_audio.c

1478

had_write_register_raw(card_ctx, pipe,

sound/x86/intel_hdmi_audio.c

1479

AUD_HDMI_STATUS, audio_stat[pipe]);

sound/x86/intel_hdmi_audio.c

1484

int pipe = ctx->pipe;

sound/x86/intel_hdmi_audio.c

1486

if (pipe < 0)

sound/x86/intel_hdmi_audio.c

1489

if (audio_stat[pipe] & HDMI_AUDIO_BUFFER_DONE)

sound/x86/intel_hdmi_audio.c

1491

if (audio_stat[pipe] & HDMI_AUDIO_UNDERRUN)

sound/x86/intel_hdmi_audio.c

1526

if (ppdata->pipe < 0) {

sound/x86/intel_hdmi_audio.c

1539

ctx->pipe = -1;

sound/x86/intel_hdmi_audio.c

1561

ctx->pipe = ppdata->pipe;

sound/x86/intel_hdmi_audio.c

1692

ctx->pipe = -1;

sound/x86/intel_hdmi_audio.c

191

static u32 had_config_offset(int pipe)

sound/x86/intel_hdmi_audio.c

193

switch (pipe) {

sound/x86/intel_hdmi_audio.c

206

int pipe, u32 reg)

sound/x86/intel_hdmi_audio.c

208

return ioread32(card_ctx->mmio_start + had_config_offset(pipe) + reg);

sound/x86/intel_hdmi_audio.c

212

int pipe, u32 reg, u32 val)

sound/x86/intel_hdmi_audio.c

214

iowrite32(val, card_ctx->mmio_start + had_config_offset(pipe) + reg);

sound/x86/intel_hdmi_audio.c

222

*val = had_read_register_raw(ctx->card_ctx, ctx->pipe, reg);

sound/x86/intel_hdmi_audio.c

228

had_write_register_raw(ctx->card_ctx, ctx->pipe, reg, val);

sound/x86/intel_hdmi_audio.c

40

#define for_each_pipe(card_ctx, pipe) \

sound/x86/intel_hdmi_audio.c

41

for ((pipe) = 0; (pipe) < (card_ctx)->num_pipes; (pipe)++)

sound/x86/intel_hdmi_audio.h

115

int pipe; /* can change dynamically */

tools/include/uapi/drm/i915_drm.h

1812

__u32 pipe;

tools/include/uapi/drm/i915_drm.h

887

int pipe;

tools/lib/bpf/btf.c

5632

struct btf_pipe pipe;

tools/lib/bpf/btf.c

5641

struct btf_type *split_t = btf_type_by_id(dist->pipe.src, i);

tools/lib/bpf/btf.c

5664

base_t = btf_type_by_id(dist->pipe.src, *id);

tools/lib/bpf/btf.c

5706

bool adding_to_base = dist->pipe.dst->start_id == 1;

tools/lib/bpf/btf.c

5707

int id = btf__type_cnt(dist->pipe.dst);

tools/lib/bpf/btf.c

5721

t = btf_type_by_id(dist->pipe.src, i);

tools/lib/bpf/btf.c

5723

name = btf__name_by_offset(dist->pipe.src, t->name_off);

tools/lib/bpf/btf.c

5732

err = btf_add_type(&dist->pipe, t);

tools/lib/bpf/btf.c

5743

err = btf_add_composite(dist->pipe.dst, kind, name, t->size);

tools/lib/bpf/btf.c

5747

err = btf_add_type(&dist->pipe, t);

tools/lib/bpf/btf.c

5761

err = btf__add_enum(dist->pipe.dst, name, t->size);

tools/lib/bpf/btf.c

5765

err = btf_add_type(&dist->pipe, t);

tools/lib/bpf/btf.c

5779

err = btf_add_type(&dist->pipe, t);

tools/lib/bpf/btf.c

5801

struct btf_type *t = btf_type_by_id(dist->pipe.dst, i);

tools/lib/bpf/btf.c

5860

dist.pipe.src = src_btf;

tools/lib/bpf/btf.c

5861

dist.pipe.dst = new_base;

tools/lib/bpf/btf.c

5862

dist.pipe.str_off_map = hashmap__new(btf_dedup_identity_hash_fn, btf_dedup_equal_fn, NULL);

tools/lib/bpf/btf.c

5863

if (IS_ERR(dist.pipe.str_off_map)) {

tools/lib/bpf/btf.c

5896

dist.pipe.dst = new_split;

tools/lib/bpf/btf.c

5900

err = btf_add_type(&dist.pipe, t);

tools/lib/bpf/btf.c

5923

hashmap__free(dist.pipe.str_off_map);

tools/lib/perf/tests/test-evlist.c

242

err = pipe(go_pipe);

tools/lib/subcmd/run-command.c

44

if (pipe(fdin) < 0) {

tools/lib/subcmd/run-command.c

56

if (pipe(fdout) < 0) {

tools/lib/subcmd/run-command.c

68

if (pipe(fderr) < 0) {

tools/perf/bench/inject-buildid.c

282

if (pipe(ready_pipe) < 0)

tools/perf/bench/inject-buildid.c

285

if (pipe(data->input_pipe) < 0)

tools/perf/bench/inject-buildid.c

288

if (pipe(data->output_pipe) < 0)

tools/perf/bench/sched-messaging.c

69

if (pipe(fds) == 0)

tools/perf/builtin-record.c

1016

if (pipe(thread_data->pipes.msg))

tools/perf/builtin-record.c

1019

if (pipe(thread_data->pipes.ack)) {

tools/perf/builtin-script.c

4290

if (pipe(live_pipe) < 0) {

tools/perf/tests/code-reading.c

643

if (pipe(pipefd) < 0) {

tools/perf/tests/mmap-thread-lookup.c

85

if (pipe(td->ready))

tools/perf/util/evlist.c

1475

if (pipe(child_ready_pipe) < 0) {

tools/perf/util/evlist.c

1480

if (pipe(go_pipe) < 0) {

tools/perf/util/intel-tpebs.c

525

if (pipe(control_fd) < 0) {

tools/perf/util/intel-tpebs.c

530

if (pipe(ack_fd) < 0) {

tools/testing/selftests/arm64/fp/fp-stress.c

526

ret = pipe(startup_pipe);

tools/testing/selftests/arm64/fp/fp-stress.c

68

ret = pipe(pipefd);

tools/testing/selftests/arm64/fp/kernel-test.c

182

ret = pipe(zerocopy);

tools/testing/selftests/arm64/fp/vec-syscfg.c

96

ret = pipe(pipefd);

tools/testing/selftests/arm64/gcs/gcs-stress.c

410

ret = pipe(startup_pipe);

tools/testing/selftests/arm64/gcs/gcs-stress.c

64

ret = pipe(pipefd);

tools/testing/selftests/arm64/pauth/pac.c

102

ret = pipe(new_stdin);

tools/testing/selftests/arm64/pauth/pac.c

108

ret = pipe(new_stdout);

tools/testing/selftests/bpf/prog_tests/bpf_iter.c

331

if (!ASSERT_OK(pipe(data_pipe), "data_pipe") ||

tools/testing/selftests/bpf/prog_tests/bpf_iter.c

332

!ASSERT_OK(pipe(finish_pipe), "finish_pipe"))

tools/testing/selftests/bpf/prog_tests/cgroup_iter_memcg.c

139

if (!ASSERT_OK(pipe(fds[i]), "pipe"))

tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c

108

if (!ASSERT_OK(pipe(pipe_fd), "pipe"))

tools/testing/selftests/bpf/prog_tests/d_path.c

58

if (CHECK(pipe(pipefd) < 0, "trigger", "pipe failed\n"))

tools/testing/selftests/bpf/prog_tests/send_signal.c

33

if (!ASSERT_OK(pipe(pipe_c2p), "pipe_c2p"))

tools/testing/selftests/bpf/prog_tests/send_signal.c

36

if (!ASSERT_OK(pipe(pipe_p2c), "pipe_p2c")) {

tools/testing/selftests/bpf/prog_tests/test_task_work.c

62

if (!ASSERT_NEQ(pipe(pipefd), -1, "pipe"))

tools/testing/selftests/bpf/prog_tests/timer.c

94

if (!ASSERT_OK(pipe(pipefd), "pipe"))

tools/testing/selftests/bpf/prog_tests/uprobe_multi_test.c

109

if (pipe(child->go))

tools/testing/selftests/bpf/prog_tests/uprobe_multi_test.c

167

if (pipe(child->go))

tools/testing/selftests/bpf/prog_tests/uprobe_multi_test.c

170

if (pipe(child->c2p)) {

tools/testing/selftests/bpf/prog_tests/uprobe_syscall.c

292

if (!ASSERT_OK(pipe(go), "pipe"))

tools/testing/selftests/cgroup/test_memcontrol.c

1401

if (pipe(args.ctl))

tools/testing/selftests/clone3/clone3_set_tid.c

158

if (pipe(pipe_1) < 0 || pipe(pipe_2) < 0)

tools/testing/selftests/exec/check-exec.c

160

ASSERT_EQ(0, pipe(self->pipe_fds));

tools/testing/selftests/filesystems/nsfs/owner.c

34

if (pipe(pfd))

tools/testing/selftests/filesystems/statmount/statmount_test_ns.c

309

if (pipe(child_ready_pipe) < 0)

tools/testing/selftests/filesystems/statmount/statmount_test_ns.c

312

if (pipe(parent_ready_pipe) < 0)

tools/testing/selftests/kcmp/kcmp_test.c

50

if (pipe(pipefd)) {

tools/testing/selftests/kvm/include/userfaultfd_util.h

23

int pipe;

tools/testing/selftests/kvm/lib/userfaultfd_util.c

168

uffd_desc->reader_args[i].pipe = pipes[0];

tools/testing/selftests/kvm/lib/userfaultfd_util.c

197

close(uffd->reader_args[i].pipe);

tools/testing/selftests/kvm/lib/userfaultfd_util.c

46

TEST_ASSERT(!epoll_ctl(epollfd, EPOLL_CTL_ADD, reader_args->pipe, &evt),

tools/testing/selftests/kvm/lib/userfaultfd_util.c

64

r = read(reader_args->pipe, &tmp_chr, 1);

tools/testing/selftests/mm/cow.c

101

if (pipe(comm_pipes->parent_ready) < 0) {

tools/testing/selftests/mm/cow.c

155

if (pipe(fds) < 0)

tools/testing/selftests/mm/cow.c

310

if (pipe(fds) < 0) {

tools/testing/selftests/mm/cow.c

97

if (pipe(comm_pipes->child_ready) < 0) {

tools/testing/selftests/mm/memfd_secret.c

208

if (pipe(pipefd)) {

tools/testing/selftests/mm/memfd_secret.c

94

if (pipe(pipefd)) {

tools/testing/selftests/mm/mrelease_test.c

107

if (pipe(pipefd))

tools/testing/selftests/mm/process_madv.c

148

ASSERT_EQ(pipe(pipe_info), 0);

tools/testing/selftests/mm/protection_keys.c

1052

pipe_ret = pipe(pipe_fds);

tools/testing/selftests/mm/rmap.c

181

ASSERT_NE(pipe(data->pipefd), -1);

tools/testing/selftests/namespaces/cred_change_test.c

187

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/cred_change_test.c

303

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/cred_change_test.c

422

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/cred_change_test.c

50

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/cred_change_test.c

592

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/cred_change_test.c

726

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/file_handle_test.c

1096

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/file_handle_test.c

1242

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/file_handle_test.c

448

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/file_handle_test.c

577

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/file_handle_test.c

706

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/file_handle_test.c

835

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/file_handle_test.c

964

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/listns_permissions_test.c

152

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/listns_permissions_test.c

245

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/listns_permissions_test.c

302

ASSERT_EQ(pipe(pipefd2), 0);

tools/testing/selftests/namespaces/listns_permissions_test.c

381

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/listns_permissions_test.c

45

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/listns_permissions_test.c

457

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/listns_permissions_test.c

575

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/listns_permissions_test.c

683

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/listns_test.c

239

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

1128

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

1298

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

1471

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

1647

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

1648

ASSERT_EQ(pipe(syncpipe), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

181

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

182

ASSERT_EQ(pipe(syncpipe), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

1839

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

1971

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

2187

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

2188

ASSERT_EQ(pipe(syncpipe), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

2271

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

2272

ASSERT_EQ(pipe(syncpipe), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

2389

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

301

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

391

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

478

ASSERT_EQ(pipe(pipe_child_ready), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

479

ASSERT_EQ(pipe(pipe_parent_ready), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

632

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

855

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

965

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/ns_active_ref_test.c

99

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/nsid_test.c

189

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/nsid_test.c

295

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/nsid_test.c

401

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/nsid_test.c

507

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/nsid_test.c

619

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/nsid_test.c

740

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/nsid_test.c

83

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/nsid_test.c

892

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/siocgskns_test.c

327

ASSERT_EQ(pipe(pipefd), 0);

tools/testing/selftests/namespaces/siocgskns_test.c

421

ASSERT_EQ(pipe(syncpipe), 0);

tools/testing/selftests/net/af_unix/scm_pidfd.c

505

err = pipe(self->startup_pipe);

tools/testing/selftests/net/mptcp/mptcp_connect.c

943

err = pipe(pipefd);

tools/testing/selftests/net/mptcp/mptcp_sockopt.c

851

e1 = pipe(pipefds);

tools/testing/selftests/net/nettest.c

2230

if (pipe(fd) < 0) {

tools/testing/selftests/net/tls.c

2046

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

2094

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

2799

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

775

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

790

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

806

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

807

ASSERT_GE(pipe(p2), 0);

tools/testing/selftests/net/tls.c

826

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

847

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

865

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

888

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

908

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/net/tls.c

928

ASSERT_GE(pipe(p), 0);

tools/testing/selftests/nolibc/nolibc-test.c

1202

if (pipe(pipefd) == -1)

tools/testing/selftests/nolibc/nolibc-test.c

1431

CASE_TEST(pipe); EXPECT_SYSZR(1, test_pipe()); break;

tools/testing/selftests/perf_events/remove_on_exec.c

138

ASSERT_NE(pipe(pipefd), -1);

tools/testing/selftests/pidfd/pidfd_wait.c

93

ASSERT_EQ(pipe(pfd), 0);

tools/testing/selftests/powerpc/benchmarks/context_switch.c

178

if (pipe(pipe_fd1) || pipe(pipe_fd2))

tools/testing/selftests/powerpc/dexcr/hashchk_test.c

132

FAIL_IF_MSG(pipe(pipefd), "failed to create pipe");

tools/testing/selftests/powerpc/mm/large_vm_fork_separation.c

45

FAIL_IF(pipe(p2c) == -1 || pipe(c2p) == -1);

tools/testing/selftests/powerpc/mm/stack_expansion_signal.c

32

static int consume_stack(unsigned int stack_size, union pipe write_pipe)

tools/testing/selftests/powerpc/mm/stack_expansion_signal.c

50

static int child(unsigned int stack_size, union pipe write_pipe)

tools/testing/selftests/powerpc/mm/stack_expansion_signal.c

74

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/mm/stack_expansion_signal.c

77

FAIL_IF(pipe(read_pipe.fds) == -1);

tools/testing/selftests/powerpc/mm/stack_expansion_signal.c

78

FAIL_IF(pipe(write_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/cpu_event_pinned_vs_ebb_test.c

41

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/pmu/ebb/cpu_event_pinned_vs_ebb_test.c

51

FAIL_IF(pipe(read_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/cpu_event_pinned_vs_ebb_test.c

52

FAIL_IF(pipe(write_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/cpu_event_vs_ebb_test.c

39

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/pmu/ebb/cpu_event_vs_ebb_test.c

49

FAIL_IF(pipe(read_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/cpu_event_vs_ebb_test.c

50

FAIL_IF(pipe(write_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/ebb.c

349

int ebb_child(union pipe read_pipe, union pipe write_pipe)

tools/testing/selftests/powerpc/pmu/ebb/ebb.h

72

int ebb_child(union pipe read_pipe, union pipe write_pipe);

tools/testing/selftests/powerpc/pmu/ebb/ebb_on_child_test.c

23

static int victim_child(union pipe read_pipe, union pipe write_pipe)

tools/testing/selftests/powerpc/pmu/ebb/ebb_on_child_test.c

46

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/pmu/ebb/ebb_on_child_test.c

52

FAIL_IF(pipe(read_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/ebb_on_child_test.c

53

FAIL_IF(pipe(write_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/ebb_on_willing_child_test.c

23

static int victim_child(union pipe read_pipe, union pipe write_pipe)

tools/testing/selftests/powerpc/pmu/ebb/ebb_on_willing_child_test.c

51

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/pmu/ebb/ebb_on_willing_child_test.c

57

FAIL_IF(pipe(read_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/ebb_on_willing_child_test.c

58

FAIL_IF(pipe(write_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/ebb_vs_cpu_event_test.c

39

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/pmu/ebb/ebb_vs_cpu_event_test.c

49

FAIL_IF(pipe(read_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/ebb_vs_cpu_event_test.c

50

FAIL_IF(pipe(write_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/task_event_pinned_vs_ebb_test.c

40

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/pmu/ebb/task_event_pinned_vs_ebb_test.c

47

FAIL_IF(pipe(read_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/task_event_pinned_vs_ebb_test.c

48

FAIL_IF(pipe(write_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/task_event_vs_ebb_test.c

38

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/pmu/ebb/task_event_vs_ebb_test.c

45

FAIL_IF(pipe(read_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/ebb/task_event_vs_ebb_test.c

46

FAIL_IF(pipe(write_pipe.fds) == -1);

tools/testing/selftests/powerpc/pmu/lib.c

105

union pipe read_pipe, write_pipe;

tools/testing/selftests/powerpc/pmu/lib.c

111

if (pipe(read_pipe.fds) == -1)

tools/testing/selftests/powerpc/pmu/lib.c

114

if (pipe(write_pipe.fds) == -1)

tools/testing/selftests/powerpc/pmu/lib.c

20

int sync_with_child(union pipe read_pipe, union pipe write_pipe)

tools/testing/selftests/powerpc/pmu/lib.c

32

int wait_for_parent(union pipe read_pipe)

tools/testing/selftests/powerpc/pmu/lib.c

42

int notify_parent(union pipe write_pipe)

tools/testing/selftests/powerpc/pmu/lib.c

51

int notify_parent_of_error(union pipe write_pipe)

tools/testing/selftests/powerpc/pmu/lib.c

84

static int eat_cpu_child(union pipe read_pipe, union pipe write_pipe)

tools/testing/selftests/powerpc/pmu/lib.h

25

extern int sync_with_child(union pipe read_pipe, union pipe write_pipe);

tools/testing/selftests/powerpc/pmu/lib.h

26

extern int wait_for_parent(union pipe read_pipe);

tools/testing/selftests/powerpc/pmu/lib.h

27

extern int notify_parent(union pipe write_pipe);

tools/testing/selftests/powerpc/pmu/lib.h

28

extern int notify_parent_of_error(union pipe write_pipe);

tools/testing/selftests/powerpc/signal/sig_sc_double_restart.c

87

if (pipe(pipefd) == -1) {

tools/testing/selftests/proc/proc-pid-vm.c

320

if (pipe(pipefd) == -1) {

tools/testing/selftests/proc/setns-dcache.c

65

if (pipe(fd) == -1) {

tools/testing/selftests/proc/setns-sysvipc.c

64

if (pipe(fd) == -1) {

tools/testing/selftests/ptrace/set_syscall_info.c

142

ASSERT_EQ(0, pipe(splice_in));

tools/testing/selftests/ptrace/set_syscall_info.c

143

ASSERT_EQ(0, pipe(splice_out));

tools/testing/selftests/resctrl/resctrlfs.c

914

ret = pipe(pipefds);

tools/testing/selftests/riscv/abi/pointer_masking.c

333

ret = pipe(pipefd);

tools/testing/selftests/sched/cs_prctl_test.c

183

if (pipe(proc[i].pfd) == -1)

tools/testing/selftests/sched_ext/init_enable_count.c

29

SCX_FAIL_IF(pipe(pipe_fds) < 0, "Failed to create pipe");

tools/testing/selftests/sched_ext/rt_stall.c

153

if (pipe(ext_ready) || pipe(rt_ready)) {

tools/testing/selftests/seccomp/seccomp_bpf.c

1616

ASSERT_EQ(0, pipe(pipefd));

tools/testing/selftests/seccomp/seccomp_bpf.c

3059

ASSERT_EQ(0, pipe(pipefd));

tools/testing/selftests/seccomp/seccomp_bpf.c

3305

ASSERT_EQ(0, pipe(pipefd));

tools/testing/selftests/seccomp/seccomp_bpf.c

3866

ASSERT_GE(pipe(pipe_fds), 0);

tools/testing/selftests/seccomp/seccomp_bpf.c

3999

ASSERT_EQ(0, pipe(p));

tools/testing/selftests/seccomp/seccomp_bpf.c

4862

ASSERT_EQ(pipe(pipe_fds), 0);

tools/virtio/vringh_test.c

164

pipe_ret = pipe(to_guest);

tools/virtio/vringh_test.c

167

pipe_ret = pipe(to_host);