sys/arch/arm/altera/cycv_gmac.c

136

if (fdtbus_intr_establish_xname(phandle, 0, IPL_NET, FDT_INTR_MPSAFE,

sys/arch/arm/amlogic/meson_dwmac.c

270

FDT_INTR_MPSAFE, meson_dwmac_intr, sc,

sys/arch/arm/amlogic/meson_uart.c

194

FDT_INTR_MPSAFE, meson_uart_intr, sc, device_xname(self));

sys/arch/arm/amlogic/mesongx_mmc.c

379

FDT_INTR_MPSAFE, mesongx_mmc_intr, sc, device_xname(self));

sys/arch/arm/apple/apple_dart.c

685

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_HIGH, FDT_INTR_MPSAFE,

sys/arch/arm/apple/apple_intc.c

238

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/apple/apple_mbox.c

273

IPL_VM, FDT_INTR_MPSAFE, mi->mi_handler, sc,

sys/arch/arm/apple/apple_nvme.c

292

FDT_INTR_MPSAFE, nvme_intr, sc, device_xname(sc->sc_dev));

sys/arch/arm/apple/apple_pcie.c

687

const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? FDT_INTR_MPSAFE : 0;

sys/arch/arm/broadcom/bcm2835_bsc_fdt.c

122

FDT_INTR_MPSAFE, bsciic_intr, sc, device_xname(sc->sc_dev));

sys/arch/arm/broadcom/bcm2835_com.c

120

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL, FDT_INTR_MPSAFE,

sys/arch/arm/broadcom/bcm2835_dwctwo.c

152

sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,

sys/arch/arm/broadcom/bcm2835_gpio.c

346

bank, IPL_VM, FDT_INTR_MPSAFE, bcmgpio_intr,

sys/arch/arm/broadcom/bcm2835_gpio.c

577

int eint_flags = (flags & FDT_INTR_MPSAFE) ? BCMGPIO_INTR_MPSAFE : 0;

sys/arch/arm/broadcom/bcm2835_intr.c

553

int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/broadcom/bcm2835_intr.c

921

int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/broadcom/bcm2835_sdhost.c

247

FDT_INTR_MPSAFE, sdhost_intr, sc, device_xname(self));

sys/arch/arm/broadcom/bcm2835_tmr.c

153

FDT_INTR_MPSAFE, clockhandler, NULL, device_xname(self));

sys/arch/arm/broadcom/bcm2838_pcie.c

823

const int flags = (ih & ARM_PCI_INTR_MPSAFE) ? FDT_INTR_MPSAFE : 0;

sys/arch/arm/fdt/a9ptmr_fdt.c

116

FDT_INTR_MPSAFE, a9ptmr_intr, NULL, device_xname(self));

sys/arch/arm/fdt/a9tmr_fdt.c

116

FDT_INTR_MPSAFE, a9tmr_intr, NULL, device_xname(self));

sys/arch/arm/fdt/aaci_fdt.c

96

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_AUDIO, FDT_INTR_MPSAFE,

sys/arch/arm/fdt/gic_fdt.c

262

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/fdt/gic_fdt.c

312

firqh->ih_mpsafe = (flags & FDT_INTR_MPSAFE) != 0;

sys/arch/arm/fdt/gicv3_fdt.c

362

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/fdt/gicv3_fdt.c

412

firqh->ih_mpsafe = (flags & FDT_INTR_MPSAFE) != 0;

sys/arch/arm/fdt/gtmr_fdt.c

95

FDT_INTR_MPSAFE, gtmr_intr, NULL, device_xname(self));

sys/arch/arm/fdt/pcihost_fdt.c

616

const int flags = (pih & ARM_PCI_INTR_MPSAFE) ? FDT_INTR_MPSAFE : 0;

sys/arch/arm/fdt/plcom_fdt.c

123

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL, FDT_INTR_MPSAFE,

sys/arch/arm/fdt/pmu_fdt.c

148

FDT_INTR_MPSAFE, arm_pmu_intr, NULL, device_xname(self));

sys/arch/arm/imx/imx23_apbdma.c

495

phandle, i, IPL_SCHED, FDT_INTR_MPSAFE, imx23_apbdma_intr,

sys/arch/arm/imx/imx23_icoll.c

300

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/imx/imx23_usbc.c

151

FDT_INTR_MPSAFE, ehci_intr, hsc,

sys/arch/arm/nvidia/tegra_apbdma.c

222

FDT_INTR_MPSAFE, tegra_apbdma_intr, ch, device_xname(dev));

sys/arch/arm/nvidia/tegra_cec.c

174

FDT_INTR_MPSAFE, tegra_cec_intr, sc, device_xname(self));

sys/arch/arm/nvidia/tegra_com.c

135

IPL_SERIAL, FDT_INTR_MPSAFE, comintr, sc, device_xname(self));

sys/arch/arm/nvidia/tegra_ehci.c

134

FDT_INTR_MPSAFE, ehci_intr, &sc->sc, device_xname(self));

sys/arch/arm/nvidia/tegra_i2c.c

148

FDT_INTR_MPSAFE, tegra_i2c_intr, sc, device_xname(self));

sys/arch/arm/nvidia/tegra_lic.c

136

int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/nvidia/tegra_mc.c

119

FDT_INTR_MPSAFE, tegra_mc_intr, sc, device_xname(self));

sys/arch/arm/nvidia/tegra_nouveau.c

294

FDT_INTR_MPSAFE, tegra_nouveau_intr, sc, device_xname(self));

sys/arch/arm/nvidia/tegra_pcie.c

230

FDT_INTR_MPSAFE, tegra_pcie_intr, sc, device_xname(self));

sys/arch/arm/nvidia/tegra_xusb.c

275

FDT_INTR_MPSAFE, xhci_intr, sc, device_xname(self));

sys/arch/arm/nvidia/tegra_xusb.c

289

IPL_VM, FDT_INTR_MPSAFE, tegra_xusb_intr_mbox, psc,

sys/arch/arm/nxp/imx6_gpc.c

133

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/nxp/imx6_pcie.c

214

FDT_INTR_MPSAFE, imxpcie_intr, sc, device_xname(self));

sys/arch/arm/nxp/imx6_usb.c

294

FDT_INTR_MPSAFE, ehci_intr, hsc, device_xname(sc->sc_dev));

sys/arch/arm/nxp/imx7_gpc.c

220

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/nxp/imx_gpio.c

246

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/nxp/imx_sdhc.c

203

FDT_INTR_MPSAFE, sdhc_intr, &sc->sc_sdhc, device_xname(self));

sys/arch/arm/nxp/imxwdog.c

179

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,

sys/arch/arm/rockchip/rk_eqos.c

394

if (fdtbus_intr_establish_xname(phandle, 0, IPL_NET, FDT_INTR_MPSAFE,

sys/arch/arm/rockchip/rk_gmac.c

552

FDT_INTR_MPSAFE, rk_gmac_intr, sc,

sys/arch/arm/rockchip/rk_gpio.c

677

FDT_INTR_MPSAFE, rk_gpio_intr, sc, device_xname(self));

sys/arch/arm/rockchip/rk_i2s.c

609

if (fdtbus_intr_establish_xname(phandle, 0, IPL_AUDIO, FDT_INTR_MPSAFE,

sys/arch/arm/rockchip/rk_tsadc.c

563

sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,

sys/arch/arm/rockchip/rk_vop.c

836

FDT_INTR_MPSAFE, &rk_vop_intr, sc, device_xname(self));

sys/arch/arm/samsung/exynos_combiner.c

247

const bool mpsafe = (flags & FDT_INTR_MPSAFE) != 0;

sys/arch/arm/samsung/exynos_combiner.c

262

sc->sc_phandle, group, ipl /* XXX */, FDT_INTR_MPSAFE,

sys/arch/arm/samsung/exynos_ehci.c

129

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,

sys/arch/arm/samsung/exynos_i2c.c

163

FDT_INTR_MPSAFE, exynos_i2c_intr, sc, device_xname(self));

sys/arch/arm/samsung/exynos_ohci.c

125

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,

sys/arch/arm/samsung/mct.c

197

FDT_INTR_MPSAFE, mct_intr, NULL, device_xname(sc->sc_dev));

sys/arch/arm/sunxi/sun4i_dma.c

412

FDT_INTR_MPSAFE, sun4idma_intr, sc, device_xname(sc->sc_dev));

sys/arch/arm/sunxi/sun6i_dma.c

540

FDT_INTR_MPSAFE, sun6idma_intr, sc, device_xname(sc->sc_dev));

sys/arch/arm/sunxi/sun8i_codec.c

479

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,

sys/arch/arm/sunxi/sun8i_crypto.c

471

FDT_INTR_MPSAFE, &sun8i_crypto_intr, sc, device_xname(self));

sys/arch/arm/sunxi/sunxi_emac.c

65

#define FDT_INTR_FLAGS FDT_INTR_MPSAFE

sys/arch/arm/sunxi/sunxi_gmac.c

205

FDT_INTR_MPSAFE, sunxi_gmac_intr, sc,

sys/arch/arm/sunxi/sunxi_gpio.c

1068

FDT_INTR_MPSAFE, sunxi_gpio_intr, sc, device_xname(self));

sys/arch/arm/sunxi/sunxi_gpio.c

552

bool mpsafe = (flags & FDT_INTR_MPSAFE) != 0;

sys/arch/arm/sunxi/sunxi_hstimer.c

190

FDT_INTR_MPSAFE, sunxi_hstimer_intr, sc, device_xname(sc->sc_dev));

sys/arch/arm/sunxi/sunxi_intc.c

148

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/sunxi/sunxi_lcdc.c

541

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,

sys/arch/arm/sunxi/sunxi_lradc.c

188

FDT_INTR_MPSAFE, sunxi_lradc_intr, sc, device_xname(self));

sys/arch/arm/sunxi/sunxi_mmc.c

423

FDT_INTR_MPSAFE, sunxi_mmc_intr, sc, device_xname(self));

sys/arch/arm/sunxi/sunxi_musb.c

384

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,

sys/arch/arm/sunxi/sunxi_nand.c

671

FDT_INTR_MPSAFE, sunxi_nand_intr, sc, device_xname(self));

sys/arch/arm/sunxi/sunxi_nmi.c

268

sc->sc_is.is_mpsafe = (flags & FDT_INTR_MPSAFE) ? true : false;

sys/arch/arm/sunxi/sunxi_thermal.c

608

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,

sys/arch/arm/sunxi/sunxi_timer.c

148

FDT_INTR_MPSAFE, sunxi_timer_intr, NULL, device_xname(sc->sc_dev));

sys/arch/arm/ti/am18xx_intc.c

125

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/ti/am18xx_ohci.c

153

FDT_INTR_MPSAFE, ohci_intr, &sc->ohci_sc, device_xname(self));

sys/arch/arm/ti/ti_com.c

124

FDT_INTR_MPSAFE, comintr, sc, device_xname(self));

sys/arch/arm/ti/ti_edma.c

162

IPL_VM, FDT_INTR_MPSAFE, edma_intr, sc, device_xname(self));

sys/arch/arm/ti/ti_ehci.c

140

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,

sys/arch/arm/ti/ti_gpio.c

317

sc->sc_intr[pin].intr_mpsafe = (flags & FDT_INTR_MPSAFE) != 0;

sys/arch/arm/ti/ti_gpio.c

648

FDT_INTR_MPSAFE, ti_gpio_intr, sc, device_xname(self));

sys/arch/arm/ti/ti_omapintc.c

195

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/ti/ti_omapmusb.c

221

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,

sys/arch/arm/ti/ti_omaptimer.c

145

FDT_INTR_MPSAFE, omaptimer_intr, NULL, device_xname(sc->sc_dev));

sys/arch/mips/cavium/dev/octeon_cib.c

164

ih = fdtbus_intr_establish(phandle, 0, IPL_SCHED, FDT_INTR_MPSAFE,

sys/arch/mips/cavium/dev/octeon_cib.c

193

ih->ih_mpsafe = (flags & FDT_INTR_MPSAFE) != 0;

sys/arch/mips/cavium/dev/octeon_xhci.c

166

ih = fdtbus_intr_establish(child, 0, IPL_USB, FDT_INTR_MPSAFE,

sys/arch/riscv/dev/plic_fdt.c

135

context, IPL_VM, FDT_INTR_MPSAFE,

sys/arch/riscv/dev/plic_fdt.c

71

(flags & FDT_INTR_MPSAFE) != 0 ? IST_MPSAFE : 0, func, arg, xname);

sys/arch/riscv/fdt/clint_fdt.c

242

context, ipl, FDT_INTR_MPSAFE,

sys/arch/riscv/fdt/intc_fdt.c

213

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/riscv/fdt/pcihost_fdt.c

597

const int flags = (pih & RISCV_PCI_INTR_MPSAFE) ? FDT_INTR_MPSAFE : 0;

sys/arch/riscv/starfive/jh7100_gmac.c

148

FDT_INTR_MPSAFE, jh7100_gmac_intr, sc, device_xname(self));

sys/arch/riscv/starfive/jh7110_eqos.c

153

FDT_INTR_MPSAFE, eqos_intr, eqos_sc, device_xname(self));

sys/arch/riscv/starfive/jh7110_pcie.c

282

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/riscv/starfive/jh7110_pcie.c

689

FDT_INTR_MPSAFE, jh7110_pcie_intr, sc, device_xname(self));

sys/arch/riscv/starfive/jh7110_trng.c

391

FDT_INTR_MPSAFE, jh7110_trng_intr, sc, device_xname(self));

sys/dev/fdt/cdns3_fdt.c

187

FDT_INTR_MPSAFE, xhci_intr, sc, device_xname(self));

sys/dev/fdt/dw_apb_uart.c

146

IPL_SERIAL, FDT_INTR_MPSAFE, comintr, sc, device_xname(self));

sys/dev/fdt/dwc2_fdt.c

175

FDT_INTR_MPSAFE, dwc2_intr, &sc->sc_dwc2, device_xname(self));

sys/dev/fdt/dwc3_fdt.c

339

FDT_INTR_MPSAFE, xhci_intr, sc, device_xname(self));

sys/dev/fdt/ehci_fdt.c

136

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,

sys/dev/fdt/genet_fdt.c

123

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_NET, FDT_INTR_MPSAFE,

sys/dev/fdt/ns8250_uart.c

168

FDT_INTR_MPSAFE, comintr, sc, device_xname(self));

sys/dev/fdt/ohci_fdt.c

132

ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,

sys/dev/fdt/virtio_mmio_fdt.c

157

flags |= FDT_INTR_MPSAFE;

sys/dev/i2c/axppmic.c

1230

FDT_INTR_MPSAFE,