bin/chio/chio.c

176

int val;

bin/chio/chio.c

225

val = parse_special(*argv);

bin/chio/chio.c

226

switch (val) {

bin/chio/chio.c

254

int val;

bin/chio/chio.c

327

val = parse_special(*argv);

bin/chio/chio.c

329

switch (val) {

bin/chio/chio.c

363

int val;

bin/chio/chio.c

394

val = parse_special(*argv);

bin/chio/chio.c

395

switch (val) {

bin/chio/chio.c

885

int val;

bin/chio/chio.c

887

val = is_special(cp);

bin/chio/chio.c

888

if (val)

bin/chio/chio.c

889

return (val);

bin/date/vary.c

129

adjyear(struct tm *t, char type, long val, int mk)

bin/date/vary.c

133

t->tm_year += val;

bin/date/vary.c

136

t->tm_year -= val;

bin/date/vary.c

139

t->tm_year = val;

bin/date/vary.c

150

adjmon(struct tm *t, char type, long val, int istext, int mk)

bin/date/vary.c

153

if (val < 0)

bin/date/vary.c

159

if (val <= t->tm_mon)

bin/date/vary.c

160

val += 11 - t->tm_mon; /* early next year */

bin/date/vary.c

162

val -= t->tm_mon + 1; /* later this year */

bin/date/vary.c

164

if (val) {

bin/date/vary.c

165

if (!adjyear(t, '+', (t->tm_mon + val) / 12, 0))

bin/date/vary.c

167

val %= 12;

bin/date/vary.c

168

t->tm_mon += val;

bin/date/vary.c

176

if (val-1 > t->tm_mon)

bin/date/vary.c

177

val = 13 - val + t->tm_mon; /* later last year */

bin/date/vary.c

179

val = t->tm_mon - val + 1; /* early this year */

bin/date/vary.c

181

if (val) {

bin/date/vary.c

182

if (!adjyear(t, '-', val / 12, 0))

bin/date/vary.c

184

val %= 12;

bin/date/vary.c

185

if (val > t->tm_mon) {

bin/date/vary.c

188

val -= 12;

bin/date/vary.c

190

t->tm_mon -= val;

bin/date/vary.c

195

if (val > 12 || val < 1)

bin/date/vary.c

197

t->tm_mon = --val;

bin/date/vary.c

209

adjday(struct tm *t, char type, long val, int mk)

bin/date/vary.c

215

while (val) {

bin/date/vary.c

217

if (val > daycount - t->tm_mday) {

bin/date/vary.c

218

val -= daycount - t->tm_mday + 1;

bin/date/vary.c

223

t->tm_mday += val;

bin/date/vary.c

224

val = 0;

bin/date/vary.c

229

while (val)

bin/date/vary.c

230

if (val >= t->tm_mday) {

bin/date/vary.c

231

val -= t->tm_mday;

bin/date/vary.c

237

t->tm_mday -= val;

bin/date/vary.c

238

val = 0;

bin/date/vary.c

242

if (val > 0 && val <= daysinmonth(t))

bin/date/vary.c

243

t->tm_mday = val;

bin/date/vary.c

253

adjwday(struct tm *t, char type, long val, int istext, int mk)

bin/date/vary.c

255

if (val < 0)

bin/date/vary.c

261

if (val < t->tm_wday)

bin/date/vary.c

262

val = 7 - t->tm_wday + val; /* early next week */

bin/date/vary.c

264

val -= t->tm_wday; /* later this week */

bin/date/vary.c

266

val *= 7; /* "-v+5w" == "5 weeks in the future" */

bin/date/vary.c

267

return !val || adjday(t, '+', val, mk);

bin/date/vary.c

270

if (val > t->tm_wday)

bin/date/vary.c

271

val = 7 - val + t->tm_wday; /* later last week */

bin/date/vary.c

273

val = t->tm_wday - val; /* early this week */

bin/date/vary.c

275

val *= 7; /* "-v-5w" == "5 weeks ago" */

bin/date/vary.c

276

return !val || adjday(t, '-', val, mk);

bin/date/vary.c

278

if (val < t->tm_wday)

bin/date/vary.c

279

return adjday(t, '-', t->tm_wday - val, mk);

bin/date/vary.c

280

else if (val > 6)

bin/date/vary.c

282

else if (val > t->tm_wday)

bin/date/vary.c

283

return adjday(t, '+', val - t->tm_wday, mk);

bin/date/vary.c

289

adjhour(struct tm *t, char type, long val, int mk)

bin/date/vary.c

291

if (val < 0)

bin/date/vary.c

296

if (val) {

bin/date/vary.c

299

days = (t->tm_hour + val) / 24;

bin/date/vary.c

300

val %= 24;

bin/date/vary.c

301

t->tm_hour += val;

bin/date/vary.c

309

if (val) {

bin/date/vary.c

312

days = val / 24;

bin/date/vary.c

313

val %= 24;

bin/date/vary.c

314

if (val > t->tm_hour) {

bin/date/vary.c

316

val -= 24;

bin/date/vary.c

318

t->tm_hour -= val;

bin/date/vary.c

325

if (val > 23)

bin/date/vary.c

327

t->tm_hour = val;

bin/date/vary.c

334

adjmin(struct tm *t, char type, long val, int mk)

bin/date/vary.c

336

if (val < 0)

bin/date/vary.c

341

if (val) {

bin/date/vary.c

342

if (!adjhour(t, '+', (t->tm_min + val) / 60, 0))

bin/date/vary.c

344

val %= 60;

bin/date/vary.c

345

t->tm_min += val;

bin/date/vary.c

352

if (val) {

bin/date/vary.c

353

if (!adjhour(t, '-', val / 60, 0))

bin/date/vary.c

355

val %= 60;

bin/date/vary.c

356

if (val > t->tm_min) {

bin/date/vary.c

359

val -= 60;

bin/date/vary.c

361

t->tm_min -= val;

bin/date/vary.c

366

if (val > 59)

bin/date/vary.c

368

t->tm_min = val;

bin/date/vary.c

375

adjsec(struct tm *t, char type, long val, int mk)

bin/date/vary.c

377

if (val < 0)

bin/date/vary.c

382

if (val) {

bin/date/vary.c

383

if (!adjmin(t, '+', (t->tm_sec + val) / 60, 0))

bin/date/vary.c

385

val %= 60;

bin/date/vary.c

386

t->tm_sec += val;

bin/date/vary.c

39

long val;

bin/date/vary.c

393

if (val) {

bin/date/vary.c

394

if (!adjmin(t, '-', val / 60, 0))

bin/date/vary.c

396

val %= 60;

bin/date/vary.c

397

if (val > t->tm_sec) {

bin/date/vary.c

400

val -= 60;

bin/date/vary.c

402

t->tm_sec -= val;

bin/date/vary.c

407

if (val > 59)

bin/date/vary.c

409

t->tm_sec = val;

bin/date/vary.c

432

long val;

bin/date/vary.c

491

val = strtoul(arg, &tmp, 10);

bin/date/vary.c

494

if (!adjsec(t, type, val, 1))

bin/date/vary.c

497

if (!adjmin(t, type, val, 1))

bin/date/vary.c

500

if (!adjhour(t, type, val, 1))

bin/date/vary.c

504

if (!adjday(t, type, val, 1))

bin/date/vary.c

508

if (!adjwday(t, type, val, 0, 1))

bin/date/vary.c

512

if (!adjmon(t, type, val, 0, 1))

bin/date/vary.c

516

if (!adjyear(t, type, val, 1))

bin/date/vary.c

535

if ((val = trans(trans_wday, arg)) != -1) {

bin/date/vary.c

536

if (!adjwday(t, type, val, 1, 1))

bin/date/vary.c

547

if ((val = trans(trans_mon, arg)) != -1) {

bin/date/vary.c

548

if (!adjmon(t, type, val, 1, 1))

bin/date/vary.c

556

val = strtoul(arg, &tmp, 10);

bin/date/vary.c

559

if (!adjday(t, 0, val, 1))

bin/date/vary.c

573

val = strtol(arg, &tmp, 10);

bin/date/vary.c

575

if (!adjyear(t, type, val, 1))

bin/date/vary.c

584

val = strtol(arg, &tmp, 10);

bin/date/vary.c

616

val = strtol(arg, &tmp, 10);

bin/date/vary.c

618

if (!adjyear(t, type, val, 1))

bin/date/vary.c

636

val = strtol(arg, NULL, 10);

bin/date/vary.c

75

for (f = 0; t[f].val != -1; f++)

bin/date/vary.c

78

return t[f].val;

bin/dd/args.c

408

get_num(const char *val)

bin/dd/args.c

414

num = strtoumax(val, &expr, 0);

bin/dd/args.c

415

if (expr == val) /* No valid digits. */

bin/dd/args.c

458

get_off_t(const char *val)

bin/dd/args.c

464

num = strtoimax(val, &expr, 0);

bin/dd/args.c

465

if (expr == val) /* No valid digits. */

bin/df/df.c

474

quadwidth(int64_t val)

bin/df/df.c

480

if (val <= 0) {

bin/df/df.c

481

val = -val;

bin/df/df.c

484

while (val > 0) {

bin/df/df.c

486

val /= 10;

bin/expr/expr.y

109

struct val *

bin/expr/expr.y

112

struct val *vp;

bin/expr/expr.y

114

vp = (struct val *) malloc (sizeof (*vp));

bin/expr/expr.y

124

struct val *

bin/expr/expr.y

127

struct val *vp;

bin/expr/expr.y

131

vp = (struct val *) malloc (sizeof (*vp));

bin/expr/expr.y

154

free_value(struct val *vp)

bin/expr/expr.y

162

to_integer(struct val *vp)

bin/expr/expr.y

185

to_string(struct val *vp)

bin/expr/expr.y

204

isstring(struct val *vp)

bin/expr/expr.y

232

yylval.val = make_str (p);

bin/expr/expr.y

237

is_zero_or_null(struct val *vp)

bin/expr/expr.y

284

struct val *

bin/expr/expr.y

285

op_or(struct val *a, struct val *b)

bin/expr/expr.y

296

struct val *

bin/expr/expr.y

297

op_and(struct val *a, struct val *b)

bin/expr/expr.y

309

struct val *

bin/expr/expr.y

310

op_eq(struct val *a, struct val *b)

bin/expr/expr.y

312

struct val *r;

bin/expr/expr.y

329

struct val *

bin/expr/expr.y

330

op_gt(struct val *a, struct val *b)

bin/expr/expr.y

332

struct val *r;

bin/expr/expr.y

349

struct val *

bin/expr/expr.y

35

static struct val *result;

bin/expr/expr.y

350

op_lt(struct val *a, struct val *b)

bin/expr/expr.y

352

struct val *r;

bin/expr/expr.y

369

struct val *

bin/expr/expr.y

370

op_ge(struct val *a, struct val *b)

bin/expr/expr.y

372

struct val *r;

bin/expr/expr.y

389

struct val *

bin/expr/expr.y

390

op_le(struct val *a, struct val *b)

bin/expr/expr.y

392

struct val *r;

bin/expr/expr.y

409

struct val *

bin/expr/expr.y

41

void free_value (struct val *);

bin/expr/expr.y

410

op_ne(struct val *a, struct val *b)

bin/expr/expr.y

412

struct val *r;

bin/expr/expr.y

42

int is_zero_or_null (struct val *);

bin/expr/expr.y

43

int isstring (struct val *);

bin/expr/expr.y

442

struct val *

bin/expr/expr.y

443

op_plus(struct val *a, struct val *b)

bin/expr/expr.y

445

struct val *r;

bin/expr/expr.y

45

struct val *make_integer (quad_t);

bin/expr/expr.y

46

struct val *make_str (const char *);

bin/expr/expr.y

47

struct val *op_and (struct val *, struct val *);

bin/expr/expr.y

474

struct val *

bin/expr/expr.y

475

op_minus(struct val *a, struct val *b)

bin/expr/expr.y

477

struct val *r;

bin/expr/expr.y

48

struct val *op_colon (struct val *, struct val *);

bin/expr/expr.y

49

struct val *op_div (struct val *, struct val *);

bin/expr/expr.y

50

struct val *op_eq (struct val *, struct val *);

bin/expr/expr.y

504

struct val *

bin/expr/expr.y

505

op_times(struct val *a, struct val *b)

bin/expr/expr.y

507

struct val *r;

bin/expr/expr.y

51

struct val *op_ge (struct val *, struct val *);

bin/expr/expr.y

52

struct val *op_gt (struct val *, struct val *);

bin/expr/expr.y

53

struct val *op_le (struct val *, struct val *);

bin/expr/expr.y

533

struct val *

bin/expr/expr.y

534

op_div(struct val *a, struct val *b)

bin/expr/expr.y

536

struct val *r;

bin/expr/expr.y

54

struct val *op_lt (struct val *, struct val *);

bin/expr/expr.y

55

struct val *op_minus (struct val *, struct val *);

bin/expr/expr.y

555

struct val *

bin/expr/expr.y

556

op_rem(struct val *a, struct val *b)

bin/expr/expr.y

558

struct val *r;

bin/expr/expr.y

56

struct val *op_ne (struct val *, struct val *);

bin/expr/expr.y

57

struct val *op_or (struct val *, struct val *);

bin/expr/expr.y

575

struct val *

bin/expr/expr.y

576

op_colon(struct val *a, struct val *b)

bin/expr/expr.y

58

struct val *op_plus (struct val *, struct val *);

bin/expr/expr.y

582

struct val *v;

bin/expr/expr.y

59

struct val *op_rem (struct val *, struct val *);

bin/expr/expr.y

60

struct val *op_times (struct val *, struct val *);

bin/expr/expr.y

61

quad_t to_integer (struct val *);

bin/expr/expr.y

62

void to_string (struct val *);

bin/expr/expr.y

71

struct val *val;

bin/expr/expr.y

74

%left <val> '|'

bin/expr/expr.y

75

%left <val> '&'

bin/expr/expr.y

76

%left <val> '=' '>' '<' GE LE NE

bin/expr/expr.y

77

%left <val> '+' '-'

bin/expr/expr.y

78

%left <val> '*' '/' '%'

bin/expr/expr.y

79

%left <val> ':'

bin/expr/expr.y

81

%token <val> TOKEN

bin/expr/expr.y

82

%type <val> start expr

bin/pax/cpio.h

110

#define CHR_WR_0(val) ((char)(((val) >> 24) & 0xff))

bin/pax/cpio.h

111

#define CHR_WR_1(val) ((char)(((val) >> 16) & 0xff))

bin/pax/cpio.h

112

#define CHR_WR_2(val) ((char)(((val) >> 8) & 0xff))

bin/pax/cpio.h

113

#define CHR_WR_3(val) ((char)((val) & 0xff))

bin/pax/gen_subs.c

250

ul_asc(u_long val, char *str, int len, int base)

bin/pax/gen_subs.c

267

if ((digit = (val & 0xf)) < 10)

bin/pax/gen_subs.c

271

if ((val = (val >> 4)) == (u_long)0)

bin/pax/gen_subs.c

276

*pt-- = '0' + (char)(val & 0x7);

bin/pax/gen_subs.c

277

if ((val = (val >> 3)) == (u_long)0)

bin/pax/gen_subs.c

287

if (val != (u_long)0)

bin/pax/gen_subs.c

346

uqd_asc(u_quad_t val, char *str, int len, int base)

bin/pax/gen_subs.c

363

if ((digit = (val & 0xf)) < 10)

bin/pax/gen_subs.c

367

if ((val = (val >> 4)) == (u_quad_t)0)

bin/pax/gen_subs.c

372

*pt-- = '0' + (char)(val & 0x7);

bin/pax/gen_subs.c

373

if ((val = (val >> 3)) == (u_quad_t)0)

bin/pax/gen_subs.c

383

if (val != (u_quad_t)0)

bin/pax/options.c

1423

str_offt(char *val)

bin/pax/options.c

1428

num = strtoq(val, &expr, 0);

bin/pax/options.c

1429

if ((num == QUAD_MAX) || (num <= 0) || (expr == val))

bin/pax/tables.c

1232

u_int val;

bin/pax/tables.c

1259

dest = (char *)&val;

bin/pax/tables.c

1262

key += val;

bin/pax/tables.c

1269

val = 0;

bin/pax/tables.c

1271

dest = (char *)&val;

bin/pax/tables.c

1274

key += val;

bin/pax/tar.c

146

ul_oct(u_long val, char *str, int len, int term)

bin/pax/tar.c

176

*pt-- = '0' + (char)(val & 0x7);

bin/pax/tar.c

177

if ((val = val >> 3) == (u_long)0)

bin/pax/tar.c

183

if (val != (u_long)0)

bin/pax/tar.c

200

uqd_oct(u_quad_t val, char *str, int len, int term)

bin/pax/tar.c

230

*pt-- = '0' + (char)(val & 0x7);

bin/pax/tar.c

231

if ((val = val >> 3) == 0)

bin/pax/tar.c

237

if (val != (u_quad_t)0)

bin/ps/print.c

332

int val = KI_LWP(k, tdprio);

bin/ps/print.c

334

snprintf(buf, sizeof(buf), "%2d", val);

bin/ps/print.c

726

int val;

bin/ps/print.c

728

val = *(int *)((char *)&k->ki_proc->kp_lwp + vent->var->off);

bin/ps/print.c

729

val = val / 128;

bin/ps/print.c

730

printval((char *)&val, vent);

bin/sh/alias.c

174

out1qstr(a->val);

bin/sh/alias.c

62

setalias(const char *name, const char *val)

bin/sh/alias.c

71

ap->val = savestr(val);

bin/sh/alias.c

83

ckfree(ap->val);

bin/sh/alias.h

41

char *val;

bin/sh/arith_yacc.c

168

static arith_t primary(int token, union yystype *val, int op, int noeval)

bin/sh/arith_yacc.c

182

return val->val;

bin/sh/arith_yacc.c

185

return noeval ? val->val : arith_lookupvarint(val->name);

bin/sh/arith_yacc.c

188

*val = yylval;

bin/sh/arith_yacc.c

192

*val = yylval;

bin/sh/arith_yacc.c

193

return -primary(op, val, yylex(), noeval);

bin/sh/arith_yacc.c

195

*val = yylval;

bin/sh/arith_yacc.c

196

return !primary(op, val, yylex(), noeval);

bin/sh/arith_yacc.c

198

*val = yylval;

bin/sh/arith_yacc.c

199

return ~primary(op, val, yylex(), noeval);

bin/sh/arith_yacc.c

208

union yystype val;

bin/sh/arith_yacc.c

214

val = yylval;

bin/sh/arith_yacc.c

216

b = primary(token, &val, yylex(), noeval);

bin/sh/arith_yacc.c

235

static arith_t binop(int token, union yystype *val, int op, int noeval)

bin/sh/arith_yacc.c

237

arith_t a = primary(token, val, op, noeval);

bin/sh/arith_yacc.c

246

static arith_t and(int token, union yystype *val, int op, int noeval)

bin/sh/arith_yacc.c

248

arith_t a = binop(token, val, op, noeval);

bin/sh/arith_yacc.c

256

*val = yylval;

bin/sh/arith_yacc.c

258

b = and(token, val, yylex(), noeval | !a);

bin/sh/arith_yacc.c

263

static arith_t or(int token, union yystype *val, int op, int noeval)

bin/sh/arith_yacc.c

265

arith_t a = and(token, val, op, noeval);

bin/sh/arith_yacc.c

273

*val = yylval;

bin/sh/arith_yacc.c

275

b = or(token, val, yylex(), noeval | !!a);

bin/sh/arith_yacc.c

280

static arith_t cond(int token, union yystype *val, int op, int noeval)

bin/sh/arith_yacc.c

282

arith_t a = or(token, val, op, noeval);

bin/sh/arith_yacc.c

295

*val = yylval;

bin/sh/arith_yacc.c

297

c = cond(token, val, yylex(), noeval | !!a);

bin/sh/arith_yacc.c

304

union yystype val = yylval;

bin/sh/arith_yacc.c

310

return cond(var, &val, op, noeval);

bin/sh/arith_yacc.c

313

return cond(var, &val, op, noeval);

bin/sh/arith_yacc.c

320

result = do_binop(op - 11, arith_lookupvarint(val.name), result);

bin/sh/arith_yacc.c

322

setvar(val.name, sresult, 0);

bin/sh/arith_yacc.h

87

arith_t val;

bin/sh/arith_yylex.c

109

yylval.val = strtoarith_t(buf, &end);

bin/sh/arith_yylex.c

58

arith_t val;

bin/sh/arith_yylex.c

68

val = (arith_t)strtoumax(nptr, endptr, 0);

bin/sh/arith_yylex.c

69

if (val >= 0)

bin/sh/arith_yylex.c

70

return val;

bin/sh/arith_yylex.c

71

else if (val == ARITH_MIN) {

bin/sh/error.h

94

#define longjmp(jmploc, val) _longjmp(jmploc, val)

bin/sh/exec.c

733

out1qstr(ap->val);

bin/sh/exec.c

737

ap->val);

bin/sh/expand.c

1446

casematch(union node *pattern, const char *val)

bin/sh/expand.c

1459

result = patmatch(p, val);

bin/sh/expand.c

667

const char *val;

bin/sh/expand.c

687

val = NULL;

bin/sh/expand.c

690

val = NULL;

bin/sh/expand.c

692

val = bltinlookup(var, 1);

bin/sh/expand.c

693

if (val == NULL || ((varflags & VSNUL) && val[0] == '\0')) {

bin/sh/expand.c

694

val = NULL;

bin/sh/expand.c

730

val = stackblock() + startloc;

bin/sh/expand.c

731

for (;val != expdest; val++)

bin/sh/expand.c

732

if ((*val & 0xC0) == 0x80)

bin/sh/expand.c

739

for (;*val; val++)

bin/sh/expand.c

741

(*val & 0xC0) != 0x80)

bin/sh/expand.c

745

strtodest(val, flag, subtype,

bin/sh/expand.c

795

val = lookupvar(var);

bin/sh/expand.c

796

strtodest(val, flag, subtype, varflags & VSQUOTE, dst);

bin/sh/input.c

339

if (parsenextc != sp->ap->val &&

bin/sh/miscbltin.c

502

rlim_t val = 0;

bin/sh/miscbltin.c

505

val = limit->rlim_cur;

bin/sh/miscbltin.c

507

val = limit->rlim_max;

bin/sh/miscbltin.c

508

if (val == RLIM_INFINITY)

bin/sh/miscbltin.c

512

val /= l->factor;

bin/sh/miscbltin.c

513

out1fmt("%jd\n", (intmax_t)val);

bin/sh/miscbltin.c

520

rlim_t val = 0;

bin/sh/miscbltin.c

555

val = RLIM_INFINITY;

bin/sh/miscbltin.c

569

val = (rlim_t)uval;

bin/sh/miscbltin.c

570

if (val < 0 || (uintmax_t)val != uval ||

bin/sh/miscbltin.c

571

val == RLIM_INFINITY)

bin/sh/miscbltin.c

597

limit.rlim_cur = val;

bin/sh/miscbltin.c

599

limit.rlim_max = val;

bin/sh/options.c

154

int val;

bin/sh/options.c

162

val = 1;

bin/sh/options.c

188

val = 0;

bin/sh/options.c

202

minus_o(*argptr, val);

bin/sh/options.c

206

setoption(c, val);

bin/sh/options.c

250

minus_o(char *name, int val)

bin/sh/options.c

257

if (val) {

bin/sh/options.c

276

setoptionbyindex(i, val);

bin/sh/options.c

285

setoptionbyindex(int idx, int val)

bin/sh/options.c

287

if (&optval[idx] == &privileged && !val && privileged) {

bin/sh/options.c

293

optval[idx] = val;

bin/sh/options.c

294

if (val) {

bin/sh/options.c

304

setoption(int flag, int val)

bin/sh/options.c

310

setoptionbyindex(i, val);

bin/sh/parser.c

863

pushstring(ap->val, strlen(ap->val), ap);

bin/sh/var.c

201

setvarsafe(const char *name, const char *val, int flags)

bin/sh/var.c

213

setvar(name, val, flags);

bin/sh/var.c

226

setvar(const char *name, const char *val, int flags)

bin/sh/var.c

252

if (val == NULL) {

bin/sh/var.c

256

vallen = strlen(val);

bin/sh/var.c

263

if (val)

bin/sh/var.c

264

memcpy(nameeq + namelen + 1, val, vallen + 1);

bin/stty/cchar.c

119

val = strtol(arg, &ep, 10);

bin/stty/cchar.c

120

if (val > UCHAR_MAX) {

bin/stty/cchar.c

129

ip->t.c_cc[cp->sub] = val;

bin/stty/cchar.c

96

long val;

crypto/libressl/apps/nc/netcat.c

1638

process_tos_opt(char *s, int *val)

crypto/libressl/apps/nc/netcat.c

1643

int val;

crypto/libressl/apps/nc/netcat.c

1677

*val = t->val;

crypto/libressl/apps/openssl/apps.c

1006

val = sk_CONF_VALUE_value(vals, i);

crypto/libressl/apps/openssl/apps.c

1007

if (!set_table_opts(flags, val->name, in_tbl))

crypto/libressl/apps/openssl/apps.c

2080

long long val;

crypto/libressl/apps/openssl/apps.c

2168

val = strtonum(argv[i], 0, INT_MAX, &errstr);

crypto/libressl/apps/openssl/apps.c

2174

*opt->opt.value = (int)val;

crypto/libressl/apps/openssl/apps.c

2178

val = strtonum(argv[i], 0, LONG_MAX, &errstr);

crypto/libressl/apps/openssl/apps.c

2184

*opt->opt.lvalue = (long)val;

crypto/libressl/apps/openssl/apps.c

2188

val = strtonum(argv[i], 0, LLONG_MAX, &errstr);

crypto/libressl/apps/openssl/apps.c

2194

*opt->opt.tvalue = val;

crypto/libressl/apps/openssl/apps.c

999

CONF_VALUE *val;

crypto/libressl/apps/openssl/certhash.c

253

long long val;

crypto/libressl/apps/openssl/certhash.c

267

val = strtoll(l, &ep, 16);

crypto/libressl/apps/openssl/certhash.c

270

if (errno == ERANGE && (val == LLONG_MAX || val == LLONG_MIN))

crypto/libressl/apps/openssl/certhash.c

272

if (val < 0 || val > ULONG_MAX)

crypto/libressl/apps/openssl/certhash.c

274

hi->hash = (unsigned long)val;

crypto/libressl/apps/openssl/certhash.c

281

val = strtonum(p, 0, 0xffffffff, &errstr);

crypto/libressl/apps/openssl/certhash.c

285

hi->index = (unsigned int)val;

crypto/libressl/crypto/asn1/a_enum.c

127

ASN1_ENUMERATED_set_int64(ASN1_ENUMERATED *aenum, int64_t val)

crypto/libressl/crypto/asn1/a_enum.c

133

uval = (uint64_t)val;

crypto/libressl/crypto/asn1/a_enum.c

135

if (val < 0) {

crypto/libressl/crypto/asn1/a_enum.c

146

int64_t val;

crypto/libressl/crypto/asn1/a_enum.c

150

if (!ASN1_ENUMERATED_get_int64(&val, aenum))

crypto/libressl/crypto/asn1/a_enum.c

152

if (val < LONG_MIN || val > LONG_MAX) {

crypto/libressl/crypto/asn1/a_enum.c

157

return (long)val;

crypto/libressl/crypto/asn1/a_enum.c

161

ASN1_ENUMERATED_set(ASN1_ENUMERATED *aenum, long val)

crypto/libressl/crypto/asn1/a_enum.c

163

return ASN1_ENUMERATED_set_int64(aenum, val);

crypto/libressl/crypto/asn1/a_int.c

132

uint64_t val = 0;

crypto/libressl/crypto/asn1/a_int.c

140

if (val > (UINT64_MAX >> 8)) {

crypto/libressl/crypto/asn1/a_int.c

144

val = val << 8 | u8;

crypto/libressl/crypto/asn1/a_int.c

147

*out_val = val;

crypto/libressl/crypto/asn1/a_int.c

153

asn1_aint_set_uint64(uint64_t val, uint8_t **out_data, int *out_len)

crypto/libressl/crypto/asn1/a_int.c

172

u8 = (val >> (i * 8)) & 0xff;

crypto/libressl/crypto/asn1/a_int.c

200

uint64_t val;

crypto/libressl/crypto/asn1/a_int.c

202

if (!asn1_aint_get_uint64(cbs, &val))

crypto/libressl/crypto/asn1/a_int.c

206

if (val > (uint64_t)INT64_MIN) {

crypto/libressl/crypto/asn1/a_int.c

210

*out_val = (int64_t)-val;

crypto/libressl/crypto/asn1/a_int.c

212

if (val > (uint64_t)INT64_MAX) {

crypto/libressl/crypto/asn1/a_int.c

216

*out_val = (int64_t)val;

crypto/libressl/crypto/asn1/a_int.c

225

uint64_t val;

crypto/libressl/crypto/asn1/a_int.c

244

if (!asn1_aint_get_uint64(&cbs, &val))

crypto/libressl/crypto/asn1/a_int.c

247

*out_val = val;

crypto/libressl/crypto/asn1/a_int.c

253

ASN1_INTEGER_set_uint64(ASN1_INTEGER *aint, uint64_t val)

crypto/libressl/crypto/asn1/a_int.c

257

return asn1_aint_set_uint64(val, &aint->data, &aint->length);

crypto/libressl/crypto/asn1/a_int.c

283

ASN1_INTEGER_set_int64(ASN1_INTEGER *aint, int64_t val)

crypto/libressl/crypto/asn1/a_int.c

289

uval = (uint64_t)val;

crypto/libressl/crypto/asn1/a_int.c

291

if (val < 0) {

crypto/libressl/crypto/asn1/a_int.c

302

int64_t val;

crypto/libressl/crypto/asn1/a_int.c

306

if (!ASN1_INTEGER_get_int64(&val, aint))

crypto/libressl/crypto/asn1/a_int.c

308

if (val < LONG_MIN || val > LONG_MAX) {

crypto/libressl/crypto/asn1/a_int.c

313

return (long)val;

crypto/libressl/crypto/asn1/a_int.c

317

ASN1_INTEGER_set(ASN1_INTEGER *aint, long val)

crypto/libressl/crypto/asn1/a_int.c

319

return ASN1_INTEGER_set_int64(aint, val);

crypto/libressl/crypto/asn1/a_int.c

551

uint8_t padding, val;

crypto/libressl/crypto/asn1/a_int.c

569

if (!CBS_peek_u8(&cbs, &val))

crypto/libressl/crypto/asn1/a_int.c

571

if (val != 0)

crypto/libressl/crypto/asn1/a_int.c

651

uint8_t padding, val;

crypto/libressl/crypto/asn1/a_int.c

668

if (!CBS_peek_u8(cbs, &val))

crypto/libressl/crypto/asn1/a_int.c

672

negative = (val >> 7);

crypto/libressl/crypto/asn1/a_int.c

679

if (CBS_len(cbs) > 1 && val == padding) {

crypto/libressl/crypto/asn1/a_int.c

683

if (!CBS_peek_u8(cbs, &val))

crypto/libressl/crypto/asn1/a_int.c

685

if ((val >> 7) == (padding >> 7)) {

crypto/libressl/crypto/asn1/a_object.c

130

uint8_t val;

crypto/libressl/crypto/asn1/a_object.c

134

val = (arc >> (i * 7)) & 0x7f;

crypto/libressl/crypto/asn1/a_object.c

135

if (!started && i != 0 && val == 0)

crypto/libressl/crypto/asn1/a_object.c

138

val |= 0x80;

crypto/libressl/crypto/asn1/a_object.c

139

if (!CBB_add_u8(cbb, val))

crypto/libressl/crypto/asn1/a_object.c

151

uint8_t val;

crypto/libressl/crypto/asn1/a_object.c

154

if (!CBS_get_u8(cbs, &val))

crypto/libressl/crypto/asn1/a_object.c

156

if (arc == 0 && val == 0x80)

crypto/libressl/crypto/asn1/a_object.c

160

arc = (arc << 7) | (val & 0x7f);

crypto/libressl/crypto/asn1/a_object.c

161

} while (val & 0x80);

crypto/libressl/crypto/asn1/a_object.c

192

uint8_t val;

crypto/libressl/crypto/asn1/a_object.c

195

if (!CBS_get_u8(cbs, &val))

crypto/libressl/crypto/asn1/a_object.c

197

if ((*separator == 0 && val != '.' && val != ' ') ||

crypto/libressl/crypto/asn1/a_object.c

198

(*separator != 0 && val != *separator)) {

crypto/libressl/crypto/asn1/a_object.c

202

*separator = val;

crypto/libressl/crypto/asn1/a_object.c

206

if (!CBS_peek_u8(cbs, &val))

crypto/libressl/crypto/asn1/a_object.c

208

if (val == '.' || val == ' ')

crypto/libressl/crypto/asn1/a_object.c

211

if (!CBS_get_u8(cbs, &val))

crypto/libressl/crypto/asn1/a_object.c

213

if (val < '0' || val > '9') {

crypto/libressl/crypto/asn1/a_object.c

222

val -= '0';

crypto/libressl/crypto/asn1/a_object.c

224

if (digits > 0 && arc == 0 && val == 0) {

crypto/libressl/crypto/asn1/a_object.c

234

arc = arc * 10 + val;

crypto/libressl/crypto/asn1/a_strex.c

430

ASN1_STRING *val;

crypto/libressl/crypto/asn1/a_strex.c

512

val = X509_NAME_ENTRY_get_data(ent);

crypto/libressl/crypto/asn1/a_strex.c

555

len = do_print_ex(io_ch, arg, flags | orflags, val);

crypto/libressl/crypto/asn1/a_time_tm.c

237

int year, month, day, hour, min, sec, val;

crypto/libressl/crypto/asn1/a_time_tm.c

244

if (!cbs_get_two_digit_value(&copy, &val))

crypto/libressl/crypto/asn1/a_time_tm.c

246

year = val * 100;

crypto/libressl/crypto/asn1/a_time_tm.c

247

if (!cbs_get_two_digit_value(&copy, &val))

crypto/libressl/crypto/asn1/a_time_tm.c

249

year += val;

crypto/libressl/crypto/asn1/a_time_tm.c

252

if (!cbs_get_two_digit_value(&copy, &val))

crypto/libressl/crypto/asn1/a_time_tm.c

254

year += val;

crypto/libressl/crypto/asn1/a_utf8.c

137

*val = value;

crypto/libressl/crypto/asn1/a_utf8.c

79

UTF8_getc(const unsigned char *str, int len, unsigned long *val)

crypto/libressl/crypto/asn1/asn1_gen.c

77

#define ASN1_GEN_STR(str,val){str, sizeof(str) - 1, val}

crypto/libressl/crypto/asn1/asn1_lib.c

100

if (val < 0x80) {

crypto/libressl/crypto/asn1/asn1_lib.c

101

*out_length = val;

crypto/libressl/crypto/asn1/asn1_lib.c

109

if (val == 0x80) {

crypto/libressl/crypto/asn1/asn1_lib.c

120

if ((len_bytes = val & 0x7f) == 0x7f)

crypto/libressl/crypto/asn1/asn1_lib.c

126

if (!CBS_get_u8(cbs, &val))

crypto/libressl/crypto/asn1/asn1_lib.c

128

if (der_mode && length == 0 && val == 0)

crypto/libressl/crypto/asn1/asn1_lib.c

132

length = (length << 8) | val;

crypto/libressl/crypto/asn1/asn1_lib.c

85

uint8_t val;

crypto/libressl/crypto/asn1/asn1_lib.c

94

if (!CBS_get_u8(cbs, &val))

crypto/libressl/crypto/asn1/asn1_locl.h

192

int UTF8_getc(const unsigned char *str, int len, unsigned long *val);

crypto/libressl/crypto/asn1/asn1_locl.h

217

int asn1_aint_set_uint64(uint64_t val, uint8_t **out_data, int *out_len);

crypto/libressl/crypto/asn1/asn_mime.c

118

i2d_ASN1_bio_stream(BIO *out, ASN1_VALUE *val, BIO *in, int flags,

crypto/libressl/crypto/asn1/asn_mime.c

124

bio = BIO_new_NDEF(out, val, it);

crypto/libressl/crypto/asn1/asn_mime.c

142

ASN1_item_i2d_bio(it, out, val);

crypto/libressl/crypto/asn1/asn_mime.c

149

B64_write_ASN1(BIO *out, ASN1_VALUE *val, BIO *in, int flags,

crypto/libressl/crypto/asn1/asn_mime.c

163

r = i2d_ASN1_bio_stream(out, val, in, flags, it);

crypto/libressl/crypto/asn1/asn_mime.c

173

PEM_write_bio_ASN1_stream(BIO *out, ASN1_VALUE *val, BIO *in, int flags,

crypto/libressl/crypto/asn1/asn_mime.c

179

r = B64_write_ASN1(out, val, in, flags, it);

crypto/libressl/crypto/asn1/asn_mime.c

188

ASN1_VALUE *val;

crypto/libressl/crypto/asn1/asn_mime.c

194

val = ASN1_item_d2i_bio(it, bio, NULL);

crypto/libressl/crypto/asn1/asn_mime.c

195

if (!val)

crypto/libressl/crypto/asn1/asn_mime.c

200

return val;

crypto/libressl/crypto/asn1/asn_mime.c

278

SMIME_write_ASN1(BIO *bio, ASN1_VALUE *val, BIO *data, int flags,

crypto/libressl/crypto/asn1/asn_mime.c

320

if (!asn1_output_data(bio, data, val, flags, it))

crypto/libressl/crypto/asn1/asn_mime.c

333

B64_write_ASN1(bio, val, NULL, 0, it);

crypto/libressl/crypto/asn1/asn_mime.c

364

if (!B64_write_ASN1(bio, val, data, flags, it))

crypto/libressl/crypto/asn1/asn_mime.c

374

asn1_output_data(BIO *out, BIO *data, ASN1_VALUE *val, int flags,

crypto/libressl/crypto/asn1/asn_mime.c

401

if (aux->asn1_cb(ASN1_OP_DETACHED_PRE, &val, it, &sarg) <= 0)

crypto/libressl/crypto/asn1/asn_mime.c

408

if (aux->asn1_cb(ASN1_OP_DETACHED_POST, &val, it, &sarg) <= 0)

crypto/libressl/crypto/asn1/asn_mime.c

435

ASN1_VALUE *val;

crypto/libressl/crypto/asn1/asn_mime.c

499

if (!(val = b64_read_asn1(asnin, it))) {

crypto/libressl/crypto/asn1/asn_mime.c

510

return val;

crypto/libressl/crypto/asn1/asn_mime.c

525

if (!(val = b64_read_asn1(bio, it))) {

crypto/libressl/crypto/asn1/asn_mime.c

529

return val;

crypto/libressl/crypto/asn1/asn_mime.c

92

static int asn1_output_data(BIO *out, BIO *data, ASN1_VALUE *val, int flags,

crypto/libressl/crypto/asn1/bio_ndef.c

101

BIO_new_NDEF(BIO *out, ASN1_VALUE *val, const ASN1_ITEM *it)

crypto/libressl/crypto/asn1/bio_ndef.c

133

if (aux->asn1_cb(ASN1_OP_STREAM_PRE, &val, it, &sarg) <= 0)

crypto/libressl/crypto/asn1/bio_ndef.c

136

ndef_aux->val = val;

crypto/libressl/crypto/asn1/bio_ndef.c

164

derlen = ASN1_item_ndef_i2d(ndef_aux->val, NULL, ndef_aux->it);

crypto/libressl/crypto/asn1/bio_ndef.c

168

derlen = ASN1_item_ndef_i2d(ndef_aux->val, &p, ndef_aux->it);

crypto/libressl/crypto/asn1/bio_ndef.c

228

&ndef_aux->val, ndef_aux->it, &sarg) <= 0)

crypto/libressl/crypto/asn1/bio_ndef.c

231

derlen = ASN1_item_ndef_i2d(ndef_aux->val, NULL, ndef_aux->it);

crypto/libressl/crypto/asn1/bio_ndef.c

235

derlen = ASN1_item_ndef_i2d(ndef_aux->val, &p, ndef_aux->it);

crypto/libressl/crypto/asn1/bio_ndef.c

83

ASN1_VALUE *val;

crypto/libressl/crypto/asn1/tasn_dec.c

281

uint8_t val;

crypto/libressl/crypto/asn1/tasn_dec.c

310

if (!CBS_get_u8(content, &val))

crypto/libressl/crypto/asn1/tasn_dec.c

312

*abool = val;

crypto/libressl/crypto/asn1/tasn_enc.c

106

asn1_item_flags_i2d(ASN1_VALUE *val, unsigned char **out, const ASN1_ITEM *it,

crypto/libressl/crypto/asn1/tasn_enc.c

112

len = ASN1_item_ex_i2d(&val, NULL, it, -1, flags);

crypto/libressl/crypto/asn1/tasn_enc.c

119

ASN1_item_ex_i2d(&val, &p, it, -1, flags);

crypto/libressl/crypto/asn1/tasn_enc.c

124

return ASN1_item_ex_i2d(&val, out, it, -1, flags);

crypto/libressl/crypto/asn1/tasn_enc.c

75

static int asn1_item_flags_i2d(ASN1_VALUE *val, unsigned char **out,

crypto/libressl/crypto/asn1/tasn_enc.c

85

ASN1_item_ndef_i2d(ASN1_VALUE *val, unsigned char **out, const ASN1_ITEM *it)

crypto/libressl/crypto/asn1/tasn_enc.c

87

return asn1_item_flags_i2d(val, out, it, ASN1_TFLG_NDEF);

crypto/libressl/crypto/asn1/tasn_enc.c

91

ASN1_item_i2d(ASN1_VALUE *val, unsigned char **out, const ASN1_ITEM *it)

crypto/libressl/crypto/asn1/tasn_enc.c

93

return asn1_item_flags_i2d(val, out, it, 0);

crypto/libressl/crypto/asn1/tasn_fre.c

72

ASN1_item_free(ASN1_VALUE *val, const ASN1_ITEM *it)

crypto/libressl/crypto/asn1/tasn_fre.c

74

asn1_item_free(&val, it);

crypto/libressl/crypto/asn1/x_attrib.c

143

ASN1_TYPE *val = NULL;

crypto/libressl/crypto/asn1/x_attrib.c

151

if ((val = ASN1_TYPE_new()) == NULL)

crypto/libressl/crypto/asn1/x_attrib.c

153

if (!sk_ASN1_TYPE_push(ret->set, val))

crypto/libressl/crypto/asn1/x_attrib.c

156

ASN1_TYPE_set(val, atrtype, value);

crypto/libressl/crypto/asn1/x_attrib.c

162

if (val != NULL)

crypto/libressl/crypto/asn1/x_attrib.c

163

ASN1_TYPE_free(val);

crypto/libressl/crypto/asn1/x_long.c

122

long_set(ASN1_VALUE **pval, long val)

crypto/libressl/crypto/asn1/x_long.c

124

memcpy(pval, &val, sizeof(long));

crypto/libressl/crypto/asn1/x_long.c

154

long val;

crypto/libressl/crypto/asn1/x_long.c

157

long_get(pval, &val);

crypto/libressl/crypto/asn1/x_long.c

163

if (val == it->size)

crypto/libressl/crypto/asn1/x_long.c

168

if (!ASN1_INTEGER_set_int64(aint, (int64_t)val))

crypto/libressl/crypto/asn1/x_long.c

186

int64_t val = 0;

crypto/libressl/crypto/asn1/x_long.c

199

if (!ASN1_INTEGER_get_int64(&val, aint))

crypto/libressl/crypto/asn1/x_long.c

203

if (val < LONG_MIN || val > LONG_MAX) {

crypto/libressl/crypto/asn1/x_long.c

212

if (val == (int64_t)it->size) {

crypto/libressl/crypto/asn1/x_long.c

217

long_set(pval, (long)val);

crypto/libressl/crypto/asn1/x_long.c

231

long val;

crypto/libressl/crypto/asn1/x_long.c

233

long_get(pval, &val);

crypto/libressl/crypto/asn1/x_long.c

235

if (BIO_printf(out, "%ld\n", val) <= 0)

crypto/libressl/crypto/asn1/x_name.c

243

x509_name_ex_new(ASN1_VALUE **val, const ASN1_ITEM *it)

crypto/libressl/crypto/asn1/x_name.c

257

*val = (ASN1_VALUE *)ret;

crypto/libressl/crypto/asn1/x_name.c

287

x509_name_ex_d2i(ASN1_VALUE **val, const unsigned char **in, long len,

crypto/libressl/crypto/asn1/x_name.c

311

if (*val)

crypto/libressl/crypto/asn1/x_name.c

312

x509_name_ex_free(val, NULL);

crypto/libressl/crypto/asn1/x_name.c

336

*val = nm.a;

crypto/libressl/crypto/asn1/x_name.c

348

x509_name_ex_i2d(ASN1_VALUE **val, unsigned char **out, const ASN1_ITEM *it,

crypto/libressl/crypto/asn1/x_name.c

352

X509_NAME *a = (X509_NAME *)*val;

crypto/libressl/crypto/asn1/x_name.c

73

static int x509_name_ex_d2i(ASN1_VALUE **val, const unsigned char **in,

crypto/libressl/crypto/asn1/x_name.c

77

static int x509_name_ex_i2d(ASN1_VALUE **val, unsigned char **out,

crypto/libressl/crypto/asn1/x_name.c

79

static int x509_name_ex_new(ASN1_VALUE **val, const ASN1_ITEM *it);

crypto/libressl/crypto/asn1/x_name.c

80

static void x509_name_ex_free(ASN1_VALUE **val, const ASN1_ITEM *it);

crypto/libressl/crypto/bn/bn_exp.c

1069

BIGNUM *val[TABLE_SIZE];

crypto/libressl/crypto/bn/bn_exp.c

1091

if ((val[0] = BN_CTX_get(ctx)) == NULL)

crypto/libressl/crypto/bn/bn_exp.c

1094

if (!BN_nnmod(val[0],a,m,ctx))

crypto/libressl/crypto/bn/bn_exp.c

1096

if (BN_is_zero(val[0])) {

crypto/libressl/crypto/bn/bn_exp.c

1104

if (!BN_mod_mul(d, val[0], val[0], m, ctx))

crypto/libressl/crypto/bn/bn_exp.c

1108

if (((val[i] = BN_CTX_get(ctx)) == NULL) ||

crypto/libressl/crypto/bn/bn_exp.c

1109

!BN_mod_mul(val[i], val[i - 1], d,m, ctx))

crypto/libressl/crypto/bn/bn_exp.c

1161

if (!BN_mod_mul(r, r, val[wvalue >> 1], m, ctx))

crypto/libressl/crypto/bn/bn_exp.c

261

BIGNUM *val[TABLE_SIZE];

crypto/libressl/crypto/bn/bn_exp.c

286

if ((val[0] = BN_CTX_get(ctx)) == NULL)

crypto/libressl/crypto/bn/bn_exp.c

301

if (!BN_nnmod(val[0], a, m, ctx))

crypto/libressl/crypto/bn/bn_exp.c

303

if (BN_is_zero(val[0])) {

crypto/libressl/crypto/bn/bn_exp.c

311

if (!BN_mod_mul_reciprocal(aa, val[0], val[0], &recp, ctx))

crypto/libressl/crypto/bn/bn_exp.c

315

if (((val[i] = BN_CTX_get(ctx)) == NULL) ||

crypto/libressl/crypto/bn/bn_exp.c

316

!BN_mod_mul_reciprocal(val[i], val[i - 1],

crypto/libressl/crypto/bn/bn_exp.c

369

if (!BN_mod_mul_reciprocal(r, r,val[wvalue >> 1], &recp, ctx))

crypto/libressl/crypto/bn/bn_exp.c

397

BIGNUM *val[TABLE_SIZE];

crypto/libressl/crypto/bn/bn_exp.c

429

if ((val[0] = BN_CTX_get(ctx)) == NULL)

crypto/libressl/crypto/bn/bn_exp.c

445

if (!BN_nnmod(val[0], a,m, ctx))

crypto/libressl/crypto/bn/bn_exp.c

447

aa = val[0];

crypto/libressl/crypto/bn/bn_exp.c

455

if (!BN_to_montgomery(val[0], aa, mont, ctx))

crypto/libressl/crypto/bn/bn_exp.c

460

if (!BN_mod_mul_montgomery(d, val[0], val[0], mont, ctx))

crypto/libressl/crypto/bn/bn_exp.c

464

if (((val[i] = BN_CTX_get(ctx)) == NULL) ||

crypto/libressl/crypto/bn/bn_exp.c

465

!BN_mod_mul_montgomery(val[i], val[i - 1],

crypto/libressl/crypto/bn/bn_exp.c

518

if (!BN_mod_mul_montgomery(r, r, val[wvalue >> 1], mont, ctx))

crypto/libressl/crypto/bn/bn_lib.c

655

unsigned char val;

crypto/libressl/crypto/bn/bn_lib.c

659

val = (unsigned char)(l >> (8 * (i % BN_BYTES)) & mask);

crypto/libressl/crypto/bn/bn_lib.c

662

*--to = val;

crypto/libressl/crypto/bn/bn_lib.c

664

*to++ = val;

crypto/libressl/crypto/bn/bn_nist.c

1287

BN_ULONG tmp, val;

crypto/libressl/crypto/bn/bn_nist.c

1316

for (val = t_d[0], i = 0; i < BN_NIST_521_TOP - 1; i++) {

crypto/libressl/crypto/bn/bn_nist.c

1317

tmp = val >> BN_NIST_521_RSHIFT;

crypto/libressl/crypto/bn/bn_nist.c

1318

val = t_d[i + 1];

crypto/libressl/crypto/bn/bn_nist.c

1319

t_d[i] = (tmp | val << BN_NIST_521_LSHIFT) & BN_MASK2;

crypto/libressl/crypto/bn/bn_nist.c

1321

t_d[i] = val >> BN_NIST_521_RSHIFT;

crypto/libressl/crypto/cryptlib.c

225

CRYPTO_THREADID_set_numeric(CRYPTO_THREADID *id, unsigned long val)

crypto/libressl/crypto/cryptlib.c

282

id->val = (unsigned long)pthread_self();

crypto/libressl/crypto/cryptlib.c

300

return id->val;

crypto/libressl/crypto/ct/ct_x509v3.c

69

i2s_poison(const X509V3_EXT_METHOD *method, void *val)

crypto/libressl/crypto/ec/ec_mult.c

354

EC_POINT **val = NULL; /* precomputation */

crypto/libressl/crypto/ec/ec_mult.c

579

val = reallocarray(NULL, (num_val + 1), sizeof val[0]);

crypto/libressl/crypto/ec/ec_mult.c

580

if (val == NULL) {

crypto/libressl/crypto/ec/ec_mult.c

584

val[num_val] = NULL; /* pivot element */

crypto/libressl/crypto/ec/ec_mult.c

587

v = val;

crypto/libressl/crypto/ec/ec_mult.c

597

if (!(v == val + num_val)) {

crypto/libressl/crypto/ec/ec_mult.c

627

if (!EC_POINTs_make_affine(group, num_val, val, ctx))

crypto/libressl/crypto/ec/ec_mult.c

695

if (val != NULL) {

crypto/libressl/crypto/ec/ec_mult.c

696

for (v = val; *v != NULL; v++)

crypto/libressl/crypto/ec/ec_mult.c

698

free(val);

crypto/libressl/crypto/ex_data.c

605

CRYPTO_set_ex_data(CRYPTO_EX_DATA *ad, int idx, void *val)

crypto/libressl/crypto/ex_data.c

624

sk_void_set(ad->sk, idx, val);

crypto/libressl/crypto/gost/gost2814789.c

327

unsigned int val, val2;

crypto/libressl/crypto/gost/gost2814789.c

338

c2l(p, val);

crypto/libressl/crypto/gost/gost2814789.c

339

val2 = val + 0x01010101;

crypto/libressl/crypto/gost/gost2814789.c

342

c2l(p, val);

crypto/libressl/crypto/gost/gost2814789.c

343

val2 = val + 0x01010104;

crypto/libressl/crypto/gost/gost2814789.c

344

if (val > val2) /* overflow */

crypto/libressl/crypto/modes/ccm128.c

312

{ size_t n=8, val=0;

crypto/libressl/crypto/modes/ccm128.c

317

val += counter[n] + (inc&0xff);

crypto/libressl/crypto/modes/ccm128.c

318

counter[n] = (unsigned char)val;

crypto/libressl/crypto/modes/ccm128.c

319

val >>= 8; /* carry bit */

crypto/libressl/crypto/modes/ccm128.c

321

} while(n && (inc || val));

crypto/libressl/crypto/ocsp/ocsp_ext.c

331

ocsp_add1_nonce(STACK_OF(X509_EXTENSION) **exts, unsigned char *val, int len)

crypto/libressl/crypto/ocsp/ocsp_ext.c

350

if (val)

crypto/libressl/crypto/ocsp/ocsp_ext.c

351

memcpy(tmpval, val, len);

crypto/libressl/crypto/ocsp/ocsp_ext.c

366

OCSP_request_add1_nonce(OCSP_REQUEST *req, unsigned char *val, int len)

crypto/libressl/crypto/ocsp/ocsp_ext.c

368

return ocsp_add1_nonce(&req->tbsRequest->requestExtensions, val, len);

crypto/libressl/crypto/ocsp/ocsp_ext.c

373

OCSP_basic_add1_nonce(OCSP_BASICRESP *resp, unsigned char *val, int len)

crypto/libressl/crypto/ocsp/ocsp_ext.c

375

return ocsp_add1_nonce(&resp->tbsResponseData->responseExtensions, val,

crypto/libressl/crypto/ts/ts_conf.c

372

CONF_VALUE *val = sk_CONF_VALUE_value(list, i);

crypto/libressl/crypto/ts/ts_conf.c

373

const char *extval = val->value ? val->value : val->name;

crypto/libressl/crypto/ts/ts_conf.c

412

CONF_VALUE *val = sk_CONF_VALUE_value(list, i);

crypto/libressl/crypto/ts/ts_conf.c

413

const char *extval = val->value ? val->value : val->name;

crypto/libressl/crypto/ts/ts_conf.c

444

CONF_VALUE *val = sk_CONF_VALUE_value(list, i);

crypto/libressl/crypto/ts/ts_conf.c

445

if (strcmp(val->name, ENV_VALUE_SECS) == 0) {

crypto/libressl/crypto/ts/ts_conf.c

446

if (val->value)

crypto/libressl/crypto/ts/ts_conf.c

447

secs = atoi(val->value);

crypto/libressl/crypto/ts/ts_conf.c

448

} else if (strcmp(val->name, ENV_VALUE_MILLISECS) == 0) {

crypto/libressl/crypto/ts/ts_conf.c

449

if (val->value)

crypto/libressl/crypto/ts/ts_conf.c

450

millis = atoi(val->value);

crypto/libressl/crypto/ts/ts_conf.c

451

} else if (strcmp(val->name, ENV_VALUE_MICROSECS) == 0) {

crypto/libressl/crypto/ts/ts_conf.c

452

if (val->value)

crypto/libressl/crypto/ts/ts_conf.c

453

micros = atoi(val->value);

crypto/libressl/crypto/x509/x509_addr.c

1489

CONF_VALUE *val = sk_CONF_VALUE_value(values, i);

crypto/libressl/crypto/x509/x509_addr.c

1496

if (!name_cmp(val->name, "IPv4")) {

crypto/libressl/crypto/x509/x509_addr.c

1498

} else if (!name_cmp(val->name, "IPv6")) {

crypto/libressl/crypto/x509/x509_addr.c

1500

} else if (!name_cmp(val->name, "IPv4-SAFI")) {

crypto/libressl/crypto/x509/x509_addr.c

1503

} else if (!name_cmp(val->name, "IPv6-SAFI")) {

crypto/libressl/crypto/x509/x509_addr.c

1508

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1532

parsed_safi = strtoul(val->value, &t, 0);

crypto/libressl/crypto/x509/x509_addr.c

1535

if (val->value[0] == '\0' ||

crypto/libressl/crypto/x509/x509_addr.c

1538

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1545

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1556

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1568

s = strdup(val->value);

crypto/libressl/crypto/x509/x509_addr.c

1582

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1597

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1609

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1623

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1628

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1633

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_addr.c

1650

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_asid.c

782

CONF_VALUE *val = sk_CONF_VALUE_value(values, i);

crypto/libressl/crypto/x509/x509_asid.c

788

if (!name_cmp(val->name, "AS")) {

crypto/libressl/crypto/x509/x509_asid.c

790

} else if (!name_cmp(val->name, "RDI")) {

crypto/libressl/crypto/x509/x509_asid.c

794

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_asid.c

801

if (strcmp(val->value, "inherit") == 0) {

crypto/libressl/crypto/x509/x509_asid.c

805

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_asid.c

812

i1 = strspn(val->value, "0123456789");

crypto/libressl/crypto/x509/x509_asid.c

813

if (val->value[i1] == '\0') {

crypto/libressl/crypto/x509/x509_asid.c

817

i2 = i1 + strspn(val->value + i1, " \t");

crypto/libressl/crypto/x509/x509_asid.c

818

if (val->value[i2] != '-') {

crypto/libressl/crypto/x509/x509_asid.c

820

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_asid.c

824

i2 = i2 + strspn(val->value + i2, " \t");

crypto/libressl/crypto/x509/x509_asid.c

825

i3 = i2 + strspn(val->value + i2, "0123456789");

crypto/libressl/crypto/x509/x509_asid.c

826

if (val->value[i3] != '\0') {

crypto/libressl/crypto/x509/x509_asid.c

828

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_asid.c

837

if (!X509V3_get_value_int(val, &min)) {

crypto/libressl/crypto/x509/x509_asid.c

842

char *s = strdup(val->value);

crypto/libressl/crypto/x509/x509_bcons.c

173

CONF_VALUE *val;

crypto/libressl/crypto/x509/x509_bcons.c

181

val = sk_CONF_VALUE_value(values, i);

crypto/libressl/crypto/x509/x509_bcons.c

182

if (!strcmp(val->name, "CA")) {

crypto/libressl/crypto/x509/x509_bcons.c

183

if (!X509V3_get_value_bool(val, &bcons->ca))

crypto/libressl/crypto/x509/x509_bcons.c

185

} else if (!strcmp(val->name, "pathlen")) {

crypto/libressl/crypto/x509/x509_bcons.c

186

if (!X509V3_get_value_int(val, &bcons->pathlen))

crypto/libressl/crypto/x509/x509_bcons.c

190

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_bitst.c

156

CONF_VALUE *val;

crypto/libressl/crypto/x509/x509_bitst.c

166

val = sk_CONF_VALUE_value(nval, i);

crypto/libressl/crypto/x509/x509_bitst.c

168

if (!strcmp(bnam->sname, val->name) ||

crypto/libressl/crypto/x509/x509_bitst.c

169

!strcmp(bnam->lname, val->name) ) {

crypto/libressl/crypto/x509/x509_bitst.c

181

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_conf.c

352

CONF_VALUE *val;

crypto/libressl/crypto/x509/x509_conf.c

358

val = sk_CONF_VALUE_value(nval, i);

crypto/libressl/crypto/x509/x509_conf.c

359

if (!(ext = X509V3_EXT_nconf(conf, ctx, val->name, val->value)))

crypto/libressl/crypto/x509/x509_crld.c

655

char *name, *val;

crypto/libressl/crypto/x509/x509_crld.c

664

val = cnf->value;

crypto/libressl/crypto/x509/x509_crld.c

687

if (!set_reasons(&idp->onlysomereasons, val))

crypto/libressl/crypto/x509/x509_extku.c

189

CONF_VALUE *val;

crypto/libressl/crypto/x509/x509_extku.c

198

val = sk_CONF_VALUE_value(nval, i);

crypto/libressl/crypto/x509/x509_extku.c

199

if (val->value)

crypto/libressl/crypto/x509/x509_extku.c

200

extval = val->value;

crypto/libressl/crypto/x509/x509_extku.c

202

extval = val->name;

crypto/libressl/crypto/x509/x509_extku.c

206

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_ncons.c

192

CONF_VALUE tval, *val;

crypto/libressl/crypto/x509/x509_ncons.c

201

val = sk_CONF_VALUE_value(nval, i);

crypto/libressl/crypto/x509/x509_ncons.c

202

if (!strncmp(val->name, "permitted", 9) && val->name[9]) {

crypto/libressl/crypto/x509/x509_ncons.c

204

tval.name = val->name + 10;

crypto/libressl/crypto/x509/x509_ncons.c

205

} else if (!strncmp(val->name, "excluded", 8) && val->name[8]) {

crypto/libressl/crypto/x509/x509_ncons.c

207

tval.name = val->name + 9;

crypto/libressl/crypto/x509/x509_ncons.c

212

tval.value = val->value;

crypto/libressl/crypto/x509/x509_pci.c

100

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

104

else if (strcmp(val->name, "pathlen") == 0) {

crypto/libressl/crypto/x509/x509_pci.c

107

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

110

if (!X509V3_get_value_int(val, pathlen)) {

crypto/libressl/crypto/x509/x509_pci.c

112

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

116

else if (strcmp(val->name, "policy") == 0) {

crypto/libressl/crypto/x509/x509_pci.c

123

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

128

if (strncmp(val->value, "hex:", 4) == 0) {

crypto/libressl/crypto/x509/x509_pci.c

130

string_to_hex(val->value + 4, &val_len);

crypto/libressl/crypto/x509/x509_pci.c

134

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

152

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

157

else if (strncmp(val->value, "file:", 5) == 0) {

crypto/libressl/crypto/x509/x509_pci.c

160

BIO *b = BIO_new_file(val->value + 5, "r");

crypto/libressl/crypto/x509/x509_pci.c

163

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

187

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

191

else if (strncmp(val->value, "text:", 5) == 0) {

crypto/libressl/crypto/x509/x509_pci.c

192

val_len = strlen(val->value + 5);

crypto/libressl/crypto/x509/x509_pci.c

198

val->value + 5, val_len);

crypto/libressl/crypto/x509/x509_pci.c

206

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

211

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

216

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

87

process_pci_value(CONF_VALUE *val, ASN1_OBJECT **language,

crypto/libressl/crypto/x509/x509_pci.c

92

if (strcmp(val->name, "language") == 0) {

crypto/libressl/crypto/x509/x509_pci.c

95

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pci.c

98

if (!(*language = OBJ_txt2obj(val->value, 0))) {

crypto/libressl/crypto/x509/x509_pcons.c

163

CONF_VALUE *val;

crypto/libressl/crypto/x509/x509_pcons.c

171

val = sk_CONF_VALUE_value(values, i);

crypto/libressl/crypto/x509/x509_pcons.c

172

if (!strcmp(val->name, "requireExplicitPolicy")) {

crypto/libressl/crypto/x509/x509_pcons.c

173

if (!X509V3_get_value_int(val,

crypto/libressl/crypto/x509/x509_pcons.c

175

} else if (!strcmp(val->name, "inhibitPolicyMapping")) {

crypto/libressl/crypto/x509/x509_pcons.c

176

if (!X509V3_get_value_int(val,

crypto/libressl/crypto/x509/x509_pcons.c

180

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_pmaps.c

190

CONF_VALUE *val;

crypto/libressl/crypto/x509/x509_pmaps.c

199

val = sk_CONF_VALUE_value(nval, i);

crypto/libressl/crypto/x509/x509_pmaps.c

200

if (!val->value || !val->name) {

crypto/libressl/crypto/x509/x509_pmaps.c

204

obj1 = OBJ_txt2obj(val->name, 0);

crypto/libressl/crypto/x509/x509_pmaps.c

205

obj2 = OBJ_txt2obj(val->value, 0);

crypto/libressl/crypto/x509/x509_pmaps.c

230

X509V3_conf_err(val);

crypto/libressl/crypto/x509/x509_prn.c

75

X509V3_EXT_val_prn(BIO *out, STACK_OF(CONF_VALUE) *val, int indent, int ml)

crypto/libressl/crypto/x509/x509_prn.c

80

if (!val)

crypto/libressl/crypto/x509/x509_prn.c

82

if (!ml || !sk_CONF_VALUE_num(val)) {

crypto/libressl/crypto/x509/x509_prn.c

84

if (!sk_CONF_VALUE_num(val))

crypto/libressl/crypto/x509/x509_prn.c

87

for (i = 0; i < sk_CONF_VALUE_num(val); i++) {

crypto/libressl/crypto/x509/x509_prn.c

91

nval = sk_CONF_VALUE_value(val, i);

crypto/libressl/include/openssl/asn1.h

749

int ASN1_INTEGER_set_uint64(ASN1_INTEGER *aint, uint64_t val);

crypto/libressl/include/openssl/asn1.h

751

int ASN1_INTEGER_set_int64(ASN1_INTEGER *aint, int64_t val);

crypto/libressl/include/openssl/asn1.h

758

int ASN1_ENUMERATED_set_int64(ASN1_ENUMERATED *aenum, int64_t val);

crypto/libressl/include/openssl/asn1.h

880

void ASN1_item_free(ASN1_VALUE *val, const ASN1_ITEM *it);

crypto/libressl/include/openssl/asn1.h

881

ASN1_VALUE *ASN1_item_d2i(ASN1_VALUE **val, const unsigned char **in,

crypto/libressl/include/openssl/asn1.h

883

int ASN1_item_i2d(ASN1_VALUE *val, unsigned char **out, const ASN1_ITEM *it);

crypto/libressl/include/openssl/asn1.h

884

int ASN1_item_ndef_i2d(ASN1_VALUE *val, unsigned char **out, const ASN1_ITEM *it);

crypto/libressl/include/openssl/asn1.h

929

BIO *BIO_new_NDEF(BIO *out, ASN1_VALUE *val, const ASN1_ITEM *it);

crypto/libressl/include/openssl/asn1.h

931

int i2d_ASN1_bio_stream(BIO *out, ASN1_VALUE *val, BIO *in, int flags,

crypto/libressl/include/openssl/asn1.h

933

int PEM_write_bio_ASN1_stream(BIO *out, ASN1_VALUE *val, BIO *in, int flags,

crypto/libressl/include/openssl/asn1.h

935

int SMIME_write_ASN1(BIO *bio, ASN1_VALUE *val, BIO *data, int flags,

crypto/libressl/include/openssl/asn1t.h

447

#define ADB_ENTRY(val, template) {val, template}

crypto/libressl/include/openssl/crypto.h

351

int CRYPTO_set_ex_data(CRYPTO_EX_DATA *ad, int idx, void *val);

crypto/libressl/include/openssl/crypto.h

364

unsigned long val;

crypto/libressl/include/openssl/crypto.h

390

void CRYPTO_THREADID_set_numeric(CRYPTO_THREADID *id, unsigned long val);

crypto/libressl/include/openssl/ocsp.h

209

int OCSP_request_add1_nonce(OCSP_REQUEST *req, unsigned char *val, int len);

crypto/libressl/include/openssl/ocsp.h

210

int OCSP_basic_add1_nonce(OCSP_BASICRESP *resp, unsigned char *val, int len);

crypto/libressl/include/openssl/safestack.h

1003

#define sk_MEM_OBJECT_DATA_set(st, i, val) SKM_sk_set(MEM_OBJECT_DATA, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1005

#define sk_MEM_OBJECT_DATA_push(st, val) SKM_sk_push(MEM_OBJECT_DATA, (st), (val))

crypto/libressl/include/openssl/safestack.h

1006

#define sk_MEM_OBJECT_DATA_unshift(st, val) SKM_sk_unshift(MEM_OBJECT_DATA, (st), (val))

crypto/libressl/include/openssl/safestack.h

1007

#define sk_MEM_OBJECT_DATA_find(st, val) SKM_sk_find(MEM_OBJECT_DATA, (st), (val))

crypto/libressl/include/openssl/safestack.h

1008

#define sk_MEM_OBJECT_DATA_find_ex(st, val) SKM_sk_find_ex(MEM_OBJECT_DATA, (st), (val))

crypto/libressl/include/openssl/safestack.h

1011

#define sk_MEM_OBJECT_DATA_insert(st, val, i) SKM_sk_insert(MEM_OBJECT_DATA, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1025

#define sk_MIME_HEADER_set(st, i, val) SKM_sk_set(MIME_HEADER, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1027

#define sk_MIME_HEADER_push(st, val) SKM_sk_push(MIME_HEADER, (st), (val))

crypto/libressl/include/openssl/safestack.h

1028

#define sk_MIME_HEADER_unshift(st, val) SKM_sk_unshift(MIME_HEADER, (st), (val))

crypto/libressl/include/openssl/safestack.h

1029

#define sk_MIME_HEADER_find(st, val) SKM_sk_find(MIME_HEADER, (st), (val))

crypto/libressl/include/openssl/safestack.h

1030

#define sk_MIME_HEADER_find_ex(st, val) SKM_sk_find_ex(MIME_HEADER, (st), (val))

crypto/libressl/include/openssl/safestack.h

1033

#define sk_MIME_HEADER_insert(st, val, i) SKM_sk_insert(MIME_HEADER, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1047

#define sk_MIME_PARAM_set(st, i, val) SKM_sk_set(MIME_PARAM, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1049

#define sk_MIME_PARAM_push(st, val) SKM_sk_push(MIME_PARAM, (st), (val))

crypto/libressl/include/openssl/safestack.h

1050

#define sk_MIME_PARAM_unshift(st, val) SKM_sk_unshift(MIME_PARAM, (st), (val))

crypto/libressl/include/openssl/safestack.h

1051

#define sk_MIME_PARAM_find(st, val) SKM_sk_find(MIME_PARAM, (st), (val))

crypto/libressl/include/openssl/safestack.h

1052

#define sk_MIME_PARAM_find_ex(st, val) SKM_sk_find_ex(MIME_PARAM, (st), (val))

crypto/libressl/include/openssl/safestack.h

1055

#define sk_MIME_PARAM_insert(st, val, i) SKM_sk_insert(MIME_PARAM, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1069

#define sk_NAME_FUNCS_set(st, i, val) SKM_sk_set(NAME_FUNCS, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1071

#define sk_NAME_FUNCS_push(st, val) SKM_sk_push(NAME_FUNCS, (st), (val))

crypto/libressl/include/openssl/safestack.h

1072

#define sk_NAME_FUNCS_unshift(st, val) SKM_sk_unshift(NAME_FUNCS, (st), (val))

crypto/libressl/include/openssl/safestack.h

1073

#define sk_NAME_FUNCS_find(st, val) SKM_sk_find(NAME_FUNCS, (st), (val))

crypto/libressl/include/openssl/safestack.h

1074

#define sk_NAME_FUNCS_find_ex(st, val) SKM_sk_find_ex(NAME_FUNCS, (st), (val))

crypto/libressl/include/openssl/safestack.h

1077

#define sk_NAME_FUNCS_insert(st, val, i) SKM_sk_insert(NAME_FUNCS, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1091

#define sk_OCSP_CERTID_set(st, i, val) SKM_sk_set(OCSP_CERTID, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1093

#define sk_OCSP_CERTID_push(st, val) SKM_sk_push(OCSP_CERTID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1094

#define sk_OCSP_CERTID_unshift(st, val) SKM_sk_unshift(OCSP_CERTID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1095

#define sk_OCSP_CERTID_find(st, val) SKM_sk_find(OCSP_CERTID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1096

#define sk_OCSP_CERTID_find_ex(st, val) SKM_sk_find_ex(OCSP_CERTID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1099

#define sk_OCSP_CERTID_insert(st, val, i) SKM_sk_insert(OCSP_CERTID, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1113

#define sk_OCSP_ONEREQ_set(st, i, val) SKM_sk_set(OCSP_ONEREQ, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1115

#define sk_OCSP_ONEREQ_push(st, val) SKM_sk_push(OCSP_ONEREQ, (st), (val))

crypto/libressl/include/openssl/safestack.h

1116

#define sk_OCSP_ONEREQ_unshift(st, val) SKM_sk_unshift(OCSP_ONEREQ, (st), (val))

crypto/libressl/include/openssl/safestack.h

1117

#define sk_OCSP_ONEREQ_find(st, val) SKM_sk_find(OCSP_ONEREQ, (st), (val))

crypto/libressl/include/openssl/safestack.h

1118

#define sk_OCSP_ONEREQ_find_ex(st, val) SKM_sk_find_ex(OCSP_ONEREQ, (st), (val))

crypto/libressl/include/openssl/safestack.h

1121

#define sk_OCSP_ONEREQ_insert(st, val, i) SKM_sk_insert(OCSP_ONEREQ, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1135

#define sk_OCSP_RESPID_set(st, i, val) SKM_sk_set(OCSP_RESPID, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1137

#define sk_OCSP_RESPID_push(st, val) SKM_sk_push(OCSP_RESPID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1138

#define sk_OCSP_RESPID_unshift(st, val) SKM_sk_unshift(OCSP_RESPID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1139

#define sk_OCSP_RESPID_find(st, val) SKM_sk_find(OCSP_RESPID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1140

#define sk_OCSP_RESPID_find_ex(st, val) SKM_sk_find_ex(OCSP_RESPID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1143

#define sk_OCSP_RESPID_insert(st, val, i) SKM_sk_insert(OCSP_RESPID, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1157

#define sk_OCSP_SINGLERESP_set(st, i, val) SKM_sk_set(OCSP_SINGLERESP, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1159

#define sk_OCSP_SINGLERESP_push(st, val) SKM_sk_push(OCSP_SINGLERESP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1160

#define sk_OCSP_SINGLERESP_unshift(st, val) SKM_sk_unshift(OCSP_SINGLERESP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1161

#define sk_OCSP_SINGLERESP_find(st, val) SKM_sk_find(OCSP_SINGLERESP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1162

#define sk_OCSP_SINGLERESP_find_ex(st, val) SKM_sk_find_ex(OCSP_SINGLERESP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1165

#define sk_OCSP_SINGLERESP_insert(st, val, i) SKM_sk_insert(OCSP_SINGLERESP, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1179

#define sk_PKCS12_SAFEBAG_set(st, i, val) SKM_sk_set(PKCS12_SAFEBAG, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1181

#define sk_PKCS12_SAFEBAG_push(st, val) SKM_sk_push(PKCS12_SAFEBAG, (st), (val))

crypto/libressl/include/openssl/safestack.h

1182

#define sk_PKCS12_SAFEBAG_unshift(st, val) SKM_sk_unshift(PKCS12_SAFEBAG, (st), (val))

crypto/libressl/include/openssl/safestack.h

1183

#define sk_PKCS12_SAFEBAG_find(st, val) SKM_sk_find(PKCS12_SAFEBAG, (st), (val))

crypto/libressl/include/openssl/safestack.h

1184

#define sk_PKCS12_SAFEBAG_find_ex(st, val) SKM_sk_find_ex(PKCS12_SAFEBAG, (st), (val))

crypto/libressl/include/openssl/safestack.h

1187

#define sk_PKCS12_SAFEBAG_insert(st, val, i) SKM_sk_insert(PKCS12_SAFEBAG, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1201

#define sk_PKCS7_set(st, i, val) SKM_sk_set(PKCS7, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1203

#define sk_PKCS7_push(st, val) SKM_sk_push(PKCS7, (st), (val))

crypto/libressl/include/openssl/safestack.h

1204

#define sk_PKCS7_unshift(st, val) SKM_sk_unshift(PKCS7, (st), (val))

crypto/libressl/include/openssl/safestack.h

1205

#define sk_PKCS7_find(st, val) SKM_sk_find(PKCS7, (st), (val))

crypto/libressl/include/openssl/safestack.h

1206

#define sk_PKCS7_find_ex(st, val) SKM_sk_find_ex(PKCS7, (st), (val))

crypto/libressl/include/openssl/safestack.h

1209

#define sk_PKCS7_insert(st, val, i) SKM_sk_insert(PKCS7, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1223

#define sk_PKCS7_RECIP_INFO_set(st, i, val) SKM_sk_set(PKCS7_RECIP_INFO, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1225

#define sk_PKCS7_RECIP_INFO_push(st, val) SKM_sk_push(PKCS7_RECIP_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1226

#define sk_PKCS7_RECIP_INFO_unshift(st, val) SKM_sk_unshift(PKCS7_RECIP_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1227

#define sk_PKCS7_RECIP_INFO_find(st, val) SKM_sk_find(PKCS7_RECIP_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1228

#define sk_PKCS7_RECIP_INFO_find_ex(st, val) SKM_sk_find_ex(PKCS7_RECIP_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1231

#define sk_PKCS7_RECIP_INFO_insert(st, val, i) SKM_sk_insert(PKCS7_RECIP_INFO, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1245

#define sk_PKCS7_SIGNER_INFO_set(st, i, val) SKM_sk_set(PKCS7_SIGNER_INFO, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1247

#define sk_PKCS7_SIGNER_INFO_push(st, val) SKM_sk_push(PKCS7_SIGNER_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1248

#define sk_PKCS7_SIGNER_INFO_unshift(st, val) SKM_sk_unshift(PKCS7_SIGNER_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1249

#define sk_PKCS7_SIGNER_INFO_find(st, val) SKM_sk_find(PKCS7_SIGNER_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1250

#define sk_PKCS7_SIGNER_INFO_find_ex(st, val) SKM_sk_find_ex(PKCS7_SIGNER_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1253

#define sk_PKCS7_SIGNER_INFO_insert(st, val, i) SKM_sk_insert(PKCS7_SIGNER_INFO, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1267

#define sk_POLICYINFO_set(st, i, val) SKM_sk_set(POLICYINFO, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1269

#define sk_POLICYINFO_push(st, val) SKM_sk_push(POLICYINFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1270

#define sk_POLICYINFO_unshift(st, val) SKM_sk_unshift(POLICYINFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1271

#define sk_POLICYINFO_find(st, val) SKM_sk_find(POLICYINFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1272

#define sk_POLICYINFO_find_ex(st, val) SKM_sk_find_ex(POLICYINFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1275

#define sk_POLICYINFO_insert(st, val, i) SKM_sk_insert(POLICYINFO, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1289

#define sk_POLICYQUALINFO_set(st, i, val) SKM_sk_set(POLICYQUALINFO, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1291

#define sk_POLICYQUALINFO_push(st, val) SKM_sk_push(POLICYQUALINFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1292

#define sk_POLICYQUALINFO_unshift(st, val) SKM_sk_unshift(POLICYQUALINFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1293

#define sk_POLICYQUALINFO_find(st, val) SKM_sk_find(POLICYQUALINFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1294

#define sk_POLICYQUALINFO_find_ex(st, val) SKM_sk_find_ex(POLICYQUALINFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1297

#define sk_POLICYQUALINFO_insert(st, val, i) SKM_sk_insert(POLICYQUALINFO, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1311

#define sk_POLICY_MAPPING_set(st, i, val) SKM_sk_set(POLICY_MAPPING, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1313

#define sk_POLICY_MAPPING_push(st, val) SKM_sk_push(POLICY_MAPPING, (st), (val))

crypto/libressl/include/openssl/safestack.h

1314

#define sk_POLICY_MAPPING_unshift(st, val) SKM_sk_unshift(POLICY_MAPPING, (st), (val))

crypto/libressl/include/openssl/safestack.h

1315

#define sk_POLICY_MAPPING_find(st, val) SKM_sk_find(POLICY_MAPPING, (st), (val))

crypto/libressl/include/openssl/safestack.h

1316

#define sk_POLICY_MAPPING_find_ex(st, val) SKM_sk_find_ex(POLICY_MAPPING, (st), (val))

crypto/libressl/include/openssl/safestack.h

1319

#define sk_POLICY_MAPPING_insert(st, val, i) SKM_sk_insert(POLICY_MAPPING, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1333

#define sk_SCT_set(st, i, val) SKM_sk_set(SCT, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1335

#define sk_SCT_push(st, val) SKM_sk_push(SCT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1336

#define sk_SCT_unshift(st, val) SKM_sk_unshift(SCT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1337

#define sk_SCT_find(st, val) SKM_sk_find(SCT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1338

#define sk_SCT_find_ex(st, val) SKM_sk_find_ex(SCT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1341

#define sk_SCT_insert(st, val, i) SKM_sk_insert(SCT, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1355

#define sk_SRTP_PROTECTION_PROFILE_set(st, i, val) SKM_sk_set(SRTP_PROTECTION_PROFILE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1357

#define sk_SRTP_PROTECTION_PROFILE_push(st, val) SKM_sk_push(SRTP_PROTECTION_PROFILE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1358

#define sk_SRTP_PROTECTION_PROFILE_unshift(st, val) SKM_sk_unshift(SRTP_PROTECTION_PROFILE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1359

#define sk_SRTP_PROTECTION_PROFILE_find(st, val) SKM_sk_find(SRTP_PROTECTION_PROFILE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1360

#define sk_SRTP_PROTECTION_PROFILE_find_ex(st, val) SKM_sk_find_ex(SRTP_PROTECTION_PROFILE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1363

#define sk_SRTP_PROTECTION_PROFILE_insert(st, val, i) SKM_sk_insert(SRTP_PROTECTION_PROFILE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1377

#define sk_SSL_CIPHER_set(st, i, val) SKM_sk_set(SSL_CIPHER, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1379

#define sk_SSL_CIPHER_push(st, val) SKM_sk_push(SSL_CIPHER, (st), (val))

crypto/libressl/include/openssl/safestack.h

1380

#define sk_SSL_CIPHER_unshift(st, val) SKM_sk_unshift(SSL_CIPHER, (st), (val))

crypto/libressl/include/openssl/safestack.h

1381

#define sk_SSL_CIPHER_find(st, val) SKM_sk_find(SSL_CIPHER, (st), (val))

crypto/libressl/include/openssl/safestack.h

1382

#define sk_SSL_CIPHER_find_ex(st, val) SKM_sk_find_ex(SSL_CIPHER, (st), (val))

crypto/libressl/include/openssl/safestack.h

1385

#define sk_SSL_CIPHER_insert(st, val, i) SKM_sk_insert(SSL_CIPHER, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1399

#define sk_SSL_COMP_set(st, i, val) SKM_sk_set(SSL_COMP, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1401

#define sk_SSL_COMP_push(st, val) SKM_sk_push(SSL_COMP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1402

#define sk_SSL_COMP_unshift(st, val) SKM_sk_unshift(SSL_COMP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1403

#define sk_SSL_COMP_find(st, val) SKM_sk_find(SSL_COMP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1404

#define sk_SSL_COMP_find_ex(st, val) SKM_sk_find_ex(SSL_COMP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1407

#define sk_SSL_COMP_insert(st, val, i) SKM_sk_insert(SSL_COMP, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1421

#define sk_STACK_OF_X509_NAME_ENTRY_set(st, i, val) SKM_sk_set(STACK_OF_X509_NAME_ENTRY, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1423

#define sk_STACK_OF_X509_NAME_ENTRY_push(st, val) SKM_sk_push(STACK_OF_X509_NAME_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

1424

#define sk_STACK_OF_X509_NAME_ENTRY_unshift(st, val) SKM_sk_unshift(STACK_OF_X509_NAME_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

1425

#define sk_STACK_OF_X509_NAME_ENTRY_find(st, val) SKM_sk_find(STACK_OF_X509_NAME_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

1426

#define sk_STACK_OF_X509_NAME_ENTRY_find_ex(st, val) SKM_sk_find_ex(STACK_OF_X509_NAME_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

1429

#define sk_STACK_OF_X509_NAME_ENTRY_insert(st, val, i) SKM_sk_insert(STACK_OF_X509_NAME_ENTRY, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1443

#define sk_STORE_ATTR_INFO_set(st, i, val) SKM_sk_set(STORE_ATTR_INFO, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1445

#define sk_STORE_ATTR_INFO_push(st, val) SKM_sk_push(STORE_ATTR_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1446

#define sk_STORE_ATTR_INFO_unshift(st, val) SKM_sk_unshift(STORE_ATTR_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1447

#define sk_STORE_ATTR_INFO_find(st, val) SKM_sk_find(STORE_ATTR_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1448

#define sk_STORE_ATTR_INFO_find_ex(st, val) SKM_sk_find_ex(STORE_ATTR_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1451

#define sk_STORE_ATTR_INFO_insert(st, val, i) SKM_sk_insert(STORE_ATTR_INFO, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1465

#define sk_STORE_OBJECT_set(st, i, val) SKM_sk_set(STORE_OBJECT, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1467

#define sk_STORE_OBJECT_push(st, val) SKM_sk_push(STORE_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1468

#define sk_STORE_OBJECT_unshift(st, val) SKM_sk_unshift(STORE_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1469

#define sk_STORE_OBJECT_find(st, val) SKM_sk_find(STORE_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

147

#define SKM_sk_set(type, st,i,val) \

crypto/libressl/include/openssl/safestack.h

1470

#define sk_STORE_OBJECT_find_ex(st, val) SKM_sk_find_ex(STORE_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1473

#define sk_STORE_OBJECT_insert(st, val, i) SKM_sk_insert(STORE_OBJECT, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

148

sk_set(CHECKED_STACK_OF(type, st), i, CHECKED_PTR_OF(type, val))

crypto/libressl/include/openssl/safestack.h

1487

#define sk_SXNETID_set(st, i, val) SKM_sk_set(SXNETID, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1489

#define sk_SXNETID_push(st, val) SKM_sk_push(SXNETID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1490

#define sk_SXNETID_unshift(st, val) SKM_sk_unshift(SXNETID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1491

#define sk_SXNETID_find(st, val) SKM_sk_find(SXNETID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1492

#define sk_SXNETID_find_ex(st, val) SKM_sk_find_ex(SXNETID, (st), (val))

crypto/libressl/include/openssl/safestack.h

1495

#define sk_SXNETID_insert(st, val, i) SKM_sk_insert(SXNETID, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1509

#define sk_UI_STRING_set(st, i, val) SKM_sk_set(UI_STRING, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

151

#define SKM_sk_push(type, st, val) \

crypto/libressl/include/openssl/safestack.h

1511

#define sk_UI_STRING_push(st, val) SKM_sk_push(UI_STRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

1512

#define sk_UI_STRING_unshift(st, val) SKM_sk_unshift(UI_STRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

1513

#define sk_UI_STRING_find(st, val) SKM_sk_find(UI_STRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

1514

#define sk_UI_STRING_find_ex(st, val) SKM_sk_find_ex(UI_STRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

1517

#define sk_UI_STRING_insert(st, val, i) SKM_sk_insert(UI_STRING, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

152

sk_push(CHECKED_STACK_OF(type, st), CHECKED_PTR_OF(type, val))

crypto/libressl/include/openssl/safestack.h

153

#define SKM_sk_unshift(type, st, val) \

crypto/libressl/include/openssl/safestack.h

1531

#define sk_X509_set(st, i, val) SKM_sk_set(X509, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1533

#define sk_X509_push(st, val) SKM_sk_push(X509, (st), (val))

crypto/libressl/include/openssl/safestack.h

1534

#define sk_X509_unshift(st, val) SKM_sk_unshift(X509, (st), (val))

crypto/libressl/include/openssl/safestack.h

1535

#define sk_X509_find(st, val) SKM_sk_find(X509, (st), (val))

crypto/libressl/include/openssl/safestack.h

1536

#define sk_X509_find_ex(st, val) SKM_sk_find_ex(X509, (st), (val))

crypto/libressl/include/openssl/safestack.h

1539

#define sk_X509_insert(st, val, i) SKM_sk_insert(X509, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

154

sk_unshift(CHECKED_STACK_OF(type, st), CHECKED_PTR_OF(type, val))

crypto/libressl/include/openssl/safestack.h

155

#define SKM_sk_find(type, st, val) \

crypto/libressl/include/openssl/safestack.h

1553

#define sk_X509V3_EXT_METHOD_set(st, i, val) SKM_sk_set(X509V3_EXT_METHOD, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1555

#define sk_X509V3_EXT_METHOD_push(st, val) SKM_sk_push(X509V3_EXT_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

1556

#define sk_X509V3_EXT_METHOD_unshift(st, val) SKM_sk_unshift(X509V3_EXT_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

1557

#define sk_X509V3_EXT_METHOD_find(st, val) SKM_sk_find(X509V3_EXT_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

1558

#define sk_X509V3_EXT_METHOD_find_ex(st, val) SKM_sk_find_ex(X509V3_EXT_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

156

sk_find(CHECKED_STACK_OF(type, st), CHECKED_PTR_OF(type, val))

crypto/libressl/include/openssl/safestack.h

1561

#define sk_X509V3_EXT_METHOD_insert(st, val, i) SKM_sk_insert(X509V3_EXT_METHOD, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

157

#define SKM_sk_find_ex(type, st, val) \

crypto/libressl/include/openssl/safestack.h

1575

#define sk_X509_ALGOR_set(st, i, val) SKM_sk_set(X509_ALGOR, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1577

#define sk_X509_ALGOR_push(st, val) SKM_sk_push(X509_ALGOR, (st), (val))

crypto/libressl/include/openssl/safestack.h

1578

#define sk_X509_ALGOR_unshift(st, val) SKM_sk_unshift(X509_ALGOR, (st), (val))

crypto/libressl/include/openssl/safestack.h

1579

#define sk_X509_ALGOR_find(st, val) SKM_sk_find(X509_ALGOR, (st), (val))

crypto/libressl/include/openssl/safestack.h

1580

#define sk_X509_ALGOR_find_ex(st, val) SKM_sk_find_ex(X509_ALGOR, (st), (val))

crypto/libressl/include/openssl/safestack.h

1583

#define sk_X509_ALGOR_insert(st, val, i) SKM_sk_insert(X509_ALGOR, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

159

CHECKED_PTR_OF(type, val))

crypto/libressl/include/openssl/safestack.h

1597

#define sk_X509_ATTRIBUTE_set(st, i, val) SKM_sk_set(X509_ATTRIBUTE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1599

#define sk_X509_ATTRIBUTE_push(st, val) SKM_sk_push(X509_ATTRIBUTE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1600

#define sk_X509_ATTRIBUTE_unshift(st, val) SKM_sk_unshift(X509_ATTRIBUTE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1601

#define sk_X509_ATTRIBUTE_find(st, val) SKM_sk_find(X509_ATTRIBUTE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1602

#define sk_X509_ATTRIBUTE_find_ex(st, val) SKM_sk_find_ex(X509_ATTRIBUTE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1605

#define sk_X509_ATTRIBUTE_insert(st, val, i) SKM_sk_insert(X509_ATTRIBUTE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1619

#define sk_X509_CRL_set(st, i, val) SKM_sk_set(X509_CRL, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1621

#define sk_X509_CRL_push(st, val) SKM_sk_push(X509_CRL, (st), (val))

crypto/libressl/include/openssl/safestack.h

1622

#define sk_X509_CRL_unshift(st, val) SKM_sk_unshift(X509_CRL, (st), (val))

crypto/libressl/include/openssl/safestack.h

1623

#define sk_X509_CRL_find(st, val) SKM_sk_find(X509_CRL, (st), (val))

crypto/libressl/include/openssl/safestack.h

1624

#define sk_X509_CRL_find_ex(st, val) SKM_sk_find_ex(X509_CRL, (st), (val))

crypto/libressl/include/openssl/safestack.h

1627

#define sk_X509_CRL_insert(st, val, i) SKM_sk_insert(X509_CRL, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

164

#define SKM_sk_insert(type, st,val, i) \

crypto/libressl/include/openssl/safestack.h

1641

#define sk_X509_EXTENSION_set(st, i, val) SKM_sk_set(X509_EXTENSION, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1643

#define sk_X509_EXTENSION_push(st, val) SKM_sk_push(X509_EXTENSION, (st), (val))

crypto/libressl/include/openssl/safestack.h

1644

#define sk_X509_EXTENSION_unshift(st, val) SKM_sk_unshift(X509_EXTENSION, (st), (val))

crypto/libressl/include/openssl/safestack.h

1645

#define sk_X509_EXTENSION_find(st, val) SKM_sk_find(X509_EXTENSION, (st), (val))

crypto/libressl/include/openssl/safestack.h

1646

#define sk_X509_EXTENSION_find_ex(st, val) SKM_sk_find_ex(X509_EXTENSION, (st), (val))

crypto/libressl/include/openssl/safestack.h

1649

#define sk_X509_EXTENSION_insert(st, val, i) SKM_sk_insert(X509_EXTENSION, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

165

sk_insert(CHECKED_STACK_OF(type, st), CHECKED_PTR_OF(type, val), i)

crypto/libressl/include/openssl/safestack.h

1663

#define sk_X509_INFO_set(st, i, val) SKM_sk_set(X509_INFO, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1665

#define sk_X509_INFO_push(st, val) SKM_sk_push(X509_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1666

#define sk_X509_INFO_unshift(st, val) SKM_sk_unshift(X509_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1667

#define sk_X509_INFO_find(st, val) SKM_sk_find(X509_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1668

#define sk_X509_INFO_find_ex(st, val) SKM_sk_find_ex(X509_INFO, (st), (val))

crypto/libressl/include/openssl/safestack.h

1671

#define sk_X509_INFO_insert(st, val, i) SKM_sk_insert(X509_INFO, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1685

#define sk_X509_LOOKUP_set(st, i, val) SKM_sk_set(X509_LOOKUP, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1687

#define sk_X509_LOOKUP_push(st, val) SKM_sk_push(X509_LOOKUP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1688

#define sk_X509_LOOKUP_unshift(st, val) SKM_sk_unshift(X509_LOOKUP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1689

#define sk_X509_LOOKUP_find(st, val) SKM_sk_find(X509_LOOKUP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1690

#define sk_X509_LOOKUP_find_ex(st, val) SKM_sk_find_ex(X509_LOOKUP, (st), (val))

crypto/libressl/include/openssl/safestack.h

1693

#define sk_X509_LOOKUP_insert(st, val, i) SKM_sk_insert(X509_LOOKUP, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1707

#define sk_X509_NAME_set(st, i, val) SKM_sk_set(X509_NAME, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1709

#define sk_X509_NAME_push(st, val) SKM_sk_push(X509_NAME, (st), (val))

crypto/libressl/include/openssl/safestack.h

1710

#define sk_X509_NAME_unshift(st, val) SKM_sk_unshift(X509_NAME, (st), (val))

crypto/libressl/include/openssl/safestack.h

1711

#define sk_X509_NAME_find(st, val) SKM_sk_find(X509_NAME, (st), (val))

crypto/libressl/include/openssl/safestack.h

1712

#define sk_X509_NAME_find_ex(st, val) SKM_sk_find_ex(X509_NAME, (st), (val))

crypto/libressl/include/openssl/safestack.h

1715

#define sk_X509_NAME_insert(st, val, i) SKM_sk_insert(X509_NAME, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1729

#define sk_X509_NAME_ENTRY_set(st, i, val) SKM_sk_set(X509_NAME_ENTRY, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1731

#define sk_X509_NAME_ENTRY_push(st, val) SKM_sk_push(X509_NAME_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

1732

#define sk_X509_NAME_ENTRY_unshift(st, val) SKM_sk_unshift(X509_NAME_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

1733

#define sk_X509_NAME_ENTRY_find(st, val) SKM_sk_find(X509_NAME_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

1734

#define sk_X509_NAME_ENTRY_find_ex(st, val) SKM_sk_find_ex(X509_NAME_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

1737

#define sk_X509_NAME_ENTRY_insert(st, val, i) SKM_sk_insert(X509_NAME_ENTRY, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1751

#define sk_X509_OBJECT_set(st, i, val) SKM_sk_set(X509_OBJECT, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1753

#define sk_X509_OBJECT_push(st, val) SKM_sk_push(X509_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1754

#define sk_X509_OBJECT_unshift(st, val) SKM_sk_unshift(X509_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1755

#define sk_X509_OBJECT_find(st, val) SKM_sk_find(X509_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1756

#define sk_X509_OBJECT_find_ex(st, val) SKM_sk_find_ex(X509_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

1759

#define sk_X509_OBJECT_insert(st, val, i) SKM_sk_insert(X509_OBJECT, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1773

#define sk_X509_POLICY_DATA_set(st, i, val) SKM_sk_set(X509_POLICY_DATA, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1775

#define sk_X509_POLICY_DATA_push(st, val) SKM_sk_push(X509_POLICY_DATA, (st), (val))

crypto/libressl/include/openssl/safestack.h

1776

#define sk_X509_POLICY_DATA_unshift(st, val) SKM_sk_unshift(X509_POLICY_DATA, (st), (val))

crypto/libressl/include/openssl/safestack.h

1777

#define sk_X509_POLICY_DATA_find(st, val) SKM_sk_find(X509_POLICY_DATA, (st), (val))

crypto/libressl/include/openssl/safestack.h

1778

#define sk_X509_POLICY_DATA_find_ex(st, val) SKM_sk_find_ex(X509_POLICY_DATA, (st), (val))

crypto/libressl/include/openssl/safestack.h

1781

#define sk_X509_POLICY_DATA_insert(st, val, i) SKM_sk_insert(X509_POLICY_DATA, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1795

#define sk_X509_POLICY_NODE_set(st, i, val) SKM_sk_set(X509_POLICY_NODE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1797

#define sk_X509_POLICY_NODE_push(st, val) SKM_sk_push(X509_POLICY_NODE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1798

#define sk_X509_POLICY_NODE_unshift(st, val) SKM_sk_unshift(X509_POLICY_NODE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1799

#define sk_X509_POLICY_NODE_find(st, val) SKM_sk_find(X509_POLICY_NODE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1800

#define sk_X509_POLICY_NODE_find_ex(st, val) SKM_sk_find_ex(X509_POLICY_NODE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1803

#define sk_X509_POLICY_NODE_insert(st, val, i) SKM_sk_insert(X509_POLICY_NODE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1817

#define sk_X509_PURPOSE_set(st, i, val) SKM_sk_set(X509_PURPOSE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1819

#define sk_X509_PURPOSE_push(st, val) SKM_sk_push(X509_PURPOSE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1820

#define sk_X509_PURPOSE_unshift(st, val) SKM_sk_unshift(X509_PURPOSE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1821

#define sk_X509_PURPOSE_find(st, val) SKM_sk_find(X509_PURPOSE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1822

#define sk_X509_PURPOSE_find_ex(st, val) SKM_sk_find_ex(X509_PURPOSE, (st), (val))

crypto/libressl/include/openssl/safestack.h

1825

#define sk_X509_PURPOSE_insert(st, val, i) SKM_sk_insert(X509_PURPOSE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1839

#define sk_X509_REVOKED_set(st, i, val) SKM_sk_set(X509_REVOKED, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1841

#define sk_X509_REVOKED_push(st, val) SKM_sk_push(X509_REVOKED, (st), (val))

crypto/libressl/include/openssl/safestack.h

1842

#define sk_X509_REVOKED_unshift(st, val) SKM_sk_unshift(X509_REVOKED, (st), (val))

crypto/libressl/include/openssl/safestack.h

1843

#define sk_X509_REVOKED_find(st, val) SKM_sk_find(X509_REVOKED, (st), (val))

crypto/libressl/include/openssl/safestack.h

1844

#define sk_X509_REVOKED_find_ex(st, val) SKM_sk_find_ex(X509_REVOKED, (st), (val))

crypto/libressl/include/openssl/safestack.h

1847

#define sk_X509_REVOKED_insert(st, val, i) SKM_sk_insert(X509_REVOKED, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1861

#define sk_X509_TRUST_set(st, i, val) SKM_sk_set(X509_TRUST, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1863

#define sk_X509_TRUST_push(st, val) SKM_sk_push(X509_TRUST, (st), (val))

crypto/libressl/include/openssl/safestack.h

1864

#define sk_X509_TRUST_unshift(st, val) SKM_sk_unshift(X509_TRUST, (st), (val))

crypto/libressl/include/openssl/safestack.h

1865

#define sk_X509_TRUST_find(st, val) SKM_sk_find(X509_TRUST, (st), (val))

crypto/libressl/include/openssl/safestack.h

1866

#define sk_X509_TRUST_find_ex(st, val) SKM_sk_find_ex(X509_TRUST, (st), (val))

crypto/libressl/include/openssl/safestack.h

1869

#define sk_X509_TRUST_insert(st, val, i) SKM_sk_insert(X509_TRUST, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

187

#define sk_ACCESS_DESCRIPTION_set(st, i, val) SKM_sk_set(ACCESS_DESCRIPTION, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1883

#define sk_X509_VERIFY_PARAM_set(st, i, val) SKM_sk_set(X509_VERIFY_PARAM, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1885

#define sk_X509_VERIFY_PARAM_push(st, val) SKM_sk_push(X509_VERIFY_PARAM, (st), (val))

crypto/libressl/include/openssl/safestack.h

1886

#define sk_X509_VERIFY_PARAM_unshift(st, val) SKM_sk_unshift(X509_VERIFY_PARAM, (st), (val))

crypto/libressl/include/openssl/safestack.h

1887

#define sk_X509_VERIFY_PARAM_find(st, val) SKM_sk_find(X509_VERIFY_PARAM, (st), (val))

crypto/libressl/include/openssl/safestack.h

1888

#define sk_X509_VERIFY_PARAM_find_ex(st, val) SKM_sk_find_ex(X509_VERIFY_PARAM, (st), (val))

crypto/libressl/include/openssl/safestack.h

189

#define sk_ACCESS_DESCRIPTION_push(st, val) SKM_sk_push(ACCESS_DESCRIPTION, (st), (val))

crypto/libressl/include/openssl/safestack.h

1891

#define sk_X509_VERIFY_PARAM_insert(st, val, i) SKM_sk_insert(X509_VERIFY_PARAM, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

190

#define sk_ACCESS_DESCRIPTION_unshift(st, val) SKM_sk_unshift(ACCESS_DESCRIPTION, (st), (val))

crypto/libressl/include/openssl/safestack.h

1905

#define sk_nid_triple_set(st, i, val) SKM_sk_set(nid_triple, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1907

#define sk_nid_triple_push(st, val) SKM_sk_push(nid_triple, (st), (val))

crypto/libressl/include/openssl/safestack.h

1908

#define sk_nid_triple_unshift(st, val) SKM_sk_unshift(nid_triple, (st), (val))

crypto/libressl/include/openssl/safestack.h

1909

#define sk_nid_triple_find(st, val) SKM_sk_find(nid_triple, (st), (val))

crypto/libressl/include/openssl/safestack.h

191

#define sk_ACCESS_DESCRIPTION_find(st, val) SKM_sk_find(ACCESS_DESCRIPTION, (st), (val))

crypto/libressl/include/openssl/safestack.h

1910

#define sk_nid_triple_find_ex(st, val) SKM_sk_find_ex(nid_triple, (st), (val))

crypto/libressl/include/openssl/safestack.h

1913

#define sk_nid_triple_insert(st, val, i) SKM_sk_insert(nid_triple, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

192

#define sk_ACCESS_DESCRIPTION_find_ex(st, val) SKM_sk_find_ex(ACCESS_DESCRIPTION, (st), (val))

crypto/libressl/include/openssl/safestack.h

1927

#define sk_void_set(st, i, val) SKM_sk_set(void, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

1929

#define sk_void_push(st, val) SKM_sk_push(void, (st), (val))

crypto/libressl/include/openssl/safestack.h

1930

#define sk_void_unshift(st, val) SKM_sk_unshift(void, (st), (val))

crypto/libressl/include/openssl/safestack.h

1931

#define sk_void_find(st, val) SKM_sk_find(void, (st), (val))

crypto/libressl/include/openssl/safestack.h

1932

#define sk_void_find_ex(st, val) SKM_sk_find_ex(void, (st), (val))

crypto/libressl/include/openssl/safestack.h

1935

#define sk_void_insert(st, val, i) SKM_sk_insert(void, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1946

#define sk_OPENSSL_STRING_push(st, val) sk_push(CHECKED_STACK_OF(OPENSSL_STRING, st), CHECKED_PTR_OF(char, val))

crypto/libressl/include/openssl/safestack.h

1947

#define sk_OPENSSL_STRING_find(st, val) sk_find(CHECKED_STACK_OF(OPENSSL_STRING, st), CHECKED_PTR_OF(char, val))

crypto/libressl/include/openssl/safestack.h

195

#define sk_ACCESS_DESCRIPTION_insert(st, val, i) SKM_sk_insert(ACCESS_DESCRIPTION, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

1951

#define sk_OPENSSL_STRING_insert(st, val, i) sk_insert(CHECKED_STACK_OF(OPENSSL_STRING, st), CHECKED_PTR_OF(char, val), i)

crypto/libressl/include/openssl/safestack.h

1953

#define sk_OPENSSL_STRING_set(st, i, val) sk_set(CHECKED_STACK_OF(OPENSSL_STRING, st), i, CHECKED_PTR_OF(char, val))

crypto/libressl/include/openssl/safestack.h

1955

#define sk_OPENSSL_STRING_unshift(st, val) sk_unshift(CHECKED_STACK_OF(OPENSSL_STRING, st), CHECKED_PTR_OF(char, val))

crypto/libressl/include/openssl/safestack.h

1956

#define sk_OPENSSL_STRING_find_ex(st, val) sk_find_ex((_STACK *)CHECKED_CONST_PTR_OF(STACK_OF(OPENSSL_STRING), st), CHECKED_CONST_PTR_OF(char, val))

crypto/libressl/include/openssl/safestack.h

1970

#define sk_OPENSSL_BLOCK_push(st, val) sk_push(CHECKED_STACK_OF(OPENSSL_BLOCK, st), CHECKED_PTR_OF(void, val))

crypto/libressl/include/openssl/safestack.h

1971

#define sk_OPENSSL_BLOCK_find(st, val) sk_find(CHECKED_STACK_OF(OPENSSL_BLOCK, st), CHECKED_PTR_OF(void, val))

crypto/libressl/include/openssl/safestack.h

1975

#define sk_OPENSSL_BLOCK_insert(st, val, i) sk_insert(CHECKED_STACK_OF(OPENSSL_BLOCK, st), CHECKED_PTR_OF(void, val), i)

crypto/libressl/include/openssl/safestack.h

1977

#define sk_OPENSSL_BLOCK_set(st, i, val) sk_set(CHECKED_STACK_OF(OPENSSL_BLOCK, st), i, CHECKED_PTR_OF(void, val))

crypto/libressl/include/openssl/safestack.h

1979

#define sk_OPENSSL_BLOCK_unshift(st, val) sk_unshift(CHECKED_STACK_OF(OPENSSL_BLOCK, st), CHECKED_PTR_OF(void, val))

crypto/libressl/include/openssl/safestack.h

1980

#define sk_OPENSSL_BLOCK_find_ex(st, val) sk_find_ex((_STACK *)CHECKED_CONST_PTR_OF(STACK_OF(OPENSSL_BLOCK), st), CHECKED_CONST_PTR_OF(void, val))

crypto/libressl/include/openssl/safestack.h

1994

#define sk_OPENSSL_PSTRING_push(st, val) sk_push(CHECKED_STACK_OF(OPENSSL_PSTRING, st), CHECKED_PTR_OF(OPENSSL_STRING, val))

crypto/libressl/include/openssl/safestack.h

1995

#define sk_OPENSSL_PSTRING_find(st, val) sk_find(CHECKED_STACK_OF(OPENSSL_PSTRING, st), CHECKED_PTR_OF(OPENSSL_STRING, val))

crypto/libressl/include/openssl/safestack.h

1999

#define sk_OPENSSL_PSTRING_insert(st, val, i) sk_insert(CHECKED_STACK_OF(OPENSSL_PSTRING, st), CHECKED_PTR_OF(OPENSSL_STRING, val), i)

crypto/libressl/include/openssl/safestack.h

2001

#define sk_OPENSSL_PSTRING_set(st, i, val) sk_set(CHECKED_STACK_OF(OPENSSL_PSTRING, st), i, CHECKED_PTR_OF(OPENSSL_STRING, val))

crypto/libressl/include/openssl/safestack.h

2003

#define sk_OPENSSL_PSTRING_unshift(st, val) sk_unshift(CHECKED_STACK_OF(OPENSSL_PSTRING, st), CHECKED_PTR_OF(OPENSSL_STRING, val))

crypto/libressl/include/openssl/safestack.h

2004

#define sk_OPENSSL_PSTRING_find_ex(st, val) sk_find_ex((_STACK *)CHECKED_CONST_PTR_OF(STACK_OF(OPENSSL_PSTRING), st), CHECKED_CONST_PTR_OF(OPENSSL_STRING, val))

crypto/libressl/include/openssl/safestack.h

209

#define sk_ASIdOrRange_set(st, i, val) SKM_sk_set(ASIdOrRange, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

211

#define sk_ASIdOrRange_push(st, val) SKM_sk_push(ASIdOrRange, (st), (val))

crypto/libressl/include/openssl/safestack.h

212

#define sk_ASIdOrRange_unshift(st, val) SKM_sk_unshift(ASIdOrRange, (st), (val))

crypto/libressl/include/openssl/safestack.h

213

#define sk_ASIdOrRange_find(st, val) SKM_sk_find(ASIdOrRange, (st), (val))

crypto/libressl/include/openssl/safestack.h

214

#define sk_ASIdOrRange_find_ex(st, val) SKM_sk_find_ex(ASIdOrRange, (st), (val))

crypto/libressl/include/openssl/safestack.h

217

#define sk_ASIdOrRange_insert(st, val, i) SKM_sk_insert(ASIdOrRange, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

231

#define sk_ASN1_GENERALSTRING_set(st, i, val) SKM_sk_set(ASN1_GENERALSTRING, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

233

#define sk_ASN1_GENERALSTRING_push(st, val) SKM_sk_push(ASN1_GENERALSTRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

234

#define sk_ASN1_GENERALSTRING_unshift(st, val) SKM_sk_unshift(ASN1_GENERALSTRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

235

#define sk_ASN1_GENERALSTRING_find(st, val) SKM_sk_find(ASN1_GENERALSTRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

236

#define sk_ASN1_GENERALSTRING_find_ex(st, val) SKM_sk_find_ex(ASN1_GENERALSTRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

239

#define sk_ASN1_GENERALSTRING_insert(st, val, i) SKM_sk_insert(ASN1_GENERALSTRING, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

253

#define sk_ASN1_INTEGER_set(st, i, val) SKM_sk_set(ASN1_INTEGER, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

255

#define sk_ASN1_INTEGER_push(st, val) SKM_sk_push(ASN1_INTEGER, (st), (val))

crypto/libressl/include/openssl/safestack.h

256

#define sk_ASN1_INTEGER_unshift(st, val) SKM_sk_unshift(ASN1_INTEGER, (st), (val))

crypto/libressl/include/openssl/safestack.h

257

#define sk_ASN1_INTEGER_find(st, val) SKM_sk_find(ASN1_INTEGER, (st), (val))

crypto/libressl/include/openssl/safestack.h

258

#define sk_ASN1_INTEGER_find_ex(st, val) SKM_sk_find_ex(ASN1_INTEGER, (st), (val))

crypto/libressl/include/openssl/safestack.h

261

#define sk_ASN1_INTEGER_insert(st, val, i) SKM_sk_insert(ASN1_INTEGER, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

275

#define sk_ASN1_OBJECT_set(st, i, val) SKM_sk_set(ASN1_OBJECT, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

277

#define sk_ASN1_OBJECT_push(st, val) SKM_sk_push(ASN1_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

278

#define sk_ASN1_OBJECT_unshift(st, val) SKM_sk_unshift(ASN1_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

279

#define sk_ASN1_OBJECT_find(st, val) SKM_sk_find(ASN1_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

280

#define sk_ASN1_OBJECT_find_ex(st, val) SKM_sk_find_ex(ASN1_OBJECT, (st), (val))

crypto/libressl/include/openssl/safestack.h

283

#define sk_ASN1_OBJECT_insert(st, val, i) SKM_sk_insert(ASN1_OBJECT, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

297

#define sk_ASN1_STRING_TABLE_set(st, i, val) SKM_sk_set(ASN1_STRING_TABLE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

299

#define sk_ASN1_STRING_TABLE_push(st, val) SKM_sk_push(ASN1_STRING_TABLE, (st), (val))

crypto/libressl/include/openssl/safestack.h

300

#define sk_ASN1_STRING_TABLE_unshift(st, val) SKM_sk_unshift(ASN1_STRING_TABLE, (st), (val))

crypto/libressl/include/openssl/safestack.h

301

#define sk_ASN1_STRING_TABLE_find(st, val) SKM_sk_find(ASN1_STRING_TABLE, (st), (val))

crypto/libressl/include/openssl/safestack.h

302

#define sk_ASN1_STRING_TABLE_find_ex(st, val) SKM_sk_find_ex(ASN1_STRING_TABLE, (st), (val))

crypto/libressl/include/openssl/safestack.h

305

#define sk_ASN1_STRING_TABLE_insert(st, val, i) SKM_sk_insert(ASN1_STRING_TABLE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

319

#define sk_ASN1_TYPE_set(st, i, val) SKM_sk_set(ASN1_TYPE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

321

#define sk_ASN1_TYPE_push(st, val) SKM_sk_push(ASN1_TYPE, (st), (val))

crypto/libressl/include/openssl/safestack.h

322

#define sk_ASN1_TYPE_unshift(st, val) SKM_sk_unshift(ASN1_TYPE, (st), (val))

crypto/libressl/include/openssl/safestack.h

323

#define sk_ASN1_TYPE_find(st, val) SKM_sk_find(ASN1_TYPE, (st), (val))

crypto/libressl/include/openssl/safestack.h

324

#define sk_ASN1_TYPE_find_ex(st, val) SKM_sk_find_ex(ASN1_TYPE, (st), (val))

crypto/libressl/include/openssl/safestack.h

327

#define sk_ASN1_TYPE_insert(st, val, i) SKM_sk_insert(ASN1_TYPE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

341

#define sk_ASN1_UTF8STRING_set(st, i, val) SKM_sk_set(ASN1_UTF8STRING, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

343

#define sk_ASN1_UTF8STRING_push(st, val) SKM_sk_push(ASN1_UTF8STRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

344

#define sk_ASN1_UTF8STRING_unshift(st, val) SKM_sk_unshift(ASN1_UTF8STRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

345

#define sk_ASN1_UTF8STRING_find(st, val) SKM_sk_find(ASN1_UTF8STRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

346

#define sk_ASN1_UTF8STRING_find_ex(st, val) SKM_sk_find_ex(ASN1_UTF8STRING, (st), (val))

crypto/libressl/include/openssl/safestack.h

349

#define sk_ASN1_UTF8STRING_insert(st, val, i) SKM_sk_insert(ASN1_UTF8STRING, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

363

#define sk_ASN1_VALUE_set(st, i, val) SKM_sk_set(ASN1_VALUE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

365

#define sk_ASN1_VALUE_push(st, val) SKM_sk_push(ASN1_VALUE, (st), (val))

crypto/libressl/include/openssl/safestack.h

366

#define sk_ASN1_VALUE_unshift(st, val) SKM_sk_unshift(ASN1_VALUE, (st), (val))

crypto/libressl/include/openssl/safestack.h

367

#define sk_ASN1_VALUE_find(st, val) SKM_sk_find(ASN1_VALUE, (st), (val))

crypto/libressl/include/openssl/safestack.h

368

#define sk_ASN1_VALUE_find_ex(st, val) SKM_sk_find_ex(ASN1_VALUE, (st), (val))

crypto/libressl/include/openssl/safestack.h

371

#define sk_ASN1_VALUE_insert(st, val, i) SKM_sk_insert(ASN1_VALUE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

385

#define sk_BIO_set(st, i, val) SKM_sk_set(BIO, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

387

#define sk_BIO_push(st, val) SKM_sk_push(BIO, (st), (val))

crypto/libressl/include/openssl/safestack.h

388

#define sk_BIO_unshift(st, val) SKM_sk_unshift(BIO, (st), (val))

crypto/libressl/include/openssl/safestack.h

389

#define sk_BIO_find(st, val) SKM_sk_find(BIO, (st), (val))

crypto/libressl/include/openssl/safestack.h

390

#define sk_BIO_find_ex(st, val) SKM_sk_find_ex(BIO, (st), (val))

crypto/libressl/include/openssl/safestack.h

393

#define sk_BIO_insert(st, val, i) SKM_sk_insert(BIO, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

407

#define sk_BY_DIR_ENTRY_set(st, i, val) SKM_sk_set(BY_DIR_ENTRY, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

409

#define sk_BY_DIR_ENTRY_push(st, val) SKM_sk_push(BY_DIR_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

410

#define sk_BY_DIR_ENTRY_unshift(st, val) SKM_sk_unshift(BY_DIR_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

411

#define sk_BY_DIR_ENTRY_find(st, val) SKM_sk_find(BY_DIR_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

412

#define sk_BY_DIR_ENTRY_find_ex(st, val) SKM_sk_find_ex(BY_DIR_ENTRY, (st), (val))

crypto/libressl/include/openssl/safestack.h

415

#define sk_BY_DIR_ENTRY_insert(st, val, i) SKM_sk_insert(BY_DIR_ENTRY, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

429

#define sk_BY_DIR_HASH_set(st, i, val) SKM_sk_set(BY_DIR_HASH, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

431

#define sk_BY_DIR_HASH_push(st, val) SKM_sk_push(BY_DIR_HASH, (st), (val))

crypto/libressl/include/openssl/safestack.h

432

#define sk_BY_DIR_HASH_unshift(st, val) SKM_sk_unshift(BY_DIR_HASH, (st), (val))

crypto/libressl/include/openssl/safestack.h

433

#define sk_BY_DIR_HASH_find(st, val) SKM_sk_find(BY_DIR_HASH, (st), (val))

crypto/libressl/include/openssl/safestack.h

434

#define sk_BY_DIR_HASH_find_ex(st, val) SKM_sk_find_ex(BY_DIR_HASH, (st), (val))

crypto/libressl/include/openssl/safestack.h

437

#define sk_BY_DIR_HASH_insert(st, val, i) SKM_sk_insert(BY_DIR_HASH, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

451

#define sk_CMS_CertificateChoices_set(st, i, val) SKM_sk_set(CMS_CertificateChoices, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

453

#define sk_CMS_CertificateChoices_push(st, val) SKM_sk_push(CMS_CertificateChoices, (st), (val))

crypto/libressl/include/openssl/safestack.h

454

#define sk_CMS_CertificateChoices_unshift(st, val) SKM_sk_unshift(CMS_CertificateChoices, (st), (val))

crypto/libressl/include/openssl/safestack.h

455

#define sk_CMS_CertificateChoices_find(st, val) SKM_sk_find(CMS_CertificateChoices, (st), (val))

crypto/libressl/include/openssl/safestack.h

456

#define sk_CMS_CertificateChoices_find_ex(st, val) SKM_sk_find_ex(CMS_CertificateChoices, (st), (val))

crypto/libressl/include/openssl/safestack.h

459

#define sk_CMS_CertificateChoices_insert(st, val, i) SKM_sk_insert(CMS_CertificateChoices, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

473

#define sk_CMS_RecipientEncryptedKey_set(st, i, val) SKM_sk_set(CMS_RecipientEncryptedKey, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

475

#define sk_CMS_RecipientEncryptedKey_push(st, val) SKM_sk_push(CMS_RecipientEncryptedKey, (st), (val))

crypto/libressl/include/openssl/safestack.h

476

#define sk_CMS_RecipientEncryptedKey_unshift(st, val) SKM_sk_unshift(CMS_RecipientEncryptedKey, (st), (val))

crypto/libressl/include/openssl/safestack.h

477

#define sk_CMS_RecipientEncryptedKey_find(st, val) SKM_sk_find(CMS_RecipientEncryptedKey, (st), (val))

crypto/libressl/include/openssl/safestack.h

478

#define sk_CMS_RecipientEncryptedKey_find_ex(st, val) SKM_sk_find_ex(CMS_RecipientEncryptedKey, (st), (val))

crypto/libressl/include/openssl/safestack.h

481

#define sk_CMS_RecipientEncryptedKey_insert(st, val, i) SKM_sk_insert(CMS_RecipientEncryptedKey, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

495

#define sk_CMS_RecipientInfo_set(st, i, val) SKM_sk_set(CMS_RecipientInfo, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

497

#define sk_CMS_RecipientInfo_push(st, val) SKM_sk_push(CMS_RecipientInfo, (st), (val))

crypto/libressl/include/openssl/safestack.h

498

#define sk_CMS_RecipientInfo_unshift(st, val) SKM_sk_unshift(CMS_RecipientInfo, (st), (val))

crypto/libressl/include/openssl/safestack.h

499

#define sk_CMS_RecipientInfo_find(st, val) SKM_sk_find(CMS_RecipientInfo, (st), (val))

crypto/libressl/include/openssl/safestack.h

500

#define sk_CMS_RecipientInfo_find_ex(st, val) SKM_sk_find_ex(CMS_RecipientInfo, (st), (val))

crypto/libressl/include/openssl/safestack.h

503

#define sk_CMS_RecipientInfo_insert(st, val, i) SKM_sk_insert(CMS_RecipientInfo, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

517

#define sk_CMS_RevocationInfoChoice_set(st, i, val) SKM_sk_set(CMS_RevocationInfoChoice, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

519

#define sk_CMS_RevocationInfoChoice_push(st, val) SKM_sk_push(CMS_RevocationInfoChoice, (st), (val))

crypto/libressl/include/openssl/safestack.h

520

#define sk_CMS_RevocationInfoChoice_unshift(st, val) SKM_sk_unshift(CMS_RevocationInfoChoice, (st), (val))

crypto/libressl/include/openssl/safestack.h

521

#define sk_CMS_RevocationInfoChoice_find(st, val) SKM_sk_find(CMS_RevocationInfoChoice, (st), (val))

crypto/libressl/include/openssl/safestack.h

522

#define sk_CMS_RevocationInfoChoice_find_ex(st, val) SKM_sk_find_ex(CMS_RevocationInfoChoice, (st), (val))

crypto/libressl/include/openssl/safestack.h

525

#define sk_CMS_RevocationInfoChoice_insert(st, val, i) SKM_sk_insert(CMS_RevocationInfoChoice, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

539

#define sk_CMS_SignerInfo_set(st, i, val) SKM_sk_set(CMS_SignerInfo, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

541

#define sk_CMS_SignerInfo_push(st, val) SKM_sk_push(CMS_SignerInfo, (st), (val))

crypto/libressl/include/openssl/safestack.h

542

#define sk_CMS_SignerInfo_unshift(st, val) SKM_sk_unshift(CMS_SignerInfo, (st), (val))

crypto/libressl/include/openssl/safestack.h

543

#define sk_CMS_SignerInfo_find(st, val) SKM_sk_find(CMS_SignerInfo, (st), (val))

crypto/libressl/include/openssl/safestack.h

544

#define sk_CMS_SignerInfo_find_ex(st, val) SKM_sk_find_ex(CMS_SignerInfo, (st), (val))

crypto/libressl/include/openssl/safestack.h

547

#define sk_CMS_SignerInfo_insert(st, val, i) SKM_sk_insert(CMS_SignerInfo, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

561

#define sk_CONF_IMODULE_set(st, i, val) SKM_sk_set(CONF_IMODULE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

563

#define sk_CONF_IMODULE_push(st, val) SKM_sk_push(CONF_IMODULE, (st), (val))

crypto/libressl/include/openssl/safestack.h

564

#define sk_CONF_IMODULE_unshift(st, val) SKM_sk_unshift(CONF_IMODULE, (st), (val))

crypto/libressl/include/openssl/safestack.h

565

#define sk_CONF_IMODULE_find(st, val) SKM_sk_find(CONF_IMODULE, (st), (val))

crypto/libressl/include/openssl/safestack.h

566

#define sk_CONF_IMODULE_find_ex(st, val) SKM_sk_find_ex(CONF_IMODULE, (st), (val))

crypto/libressl/include/openssl/safestack.h

569

#define sk_CONF_IMODULE_insert(st, val, i) SKM_sk_insert(CONF_IMODULE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

583

#define sk_CONF_MODULE_set(st, i, val) SKM_sk_set(CONF_MODULE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

585

#define sk_CONF_MODULE_push(st, val) SKM_sk_push(CONF_MODULE, (st), (val))

crypto/libressl/include/openssl/safestack.h

586

#define sk_CONF_MODULE_unshift(st, val) SKM_sk_unshift(CONF_MODULE, (st), (val))

crypto/libressl/include/openssl/safestack.h

587

#define sk_CONF_MODULE_find(st, val) SKM_sk_find(CONF_MODULE, (st), (val))

crypto/libressl/include/openssl/safestack.h

588

#define sk_CONF_MODULE_find_ex(st, val) SKM_sk_find_ex(CONF_MODULE, (st), (val))

crypto/libressl/include/openssl/safestack.h

591

#define sk_CONF_MODULE_insert(st, val, i) SKM_sk_insert(CONF_MODULE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

605

#define sk_CONF_VALUE_set(st, i, val) SKM_sk_set(CONF_VALUE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

607

#define sk_CONF_VALUE_push(st, val) SKM_sk_push(CONF_VALUE, (st), (val))

crypto/libressl/include/openssl/safestack.h

608

#define sk_CONF_VALUE_unshift(st, val) SKM_sk_unshift(CONF_VALUE, (st), (val))

crypto/libressl/include/openssl/safestack.h

609

#define sk_CONF_VALUE_find(st, val) SKM_sk_find(CONF_VALUE, (st), (val))

crypto/libressl/include/openssl/safestack.h

610

#define sk_CONF_VALUE_find_ex(st, val) SKM_sk_find_ex(CONF_VALUE, (st), (val))

crypto/libressl/include/openssl/safestack.h

613

#define sk_CONF_VALUE_insert(st, val, i) SKM_sk_insert(CONF_VALUE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

627

#define sk_CRYPTO_EX_DATA_FUNCS_set(st, i, val) SKM_sk_set(CRYPTO_EX_DATA_FUNCS, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

629

#define sk_CRYPTO_EX_DATA_FUNCS_push(st, val) SKM_sk_push(CRYPTO_EX_DATA_FUNCS, (st), (val))

crypto/libressl/include/openssl/safestack.h

630

#define sk_CRYPTO_EX_DATA_FUNCS_unshift(st, val) SKM_sk_unshift(CRYPTO_EX_DATA_FUNCS, (st), (val))

crypto/libressl/include/openssl/safestack.h

631

#define sk_CRYPTO_EX_DATA_FUNCS_find(st, val) SKM_sk_find(CRYPTO_EX_DATA_FUNCS, (st), (val))

crypto/libressl/include/openssl/safestack.h

632

#define sk_CRYPTO_EX_DATA_FUNCS_find_ex(st, val) SKM_sk_find_ex(CRYPTO_EX_DATA_FUNCS, (st), (val))

crypto/libressl/include/openssl/safestack.h

635

#define sk_CRYPTO_EX_DATA_FUNCS_insert(st, val, i) SKM_sk_insert(CRYPTO_EX_DATA_FUNCS, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

649

#define sk_CRYPTO_dynlock_set(st, i, val) SKM_sk_set(CRYPTO_dynlock, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

651

#define sk_CRYPTO_dynlock_push(st, val) SKM_sk_push(CRYPTO_dynlock, (st), (val))

crypto/libressl/include/openssl/safestack.h

652

#define sk_CRYPTO_dynlock_unshift(st, val) SKM_sk_unshift(CRYPTO_dynlock, (st), (val))

crypto/libressl/include/openssl/safestack.h

653

#define sk_CRYPTO_dynlock_find(st, val) SKM_sk_find(CRYPTO_dynlock, (st), (val))

crypto/libressl/include/openssl/safestack.h

654

#define sk_CRYPTO_dynlock_find_ex(st, val) SKM_sk_find_ex(CRYPTO_dynlock, (st), (val))

crypto/libressl/include/openssl/safestack.h

657

#define sk_CRYPTO_dynlock_insert(st, val, i) SKM_sk_insert(CRYPTO_dynlock, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

671

#define sk_CTLOG_set(st, i, val) SKM_sk_set(CTLOG, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

673

#define sk_CTLOG_push(st, val) SKM_sk_push(CTLOG, (st), (val))

crypto/libressl/include/openssl/safestack.h

674

#define sk_CTLOG_unshift(st, val) SKM_sk_unshift(CTLOG, (st), (val))

crypto/libressl/include/openssl/safestack.h

675

#define sk_CTLOG_find(st, val) SKM_sk_find(CTLOG, (st), (val))

crypto/libressl/include/openssl/safestack.h

676

#define sk_CTLOG_find_ex(st, val) SKM_sk_find_ex(CTLOG, (st), (val))

crypto/libressl/include/openssl/safestack.h

679

#define sk_CTLOG_insert(st, val, i) SKM_sk_insert(CTLOG, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

693

#define sk_DIST_POINT_set(st, i, val) SKM_sk_set(DIST_POINT, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

695

#define sk_DIST_POINT_push(st, val) SKM_sk_push(DIST_POINT, (st), (val))

crypto/libressl/include/openssl/safestack.h

696

#define sk_DIST_POINT_unshift(st, val) SKM_sk_unshift(DIST_POINT, (st), (val))

crypto/libressl/include/openssl/safestack.h

697

#define sk_DIST_POINT_find(st, val) SKM_sk_find(DIST_POINT, (st), (val))

crypto/libressl/include/openssl/safestack.h

698

#define sk_DIST_POINT_find_ex(st, val) SKM_sk_find_ex(DIST_POINT, (st), (val))

crypto/libressl/include/openssl/safestack.h

701

#define sk_DIST_POINT_insert(st, val, i) SKM_sk_insert(DIST_POINT, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

715

#define sk_ENGINE_set(st, i, val) SKM_sk_set(ENGINE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

717

#define sk_ENGINE_push(st, val) SKM_sk_push(ENGINE, (st), (val))

crypto/libressl/include/openssl/safestack.h

718

#define sk_ENGINE_unshift(st, val) SKM_sk_unshift(ENGINE, (st), (val))

crypto/libressl/include/openssl/safestack.h

719

#define sk_ENGINE_find(st, val) SKM_sk_find(ENGINE, (st), (val))

crypto/libressl/include/openssl/safestack.h

720

#define sk_ENGINE_find_ex(st, val) SKM_sk_find_ex(ENGINE, (st), (val))

crypto/libressl/include/openssl/safestack.h

723

#define sk_ENGINE_insert(st, val, i) SKM_sk_insert(ENGINE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

737

#define sk_ENGINE_CLEANUP_ITEM_set(st, i, val) SKM_sk_set(ENGINE_CLEANUP_ITEM, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

739

#define sk_ENGINE_CLEANUP_ITEM_push(st, val) SKM_sk_push(ENGINE_CLEANUP_ITEM, (st), (val))

crypto/libressl/include/openssl/safestack.h

740

#define sk_ENGINE_CLEANUP_ITEM_unshift(st, val) SKM_sk_unshift(ENGINE_CLEANUP_ITEM, (st), (val))

crypto/libressl/include/openssl/safestack.h

741

#define sk_ENGINE_CLEANUP_ITEM_find(st, val) SKM_sk_find(ENGINE_CLEANUP_ITEM, (st), (val))

crypto/libressl/include/openssl/safestack.h

742

#define sk_ENGINE_CLEANUP_ITEM_find_ex(st, val) SKM_sk_find_ex(ENGINE_CLEANUP_ITEM, (st), (val))

crypto/libressl/include/openssl/safestack.h

745

#define sk_ENGINE_CLEANUP_ITEM_insert(st, val, i) SKM_sk_insert(ENGINE_CLEANUP_ITEM, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

759

#define sk_ESS_CERT_ID_set(st, i, val) SKM_sk_set(ESS_CERT_ID, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

761

#define sk_ESS_CERT_ID_push(st, val) SKM_sk_push(ESS_CERT_ID, (st), (val))

crypto/libressl/include/openssl/safestack.h

762

#define sk_ESS_CERT_ID_unshift(st, val) SKM_sk_unshift(ESS_CERT_ID, (st), (val))

crypto/libressl/include/openssl/safestack.h

763

#define sk_ESS_CERT_ID_find(st, val) SKM_sk_find(ESS_CERT_ID, (st), (val))

crypto/libressl/include/openssl/safestack.h

764

#define sk_ESS_CERT_ID_find_ex(st, val) SKM_sk_find_ex(ESS_CERT_ID, (st), (val))

crypto/libressl/include/openssl/safestack.h

767

#define sk_ESS_CERT_ID_insert(st, val, i) SKM_sk_insert(ESS_CERT_ID, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

782

#define sk_ESS_CERT_ID_V2_set(st, i, val) SKM_sk_set(ESS_CERT_ID_V2, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

784

#define sk_ESS_CERT_ID_V2_push(st, val) SKM_sk_push(ESS_CERT_ID_V2, (st), (val))

crypto/libressl/include/openssl/safestack.h

785

#define sk_ESS_CERT_ID_V2_unshift(st, val) SKM_sk_unshift(ESS_CERT_ID_V2, (st), (val))

crypto/libressl/include/openssl/safestack.h

786

#define sk_ESS_CERT_ID_V2_find(st, val) SKM_sk_find(ESS_CERT_ID_V2, (st), (val))

crypto/libressl/include/openssl/safestack.h

787

#define sk_ESS_CERT_ID_V2_find_ex(st, val) SKM_sk_find_ex(ESS_CERT_ID_V2, (st), (val))

crypto/libressl/include/openssl/safestack.h

790

#define sk_ESS_CERT_ID_V2_insert(st, val, i) SKM_sk_insert(ESS_CERT_ID_V2, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

805

#define sk_EVP_MD_set(st, i, val) SKM_sk_set(EVP_MD, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

807

#define sk_EVP_MD_push(st, val) SKM_sk_push(EVP_MD, (st), (val))

crypto/libressl/include/openssl/safestack.h

808

#define sk_EVP_MD_unshift(st, val) SKM_sk_unshift(EVP_MD, (st), (val))

crypto/libressl/include/openssl/safestack.h

809

#define sk_EVP_MD_find(st, val) SKM_sk_find(EVP_MD, (st), (val))

crypto/libressl/include/openssl/safestack.h

810

#define sk_EVP_MD_find_ex(st, val) SKM_sk_find_ex(EVP_MD, (st), (val))

crypto/libressl/include/openssl/safestack.h

813

#define sk_EVP_MD_insert(st, val, i) SKM_sk_insert(EVP_MD, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

827

#define sk_EVP_PBE_CTL_set(st, i, val) SKM_sk_set(EVP_PBE_CTL, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

829

#define sk_EVP_PBE_CTL_push(st, val) SKM_sk_push(EVP_PBE_CTL, (st), (val))

crypto/libressl/include/openssl/safestack.h

830

#define sk_EVP_PBE_CTL_unshift(st, val) SKM_sk_unshift(EVP_PBE_CTL, (st), (val))

crypto/libressl/include/openssl/safestack.h

831

#define sk_EVP_PBE_CTL_find(st, val) SKM_sk_find(EVP_PBE_CTL, (st), (val))

crypto/libressl/include/openssl/safestack.h

832

#define sk_EVP_PBE_CTL_find_ex(st, val) SKM_sk_find_ex(EVP_PBE_CTL, (st), (val))

crypto/libressl/include/openssl/safestack.h

835

#define sk_EVP_PBE_CTL_insert(st, val, i) SKM_sk_insert(EVP_PBE_CTL, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

849

#define sk_EVP_PKEY_ASN1_METHOD_set(st, i, val) SKM_sk_set(EVP_PKEY_ASN1_METHOD, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

851

#define sk_EVP_PKEY_ASN1_METHOD_push(st, val) SKM_sk_push(EVP_PKEY_ASN1_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

852

#define sk_EVP_PKEY_ASN1_METHOD_unshift(st, val) SKM_sk_unshift(EVP_PKEY_ASN1_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

853

#define sk_EVP_PKEY_ASN1_METHOD_find(st, val) SKM_sk_find(EVP_PKEY_ASN1_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

854

#define sk_EVP_PKEY_ASN1_METHOD_find_ex(st, val) SKM_sk_find_ex(EVP_PKEY_ASN1_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

857

#define sk_EVP_PKEY_ASN1_METHOD_insert(st, val, i) SKM_sk_insert(EVP_PKEY_ASN1_METHOD, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

871

#define sk_EVP_PKEY_METHOD_set(st, i, val) SKM_sk_set(EVP_PKEY_METHOD, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

873

#define sk_EVP_PKEY_METHOD_push(st, val) SKM_sk_push(EVP_PKEY_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

874

#define sk_EVP_PKEY_METHOD_unshift(st, val) SKM_sk_unshift(EVP_PKEY_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

875

#define sk_EVP_PKEY_METHOD_find(st, val) SKM_sk_find(EVP_PKEY_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

876

#define sk_EVP_PKEY_METHOD_find_ex(st, val) SKM_sk_find_ex(EVP_PKEY_METHOD, (st), (val))

crypto/libressl/include/openssl/safestack.h

879

#define sk_EVP_PKEY_METHOD_insert(st, val, i) SKM_sk_insert(EVP_PKEY_METHOD, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

893

#define sk_GENERAL_NAME_set(st, i, val) SKM_sk_set(GENERAL_NAME, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

895

#define sk_GENERAL_NAME_push(st, val) SKM_sk_push(GENERAL_NAME, (st), (val))

crypto/libressl/include/openssl/safestack.h

896

#define sk_GENERAL_NAME_unshift(st, val) SKM_sk_unshift(GENERAL_NAME, (st), (val))

crypto/libressl/include/openssl/safestack.h

897

#define sk_GENERAL_NAME_find(st, val) SKM_sk_find(GENERAL_NAME, (st), (val))

crypto/libressl/include/openssl/safestack.h

898

#define sk_GENERAL_NAME_find_ex(st, val) SKM_sk_find_ex(GENERAL_NAME, (st), (val))

crypto/libressl/include/openssl/safestack.h

901

#define sk_GENERAL_NAME_insert(st, val, i) SKM_sk_insert(GENERAL_NAME, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

915

#define sk_GENERAL_NAMES_set(st, i, val) SKM_sk_set(GENERAL_NAMES, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

917

#define sk_GENERAL_NAMES_push(st, val) SKM_sk_push(GENERAL_NAMES, (st), (val))

crypto/libressl/include/openssl/safestack.h

918

#define sk_GENERAL_NAMES_unshift(st, val) SKM_sk_unshift(GENERAL_NAMES, (st), (val))

crypto/libressl/include/openssl/safestack.h

919

#define sk_GENERAL_NAMES_find(st, val) SKM_sk_find(GENERAL_NAMES, (st), (val))

crypto/libressl/include/openssl/safestack.h

920

#define sk_GENERAL_NAMES_find_ex(st, val) SKM_sk_find_ex(GENERAL_NAMES, (st), (val))

crypto/libressl/include/openssl/safestack.h

923

#define sk_GENERAL_NAMES_insert(st, val, i) SKM_sk_insert(GENERAL_NAMES, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

937

#define sk_GENERAL_SUBTREE_set(st, i, val) SKM_sk_set(GENERAL_SUBTREE, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

939

#define sk_GENERAL_SUBTREE_push(st, val) SKM_sk_push(GENERAL_SUBTREE, (st), (val))

crypto/libressl/include/openssl/safestack.h

940

#define sk_GENERAL_SUBTREE_unshift(st, val) SKM_sk_unshift(GENERAL_SUBTREE, (st), (val))

crypto/libressl/include/openssl/safestack.h

941

#define sk_GENERAL_SUBTREE_find(st, val) SKM_sk_find(GENERAL_SUBTREE, (st), (val))

crypto/libressl/include/openssl/safestack.h

942

#define sk_GENERAL_SUBTREE_find_ex(st, val) SKM_sk_find_ex(GENERAL_SUBTREE, (st), (val))

crypto/libressl/include/openssl/safestack.h

945

#define sk_GENERAL_SUBTREE_insert(st, val, i) SKM_sk_insert(GENERAL_SUBTREE, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

959

#define sk_IPAddressFamily_set(st, i, val) SKM_sk_set(IPAddressFamily, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

961

#define sk_IPAddressFamily_push(st, val) SKM_sk_push(IPAddressFamily, (st), (val))

crypto/libressl/include/openssl/safestack.h

962

#define sk_IPAddressFamily_unshift(st, val) SKM_sk_unshift(IPAddressFamily, (st), (val))

crypto/libressl/include/openssl/safestack.h

963

#define sk_IPAddressFamily_find(st, val) SKM_sk_find(IPAddressFamily, (st), (val))

crypto/libressl/include/openssl/safestack.h

964

#define sk_IPAddressFamily_find_ex(st, val) SKM_sk_find_ex(IPAddressFamily, (st), (val))

crypto/libressl/include/openssl/safestack.h

967

#define sk_IPAddressFamily_insert(st, val, i) SKM_sk_insert(IPAddressFamily, (st), (val), (i))

crypto/libressl/include/openssl/safestack.h

981

#define sk_IPAddressOrRange_set(st, i, val) SKM_sk_set(IPAddressOrRange, (st), (i), (val))

crypto/libressl/include/openssl/safestack.h

983

#define sk_IPAddressOrRange_push(st, val) SKM_sk_push(IPAddressOrRange, (st), (val))

crypto/libressl/include/openssl/safestack.h

984

#define sk_IPAddressOrRange_unshift(st, val) SKM_sk_unshift(IPAddressOrRange, (st), (val))

crypto/libressl/include/openssl/safestack.h

985

#define sk_IPAddressOrRange_find(st, val) SKM_sk_find(IPAddressOrRange, (st), (val))

crypto/libressl/include/openssl/safestack.h

986

#define sk_IPAddressOrRange_find_ex(st, val) SKM_sk_find_ex(IPAddressOrRange, (st), (val))

crypto/libressl/include/openssl/safestack.h

989

#define sk_IPAddressOrRange_insert(st, val, i) SKM_sk_insert(IPAddressOrRange, (st), (val), (i))

crypto/libressl/include/openssl/ssl.h

1428

void (*cb)(const SSL *ssl, int type, int val));

crypto/libressl/include/openssl/ssl.h

1429

void (*SSL_get_info_callback(const SSL *ssl))(const SSL *ssl, int type, int val);

crypto/libressl/include/openssl/ssl.h

606

int type, int val));

crypto/libressl/include/openssl/ssl.h

608

int val);

crypto/libressl/include/openssl/ssl.h

751

void SSL_CTX_set_post_handshake_auth(SSL_CTX *ctx, int val);

crypto/libressl/include/openssl/ssl.h

752

void SSL_set_post_handshake_auth(SSL *s, int val);

crypto/libressl/include/openssl/x509v3.h

387

#define X509V3_conf_err(val) ERR_asprintf_error_data( \

crypto/libressl/include/openssl/x509v3.h

388

"section:%s,name:%s,value:%s", val->section, \

crypto/libressl/include/openssl/x509v3.h

389

val->name, val->value);

crypto/libressl/include/openssl/x509v3.h

701

void X509V3_conf_free(CONF_VALUE *val);

crypto/libressl/include/openssl/x509v3.h

776

void X509V3_EXT_val_prn(BIO *out, STACK_OF(CONF_VALUE) *val, int indent,

crypto/libressl/ssl/bio_ssl.c

451

void (**fptr)(const SSL *xssl, int type, int val);

crypto/libressl/ssl/bio_ssl.c

453

fptr = (void (**)(const SSL *xssl, int type, int val))

crypto/libressl/ssl/ssl_lib.c

3158

SSL_set_info_callback(SSL *ssl, void (*cb)(const SSL *ssl, int type, int val))

crypto/libressl/ssl/ssl_lib.c

3163

void (*SSL_get_info_callback(const SSL *ssl))(const SSL *ssl, int type, int val)

crypto/libressl/ssl/ssl_lib.c

3199

SSL_CTX_set_post_handshake_auth(SSL_CTX *ctx, int val)

crypto/libressl/ssl/ssl_lib.c

3205

SSL_set_post_handshake_auth(SSL *ssl, int val)

crypto/libressl/ssl/ssl_locl.h

712

typedef void (ssl_info_callback_fn)(const SSL *s, int type, int val);

crypto/libressl/ssl/ssl_sess.c

1146

void (*cb)(const SSL *ssl, int type, int val))

crypto/libressl/ssl/ssl_sess.c

1152

(*SSL_CTX_get_info_callback(SSL_CTX *ctx))(const SSL *ssl, int type, int val)

crypto/libressl/ssl/t1_enc.c

422

unsigned char *val = NULL;

crypto/libressl/ssl/t1_enc.c

441

val = malloc(vallen);

crypto/libressl/ssl/t1_enc.c

442

if (val == NULL)

crypto/libressl/ssl/t1_enc.c

445

memcpy(val + currentvalpos, (unsigned char *) label, llen);

crypto/libressl/ssl/t1_enc.c

447

memcpy(val + currentvalpos, s->s3->client_random, SSL3_RANDOM_SIZE);

crypto/libressl/ssl/t1_enc.c

449

memcpy(val + currentvalpos, s->s3->server_random, SSL3_RANDOM_SIZE);

crypto/libressl/ssl/t1_enc.c

453

val[currentvalpos] = (contextlen >> 8) & 0xff;

crypto/libressl/ssl/t1_enc.c

455

val[currentvalpos] = contextlen & 0xff;

crypto/libressl/ssl/t1_enc.c

458

memcpy(val + currentvalpos, context, contextlen);

crypto/libressl/ssl/t1_enc.c

467

if (memcmp(val, TLS_MD_CLIENT_FINISH_CONST,

crypto/libressl/ssl/t1_enc.c

470

if (memcmp(val, TLS_MD_SERVER_FINISH_CONST,

crypto/libressl/ssl/t1_enc.c

473

if (memcmp(val, TLS_MD_MASTER_SECRET_CONST,

crypto/libressl/ssl/t1_enc.c

476

if (memcmp(val, TLS_MD_KEY_EXPANSION_CONST,

crypto/libressl/ssl/t1_enc.c

481

val, vallen, NULL, 0, NULL, 0, NULL, 0, NULL, 0, out, olen);

crypto/libressl/ssl/t1_enc.c

492

free(val);

crypto/openssh/channels.c

420

int val;

crypto/openssh/channels.c

452

(val = fcntl(rfd, F_GETFL)) != -1 && !(val & O_NONBLOCK)) {

crypto/openssh/channels.c

453

c->restore_flags[0] = val;

crypto/openssh/channels.c

458

(val = fcntl(wfd, F_GETFL)) != -1 && !(val & O_NONBLOCK)) {

crypto/openssh/channels.c

459

c->restore_flags[1] = val;

crypto/openssh/channels.c

464

(val = fcntl(efd, F_GETFL)) != -1 && !(val & O_NONBLOCK)) {

crypto/openssh/channels.c

465

c->restore_flags[2] = val;

crypto/openssh/clientloop.c

2666

client_send_env(struct ssh *ssh, int id, const char *name, const char *val)

crypto/openssh/clientloop.c

2670

debug("channel %d: setting env %s = \"%s\"", id, name, val);

crypto/openssh/clientloop.c

2673

(r = sshpkt_put_cstring(ssh, val)) != 0 ||

crypto/openssh/clientloop.c

2685

char *name, *val;

crypto/openssh/clientloop.c

2727

if ((val = strchr(name, '=')) == NULL) {

crypto/openssh/clientloop.c

2731

*val++ = '\0';

crypto/openssh/clientloop.c

2745

client_send_env(ssh, id, name, val);

crypto/openssh/clientloop.c

2752

if ((val = strchr(name, '=')) == NULL) {

crypto/openssh/clientloop.c

2756

*val++ = '\0';

crypto/openssh/clientloop.c

2757

client_send_env(ssh, id, name, val);

crypto/openssh/defines.h

738

((((u_int64_t)(f).val[0] & 0xffffffffUL) << 32) | \

crypto/openssh/defines.h

739

((f).val[1] & 0xffffffffUL))

crypto/openssh/gss-genr.c

234

char *val;

crypto/openssh/gss-genr.c

236

xasprintf(&val, "host@%s", host);

crypto/openssh/gss-genr.c

237

gssbuf.value = val;

crypto/openssh/kex.c

412

const u_char *val, size_t len, const char *want_ver, u_int flag)

crypto/openssh/kex.c

414

if (memchr(val, '\0', len) != NULL) {

crypto/openssh/kex.c

418

debug_f("%s=<%s>", name, val);

crypto/openssh/kex.c

419

if (strcmp(val, want_ver) == 0)

crypto/openssh/kex.c

483

u_char *val;

crypto/openssh/kex.c

503

if ((r = sshpkt_get_string(ssh, &val, &vlen)) != 0) {

crypto/openssh/kex.c

510

val, vlen)) != 0)

crypto/openssh/kex.c

514

val, vlen)) != 0)

crypto/openssh/kex.c

518

free(val);

crypto/openssh/log.c

125

return log_facilities[i].val;

crypto/openssh/log.c

135

if (log_facilities[i].val == facility)

crypto/openssh/log.c

148

return log_levels[i].val;

crypto/openssh/log.c

158

if (log_levels[i].val == level)

crypto/openssh/log.c

75

SyslogFacility val;

crypto/openssh/log.c

96

LogLevel val;

crypto/openssh/misc.c

114

int val;

crypto/openssh/misc.c

116

val = fcntl(fd, F_GETFL);

crypto/openssh/misc.c

117

if (val == -1) {

crypto/openssh/misc.c

121

if (val & O_NONBLOCK) {

crypto/openssh/misc.c

126

val |= O_NONBLOCK;

crypto/openssh/misc.c

127

if (fcntl(fd, F_SETFL, val) == -1) {

crypto/openssh/misc.c

1274

char *ret = NULL, *var, *varend, *val;

crypto/openssh/misc.c

1318

if ((val = getenv(var)) == NULL) {

crypto/openssh/misc.c

1322

debug3_f("expand ${%s} -> '%s'", var, val);

crypto/openssh/misc.c

1323

if ((r = sshbuf_put(buf, val, strlen(val))) !=0)

crypto/openssh/misc.c

138

int val;

crypto/openssh/misc.c

140

val = fcntl(fd, F_GETFL);

crypto/openssh/misc.c

141

if (val == -1) {

crypto/openssh/misc.c

145

if (!(val & O_NONBLOCK)) {

crypto/openssh/misc.c

150

val &= ~O_NONBLOCK;

crypto/openssh/misc.c

151

if (fcntl(fd, F_SETFL, val) == -1) {

crypto/openssh/misc.c

1878

int val;

crypto/openssh/misc.c

1887

val = (int)strtonum(cp, 0, 255, &errstr);

crypto/openssh/misc.c

1890

return val;

crypto/openssh/misc.c

2441

atoi_err(const char *nptr, int *val)

crypto/openssh/misc.c

2447

*val = strtonum(nptr, 0, INT_MAX, &errstr);

crypto/openssh/packet.c

2605

sshpkt_put_u8(struct ssh *ssh, u_char val)

crypto/openssh/packet.c

2607

return sshbuf_put_u8(ssh->state->outgoing_packet, val);

crypto/openssh/packet.c

2611

sshpkt_put_u32(struct ssh *ssh, u_int32_t val)

crypto/openssh/packet.c

2613

return sshbuf_put_u32(ssh->state->outgoing_packet, val);

crypto/openssh/packet.c

2617

sshpkt_put_u64(struct ssh *ssh, u_int64_t val)

crypto/openssh/packet.c

2619

return sshbuf_put_u64(ssh->state->outgoing_packet, val);

crypto/openssh/packet.h

187

int sshpkt_put_u8(struct ssh *ssh, u_char val);

crypto/openssh/packet.h

188

int sshpkt_put_u32(struct ssh *ssh, u_int32_t val);

crypto/openssh/packet.h

189

int sshpkt_put_u64(struct ssh *ssh, u_int64_t val);

crypto/openssh/readconf.c

3342

fmt_multistate_int(int val, const struct multistate *m)

crypto/openssh/readconf.c

3347

if (m[i].value == val)

crypto/openssh/readconf.c

3354

fmt_intarg(OpCodes code, int val)

crypto/openssh/readconf.c

3356

if (val == -1)

crypto/openssh/readconf.c

3360

return fmt_multistate_int(val, multistate_addressfamily);

crypto/openssh/readconf.c

3363

return fmt_multistate_int(val, multistate_yesnoask);

crypto/openssh/readconf.c

3365

return fmt_multistate_int(val, multistate_strict_hostkey);

crypto/openssh/readconf.c

3367

return fmt_multistate_int(val, multistate_controlmaster);

crypto/openssh/readconf.c

3369

return fmt_multistate_int(val, multistate_tunnel);

crypto/openssh/readconf.c

3371

return fmt_multistate_int(val, multistate_requesttty);

crypto/openssh/readconf.c

3373

return fmt_multistate_int(val, multistate_sessiontype);

crypto/openssh/readconf.c

3375

return fmt_multistate_int(val, multistate_canonicalizehostname);

crypto/openssh/readconf.c

3377

return fmt_multistate_int(val, multistate_yesnoaskconfirm);

crypto/openssh/readconf.c

3379

return fmt_multistate_int(val, multistate_pubkey_auth);

crypto/openssh/readconf.c

3381

return ssh_digest_alg_name(val);

crypto/openssh/readconf.c

3383

switch (val) {

crypto/openssh/readconf.c

3406

dump_cfg_int(OpCodes code, int val)

crypto/openssh/readconf.c

3409

if (val == 0) {

crypto/openssh/readconf.c

3412

} else if (val == SSH_KEYSTROKE_DEFAULT_INTERVAL_MS) {

crypto/openssh/readconf.c

3418

printf("%s %d\n", lookup_opcode_name(code), val);

crypto/openssh/readconf.c

3422

dump_cfg_fmtint(OpCodes code, int val)

crypto/openssh/readconf.c

3424

printf("%s %s\n", lookup_opcode_name(code), fmt_intarg(code, val));

crypto/openssh/readconf.c

3428

dump_cfg_string(OpCodes code, const char *val)

crypto/openssh/readconf.c

3430

if (val == NULL)

crypto/openssh/readconf.c

3432

printf("%s %s\n", lookup_opcode_name(code), val);

crypto/openssh/scp.c

1655

#define TYPE_OVERFLOW(type, val) \

crypto/openssh/scp.c

1656

((sizeof(type) == 4 && (val) > INT32_MAX) || \

crypto/openssh/scp.c

1657

(sizeof(type) == 8 && (val) > INT64_MAX) || \

crypto/openssh/servconf.c

2216

for (i = 0; tunmode_desc[i].val != -1; i++)

crypto/openssh/servconf.c

2218

value = tunmode_desc[i].val;

crypto/openssh/servconf.c

2983

fmt_multistate_int(int val, const struct multistate *m)

crypto/openssh/servconf.c

2988

if (m[i].value == val)

crypto/openssh/servconf.c

2995

fmt_intarg(ServerOpCodes code, int val)

crypto/openssh/servconf.c

2997

if (val == -1)

crypto/openssh/servconf.c

3001

return fmt_multistate_int(val, multistate_addressfamily);

crypto/openssh/servconf.c

3003

return fmt_multistate_int(val, multistate_permitrootlogin);

crypto/openssh/servconf.c

3005

return fmt_multistate_int(val, multistate_gatewayports);

crypto/openssh/servconf.c

3007

return fmt_multistate_int(val, multistate_compression);

crypto/openssh/servconf.c

3009

return fmt_multistate_int(val, multistate_tcpfwd);

crypto/openssh/servconf.c

3011

return fmt_multistate_int(val, multistate_tcpfwd);

crypto/openssh/servconf.c

3013

return fmt_multistate_int(val, multistate_ignore_rhosts);

crypto/openssh/servconf.c

3015

return ssh_digest_alg_name(val);

crypto/openssh/servconf.c

3017

switch (val) {

crypto/openssh/servconf.c

3029

dump_cfg_int(ServerOpCodes code, int val)

crypto/openssh/servconf.c

3031

if (code == sUnusedConnectionTimeout && val == 0) {

crypto/openssh/servconf.c

3035

printf("%s %d\n", lookup_opcode_name(code), val);

crypto/openssh/servconf.c

3039

dump_cfg_oct(ServerOpCodes code, int val)

crypto/openssh/servconf.c

3041

printf("%s 0%o\n", lookup_opcode_name(code), val);

crypto/openssh/servconf.c

3045

dump_cfg_fmtint(ServerOpCodes code, int val)

crypto/openssh/servconf.c

3047

printf("%s %s\n", lookup_opcode_name(code), fmt_intarg(code, val));

crypto/openssh/servconf.c

3051

dump_cfg_string(ServerOpCodes code, const char *val)

crypto/openssh/servconf.c

3054

val == NULL ? "none" : val);

crypto/openssh/servconf.c

3279

for (i = 0; tunmode_desc[i].val != -1; i++) {

crypto/openssh/servconf.c

3280

if (tunmode_desc[i].val == o->permit_tun) {

crypto/openssh/servconf.c

746

int val;

crypto/openssh/session.c

1010

child_set_env(&env, &envsize, s->env[i].name, s->env[i].val);

crypto/openssh/session.c

2067

char *name, *val;

crypto/openssh/session.c

2072

(r = sshpkt_get_cstring(ssh, &val, NULL)) != 0 ||

crypto/openssh/session.c

2084

debug2("Setting env %d: %s=%s", s->num_env, name, val);

crypto/openssh/session.c

2088

s->env[s->num_env].val = val;

crypto/openssh/session.c

2097

free(val);

crypto/openssh/session.c

2446

free(s->env[i].val);

crypto/openssh/session.h

62

char *val;

crypto/openssh/sftp-server.c

383

int val;

crypto/openssh/sftp-server.c

387

val = get_u32(handle);

crypto/openssh/sftp-server.c

388

if (handle_is_ok(val, HANDLE_FILE) ||

crypto/openssh/sftp-server.c

389

handle_is_ok(val, HANDLE_DIR))

crypto/openssh/sftp-server.c

390

return val;

crypto/openssh/ssh-keygen.c

136

char *val;

crypto/openssh/ssh-keygen.c

1634

cert_ext[ncert_ext].val = value == NULL ? NULL : xstrdup(value);

crypto/openssh/ssh-keygen.c

1651

if ((a->val == NULL) != (b->val == NULL))

crypto/openssh/ssh-keygen.c

1652

return (a->val == NULL) ? -1 : 1;

crypto/openssh/ssh-keygen.c

1653

if (a->val != NULL && (r = strcmp(a->val, b->val)) != 0)

crypto/openssh/ssh-keygen.c

1676

if (ext->val == NULL) {

crypto/openssh/ssh-keygen.c

1684

debug3_f("%s=%s", ext->key, ext->val);

crypto/openssh/ssh-keygen.c

1687

(r = sshbuf_put_cstring(b, ext->val)) != 0 ||

crypto/openssh/ssh-keygen.c

2016

char *val, *cp;

crypto/openssh/ssh-keygen.c

2050

val = opt + 14;

crypto/openssh/ssh-keygen.c

2051

if (*val == '\0')

crypto/openssh/ssh-keygen.c

2055

certflags_command = xstrdup(val);

crypto/openssh/ssh-keygen.c

2057

val = opt + 15;

crypto/openssh/ssh-keygen.c

2058

if (*val == '\0')

crypto/openssh/ssh-keygen.c

2062

if (addr_match_cidr_list(NULL, val) != 0)

crypto/openssh/ssh-keygen.c

2064

certflags_src_addr = xstrdup(val);

crypto/openssh/ssh-keygen.c

2067

val = xstrdup(strchr(opt, ':') + 1);

crypto/openssh/ssh-keygen.c

2068

if ((cp = strchr(val, '=')) != NULL)

crypto/openssh/ssh-keygen.c

2070

cert_ext_add(val, cp, iscrit);

crypto/openssh/ssh-keygen.c

2071

free(val);

crypto/openssh/ssh-pkcs11.c

1322

#define FILL_ATTR(attr, idx, typ, val, len) \

crypto/openssh/ssh-pkcs11.c

1323

{ (attr[idx]).type=(typ); (attr[idx]).pValue=(val); (attr[idx]).ulValueLen=len; idx++; }

crypto/openssh/ssh-pkcs11.c

312

CK_ATTRIBUTE_TYPE type, int *val)

crypto/openssh/ssh-pkcs11.c

320

*val = 0;

crypto/openssh/ssh-pkcs11.c

339

*val = flag != 0;

crypto/openssh/ssh-pkcs11.c

341

k11->provider->name, k11->slotidx, obj, type, *val);

crypto/openssh/sshbuf-getput-basic.c

189

const u_char *val;

crypto/openssh/sshbuf-getput-basic.c

197

if ((r = sshbuf_get_string_direct(buf, &val, &len)) < 0)

crypto/openssh/sshbuf-getput-basic.c

205

memcpy(*valp, val, len);

crypto/openssh/sshbuf-getput-basic.c

392

sshbuf_put_u64(struct sshbuf *buf, u_int64_t val)

crypto/openssh/sshbuf-getput-basic.c

399

POKE_U64(p, val);

crypto/openssh/sshbuf-getput-basic.c

404

sshbuf_put_u32(struct sshbuf *buf, u_int32_t val)

crypto/openssh/sshbuf-getput-basic.c

411

POKE_U32(p, val);

crypto/openssh/sshbuf-getput-basic.c

416

sshbuf_put_u16(struct sshbuf *buf, u_int16_t val)

crypto/openssh/sshbuf-getput-basic.c

423

POKE_U16(p, val);

crypto/openssh/sshbuf-getput-basic.c

428

sshbuf_put_u8(struct sshbuf *buf, u_char val)

crypto/openssh/sshbuf-getput-basic.c

435

p[0] = val;

crypto/openssh/sshbuf-getput-basic.c

454

sshbuf_poke_u64(struct sshbuf *buf, size_t offset, u_int64_t val)

crypto/openssh/sshbuf-getput-basic.c

461

POKE_U64(p, val);

crypto/openssh/sshbuf-getput-basic.c

466

sshbuf_poke_u32(struct sshbuf *buf, size_t offset, u_int32_t val)

crypto/openssh/sshbuf-getput-basic.c

473

POKE_U32(p, val);

crypto/openssh/sshbuf-getput-basic.c

478

sshbuf_poke_u16(struct sshbuf *buf, size_t offset, u_int16_t val)

crypto/openssh/sshbuf-getput-basic.c

485

POKE_U16(p, val);

crypto/openssh/sshbuf-getput-basic.c

490

sshbuf_poke_u8(struct sshbuf *buf, size_t offset, u_char val)

crypto/openssh/sshbuf-getput-basic.c

497

*p = val;

crypto/openssh/sshbuf.h

159

int sshbuf_put_u64(struct sshbuf *buf, u_int64_t val);

crypto/openssh/sshbuf.h

160

int sshbuf_put_u32(struct sshbuf *buf, u_int32_t val);

crypto/openssh/sshbuf.h

161

int sshbuf_put_u16(struct sshbuf *buf, u_int16_t val);

crypto/openssh/sshbuf.h

162

int sshbuf_put_u8(struct sshbuf *buf, u_char val);

crypto/openssh/sshbuf.h

178

int sshbuf_poke_u64(struct sshbuf *buf, size_t offset, u_int64_t val);

crypto/openssh/sshbuf.h

179

int sshbuf_poke_u32(struct sshbuf *buf, size_t offset, u_int32_t val);

crypto/openssh/sshbuf.h

180

int sshbuf_poke_u16(struct sshbuf *buf, size_t offset, u_int16_t val);

crypto/openssh/sshbuf.h

181

int sshbuf_poke_u8(struct sshbuf *buf, size_t offset, u_char val);

games/adventure/hdr.h

82

int val; /* word type &index (ktab) */

games/adventure/save.c

329

uint64_t val;

games/adventure/save.c

334

val = 0;

games/adventure/save.c

336

val = val ^ 0xbadc0ffee;

games/adventure/save.c

337

val = (val << 4) | (val >> 60);

games/adventure/save.c

338

val += udata[i] ^ 0xbeefU;

games/adventure/save.c

341

uval = (unsigned char *)&val;

games/adventure/save.c

345

if (valpos >= sizeof(val)) {

games/adventure/save.c

661

uint32_t val, sum;

games/adventure/save.c

697

val = *(save_ints[i]);

games/adventure/save.c

698

val = htonl(val);

games/adventure/save.c

699

if (savefile_cwrite(sf, &val, sizeof(val))) {

games/adventure/save.c

711

val = save_intarrays[i].ptr[j];

games/adventure/save.c

712

val = htonl(val);

games/adventure/save.c

713

if (savefile_cwrite(sf, &val, sizeof(val))) {

games/adventure/save.c

752

uint32_t val;

games/adventure/save.c

806

if (savefile_cread(sf, &val, sizeof(val))) {

games/adventure/save.c

810

val = ntohl(val);

games/adventure/save.c

811

*(save_ints[i]) = val;

games/adventure/save.c

820

if (savefile_cread(sf, &val, sizeof(val))) {

games/adventure/save.c

824

val = ntohl(val);

games/adventure/save.c

825

save_intarrays[i].ptr[j] = val;

games/adventure/vocab.c

143

if (h->val) /* already got an entry? */

games/adventure/vocab.c

145

h->val = value;

games/adventure/vocab.c

157

if (h->val == 0)

games/adventure/vocab.c

165

return (h->val);

games/adventure/vocab.c

167

if (h->val == 0)

games/adventure/vocab.c

173

if (h->val / 1000 != type)

games/adventure/vocab.c

175

return (h->val % 1000);

games/adventure/vocab.c

198

if (h->val == 0) {

games/backgammon/common_source/odds.c

36

odds(int r1, int r2, int val)

games/backgammon/common_source/odds.c

49

table[i][r1] += val;

games/backgammon/common_source/odds.c

50

table[r1][i] += val;

games/backgammon/common_source/odds.c

53

table[r2][r1] += val;

games/backgammon/common_source/odds.c

54

table[r1][r2] += val;

games/bcd/bcd.c

284

unsigned int val = 0;

games/bcd/bcd.c

287

val |= 1 << (11 - i);

games/bcd/bcd.c

290

if (holes[i] == val && holes[i]) {

games/factor/factor.c

100

BIGNUM *val;

games/factor/factor.c

105

val = BN_new();

games/factor/factor.c

106

if (val == NULL)

games/factor/factor.c

134

if (BN_dec2bn(&val, buf) == 0 &&

games/factor/factor.c

135

BN_hex2bn(&val, buf) == 0)

games/factor/factor.c

137

pr_fact(val);

games/factor/factor.c

144

if (BN_dec2bn(&val, argv[0]) == 0 &&

games/factor/factor.c

145

BN_hex2bn(&val, argv[0]) == 0)

games/factor/factor.c

147

pr_fact(val);

games/factor/factor.c

162

pr_fact(BIGNUM *val)

games/factor/factor.c

167

if (BN_is_zero(val)) /* Historical practice; 0 just exits. */

games/factor/factor.c

169

if (BN_is_one(val)) {

games/factor/factor.c

178

BN_print_fp(stdout, val);

games/factor/factor.c

180

BN_print_dec_fp(stdout, val);

games/factor/factor.c

182

for (fact = &prime[0]; !BN_is_one(val); ++fact) {

games/factor/factor.c

185

if (BN_mod_word(val, (BN_ULONG)*fact) == 0)

games/factor/factor.c

197

if (BN_cmp(bnfact, val) > 0)

games/factor/factor.c

198

pr_print(val);

games/factor/factor.c

200

pollard_pminus1(val);

games/factor/factor.c

202

pr_print(val);

games/factor/factor.c

210

BN_div_word(val, (BN_ULONG)*fact);

games/factor/factor.c

211

} while (BN_mod_word(val, (BN_ULONG)*fact) == 0);

games/factor/factor.c

220

pr_print(BIGNUM *val)

games/factor/factor.c

224

BN_print_fp(stdout, val);

games/factor/factor.c

227

BN_print_dec_fp(stdout, val);

games/factor/factor.c

242

pollard_pminus1(BIGNUM *val)

games/factor/factor.c

255

BN_mod_exp(base, base, i, val, ctx);

games/factor/factor.c

259

BN_gcd(x, x, val, ctx);

games/factor/factor.c

268

BN_div(num, NULL, val, x, ctx);

games/factor/factor.c

277

BN_copy(val, num);

games/gomoku/makemove.c

109

val = weight[5 - cp->c.a - cp->c.b];

games/gomoku/makemove.c

111

val = 0;

games/gomoku/makemove.c

114

val += weight[5 - cp->c.a - cp->c.b];

games/gomoku/makemove.c

124

sp->s_wval -= val;

games/gomoku/makemove.c

133

sp->s_wval -= val;

games/gomoku/makemove.c

154

val = weight[n];

games/gomoku/makemove.c

158

sp->s_wval += val;

games/gomoku/makemove.c

65

int space, val, bmask;

games/monop/prop.c

58

int val;

games/monop/prop.c

66

val = value(op->sqr);

games/monop/prop.c

68

for (tp = *head; tp && value(tp->sqr) < val; tp = tp->next)

games/monop/prop.c

69

if (val == value(tp->sqr)) {

games/number/number.c

217

int val, rval;

games/number/number.c

229

val = (p[1] - '0') + (p[0] - '0') * 10;

games/number/number.c

230

if (val) {

games/number/number.c

233

if (val < 20)

games/number/number.c

234

printf("%s", name1[val]);

games/number/number.c

236

printf("%s", name2[val / 10]);

games/number/number.c

237

if (val % 10)

games/number/number.c

238

printf("-%s", name1[val % 10]);

games/primes/primes.c

165

ubig val;

games/primes/primes.c

180

val = strtoul(buf, &p, 0);

games/primes/primes.c

185

return (val);

games/rogue/score.c

398

short row = 2, val;

games/rogue/score.c

409

val = get_value(obj);

games/rogue/score.c

410

rogue.gold += val;

games/rogue/score.c

413

sprintf(buf, "%5d ", val);

games/rogue/score.c

431

int val;

games/rogue/score.c

433

val = 0;

games/rogue/score.c

438

val = id_weapons[wc].value;

games/rogue/score.c

441

val *= obj->quantity;

games/rogue/score.c

443

val += (obj->d_enchant * 85);

games/rogue/score.c

444

val += (obj->hit_enchant * 85);

games/rogue/score.c

447

val = id_armors[wc].value;

games/rogue/score.c

448

val += (obj->d_enchant * 75);

games/rogue/score.c

450

val += 200;

games/rogue/score.c

454

val = id_wands[wc].value * (obj->class + 1);

games/rogue/score.c

457

val = id_scrolls[wc].value * obj->quantity;

games/rogue/score.c

460

val = id_potions[wc].value * obj->quantity;

games/rogue/score.c

463

val = 5000;

games/rogue/score.c

466

val = id_rings[wc].value * (obj->class + 1);

games/rogue/score.c

469

if (val <= 0) {

games/rogue/score.c

470

val = 10;

games/rogue/score.c

472

return(val);

games/sail/array.h

148

void ARRAY##_set(struct ARRAY *a, unsigned index_, T *val); \

games/sail/array.h

150

int ARRAY##_add(struct ARRAY *a, T *val, unsigned *index_ret); \

games/sail/array.h

201

ARRAY##_set(struct ARRAY *a, unsigned index_, T *val) \

games/sail/array.h

203

array_set(&a->arr, index_, (void *)val); \

games/sail/array.h

213

ARRAY##_add(struct ARRAY *a, T *val, unsigned *ret) \

games/sail/array.h

215

return array_add(&a->arr, (void *)val, ret); \

games/sail/array.h

56

void array_set(const struct array *, unsigned index_, void *val);

games/sail/array.h

58

int array_add(struct array *, void *val, unsigned *index_ret);

games/sail/array.h

83

array_set(const struct array *a, unsigned index_, void *val)

games/sail/array.h

86

a->v[index_] = val;

games/sail/array.h

90

array_add(struct array *a, void *val, unsigned *index_ret)

games/sail/array.h

96

a->v[index_] = val;

include/getopt.h

64

int val;

lib/libc/citrus/citrus_db.c

217

uint16_t val;

lib/libc/citrus/citrus_db.c

227

memcpy(&val, _region_head(&r), 2);

lib/libc/citrus/citrus_db.c

228

*rval = be16toh(val);

lib/libc/citrus/citrus_db.c

239

uint32_t val;

lib/libc/citrus/citrus_db.c

250

memcpy(&val, _region_head(&r), 4);

lib/libc/citrus/citrus_db.c

251

*rval = be32toh(val);

lib/libc/citrus/citrus_db_factory.c

152

const char *key, uint8_t val)

lib/libc/citrus/citrus_db_factory.c

160

*p = val;

lib/libc/citrus/citrus_db_factory.c

167

const char *key, uint16_t val)

lib/libc/citrus/citrus_db_factory.c

175

*p = htons(val);

lib/libc/citrus/citrus_db_factory.c

182

const char *key, uint32_t val)

lib/libc/citrus/citrus_db_factory.c

190

*p = htonl(val);

lib/libc/citrus/citrus_db_factory.c

223

put8(struct _region *r, size_t *rofs, uint8_t val)

lib/libc/citrus/citrus_db_factory.c

226

*(uint8_t *)_region_offset(r, *rofs) = val;

lib/libc/citrus/citrus_db_factory.c

231

put32(struct _region *r, size_t *rofs, uint32_t val)

lib/libc/citrus/citrus_db_factory.c

234

val = htonl(val);

lib/libc/citrus/citrus_db_factory.c

235

memcpy(_region_offset(r, *rofs), &val, 4);

lib/libc/citrus/citrus_pivot_factory.c

111

uint32_t val;

lib/libc/citrus/citrus_pivot_factory.c

143

val = strtoul(data, &ep, 0);

lib/libc/citrus/citrus_pivot_factory.c

152

return (_db_factory_add32_by_s(se->se_df, key2, val));

lib/libc/citrus/citrus_region.h

87

uint16_t val;

lib/libc/citrus/citrus_region.h

89

memcpy(&val, _citrus_region_offset(r, pos), (size_t)2);

lib/libc/citrus/citrus_region.h

90

return (val);

lib/libc/citrus/citrus_region.h

96

uint32_t val;

lib/libc/citrus/citrus_region.h

98

memcpy(&val, _citrus_region_offset(r, pos), (size_t)4);

lib/libc/citrus/citrus_region.h

99

return (val);

lib/libc/db/hash/hash.c

567

hash_access(HTAB *hashp, ACTION action, DBT *key, DBT *val)

lib/libc/db/hash/hash.c

645

if (__addel(hashp, rbufp, key, val)) {

lib/libc/db/hash/hash.c

667

if (__big_return(hashp, rbufp, ndx, val, 0))

lib/libc/db/hash/hash.c

670

val->data = (unsigned char *)rbufp->page +

lib/libc/db/hash/hash.c

672

val->size = bp[ndx] - bp[ndx + 1];

lib/libc/db/hash/hash.c

677

(__addel(hashp, rbufp, key, val))) {

lib/libc/db/hash/hash_bigkey.c

128

if (space == val_size && val_size == val->size)

lib/libc/db/hash/hash_bigkey.c

156

if (space == val_size && val_size == val->size)

lib/libc/db/hash/hash_bigkey.c

356

__big_return(HTAB *hashp, BUFHEAD *bufp, int ndx, DBT *val, int set_current)

lib/libc/db/hash/hash_bigkey.c

401

val->data = (unsigned char *)tp + off;

lib/libc/db/hash/hash_bigkey.c

402

val->size = bp[1] - off;

lib/libc/db/hash/hash_bigkey.c

425

val->size = (size_t)collect_data(hashp, bufp, (int)len, set_current);

lib/libc/db/hash/hash_bigkey.c

426

if (val->size == (size_t)-1)

lib/libc/db/hash/hash_bigkey.c

434

val->data = (unsigned char *)hashp->tmp_buf;

lib/libc/db/hash/hash_bigkey.c

495

__big_keydata(HTAB *hashp, BUFHEAD *bufp, DBT *key, DBT *val, int set)

lib/libc/db/hash/hash_bigkey.c

497

key->size = (size_t)collect_key(hashp, bufp, 0, val, set);

lib/libc/db/hash/hash_bigkey.c

509

collect_key(HTAB *hashp, BUFHEAD *bufp, int len, DBT *val, int set)

lib/libc/db/hash/hash_bigkey.c

527

if (__big_return(hashp, bufp, 1, val, set))

lib/libc/db/hash/hash_bigkey.c

532

collect_key(hashp, xbp, totlen, val, set)) < 1))

lib/libc/db/hash/hash_bigkey.c

558

DBT key, val;

lib/libc/db/hash/hash_bigkey.c

565

if (__big_keydata(hashp, big_keyp, &key, &val, 0))

lib/libc/db/hash/hash_bigkey.c

83

__big_insert(HTAB *hashp, BUFHEAD *bufp, const DBT *key, const DBT *val)

lib/libc/db/hash/hash_bigkey.c

96

val_data = (char *)val->data;

lib/libc/db/hash/hash_bigkey.c

97

val_size = val->size;

lib/libc/db/hash/hash_page.c

107

off -= val->size;

lib/libc/db/hash/hash_page.c

108

memmove(p + off, val->data, val->size);

lib/libc/db/hash/hash_page.c

185

DBT key, val;

lib/libc/db/hash/hash_page.c

233

val.data = (unsigned char *)op + ino[n + 1];

lib/libc/db/hash/hash_page.c

234

val.size = ino[n] - ino[n + 1];

lib/libc/db/hash/hash_page.c

235

putpair(np, &key, &val);

lib/libc/db/hash/hash_page.c

287

DBT key, val;

lib/libc/db/hash/hash_page.c

349

val.data = (unsigned char *)cino + ino[n + 1];

lib/libc/db/hash/hash_page.c

350

val.size = ino[n] - ino[n + 1];

lib/libc/db/hash/hash_page.c

355

if (PAIRFITS(op, (&key), (&val)))

lib/libc/db/hash/hash_page.c

356

putpair((char *)op, &key, &val);

lib/libc/db/hash/hash_page.c

363

putpair((char *)op, &key, &val);

lib/libc/db/hash/hash_page.c

368

if (PAIRFITS(np, (&key), (&val)))

lib/libc/db/hash/hash_page.c

369

putpair((char *)np, &key, &val);

lib/libc/db/hash/hash_page.c

376

putpair((char *)np, &key, &val);

lib/libc/db/hash/hash_page.c

395

__addel(HTAB *hashp, BUFHEAD *bufp, const DBT *key, const DBT *val)

lib/libc/db/hash/hash_page.c

419

FREESPACE(bp) >= PAIRSIZE(key, val)) {

lib/libc/db/hash/hash_page.c

420

squeeze_key(bp, key, val);

lib/libc/db/hash/hash_page.c

430

if (PAIRFITS(bp, key, val))

lib/libc/db/hash/hash_page.c

431

putpair(bufp->page, key, val);

lib/libc/db/hash/hash_page.c

439

if (PAIRFITS(sop, key, val))

lib/libc/db/hash/hash_page.c

440

putpair((char *)sop, key, val);

lib/libc/db/hash/hash_page.c

442

if (__big_insert(hashp, bufp, key, val))

lib/libc/db/hash/hash_page.c

876

squeeze_key(uint16_t *sp, const DBT *key, const DBT *val)

lib/libc/db/hash/hash_page.c

890

off -= val->size;

lib/libc/db/hash/hash_page.c

892

memmove(p + off, val->data, val->size);

lib/libc/db/hash/hash_page.c

896

FREESPACE(sp) = free_space - PAIRSIZE(key, val);

lib/libc/db/hash/hash_page.c

93

putpair(char *p, const DBT *key, const DBT *val)

lib/libc/gen/arc4random.c

222

_rs_random_u32(uint32_t *val)

lib/libc/gen/arc4random.c

226

_rs_stir_if_needed(sizeof(*val));

lib/libc/gen/arc4random.c

227

if (rs->rs_have < sizeof(*val))

lib/libc/gen/arc4random.c

230

memcpy(val, keystream, sizeof(*val));

lib/libc/gen/arc4random.c

231

memset(keystream, 0, sizeof(*val));

lib/libc/gen/arc4random.c

232

rs->rs_have -= sizeof(*val);

lib/libc/gen/arc4random.c

238

uint32_t val;

lib/libc/gen/arc4random.c

241

_rs_random_u32(&val);

lib/libc/gen/arc4random.c

243

return val;

lib/libc/inet/inet_addr.c

104

u_long val;

lib/libc/inet/inet_addr.c

120

val = 0; base = 10; digit = 0;

lib/libc/inet/inet_addr.c

134

val = (val * base) + (c - '0');

lib/libc/inet/inet_addr.c

139

val = (val << 4) |

lib/libc/inet/inet_addr.c

153

if (pp >= parts + 3 || val > 0xffU)

lib/libc/inet/inet_addr.c

155

*pp++ = val;

lib/libc/inet/inet_addr.c

180

if (val > 0xffffffU)

lib/libc/inet/inet_addr.c

182

val |= parts[0] << 24;

lib/libc/inet/inet_addr.c

186

if (val > 0xffffU)

lib/libc/inet/inet_addr.c

188

val |= (parts[0] << 24) | (parts[1] << 16);

lib/libc/inet/inet_addr.c

192

if (val > 0xffU)

lib/libc/inet/inet_addr.c

194

val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);

lib/libc/inet/inet_addr.c

198

addr->s_addr = htonl(val);

lib/libc/inet/inet_addr.c

88

struct in_addr val;

lib/libc/inet/inet_addr.c

90

if (inet_aton(cp, &val))

lib/libc/inet/inet_addr.c

91

return (val.s_addr);

lib/libc/inet/inet_cidr_pton.c

150

u_int val;

lib/libc/inet/inet_cidr_pton.c

162

val = 0;

lib/libc/inet/inet_cidr_pton.c

170

val <<= 4;

lib/libc/inet/inet_cidr_pton.c

171

val |= (pch - xdigits);

lib/libc/inet/inet_cidr_pton.c

172

if (val > 0xffff)

lib/libc/inet/inet_cidr_pton.c

189

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_cidr_pton.c

190

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_cidr_pton.c

192

val = 0;

lib/libc/inet/inet_cidr_pton.c

212

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_cidr_pton.c

213

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_net_pton.c

185

int val;

lib/libc/inet/inet_net_pton.c

188

val = 0;

lib/libc/inet/inet_net_pton.c

195

if (n++ != 0 && val == 0) /*%< no leading zeros */

lib/libc/inet/inet_net_pton.c

197

val *= 10;

lib/libc/inet/inet_net_pton.c

198

val += (pch - digits);

lib/libc/inet/inet_net_pton.c

199

if (val > 128) /*%< range */

lib/libc/inet/inet_net_pton.c

207

*bitsp = val;

lib/libc/inet/inet_net_pton.c

216

u_int val;

lib/libc/inet/inet_net_pton.c

219

val = 0;

lib/libc/inet/inet_net_pton.c

226

if (n++ != 0 && val == 0) /*%< no leading zeros */

lib/libc/inet/inet_net_pton.c

228

val *= 10;

lib/libc/inet/inet_net_pton.c

229

val += (pch - digits);

lib/libc/inet/inet_net_pton.c

230

if (val > 255) /*%< range */

lib/libc/inet/inet_net_pton.c

237

*dst++ = val;

lib/libc/inet/inet_net_pton.c

240

val = 0;

lib/libc/inet/inet_net_pton.c

250

*dst++ = val;

lib/libc/inet/inet_net_pton.c

261

u_int val;

lib/libc/inet/inet_net_pton.c

277

val = 0;

lib/libc/inet/inet_net_pton.c

287

val <<= 4;

lib/libc/inet/inet_net_pton.c

288

val |= (pch - xdigits);

lib/libc/inet/inet_net_pton.c

305

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_net_pton.c

306

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_net_pton.c

309

val = 0;

lib/libc/inet/inet_net_pton.c

326

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_net_pton.c

327

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_network.c

51

in_addr_t val, base, n;

lib/libc/inet/inet_network.c

56

val = 0; base = 10; digit = 0;

lib/libc/inet/inet_network.c

65

val = (val * base) + (c - '0');

lib/libc/inet/inet_network.c

71

val = (val << 4) +

lib/libc/inet/inet_network.c

81

if (pp >= parts + 4 || val > 0xffU)

lib/libc/inet/inet_network.c

84

*pp++ = val, cp++;

lib/libc/inet/inet_network.c

89

*pp++ = val;

lib/libc/inet/inet_network.c

93

for (val = 0, i = 0; i < n; i++) {

lib/libc/inet/inet_network.c

94

val <<= 8;

lib/libc/inet/inet_network.c

95

val |= parts[i] & 0xff;

lib/libc/inet/inet_network.c

97

return (val);

lib/libc/inet/inet_pton.c

136

u_int val;

lib/libc/inet/inet_pton.c

147

val = 0;

lib/libc/inet/inet_pton.c

154

val <<= 4;

lib/libc/inet/inet_pton.c

155

val |= (pch - xdigits);

lib/libc/inet/inet_pton.c

172

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_pton.c

173

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_pton.c

175

val = 0;

lib/libc/inet/inet_pton.c

189

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_pton.c

190

*tp++ = (u_char) val & 0xff;

lib/libc/locale/collate.c

271

compar = key - p->val;

lib/libc/locale/collate.c

518

uint32_t val = (uint32_t)table->info->pri_count[pass];

lib/libc/locale/collate.c

521

while (val) {

lib/libc/locale/collate.c

524

val >>= XFRM_SHIFT;

lib/libc/locale/collate.h

106

int32_t val;

lib/libc/locale/wcstod.c

110

return (val);

lib/libc/locale/wcstod.c

55

double val;

lib/libc/locale/wcstod.c

94

val = strtod_l(buf, &end, locale);

lib/libc/locale/wcstof.c

49

float val;

lib/libc/locale/wcstof.c

77

val = strtof_l(buf, &end, locale);

lib/libc/locale/wcstof.c

87

return (val);

lib/libc/locale/wcstold.c

49

long double val;

lib/libc/locale/wcstold.c

77

val = strtold_l(buf, &end, locale);

lib/libc/locale/wcstold.c

87

return (val);

lib/libc/locale/xlocale_private.h

170

xlocale_retain(void *val)

lib/libc/locale/xlocale_private.h

172

struct xlocale_refcounted *obj = val;

lib/libc/locale/xlocale_private.h

174

return (val);

lib/libc/locale/xlocale_private.h

181

xlocale_release(void *val)

lib/libc/locale/xlocale_private.h

183

struct xlocale_refcounted *obj = val;

lib/libc/net/ip6opt.c

480

inet6_opt_set_val(void *databuf, int offset, void *val, socklen_t vallen)

lib/libc/net/ip6opt.c

483

memcpy((u_int8_t *)databuf + offset, val, vallen);

lib/libc/net/ip6opt.c

577

inet6_opt_get_val(void *databuf, int offset, void *val, socklen_t vallen)

lib/libc/net/ip6opt.c

581

memcpy(val, (u_int8_t *)databuf + offset, vallen);

lib/libc/resolv/res_debug.c

740

unsigned long val;

lib/libc/resolv/res_debug.c

746

val = mantissa * poweroften[exponent];

lib/libc/resolv/res_debug.c

748

(void) sprintf(retbuf, "%lu.%.2lu", val/100, val%100);

lib/libc/rpc/netnamer.c

122

strncpy(val, val1, 1024);

lib/libc/rpc/netnamer.c

123

val[vallen] = 0;

lib/libc/rpc/netnamer.c

132

if (sscanf(val, "%ld", &luid) != 1)

lib/libc/rpc/netnamer.c

194

char *val;

lib/libc/rpc/netnamer.c

200

val = valbuf;

lib/libc/rpc/netnamer.c

201

if ((*val == '0') && (val[1] == ':')) {

lib/libc/rpc/netnamer.c

202

strncpy(hostname, val + 2, hostlen);

lib/libc/rpc/netnamer.c

206

val = strchr(netname, '.');

lib/libc/rpc/netnamer.c

207

if (val == NULL)

lib/libc/rpc/netnamer.c

209

if (strncmp(netname, OPSYS, (val - netname)))

lib/libc/rpc/netnamer.c

211

val++;

lib/libc/rpc/netnamer.c

212

val2 = strchr(val, '@');

lib/libc/rpc/netnamer.c

215

vallen = val2 - val;

lib/libc/rpc/netnamer.c

218

strncpy(hostname, val, vallen);

lib/libc/rpc/netnamer.c

82

char val[1024];

lib/libc/rpc/netnamer.c

88

if (getnetid(netname, val)) {

lib/libc/rpc/netnamer.c

89

char *res = val;

lib/libc/rpc/svc.c

655

int val;

lib/libc/rpc/svc.c

659

val = *(int *)arg;

lib/libc/rpc/svc.c

660

if (val <= 0)

lib/libc/rpc/svc.c

662

__svc_maxrec = val;

lib/libc/stdio/findfp.c

87

#define SET_GLUE_PTR(ptr, val) atomic_set_rel_ptr(&(ptr), (uintptr_t)(val))

lib/libc/stdio/findfp.c

89

#define SET_GLUE_PTR(ptr, val) ptr = val

lib/libc/stdio/printfcommon.h

165

__ultoa(u_long val, CHAR *endp, int base, int octzero, const char *xdigs)

lib/libc/stdio/printfcommon.h

176

if (val < 10) { /* many numbers are 1 digit */

lib/libc/stdio/printfcommon.h

177

*--cp = to_char(val);

lib/libc/stdio/printfcommon.h

186

if (val > LONG_MAX) {

lib/libc/stdio/printfcommon.h

187

*--cp = to_char(val % 10);

lib/libc/stdio/printfcommon.h

188

sval = val / 10;

lib/libc/stdio/printfcommon.h

190

sval = val;

lib/libc/stdio/printfcommon.h

199

*--cp = to_char(val & 7);

lib/libc/stdio/printfcommon.h

200

val >>= 3;

lib/libc/stdio/printfcommon.h

201

} while (val);

lib/libc/stdio/printfcommon.h

208

*--cp = xdigs[val & 15];

lib/libc/stdio/printfcommon.h

209

val >>= 4;

lib/libc/stdio/printfcommon.h

210

} while (val);

lib/libc/stdio/printfcommon.h

221

__ujtoa(uintmax_t val, CHAR *endp, int base, int octzero, const char *xdigs)

lib/libc/stdio/printfcommon.h

228

if (val <= ULONG_MAX)

lib/libc/stdio/printfcommon.h

229

return (__ultoa((u_long)val, endp, base, octzero, xdigs));

lib/libc/stdio/printfcommon.h

232

if (val > INTMAX_MAX) {

lib/libc/stdio/printfcommon.h

233

*--cp = to_char(val % 10);

lib/libc/stdio/printfcommon.h

234

sval = val / 10;

lib/libc/stdio/printfcommon.h

236

sval = val;

lib/libc/stdio/printfcommon.h

245

*--cp = to_char(val & 7);

lib/libc/stdio/printfcommon.h

246

val >>= 3;

lib/libc/stdio/printfcommon.h

247

} while (val);

lib/libc/stdio/printfcommon.h

254

*--cp = xdigs[val & 15];

lib/libc/stdio/printfcommon.h

255

val >>= 4;

lib/libc/stdio/printfcommon.h

256

} while (val);

lib/libc/stdio/vfprintf.c

423

#define GETASTER(val) \

lib/libc/stdio/vfprintf.c

440

val = GETARG (int); \

lib/libc/stdio/vfprintf.c

444

val = GETARG (int); \

lib/libc/stdio/vfwprintf.c

500

#define GETASTER(val) \

lib/libc/stdio/vfwprintf.c

517

val = GETARG (int); \

lib/libc/stdio/vfwprintf.c

521

val = GETARG (int); \

lib/libc/stdio/xprintf_int.c

101

if (val < 10) { /* many numbers are 1 digit */

lib/libc/stdio/xprintf_int.c

102

*--cp = to_char(val);

lib/libc/stdio/xprintf_int.c

112

if (val > LONG_MAX) {

lib/libc/stdio/xprintf_int.c

113

*--cp = to_char(val % 10);

lib/libc/stdio/xprintf_int.c

115

sval = val / 10;

lib/libc/stdio/xprintf_int.c

117

sval = val;

lib/libc/stdio/xprintf_int.c

144

*--cp = to_char(val & 7);

lib/libc/stdio/xprintf_int.c

145

val >>= 3;

lib/libc/stdio/xprintf_int.c

146

} while (val);

lib/libc/stdio/xprintf_int.c

151

*--cp = xdigs[val & 15];

lib/libc/stdio/xprintf_int.c

152

val >>= 4;

lib/libc/stdio/xprintf_int.c

153

} while (val);

lib/libc/stdio/xprintf_int.c

165

__ujtoa(uintmax_t val, char *endp, int base, const char *xdigs,

lib/libc/stdio/xprintf_int.c

174

if (val < 10) {

lib/libc/stdio/xprintf_int.c

175

*--cp = to_char(val % 10);

lib/libc/stdio/xprintf_int.c

179

if (val > INTMAX_MAX) {

lib/libc/stdio/xprintf_int.c

180

*--cp = to_char(val % 10);

lib/libc/stdio/xprintf_int.c

182

sval = val / 10;

lib/libc/stdio/xprintf_int.c

184

sval = val;

lib/libc/stdio/xprintf_int.c

211

*--cp = to_char(val & 7);

lib/libc/stdio/xprintf_int.c

212

val >>= 3;

lib/libc/stdio/xprintf_int.c

213

} while (val);

lib/libc/stdio/xprintf_int.c

218

*--cp = xdigs[val & 15];

lib/libc/stdio/xprintf_int.c

219

val >>= 4;

lib/libc/stdio/xprintf_int.c

220

} while (val);

lib/libc/stdio/xprintf_int.c

88

__ultoa(u_long val, char *endp, int base, const char *xdigs,

lib/libc/stdlib/getopt_long.c

259

long_options[i].val != long_options[match].val)

lib/libc/stdlib/getopt_long.c

288

optopt = long_options[match].val;

lib/libc/stdlib/getopt_long.c

325

optopt = long_options[match].val;

lib/libc/stdlib/getopt_long.c

348

*long_options[match].flag = long_options[match].val;

lib/libc/stdlib/getopt_long.c

351

return (long_options[match].val);

lib/libc/stdlib/rand.c

76

u_long val = (u_long) *ctx;

lib/libc/stdlib/rand.c

77

int r = do_rand(&val);

lib/libc/stdlib/rand.c

79

*ctx = (unsigned int) val;

lib/libc/stdlib/strsuftoll.c

108

__strsuftollx(const char *desc, const char *val,

lib/libc/stdlib/strsuftoll.c

115

_DIAGASSERT(val != NULL);

lib/libc/stdlib/strsuftoll.c

123

while (isspace((unsigned char)*val)) /* Skip leading space */

lib/libc/stdlib/strsuftoll.c

124

val++;

lib/libc/stdlib/strsuftoll.c

127

num = strtoll(val, &expr, 10);

lib/libc/stdlib/strsuftoll.c

131

if (expr == val) /* No digits */

lib/libc/stdlib/strsuftoll.c

198

snprintf(ebuf, ebuflen, "%s `%s': illegal number", desc, val);

lib/libc/stdlib/strsuftoll.c

218

strsuftollx(const char *desc, const char *val,

lib/libc/stdlib/strsuftoll.c

221

return __strsuftollx(desc, val, min, max, ebuf, ebuflen, 0);

lib/libc/stdlib/strsuftoll.c

90

strsuftoll(const char *desc, const char *val,

lib/libc/stdlib/strsuftoll.c

96

result = strsuftollx(desc, val, min, max, errbuf, sizeof(errbuf));

lib/libc/sysvipc/lock.c

103

umtx_sleep(val, *val, SYSV_TIMEOUT);

lib/libc/sysvipc/lock.c

108

sysv_cond_signal(int *val)

lib/libc/sysvipc/lock.c

110

return (umtx_wakeup(val, 0));

lib/libc/sysvipc/lock.c

96

sysv_cond_wait(int *val, struct sysv_mutex *mutex)

lib/libc/sysvipc/sem.c

456

semptr->semval = arg->val;

lib/libc/yp/xdryp.c

65

char *key, *val;

lib/libc/yp/xdryp.c

80

status = out.ypresp_all_u.val.stat;

lib/libc/yp/xdryp.c

83

key = (char *)malloc(out.ypresp_all_u.val.key.keydat_len + 1);

lib/libc/yp/xdryp.c

84

bcopy(out.ypresp_all_u.val.key.keydat_val, key,

lib/libc/yp/xdryp.c

85

out.ypresp_all_u.val.key.keydat_len);

lib/libc/yp/xdryp.c

86

key[out.ypresp_all_u.val.key.keydat_len] = '\0';

lib/libc/yp/xdryp.c

87

val = (char *)malloc(out.ypresp_all_u.val.val.valdat_len + 1);

lib/libc/yp/xdryp.c

88

bcopy(out.ypresp_all_u.val.val.valdat_val, val,

lib/libc/yp/xdryp.c

89

out.ypresp_all_u.val.val.valdat_len);

lib/libc/yp/xdryp.c

90

val[out.ypresp_all_u.val.val.valdat_len] = '\0';

lib/libc/yp/xdryp.c

94

key, out.ypresp_all_u.val.key.keydat_len,

lib/libc/yp/xdryp.c

95

val, out.ypresp_all_u.val.val.valdat_len,

lib/libc/yp/xdryp.c

99

free(val);

lib/libc/yp/yplib.c

168

valdat *val)

lib/libc/yp/yplib.c

215

new->ypc_val.valdat_val = malloc(val->valdat_len);

lib/libc/yp/yplib.c

225

new->ypc_val.valdat_len = val->valdat_len;

lib/libc/yp/yplib.c

227

bcopy(val->valdat_val, new->ypc_val.valdat_val, val->valdat_len);

lib/libc/yp/yplib.c

239

valdat *val)

lib/libc/yp/yplib.c

258

val->valdat_len = c->ypc_val.valdat_len;

lib/libc/yp/yplib.c

259

val->valdat_val = c->ypc_val.valdat_val;

lib/libc/yp/yplib.c

688

if (ypmatch_cache_lookup(ysd, yprk.map, &yprk.key, &yprv.val) == TRUE) {

lib/libc/yp/yplib.c

693

*outvallen = yprv.val.valdat_len;

lib/libc/yp/yplib.c

695

bcopy(yprv.val.valdat_val, *outval, *outvallen);

lib/libc/yp/yplib.c

723

*outvallen = yprv.val.valdat_len;

lib/libc/yp/yplib.c

725

bcopy(yprv.val.valdat_val, *outval, *outvallen);

lib/libc/yp/yplib.c

728

ypmatch_cache_insert(ysd, yprk.map, &yprk.key, &yprv.val);

lib/libc/yp/yplib.c

805

*outvallen = yprkv.val.valdat_len;

lib/libc/yp/yplib.c

807

bcopy(yprkv.val.valdat_val, *outval, *outvallen);

lib/libc/yp/yplib.c

865

*outvallen = yprkv.val.valdat_len;

lib/libc/yp/yplib.c

867

bcopy(yprkv.val.valdat_val, *outval, *outvallen);

lib/libcam/scsi_cmdparse.c

541

u_char val;

lib/libcam/scsi_cmdparse.c

550

val = 0;

lib/libcam/scsi_cmdparse.c

585

val |= (value << (8 - shift));

lib/libcam/scsi_cmdparse.c

589

buff[ind++] = val;

lib/libcam/scsi_cmdparse.c

590

val = 0;

lib/libcam/scsi_cmdparse.c

597

buff[ind++] = val;

lib/libcam/scsi_cmdparse.c

598

val = 0;

lib/libcam/scsi_cmdparse.c

642

buff[ind++] = val;

lib/libcompat/4.3/rexec.c

52

#define __set_errno(val) errno = (val)

lib/libcuse/cuse_lib.c

653

cuse_set_local(int val)

lib/libcuse/cuse_lib.c

661

pe->is_local = val;

lib/libdevattr/devattr.c

207

_udev_dict_set_int(prop_dictionary_t dict, const char *key, int64_t val)

lib/libdevattr/devattr.c

211

pn = prop_number_create_integer(val);

lib/libdevattr/devattr.c

225

_udev_dict_set_uint(prop_dictionary_t dict, const char *key, uint64_t val)

lib/libdevattr/devattr.c

229

pn = prop_number_create_unsigned_integer(val);

lib/libdevattr/devattr.h

159

int _udev_dict_set_int(prop_dictionary_t dict, const char *key, int64_t val);

lib/libdevattr/devattr.h

160

int _udev_dict_set_uint(prop_dictionary_t dict, const char *key, uint64_t val);

lib/libefivar/uefi-dplib.h

612

WriteUnaligned64(void *ptr, uint64_t val)

lib/libefivar/uefi-dplib.h

614

memcpy(ptr, &val, sizeof(val));

lib/libevtr/evtr.c

134

uintptr_t val;

lib/libevtr/evtr.c

563

hash_find(const struct hashtab *tab, uintptr_t key, uintptr_t *val)

lib/libevtr/evtr.c

573

*val = ent->val;

lib/libevtr/evtr.c

578

hash_insert(struct hashtab *tab, uintptr_t key, uintptr_t val)

lib/libevtr/evtr.c

590

ent->val = val;

lib/libevtr/evtr.c

669

uintptr_t val;

lib/libevtr/evtr.c

671

if (hash_find(&strtab->tab, (uintptr_t)str, &val))

lib/libevtr/evtr.c

673

*id = (uint16_t)val;

lib/libevtr/evtr.c

681

uintptr_t val;

lib/libevtr/evtr.c

683

val = ++strtab->id;

lib/libevtr/evtr.c

694

hash_insert(&strtab->tab, (uintptr_t)str, (uintptr_t)val);

lib/libevtr/evtr.c

719

uintptr_t val;

lib/libevtr/evtr.c

721

if (hash_find(&symtab->tab, (uintptr_t)str, &val))

lib/libevtr/evtr.c

723

return (struct evtr_variable *)val;

lib/libevtr/evtr.h

103

struct evtr_variable_value *val;

lib/libevtr/evtr.h

75

struct evtr_variable_value val;

lib/libevtr/internal.h

38

struct evtr_variable_value *val;

lib/libevtr/ktrfmt.tab.c

126

var->val.type = EVTR_VAL_NIL;

lib/libevtr/ktrfmt.tab.c

149

evtr_variable_value_t val, evtr_var_t *_var)

lib/libevtr/ktrfmt.tab.c

1526

var->val.type = EVTR_VAL_INT;

lib/libevtr/ktrfmt.tab.c

1528

var->val.num = strtoll((yyvsp[(1) - (1)].tok)->str, NULL, 0);

lib/libevtr/ktrfmt.tab.c

154

if (hsh->val.type == EVTR_VAL_NIL) {

lib/libevtr/ktrfmt.tab.c

1545

var->val.type = EVTR_VAL_STR;

lib/libevtr/ktrfmt.tab.c

1546

var->val.str = (yyvsp[(1) - (1)].tok)->str;

lib/libevtr/ktrfmt.tab.c

1547

if (!var->val.str) {

lib/libevtr/ktrfmt.tab.c

1561

ctor->val.type = EVTR_VAL_CTOR;

lib/libevtr/ktrfmt.tab.c

1562

ctor->val.ctor.name = NULL;

lib/libevtr/ktrfmt.tab.c

1563

TAILQ_INIT(&ctor->val.ctor.args);

lib/libevtr/ktrfmt.tab.c

1564

TAILQ_INSERT_HEAD(&ctor->val.ctor.args, &(yyvsp[(1) - (1)].var)->val, link);

lib/libevtr/ktrfmt.tab.c

157

hsh->val.type = EVTR_VAL_HASH;

lib/libevtr/ktrfmt.tab.c

1573

TAILQ_INSERT_HEAD(&(yyvsp[(2) - (2)].var)->val.ctor.args, &(yyvsp[(1) - (2)].var)->val, link);

lib/libevtr/ktrfmt.tab.c

158

hsh->val.hashtab = hash_new();

lib/libevtr/ktrfmt.tab.c

1588

var->val.type = EVTR_VAL_CTOR;

lib/libevtr/ktrfmt.tab.c

1589

var->val.ctor.name = (yyvsp[(1) - (1)].tok)->str;

lib/libevtr/ktrfmt.tab.c

159

} else if (hsh->val.type != EVTR_VAL_HASH) {

lib/libevtr/ktrfmt.tab.c

1590

TAILQ_INIT(&var->val.ctor.args);

lib/libevtr/ktrfmt.tab.c

160

printd(PARSE, "trying to use type %d as hash\n", hsh->val.type);

lib/libevtr/ktrfmt.tab.c

1600

evtr_variable_value_t val;

lib/libevtr/ktrfmt.tab.c

1605

(yyvsp[(2) - (2)].var)->val.ctor.name = (yyvsp[(1) - (2)].tok)->str;

lib/libevtr/ktrfmt.tab.c

1608

TAILQ_FOREACH(val, &(yyvsp[(2) - (2)].var)->val.ctor.args, link) {

lib/libevtr/ktrfmt.tab.c

1609

switch (val->type) {

lib/libevtr/ktrfmt.tab.c

1611

printd(PARSE, "\t%jd\n", val->num);

lib/libevtr/ktrfmt.tab.c

1614

printd(PARSE, "\t\"%s\"\n", val->str);

lib/libevtr/ktrfmt.tab.c

163

if (val->type == EVTR_VAL_INT) {

lib/libevtr/ktrfmt.tab.c

164

key = val->num;

lib/libevtr/ktrfmt.tab.c

166

val->num, hsh->val.hashtab);

lib/libevtr/ktrfmt.tab.c

1662

if (index_hash(ctx, (yyvsp[(1) - (4)].var)->name, &(yyvsp[(3) - (4)].var)->val, &var))

lib/libevtr/ktrfmt.tab.c

167

} else if (val->type == EVTR_VAL_STR) {

lib/libevtr/ktrfmt.tab.c

1676

tmp->val.type = EVTR_VAL_STR;

lib/libevtr/ktrfmt.tab.c

1677

tmp->val.str = (yyvsp[(3) - (3)].tok)->str;

lib/libevtr/ktrfmt.tab.c

1679

if (index_hash(ctx, (yyvsp[(1) - (3)].var)->name, &tmp->val, &var))

lib/libevtr/ktrfmt.tab.c

168

key = (uintptr_t)val->str;

lib/libevtr/ktrfmt.tab.c

170

val->str, hsh->val.hashtab);

lib/libevtr/ktrfmt.tab.c

1706

(yyvsp[(1) - (3)].var)->val = (yyvsp[(3) - (3)].var)->val;

lib/libevtr/ktrfmt.tab.c

1709

ctx->ev->stmt.val = &(yyvsp[(3) - (3)].var)->val;

lib/libevtr/ktrfmt.tab.c

1718

(yyvsp[(1) - (3)].var)->val = (yyvsp[(3) - (3)].var)->val;

lib/libevtr/ktrfmt.tab.c

1721

ctx->ev->stmt.val = &(yyvsp[(3) - (3)].var)->val;

lib/libevtr/ktrfmt.tab.c

177

if (hash_find(hsh->val.hashtab, key, &ret)) {

lib/libevtr/ktrfmt.tab.c

182

if (!hash_insert(hsh->val.hashtab, key,

lib/libevtr/ktrfmt.tab.c

262

struct evtr_variable_value *val;

lib/libevtr/ktrfmt.tab.h

69

struct evtr_variable_value *val;

lib/libevtr/ktrfmt.y

104

if (hash_find(hsh->val.hashtab, key, &ret)) {

lib/libevtr/ktrfmt.y

109

if (!hash_insert(hsh->val.hashtab, key,

lib/libevtr/ktrfmt.y

143

struct evtr_variable_value *val;

lib/libevtr/ktrfmt.y

180

var->val.type = EVTR_VAL_INT;

lib/libevtr/ktrfmt.y

182

var->val.num = strtoll($1->str, NULL, 0);

lib/libevtr/ktrfmt.y

194

var->val.type = EVTR_VAL_STR;

lib/libevtr/ktrfmt.y

195

var->val.str = $1->str;

lib/libevtr/ktrfmt.y

196

if (!var->val.str) {

lib/libevtr/ktrfmt.y

206

ctor->val.type = EVTR_VAL_CTOR;

lib/libevtr/ktrfmt.y

207

ctor->val.ctor.name = NULL;

lib/libevtr/ktrfmt.y

208

TAILQ_INIT(&ctor->val.ctor.args);

lib/libevtr/ktrfmt.y

209

TAILQ_INSERT_HEAD(&ctor->val.ctor.args, &$1->val, link);

lib/libevtr/ktrfmt.y

213

TAILQ_INSERT_HEAD(&$2->val.ctor.args, &$1->val, link);

lib/libevtr/ktrfmt.y

224

var->val.type = EVTR_VAL_CTOR;

lib/libevtr/ktrfmt.y

225

var->val.ctor.name = $1->str;

lib/libevtr/ktrfmt.y

226

TAILQ_INIT(&var->val.ctor.args);

lib/libevtr/ktrfmt.y

231

evtr_variable_value_t val;

lib/libevtr/ktrfmt.y

236

$2->val.ctor.name = $1->str;

lib/libevtr/ktrfmt.y

239

TAILQ_FOREACH(val, &$2->val.ctor.args, link) {

lib/libevtr/ktrfmt.y

240

switch (val->type) {

lib/libevtr/ktrfmt.y

242

printd(PARSE, "\t%jd\n", val->num);

lib/libevtr/ktrfmt.y

245

printd(PARSE, "\t\"%s\"\n", val->str);

lib/libevtr/ktrfmt.y

280

if (index_hash(ctx, $1->name, &$3->val, &var))

lib/libevtr/ktrfmt.y

289

tmp->val.type = EVTR_VAL_STR;

lib/libevtr/ktrfmt.y

290

tmp->val.str = $3->str;

lib/libevtr/ktrfmt.y

292

if (index_hash(ctx, $1->name, &tmp->val, &var))

lib/libevtr/ktrfmt.y

306

$1->val = $3->val;

lib/libevtr/ktrfmt.y

309

ctx->ev->stmt.val = &$3->val;

lib/libevtr/ktrfmt.y

313

$1->val = $3->val;

lib/libevtr/ktrfmt.y

316

ctx->ev->stmt.val = &$3->val;

lib/libevtr/ktrfmt.y

53

var->val.type = EVTR_VAL_NIL;

lib/libevtr/ktrfmt.y

76

evtr_variable_value_t val, evtr_var_t *_var)

lib/libevtr/ktrfmt.y

81

if (hsh->val.type == EVTR_VAL_NIL) {

lib/libevtr/ktrfmt.y

84

hsh->val.type = EVTR_VAL_HASH;

lib/libevtr/ktrfmt.y

85

hsh->val.hashtab = hash_new();

lib/libevtr/ktrfmt.y

86

} else if (hsh->val.type != EVTR_VAL_HASH) {

lib/libevtr/ktrfmt.y

87

printd(PARSE, "trying to use type %d as hash\n", hsh->val.type);

lib/libevtr/ktrfmt.y

90

if (val->type == EVTR_VAL_INT) {

lib/libevtr/ktrfmt.y

91

key = val->num;

lib/libevtr/ktrfmt.y

93

val->num, hsh->val.hashtab);

lib/libevtr/ktrfmt.y

94

} else if (val->type == EVTR_VAL_STR) {

lib/libevtr/ktrfmt.y

95

key = (uintptr_t)val->str;

lib/libevtr/ktrfmt.y

97

val->str, hsh->val.hashtab);

lib/libexecinfo/unwind_arm_ehabi_stub.c

36

_Unwind_Word val;

lib/libexecinfo/unwind_arm_ehabi_stub.c

38

&val);

lib/libexecinfo/unwind_arm_ehabi_stub.c

40

return val;

lib/libexecinfo/unwind_arm_ehabi_stub.c

57

_Unwind_SetGR(struct _Unwind_Context *context, int reg, _Unwind_Ptr val)

lib/libexecinfo/unwind_arm_ehabi_stub.c

60

&val);

lib/libfetch/http.c

1386

int af, val;

lib/libfetch/http.c

1445

val = 1;

lib/libfetch/http.c

1446

setsockopt(conn->sd, IPPROTO_TCP, TCP_NOPUSH, &val, sizeof(val));

lib/libfetch/http.c

1548

int e, i, n, val;

lib/libfetch/http.c

1746

val = 0;

lib/libfetch/http.c

1747

setsockopt(conn->sd, IPPROTO_TCP, TCP_NOPUSH, &val,

lib/libfetch/http.c

1748

sizeof(val));

lib/libfetch/http.c

1749

val = 1;

lib/libfetch/http.c

1750

setsockopt(conn->sd, IPPROTO_TCP, TCP_NODELAY, &val,

lib/libfetch/http.c

1751

sizeof(val));

lib/libipfw3/basic/ipfw3_basic.c

105

return table->val;

lib/libipfw3/basic/ipfw3_basic.c

113

match_token2(struct char_int_map *table, int val)

lib/libipfw3/basic/ipfw3_basic.c

115

while (table->val) {

lib/libipfw3/basic/ipfw3_basic.c

116

if (table->val == val)

lib/libnvmm/libnvmm_x86.c

1965

sign_extend(uint64_t val, int size)

lib/libnvmm/libnvmm_x86.c

1968

if (val & __BIT(7))

lib/libnvmm/libnvmm_x86.c

1969

val |= 0xFFFFFFFFFFFFFF00;

lib/libnvmm/libnvmm_x86.c

1971

if (val & __BIT(15))

lib/libnvmm/libnvmm_x86.c

1972

val |= 0xFFFFFFFFFFFF0000;

lib/libnvmm/libnvmm_x86.c

1974

if (val & __BIT(31))

lib/libnvmm/libnvmm_x86.c

1975

val |= 0xFFFFFFFF00000000;

lib/libnvmm/libnvmm_x86.c

1977

return val;

lib/libnvmm/libnvmm_x86.c

3004

uint64_t val;

lib/libnvmm/libnvmm_x86.c

3006

val = state->gprs[gpr];

lib/libnvmm/libnvmm_x86.c

3007

val &= size_to_mask(instr->address_size);

lib/libnvmm/libnvmm_x86.c

3009

return val;

lib/libnvmm/libnvmm_x86.c

3218

uint64_t val;

lib/libnvmm/libnvmm_x86.c

3266

val = state->gprs[instr->src.u.reg->num];

lib/libnvmm/libnvmm_x86.c

3267

val = __SHIFTOUT(val, instr->src.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3268

memcpy(mem.data, &val, mem.size);

lib/libnvmm/libnvmm_x86.c

3287

val = state->gprs[instr->dst.u.reg->num];

lib/libnvmm/libnvmm_x86.c

3288

val = __SHIFTOUT(val, instr->dst.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3289

memcpy(mem.data, &val, mem.size);

lib/libnvmm/libnvmm_x86.c

3309

memcpy(&val, membuf, sizeof(uint64_t));

lib/libnvmm/libnvmm_x86.c

3310

val = __SHIFTIN(val, instr->dst.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3312

state->gprs[instr->dst.u.reg->num] |= val;

lib/libnvmm/libnvmm_x86.c

3324

memcpy(&val, membuf, sizeof(uint64_t));

lib/libnvmm/libnvmm_x86.c

3325

val = __SHIFTIN(val, instr->src.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3327

state->gprs[instr->src.u.reg->num] |= val;

lib/librpcsvc/xcrypt.c

155

unsigned val;

lib/librpcsvc/xcrypt.c

158

val = binnum[i];

lib/librpcsvc/xcrypt.c

159

hexnum[i*2] = hex[val >> 4];

lib/librpcsvc/xcrypt.c

160

hexnum[i*2+1] = hex[val & 0xf];

lib/libssh/openbsd-compat/sys-tree.h

154

name##_SPLAY_MIN_MAX(struct name *head, int val) \

lib/libssh/openbsd-compat/sys-tree.h

156

name##_SPLAY_MINMAX(head, val); \

lib/libssh/openbsd-compat/sys-tree.h

709

name##_RB_MINMAX(struct name *head, int val) \

lib/libssh/openbsd-compat/sys-tree.h

715

if (val < 0) \

lib/libthread_db/libthread_xu.c

120

#define LOOKUP_VAL(proc, sym, val) \

lib/libthread_db/libthread_xu.c

127

ret = ps_pread(proc, vaddr, val, sizeof(int)); \

lib/libthread_xu/thread/thr_private.h

380

#define SHOULD_CANCEL(val) \

lib/libthread_xu/thread/thr_private.h

381

(((val) & (THR_CANCEL_DISABLE | THR_CANCEL_EXITING | \

lib/libthread_xu/thread/thr_private.h

384

#define SHOULD_ASYNC_CANCEL(val) \

lib/libthread_xu/thread/thr_private.h

385

(((val) & (THR_CANCEL_DISABLE | THR_CANCEL_EXITING | \

lib/libthread_xu/thread/thr_sem.c

276

int val;

lib/libthread_xu/thread/thr_sem.c

284

while ((val = (*sem)->count) > 0) {

lib/libthread_xu/thread/thr_sem.c

286

if (atomic_cmpset_int(&(*sem)->count, val, val - 1)) {

lib/libthread_xu/thread/thr_sem.c

287

sem_log("sem_trywait %p %d (success)\n", *sem, val - 1);

lib/libthread_xu/thread/thr_sem.c

292

sem_log("sem_trywait %p %d (failure)\n", *sem, val);

lib/libthread_xu/thread/thr_sem.c

300

int val, oldcancel, retval;

lib/libthread_xu/thread/thr_sem.c

314

while ((val = (*sem)->count) > 0) {

lib/libthread_xu/thread/thr_sem.c

316

if (atomic_cmpset_acq_int(&(*sem)->count, val, val - 1)) {

lib/libthread_xu/thread/thr_sem.c

318

*sem, val - 1);

lib/libthread_xu/thread/thr_sem.c

323

sem_log("sem_wait %p %d (wait)\n", *sem, val);

lib/libthread_xu/thread/thr_sem.c

342

int val, oldcancel, retval;

lib/libthread_xu/thread/thr_sem.c

356

while ((val = (*sem)->count) > 0) {

lib/libthread_xu/thread/thr_sem.c

358

if (atomic_cmpset_acq_int(&(*sem)->count, val, val - 1)) {

lib/libthread_xu/thread/thr_sem.c

360

*sem, val - 1);

lib/libthread_xu/thread/thr_sem.c

367

sem_log("sem_wait %p %d (bad abstime)\n", *sem, val);

lib/libthread_xu/thread/thr_sem.c

374

sem_log("sem_wait %p %d (wait)\n", *sem, val);

lib/libthread_xu/thread/thr_sem.c

391

int val;

lib/libthread_xu/thread/thr_sem.c

400

val = atomic_fetchadd_int(&(*sem)->count, 1) + 1;

lib/libthread_xu/thread/thr_sem.c

401

sem_log("sem_post %p %d\n", *sem, val);

lib/libutil/libutil.h

105

int snprintb(char *buf, size_t buflen, const char *bitfmt, uint64_t val);

lib/libutil/libutil.h

106

int snprintb_m(char *buf, size_t buflen, const char *bitfmt, uint64_t val,

lib/libutil/login_cap.c

629

rlim_t val;

lib/libutil/login_cap.c

655

val = strtoq(res, &ep, 0);

lib/libutil/login_cap.c

663

return val;

lib/libutil/login_times.c

49

u_short val;

lib/libutil/login_times.c

51

for (val = 0; *ptr && isdigit(*ptr); ptr++)

lib/libutil/login_times.c

52

val = (u_short)(val * 10 + (*ptr - '0'));

lib/libutil/login_times.c

54

*t = (u_short)((val / 100) * 60 + (val % 100));

lib/libutil/snprintb.c

103

snprintf(bp, buflen - t_len, sbase, (uintmax_t)val);\

lib/libutil/snprintb.c

160

if (val & (1U << (bit - 1))) {

lib/libutil/snprintb.c

176

field = val;

lib/libutil/snprintb.c

181

if (((unsigned int)(val >> bit) & 1) == 0)

lib/libutil/snprintb.c

196

field = (val >> bit) &

lib/libutil/snprintb.c

263

snprintb(char *buf, size_t buflen, const char *bitfmt, uint64_t val)

lib/libutil/snprintb.c

265

return snprintb_m(buf, buflen, bitfmt, val, 0);

lib/libutil/snprintb.c

43

snprintb_m(char *buf, size_t buflen, const char *bitfmt, uint64_t val,

lib/libutil/snprintb.c

72

t_len = snprintf(bp, buflen, sbase, (uintmax_t)val);

lib/libutil/snprintb.c

87

if ((val == 0) && (ch != '\177'))

lib/libutil/uucplock.c

52

#define GORET(level, val) { err = errno; uuerr = (val); \

lib/libvgl/simple.c

398

byte val;

lib/libvgl/simple.c

401

outb(0x3C4, 0x01); val = inb(0x3C5); outb(0x3C4, 0x01);

lib/libvgl/simple.c

402

outb(0x3C5, ((blank) ? (val |= 0x20) : (val &= 0xDF)));

libexec/dma/base64.c

102

val *= 64;

libexec/dma/base64.c

108

val += pos(token[i]);

libexec/dma/base64.c

112

return (marker << 24) | val;

libexec/dma/base64.c

123

unsigned int val = token_decode(p);

libexec/dma/base64.c

124

unsigned int marker = (val >> 24) & 0xff;

libexec/dma/base64.c

125

if (val == DECODE_ERROR)

libexec/dma/base64.c

127

*q++ = (val >> 16) & 0xff;

libexec/dma/base64.c

129

*q++ = (val >> 8) & 0xff;

libexec/dma/base64.c

131

*q++ = val & 0xff;

libexec/dma/base64.c

97

unsigned int val = 0;

libexec/ftpd/ftpd.c

372

long val = 0;

libexec/ftpd/ftpd.c

374

val = strtol(optarg, &optarg, 8);

libexec/ftpd/ftpd.c

375

if (*optarg != '\0' || val < 0)

libexec/ftpd/ftpd.c

378

defumask = val;

libexec/getty/chat.c

109

int i, val = 0;

libexec/getty/chat.c

120

val = (val * base) + sval;

libexec/getty/chat.c

123

return val;

libexec/getty/subr.c

533

speed(int val)

libexec/getty/subr.c

537

if (val <= B230400)

libexec/getty/subr.c

538

return (val);

libexec/getty/subr.c

541

if (sp->speed == val)

libexec/rbootd/rmp_var.h

132

typedef struct _uword { u_int16_t val[2]; } u_word;

libexec/rbootd/rmp_var.h

135

((w.val[_WORD_HIGHPART] == 0) && (w.val[_WORD_LOWPART] == 0))

libexec/rbootd/rmp_var.h

137

(w).val[_WORD_HIGHPART] = (w).val[_WORD_LOWPART] = 0

libexec/rbootd/rmp_var.h

139

{ (w2).val[_WORD_HIGHPART] = (w1).val[_WORD_HIGHPART]; \

libexec/rbootd/rmp_var.h

140

(w2).val[_WORD_LOWPART] = (w1).val[_WORD_LOWPART]; \

libexec/rbootd/rmp_var.h

143

(i) = (((u_int32_t)ntohs((w).val[_WORD_HIGHPART])) << 16) | ntohs((w).val[_WORD_LOWPART])

libexec/rbootd/rmp_var.h

145

{ (w).val[_WORD_HIGHPART] = htons((u_int16_t) ((i >> 16) & 0xffff)); \

libexec/rbootd/rmp_var.h

146

(w).val[_WORD_LOWPART] = htons((u_int16_t) (i & 0xffff)); \

libexec/telnetd/authenc.c

72

telnet_getenv(char *val)

libexec/telnetd/authenc.c

74

return(getenv(val));

libexec/telnetd/defs.h

150

cc_t val; /* the value of the special character */

libexec/telnetd/slc.c

108

spcset(i, &slctab[i].defset.val, &slctab[i].sptr);

libexec/telnetd/slc.c

110

slctab[i].current.val = 0;

libexec/telnetd/slc.c

122

add_slc(char func, char flag, cc_t val)

libexec/telnetd/slc.c

131

if ((*slcptr++ = (unsigned char)val) == 0xff)

libexec/telnetd/slc.c

208

process_slc(unsigned char func, unsigned char flag, cc_t val)

libexec/telnetd/slc.c

248

if (hislevel == mylevel && (val == slctab[func].current.val || ack)) {

libexec/telnetd/slc.c

260

change_slc(func, flag, val);

libexec/telnetd/slc.c

272

change_slc(char func, char flag, cc_t val)

libexec/telnetd/slc.c

285

slctab[(int)func].current.val = (cc_t)_POSIX_VDISABLE;

libexec/telnetd/slc.c

287

add_slc(func, flag, val);

libexec/telnetd/slc.c

302

slctab[(int)func].current.val = slctab[(int)func].defset.val;

libexec/telnetd/slc.c

304

slctab[(int)func].current.val);

libexec/telnetd/slc.c

322

slctab[(int)func].current.val = val;

libexec/telnetd/slc.c

323

*(slctab[(int)func].sptr) = val;

libexec/telnetd/slc.c

327

add_slc(func, flag, val);

libexec/telnetd/slc.c

345

slctab[(int)func].current.val = val;

libexec/telnetd/slc.c

357

slctab[(int)func].current.val =

libexec/telnetd/slc.c

358

slctab[(int)func].defset.val;

libexec/telnetd/slc.c

359

val = slctab[(int)func].current.val;

libexec/telnetd/slc.c

362

add_slc(func, flag, val);

libexec/telnetd/slc.c

401

(*(slctab[i].sptr) != slctab[i].current.val)) {

libexec/telnetd/slc.c

402

slctab[i].current.val = *(slctab[i].sptr);

libexec/telnetd/slc.c

408

slctab[i].current.val);

libexec/telnetd/slc.c

426

cc_t val;

libexec/telnetd/slc.c

435

val = (cc_t)*ptr++;

libexec/telnetd/slc.c

437

process_slc(func, flag, val);

libexec/telnetd/slc.c

64

slctab[i].current.val);

libexec/telnetd/slc.c

80

slctab[i].current.val = slctab[i].defset.val;

libexec/telnetd/slc.c

81

if (slctab[i].current.val == (cc_t)(_POSIX_VDISABLE))

libexec/telnetd/slc.c

86

*(slctab[i].sptr) = slctab[i].defset.val;

libexec/telnetd/sys_term.c

103

# define cfsetospeed(tp, val) (tp)->c_cflag &= ~CBAUD; \

libexec/telnetd/sys_term.c

104

(tp)->c_cflag |= (val)

libexec/telnetd/sys_term.c

107

# define cfsetispeed(tp, val) (tp)->c_cflag &= ~CIBAUD; \

libexec/telnetd/sys_term.c

108

(tp)->c_cflag |= ((val)<<IBSHIFT)

libexec/telnetd/sys_term.c

111

# define cfsetispeed(tp, val) (tp)->c_cflag &= ~CBAUD; \

libexec/telnetd/sys_term.c

112

(tp)->c_cflag |= (val)

libexec/telnetd/sys_term.c

1212

addarg(char **argv, const char *val)

libexec/telnetd/sys_term.c

1237

*cpp++ = strdup(val);

libexec/telnetd/sys_term.c

801

tty_tspeed(int val)

libexec/telnetd/sys_term.c

806

for (tp = termspeeds; (tp->speed != -1) && (val > tp->speed); tp++)

libexec/telnetd/sys_term.c

81

# define cfsetospeed(tp, val) (tp)->sg.sg_ospeed = (val)

libexec/telnetd/sys_term.c

812

cfsetospeed(&termbuf, val);

libexec/telnetd/sys_term.c

817

tty_rspeed(int val)

libexec/telnetd/sys_term.c

82

# define cfsetispeed(tp, val) (tp)->sg.sg_ispeed = (val)

libexec/telnetd/sys_term.c

822

for (tp = termspeeds; (tp->speed != -1) && (val > tp->speed); tp++)

libexec/telnetd/sys_term.c

828

cfsetispeed(&termbuf, val);

libexec/ypxfr/ypxfr_main.c

123

ypxfr_foreach(int status, char *key, int keylen, char *val, int vallen,

libexec/ypxfr/ypxfr_main.c

145

dbval.data = val;

sbin/camcontrol/camcontrol.c

3208

int val;

sbin/camcontrol/camcontrol.c

3211

val = scsi_2btoul(

sbin/camcontrol/camcontrol.c

3213

percentage = 10000 * val;

sbin/camcontrol/camcontrol.c

3220

val, 0x10000);

sbin/ccdconfig/ccdconfig.c

627

int i, tmp, val = ~CCDF_USERMASK;

sbin/ccdconfig/ccdconfig.c

657

val = tmp;

sbin/ccdconfig/ccdconfig.c

665

val = (int)strtol(&flags[2], &cp, 16);

sbin/ccdconfig/ccdconfig.c

673

val = (int)strtol(flags, &cp, 10);

sbin/ccdconfig/ccdconfig.c

678

return (((val & ~CCDF_USERMASK) == 0) ? val : -1);

sbin/devattr/devattr.c

110

ent->val = optarg;

sbin/devattr/devattr.c

254

ent->val);

sbin/devattr/devattr.c

256

print_prop(ent->val, key_val);

sbin/devattr/devattr.c

288

ent->val);

sbin/devattr/devattr.c

290

print_prop(ent->val, key_val);

sbin/devattr/devattr.c

50

char *val;

sbin/devd/devd.cc

1131

set_variable(const char *var, const char *val)

sbin/devd/devd.cc

1133

cfg.set_variable(var, val);

sbin/devd/devd.cc

1135

free(const_cast<char *>(val));

sbin/devd/devd.cc

1184

int val = 0;

sbin/devd/devd.cc

1187

len = sizeof(val);

sbin/devd/devd.cc

1188

if (sysctlbyname(SYSCTL, &val, &len, NULL, 0) != 0)

sbin/devd/devd.cc

1190

if (val) {

sbin/devd/devd.cc

1192

val = 0;

sbin/devd/devd.cc

1193

sysctlbyname(SYSCTL, NULL, NULL, &val, sizeof(val));

sbin/devd/devd.cc

401

var_list::set_variable(const string &var, const string &val)

sbin/devd/devd.cc

410

devdlog(LOG_DEBUG, "setting %s=%s\n", var.c_str(), val.c_str());

sbin/devd/devd.cc

411

_vars[var] = val;

sbin/devd/devd.cc

584

config::set_variable(const char *var, const char *val)

sbin/devd/devd.cc

586

_var_list_table.back()->set_variable(var, val);

sbin/devd/devd.hh

160

void set_variable(const char *var, const char *val);

sbin/devd/devd.hh

46

void set_variable(const std::string &var, const std::string &val);

sbin/dhclient/clparse.c

258

char *val;

sbin/dhclient/clparse.c

261

token = peek_token(&val, cfile);

sbin/dhclient/clparse.c

265

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

271

convert_num(&buf[len], val, 16, 8);

sbin/dhclient/clparse.c

277

token = peek_token(&val, cfile);

sbin/dhclient/clparse.c

279

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

281

val = (char *)buf;

sbin/dhclient/clparse.c

283

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

284

len = strlen(val);

sbin/dhclient/clparse.c

290

memcpy(buf, val, len + 1);

sbin/dhclient/clparse.c

308

char *val;

sbin/dhclient/clparse.c

312

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

319

if (!strcasecmp(dhcp_options[i].name, val))

sbin/dhclient/clparse.c

323

parse_warn("%s: unexpected option name.", val);

sbin/dhclient/clparse.c

329

parse_warn("%s: too many options.", val);

sbin/dhclient/clparse.c

333

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

350

char *val;

sbin/dhclient/clparse.c

353

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

360

if (strcmp(ifi->name, val) != 0) {

sbin/dhclient/clparse.c

365

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

373

token = peek_token(&val, cfile);

sbin/dhclient/clparse.c

382

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

506

char *val;

sbin/dhclient/clparse.c

509

switch (next_token(&val, cfile)) {

sbin/dhclient/clparse.c

514

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

520

if (strcmp(ifi->name, val) != 0) {

sbin/dhclient/clparse.c

557

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

567

char *val;

sbin/dhclient/clparse.c

578

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

589

if (strcmp(dhcp_options[code].name, val) == 0)

sbin/dhclient/clparse.c

593

parse_warn("no option named %s", val);

sbin/dhclient/clparse.c

610

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

616

len = strlen(val);

sbin/dhclient/clparse.c

623

memcpy(&hunkbuf[hunkix], val, len + 1);

sbin/dhclient/clparse.c

644

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

652

convert_num(buf, val, 0, 32);

sbin/dhclient/clparse.c

658

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

661

convert_num(buf, val, 0, 16);

sbin/dhclient/clparse.c

667

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

670

convert_num(buf, val, 0, 8);

sbin/dhclient/clparse.c

675

token = next_token(&val, cfile);

sbin/dhclient/clparse.c

683

if (!strcasecmp(val, "true") ||

sbin/dhclient/clparse.c

684

!strcasecmp(val, "on"))

sbin/dhclient/clparse.c

686

else if (!strcasecmp(val, "false") ||

sbin/dhclient/clparse.c

687

!strcasecmp(val, "off"))

sbin/dhclient/clparse.c

703

token = next_token(&val, cfile);

sbin/dhclient/convert.c

102

putUShort(unsigned char *obuf, unsigned int val)

sbin/dhclient/convert.c

104

u_int16_t tmp = htons(val);

sbin/dhclient/convert.c

110

putShort(unsigned char *obuf, int val)

sbin/dhclient/convert.c

112

int16_t tmp = htons(val);

sbin/dhclient/convert.c

86

putULong(unsigned char *obuf, u_int32_t val)

sbin/dhclient/convert.c

88

u_int32_t tmp = htonl(val);

sbin/dhclient/convert.c

94

putLong(unsigned char *obuf, int32_t val)

sbin/dhclient/convert.c

96

int32_t tmp = htonl(val);

sbin/dhclient/parse.c

115

char *val, *s;

sbin/dhclient/parse.c

118

token = next_token(&val, cfile);

sbin/dhclient/parse.c

124

s = strdup(val);

sbin/dhclient/parse.c

126

error("no memory for string %s.", val);

sbin/dhclient/parse.c

189

char *val;

sbin/dhclient/parse.c

192

token = next_token(&val, cfile);

sbin/dhclient/parse.c

198

convert_num((unsigned char *)timep, val, 10, 32);

sbin/dhclient/parse.c

213

char *val;

sbin/dhclient/parse.c

220

if (count && (peek_token(&val, cfile) == separator))

sbin/dhclient/parse.c

221

token = next_token(&val, cfile);

sbin/dhclient/parse.c

223

token = next_token(&val, cfile);

sbin/dhclient/parse.c

227

convert_num(buf, val, base, 8);

sbin/dhclient/parse.c

244

u_int32_t val = 0;

sbin/dhclient/parse.c

285

val = val * base + tval;

sbin/dhclient/parse.c

292

if (val > max) {

sbin/dhclient/parse.c

296

negative ? "-" : "", val, max);

sbin/dhclient/parse.c

300

negative ? "-" : "", val, max);

sbin/dhclient/parse.c

304

negative ? "-" : "", val, max);

sbin/dhclient/parse.c

312

*buf = -(unsigned long)val;

sbin/dhclient/parse.c

315

putShort(buf, -(unsigned long)val);

sbin/dhclient/parse.c

318

putLong(buf, -(unsigned long)val);

sbin/dhclient/parse.c

327

*buf = (u_int8_t)val;

sbin/dhclient/parse.c

330

putUShort(buf, (u_int16_t)val);

sbin/dhclient/parse.c

333

putULong(buf, val);

sbin/dhclient/parse.c

356

char *val;

sbin/dhclient/parse.c

359

token = next_token(&val, cfile);

sbin/dhclient/parse.c

366

tm.tm_wday = atoi(val);

sbin/dhclient/parse.c

369

token = next_token(&val, cfile);

sbin/dhclient/parse.c

376

tm.tm_year = atoi(val);

sbin/dhclient/parse.c

381

token = next_token(&val, cfile);

sbin/dhclient/parse.c

390

token = next_token(&val, cfile);

sbin/dhclient/parse.c

397

tm.tm_mon = atoi(val) - 1;

sbin/dhclient/parse.c

400

token = next_token(&val, cfile);

sbin/dhclient/parse.c

409

token = next_token(&val, cfile);

sbin/dhclient/parse.c

416

tm.tm_mday = atoi(val);

sbin/dhclient/parse.c

419

token = next_token(&val, cfile);

sbin/dhclient/parse.c

426

tm.tm_hour = atoi(val);

sbin/dhclient/parse.c

429

token = next_token(&val, cfile);

sbin/dhclient/parse.c

438

token = next_token(&val, cfile);

sbin/dhclient/parse.c

445

tm.tm_min = atoi(val);

sbin/dhclient/parse.c

448

token = next_token(&val, cfile);

sbin/dhclient/parse.c

457

token = next_token(&val, cfile);

sbin/dhclient/parse.c

464

tm.tm_sec = atoi(val);

sbin/dhclient/parse.c

471

token = next_token(&val, cfile);

sbin/dump/main.c

536

long val;

sbin/dump/main.c

538

val = strtol(optarg, &p, 10);

sbin/dump/main.c

541

if (val < vmin || (vmax && val > vmax))

sbin/dump/main.c

543

return (val);

sbin/fsdb/fsdb.c

436

char *p, *val;

sbin/fsdb/fsdb.c

451

while ((val = strsep(&p, "/")) != NULL && *val == '\0');

sbin/fsdb/fsdb.c

452

if (val) {

sbin/fsdb/fsdb.c

453

printf("component `%s': ", val);

sbin/fsdb/fsdb.c

455

if (!dolookup(val)) {

sbin/fsdb/fsdb.c

808

char *p, *val;

sbin/fsdb/fsdb.c

815

nsec = strtoul(++p, &val, 0);

sbin/fsdb/fsdb.c

816

if (val == p || *val != '\0' || nsec >= 1000000000 || nsec < 0) {

sbin/fsdb/fsdbutil.c

58

char *p, *val;

sbin/fsdb/fsdbutil.c

60

while ((val = strsep(&p, " \t\n")) != NULL && *val == '\0')

sbin/fsdb/fsdbutil.c

62

if (val)

sbin/fsdb/fsdbutil.c

63

argv[i] = val;

sbin/hammer/cmd_cleanup.c

714

int val;

sbin/hammer/cmd_cleanup.c

716

val = strtol(ptr, &ptr, 0);

sbin/hammer/cmd_cleanup.c

719

val *= 24;

sbin/hammer/cmd_cleanup.c

722

val *= 60;

sbin/hammer/cmd_cleanup.c

725

val *= 60;

sbin/hammer/cmd_cleanup.c

734

return(val);

sbin/hammer/cmd_history.c

260

test_strtol(int res, long val)

sbin/hammer/cmd_history.c

262

return(res == ERANGE && (val == LONG_MIN || val == LONG_MAX));

sbin/hammer/cmd_history.c

267

test_strtoll(int res, long long val)

sbin/hammer/cmd_history.c

269

return(res == ERANGE && (val == LLONG_MIN || val == LLONG_MAX));

sbin/hammer/cmd_history.c

50

static __inline int test_strtol(int res, long val);

sbin/hammer/cmd_history.c

51

static __inline int test_strtoll(int res, long long val);

sbin/hammer2/lz4/hammer2_lz4.c

234

LZ4_NbCommonBytes (register U64 val)

sbin/hammer2/lz4/hammer2_lz4.c

239

_BitScanReverse64( &r, val );

sbin/hammer2/lz4/hammer2_lz4.c

242

return (__builtin_clzll(val) >> 3);

sbin/hammer2/lz4/hammer2_lz4.c

245

if (!(val>>32)) { r=4; } else { r=0; val>>=32; }

sbin/hammer2/lz4/hammer2_lz4.c

246

if (!(val>>16)) { r+=2; val>>=8; } else { val>>=24; }

sbin/hammer2/lz4/hammer2_lz4.c

247

r += (!val);

sbin/hammer2/lz4/hammer2_lz4.c

253

_BitScanForward64( &r, val );

sbin/hammer2/lz4/hammer2_lz4.c

256

return (__builtin_ctzll(val) >> 3);

sbin/hammer2/lz4/hammer2_lz4.c

266

return DeBruijnBytePos[((U64)((val & -val) * 0x0218A392CDABBD3F)) >> 58];

sbin/hammer2/lz4/hammer2_lz4.c

276

LZ4_NbCommonBytes (register U32 val)

sbin/hammer2/lz4/hammer2_lz4.c

281

_BitScanReverse( &r, val );

sbin/hammer2/lz4/hammer2_lz4.c

284

return (__builtin_clz(val) >> 3);

sbin/hammer2/lz4/hammer2_lz4.c

287

if (!(val>>16)) { r=2; val>>=8; } else { r=0; val>>=24; }

sbin/hammer2/lz4/hammer2_lz4.c

288

r += (!val);

sbin/hammer2/lz4/hammer2_lz4.c

294

_BitScanForward( &r, val );

sbin/hammer2/lz4/hammer2_lz4.c

297

return (__builtin_ctz(val) >> 3);

sbin/hammer2/lz4/hammer2_lz4.c

304

return DeBruijnBytePos[((U32)((val & -(S32)val) * 0x077CB531U)) >> 27];

sbin/hammer2/zlib/hammer2_zlib_inffast.c

134

Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?

sbin/hammer2/zlib/hammer2_zlib_inffast.c

136

"inflate: literal 0x%02x\n", here.val));

sbin/hammer2/zlib/hammer2_zlib_inffast.c

137

PUP(out) = (unsigned char)(here.val);

sbin/hammer2/zlib/hammer2_zlib_inffast.c

140

len = (unsigned)(here.val);

sbin/hammer2/zlib/hammer2_zlib_inffast.c

165

dist = (unsigned)(here.val);

sbin/hammer2/zlib/hammer2_zlib_inffast.c

284

here = dcode[here.val + (hold & ((1U << op) - 1))];

sbin/hammer2/zlib/hammer2_zlib_inffast.c

294

here = lcode[here.val + (hold & ((1U << op) - 1))];

sbin/hammer2/zlib/hammer2_zlib_inflate.c

326

state.lencode[low].bits, state.lencode[low].val);

sbin/hammer2/zlib/hammer2_zlib_inflate.c

337

state.distcode[low].val);

sbin/hammer2/zlib/hammer2_zlib_inflate.c

749

if (here.val < 16) {

sbin/hammer2/zlib/hammer2_zlib_inflate.c

751

state->lens[state->have++] = here.val;

sbin/hammer2/zlib/hammer2_zlib_inflate.c

754

if (here.val == 16) {

sbin/hammer2/zlib/hammer2_zlib_inflate.c

766

else if (here.val == 17) {

sbin/hammer2/zlib/hammer2_zlib_inflate.c

847

here = state->lencode[last.val +

sbin/hammer2/zlib/hammer2_zlib_inflate.c

857

state->length = (unsigned)here.val;

sbin/hammer2/zlib/hammer2_zlib_inflate.c

859

Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?

sbin/hammer2/zlib/hammer2_zlib_inflate.c

861

"inflate: literal 0x%02x\n", here.val));

sbin/hammer2/zlib/hammer2_zlib_inflate.c

899

here = state->distcode[last.val +

sbin/hammer2/zlib/hammer2_zlib_inflate.c

914

state->offset = (unsigned)here.val;

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

118

here.val = (unsigned short)0;

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

219

here.val = work[sym];

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

223

here.val = base[work[sym]];

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

227

here.val = 0;

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

286

(*table)[low].val = (unsigned short)(next - *table);

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

296

here.val = (unsigned short)0;

sbin/hammer2/zlib/hammer2_zlib_inftrees.h

27

unsigned short val; /* offset in table or code value */

sbin/hammer2/zlib/hammer2_zlib_trees.c

215

int val = value;\

sbin/hammer2/zlib/hammer2_zlib_trees.c

216

s->bi_buf |= (ush)val << s->bi_valid;\

sbin/hammer2/zlib/hammer2_zlib_trees.c

218

s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\

sbin/ifconfig/af_inet6.c

102

newval = (time_t)strtoul(val, &ep, 0);

sbin/ifconfig/af_inet6.c

103

if (val == ep)

sbin/ifconfig/af_inet6.c

387

prefix(void *val, int size)

sbin/ifconfig/af_inet6.c

389

u_char *name = (u_char *)val;

sbin/ifconfig/af_inet6.c

94

setip6lifetime(const char *cmd, const char *val, int s __unused,

sbin/ifconfig/ifbridge.c

257

setbridge_add(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

263

strlcpy(req.ifbr_ifsname, val, sizeof(req.ifbr_ifsname));

sbin/ifconfig/ifbridge.c

265

err(1, "BRDGADD %s", val);

sbin/ifconfig/ifbridge.c

269

setbridge_delete(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

275

strlcpy(req.ifbr_ifsname, val, sizeof(req.ifbr_ifsname));

sbin/ifconfig/ifbridge.c

277

err(1, "BRDGDEL %s", val);

sbin/ifconfig/ifbridge.c

281

setbridge_discover(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

284

do_bridgeflag(s, val, IFBIF_DISCOVER, 1);

sbin/ifconfig/ifbridge.c

288

unsetbridge_discover(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

291

do_bridgeflag(s, val, IFBIF_DISCOVER, 0);

sbin/ifconfig/ifbridge.c

295

setbridge_learn(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

298

do_bridgeflag(s, val, IFBIF_LEARNING, 1);

sbin/ifconfig/ifbridge.c

302

unsetbridge_learn(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

305

do_bridgeflag(s, val, IFBIF_LEARNING, 0);

sbin/ifconfig/ifbridge.c

309

setbridge_span(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

315

strlcpy(req.ifbr_ifsname, val, sizeof(req.ifbr_ifsname));

sbin/ifconfig/ifbridge.c

317

err(1, "BRDGADDS %s", val);

sbin/ifconfig/ifbridge.c

321

unsetbridge_span(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

327

strlcpy(req.ifbr_ifsname, val, sizeof(req.ifbr_ifsname));

sbin/ifconfig/ifbridge.c

329

err(1, "BRDGDELS %s", val);

sbin/ifconfig/ifbridge.c

333

setbridge_stp(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

336

do_bridgeflag(s, val, IFBIF_STP, 1);

sbin/ifconfig/ifbridge.c

340

unsetbridge_stp(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

343

do_bridgeflag(s, val, IFBIF_STP, 0);

sbin/ifconfig/ifbridge.c

347

setbridge_flush(const char *val __unused, int d __unused, int s,

sbin/ifconfig/ifbridge.c

359

setbridge_flushall(const char *val __unused, int d __unused, int s,

sbin/ifconfig/ifbridge.c

371

setbridge_static(const char *val, const char *mac, int s,

sbin/ifconfig/ifbridge.c

378

strlcpy(req.ifba_ifsname, val, sizeof(req.ifba_ifsname));

sbin/ifconfig/ifbridge.c

382

errx(1, "%s: invalid address: %s", val, mac);

sbin/ifconfig/ifbridge.c

388

err(1, "BRDGSADDR %s", val);

sbin/ifconfig/ifbridge.c

392

setbridge_deladdr(const char *val, int d __unused, int s,

sbin/ifconfig/ifbridge.c

400

ea = ether_aton(val);

sbin/ifconfig/ifbridge.c

402

errx(1, "invalid address: %s", val);

sbin/ifconfig/ifbridge.c

407

err(1, "BRDGDADDR %s", val);

sbin/ifconfig/ifbridge.c

411

getbridge_addr(const char *val __unused, int d __unused, int s,

sbin/ifconfig/ifbridge.c

422

u_long val;

sbin/ifconfig/ifbridge.c

424

if (get_val(arg, &val) < 0 || (val & ~0xffffffff) != 0)

sbin/ifconfig/ifbridge.c

427

param.ifbrp_csize = val & 0xffffffff;

sbin/ifconfig/ifbridge.c

438

u_long val;

sbin/ifconfig/ifbridge.c

440

if (get_val(arg, &val) < 0 || (val & ~0xff) != 0)

sbin/ifconfig/ifbridge.c

443

param.ifbrp_hellotime = val & 0xff;

sbin/ifconfig/ifbridge.c

454

u_long val;

sbin/ifconfig/ifbridge.c

456

if (get_val(arg, &val) < 0 || (val & ~0xff) != 0)

sbin/ifconfig/ifbridge.c

459

param.ifbrp_fwddelay = val & 0xff;

sbin/ifconfig/ifbridge.c

470

u_long val;

sbin/ifconfig/ifbridge.c

472

if (get_val(arg, &val) < 0 || (val & ~0xff) != 0)

sbin/ifconfig/ifbridge.c

475

param.ifbrp_maxage = val & 0xff;

sbin/ifconfig/ifbridge.c

486

u_long val;

sbin/ifconfig/ifbridge.c

488

if (get_val(arg, &val) < 0 || (val & ~0xffff) != 0)

sbin/ifconfig/ifbridge.c

491

param.ifbrp_prio = val & 0xffff;

sbin/ifconfig/ifbridge.c

502

u_long val;

sbin/ifconfig/ifbridge.c

506

if (get_val(pri, &val) < 0 || (val & ~0xff) != 0)

sbin/ifconfig/ifbridge.c

510

req.ifbr_priority = val & 0xff;

sbin/ifconfig/ifbridge.c

521

u_long val;

sbin/ifconfig/ifbridge.c

525

if (get_val(cost, &val) < 0 || (val & ~0xff) != 0)

sbin/ifconfig/ifbridge.c

529

req.ifbr_path_cost = val & 0xffff;

sbin/ifconfig/ifbridge.c

540

u_long val;

sbin/ifconfig/ifbridge.c

544

if (get_val(cost, &val) < 0 || (val & ~0xff) != 0)

sbin/ifconfig/ifbridge.c

548

if (val > 65535)

sbin/ifconfig/ifbridge.c

549

val = 65535;

sbin/ifconfig/ifbridge.c

550

req.ifbr_bond_weight = (uint16_t)val;

sbin/ifconfig/ifbridge.c

561

u_long val;

sbin/ifconfig/ifbridge.c

563

if (get_val(arg, &val) < 0 || (val & ~0xffffffff) != 0)

sbin/ifconfig/ifbridge.c

566

param.ifbrp_ctime = val & 0xffffffff;

sbin/ifconfig/ifbridge.c

61

u_long val;

sbin/ifconfig/ifbridge.c

64

val = strtoul(cp, &endptr, 0);

sbin/ifconfig/ifbridge.c

68

*valp = val;

sbin/ifconfig/ifcarp.c

111

strlcpy(carpr.carpr_key, val, CARP_KEY_LEN);

sbin/ifconfig/ifcarp.c

118

setcarp_vhid(const char *val, int d __unused, int s,

sbin/ifconfig/ifcarp.c

125

vhid = atoi(val);

sbin/ifconfig/ifcarp.c

145

setcarp_advskew(const char *val, int d __unused, int s,

sbin/ifconfig/ifcarp.c

152

advskew = atoi(val);

sbin/ifconfig/ifcarp.c

170

setcarp_advbase(const char *val, int d __unused, int s,

sbin/ifconfig/ifcarp.c

177

advbase = atoi(val);

sbin/ifconfig/ifcarp.c

195

getcarp_vhaddr(const char *val __unused, int d __unused, int s,

sbin/ifconfig/ifcarp.c

95

setcarp_passwd(const char *val, int d __unused, int s,

sbin/ifconfig/ifconfig.c

1110

setifmetric(const char *val, int dummy __unused, int s,

sbin/ifconfig/ifconfig.c

1117

ifr.ifr_metric = atoi(val);

sbin/ifconfig/ifconfig.c

1124

setifmtu(const char *val, int dummy __unused, int s,

sbin/ifconfig/ifconfig.c

1131

ifr.ifr_mtu = atoi(val);

sbin/ifconfig/ifconfig.c

1138

setiftsolen(const char *val, int dummy __unused, int s,

sbin/ifconfig/ifconfig.c

1145

ifr.ifr_tsolen = atoi(val);

sbin/ifconfig/ifconfig.c

1152

setifname(const char *val, int dummy __unused, int s,

sbin/ifconfig/ifconfig.c

1159

n = snprintf(newname, sizeof(newname), "%s", val);

sbin/ifconfig/ifconfig.c

1175

setifpollcpu(const char *val __unused, int dummy __unused, int s,

sbin/ifconfig/ifconfig.c

1183

setifdescr(const char *val, int dummy __unused, int s,

sbin/ifconfig/ifconfig.c

1192

ifr.ifr_buffer.length = strlen(val) + 1;

sbin/ifconfig/ifconfig.c

1197

newdescr = strdup(val);

sbin/ifconfig/ifconfig.c

1212

unsetifdescr(const char *val __unused, int dummy __unused, int s,

sbin/ifconfig/ifieee80211.c

1007

set80211txpower(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1010

double v = atof(val);

sbin/ifconfig/ifieee80211.c

1024

set80211roaming(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1029

if (iseq(val, "device")) {

sbin/ifconfig/ifieee80211.c

1031

} else if (iseq(val, "auto")) {

sbin/ifconfig/ifieee80211.c

1033

} else if (iseq(val, "manual")) {

sbin/ifconfig/ifieee80211.c

1042

set80211wme(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1049

set80211hidessid(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1056

set80211apbridge(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1063

set80211fastframes(const char *val __unused, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1070

set80211dturbo(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1077

set80211chanlist(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1083

temp = strdup(val);

sbin/ifconfig/ifieee80211.c

1128

set80211bssid(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1131

if (!isanyarg(val)) {

sbin/ifconfig/ifieee80211.c

1135

temp = malloc(strlen(val) + 2); /* ':' and '\0' */

sbin/ifconfig/ifieee80211.c

1139

strcpy(temp + 1, val);

sbin/ifconfig/ifieee80211.c

1170

set80211cwmin(const char *ac, const char *val, int s,

sbin/ifconfig/ifieee80211.c

1173

set80211(s, IEEE80211_IOC_WME_CWMIN, atoi(val), getac(ac), NULL);

sbin/ifconfig/ifieee80211.c

1177

set80211cwmax(const char *ac, const char *val, int s,

sbin/ifconfig/ifieee80211.c

1180

set80211(s, IEEE80211_IOC_WME_CWMAX, atoi(val), getac(ac), NULL);

sbin/ifconfig/ifieee80211.c

1184

set80211aifs(const char *ac, const char *val, int s,

sbin/ifconfig/ifieee80211.c

1187

set80211(s, IEEE80211_IOC_WME_AIFS, atoi(val), getac(ac), NULL);

sbin/ifconfig/ifieee80211.c

1191

set80211txoplimit(const char *ac, const char *val, int s,

sbin/ifconfig/ifieee80211.c

1194

set80211(s, IEEE80211_IOC_WME_TXOPLIMIT, atoi(val), getac(ac), NULL);

sbin/ifconfig/ifieee80211.c

1226

set80211bsscwmin(const char *ac, const char *val, int s,

sbin/ifconfig/ifieee80211.c

1229

set80211(s, IEEE80211_IOC_WME_CWMIN, atoi(val),

sbin/ifconfig/ifieee80211.c

1234

set80211bsscwmax(const char *ac, const char *val, int s,

sbin/ifconfig/ifieee80211.c

1237

set80211(s, IEEE80211_IOC_WME_CWMAX, atoi(val),

sbin/ifconfig/ifieee80211.c

1242

set80211bssaifs(const char *ac, const char *val, int s,

sbin/ifconfig/ifieee80211.c

1245

set80211(s, IEEE80211_IOC_WME_AIFS, atoi(val),

sbin/ifconfig/ifieee80211.c

1250

set80211bsstxoplimit(const char *ac, const char *val, int s,

sbin/ifconfig/ifieee80211.c

1253

set80211(s, IEEE80211_IOC_WME_TXOPLIMIT, atoi(val),

sbin/ifconfig/ifieee80211.c

1258

set80211dtimperiod(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1261

set80211(s, IEEE80211_IOC_DTIM_PERIOD, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1265

set80211bintval(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1268

set80211(s, IEEE80211_IOC_BEACON_INTERVAL, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1272

set80211macmac(int s, int op, const char *val)

sbin/ifconfig/ifieee80211.c

1277

temp = malloc(strlen(val) + 2); /* ':' and '\0' */

sbin/ifconfig/ifieee80211.c

1281

strcpy(temp + 1, val);

sbin/ifconfig/ifieee80211.c

1291

set80211addmac(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1294

set80211macmac(s, IEEE80211_IOC_ADDMAC, val);

sbin/ifconfig/ifieee80211.c

1298

set80211delmac(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1301

set80211macmac(s, IEEE80211_IOC_DELMAC, val);

sbin/ifconfig/ifieee80211.c

1305

set80211kickmac(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1312

temp = malloc(strlen(val) + 2); /* ':' and '\0' */

sbin/ifconfig/ifieee80211.c

1316

strcpy(temp + 1, val);

sbin/ifconfig/ifieee80211.c

1330

set80211maccmd(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1337

set80211meshrtmac(int s, int req, const char *val)

sbin/ifconfig/ifieee80211.c

1342

temp = malloc(strlen(val) + 2); /* ':' and '\0' */

sbin/ifconfig/ifieee80211.c

1346

strcpy(temp + 1, val);

sbin/ifconfig/ifieee80211.c

1357

set80211addmeshrt(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1360

set80211meshrtmac(s, IEEE80211_MESH_RTCMD_ADD, val);

sbin/ifconfig/ifieee80211.c

1364

set80211delmeshrt(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1367

set80211meshrtmac(s, IEEE80211_MESH_RTCMD_DELETE, val);

sbin/ifconfig/ifieee80211.c

1371

set80211meshrtcmd(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1378

set80211hwmprootmode(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1383

if (iseq(val, "normal"))

sbin/ifconfig/ifieee80211.c

1385

else if (iseq(val, "proactive"))

sbin/ifconfig/ifieee80211.c

1387

else if (iseq(val, "rann"))

sbin/ifconfig/ifieee80211.c

1395

set80211hwmpmaxhops(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1398

set80211(s, IEEE80211_IOC_HWMP_MAXHOPS, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1402

set80211pureg(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1409

set80211bgscan(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1416

set80211bgscanidle(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1419

set80211(s, IEEE80211_IOC_BGSCAN_IDLE, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1423

set80211bgscanintvl(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1426

set80211(s, IEEE80211_IOC_BGSCAN_INTERVAL, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1430

set80211scanvalid(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1433

set80211(s, IEEE80211_IOC_SCANVALID, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1447

getmodeflags(const char *val)

sbin/ifconfig/ifieee80211.c

1454

cp = strchr(val, ':');

sbin/ifconfig/ifieee80211.c

1493

val, *cp);

sbin/ifconfig/ifieee80211.c

151

static void set80211(int s, int type, int val, int len, void *data);

sbin/ifconfig/ifieee80211.c

154

static int get80211val(int s, int type, int *val);

sbin/ifconfig/ifieee80211.c

155

static const char *get_string(const char *val, const char *sep,

sbin/ifconfig/ifieee80211.c

1569

set80211roamrssi(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1572

double v = atof(val);

sbin/ifconfig/ifieee80211.c

1578

flags = getmodeflags(val);

sbin/ifconfig/ifieee80211.c

1589

getrate(const char *val, const char *tag)

sbin/ifconfig/ifieee80211.c

1591

double v = atof(val);

sbin/ifconfig/ifieee80211.c

1601

set80211roamrate(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1606

rate = getrate(val, "roam");

sbin/ifconfig/ifieee80211.c

1607

flags = getmodeflags(val);

sbin/ifconfig/ifieee80211.c

1618

set80211mcastrate(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1623

rate = getrate(val, "mcast");

sbin/ifconfig/ifieee80211.c

1624

flags = getmodeflags(val);

sbin/ifconfig/ifieee80211.c

1635

set80211mgtrate(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1640

rate = getrate(val, "mgmt");

sbin/ifconfig/ifieee80211.c

1641

flags = getmodeflags(val);

sbin/ifconfig/ifieee80211.c

1652

set80211ucastrate(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1658

flags = getmodeflags(val);

sbin/ifconfig/ifieee80211.c

1659

if (isanyarg(val)) {

sbin/ifconfig/ifieee80211.c

1668

rate = getrate(val, "ucast");

sbin/ifconfig/ifieee80211.c

1679

set80211maxretry(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1682

int v = atoi(val), flags;

sbin/ifconfig/ifieee80211.c

1684

flags = getmodeflags(val);

sbin/ifconfig/ifieee80211.c

1697

set80211fragthreshold(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1701

isundefarg(val) ? IEEE80211_FRAG_MAX : atoi(val),

sbin/ifconfig/ifieee80211.c

1706

set80211bmissthreshold(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1710

isundefarg(val) ? IEEE80211_HWBMISS_MAX : atoi(val),

sbin/ifconfig/ifieee80211.c

1715

set80211burst(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1722

set80211doth(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1729

set80211dfs(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1736

set80211shortgi(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1745

set80211ampdu(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1761

set80211ampdulimit(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1766

switch (atoi(val)) {

sbin/ifconfig/ifieee80211.c

1784

errx(-1, "invalid A-MPDU limit %s", val);

sbin/ifconfig/ifieee80211.c

1790

set80211ampdudensity(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1795

if (isanyarg(val) || iseq(val, "na"))

sbin/ifconfig/ifieee80211.c

1797

else switch ((int)(atof(val)*4)) {

sbin/ifconfig/ifieee80211.c

1823

errx(-1, "invalid A-MPDU density %s", val);

sbin/ifconfig/ifieee80211.c

1829

set80211amsdu(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1845

set80211amsdulimit(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1848

set80211(s, IEEE80211_IOC_AMSDU_LIMIT, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1852

set80211puren(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1859

set80211htcompat(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1866

set80211htconf(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1874

set80211dwds(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1881

set80211inact(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1888

set80211tsn(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1895

set80211dotd(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1902

set80211smps(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1909

set80211rifs(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

1916

set80211tdmaslot(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1919

set80211(s, IEEE80211_IOC_TDMA_SLOT, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1923

set80211tdmaslotcnt(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1926

set80211(s, IEEE80211_IOC_TDMA_SLOTCNT, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1930

set80211tdmaslotlen(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1933

set80211(s, IEEE80211_IOC_TDMA_SLOTLEN, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1937

set80211tdmabintval(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1940

set80211(s, IEEE80211_IOC_TDMA_BINTERVAL, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1944

set80211meshttl(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1947

set80211(s, IEEE80211_IOC_MESH_TTL, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1951

set80211meshforward(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1954

set80211(s, IEEE80211_IOC_MESH_FWRD, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1958

set80211meshpeering(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1961

set80211(s, IEEE80211_IOC_MESH_AP, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

1965

set80211meshmetric(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1970

memcpy(v, val, sizeof(v));

sbin/ifconfig/ifieee80211.c

1975

set80211meshpath(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

1980

memcpy(v, val, sizeof(v));

sbin/ifconfig/ifieee80211.c

2335

set80211regdomain(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

2341

rd = lib80211_regdomain_findbyname(rdp, val);

sbin/ifconfig/ifieee80211.c

2344

long sku = strtol(val, &eptr, 0);

sbin/ifconfig/ifieee80211.c

2346

if (eptr != val)

sbin/ifconfig/ifieee80211.c

2348

if (eptr == val || rd == NULL)

sbin/ifconfig/ifieee80211.c

2349

errx(1, "unknown regdomain %s", val);

sbin/ifconfig/ifieee80211.c

2364

set80211country(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

2370

cc = lib80211_country_findbyname(rdp, val);

sbin/ifconfig/ifieee80211.c

2373

long code = strtol(val, &eptr, 0);

sbin/ifconfig/ifieee80211.c

2375

if (eptr != val)

sbin/ifconfig/ifieee80211.c

2377

if (eptr == val || cc == NULL)

sbin/ifconfig/ifieee80211.c

2378

errx(1, "unknown ISO country code %s", val);

sbin/ifconfig/ifieee80211.c

2389

set80211location(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

2398

set80211ecm(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

3551

set80211scan(const char *val __unused, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

367

int val;

sbin/ifconfig/ifieee80211.c

369

if (get80211val(s, IEEE80211_IOC_CHANNEL, &val) < 0)

sbin/ifconfig/ifieee80211.c

372

mapchan(&curchan, val, 0);

sbin/ifconfig/ifieee80211.c

3966

get80211wme(int s, int param, int ac, int *val)

sbin/ifconfig/ifieee80211.c

3980

*val = ireq.i_val;

sbin/ifconfig/ifieee80211.c

3987

int val;

sbin/ifconfig/ifieee80211.c

3992

if (get80211wme(s, IEEE80211_IOC_WME_CWMIN, ac, &val) != -1)

sbin/ifconfig/ifieee80211.c

3993

printf(" cwmin %2u", val);

sbin/ifconfig/ifieee80211.c

3994

if (get80211wme(s, IEEE80211_IOC_WME_CWMAX, ac, &val) != -1)

sbin/ifconfig/ifieee80211.c

3995

printf(" cwmax %2u", val);

sbin/ifconfig/ifieee80211.c

3996

if (get80211wme(s, IEEE80211_IOC_WME_AIFS, ac, &val) != -1)

sbin/ifconfig/ifieee80211.c

3997

printf(" aifs %2u", val);

sbin/ifconfig/ifieee80211.c

3998

if (get80211wme(s, IEEE80211_IOC_WME_TXOPLIMIT, ac, &val) != -1)

sbin/ifconfig/ifieee80211.c

3999

printf(" txopLimit %3u", val);

sbin/ifconfig/ifieee80211.c

4000

if (get80211wme(s, IEEE80211_IOC_WME_ACM, ac, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4001

if (val)

sbin/ifconfig/ifieee80211.c

4008

if (get80211wme(s, IEEE80211_IOC_WME_ACKPOLICY, ac, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4009

if (!val)

sbin/ifconfig/ifieee80211.c

4499

int i, num, wpa, wme, bgscan, bgscaninterval, val, wepmode;

sbin/ifconfig/ifieee80211.c

4563

if (get80211val(s, IEEE80211_IOC_AUTHMODE, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4564

switch (val) {

sbin/ifconfig/ifieee80211.c

4596

LINE_CHECK("authmode UNKNOWN (0x%x)", val);

sbin/ifconfig/ifieee80211.c

4602

if (get80211val(s, IEEE80211_IOC_WPS, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4603

if (val)

sbin/ifconfig/ifieee80211.c

4608

if (get80211val(s, IEEE80211_IOC_TSN, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4609

if (val)

sbin/ifconfig/ifieee80211.c

4614

if (ioctl(s, IEEE80211_IOC_COUNTERMEASURES, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4615

if (val)

sbin/ifconfig/ifieee80211.c

4675

if (get80211val(s, IEEE80211_IOC_WEPTXKEY, &val) < 0) {

sbin/ifconfig/ifieee80211.c

4679

if (val != -1)

sbin/ifconfig/ifieee80211.c

4680

LINE_CHECK("deftxkey %d", val+1);

sbin/ifconfig/ifieee80211.c

4708

if (get80211val(s, IEEE80211_IOC_POWERSAVE, &val) != -1 &&

sbin/ifconfig/ifieee80211.c

4709

val != IEEE80211_POWERSAVE_NOSUP ) {

sbin/ifconfig/ifieee80211.c

4710

if (val != IEEE80211_POWERSAVE_OFF || verbose) {

sbin/ifconfig/ifieee80211.c

4711

switch (val) {

sbin/ifconfig/ifieee80211.c

4725

if (get80211val(s, IEEE80211_IOC_POWERSAVESLEEP, &val) != -1)

sbin/ifconfig/ifieee80211.c

4726

LINE_CHECK("powersavesleep %d", val);

sbin/ifconfig/ifieee80211.c

4730

if (get80211val(s, IEEE80211_IOC_TXPOWER, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4731

if (val & 1)

sbin/ifconfig/ifieee80211.c

4732

LINE_CHECK("txpower %d.5", val/2);

sbin/ifconfig/ifieee80211.c

4734

LINE_CHECK("txpower %d", val/2);

sbin/ifconfig/ifieee80211.c

4737

if (get80211val(s, IEEE80211_IOC_TXPOWMAX, &val) != -1)

sbin/ifconfig/ifieee80211.c

4738

LINE_CHECK("txpowmax %.1f", val/2.);

sbin/ifconfig/ifieee80211.c

4741

if (get80211val(s, IEEE80211_IOC_DOTD, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4742

if (val)

sbin/ifconfig/ifieee80211.c

4748

if (get80211val(s, IEEE80211_IOC_RTSTHRESHOLD, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4749

if (val != IEEE80211_RTS_MAX || verbose)

sbin/ifconfig/ifieee80211.c

4750

LINE_CHECK("rtsthreshold %d", val);

sbin/ifconfig/ifieee80211.c

4753

if (get80211val(s, IEEE80211_IOC_FRAGTHRESHOLD, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4754

if (val != IEEE80211_FRAG_MAX || verbose)

sbin/ifconfig/ifieee80211.c

4755

LINE_CHECK("fragthreshold %d", val);

sbin/ifconfig/ifieee80211.c

4758

if (get80211val(s, IEEE80211_IOC_BMISSTHRESHOLD, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4759

if (val != IEEE80211_HWBMISS_MAX || verbose)

sbin/ifconfig/ifieee80211.c

4760

LINE_CHECK("bmiss %d", val);

sbin/ifconfig/ifieee80211.c

4783

if (get80211val(s, IEEE80211_IOC_SCANVALID, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4784

if (val != bgscaninterval || verbose)

sbin/ifconfig/ifieee80211.c

4785

LINE_CHECK("scanvalid %u", val);

sbin/ifconfig/ifieee80211.c

4798

if (get80211val(s, IEEE80211_IOC_BGSCAN_IDLE, &val) != -1)

sbin/ifconfig/ifieee80211.c

4799

LINE_CHECK("bgscanidle %u", val);

sbin/ifconfig/ifieee80211.c

4815

if (get80211val(s, IEEE80211_IOC_PUREG, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4816

if (val)

sbin/ifconfig/ifieee80211.c

4821

if (get80211val(s, IEEE80211_IOC_PROTMODE, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4822

switch (val) {

sbin/ifconfig/ifieee80211.c

4833

LINE_CHECK("protmode UNKNOWN (0x%x)", val);

sbin/ifconfig/ifieee80211.c

4854

if (get80211val(s, IEEE80211_IOC_HTCOMPAT, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4855

if (!val)

sbin/ifconfig/ifieee80211.c

4860

if (get80211val(s, IEEE80211_IOC_AMPDU, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4861

switch (val) {

sbin/ifconfig/ifieee80211.c

4877

if (get80211val(s, IEEE80211_IOC_AMPDU_LIMIT, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4878

switch (val) {

sbin/ifconfig/ifieee80211.c

4893

if (get80211val(s, IEEE80211_IOC_AMPDU_DENSITY, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4894

switch (val) {

sbin/ifconfig/ifieee80211.c

4922

if (get80211val(s, IEEE80211_IOC_AMSDU, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4923

switch (val) {

sbin/ifconfig/ifieee80211.c

4940

if (get80211val(s, IEEE80211_IOC_SHORTGI, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4941

if (val)

sbin/ifconfig/ifieee80211.c

4946

if (get80211val(s, IEEE80211_IOC_HTPROTMODE, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4947

if (val == IEEE80211_PROTMODE_OFF)

sbin/ifconfig/ifieee80211.c

4949

else if (val != IEEE80211_PROTMODE_RTSCTS)

sbin/ifconfig/ifieee80211.c

4950

LINE_CHECK("htprotmode UNKNOWN (0x%x)", val);

sbin/ifconfig/ifieee80211.c

4954

if (get80211val(s, IEEE80211_IOC_PUREN, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4955

if (val)

sbin/ifconfig/ifieee80211.c

4960

if (get80211val(s, IEEE80211_IOC_SMPS, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4961

if (val == IEEE80211_HTCAP_SMPS_DYNAMIC)

sbin/ifconfig/ifieee80211.c

4963

else if (val == IEEE80211_HTCAP_SMPS_ENA)

sbin/ifconfig/ifieee80211.c

4968

if (get80211val(s, IEEE80211_IOC_RIFS, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4969

if (val)

sbin/ifconfig/ifieee80211.c

4984

if (get80211val(s, IEEE80211_IOC_BURST, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4985

if (val)

sbin/ifconfig/ifieee80211.c

4991

if (get80211val(s, IEEE80211_IOC_FF, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4992

if (val)

sbin/ifconfig/ifieee80211.c

4997

if (get80211val(s, IEEE80211_IOC_TURBOP, &val) != -1) {

sbin/ifconfig/ifieee80211.c

4998

if (val)

sbin/ifconfig/ifieee80211.c

5003

if (get80211val(s, IEEE80211_IOC_DWDS, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5004

if (val)

sbin/ifconfig/ifieee80211.c

5011

if (get80211val(s, IEEE80211_IOC_HIDESSID, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5012

if (val)

sbin/ifconfig/ifieee80211.c

5017

if (get80211val(s, IEEE80211_IOC_APBRIDGE, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5018

if (!val)

sbin/ifconfig/ifieee80211.c

5023

if (get80211val(s, IEEE80211_IOC_DTIM_PERIOD, &val) != -1)

sbin/ifconfig/ifieee80211.c

5024

LINE_CHECK("dtimperiod %u", val);

sbin/ifconfig/ifieee80211.c

5026

if (get80211val(s, IEEE80211_IOC_DOTH, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5027

if (!val)

sbin/ifconfig/ifieee80211.c

5032

if (get80211val(s, IEEE80211_IOC_DFS, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5033

if (!val)

sbin/ifconfig/ifieee80211.c

5038

if (get80211val(s, IEEE80211_IOC_INACTIVITY, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5039

if (!val)

sbin/ifconfig/ifieee80211.c

5045

if (get80211val(s, IEEE80211_IOC_ROAMING, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5046

if (val != IEEE80211_ROAMING_AUTO || verbose) {

sbin/ifconfig/ifieee80211.c

5047

switch (val) {

sbin/ifconfig/ifieee80211.c

5059

val);

sbin/ifconfig/ifieee80211.c

5067

if (get80211val(s, IEEE80211_IOC_TDMA_SLOT, &val) != -1)

sbin/ifconfig/ifieee80211.c

5068

LINE_CHECK("tdmaslot %u", val);

sbin/ifconfig/ifieee80211.c

5069

if (get80211val(s, IEEE80211_IOC_TDMA_SLOTCNT, &val) != -1)

sbin/ifconfig/ifieee80211.c

5070

LINE_CHECK("tdmaslotcnt %u", val);

sbin/ifconfig/ifieee80211.c

5071

if (get80211val(s, IEEE80211_IOC_TDMA_SLOTLEN, &val) != -1)

sbin/ifconfig/ifieee80211.c

5072

LINE_CHECK("tdmaslotlen %u", val);

sbin/ifconfig/ifieee80211.c

5073

if (get80211val(s, IEEE80211_IOC_TDMA_BINTERVAL, &val) != -1)

sbin/ifconfig/ifieee80211.c

5074

LINE_CHECK("tdmabintval %u", val);

sbin/ifconfig/ifieee80211.c

5075

} else if (get80211val(s, IEEE80211_IOC_BEACON_INTERVAL, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5077

if (val != 100 || verbose)

sbin/ifconfig/ifieee80211.c

5078

LINE_CHECK("bintval %u", val);

sbin/ifconfig/ifieee80211.c

5087

if (get80211val(s, IEEE80211_IOC_MESH_TTL, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5088

LINE_CHECK("meshttl %u", val);

sbin/ifconfig/ifieee80211.c

5090

if (get80211val(s, IEEE80211_IOC_MESH_AP, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5091

if (val)

sbin/ifconfig/ifieee80211.c

5096

if (get80211val(s, IEEE80211_IOC_MESH_FWRD, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5097

if (val)

sbin/ifconfig/ifieee80211.c

5112

if (get80211val(s, IEEE80211_IOC_HWMP_ROOTMODE, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5113

switch (val) {

sbin/ifconfig/ifieee80211.c

5127

LINE_CHECK("hwmprootmode UNKNOWN(%d)", val);

sbin/ifconfig/ifieee80211.c

5131

if (get80211val(s, IEEE80211_IOC_HWMP_MAXHOPS, &val) != -1) {

sbin/ifconfig/ifieee80211.c

5132

LINE_CHECK("hwmpmaxhops %u", val);

sbin/ifconfig/ifieee80211.c

5170

get80211val(int s, int type, int *val)

sbin/ifconfig/ifieee80211.c

5179

*val = ireq.i_val;

sbin/ifconfig/ifieee80211.c

5184

set80211(int s, int type, int val, int len, void *data)

sbin/ifconfig/ifieee80211.c

5191

ireq.i_val = val;

sbin/ifconfig/ifieee80211.c

5200

get_string(const char *val, const char *sep, u_int8_t *buf, int *lenp)

sbin/ifconfig/ifieee80211.c

5208

hexstr = (val[0] == '0' && tolower((u_char)val[1]) == 'x');

sbin/ifconfig/ifieee80211.c

5210

val += 2;

sbin/ifconfig/ifieee80211.c

5212

if (*val == '\0')

sbin/ifconfig/ifieee80211.c

5214

if (sep != NULL && strchr(sep, *val) != NULL) {

sbin/ifconfig/ifieee80211.c

5215

val++;

sbin/ifconfig/ifieee80211.c

5219

if (!isxdigit((u_char)val[0])) {

sbin/ifconfig/ifieee80211.c

5223

if (!isxdigit((u_char)val[1])) {

sbin/ifconfig/ifieee80211.c

5237

*p++ = (tohex((u_char)val[0]) << 4) |

sbin/ifconfig/ifieee80211.c

5238

tohex((u_char)val[1]);

sbin/ifconfig/ifieee80211.c

5240

val += 2;

sbin/ifconfig/ifieee80211.c

5242

*p++ = *val++;

sbin/ifconfig/ifieee80211.c

5252

return val;

sbin/ifconfig/ifieee80211.c

5367

set80211clone_beacons(const char *val __unused, int d, int s __unused,

sbin/ifconfig/ifieee80211.c

5378

set80211clone_bssid(const char *val __unused, int d, int s __unused,

sbin/ifconfig/ifieee80211.c

5388

set80211clone_wdslegacy(const char *val __unused, int d, int s __unused,

sbin/ifconfig/ifieee80211.c

573

set80211ssid(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

581

len = strlen(val);

sbin/ifconfig/ifieee80211.c

582

if (len > 2 && isdigit((int)val[0]) && val[1] == ':') {

sbin/ifconfig/ifieee80211.c

583

ssid = atoi(val)-1;

sbin/ifconfig/ifieee80211.c

584

val += 2;

sbin/ifconfig/ifieee80211.c

589

if (get_string(val, NULL, data, &len) == NULL)

sbin/ifconfig/ifieee80211.c

596

set80211meshid(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

604

if (get_string(val, NULL, data, &len) == NULL)

sbin/ifconfig/ifieee80211.c

611

set80211stationname(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

619

get_string(val, NULL, data, &len);

sbin/ifconfig/ifieee80211.c

637

getchannelflags(const char *val, int freq)

sbin/ifconfig/ifieee80211.c

645

cp = strchr(val, ':');

sbin/ifconfig/ifieee80211.c

679

val, *cp);

sbin/ifconfig/ifieee80211.c

683

cp = strchr(val, '/');

sbin/ifconfig/ifieee80211.c

706

errx(-1, "%s: Invalid channel width\n", val);

sbin/ifconfig/ifieee80211.c

746

getchannel(int s, struct ieee80211_channel *chan, const char *val)

sbin/ifconfig/ifieee80211.c

752

if (isanyarg(val)) {

sbin/ifconfig/ifieee80211.c

758

v = strtol(val, &eptr, 10);

sbin/ifconfig/ifieee80211.c

759

if (val[0] == '\0' || val == eptr || errno == ERANGE ||

sbin/ifconfig/ifieee80211.c

764

flags = getchannelflags(val, v);

sbin/ifconfig/ifieee80211.c

773

set80211channel(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

778

getchannel(s, &chan, val);

sbin/ifconfig/ifieee80211.c

783

set80211chanswitch(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

788

getchannel(s, &csr.csa_chan, val);

sbin/ifconfig/ifieee80211.c

795

set80211authmode(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

800

if (iseq(val, "none")) {

sbin/ifconfig/ifieee80211.c

802

} else if (iseq(val, "open")) {

sbin/ifconfig/ifieee80211.c

804

} else if (iseq(val, "shared")) {

sbin/ifconfig/ifieee80211.c

806

} else if (iseq(val, "8021x")) {

sbin/ifconfig/ifieee80211.c

808

} else if (iseq(val, "wpa")) {

sbin/ifconfig/ifieee80211.c

818

set80211powersavemode(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

823

if (iseq(val, "off")) {

sbin/ifconfig/ifieee80211.c

825

} else if (iseq(val, "on")) {

sbin/ifconfig/ifieee80211.c

827

} else if (iseq(val, "cam")) {

sbin/ifconfig/ifieee80211.c

829

} else if (iseq(val, "psp")) {

sbin/ifconfig/ifieee80211.c

831

} else if (iseq(val, "psp-cam")) {

sbin/ifconfig/ifieee80211.c

841

set80211powersave(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

850

set80211powersavesleep(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

853

set80211(s, IEEE80211_IOC_POWERSAVESLEEP, atoi(val), 0, NULL);

sbin/ifconfig/ifieee80211.c

857

set80211wepmode(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

862

if (iseq(val, "off")) {

sbin/ifconfig/ifieee80211.c

864

} else if (iseq(val, "on")) {

sbin/ifconfig/ifieee80211.c

866

} else if (iseq(val, "mixed")) {

sbin/ifconfig/ifieee80211.c

876

set80211wep(const char *val __unused, int d, int s,

sbin/ifconfig/ifieee80211.c

889

set80211weptxkey(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

893

(isundefarg(val) ? IEEE80211_KEYIX_NONE : atoi(val)-1),

sbin/ifconfig/ifieee80211.c

898

set80211wepkey(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

905

if (isdigit((int)val[0]) && val[1] == ':') {

sbin/ifconfig/ifieee80211.c

906

key = atoi(val)-1;

sbin/ifconfig/ifieee80211.c

907

val += 2;

sbin/ifconfig/ifieee80211.c

912

get_string(val, NULL, data, &len);

sbin/ifconfig/ifieee80211.c

923

set80211nwkey(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

932

if (isdigit((int)val[0]) && val[1] == ':') {

sbin/ifconfig/ifieee80211.c

933

txkey = val[0]-'0'-1;

sbin/ifconfig/ifieee80211.c

934

val += 2;

sbin/ifconfig/ifieee80211.c

939

val = get_string(val, ",", data, &len);

sbin/ifconfig/ifieee80211.c

940

if (val == NULL)

sbin/ifconfig/ifieee80211.c

948

get_string(val, NULL, data, &len);

sbin/ifconfig/ifieee80211.c

962

set80211rtsthreshold(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

966

(isundefarg(val) ? IEEE80211_RTS_MAX : atoi(val)),

sbin/ifconfig/ifieee80211.c

971

set80211protmode(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

976

if (iseq(val, "off")) {

sbin/ifconfig/ifieee80211.c

978

} else if (iseq(val, "cts")) {

sbin/ifconfig/ifieee80211.c

980

} else if (ismatch(val, "rts")) {

sbin/ifconfig/ifieee80211.c

990

set80211htprotmode(const char *val, int d __unused, int s,

sbin/ifconfig/ifieee80211.c

995

if (iseq(val, "off")) {

sbin/ifconfig/ifieee80211.c

997

} else if (ismatch(val, "rts")) {

sbin/ifconfig/iflagg.c

29

setlaggport(const char *val, int d __unused, int s,

sbin/ifconfig/iflagg.c

36

strlcpy(rp.rp_portname, val, sizeof(rp.rp_portname));

sbin/ifconfig/iflagg.c

46

IfName, val, strerror(errno));

sbin/ifconfig/iflagg.c

52

unsetlaggport(const char *val, int d __unused, int s,

sbin/ifconfig/iflagg.c

59

strlcpy(rp.rp_portname, val, sizeof(rp.rp_portname));

sbin/ifconfig/iflagg.c

66

setlaggproto(const char *val, int d __unused, int s,

sbin/ifconfig/iflagg.c

77

if (strcmp(val, lpr[i].lpr_name) == 0) {

sbin/ifconfig/iflagg.c

83

errx(1, "Invalid aggregation protocol: %s", val);

sbin/ifconfig/iflagg.c

91

setlagghash(const char *val, int d __unused, int s,

sbin/ifconfig/iflagg.c

98

str = tmp = strdup(val);

sbin/ifconfig/ifmedia.c

267

setmedia(const char *val, int d __unused, int s,

sbin/ifconfig/ifmedia.c

284

subtype = get_media_subtype(IFM_TYPE(ifmr->ifm_ulist[0]), val);

sbin/ifconfig/ifmedia.c

296

setmediaopt(const char *val, int d __unused, int s,

sbin/ifconfig/ifmedia.c

299

domediaopt(val, 0, s);

sbin/ifconfig/ifmedia.c

303

unsetmediaopt(const char *val, int d __unused, int s,

sbin/ifconfig/ifmedia.c

306

domediaopt(val, 1, s);

sbin/ifconfig/ifmedia.c

310

domediaopt(const char *val, int clear, int s)

sbin/ifconfig/ifmedia.c

317

options = get_media_options(IFM_TYPE(ifmr->ifm_ulist[0]), val);

sbin/ifconfig/ifmedia.c

328

setmediamode(const char *val, int d __unused, int s,

sbin/ifconfig/ifmedia.c

336

mode = get_media_mode(IFM_TYPE(ifmr->ifm_ulist[0]), val);

sbin/ifconfig/ifmedia.c

468

get_media_subtype(int type, const char *val)

sbin/ifconfig/ifmedia.c

483

rval = lookup_media_word(ttos->subtypes[i].desc, val);

sbin/ifconfig/ifmedia.c

487

errx(1, "unknown media subtype: %s", val);

sbin/ifconfig/ifmedia.c

492

get_media_mode(int type, const char *val)

sbin/ifconfig/ifmedia.c

507

rval = lookup_media_word(ttos->modes[i].desc, val);

sbin/ifconfig/ifmedia.c

515

get_media_options(int type, const char *val)

sbin/ifconfig/ifmedia.c

523

optlist = strdup(val);

sbin/ifconfig/ifmedia.c

556

lookup_media_word(struct ifmedia_description *desc, const char *val)

sbin/ifconfig/ifmedia.c

560

if (strcasecmp(desc->ifmt_string, val) == 0)

sbin/ifconfig/ifvlan.c

101

strlcpy(__vreq.vlr_parent, val, sizeof(__vreq.vlr_parent));

sbin/ifconfig/ifvlan.c

106

unsetvlandev(const char *val, int d __unused, int s,

sbin/ifconfig/ifvlan.c

111

if (val != NULL)

sbin/ifconfig/ifvlan.c

80

setvlantag(const char *val, int d __unused, int s __unused,

sbin/ifconfig/ifvlan.c

86

ul = strtoul(val, &endp, 0);

sbin/ifconfig/ifvlan.c

98

setvlandev(const char *val, int d __unused, int s __unused,

sbin/ip6fw/ip6fw.c

595

u_long val;

sbin/ip6fw/ip6fw.c

598

val = strtoul(str, &s, 0);

sbin/ip6fw/ip6fw.c

599

if (s != str && *s == '\0' && val < 0x100) {

sbin/ip6fw/ip6fw.c

600

*codep = val;

sbin/ip6fw/ip6fw.c

623

int val;

sbin/ip6fw/ip6fw.c

629

val = (int) strtoul(buf, &earg, 0);

sbin/ip6fw/ip6fw.c

633

val = htons(s->s_port);

sbin/ip6fw/ip6fw.c

638

val = -1;

sbin/ip6fw/ip6fw.c

641

if (val < 0 || val > 0xffff) {

sbin/ip6fw/ip6fw.c

645

val = -1;

sbin/ip6fw/ip6fw.c

648

return(val);

sbin/ipfw/ipfw2.c

2012

int val;

sbin/ipfw/ipfw2.c

2023

val = match_token(flags, p);

sbin/ipfw/ipfw2.c

2024

if (val <= 0)

sbin/ipfw/ipfw2.c

2026

*which |= (u_int8_t)val;

sbin/ipfw/ipfw2.c

2111

unsigned long val;

sbin/ipfw/ipfw2.c

2114

val = strtoul(str, &end, 0);

sbin/ipfw/ipfw2.c

2117

val *= kb;

sbin/ipfw/ipfw2.c

2120

val *= kb * kb;

sbin/ipfw/ipfw2.c

2144

val *= 8;

sbin/ipfw/ipfw2.c

2145

return(val);

sbin/ipfw/ipfw2.c

3301

int val;

sbin/ipfw/ipfw2.c

3303

val = match_token(limit_masks, *av);

sbin/ipfw/ipfw2.c

3304

if (val <= 0)

sbin/ipfw/ipfw2.c

3306

c->limit_mask |= val;

sbin/ipfw/ipfw2.c

3762

in_addr_t val;

sbin/ipfw/ipfw2.c

3766

val = inet_network(*av);

sbin/ipfw/ipfw2.c

3768

if (val == INADDR_NONE) {

sbin/ipfw/ipfw2.c

3778

inet_makenetandmask(val, &te->key, &te->netmask, bits);

sbin/ipfw/ipfw2.c

568

int val;

sbin/ipfw/ipfw2.c

571

val = strtoul(str, &s1, 0);

sbin/ipfw/ipfw2.c

572

if (s1 == str || *s1 != '\0' || val >= 0x100)

sbin/ipfw/ipfw2.c

573

val = match_token(icmpcodes, str);

sbin/ipfw/ipfw2.c

574

if (val < 0)

sbin/ipfw/ipfw2.c

576

*codep = val;

sbin/ipfw3/ipfw3.c

106

return table->val;

sbin/ipfw3/ipfw3.h

115

int val;

sbin/ipfw3/ipfw3dummynet.c

644

unsigned long val;

sbin/ipfw3/ipfw3dummynet.c

648

val = strtoul(str, &end, 0);

sbin/ipfw3/ipfw3dummynet.c

651

val *= kb;

sbin/ipfw3/ipfw3dummynet.c

654

val *= kb * kb;

sbin/ipfw3/ipfw3dummynet.c

678

val *= 8;

sbin/ipfw3/ipfw3dummynet.c

680

return(val);

sbin/iscontrol/fsm.c

125

if((val = getaddrinfo(op->targetAddress, pbuf, &hints, &res0)) != 0) {

sbin/iscontrol/fsm.c

126

fprintf(stderr, "getaddrinfo(%s): %s\n", op->targetAddress, gai_strerror(val));

sbin/iscontrol/fsm.c

139

val = 1;

sbin/iscontrol/fsm.c

140

if(setsockopt(soc, SOL_SOCKET, SO_REUSEADDR, &val, (socklen_t)sizeof(val)) < 0) {

sbin/iscontrol/fsm.c

157

if(setsockopt(sess->soc, IPPROTO_TCP, TCP_NODELAY, &val, sizeof(val)) < 0)

sbin/iscontrol/fsm.c

164

val = 1;

sbin/iscontrol/fsm.c

165

if(setsockopt(sess->soc, IPPROTO_TCP, TCP_KEEPALIVE, &val, sizeof(val)) < 0)

sbin/iscontrol/fsm.c

169

if(setsockopt(sess->soc, IPPROTO_TCP, TCP_NODELAY, &val, sizeof(val)) < 0)

sbin/iscontrol/fsm.c

183

int len = sizeof(val);

sbin/iscontrol/fsm.c

184

if(getsockopt(sess->soc, SOL_SOCKET, SO_SNDBUF, &val, &len) == 0)

sbin/iscontrol/fsm.c

185

fprintf(stderr, "was: SO_SNDBUF=%dK\n", val/1024);

sbin/iscontrol/fsm.c

189

val = sess->op->sockbufsize * 1024;

sbin/iscontrol/fsm.c

190

if((setsockopt(sess->soc, SOL_SOCKET, SO_SNDBUF, &val, sizeof(val)) < 0)

sbin/iscontrol/fsm.c

191

|| (setsockopt(sess->soc, SOL_SOCKET, SO_RCVBUF, &val, sizeof(val)) < 0)) {

sbin/iscontrol/fsm.c

193

val, errno, strerror(errno));

sbin/iscontrol/fsm.c

401

int sig, val;

sbin/iscontrol/fsm.c

472

val = 0;

sbin/iscontrol/fsm.c

473

if(ioctl(sess->fd, ISCSISTOP, &val)) {

sbin/iscontrol/fsm.c

73

int val, sv_errno, soc;

sbin/iscontrol/iscontrol.c

120

return tp->val;

sbin/iscontrol/iscontrol.h

95

int val;

sbin/mount_cd9660/mount_cd9660.c

324

long val;

sbin/mount_cd9660/mount_cd9660.c

328

val = strtol(s, &ep, 8);

sbin/mount_cd9660/mount_cd9660.c

329

if (errno != 0 || *ep != '\0' || val <= 0 || val > (long)ALLPERMS)

sbin/mount_cd9660/mount_cd9660.c

332

return (mode_t)val;

sbin/mountctl/mountctl.c

303

char *val;

sbin/mountctl/mountctl.c

315

if ((val = strchr(name, '=')) != NULL)

sbin/mountctl/mountctl.c

316

*val++ = 0;

sbin/mountctl/mountctl.c

345

if (val) {

sbin/mountctl/mountctl.c

346

if ((memfifo_opt = getsize(val)) == 0)

sbin/mountctl/mountctl.c

350

if (val) {

sbin/mountctl/mountctl.c

352

if ((swapfifo_opt = getsize(val)) == 0)

sbin/mountctl/mountctl.c

362

if (val)

sbin/mountctl/mountctl.c

363

*xopt = val;

sbin/mountctl/mountctl.c

367

if (val)

sbin/mountctl/mountctl.c

368

*wopt = val;

sbin/mountctl/mountctl.c

397

if (hasval && val == NULL) {

sbin/mountctl/mountctl.c

401

if (hasval == 0 && val) {

sbin/mountctl/mountctl.c

589

int64_t val;

sbin/mountctl/mountctl.c

591

val = strtoll(str, &suffix, 0);

sbin/mountctl/mountctl.c

597

val *= 1024;

sbin/mountctl/mountctl.c

600

val *= 1024;

sbin/mountctl/mountctl.c

603

val *= 1024;

sbin/mountctl/mountctl.c

606

val *= 1024;

sbin/mountctl/mountctl.c

614

return(val);

sbin/mountd/mountd.c

1196

if (ep->ex_fs.val[0] != fsb.f_fsid.val[0] ||

sbin/mountd/mountd.c

1197

ep->ex_fs.val[1] != fsb.f_fsid.val[1]) {

sbin/mountd/mountd.c

1218

fsb.f_fsid.val[0],

sbin/mountd/mountd.c

1219

fsb.f_fsid.val[1]);

sbin/mountd/mountd.c

1222

fsb.f_fsid.val[0],

sbin/mountd/mountd.c

1223

fsb.f_fsid.val[1]);

sbin/mountd/mountd.c

1504

if (ep->ex_fs.val[0] == fsid->val[0] &&

sbin/mountd/mountd.c

1505

ep->ex_fs.val[1] == fsid->val[1])

sbin/newfs_hammer/newfs_hammer.c

413

int64_t val;

sbin/newfs_hammer/newfs_hammer.c

416

val = strtoll(str, &ptr, 0);

sbin/newfs_hammer/newfs_hammer.c

420

val *= 1024;

sbin/newfs_hammer/newfs_hammer.c

424

val *= 1024;

sbin/newfs_hammer/newfs_hammer.c

428

val *= 1024;

sbin/newfs_hammer/newfs_hammer.c

432

val *= 1024;

sbin/newfs_hammer/newfs_hammer.c

443

if ((powerof2 & 1) && (val ^ (val - 1)) != ((val << 1) - 1)) {

sbin/newfs_hammer/newfs_hammer.c

447

if ((powerof2 & 2) && (val & HAMMER_BUFMASK)) {

sbin/newfs_hammer/newfs_hammer.c

452

return(val);

sbin/newfs_hammer2/mkfs_hammer2.c

199

int64_t val;

sbin/newfs_hammer2/mkfs_hammer2.c

202

val = strtoll(str, &ptr, 0);

sbin/newfs_hammer2/mkfs_hammer2.c

206

val *= 1024;

sbin/newfs_hammer2/mkfs_hammer2.c

210

val *= 1024;

sbin/newfs_hammer2/mkfs_hammer2.c

214

val *= 1024;

sbin/newfs_hammer2/mkfs_hammer2.c

218

val *= 1024;

sbin/newfs_hammer2/mkfs_hammer2.c

228

if (val < minval) {

sbin/newfs_hammer2/mkfs_hammer2.c

233

if (val > maxval) {

sbin/newfs_hammer2/mkfs_hammer2.c

238

if ((powerof2 & 1) && (val ^ (val - 1)) != ((val << 1) - 1)) {

sbin/newfs_hammer2/mkfs_hammer2.c

242

if ((powerof2 & 2) && (val & HAMMER2_NEWFS_ALIGNMASK)) {

sbin/newfs_hammer2/mkfs_hammer2.c

247

return(val);

sbin/newfs_msdos/mkfs_msdos.c

1026

ckgeom(const char *fname, u_int val, const char *msg)

sbin/newfs_msdos/mkfs_msdos.c

1028

if (!val) {

sbin/newfs_msdos/mkfs_msdos.c

1032

if (val > MAXU16) {

sbin/newfs_msdos/mkfs_msdos.c

1033

warnx("%s: illegal %s %d", fname, msg, val);

sbin/rcorder/hash.h

104

#define Hash_SetValue(h, val) ((h)->clientData = (ClientData) (val))

sbin/restore/dirs.c

62

#define INOHASH(val) (val % HASHSIZE)

sbin/restore/tape.c

1005

int32_t val[2];

sbin/restore/tape.c

1084

if (qcvt.val[0] || qcvt.val[1]) {

sbin/restore/tape.c

1091

i = qcvt.val[1];

sbin/restore/tape.c

1092

qcvt.val[1] = qcvt.val[0];

sbin/restore/tape.c

1093

qcvt.val[0] = i;

sbin/route/route.c

1167

if ((val = inet_network(str)) != INADDR_NONE) {

sbin/route/route.c

1169

val, &su->sin, strtoul(q+1, 0, 0));

sbin/route/route.c

1176

val = su->sin.sin_addr.s_addr;

sbin/route/route.c

1181

val = ntohl(val);

sbin/route/route.c

1186

((val = inet_network(str)) != INADDR_NONE ||

sbin/route/route.c

1187

((np = getnetbyname(str)) != NULL && (val = np->n_net) != 0))) {

sbin/route/route.c

1189

inet_makenetandmask(val, &su->sin, 0);

sbin/route/route.c

992

u_long val;

sbin/routed/parms.c

475

char *val,

sbin/routed/parms.c

500

val0 = val;

sbin/routed/parms.c

501

if (0 > parse_quote(&val, "| ,\n\r", &delim,

sbin/routed/parms.c

509

val0 = ++val;

sbin/routed/parms.c

511

if (0 > parse_quote(&val, "| ,\n\r", &delim, buf,sizeof(buf))

sbin/routed/parms.c

527

val0 = ++val;

sbin/routed/parms.c

528

if (NULL != (p = parse_ts(&k.start,&val,val0,&delim,

sbin/routed/parms.c

533

val0 = ++val;

sbin/routed/parms.c

534

if (NULL != (p = parse_ts(&k.end,&val,val0,&delim,

sbin/routed/parms.c

577

char delim, *val0 = NULL, *tgt, *val, *p;

sbin/routed/parms.c

585

&& *(val = &line[sizeof("subnet=")-1]) != '\0') {

sbin/routed/parms.c

586

if (0 > parse_quote(&val, ",", &delim, buf, sizeof(buf)))

sbin/routed/parms.c

592

intnetp->intnet_metric = (int)strtol(val+1,&p,0);

sbin/routed/parms.c

615

&& *(val = &line[sizeof("ripv1_mask=")-1]) != '\0') {

sbin/routed/parms.c

616

if (0 > parse_quote(&val, ",", &delim, buf, sizeof(buf))

sbin/routed/parms.c

619

if ((i = (int)strtol(val+1, &p, 0)) <= 0

sbin/swapon/swapon.c

407

sizetobuf(char *buf, size_t bufsize, int hflag, long long val, int hlen,

sbin/swapon/swapon.c

413

humanize_number(tmp, 5, (int64_t)val, "", HN_AUTOSCALE,

sbin/swapon/swapon.c

417

snprintf(buf, bufsize, "%*lld", hlen, val / blocksize);

sbin/sysctl/sysctl.c

661

set_T_dev_t(const char *path, void **val, size_t *size)

sbin/sysctl/sysctl.c

677

*val = (char*) &statb.st_rdev;

sbin/sysctl/sysctl.c

682

set_IK(const char *str, int *val)

sbin/sysctl/sysctl.c

712

*val = kelv;

sbin/sysctl/sysctl.c

761

u_char buf[BUFSIZ], *val = NULL, *p, *nul;

sbin/sysctl/sysctl.c

804

val = malloc(j + 1);

sbin/sysctl/sysctl.c

805

if (val == NULL)

sbin/sysctl/sysctl.c

809

i = sysctl(oid, nlen, val, &len, 0, 0);

sbin/sysctl/sysctl.c

816

fwrite(val, 1, len, stdout);

sbin/sysctl/sysctl.c

820

val[len] = '\0';

sbin/sysctl/sysctl.c

823

p = val;

sbin/sysctl/sysctl.c

965

while (len-- && (xflag || p < val + 16))

sbin/sysctl/sysctl.c

973

if (val != NULL)

sbin/sysctl/sysctl.c

974

free(val);

sbin/udevd/test_udevd.c

640

_udev_dict_set_int(prop_dictionary_t dict, const char *key, int64_t val)

sbin/udevd/test_udevd.c

644

pn = prop_number_create_integer(val);

sbin/udevd/test_udevd.c

658

_udev_dict_set_uint(prop_dictionary_t dict, const char *key, uint64_t val)

sbin/udevd/test_udevd.c

662

pn = prop_number_create_unsigned_integer(val);

share/examples/ppi/ppilcd.c

309

u_int8_t val;

share/examples/ppi/ppilcd.c

313

hd_gdata(val); /* read data */

share/examples/ppi/ppilcd.c

316

debug(3, "0x%02x -> %s", val, (type == HD_COMMAND) ? "cmd " : "data");

share/examples/ppi/ppilcd.c

317

return(val);

share/examples/ppi/ppilcd.c

367

u_int8_t val;

share/examples/ppi/ppilcd.c

373

val = 0x30;

share/examples/ppi/ppilcd.c

375

val |= 0x08;

share/examples/ppi/ppilcd.c

377

val |= 0x04;

share/examples/ppi/ppilcd.c

378

hd44780_output(HD_COMMAND, val);

share/examples/ppi/ppilcd.c

380

hd44780_output(HD_COMMAND, val);

share/examples/ppi/ppilcd.c

382

hd44780_output(HD_COMMAND, val);

share/examples/ppi/ppilcd.c

384

val = 0x08; /* display off */

share/examples/ppi/ppilcd.c

385

hd44780_output(HD_COMMAND, val);

share/examples/ppi/ppilcd.c

387

val |= 0x04; /* display on */

share/examples/ppi/ppilcd.c

389

val |= 0x02;

share/examples/ppi/ppilcd.c

391

val |= 0x01;

share/examples/ppi/ppilcd.c

392

hd44780_output(HD_COMMAND, val);

share/examples/ppi/ppilcd.c

414

val = hd44780_input(HD_COMMAND) & 0x3f; /* mask character position, save line pos */

share/examples/ppi/ppilcd.c

415

hd44780_output(HD_COMMAND, 0x80 | val);

share/examples/ses/srcs/setencstat.c

49

long val;

share/examples/ses/srcs/setencstat.c

62

val = strtol(v[2], NULL, 0);

share/examples/ses/srcs/setencstat.c

63

stat = (ses_encstat) val;

stand/boot/common/interp_backslash.c

116

char val;

stand/boot/common/interp_backslash.c

123

val = (DIGIT(*str) << 6) + (DIGIT(*(str + 1)) << 3) +

stand/boot/common/interp_backslash.c

128

new_str[i++] = val;

stand/boot/common/interp_backslash.c

140

val = DIGIT(*(str + 2));

stand/boot/common/interp_backslash.c

142

val = (val << 4) + DIGIT(*(str + 3));

stand/boot/common/interp_backslash.c

148

new_str[i++] = val;

stand/boot/common/interp_parse.c

159

if ((val = variable_lookup(p)) != NULL) {

stand/boot/common/interp_parse.c

160

size_t len = strlen(val);

stand/boot/common/interp_parse.c

162

strncpy(buf + i, val, PARSE_BUFSIZE - (i + 1));

stand/boot/common/interp_parse.c

82

char *val, *p, *q, *copy = NULL;

stand/boot/common/load_elf.c

734

Elf_Addr p, void *val, size_t len)

stand/boot/common/load_elf.c

752

ef->off, p, val, len);

stand/boot/common/load_elf.c

76

Elf_Addr p, void *val, size_t len);

stand/boot/common/load_elf.c

760

ef->off, p, val, len);

stand/boot/common/load_elf_obj.c

432

void *val, size_t len)

stand/boot/common/load_elf_obj.c

464

&a, ELF_RELOC_RELA, base, off, val, len);

stand/boot/common/load_elf_obj.c

477

&r, ELF_RELOC_REL, base, off, val, len);

stand/boot/common/load_elf_obj.c

68

Elf_Addr p, void *val, size_t len);

stand/boot/common/reloc_elf.c

101

val = addr;

stand/boot/common/reloc_elf.c

102

*where = val;

stand/boot/common/reloc_elf.c

111

Elf_Addr addend, addr, *where, val;

stand/boot/common/reloc_elf.c

158

val = addr + addend;

stand/boot/common/reloc_elf.c

159

*where = val;

stand/boot/common/reloc_elf.c

53

Elf64_Addr *where, val;

stand/boot/common/reloc_elf.c

96

val = addr + addend;

stand/boot/common/reloc_elf.c

97

*where = val;

stand/boot/efi/loader/main.c

923

char *uuid, *var, *val;

stand/boot/efi/loader/main.c

935

val = argv[3];

stand/boot/efi/loader/main.c

944

strlen(val) + 1, val);

stand/lib/net.c

133

u_long val;

stand/lib/net.c

145

val = 0;

stand/lib/net.c

148

val = (val * 10) + (c - '0');

stand/lib/net.c

161

if (pp >= parts + 3 || val > 0xff)

stand/lib/net.c

163

*pp++ = val, cp++;

stand/lib/net.c

184

if (val > 0xffffff)

stand/lib/net.c

186

val |= parts[0] << 24;

stand/lib/net.c

190

if (val > 0xffff)

stand/lib/net.c

192

val |= (parts[0] << 24) | (parts[1] << 16);

stand/lib/net.c

196

if (val > 0xff)

stand/lib/net.c

198

val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);

stand/lib/net.c

202

return (htonl(val));

stand/lib/netif.c

124

val = netif_match(&cur_if, machdep_hint);

stand/lib/netif.c

127

printf(" [%d -> %d]", s, val);

stand/lib/netif.c

129

if (val > best_val) {

stand/lib/netif.c

130

best_val = val;

stand/lib/netif.c

95

int val;

stand/lib/uuid_to_string.c

43

tohex(char **buf, int len, uint32_t val)

stand/lib/uuid_to_string.c

50

walker[i] = hexstr[val & 0xf];

stand/lib/uuid_to_string.c

51

val >>= 4;

sys/bus/cam/cam_periph.c

446

int i, val, dunit;

sys/bus/cam/cam_periph.c

482

if (resource_int_value(dname, dunit, "target", &val) &&

sys/bus/cam/cam_periph.c

503

int hit, i, val, dunit;

sys/bus/cam/cam_periph.c

520

if (resource_int_value(dname, dunit, "target", &val) == 0) {

sys/bus/cam/cam_periph.c

521

if (val != target)

sys/bus/cam/cam_periph.c

525

if (resource_int_value(dname, dunit, "lun", &val) == 0) {

sys/bus/cam/cam_periph.c

526

if (val != lun)

sys/bus/cam/cam_xpt.c

4528

int i, dunit, val;

sys/bus/cam/cam_xpt.c

4542

if (resource_int_value("scbus", dunit, "bus", &val) == 0) {

sys/bus/cam/cam_xpt.c

4543

if (sim_bus == val) {

sys/bus/cam/scsi/scsi_all.h

1315

scsi_ulto2b(u_int32_t val, u_int8_t *bytes)

sys/bus/cam/scsi/scsi_all.h

1318

bytes[0] = (val >> 8) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1319

bytes[1] = val & 0xff;

sys/bus/cam/scsi/scsi_all.h

1323

scsi_ulto3b(u_int32_t val, u_int8_t *bytes)

sys/bus/cam/scsi/scsi_all.h

1326

bytes[0] = (val >> 16) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1327

bytes[1] = (val >> 8) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1328

bytes[2] = val & 0xff;

sys/bus/cam/scsi/scsi_all.h

1332

scsi_ulto4b(u_int32_t val, u_int8_t *bytes)

sys/bus/cam/scsi/scsi_all.h

1335

bytes[0] = (val >> 24) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1336

bytes[1] = (val >> 16) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1337

bytes[2] = (val >> 8) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1338

bytes[3] = val & 0xff;

sys/bus/cam/scsi/scsi_all.h

1342

scsi_u64to8b(u_int64_t val, u_int8_t *bytes)

sys/bus/cam/scsi/scsi_all.h

1344

bytes[0] = (val >> 56) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1345

bytes[1] = (val >> 48) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1346

bytes[2] = (val >> 40) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1347

bytes[3] = (val >> 32) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1348

bytes[4] = (val >> 24) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1349

bytes[5] = (val >> 16) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1350

bytes[6] = (val >> 8) & 0xff;

sys/bus/cam/scsi/scsi_all.h

1351

bytes[7] = val & 0xff;

sys/bus/firewire/firewire.c

1520

fc->ongoaddr += csrreg->val * 4;

sys/bus/firewire/fwcrom.c

122

ptr->dir = (struct csrdirectory *) (reg + reg->val);

sys/bus/firewire/fwcrom.c

172

if (reg->key == CSRKEY_SPEC && reg->val == spec)

sys/bus/firewire/fwcrom.c

177

if (reg->key == CSRKEY_VER && reg->val == ver)

sys/bus/firewire/fwcrom.c

201

(vm_offset_t)(reg + reg->val) > CROM_END(cc)) {

sys/bus/firewire/fwcrom.c

205

textleaf = (struct csrtext *)(reg + reg->val);

sys/bus/firewire/fwcrom.c

310

len -= ksnprintf(buf, len, "%d", reg->val);

sys/bus/firewire/fwcrom.c

318

reg->val, reg->val);

sys/bus/firewire/fwcrom.c

324

dir = (struct csrdirectory *) (reg + reg->val);

sys/bus/firewire/fwcrom.c

346

crom_desc_specver(0, reg->val, buf, len);

sys/bus/firewire/fwcrom.c

410

crom_add_entry(struct crom_chunk *chunk, int key, int val)

sys/bus/firewire/fwcrom.c

417

reg->val = val;

sys/bus/firewire/fwcrom.c

505

reg->val = offset -

sys/bus/firewire/iec13213.h

127

val:24;

sys/bus/firewire/iec13213.h

129

u_int32_t val:24,

sys/bus/gpio/gpio_acpi/gpio_acpi.c

225

UINT64 val;

sys/bus/gpio/gpio_acpi/gpio_acpi.c

287

val = GPIO_READ_PIN(dev, pins[i]);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

288

*Value |= val << i;

sys/bus/gpio/gpio_intel/gpio_cherryview.c

164

uint32_t val;

sys/bus/gpio/gpio_intel/gpio_cherryview.c

167

val = bus_read_4(sc->mem_res, offset);

sys/bus/gpio/gpio_intel/gpio_cherryview.c

169

return val;

sys/bus/gpio/gpio_intel/gpio_cherryview.c

173

chvgpio_write(struct gpio_intel_softc *sc, bus_size_t offset, uint32_t val)

sys/bus/gpio/gpio_intel/gpio_cherryview.c

176

bus_write_4(sc->mem_res, offset, val);

sys/bus/gpio/gpio_intel/gpio_cherryview.c

480

int val;

sys/bus/gpio/gpio_intel/gpio_cherryview.c

488

val = 1;

sys/bus/gpio/gpio_intel/gpio_cherryview.c

490

val = 0;

sys/bus/gpio/gpio_intel/gpio_cherryview.c

492

return (val);

sys/bus/gpio/gpio_intel/gpio_intel.c

360

int val;

sys/bus/gpio/gpio_intel/gpio_intel.c

366

val = sc->fns->read_pin(sc, map->pin);

sys/bus/gpio/gpio_intel/gpio_intel.c

369

return (val);

sys/bus/iicbus/iicbb.c

188

#define I2C_SETSDA(sc,dev,val) do { \

sys/bus/iicbus/iicbb.c

189

IICBB_SETSDA(device_get_parent(dev), val); \

sys/bus/iicbus/iicbb.c

193

#define I2C_SETSCL(dev,val) do { \

sys/bus/iicbus/iicbb.c

194

iicbb_setscl(dev, val, 100); \

sys/bus/iicbus/iicbb.c

216

iicbb_setscl(device_t dev, int val, int timeout)

sys/bus/iicbus/iicbb.c

221

IICBB_SETSCL(device_get_parent(dev), val);

sys/bus/iicbus/iicbb.c

224

while (val && !I2C_GETSCL(dev) && k++ < timeout) {

sys/bus/iicbus/iicbb.c

225

IICBB_SETSCL(device_get_parent(dev), val);

sys/bus/pccard/pccard.c

142

pccard_ccr_write(struct pccard_function *pf, int ccr, int val)

sys/bus/pccard/pccard.c

146

pf->pf_ccr_offset + ccr, val);

sys/bus/pccard/pccard.c

84

static void pccard_ccr_write(struct pccard_function *pf, int ccr, int val);

sys/bus/pci/fixup_pci.c

121

uint32_t val;

sys/bus/pci/fixup_pci.c

125

val = pci_read_config(dev, 0x6c, 4);

sys/bus/pci/fixup_pci.c

126

if (val & 0x000e0000) {

sys/bus/pci/fixup_pci.c

128

val &= ~0x000e0000;

sys/bus/pci/fixup_pci.c

129

pci_write_config(dev, 0x6c, val, 4);

sys/bus/pci/hostb_pci.c

131

uint32_t val, int width)

sys/bus/pci/hostb_pci.c

134

pci_write_config(dev, reg, val, width);

sys/bus/pci/pci.c

1006

uint16_t val;

sys/bus/pci/pci.c

1018

val = pci_read_config(dev, expr_ptr + PCIER_DEVCTRL, 2);

sys/bus/pci/pci.c

1019

if ((val & PCIEM_DEVCTL_MAX_READRQ_MASK) != rqsize) {

sys/bus/pci/pci.c

1021

device_printf(dev, "adjust device control 0x%04x", val);

sys/bus/pci/pci.c

1023

val &= ~PCIEM_DEVCTL_MAX_READRQ_MASK;

sys/bus/pci/pci.c

1024

val |= rqsize;

sys/bus/pci/pci.c

1025

pci_write_config(dev, expr_ptr + PCIER_DEVCTRL, val, 2);

sys/bus/pci/pci.c

1028

kprintf(" -> 0x%04x\n", val);

sys/bus/pci/pci.c

1036

uint16_t val;

sys/bus/pci/pci.c

1042

val = pci_read_config(dev, expr_ptr + PCIER_DEVCTRL, 2);

sys/bus/pci/pci.c

1043

return (val & PCIEM_DEVCTL_MAX_READRQ_MASK);

sys/bus/pci/pci.c

1079

"state: %d, remain: %d, name: %#x, i: %d\n", vrs.val,

sys/bus/pci/pci.c

1445

uint32_t offset, val;

sys/bus/pci/pci.c

1449

val = bus_read_4(msix->msix_table_res, offset);

sys/bus/pci/pci.c

1450

if (!(val & PCIM_MSIX_VCTRL_MASK)) {

sys/bus/pci/pci.c

1451

val |= PCIM_MSIX_VCTRL_MASK;

sys/bus/pci/pci.c

1452

bus_write_4(msix->msix_table_res, offset, val);

sys/bus/pci/pci.c

1461

uint32_t offset, val;

sys/bus/pci/pci.c

1465

val = bus_read_4(msix->msix_table_res, offset);

sys/bus/pci/pci.c

1466

if (val & PCIM_MSIX_VCTRL_MASK) {

sys/bus/pci/pci.c

1467

val &= ~PCIM_MSIX_VCTRL_MASK;

sys/bus/pci/pci.c

1468

bus_write_4(msix->msix_table_res, offset, val);

sys/bus/pci/pci.c

4150

uint32_t val, int width)

sys/bus/pci/pci.c

4156

cfg->bus, cfg->slot, cfg->func, reg, val, width);

sys/bus/pci/pci.c

678

uint32_t val;

sys/bus/pci/pci.c

681

val = REG(ptr + PCIR_HT_COMMAND, 2);

sys/bus/pci/pci.c

683

if ((val & 0xe000) == PCIM_HTCAP_SLAVE)

sys/bus/pci/pci.c

686

if ((val & PCIM_HTCMD_CAP_MASK) != PCIM_HTCAP_MSI_MAPPING)

sys/bus/pci/pci.c

689

if (!(val & PCIM_HTCMD_MSI_FIXED)) {

sys/bus/pci/pci.c

705

ht->ht_msictrl = val;

sys/bus/pci/pci.c

735

uint32_t val;

sys/bus/pci/pci.c

741

val = REG(ptr + PCIR_MSIX_TABLE, 4);

sys/bus/pci/pci.c

742

msix->msix_table_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);

sys/bus/pci/pci.c

743

msix->msix_table_offset = val & ~PCIM_MSIX_BIR_MASK;

sys/bus/pci/pci.c

745

val = REG(ptr + PCIR_MSIX_PBA, 4);

sys/bus/pci/pci.c

746

msix->msix_pba_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);

sys/bus/pci/pci.c

747

msix->msix_pba_offset = val & ~PCIM_MSIX_BIR_MASK;

sys/bus/pci/pci.c

768

uint32_t val;

sys/bus/pci/pci.c

770

val = REG(ptr + PCIR_SUBVENDCAP_ID, 4);

sys/bus/pci/pci.c

771

cfg->subvendor = val & 0xffff;

sys/bus/pci/pci.c

772

cfg->subdevice = val >> 16;

sys/bus/pci/pci.c

853

uint32_t val;

sys/bus/pci/pci.c

885

val = REG(ptr + PCICAP_ID, 1);

sys/bus/pci/pci.c

887

if (rc->cap == val) {

sys/bus/pci/pci.c

964

uint32_t val;

sys/bus/pci/pci.c

979

vrs->val = le32toh(reg);

sys/bus/pci/pci.c

981

byte = vrs->val & 0xff;

sys/bus/pci/pci.c

984

vrs->val = vrs->val >> 8;

sys/bus/pci/pci.c

985

byte = vrs->val & 0xff;

sys/bus/pci/pci_pci.c

561

pcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width)

sys/bus/pci/pci_pci.c

563

PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width);

sys/bus/pci/pci_private.h

69

int reg, uint32_t val, int width);

sys/bus/pci/pcib_private.h

78

void pcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width);

sys/bus/pci/pcivar.h

306

pci_write_config(device_t dev, int reg, uint32_t val, int width)

sys/bus/pci/pcivar.h

308

PCI_WRITE_CONFIG(device_get_parent(dev), dev, reg, val, width);

sys/bus/pci/vga_pci.c

505

uint32_t val, int width)

sys/bus/pci/vga_pci.c

508

pci_write_config(dev, reg, val, width);

sys/bus/pci/x86_64/pci_early_quirks.c

101

switch (val) {

sys/bus/pci/x86_64/pci_early_quirks.c

136

vm_paddr_t val;

sys/bus/pci/x86_64/pci_early_quirks.c

139

val = (ctrl >> SNB_GMCH_GMS_SHIFT) & SNB_GMCH_GMS_MASK;

sys/bus/pci/x86_64/pci_early_quirks.c

140

return (val * MiB(32));

sys/bus/pci/x86_64/pci_early_quirks.c

147

vm_paddr_t val;

sys/bus/pci/x86_64/pci_early_quirks.c

150

val = (ctrl >> BDW_GMCH_GMS_SHIFT) & BDW_GMCH_GMS_MASK;

sys/bus/pci/x86_64/pci_early_quirks.c

151

return (val * MiB(32));

sys/bus/pci/x86_64/pci_early_quirks.c

158

vm_paddr_t val;

sys/bus/pci/x86_64/pci_early_quirks.c

161

val = (ctrl >> SNB_GMCH_GMS_SHIFT) & SNB_GMCH_GMS_MASK;

sys/bus/pci/x86_64/pci_early_quirks.c

168

if (val < 0x11)

sys/bus/pci/x86_64/pci_early_quirks.c

169

return (val * MiB(32));

sys/bus/pci/x86_64/pci_early_quirks.c

170

else if (val < 0x17)

sys/bus/pci/x86_64/pci_early_quirks.c

171

return ((val - 0x11) * MiB(4) + MiB(8));

sys/bus/pci/x86_64/pci_early_quirks.c

173

return ((val - 0x17) * MiB(4) + MiB(36));

sys/bus/pci/x86_64/pci_early_quirks.c

180

vm_paddr_t val;

sys/bus/pci/x86_64/pci_early_quirks.c

183

val = (ctrl >> BDW_GMCH_GMS_SHIFT) & BDW_GMCH_GMS_MASK;

sys/bus/pci/x86_64/pci_early_quirks.c

187

if (val < 0xF0)

sys/bus/pci/x86_64/pci_early_quirks.c

188

return (val * MiB(32));

sys/bus/pci/x86_64/pci_early_quirks.c

189

return ((val - 0xF0) * MiB(4) + MiB(4));

sys/bus/pci/x86_64/pci_early_quirks.c

72

vm_paddr_t val;

sys/bus/pci/x86_64/pci_early_quirks.c

75

val = ctrl & INTEL_BSM_MASK;

sys/bus/pci/x86_64/pci_early_quirks.c

76

return (val);

sys/bus/pci/x86_64/pci_early_quirks.c

83

vm_paddr_t val;

sys/bus/pci/x86_64/pci_early_quirks.c

86

val = ctrl & INTEL_BSM_MASK;

sys/bus/pci/x86_64/pci_early_quirks.c

87

val |= (uint64_t)pci_cfgregread(

sys/bus/pci/x86_64/pci_early_quirks.c

89

return (val);

sys/bus/pci/x86_64/pci_early_quirks.c

96

vm_paddr_t val;

sys/bus/pci/x86_64/pci_early_quirks.c

99

val = ctrl & I855_GMCH_GMS_MASK;

sys/bus/ppbus/ppbconf.c

104

ppbus_read_ivar(device_t bus, device_t dev, int index, uintptr_t* val)

sys/bus/ppbus/ppbconf.c

111

*val = (u_long)ppb_get_mode(bus);

sys/bus/ppbus/ppbconf.c

112

ppbdev->mode = (u_short)*val;

sys/bus/ppbus/ppbconf.c

115

*val = (u_long)ppbdev->avm;

sys/bus/ppbus/ppbconf.c

118

BUS_READ_IVAR(device_get_parent(bus), bus, PPC_IVAR_IRQ, val);

sys/bus/ppbus/ppbconf.c

128

ppbus_write_ivar(device_t bus, device_t dev, int index, u_long val)

sys/bus/ppbus/ppbconf.c

135

ppb_set_mode(bus,val);

sys/bus/smbus/ichiic/ig4_iic.c

100

if (sc->intr_mask != val) {

sys/bus/smbus/ichiic/ig4_iic.c

101

reg_write(sc, IG4_REG_INTR_MASK, val);

sys/bus/smbus/ichiic/ig4_iic.c

102

sc->intr_mask = val;

sys/bus/smbus/ichiic/ig4_iic.c

98

set_intr_mask(ig4iic_softc_t *sc, uint32_t val)

sys/bus/smbus/smbacpi/smbacpi.c

133

int cnt, val = 0;

sys/bus/smbus/smbacpi/smbacpi.c

167

val = SMBUS_RECVB(dev, sb->SlaveAddress, &byte);

sys/bus/smbus/smbacpi/smbacpi.c

168

if (val == 0)

sys/bus/smbus/smbacpi/smbacpi.c

171

val = SMBUS_SENDB(dev, sb->SlaveAddress,

sys/bus/smbus/smbacpi/smbacpi.c

177

val = SMBUS_READB(dev, sb->SlaveAddress, Address,

sys/bus/smbus/smbacpi/smbacpi.c

179

if (val == 0)

sys/bus/smbus/smbacpi/smbacpi.c

182

val = SMBUS_WRITEB(dev, sb->SlaveAddress, Address,

sys/bus/smbus/smbacpi/smbacpi.c

189

val = SMBUS_READW(dev, sb->SlaveAddress, Address,

sys/bus/smbus/smbacpi/smbacpi.c

191

if (val == 0)

sys/bus/smbus/smbacpi/smbacpi.c

194

val = SMBUS_WRITEW(dev, sb->SlaveAddress, Address,

sys/bus/smbus/smbacpi/smbacpi.c

201

val = SMBUS_BREAD(dev, sb->SlaveAddress, Address,

sys/bus/smbus/smbacpi/smbacpi.c

203

if (val == 0) {

sys/bus/smbus/smbacpi/smbacpi.c

210

val = SMBUS_BWRITE(dev, sb->SlaveAddress, Address,

sys/bus/smbus/smbacpi/smbacpi.c

217

val = SMBUS_TRANS(dev, sb->SlaveAddress, Address,

sys/bus/smbus/smbacpi/smbacpi.c

220

if (val == 0)

sys/bus/smbus/smbacpi/smbacpi.c

224

val = SMBUS_TRANS(dev, sb->SlaveAddress, Address,

sys/bus/smbus/smbacpi/smbacpi.c

236

gsb->status = val;

sys/bus/u4b/audio/uaudio.c

5064

int val;

sys/bus/u4b/audio/uaudio.c

5101

val = 0;

sys/bus/u4b/audio/uaudio.c

5105

val = (data[0] | (data[1] << 8));

sys/bus/u4b/audio/uaudio.c

5108

val = (data[2] | (data[3] << 8));

sys/bus/u4b/audio/uaudio.c

5111

val = (data[4] | (data[5] << 8));

sys/bus/u4b/audio/uaudio.c

5114

val = (data[6] | (data[7] << 8));

sys/bus/u4b/audio/uaudio.c

5117

val = 0;

sys/bus/u4b/audio/uaudio.c

5121

val = (data[0] | (data[1] << 8));

sys/bus/u4b/audio/uaudio.c

5125

val = uaudio_mixer_signext(mc->type, val);

sys/bus/u4b/audio/uaudio.c

5127

DPRINTFN(3, "val=%d\n", val);

sys/bus/u4b/audio/uaudio.c

5129

return (val);

sys/bus/u4b/audio/uaudio.c

5269

uaudio_mixer_signext(uint8_t type, int val)

sys/bus/u4b/audio/uaudio.c

5273

val = (int16_t)val;

sys/bus/u4b/audio/uaudio.c

5275

val = (int8_t)val;

sys/bus/u4b/audio/uaudio.c

5278

return (val);

sys/bus/u4b/audio/uaudio.c

528

struct uaudio_mixer_node *, uint8_t, int32_t val);

sys/bus/u4b/audio/uaudio.c

5282

uaudio_mixer_bsd2value(struct uaudio_mixer_node *mc, int32_t val)

sys/bus/u4b/audio/uaudio.c

5285

val = (val != 0);

sys/bus/u4b/audio/uaudio.c

5287

if ((val < mc->minval) ||

sys/bus/u4b/audio/uaudio.c

5288

(val > mc->maxval)) {

sys/bus/u4b/audio/uaudio.c

5289

val = mc->minval;

sys/bus/u4b/audio/uaudio.c

5294

val = (val * mc->mul) / 255;

sys/bus/u4b/audio/uaudio.c

5297

val = val + mc->minval;

sys/bus/u4b/audio/uaudio.c

530

static int uaudio_mixer_bsd2value(struct uaudio_mixer_node *, int32_t val);

sys/bus/u4b/audio/uaudio.c

5300

if (val > mc->maxval)

sys/bus/u4b/audio/uaudio.c

5301

val = mc->maxval;

sys/bus/u4b/audio/uaudio.c

5302

else if (val < mc->minval)

sys/bus/u4b/audio/uaudio.c

5303

val = mc->minval;

sys/bus/u4b/audio/uaudio.c

5307

mc->type, val, mc->minval, mc->maxval, val);

sys/bus/u4b/audio/uaudio.c

5308

return (val);

sys/bus/u4b/audio/uaudio.c

5313

uint8_t chan, int32_t val)

sys/bus/u4b/audio/uaudio.c

5315

val = uaudio_mixer_bsd2value(mc, val);

sys/bus/u4b/audio/uaudio.c

5318

mc->wData[chan] = val;

sys/bus/u4b/controller/ehci_pci.c

233

uint32_t val;

sys/bus/u4b/controller/ehci_pci.c

240

val = pci_get_revid(smbdev);

sys/bus/u4b/controller/ehci_pci.c

241

if (val != 0x3a && val != 0x3b)

sys/bus/u4b/controller/ehci_pci.c

249

val = pci_read_config(self, 0x53, 1);

sys/bus/u4b/controller/ehci_pci.c

250

if (!(val & 0x8)) {

sys/bus/u4b/controller/ehci_pci.c

251

val |= 0x8;

sys/bus/u4b/controller/ehci_pci.c

252

pci_write_config(self, 0x53, val, 1);

sys/bus/u4b/controller/ehci_pci.c

260

uint32_t val;

sys/bus/u4b/controller/ehci_pci.c

265

val = pci_read_config(self, 0x4b, 1);

sys/bus/u4b/controller/ehci_pci.c

266

if (val & 0x20)

sys/bus/u4b/controller/ehci_pci.c

268

val |= 0x20;

sys/bus/u4b/controller/ehci_pci.c

269

pci_write_config(self, 0x4b, val, 1);

sys/bus/u4b/controller/xhci.c

161

static void xhci_ctx_set_le32(struct xhci_softc *sc, volatile uint32_t *ptr, uint32_t val);

sys/bus/u4b/controller/xhci.c

163

static void xhci_ctx_set_le64(struct xhci_softc *sc, volatile uint64_t *ptr, uint64_t val);

sys/bus/u4b/controller/xhci.c

232

xhci_ctx_set_le32(struct xhci_softc *sc, volatile uint32_t *ptr, uint32_t val)

sys/bus/u4b/controller/xhci.c

241

*ptr = htole32(val);

sys/bus/u4b/controller/xhci.c

258

xhci_ctx_set_le64(struct xhci_softc *sc, volatile uint64_t *ptr, uint64_t val)

sys/bus/u4b/controller/xhci.c

267

*ptr = htole64(val);

sys/bus/u4b/controller/xhci.c

3200

#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }

sys/bus/u4b/net/if_aue.c

303

uint8_t val;

sys/bus/u4b/net/if_aue.c

311

err = uether_do_request(&sc->sc_ue, &req, &val, 1000);

sys/bus/u4b/net/if_aue.c

314

return (val);

sys/bus/u4b/net/if_aue.c

322

uint16_t val;

sys/bus/u4b/net/if_aue.c

330

err = uether_do_request(&sc->sc_ue, &req, &val, 1000);

sys/bus/u4b/net/if_aue.c

333

return (le16toh(val));

sys/bus/u4b/net/if_aue.c

337

aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val)

sys/bus/u4b/net/if_aue.c

343

req.wValue[0] = val;

sys/bus/u4b/net/if_aue.c

348

if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {

sys/bus/u4b/net/if_aue.c

354

aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val)

sys/bus/u4b/net/if_aue.c

360

USETW(req.wValue, val);

sys/bus/u4b/net/if_aue.c

364

val = htole16(val);

sys/bus/u4b/net/if_aue.c

366

if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {

sys/bus/u4b/net/if_aue.c

416

uint16_t val = 0;

sys/bus/u4b/net/if_aue.c

450

val = aue_csr_read_2(sc, AUE_PHY_DATA);

sys/bus/u4b/net/if_aue.c

455

return (val);

sys/bus/u4b/net/if_axe.c

291

axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)

sys/bus/u4b/net/if_axe.c

302

USETW(req.wValue, val);

sys/bus/u4b/net/if_axe.c

315

uint16_t val;

sys/bus/u4b/net/if_axe.c

329

axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val);

sys/bus/u4b/net/if_axe.c

332

val = le16toh(val);

sys/bus/u4b/net/if_axe.c

340

val &= ~BMSR_EXTCAP;

sys/bus/u4b/net/if_axe.c

345

return (val);

sys/bus/u4b/net/if_axe.c

349

axe_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/bus/u4b/net/if_axe.c

354

val = htole32(val);

sys/bus/u4b/net/if_axe.c

360

axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val);

sys/bus/u4b/net/if_axe.c

374

uint16_t val;

sys/bus/u4b/net/if_axe.c

412

val = 0;

sys/bus/u4b/net/if_axe.c

414

val |= AXE_MEDIA_FULL_DUPLEX;

sys/bus/u4b/net/if_axe.c

418

val |= AXE_178_MEDIA_TXFLOW_CONTROL_EN;

sys/bus/u4b/net/if_axe.c

421

val |= AXE_178_MEDIA_RXFLOW_CONTROL_EN;

sys/bus/u4b/net/if_axe.c

425

val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC;

sys/bus/u4b/net/if_axe.c

427

val |= AXE_178_MEDIA_ENCK;

sys/bus/u4b/net/if_axe.c

430

val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;

sys/bus/u4b/net/if_axe.c

433

val |= AXE_178_MEDIA_100TX;

sys/bus/u4b/net/if_axe.c

440

err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);

sys/bus/u4b/net/if_axe.c

552

uint16_t eeprom, val;

sys/bus/u4b/net/if_axe.c

626

val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN :

sys/bus/u4b/net/if_axe.c

628

AXE_GPIO_WRITE(val, hz / 32);

sys/bus/u4b/net/if_axe.c

629

AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);

sys/bus/u4b/net/if_axe.c

630

AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4);

sys/bus/u4b/net/if_axe.c

631

AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);

sys/bus/u4b/net/if_axe.c

637

val = axe_miibus_readreg(ue->ue_dev, sc->sc_phyno,

sys/bus/u4b/net/if_axe.c

640

0x01, val | 0x0080);

sys/bus/u4b/net/if_axge.c

208

uint16_t val, void *buf, int len)

sys/bus/u4b/net/if_axge.c

216

USETW(req.wValue, val);

sys/bus/u4b/net/if_axge.c

225

uint16_t val, void *buf, int len)

sys/bus/u4b/net/if_axge.c

233

USETW(req.wValue, val);

sys/bus/u4b/net/if_axge.c

245

uint8_t val;

sys/bus/u4b/net/if_axge.c

247

axge_read_mem(sc, cmd, 1, reg, &val, 1);

sys/bus/u4b/net/if_axge.c

248

return (val);

sys/bus/u4b/net/if_axge.c

255

uint8_t val[2];

sys/bus/u4b/net/if_axge.c

257

axge_read_mem(sc, cmd, index, reg, &val, 2);

sys/bus/u4b/net/if_axge.c

258

return (UGETW(val));

sys/bus/u4b/net/if_axge.c

262

axge_write_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg, uint8_t val)

sys/bus/u4b/net/if_axge.c

264

axge_write_mem(sc, cmd, 1, reg, &val, 1);

sys/bus/u4b/net/if_axge.c

269

uint16_t reg, uint16_t val)

sys/bus/u4b/net/if_axge.c

273

USETW(temp, val);

sys/bus/u4b/net/if_axge.c

281

uint16_t val;

sys/bus/u4b/net/if_axge.c

289

val = axge_read_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy);

sys/bus/u4b/net/if_axge.c

294

return (val);

sys/bus/u4b/net/if_axge.c

298

axge_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/bus/u4b/net/if_axge.c

310

axge_write_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy, val);

sys/bus/u4b/net/if_axge.c

325

uint16_t val;

sys/bus/u4b/net/if_axge.c

359

val = 0;

sys/bus/u4b/net/if_axge.c

361

val |= MSR_FD;

sys/bus/u4b/net/if_axge.c

363

val |= MSR_TFC;

sys/bus/u4b/net/if_axge.c

365

val |= MSR_RFC;

sys/bus/u4b/net/if_axge.c

367

val |= MSR_RE;

sys/bus/u4b/net/if_axge.c

370

val |= MSR_GM | MSR_EN_125MHZ;

sys/bus/u4b/net/if_axge.c

379

val |= MSR_PS;

sys/bus/u4b/net/if_axge.c

391

axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MSR, val);

sys/bus/u4b/net/if_cue.c

198

uint8_t val;

sys/bus/u4b/net/if_cue.c

206

if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {

sys/bus/u4b/net/if_cue.c

209

return (val);

sys/bus/u4b/net/if_cue.c

216

uint16_t val;

sys/bus/u4b/net/if_cue.c

224

(void)uether_do_request(&sc->sc_ue, &req, &val, 1000);

sys/bus/u4b/net/if_cue.c

225

return (le16toh(val));

sys/bus/u4b/net/if_cue.c

229

cue_csr_write_1(struct cue_softc *sc, uint16_t reg, uint16_t val)

sys/bus/u4b/net/if_cue.c

235

USETW(req.wValue, val);

sys/bus/u4b/net/if_kue.c

263

uint16_t val, void *data, int len)

sys/bus/u4b/net/if_kue.c

274

USETW(req.wValue, val);

sys/bus/u4b/net/if_mos.c

266

uByte val = 0;

sys/bus/u4b/net/if_mos.c

274

err = uether_do_request(&sc->sc_ue, &req, &val, 1000);

sys/bus/u4b/net/if_mos.c

280

return (val);

sys/bus/u4b/net/if_mos.c

288

uWord val;

sys/bus/u4b/net/if_mos.c

290

USETW(val, 0);

sys/bus/u4b/net/if_mos.c

298

err = uether_do_request(&sc->sc_ue, &req, &val, 1000);

sys/bus/u4b/net/if_mos.c

304

return (UGETW(val));

sys/bus/u4b/net/if_mos.c

312

uByte val;

sys/bus/u4b/net/if_mos.c

313

val = aval;

sys/bus/u4b/net/if_mos.c

321

err = uether_do_request(&sc->sc_ue, &req, &val, 1000);

sys/bus/u4b/net/if_mos.c

335

uWord val;

sys/bus/u4b/net/if_mos.c

337

USETW(val, aval);

sys/bus/u4b/net/if_mos.c

345

err = uether_do_request(&sc->sc_ue, &req, &val, 1000);

sys/bus/u4b/net/if_mos.c

420

uWord val;

sys/bus/u4b/net/if_mos.c

423

USETW(val, 0);

sys/bus/u4b/net/if_mos.c

450

mos_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/bus/u4b/net/if_mos.c

459

mos_reg_write_2(sc, MOS_PHY_DATA, val);

sys/bus/u4b/net/if_mos.c

482

int val, err, locked;

sys/bus/u4b/net/if_mos.c

489

val = mos_reg_read_1(sc, MOS_CTL);

sys/bus/u4b/net/if_mos.c

490

val &= ~(MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);

sys/bus/u4b/net/if_mos.c

491

mos_reg_write_1(sc, MOS_CTL, val);

sys/bus/u4b/net/if_mos.c

497

val |= MOS_CTL_FDX_ENB;

sys/bus/u4b/net/if_mos.c

499

val &= ~(MOS_CTL_FDX_ENB);

sys/bus/u4b/net/if_mos.c

503

val |= MOS_CTL_SPEEDSEL;

sys/bus/u4b/net/if_mos.c

506

val &= ~(MOS_CTL_SPEEDSEL);

sys/bus/u4b/net/if_mos.c

511

val |= (MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);

sys/bus/u4b/net/if_mos.c

512

err = mos_reg_write_1(sc, MOS_CTL, val);

sys/bus/u4b/net/if_udav.c

398

uint8_t val;

sys/bus/u4b/net/if_udav.c

400

udav_csr_read(sc, offset, &val, 1);

sys/bus/u4b/net/if_udav.c

401

return (val);

sys/bus/u4b/net/if_udav.c

801

uint8_t val[2];

sys/bus/u4b/net/if_udav.c

825

udav_csr_read(sc, UDAV_EPDRL, val, 2);

sys/bus/u4b/net/if_udav.c

827

data16 = (val[0] | (val[1] << 8));

sys/bus/u4b/net/if_udav.c

841

uint8_t val[2];

sys/bus/u4b/net/if_udav.c

857

val[0] = (data & 0xff);

sys/bus/u4b/net/if_udav.c

858

val[1] = (data >> 8) & 0xff;

sys/bus/u4b/net/if_udav.c

859

udav_csr_write(sc, UDAV_EPDRL, val, 2);

sys/bus/u4b/serial/uchcom.c

451

uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val)

sys/bus/u4b/serial/uchcom.c

453

uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val);

sys/bus/u4b/serial/uchcom.c

457

uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val)

sys/bus/u4b/serial/uchcom.c

459

uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0);

sys/bus/u4b/serial/uchcom.c

496

uint8_t val = 0;

sys/bus/u4b/serial/uchcom.c

499

val |= UCHCOM_DTR_MASK;

sys/bus/u4b/serial/uchcom.c

501

val |= UCHCOM_RTS_MASK;

sys/bus/u4b/serial/uchcom.c

504

uchcom_set_dtr_rts_10(sc, ~val);

sys/bus/u4b/serial/uchcom.c

506

uchcom_set_dtr_rts_20(sc, ~val);

sys/bus/u4b/serial/umoscom.c

396

uint16_t val;

sys/bus/u4b/serial/umoscom.c

398

val = sc->sc_lcr;

sys/bus/u4b/serial/umoscom.c

400

val |= UMOSCOM_LCR_BREAK;

sys/bus/u4b/serial/umoscom.c

402

umoscom_cfg_write(sc, UMOSCOM_LCR, val | UMOSCOM_UART_REG);

sys/bus/u4b/serial/umoscom.c

525

umoscom_cfg_write(struct umoscom_softc *sc, uint16_t reg, uint16_t val)

sys/bus/u4b/serial/umoscom.c

531

USETW(req.wValue, val);

sys/bus/u4b/serial/umoscom.c

543

uint8_t val;

sys/bus/u4b/serial/umoscom.c

552

&req, &val, 0, 1000);

sys/bus/u4b/serial/umoscom.c

554

DPRINTF("reg=0x%04x, val=0x%02x\n", reg, val);

sys/bus/u4b/serial/umoscom.c

556

return (val);

sys/bus/u4b/storage/ustorage_fs.c

909

put_be16(uint8_t *buf, uint16_t val)

sys/bus/u4b/storage/ustorage_fs.c

911

buf[0] = val >> 8;

sys/bus/u4b/storage/ustorage_fs.c

912

buf[1] = val;

sys/bus/u4b/storage/ustorage_fs.c

916

put_be32(uint8_t *buf, uint32_t val)

sys/bus/u4b/storage/ustorage_fs.c

918

buf[0] = val >> 24;

sys/bus/u4b/storage/ustorage_fs.c

919

buf[1] = val >> 16;

sys/bus/u4b/storage/ustorage_fs.c

920

buf[2] = val >> 8;

sys/bus/u4b/storage/ustorage_fs.c

921

buf[3] = val & 0xff;

sys/bus/u4b/usb_debug.c

246

unsigned int val;

sys/bus/u4b/usb_debug.c

252

val = *(unsigned int *)arg1;

sys/bus/u4b/usb_debug.c

254

val = arg2;

sys/bus/u4b/usb_debug.c

255

error = SYSCTL_OUT(req, &val, sizeof(int));

sys/bus/u4b/usb_debug.c

262

error = SYSCTL_IN(req, &val, sizeof(unsigned int));

sys/bus/u4b/usb_debug.c

272

if (val < USB_PORT_RESET_DELAY_SPEC)

sys/bus/u4b/usb_debug.c

275

if (val < USB_PORT_ROOT_RESET_DELAY_SPEC)

sys/bus/u4b/usb_debug.c

278

if (val < USB_PORT_RESET_RECOVERY_SPEC)

sys/bus/u4b/usb_debug.c

281

if (val < USB_PORT_POWERUP_DELAY_SPEC)

sys/bus/u4b/usb_debug.c

284

if (val < USB_PORT_RESUME_DELAY_SPEC)

sys/bus/u4b/usb_debug.c

287

if (val < USB_SET_ADDRESS_SETTLE_SPEC)

sys/bus/u4b/usb_debug.c

290

if (val < USB_RESUME_DELAY_SPEC)

sys/bus/u4b/usb_debug.c

293

if (val < USB_RESUME_WAIT_SPEC)

sys/bus/u4b/usb_debug.c

296

if (val < USB_RESUME_RECOVERY_SPEC)

sys/bus/u4b/usb_debug.c

299

if (val < USB_EXTRA_POWER_UP_TIME_SPEC)

sys/bus/u4b/usb_debug.c

305

*p = val;

sys/bus/u4b/usb_hub.c

2346

usbd_transfer_power_ref(struct usb_xfer *xfer, int val)

sys/bus/u4b/usb_hub.c

2370

udev->pwr_save.type_refs[xfer_type] += val;

sys/bus/u4b/usb_hub.c

2373

udev->pwr_save.read_refs += val;

sys/bus/u4b/usb_hub.c

2379

udev->pwr_save.write_refs += val;

sys/bus/u4b/usb_hub.c

2382

udev->pwr_save.read_refs += val;

sys/bus/u4b/usb_hub.c

2384

udev->pwr_save.write_refs += val;

sys/bus/u4b/usb_hub.c

2387

if (val > 0) {

sys/bus/u4b/usb_pf.c

218

uint32_t val = 0;

sys/bus/u4b/usb_pf.c

221

val |= USBPF_FLAG_FORCE_SHORT_XFER;

sys/bus/u4b/usb_pf.c

223

val |= USBPF_FLAG_SHORT_XFER_OK;

sys/bus/u4b/usb_pf.c

225

val |= USBPF_FLAG_SHORT_FRAMES_OK;

sys/bus/u4b/usb_pf.c

227

val |= USBPF_FLAG_PIPE_BOF;

sys/bus/u4b/usb_pf.c

229

val |= USBPF_FLAG_PROXY_BUFFER;

sys/bus/u4b/usb_pf.c

231

val |= USBPF_FLAG_EXT_BUFFER;

sys/bus/u4b/usb_pf.c

233

val |= USBPF_FLAG_MANUAL_STATUS;

sys/bus/u4b/usb_pf.c

235

val |= USBPF_FLAG_NO_PIPE_OK;

sys/bus/u4b/usb_pf.c

237

val |= USBPF_FLAG_STALL_PIPE;

sys/bus/u4b/usb_pf.c

238

return (val);

sys/bus/u4b/usb_pf.c

244

uint32_t val = 0;

sys/bus/u4b/usb_pf.c

247

val |= USBPF_STATUS_OPEN;

sys/bus/u4b/usb_pf.c

249

val |= USBPF_STATUS_TRANSFERRING;

sys/bus/u4b/usb_pf.c

251

val |= USBPF_STATUS_DID_DMA_DELAY;

sys/bus/u4b/usb_pf.c

253

val |= USBPF_STATUS_DID_CLOSE;

sys/bus/u4b/usb_pf.c

255

val |= USBPF_STATUS_DRAINING;

sys/bus/u4b/usb_pf.c

257

val |= USBPF_STATUS_STARTED;

sys/bus/u4b/usb_pf.c

259

val |= USBPF_STATUS_BW_RECLAIMED;

sys/bus/u4b/usb_pf.c

261

val |= USBPF_STATUS_CONTROL_XFR;

sys/bus/u4b/usb_pf.c

263

val |= USBPF_STATUS_CONTROL_HDR;

sys/bus/u4b/usb_pf.c

265

val |= USBPF_STATUS_CONTROL_ACT;

sys/bus/u4b/usb_pf.c

267

val |= USBPF_STATUS_CONTROL_STALL;

sys/bus/u4b/usb_pf.c

269

val |= USBPF_STATUS_SHORT_FRAMES_OK;

sys/bus/u4b/usb_pf.c

271

val |= USBPF_STATUS_SHORT_XFER_OK;

sys/bus/u4b/usb_pf.c

274

val |= USBPF_STATUS_BDMA_ENABLE;

sys/bus/u4b/usb_pf.c

276

val |= USBPF_STATUS_BDMA_NO_POST_SYNC;

sys/bus/u4b/usb_pf.c

278

val |= USBPF_STATUS_BDMA_SETUP;

sys/bus/u4b/usb_pf.c

281

val |= USBPF_STATUS_ISOCHRONOUS_XFR;

sys/bus/u4b/usb_pf.c

283

val |= USBPF_STATUS_CURR_DMA_SET;

sys/bus/u4b/usb_pf.c

285

val |= USBPF_STATUS_CAN_CANCEL_IMMED;

sys/bus/u4b/usb_pf.c

287

val |= USBPF_STATUS_DOING_CALLBACK;

sys/bus/u4b/usb_pf.c

289

return (val);

sys/bus/u4b/usb_transfer.h

252

void usbd_transfer_power_ref(struct usb_xfer *xfer, int val);

sys/bus/u4b/uvc/uvc_drv.c

1614

DPRINTF("%u \n", itv->val);

sys/bus/u4b/uvc/uvc_drv.c

1919

itv->val = interval ? interval : 1;

sys/bus/u4b/uvc/uvc_drv.c

1950

itv->val = interval ? interval : 1;

sys/bus/u4b/uvc/uvc_drv.c

486

uint32_t best = -1, dist, val;

sys/bus/u4b/uvc/uvc_drv.c

489

val = frame->interval[i].val;

sys/bus/u4b/uvc/uvc_drv.c

490

dist = interval > val ? interval - val : val - interval;

sys/bus/u4b/uvc/uvc_drv.c

498

interval = frame->interval[i-1].val;

sys/bus/u4b/uvc/uvc_drv.c

500

const uint32_t min = frame->interval[0].val;

sys/bus/u4b/uvc/uvc_drv.c

501

const uint32_t max = frame->interval[1].val;

sys/bus/u4b/uvc/uvc_drv.c

502

const uint32_t step = frame->interval[2].val;

sys/bus/u4b/uvc/uvc_drv.c

768

itv->x.discrete.numerator = frm->interval[index].val;

sys/bus/u4b/uvc/uvc_drv.c

774

itv->x.stepwise.min.numerator = frm->interval[0].val;

sys/bus/u4b/uvc/uvc_drv.c

776

itv->x.stepwise.max.numerator = frm->interval[1].val;

sys/bus/u4b/uvc/uvc_drv.c

778

itv->x.stepwise.step.numerator = frm->interval[2].val;

sys/bus/u4b/uvc/uvc_drv.h

606

uint32_t val;

sys/bus/u4b/wlan/if_mtw.c

1009

mtw_write_cfg(struct mtw_softc *sc, uint16_t reg, uint32_t val)

sys/bus/u4b/wlan/if_mtw.c

1019

val = htole32(val);

sys/bus/u4b/wlan/if_mtw.c

1020

error = usbd_do_request(sc->sc_udev, &sc->sc_lock, &req, &val);

sys/bus/u4b/wlan/if_mtw.c

1025

mtw_usb_dma_read(struct mtw_softc *sc, uint32_t *val)

sys/bus/u4b/wlan/if_mtw.c

1028

return mtw_read_cfg(sc, MTW_USB_U3DMA_CFG, val);

sys/bus/u4b/wlan/if_mtw.c

1030

return (mtw_read(sc, MTW_USB_DMA_CFG, val));

sys/bus/u4b/wlan/if_mtw.c

1034

mtw_usb_dma_write(struct mtw_softc *sc, uint32_t val)

sys/bus/u4b/wlan/if_mtw.c

1037

return mtw_write_cfg(sc, MTW_USB_U3DMA_CFG, val);

sys/bus/u4b/wlan/if_mtw.c

1039

return (mtw_write(sc, MTW_USB_DMA_CFG, val));

sys/bus/u4b/wlan/if_mtw.c

1276

mtw_read(struct mtw_softc *sc, uint16_t reg, uint32_t *val)

sys/bus/u4b/wlan/if_mtw.c

1283

*val = le32toh(tmp);

sys/bus/u4b/wlan/if_mtw.c

1285

*val = 0xffffffff;

sys/bus/u4b/wlan/if_mtw.c

1304

mtw_write_2(struct mtw_softc *sc, uint16_t reg, uint16_t val)

sys/bus/u4b/wlan/if_mtw.c

1310

USETW(req.wValue, val);

sys/bus/u4b/wlan/if_mtw.c

1317

mtw_write(struct mtw_softc *sc, uint16_t reg, uint32_t val)

sys/bus/u4b/wlan/if_mtw.c

1322

if ((error = mtw_write_2(sc, reg, val & 0xffff)) == 0) {

sys/bus/u4b/wlan/if_mtw.c

1324

error = mtw_write_2(sc, reg + 2, val >> 16);

sys/bus/u4b/wlan/if_mtw.c

1344

mtw_set_region_4(struct mtw_softc *sc, uint16_t reg, uint32_t val, int count)

sys/bus/u4b/wlan/if_mtw.c

1350

error = mtw_write(sc, reg + i, val);

sys/bus/u4b/wlan/if_mtw.c

1355

mtw_efuse_read_2(struct mtw_softc *sc, uint16_t addr, uint16_t *val)

sys/bus/u4b/wlan/if_mtw.c

1387

*val = 0xffff; // address not found

sys/bus/u4b/wlan/if_mtw.c

1395

*val = (addr & 2) ? tmp >> 16 : tmp & 0xffff;

sys/bus/u4b/wlan/if_mtw.c

1400

mtw_srom_read(struct mtw_softc *sc, uint16_t addr, uint16_t *val)

sys/bus/u4b/wlan/if_mtw.c

1403

return (sc->sc_srom_read(sc, addr, val));

sys/bus/u4b/wlan/if_mtw.c

1407

mtw_bbp_read(struct mtw_softc *sc, uint8_t reg, uint8_t *val)

sys/bus/u4b/wlan/if_mtw.c

1434

*val = tmp & 0xff;

sys/bus/u4b/wlan/if_mtw.c

1439

mtw_bbp_write(struct mtw_softc *sc, uint8_t reg, uint8_t val)

sys/bus/u4b/wlan/if_mtw.c

1453

tmp = MTW_BBP_CSR_KICK | reg << 8 | val;

sys/bus/u4b/wlan/if_mtw.c

1508

uint16_t val;

sys/bus/u4b/wlan/if_mtw.c

1513

mtw_srom_read(sc, MTW_EEPROM_PWR2GHZ_BASE1 + i / 2, &val);

sys/bus/u4b/wlan/if_mtw.c

1514

sc->txpow1[i + 0] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_mtw.c

1515

sc->txpow1[i + 1] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_mtw.c

1516

mtw_srom_read(sc, MTW_EEPROM_PWR2GHZ_BASE2 + i / 2, &val);

sys/bus/u4b/wlan/if_mtw.c

1517

sc->txpow2[i + 0] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_mtw.c

1518

sc->txpow2[i + 1] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_mtw.c

1543

uint16_t val;

sys/bus/u4b/wlan/if_mtw.c

1549

mtw_srom_read(sc, MTW_EEPROM_CHIPID, &val);

sys/bus/u4b/wlan/if_mtw.c

1550

sc->rf_rev = val;

sys/bus/u4b/wlan/if_mtw.c

1551

mtw_srom_read(sc, MTW_EEPROM_ANTENNA, &val);

sys/bus/u4b/wlan/if_mtw.c

1552

sc->ntxchains = (val >> 4) & 0xf;

sys/bus/u4b/wlan/if_mtw.c

1553

sc->nrxchains = val & 0xf;

sys/bus/u4b/wlan/if_mtw.c

1558

mtw_srom_read(sc, MTW_EEPROM_VERSION, &val);

sys/bus/u4b/wlan/if_mtw.c

1559

MTW_DPRINTF(sc, MTW_DEBUG_ROM, "EEPROM rev=%d, FAE=%d\n", val & 0xff,

sys/bus/u4b/wlan/if_mtw.c

1560

val >> 8);

sys/bus/u4b/wlan/if_mtw.c

1563

mtw_srom_read(sc, MTW_EEPROM_MAC01, &val);

sys/bus/u4b/wlan/if_mtw.c

1564

ic->ic_macaddr[0] = val & 0xff;

sys/bus/u4b/wlan/if_mtw.c

1565

ic->ic_macaddr[1] = val >> 8;

sys/bus/u4b/wlan/if_mtw.c

1566

mtw_srom_read(sc, MTW_EEPROM_MAC23, &val);

sys/bus/u4b/wlan/if_mtw.c

1567

ic->ic_macaddr[2] = val & 0xff;

sys/bus/u4b/wlan/if_mtw.c

1568

ic->ic_macaddr[3] = val >> 8;

sys/bus/u4b/wlan/if_mtw.c

1569

mtw_srom_read(sc, MTW_EEPROM_MAC45, &val);

sys/bus/u4b/wlan/if_mtw.c

1570

ic->ic_macaddr[4] = val & 0xff;

sys/bus/u4b/wlan/if_mtw.c

1571

ic->ic_macaddr[5] = val >> 8;

sys/bus/u4b/wlan/if_mtw.c

1577

mtw_srom_read(sc, i, &val);

sys/bus/u4b/wlan/if_mtw.c

1578

kprintf(" %04x", val);

sys/bus/u4b/wlan/if_mtw.c

1583

mtw_srom_read(sc, MTW_EEPROM_CONFIG, &val);

sys/bus/u4b/wlan/if_mtw.c

1584

device_printf(sc->sc_dev, "EEPROM CFG 0x%04x\n", val);

sys/bus/u4b/wlan/if_mtw.c

1585

if ((val & 0xff) != 0xff) {

sys/bus/u4b/wlan/if_mtw.c

1586

sc->ext_5ghz_lna = (val >> 3) & 1;

sys/bus/u4b/wlan/if_mtw.c

1587

sc->ext_2ghz_lna = (val >> 2) & 1;

sys/bus/u4b/wlan/if_mtw.c

1589

sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1;

sys/bus/u4b/wlan/if_mtw.c

1591

sc->rfswitch = val & 1;

sys/bus/u4b/wlan/if_mtw.c

1595

mtw_srom_read(sc, MTW_EEPROM_FREQ_OFFSET, &val);

sys/bus/u4b/wlan/if_mtw.c

1596

if ((val & 0xff) != 0xff)

sys/bus/u4b/wlan/if_mtw.c

1597

sc->rf_freq_offset = val;

sys/bus/u4b/wlan/if_mtw.c

1607

mtw_srom_read(sc, MTW_EEPROM_DELTAPWR, &val);

sys/bus/u4b/wlan/if_mtw.c

1609

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/bus/u4b/wlan/if_mtw.c

1610

delta_2ghz = val & 0xf;

sys/bus/u4b/wlan/if_mtw.c

1611

if (!(val & 0x40)) /* negative number */

sys/bus/u4b/wlan/if_mtw.c

1614

val >>= 8;

sys/bus/u4b/wlan/if_mtw.c

1615

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/bus/u4b/wlan/if_mtw.c

1616

delta_5ghz = val & 0xf;

sys/bus/u4b/wlan/if_mtw.c

1617

if (!(val & 0x40)) /* negative number */

sys/bus/u4b/wlan/if_mtw.c

1627

mtw_srom_read(sc, MTW_EEPROM_RPWR + ridx * 2, &val);

sys/bus/u4b/wlan/if_mtw.c

1628

reg = val;

sys/bus/u4b/wlan/if_mtw.c

1629

mtw_srom_read(sc, MTW_EEPROM_RPWR + ridx * 2 + 1, &val);

sys/bus/u4b/wlan/if_mtw.c

1630

reg |= (uint32_t)val << 16;

sys/bus/u4b/wlan/if_mtw.c

1644

val = 0;

sys/bus/u4b/wlan/if_mtw.c

1645

mtw_srom_read(sc, MTW_EEPROM_RSSI1_2GHZ, &val);

sys/bus/u4b/wlan/if_mtw.c

1646

sc->rssi_2ghz[0] = val & 0xff; /* Ant A */

sys/bus/u4b/wlan/if_mtw.c

1647

sc->rssi_2ghz[1] = val >> 8; /* Ant B */

sys/bus/u4b/wlan/if_mtw.c

1648

mtw_srom_read(sc, MTW_EEPROM_RSSI2_2GHZ, &val);

sys/bus/u4b/wlan/if_mtw.c

1653

if ((val & 0xff) != 0xff)

sys/bus/u4b/wlan/if_mtw.c

1654

sc->txmixgain_2ghz = val & 0x7;

sys/bus/u4b/wlan/if_mtw.c

1657

sc->lna[2] = val >> 8; /* channel group 2 */

sys/bus/u4b/wlan/if_mtw.c

1658

mtw_srom_read(sc, MTW_EEPROM_RSSI1_5GHZ, &val);

sys/bus/u4b/wlan/if_mtw.c

1659

sc->rssi_5ghz[0] = val & 0xff; /* Ant A */

sys/bus/u4b/wlan/if_mtw.c

1660

sc->rssi_5ghz[1] = val >> 8; /* Ant B */

sys/bus/u4b/wlan/if_mtw.c

1661

mtw_srom_read(sc, MTW_EEPROM_RSSI2_5GHZ, &val);

sys/bus/u4b/wlan/if_mtw.c

1662

sc->rssi_5ghz[2] = val & 0xff; /* Ant C */

sys/bus/u4b/wlan/if_mtw.c

1664

sc->lna[3] = val >> 8; /* channel group 3 */

sys/bus/u4b/wlan/if_mtw.c

1666

mtw_srom_read(sc, MTW_EEPROM_LNA, &val);

sys/bus/u4b/wlan/if_mtw.c

1667

sc->lna[0] = val & 0xff; /* channel group 0 */

sys/bus/u4b/wlan/if_mtw.c

1668

sc->lna[1] = val >> 8; /* channel group 1 */

sys/bus/u4b/wlan/if_mtw.c

1742

cmd.val = htole32(which);

sys/bus/u4b/wlan/if_mtw.c

206

static int mtw_mcu_radio(struct mtw_softc *sc, int func, uint32_t val);

sys/bus/u4b/wlan/if_mtw.c

268

uint8_t val;

sys/bus/u4b/wlan/if_mtw.c

274

uint32_t val;

sys/bus/u4b/wlan/if_mtw.c

278

uint8_t val;

sys/bus/u4b/wlan/if_mtw.c

3585

mtw_mcu_calibrate(struct mtw_softc *sc, int func, uint32_t val)

sys/bus/u4b/wlan/if_mtw.c

3590

cmd.val = htole32(val);

sys/bus/u4b/wlan/if_mtw.c

3595

mtw_rf_write(struct mtw_softc *sc, uint8_t bank, uint8_t reg, uint8_t val)

sys/bus/u4b/wlan/if_mtw.c

3615

reg << 8 | val;

sys/bus/u4b/wlan/if_mtw.c

3657

mtw_rf_read(struct mtw_softc *sc, uint8_t bank, uint8_t reg, uint8_t *val)

sys/bus/u4b/wlan/if_mtw.c

3689

*val = tmp & 0xff;

sys/bus/u4b/wlan/if_mtw.c

4199

mt7601_def_bbp[i].val)) != 0)

sys/bus/u4b/wlan/if_mtw.c

4216

mt7601_rf_bank0[i].val);

sys/bus/u4b/wlan/if_mtw.c

4223

mt7601_rf_bank4[i].val);

sys/bus/u4b/wlan/if_mtw.c

4230

mt7601_rf_bank5[i].val);

sys/bus/u4b/wlan/if_mtw.c

4313

mt7601_r49_read(struct mtw_softc *sc, uint8_t flag, int8_t *val)

sys/bus/u4b/wlan/if_mtw.c

4323

return (mtw_bbp_read(sc, 49, val));

sys/bus/u4b/wlan/if_mtw.c

4327

mt7601_rf_temperature(struct mtw_softc *sc, int8_t *val)

sys/bus/u4b/wlan/if_mtw.c

4354

mt7601_r49_read(sc, MT7601_R47_TEMP, val);

sys/bus/u4b/wlan/if_mtw.c

4444

mtw_mcu_radio(struct mtw_softc *sc, int func, uint32_t val)

sys/bus/u4b/wlan/if_mtw.c

4449

cmd.r2 = htole32(val);

sys/bus/u4b/wlan/if_mtw.c

4494

mt7601_def_mac[i].val);

sys/bus/u4b/wlan/if_mtw.c

482

mtw_read_cfg(struct mtw_softc *sc, uint16_t reg, uint32_t *val)

sys/bus/u4b/wlan/if_mtw.c

498

*val = le32toh(tmp);

sys/bus/u4b/wlan/if_mtw.c

500

*val = 0xffffffff;

sys/bus/u4b/wlan/if_mtwreg.h

879

uint32_t val;

sys/bus/u4b/wlan/if_rum.c

1790

uint32_t val;

sys/bus/u4b/wlan/if_rum.c

1792

rum_read_multi(sc, reg, &val, sizeof val);

sys/bus/u4b/wlan/if_rum.c

1794

return le32toh(val);

sys/bus/u4b/wlan/if_rum.c

1818

rum_write(struct rum_softc *sc, uint16_t reg, uint32_t val)

sys/bus/u4b/wlan/if_rum.c

1820

uint32_t tmp = htole32(val);

sys/bus/u4b/wlan/if_rum.c

1889

rum_bbp_write(struct rum_softc *sc, uint8_t reg, uint8_t val)

sys/bus/u4b/wlan/if_rum.c

1900

tmp = RT2573_BBP_BUSY | (reg & 0x7f) << 8 | val;

sys/bus/u4b/wlan/if_rum.c

1907

uint32_t val;

sys/bus/u4b/wlan/if_rum.c

1917

val = RT2573_BBP_BUSY | RT2573_BBP_READ | reg << 8;

sys/bus/u4b/wlan/if_rum.c

1918

rum_write(sc, RT2573_PHY_CSR3, val);

sys/bus/u4b/wlan/if_rum.c

1921

val = rum_read(sc, RT2573_PHY_CSR3);

sys/bus/u4b/wlan/if_rum.c

1922

if (!(val & RT2573_BBP_BUSY))

sys/bus/u4b/wlan/if_rum.c

1923

return val & 0xff;

sys/bus/u4b/wlan/if_rum.c

1933

rum_rf_write(struct rum_softc *sc, uint8_t reg, uint32_t val)

sys/bus/u4b/wlan/if_rum.c

1949

tmp = RT2573_RF_BUSY | RT2573_RF_20BIT | (val & 0xfffff) << 2 |

sys/bus/u4b/wlan/if_rum.c

1954

sc->rf_regs[reg] = val;

sys/bus/u4b/wlan/if_rum.c

1956

DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0xfffff);

sys/bus/u4b/wlan/if_rum.c

2380

uint16_t val;

sys/bus/u4b/wlan/if_rum.c

2388

rum_eeprom_read(sc, RT2573_EEPROM_ANTENNA, &val, 2);

sys/bus/u4b/wlan/if_rum.c

2389

val = le16toh(val);

sys/bus/u4b/wlan/if_rum.c

2390

sc->rf_rev = (val >> 11) & 0x1f;

sys/bus/u4b/wlan/if_rum.c

2391

sc->hw_radio = (val >> 10) & 0x1;

sys/bus/u4b/wlan/if_rum.c

2392

sc->rx_ant = (val >> 4) & 0x3;

sys/bus/u4b/wlan/if_rum.c

2393

sc->tx_ant = (val >> 2) & 0x3;

sys/bus/u4b/wlan/if_rum.c

2394

sc->nb_ant = val & 0x3;

sys/bus/u4b/wlan/if_rum.c

2398

rum_eeprom_read(sc, RT2573_EEPROM_CONFIG2, &val, 2);

sys/bus/u4b/wlan/if_rum.c

2399

val = le16toh(val);

sys/bus/u4b/wlan/if_rum.c

2400

sc->ext_5ghz_lna = (val >> 6) & 0x1;

sys/bus/u4b/wlan/if_rum.c

2401

sc->ext_2ghz_lna = (val >> 4) & 0x1;

sys/bus/u4b/wlan/if_rum.c

2406

rum_eeprom_read(sc, RT2573_EEPROM_RSSI_2GHZ_OFFSET, &val, 2);

sys/bus/u4b/wlan/if_rum.c

2407

val = le16toh(val);

sys/bus/u4b/wlan/if_rum.c

2408

if ((val & 0xff) != 0xff)

sys/bus/u4b/wlan/if_rum.c

2409

sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */

sys/bus/u4b/wlan/if_rum.c

2415

rum_eeprom_read(sc, RT2573_EEPROM_RSSI_5GHZ_OFFSET, &val, 2);

sys/bus/u4b/wlan/if_rum.c

2416

val = le16toh(val);

sys/bus/u4b/wlan/if_rum.c

2417

if ((val & 0xff) != 0xff)

sys/bus/u4b/wlan/if_rum.c

2418

sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */

sys/bus/u4b/wlan/if_rum.c

2432

rum_eeprom_read(sc, RT2573_EEPROM_FREQ_OFFSET, &val, 2);

sys/bus/u4b/wlan/if_rum.c

2433

val = le16toh(val);

sys/bus/u4b/wlan/if_rum.c

2434

if ((val & 0xff) != 0xff)

sys/bus/u4b/wlan/if_rum.c

2435

sc->rffreq = val & 0xff;

sys/bus/u4b/wlan/if_rum.c

2455

sc->bbp_prom[i].val);

sys/bus/u4b/wlan/if_rum.c

2488

const uint8_t val = rum_bbp_read(sc, 0);

sys/bus/u4b/wlan/if_rum.c

2489

if (val != 0 && val != 0xff)

sys/bus/u4b/wlan/if_rum.c

2501

rum_bbp_write(sc, rum_def_bbp[i].reg, rum_def_bbp[i].val);

sys/bus/u4b/wlan/if_rum.c

2507

rum_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);

sys/bus/u4b/wlan/if_rum.c

2537

rum_write(sc, rum_def_mac[i].reg, rum_def_mac[i].val);

sys/bus/u4b/wlan/if_rum.c

268

uint32_t val;

sys/bus/u4b/wlan/if_rum.c

296

uint8_t val;

sys/bus/u4b/wlan/if_rumvar.h

157

uint8_t val;

sys/bus/u4b/wlan/if_run.c

1245

run_read(struct run_softc *sc, uint16_t reg, uint32_t *val)

sys/bus/u4b/wlan/if_run.c

1252

*val = le32toh(tmp);

sys/bus/u4b/wlan/if_run.c

1254

*val = 0xffffffff;

sys/bus/u4b/wlan/if_run.c

1273

run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val)

sys/bus/u4b/wlan/if_run.c

1279

USETW(req.wValue, val);

sys/bus/u4b/wlan/if_run.c

1287

run_write(struct run_softc *sc, uint16_t reg, uint32_t val)

sys/bus/u4b/wlan/if_run.c

1291

if ((error = run_write_2(sc, reg, val & 0xffff)) == 0)

sys/bus/u4b/wlan/if_run.c

1292

error = run_write_2(sc, reg + 2, val >> 16);

sys/bus/u4b/wlan/if_run.c

1342

run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int len)

sys/bus/u4b/wlan/if_run.c

1348

error = run_write(sc, reg + i, val);

sys/bus/u4b/wlan/if_run.c

1353

run_efuse_read(struct run_softc *sc, uint16_t addr, uint16_t *val, int count)

sys/bus/u4b/wlan/if_run.c

1385

*val = 0xffff; /* address not found */

sys/bus/u4b/wlan/if_run.c

1394

*val = (addr & 1) ? tmp >> 16 : tmp & 0xffff;

sys/bus/u4b/wlan/if_run.c

1401

run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val)

sys/bus/u4b/wlan/if_run.c

1403

return (run_efuse_read(sc, addr, val, 2));

sys/bus/u4b/wlan/if_run.c

1407

run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val)

sys/bus/u4b/wlan/if_run.c

1422

*val = le16toh(tmp);

sys/bus/u4b/wlan/if_run.c

1424

*val = 0xffff;

sys/bus/u4b/wlan/if_run.c

1429

run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val)

sys/bus/u4b/wlan/if_run.c

1432

return sc->sc_srom_read(sc, addr, val);

sys/bus/u4b/wlan/if_run.c

1436

run_rt2870_rf_write(struct run_softc *sc, uint32_t val)

sys/bus/u4b/wlan/if_run.c

1450

return (run_write(sc, RT2860_RF_CSR_CFG0, val));

sys/bus/u4b/wlan/if_run.c

1454

run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val)

sys/bus/u4b/wlan/if_run.c

1459

*val = 0;

sys/bus/u4b/wlan/if_run.c

1482

*val = tmp & 0xff;

sys/bus/u4b/wlan/if_run.c

1487

run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val)

sys/bus/u4b/wlan/if_run.c

1501

tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;

sys/bus/u4b/wlan/if_run.c

1506

run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val)

sys/bus/u4b/wlan/if_run.c

1533

*val = tmp & 0xff;

sys/bus/u4b/wlan/if_run.c

1538

run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val)

sys/bus/u4b/wlan/if_run.c

1552

tmp = RT2860_BBP_CSR_KICK | reg << 8 | val;

sys/bus/u4b/wlan/if_run.c

1625

uint16_t addr, val;

sys/bus/u4b/wlan/if_run.c

1632

run_srom_read(sc, addr + i / 2, &val);

sys/bus/u4b/wlan/if_run.c

1633

sc->txpow1[i + 0] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1634

sc->txpow1[i + 1] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1638

run_srom_read(sc, addr + i / 2, &val);

sys/bus/u4b/wlan/if_run.c

1639

sc->txpow2[i + 0] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1640

sc->txpow2[i + 1] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1644

&val);

sys/bus/u4b/wlan/if_run.c

1645

sc->txpow3[i + 0] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1646

sc->txpow3[i + 1] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1662

run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE1 + i / 2, &val);

sys/bus/u4b/wlan/if_run.c

1663

sc->txpow1[i + 14] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1664

sc->txpow1[i + 15] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1666

run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE2 + i / 2, &val);

sys/bus/u4b/wlan/if_run.c

1667

sc->txpow2[i + 14] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1668

sc->txpow2[i + 15] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1672

&val);

sys/bus/u4b/wlan/if_run.c

1673

sc->txpow3[i + 14] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1674

sc->txpow3[i + 15] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1682

uint16_t val;

sys/bus/u4b/wlan/if_run.c

1687

run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val);

sys/bus/u4b/wlan/if_run.c

1688

sc->txpow1[i + 0] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1689

sc->txpow1[i + 1] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1693

RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val);

sys/bus/u4b/wlan/if_run.c

1694

sc->txpow2[i + 0] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1695

sc->txpow2[i + 1] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1719

run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val);

sys/bus/u4b/wlan/if_run.c

1720

sc->txpow1[i + 14] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1721

sc->txpow1[i + 15] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1723

run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val);

sys/bus/u4b/wlan/if_run.c

1724

sc->txpow2[i + 14] = (int8_t)(val & 0xff);

sys/bus/u4b/wlan/if_run.c

1725

sc->txpow2[i + 15] = (int8_t)(val >> 8);

sys/bus/u4b/wlan/if_run.c

1747

uint16_t val;

sys/bus/u4b/wlan/if_run.c

1760

run_srom_read(sc, RT2860_EEPROM_VERSION, &val);

sys/bus/u4b/wlan/if_run.c

1761

DPRINTF("EEPROM rev=%d, FAE=%d\n", val >> 8, val & 0xff);

sys/bus/u4b/wlan/if_run.c

1764

run_srom_read(sc, RT2860_EEPROM_MAC01, &val);

sys/bus/u4b/wlan/if_run.c

1765

ic->ic_macaddr[0] = val & 0xff;

sys/bus/u4b/wlan/if_run.c

1766

ic->ic_macaddr[1] = val >> 8;

sys/bus/u4b/wlan/if_run.c

1767

run_srom_read(sc, RT2860_EEPROM_MAC23, &val);

sys/bus/u4b/wlan/if_run.c

1768

ic->ic_macaddr[2] = val & 0xff;

sys/bus/u4b/wlan/if_run.c

1769

ic->ic_macaddr[3] = val >> 8;

sys/bus/u4b/wlan/if_run.c

1770

run_srom_read(sc, RT2860_EEPROM_MAC45, &val);

sys/bus/u4b/wlan/if_run.c

1771

ic->ic_macaddr[4] = val & 0xff;

sys/bus/u4b/wlan/if_run.c

1772

ic->ic_macaddr[5] = val >> 8;

sys/bus/u4b/wlan/if_run.c

1777

run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val);

sys/bus/u4b/wlan/if_run.c

1778

sc->bbp[i].val = val & 0xff;

sys/bus/u4b/wlan/if_run.c

1779

sc->bbp[i].reg = val >> 8;

sys/bus/u4b/wlan/if_run.c

1781

sc->bbp[i].val);

sys/bus/u4b/wlan/if_run.c

1787

&val);

sys/bus/u4b/wlan/if_run.c

1788

sc->rf[i].val = val & 0xff;

sys/bus/u4b/wlan/if_run.c

1789

sc->rf[i].reg = val >> 8;

sys/bus/u4b/wlan/if_run.c

1791

sc->rf[i].val);

sys/bus/u4b/wlan/if_run.c

1798

RT3593_EEPROM_FREQ, &val);

sys/bus/u4b/wlan/if_run.c

1799

sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;

sys/bus/u4b/wlan/if_run.c

1803

RT3593_EEPROM_FREQ_LEDS, &val);

sys/bus/u4b/wlan/if_run.c

1804

if (val >> 8 != 0xff) {

sys/bus/u4b/wlan/if_run.c

1806

sc->leds = val >> 8;

sys/bus/u4b/wlan/if_run.c

1825

run_srom_read(sc, 0x00, &val);

sys/bus/u4b/wlan/if_run.c

1827

run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);

sys/bus/u4b/wlan/if_run.c

1829

if (val == 0xffff) {

sys/bus/u4b/wlan/if_run.c

1851

sc->rf_rev = val;

sys/bus/u4b/wlan/if_run.c

1852

run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);

sys/bus/u4b/wlan/if_run.c

1854

sc->rf_rev = (val >> 8) & 0xf;

sys/bus/u4b/wlan/if_run.c

1855

sc->ntxchains = (val >> 4) & 0xf;

sys/bus/u4b/wlan/if_run.c

1856

sc->nrxchains = val & 0xf;

sys/bus/u4b/wlan/if_run.c

1862

run_srom_read(sc, RT2860_EEPROM_CONFIG, &val);

sys/bus/u4b/wlan/if_run.c

1863

DPRINTF("EEPROM CFG 0x%04x\n", val);

sys/bus/u4b/wlan/if_run.c

1865

if ((val >> 8) != 0xff)

sys/bus/u4b/wlan/if_run.c

1866

sc->patch_dac = (val >> 15) & 1;

sys/bus/u4b/wlan/if_run.c

1867

if ((val & 0xff) != 0xff) {

sys/bus/u4b/wlan/if_run.c

1868

sc->ext_5ghz_lna = (val >> 3) & 1;

sys/bus/u4b/wlan/if_run.c

1869

sc->ext_2ghz_lna = (val >> 2) & 1;

sys/bus/u4b/wlan/if_run.c

1871

sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1;

sys/bus/u4b/wlan/if_run.c

1873

sc->rfswitch = val & 1;

sys/bus/u4b/wlan/if_run.c

1883

run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val);

sys/bus/u4b/wlan/if_run.c

1885

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/bus/u4b/wlan/if_run.c

1886

delta_2ghz = val & 0xf;

sys/bus/u4b/wlan/if_run.c

1887

if (!(val & 0x40)) /* negative number */

sys/bus/u4b/wlan/if_run.c

1890

val >>= 8;

sys/bus/u4b/wlan/if_run.c

1891

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/bus/u4b/wlan/if_run.c

1892

delta_5ghz = val & 0xf;

sys/bus/u4b/wlan/if_run.c

1893

if (!(val & 0x40)) /* negative number */

sys/bus/u4b/wlan/if_run.c

1902

run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val);

sys/bus/u4b/wlan/if_run.c

1903

reg = val;

sys/bus/u4b/wlan/if_run.c

1904

run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val);

sys/bus/u4b/wlan/if_run.c

1905

reg |= (uint32_t)val << 16;

sys/bus/u4b/wlan/if_run.c

1918

RT3593_EEPROM_RSSI1_2GHZ, &val);

sys/bus/u4b/wlan/if_run.c

1919

sc->rssi_2ghz[0] = val & 0xff; /* Ant A */

sys/bus/u4b/wlan/if_run.c

1920

sc->rssi_2ghz[1] = val >> 8; /* Ant B */

sys/bus/u4b/wlan/if_run.c

1922

RT3593_EEPROM_RSSI2_2GHZ, &val);

sys/bus/u4b/wlan/if_run.c

1926

sc->rssi_2ghz[2] = val & 0xff; /* Ant C */

sys/bus/u4b/wlan/if_run.c

1932

if ((val & 0xff) != 0xff)

sys/bus/u4b/wlan/if_run.c

1933

sc->txmixgain_2ghz = val & 0x7;

sys/bus/u4b/wlan/if_run.c

1937

sc->rssi_2ghz[2] = val & 0xff; /* Ant C */

sys/bus/u4b/wlan/if_run.c

1939

run_srom_read(sc, RT3593_EEPROM_LNA_5GHZ, &val);

sys/bus/u4b/wlan/if_run.c

1940

sc->lna[2] = val >> 8; /* channel group 2 */

sys/bus/u4b/wlan/if_run.c

1943

RT3593_EEPROM_RSSI1_5GHZ, &val);

sys/bus/u4b/wlan/if_run.c

1944

sc->rssi_5ghz[0] = val & 0xff; /* Ant A */

sys/bus/u4b/wlan/if_run.c

1945

sc->rssi_5ghz[1] = val >> 8; /* Ant B */

sys/bus/u4b/wlan/if_run.c

1947

RT3593_EEPROM_RSSI2_5GHZ, &val);

sys/bus/u4b/wlan/if_run.c

1953

if ((val & 0xff) != 0xff)

sys/bus/u4b/wlan/if_run.c

1954

sc->txmixgain_5ghz = val & 0x7;

sys/bus/u4b/wlan/if_run.c

1957

sc->rssi_5ghz[2] = val & 0xff; /* Ant C */

sys/bus/u4b/wlan/if_run.c

1960

run_srom_read(sc, RT3593_EEPROM_LNA_5GHZ, &val);

sys/bus/u4b/wlan/if_run.c

1962

sc->lna[3] = val >> 8; /* channel group 3 */

sys/bus/u4b/wlan/if_run.c

1965

RT3593_EEPROM_LNA, &val);

sys/bus/u4b/wlan/if_run.c

1966

sc->lna[0] = val & 0xff; /* channel group 0 */

sys/bus/u4b/wlan/if_run.c

1967

sc->lna[1] = val >> 8; /* channel group 1 */

sys/bus/u4b/wlan/if_run.c

3787

uint16_t val;

sys/bus/u4b/wlan/if_run.c

3792

run_efuse_read(sc, RT5390_EEPROM_IQ_GAIN_CAL_TX0_2GHZ, &val, 1);

sys/bus/u4b/wlan/if_run.c

3796

&val, 1);

sys/bus/u4b/wlan/if_run.c

3800

&val, 1);

sys/bus/u4b/wlan/if_run.c

3804

&val, 1);

sys/bus/u4b/wlan/if_run.c

3806

val = 0;

sys/bus/u4b/wlan/if_run.c

3807

run_bbp_write(sc, 159, val);

sys/bus/u4b/wlan/if_run.c

3813

&val, 1);

sys/bus/u4b/wlan/if_run.c

3817

&val, 1);

sys/bus/u4b/wlan/if_run.c

3821

&val, 1);

sys/bus/u4b/wlan/if_run.c

3825

&val, 1);

sys/bus/u4b/wlan/if_run.c

3827

val = 0;

sys/bus/u4b/wlan/if_run.c

3828

run_bbp_write(sc, 159, val);

sys/bus/u4b/wlan/if_run.c

3834

&val, 1);

sys/bus/u4b/wlan/if_run.c

3838

&val, 1);

sys/bus/u4b/wlan/if_run.c

3842

&val, 1);

sys/bus/u4b/wlan/if_run.c

3846

&val, 1);

sys/bus/u4b/wlan/if_run.c

3848

val = 0;

sys/bus/u4b/wlan/if_run.c

3849

run_bbp_write(sc, 159, val);

sys/bus/u4b/wlan/if_run.c

3855

&val, 1);

sys/bus/u4b/wlan/if_run.c

3859

&val, 1);

sys/bus/u4b/wlan/if_run.c

3863

&val, 1);

sys/bus/u4b/wlan/if_run.c

3867

&val, 1);

sys/bus/u4b/wlan/if_run.c

3869

val = 0;

sys/bus/u4b/wlan/if_run.c

3870

run_bbp_write(sc, 159, val);

sys/bus/u4b/wlan/if_run.c

3875

&val, 1);

sys/bus/u4b/wlan/if_run.c

3876

run_bbp_write(sc, 159, val);

sys/bus/u4b/wlan/if_run.c

3881

RT5390_EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CTL, &val, 1);

sys/bus/u4b/wlan/if_run.c

3882

run_bbp_write(sc, 159, val);

sys/bus/u4b/wlan/if_run.c

4660

rt5592_2ghz_def_rf[i].val);

sys/bus/u4b/wlan/if_run.c

4679

rt5592_5ghz_def_rf[i].val);

sys/bus/u4b/wlan/if_run.c

4685

rt5592_chan_5ghz[i].val);

sys/bus/u4b/wlan/if_run.c

486

uint32_t val;

sys/bus/u4b/wlan/if_run.c

493

uint8_t val;

sys/bus/u4b/wlan/if_run.c

5276

rt5592_def_bbp[i].val);

sys/bus/u4b/wlan/if_run.c

5285

rt5390_def_bbp[i].val);

sys/bus/u4b/wlan/if_run.c

5338

rt2860_def_bbp[i].val);

sys/bus/u4b/wlan/if_run.c

5383

rt3572_def_rf[i].val);

sys/bus/u4b/wlan/if_run.c

5388

rt3070_def_rf[i].val);

sys/bus/u4b/wlan/if_run.c

541

uint8_t val;

sys/bus/u4b/wlan/if_run.c

5525

rt3593_def_rf[i].val);

sys/bus/u4b/wlan/if_run.c

5581

rt5592_def_rf[i].val);

sys/bus/u4b/wlan/if_run.c

5588

rt5392_def_rf[i].val);

sys/bus/u4b/wlan/if_run.c

5601

rt5390_def_rf[i].val);

sys/bus/u4b/wlan/if_run.c

5625

uint8_t *val)

sys/bus/u4b/wlan/if_run.c

564

uint8_t val;

sys/bus/u4b/wlan/if_run.c

5674

*val = rf24;

sys/bus/u4b/wlan/if_run.c

5762

run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);

sys/bus/u4b/wlan/if_run.c

6018

run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val);

sys/bus/u4b/wlan/if_run.c

6100

run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);

sys/bus/u4b/wlan/if_runreg.h

966

#define RT2860_EEPROM_CTL(sc, val) do { \

sys/bus/u4b/wlan/if_runreg.h

967

RAL_WRITE((sc), RT2860_PCI_EECTRL, (val)); \

sys/bus/u4b/wlan/if_runvar.h

209

uint8_t val;

sys/bus/u4b/wlan/if_urtwn.c

1475

urtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val)

sys/bus/u4b/wlan/if_urtwn.c

1477

return (urtwn_write_region_1(sc, addr, &val, sizeof(val)));

sys/bus/u4b/wlan/if_urtwn.c

1481

urtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val)

sys/bus/u4b/wlan/if_urtwn.c

1483

val = htole16(val);

sys/bus/u4b/wlan/if_urtwn.c

1484

return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val)));

sys/bus/u4b/wlan/if_urtwn.c

1488

urtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val)

sys/bus/u4b/wlan/if_urtwn.c

1490

val = htole32(val);

sys/bus/u4b/wlan/if_urtwn.c

1491

return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val)));

sys/bus/u4b/wlan/if_urtwn.c

1511

uint8_t val;

sys/bus/u4b/wlan/if_urtwn.c

1513

if (urtwn_read_region_1(sc, addr, &val, 1) != 0)

sys/bus/u4b/wlan/if_urtwn.c

1515

return (val);

sys/bus/u4b/wlan/if_urtwn.c

1521

uint16_t val;

sys/bus/u4b/wlan/if_urtwn.c

1523

if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0)

sys/bus/u4b/wlan/if_urtwn.c

1525

return (le16toh(val));

sys/bus/u4b/wlan/if_urtwn.c

1531

uint32_t val;

sys/bus/u4b/wlan/if_urtwn.c

1533

if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0)

sys/bus/u4b/wlan/if_urtwn.c

1535

return (le32toh(val));

sys/bus/u4b/wlan/if_urtwn.c

1643

urtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val)

sys/bus/u4b/wlan/if_urtwn.c

1646

sc->sc_rf_write(sc, chain, addr, val);

sys/bus/u4b/wlan/if_urtwn.c

1651

uint32_t val)

sys/bus/u4b/wlan/if_urtwn.c

1655

SM(R92C_LSSI_PARAM_DATA, val));

sys/bus/u4b/wlan/if_urtwn.c

1660

uint32_t val)

sys/bus/u4b/wlan/if_urtwn.c

1664

SM(R92C_LSSI_PARAM_DATA, val));

sys/bus/u4b/wlan/if_urtwn.c

1670

uint32_t reg[R92C_MAX_CHAINS], val;

sys/bus/u4b/wlan/if_urtwn.c

1690

val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain));

sys/bus/u4b/wlan/if_urtwn.c

1692

val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain));

sys/bus/u4b/wlan/if_urtwn.c

1693

return (MS(val, R92C_LSSI_READBACK_DATA));

sys/bus/u4b/wlan/if_urtwn.c

1719

urtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val)

sys/bus/u4b/wlan/if_urtwn.c

1749

*val = MS(reg, R92C_EFUSE_CTRL_DATA);

sys/bus/u4b/wlan/if_urtwn.c

4131

rtl8188eu_mac[i].val);

sys/bus/u4b/wlan/if_urtwn.c

4139

rtl8192cu_mac[i].val);

sys/bus/u4b/wlan/if_urtwnreg.h

1253

uint8_t val;

sys/bus/u4b/wlan/if_urtwnreg.h

901

#define MS(val, field) \

sys/bus/u4b/wlan/if_urtwnreg.h

902

(((val) & field##_M) >> field##_S)

sys/bus/u4b/wlan/if_urtwnreg.h

905

#define SM(field, val) \

sys/bus/u4b/wlan/if_urtwnreg.h

906

(((val) << field##_S) & field##_M)

sys/bus/u4b/wlan/if_urtwnreg.h

909

#define RW(var, field, val) \

sys/bus/u4b/wlan/if_urtwnreg.h

910

(((var) & ~field##_M) | SM(field, val))

sys/cpu/x86_64/include/cpufunc.h

1004

int rdmsr_safe(u_int msr, uint64_t *val);

sys/cpu/x86_64/include/cpumask.h

100

(val).ary[2] != 0 || \

sys/cpu/x86_64/include/cpumask.h

101

(val).ary[3] != 0)

sys/cpu/x86_64/include/cpumask.h

103

#define CPUMASK_TESTBIT(val, i) ((val).ary[((i) >> 6) & 3] & \

sys/cpu/x86_64/include/cpumask.h

111

#define CPUMASK_LOWMASK(val) ((val).ary[0])

sys/cpu/x86_64/include/cpumask.h

189

#define CPUMASK_ANDMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

190

(mask).ary[0] &= (val).ary[0]; \

sys/cpu/x86_64/include/cpumask.h

191

(mask).ary[1] &= (val).ary[1]; \

sys/cpu/x86_64/include/cpumask.h

192

(mask).ary[2] &= (val).ary[2]; \

sys/cpu/x86_64/include/cpumask.h

193

(mask).ary[3] &= (val).ary[3]; \

sys/cpu/x86_64/include/cpumask.h

196

#define CPUMASK_NANDMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

197

(mask).ary[0] &= ~(val).ary[0]; \

sys/cpu/x86_64/include/cpumask.h

198

(mask).ary[1] &= ~(val).ary[1]; \

sys/cpu/x86_64/include/cpumask.h

199

(mask).ary[2] &= ~(val).ary[2]; \

sys/cpu/x86_64/include/cpumask.h

200

(mask).ary[3] &= ~(val).ary[3]; \

sys/cpu/x86_64/include/cpumask.h

203

#define CPUMASK_ORMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

204

(mask).ary[0] |= (val).ary[0]; \

sys/cpu/x86_64/include/cpumask.h

205

(mask).ary[1] |= (val).ary[1]; \

sys/cpu/x86_64/include/cpumask.h

206

(mask).ary[2] |= (val).ary[2]; \

sys/cpu/x86_64/include/cpumask.h

207

(mask).ary[3] |= (val).ary[3]; \

sys/cpu/x86_64/include/cpumask.h

210

#define CPUMASK_XORMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

211

(mask).ary[0] ^= (val).ary[0]; \

sys/cpu/x86_64/include/cpumask.h

212

(mask).ary[1] ^= (val).ary[1]; \

sys/cpu/x86_64/include/cpumask.h

213

(mask).ary[2] ^= (val).ary[2]; \

sys/cpu/x86_64/include/cpumask.h

214

(mask).ary[3] ^= (val).ary[3]; \

sys/cpu/x86_64/include/cpumask.h

285

#define ATOMIC_CPUMASK_ORMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

286

atomic_set_cpumask(&(mask).ary[0], (val).ary[0]); \

sys/cpu/x86_64/include/cpumask.h

287

atomic_set_cpumask(&(mask).ary[1], (val).ary[1]); \

sys/cpu/x86_64/include/cpumask.h

288

atomic_set_cpumask(&(mask).ary[2], (val).ary[2]); \

sys/cpu/x86_64/include/cpumask.h

289

atomic_set_cpumask(&(mask).ary[3], (val).ary[3]); \

sys/cpu/x86_64/include/cpumask.h

292

#define ATOMIC_CPUMASK_NANDMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

293

atomic_clear_cpumask(&(mask).ary[0], (val).ary[0]); \

sys/cpu/x86_64/include/cpumask.h

294

atomic_clear_cpumask(&(mask).ary[1], (val).ary[1]); \

sys/cpu/x86_64/include/cpumask.h

295

atomic_clear_cpumask(&(mask).ary[2], (val).ary[2]); \

sys/cpu/x86_64/include/cpumask.h

296

atomic_clear_cpumask(&(mask).ary[3], (val).ary[3]); \

sys/cpu/x86_64/include/cpumask.h

299

#define ATOMIC_CPUMASK_COPY(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

300

atomic_store_rel_cpumask(&(mask).ary[0], (val).ary[0]);\

sys/cpu/x86_64/include/cpumask.h

301

atomic_store_rel_cpumask(&(mask).ary[1], (val).ary[1]);\

sys/cpu/x86_64/include/cpumask.h

302

atomic_store_rel_cpumask(&(mask).ary[2], (val).ary[2]);\

sys/cpu/x86_64/include/cpumask.h

303

atomic_store_rel_cpumask(&(mask).ary[3], (val).ary[3]);\

sys/cpu/x86_64/include/cpumask.h

68

#define BSRCPUMASK(val) ((val).ary[3] ? 192 + bsrq((val).ary[3]) : \

sys/cpu/x86_64/include/cpumask.h

69

((val).ary[2] ? 128 + bsrq((val).ary[2]) : \

sys/cpu/x86_64/include/cpumask.h

70

((val).ary[1] ? 64 + bsrq((val).ary[1]) : \

sys/cpu/x86_64/include/cpumask.h

71

bsrq((val).ary[0]))))

sys/cpu/x86_64/include/cpumask.h

73

#define BSFCPUMASK(val) ((val).ary[0] ? bsfq((val).ary[0]) : \

sys/cpu/x86_64/include/cpumask.h

74

((val).ary[1] ? 64 + bsfq((val).ary[1]) : \

sys/cpu/x86_64/include/cpumask.h

75

((val).ary[2] ? 128 + bsfq((val).ary[2]) : \

sys/cpu/x86_64/include/cpumask.h

76

192 + bsfq((val).ary[3]))))

sys/cpu/x86_64/include/cpumask.h

88

#define CPUMASK_ISUP(val) ((val).ary[0] == 1 && \

sys/cpu/x86_64/include/cpumask.h

89

(val).ary[1] == 0 && \

sys/cpu/x86_64/include/cpumask.h

90

(val).ary[2] == 0 && \

sys/cpu/x86_64/include/cpumask.h

91

(val).ary[3] == 0)

sys/cpu/x86_64/include/cpumask.h

93

#define CPUMASK_TESTZERO(val) ((val).ary[0] == 0 && \

sys/cpu/x86_64/include/cpumask.h

94

(val).ary[1] == 0 && \

sys/cpu/x86_64/include/cpumask.h

95

(val).ary[2] == 0 && \

sys/cpu/x86_64/include/cpumask.h

96

(val).ary[3] == 0)

sys/cpu/x86_64/include/cpumask.h

98

#define CPUMASK_TESTNZERO(val) ((val).ary[0] != 0 || \

sys/cpu/x86_64/include/cpumask.h

99

(val).ary[1] != 0 || \

sys/cpu/x86_64/misc/elf_machdep.c

125

val = addr + addend;

sys/cpu/x86_64/misc/elf_machdep.c

126

if (*where != val)

sys/cpu/x86_64/misc/elf_machdep.c

127

*where = val;

sys/cpu/x86_64/misc/elf_machdep.c

169

val = addr;

sys/cpu/x86_64/misc/elf_machdep.c

170

if (*where != val)

sys/cpu/x86_64/misc/elf_machdep.c

171

*where = val;

sys/cpu/x86_64/misc/elf_machdep.c

79

Elf64_Addr *where, val;

sys/cpu/x86_64/misc/x86_64-gdbstub.c

297

set_char (vm_offset_t addr, int val)

sys/cpu/x86_64/misc/x86_64-gdbstub.c

304

data = val;

sys/ddb/db_lex.c

127

db_num_to_str(db_expr_t val)

sys/ddb/db_lex.c

141

ksnprintf(buf, sizeof(buf), "%" DDB_EXPR_FMT "x", val);

sys/ddb/db_lex.c

143

ksnprintf(buf, sizeof(buf), "%" DDB_EXPR_FMT "o", val);

sys/ddb/db_lex.c

145

ksnprintf(buf, sizeof(buf), "%" DDB_EXPR_FMT "u", val);

sys/ddb/db_output.c

260

db_format_radix(char *buf, size_t bufsiz, quad_t val, int altflag)

sys/ddb/db_output.c

265

db_format_hex(buf, bufsiz, val, altflag);

sys/ddb/db_output.c

274

if (val < 0)

sys/ddb/db_output.c

275

val = -val;

sys/ddb/db_output.c

279

ksnprintf(buf, bufsiz, fmt, val);

sys/ddb/db_output.c

286

db_format_hex(char *buf, size_t bufsiz, quad_t val, int altflag)

sys/ddb/db_output.c

289

const char *fmt = (altflag && val) ? "-%#qx" : "-%qx";

sys/ddb/db_output.c

291

if (val < 0)

sys/ddb/db_output.c

292

val = -val;

sys/ddb/db_output.c

296

ksnprintf(buf, bufsiz, fmt, val);

sys/ddb/db_sym.c

207

db_search_symbol(db_addr_t val, db_strategy_t strategy, db_expr_t *offp)

sys/ddb/db_sym.c

218

sym = X_db_search_symbol(&db_symtabs[i], val, strategy, &newdiff);

sys/ddb/db_sym.h

85

#define db_find_sym_and_offset(val,namep,offp) \

sys/ddb/db_sym.h

86

db_symbol_values(db_search_symbol(val,DB_STGY_ANY,offp),namep,0)

sys/ddb/db_sym.h

89

#define db_find_xtrn_sym_and_offset(val,namep,offp) \

sys/ddb/db_sym.h

90

db_symbol_values(db_search_symbol(val,DB_STGY_XTRN,offp),namep,0)

sys/ddb/db_sysctl.c

121

int val = 0;

sys/ddb/db_sysctl.c

123

err = sysctl_handle_int(oidp, &val, 0, req);

sys/ddb/db_sysctl.c

124

if (val == 1)

sys/ddb/db_sysctl.c

87

int val = 0;

sys/ddb/db_sysctl.c

89

err = sysctl_handle_int(oidp, &val, 0, req);

sys/ddb/db_sysctl.c

90

if (val == 1)

sys/dev/acpica/acpi.c

2210

UINT8 *val;

sys/dev/acpica/acpi.c

2224

val = p->Buffer.Pointer;

sys/dev/acpica/acpi.c

2226

*number += val[i] << (i * 8);

sys/dev/acpica/acpi.c

364

int val;

sys/dev/acpica/acpi.c

396

if (resource_int_value("acpi", 0, "disabled", &val) == 0 && val == 0)

sys/dev/acpica/acpi_acad.c

228

int val, error;

sys/dev/acpica/acpi_acad.c

230

if (acpi_acad_get_acline(&val) != 0)

sys/dev/acpica/acpi_acad.c

233

val = *(u_int *)oidp->oid_arg1;

sys/dev/acpica/acpi_acad.c

234

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/acpica/acpi_asus/acpi_asus.c

520

static int acpi_asus_sysctl_set(struct acpi_asus_softc *sc, int method, int val);

sys/dev/acpica/acpi_asus/acpi_asus.c

971

int val = 0;

sys/dev/acpica/acpi_asus/acpi_asus.c

978

val = sc->s_brn;

sys/dev/acpica/acpi_asus/acpi_asus.c

981

val = sc->s_disp;

sys/dev/acpica/acpi_asus/acpi_asus.c

984

val = sc->s_lcd;

sys/dev/acpica/acpi_asus/acpi_asus.c

987

val = sc->s_cam;

sys/dev/acpica/acpi_asus/acpi_asus.c

990

val = sc->s_crd;

sys/dev/acpica/acpi_asus/acpi_asus.c

993

val = sc->s_wlan;

sys/dev/acpica/acpi_asus/acpi_asus.c

997

return (val);

sys/dev/acpica/acpi_battery.c

434

int val, error;

sys/dev/acpica/acpi_battery.c

437

val = *(u_int *)oidp->oid_arg1;

sys/dev/acpica/acpi_battery.c

438

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/acpica/acpi_cpu_cstate.c

1020

uint32_t val;

sys/dev/acpica/acpi_cpu_cstate.c

1075

val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);

sys/dev/acpica/acpi_cpu_cstate.c

1076

if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {

sys/dev/acpica/acpi_cpu_cstate.c

1079

val |= PIIX4_STOP_BREAK_MASK;

sys/dev/acpica/acpi_cpu_cstate.c

1080

pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);

sys/dev/acpica/acpi_cpu_cstate.c

1082

AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);

sys/dev/acpica/acpi_cpu_cstate.c

1083

if (val) {

sys/dev/acpica/acpi_cpu_cstate.c

1130

acpi_cst_set_lowest_oncpu(struct acpi_cst_softc *sc, int val)

sys/dev/acpica/acpi_cpu_cstate.c

1138

sc->cst_cx_lowest_req = val;

sys/dev/acpica/acpi_cpu_cstate.c

1140

if (val > sc->cst_cx_count - 1)

sys/dev/acpica/acpi_cpu_cstate.c

1141

val = sc->cst_cx_count - 1;

sys/dev/acpica/acpi_cpu_cstate.c

1142

old_lowest = atomic_swap_int(&sc->cst_cx_lowest, val);

sys/dev/acpica/acpi_cpu_cstate.c

1145

type = sc->cst_cx_states[val].type;

sys/dev/acpica/acpi_cpu_cstate.c

1178

acpi_cst_set_lowest(struct acpi_cst_softc *sc, int val)

sys/dev/acpica/acpi_cpu_cstate.c

1184

msg.ch_cbarg1 = val;

sys/dev/acpica/acpi_cpu_cstate.c

1194

int val, error;

sys/dev/acpica/acpi_cpu_cstate.c

1203

val = (int) strtol(state + 1, NULL, 10) - 1;

sys/dev/acpica/acpi_cpu_cstate.c

1204

if (val < 0)

sys/dev/acpica/acpi_cpu_cstate.c

1208

error = acpi_cst_set_lowest(sc, val);

sys/dev/acpica/acpi_cpu_cstate.c

1230

int val, error, i;

sys/dev/acpica/acpi_cpu_cstate.c

1238

val = (int) strtol(state + 1, NULL, 10) - 1;

sys/dev/acpica/acpi_cpu_cstate.c

1239

if (val < 0)

sys/dev/acpica/acpi_cpu_cstate.c

1244

acpi_cst_cx_lowest_req = val;

sys/dev/acpica/acpi_cpu_cstate.c

1245

acpi_cst_cx_lowest = val;

sys/dev/acpica/acpi_cpu_cstate.c

1252

error = acpi_cst_set_lowest(sc, val);

sys/dev/acpica/acpi_cpu_pstate.c

819

uint32_t val, domain, coord, nproc;

sys/dev/acpica/acpi_cpu_pstate.c

827

if (acpi_PkgInt32(obj, 0, &val) != 0 || val != 5) {

sys/dev/acpica/acpi_cpu_pstate.c

833

if (acpi_PkgInt32(obj, 1, &val) != 0 || val != 0) {

sys/dev/acpica/acpi_ec.c

284

UINT64 *val, int width);

sys/dev/acpica/acpi_ec.c

286

UINT64 val, int width);

sys/dev/acpica/acpi_ec.c

622

acpi_ec_read_method(device_t dev, u_int addr, UINT64 *val, int width)

sys/dev/acpica/acpi_ec.c

628

status = EcSpaceHandler(ACPI_READ, addr, width * 8, val, sc, NULL);

sys/dev/acpica/acpi_ec.c

635

acpi_ec_write_method(device_t dev, u_int addr, UINT64 val, int width)

sys/dev/acpica/acpi_ec.c

641

status = EcSpaceHandler(ACPI_WRITE, addr, width * 8, &val, sc, NULL);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

583

int val;

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

597

sc->gvol.name, &val))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

604

sc->gbls.name, &val))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

612

sc->gbll.name, &val))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

619

sc->ghks.name, &val))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

626

sc->gmou.name, &val))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

633

sc->rbll.name, &val))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

640

sc->rvol.name, &val))) {

sys/dev/acpica/acpi_hp/acpi_hp.c

302

int is_write, int val);

sys/dev/acpica/acpi_hp/acpi_hp.c

638

int val = 0;

sys/dev/acpica/acpi_hp/acpi_hp.c

645

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

647

val = ((val & HP_MASK_WLAN_ENABLED) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

650

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

652

val = ((val & HP_MASK_WLAN_RADIO) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

655

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

657

val = ((val & HP_MASK_WLAN_ON_AIR) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

660

val = sc->wlan_enable_if_radio_on;

sys/dev/acpica/acpi_hp/acpi_hp.c

663

val = sc->wlan_disable_if_radio_off;

sys/dev/acpica/acpi_hp/acpi_hp.c

666

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

668

val = ((val & HP_MASK_BLUETOOTH_ENABLED) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

671

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

673

val = ((val & HP_MASK_BLUETOOTH_RADIO) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

676

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

678

val = ((val & HP_MASK_BLUETOOTH_ON_AIR) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

681

val = sc->bluetooth_enable_if_radio_on;

sys/dev/acpica/acpi_hp/acpi_hp.c

684

val = sc->bluetooth_disable_if_radio_off;

sys/dev/acpica/acpi_hp/acpi_hp.c

687

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

689

val = ((val & HP_MASK_WWAN_ENABLED) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

692

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

694

val = ((val & HP_MASK_WWAN_RADIO) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

697

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

699

val = ((val & HP_MASK_WWAN_ON_AIR) != 0);

sys/dev/acpica/acpi_hp/acpi_hp.c

702

val = sc->wwan_enable_if_radio_on;

sys/dev/acpica/acpi_hp/acpi_hp.c

705

val = sc->wwan_disable_if_radio_off;

sys/dev/acpica/acpi_hp/acpi_hp.c

708

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

712

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

716

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

720

val = acpi_hp_exec_wmi_command(sc->wmi_dev,

sys/dev/acpica/acpi_hp/acpi_hp.c

724

val = sc->cmi_detail;

sys/dev/acpica/acpi_hp/acpi_hp.c

727

val = sc->verbose;

sys/dev/acpica/acpi_hp/acpi_hp.c

731

return (val);

sys/dev/acpica/acpi_hp/acpi_hp.c

829

acpi_hp_exec_wmi_command(device_t wmi_dev, int command, int is_write, int val)

sys/dev/acpica/acpi_hp/acpi_hp.c

835

val};

sys/dev/acpica/acpi_hpet.c

167

uint32_t val;

sys/dev/acpica/acpi_hpet.c

169

val = readl(ptr + HPET_CONFIG);

sys/dev/acpica/acpi_hpet.c

170

writel(ptr + HPET_CONFIG, val | HPET_CNF_ENABLE);

sys/dev/acpica/acpi_hpet.c

181

uint32_t val;

sys/dev/acpica/acpi_hpet.c

183

val = readl(ptr + HPET_CONFIG);

sys/dev/acpica/acpi_hpet.c

184

writel(ptr + HPET_CONFIG, val & ~HPET_CNF_ENABLE);

sys/dev/acpica/acpi_hpet.c

192

uint32_t val, val2;

sys/dev/acpica/acpi_hpet.c

194

val = readl(ptr + HPET_CONFIG);

sys/dev/acpica/acpi_hpet.c

195

writel(ptr + HPET_CONFIG, val | HPET_CNF_ENABLE);

sys/dev/acpica/acpi_hpet.c

198

val = readl(ptr + HPET_PERIOD);

sys/dev/acpica/acpi_hpet.c

199

if (val == 0) {

sys/dev/acpica/acpi_hpet.c

201

val = readl(ptr + HPET_CONFIG);

sys/dev/acpica/acpi_hpet.c

202

writel(ptr + HPET_CONFIG, val & ~HPET_CNF_ENABLE);

sys/dev/acpica/acpi_hpet.c

206

freq = (1000000000000000LL + val / 2) / val;

sys/dev/acpica/acpi_hpet.c

208

val = readl(ptr + HPET_CAPABILITIES);

sys/dev/acpica/acpi_hpet.c

211

val >> 16, val & HPET_CAP_REV_ID,

sys/dev/acpica/acpi_hpet.c

212

(val & HPET_CAP_NUM_TIM) >> 8,

sys/dev/acpica/acpi_hpet.c

213

(val & HPET_CAP_LEG_RT) ? " legacy_route" : "",

sys/dev/acpica/acpi_hpet.c

214

(val & HPET_CAP_COUNT_SIZE) ? " 64-bit" : "");

sys/dev/acpica/acpi_hpet.c

226

val = readl(ptr + HPET_MAIN_COUNTER);

sys/dev/acpica/acpi_hpet.c

234

if (val == val2) {

sys/dev/acpica/acpi_hpet.c

236

val = readl(ptr + HPET_CONFIG);

sys/dev/acpica/acpi_hpet.c

237

writel(ptr + HPET_CONFIG, val & ~HPET_CNF_ENABLE);

sys/dev/acpica/acpi_hpet.c

241

val = readl(ptr + HPET_CONFIG);

sys/dev/acpica/acpi_hpet.c

242

writel(ptr + HPET_CONFIG, val & ~HPET_CNF_ENABLE);

sys/dev/acpica/acpi_hpet.c

417

uint32_t val, val2;

sys/dev/acpica/acpi_hpet.c

469

val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh, HPET_PERIOD);

sys/dev/acpica/acpi_hpet.c

470

if (val == 0) {

sys/dev/acpica/acpi_hpet.c

477

freq = (1000000000000000LL + val / 2) / val;

sys/dev/acpica/acpi_hpet.c

479

val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh,

sys/dev/acpica/acpi_hpet.c

483

val >> 16, val & HPET_CAP_REV_ID,

sys/dev/acpica/acpi_hpet.c

484

(val & HPET_CAP_NUM_TIM) >> 8,

sys/dev/acpica/acpi_hpet.c

485

(val & HPET_CAP_LEG_RT) ? " legacy_route" : "",

sys/dev/acpica/acpi_hpet.c

486

(val & HPET_CAP_COUNT_SIZE) ? " 64-bit" : "");

sys/dev/acpica/acpi_hpet.c

496

val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh,

sys/dev/acpica/acpi_hpet.c

501

if (val == val2) {

sys/dev/acpica/acpi_hpet.c

556

uint32_t val;

sys/dev/acpica/acpi_hpet.c

558

val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh, HPET_CONFIG);

sys/dev/acpica/acpi_hpet.c

560

val | HPET_CNF_ENABLE);

sys/dev/acpica/acpi_hpet.c

566

uint32_t val;

sys/dev/acpica/acpi_hpet.c

568

val = bus_space_read_4(acpi_hpet_bst, acpi_hpet_bsh, HPET_CONFIG);

sys/dev/acpica/acpi_hpet.c

570

val & ~HPET_CNF_ENABLE);

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

287

acpi_panasonic_sset(ACPI_HANDLE h, UINT64 index, UINT64 val)

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

296

obj[1].Integer.Value = val;

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

303

hkey_lcd_brightness_max(ACPI_HANDLE h, int op, UINT32 *val)

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

316

*val = acpi_panasonic_sinf(h, reg);

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

324

hkey_lcd_brightness_min(ACPI_HANDLE h, int op, UINT32 *val)

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

337

*val = acpi_panasonic_sinf(h, reg);

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

345

hkey_lcd_brightness(ACPI_HANDLE h, int op, UINT32 *val)

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

358

if (*val < min || *val > max)

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

360

acpi_panasonic_sset(h, reg, *val);

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

363

*val = acpi_panasonic_sinf(h, reg);

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

371

hkey_sound_mute(ACPI_HANDLE h, int op, UINT32 *val)

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

377

if (*val != 0 && *val != 1)

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

379

acpi_panasonic_sset(h, HKEY_REG_SOUND_MUTE, *val);

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

382

*val = acpi_panasonic_sinf(h, HKEY_REG_SOUND_MUTE);

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

395

UINT64 val;

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

409

val = res->Integer.Value;

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

412

(val & 0x80) ? "Pressed" : "Released",

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

413

(int)(val & 0x7f));

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

415

if ((val & 0x7f) > 0 && (val & 0x7f) < 11) {

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

416

*arg = val;

sys/dev/acpica/acpi_panasonic/acpi_panasonic.c

84

static void acpi_panasonic_sset(ACPI_HANDLE h, UINT64 index, UINT64 val);

sys/dev/acpica/acpi_pvpanic/acpi_pvpanic.c

104

uint8_t val;

sys/dev/acpica/acpi_pvpanic/acpi_pvpanic.c

121

val = bus_space_read_1(sc->pvpanic_iot, sc->pvpanic_ioh, 0);

sys/dev/acpica/acpi_pvpanic/acpi_pvpanic.c

122

if (!(val & PVPANIC_GUESTPANIC)) {

sys/dev/acpica/acpi_quirk.c

114

switch (match->val) {

sys/dev/acpica/acpi_quirk.c

52

enum val_t val;

sys/dev/acpica/acpi_smbat.c

194

UINT64 val;

sys/dev/acpica/acpi_smbat.c

201

val = addr;

sys/dev/acpica/acpi_smbat.c

203

val, 1);

sys/dev/acpica/acpi_smbat.c

207

val = cmd;

sys/dev/acpica/acpi_smbat.c

209

val, 1);

sys/dev/acpica/acpi_smbat.c

213

val = 0x09; /* | 0x80 if PEC */

sys/dev/acpica/acpi_smbat.c

215

val, 1);

sys/dev/acpica/acpi_smbat.c

224

&val, 1);

sys/dev/acpica/acpi_smbat.c

227

if (val == 0)

sys/dev/acpica/acpi_smbat.c

236

error = ACPI_EC_READ(sc->ec_dev, sc->sb_base_addr + SMBUS_STS, &val, 1);

sys/dev/acpica/acpi_smbat.c

239

if (val & SMBUS_STS_MASK) {

sys/dev/acpica/acpi_smbat.c

241

__func__, (int)(val & SMBUS_STS_MASK));

sys/dev/acpica/acpi_smbat.c

247

&val, 2);

sys/dev/acpica/acpi_smbat.c

251

*ptr = val;

sys/dev/acpica/acpi_smbat.c

261

UINT64 val;

sys/dev/acpica/acpi_smbat.c

270

val = addr;

sys/dev/acpica/acpi_smbat.c

272

val, 1);

sys/dev/acpica/acpi_smbat.c

276

val = cmd;

sys/dev/acpica/acpi_smbat.c

278

val, 1);

sys/dev/acpica/acpi_smbat.c

282

val = 0x0B /* | 0x80 if PEC */ ;

sys/dev/acpica/acpi_smbat.c

284

val, 1);

sys/dev/acpica/acpi_smbat.c

293

&val, 1);

sys/dev/acpica/acpi_smbat.c

296

if (val == 0)

sys/dev/acpica/acpi_smbat.c

305

error = ACPI_EC_READ(sc->ec_dev, sc->sb_base_addr + SMBUS_STS, &val, 1);

sys/dev/acpica/acpi_smbat.c

308

if (val & SMBUS_STS_MASK) {

sys/dev/acpica/acpi_smbat.c

310

__func__, (int)(val & SMBUS_STS_MASK));

sys/dev/acpica/acpi_smbat.c

317

&val, 1);

sys/dev/acpica/acpi_smbat.c

320

val = (val & 0x1f) + 1;

sys/dev/acpica/acpi_smbat.c

323

if (len > val)

sys/dev/acpica/acpi_smbat.c

324

len = val;

sys/dev/acpica/acpi_smbat.c

331

+ len, &val, 1);

sys/dev/acpica/acpi_smbat.c

335

ptr[len] = val;

sys/dev/acpica/acpi_smbat.c

350

int16_t val;

sys/dev/acpica/acpi_smbat.c

364

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_BATTERY_MODE, &val))

sys/dev/acpica/acpi_smbat.c

366

if (val & SMBATT_BM_CAPACITY_MODE)

sys/dev/acpica/acpi_smbat.c

372

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_BATTERY_STATUS, &val))

sys/dev/acpica/acpi_smbat.c

376

if (val & SMBATT_BS_DISCHARGING)

sys/dev/acpica/acpi_smbat.c

379

if (val & SMBATT_BS_REMAINING_CAPACITY_ALARM)

sys/dev/acpica/acpi_smbat.c

386

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_CURRENT, &val))

sys/dev/acpica/acpi_smbat.c

389

if (val > 0) {

sys/dev/acpica/acpi_smbat.c

390

sc->bst.rate = val * factor;

sys/dev/acpica/acpi_smbat.c

393

} else if (val < 0)

sys/dev/acpica/acpi_smbat.c

394

sc->bst.rate = (-val) * factor;

sys/dev/acpica/acpi_smbat.c

398

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_REMAINING_CAPACITY, &val))

sys/dev/acpica/acpi_smbat.c

400

sc->bst.cap = val * factor;

sys/dev/acpica/acpi_smbat.c

402

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_VOLTAGE, &val))

sys/dev/acpica/acpi_smbat.c

404

sc->bst.volt = val;

sys/dev/acpica/acpi_smbat.c

422

uint16_t val;

sys/dev/acpica/acpi_smbat.c

436

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_BATTERY_MODE, &val))

sys/dev/acpica/acpi_smbat.c

438

if (val & SMBATT_BM_CAPACITY_MODE) {

sys/dev/acpica/acpi_smbat.c

446

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_DESIGN_CAPACITY, &val))

sys/dev/acpica/acpi_smbat.c

448

sc->bif.dcap = val * factor;

sys/dev/acpica/acpi_smbat.c

450

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_FULL_CHARGE_CAPACITY, &val))

sys/dev/acpica/acpi_smbat.c

452

sc->bif.lfcap = val * factor;

sys/dev/acpica/acpi_smbat.c

455

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_DESIGN_VOLTAGE, &val))

sys/dev/acpica/acpi_smbat.c

457

sc->bif.dvol = val;

sys/dev/acpica/acpi_smbat.c

469

if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_SERIAL_NUMBER, &val))

sys/dev/acpica/acpi_smbat.c

471

ksnprintf(sc->bif.serial, sizeof(sc->bif.serial), "0x%04x", val);

sys/dev/acpica/acpi_sony/acpi_sony.c

183

int error = 0, val;

sys/dev/acpica/acpi_sony/acpi_sony.c

186

acpi_sony_oids[function].getmethod, &val);

sys/dev/acpica/acpi_sony/acpi_sony.c

187

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/acpica/acpi_sony/acpi_sony.c

191

acpi_sony_oids[function].setmethod, val);

sys/dev/acpica/acpi_thermal.c

143

static void acpi_tz_sanity(struct acpi_tz_softc *sc, int *val, char *what);

sys/dev/acpica/acpi_thermal.c

745

int val, error;

sys/dev/acpica/acpi_thermal.c

747

val = acpi_tz_polling_rate;

sys/dev/acpica/acpi_thermal.c

748

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/acpica/acpi_thermal.c

753

if (val < 0 || val > 3600)

sys/dev/acpica/acpi_thermal.c

756

acpi_tz_polling_rate = val;

sys/dev/acpica/acpi_thermal.c

766

acpi_tz_sanity(struct acpi_tz_softc *sc, int *val, char *what)

sys/dev/acpica/acpi_thermal.c

768

if (*val != -1 && (*val < TZ_ZEROC || *val > TZ_ZEROC + 2000)) {

sys/dev/acpica/acpi_thermal.c

779

what, TZ_KELVTOC(*val));

sys/dev/acpica/acpi_thermal.c

785

*val = -1;

sys/dev/acpica/acpi_thermal.c

881

int val, *val_ptr;

sys/dev/acpica/acpi_thermal.c

886

val = *val_ptr;

sys/dev/acpica/acpi_thermal.c

887

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/acpica/acpi_thermal.c

897

*val_ptr = val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1124

int l, val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1181

val = strtoul(cp, &ep, 16);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1183

val = strtoul(cp, &ep, 10);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1185

if (val == 0 || ep == cp || val >= 8 * sizeof(handler_events)) {

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1192

handler_events |= 1 << (val - 1);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1206

int val, step;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1224

val = val_ec & THINKPAD_EC_MASK_BRI;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1229

Arg.Integer.Value = (arg > val) ? THINKPAD_CMOS_BRIGHTNESS_UP :

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1232

step = (arg > val) ? 1 : -1;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1233

for (int i = val; i != arg; i += step) {

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1237

if (i != val) {

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1252

int val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1260

val = (arg == 1) ? sc->wlan_bt_flags | THINKPAD_NAME_MASK_BT :

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1262

return acpi_SetInteger(sc->handle, THINKPAD_NAME_WLAN_BT_SET, val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1330

int val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1332

status = acpi_thinkpad_privacyguard_acpi_call(sc, false, &val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1334

(val & THINKPAD_FLAG_PRIVACYGUARD_DEVICE_PRESENT))

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1335

return (val & THINKPAD_FLAG_PRIVACYGUARD_ON);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1352

int val, step;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1370

val = val_ec & THINKPAD_EC_MASK_VOL;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1375

Arg.Integer.Value = (arg > val) ? THINKPAD_CMOS_VOLUME_UP :

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1378

step = (arg > val) ? 1 : -1;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1379

for (int i = val; i != arg; i += step) {

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1384

if (i != val) {

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1436

int val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1460

val = val_ec & THINKPAD_EC_MASK_BRI;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1461

val = (arg == THINKPAD_EVENT_BRIGHTNESS_UP) ? val + 1 : val - 1;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1462

acpi_thinkpad_brightness_set(sc, val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1476

val = val_ec & THINKPAD_EC_MASK_VOL;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1477

val = (arg == THINKPAD_EVENT_VOLUME_UP) ? val + 1 : val - 1;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1478

acpi_thinkpad_volume_set(sc, val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1487

val = ((val_ec & THINKPAD_EC_MASK_MUTE) == THINKPAD_EC_MASK_MUTE);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1488

acpi_thinkpad_mute_set(sc, (val == 0));

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

335

static int acpi_thinkpad_sysctl_set(struct acpi_thinkpad_softc *sc, int method, int val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

337

static int acpi_thinkpad_eventmask_set(struct acpi_thinkpad_softc *sc, int val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

674

int val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

676

val = acpi_thinkpad_sysctl_get(sc, i);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

681

acpi_thinkpad_sysctl_set(sc, i, val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

692

acpi_thinkpad_eventmask_set(struct acpi_thinkpad_softc *sc, int val)

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

709

arg[1].Integer.Value = (((1U << i) & val) != 0);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

755

int val = 0, key;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

762

acpi_GetInteger(sc->handle, THINKPAD_NAME_EVENTS_STATUS_GET, &val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

767

acpi_GetInteger(sc->handle, THINKPAD_NAME_EVENTS_MASK_GET, &val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

793

val = (THINKPAD_RTC_MASK_HOME | THINKPAD_RTC_MASK_SEARCH | THINKPAD_RTC_MASK_MAIL | THINKPAD_RTC_MASK_WLAN) & key;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

795

val |= (THINKPAD_RTC_MASK_THINKPAD | THINKPAD_RTC_MASK_VIDEO | THINKPAD_RTC_MASK_HIBERNATE) & key;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

796

val |= (THINKPAD_RTC_MASK_ZOOM & key) >> 1;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

798

val |= (THINKPAD_RTC_MASK_THINKLIGHT & key) << 4;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

800

val |= (THINKPAD_RTC_MASK_THINKLIGHT & key) << 4;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

802

val |= (THINKPAD_RTC_MASK_BRIGHTNESS & key) << 5;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

804

val |= (THINKPAD_RTC_MASK_VOLUME & key) << 4;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

809

val = val_ec & THINKPAD_EC_MASK_BRI;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

814

val = val_ec & THINKPAD_EC_MASK_VOL;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

819

val = ((val_ec & THINKPAD_EC_MASK_MUTE) == THINKPAD_EC_MASK_MUTE);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

824

acpi_GetInteger(sc->ec_handle, THINKPAD_NAME_KEYLIGHT, &val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

826

val = sc->light_val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

830

acpi_GetInteger(sc->handle, THINKPAD_NAME_WLAN_BT_GET, &val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

831

sc->wlan_bt_flags = val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

832

val = ((val & THINKPAD_NAME_MASK_BT) != 0);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

836

acpi_GetInteger(sc->handle, THINKPAD_NAME_WLAN_BT_GET, &val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

837

sc->wlan_bt_flags = val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

838

val = ((val & THINKPAD_NAME_MASK_WLAN) != 0);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

843

if (ACPI_FAILURE(acpi_GetInteger(sc->fan_handle, NULL, &val)))

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

844

val = -1;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

847

val = val_ec;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

863

val = val_ec & THINKPAD_EC_MASK_FANLEVEL;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

870

val = (val_ec & THINKPAD_EC_MASK_FANSTATUS) == THINKPAD_EC_MASK_FANSTATUS;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

872

val = -1;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

879

val = -1;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

883

val = acpi_thinkpad_privacyguard_get(sc);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

887

return (val);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

893

int val;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

952

val = val_ec & (~THINKPAD_EC_MASK_FANLEVEL);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

954

return ACPI_EC_WRITE(sc->ec_dev, THINKPAD_EC_FANSTATUS, val | arg, 1);

sys/dev/acpica/acpi_video/acpi_video.c

898

UINT32 adr, val;

sys/dev/acpica/acpi_video/acpi_video.c

909

if (acpi_PkgInt32(argset->dod_pkg, i, &val) == 0 &&

sys/dev/acpica/acpi_video/acpi_video.c

910

(val & DOD_DEVID_MASK_FULL) ==

sys/dev/acpica/acpi_video/acpi_video.c

912

argset->callback(handle, val, argset->context);

sys/dev/agp/agp_via.c

289

u_int32_t apsize, key, val;

sys/dev/agp/agp_via.c

341

val = pci_read_config(dev, sc->regs[REG_APSIZE], 2);

sys/dev/agp/agp_via.c

343

((val & ~0xfff) | key), 2);

sys/dev/agp/intel-gtt.c

1671

intel_gtt_write(u_int entry, uint32_t val)

sys/dev/agp/intel-gtt.c

1676

sc->match->driver->write_gtt(intel_agp, entry, val);

sys/dev/apple/fw/apple_fw.c

256

UINT32 val;

sys/dev/apple/fw/apple_fw.c

260

if (ACPI_SUCCESS(acpi_GetInteger(NULL, "OSDW", &val)))

sys/dev/apple/fw/apple_fw.c

261

sc->sc_osdw = (int)val;

sys/dev/apple/smc/debug.h

15

#define SMC_DEBUG_KEY(dev, key, val) \

sys/dev/apple/smc/debug.h

16

device_printf((dev), "key[%.4s] = 0x%08x\n", (key), (val))

sys/dev/apple/smc/debug.h

19

#define SMC_DEBUG_KEY(dev, key, val) do {} while (0)

sys/dev/apple/smc/smc.c

934

uint16_t val;

sys/dev/apple/smc/smc.c

939

val = (buf[0] << 8) | buf[1];

sys/dev/apple/smc/smc.c

940

val |= sc->sc_fan_manual_mask;

sys/dev/apple/smc/smc.c

941

buf[0] = val >> 8;

sys/dev/apple/smc/smc.c

942

buf[1] = val & 0xff;

sys/dev/apple/smc/smc.c

975

uint16_t val;

sys/dev/apple/smc/smc.c

980

val = (buf[0] << 8) | buf[1];

sys/dev/apple/smc/smc.c

981

val &= ~sc->sc_fan_manual_mask;

sys/dev/apple/smc/smc.c

982

val |= sc->sc_fan_manual_saved;

sys/dev/apple/smc/smc.c

983

buf[0] = val >> 8;

sys/dev/apple/smc/smc.c

984

buf[1] = val & 0xff;

sys/dev/apple/smc/smc.h

123

#define ASMC_DATAPORT_WRITE(sc, val) bus_write_1(sc->sc_ioport, 0x00, val)

sys/dev/apple/smc/smc.h

125

#define ASMC_CMDPORT_WRITE(sc, val) bus_write_1(sc->sc_ioport, 0x04, val)

sys/dev/apple/smc/smc_io.c

24

apple_smc_wait_ack(device_t dev, uint8_t val, int amount)

sys/dev/apple/smc/smc_io.c

29

val = val & ASMC_STATUS_MASK;

sys/dev/apple/smc/smc_io.c

31

if ((ASMC_CMDPORT_READ(sc) & ASMC_STATUS_MASK) == val)

sys/dev/apple/smc/smc_io.c

39

apple_smc_wait(device_t dev, uint8_t val)

sys/dev/apple/smc/smc_io.c

41

if (apple_smc_wait_ack(dev, val, 1000) == 0)

sys/dev/apple/smc/smc_io.c

47

val & ASMC_STATUS_MASK, ASMC_CMDPORT_READ(sc));

sys/dev/apple/smc/smc_io.c

544

apple_smc_sms_read(device_t dev, const char *key, int16_t *val)

sys/dev/apple/smc/smc_io.c

559

*val = ((int16_t)buf[0] << 8) | buf[1];

sys/dev/apple/smc/smc_sysctl.c

133

uint16_t val;

sys/dev/apple/smc/smc_sysctl.c

160

val = (buf[0] << 8) | buf[1];

sys/dev/apple/smc/smc_sysctl.c

161

v = (val >> fan) & 0x01;

sys/dev/apple/smc/smc_sysctl.c

170

val = (buf[0] << 8) | buf[1];

sys/dev/apple/smc/smc_sysctl.c

172

val |= (1 << fan);

sys/dev/apple/smc/smc_sysctl.c

174

val &= ~(1 << fan);

sys/dev/apple/smc/smc_sysctl.c

176

buf[0] = val >> 8;

sys/dev/apple/smc/smc_sysctl.c

177

buf[1] = val & 0xff;

sys/dev/apple/smc/smc_sysctl.c

191

int val;

sys/dev/apple/smc/smc_sysctl.c

196

error = apple_smc_sensor_read(dev, sc->sc_temp_sensors[arg2], &val);

sys/dev/apple/smc/smc_sysctl.c

200

return (sysctl_handle_int(oidp, &val, 0, req));

sys/dev/apple/smc/smc_sysctl.c

208

int error, val;

sys/dev/apple/smc/smc_sysctl.c

212

error = apple_smc_sensor_read(dev, sc->sc_dts_sensors[arg2], &val);

sys/dev/apple/smc/smc_sysctl.c

216

if (val <= -120000)

sys/dev/apple/smc/smc_sysctl.c

219

val = sc->sc_tj_max * 1000 + val;

sys/dev/apple/smc/smc_sysctl.c

220

return (sysctl_handle_int(oidp, &val, 0, req));

sys/dev/apple/smc/smc_sysctl.c

228

int error, val;

sys/dev/apple/smc/smc_sysctl.c

261

error = apple_smc_sensor_read(dev, key, &val);

sys/dev/apple/smc/smc_sysctl.c

265

return (sysctl_handle_int(oidp, &val, 0, req));

sys/dev/apple/smc/smc_sysctl.c

272

int16_t val;

sys/dev/apple/smc/smc_sysctl.c

276

error = apple_smc_sms_read(dev, key, &val);

sys/dev/apple/smc/smc_sysctl.c

280

v = (int32_t)val;

sys/dev/apple/smc/smc_sysctl.c

383

int val, error;

sys/dev/apple/smc/smc_sysctl.c

387

val = (raw != 0) ? 1 : 0;

sys/dev/apple/smc/smc_sysctl.c

388

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/apple/smc/smc_sysctl.c

391

if (val != 0 && val != 1)

sys/dev/apple/smc/smc_sysctl.c

393

raw = (uint8_t)val;

sys/dev/apple/smc/smc_sysctl.c

402

int val, error;

sys/dev/apple/smc/smc_sysctl.c

407

val = (int)bclm;

sys/dev/apple/smc/smc_sysctl.c

408

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/apple/smc/smc_sysctl.c

412

if (val < 0 || val > 100) {

sys/dev/apple/smc/smc_sysctl.c

415

bclm = (uint8_t)val;

sys/dev/apple/smc/smc_sysctl.c

572

uint8_t gen; uint32_t val;

sys/dev/apple/smc/smc_sysctl.c

577

val = gen;

sys/dev/apple/smc/smc_sysctl.c

578

return (sysctl_handle_32(oidp, &val, 0, req));

sys/dev/apple/smc/smc_sysctl.c

644

unsigned int val;

sys/dev/apple/smc/smc_sysctl.c

647

if (ksscanf(tmp, "%02x", &val) == 1) {

sys/dev/apple/smc/smc_sysctl.c

648

sc->sc_rawval[i] = (uint8_t)val;

sys/dev/apple/smc/smc_sysctl.c

753

uint32_t val;

sys/dev/apple/smc/smc_sysctl.c

757

val = be16dec(buf);

sys/dev/apple/smc/smc_sysctl.c

758

return (sysctl_handle_32(oidp, &val, 0, req));

sys/dev/apple/smc/smc_sysctl.c

766

uint8_t val;

sys/dev/apple/smc/smc_sysctl.c

769

if (apple_smc_key_read(dev, ASMC_KEY_ENV0, &val, 1) != 0)

sys/dev/apple/smc/smc_sysctl.c

771

v = val;

sys/dev/apple/smc/smc_sysctl.c

781

int val, error;

sys/dev/apple/smc/smc_sysctl.c

784

val = sc->sc_prochot_override;

sys/dev/apple/smc/smc_sysctl.c

785

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/apple/smc/smc_sysctl.c

789

if (val != 0 && val != 1)

sys/dev/apple/smc/smc_sysctl.c

791

if (val == sc->sc_prochot_override)

sys/dev/apple/smc/smc_sysctl.c

797

if (val)

sys/dev/apple/smc/smc_sysctl.c

805

if (!val) {

sys/dev/apple/smc/smc_sysctl.c

813

sc->sc_prochot_override = val;

sys/dev/apple/smc/smc_thermal.c

262

int val, error;

sys/dev/apple/smc/smc_thermal.c

264

val = sc->sc_thermal_enabled;

sys/dev/apple/smc/smc_thermal.c

265

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/apple/smc/smc_thermal.c

269

val = (val != 0) ? 1 : 0;

sys/dev/apple/smc/smc_thermal.c

270

if (val == sc->sc_thermal_enabled)

sys/dev/apple/smc/smc_thermal.c

273

sc->sc_thermal_enabled = val;

sys/dev/apple/smc/smc_thermal.c

275

if (!val && sc->sc_prochot_override) {

sys/dev/apple/smc/smc_thermal.c

289

int val, error;

sys/dev/apple/smc/smc_thermal.c

291

val = *valp;

sys/dev/apple/smc/smc_thermal.c

292

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/apple/smc/smc_thermal.c

295

if (val <= 0)

sys/dev/apple/smc/smc_thermal.c

297

*valp = val;

sys/dev/apple/smc/smc_thermal.c

53

int val, best, i, error;

sys/dev/apple/smc/smc_thermal.c

58

error = apple_smc_sensor_read(dev, "TC0c", &val);

sys/dev/apple/smc/smc_thermal.c

59

if (error == 0 && val > THERMAL_MIN_TEMP && val < 130000)

sys/dev/apple/smc/smc_thermal.c

60

best = val;

sys/dev/apple/smc/smc_thermal.c

68

sc->sc_temp_sensors[i], &val);

sys/dev/apple/smc/smc_thermal.c

69

if (error == 0 && val > best && val > THERMAL_MIN_TEMP &&

sys/dev/apple/smc/smc_thermal.c

70

val < 130000)

sys/dev/apple/smc/smc_thermal.c

71

best = val;

sys/dev/crypto/rndtest/rndtest.c

267

rndtest_runs_check(struct rndtest_state *rsp, int val, int *src)

sys/dev/crypto/rndtest/rndtest.c

276

val ? "ones" : "zeros",

sys/dev/crypto/rndtest/rndtest.c

283

val ? "ones" : "zeros",

sys/dev/crypto/tpm/tpm20.h

160

WR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)

sys/dev/crypto/tpm/tpm20.h

163

bus_write_1(sc->mem_res, off, val);

sys/dev/crypto/tpm/tpm20.h

166

WR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)

sys/dev/crypto/tpm/tpm20.h

169

bus_write_4(sc->mem_res, off, val);

sys/dev/crypto/tpm/tpm20.h

172

AND4(struct tpm_sc *sc, bus_size_t off, uint32_t val)

sys/dev/crypto/tpm/tpm20.h

175

WR4(sc, off, RD4(sc, off) & val);

sys/dev/crypto/tpm/tpm20.h

178

OR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)

sys/dev/crypto/tpm/tpm20.h

181

WR1(sc, off, RD1(sc, off) | val);

sys/dev/crypto/tpm/tpm20.h

184

OR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)

sys/dev/crypto/tpm/tpm20.h

187

WR4(sc, off, RD4(sc, off) | val);

sys/dev/crypto/tpm/tpm_crb.c

246

tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, uint32_t mask, uint32_t val,

sys/dev/crypto/tpm/tpm_crb.c

251

if ((RD4(sc, off) & mask) == val)

sys/dev/crypto/tpm/tpm_crb.c

255

if ((RD4(sc, off) & mask) == val)

sys/dev/crypto/tpm/tpm_crb.c

96

uint32_t mask, uint32_t val, int32_t timeout);

sys/dev/crypto/tpm/tpm_tis.c

249

tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, uint32_t mask, uint32_t val,

sys/dev/crypto/tpm/tpm_tis.c

254

if ((RD4(sc, off) & mask) == val)

sys/dev/crypto/tpm/tpm_tis.c

262

return ((RD4(sc, off) & mask) == val);

sys/dev/crypto/tpm/tpm_tis.c

267

if ((RD4(sc, off) & mask) == val)

sys/dev/crypto/tpm/tpm_tis.c

94

uint32_t mask, uint32_t val, int32_t timeout);

sys/dev/disk/advansys/advlib.c

805

u_int16_t val;

sys/dev/disk/advansys/advlib.c

816

val = adv_read_lram_16(adv, q_addr + ADV_SCSIQ_B_STATUS);

sys/dev/disk/advansys/advlib.c

817

scsiq->q_status = val & 0xFF;

sys/dev/disk/advansys/advlib.c

818

scsiq->q_no = (val >> 8) & 0XFF;

sys/dev/disk/advansys/advlib.c

820

val = adv_read_lram_16(adv, q_addr + ADV_SCSIQ_B_CNTL);

sys/dev/disk/advansys/advlib.c

821

scsiq->cntl = val & 0xFF;

sys/dev/disk/advansys/advlib.c

822

sg_queue_cnt = (val >> 8) & 0xFF;

sys/dev/disk/advansys/advlib.c

824

val = adv_read_lram_16(adv,q_addr + ADV_SCSIQ_B_SENSE_LEN);

sys/dev/disk/advansys/advlib.c

825

scsiq->sense_len = val & 0xFF;

sys/dev/disk/advansys/advlib.c

826

scsiq->extra_bytes = (val >> 8) & 0xFF;

sys/dev/disk/advansys/advlib.h

863

#define ADV_OUTB(adv, offset, val) \

sys/dev/disk/advansys/advlib.h

864

bus_space_write_1((adv)->tag, (adv)->bsh, offset, val)

sys/dev/disk/advansys/advlib.h

865

#define ADV_OUTW(adv, offset, val) \

sys/dev/disk/advansys/advlib.h

866

bus_space_write_2((adv)->tag, (adv)->bsh, offset, val)

sys/dev/disk/dm/dm_ioctl.c

101

(*fp) |= val;

sys/dev/disk/dm/dm_ioctl.c

103

KKASSERT((*fp) & val);

sys/dev/disk/dm/dm_ioctl.c

107

void dm_remove_flag(prop_dictionary_t dp, uint32_t *fp, const uint32_t val)

sys/dev/disk/dm/dm_ioctl.c

111

(*fp) &= ~val;

sys/dev/disk/dm/dm_ioctl.c

113

KKASSERT(!((*fp) & val));

sys/dev/disk/dm/dm_ioctl.c

97

void dm_add_flag(prop_dictionary_t dp, uint32_t *fp, const uint32_t val)

sys/dev/disk/isp/isp.c

144

uint32_t code_org, val;

sys/dev/disk/isp/isp.c

473

for (val = loops = 0; loops < 30000; loops++) {

sys/dev/disk/isp/isp.c

475

val = ISP_READ(isp, BIU2400_CSR);

sys/dev/disk/isp/isp.c

476

if ((val & BIU2400_DMA_ACTIVE) == 0) {

sys/dev/disk/isp/isp.c

480

if (val & BIU2400_DMA_ACTIVE) {

sys/dev/disk/isp/isp.c

492

val = ISP_READ(isp, OUTMAILBOX0);

sys/dev/disk/isp/isp.c

494

for (val = loops = 0; loops < 500000; loops ++) {

sys/dev/disk/isp/isp.c

495

val = ISP_READ(isp, BIU2400_CSR);

sys/dev/disk/isp/isp.c

496

if ((val & BIU2400_SOFT_RESET) == 0) {

sys/dev/disk/isp/isp.c

500

if (val & BIU2400_SOFT_RESET) {

sys/dev/disk/isp/isp.c

573

for (val = loops = 0; loops < 5000000; loops++) {

sys/dev/disk/isp/isp.c

575

val = ISP_READ(isp, OUTMAILBOX0);

sys/dev/disk/isp/isp.c

576

if (val == 0) {

sys/dev/disk/isp/isp.c

580

if (val != 0) {

sys/dev/disk/isp/isp.c

6620

uint32_t val = isp->isp_mboxtmp[2];

sys/dev/disk/isp/isp.c

6621

val |= (isp->isp_mboxtmp[3]) << 16;

sys/dev/disk/isp/isp.c

6622

*lptr++ = val;

sys/dev/disk/isp/isp_freebsd.h

295

#define ISP_SET_PC(isp, chan, tag, val) \

sys/dev/disk/isp/isp_freebsd.h

297

ISP_SPI_PC(isp, chan)-> tag = val; \

sys/dev/disk/isp/isp_freebsd.h

299

ISP_FC_PC(isp, chan)-> tag = val; \

sys/dev/disk/isp/isp_freebsd.h

496

#define SET_DEFAULT_ROLE(isp, chan, val) \

sys/dev/disk/isp/isp_freebsd.h

498

ISP_FC_PC(isp, chan)->def_role = val; \

sys/dev/disk/isp/isp_freebsd.h

500

ISP_SPI_PC(isp, chan)->def_role = val; \

sys/dev/disk/isp/isp_pci.c

1217

isp_pci_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)

sys/dev/disk/isp/isp_pci.c

1230

BXW2(isp, IspVirt2Off(isp, regoff), val);

sys/dev/disk/isp/isp_pci.c

1272

isp_pci_wr_reg_1080(ispsoftc_t *isp, int regoff, uint32_t val)

sys/dev/disk/isp/isp_pci.c

1295

BXW2(isp, IspVirt2Off(isp, regoff), val);

sys/dev/disk/isp/isp_pci.c

1365

isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)

sys/dev/disk/isp/isp_pci.c

1373

BXW2(isp, IspVirt2Off(isp, regoff), val);

sys/dev/disk/isp/isp_pci.c

1409

BXW4(isp, IspVirt2Off(isp, regoff), val);

sys/dev/disk/isp/ispmbox.h

2017

#define AT_HAS_TAG(val) ((val) & (1 << 24))

sys/dev/disk/isp/ispmbox.h

2018

#define AT_GET_TAG(val) (((val) >> 16) & 0xff)

sys/dev/disk/isp/ispmbox.h

2019

#define AT_GET_HANDLE(val) ((val) & 0xffff)

sys/dev/disk/isp/ispmbox.h

2095

#define AT2_HAS_TAG(val) 1

sys/dev/disk/isp/ispmbox.h

2096

#define AT2_GET_TAG(val) ((val) & 0xffffffff)

sys/dev/disk/isp/ispmbox.h

2097

#define AT2_GET_INST(val) (((val) >> 32) & 0xffff)

sys/dev/disk/isp/ispmbox.h

2099

#define AT2_GET_BUS(val) (((val) >> 48) & 0xff)

sys/dev/disk/isp/ispvar.h

101

#define ISP_SETBITS(isp, reg, val) \

sys/dev/disk/isp/ispvar.h

102

(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))

sys/dev/disk/isp/ispvar.h

104

#define ISP_CLRBITS(isp, reg, val) \

sys/dev/disk/isp/ispvar.h

105

(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))

sys/dev/disk/isp/ispvar.h

646

#define ISP_SET_SENDMARKER(isp, chan, val) \

sys/dev/disk/isp/ispvar.h

648

FCPARAM(isp, chan)->sendmarker = val; \

sys/dev/disk/isp/ispvar.h

650

SDPARAM(isp, chan)->sendmarker = val; \

sys/dev/disk/isp/ispvar.h

81

#define ISP_WRITE(isp, reg, val) \

sys/dev/disk/isp/ispvar.h

82

(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))

sys/dev/disk/mpt/mpt.c

2269

int val, error;

sys/dev/disk/mpt/mpt.c

2276

for (val = 0; val < MPT_MAX_LUNS; val++) {

sys/dev/disk/mpt/mpt.c

2277

STAILQ_INIT(&mpt->trt[val].atios);

sys/dev/disk/mpt/mpt.c

2278

STAILQ_INIT(&mpt->trt[val].inots);

sys/dev/disk/mpt/mpt.c

2358

int val;

sys/dev/disk/mpt/mpt.c

2366

for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) {

sys/dev/disk/mpt/mpt.c

2367

request_t *req = &mpt->request_pool[val];

sys/dev/disk/mpt/mpt.c

2627

int error, port, val;

sys/dev/disk/mpt/mpt.c

2707

for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) {

sys/dev/disk/mpt/mpt.c

2708

request_t *req = &mpt->request_pool[val];

sys/dev/disk/mpt/mpt.c

2877

int val;

sys/dev/disk/mpt/mpt.c

2897

for (val = 0, pptr = mpt->reply_phys;

sys/dev/disk/mpt/mpt.c

2901

if (++val == mpt->ioc_facts.GlobalCredits - 1)

sys/dev/disk/mpt/mpt.h

785

mpt_write(struct mpt_softc *mpt, size_t offset, uint32_t val)

sys/dev/disk/mpt/mpt.h

787

bus_space_write_4(mpt->pci_st, mpt->pci_sh, offset, val);

sys/dev/disk/mpt/mpt.h

802

mpt_pio_write(struct mpt_softc *mpt, size_t offset, uint32_t val)

sys/dev/disk/mpt/mpt.h

805

bus_space_write_4(mpt->pci_pio_st, mpt->pci_pio_sh, offset, val);

sys/dev/disk/mpt/mpt_pci.c

365

uint32_t val;

sys/dev/disk/mpt/mpt_pci.c

423

val = pci_read_config(dev, PCIR_COMMAND, 2);

sys/dev/disk/mpt/mpt_pci.c

424

val |= PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |

sys/dev/disk/mpt/mpt_pci.c

426

pci_write_config(dev, PCIR_COMMAND, val, 2);

sys/dev/disk/mpt/mpt_pci.c

431

val = pci_read_config(dev, PCIR_BIOS, 4);

sys/dev/disk/mpt/mpt_pci.c

432

val &= ~PCIM_BIOS_ENABLE;

sys/dev/disk/mpt/mpt_pci.c

433

pci_write_config(dev, PCIR_BIOS, val, 4);

sys/dev/disk/mpt/mpt_pci.c

457

val = pci_read_config(dev, PCIR_BAR(0), 4);

sys/dev/disk/mpt/mpt_pci.c

458

if (PCI_BAR_IO(val)) {

sys/dev/disk/mpt/mpt_pci.c

801

uint32_t val;

sys/dev/disk/mpt/mpt_pci.c

804

val = pci_read_config(mpt->dev, offset, size); \

sys/dev/disk/mpt/mpt_pci.c

805

if (mpt->pci_cfg.reg != val) { \

sys/dev/disk/mpt/mpt_pci.c

808

mpt->pci_cfg.reg, val); \

sys/dev/disk/nata/ata-pci.c

499

u_int8_t val;

sys/dev/disk/nata/ata-pci.c

505

val = ATA_IDX_INB(ch, ATA_BMCMD_PORT);

sys/dev/disk/nata/ata-pci.c

507

val |= ATA_BMCMD_WRITE_READ;

sys/dev/disk/nata/ata-pci.c

509

val &= ~ATA_BMCMD_WRITE_READ;

sys/dev/disk/nata/ata-pci.c

510

ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val);

sys/dev/disk/nata/ata-pci.c

516

ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val | ATA_BMCMD_START_STOP);

sys/dev/disk/nata/chipsets/ata-ahci.c

428

uint32_t val;

sys/dev/disk/nata/chipsets/ata-ahci.c

432

while ((val = ATA_INL(ctlr->r_res2, ATA_AHCI_P_TFD + offset)) &

sys/dev/disk/nata/chipsets/ata-ahci.c

436

device_printf(dev, "port is not ready (timeout 1s) tfd = %08x\n", val);

sys/dev/disk/nata/chipsets/ata-highpoint.c

184

u_int8_t reg, val, res;

sys/dev/disk/nata/chipsets/ata-highpoint.c

188

val = pci_read_config(gparent, reg, 1);

sys/dev/disk/nata/chipsets/ata-highpoint.c

189

pci_write_config(gparent, reg, val | 0x80, 1);

sys/dev/disk/nata/chipsets/ata-highpoint.c

193

val = pci_read_config(gparent, reg, 1);

sys/dev/disk/nata/chipsets/ata-highpoint.c

194

pci_write_config(gparent, reg, val & 0xfe, 1);

sys/dev/disk/nata/chipsets/ata-highpoint.c

197

pci_write_config(gparent, reg, val, 1);

sys/dev/disk/ncr/ncr.c

283

#define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \

sys/dev/disk/ncr/ncr.c

284

offsetof(struct ncr_reg, r), val)

sys/dev/disk/ncr/ncr.c

285

#define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \

sys/dev/disk/ncr/ncr.c

286

offsetof(struct ncr_reg, r), val)

sys/dev/disk/ncr/ncr.c

287

#define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \

sys/dev/disk/ncr/ncr.c

288

offsetof(struct ncr_reg, r), val)

sys/dev/disk/ncr/ncr.c

289

#define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)

sys/dev/disk/ncr/ncr.c

299

#define WRITESCRIPT_OFF(base, off, val) \

sys/dev/disk/ncr/ncr.c

303

((volatile char *)base + (off))) = (val); \

sys/dev/disk/ncr/ncr.c

305

bus_space_write_4(np->bst2, np->bsh2, off, val); \

sys/dev/disk/ncr/ncr.c

311

#define WRITESCRIPT(r, val) \

sys/dev/disk/ncr/ncr.c

312

WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)

sys/dev/disk/ncr/ncr.c

5528

unsigned char val;

sys/dev/disk/ncr/ncr.c

5542

val = bus_space_read_1(np->bst, np->bsh, i);

sys/dev/disk/ncr/ncr.c

5543

kprintf (" %x%x", val/16, val%16);

sys/dev/disk/ncr/ncr.c

7069

u_char val = 0x10 + ((bit & 1) << 1);

sys/dev/disk/ncr/ncr.c

7072

OUTB (nc_gpreg, val);

sys/dev/disk/ncr/ncr.c

7074

OUTB (nc_gpreg, val | 0x04);

sys/dev/disk/ncr/ncr.c

7076

OUTB (nc_gpreg, val);

sys/dev/disk/ncr/ncr.c

7128

u_short val;

sys/dev/disk/ncr/ncr.c

7130

val = read_tekram_eeprom_reg (np, i);

sys/dev/disk/ncr/ncr.c

7132

*p++ = val;

sys/dev/disk/ncr/ncr.c

7133

sum += val;

sys/dev/disk/ncr/ncr.c

7135

kprintf ("%02x%02x", val & 0xff, (val >> 8) & 0xff);

sys/dev/disk/sbp/sbp.c

419

lun = reg->val & 0xffff;

sys/dev/disk/sbp/sbp.c

475

lun = reg->val & 0xffff;

sys/dev/disk/sbp/sbp.c

494

sdev->type = (reg->val & 0xff0000) >> 16;

sys/dev/disk/sbp/sbp.c

569

if (reg == NULL || reg->val == 0) {

sys/dev/disk/sbp/sbp.c

575

target->mgm_lo = 0xf0000000 | (reg->val << 2);

sys/dev/disk/sbp/sbp.c

609

if (reg->val == CSRVAL_T10SBP2)

sys/dev/disk/sbp/sbp.c

617

"%06x", reg->val);

sys/dev/disk/sdhci/sdhci.c

1236

uint32_t val = RD4(slot, SDHCI_RESPONSE + i * 4);

sys/dev/disk/sdhci/sdhci.c

1238

slot->curcmd->resp[3 - i] = val;

sys/dev/disk/sdhci/sdhci.c

1241

(val << 8) | extra;

sys/dev/disk/sdhci/sdhci.c

1242

extra = val >> 24;

sys/dev/disk/sdhci/sdhci.c

1520

uint32_t val;

sys/dev/disk/sdhci/sdhci.c

1523

val = RD4(slot, SDHCI_PRESENT_STATE);

sys/dev/disk/sdhci/sdhci.c

1525

return (!(val & SDHCI_WRITE_PROTECT));

sys/dev/disk/sdhci/sdhci.c

75

#define WR1(slot, off, val) SDHCI_WRITE_1((slot)->bus, (slot), (off), (val))

sys/dev/disk/sdhci/sdhci.c

76

#define WR2(slot, off, val) SDHCI_WRITE_2((slot)->bus, (slot), (off), (val))

sys/dev/disk/sdhci/sdhci.c

77

#define WR4(slot, off, val) SDHCI_WRITE_4((slot)->bus, (slot), (off), (val))

sys/dev/disk/sdhci/sdhci_acpi.c

101

bus_write_2(sc->mem_res, off, val);

sys/dev/disk/sdhci/sdhci_acpi.c

117

bus_size_t off, uint32_t val)

sys/dev/disk/sdhci/sdhci_acpi.c

123

bus_write_4(sc->mem_res, off, val);

sys/dev/disk/sdhci/sdhci_acpi.c

73

bus_size_t off, uint8_t val)

sys/dev/disk/sdhci/sdhci_acpi.c

79

bus_write_1(sc->mem_res, off, val);

sys/dev/disk/sdhci/sdhci_acpi.c

95

bus_size_t off, uint16_t val)

sys/dev/disk/sdhci/sdhci_pci.c

172

bus_size_t off, uint8_t val)

sys/dev/disk/sdhci/sdhci_pci.c

178

bus_write_1(sc->mem_res[slot->num], off, val);

sys/dev/disk/sdhci/sdhci_pci.c

193

bus_size_t off, uint16_t val)

sys/dev/disk/sdhci/sdhci_pci.c

199

bus_write_2(sc->mem_res[slot->num], off, val);

sys/dev/disk/sdhci/sdhci_pci.c

214

bus_size_t off, uint32_t val)

sys/dev/disk/sdhci/sdhci_pci.c

220

bus_write_4(sc->mem_res[slot->num], off, val);

sys/dev/drm/amd/amdgpu/amdgpu.h

1122

#define WREG32_P(reg, val, mask) \

sys/dev/drm/amd/amdgpu/amdgpu.h

1126

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/amd/amdgpu/amdgpu.h

1131

#define WREG32_PLL_P(reg, val, mask) \

sys/dev/drm/amd/amdgpu/amdgpu.h

1135

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/amd/amdgpu/amdgpu.h

1157

#define WREG32_FIELD(reg, field, val) \

sys/dev/drm/amd/amdgpu/amdgpu.h

1158

WREG32(mm##reg, (RREG32(mm##reg) & ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))

sys/dev/drm/amd/amdgpu/amdgpu.h

1160

#define WREG32_FIELD_OFFSET(reg, offset, field, val) \

sys/dev/drm/amd/amdgpu/amdgpu.h

1161

WREG32(mm##reg + offset, (RREG32(mm##reg + offset) & ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

188

u32 val = 0;

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

356

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

358

val |= ACP_SOFT_RESET__SoftResetAud_MASK;

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

359

cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

363

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

365

(val & ACP_SOFT_RESET__SoftResetAudDone_MASK))

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

374

val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

375

val = val | ACP_CONTROL__ClkEn_MASK;

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

376

cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

381

val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

382

if (val & (u32) 0x1)

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

391

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

392

val &= ~ACP_SOFT_RESET__SoftResetAud_MASK;

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

393

cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

406

u32 val = 0;

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

418

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

420

val |= ACP_SOFT_RESET__SoftResetAud_MASK;

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

421

cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

425

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

427

(val & ACP_SOFT_RESET__SoftResetAudDone_MASK))

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

436

val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

437

val &= ~ACP_CONTROL__ClkEn_MASK;

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

438

cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

443

val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

444

if (val & (u32) 0x1)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1857

static void cail_pll_write(struct card_info *info, uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1885

static void cail_mc_write(struct card_info *info, uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1899

static void cail_reg_write(struct card_info *info, uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1903

WREG32(reg, val);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1933

static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1937

WREG32_IO(reg, val);

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

466

uint64_t val)

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

488

new_coherent_mode = val ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

504

if (amdgpu_connector->audio != val) {

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

505

amdgpu_connector->audio = val;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

519

if (amdgpu_connector->dither != val) {

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

520

amdgpu_connector->dither = val;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

533

if (amdgpu_encoder->underscan_type != val) {

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

534

amdgpu_encoder->underscan_type = val;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

547

if (amdgpu_encoder->underscan_hborder != val) {

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

548

amdgpu_encoder->underscan_hborder = val;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

561

if (amdgpu_encoder->underscan_vborder != val) {

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

562

amdgpu_encoder->underscan_vborder = val;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

571

if (val == 0)

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

587

switch (val) {

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

105

uint32_t val;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

108

val = RREG32(rec->y_clk_reg);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

109

val &= rec->y_clk_mask;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

111

return (val != 0);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

120

uint32_t val;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

123

val = RREG32(rec->y_data_reg);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

124

val &= rec->y_data_mask;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

126

return (val != 0);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

134

uint32_t val;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

137

val = RREG32(rec->en_clk_reg) & ~rec->en_clk_mask;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

138

val |= clock ? 0 : rec->en_clk_mask;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

139

WREG32(rec->en_clk_reg, val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

147

uint32_t val;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

150

val = RREG32(rec->en_data_reg) & ~rec->en_data_mask;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

151

val |= data ? 0 : rec->en_data_mask;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

152

WREG32(rec->en_data_reg, val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

287

u8 *val)

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

310

*val = in_buf[0];

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

311

DRM_DEBUG("val = 0x%02x\n", *val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

314

addr, *val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

321

u8 val)

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

332

out_buf[1] = val;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

336

addr, val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

343

u8 val;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

353

0x3, &val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

354

val &= ~amdgpu_connector->router.ddc_mux_control_pin;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

357

0x3, val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

360

0x1, &val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

361

val &= ~amdgpu_connector->router.ddc_mux_control_pin;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

362

val |= amdgpu_connector->router.ddc_mux_state;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

365

0x1, val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

372

u8 val;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

382

0x3, &val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

383

val &= ~amdgpu_connector->router.cd_mux_control_pin;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

386

0x3, val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

389

0x1, &val);

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

390

val &= ~amdgpu_connector->router.cd_mux_control_pin;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

391

val |= amdgpu_connector->router.cd_mux_state;

sys/dev/drm/amd/amdgpu/amdgpu_i2c.c

394

0x1, val);

sys/dev/drm/amd/amdgpu/amdgpu_mode.h

304

uint64_t val);

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

104

val = RREG32(reg_index);

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

106

if (val != reg_val)

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

109

if ((val & mask) == reg_val)

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

99

uint32_t val;

sys/dev/drm/amd/amdgpu/amdgpu_ring.h

161

void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);

sys/dev/drm/amd/amdgpu/amdgpu_ring.h

163

uint32_t val, uint32_t mask);

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

215

#define AMDGPU_FW_VRAM_VF2PF_WRITE(adev, field, val) \

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

217

((amdgim_vf2pf_info *)adev->virt.fw_reserve.p_vf2pf)->field = (val); \

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

220

#define AMDGPU_FW_VRAM_VF2PF_READ(adev, field, val) \

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

222

(*val) = ((amdgim_vf2pf_info *)adev->virt.fw_reserve.p_vf2pf)->field; \

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

225

#define AMDGPU_FW_VRAM_PF2VF_READ(adev, field, val) \

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

228

*(val) = 0; \

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

231

*(val) = ((struct amdgim_pf2vf_info_v1 *)adev->virt.fw_reserve.p_pf2vf)->field; \

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

233

*(val) = ((struct amdgim_pf2vf_info_v2 *)adev->virt.fw_reserve.p_pf2vf)->field; \

sys/dev/drm/amd/amdgpu/atom.c

1001

uint32_t src, val, target;

sys/dev/drm/amd/amdgpu/atom.c

1008

val =

sys/dev/drm/amd/amdgpu/atom.c

1012

if (val == src) {

sys/dev/drm/amd/amdgpu/atom.c

1053

uint8_t val = U8((*ptr)++);

sys/dev/drm/amd/amdgpu/atom.c

1054

SDEBUG("DEBUG output: 0x%02X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

1059

uint16_t val = U16(*ptr);

sys/dev/drm/amd/amdgpu/atom.c

1060

(*ptr) += val + 2;

sys/dev/drm/amd/amdgpu/atom.c

1061

SDEBUG("PROCESSDS output: 0x%02X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

176

uint32_t idx, val = 0xCDCDCDCD, align, arg;

sys/dev/drm/amd/amdgpu/atom.c

189

val = gctx->card->reg_read(gctx->card, idx);

sys/dev/drm/amd/amdgpu/atom.c

207

val =

sys/dev/drm/amd/amdgpu/atom.c

218

val = get_unaligned_le32((u32 *)&ctx->ps[idx]);

sys/dev/drm/amd/amdgpu/atom.c

220

DEBUG("PS[0x%02X,0x%04X]", idx, val);

sys/dev/drm/amd/amdgpu/atom.c

229

val = gctx->divmul[0];

sys/dev/drm/amd/amdgpu/atom.c

232

val = gctx->divmul[1];

sys/dev/drm/amd/amdgpu/atom.c

235

val = gctx->data_block;

sys/dev/drm/amd/amdgpu/atom.c

238

val = gctx->shift;

sys/dev/drm/amd/amdgpu/atom.c

241

val = 1 << gctx->shift;

sys/dev/drm/amd/amdgpu/atom.c

244

val = ~(1 << gctx->shift);

sys/dev/drm/amd/amdgpu/atom.c

247

val = gctx->fb_base;

sys/dev/drm/amd/amdgpu/atom.c

250

val = gctx->io_attr;

sys/dev/drm/amd/amdgpu/atom.c

253

val = gctx->reg_block;

sys/dev/drm/amd/amdgpu/atom.c

256

val = ctx->ws[idx];

sys/dev/drm/amd/amdgpu/atom.c

268

val = U32(idx + gctx->data_block);

sys/dev/drm/amd/amdgpu/atom.c

276

val = 0;

sys/dev/drm/amd/amdgpu/atom.c

278

val = gctx->scratch[(gctx->fb_base / 4) + idx];

sys/dev/drm/amd/amdgpu/atom.c

285

val = U32(*ptr);

sys/dev/drm/amd/amdgpu/atom.c

288

DEBUG("IMM 0x%08X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

289

return val;

sys/dev/drm/amd/amdgpu/atom.c

293

val = U16(*ptr);

sys/dev/drm/amd/amdgpu/atom.c

296

DEBUG("IMM 0x%04X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

297

return val;

sys/dev/drm/amd/amdgpu/atom.c

302

val = U8(*ptr);

sys/dev/drm/amd/amdgpu/atom.c

305

DEBUG("IMM 0x%02X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

306

return val;

sys/dev/drm/amd/amdgpu/atom.c

314

val = gctx->card->pll_read(gctx->card, idx);

sys/dev/drm/amd/amdgpu/atom.c

321

val = gctx->card->mc_read(gctx->card, idx);

sys/dev/drm/amd/amdgpu/atom.c

325

*saved = val;

sys/dev/drm/amd/amdgpu/atom.c

326

val &= atom_arg_mask[align];

sys/dev/drm/amd/amdgpu/atom.c

327

val >>= atom_arg_shift[align];

sys/dev/drm/amd/amdgpu/atom.c

331

DEBUG(".[31:0] -> 0x%08X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

334

DEBUG(".[15:0] -> 0x%04X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

337

DEBUG(".[23:8] -> 0x%04X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

340

DEBUG(".[31:16] -> 0x%04X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

343

DEBUG(".[7:0] -> 0x%02X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

346

DEBUG(".[15:8] -> 0x%02X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

349

DEBUG(".[23:16] -> 0x%02X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

352

DEBUG(".[31:24] -> 0x%02X\n", val);

sys/dev/drm/amd/amdgpu/atom.c

355

return val;

sys/dev/drm/amd/amdgpu/atom.c

401

uint32_t val = 0xCDCDCDCD;

sys/dev/drm/amd/amdgpu/atom.c

405

val = U32(*ptr);

sys/dev/drm/amd/amdgpu/atom.c

411

val = U16(*ptr);

sys/dev/drm/amd/amdgpu/atom.c

418

val = U8(*ptr);

sys/dev/drm/amd/amdgpu/atom.c

422

return val;

sys/dev/drm/amd/amdgpu/atom.c

442

int *ptr, uint32_t val, uint32_t saved)

sys/dev/drm/amd/amdgpu/atom.c

446

val, idx;

sys/dev/drm/amd/amdgpu/atom.c

449

val <<= atom_arg_shift[align];

sys/dev/drm/amd/amdgpu/atom.c

450

val &= atom_arg_mask[align];

sys/dev/drm/amd/amdgpu/atom.c

452

val |= saved;

sys/dev/drm/amd/amdgpu/atom.c

463

val << 2);

sys/dev/drm/amd/amdgpu/atom.c

465

gctx->card->reg_write(gctx->card, idx, val);

sys/dev/drm/amd/amdgpu/atom.c

484

idx, val);

sys/dev/drm/amd/amdgpu/atom.c

491

ctx->ps[idx] = cpu_to_le32(val);

sys/dev/drm/amd/amdgpu/atom.c

499

gctx->divmul[0] = val;

sys/dev/drm/amd/amdgpu/atom.c

502

gctx->divmul[1] = val;

sys/dev/drm/amd/amdgpu/atom.c

505

gctx->data_block = val;

sys/dev/drm/amd/amdgpu/atom.c

508

gctx->shift = val;

sys/dev/drm/amd/amdgpu/atom.c

514

gctx->fb_base = val;

sys/dev/drm/amd/amdgpu/atom.c

517

gctx->io_attr = val;

sys/dev/drm/amd/amdgpu/atom.c

520

gctx->reg_block = val;

sys/dev/drm/amd/amdgpu/atom.c

523

ctx->ws[idx] = val;

sys/dev/drm/amd/amdgpu/atom.c

533

gctx->scratch[(gctx->fb_base / 4) + idx] = val;

sys/dev/drm/amd/amdgpu/atom.c

540

gctx->card->pll_write(gctx->card, idx, val);

sys/dev/drm/amd/amdgpu/atom.c

546

gctx->card->mc_write(gctx->card, idx, val);

sys/dev/drm/amd/amdgpu/atom.c

840

uint8_t val = U8((*ptr)++);

sys/dev/drm/amd/amdgpu/atom.c

841

SDEBUG("POST card output: 0x%02X\n", val);

sys/dev/drm/amd/amdgpu/atombios_encoders.c

171

int err, val;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

173

val = AMDGPU_MAX_BL_LEVEL;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

174

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/drm/amd/amdgpu/atombios_encoders.c

186

int err, val;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

190

val = dig->backlight_level;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

192

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/drm/amd/amdgpu/atombios_encoders.c

196

if (dig->backlight_level != val && val >= 0 &&

sys/dev/drm/amd/amdgpu/atombios_encoders.c

197

val <= AMDGPU_MAX_BL_LEVEL) {

sys/dev/drm/amd/amdgpu/atombios_encoders.c

198

amdgpu_atombios_encoder_set_backlight_level(encoder, val);

sys/dev/drm/amd/amdgpu/cik.c

1031

uint32_t val;

sys/dev/drm/amd/amdgpu/cik.c

1050

val = RREG32(reg_offset);

sys/dev/drm/amd/amdgpu/cik.c

1055

return val;

sys/dev/drm/amd/amdgpu/cik_sdma.c

890

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/cik_sdma.c

894

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1500

uint32_t offset, val;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1530

val = RREG32(mmHDMI_CONTROL + offset);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1531

val &= ~HDMI_CONTROL__HDMI_DEEP_COLOR_ENABLE_MASK;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1532

val &= ~HDMI_CONTROL__HDMI_DEEP_COLOR_DEPTH_MASK;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1544

val |= HDMI_CONTROL__HDMI_DEEP_COLOR_ENABLE_MASK;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1545

val |= 1 << HDMI_CONTROL__HDMI_DEEP_COLOR_DEPTH__SHIFT;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1550

val |= HDMI_CONTROL__HDMI_DEEP_COLOR_ENABLE_MASK;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1551

val |= 2 << HDMI_CONTROL__HDMI_DEEP_COLOR_DEPTH__SHIFT;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1557

WREG32(mmHDMI_CONTROL + offset, val);

sys/dev/drm/amd/amdgpu/dce_virtual.c

339

uint64_t val)

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3255

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3264

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6486

uint32_t val)

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6506

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

357

bool wc, uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

365

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4467

uint32_t val)

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4486

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4490

uint32_t val, uint32_t mask)

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4492

gfx_v9_0_wait_reg_mem(ring, 0, 0, 0, reg, 0, val, mask, 0x20);

sys/dev/drm/amd/amdgpu/mxgpu_ai.c

39

static void xgpu_ai_mailbox_set_valid(struct amdgpu_device *adev, bool val)

sys/dev/drm/amd/amdgpu/mxgpu_ai.c

41

WREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE, val ? 1 : 0);

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

342

static void xgpu_vi_mailbox_set_valid(struct amdgpu_device *adev, bool val)

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

348

TRN_MSG_VALID, val ? 1 : 0);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

830

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

835

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1101

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1106

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1262

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1267

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1271

uint32_t val, uint32_t mask)

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1273

sdma_v4_0_wait_reg_mem(ring, 0, 0, reg, 0, val, mask, 10);

sys/dev/drm/amd/amdgpu/soc15.c

302

uint32_t val;

sys/dev/drm/amd/amdgpu/soc15.c

308

val = RREG32(reg_offset);

sys/dev/drm/amd/amdgpu/soc15.c

313

return val;

sys/dev/drm/amd/amdgpu/soc15_common.h

30

#define WREG32_FIELD15(ip, idx, reg, field, val) \

sys/dev/drm/amd/amdgpu/soc15_common.h

33

& ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1040

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1045

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1342

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1351

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1358

uint32_t val, uint32_t mask)

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1367

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1410

uint32_t reg, uint32_t val,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1416

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1432

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1436

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

526

uint32_t val = 0;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

529

val |= VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

531

WREG32_P(mmVCE_SYS_INT_EN, val, ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

712

uint32_t val = 0;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

715

val |= VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

717

WREG32_P(mmVCE_SYS_INT_EN, val, ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1003

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1007

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1015

uint32_t val = 0;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1019

val |= VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1021

WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN), val,

sys/dev/drm/amd/amdgpu/vce_v4_0.c

982

uint32_t val, uint32_t mask)

sys/dev/drm/amd/amdgpu/vce_v4_0.c

987

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1392

uint32_t reg, uint32_t val,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1402

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1427

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1436

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1539

uint32_t reg, uint32_t val,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1545

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1561

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1565

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1781

uint32_t reg, uint32_t val,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1793

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1826

uint32_t reg, uint32_t val)

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1843

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1858

static void vcn_v1_0_jpeg_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t val)

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1870

ring->ring[(*ptr)++] = val;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1877

uint32_t reg, reg_offset, val, mask, i;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1882

val = lower_32_bits(ring->gpu_addr);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1883

vcn_v1_0_jpeg_ring_patch_wreg(ring, &ptr, reg_offset, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1888

val = upper_32_bits(ring->gpu_addr);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1889

vcn_v1_0_jpeg_ring_patch_wreg(ring, &ptr, reg_offset, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1900

val = 0x13;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1901

vcn_v1_0_jpeg_ring_patch_wreg(ring, &ptr, reg_offset, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1906

val = 0x1;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1907

vcn_v1_0_jpeg_ring_patch_wreg(ring, &ptr, reg_offset, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1912

val = 0x1;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1918

ring->ring[ptr++] = val;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1939

val = 0;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1940

vcn_v1_0_jpeg_ring_patch_wreg(ring, &ptr, reg_offset, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1945

val = 0x12;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1946

vcn_v1_0_jpeg_ring_patch_wreg(ring, &ptr, reg_offset, val);

sys/dev/drm/amd/amdgpu/vi.c

555

uint32_t val;

sys/dev/drm/amd/amdgpu/vi.c

574

val = RREG32(reg_offset);

sys/dev/drm/amd/amdgpu/vi.c

579

return val;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1662

int err, val;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1664

val = AMDGPU_MAX_BL_LEVEL;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1665

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1676

int err, val;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1679

val = dc_link_get_backlight_level(dm->backlight_link);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1680

DRM_INFO("Old Backlight level: %d\n", val);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1682

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1687

if (val >= 0 && val <= AMDGPU_MAX_BL_LEVEL) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1688

dc_link_set_backlight_level(dm->backlight_link, val, 0, 0);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3069

uint64_t val)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3083

switch (val) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3105

dm_new_state->underscan_hborder = val;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3108

dm_new_state->underscan_vborder = val;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3111

dm_new_state->underscan_enable = val;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3114

dm_new_state->max_bpc = val;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3124

uint64_t *val)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3135

*val = DRM_MODE_SCALE_CENTER;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3138

*val = DRM_MODE_SCALE_ASPECT;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3141

*val = DRM_MODE_SCALE_FULLSCREEN;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3145

*val = DRM_MODE_SCALE_NONE;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3150

*val = dm_state->underscan_hborder;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3153

*val = dm_state->underscan_vborder;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3156

*val = dm_state->underscan_enable;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3159

*val = dm_state->max_bpc;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h

233

uint64_t val);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h

238

uint64_t *val);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

192

int64_t val;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

218

val = ctm->matrix[i - (i/4)];

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

220

if (val & (1ULL << 63))

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

221

val = -(val & ~(1ULL << 63));

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

223

stream->gamut_remap_matrix.matrix[i].value = val;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

188

const uint16_t *val = NULL;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

194

val = output_csc_matrix[i].regval;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

199

return val;

sys/dev/drm/amd/display/dc/dce/dce_hwseq.c

52

uint32_t dcp_grph, scl, blnd, update_lock_mode, val;

sys/dev/drm/amd/display/dc/dce/dce_hwseq.c

60

val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst],

sys/dev/drm/amd/display/dc/dce/dce_hwseq.c

71

REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val,

sys/dev/drm/amd/display/dc/dce/dce_hwseq.c

76

REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2049

uint32_t val = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2063

val,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2070

val,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2075

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_VERTICAL_INTERRUPT0_POSITION), val);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

48

#define CRTC_REG_UPDATE(reg, field, val) \

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

49

CRTC_REG_UPDATE_N(reg, 1, FD(reg##__##field), val)

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

63

#define CRTC_REG_SET(reg, field, val) \

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

64

CRTC_REG_SET_N(reg, 1, FD(reg##__##field), val)

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

1298

#define HPD_REG_UPDATE(reg_name, field, val) \

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

1300

FN(reg_name, field), val)

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

1331

#define AUX_REG_UPDATE(reg_name, field, val) \

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

1333

FN(reg_name, field), val)

sys/dev/drm/amd/display/dc/dml/dml_inline_defs.h

88

static inline double dml_fmod(double f, int val)

sys/dev/drm/amd/display/dc/dml/dml_inline_defs.h

90

return (double) dcn_bw_mod(f, val);

sys/dev/drm/amd/display/dc/inc/reg_helper.h

156

#define REG_GET(reg_name, field, val) \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

158

FN(reg_name, field), val)

sys/dev/drm/amd/display/dc/inc/reg_helper.h

218

#define REG_WAIT(reg_name, field, val, delay_between_poll_us, max_try) \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

220

REG(reg_name), FN(reg_name, field), val,\

sys/dev/drm/amd/display/dc/inc/reg_helper.h

231

#define REG_UPDATE(reg_name, field, val) \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

233

FN(reg_name, field), val)

sys/dev/drm/amd/display/dc/inc/reg_helper.h

384

{ uint32_t val = REG_UPDATE(reg, field, value1); \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

385

REG_SET(reg, val, field, value2); }

sys/dev/drm/amd/display/dc/inc/reg_helper.h

389

{ uint32_t val = REG_UPDATE(reg, f1, v1); \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

390

REG_SET(reg, val, f2, v2); }

sys/dev/drm/amd/display/dc/inc/reg_helper.h

393

{ uint32_t val = REG_UPDATE(reg, f1, v1); \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

394

val = REG_SET(reg, val, f2, v2); \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

395

REG_SET(reg, val, f3, v3); }

sys/dev/drm/amd/display/dc/inc/reg_helper.h

63

#define REG_SET(reg_name, initial_val, field, val) \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

65

FN(reg_name, field), val)

sys/dev/drm/amd/include/cgs_common.h

131

#define CGS_WREG32_FIELD(device, reg, field, val) \

sys/dev/drm/amd/include/cgs_common.h

132

cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))

sys/dev/drm/amd/include/cgs_common.h

134

#define CGS_WREG32_FIELD_IND(device, space, reg, field, val) \

sys/dev/drm/amd/include/cgs_common.h

135

cgs_write_ind_register(device, space, ix##reg, (cgs_read_ind_register(device, space, ix##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1662

uint32_t val = cgs_read_ind_register(hwmgr->device,

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1664

uint32_t temp = PHM_GET_FIELD(val, THM_TCON_CUR_TMP, CUR_TEMP);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1666

if (PHM_GET_FIELD(val, THM_TCON_CUR_TMP, CUR_TEMP_RANGE_SEL))

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

372

uint32_t val;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

382

val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

384

val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

385

val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

386

val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

387

val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

388

val &= (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK) &

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

392

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

429

uint32_t val = 0;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

443

val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

444

val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

445

val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

447

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

178

uint32_t val;

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

188

val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

190

val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

191

val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

192

val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

193

val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

194

val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

196

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

209

uint32_t val = 0;

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

211

val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

212

val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

213

val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

215

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

248

uint32_t val;

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

258

val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

260

val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

261

val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

262

val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

263

val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

264

val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

266

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

279

uint32_t val = 0;

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

281

val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

282

val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

283

val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

285

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

185

uint32_t val;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

210

val = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

213

ixSMC_SYSCON_MISC_CNTL, val | 1);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

75

uint32_t val = cgs_read_register(hwmgr->device,

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

78

pr_err("SMU still servicing msg (0x%04x)\n", val);

sys/dev/drm/drm_atomic_uapi.c

421

uint64_t val)

sys/dev/drm/drm_atomic_uapi.c

429

state->active = val;

sys/dev/drm/drm_atomic_uapi.c

432

drm_property_lookup_blob(dev, val);

sys/dev/drm/drm_atomic_uapi.c

439

val,

sys/dev/drm/drm_atomic_uapi.c

447

val,

sys/dev/drm/drm_atomic_uapi.c

455

val,

sys/dev/drm/drm_atomic_uapi.c

461

s32 __user *fence_ptr = u64_to_user_ptr(val);

sys/dev/drm/drm_atomic_uapi.c

471

return crtc->funcs->atomic_set_property(crtc, state, property, val);

sys/dev/drm/drm_atomic_uapi.c

485

struct drm_property *property, uint64_t *val)

sys/dev/drm/drm_atomic_uapi.c

491

*val = state->active;

sys/dev/drm/drm_atomic_uapi.c

493

*val = (state->mode_blob) ? state->mode_blob->base.id : 0;

sys/dev/drm/drm_atomic_uapi.c

495

*val = (state->degamma_lut) ? state->degamma_lut->base.id : 0;

sys/dev/drm/drm_atomic_uapi.c

497

*val = (state->ctm) ? state->ctm->base.id : 0;

sys/dev/drm/drm_atomic_uapi.c

499

*val = (state->gamma_lut) ? state->gamma_lut->base.id : 0;

sys/dev/drm/drm_atomic_uapi.c

501

*val = 0;

sys/dev/drm/drm_atomic_uapi.c

503

return crtc->funcs->atomic_get_property(crtc, state, property, val);

sys/dev/drm/drm_atomic_uapi.c

512

uint64_t val)

sys/dev/drm/drm_atomic_uapi.c

518

struct drm_framebuffer *fb = drm_framebuffer_lookup(dev, NULL, val);

sys/dev/drm/drm_atomic_uapi.c

526

if (U642I64(val) == -1)

sys/dev/drm/drm_atomic_uapi.c

529

state->fence = sync_file_get_fence(val);

sys/dev/drm/drm_atomic_uapi.c

534

struct drm_crtc *crtc = drm_crtc_find(dev, NULL, val);

sys/dev/drm/drm_atomic_uapi.c

537

state->crtc_x = U642I64(val);

sys/dev/drm/drm_atomic_uapi.c

539

state->crtc_y = U642I64(val);

sys/dev/drm/drm_atomic_uapi.c

541

state->crtc_w = val;

sys/dev/drm/drm_atomic_uapi.c

543

state->crtc_h = val;

sys/dev/drm/drm_atomic_uapi.c

545

state->src_x = val;

sys/dev/drm/drm_atomic_uapi.c

547

state->src_y = val;

sys/dev/drm/drm_atomic_uapi.c

549

state->src_w = val;

sys/dev/drm/drm_atomic_uapi.c

551

state->src_h = val;

sys/dev/drm/drm_atomic_uapi.c

553

state->alpha = val;

sys/dev/drm/drm_atomic_uapi.c

555

state->pixel_blend_mode = val;

sys/dev/drm/drm_atomic_uapi.c

557

if (!is_power_of_2(val & DRM_MODE_ROTATE_MASK)) {

sys/dev/drm/drm_atomic_uapi.c

559

plane->base.id, plane->name, val);

sys/dev/drm/drm_atomic_uapi.c

562

state->rotation = val;

sys/dev/drm/drm_atomic_uapi.c

564

state->zpos = val;

sys/dev/drm/drm_atomic_uapi.c

566

state->color_encoding = val;

sys/dev/drm/drm_atomic_uapi.c

568

state->color_range = val;

sys/dev/drm/drm_atomic_uapi.c

571

property, val);

sys/dev/drm/drm_atomic_uapi.c

585

struct drm_property *property, uint64_t *val)

sys/dev/drm/drm_atomic_uapi.c

591

*val = (state->fb) ? state->fb->base.id : 0;

sys/dev/drm/drm_atomic_uapi.c

593

*val = -1;

sys/dev/drm/drm_atomic_uapi.c

595

*val = (state->crtc) ? state->crtc->base.id : 0;

sys/dev/drm/drm_atomic_uapi.c

597

*val = I642U64(state->crtc_x);

sys/dev/drm/drm_atomic_uapi.c

599

*val = I642U64(state->crtc_y);

sys/dev/drm/drm_atomic_uapi.c

601

*val = state->crtc_w;

sys/dev/drm/drm_atomic_uapi.c

603

*val = state->crtc_h;

sys/dev/drm/drm_atomic_uapi.c

605

*val = state->src_x;

sys/dev/drm/drm_atomic_uapi.c

607

*val = state->src_y;

sys/dev/drm/drm_atomic_uapi.c

609

*val = state->src_w;

sys/dev/drm/drm_atomic_uapi.c

611

*val = state->src_h;

sys/dev/drm/drm_atomic_uapi.c

613

*val = state->alpha;

sys/dev/drm/drm_atomic_uapi.c

615

*val = state->pixel_blend_mode;

sys/dev/drm/drm_atomic_uapi.c

617

*val = state->rotation;

sys/dev/drm/drm_atomic_uapi.c

619

*val = state->zpos;

sys/dev/drm/drm_atomic_uapi.c

621

*val = state->color_encoding;

sys/dev/drm/drm_atomic_uapi.c

623

*val = state->color_range;

sys/dev/drm/drm_atomic_uapi.c

625

return plane->funcs->atomic_get_property(plane, state, property, val);

sys/dev/drm/drm_atomic_uapi.c

668

uint64_t val)

sys/dev/drm/drm_atomic_uapi.c

674

struct drm_crtc *crtc = drm_crtc_find(dev, NULL, val);

sys/dev/drm/drm_atomic_uapi.c

683

state->tv.subconnector = val;

sys/dev/drm/drm_atomic_uapi.c

685

state->tv.margins.left = val;

sys/dev/drm/drm_atomic_uapi.c

687

state->tv.margins.right = val;

sys/dev/drm/drm_atomic_uapi.c

689

state->tv.margins.top = val;

sys/dev/drm/drm_atomic_uapi.c

691

state->tv.margins.bottom = val;

sys/dev/drm/drm_atomic_uapi.c

693

state->tv.mode = val;

sys/dev/drm/drm_atomic_uapi.c

695

state->tv.brightness = val;

sys/dev/drm/drm_atomic_uapi.c

697

state->tv.contrast = val;

sys/dev/drm/drm_atomic_uapi.c

699

state->tv.flicker_reduction = val;

sys/dev/drm/drm_atomic_uapi.c

701

state->tv.overscan = val;

sys/dev/drm/drm_atomic_uapi.c

703

state->tv.saturation = val;

sys/dev/drm/drm_atomic_uapi.c

705

state->tv.hue = val;

sys/dev/drm/drm_atomic_uapi.c

719

state->link_status = val;

sys/dev/drm/drm_atomic_uapi.c

721

state->picture_aspect_ratio = val;

sys/dev/drm/drm_atomic_uapi.c

723

state->content_type = val;

sys/dev/drm/drm_atomic_uapi.c

725

state->scaling_mode = val;

sys/dev/drm/drm_atomic_uapi.c

727

if (val == DRM_MODE_CONTENT_PROTECTION_ENABLED) {

sys/dev/drm/drm_atomic_uapi.c

731

state->content_protection = val;

sys/dev/drm/drm_atomic_uapi.c

733

struct drm_framebuffer *fb = drm_framebuffer_lookup(dev, NULL, val);

sys/dev/drm/drm_atomic_uapi.c

739

s32 __user *fence_ptr = u64_to_user_ptr(val);

sys/dev/drm/drm_atomic_uapi.c

745

state, property, val);

sys/dev/drm/drm_atomic_uapi.c

759

struct drm_property *property, uint64_t *val)

sys/dev/drm/drm_atomic_uapi.c

765

*val = (state->crtc) ? state->crtc->base.id : 0;

sys/dev/drm/drm_atomic_uapi.c

767

*val = connector->dpms;

sys/dev/drm/drm_atomic_uapi.c

769

*val = state->tv.subconnector;

sys/dev/drm/drm_atomic_uapi.c

771

*val = state->tv.margins.left;

sys/dev/drm/drm_atomic_uapi.c

773

*val = state->tv.margins.right;

sys/dev/drm/drm_atomic_uapi.c

775

*val = state->tv.margins.top;

sys/dev/drm/drm_atomic_uapi.c

777

*val = state->tv.margins.bottom;

sys/dev/drm/drm_atomic_uapi.c

779

*val = state->tv.mode;

sys/dev/drm/drm_atomic_uapi.c

781

*val = state->tv.brightness;

sys/dev/drm/drm_atomic_uapi.c

783

*val = state->tv.contrast;

sys/dev/drm/drm_atomic_uapi.c

785

*val = state->tv.flicker_reduction;

sys/dev/drm/drm_atomic_uapi.c

787

*val = state->tv.overscan;

sys/dev/drm/drm_atomic_uapi.c

789

*val = state->tv.saturation;

sys/dev/drm/drm_atomic_uapi.c

791

*val = state->tv.hue;

sys/dev/drm/drm_atomic_uapi.c

793

*val = state->link_status;

sys/dev/drm/drm_atomic_uapi.c

795

*val = state->picture_aspect_ratio;

sys/dev/drm/drm_atomic_uapi.c

797

*val = state->content_type;

sys/dev/drm/drm_atomic_uapi.c

799

*val = state->scaling_mode;

sys/dev/drm/drm_atomic_uapi.c

801

*val = state->content_protection;

sys/dev/drm/drm_atomic_uapi.c

804

*val = 0;

sys/dev/drm/drm_atomic_uapi.c

806

*val = 0;

sys/dev/drm/drm_atomic_uapi.c

809

state, property, val);

sys/dev/drm/drm_atomic_uapi.c

818

struct drm_property *property, uint64_t *val)

sys/dev/drm/drm_atomic_uapi.c

828

connector->state, property, val);

sys/dev/drm/drm_atomic_uapi.c

835

crtc->state, property, val);

sys/dev/drm/drm_atomic_uapi.c

842

plane->state, property, val);

sys/dev/drm/drm_color_mgmt.c

118

uint32_t val = user_input;

sys/dev/drm/drm_color_mgmt.c

123

val += 1UL << (16 - bit_precision - 1);

sys/dev/drm/drm_color_mgmt.c

124

val >>= 16 - bit_precision;

sys/dev/drm/drm_color_mgmt.c

127

return clamp_val(val, 0, max);

sys/dev/drm/drm_crtc_internal.h

220

struct drm_property *property, uint64_t *val);

sys/dev/drm/drm_mode_object.c

264

struct drm_property *property, uint64_t val)

sys/dev/drm/drm_mode_object.c

273

obj->properties->values[i] = val;

sys/dev/drm/drm_mode_object.c

284

uint64_t *val)

sys/dev/drm/drm_mode_object.c

294

return drm_atomic_get_property(obj, property, val);

sys/dev/drm/drm_mode_object.c

298

*val = obj->properties->values[i];

sys/dev/drm/drm_mode_object.c

325

struct drm_property *property, uint64_t *val)

sys/dev/drm/drm_mode_object.c

329

return __drm_object_property_get_value(obj, property, val);

sys/dev/drm/drm_mode_object.c

343

uint64_t val;

sys/dev/drm/drm_mode_object.c

349

ret = __drm_object_property_get_value(obj, prop, &val);

sys/dev/drm/drm_mode_object.c

356

if (put_user(val, prop_values + count))

sys/dev/drm/i915/dvo_ch7017.c

168

static bool ch7017_read(struct intel_dvo_device *dvo, u8 addr, u8 *val)

sys/dev/drm/i915/dvo_ch7017.c

181

.buf = val,

sys/dev/drm/i915/dvo_ch7017.c

187

static bool ch7017_write(struct intel_dvo_device *dvo, u8 addr, u8 val)

sys/dev/drm/i915/dvo_ch7017.c

189

u8 buf[2] = { addr, val };

sys/dev/drm/i915/dvo_ch7017.c

205

u8 val;

sys/dev/drm/i915/dvo_ch7017.c

214

if (!ch7017_read(dvo, CH7017_DEVICE_ID, &val))

sys/dev/drm/i915/dvo_ch7017.c

217

switch (val) {

sys/dev/drm/i915/dvo_ch7017.c

230

val, adapter->name, dvo->slave_addr);

sys/dev/drm/i915/dvo_ch7017.c

336

u8 val;

sys/dev/drm/i915/dvo_ch7017.c

338

ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val);

sys/dev/drm/i915/dvo_ch7017.c

351

val & ~CH7017_LVDS_POWER_DOWN_EN);

sys/dev/drm/i915/dvo_ch7017.c

355

val | CH7017_LVDS_POWER_DOWN_EN);

sys/dev/drm/i915/dvo_ch7017.c

364

u8 val;

sys/dev/drm/i915/dvo_ch7017.c

366

ch7017_read(dvo, CH7017_LVDS_POWER_DOWN, &val);

sys/dev/drm/i915/dvo_ch7017.c

368

if (val & CH7017_LVDS_POWER_DOWN_EN)

sys/dev/drm/i915/dvo_ch7017.c

376

u8 val;

sys/dev/drm/i915/dvo_ch7017.c

380

ch7017_read(dvo, reg, &val); \

sys/dev/drm/i915/dvo_ch7017.c

381

DRM_DEBUG_KMS(#reg ": %02x\n", val); \

sys/dev/drm/i915/dvo_ch7xxx.c

324

u8 val;

sys/dev/drm/i915/dvo_ch7xxx.c

326

ch7xxx_readb(dvo, CH7xxx_PM, &val);

sys/dev/drm/i915/dvo_ch7xxx.c

328

if (val & (CH7xxx_PM_DVIL | CH7xxx_PM_DVIP))

sys/dev/drm/i915/dvo_ch7xxx.c

339

u8 val;

sys/dev/drm/i915/dvo_ch7xxx.c

342

ch7xxx_readb(dvo, i, &val);

sys/dev/drm/i915/dvo_ch7xxx.c

343

DRM_DEBUG_KMS("%02X ", val);

sys/dev/drm/i915/dvo_ivch.c

441

u16 val;

sys/dev/drm/i915/dvo_ivch.c

443

ivch_read(dvo, VR00, &val);

sys/dev/drm/i915/dvo_ivch.c

444

DRM_DEBUG_KMS("VR00: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

445

ivch_read(dvo, VR01, &val);

sys/dev/drm/i915/dvo_ivch.c

446

DRM_DEBUG_KMS("VR01: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

447

ivch_read(dvo, VR10, &val);

sys/dev/drm/i915/dvo_ivch.c

448

DRM_DEBUG_KMS("VR10: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

449

ivch_read(dvo, VR30, &val);

sys/dev/drm/i915/dvo_ivch.c

450

DRM_DEBUG_KMS("VR30: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

451

ivch_read(dvo, VR40, &val);

sys/dev/drm/i915/dvo_ivch.c

452

DRM_DEBUG_KMS("VR40: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

455

ivch_read(dvo, VR80, &val);

sys/dev/drm/i915/dvo_ivch.c

456

DRM_DEBUG_KMS("VR80: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

457

ivch_read(dvo, VR81, &val);

sys/dev/drm/i915/dvo_ivch.c

458

DRM_DEBUG_KMS("VR81: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

459

ivch_read(dvo, VR82, &val);

sys/dev/drm/i915/dvo_ivch.c

460

DRM_DEBUG_KMS("VR82: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

461

ivch_read(dvo, VR83, &val);

sys/dev/drm/i915/dvo_ivch.c

462

DRM_DEBUG_KMS("VR83: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

463

ivch_read(dvo, VR84, &val);

sys/dev/drm/i915/dvo_ivch.c

464

DRM_DEBUG_KMS("VR84: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

465

ivch_read(dvo, VR85, &val);

sys/dev/drm/i915/dvo_ivch.c

466

DRM_DEBUG_KMS("VR85: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

467

ivch_read(dvo, VR86, &val);

sys/dev/drm/i915/dvo_ivch.c

468

DRM_DEBUG_KMS("VR86: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

469

ivch_read(dvo, VR87, &val);

sys/dev/drm/i915/dvo_ivch.c

470

DRM_DEBUG_KMS("VR87: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

471

ivch_read(dvo, VR88, &val);

sys/dev/drm/i915/dvo_ivch.c

472

DRM_DEBUG_KMS("VR88: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

475

ivch_read(dvo, VR8E, &val);

sys/dev/drm/i915/dvo_ivch.c

476

DRM_DEBUG_KMS("VR8E: 0x%04x\n", val);

sys/dev/drm/i915/dvo_ivch.c

479

ivch_read(dvo, VR8F, &val);

sys/dev/drm/i915/dvo_ivch.c

480

DRM_DEBUG_KMS("VR8F: 0x%04x\n", val);

sys/dev/drm/i915/dvo_sil164.c

246

u8 val;

sys/dev/drm/i915/dvo_sil164.c

248

sil164_readb(dvo, SIL164_FREQ_LO, &val);

sys/dev/drm/i915/dvo_sil164.c

249

DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);

sys/dev/drm/i915/dvo_sil164.c

250

sil164_readb(dvo, SIL164_FREQ_HI, &val);

sys/dev/drm/i915/dvo_sil164.c

251

DRM_DEBUG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);

sys/dev/drm/i915/dvo_sil164.c

252

sil164_readb(dvo, SIL164_REG8, &val);

sys/dev/drm/i915/dvo_sil164.c

253

DRM_DEBUG_KMS("SIL164_REG8: 0x%02x\n", val);

sys/dev/drm/i915/dvo_sil164.c

254

sil164_readb(dvo, SIL164_REG9, &val);

sys/dev/drm/i915/dvo_sil164.c

255

DRM_DEBUG_KMS("SIL164_REG9: 0x%02x\n", val);

sys/dev/drm/i915/dvo_sil164.c

256

sil164_readb(dvo, SIL164_REGC, &val);

sys/dev/drm/i915/dvo_sil164.c

257

DRM_DEBUG_KMS("SIL164_REGC: 0x%02x\n", val);

sys/dev/drm/i915/dvo_tfp410.c

267

u8 val, val2;

sys/dev/drm/i915/dvo_tfp410.c

269

tfp410_readb(dvo, TFP410_REV, &val);

sys/dev/drm/i915/dvo_tfp410.c

270

DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val);

sys/dev/drm/i915/dvo_tfp410.c

271

tfp410_readb(dvo, TFP410_CTL_1, &val);

sys/dev/drm/i915/dvo_tfp410.c

272

DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val);

sys/dev/drm/i915/dvo_tfp410.c

273

tfp410_readb(dvo, TFP410_CTL_2, &val);

sys/dev/drm/i915/dvo_tfp410.c

274

DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val);

sys/dev/drm/i915/dvo_tfp410.c

275

tfp410_readb(dvo, TFP410_CTL_3, &val);

sys/dev/drm/i915/dvo_tfp410.c

276

DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val);

sys/dev/drm/i915/dvo_tfp410.c

277

tfp410_readb(dvo, TFP410_USERCFG, &val);

sys/dev/drm/i915/dvo_tfp410.c

278

DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val);

sys/dev/drm/i915/dvo_tfp410.c

279

tfp410_readb(dvo, TFP410_DE_DLY, &val);

sys/dev/drm/i915/dvo_tfp410.c

280

DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val);

sys/dev/drm/i915/dvo_tfp410.c

281

tfp410_readb(dvo, TFP410_DE_CTL, &val);

sys/dev/drm/i915/dvo_tfp410.c

282

DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val);

sys/dev/drm/i915/dvo_tfp410.c

283

tfp410_readb(dvo, TFP410_DE_TOP, &val);

sys/dev/drm/i915/dvo_tfp410.c

284

DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val);

sys/dev/drm/i915/dvo_tfp410.c

285

tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);

sys/dev/drm/i915/dvo_tfp410.c

287

DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);

sys/dev/drm/i915/dvo_tfp410.c

288

tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);

sys/dev/drm/i915/dvo_tfp410.c

290

DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);

sys/dev/drm/i915/dvo_tfp410.c

291

tfp410_readb(dvo, TFP410_H_RES_LO, &val);

sys/dev/drm/i915/dvo_tfp410.c

293

DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);

sys/dev/drm/i915/dvo_tfp410.c

294

tfp410_readb(dvo, TFP410_V_RES_LO, &val);

sys/dev/drm/i915/dvo_tfp410.c

296

DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);

sys/dev/drm/i915/gvt/gvt.h

402

u32 offset, u32 val, bool low)

sys/dev/drm/i915/gvt/gvt.h

415

*pval = (val & GENMASK(31, 4)) | (*pval & GENMASK(3, 0));

sys/dev/drm/i915/gvt/gvt.h

417

*pval = val;

sys/dev/drm/i915/i915_drv.c

1154

skl_dram_get_channel_info(struct dram_channel_info *ch, u32 val)

sys/dev/drm/i915/i915_drv.c

1157

u32 s_val = val >> SKL_DRAM_S_SHIFT;

sys/dev/drm/i915/i915_drv.c

1159

if (!val)

sys/dev/drm/i915/i915_drv.c

1162

tmp_l = val & SKL_DRAM_SIZE_MASK;

sys/dev/drm/i915/i915_drv.c

1171

tmp_l = (val & SKL_DRAM_WIDTH_MASK) >> SKL_DRAM_WIDTH_SHIFT;

sys/dev/drm/i915/i915_drv.c

1176

tmp_l = val & SKL_DRAM_RANK_MASK;

sys/dev/drm/i915/i915_drv.c

1269

u32 mem_freq_khz, val;

sys/dev/drm/i915/i915_drv.c

1276

val = I915_READ(SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);

sys/dev/drm/i915/i915_drv.c

1277

mem_freq_khz = DIV_ROUND_UP((val & SKL_REQ_DATA_MASK) *

sys/dev/drm/i915/i915_drv.c

1297

u32 mem_freq_khz, val;

sys/dev/drm/i915/i915_drv.c

1301

val = I915_READ(BXT_P_CR_MC_BIOS_REQ_0_0_0);

sys/dev/drm/i915/i915_drv.c

1302

mem_freq_khz = DIV_ROUND_UP((val & BXT_REQ_DATA_MASK) *

sys/dev/drm/i915/i915_drv.c

1305

dram_channels = val & BXT_DRAM_CHANNEL_ACTIVE_MASK;

sys/dev/drm/i915/i915_drv.c

1324

val = I915_READ(BXT_D_CR_DRP0_DUNIT(i));

sys/dev/drm/i915/i915_drv.c

1325

if (val == 0xFFFFFFFF)

sys/dev/drm/i915/i915_drv.c

1329

tmp = val & BXT_DRAM_RANK_MASK;

sys/dev/drm/i915/i915_drv.c

1338

tmp = val & BXT_DRAM_SIZE_MASK;

sys/dev/drm/i915/i915_drv.c

1352

tmp = (val & BXT_DRAM_WIDTH_MASK) >> BXT_DRAM_WIDTH_SHIFT;

sys/dev/drm/i915/i915_drv.c

2727

u32 val;

sys/dev/drm/i915/i915_drv.c

2792

val = I915_READ(VLV_GTLC_WAKE_CTRL);

sys/dev/drm/i915/i915_drv.c

2793

val &= VLV_GTLC_ALLOWWAKEREQ;

sys/dev/drm/i915/i915_drv.c

2794

val |= s->gtlc_wake_ctrl & ~VLV_GTLC_ALLOWWAKEREQ;

sys/dev/drm/i915/i915_drv.c

2795

I915_WRITE(VLV_GTLC_WAKE_CTRL, val);

sys/dev/drm/i915/i915_drv.c

2797

val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);

sys/dev/drm/i915/i915_drv.c

2798

val &= VLV_GFX_CLK_FORCE_ON_BIT;

sys/dev/drm/i915/i915_drv.c

2799

val |= s->gtlc_survive & ~VLV_GFX_CLK_FORCE_ON_BIT;

sys/dev/drm/i915/i915_drv.c

2800

I915_WRITE(VLV_GTLC_SURVIVABILITY_REG, val);

sys/dev/drm/i915/i915_drv.c

2812

u32 mask, u32 val)

sys/dev/drm/i915/i915_drv.c

2821

return wait_for((I915_READ_NOTRACE(VLV_GTLC_PW_STATUS) & mask) == val,

sys/dev/drm/i915/i915_drv.c

2828

u32 val;

sys/dev/drm/i915/i915_drv.c

2831

val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);

sys/dev/drm/i915/i915_drv.c

2832

val &= ~VLV_GFX_CLK_FORCE_ON_BIT;

sys/dev/drm/i915/i915_drv.c

2834

val |= VLV_GFX_CLK_FORCE_ON_BIT;

sys/dev/drm/i915/i915_drv.c

2835

I915_WRITE(VLV_GTLC_SURVIVABILITY_REG, val);

sys/dev/drm/i915/i915_drv.c

2856

u32 val;

sys/dev/drm/i915/i915_drv.c

2859

val = I915_READ(VLV_GTLC_WAKE_CTRL);

sys/dev/drm/i915/i915_drv.c

2860

val &= ~VLV_GTLC_ALLOWWAKEREQ;

sys/dev/drm/i915/i915_drv.c

2862

val |= VLV_GTLC_ALLOWWAKEREQ;

sys/dev/drm/i915/i915_drv.c

2863

I915_WRITE(VLV_GTLC_WAKE_CTRL, val);

sys/dev/drm/i915/i915_drv.c

2867

val = allow ? mask : 0;

sys/dev/drm/i915/i915_drv.c

2869

err = vlv_wait_for_pw_status(dev_priv, mask, val);

sys/dev/drm/i915/i915_drv.c

2880

u32 val;

sys/dev/drm/i915/i915_drv.c

2883

val = wait_for_on ? mask : 0;

sys/dev/drm/i915/i915_drv.c

2892

if (vlv_wait_for_pw_status(dev_priv, mask, val))

sys/dev/drm/i915/i915_drv.h

131

uint32_t val;

sys/dev/drm/i915/i915_drv.h

136

fp.val = UINT_MAX; \

sys/dev/drm/i915/i915_drv.h

140

static inline bool is_fixed16_zero(uint_fixed_16_16_t val)

sys/dev/drm/i915/i915_drv.h

142

if (val.val == 0)

sys/dev/drm/i915/i915_drv.h

147

static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)

sys/dev/drm/i915/i915_drv.h

151

WARN_ON(val > U16_MAX);

sys/dev/drm/i915/i915_drv.h

153

fp.val = val << 16;

sys/dev/drm/i915/i915_drv.h

159

return DIV_ROUND_UP(fp.val, 1 << 16);

sys/dev/drm/i915/i915_drv.h

164

return fp.val >> 16;

sys/dev/drm/i915/i915_drv.h

172

min.val = min(min1.val, min2.val);

sys/dev/drm/i915/i915_drv.h

181

max.val = max(max1.val, max2.val);

sys/dev/drm/i915/i915_drv.h

185

static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)

sys/dev/drm/i915/i915_drv.h

188

WARN_ON(val > U32_MAX);

sys/dev/drm/i915/i915_drv.h

189

fp.val = (uint32_t) val;

sys/dev/drm/i915/i915_drv.h

193

static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,

sys/dev/drm/i915/i915_drv.h

196

return DIV_ROUND_UP(val.val, d.val);

sys/dev/drm/i915/i915_drv.h

199

static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,

sys/dev/drm/i915/i915_drv.h

204

intermediate_val = (uint64_t) val * mul.val;

sys/dev/drm/i915/i915_drv.h

210

static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,

sys/dev/drm/i915/i915_drv.h

215

intermediate_val = (uint64_t) val.val * mul.val;

sys/dev/drm/i915/i915_drv.h

220

static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)

sys/dev/drm/i915/i915_drv.h

224

interm_val = (uint64_t)val << 16;

sys/dev/drm/i915/i915_drv.h

229

static inline uint32_t div_round_up_u32_fixed16(uint32_t val,

sys/dev/drm/i915/i915_drv.h

234

interm_val = (uint64_t)val << 16;

sys/dev/drm/i915/i915_drv.h

235

interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);

sys/dev/drm/i915/i915_drv.h

240

static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,

sys/dev/drm/i915/i915_drv.h

245

intermediate_val = (uint64_t) val * mul.val;

sys/dev/drm/i915/i915_drv.h

254

interm_sum = (uint64_t) add1.val + add2.val;

sys/dev/drm/i915/i915_drv.h

264

interm_sum = (uint64_t) add1.val + interm_add2.val;

sys/dev/drm/i915/i915_drv.h

3500

extern bool ironlake_set_drps(struct drm_i915_private *dev_priv, u8 val);

sys/dev/drm/i915/i915_drv.h

3502

extern int intel_set_rps(struct drm_i915_private *dev_priv, u8 val);

sys/dev/drm/i915/i915_drv.h

3522

int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val);

sys/dev/drm/i915/i915_drv.h

3524

u32 val, int fast_timeout_us,

sys/dev/drm/i915/i915_drv.h

3526

#define sandybridge_pcode_write(dev_priv, mbox, val) \

sys/dev/drm/i915/i915_drv.h

3527

sandybridge_pcode_write_timeout(dev_priv, mbox, val, 500, 0)

sys/dev/drm/i915/i915_drv.h

3534

int vlv_punit_write(struct drm_i915_private *dev_priv, u32 addr, u32 val);

sys/dev/drm/i915/i915_drv.h

3537

void vlv_iosf_sb_write(struct drm_i915_private *dev_priv, u8 port, u32 reg, u32 val);

sys/dev/drm/i915/i915_drv.h

3539

void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);

sys/dev/drm/i915/i915_drv.h

3541

void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);

sys/dev/drm/i915/i915_drv.h

3543

void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);

sys/dev/drm/i915/i915_drv.h

3545

void vlv_dpio_write(struct drm_i915_private *dev_priv, enum i915_pipe pipe, int reg, u32 val);

sys/dev/drm/i915/i915_drv.h

3551

void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);

sys/dev/drm/i915/i915_drv.h

3594

int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);

sys/dev/drm/i915/i915_drv.h

3595

int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);

sys/dev/drm/i915/i915_drv.h

3608

#define I915_WRITE8(reg, val) dev_priv->uncore.funcs.mmio_writeb(dev_priv, (reg), (val), true)

sys/dev/drm/i915/i915_drv.h

3611

#define I915_WRITE16(reg, val) dev_priv->uncore.funcs.mmio_writew(dev_priv, (reg), (val), true)

sys/dev/drm/i915/i915_drv.h

3613

#define I915_WRITE16_NOTRACE(reg, val) dev_priv->uncore.funcs.mmio_writew(dev_priv, (reg), (val), false)

sys/dev/drm/i915/i915_drv.h

3616

#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)

sys/dev/drm/i915/i915_drv.h

3618

#define I915_WRITE_NOTRACE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), false)

sys/dev/drm/i915/i915_drv.h

3658

i915_reg_t reg, uint##x##_t val) \

sys/dev/drm/i915/i915_drv.h

3660

write##s(val, dev_priv->regs + i915_mmio_reg_offset(reg)); \

sys/dev/drm/i915/i915_gem_fence_reg.c

110

I915_WRITE(fence_reg_hi, upper_32_bits(val));

sys/dev/drm/i915/i915_gem_fence_reg.c

111

I915_WRITE(fence_reg_lo, lower_32_bits(val));

sys/dev/drm/i915/i915_gem_fence_reg.c

119

u32 val;

sys/dev/drm/i915/i915_gem_fence_reg.c

121

val = 0;

sys/dev/drm/i915/i915_gem_fence_reg.c

138

val = vma->node.start;

sys/dev/drm/i915/i915_gem_fence_reg.c

140

val |= BIT(I830_FENCE_TILING_Y_SHIFT);

sys/dev/drm/i915/i915_gem_fence_reg.c

141

val |= I915_FENCE_SIZE_BITS(vma->fence_size);

sys/dev/drm/i915/i915_gem_fence_reg.c

142

val |= ilog2(stride) << I830_FENCE_PITCH_SHIFT;

sys/dev/drm/i915/i915_gem_fence_reg.c

144

val |= I830_FENCE_REG_VALID;

sys/dev/drm/i915/i915_gem_fence_reg.c

151

I915_WRITE(reg, val);

sys/dev/drm/i915/i915_gem_fence_reg.c

159

u32 val;

sys/dev/drm/i915/i915_gem_fence_reg.c

161

val = 0;

sys/dev/drm/i915/i915_gem_fence_reg.c

171

val = vma->node.start;

sys/dev/drm/i915/i915_gem_fence_reg.c

173

val |= BIT(I830_FENCE_TILING_Y_SHIFT);

sys/dev/drm/i915/i915_gem_fence_reg.c

174

val |= I830_FENCE_SIZE_BITS(vma->fence_size);

sys/dev/drm/i915/i915_gem_fence_reg.c

175

val |= ilog2(stride / 128) << I830_FENCE_PITCH_SHIFT;

sys/dev/drm/i915/i915_gem_fence_reg.c

176

val |= I830_FENCE_REG_VALID;

sys/dev/drm/i915/i915_gem_fence_reg.c

183

I915_WRITE(reg, val);

sys/dev/drm/i915/i915_gem_fence_reg.c

65

u64 val;

sys/dev/drm/i915/i915_gem_fence_reg.c

78

val = 0;

sys/dev/drm/i915/i915_gem_fence_reg.c

87

val = (vma->node.start + vma->fence_size - I965_FENCE_PAGE) << 32;

sys/dev/drm/i915/i915_gem_fence_reg.c

88

val |= vma->node.start;

sys/dev/drm/i915/i915_gem_fence_reg.c

89

val |= (u64)((stride / 128) - 1) << fence_pitch_shift;

sys/dev/drm/i915/i915_gem_fence_reg.c

91

val |= BIT(I965_FENCE_TILING_Y_SHIFT);

sys/dev/drm/i915/i915_gem_fence_reg.c

92

val |= I965_FENCE_REG_VALID;

sys/dev/drm/i915/i915_gem_gtt.c

607

const u64 val)

sys/dev/drm/i915/i915_gem_gtt.c

611

memset64(vaddr, val, PAGE_SIZE / sizeof(val));

sys/dev/drm/i915/i915_gem_render_state.c

71

#define OUT_BATCH(batch, i, val) \

sys/dev/drm/i915/i915_gem_render_state.c

75

(batch)[(i)++] = (val); \

sys/dev/drm/i915/i915_irq.c

1576

static bool gen11_port_hotplug_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1580

return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);

sys/dev/drm/i915/i915_irq.c

1582

return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);

sys/dev/drm/i915/i915_irq.c

1584

return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);

sys/dev/drm/i915/i915_irq.c

1586

return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);

sys/dev/drm/i915/i915_irq.c

1592

static bool bxt_port_hotplug_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1596

return val & PORTA_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1598

return val & PORTB_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1600

return val & PORTC_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1606

static bool icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1610

return val & ICP_DDIA_HPD_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1612

return val & ICP_DDIB_HPD_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1618

static bool icp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1622

return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);

sys/dev/drm/i915/i915_irq.c

1624

return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);

sys/dev/drm/i915/i915_irq.c

1626

return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);

sys/dev/drm/i915/i915_irq.c

1628

return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);

sys/dev/drm/i915/i915_irq.c

1634

static bool spt_port_hotplug2_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1638

return val & PORTE_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1644

static bool spt_port_hotplug_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1648

return val & PORTA_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1650

return val & PORTB_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1652

return val & PORTC_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1654

return val & PORTD_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1660

static bool ilk_port_hotplug_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1664

return val & DIGITAL_PORTA_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1670

static bool pch_port_hotplug_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1674

return val & PORTB_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1676

return val & PORTC_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1678

return val & PORTD_HOTPLUG_LONG_DETECT;

sys/dev/drm/i915/i915_irq.c

1684

static bool i9xx_port_hotplug_long_detect(enum hpd_pin pin, u32 val)

sys/dev/drm/i915/i915_irq.c

1688

return val & PORTB_HOTPLUG_INT_LONG_PULSE;

sys/dev/drm/i915/i915_irq.c

1690

return val & PORTC_HOTPLUG_INT_LONG_PULSE;

sys/dev/drm/i915/i915_irq.c

1692

return val & PORTD_HOTPLUG_INT_LONG_PULSE;

sys/dev/drm/i915/i915_irq.c

1709

bool long_pulse_detect(enum hpd_pin pin, u32 val))

sys/dev/drm/i915/i915_irq.c

171

u32 val = I915_READ(reg);

sys/dev/drm/i915/i915_irq.c

173

if (val == 0)

sys/dev/drm/i915/i915_irq.c

177

i915_mmio_reg_offset(reg), val);

sys/dev/drm/i915/i915_irq.c

187

u16 val = I915_READ16(reg);

sys/dev/drm/i915/i915_irq.c

189

if (val == 0)

sys/dev/drm/i915/i915_irq.c

193

i915_mmio_reg_offset(reg), val);

sys/dev/drm/i915/i915_irq.c

230

uint32_t val;

sys/dev/drm/i915/i915_irq.c

235

val = I915_READ(PORT_HOTPLUG_EN);

sys/dev/drm/i915/i915_irq.c

236

val &= ~mask;

sys/dev/drm/i915/i915_irq.c

237

val |= bits;

sys/dev/drm/i915/i915_irq.c

238

I915_WRITE(PORT_HOTPLUG_EN, val);

sys/dev/drm/i915/i915_irq.c

3836

u32 val;

sys/dev/drm/i915/i915_irq.c

3841

val = I915_READ(GEN11_DE_HPD_IMR);

sys/dev/drm/i915/i915_irq.c

3842

val &= ~hotplug_irqs;

sys/dev/drm/i915/i915_irq.c

3843

I915_WRITE(GEN11_DE_HPD_IMR, val);

sys/dev/drm/i915/i915_irq.c

3854

u32 val, hotplug;

sys/dev/drm/i915/i915_irq.c

3858

val = I915_READ(SOUTH_CHICKEN1);

sys/dev/drm/i915/i915_irq.c

3859

val &= ~CHASSIS_CLK_REQ_DURATION_MASK;

sys/dev/drm/i915/i915_irq.c

3860

val |= CHASSIS_CLK_REQ_DURATION(0xf);

sys/dev/drm/i915/i915_irq.c

3861

I915_WRITE(SOUTH_CHICKEN1, val);

sys/dev/drm/i915/i915_perf.c

3036

static uint32_t mask_reg_value(u32 reg, u32 val)

sys/dev/drm/i915/i915_perf.c

3043

val = val & ~_MASKED_BIT_ENABLE(GEN8_ST_PO_DISABLE);

sys/dev/drm/i915/i915_perf.c

3050

val = val & ~_MASKED_BIT_ENABLE(HSW_WAIT_FOR_RC6_EXIT_ENABLE);

sys/dev/drm/i915/i915_perf.c

3052

return val;

sys/dev/drm/i915/i915_pmu.c

160

add_sample(struct i915_pmu_sample *sample, u32 val)

sys/dev/drm/i915/i915_pmu.c

162

sample->cur += val;

sys/dev/drm/i915/i915_pmu.c

184

u32 val;

sys/dev/drm/i915/i915_pmu.c

186

val = !i915_seqno_passed(current_seqno, last_seqno);

sys/dev/drm/i915/i915_pmu.c

188

if (val)

sys/dev/drm/i915/i915_pmu.c

192

if (val && (engine->pmu.enable &

sys/dev/drm/i915/i915_pmu.c

196

val = I915_READ_FW(RING_CTL(engine->mmio_base));

sys/dev/drm/i915/i915_pmu.c

198

val = 0;

sys/dev/drm/i915/i915_pmu.c

201

if (val & RING_WAIT)

sys/dev/drm/i915/i915_pmu.c

205

if (val & RING_WAIT_SEMAPHORE)

sys/dev/drm/i915/i915_pmu.c

217

add_sample_mult(struct i915_pmu_sample *sample, u32 val, u32 mul)

sys/dev/drm/i915/i915_pmu.c

219

sample->cur += mul_u32_u32(val, mul);

sys/dev/drm/i915/i915_pmu.c

227

u32 val;

sys/dev/drm/i915/i915_pmu.c

229

val = dev_priv->gt_pm.rps.cur_freq;

sys/dev/drm/i915/i915_pmu.c

232

val = intel_get_cagf(dev_priv,

sys/dev/drm/i915/i915_pmu.c

238

intel_gpu_freq(dev_priv, val),

sys/dev/drm/i915/i915_pmu.c

427

u64 val;

sys/dev/drm/i915/i915_pmu.c

429

val = intel_rc6_residency_ns(i915,

sys/dev/drm/i915/i915_pmu.c

435

val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6p);

sys/dev/drm/i915/i915_pmu.c

438

val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6pp);

sys/dev/drm/i915/i915_pmu.c

440

return val;

sys/dev/drm/i915/i915_pmu.c

447

u64 val;

sys/dev/drm/i915/i915_pmu.c

450

val = __get_rc6(i915);

sys/dev/drm/i915/i915_pmu.c

461

if (val >= i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur) {

sys/dev/drm/i915/i915_pmu.c

463

i915->pmu.sample[__I915_SAMPLE_RC6].cur = val;

sys/dev/drm/i915/i915_pmu.c

465

val = i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur;

sys/dev/drm/i915/i915_pmu.c

499

val = kdev->power.suspended_jiffies -

sys/dev/drm/i915/i915_pmu.c

501

val += jiffies - kdev->power.accounting_timestamp;

sys/dev/drm/i915/i915_pmu.c

503

val = jiffies_to_nsecs(val);

sys/dev/drm/i915/i915_pmu.c

504

val += i915->pmu.sample[__I915_SAMPLE_RC6].cur;

sys/dev/drm/i915/i915_pmu.c

506

i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = val;

sys/dev/drm/i915/i915_pmu.c

508

val = i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur;

sys/dev/drm/i915/i915_pmu.c

510

val = i915->pmu.sample[__I915_SAMPLE_RC6].cur;

sys/dev/drm/i915/i915_pmu.c

517

return val;

sys/dev/drm/i915/i915_pmu.c

527

u64 val = 0;

sys/dev/drm/i915/i915_pmu.c

541

val = ktime_to_ns(intel_engine_get_busy_time(engine));

sys/dev/drm/i915/i915_pmu.c

543

val = engine->pmu.sample[sample].cur;

sys/dev/drm/i915/i915_pmu.c

548

val =

sys/dev/drm/i915/i915_pmu.c

553

val =

sys/dev/drm/i915/i915_pmu.c

558

val = count_interrupts(i915);

sys/dev/drm/i915/i915_pmu.c

561

val = get_rc6(i915);

sys/dev/drm/i915/i915_pmu.c

566

return val;

sys/dev/drm/i915/i915_pmu.c

741

unsigned long val;

sys/dev/drm/i915/i915_pmu.c

750

return sprintf(buf, "config=0x%lx\n", eattr->val);

sys/dev/drm/i915/i915_pmu.c

804

attr->val = config;

sys/dev/drm/i915/i915_reg.h

1018

#define _DP_SSC(val, pipe) ((val) << (2 * (pipe)))

sys/dev/drm/i915/i915_reg.h

1024

#define _DP_SSS(val, pipe) ((val) << (2 * (pipe) + 16))

sys/dev/drm/i915/i915_reg.h

2575

#define GEN9_IZ_HASHING(slice, val) ((val) << ((slice) * 2))

sys/dev/drm/i915/i915_reg.h

6187

#define I915_LO_DISPBASE(val) ((val) & ~DISP_BASEADDR_MASK)

sys/dev/drm/i915/i915_reg.h

6188

#define I915_HI_DISPBASE(val) ((val) & DISP_BASEADDR_MASK)

sys/dev/drm/i915/i915_reg.h

9853

#define BXT_MIPI_TX_ESCLK_DIVIDER(port, val) \

sys/dev/drm/i915/i915_reg.h

9854

(((val) & 0x3F) << BXT_MIPI_TX_ESCLK_SHIFT(port))

sys/dev/drm/i915/i915_reg.h

9866

#define BXT_MIPI_RX_ESCLK_UPPER_DIVIDER(port, val) \

sys/dev/drm/i915/i915_reg.h

9867

(((val) & 3) << BXT_MIPI_RX_ESCLK_UPPER_SHIFT(port))

sys/dev/drm/i915/i915_reg.h

9879

#define BXT_MIPI_8X_BY3_DIVIDER(port, val) \

sys/dev/drm/i915/i915_reg.h

9880

(((val) & 3) << BXT_MIPI_8X_BY3_SHIFT(port))

sys/dev/drm/i915/i915_reg.h

9892

#define BXT_MIPI_RX_ESCLK_LOWER_DIVIDER(port, val) \

sys/dev/drm/i915/i915_reg.h

9893

(((val) & 3) << BXT_MIPI_RX_ESCLK_LOWER_SHIFT(port))

sys/dev/drm/i915/i915_sysfs.c

310

u32 val;

sys/dev/drm/i915/i915_sysfs.c

312

ret = kstrtou32(buf, 0, &val);

sys/dev/drm/i915/i915_sysfs.c

317

val = intel_freq_opcode(dev_priv, val);

sys/dev/drm/i915/i915_sysfs.c

318

if (val < rps->min_freq || val > rps->max_freq)

sys/dev/drm/i915/i915_sysfs.c

322

if (val != rps->boost_freq) {

sys/dev/drm/i915/i915_sysfs.c

323

rps->boost_freq = val;

sys/dev/drm/i915/i915_sysfs.c

358

u32 val;

sys/dev/drm/i915/i915_sysfs.c

361

ret = kstrtou32(buf, 0, &val);

sys/dev/drm/i915/i915_sysfs.c

369

val = intel_freq_opcode(dev_priv, val);

sys/dev/drm/i915/i915_sysfs.c

371

if (val < rps->min_freq ||

sys/dev/drm/i915/i915_sysfs.c

372

val > rps->max_freq ||

sys/dev/drm/i915/i915_sysfs.c

373

val < rps->min_freq_softlimit) {

sys/dev/drm/i915/i915_sysfs.c

379

if (val > rps->rp0_freq)

sys/dev/drm/i915/i915_sysfs.c

381

intel_gpu_freq(dev_priv, val));

sys/dev/drm/i915/i915_sysfs.c

383

rps->max_freq_softlimit = val;

sys/dev/drm/i915/i915_sysfs.c

385

val = clamp_t(int, rps->cur_freq,

sys/dev/drm/i915/i915_sysfs.c

392

ret = intel_set_rps(dev_priv, val);

sys/dev/drm/i915/i915_sysfs.c

416

u32 val;

sys/dev/drm/i915/i915_sysfs.c

419

ret = kstrtou32(buf, 0, &val);

sys/dev/drm/i915/i915_sysfs.c

427

val = intel_freq_opcode(dev_priv, val);

sys/dev/drm/i915/i915_sysfs.c

429

if (val < rps->min_freq ||

sys/dev/drm/i915/i915_sysfs.c

430

val > rps->max_freq ||

sys/dev/drm/i915/i915_sysfs.c

431

val > rps->max_freq_softlimit) {

sys/dev/drm/i915/i915_sysfs.c

437

rps->min_freq_softlimit = val;

sys/dev/drm/i915/i915_sysfs.c

439

val = clamp_t(int, rps->cur_freq,

sys/dev/drm/i915/i915_sysfs.c

446

ret = intel_set_rps(dev_priv, val);

sys/dev/drm/i915/i915_sysfs.c

473

u32 val;

sys/dev/drm/i915/i915_sysfs.c

476

val = intel_gpu_freq(dev_priv, rps->rp0_freq);

sys/dev/drm/i915/i915_sysfs.c

478

val = intel_gpu_freq(dev_priv, rps->rp1_freq);

sys/dev/drm/i915/i915_sysfs.c

480

val = intel_gpu_freq(dev_priv, rps->min_freq);

sys/dev/drm/i915/i915_sysfs.c

484

return snprintf(buf, PAGE_SIZE, "%d\n", val);

sys/dev/drm/i915/intel_atomic.c

50

uint64_t *val)

sys/dev/drm/i915/intel_atomic.c

58

*val = intel_conn_state->force_audio;

sys/dev/drm/i915/intel_atomic.c

60

*val = intel_conn_state->broadcast_rgb;

sys/dev/drm/i915/intel_atomic.c

82

uint64_t val)

sys/dev/drm/i915/intel_atomic.c

90

intel_conn_state->force_audio = val;

sys/dev/drm/i915/intel_atomic.c

95

intel_conn_state->broadcast_rgb = val;

sys/dev/drm/i915/intel_atomic_plane.c

215

uint64_t *val)

sys/dev/drm/i915/intel_atomic_plane.c

238

uint64_t val)

sys/dev/drm/i915/intel_bios.c

1174

static u8 translate_iboost(u8 val)

sys/dev/drm/i915/intel_bios.c

1178

if (val >= ARRAY_SIZE(mapping)) {

sys/dev/drm/i915/intel_bios.c

1179

DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);

sys/dev/drm/i915/intel_bios.c

1182

return mapping[val];

sys/dev/drm/i915/intel_cdclk.c

1258

u32 val;

sys/dev/drm/i915/intel_cdclk.c

1263

val = I915_READ(BXT_DE_PLL_ENABLE);

sys/dev/drm/i915/intel_cdclk.c

1264

if ((val & BXT_DE_PLL_PLL_ENABLE) == 0)

sys/dev/drm/i915/intel_cdclk.c

1267

if (WARN_ON((val & BXT_DE_PLL_LOCK) == 0))

sys/dev/drm/i915/intel_cdclk.c

1270

val = I915_READ(BXT_DE_PLL_CTL);

sys/dev/drm/i915/intel_cdclk.c

1271

cdclk_state->vco = (val & BXT_DE_PLL_RATIO_MASK) * cdclk_state->ref;

sys/dev/drm/i915/intel_cdclk.c

1335

u32 val;

sys/dev/drm/i915/intel_cdclk.c

1337

val = I915_READ(BXT_DE_PLL_CTL);

sys/dev/drm/i915/intel_cdclk.c

1338

val &= ~BXT_DE_PLL_RATIO_MASK;

sys/dev/drm/i915/intel_cdclk.c

1339

val |= BXT_DE_PLL_RATIO(ratio);

sys/dev/drm/i915/intel_cdclk.c

1340

I915_WRITE(BXT_DE_PLL_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

1360

u32 val, divider;

sys/dev/drm/i915/intel_cdclk.c

1408

val = divider | skl_cdclk_decimal(cdclk);

sys/dev/drm/i915/intel_cdclk.c

1413

val |= BXT_CDCLK_CD2X_PIPE_NONE;

sys/dev/drm/i915/intel_cdclk.c

1419

val |= BXT_CDCLK_SSA_PRECHARGE_ENABLE;

sys/dev/drm/i915/intel_cdclk.c

1420

I915_WRITE(CDCLK_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

1573

u32 val;

sys/dev/drm/i915/intel_cdclk.c

1582

val = I915_READ(BXT_DE_PLL_ENABLE);

sys/dev/drm/i915/intel_cdclk.c

1583

if ((val & BXT_DE_PLL_PLL_ENABLE) == 0)

sys/dev/drm/i915/intel_cdclk.c

1586

if (WARN_ON((val & BXT_DE_PLL_LOCK) == 0))

sys/dev/drm/i915/intel_cdclk.c

1589

cdclk_state->vco = (val & CNL_CDCLK_PLL_RATIO_MASK) * cdclk_state->ref;

sys/dev/drm/i915/intel_cdclk.c

1632

u32 val;

sys/dev/drm/i915/intel_cdclk.c

1634

val = I915_READ(BXT_DE_PLL_ENABLE);

sys/dev/drm/i915/intel_cdclk.c

1635

val &= ~BXT_DE_PLL_PLL_ENABLE;

sys/dev/drm/i915/intel_cdclk.c

1636

I915_WRITE(BXT_DE_PLL_ENABLE, val);

sys/dev/drm/i915/intel_cdclk.c

1648

u32 val;

sys/dev/drm/i915/intel_cdclk.c

1650

val = CNL_CDCLK_PLL_RATIO(ratio);

sys/dev/drm/i915/intel_cdclk.c

1651

I915_WRITE(BXT_DE_PLL_ENABLE, val);

sys/dev/drm/i915/intel_cdclk.c

1653

val |= BXT_DE_PLL_PLL_ENABLE;

sys/dev/drm/i915/intel_cdclk.c

1654

I915_WRITE(BXT_DE_PLL_ENABLE, val);

sys/dev/drm/i915/intel_cdclk.c

1668

u32 val, divider;

sys/dev/drm/i915/intel_cdclk.c

1704

val = divider | skl_cdclk_decimal(cdclk);

sys/dev/drm/i915/intel_cdclk.c

1709

val |= BXT_CDCLK_CD2X_PIPE_NONE;

sys/dev/drm/i915/intel_cdclk.c

1710

I915_WRITE(CDCLK_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

1912

u32 val;

sys/dev/drm/i915/intel_cdclk.c

1916

val = I915_READ(SKL_DSSM);

sys/dev/drm/i915/intel_cdclk.c

1917

switch (val & ICL_DSSM_CDCLK_PLL_REFCLK_MASK) {

sys/dev/drm/i915/intel_cdclk.c

1919

MISSING_CASE(val);

sys/dev/drm/i915/intel_cdclk.c

1932

val = I915_READ(BXT_DE_PLL_ENABLE);

sys/dev/drm/i915/intel_cdclk.c

1933

if ((val & BXT_DE_PLL_PLL_ENABLE) == 0 ||

sys/dev/drm/i915/intel_cdclk.c

1934

(val & BXT_DE_PLL_LOCK) == 0) {

sys/dev/drm/i915/intel_cdclk.c

1944

cdclk_state->vco = (val & BXT_DE_PLL_RATIO_MASK) * cdclk_state->ref;

sys/dev/drm/i915/intel_cdclk.c

1946

val = I915_READ(CDCLK_CTL);

sys/dev/drm/i915/intel_cdclk.c

1947

WARN_ON((val & BXT_CDCLK_CD2X_DIV_SEL_MASK) != 0);

sys/dev/drm/i915/intel_cdclk.c

1972

u32 val;

sys/dev/drm/i915/intel_cdclk.c

1982

val = I915_READ(CDCLK_CTL);

sys/dev/drm/i915/intel_cdclk.c

1984

if ((val & BXT_CDCLK_CD2X_DIV_SEL_MASK) != 0)

sys/dev/drm/i915/intel_cdclk.c

1987

if ((val & CDCLK_FREQ_DECIMAL_MASK) !=

sys/dev/drm/i915/intel_cdclk.c

463

u32 val;

sys/dev/drm/i915/intel_cdclk.c

471

val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);

sys/dev/drm/i915/intel_cdclk.c

475

cdclk_state->voltage_level = (val & DSPFREQGUAR_MASK) >>

sys/dev/drm/i915/intel_cdclk.c

478

cdclk_state->voltage_level = (val & DSPFREQGUAR_MASK_CHV) >>

sys/dev/drm/i915/intel_cdclk.c

522

u32 val, cmd = cdclk_state->voltage_level;

sys/dev/drm/i915/intel_cdclk.c

545

val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);

sys/dev/drm/i915/intel_cdclk.c

546

val &= ~DSPFREQGUAR_MASK;

sys/dev/drm/i915/intel_cdclk.c

547

val |= (cmd << DSPFREQGUAR_SHIFT);

sys/dev/drm/i915/intel_cdclk.c

548

vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val);

sys/dev/drm/i915/intel_cdclk.c

565

val = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);

sys/dev/drm/i915/intel_cdclk.c

566

val &= ~CCK_FREQUENCY_VALUES;

sys/dev/drm/i915/intel_cdclk.c

567

val |= divider;

sys/dev/drm/i915/intel_cdclk.c

568

vlv_cck_write(dev_priv, CCK_DISPLAY_CLOCK_CONTROL, val);

sys/dev/drm/i915/intel_cdclk.c

577

val = vlv_bunit_read(dev_priv, BUNIT_REG_BISOC);

sys/dev/drm/i915/intel_cdclk.c

578

val &= ~0x7f;

sys/dev/drm/i915/intel_cdclk.c

585

val |= 4500 / 250; /* 4.5 usec */

sys/dev/drm/i915/intel_cdclk.c

587

val |= 3000 / 250; /* 3.0 usec */

sys/dev/drm/i915/intel_cdclk.c

588

vlv_bunit_write(dev_priv, BUNIT_REG_BISOC, val);

sys/dev/drm/i915/intel_cdclk.c

603

u32 val, cmd = cdclk_state->voltage_level;

sys/dev/drm/i915/intel_cdclk.c

625

val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);

sys/dev/drm/i915/intel_cdclk.c

626

val &= ~DSPFREQGUAR_MASK_CHV;

sys/dev/drm/i915/intel_cdclk.c

627

val |= (cmd << DSPFREQGUAR_SHIFT_CHV);

sys/dev/drm/i915/intel_cdclk.c

628

vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val);

sys/dev/drm/i915/intel_cdclk.c

701

uint32_t val;

sys/dev/drm/i915/intel_cdclk.c

721

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_cdclk.c

722

val |= LCPLL_CD_SOURCE_FCLK;

sys/dev/drm/i915/intel_cdclk.c

723

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

733

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_cdclk.c

734

val &= ~LCPLL_CLK_FREQ_MASK;

sys/dev/drm/i915/intel_cdclk.c

741

val |= LCPLL_CLK_FREQ_337_5_BDW;

sys/dev/drm/i915/intel_cdclk.c

744

val |= LCPLL_CLK_FREQ_450;

sys/dev/drm/i915/intel_cdclk.c

747

val |= LCPLL_CLK_FREQ_54O_BDW;

sys/dev/drm/i915/intel_cdclk.c

750

val |= LCPLL_CLK_FREQ_675_BDW;

sys/dev/drm/i915/intel_cdclk.c

754

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

756

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_cdclk.c

757

val &= ~LCPLL_CD_SOURCE_FCLK;

sys/dev/drm/i915/intel_cdclk.c

758

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

818

u32 val;

sys/dev/drm/i915/intel_cdclk.c

823

val = I915_READ(LCPLL1_CTL);

sys/dev/drm/i915/intel_cdclk.c

824

if ((val & LCPLL_PLL_ENABLE) == 0)

sys/dev/drm/i915/intel_cdclk.c

827

if (WARN_ON((val & LCPLL_PLL_LOCK) == 0))

sys/dev/drm/i915/intel_cdclk.c

830

val = I915_READ(DPLL_CTRL1);

sys/dev/drm/i915/intel_cdclk.c

832

if (WARN_ON((val & (DPLL_CTRL1_HDMI_MODE(SKL_DPLL0) |

sys/dev/drm/i915/intel_cdclk.c

838

switch (val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0)) {

sys/dev/drm/i915/intel_cdclk.c

850

MISSING_CASE(val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0));

sys/dev/drm/i915/intel_cdclk.c

935

u32 val;

sys/dev/drm/i915/intel_cdclk.c

948

val = I915_READ(DPLL_CTRL1);

sys/dev/drm/i915/intel_cdclk.c

950

val &= ~(DPLL_CTRL1_HDMI_MODE(SKL_DPLL0) | DPLL_CTRL1_SSC(SKL_DPLL0) |

sys/dev/drm/i915/intel_cdclk.c

952

val |= DPLL_CTRL1_OVERRIDE(SKL_DPLL0);

sys/dev/drm/i915/intel_cdclk.c

954

val |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080,

sys/dev/drm/i915/intel_cdclk.c

957

val |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810,

sys/dev/drm/i915/intel_cdclk.c

960

I915_WRITE(DPLL_CTRL1, val);

sys/dev/drm/i915/intel_crt.c

69

u32 val;

sys/dev/drm/i915/intel_crt.c

71

val = I915_READ(adpa_reg);

sys/dev/drm/i915/intel_crt.c

75

*pipe = (val & ADPA_PIPE_SEL_MASK_CPT) >> ADPA_PIPE_SEL_SHIFT_CPT;

sys/dev/drm/i915/intel_crt.c

77

*pipe = (val & ADPA_PIPE_SEL_MASK) >> ADPA_PIPE_SEL_SHIFT;

sys/dev/drm/i915/intel_crt.c

79

return val & ADPA_DAC_ENABLE;

sys/dev/drm/i915/intel_csr.c

220

uint32_t val, mask;

sys/dev/drm/i915/intel_csr.c

228

val = I915_READ(DC_STATE_DEBUG);

sys/dev/drm/i915/intel_csr.c

229

if ((val & mask) != mask) {

sys/dev/drm/i915/intel_csr.c

230

val |= mask;

sys/dev/drm/i915/intel_csr.c

231

I915_WRITE(DC_STATE_DEBUG, val);

sys/dev/drm/i915/intel_ddi.c

1433

u32 val = I915_READ(DDI_CLK_SEL(port)) & DDI_CLK_SEL_MASK;

sys/dev/drm/i915/intel_ddi.c

1435

switch (val) {

sys/dev/drm/i915/intel_ddi.c

1447

MISSING_CASE(val);

sys/dev/drm/i915/intel_ddi.c

1663

u32 val, pll;

sys/dev/drm/i915/intel_ddi.c

1665

val = hsw_pll_to_ddi_pll_sel(pipe_config->shared_dpll);

sys/dev/drm/i915/intel_ddi.c

1666

switch (val & PORT_CLK_SEL_MASK) {

sys/dev/drm/i915/intel_ddi.c

1898

uint32_t val = I915_READ(reg);

sys/dev/drm/i915/intel_ddi.c

1900

val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC);

sys/dev/drm/i915/intel_ddi.c

1901

val |= TRANS_DDI_PORT_NONE;

sys/dev/drm/i915/intel_ddi.c

1902

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_ddi.c

2296

u32 val;

sys/dev/drm/i915/intel_ddi.c

2311

val = I915_READ(CNL_PORT_TX_DW5_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2312

val &= ~SCALING_MODE_SEL_MASK;

sys/dev/drm/i915/intel_ddi.c

2313

val |= SCALING_MODE_SEL(2);

sys/dev/drm/i915/intel_ddi.c

2314

I915_WRITE(CNL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2317

val = I915_READ(CNL_PORT_TX_DW2_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2318

val &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK |

sys/dev/drm/i915/intel_ddi.c

2320

val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_sel);

sys/dev/drm/i915/intel_ddi.c

2321

val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_sel);

sys/dev/drm/i915/intel_ddi.c

2323

val |= RCOMP_SCALAR(0x98);

sys/dev/drm/i915/intel_ddi.c

2324

I915_WRITE(CNL_PORT_TX_DW2_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2329

val = I915_READ(CNL_PORT_TX_DW4_LN(port, ln));

sys/dev/drm/i915/intel_ddi.c

2330

val &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK |

sys/dev/drm/i915/intel_ddi.c

2332

val |= POST_CURSOR_1(ddi_translations[level].dw4_post_cursor_1);

sys/dev/drm/i915/intel_ddi.c

2333

val |= POST_CURSOR_2(ddi_translations[level].dw4_post_cursor_2);

sys/dev/drm/i915/intel_ddi.c

2334

val |= CURSOR_COEFF(ddi_translations[level].dw4_cursor_coeff);

sys/dev/drm/i915/intel_ddi.c

2335

I915_WRITE(CNL_PORT_TX_DW4_LN(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2340

val = I915_READ(CNL_PORT_TX_DW5_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2341

val &= ~RTERM_SELECT_MASK;

sys/dev/drm/i915/intel_ddi.c

2342

val |= RTERM_SELECT(6);

sys/dev/drm/i915/intel_ddi.c

2343

val |= TAP3_DISABLE;

sys/dev/drm/i915/intel_ddi.c

2344

I915_WRITE(CNL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2347

val = I915_READ(CNL_PORT_TX_DW7_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2348

val &= ~N_SCALAR_MASK;

sys/dev/drm/i915/intel_ddi.c

2349

val |= N_SCALAR(ddi_translations[level].dw7_n_scalar);

sys/dev/drm/i915/intel_ddi.c

2350

I915_WRITE(CNL_PORT_TX_DW7_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2359

u32 val;

sys/dev/drm/i915/intel_ddi.c

2376

val = I915_READ(CNL_PORT_PCS_DW1_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2378

val |= COMMON_KEEPER_EN;

sys/dev/drm/i915/intel_ddi.c

2380

val &= ~COMMON_KEEPER_EN;

sys/dev/drm/i915/intel_ddi.c

2381

I915_WRITE(CNL_PORT_PCS_DW1_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2391

val = I915_READ(CNL_PORT_TX_DW4_LN(port, ln));

sys/dev/drm/i915/intel_ddi.c

2392

val &= ~LOADGEN_SELECT;

sys/dev/drm/i915/intel_ddi.c

2396

val |= LOADGEN_SELECT;

sys/dev/drm/i915/intel_ddi.c

2398

I915_WRITE(CNL_PORT_TX_DW4_LN(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2402

val = I915_READ(CNL_PORT_CL1CM_DW5);

sys/dev/drm/i915/intel_ddi.c

2403

val |= SUS_CLOCK_CONFIG;

sys/dev/drm/i915/intel_ddi.c

2404

I915_WRITE(CNL_PORT_CL1CM_DW5, val);

sys/dev/drm/i915/intel_ddi.c

2407

val = I915_READ(CNL_PORT_TX_DW5_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2408

val &= ~TX_TRAINING_EN;

sys/dev/drm/i915/intel_ddi.c

2409

I915_WRITE(CNL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2415

val = I915_READ(CNL_PORT_TX_DW5_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2416

val |= TX_TRAINING_EN;

sys/dev/drm/i915/intel_ddi.c

2417

I915_WRITE(CNL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2424

u32 n_entries, val;

sys/dev/drm/i915/intel_ddi.c

2438

val = I915_READ(ICL_PORT_TX_DW5_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2439

val &= ~RTERM_SELECT_MASK;

sys/dev/drm/i915/intel_ddi.c

2440

val |= RTERM_SELECT(0x6);

sys/dev/drm/i915/intel_ddi.c

2441

I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2444

val = I915_READ(ICL_PORT_TX_DW5_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2449

val |= TAP2_DISABLE;

sys/dev/drm/i915/intel_ddi.c

2450

val |= TAP3_DISABLE;

sys/dev/drm/i915/intel_ddi.c

2452

val &= ~TAP2_DISABLE;

sys/dev/drm/i915/intel_ddi.c

2453

val &= ~TAP3_DISABLE;

sys/dev/drm/i915/intel_ddi.c

2455

I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2458

val = I915_READ(ICL_PORT_TX_DW2_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2459

val &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK |

sys/dev/drm/i915/intel_ddi.c

2461

val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_select);

sys/dev/drm/i915/intel_ddi.c

2462

val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_select);

sys/dev/drm/i915/intel_ddi.c

2464

val |= RCOMP_SCALAR(ddi_translations[level].dw2_swing_scalar);

sys/dev/drm/i915/intel_ddi.c

2465

I915_WRITE(ICL_PORT_TX_DW2_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2470

val = I915_READ(ICL_PORT_TX_DW4_LN(port, ln));

sys/dev/drm/i915/intel_ddi.c

2471

val &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK |

sys/dev/drm/i915/intel_ddi.c

2473

val |= ddi_translations[level].dw4_scaling;

sys/dev/drm/i915/intel_ddi.c

2474

I915_WRITE(ICL_PORT_TX_DW4_LN(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2486

u32 val;

sys/dev/drm/i915/intel_ddi.c

2504

val = I915_READ(ICL_PORT_PCS_DW1_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2506

val &= ~COMMON_KEEPER_EN;

sys/dev/drm/i915/intel_ddi.c

2508

val |= COMMON_KEEPER_EN;

sys/dev/drm/i915/intel_ddi.c

2509

I915_WRITE(ICL_PORT_PCS_DW1_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2519

val = I915_READ(ICL_PORT_TX_DW4_LN(port, ln));

sys/dev/drm/i915/intel_ddi.c

2520

val &= ~LOADGEN_SELECT;

sys/dev/drm/i915/intel_ddi.c

2524

val |= LOADGEN_SELECT;

sys/dev/drm/i915/intel_ddi.c

2526

I915_WRITE(ICL_PORT_TX_DW4_LN(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2530

val = I915_READ(ICL_PORT_CL_DW5(port));

sys/dev/drm/i915/intel_ddi.c

2531

val |= SUS_CLOCK_CONFIG;

sys/dev/drm/i915/intel_ddi.c

2532

I915_WRITE(ICL_PORT_CL_DW5(port), val);

sys/dev/drm/i915/intel_ddi.c

2535

val = I915_READ(ICL_PORT_TX_DW5_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2536

val &= ~TX_TRAINING_EN;

sys/dev/drm/i915/intel_ddi.c

2537

I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2543

val = I915_READ(ICL_PORT_TX_DW5_LN0(port));

sys/dev/drm/i915/intel_ddi.c

2544

val |= TX_TRAINING_EN;

sys/dev/drm/i915/intel_ddi.c

2545

I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2555

u32 n_entries, val;

sys/dev/drm/i915/intel_ddi.c

2569

val = I915_READ(MG_TX1_LINK_PARAMS(port, ln));

sys/dev/drm/i915/intel_ddi.c

2570

val &= ~CRI_USE_FS32;

sys/dev/drm/i915/intel_ddi.c

2571

I915_WRITE(MG_TX1_LINK_PARAMS(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2573

val = I915_READ(MG_TX2_LINK_PARAMS(port, ln));

sys/dev/drm/i915/intel_ddi.c

2574

val &= ~CRI_USE_FS32;

sys/dev/drm/i915/intel_ddi.c

2575

I915_WRITE(MG_TX2_LINK_PARAMS(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2580

val = I915_READ(MG_TX1_SWINGCTRL(port, ln));

sys/dev/drm/i915/intel_ddi.c

2581

val &= ~CRI_TXDEEMPH_OVERRIDE_17_12_MASK;

sys/dev/drm/i915/intel_ddi.c

2582

val |= CRI_TXDEEMPH_OVERRIDE_17_12(

sys/dev/drm/i915/intel_ddi.c

2584

I915_WRITE(MG_TX1_SWINGCTRL(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2586

val = I915_READ(MG_TX2_SWINGCTRL(port, ln));

sys/dev/drm/i915/intel_ddi.c

2587

val &= ~CRI_TXDEEMPH_OVERRIDE_17_12_MASK;

sys/dev/drm/i915/intel_ddi.c

2588

val |= CRI_TXDEEMPH_OVERRIDE_17_12(

sys/dev/drm/i915/intel_ddi.c

2590

I915_WRITE(MG_TX2_SWINGCTRL(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2595

val = I915_READ(MG_TX1_DRVCTRL(port, ln));

sys/dev/drm/i915/intel_ddi.c

2596

val &= ~(CRI_TXDEEMPH_OVERRIDE_11_6_MASK |

sys/dev/drm/i915/intel_ddi.c

2598

val |= CRI_TXDEEMPH_OVERRIDE_5_0(

sys/dev/drm/i915/intel_ddi.c

2603

I915_WRITE(MG_TX1_DRVCTRL(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2605

val = I915_READ(MG_TX2_DRVCTRL(port, ln));

sys/dev/drm/i915/intel_ddi.c

2606

val &= ~(CRI_TXDEEMPH_OVERRIDE_11_6_MASK |

sys/dev/drm/i915/intel_ddi.c

2608

val |= CRI_TXDEEMPH_OVERRIDE_5_0(

sys/dev/drm/i915/intel_ddi.c

2613

I915_WRITE(MG_TX2_DRVCTRL(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2624

val = I915_READ(MG_CLKHUB(port, ln));

sys/dev/drm/i915/intel_ddi.c

2626

val |= CFG_LOW_RATE_LKREN_EN;

sys/dev/drm/i915/intel_ddi.c

2628

val &= ~CFG_LOW_RATE_LKREN_EN;

sys/dev/drm/i915/intel_ddi.c

2629

I915_WRITE(MG_CLKHUB(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2634

val = I915_READ(MG_TX1_DCC(port, ln));

sys/dev/drm/i915/intel_ddi.c

2635

val &= ~CFG_AMI_CK_DIV_OVERRIDE_VAL_MASK;

sys/dev/drm/i915/intel_ddi.c

2637

val &= ~CFG_AMI_CK_DIV_OVERRIDE_EN;

sys/dev/drm/i915/intel_ddi.c

2639

val |= CFG_AMI_CK_DIV_OVERRIDE_EN |

sys/dev/drm/i915/intel_ddi.c

2642

I915_WRITE(MG_TX1_DCC(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2644

val = I915_READ(MG_TX2_DCC(port, ln));

sys/dev/drm/i915/intel_ddi.c

2645

val &= ~CFG_AMI_CK_DIV_OVERRIDE_VAL_MASK;

sys/dev/drm/i915/intel_ddi.c

2647

val &= ~CFG_AMI_CK_DIV_OVERRIDE_EN;

sys/dev/drm/i915/intel_ddi.c

2649

val |= CFG_AMI_CK_DIV_OVERRIDE_EN |

sys/dev/drm/i915/intel_ddi.c

2652

I915_WRITE(MG_TX2_DCC(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2657

val = I915_READ(MG_TX1_PISO_READLOAD(port, ln));

sys/dev/drm/i915/intel_ddi.c

2658

val |= CRI_CALCINIT;

sys/dev/drm/i915/intel_ddi.c

2659

I915_WRITE(MG_TX1_PISO_READLOAD(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2661

val = I915_READ(MG_TX2_PISO_READLOAD(port, ln));

sys/dev/drm/i915/intel_ddi.c

2662

val |= CRI_CALCINIT;

sys/dev/drm/i915/intel_ddi.c

2663

I915_WRITE(MG_TX2_PISO_READLOAD(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2765

uint32_t val;

sys/dev/drm/i915/intel_ddi.c

2773

val = I915_READ(DPCLKA_CFGCR0_ICL);

sys/dev/drm/i915/intel_ddi.c

2774

WARN_ON((val & icl_dpclka_cfgcr0_clk_off(dev_priv, port)) == 0);

sys/dev/drm/i915/intel_ddi.c

2777

val &= ~DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);

sys/dev/drm/i915/intel_ddi.c

2778

val |= DPCLKA_CFGCR0_DDI_CLK_SEL(pll->info->id, port);

sys/dev/drm/i915/intel_ddi.c

2779

I915_WRITE(DPCLKA_CFGCR0_ICL, val);

sys/dev/drm/i915/intel_ddi.c

2783

val &= ~icl_dpclka_cfgcr0_clk_off(dev_priv, port);

sys/dev/drm/i915/intel_ddi.c

2784

I915_WRITE(DPCLKA_CFGCR0_ICL, val);

sys/dev/drm/i915/intel_ddi.c

2821

uint32_t val;

sys/dev/drm/i915/intel_ddi.c

2834

val = I915_READ(DPCLKA_CFGCR0);

sys/dev/drm/i915/intel_ddi.c

2835

val &= ~DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);

sys/dev/drm/i915/intel_ddi.c

2836

val |= DPCLKA_CFGCR0_DDI_CLK_SEL(pll->info->id, port);

sys/dev/drm/i915/intel_ddi.c

2837

I915_WRITE(DPCLKA_CFGCR0, val);

sys/dev/drm/i915/intel_ddi.c

2844

val = I915_READ(DPCLKA_CFGCR0);

sys/dev/drm/i915/intel_ddi.c

2845

val &= ~DPCLKA_CFGCR0_DDI_CLK_OFF(port);

sys/dev/drm/i915/intel_ddi.c

2846

I915_WRITE(DPCLKA_CFGCR0, val);

sys/dev/drm/i915/intel_ddi.c

2849

val = I915_READ(DPLL_CTRL2);

sys/dev/drm/i915/intel_ddi.c

2851

val &= ~(DPLL_CTRL2_DDI_CLK_OFF(port) |

sys/dev/drm/i915/intel_ddi.c

2853

val |= (DPLL_CTRL2_DDI_CLK_SEL(pll->info->id, port) |

sys/dev/drm/i915/intel_ddi.c

2856

I915_WRITE(DPLL_CTRL2, val);

sys/dev/drm/i915/intel_ddi.c

3007

u32 val;

sys/dev/drm/i915/intel_ddi.c

3009

val = I915_READ(DDI_BUF_CTL(port));

sys/dev/drm/i915/intel_ddi.c

3010

if (val & DDI_BUF_CTL_ENABLE) {

sys/dev/drm/i915/intel_ddi.c

3011

val &= ~DDI_BUF_CTL_ENABLE;

sys/dev/drm/i915/intel_ddi.c

3012

I915_WRITE(DDI_BUF_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3016

val = I915_READ(DP_TP_CTL(port));

sys/dev/drm/i915/intel_ddi.c

3017

val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK);

sys/dev/drm/i915/intel_ddi.c

3018

val |= DP_TP_CTL_LINK_TRAIN_PAT1;

sys/dev/drm/i915/intel_ddi.c

3019

I915_WRITE(DP_TP_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3109

uint32_t val;

sys/dev/drm/i915/intel_ddi.c

3117

val = I915_READ(FDI_RX_CTL(PIPE_A));

sys/dev/drm/i915/intel_ddi.c

3118

val &= ~FDI_RX_ENABLE;

sys/dev/drm/i915/intel_ddi.c

3119

I915_WRITE(FDI_RX_CTL(PIPE_A), val);

sys/dev/drm/i915/intel_ddi.c

3124

val = I915_READ(FDI_RX_MISC(PIPE_A));

sys/dev/drm/i915/intel_ddi.c

3125

val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);

sys/dev/drm/i915/intel_ddi.c

3126

val |= FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2);

sys/dev/drm/i915/intel_ddi.c

3127

I915_WRITE(FDI_RX_MISC(PIPE_A), val);

sys/dev/drm/i915/intel_ddi.c

3129

val = I915_READ(FDI_RX_CTL(PIPE_A));

sys/dev/drm/i915/intel_ddi.c

3130

val &= ~FDI_PCDCLK;

sys/dev/drm/i915/intel_ddi.c

3131

I915_WRITE(FDI_RX_CTL(PIPE_A), val);

sys/dev/drm/i915/intel_ddi.c

3133

val = I915_READ(FDI_RX_CTL(PIPE_A));

sys/dev/drm/i915/intel_ddi.c

3134

val &= ~FDI_RX_PLL_ENABLE;

sys/dev/drm/i915/intel_ddi.c

3135

I915_WRITE(FDI_RX_CTL(PIPE_A), val);

sys/dev/drm/i915/intel_ddi.c

3188

u32 val;

sys/dev/drm/i915/intel_ddi.c

3190

val = I915_READ(CHICKEN_TRANS(transcoder));

sys/dev/drm/i915/intel_ddi.c

3193

val |= DDIE_TRAINING_OVERRIDE_ENABLE |

sys/dev/drm/i915/intel_ddi.c

3196

val |= DDI_TRAINING_OVERRIDE_ENABLE |

sys/dev/drm/i915/intel_ddi.c

3199

I915_WRITE(CHICKEN_TRANS(transcoder), val);

sys/dev/drm/i915/intel_ddi.c

3205

val &= ~(DDIE_TRAINING_OVERRIDE_ENABLE |

sys/dev/drm/i915/intel_ddi.c

3208

val &= ~(DDI_TRAINING_OVERRIDE_ENABLE |

sys/dev/drm/i915/intel_ddi.c

3211

I915_WRITE(CHICKEN_TRANS(transcoder), val);

sys/dev/drm/i915/intel_ddi.c

3300

uint32_t val;

sys/dev/drm/i915/intel_ddi.c

3304

val = I915_READ(DDI_BUF_CTL(port));

sys/dev/drm/i915/intel_ddi.c

3305

if (val & DDI_BUF_CTL_ENABLE) {

sys/dev/drm/i915/intel_ddi.c

3306

val &= ~DDI_BUF_CTL_ENABLE;

sys/dev/drm/i915/intel_ddi.c

3307

I915_WRITE(DDI_BUF_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3311

val = I915_READ(DP_TP_CTL(port));

sys/dev/drm/i915/intel_ddi.c

3312

val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK);

sys/dev/drm/i915/intel_ddi.c

3313

val |= DP_TP_CTL_LINK_TRAIN_PAT1;

sys/dev/drm/i915/intel_ddi.c

3314

I915_WRITE(DP_TP_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3321

val = DP_TP_CTL_ENABLE |

sys/dev/drm/i915/intel_ddi.c

3324

val |= DP_TP_CTL_MODE_MST;

sys/dev/drm/i915/intel_ddi.c

3326

val |= DP_TP_CTL_MODE_SST;

sys/dev/drm/i915/intel_ddi.c

3328

val |= DP_TP_CTL_ENHANCED_FRAME_ENABLE;

sys/dev/drm/i915/intel_ddi.c

3330

I915_WRITE(DP_TP_CTL(port), val);

sys/dev/drm/i915/intel_display.c

10222

u32 val;

sys/dev/drm/i915/intel_display.c

10233

val = I915_READ(CURCNTR(plane->pipe));

sys/dev/drm/i915/intel_display.c

10235

ret = val & MCURSOR_MODE;

sys/dev/drm/i915/intel_display.c

10240

*pipe = (val & MCURSOR_PIPE_SELECT_MASK) >>

sys/dev/drm/i915/intel_display.c

1109

u32 val;

sys/dev/drm/i915/intel_display.c

1112

val = I915_READ(DPLL(pipe));

sys/dev/drm/i915/intel_display.c

1113

cur_state = !!(val & DPLL_VCO_ENABLE);

sys/dev/drm/i915/intel_display.c

1122

u32 val;

sys/dev/drm/i915/intel_display.c

1126

val = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);

sys/dev/drm/i915/intel_display.c

1129

cur_state = val & DSI_PLL_VCO_EN;

sys/dev/drm/i915/intel_display.c

1144

u32 val = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));

sys/dev/drm/i915/intel_display.c

1145

cur_state = !!(val & TRANS_DDI_FUNC_ENABLE);

sys/dev/drm/i915/intel_display.c

1147

u32 val = I915_READ(FDI_TX_CTL(pipe));

sys/dev/drm/i915/intel_display.c

1148

cur_state = !!(val & FDI_TX_ENABLE);

sys/dev/drm/i915/intel_display.c

1160

u32 val;

sys/dev/drm/i915/intel_display.c

1163

val = I915_READ(FDI_RX_CTL(pipe));

sys/dev/drm/i915/intel_display.c

1164

cur_state = !!(val & FDI_RX_ENABLE);

sys/dev/drm/i915/intel_display.c

1175

u32 val;

sys/dev/drm/i915/intel_display.c

1185

val = I915_READ(FDI_TX_CTL(pipe));

sys/dev/drm/i915/intel_display.c

1186

I915_STATE_WARN(!(val & FDI_TX_PLL_ENABLE), "FDI TX PLL assertion failure, should be active but is disabled\n");

sys/dev/drm/i915/intel_display.c

1192

u32 val;

sys/dev/drm/i915/intel_display.c

1195

val = I915_READ(FDI_RX_CTL(pipe));

sys/dev/drm/i915/intel_display.c

1196

cur_state = !!(val & FDI_RX_PLL_ENABLE);

sys/dev/drm/i915/intel_display.c

1205

u32 val;

sys/dev/drm/i915/intel_display.c

1249

val = I915_READ(pp_reg);

sys/dev/drm/i915/intel_display.c

1250

if (!(val & PANEL_POWER_ON) ||

sys/dev/drm/i915/intel_display.c

1251

((val & PANEL_UNLOCK_MASK) == PANEL_UNLOCK_REGS))

sys/dev/drm/i915/intel_display.c

1273

u32 val = I915_READ(PIPECONF(cpu_transcoder));

sys/dev/drm/i915/intel_display.c

1274

cur_state = !!(val & PIPECONF_ENABLE);

sys/dev/drm/i915/intel_display.c

1319

u32 val;

sys/dev/drm/i915/intel_display.c

1322

val = I915_READ(PCH_TRANSCONF(pipe));

sys/dev/drm/i915/intel_display.c

1323

enabled = !!(val & TRANS_ENABLE);

sys/dev/drm/i915/intel_display.c

14260

u32 val = I915_READ(PP_CONTROL(pps_idx));

sys/dev/drm/i915/intel_display.c

14262

val = (val & ~PANEL_UNLOCK_MASK) | PANEL_UNLOCK_REGS;

sys/dev/drm/i915/intel_display.c

14263

I915_WRITE(PP_CONTROL(pps_idx), val);

sys/dev/drm/i915/intel_display.c

1596

u32 val;

sys/dev/drm/i915/intel_display.c

1601

val = DPLL_INTEGRATED_REF_CLK_VLV |

sys/dev/drm/i915/intel_display.c

1604

val |= DPLL_INTEGRATED_CRI_CLK_VLV;

sys/dev/drm/i915/intel_display.c

1606

I915_WRITE(DPLL(pipe), val);

sys/dev/drm/i915/intel_display.c

1613

u32 val;

sys/dev/drm/i915/intel_display.c

1618

val = DPLL_SSC_REF_CLK_CHV |

sys/dev/drm/i915/intel_display.c

1621

val |= DPLL_INTEGRATED_CRI_CLK_VLV;

sys/dev/drm/i915/intel_display.c

1623

I915_WRITE(DPLL(pipe), val);

sys/dev/drm/i915/intel_display.c

1629

val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port));

sys/dev/drm/i915/intel_display.c

1630

val &= ~DPIO_DCLKP_EN;

sys/dev/drm/i915/intel_display.c

1631

vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW14(port), val);

sys/dev/drm/i915/intel_display.c

1675

uint32_t val, pipeconf_val;

sys/dev/drm/i915/intel_display.c

1688

val = I915_READ(reg);

sys/dev/drm/i915/intel_display.c

1689

val |= TRANS_CHICKEN2_TIMING_OVERRIDE;

sys/dev/drm/i915/intel_display.c

1690

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_display.c

1694

val = I915_READ(reg);

sys/dev/drm/i915/intel_display.c

1703

val &= ~PIPECONF_BPC_MASK;

sys/dev/drm/i915/intel_display.c

1705

val |= PIPECONF_8BPC;

sys/dev/drm/i915/intel_display.c

1707

val |= pipeconf_val & PIPECONF_BPC_MASK;

sys/dev/drm/i915/intel_display.c

1710

val &= ~TRANS_INTERLACE_MASK;

sys/dev/drm/i915/intel_display.c

1714

val |= TRANS_LEGACY_INTERLACED_ILK;

sys/dev/drm/i915/intel_display.c

1716

val |= TRANS_INTERLACED;

sys/dev/drm/i915/intel_display.c

1718

val |= TRANS_PROGRESSIVE;

sys/dev/drm/i915/intel_display.c

1720

I915_WRITE(reg, val | TRANS_ENABLE);

sys/dev/drm/i915/intel_display.c

1730

u32 val, pipeconf_val;

sys/dev/drm/i915/intel_display.c

1737

val = I915_READ(TRANS_CHICKEN2(PIPE_A));

sys/dev/drm/i915/intel_display.c

1738

val |= TRANS_CHICKEN2_TIMING_OVERRIDE;

sys/dev/drm/i915/intel_display.c

1739

I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);

sys/dev/drm/i915/intel_display.c

1741

val = TRANS_ENABLE;

sys/dev/drm/i915/intel_display.c

1746

val |= TRANS_INTERLACED;

sys/dev/drm/i915/intel_display.c

1748

val |= TRANS_PROGRESSIVE;

sys/dev/drm/i915/intel_display.c

1750

I915_WRITE(LPT_TRANSCONF, val);

sys/dev/drm/i915/intel_display.c

1763

uint32_t val;

sys/dev/drm/i915/intel_display.c

1773

val = I915_READ(reg);

sys/dev/drm/i915/intel_display.c

1774

val &= ~TRANS_ENABLE;

sys/dev/drm/i915/intel_display.c

1775

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_display.c

1785

val = I915_READ(reg);

sys/dev/drm/i915/intel_display.c

1786

val &= ~TRANS_CHICKEN2_TIMING_OVERRIDE;

sys/dev/drm/i915/intel_display.c

1787

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_display.c

1793

u32 val;

sys/dev/drm/i915/intel_display.c

1795

val = I915_READ(LPT_TRANSCONF);

sys/dev/drm/i915/intel_display.c

1796

val &= ~TRANS_ENABLE;

sys/dev/drm/i915/intel_display.c

1797

I915_WRITE(LPT_TRANSCONF, val);

sys/dev/drm/i915/intel_display.c

1805

val = I915_READ(TRANS_CHICKEN2(PIPE_A));

sys/dev/drm/i915/intel_display.c

1806

val &= ~TRANS_CHICKEN2_TIMING_OVERRIDE;

sys/dev/drm/i915/intel_display.c

1807

I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);

sys/dev/drm/i915/intel_display.c

1827

u32 val;

sys/dev/drm/i915/intel_display.c

1855

val = I915_READ(reg);

sys/dev/drm/i915/intel_display.c

1856

if (val & PIPECONF_ENABLE) {

sys/dev/drm/i915/intel_display.c

1862

I915_WRITE(reg, val | PIPECONF_ENABLE);

sys/dev/drm/i915/intel_display.c

1883

u32 val;

sys/dev/drm/i915/intel_display.c

1894

val = I915_READ(reg);

sys/dev/drm/i915/intel_display.c

1895

if ((val & PIPECONF_ENABLE) == 0)

sys/dev/drm/i915/intel_display.c

1903

val &= ~PIPECONF_DOUBLE_WIDE;

sys/dev/drm/i915/intel_display.c

1907

val &= ~PIPECONF_ENABLE;

sys/dev/drm/i915/intel_display.c

1909

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_display.c

1910

if ((val & PIPECONF_ENABLE) == 0)

sys/dev/drm/i915/intel_display.c

196

u32 val;

sys/dev/drm/i915/intel_display.c

200

val = vlv_cck_read(dev_priv, reg);

sys/dev/drm/i915/intel_display.c

203

divider = val & CCK_FREQUENCY_VALUES;

sys/dev/drm/i915/intel_display.c

205

WARN((val & CCK_FREQUENCY_STATUS) !=

sys/dev/drm/i915/intel_display.c

3483

u32 val;

sys/dev/drm/i915/intel_display.c

3494

val = I915_READ(DSPCNTR(i9xx_plane));

sys/dev/drm/i915/intel_display.c

3496

ret = val & DISPLAY_PLANE_ENABLE;

sys/dev/drm/i915/intel_display.c

3501

*pipe = (val & DISPPLANE_SEL_PIPE_MASK) >>

sys/dev/drm/i915/intel_display.c

5726

u32 val = I915_READ(CLKGATE_DIS_PSL(pipe));

sys/dev/drm/i915/intel_display.c

5730

val |= mask;

sys/dev/drm/i915/intel_display.c

5732

val &= ~mask;

sys/dev/drm/i915/intel_display.c

5734

I915_WRITE(CLKGATE_DIS_PSL(pipe), val);

sys/dev/drm/i915/intel_display.c

5741

uint32_t val;

sys/dev/drm/i915/intel_display.c

5743

val = MBUS_DBOX_BW_CREDIT(1) | MBUS_DBOX_A_CREDIT(2);

sys/dev/drm/i915/intel_display.c

5746

val |= MBUS_DBOX_B_CREDIT(24 / INTEL_INFO(dev_priv)->num_pipes);

sys/dev/drm/i915/intel_display.c

5748

I915_WRITE(PIPE_MBUS_DBOX_CTL(pipe), val);

sys/dev/drm/i915/intel_display.c

7858

u32 val, base, offset;

sys/dev/drm/i915/intel_display.c

7879

val = I915_READ(DSPCNTR(i9xx_plane));

sys/dev/drm/i915/intel_display.c

7882

if (val & DISPPLANE_TILED) {

sys/dev/drm/i915/intel_display.c

7887

if (val & DISPPLANE_ROTATE_180)

sys/dev/drm/i915/intel_display.c

7892

val & DISPPLANE_MIRROR)

sys/dev/drm/i915/intel_display.c

7895

pixel_format = val & DISPPLANE_PIXFORMAT_MASK;

sys/dev/drm/i915/intel_display.c

7913

val = I915_READ(PIPESRC(pipe));

sys/dev/drm/i915/intel_display.c

7914

fb->width = ((val >> 16) & 0xfff) + 1;

sys/dev/drm/i915/intel_display.c

7915

fb->height = ((val >> 0) & 0xfff) + 1;

sys/dev/drm/i915/intel_display.c

7917

val = I915_READ(DSPSTRIDE(i9xx_plane));

sys/dev/drm/i915/intel_display.c

7918

fb->pitches[0] = val & 0xffffffc0;

sys/dev/drm/i915/intel_display.c

8084

u32 val, final;

sys/dev/drm/i915/intel_display.c

8139

val = I915_READ(PCH_DREF_CONTROL);

sys/dev/drm/i915/intel_display.c

8145

final = val;

sys/dev/drm/i915/intel_display.c

8174

if (final == val)

sys/dev/drm/i915/intel_display.c

8178

val &= ~DREF_NONSPREAD_SOURCE_MASK;

sys/dev/drm/i915/intel_display.c

8181

val |= DREF_NONSPREAD_CK505_ENABLE;

sys/dev/drm/i915/intel_display.c

8183

val |= DREF_NONSPREAD_SOURCE_ENABLE;

sys/dev/drm/i915/intel_display.c

8186

val &= ~DREF_SSC_SOURCE_MASK;

sys/dev/drm/i915/intel_display.c

8187

val |= DREF_SSC_SOURCE_ENABLE;

sys/dev/drm/i915/intel_display.c

8192

val |= DREF_SSC1_ENABLE;

sys/dev/drm/i915/intel_display.c

8194

val &= ~DREF_SSC1_ENABLE;

sys/dev/drm/i915/intel_display.c

8197

I915_WRITE(PCH_DREF_CONTROL, val);

sys/dev/drm/i915/intel_display.c

8201

val &= ~DREF_CPU_SOURCE_OUTPUT_MASK;

sys/dev/drm/i915/intel_display.c

8207

val |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;

sys/dev/drm/i915/intel_display.c

8209

val |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;

sys/dev/drm/i915/intel_display.c

8211

val |= DREF_CPU_SOURCE_OUTPUT_DISABLE;

sys/dev/drm/i915/intel_display.c

8213

I915_WRITE(PCH_DREF_CONTROL, val);

sys/dev/drm/i915/intel_display.c

8219

val &= ~DREF_CPU_SOURCE_OUTPUT_MASK;

sys/dev/drm/i915/intel_display.c

8222

val |= DREF_CPU_SOURCE_OUTPUT_DISABLE;

sys/dev/drm/i915/intel_display.c

8224

I915_WRITE(PCH_DREF_CONTROL, val);

sys/dev/drm/i915/intel_display.c

8232

val &= ~DREF_SSC_SOURCE_MASK;

sys/dev/drm/i915/intel_display.c

8233

val |= DREF_SSC_SOURCE_DISABLE;

sys/dev/drm/i915/intel_display.c

8236

val &= ~DREF_SSC1_ENABLE;

sys/dev/drm/i915/intel_display.c

8238

I915_WRITE(PCH_DREF_CONTROL, val);

sys/dev/drm/i915/intel_display.c

8244

BUG_ON(val != final);

sys/dev/drm/i915/intel_display.c

8514

uint32_t val;

sys/dev/drm/i915/intel_display.c

8516

val = 0;

sys/dev/drm/i915/intel_display.c

8520

val |= PIPECONF_6BPC;

sys/dev/drm/i915/intel_display.c

8523

val |= PIPECONF_8BPC;

sys/dev/drm/i915/intel_display.c

8526

val |= PIPECONF_10BPC;

sys/dev/drm/i915/intel_display.c

8529

val |= PIPECONF_12BPC;

sys/dev/drm/i915/intel_display.c

8537

val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);

sys/dev/drm/i915/intel_display.c

8540

val |= PIPECONF_INTERLACED_ILK;

sys/dev/drm/i915/intel_display.c

8542

val |= PIPECONF_PROGRESSIVE;

sys/dev/drm/i915/intel_display.c

8545

val |= PIPECONF_COLOR_RANGE_SELECT;

sys/dev/drm/i915/intel_display.c

8547

I915_WRITE(PIPECONF(pipe), val);

sys/dev/drm/i915/intel_display.c

8556

u32 val = 0;

sys/dev/drm/i915/intel_display.c

8559

val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);

sys/dev/drm/i915/intel_display.c

8562

val |= PIPECONF_INTERLACED_ILK;

sys/dev/drm/i915/intel_display.c

8564

val |= PIPECONF_PROGRESSIVE;

sys/dev/drm/i915/intel_display.c

8566

I915_WRITE(PIPECONF(cpu_transcoder), val);

sys/dev/drm/i915/intel_display.c

8577

u32 val = 0;

sys/dev/drm/i915/intel_display.c

8581

val |= PIPEMISC_DITHER_6_BPC;

sys/dev/drm/i915/intel_display.c

8584

val |= PIPEMISC_DITHER_8_BPC;

sys/dev/drm/i915/intel_display.c

8587

val |= PIPEMISC_DITHER_10_BPC;

sys/dev/drm/i915/intel_display.c

8590

val |= PIPEMISC_DITHER_12_BPC;

sys/dev/drm/i915/intel_display.c

8598

val |= PIPEMISC_DITHER_ENABLE | PIPEMISC_DITHER_TYPE_SP;

sys/dev/drm/i915/intel_display.c

8601

val |= PIPEMISC_OUTPUT_COLORSPACE_YUV |

sys/dev/drm/i915/intel_display.c

8606

I915_WRITE(PIPEMISC(intel_crtc->pipe), val);

sys/dev/drm/i915/intel_display.c

8897

u32 val, base, offset, stride_mult, tiling, alpha;

sys/dev/drm/i915/intel_display.c

8918

val = I915_READ(PLANE_CTL(pipe, plane_id));

sys/dev/drm/i915/intel_display.c

8921

pixel_format = val & ICL_PLANE_CTL_FORMAT_MASK;

sys/dev/drm/i915/intel_display.c

8923

pixel_format = val & PLANE_CTL_FORMAT_MASK;

sys/dev/drm/i915/intel_display.c

8929

alpha = val & PLANE_CTL_ALPHA_MASK;

sys/dev/drm/i915/intel_display.c

8933

val & PLANE_CTL_ORDER_RGBX, alpha);

sys/dev/drm/i915/intel_display.c

8936

tiling = val & PLANE_CTL_TILED_MASK;

sys/dev/drm/i915/intel_display.c

8947

if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)

sys/dev/drm/i915/intel_display.c

8953

if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)

sys/dev/drm/i915/intel_display.c

8967

switch (val & PLANE_CTL_ROTATE_MASK) {

sys/dev/drm/i915/intel_display.c

8983

val & PLANE_CTL_FLIP_HORIZONTAL)

sys/dev/drm/i915/intel_display.c

8991

val = I915_READ(PLANE_SIZE(pipe, plane_id));

sys/dev/drm/i915/intel_display.c

8992

fb->height = ((val >> 16) & 0xfff) + 1;

sys/dev/drm/i915/intel_display.c

8993

fb->width = ((val >> 0) & 0x1fff) + 1;

sys/dev/drm/i915/intel_display.c

8995

val = I915_READ(PLANE_STRIDE(pipe, plane_id));

sys/dev/drm/i915/intel_display.c

8997

fb->pitches[0] = (val & 0x3ff) * stride_mult;

sys/dev/drm/i915/intel_display.c

9179

static void hsw_write_dcomp(struct drm_i915_private *dev_priv, uint32_t val)

sys/dev/drm/i915/intel_display.c

9184

val))

sys/dev/drm/i915/intel_display.c

9188

I915_WRITE(D_COMP_BDW, val);

sys/dev/drm/i915/intel_display.c

9204

uint32_t val;

sys/dev/drm/i915/intel_display.c

9208

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_display.c

9211

val |= LCPLL_CD_SOURCE_FCLK;

sys/dev/drm/i915/intel_display.c

9212

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9218

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_display.c

9221

val |= LCPLL_PLL_DISABLE;

sys/dev/drm/i915/intel_display.c

9222

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9228

val = hsw_read_dcomp(dev_priv);

sys/dev/drm/i915/intel_display.c

9229

val |= D_COMP_COMP_DISABLE;

sys/dev/drm/i915/intel_display.c

9230

hsw_write_dcomp(dev_priv, val);

sys/dev/drm/i915/intel_display.c

9238

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_display.c

9239

val |= LCPLL_POWER_DOWN_ALLOW;

sys/dev/drm/i915/intel_display.c

9240

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9251

uint32_t val;

sys/dev/drm/i915/intel_display.c

9253

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_display.c

9255

if ((val & (LCPLL_PLL_LOCK | LCPLL_PLL_DISABLE | LCPLL_CD_SOURCE_FCLK |

sys/dev/drm/i915/intel_display.c

9265

if (val & LCPLL_POWER_DOWN_ALLOW) {

sys/dev/drm/i915/intel_display.c

9266

val &= ~LCPLL_POWER_DOWN_ALLOW;

sys/dev/drm/i915/intel_display.c

9267

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9271

val = hsw_read_dcomp(dev_priv);

sys/dev/drm/i915/intel_display.c

9272

val |= D_COMP_COMP_FORCE;

sys/dev/drm/i915/intel_display.c

9273

val &= ~D_COMP_COMP_DISABLE;

sys/dev/drm/i915/intel_display.c

9274

hsw_write_dcomp(dev_priv, val);

sys/dev/drm/i915/intel_display.c

9276

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_display.c

9277

val &= ~LCPLL_PLL_DISABLE;

sys/dev/drm/i915/intel_display.c

9278

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9285

if (val & LCPLL_CD_SOURCE_FCLK) {

sys/dev/drm/i915/intel_display.c

9286

val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_display.c

9287

val &= ~LCPLL_CD_SOURCE_FCLK;

sys/dev/drm/i915/intel_display.c

9288

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9326

uint32_t val;

sys/dev/drm/i915/intel_display.c

9331

val = I915_READ(SOUTH_DSPCLK_GATE_D);

sys/dev/drm/i915/intel_display.c

9332

val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;

sys/dev/drm/i915/intel_display.c

9333

I915_WRITE(SOUTH_DSPCLK_GATE_D, val);

sys/dev/drm/i915/intel_display.c

9342

uint32_t val;

sys/dev/drm/i915/intel_display.c

9350

val = I915_READ(SOUTH_DSPCLK_GATE_D);

sys/dev/drm/i915/intel_display.c

9351

val |= PCH_LP_PARTITION_LEVEL_DISABLE;

sys/dev/drm/i915/intel_display.c

9352

I915_WRITE(SOUTH_DSPCLK_GATE_D, val);

sys/dev/drm/i915/intel_dp.c

2840

u32 val = I915_READ(TRANS_DP_CTL(p));

sys/dev/drm/i915/intel_dp.c

2842

if ((val & TRANS_DP_PORT_SEL_MASK) == TRANS_DP_PORT_SEL(port)) {

sys/dev/drm/i915/intel_dp.c

2861

u32 val;

sys/dev/drm/i915/intel_dp.c

2863

val = I915_READ(dp_reg);

sys/dev/drm/i915/intel_dp.c

2865

ret = val & DP_PORT_EN;

sys/dev/drm/i915/intel_dp.c

2869

*pipe = (val & DP_PIPE_SEL_MASK_IVB) >> DP_PIPE_SEL_SHIFT_IVB;

sys/dev/drm/i915/intel_dp.c

2873

*pipe = (val & DP_PIPE_SEL_MASK_CHV) >> DP_PIPE_SEL_SHIFT_CHV;

sys/dev/drm/i915/intel_dp.c

2875

*pipe = (val & DP_PIPE_SEL_MASK) >> DP_PIPE_SEL_SHIFT;

sys/dev/drm/i915/intel_dp.c

298

u32 val;

sys/dev/drm/i915/intel_dp.c

305

val = I915_READ(mg_regs[i]);

sys/dev/drm/i915/intel_dp.c

306

val |= MG_DP_MODE_CFG_TR2PWR_GATING |

sys/dev/drm/i915/intel_dp.c

311

I915_WRITE(mg_regs[i], val);

sys/dev/drm/i915/intel_dp.c

314

val = I915_READ(MG_MISC_SUS0(tc_port));

sys/dev/drm/i915/intel_dp.c

315

val |= MG_MISC_SUS0_SUSCLK_DYNCLKGATE_MODE(3) |

sys/dev/drm/i915/intel_dp.c

322

I915_WRITE(MG_MISC_SUS0(tc_port), val);

sys/dev/drm/i915/intel_dp.c

331

u32 val;

sys/dev/drm/i915/intel_dp.c

338

val = I915_READ(mg_regs[i]);

sys/dev/drm/i915/intel_dp.c

339

val &= ~(MG_DP_MODE_CFG_TR2PWR_GATING |

sys/dev/drm/i915/intel_dp.c

344

I915_WRITE(mg_regs[i], val);

sys/dev/drm/i915/intel_dp.c

347

val = I915_READ(MG_MISC_SUS0(tc_port));

sys/dev/drm/i915/intel_dp.c

348

val &= ~(MG_MISC_SUS0_SUSCLK_DYNCLKGATE_MODE_MASK |

sys/dev/drm/i915/intel_dp.c

355

I915_WRITE(MG_MISC_SUS0(tc_port), val);

sys/dev/drm/i915/intel_dp.c

3795

uint32_t val;

sys/dev/drm/i915/intel_dp.c

3800

val = I915_READ(DP_TP_CTL(port));

sys/dev/drm/i915/intel_dp.c

3801

val &= ~DP_TP_CTL_LINK_TRAIN_MASK;

sys/dev/drm/i915/intel_dp.c

3802

val |= DP_TP_CTL_LINK_TRAIN_IDLE;

sys/dev/drm/i915/intel_dp.c

3803

I915_WRITE(DP_TP_CTL(port), val);

sys/dev/drm/i915/intel_dp.c

3956

int val = le16_to_cpu(sink_rates[i]);

sys/dev/drm/i915/intel_dp.c

3958

if (val == 0)

sys/dev/drm/i915/intel_dp.c

3967

intel_dp->sink_rates[i] = (val * 200) / 10;

sys/dev/drm/i915/intel_dp.c

4842

u32 val;

sys/dev/drm/i915/intel_dp.c

4848

val = I915_READ(PORT_TX_DFLEXDPPMS);

sys/dev/drm/i915/intel_dp.c

4849

if (!(val & DP_PHY_MODE_STATUS_COMPLETED(tc_port))) {

sys/dev/drm/i915/intel_dp.c

4858

val = I915_READ(PORT_TX_DFLEXDPCSSS);

sys/dev/drm/i915/intel_dp.c

4859

if (!(val & DP_PHY_MODE_STATUS_NOT_SAFE(tc_port))) {

sys/dev/drm/i915/intel_dp.c

4860

val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc_port);

sys/dev/drm/i915/intel_dp.c

4861

I915_WRITE(PORT_TX_DFLEXDPCSSS, val);

sys/dev/drm/i915/intel_dp.c

4871

val = I915_READ(PORT_TX_DFLEXDPCSSS);

sys/dev/drm/i915/intel_dp.c

4872

val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc_port);

sys/dev/drm/i915/intel_dp.c

4873

I915_WRITE(PORT_TX_DFLEXDPCSSS, val);

sys/dev/drm/i915/intel_dp.c

4888

u32 val;

sys/dev/drm/i915/intel_dp.c

4898

val = I915_READ(PORT_TX_DFLEXDPCSSS);

sys/dev/drm/i915/intel_dp.c

4899

if (val & DP_PHY_MODE_STATUS_NOT_SAFE(tc_port)) {

sys/dev/drm/i915/intel_dp.c

4900

val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc_port);

sys/dev/drm/i915/intel_dp.c

4901

I915_WRITE(PORT_TX_DFLEXDPCSSS, val);

sys/dev/drm/i915/intel_dp.c

6117

u32 val;

sys/dev/drm/i915/intel_dp.c

6119

val = I915_READ(reg);

sys/dev/drm/i915/intel_dp.c

6122

val |= PIPECONF_EDP_RR_MODE_SWITCH_VLV;

sys/dev/drm/i915/intel_dp.c

6124

val |= PIPECONF_EDP_RR_MODE_SWITCH;

sys/dev/drm/i915/intel_dp.c

6127

val &= ~PIPECONF_EDP_RR_MODE_SWITCH_VLV;

sys/dev/drm/i915/intel_dp.c

6129

val &= ~PIPECONF_EDP_RR_MODE_SWITCH;

sys/dev/drm/i915/intel_dp.c

6131

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_dpio_phy.c

1046

u32 val;

sys/dev/drm/i915/intel_dpio_phy.c

1051

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW8(port));

sys/dev/drm/i915/intel_dpio_phy.c

1052

val = 0;

sys/dev/drm/i915/intel_dpio_phy.c

1054

val |= (1<<21);

sys/dev/drm/i915/intel_dpio_phy.c

1056

val &= ~(1<<21);

sys/dev/drm/i915/intel_dpio_phy.c

1057

val |= 0x001000c4;

sys/dev/drm/i915/intel_dpio_phy.c

1058

vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW8(port), val);

sys/dev/drm/i915/intel_dpio_phy.c

267

u32 val;

sys/dev/drm/i915/intel_dpio_phy.c

277

val = I915_READ(BXT_PORT_PCS_DW10_LN01(phy, ch));

sys/dev/drm/i915/intel_dpio_phy.c

278

val &= ~(TX2_SWING_CALC_INIT | TX1_SWING_CALC_INIT);

sys/dev/drm/i915/intel_dpio_phy.c

279

I915_WRITE(BXT_PORT_PCS_DW10_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

281

val = I915_READ(BXT_PORT_TX_DW2_LN0(phy, ch));

sys/dev/drm/i915/intel_dpio_phy.c

282

val &= ~(MARGIN_000 | UNIQ_TRANS_SCALE);

sys/dev/drm/i915/intel_dpio_phy.c

283

val |= margin << MARGIN_000_SHIFT | scale << UNIQ_TRANS_SCALE_SHIFT;

sys/dev/drm/i915/intel_dpio_phy.c

284

I915_WRITE(BXT_PORT_TX_DW2_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

286

val = I915_READ(BXT_PORT_TX_DW3_LN0(phy, ch));

sys/dev/drm/i915/intel_dpio_phy.c

287

val &= ~SCALE_DCOMP_METHOD;

sys/dev/drm/i915/intel_dpio_phy.c

289

val |= SCALE_DCOMP_METHOD;

sys/dev/drm/i915/intel_dpio_phy.c

291

if ((val & UNIQUE_TRANGE_EN_METHOD) && !(val & SCALE_DCOMP_METHOD))

sys/dev/drm/i915/intel_dpio_phy.c

294

I915_WRITE(BXT_PORT_TX_DW3_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

296

val = I915_READ(BXT_PORT_TX_DW4_LN0(phy, ch));

sys/dev/drm/i915/intel_dpio_phy.c

297

val &= ~DE_EMPHASIS;

sys/dev/drm/i915/intel_dpio_phy.c

298

val |= deemphasis << DEEMPH_SHIFT;

sys/dev/drm/i915/intel_dpio_phy.c

299

I915_WRITE(BXT_PORT_TX_DW4_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

301

val = I915_READ(BXT_PORT_PCS_DW10_LN01(phy, ch));

sys/dev/drm/i915/intel_dpio_phy.c

302

val |= TX2_SWING_CALC_INIT | TX1_SWING_CALC_INIT;

sys/dev/drm/i915/intel_dpio_phy.c

303

I915_WRITE(BXT_PORT_PCS_DW10_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

336

u32 val = I915_READ(BXT_PORT_REF_DW6(phy));

sys/dev/drm/i915/intel_dpio_phy.c

338

return (val & GRC_CODE_MASK) >> GRC_CODE_SHIFT;

sys/dev/drm/i915/intel_dpio_phy.c

355

u32 val;

sys/dev/drm/i915/intel_dpio_phy.c

374

val = I915_READ(BXT_P_CR_GT_DISP_PWRON);

sys/dev/drm/i915/intel_dpio_phy.c

375

val |= phy_info->pwron_mask;

sys/dev/drm/i915/intel_dpio_phy.c

376

I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val);

sys/dev/drm/i915/intel_dpio_phy.c

393

val = I915_READ(BXT_PORT_CL1CM_DW9(phy));

sys/dev/drm/i915/intel_dpio_phy.c

394

val &= ~IREF0RC_OFFSET_MASK;

sys/dev/drm/i915/intel_dpio_phy.c

395

val |= 0xE4 << IREF0RC_OFFSET_SHIFT;

sys/dev/drm/i915/intel_dpio_phy.c

396

I915_WRITE(BXT_PORT_CL1CM_DW9(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

398

val = I915_READ(BXT_PORT_CL1CM_DW10(phy));

sys/dev/drm/i915/intel_dpio_phy.c

399

val &= ~IREF1RC_OFFSET_MASK;

sys/dev/drm/i915/intel_dpio_phy.c

400

val |= 0xE4 << IREF1RC_OFFSET_SHIFT;

sys/dev/drm/i915/intel_dpio_phy.c

401

I915_WRITE(BXT_PORT_CL1CM_DW10(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

404

val = I915_READ(BXT_PORT_CL1CM_DW28(phy));

sys/dev/drm/i915/intel_dpio_phy.c

405

val |= OCL1_POWER_DOWN_EN | DW28_OLDO_DYN_PWR_DOWN_EN |

sys/dev/drm/i915/intel_dpio_phy.c

407

I915_WRITE(BXT_PORT_CL1CM_DW28(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

410

val = I915_READ(BXT_PORT_CL2CM_DW6(phy));

sys/dev/drm/i915/intel_dpio_phy.c

411

val |= DW6_OLDO_DYN_PWR_DOWN_EN;

sys/dev/drm/i915/intel_dpio_phy.c

412

I915_WRITE(BXT_PORT_CL2CM_DW6(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

425

val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,

sys/dev/drm/i915/intel_dpio_phy.c

427

grc_code = val << GRC_CODE_FAST_SHIFT |

sys/dev/drm/i915/intel_dpio_phy.c

428

val << GRC_CODE_SLOW_SHIFT |

sys/dev/drm/i915/intel_dpio_phy.c

429

val;

sys/dev/drm/i915/intel_dpio_phy.c

432

val = I915_READ(BXT_PORT_REF_DW8(phy));

sys/dev/drm/i915/intel_dpio_phy.c

433

val |= GRC_DIS | GRC_RDY_OVRD;

sys/dev/drm/i915/intel_dpio_phy.c

434

I915_WRITE(BXT_PORT_REF_DW8(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

440

val = I915_READ(BXT_PHY_CTL_FAMILY(phy));

sys/dev/drm/i915/intel_dpio_phy.c

441

val |= COMMON_RESET_DIS;

sys/dev/drm/i915/intel_dpio_phy.c

442

I915_WRITE(BXT_PHY_CTL_FAMILY(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

448

uint32_t val;

sys/dev/drm/i915/intel_dpio_phy.c

452

val = I915_READ(BXT_PHY_CTL_FAMILY(phy));

sys/dev/drm/i915/intel_dpio_phy.c

453

val &= ~COMMON_RESET_DIS;

sys/dev/drm/i915/intel_dpio_phy.c

454

I915_WRITE(BXT_PHY_CTL_FAMILY(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

456

val = I915_READ(BXT_P_CR_GT_DISP_PWRON);

sys/dev/drm/i915/intel_dpio_phy.c

457

val &= ~phy_info->pwron_mask;

sys/dev/drm/i915/intel_dpio_phy.c

458

I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val);

sys/dev/drm/i915/intel_dpio_phy.c

494

u32 val;

sys/dev/drm/i915/intel_dpio_phy.c

496

val = I915_READ(reg);

sys/dev/drm/i915/intel_dpio_phy.c

497

if ((val & mask) == expected)

sys/dev/drm/i915/intel_dpio_phy.c

506

phy, &vaf, reg.reg, val, (val & ~mask) | expected,

sys/dev/drm/i915/intel_dpio_phy.c

599

u32 val = I915_READ(BXT_PORT_TX_DW14_LN(phy, ch, lane));

sys/dev/drm/i915/intel_dpio_phy.c

605

val &= ~LATENCY_OPTIM;

sys/dev/drm/i915/intel_dpio_phy.c

607

val |= LATENCY_OPTIM;

sys/dev/drm/i915/intel_dpio_phy.c

609

I915_WRITE(BXT_PORT_TX_DW14_LN(phy, ch, lane), val);

sys/dev/drm/i915/intel_dpio_phy.c

627

u32 val = I915_READ(BXT_PORT_TX_DW14_LN(phy, ch, lane));

sys/dev/drm/i915/intel_dpio_phy.c

629

if (val & LATENCY_OPTIM)

sys/dev/drm/i915/intel_dpio_phy.c

646

u32 val;

sys/dev/drm/i915/intel_dpio_phy.c

652

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch));

sys/dev/drm/i915/intel_dpio_phy.c

653

val &= ~(DPIO_PCS_SWING_CALC_TX0_TX2 | DPIO_PCS_SWING_CALC_TX1_TX3);

sys/dev/drm/i915/intel_dpio_phy.c

654

val &= ~(DPIO_PCS_TX1DEEMP_MASK | DPIO_PCS_TX2DEEMP_MASK);

sys/dev/drm/i915/intel_dpio_phy.c

655

val |= DPIO_PCS_TX1DEEMP_9P5 | DPIO_PCS_TX2DEEMP_9P5;

sys/dev/drm/i915/intel_dpio_phy.c

656

vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW10(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

659

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch));

sys/dev/drm/i915/intel_dpio_phy.c

660

val &= ~(DPIO_PCS_SWING_CALC_TX0_TX2 | DPIO_PCS_SWING_CALC_TX1_TX3);

sys/dev/drm/i915/intel_dpio_phy.c

661

val &= ~(DPIO_PCS_TX1DEEMP_MASK | DPIO_PCS_TX2DEEMP_MASK);

sys/dev/drm/i915/intel_dpio_phy.c

662

val |= DPIO_PCS_TX1DEEMP_9P5 | DPIO_PCS_TX2DEEMP_9P5;

sys/dev/drm/i915/intel_dpio_phy.c

663

vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

666

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW9(ch));

sys/dev/drm/i915/intel_dpio_phy.c

667

val &= ~(DPIO_PCS_TX1MARGIN_MASK | DPIO_PCS_TX2MARGIN_MASK);

sys/dev/drm/i915/intel_dpio_phy.c

668

val |= DPIO_PCS_TX1MARGIN_000 | DPIO_PCS_TX2MARGIN_000;

sys/dev/drm/i915/intel_dpio_phy.c

669

vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW9(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

672

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW9(ch));

sys/dev/drm/i915/intel_dpio_phy.c

673

val &= ~(DPIO_PCS_TX1MARGIN_MASK | DPIO_PCS_TX2MARGIN_MASK);

sys/dev/drm/i915/intel_dpio_phy.c

674

val |= DPIO_PCS_TX1MARGIN_000 | DPIO_PCS_TX2MARGIN_000;

sys/dev/drm/i915/intel_dpio_phy.c

675

vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW9(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

680

val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW4(ch, i));

sys/dev/drm/i915/intel_dpio_phy.c

681

val &= ~DPIO_SWING_DEEMPH9P5_MASK;

sys/dev/drm/i915/intel_dpio_phy.c

682

val |= deemph_reg_value << DPIO_SWING_DEEMPH9P5_SHIFT;

sys/dev/drm/i915/intel_dpio_phy.c

683

vlv_dpio_write(dev_priv, pipe, CHV_TX_DW4(ch, i), val);

sys/dev/drm/i915/intel_dpio_phy.c

688

val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW2(ch, i));

sys/dev/drm/i915/intel_dpio_phy.c

690

val &= ~DPIO_SWING_MARGIN000_MASK;

sys/dev/drm/i915/intel_dpio_phy.c

691

val |= margin_reg_value << DPIO_SWING_MARGIN000_SHIFT;

sys/dev/drm/i915/intel_dpio_phy.c

698

val &= ~(0xff << DPIO_UNIQ_TRANS_SCALE_SHIFT);

sys/dev/drm/i915/intel_dpio_phy.c

699

val |= 0x9a << DPIO_UNIQ_TRANS_SCALE_SHIFT;

sys/dev/drm/i915/intel_dpio_phy.c

701

vlv_dpio_write(dev_priv, pipe, CHV_TX_DW2(ch, i), val);

sys/dev/drm/i915/intel_dpio_phy.c

711

val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW3(ch, i));

sys/dev/drm/i915/intel_dpio_phy.c

713

val |= DPIO_TX_UNIQ_TRANS_SCALE_EN;

sys/dev/drm/i915/intel_dpio_phy.c

715

val &= ~DPIO_TX_UNIQ_TRANS_SCALE_EN;

sys/dev/drm/i915/intel_dpio_phy.c

716

vlv_dpio_write(dev_priv, pipe, CHV_TX_DW3(ch, i), val);

sys/dev/drm/i915/intel_dpio_phy.c

720

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch));

sys/dev/drm/i915/intel_dpio_phy.c

721

val |= DPIO_PCS_SWING_CALC_TX0_TX2 | DPIO_PCS_SWING_CALC_TX1_TX3;

sys/dev/drm/i915/intel_dpio_phy.c

722

vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW10(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

725

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch));

sys/dev/drm/i915/intel_dpio_phy.c

726

val |= DPIO_PCS_SWING_CALC_TX0_TX2 | DPIO_PCS_SWING_CALC_TX1_TX3;

sys/dev/drm/i915/intel_dpio_phy.c

727

vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

742

uint32_t val;

sys/dev/drm/i915/intel_dpio_phy.c

744

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW0(ch));

sys/dev/drm/i915/intel_dpio_phy.c

746

val &= ~(DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET);

sys/dev/drm/i915/intel_dpio_phy.c

748

val |= DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET;

sys/dev/drm/i915/intel_dpio_phy.c

749

vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

752

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW0(ch));

sys/dev/drm/i915/intel_dpio_phy.c

754

val &= ~(DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET);

sys/dev/drm/i915/intel_dpio_phy.c

756

val |= DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET;

sys/dev/drm/i915/intel_dpio_phy.c

757

vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW0(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

760

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW1(ch));

sys/dev/drm/i915/intel_dpio_phy.c

761

val |= CHV_PCS_REQ_SOFTRESET_EN;

sys/dev/drm/i915/intel_dpio_phy.c

763

val &= ~DPIO_PCS_CLK_SOFT_RESET;

sys/dev/drm/i915/intel_dpio_phy.c

765

val |= DPIO_PCS_CLK_SOFT_RESET;

sys/dev/drm/i915/intel_dpio_phy.c

766

vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW1(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

769

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW1(ch));

sys/dev/drm/i915/intel_dpio_phy.c

770

val |= CHV_PCS_REQ_SOFTRESET_EN;

sys/dev/drm/i915/intel_dpio_phy.c

772

val &= ~DPIO_PCS_CLK_SOFT_RESET;

sys/dev/drm/i915/intel_dpio_phy.c

774

val |= DPIO_PCS_CLK_SOFT_RESET;

sys/dev/drm/i915/intel_dpio_phy.c

775

vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW1(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

789

u32 val;

sys/dev/drm/i915/intel_dpio_phy.c

808

val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0);

sys/dev/drm/i915/intel_dpio_phy.c

809

val &= ~(CHV_BUFLEFTENA1_MASK | CHV_BUFRIGHTENA1_MASK);

sys/dev/drm/i915/intel_dpio_phy.c

811

val |= CHV_BUFLEFTENA1_FORCE;

sys/dev/drm/i915/intel_dpio_phy.c

813

val |= CHV_BUFRIGHTENA1_FORCE;

sys/dev/drm/i915/intel_dpio_phy.c

814

vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val);

sys/dev/drm/i915/intel_dpio_phy.c

816

val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW1_CH1);

sys/dev/drm/i915/intel_dpio_phy.c

817

val &= ~(CHV_BUFLEFTENA2_MASK | CHV_BUFRIGHTENA2_MASK);

sys/dev/drm/i915/intel_dpio_phy.c

819

val |= CHV_BUFLEFTENA2_FORCE;

sys/dev/drm/i915/intel_dpio_phy.c

821

val |= CHV_BUFRIGHTENA2_FORCE;

sys/dev/drm/i915/intel_dpio_phy.c

822

vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW1_CH1, val);

sys/dev/drm/i915/intel_dpio_phy.c

826

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW8(ch));

sys/dev/drm/i915/intel_dpio_phy.c

827

val |= CHV_PCS_USEDCLKCHANNEL_OVRRIDE;

sys/dev/drm/i915/intel_dpio_phy.c

829

val &= ~CHV_PCS_USEDCLKCHANNEL;

sys/dev/drm/i915/intel_dpio_phy.c

831

val |= CHV_PCS_USEDCLKCHANNEL;

sys/dev/drm/i915/intel_dpio_phy.c

832

vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW8(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

835

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW8(ch));

sys/dev/drm/i915/intel_dpio_phy.c

836

val |= CHV_PCS_USEDCLKCHANNEL_OVRRIDE;

sys/dev/drm/i915/intel_dpio_phy.c

838

val &= ~CHV_PCS_USEDCLKCHANNEL;

sys/dev/drm/i915/intel_dpio_phy.c

840

val |= CHV_PCS_USEDCLKCHANNEL;

sys/dev/drm/i915/intel_dpio_phy.c

841

vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW8(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

849

val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW19(ch));

sys/dev/drm/i915/intel_dpio_phy.c

851

val &= ~CHV_CMN_USEDCLKCHANNEL;

sys/dev/drm/i915/intel_dpio_phy.c

853

val |= CHV_CMN_USEDCLKCHANNEL;

sys/dev/drm/i915/intel_dpio_phy.c

854

vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW19(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

869

u32 val;

sys/dev/drm/i915/intel_dpio_phy.c

874

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW11(ch));

sys/dev/drm/i915/intel_dpio_phy.c

875

val &= ~DPIO_LANEDESKEW_STRAP_OVRD;

sys/dev/drm/i915/intel_dpio_phy.c

876

vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW11(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

879

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW11(ch));

sys/dev/drm/i915/intel_dpio_phy.c

880

val &= ~DPIO_LANEDESKEW_STRAP_OVRD;

sys/dev/drm/i915/intel_dpio_phy.c

881

vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW11(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

907

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW11(ch));

sys/dev/drm/i915/intel_dpio_phy.c

908

val |= DPIO_TX2_STAGGER_MASK(0x1f);

sys/dev/drm/i915/intel_dpio_phy.c

909

vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW11(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

912

val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW11(ch));

sys/dev/drm/i915/intel_dpio_phy.c

913

val |= DPIO_TX2_STAGGER_MASK(0x1f);

sys/dev/drm/i915/intel_dpio_phy.c

914

vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW11(ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

955

u32 val;

sys/dev/drm/i915/intel_dpio_phy.c

961

val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0);

sys/dev/drm/i915/intel_dpio_phy.c

962

val &= ~(CHV_BUFLEFTENA1_MASK | CHV_BUFRIGHTENA1_MASK);

sys/dev/drm/i915/intel_dpio_phy.c

963

vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val);

sys/dev/drm/i915/intel_dpio_phy.c

965

val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW1_CH1);

sys/dev/drm/i915/intel_dpio_phy.c

966

val &= ~(CHV_BUFLEFTENA2_MASK | CHV_BUFRIGHTENA2_MASK);

sys/dev/drm/i915/intel_dpio_phy.c

967

vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW1_CH1, val);

sys/dev/drm/i915/intel_dpll_mgr.c

1006

val = I915_READ(regs[id].ctl);

sys/dev/drm/i915/intel_dpll_mgr.c

1007

if (!(val & LCPLL_PLL_ENABLE))

sys/dev/drm/i915/intel_dpll_mgr.c

1010

val = I915_READ(DPLL_CTRL1);

sys/dev/drm/i915/intel_dpll_mgr.c

1011

hw_state->ctrl1 = (val >> (id * 6)) & 0x3f;

sys/dev/drm/i915/intel_dpll_mgr.c

1014

if (val & DPLL_CTRL1_HDMI_MODE(id)) {

sys/dev/drm/i915/intel_dpll_mgr.c

1030

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

1041

val = I915_READ(regs[id].ctl);

sys/dev/drm/i915/intel_dpll_mgr.c

1042

if (WARN_ON(!(val & LCPLL_PLL_ENABLE)))

sys/dev/drm/i915/intel_dpll_mgr.c

1045

val = I915_READ(DPLL_CTRL1);

sys/dev/drm/i915/intel_dpll_mgr.c

1046

hw_state->ctrl1 = (val >> (id * 6)) & 0x3f;

sys/dev/drm/i915/intel_dpll_mgr.c

1589

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

1601

val = I915_READ(BXT_PORT_PLL_ENABLE(port));

sys/dev/drm/i915/intel_dpll_mgr.c

1602

if (!(val & PORT_PLL_ENABLE))

sys/dev/drm/i915/intel_dpll_mgr.c

1883

uint32_t val = I915_READ(LCPLL_CTL);

sys/dev/drm/i915/intel_dpll_mgr.c

1891

if (val & LCPLL_CD_SOURCE_FCLK)

sys/dev/drm/i915/intel_dpll_mgr.c

1894

if (val & LCPLL_PLL_DISABLE)

sys/dev/drm/i915/intel_dpll_mgr.c

1969

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

1972

val = I915_READ(CNL_DPLL_ENABLE(id));

sys/dev/drm/i915/intel_dpll_mgr.c

1973

val |= PLL_POWER_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

1974

I915_WRITE(CNL_DPLL_ENABLE(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

1988

val = pll->state.hw_state.cfgcr0;

sys/dev/drm/i915/intel_dpll_mgr.c

1989

I915_WRITE(CNL_DPLL_CFGCR0(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

1997

val = pll->state.hw_state.cfgcr1;

sys/dev/drm/i915/intel_dpll_mgr.c

1998

I915_WRITE(CNL_DPLL_CFGCR1(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

2013

val = I915_READ(CNL_DPLL_ENABLE(id));

sys/dev/drm/i915/intel_dpll_mgr.c

2014

val |= PLL_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

2015

I915_WRITE(CNL_DPLL_ENABLE(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

2044

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

2061

val = I915_READ(CNL_DPLL_ENABLE(id));

sys/dev/drm/i915/intel_dpll_mgr.c

2062

val &= ~PLL_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

2063

I915_WRITE(CNL_DPLL_ENABLE(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

2083

val = I915_READ(CNL_DPLL_ENABLE(id));

sys/dev/drm/i915/intel_dpll_mgr.c

2084

val &= ~PLL_POWER_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

2085

I915_WRITE(CNL_DPLL_ENABLE(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

2101

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

2109

val = I915_READ(CNL_DPLL_ENABLE(id));

sys/dev/drm/i915/intel_dpll_mgr.c

2110

if (!(val & PLL_ENABLE))

sys/dev/drm/i915/intel_dpll_mgr.c

2113

val = I915_READ(CNL_DPLL_CFGCR0(id));

sys/dev/drm/i915/intel_dpll_mgr.c

2114

hw_state->cfgcr0 = val;

sys/dev/drm/i915/intel_dpll_mgr.c

2117

if (val & DPLL_CFGCR0_HDMI_MODE) {

sys/dev/drm/i915/intel_dpll_mgr.c

2957

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

2964

val = I915_READ(icl_pll_id_to_enable_reg(id));

sys/dev/drm/i915/intel_dpll_mgr.c

2965

if (!(val & PLL_ENABLE))

sys/dev/drm/i915/intel_dpll_mgr.c

3043

u32 val;

sys/dev/drm/i915/intel_dpll_mgr.c

3051

val = I915_READ(MG_REFCLKIN_CTL(port));

sys/dev/drm/i915/intel_dpll_mgr.c

3052

val &= ~MG_REFCLKIN_CTL_OD_2_MUX_MASK;

sys/dev/drm/i915/intel_dpll_mgr.c

3053

val |= hw_state->mg_refclkin_ctl;

sys/dev/drm/i915/intel_dpll_mgr.c

3054

I915_WRITE(MG_REFCLKIN_CTL(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3056

val = I915_READ(MG_CLKTOP2_CORECLKCTL1(port));

sys/dev/drm/i915/intel_dpll_mgr.c

3057

val &= ~MG_CLKTOP2_CORECLKCTL1_A_DIVRATIO_MASK;

sys/dev/drm/i915/intel_dpll_mgr.c

3058

val |= hw_state->mg_clktop2_coreclkctl1;

sys/dev/drm/i915/intel_dpll_mgr.c

3059

I915_WRITE(MG_CLKTOP2_CORECLKCTL1(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3061

val = I915_READ(MG_CLKTOP2_HSCLKCTL(port));

sys/dev/drm/i915/intel_dpll_mgr.c

3062

val &= ~(MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK |

sys/dev/drm/i915/intel_dpll_mgr.c

3066

val |= hw_state->mg_clktop2_hsclkctl;

sys/dev/drm/i915/intel_dpll_mgr.c

3067

I915_WRITE(MG_CLKTOP2_HSCLKCTL(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3075

val = I915_READ(MG_PLL_BIAS(port));

sys/dev/drm/i915/intel_dpll_mgr.c

3076

val &= ~hw_state->mg_pll_bias_mask;

sys/dev/drm/i915/intel_dpll_mgr.c

3077

val |= hw_state->mg_pll_bias;

sys/dev/drm/i915/intel_dpll_mgr.c

3078

I915_WRITE(MG_PLL_BIAS(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3080

val = I915_READ(MG_PLL_TDC_COLDST_BIAS(port));

sys/dev/drm/i915/intel_dpll_mgr.c

3081

val &= ~hw_state->mg_pll_tdc_coldst_bias_mask;

sys/dev/drm/i915/intel_dpll_mgr.c

3082

val |= hw_state->mg_pll_tdc_coldst_bias;

sys/dev/drm/i915/intel_dpll_mgr.c

3083

I915_WRITE(MG_PLL_TDC_COLDST_BIAS(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3093

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

3095

val = I915_READ(enable_reg);

sys/dev/drm/i915/intel_dpll_mgr.c

3096

val |= PLL_POWER_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

3097

I915_WRITE(enable_reg, val);

sys/dev/drm/i915/intel_dpll_mgr.c

3129

val = I915_READ(enable_reg);

sys/dev/drm/i915/intel_dpll_mgr.c

3130

val |= PLL_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

3131

I915_WRITE(enable_reg, val);

sys/dev/drm/i915/intel_dpll_mgr.c

3145

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

3155

val = I915_READ(enable_reg);

sys/dev/drm/i915/intel_dpll_mgr.c

3156

val &= ~PLL_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

3157

I915_WRITE(enable_reg, val);

sys/dev/drm/i915/intel_dpll_mgr.c

3165

val = I915_READ(enable_reg);

sys/dev/drm/i915/intel_dpll_mgr.c

3166

val &= ~PLL_POWER_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

3167

I915_WRITE(enable_reg, val);

sys/dev/drm/i915/intel_dpll_mgr.c

347

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

352

val = I915_READ(PCH_DPLL(id));

sys/dev/drm/i915/intel_dpll_mgr.c

353

hw_state->dpll = val;

sys/dev/drm/i915/intel_dpll_mgr.c

359

return val & DPLL_VCO_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

373

u32 val;

sys/dev/drm/i915/intel_dpll_mgr.c

378

val = I915_READ(PCH_DREF_CONTROL);

sys/dev/drm/i915/intel_dpll_mgr.c

379

enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK |

sys/dev/drm/i915/intel_dpll_mgr.c

497

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

499

val = I915_READ(WRPLL_CTL(id));

sys/dev/drm/i915/intel_dpll_mgr.c

500

I915_WRITE(WRPLL_CTL(id), val & ~WRPLL_PLL_ENABLE);

sys/dev/drm/i915/intel_dpll_mgr.c

507

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

509

val = I915_READ(SPLL_CTL);

sys/dev/drm/i915/intel_dpll_mgr.c

510

I915_WRITE(SPLL_CTL, val & ~SPLL_PLL_ENABLE);

sys/dev/drm/i915/intel_dpll_mgr.c

519

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

524

val = I915_READ(WRPLL_CTL(id));

sys/dev/drm/i915/intel_dpll_mgr.c

525

hw_state->wrpll = val;

sys/dev/drm/i915/intel_dpll_mgr.c

529

return val & WRPLL_PLL_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

536

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

541

val = I915_READ(SPLL_CTL);

sys/dev/drm/i915/intel_dpll_mgr.c

542

hw_state->spll = val;

sys/dev/drm/i915/intel_dpll_mgr.c

546

return val & SPLL_PLL_ENABLE;

sys/dev/drm/i915/intel_dpll_mgr.c

769

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

774

val = WRPLL_PLL_ENABLE | WRPLL_PLL_LCPLL |

sys/dev/drm/i915/intel_dpll_mgr.c

778

crtc_state->dpll_hw_state.wrpll = val;

sys/dev/drm/i915/intel_dpll_mgr.c

931

uint32_t val;

sys/dev/drm/i915/intel_dpll_mgr.c

933

val = I915_READ(DPLL_CTRL1);

sys/dev/drm/i915/intel_dpll_mgr.c

935

val &= ~(DPLL_CTRL1_HDMI_MODE(id) |

sys/dev/drm/i915/intel_dpll_mgr.c

938

val |= pll->state.hw_state.ctrl1 << (id * 6);

sys/dev/drm/i915/intel_dpll_mgr.c

940

I915_WRITE(DPLL_CTRL1, val);

sys/dev/drm/i915/intel_dpll_mgr.c

996

uint32_t val;

sys/dev/drm/i915/intel_drv.h

1602

uint64_t *val);

sys/dev/drm/i915/intel_drv.h

1606

uint64_t val);

sys/dev/drm/i915/intel_drv.h

2170

uint64_t *val);

sys/dev/drm/i915/intel_drv.h

2174

uint64_t val);

sys/dev/drm/i915/intel_fbc.c

286

u32 val = I915_READ(CHICKEN_MISC_4);

sys/dev/drm/i915/intel_fbc.c

288

val &= ~(FBC_STRIDE_OVERRIDE | FBC_STRIDE_MASK);

sys/dev/drm/i915/intel_fbc.c

292

val |= FBC_STRIDE_OVERRIDE | params->gen9_wa_cfb_stride;

sys/dev/drm/i915/intel_fbc.c

294

I915_WRITE(CHICKEN_MISC_4, val);

sys/dev/drm/i915/intel_guc.c

465

u32 msg, val;

sys/dev/drm/i915/intel_guc.c

480

val = I915_READ(SOFT_SCRATCH(15));

sys/dev/drm/i915/intel_guc.c

481

msg = val & guc->msg_enabled_mask;

sys/dev/drm/i915/intel_guc.c

482

I915_WRITE(SOFT_SCRATCH(15), val & ~msg);

sys/dev/drm/i915/intel_guc_fw.c

202

u32 val = I915_READ(GUC_STATUS);

sys/dev/drm/i915/intel_guc_fw.c

203

u32 uk_val = val & GS_UKERNEL_MASK;

sys/dev/drm/i915/intel_guc_fw.c

205

*status = val;

sys/dev/drm/i915/intel_guc_fw.c

207

((val & GS_MIA_CORE_STATE) && (uk_val == GS_UKERNEL_LAPIC_DONE));

sys/dev/drm/i915/intel_hdcp.c

124

10, 1, &val);

sys/dev/drm/i915/intel_hdcp.c

127

else if (!(val & HDCP_KEY_LOAD_STATUS))

sys/dev/drm/i915/intel_hdcp.c

87

u32 val;

sys/dev/drm/i915/intel_hdcp.c

89

val = I915_READ(HDCP_KEY_STATUS);

sys/dev/drm/i915/intel_hdcp.c

90

if ((val & HDCP_KEY_LOAD_DONE) && (val & HDCP_KEY_LOAD_STATUS))

sys/dev/drm/i915/intel_hdmi.c

1008

u8 val;

sys/dev/drm/i915/intel_hdmi.c

1010

ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_BCAPS, &val, 1);

sys/dev/drm/i915/intel_hdmi.c

1015

*repeater_present = val & DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT;

sys/dev/drm/i915/intel_hdmi.c

1036

u8 val;

sys/dev/drm/i915/intel_hdmi.c

1038

ret = intel_hdmi_hdcp_read(intel_dig_port, DRM_HDCP_DDC_BCAPS, &val, 1);

sys/dev/drm/i915/intel_hdmi.c

1043

*ksv_ready = val & DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY;

sys/dev/drm/i915/intel_hdmi.c

159

u32 val = I915_READ(VIDEO_DIP_CTL);

sys/dev/drm/i915/intel_hdmi.c

162

WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n");

sys/dev/drm/i915/intel_hdmi.c

164

val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */

sys/dev/drm/i915/intel_hdmi.c

165

val |= g4x_infoframe_index(type);

sys/dev/drm/i915/intel_hdmi.c

167

val &= ~g4x_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

169

I915_WRITE(VIDEO_DIP_CTL, val);

sys/dev/drm/i915/intel_hdmi.c

181

val |= g4x_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

182

val &= ~VIDEO_DIP_FREQ_MASK;

sys/dev/drm/i915/intel_hdmi.c

183

val |= VIDEO_DIP_FREQ_VSYNC;

sys/dev/drm/i915/intel_hdmi.c

185

I915_WRITE(VIDEO_DIP_CTL, val);

sys/dev/drm/i915/intel_hdmi.c

194

u32 val = I915_READ(VIDEO_DIP_CTL);

sys/dev/drm/i915/intel_hdmi.c

196

if ((val & VIDEO_DIP_ENABLE) == 0)

sys/dev/drm/i915/intel_hdmi.c

199

if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(intel_dig_port->base.port))

sys/dev/drm/i915/intel_hdmi.c

202

return val & (VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

216

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

219

WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n");

sys/dev/drm/i915/intel_hdmi.c

221

val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */

sys/dev/drm/i915/intel_hdmi.c

222

val |= g4x_infoframe_index(type);

sys/dev/drm/i915/intel_hdmi.c

224

val &= ~g4x_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

226

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

238

val |= g4x_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

239

val &= ~VIDEO_DIP_FREQ_MASK;

sys/dev/drm/i915/intel_hdmi.c

240

val |= VIDEO_DIP_FREQ_VSYNC;

sys/dev/drm/i915/intel_hdmi.c

242

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

253

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

255

if ((val & VIDEO_DIP_ENABLE) == 0)

sys/dev/drm/i915/intel_hdmi.c

258

if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(intel_dig_port->base.port))

sys/dev/drm/i915/intel_hdmi.c

261

return val & (VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

276

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

279

WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n");

sys/dev/drm/i915/intel_hdmi.c

281

val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */

sys/dev/drm/i915/intel_hdmi.c

282

val |= g4x_infoframe_index(type);

sys/dev/drm/i915/intel_hdmi.c

287

val &= ~g4x_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

289

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

301

val |= g4x_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

302

val &= ~VIDEO_DIP_FREQ_MASK;

sys/dev/drm/i915/intel_hdmi.c

303

val |= VIDEO_DIP_FREQ_VSYNC;

sys/dev/drm/i915/intel_hdmi.c

305

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

314

u32 val = I915_READ(TVIDEO_DIP_CTL(pipe));

sys/dev/drm/i915/intel_hdmi.c

316

if ((val & VIDEO_DIP_ENABLE) == 0)

sys/dev/drm/i915/intel_hdmi.c

319

return val & (VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

334

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

337

WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n");

sys/dev/drm/i915/intel_hdmi.c

339

val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */

sys/dev/drm/i915/intel_hdmi.c

340

val |= g4x_infoframe_index(type);

sys/dev/drm/i915/intel_hdmi.c

342

val &= ~g4x_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

344

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

356

val |= g4x_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

357

val &= ~VIDEO_DIP_FREQ_MASK;

sys/dev/drm/i915/intel_hdmi.c

358

val |= VIDEO_DIP_FREQ_VSYNC;

sys/dev/drm/i915/intel_hdmi.c

360

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

370

u32 val = I915_READ(VLV_TVIDEO_DIP_CTL(pipe));

sys/dev/drm/i915/intel_hdmi.c

372

if ((val & VIDEO_DIP_ENABLE) == 0)

sys/dev/drm/i915/intel_hdmi.c

375

if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(intel_dig_port->base.port))

sys/dev/drm/i915/intel_hdmi.c

378

return val & (VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

396

u32 val = I915_READ(ctl_reg);

sys/dev/drm/i915/intel_hdmi.c

398

val &= ~hsw_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

399

I915_WRITE(ctl_reg, val);

sys/dev/drm/i915/intel_hdmi.c

413

val |= hsw_infoframe_enable(type);

sys/dev/drm/i915/intel_hdmi.c

414

I915_WRITE(ctl_reg, val);

sys/dev/drm/i915/intel_hdmi.c

422

u32 val = I915_READ(HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));

sys/dev/drm/i915/intel_hdmi.c

424

return val & (VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW |

sys/dev/drm/i915/intel_hdmi.c

551

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

565

val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC;

sys/dev/drm/i915/intel_hdmi.c

568

if (!(val & VIDEO_DIP_ENABLE))

sys/dev/drm/i915/intel_hdmi.c

570

if (port != (val & VIDEO_DIP_PORT_MASK)) {

sys/dev/drm/i915/intel_hdmi.c

572

(val & VIDEO_DIP_PORT_MASK) >> 29);

sys/dev/drm/i915/intel_hdmi.c

575

val &= ~(VIDEO_DIP_ENABLE | VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

577

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

582

if (port != (val & VIDEO_DIP_PORT_MASK)) {

sys/dev/drm/i915/intel_hdmi.c

583

if (val & VIDEO_DIP_ENABLE) {

sys/dev/drm/i915/intel_hdmi.c

585

(val & VIDEO_DIP_PORT_MASK) >> 29);

sys/dev/drm/i915/intel_hdmi.c

588

val &= ~VIDEO_DIP_PORT_MASK;

sys/dev/drm/i915/intel_hdmi.c

589

val |= port;

sys/dev/drm/i915/intel_hdmi.c

592

val |= VIDEO_DIP_ENABLE;

sys/dev/drm/i915/intel_hdmi.c

593

val &= ~(VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

596

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

667

u32 val = 0;

sys/dev/drm/i915/intel_hdmi.c

680

val |= GCP_COLOR_INDICATION;

sys/dev/drm/i915/intel_hdmi.c

685

val |= GCP_DEFAULT_PHASE_ENABLE;

sys/dev/drm/i915/intel_hdmi.c

687

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

689

return val != 0;

sys/dev/drm/i915/intel_hdmi.c

702

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

708

val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC;

sys/dev/drm/i915/intel_hdmi.c

711

if (!(val & VIDEO_DIP_ENABLE))

sys/dev/drm/i915/intel_hdmi.c

713

val &= ~(VIDEO_DIP_ENABLE | VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

716

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

721

if (port != (val & VIDEO_DIP_PORT_MASK)) {

sys/dev/drm/i915/intel_hdmi.c

722

WARN(val & VIDEO_DIP_ENABLE,

sys/dev/drm/i915/intel_hdmi.c

724

(val & VIDEO_DIP_PORT_MASK) >> 29);

sys/dev/drm/i915/intel_hdmi.c

725

val &= ~VIDEO_DIP_PORT_MASK;

sys/dev/drm/i915/intel_hdmi.c

726

val |= port;

sys/dev/drm/i915/intel_hdmi.c

729

val |= VIDEO_DIP_ENABLE;

sys/dev/drm/i915/intel_hdmi.c

730

val &= ~(VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

735

val |= VIDEO_DIP_ENABLE_GCP;

sys/dev/drm/i915/intel_hdmi.c

737

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

754

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

759

val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC;

sys/dev/drm/i915/intel_hdmi.c

762

if (!(val & VIDEO_DIP_ENABLE))

sys/dev/drm/i915/intel_hdmi.c

764

val &= ~(VIDEO_DIP_ENABLE | VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

767

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

773

val |= VIDEO_DIP_ENABLE | VIDEO_DIP_ENABLE_AVI;

sys/dev/drm/i915/intel_hdmi.c

774

val &= ~(VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT |

sys/dev/drm/i915/intel_hdmi.c

778

val |= VIDEO_DIP_ENABLE_GCP;

sys/dev/drm/i915/intel_hdmi.c

780

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

798

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

804

val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC;

sys/dev/drm/i915/intel_hdmi.c

807

if (!(val & VIDEO_DIP_ENABLE))

sys/dev/drm/i915/intel_hdmi.c

809

val &= ~(VIDEO_DIP_ENABLE | VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

812

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

817

if (port != (val & VIDEO_DIP_PORT_MASK)) {

sys/dev/drm/i915/intel_hdmi.c

818

WARN(val & VIDEO_DIP_ENABLE,

sys/dev/drm/i915/intel_hdmi.c

820

(val & VIDEO_DIP_PORT_MASK) >> 29);

sys/dev/drm/i915/intel_hdmi.c

821

val &= ~VIDEO_DIP_PORT_MASK;

sys/dev/drm/i915/intel_hdmi.c

822

val |= port;

sys/dev/drm/i915/intel_hdmi.c

825

val |= VIDEO_DIP_ENABLE;

sys/dev/drm/i915/intel_hdmi.c

826

val &= ~(VIDEO_DIP_ENABLE_AVI |

sys/dev/drm/i915/intel_hdmi.c

831

val |= VIDEO_DIP_ENABLE_GCP;

sys/dev/drm/i915/intel_hdmi.c

833

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

848

u32 val = I915_READ(reg);

sys/dev/drm/i915/intel_hdmi.c

853

val &= ~(VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW |

sys/dev/drm/i915/intel_hdmi.c

858

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_hdmi.c

864

val |= VIDEO_DIP_ENABLE_GCP_HSW;

sys/dev/drm/i915/intel_hdmi.c

866

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_i2c.c

147

u32 val;

sys/dev/drm/i915/intel_i2c.c

150

val = I915_READ(DSPCLK_GATE_D);

sys/dev/drm/i915/intel_i2c.c

152

val |= PNV_GMBUSUNIT_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/intel_i2c.c

154

val &= ~PNV_GMBUSUNIT_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/intel_i2c.c

155

I915_WRITE(DSPCLK_GATE_D, val);

sys/dev/drm/i915/intel_i2c.c

161

u32 val;

sys/dev/drm/i915/intel_i2c.c

163

val = I915_READ(SOUTH_DSPCLK_GATE_D);

sys/dev/drm/i915/intel_i2c.c

165

val |= PCH_GMBUSUNIT_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/intel_i2c.c

167

val &= ~PCH_GMBUSUNIT_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/intel_i2c.c

168

I915_WRITE(SOUTH_DSPCLK_GATE_D, val);

sys/dev/drm/i915/intel_i2c.c

174

u32 val;

sys/dev/drm/i915/intel_i2c.c

176

val = I915_READ(GEN9_CLKGATE_DIS_4);

sys/dev/drm/i915/intel_i2c.c

178

val |= BXT_GMBUS_GATING_DIS;

sys/dev/drm/i915/intel_i2c.c

180

val &= ~BXT_GMBUS_GATING_DIS;

sys/dev/drm/i915/intel_i2c.c

181

I915_WRITE(GEN9_CLKGATE_DIS_4, val);

sys/dev/drm/i915/intel_i2c.c

399

u32 val, loop = 0;

sys/dev/drm/i915/intel_i2c.c

405

val = I915_READ_FW(GMBUS3);

sys/dev/drm/i915/intel_i2c.c

410

*buf++ = val & 0xff;

sys/dev/drm/i915/intel_i2c.c

411

val >>= 8;

sys/dev/drm/i915/intel_i2c.c

465

u32 val, loop;

sys/dev/drm/i915/intel_i2c.c

467

val = loop = 0;

sys/dev/drm/i915/intel_i2c.c

469

val |= *buf++ << (8 * loop++);

sys/dev/drm/i915/intel_i2c.c

473

I915_WRITE_FW(GMBUS3, val);

sys/dev/drm/i915/intel_i2c.c

482

val = loop = 0;

sys/dev/drm/i915/intel_i2c.c

484

val |= *buf++ << (8 * loop);

sys/dev/drm/i915/intel_i2c.c

487

I915_WRITE_FW(GMBUS3, val);

sys/dev/drm/i915/intel_lrc.c

2577

u32 mask, val = slices;

sys/dev/drm/i915/intel_lrc.c

2581

val <<= GEN11_RPCS_S_CNT_SHIFT;

sys/dev/drm/i915/intel_lrc.c

2584

val <<= GEN8_RPCS_S_CNT_SHIFT;

sys/dev/drm/i915/intel_lrc.c

2587

GEM_BUG_ON(val & ~mask);

sys/dev/drm/i915/intel_lrc.c

2588

val &= mask;

sys/dev/drm/i915/intel_lrc.c

2590

rpcs |= GEN8_RPCS_ENABLE | GEN8_RPCS_S_CNT_ENABLE | val;

sys/dev/drm/i915/intel_lrc.c

2594

u32 val = subslices;

sys/dev/drm/i915/intel_lrc.c

2596

val <<= GEN8_RPCS_SS_CNT_SHIFT;

sys/dev/drm/i915/intel_lrc.c

2598

GEM_BUG_ON(val & ~GEN8_RPCS_SS_CNT_MASK);

sys/dev/drm/i915/intel_lrc.c

2599

val &= GEN8_RPCS_SS_CNT_MASK;

sys/dev/drm/i915/intel_lrc.c

2601

rpcs |= GEN8_RPCS_ENABLE | GEN8_RPCS_SS_CNT_ENABLE | val;

sys/dev/drm/i915/intel_lrc.c

2605

u32 val;

sys/dev/drm/i915/intel_lrc.c

2607

val = INTEL_INFO(dev_priv)->sseu.eu_per_subslice <<

sys/dev/drm/i915/intel_lrc.c

2609

GEM_BUG_ON(val & ~GEN8_RPCS_EU_MIN_MASK);

sys/dev/drm/i915/intel_lrc.c

2610

val &= GEN8_RPCS_EU_MIN_MASK;

sys/dev/drm/i915/intel_lrc.c

2612

rpcs |= val;

sys/dev/drm/i915/intel_lrc.c

2614

val = INTEL_INFO(dev_priv)->sseu.eu_per_subslice <<

sys/dev/drm/i915/intel_lrc.c

2616

GEM_BUG_ON(val & ~GEN8_RPCS_EU_MAX_MASK);

sys/dev/drm/i915/intel_lrc.c

2617

val &= GEN8_RPCS_EU_MAX_MASK;

sys/dev/drm/i915/intel_lrc.c

2619

rpcs |= val;

sys/dev/drm/i915/intel_lrc_reg.h

42

#define CTX_REG(reg_state, pos, reg, val) do { \

sys/dev/drm/i915/intel_lrc_reg.h

46

(reg_state__)[(pos__) + 1] = (val); \

sys/dev/drm/i915/intel_lvds.c

100

return val & LVDS_PORT_EN;

sys/dev/drm/i915/intel_lvds.c

159

u32 val;

sys/dev/drm/i915/intel_lvds.c

163

val = I915_READ(PP_ON_DELAYS(0));

sys/dev/drm/i915/intel_lvds.c

164

pps->port = (val & PANEL_PORT_SELECT_MASK) >>

sys/dev/drm/i915/intel_lvds.c

166

pps->t1_t2 = (val & PANEL_POWER_UP_DELAY_MASK) >>

sys/dev/drm/i915/intel_lvds.c

168

pps->t5 = (val & PANEL_LIGHT_ON_DELAY_MASK) >>

sys/dev/drm/i915/intel_lvds.c

171

val = I915_READ(PP_OFF_DELAYS(0));

sys/dev/drm/i915/intel_lvds.c

172

pps->t3 = (val & PANEL_POWER_DOWN_DELAY_MASK) >>

sys/dev/drm/i915/intel_lvds.c

174

pps->tx = (val & PANEL_LIGHT_OFF_DELAY_MASK) >>

sys/dev/drm/i915/intel_lvds.c

177

val = I915_READ(PP_DIVISOR(0));

sys/dev/drm/i915/intel_lvds.c

178

pps->divider = (val & PP_REFERENCE_DIVIDER_MASK) >>

sys/dev/drm/i915/intel_lvds.c

180

val = (val & PANEL_POWER_CYCLE_DELAY_MASK) >>

sys/dev/drm/i915/intel_lvds.c

187

if (val)

sys/dev/drm/i915/intel_lvds.c

188

val--;

sys/dev/drm/i915/intel_lvds.c

190

pps->t4 = val * 1000;

sys/dev/drm/i915/intel_lvds.c

213

u32 val;

sys/dev/drm/i915/intel_lvds.c

215

val = I915_READ(PP_CONTROL(0));

sys/dev/drm/i915/intel_lvds.c

216

WARN_ON((val & PANEL_UNLOCK_MASK) != PANEL_UNLOCK_REGS);

sys/dev/drm/i915/intel_lvds.c

218

val |= PANEL_POWER_RESET;

sys/dev/drm/i915/intel_lvds.c

219

I915_WRITE(PP_CONTROL(0), val);

sys/dev/drm/i915/intel_lvds.c

227

val = pps->divider << PP_REFERENCE_DIVIDER_SHIFT;

sys/dev/drm/i915/intel_lvds.c

228

val |= (DIV_ROUND_UP(pps->t4, 1000) + 1) <<

sys/dev/drm/i915/intel_lvds.c

230

I915_WRITE(PP_DIVISOR(0), val);

sys/dev/drm/i915/intel_lvds.c

798

unsigned int val;

sys/dev/drm/i915/intel_lvds.c

819

val = I915_READ(lvds_encoder->reg);

sys/dev/drm/i915/intel_lvds.c

821

val &= ~(LVDS_DETECTED | LVDS_PIPE_SEL_MASK_CPT);

sys/dev/drm/i915/intel_lvds.c

823

val &= ~(LVDS_DETECTED | LVDS_PIPE_SEL_MASK);

sys/dev/drm/i915/intel_lvds.c

824

if (val == 0)

sys/dev/drm/i915/intel_lvds.c

825

val = dev_priv->vbt.bios_lvds_val;

sys/dev/drm/i915/intel_lvds.c

827

return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;

sys/dev/drm/i915/intel_lvds.c

90

u32 val;

sys/dev/drm/i915/intel_lvds.c

92

val = I915_READ(lvds_reg);

sys/dev/drm/i915/intel_lvds.c

96

*pipe = (val & LVDS_PIPE_SEL_MASK_CPT) >> LVDS_PIPE_SEL_SHIFT_CPT;

sys/dev/drm/i915/intel_lvds.c

98

*pipe = (val & LVDS_PIPE_SEL_MASK) >> LVDS_PIPE_SEL_SHIFT;

sys/dev/drm/i915/intel_opregion.c

624

unsigned long val, void *data)

sys/dev/drm/i915/intel_opregion.c

652

static void set_did(struct intel_opregion *opregion, int i, u32 val)

sys/dev/drm/i915/intel_opregion.c

655

opregion->acpi->didl[i] = val;

sys/dev/drm/i915/intel_opregion.c

662

opregion->acpi->did2[i] = val;

sys/dev/drm/i915/intel_overlay.c

195

u8 val;

sys/dev/drm/i915/intel_overlay.c

205

PCI_DEVFN(0, 0), I830_CLOCK_GATE, &val);

sys/dev/drm/i915/intel_overlay.c

207

val &= ~I830_L2_CACHE_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/intel_overlay.c

209

val |= I830_L2_CACHE_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/intel_overlay.c

212

PCI_DEVFN(0, 0), I830_CLOCK_GATE, val);

sys/dev/drm/i915/intel_panel.c

1008

u32 pwm_ctl, val;

sys/dev/drm/i915/intel_panel.c

1012

val = I915_READ(UTIL_PIN_CTL);

sys/dev/drm/i915/intel_panel.c

1013

if (val & UTIL_PIN_ENABLE) {

sys/dev/drm/i915/intel_panel.c

1015

val &= ~UTIL_PIN_ENABLE;

sys/dev/drm/i915/intel_panel.c

1016

I915_WRITE(UTIL_PIN_CTL, val);

sys/dev/drm/i915/intel_panel.c

1019

val = 0;

sys/dev/drm/i915/intel_panel.c

1021

val |= UTIL_PIN_POLARITY;

sys/dev/drm/i915/intel_panel.c

1022

I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |

sys/dev/drm/i915/intel_panel.c

1131

u32 val = 0;

sys/dev/drm/i915/intel_panel.c

1136

val = panel->backlight.get(connector);

sys/dev/drm/i915/intel_panel.c

1137

val = intel_panel_compute_brightness(connector, val);

sys/dev/drm/i915/intel_panel.c

1142

DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);

sys/dev/drm/i915/intel_panel.c

1143

return val;

sys/dev/drm/i915/intel_panel.c

1496

u32 pch_ctl1, pch_ctl2, val;

sys/dev/drm/i915/intel_panel.c

1519

val = lpt_get_backlight(connector);

sys/dev/drm/i915/intel_panel.c

1520

val = intel_panel_compute_brightness(connector, val);

sys/dev/drm/i915/intel_panel.c

1521

panel->backlight.level = clamp(val, panel->backlight.min,

sys/dev/drm/i915/intel_panel.c

1533

u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;

sys/dev/drm/i915/intel_panel.c

1549

val = pch_get_backlight(connector);

sys/dev/drm/i915/intel_panel.c

1550

val = intel_panel_compute_brightness(connector, val);

sys/dev/drm/i915/intel_panel.c

1551

panel->backlight.level = clamp(val, panel->backlight.min,

sys/dev/drm/i915/intel_panel.c

1565

u32 ctl, val;

sys/dev/drm/i915/intel_panel.c

1590

val = i9xx_get_backlight(connector);

sys/dev/drm/i915/intel_panel.c

1591

val = intel_panel_compute_brightness(connector, val);

sys/dev/drm/i915/intel_panel.c

1592

panel->backlight.level = clamp(val, panel->backlight.min,

sys/dev/drm/i915/intel_panel.c

1595

panel->backlight.enabled = val != 0;

sys/dev/drm/i915/intel_panel.c

1604

u32 ctl, ctl2, val;

sys/dev/drm/i915/intel_panel.c

1624

val = i9xx_get_backlight(connector);

sys/dev/drm/i915/intel_panel.c

1625

val = intel_panel_compute_brightness(connector, val);

sys/dev/drm/i915/intel_panel.c

1626

panel->backlight.level = clamp(val, panel->backlight.min,

sys/dev/drm/i915/intel_panel.c

1638

u32 ctl, ctl2, val;

sys/dev/drm/i915/intel_panel.c

1657

val = _vlv_get_backlight(dev_priv, pipe);

sys/dev/drm/i915/intel_panel.c

1658

val = intel_panel_compute_brightness(connector, val);

sys/dev/drm/i915/intel_panel.c

1659

panel->backlight.level = clamp(val, panel->backlight.min,

sys/dev/drm/i915/intel_panel.c

1672

u32 pwm_ctl, val;

sys/dev/drm/i915/intel_panel.c

1680

val = I915_READ(UTIL_PIN_CTL);

sys/dev/drm/i915/intel_panel.c

1682

val & UTIL_PIN_POLARITY;

sys/dev/drm/i915/intel_panel.c

1697

val = bxt_get_backlight(connector);

sys/dev/drm/i915/intel_panel.c

1698

val = intel_panel_compute_brightness(connector, val);

sys/dev/drm/i915/intel_panel.c

1699

panel->backlight.level = clamp(val, panel->backlight.min,

sys/dev/drm/i915/intel_panel.c

1712

u32 pwm_ctl, val;

sys/dev/drm/i915/intel_panel.c

1735

val = bxt_get_backlight(connector);

sys/dev/drm/i915/intel_panel.c

1736

val = intel_panel_compute_brightness(connector, val);

sys/dev/drm/i915/intel_panel.c

1737

panel->backlight.level = clamp(val, panel->backlight.min,

sys/dev/drm/i915/intel_panel.c

1794

int err, val;

sys/dev/drm/i915/intel_panel.c

1801

val = panel->backlight.max;

sys/dev/drm/i915/intel_panel.c

1804

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/drm/i915/intel_panel.c

1819

int err, val;

sys/dev/drm/i915/intel_panel.c

1828

val = user_level;

sys/dev/drm/i915/intel_panel.c

1829

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/drm/i915/intel_panel.c

1834

if (val != user_level && val >= 0 && val <= max_brightness) {

sys/dev/drm/i915/intel_panel.c

1836

intel_panel_set_backlight(conn_state, val, max_brightness);

sys/dev/drm/i915/intel_panel.c

445

u32 val)

sys/dev/drm/i915/intel_panel.c

453

return val;

sys/dev/drm/i915/intel_panel.c

457

return panel->backlight.max - val + panel->backlight.min;

sys/dev/drm/i915/intel_panel.c

460

return val;

sys/dev/drm/i915/intel_panel.c

481

u32 val;

sys/dev/drm/i915/intel_panel.c

483

val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;

sys/dev/drm/i915/intel_panel.c

485

val >>= 1;

sys/dev/drm/i915/intel_panel.c

491

val *= lbpc;

sys/dev/drm/i915/intel_panel.c

494

return val;

sys/dev/drm/i915/intel_panel.c

535

u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;

sys/dev/drm/i915/intel_panel.c

536

I915_WRITE(BLC_PWM_PCH_CTL2, val | level);

sys/dev/drm/i915/intel_panel.c

731

u32 tmp, val;

sys/dev/drm/i915/intel_panel.c

740

val = I915_READ(UTIL_PIN_CTL);

sys/dev/drm/i915/intel_panel.c

741

val &= ~UTIL_PIN_ENABLE;

sys/dev/drm/i915/intel_panel.c

742

I915_WRITE(UTIL_PIN_CTL, val);

sys/dev/drm/i915/intel_pm.c

132

u32 val = I915_READ(CHICKEN_MISC_2);

sys/dev/drm/i915/intel_pm.c

133

val &= ~(GLK_CL0_PWR_DOWN |

sys/dev/drm/i915/intel_pm.c

136

I915_WRITE(CHICKEN_MISC_2, val);

sys/dev/drm/i915/intel_pm.c

2811

uint32_t val;

sys/dev/drm/i915/intel_pm.c

2816

val = 0; /* data0 to be programmed to 0 for first set */

sys/dev/drm/i915/intel_pm.c

2820

&val);

sys/dev/drm/i915/intel_pm.c

2828

wm[0] = val & GEN9_MEM_LATENCY_LEVEL_MASK;

sys/dev/drm/i915/intel_pm.c

2829

wm[1] = (val >> GEN9_MEM_LATENCY_LEVEL_1_5_SHIFT) &

sys/dev/drm/i915/intel_pm.c

2831

wm[2] = (val >> GEN9_MEM_LATENCY_LEVEL_2_6_SHIFT) &

sys/dev/drm/i915/intel_pm.c

2833

wm[3] = (val >> GEN9_MEM_LATENCY_LEVEL_3_7_SHIFT) &

sys/dev/drm/i915/intel_pm.c

2837

val = 1; /* data0 to be programmed to 1 for second set */

sys/dev/drm/i915/intel_pm.c

2841

&val);

sys/dev/drm/i915/intel_pm.c

2848

wm[4] = val & GEN9_MEM_LATENCY_LEVEL_MASK;

sys/dev/drm/i915/intel_pm.c

2849

wm[5] = (val >> GEN9_MEM_LATENCY_LEVEL_1_5_SHIFT) &

sys/dev/drm/i915/intel_pm.c

2851

wm[6] = (val >> GEN9_MEM_LATENCY_LEVEL_2_6_SHIFT) &

sys/dev/drm/i915/intel_pm.c

2853

wm[7] = (val >> GEN9_MEM_LATENCY_LEVEL_3_7_SHIFT) &

sys/dev/drm/i915/intel_pm.c

310

u32 val;

sys/dev/drm/i915/intel_pm.c

314

val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);

sys/dev/drm/i915/intel_pm.c

316

val &= ~FORCE_DDR_HIGH_FREQ;

sys/dev/drm/i915/intel_pm.c

318

val |= FORCE_DDR_HIGH_FREQ;

sys/dev/drm/i915/intel_pm.c

319

val &= ~FORCE_DDR_LOW_FREQ;

sys/dev/drm/i915/intel_pm.c

320

val |= FORCE_DDR_FREQ_REQ_ACK;

sys/dev/drm/i915/intel_pm.c

321

vlv_punit_write(dev_priv, PUNIT_REG_DDR_SETUP2, val);

sys/dev/drm/i915/intel_pm.c

332

u32 val;

sys/dev/drm/i915/intel_pm.c

336

val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);

sys/dev/drm/i915/intel_pm.c

338

val |= DSP_MAXFIFO_PM5_ENABLE;

sys/dev/drm/i915/intel_pm.c

340

val &= ~DSP_MAXFIFO_PM5_ENABLE;

sys/dev/drm/i915/intel_pm.c

341

vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val);

sys/dev/drm/i915/intel_pm.c

352

u32 val;

sys/dev/drm/i915/intel_pm.c

3540

uint32_t val;

sys/dev/drm/i915/intel_pm.c

3564

val = I915_READ(WM_MISC);

sys/dev/drm/i915/intel_pm.c

3566

val &= ~WM_MISC_DATA_PARTITION_5_6;

sys/dev/drm/i915/intel_pm.c

3568

val |= WM_MISC_DATA_PARTITION_5_6;

sys/dev/drm/i915/intel_pm.c

3569

I915_WRITE(WM_MISC, val);

sys/dev/drm/i915/intel_pm.c

3571

val = I915_READ(DISP_ARB_CTL2);

sys/dev/drm/i915/intel_pm.c

3573

val &= ~DISP_DATA_PARTITION_5_6;

sys/dev/drm/i915/intel_pm.c

3575

val |= DISP_DATA_PARTITION_5_6;

sys/dev/drm/i915/intel_pm.c

3576

I915_WRITE(DISP_ARB_CTL2, val);

sys/dev/drm/i915/intel_pm.c

3581

val = I915_READ(DISP_ARB_CTL);

sys/dev/drm/i915/intel_pm.c

3583

val &= ~DISP_FBC_WM_DIS;

sys/dev/drm/i915/intel_pm.c

3585

val |= DISP_FBC_WM_DIS;

sys/dev/drm/i915/intel_pm.c

3586

I915_WRITE(DISP_ARB_CTL, val);

sys/dev/drm/i915/intel_pm.c

363

val = I915_READ(DSPFW3);

sys/dev/drm/i915/intel_pm.c

364

was_enabled = val & PINEVIEW_SELF_REFRESH_EN;

sys/dev/drm/i915/intel_pm.c

366

val |= PINEVIEW_SELF_REFRESH_EN;

sys/dev/drm/i915/intel_pm.c

368

val &= ~PINEVIEW_SELF_REFRESH_EN;

sys/dev/drm/i915/intel_pm.c

369

I915_WRITE(DSPFW3, val);

sys/dev/drm/i915/intel_pm.c

373

val = enable ? _MASKED_BIT_ENABLE(FW_BLC_SELF_EN) :

sys/dev/drm/i915/intel_pm.c

375

I915_WRITE(FW_BLC_SELF, val);

sys/dev/drm/i915/intel_pm.c

384

val = enable ? _MASKED_BIT_ENABLE(INSTPM_SELF_EN) :

sys/dev/drm/i915/intel_pm.c

386

I915_WRITE(INSTPM, val);

sys/dev/drm/i915/intel_pm.c

3961

u32 val, val2 = 0;

sys/dev/drm/i915/intel_pm.c

3966

val = I915_READ(CUR_BUF_CFG(pipe));

sys/dev/drm/i915/intel_pm.c

3968

&ddb->plane[pipe][plane_id], val);

sys/dev/drm/i915/intel_pm.c

3972

val = I915_READ(PLANE_CTL(pipe, plane_id));

sys/dev/drm/i915/intel_pm.c

3975

if (!(val & PLANE_CTL_ENABLE))

sys/dev/drm/i915/intel_pm.c

3978

pixel_format = val & PLANE_CTL_FORMAT_MASK;

sys/dev/drm/i915/intel_pm.c

3980

val & PLANE_CTL_ORDER_RGBX,

sys/dev/drm/i915/intel_pm.c

3981

val & PLANE_CTL_ALPHA_MASK);

sys/dev/drm/i915/intel_pm.c

3983

val = I915_READ(PLANE_BUF_CFG(pipe, plane_id));

sys/dev/drm/i915/intel_pm.c

3995

&ddb->uv_plane[pipe][plane_id], val);

sys/dev/drm/i915/intel_pm.c

3998

&ddb->plane[pipe][plane_id], val);

sys/dev/drm/i915/intel_pm.c

5026

uint32_t val = 0;

sys/dev/drm/i915/intel_pm.c

5029

val |= PLANE_WM_EN;

sys/dev/drm/i915/intel_pm.c

5030

val |= level->plane_res_b;

sys/dev/drm/i915/intel_pm.c

5031

val |= level->plane_res_l << PLANE_WM_LINES_SHIFT;

sys/dev/drm/i915/intel_pm.c

5034

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_pm.c

5536

static inline void skl_wm_level_from_reg_val(uint32_t val,

sys/dev/drm/i915/intel_pm.c

5539

level->plane_en = val & PLANE_WM_EN;

sys/dev/drm/i915/intel_pm.c

5540

level->plane_res_b = val & PLANE_WM_BLOCKS_MASK;

sys/dev/drm/i915/intel_pm.c

5541

level->plane_res_l = (val >> PLANE_WM_LINES_SHIFT) &

sys/dev/drm/i915/intel_pm.c

5553

uint32_t val;

sys/dev/drm/i915/intel_pm.c

5562

val = I915_READ(PLANE_WM(pipe, plane_id, level));

sys/dev/drm/i915/intel_pm.c

5564

val = I915_READ(CUR_WM(pipe, level));

sys/dev/drm/i915/intel_pm.c

5566

skl_wm_level_from_reg_val(val, &wm->wm[level]);

sys/dev/drm/i915/intel_pm.c

5570

val = I915_READ(PLANE_WM_TRANS(pipe, plane_id));

sys/dev/drm/i915/intel_pm.c

5572

val = I915_READ(CUR_WM_TRANS(pipe));

sys/dev/drm/i915/intel_pm.c

5574

skl_wm_level_from_reg_val(val, &wm->trans_wm);

sys/dev/drm/i915/intel_pm.c

5921

u32 val;

sys/dev/drm/i915/intel_pm.c

5931

val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);

sys/dev/drm/i915/intel_pm.c

5932

if (val & DSP_MAXFIFO_PM5_ENABLE)

sys/dev/drm/i915/intel_pm.c

5944

val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);

sys/dev/drm/i915/intel_pm.c

5945

val |= FORCE_DDR_FREQ_REQ_ACK;

sys/dev/drm/i915/intel_pm.c

5946

vlv_punit_write(dev_priv, PUNIT_REG_DDR_SETUP2, val);

sys/dev/drm/i915/intel_pm.c

5954

val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2);

sys/dev/drm/i915/intel_pm.c

5955

if ((val & FORCE_DDR_HIGH_FREQ) == 0)

sys/dev/drm/i915/intel_pm.c

6154

u32 val;

sys/dev/drm/i915/intel_pm.c

6165

val = I915_READ(DISP_ARB_CTL2);

sys/dev/drm/i915/intel_pm.c

6168

val |= DISP_IPC_ENABLE;

sys/dev/drm/i915/intel_pm.c

6170

val &= ~DISP_IPC_ENABLE;

sys/dev/drm/i915/intel_pm.c

6172

I915_WRITE(DISP_ARB_CTL2, val);

sys/dev/drm/i915/intel_pm.c

6194

bool ironlake_set_drps(struct drm_i915_private *dev_priv, u8 val)

sys/dev/drm/i915/intel_pm.c

6207

(val << MEMCTL_FREQ_SHIFT) | MEMCTL_SFCAVM;

sys/dev/drm/i915/intel_pm.c

6316

static u32 intel_rps_limits(struct drm_i915_private *dev_priv, u8 val)

sys/dev/drm/i915/intel_pm.c

6329

if (val <= rps->min_freq_softlimit)

sys/dev/drm/i915/intel_pm.c

6333

if (val <= rps->min_freq_softlimit)

sys/dev/drm/i915/intel_pm.c

6416

static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val)

sys/dev/drm/i915/intel_pm.c

6424

if (val > rps->efficient_freq + 1 &&

sys/dev/drm/i915/intel_pm.c

6425

val > rps->cur_freq)

sys/dev/drm/i915/intel_pm.c

6430

if (val <= rps->efficient_freq &&

sys/dev/drm/i915/intel_pm.c

6431

val < rps->cur_freq)

sys/dev/drm/i915/intel_pm.c

6433

else if (val >= rps->rp0_freq &&

sys/dev/drm/i915/intel_pm.c

6434

val > rps->cur_freq)

sys/dev/drm/i915/intel_pm.c

6439

if (val < (rps->rp1_freq + rps->rp0_freq) >> 1 &&

sys/dev/drm/i915/intel_pm.c

6440

val < rps->cur_freq)

sys/dev/drm/i915/intel_pm.c

6445

if (val <= rps->min_freq_softlimit)

sys/dev/drm/i915/intel_pm.c

6447

if (val >= rps->max_freq_softlimit)

sys/dev/drm/i915/intel_pm.c

6475

static u32 gen6_rps_pm_mask(struct drm_i915_private *dev_priv, u8 val)

sys/dev/drm/i915/intel_pm.c

6481

if (val > rps->min_freq_softlimit)

sys/dev/drm/i915/intel_pm.c

6483

if (val < rps->max_freq_softlimit)

sys/dev/drm/i915/intel_pm.c

6494

static int gen6_set_rps(struct drm_i915_private *dev_priv, u8 val)

sys/dev/drm/i915/intel_pm.c

6501

if (val != rps->cur_freq) {

sys/dev/drm/i915/intel_pm.c

6502

gen6_set_rps_thresholds(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

6506

GEN9_FREQUENCY(val));

sys/dev/drm/i915/intel_pm.c

6509

HSW_FREQUENCY(val));

sys/dev/drm/i915/intel_pm.c

6512

GEN6_FREQUENCY(val) |

sys/dev/drm/i915/intel_pm.c

6520

I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, intel_rps_limits(dev_priv, val));

sys/dev/drm/i915/intel_pm.c

6521

I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, val));

sys/dev/drm/i915/intel_pm.c

6523

rps->cur_freq = val;

sys/dev/drm/i915/intel_pm.c

6524

trace_intel_gpu_freq_change(intel_gpu_freq(dev_priv, val));

sys/dev/drm/i915/intel_pm.c

6529

static int valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val)

sys/dev/drm/i915/intel_pm.c

6533

if (WARN_ONCE(IS_CHERRYVIEW(dev_priv) && (val & 1),

sys/dev/drm/i915/intel_pm.c

6535

val &= ~1;

sys/dev/drm/i915/intel_pm.c

6537

I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, val));

sys/dev/drm/i915/intel_pm.c

6539

if (val != dev_priv->gt_pm.rps.cur_freq) {

sys/dev/drm/i915/intel_pm.c

6540

err = vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);

sys/dev/drm/i915/intel_pm.c

6544

gen6_set_rps_thresholds(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

6547

dev_priv->gt_pm.rps.cur_freq = val;

sys/dev/drm/i915/intel_pm.c

6548

trace_intel_gpu_freq_change(intel_gpu_freq(dev_priv, val));

sys/dev/drm/i915/intel_pm.c

6563

u32 val = rps->idle_freq;

sys/dev/drm/i915/intel_pm.c

6566

if (rps->cur_freq <= val)

sys/dev/drm/i915/intel_pm.c

6582

err = valleyview_set_rps(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

6676

int intel_set_rps(struct drm_i915_private *dev_priv, u8 val)

sys/dev/drm/i915/intel_pm.c

6682

GEM_BUG_ON(val > rps->max_freq);

sys/dev/drm/i915/intel_pm.c

6683

GEM_BUG_ON(val < rps->min_freq);

sys/dev/drm/i915/intel_pm.c

6686

rps->cur_freq = val;

sys/dev/drm/i915/intel_pm.c

6691

err = valleyview_set_rps(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

6693

err = gen6_set_rps(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

7265

u32 val, rp0;

sys/dev/drm/i915/intel_pm.c

7267

val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE);

sys/dev/drm/i915/intel_pm.c

7272

rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS4EU_FUSE_SHIFT);

sys/dev/drm/i915/intel_pm.c

7276

rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS6EU_FUSE_SHIFT);

sys/dev/drm/i915/intel_pm.c

7282

rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS8EU_FUSE_SHIFT);

sys/dev/drm/i915/intel_pm.c

7293

u32 val, rpe;

sys/dev/drm/i915/intel_pm.c

7295

val = vlv_punit_read(dev_priv, PUNIT_GPU_DUTYCYCLE_REG);

sys/dev/drm/i915/intel_pm.c

7296

rpe = (val >> PUNIT_GPU_DUTYCYCLE_RPE_FREQ_SHIFT) & PUNIT_GPU_DUTYCYCLE_RPE_FREQ_MASK;

sys/dev/drm/i915/intel_pm.c

7303

u32 val, rp1;

sys/dev/drm/i915/intel_pm.c

7305

val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE);

sys/dev/drm/i915/intel_pm.c

7306

rp1 = (val & FB_GFX_FREQ_FUSE_MASK);

sys/dev/drm/i915/intel_pm.c

7313

u32 val, rpn;

sys/dev/drm/i915/intel_pm.c

7315

val = vlv_punit_read(dev_priv, FB_GFX_FMIN_AT_VMIN_FUSE);

sys/dev/drm/i915/intel_pm.c

7316

rpn = ((val >> FB_GFX_FMIN_AT_VMIN_FUSE_SHIFT) &

sys/dev/drm/i915/intel_pm.c

7324

u32 val, rp1;

sys/dev/drm/i915/intel_pm.c

7326

val = vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FREQ_FUSE);

sys/dev/drm/i915/intel_pm.c

7328

rp1 = (val & FB_GFX_FGUARANTEED_FREQ_FUSE_MASK) >> FB_GFX_FGUARANTEED_FREQ_FUSE_SHIFT;

sys/dev/drm/i915/intel_pm.c

7335

u32 val, rp0;

sys/dev/drm/i915/intel_pm.c

7337

val = vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FREQ_FUSE);

sys/dev/drm/i915/intel_pm.c

7339

rp0 = (val & FB_GFX_MAX_FREQ_FUSE_MASK) >> FB_GFX_MAX_FREQ_FUSE_SHIFT;

sys/dev/drm/i915/intel_pm.c

7348

u32 val, rpe;

sys/dev/drm/i915/intel_pm.c

7350

val = vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_LO);

sys/dev/drm/i915/intel_pm.c

7351

rpe = (val & FB_FMAX_VMIN_FREQ_LO_MASK) >> FB_FMAX_VMIN_FREQ_LO_SHIFT;

sys/dev/drm/i915/intel_pm.c

7352

val = vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_HI);

sys/dev/drm/i915/intel_pm.c

7353

rpe |= (val & FB_FMAX_VMIN_FREQ_HI_MASK) << 5;

sys/dev/drm/i915/intel_pm.c

7360

u32 val;

sys/dev/drm/i915/intel_pm.c

7362

val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM) & 0xff;

sys/dev/drm/i915/intel_pm.c

7370

return max_t(u32, val, 0xc0);

sys/dev/drm/i915/intel_pm.c

7481

u32 val;

sys/dev/drm/i915/intel_pm.c

7487

val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);

sys/dev/drm/i915/intel_pm.c

7488

switch ((val >> 6) & 3) {

sys/dev/drm/i915/intel_pm.c

7527

u32 val;

sys/dev/drm/i915/intel_pm.c

7534

val = vlv_cck_read(dev_priv, CCK_FUSE_REG);

sys/dev/drm/i915/intel_pm.c

7537

switch ((val >> 2) & 0x7) {

sys/dev/drm/i915/intel_pm.c

7633

u32 val;

sys/dev/drm/i915/intel_pm.c

7655

val = VLV_OVERRIDE_EN |

sys/dev/drm/i915/intel_pm.c

7658

vlv_punit_write(dev_priv, VLV_TURBO_SOC_OVERRIDE, val);

sys/dev/drm/i915/intel_pm.c

7660

val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);

sys/dev/drm/i915/intel_pm.c

7663

WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n");

sys/dev/drm/i915/intel_pm.c

7665

DRM_DEBUG_DRIVER("GPLL enabled? %s\n", yesno(val & GPLLENABLE));

sys/dev/drm/i915/intel_pm.c

7666

DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);

sys/dev/drm/i915/intel_pm.c

7718

u32 val;

sys/dev/drm/i915/intel_pm.c

7739

val = VLV_OVERRIDE_EN |

sys/dev/drm/i915/intel_pm.c

7742

vlv_punit_write(dev_priv, VLV_TURBO_SOC_OVERRIDE, val);

sys/dev/drm/i915/intel_pm.c

7744

val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);

sys/dev/drm/i915/intel_pm.c

7747

WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n");

sys/dev/drm/i915/intel_pm.c

7749

DRM_DEBUG_DRIVER("GPLL enabled? %s\n", yesno(val & GPLLENABLE));

sys/dev/drm/i915/intel_pm.c

7750

DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);

sys/dev/drm/i915/intel_pm.c

7842

unsigned long val;

sys/dev/drm/i915/intel_pm.c

7849

val = __i915_chipset_val(dev_priv);

sys/dev/drm/i915/intel_pm.c

7853

return val;

sys/dev/drm/i915/intel_pm.c

7977

unsigned long val;

sys/dev/drm/i915/intel_pm.c

7984

val = __i915_gfx_val(dev_priv);

sys/dev/drm/i915/intel_pm.c

7988

return val;

sys/dev/drm/i915/intel_pm.c

8189

unsigned long val;

sys/dev/drm/i915/intel_pm.c

8191

val = vid * vid;

sys/dev/drm/i915/intel_pm.c

8192

val *= (freq / 1000);

sys/dev/drm/i915/intel_pm.c

8193

val *= 255;

sys/dev/drm/i915/intel_pm.c

8194

val /= (127*127*900);

sys/dev/drm/i915/intel_pm.c

8195

if (val > 0xff)

sys/dev/drm/i915/intel_pm.c

8196

DRM_ERROR("bad pxval: %ld\n", val);

sys/dev/drm/i915/intel_pm.c

8197

pxw[i] = val;

sys/dev/drm/i915/intel_pm.c

8204

u32 val = (pxw[i*4] << 24) | (pxw[(i*4)+1] << 16) |

sys/dev/drm/i915/intel_pm.c

8206

I915_WRITE(PXW(i), val);

sys/dev/drm/i915/intel_pm.c

8574

uint32_t val;

sys/dev/drm/i915/intel_pm.c

8590

val = I915_READ(TRANS_CHICKEN2(pipe));

sys/dev/drm/i915/intel_pm.c

8591

val |= TRANS_CHICKEN2_TIMING_OVERRIDE;

sys/dev/drm/i915/intel_pm.c

8592

val &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED;

sys/dev/drm/i915/intel_pm.c

8594

val |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED;

sys/dev/drm/i915/intel_pm.c

8595

val &= ~TRANS_CHICKEN2_FRAME_START_DELAY_MASK;

sys/dev/drm/i915/intel_pm.c

8596

val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER;

sys/dev/drm/i915/intel_pm.c

8597

val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_MODESWITCH;

sys/dev/drm/i915/intel_pm.c

8598

I915_WRITE(TRANS_CHICKEN2(pipe), val);

sys/dev/drm/i915/intel_pm.c

8749

uint32_t val = I915_READ(SOUTH_DSPCLK_GATE_D);

sys/dev/drm/i915/intel_pm.c

8751

val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;

sys/dev/drm/i915/intel_pm.c

8752

I915_WRITE(SOUTH_DSPCLK_GATE_D, val);

sys/dev/drm/i915/intel_pm.c

8761

u32 val;

sys/dev/drm/i915/intel_pm.c

8767

val = I915_READ(GEN8_L3SQCREG1);

sys/dev/drm/i915/intel_pm.c

8768

val &= ~L3_PRIO_CREDITS_MASK;

sys/dev/drm/i915/intel_pm.c

8769

val |= L3_GENERAL_PRIO_CREDITS(general_prio_credits);

sys/dev/drm/i915/intel_pm.c

8770

val |= L3_HIGH_PRIO_CREDITS(high_prio_credits);

sys/dev/drm/i915/intel_pm.c

8771

I915_WRITE(GEN8_L3SQCREG1, val);

sys/dev/drm/i915/intel_pm.c

8801

u32 val;

sys/dev/drm/i915/intel_pm.c

8816

val = I915_READ(SLICE_UNIT_LEVEL_CLKGATE);

sys/dev/drm/i915/intel_pm.c

8818

val |= RCCUNIT_CLKGATE_DIS;

sys/dev/drm/i915/intel_pm.c

8821

val |= SARBUNIT_CLKGATE_DIS;

sys/dev/drm/i915/intel_pm.c

8822

I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val);

sys/dev/drm/i915/intel_pm.c

8825

val = I915_READ(SUBSLICE_UNIT_LEVEL_CLKGATE);

sys/dev/drm/i915/intel_pm.c

8826

val |= GWUNIT_CLKGATE_DIS;

sys/dev/drm/i915/intel_pm.c

8827

I915_WRITE(SUBSLICE_UNIT_LEVEL_CLKGATE, val);

sys/dev/drm/i915/intel_pm.c

8831

val = I915_READ(UNSLICE_UNIT_LEVEL_CLKGATE);

sys/dev/drm/i915/intel_pm.c

8832

val |= VFUNIT_CLKGATE_DIS;

sys/dev/drm/i915/intel_pm.c

8833

I915_WRITE(UNSLICE_UNIT_LEVEL_CLKGATE, val);

sys/dev/drm/i915/intel_pm.c

9487

int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val)

sys/dev/drm/i915/intel_pm.c

9504

I915_WRITE_FW(GEN6_PCODE_DATA, *val);

sys/dev/drm/i915/intel_pm.c

9516

*val = I915_READ_FW(GEN6_PCODE_DATA);

sys/dev/drm/i915/intel_pm.c

9534

u32 mbox, u32 val,

sys/dev/drm/i915/intel_pm.c

9548

val, mbox, __builtin_return_address(0));

sys/dev/drm/i915/intel_pm.c

9552

I915_WRITE_FW(GEN6_PCODE_DATA, val);

sys/dev/drm/i915/intel_pm.c

9561

val, mbox, __builtin_return_address(0));

sys/dev/drm/i915/intel_pm.c

9574

val, mbox, __builtin_return_address(0), status);

sys/dev/drm/i915/intel_pm.c

9585

u32 val = request;

sys/dev/drm/i915/intel_pm.c

9587

*status = sandybridge_pcode_read(dev_priv, mbox, &val);

sys/dev/drm/i915/intel_pm.c

9589

return *status || ((val & reply_mask) == reply);

sys/dev/drm/i915/intel_pm.c

9657

static int byt_gpu_freq(struct drm_i915_private *dev_priv, int val)

sys/dev/drm/i915/intel_pm.c

9665

return DIV_ROUND_CLOSEST(rps->gpll_ref_freq * (val - 0xb7), 1000);

sys/dev/drm/i915/intel_pm.c

9668

static int byt_freq_opcode(struct drm_i915_private *dev_priv, int val)

sys/dev/drm/i915/intel_pm.c

9672

return DIV_ROUND_CLOSEST(1000 * val, rps->gpll_ref_freq) + 0xb7;

sys/dev/drm/i915/intel_pm.c

9675

static int chv_gpu_freq(struct drm_i915_private *dev_priv, int val)

sys/dev/drm/i915/intel_pm.c

9683

return DIV_ROUND_CLOSEST(rps->gpll_ref_freq * val, 2 * 2 * 1000);

sys/dev/drm/i915/intel_pm.c

9686

static int chv_freq_opcode(struct drm_i915_private *dev_priv, int val)

sys/dev/drm/i915/intel_pm.c

9691

return DIV_ROUND_CLOSEST(2 * 1000 * val, rps->gpll_ref_freq) * 2;

sys/dev/drm/i915/intel_pm.c

9694

int intel_gpu_freq(struct drm_i915_private *dev_priv, int val)

sys/dev/drm/i915/intel_pm.c

9697

return DIV_ROUND_CLOSEST(val * GT_FREQUENCY_MULTIPLIER,

sys/dev/drm/i915/intel_pm.c

9700

return chv_gpu_freq(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

9702

return byt_gpu_freq(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

9704

return val * GT_FREQUENCY_MULTIPLIER;

sys/dev/drm/i915/intel_pm.c

9707

int intel_freq_opcode(struct drm_i915_private *dev_priv, int val)

sys/dev/drm/i915/intel_pm.c

9710

return DIV_ROUND_CLOSEST(val * GEN9_FREQ_SCALER,

sys/dev/drm/i915/intel_pm.c

9713

return chv_freq_opcode(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

9715

return byt_freq_opcode(dev_priv, val);

sys/dev/drm/i915/intel_pm.c

9717

return DIV_ROUND_CLOSEST(val, GT_FREQUENCY_MULTIPLIER);

sys/dev/drm/i915/intel_psr.c

109

static void psr_event_print(u32 val, bool psr2_enabled)

sys/dev/drm/i915/intel_psr.c

1091

u8 val;

sys/dev/drm/i915/intel_psr.c

1104

if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_STATUS, &val) != 1) {

sys/dev/drm/i915/intel_psr.c

1109

if ((val & DP_PSR_SINK_STATE_MASK) == DP_PSR_SINK_INTERNAL_ERROR) {

sys/dev/drm/i915/intel_psr.c

111

DRM_DEBUG_KMS("PSR exit events: 0x%x\n", val);

sys/dev/drm/i915/intel_psr.c

1114

if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_ERROR_STATUS, &val) != 1) {

sys/dev/drm/i915/intel_psr.c

1119

if (val & DP_PSR_RFB_STORAGE_ERROR)

sys/dev/drm/i915/intel_psr.c

112

if (val & PSR_EVENT_PSR2_WD_TIMER_EXPIRE)

sys/dev/drm/i915/intel_psr.c

1121

if (val & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)

sys/dev/drm/i915/intel_psr.c

1123

if (val & DP_PSR_LINK_CRC_ERROR)

sys/dev/drm/i915/intel_psr.c

1126

if (val & ~errors)

sys/dev/drm/i915/intel_psr.c

1128

val & ~errors);

sys/dev/drm/i915/intel_psr.c

1129

if (val & errors)

sys/dev/drm/i915/intel_psr.c

1132

drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, val);

sys/dev/drm/i915/intel_psr.c

114

if ((val & PSR_EVENT_PSR2_DISABLED) && psr2_enabled)

sys/dev/drm/i915/intel_psr.c

116

if (val & PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN)

sys/dev/drm/i915/intel_psr.c

118

if (val & PSR_EVENT_SU_CRC_FIFO_UNDERRUN)

sys/dev/drm/i915/intel_psr.c

120

if (val & PSR_EVENT_GRAPHICS_RESET)

sys/dev/drm/i915/intel_psr.c

122

if (val & PSR_EVENT_PCH_INTERRUPT)

sys/dev/drm/i915/intel_psr.c

124

if (val & PSR_EVENT_MEMORY_UP)

sys/dev/drm/i915/intel_psr.c

126

if (val & PSR_EVENT_FRONT_BUFFER_MODIFY)

sys/dev/drm/i915/intel_psr.c

128

if (val & PSR_EVENT_WD_TIMER_EXPIRE)

sys/dev/drm/i915/intel_psr.c

130

if (val & PSR_EVENT_PIPE_REGISTERS_UPDATE)

sys/dev/drm/i915/intel_psr.c

132

if (val & PSR_EVENT_REGISTER_UPDATE)

sys/dev/drm/i915/intel_psr.c

134

if (val & PSR_EVENT_HDCP_ENABLE)

sys/dev/drm/i915/intel_psr.c

136

if (val & PSR_EVENT_KVMR_SESSION_ENABLE)

sys/dev/drm/i915/intel_psr.c

138

if (val & PSR_EVENT_VBI_ENABLE)

sys/dev/drm/i915/intel_psr.c

140

if (val & PSR_EVENT_LPSP_MODE_EXIT)

sys/dev/drm/i915/intel_psr.c

142

if ((val & PSR_EVENT_PSR_DISABLE) && !psr2_enabled)

sys/dev/drm/i915/intel_psr.c

175

u32 val = I915_READ(PSR_EVENT(cpu_transcoder));

sys/dev/drm/i915/intel_psr.c

178

I915_WRITE(PSR_EVENT(cpu_transcoder), val);

sys/dev/drm/i915/intel_psr.c

179

psr_event_print(val, psr2_enabled);

sys/dev/drm/i915/intel_psr.c

207

u8 val = 8; /* assume the worst if we can't read the value */

sys/dev/drm/i915/intel_psr.c

210

DP_SYNCHRONIZATION_LATENCY_IN_SINK, &val) == 1)

sys/dev/drm/i915/intel_psr.c

211

val &= DP_MAX_RESYNC_FRAME_COUNT_MASK;

sys/dev/drm/i915/intel_psr.c

214

return val;

sys/dev/drm/i915/intel_psr.c

359

u32 val = EDP_PSR_ENABLE;

sys/dev/drm/i915/intel_psr.c

370

val |= idle_frames << EDP_PSR_IDLE_FRAME_SHIFT;

sys/dev/drm/i915/intel_psr.c

372

val |= max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT;

sys/dev/drm/i915/intel_psr.c

374

val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;

sys/dev/drm/i915/intel_psr.c

377

val |= EDP_PSR_LINK_STANDBY;

sys/dev/drm/i915/intel_psr.c

380

val |= EDP_PSR_TP1_TIME_0us;

sys/dev/drm/i915/intel_psr.c

382

val |= EDP_PSR_TP1_TIME_100us;

sys/dev/drm/i915/intel_psr.c

384

val |= EDP_PSR_TP1_TIME_500us;

sys/dev/drm/i915/intel_psr.c

386

val |= EDP_PSR_TP1_TIME_2500us;

sys/dev/drm/i915/intel_psr.c

389

val |= EDP_PSR_TP2_TP3_TIME_0us;

sys/dev/drm/i915/intel_psr.c

391

val |= EDP_PSR_TP2_TP3_TIME_100us;

sys/dev/drm/i915/intel_psr.c

393

val |= EDP_PSR_TP2_TP3_TIME_500us;

sys/dev/drm/i915/intel_psr.c

395

val |= EDP_PSR_TP2_TP3_TIME_2500us;

sys/dev/drm/i915/intel_psr.c

399

val |= EDP_PSR_TP1_TP3_SEL;

sys/dev/drm/i915/intel_psr.c

401

val |= EDP_PSR_TP1_TP2_SEL;

sys/dev/drm/i915/intel_psr.c

404

val |= EDP_PSR_CRC_ENABLE;

sys/dev/drm/i915/intel_psr.c

406

val |= I915_READ(EDP_PSR_CTL) & EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK;

sys/dev/drm/i915/intel_psr.c

407

I915_WRITE(EDP_PSR_CTL, val);

sys/dev/drm/i915/intel_psr.c

413

u32 val;

sys/dev/drm/i915/intel_psr.c

421

val = idle_frames << EDP_PSR2_IDLE_FRAME_SHIFT;

sys/dev/drm/i915/intel_psr.c

426

val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;

sys/dev/drm/i915/intel_psr.c

428

val |= EDP_Y_COORDINATE_ENABLE;

sys/dev/drm/i915/intel_psr.c

430

val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);

sys/dev/drm/i915/intel_psr.c

434

val |= EDP_PSR2_TP2_TIME_50us;

sys/dev/drm/i915/intel_psr.c

436

val |= EDP_PSR2_TP2_TIME_100us;

sys/dev/drm/i915/intel_psr.c

438

val |= EDP_PSR2_TP2_TIME_500us;

sys/dev/drm/i915/intel_psr.c

440

val |= EDP_PSR2_TP2_TIME_2500us;

sys/dev/drm/i915/intel_psr.c

442

I915_WRITE(EDP_PSR2_CTL, val);

sys/dev/drm/i915/intel_psr.c

832

u64 val)

sys/dev/drm/i915/intel_psr.c

842

u32 mode = val & I915_PSR_DEBUG_MODE_MASK;

sys/dev/drm/i915/intel_psr.c

844

if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_MODE_MASK) ||

sys/dev/drm/i915/intel_psr.c

846

DRM_DEBUG_KMS("Invalid debug mask %llx\n", val);

sys/dev/drm/i915/intel_psr.c

878

enable = psr_global_enabled(val);

sys/dev/drm/i915/intel_psr.c

883

dev_priv->psr.debug = val;

sys/dev/drm/i915/intel_psr.c

930

u32 val;

sys/dev/drm/i915/intel_psr.c

936

val = I915_READ(EDP_PSR2_CTL);

sys/dev/drm/i915/intel_psr.c

937

WARN_ON(!(val & EDP_PSR2_ENABLE));

sys/dev/drm/i915/intel_psr.c

938

I915_WRITE(EDP_PSR2_CTL, val & ~EDP_PSR2_ENABLE);

sys/dev/drm/i915/intel_psr.c

940

val = I915_READ(EDP_PSR_CTL);

sys/dev/drm/i915/intel_psr.c

941

WARN_ON(!(val & EDP_PSR_ENABLE));

sys/dev/drm/i915/intel_psr.c

942

I915_WRITE(EDP_PSR_CTL, val & ~EDP_PSR_ENABLE);

sys/dev/drm/i915/intel_ringbuffer.h

39

#define I915_WRITE_TAIL(engine, val) I915_WRITE(RING_TAIL((engine)->mmio_base), val)

sys/dev/drm/i915/intel_ringbuffer.h

42

#define I915_WRITE_START(engine, val) I915_WRITE(RING_START((engine)->mmio_base), val)

sys/dev/drm/i915/intel_ringbuffer.h

45

#define I915_WRITE_HEAD(engine, val) I915_WRITE(RING_HEAD((engine)->mmio_base), val)

sys/dev/drm/i915/intel_ringbuffer.h

48

#define I915_WRITE_CTL(engine, val) I915_WRITE(RING_CTL((engine)->mmio_base), val)

sys/dev/drm/i915/intel_ringbuffer.h

51

#define I915_WRITE_IMR(engine, val) I915_WRITE(RING_IMR((engine)->mmio_base), val)

sys/dev/drm/i915/intel_ringbuffer.h

54

#define I915_WRITE_MODE(engine, val) I915_WRITE(RING_MI_MODE((engine)->mmio_base), val)

sys/dev/drm/i915/intel_runtime_pm.c

1000

val |= DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;

sys/dev/drm/i915/intel_runtime_pm.c

1002

val |= DPLL_INTEGRATED_CRI_CLK_VLV;

sys/dev/drm/i915/intel_runtime_pm.c

1004

I915_WRITE(DPLL(pipe), val);

sys/dev/drm/i915/intel_runtime_pm.c

1103

#define BITS_SET(val, bits) (((val) & (bits)) == (bits))

sys/dev/drm/i915/intel_runtime_pm.c

1312

u32 reg, val, expected, actual;

sys/dev/drm/i915/intel_runtime_pm.c

1330

val = vlv_dpio_read(dev_priv, pipe, reg);

sys/dev/drm/i915/intel_runtime_pm.c

1349

if (ch == DPIO_CH1 && val == 0)

sys/dev/drm/i915/intel_runtime_pm.c

1358

actual = val >> DPIO_ANYDL_POWERDOWN_SHIFT_CH0;

sys/dev/drm/i915/intel_runtime_pm.c

1360

actual = val >> DPIO_ANYDL_POWERDOWN_SHIFT_CH1;

sys/dev/drm/i915/intel_runtime_pm.c

1367

reg, val);

sys/dev/drm/i915/intel_runtime_pm.c

3142

u32 val, status;

sys/dev/drm/i915/intel_runtime_pm.c

3144

val = I915_READ(reg);

sys/dev/drm/i915/intel_runtime_pm.c

3145

val = enable ? (val | DBUF_POWER_REQUEST) : (val & ~DBUF_POWER_REQUEST);

sys/dev/drm/i915/intel_runtime_pm.c

3146

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_runtime_pm.c

3231

uint32_t val;

sys/dev/drm/i915/intel_runtime_pm.c

3233

val = MBUS_ABOX_BT_CREDIT_POOL1(16) |

sys/dev/drm/i915/intel_runtime_pm.c

3238

I915_WRITE(MBUS_ABOX_CTL, val);

sys/dev/drm/i915/intel_runtime_pm.c

3246

uint32_t val;

sys/dev/drm/i915/intel_runtime_pm.c

3251

val = I915_READ(HSW_NDE_RSTWRN_OPT);

sys/dev/drm/i915/intel_runtime_pm.c

3252

I915_WRITE(HSW_NDE_RSTWRN_OPT, val | RESET_PCH_HANDSHAKE_ENABLE);

sys/dev/drm/i915/intel_runtime_pm.c

3308

uint32_t val;

sys/dev/drm/i915/intel_runtime_pm.c

3318

val = I915_READ(HSW_NDE_RSTWRN_OPT);

sys/dev/drm/i915/intel_runtime_pm.c

3319

val &= ~RESET_PCH_HANDSHAKE_ENABLE;

sys/dev/drm/i915/intel_runtime_pm.c

3320

I915_WRITE(HSW_NDE_RSTWRN_OPT, val);

sys/dev/drm/i915/intel_runtime_pm.c

3399

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

3401

val = I915_READ(ICL_PORT_COMP_DW3(port));

sys/dev/drm/i915/intel_runtime_pm.c

3402

switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) {

sys/dev/drm/i915/intel_runtime_pm.c

3404

MISSING_CASE(val);

sys/dev/drm/i915/intel_runtime_pm.c

3423

val = I915_READ(ICL_PORT_COMP_DW1(port));

sys/dev/drm/i915/intel_runtime_pm.c

3424

val &= ~((0xff << 16) | 0xff);

sys/dev/drm/i915/intel_runtime_pm.c

3425

val |= procmon->dw1;

sys/dev/drm/i915/intel_runtime_pm.c

3426

I915_WRITE(ICL_PORT_COMP_DW1(port), val);

sys/dev/drm/i915/intel_runtime_pm.c

3436

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

3441

val = I915_READ(HSW_NDE_RSTWRN_OPT);

sys/dev/drm/i915/intel_runtime_pm.c

3442

val |= RESET_PCH_HANDSHAKE_ENABLE;

sys/dev/drm/i915/intel_runtime_pm.c

3443

I915_WRITE(HSW_NDE_RSTWRN_OPT, val);

sys/dev/drm/i915/intel_runtime_pm.c

3446

val = I915_READ(CHICKEN_MISC_2);

sys/dev/drm/i915/intel_runtime_pm.c

3447

val &= ~CNL_COMP_PWR_DOWN;

sys/dev/drm/i915/intel_runtime_pm.c

3448

I915_WRITE(CHICKEN_MISC_2, val);

sys/dev/drm/i915/intel_runtime_pm.c

3453

val = I915_READ(CNL_PORT_COMP_DW0);

sys/dev/drm/i915/intel_runtime_pm.c

3454

val |= COMP_INIT;

sys/dev/drm/i915/intel_runtime_pm.c

3455

I915_WRITE(CNL_PORT_COMP_DW0, val);

sys/dev/drm/i915/intel_runtime_pm.c

3458

val = I915_READ(CNL_PORT_CL1CM_DW5);

sys/dev/drm/i915/intel_runtime_pm.c

3459

val |= CL_POWER_DOWN_ENABLE;

sys/dev/drm/i915/intel_runtime_pm.c

3460

I915_WRITE(CNL_PORT_CL1CM_DW5, val);

sys/dev/drm/i915/intel_runtime_pm.c

3485

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

3510

val = I915_READ(CHICKEN_MISC_2);

sys/dev/drm/i915/intel_runtime_pm.c

3511

val |= CNL_COMP_PWR_DOWN;

sys/dev/drm/i915/intel_runtime_pm.c

3512

I915_WRITE(CHICKEN_MISC_2, val);

sys/dev/drm/i915/intel_runtime_pm.c

3521

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

3526

val = I915_READ(HSW_NDE_RSTWRN_OPT);

sys/dev/drm/i915/intel_runtime_pm.c

3527

val |= RESET_PCH_HANDSHAKE_ENABLE;

sys/dev/drm/i915/intel_runtime_pm.c

3528

I915_WRITE(HSW_NDE_RSTWRN_OPT, val);

sys/dev/drm/i915/intel_runtime_pm.c

3532

val = I915_READ(ICL_PHY_MISC(port));

sys/dev/drm/i915/intel_runtime_pm.c

3533

val &= ~ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN;

sys/dev/drm/i915/intel_runtime_pm.c

3534

I915_WRITE(ICL_PHY_MISC(port), val);

sys/dev/drm/i915/intel_runtime_pm.c

3538

val = I915_READ(ICL_PORT_COMP_DW0(port));

sys/dev/drm/i915/intel_runtime_pm.c

3539

val |= COMP_INIT;

sys/dev/drm/i915/intel_runtime_pm.c

3540

I915_WRITE(ICL_PORT_COMP_DW0(port), val);

sys/dev/drm/i915/intel_runtime_pm.c

3543

val = I915_READ(ICL_PORT_CL_DW5(port));

sys/dev/drm/i915/intel_runtime_pm.c

3544

val |= CL_POWER_DOWN_ENABLE;

sys/dev/drm/i915/intel_runtime_pm.c

3545

I915_WRITE(ICL_PORT_CL_DW5(port), val);

sys/dev/drm/i915/intel_runtime_pm.c

3575

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

3599

val = I915_READ(ICL_PHY_MISC(port));

sys/dev/drm/i915/intel_runtime_pm.c

3600

val |= ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN;

sys/dev/drm/i915/intel_runtime_pm.c

3601

I915_WRITE(ICL_PHY_MISC(port), val);

sys/dev/drm/i915/intel_runtime_pm.c

369

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

385

val = I915_READ(regs->driver);

sys/dev/drm/i915/intel_runtime_pm.c

386

I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));

sys/dev/drm/i915/intel_runtime_pm.c

393

val = I915_READ(CNL_AUX_ANAOVRD1(pw_idx));

sys/dev/drm/i915/intel_runtime_pm.c

394

val |= CNL_AUX_ANAOVRD1_ENABLE | CNL_AUX_ANAOVRD1_LDO_BYPASS;

sys/dev/drm/i915/intel_runtime_pm.c

395

I915_WRITE(CNL_AUX_ANAOVRD1(pw_idx), val);

sys/dev/drm/i915/intel_runtime_pm.c

411

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

416

val = I915_READ(regs->driver);

sys/dev/drm/i915/intel_runtime_pm.c

417

I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));

sys/dev/drm/i915/intel_runtime_pm.c

430

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

432

val = I915_READ(regs->driver);

sys/dev/drm/i915/intel_runtime_pm.c

433

I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));

sys/dev/drm/i915/intel_runtime_pm.c

435

val = I915_READ(ICL_PORT_CL_DW12(port));

sys/dev/drm/i915/intel_runtime_pm.c

436

I915_WRITE(ICL_PORT_CL_DW12(port), val | ICL_LANE_ENABLE_AUX);

sys/dev/drm/i915/intel_runtime_pm.c

448

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

450

val = I915_READ(ICL_PORT_CL_DW12(port));

sys/dev/drm/i915/intel_runtime_pm.c

451

I915_WRITE(ICL_PORT_CL_DW12(port), val & ~ICL_LANE_ENABLE_AUX);

sys/dev/drm/i915/intel_runtime_pm.c

453

val = I915_READ(regs->driver);

sys/dev/drm/i915/intel_runtime_pm.c

454

I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));

sys/dev/drm/i915/intel_runtime_pm.c

564

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

566

val = I915_READ(DC_STATE_EN) & gen9_dc_mask(dev_priv);

sys/dev/drm/i915/intel_runtime_pm.c

569

dev_priv->csr.dc_state, val);

sys/dev/drm/i915/intel_runtime_pm.c

570

dev_priv->csr.dc_state = val;

sys/dev/drm/i915/intel_runtime_pm.c

598

uint32_t val;

sys/dev/drm/i915/intel_runtime_pm.c

604

val = I915_READ(DC_STATE_EN);

sys/dev/drm/i915/intel_runtime_pm.c

607

val & mask, state);

sys/dev/drm/i915/intel_runtime_pm.c

610

if ((val & mask) != dev_priv->csr.dc_state)

sys/dev/drm/i915/intel_runtime_pm.c

612

dev_priv->csr.dc_state, val & mask);

sys/dev/drm/i915/intel_runtime_pm.c

614

val &= ~mask;

sys/dev/drm/i915/intel_runtime_pm.c

615

val |= state;

sys/dev/drm/i915/intel_runtime_pm.c

617

gen9_write_dc_state(dev_priv, val);

sys/dev/drm/i915/intel_runtime_pm.c

619

dev_priv->csr.dc_state = val & mask;

sys/dev/drm/i915/intel_runtime_pm.c

959

u32 val;

sys/dev/drm/i915/intel_runtime_pm.c

967

val = I915_READ(DSPCLK_GATE_D);

sys/dev/drm/i915/intel_runtime_pm.c

968

val &= DPOUNIT_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/intel_runtime_pm.c

969

val |= VRHUNIT_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/intel_runtime_pm.c

970

I915_WRITE(DSPCLK_GATE_D, val);

sys/dev/drm/i915/intel_runtime_pm.c

998

u32 val = I915_READ(DPLL(pipe));

sys/dev/drm/i915/intel_sdvo.c

1202

val = input; \

sys/dev/drm/i915/intel_sdvo.c

1203

intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \

sys/dev/drm/i915/intel_sdvo.c

1212

uint16_t val;

sys/dev/drm/i915/intel_sdvo.c

1407

u32 val;

sys/dev/drm/i915/intel_sdvo.c

1409

val = I915_READ(sdvo_reg);

sys/dev/drm/i915/intel_sdvo.c

1413

*pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;

sys/dev/drm/i915/intel_sdvo.c

1415

*pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;

sys/dev/drm/i915/intel_sdvo.c

1417

*pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;

sys/dev/drm/i915/intel_sdvo.c

1419

return val & SDVO_ENABLE;

sys/dev/drm/i915/intel_sdvo.c

1447

u8 val;

sys/dev/drm/i915/intel_sdvo.c

1498

&val, 1)) {

sys/dev/drm/i915/intel_sdvo.c

1499

switch (val) {

sys/dev/drm/i915/intel_sdvo.c

1519

&val, 1)) {

sys/dev/drm/i915/intel_sdvo.c

1520

if (val == SDVO_ENCODE_HDMI)

sys/dev/drm/i915/intel_sdvo.c

2075

uint64_t *val)

sys/dev/drm/i915/intel_sdvo.c

208

static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)

sys/dev/drm/i915/intel_sdvo.c

2085

*val = i;

sys/dev/drm/i915/intel_sdvo.c

2091

*val = 0;

sys/dev/drm/i915/intel_sdvo.c

2094

*val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;

sys/dev/drm/i915/intel_sdvo.c

2097

*val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;

sys/dev/drm/i915/intel_sdvo.c

2099

*val = sdvo_state->tv.hpos;

sys/dev/drm/i915/intel_sdvo.c

2101

*val = sdvo_state->tv.vpos;

sys/dev/drm/i915/intel_sdvo.c

2103

*val = state->tv.saturation;

sys/dev/drm/i915/intel_sdvo.c

2105

*val = state->tv.contrast;

sys/dev/drm/i915/intel_sdvo.c

2107

*val = state->tv.hue;

sys/dev/drm/i915/intel_sdvo.c

2109

*val = state->tv.brightness;

sys/dev/drm/i915/intel_sdvo.c

2111

*val = sdvo_state->tv.sharpness;

sys/dev/drm/i915/intel_sdvo.c

2113

*val = sdvo_state->tv.flicker_filter;

sys/dev/drm/i915/intel_sdvo.c

2115

*val = sdvo_state->tv.flicker_filter_2d;

sys/dev/drm/i915/intel_sdvo.c

2117

*val = sdvo_state->tv.flicker_filter_adaptive;

sys/dev/drm/i915/intel_sdvo.c

2119

*val = sdvo_state->tv.chroma_filter;

sys/dev/drm/i915/intel_sdvo.c

212

u32 bval = val, cval = val;

sys/dev/drm/i915/intel_sdvo.c

2121

*val = sdvo_state->tv.luma_filter;

sys/dev/drm/i915/intel_sdvo.c

2123

*val = sdvo_state->tv.dot_crawl;

sys/dev/drm/i915/intel_sdvo.c

2125

return intel_digital_connector_atomic_get_property(connector, state, property, val);

sys/dev/drm/i915/intel_sdvo.c

2134

uint64_t val)

sys/dev/drm/i915/intel_sdvo.c

2140

state->tv.mode = intel_sdvo_connector->tv_format_supported[val];

sys/dev/drm/i915/intel_sdvo.c

2151

sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;

sys/dev/drm/i915/intel_sdvo.c

2155

sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;

sys/dev/drm/i915/intel_sdvo.c

2157

sdvo_state->tv.hpos = val;

sys/dev/drm/i915/intel_sdvo.c

2159

sdvo_state->tv.vpos = val;

sys/dev/drm/i915/intel_sdvo.c

216

I915_WRITE(intel_sdvo->sdvo_reg, val);

sys/dev/drm/i915/intel_sdvo.c

2161

state->tv.saturation = val;

sys/dev/drm/i915/intel_sdvo.c

2163

state->tv.contrast = val;

sys/dev/drm/i915/intel_sdvo.c

2165

state->tv.hue = val;

sys/dev/drm/i915/intel_sdvo.c

2167

state->tv.brightness = val;

sys/dev/drm/i915/intel_sdvo.c

2169

sdvo_state->tv.sharpness = val;

sys/dev/drm/i915/intel_sdvo.c

2171

sdvo_state->tv.flicker_filter = val;

sys/dev/drm/i915/intel_sdvo.c

2173

sdvo_state->tv.flicker_filter_2d = val;

sys/dev/drm/i915/intel_sdvo.c

2175

sdvo_state->tv.flicker_filter_adaptive = val;

sys/dev/drm/i915/intel_sdvo.c

2177

sdvo_state->tv.chroma_filter = val;

sys/dev/drm/i915/intel_sdvo.c

2179

sdvo_state->tv.luma_filter = val;

sys/dev/drm/i915/intel_sdvo.c

2181

sdvo_state->tv.dot_crawl = val;

sys/dev/drm/i915/intel_sdvo.c

2183

return intel_digital_connector_atomic_set_property(connector, state, property, val);

sys/dev/drm/i915/intel_sdvo.c

223

I915_WRITE(intel_sdvo->sdvo_reg, val);

sys/dev/drm/i915/intel_sdvo.c

789

static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)

sys/dev/drm/i915/intel_sdvo.c

791

return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);

sys/dev/drm/i915/intel_sideband.c

102

SB_CRWRDA_NP, addr, &val);

sys/dev/drm/i915/intel_sideband.c

110

u32 val = 0;

sys/dev/drm/i915/intel_sideband.c

113

SB_CRRDDA_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

115

return val;

sys/dev/drm/i915/intel_sideband.c

118

void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)

sys/dev/drm/i915/intel_sideband.c

121

SB_CRWRDA_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

126

u32 val = 0;

sys/dev/drm/i915/intel_sideband.c

132

SB_CRRDDA_NP, addr, &val);

sys/dev/drm/i915/intel_sideband.c

135

return val;

sys/dev/drm/i915/intel_sideband.c

140

u32 val = 0;

sys/dev/drm/i915/intel_sideband.c

142

SB_CRRDDA_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

143

return val;

sys/dev/drm/i915/intel_sideband.c

147

u8 port, u32 reg, u32 val)

sys/dev/drm/i915/intel_sideband.c

150

SB_CRWRDA_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

155

u32 val = 0;

sys/dev/drm/i915/intel_sideband.c

157

SB_CRRDDA_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

158

return val;

sys/dev/drm/i915/intel_sideband.c

161

void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)

sys/dev/drm/i915/intel_sideband.c

164

SB_CRWRDA_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

169

u32 val = 0;

sys/dev/drm/i915/intel_sideband.c

171

SB_CRRDDA_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

172

return val;

sys/dev/drm/i915/intel_sideband.c

175

void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)

sys/dev/drm/i915/intel_sideband.c

178

SB_CRWRDA_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

183

u32 val = 0;

sys/dev/drm/i915/intel_sideband.c

186

SB_MRD_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

192

WARN(val == 0xffffffff, "DPIO read pipe %c reg 0x%x == 0x%x\n",

sys/dev/drm/i915/intel_sideband.c

193

pipe_name(pipe), reg, val);

sys/dev/drm/i915/intel_sideband.c

195

return val;

sys/dev/drm/i915/intel_sideband.c

198

void vlv_dpio_write(struct drm_i915_private *dev_priv, enum i915_pipe pipe, int reg, u32 val)

sys/dev/drm/i915/intel_sideband.c

201

SB_MWR_NP, reg, &val);

sys/dev/drm/i915/intel_sideband.c

285

u32 val = 0;

sys/dev/drm/i915/intel_sideband.c

287

reg, &val);

sys/dev/drm/i915/intel_sideband.c

288

return val;

sys/dev/drm/i915/intel_sideband.c

291

void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)

sys/dev/drm/i915/intel_sideband.c

294

reg, &val);

sys/dev/drm/i915/intel_sideband.c

43

u32 port, u32 opcode, u32 addr, u32 *val)

sys/dev/drm/i915/intel_sideband.c

63

I915_WRITE(VLV_IOSF_DATA, is_read ? 0 : *val);

sys/dev/drm/i915/intel_sideband.c

75

*val = I915_READ(VLV_IOSF_DATA);

sys/dev/drm/i915/intel_sideband.c

82

u32 val = 0;

sys/dev/drm/i915/intel_sideband.c

88

SB_CRRDDA_NP, addr, &val);

sys/dev/drm/i915/intel_sideband.c

91

return val;

sys/dev/drm/i915/intel_sideband.c

94

int vlv_punit_write(struct drm_i915_private *dev_priv, u32 addr, u32 val)

sys/dev/drm/i915/intel_uncore.c

1111

u##x val = 0; \

sys/dev/drm/i915/intel_uncore.c

1115

trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \

sys/dev/drm/i915/intel_uncore.c

1116

return val

sys/dev/drm/i915/intel_uncore.c

1122

val = __raw_i915_read##x(dev_priv, reg); \

sys/dev/drm/i915/intel_uncore.c

1131

val = __raw_i915_read##x(dev_priv, reg); \

sys/dev/drm/i915/intel_uncore.c

1153

u##x val = 0; \

sys/dev/drm/i915/intel_uncore.c

1161

trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \

sys/dev/drm/i915/intel_uncore.c

1162

return val

sys/dev/drm/i915/intel_uncore.c

1200

val = __raw_i915_read##x(dev_priv, reg); \

sys/dev/drm/i915/intel_uncore.c

1227

trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \

sys/dev/drm/i915/intel_uncore.c

1234

gen2_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \

sys/dev/drm/i915/intel_uncore.c

1236

__raw_i915_write##x(dev_priv, reg, val); \

sys/dev/drm/i915/intel_uncore.c

1242

gen5_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \

sys/dev/drm/i915/intel_uncore.c

1245

__raw_i915_write##x(dev_priv, reg, val); \

sys/dev/drm/i915/intel_uncore.c

1265

trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \

sys/dev/drm/i915/intel_uncore.c

1276

gen6_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \

sys/dev/drm/i915/intel_uncore.c

1280

__raw_i915_write##x(dev_priv, reg, val); \

sys/dev/drm/i915/intel_uncore.c

1286

func##_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \

sys/dev/drm/i915/intel_uncore.c

1292

__raw_i915_write##x(dev_priv, reg, val); \

sys/dev/drm/i915/intel_uncore.c

1700

reg->val = I915_READ64_2x32(entry->offset_ldw,

sys/dev/drm/i915/intel_uncore.c

1703

reg->val = I915_READ64(entry->offset_ldw);

sys/dev/drm/i915/intel_uncore.c

1705

reg->val = I915_READ(entry->offset_ldw);

sys/dev/drm/i915/intel_uncore.c

1707

reg->val = I915_READ16(entry->offset_ldw);

sys/dev/drm/i915/intel_uncore.c

1709

reg->val = I915_READ8(entry->offset_ldw);

sys/dev/drm/i915/intel_uncore.c

288

u32 val;

sys/dev/drm/i915/intel_uncore.c

290

val = __raw_i915_read32(dev_priv, GEN6_GT_THREAD_STATUS_REG);

sys/dev/drm/i915/intel_uncore.c

291

val &= GEN6_GT_THREAD_STATUS_CORE_MASK;

sys/dev/drm/i915/intel_uncore.c

293

return val;

sys/dev/drm/i915/intel_uncore.h

80

i915_reg_t r, u8 val, bool trace);

sys/dev/drm/i915/intel_uncore.h

82

i915_reg_t r, u16 val, bool trace);

sys/dev/drm/i915/intel_uncore.h

84

i915_reg_t r, u32 val, bool trace);

sys/dev/drm/i915/intel_wopcm.c

220

i915_reg_t reg, u32 val, u32 mask,

sys/dev/drm/i915/intel_wopcm.c

225

GEM_BUG_ON(val & ~mask);

sys/dev/drm/i915/intel_wopcm.c

227

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_wopcm.c

231

return (reg_val & mask) != (val | locked_bit) ? -EIO : 0;

sys/dev/drm/i915/intel_workarounds.c

104

r->value = val;

sys/dev/drm/i915/intel_workarounds.c

116

#define WA_REG(addr, mask, val) wa_add(dev_priv, (addr), (mask), (val))

sys/dev/drm/i915/intel_workarounds.c

624

wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val)

sys/dev/drm/i915/intel_workarounds.c

628

.mask = val,

sys/dev/drm/i915/intel_workarounds.c

629

.val = _MASKED_BIT_ENABLE(val)

sys/dev/drm/i915/intel_workarounds.c

637

u32 val)

sys/dev/drm/i915/intel_workarounds.c

642

.val = val

sys/dev/drm/i915/intel_workarounds.c

649

wa_write(struct i915_wa_list *wal, i915_reg_t reg, u32 val)

sys/dev/drm/i915/intel_workarounds.c

651

wa_write_masked_or(wal, reg, ~0, val);

sys/dev/drm/i915/intel_workarounds.c

655

wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 val)

sys/dev/drm/i915/intel_workarounds.c

657

wa_write_masked_or(wal, reg, val, val);

sys/dev/drm/i915/intel_workarounds.c

66

i915_reg_t reg, const u32 mask, const u32 val)

sys/dev/drm/i915/intel_workarounds.c

90

r->value |= val;

sys/dev/drm/i915/intel_workarounds.c

966

u32 val = I915_READ_FW(wa->reg);

sys/dev/drm/i915/intel_workarounds.c

968

val &= ~wa->mask;

sys/dev/drm/i915/intel_workarounds.c

969

val |= wa->val;

sys/dev/drm/i915/intel_workarounds.c

971

I915_WRITE_FW(wa->reg, val);

sys/dev/drm/i915/intel_workarounds.c

98

addr, mask, val);

sys/dev/drm/i915/intel_workarounds.h

15

u32 val;

sys/dev/drm/i915/vlv_dsi.c

100

I915_WRITE(reg, val);

sys/dev/drm/i915/vlv_dsi.c

111

u32 val = I915_READ(reg);

sys/dev/drm/i915/vlv_dsi.c

114

*data++ = val >> 8 * j;

sys/dev/drm/i915/vlv_dsi.c

1411

u32 val, tmp;

sys/dev/drm/i915/vlv_dsi.c

1463

val = intel_dsi->lane_count << DATA_LANES_PRG_REG_SHIFT;

sys/dev/drm/i915/vlv_dsi.c

1465

val |= intel_dsi->channel << CMD_MODE_CHANNEL_NUMBER_SHIFT;

sys/dev/drm/i915/vlv_dsi.c

1466

val |= CMD_MODE_DATA_WIDTH_8_BIT; /* XXX */

sys/dev/drm/i915/vlv_dsi.c

1468

val |= intel_dsi->channel << VID_MODE_CHANNEL_NUMBER_SHIFT;

sys/dev/drm/i915/vlv_dsi.c

1469

val |= pixel_format_to_reg(intel_dsi->pixel_format);

sys/dev/drm/i915/vlv_dsi.c

1485

I915_WRITE(MIPI_DSI_FUNC_PRG(port), val);

sys/dev/drm/i915/vlv_dsi.c

1599

u32 val;

sys/dev/drm/i915/vlv_dsi.c

1614

val = I915_READ(MIPI_DSI_FUNC_PRG(port));

sys/dev/drm/i915/vlv_dsi.c

1615

val &= ~VID_MODE_FORMAT_MASK;

sys/dev/drm/i915/vlv_dsi.c

1616

I915_WRITE(MIPI_DSI_FUNC_PRG(port), val);

sys/dev/drm/i915/vlv_dsi.c

1692

u32 val;

sys/dev/drm/i915/vlv_dsi.c

1700

val = I915_READ(DSPCNTR(i9xx_plane));

sys/dev/drm/i915/vlv_dsi.c

1701

if (val & DISPPLANE_ROTATE_180)

sys/dev/drm/i915/vlv_dsi.c

414

u32 val;

sys/dev/drm/i915/vlv_dsi.c

425

val = I915_READ(MIPI_CTRL(PORT_A));

sys/dev/drm/i915/vlv_dsi.c

426

I915_WRITE(MIPI_CTRL(PORT_A), val | GLK_MIPIIO_RESET_RELEASED);

sys/dev/drm/i915/vlv_dsi.c

431

val = I915_READ(MIPI_DEVICE_READY(port));

sys/dev/drm/i915/vlv_dsi.c

432

val &= ~ULPS_STATE_MASK;

sys/dev/drm/i915/vlv_dsi.c

433

val |= DEVICE_READY;

sys/dev/drm/i915/vlv_dsi.c

434

I915_WRITE(MIPI_DEVICE_READY(port), val);

sys/dev/drm/i915/vlv_dsi.c

438

val = I915_READ(MIPI_DEVICE_READY(port));

sys/dev/drm/i915/vlv_dsi.c

439

val &= ~ULPS_STATE_MASK;

sys/dev/drm/i915/vlv_dsi.c

440

val |= (ULPS_STATE_ENTER | DEVICE_READY);

sys/dev/drm/i915/vlv_dsi.c

441

I915_WRITE(MIPI_DEVICE_READY(port), val);

sys/dev/drm/i915/vlv_dsi.c

449

val = I915_READ(MIPI_DEVICE_READY(port));

sys/dev/drm/i915/vlv_dsi.c

450

val &= ~ULPS_STATE_MASK;

sys/dev/drm/i915/vlv_dsi.c

451

val |= (ULPS_STATE_EXIT | DEVICE_READY);

sys/dev/drm/i915/vlv_dsi.c

452

I915_WRITE(MIPI_DEVICE_READY(port), val);

sys/dev/drm/i915/vlv_dsi.c

455

val = I915_READ(MIPI_DEVICE_READY(port));

sys/dev/drm/i915/vlv_dsi.c

456

val &= ~ULPS_STATE_MASK;

sys/dev/drm/i915/vlv_dsi.c

457

val |= (ULPS_STATE_NORMAL_OPERATION | DEVICE_READY);

sys/dev/drm/i915/vlv_dsi.c

458

I915_WRITE(MIPI_DEVICE_READY(port), val);

sys/dev/drm/i915/vlv_dsi.c

460

val = I915_READ(MIPI_CTRL(port));

sys/dev/drm/i915/vlv_dsi.c

461

val &= ~GLK_LP_WAKE;

sys/dev/drm/i915/vlv_dsi.c

462

I915_WRITE(MIPI_CTRL(port), val);

sys/dev/drm/i915/vlv_dsi.c

488

u32 val;

sys/dev/drm/i915/vlv_dsi.c

494

val = I915_READ(BXT_MIPI_PORT_CTRL(port));

sys/dev/drm/i915/vlv_dsi.c

495

I915_WRITE(BXT_MIPI_PORT_CTRL(port), val | LP_OUTPUT_HOLD);

sys/dev/drm/i915/vlv_dsi.c

501

val = I915_READ(MIPI_DEVICE_READY(port));

sys/dev/drm/i915/vlv_dsi.c

502

val &= ~ULPS_STATE_MASK;

sys/dev/drm/i915/vlv_dsi.c

503

I915_WRITE(MIPI_DEVICE_READY(port), val);

sys/dev/drm/i915/vlv_dsi.c

505

val |= DEVICE_READY;

sys/dev/drm/i915/vlv_dsi.c

506

I915_WRITE(MIPI_DEVICE_READY(port), val);

sys/dev/drm/i915/vlv_dsi.c

515

u32 val;

sys/dev/drm/i915/vlv_dsi.c

537

val = I915_READ(MIPI_PORT_CTRL(PORT_A));

sys/dev/drm/i915/vlv_dsi.c

538

I915_WRITE(MIPI_PORT_CTRL(PORT_A), val | LP_OUTPUT_HOLD);

sys/dev/drm/i915/vlv_dsi.c

566

u32 val;

sys/dev/drm/i915/vlv_dsi.c

570

val = I915_READ(MIPI_DEVICE_READY(port));

sys/dev/drm/i915/vlv_dsi.c

571

val &= ~ULPS_STATE_MASK;

sys/dev/drm/i915/vlv_dsi.c

572

val |= (ULPS_STATE_ENTER | DEVICE_READY);

sys/dev/drm/i915/vlv_dsi.c

573

I915_WRITE(MIPI_DEVICE_READY(port), val);

sys/dev/drm/i915/vlv_dsi.c

638

u32 val;

sys/dev/drm/i915/vlv_dsi.c

663

val = I915_READ(port_ctrl);

sys/dev/drm/i915/vlv_dsi.c

664

I915_WRITE(port_ctrl, val & ~LP_OUTPUT_HOLD);

sys/dev/drm/i915/vlv_dsi.c

806

u32 val;

sys/dev/drm/i915/vlv_dsi.c

827

val = I915_READ(BXT_P_CR_GT_DISP_PWRON);

sys/dev/drm/i915/vlv_dsi.c

829

val | MIPIO_RST_CTRL);

sys/dev/drm/i915/vlv_dsi.c

837

u32 val;

sys/dev/drm/i915/vlv_dsi.c

840

val = I915_READ(DSPCLK_GATE_D);

sys/dev/drm/i915/vlv_dsi.c

841

val |= DPOUNIT_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/vlv_dsi.c

842

I915_WRITE(DSPCLK_GATE_D, val);

sys/dev/drm/i915/vlv_dsi.c

95

u32 val = 0;

sys/dev/drm/i915/vlv_dsi.c

954

u32 val;

sys/dev/drm/i915/vlv_dsi.c

98

val |= *data++ << 8 * j;

sys/dev/drm/i915/vlv_dsi.c

985

val = I915_READ(BXT_P_CR_GT_DISP_PWRON);

sys/dev/drm/i915/vlv_dsi.c

987

val & ~MIPIO_RST_CTRL);

sys/dev/drm/i915/vlv_dsi.c

993

u32 val;

sys/dev/drm/i915/vlv_dsi.c

997

val = I915_READ(DSPCLK_GATE_D);

sys/dev/drm/i915/vlv_dsi.c

998

val &= ~DPOUNIT_CLOCK_GATE_DISABLE;

sys/dev/drm/i915/vlv_dsi.c

999

I915_WRITE(DSPCLK_GATE_D, val);

sys/dev/drm/i915/vlv_dsi_pll.c

198

u32 val;

sys/dev/drm/i915/vlv_dsi_pll.c

202

val = I915_READ(BXT_DSI_PLL_ENABLE);

sys/dev/drm/i915/vlv_dsi_pll.c

203

enabled = (val & mask) == mask;

sys/dev/drm/i915/vlv_dsi_pll.c

216

val = I915_READ(BXT_DSI_PLL_CTL);

sys/dev/drm/i915/vlv_dsi_pll.c

218

if (!(val & BXT_DSIA_16X_MASK)) {

sys/dev/drm/i915/vlv_dsi_pll.c

219

DRM_DEBUG_DRIVER("Invalid PLL divider (%08x)\n", val);

sys/dev/drm/i915/vlv_dsi_pll.c

223

if (!(val & BXT_DSIA_16X_MASK) || !(val & BXT_DSIC_16X_MASK)) {

sys/dev/drm/i915/vlv_dsi_pll.c

224

DRM_DEBUG_DRIVER("Invalid PLL divider (%08x)\n", val);

sys/dev/drm/i915/vlv_dsi_pll.c

235

u32 val;

sys/dev/drm/i915/vlv_dsi_pll.c

239

val = I915_READ(BXT_DSI_PLL_ENABLE);

sys/dev/drm/i915/vlv_dsi_pll.c

240

val &= ~BXT_DSI_PLL_DO_ENABLE;

sys/dev/drm/i915/vlv_dsi_pll.c

241

I915_WRITE(BXT_DSI_PLL_ENABLE, val);

sys/dev/drm/i915/vlv_dsi_pll.c

528

u32 val;

sys/dev/drm/i915/vlv_dsi_pll.c

545

val = I915_READ(BXT_DSI_PLL_ENABLE);

sys/dev/drm/i915/vlv_dsi_pll.c

546

val |= BXT_DSI_PLL_DO_ENABLE;

sys/dev/drm/i915/vlv_dsi_pll.c

547

I915_WRITE(BXT_DSI_PLL_ENABLE, val);

sys/dev/drm/include/asm-generic/atomic-long.h

41

atomic_long_xchg(atomic_long_t *v, long val)

sys/dev/drm/include/asm-generic/atomic-long.h

43

return atomic_swap_long(&v->counter, val);

sys/dev/drm/include/drm/drm_connector.h

1238

const char *drm_get_dpms_name(int val);

sys/dev/drm/include/drm/drm_connector.h

1239

const char *drm_get_dvi_i_subconnector_name(int val);

sys/dev/drm/include/drm/drm_connector.h

1240

const char *drm_get_dvi_i_select_name(int val);

sys/dev/drm/include/drm/drm_connector.h

1241

const char *drm_get_tv_subconnector_name(int val);

sys/dev/drm/include/drm/drm_connector.h

1242

const char *drm_get_tv_select_name(int val);

sys/dev/drm/include/drm/drm_connector.h

1243

const char *drm_get_content_protection_name(int val);

sys/dev/drm/include/drm/drm_connector.h

636

uint64_t val);

sys/dev/drm/include/drm/drm_connector.h

768

uint64_t val);

sys/dev/drm/include/drm/drm_connector.h

791

uint64_t *val);

sys/dev/drm/include/drm/drm_crtc.h

582

struct drm_property *property, uint64_t val);

sys/dev/drm/include/drm/drm_crtc.h

60

static inline int64_t U642I64(uint64_t val)

sys/dev/drm/include/drm/drm_crtc.h

62

return (int64_t)*((int64_t *)&val);

sys/dev/drm/include/drm/drm_crtc.h

64

static inline uint64_t I642U64(int64_t val)

sys/dev/drm/include/drm/drm_crtc.h

66

return (uint64_t)*((uint64_t *)&val);

sys/dev/drm/include/drm/drm_crtc.h

673

uint64_t val);

sys/dev/drm/include/drm/drm_crtc.h

695

uint64_t *val);

sys/dev/drm/include/drm/drm_encoder_slave.h

75

uint64_t val);

sys/dev/drm/include/drm/drm_flip_work.h

52

typedef void (*drm_flip_func_t)(struct drm_flip_work *work, void *val);

sys/dev/drm/include/drm/drm_flip_work.h

85

void drm_flip_work_queue(struct drm_flip_work *work, void *val);

sys/dev/drm/include/drm/drm_mode_object.h

107

const char *fnname(int val) \

sys/dev/drm/include/drm/drm_mode_object.h

111

if (list[i].type == val) \

sys/dev/drm/include/drm/drm_mode_object.h

125

uint64_t val);

sys/dev/drm/include/drm/drm_os_linux.h

36

#define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset))

sys/dev/drm/include/drm/drm_os_linux.h

38

#define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset))

sys/dev/drm/include/drm/drm_os_linux.h

40

#define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset))

sys/dev/drm/include/drm/drm_os_linux.h

45

#define DRM_WRITE64(map, offset, val) writeq(val, ((void __iomem *)(map)->handle) + (offset))

sys/dev/drm/include/drm/drm_plane.h

316

struct drm_property *property, uint64_t val);

sys/dev/drm/include/drm/drm_plane.h

407

uint64_t val);

sys/dev/drm/include/drm/drm_plane.h

430

uint64_t *val);

sys/dev/drm/include/drm/intel-gtt.h

91

void intel_gtt_write(u_int entry, uint32_t val);

sys/dev/drm/include/linux/atomic.h

208

int val = READ_ONCE(v->counter);

sys/dev/drm/include/linux/atomic.h

210

while (atomic_cmpxchg_int(&v->counter, val, val ^ i) == 0) {

sys/dev/drm/include/linux/atomic.h

213

return val;

sys/dev/drm/include/linux/bitops.h

318

long val;

sys/dev/drm/include/linux/bitops.h

324

val = *(volatile long *)var;

sys/dev/drm/include/linux/bitops.h

325

} while (atomic_cmpset_long(var, val, val & ~bit) == 0);

sys/dev/drm/include/linux/bitops.h

327

return !!(val & bit);

sys/dev/drm/include/linux/bitops.h

347

long val;

sys/dev/drm/include/linux/bitops.h

353

val = *(volatile long *)var;

sys/dev/drm/include/linux/bitops.h

354

} while (atomic_cmpset_long(var, val, val | bit) == 0);

sys/dev/drm/include/linux/bitops.h

356

return !!(val & bit);

sys/dev/drm/include/linux/compiler.h

82

#define WRITE_ONCE(x, val) ({ \

sys/dev/drm/include/linux/compiler.h

83

typeof(x) __tmp = (val); \

sys/dev/drm/include/linux/hash.h

32

static inline u64 hash_64(u64 val, unsigned int bits)

sys/dev/drm/include/linux/hash.h

36

ret = (uint64_t)hash32_buf(&val, sizeof(val), bits);

sys/dev/drm/include/linux/hash.h

41

static inline u32 hash_32(u32 val, unsigned int bits)

sys/dev/drm/include/linux/hash.h

45

ret = hash32_buf(&val, sizeof(val), bits);

sys/dev/drm/include/linux/hash.h

51

#define hash_long(val, bits) hash_64(val, bits)

sys/dev/drm/include/linux/hash.h

53

#define hash_long(val, bits) hash_32(val, bits)

sys/dev/drm/include/linux/kernel.h

87

#define clamp_val(val, lo, hi) clamp_t(typeof(val), val, lo, hi)

sys/dev/drm/include/linux/notifier.h

72

unsigned long val, void *v)

sys/dev/drm/include/linux/pci.h

122

pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val)

sys/dev/drm/include/linux/pci.h

124

*val = (u8)pci_read_config(pdev->dev.bsddev, where, 1);

sys/dev/drm/include/linux/pci.h

129

pci_read_config_word(struct pci_dev *pdev, int where, u16 *val)

sys/dev/drm/include/linux/pci.h

131

*val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);

sys/dev/drm/include/linux/pci.h

136

pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val)

sys/dev/drm/include/linux/pci.h

138

*val = (u32)pci_read_config(pdev->dev.bsddev, where, 4);

sys/dev/drm/include/linux/pci.h

143

pci_write_config_byte(struct pci_dev *pdev, int where, u8 val)

sys/dev/drm/include/linux/pci.h

145

pci_write_config(pdev->dev.bsddev, where, val, 1);

sys/dev/drm/include/linux/pci.h

150

pci_write_config_word(struct pci_dev *pdev, int where, u16 val)

sys/dev/drm/include/linux/pci.h

152

pci_write_config(pdev->dev.bsddev, where, val, 2);

sys/dev/drm/include/linux/pci.h

157

pci_write_config_dword(struct pci_dev *pdev, int where, u32 val)

sys/dev/drm/include/linux/pci.h

159

pci_write_config(pdev->dev.bsddev, where, val, 4);

sys/dev/drm/include/linux/pci.h

316

pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val)

sys/dev/drm/include/linux/pci.h

320

*val = (u8)pci_read_config(pdev->dev.bsddev, where, 1);

sys/dev/drm/include/linux/pci.h

325

pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val)

sys/dev/drm/include/linux/pci.h

329

*val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);

sys/dev/drm/include/linux/pci.h

554

int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);

sys/dev/drm/include/uapi/drm/drm_fourcc.h

230

#define fourcc_mod_code(vendor, val) \

sys/dev/drm/include/uapi/drm/drm_fourcc.h

231

((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | ((val) & 0x00ffffffffffffffULL))

sys/dev/drm/include/uapi/drm/drm_fourcc.h

457

#define fourcc_mod_broadcom_code(val, params) \

sys/dev/drm/include/uapi/drm/drm_fourcc.h

458

fourcc_mod_code(BROADCOM, ((((__u64)params) << __fourcc_mod_broadcom_param_shift) | val))

sys/dev/drm/include/uapi/drm/i915_drm.h

1427

__u64 val; /* Return value */

sys/dev/drm/radeon/atom.c

180

uint32_t idx, val = 0xCDCDCDCD, align, arg;

sys/dev/drm/radeon/atom.c

197

val = gctx->card->reg_read(gctx->card, idx);

sys/dev/drm/radeon/atom.c

218

val =

sys/dev/drm/radeon/atom.c

229

val = get_unaligned_le32((u32 *)&ctx->ps[idx]);

sys/dev/drm/radeon/atom.c

231

ATOM_DEBUG_PRINT("PS[0x%02X,0x%04X]", idx, val);

sys/dev/drm/radeon/atom.c

240

val = gctx->divmul[0];

sys/dev/drm/radeon/atom.c

243

val = gctx->divmul[1];

sys/dev/drm/radeon/atom.c

246

val = gctx->data_block;

sys/dev/drm/radeon/atom.c

249

val = gctx->shift;

sys/dev/drm/radeon/atom.c

252

val = 1 << gctx->shift;

sys/dev/drm/radeon/atom.c

255

val = ~(1 << gctx->shift);

sys/dev/drm/radeon/atom.c

258

val = gctx->fb_base;

sys/dev/drm/radeon/atom.c

261

val = gctx->io_attr;

sys/dev/drm/radeon/atom.c

264

val = gctx->reg_block;

sys/dev/drm/radeon/atom.c

267

val = ctx->ws[idx];

sys/dev/drm/radeon/atom.c

279

val = U32(idx + gctx->data_block);

sys/dev/drm/radeon/atom.c

287

val = 0;

sys/dev/drm/radeon/atom.c

289

val = gctx->scratch[(gctx->fb_base / 4) + idx];

sys/dev/drm/radeon/atom.c

296

val = U32(*ptr);

sys/dev/drm/radeon/atom.c

299

ATOM_DEBUG_PRINT("IMM 0x%08X\n", val);

sys/dev/drm/radeon/atom.c

300

return val;

sys/dev/drm/radeon/atom.c

304

val = U16(*ptr);

sys/dev/drm/radeon/atom.c

307

ATOM_DEBUG_PRINT("IMM 0x%04X\n", val);

sys/dev/drm/radeon/atom.c

308

return val;

sys/dev/drm/radeon/atom.c

313

val = U8(*ptr);

sys/dev/drm/radeon/atom.c

316

ATOM_DEBUG_PRINT("IMM 0x%02X\n", val);

sys/dev/drm/radeon/atom.c

317

return val;

sys/dev/drm/radeon/atom.c

325

val = gctx->card->pll_read(gctx->card, idx);

sys/dev/drm/radeon/atom.c

332

val = gctx->card->mc_read(gctx->card, idx);

sys/dev/drm/radeon/atom.c

336

*saved = val;

sys/dev/drm/radeon/atom.c

337

val &= atom_arg_mask[align];

sys/dev/drm/radeon/atom.c

338

val >>= atom_arg_shift[align];

sys/dev/drm/radeon/atom.c

342

ATOM_DEBUG_PRINT(".[31:0] -> 0x%08X\n", val);

sys/dev/drm/radeon/atom.c

345

ATOM_DEBUG_PRINT(".[15:0] -> 0x%04X\n", val);

sys/dev/drm/radeon/atom.c

348

ATOM_DEBUG_PRINT(".[23:8] -> 0x%04X\n", val);

sys/dev/drm/radeon/atom.c

351

ATOM_DEBUG_PRINT(".[31:16] -> 0x%04X\n", val);

sys/dev/drm/radeon/atom.c

354

ATOM_DEBUG_PRINT(".[7:0] -> 0x%02X\n", val);

sys/dev/drm/radeon/atom.c

357

ATOM_DEBUG_PRINT(".[15:8] -> 0x%02X\n", val);

sys/dev/drm/radeon/atom.c

360

ATOM_DEBUG_PRINT(".[23:16] -> 0x%02X\n", val);

sys/dev/drm/radeon/atom.c

363

ATOM_DEBUG_PRINT(".[31:24] -> 0x%02X\n", val);

sys/dev/drm/radeon/atom.c

366

return val;

sys/dev/drm/radeon/atom.c

412

uint32_t val = 0xCDCDCDCD;

sys/dev/drm/radeon/atom.c

416

val = U32(*ptr);

sys/dev/drm/radeon/atom.c

422

val = U16(*ptr);

sys/dev/drm/radeon/atom.c

429

val = U8(*ptr);

sys/dev/drm/radeon/atom.c

433

return val;

sys/dev/drm/radeon/atom.c

453

int *ptr, uint32_t val, uint32_t saved)

sys/dev/drm/radeon/atom.c

457

val, idx;

sys/dev/drm/radeon/atom.c

460

val <<= atom_arg_shift[align];

sys/dev/drm/radeon/atom.c

461

val &= atom_arg_mask[align];

sys/dev/drm/radeon/atom.c

463

val |= saved;

sys/dev/drm/radeon/atom.c

474

val << 2);

sys/dev/drm/radeon/atom.c

476

gctx->card->reg_write(gctx->card, idx, val);

sys/dev/drm/radeon/atom.c

498

idx, val);

sys/dev/drm/radeon/atom.c

505

ctx->ps[idx] = cpu_to_le32(val);

sys/dev/drm/radeon/atom.c

513

gctx->divmul[0] = val;

sys/dev/drm/radeon/atom.c

516

gctx->divmul[1] = val;

sys/dev/drm/radeon/atom.c

519

gctx->data_block = val;

sys/dev/drm/radeon/atom.c

522

gctx->shift = val;

sys/dev/drm/radeon/atom.c

528

gctx->fb_base = val;

sys/dev/drm/radeon/atom.c

531

gctx->io_attr = val;

sys/dev/drm/radeon/atom.c

534

gctx->reg_block = val;

sys/dev/drm/radeon/atom.c

537

ctx->ws[idx] = val;

sys/dev/drm/radeon/atom.c

547

gctx->scratch[(gctx->fb_base / 4) + idx] = val;

sys/dev/drm/radeon/atom.c

554

gctx->card->pll_write(gctx->card, idx, val);

sys/dev/drm/radeon/atom.c

560

gctx->card->mc_write(gctx->card, idx, val);

sys/dev/drm/radeon/atom.c

819

uint8_t val = U8((*ptr)++);

sys/dev/drm/radeon/atom.c

820

ATOM_SDEBUG_PRINT("POST card output: 0x%02X\n", val);

sys/dev/drm/radeon/atom.c

980

uint32_t src, val, target;

sys/dev/drm/radeon/atom.c

987

val =

sys/dev/drm/radeon/atom.c

991

if (val == src) {

sys/dev/drm/radeon/atombios_encoders.c

187

int err, val;

sys/dev/drm/radeon/atombios_encoders.c

189

val = RADEON_MAX_BL_LEVEL;

sys/dev/drm/radeon/atombios_encoders.c

190

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/drm/radeon/atombios_encoders.c

202

int err, val;

sys/dev/drm/radeon/atombios_encoders.c

206

val = dig->backlight_level;

sys/dev/drm/radeon/atombios_encoders.c

208

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/drm/radeon/atombios_encoders.c

212

if (dig->backlight_level != val && val >= 0 &&

sys/dev/drm/radeon/atombios_encoders.c

213

val <= RADEON_MAX_BL_LEVEL) {

sys/dev/drm/radeon/atombios_encoders.c

214

atombios_set_backlight_level(encoder, val);

sys/dev/drm/radeon/btc_dpm.c

1766

u32 val;

sys/dev/drm/radeon/btc_dpm.c

1771

val = (arb_registers->mc_arb_rfsh_rate & POWERMODE0_MASK) >>

sys/dev/drm/radeon/btc_dpm.c

1773

WREG32_P(MC_ARB_RFSH_RATE, POWERMODE0(val), ~POWERMODE0_MASK);

sys/dev/drm/radeon/btc_dpm.c

1775

val = (arb_registers->mc_arb_burst_time & STATE0_MASK) >>

sys/dev/drm/radeon/btc_dpm.c

1777

WREG32_P(MC_ARB_BURST_TIME, STATE0(val), ~STATE0_MASK);

sys/dev/drm/radeon/btc_dpm.c

1809

u32 val;

sys/dev/drm/radeon/btc_dpm.c

1817

val = rv770_calculate_memory_refresh_rate(rdev, ulv_pl->sclk);

sys/dev/drm/radeon/btc_dpm.c

1818

WREG32_P(MC_ARB_RFSH_RATE, POWERMODE0(val), ~POWERMODE0_MASK);

sys/dev/drm/radeon/btc_dpm.c

1820

val = cypress_calculate_burst_time(rdev, ulv_pl->sclk, ulv_pl->mclk);

sys/dev/drm/radeon/btc_dpm.c

1821

WREG32_P(MC_ARB_BURST_TIME, STATE0(val), ~STATE0_MASK);

sys/dev/drm/radeon/cik.c

145

u32 reg, u32 *val)

sys/dev/drm/radeon/cik.c

160

*val = RREG32(reg);

sys/dev/drm/radeon/evergreen.c

1079

u32 reg, u32 *val)

sys/dev/drm/radeon/evergreen.c

1089

*val = RREG32(reg);

sys/dev/drm/radeon/evergreen_hdmi.c

343

uint32_t val;

sys/dev/drm/radeon/evergreen_hdmi.c

345

val = RREG32(HDMI_CONTROL + offset);

sys/dev/drm/radeon/evergreen_hdmi.c

346

val &= ~HDMI_DEEP_COLOR_ENABLE;

sys/dev/drm/radeon/evergreen_hdmi.c

347

val &= ~HDMI_DEEP_COLOR_DEPTH_MASK;

sys/dev/drm/radeon/evergreen_hdmi.c

359

val |= HDMI_DEEP_COLOR_ENABLE;

sys/dev/drm/radeon/evergreen_hdmi.c

360

val |= HDMI_DEEP_COLOR_DEPTH(HDMI_30BIT_DEEP_COLOR);

sys/dev/drm/radeon/evergreen_hdmi.c

365

val |= HDMI_DEEP_COLOR_ENABLE;

sys/dev/drm/radeon/evergreen_hdmi.c

366

val |= HDMI_DEEP_COLOR_DEPTH(HDMI_36BIT_DEEP_COLOR);

sys/dev/drm/radeon/evergreen_hdmi.c

372

WREG32(HDMI_CONTROL + offset, val);

sys/dev/drm/radeon/evergreen_hdmi.c

481

uint32_t val;

sys/dev/drm/radeon/evergreen_hdmi.c

491

val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset);

sys/dev/drm/radeon/evergreen_hdmi.c

492

val &= ~EVERGREEN_DP_SEC_N_BASE_MULTIPLE(0xf);

sys/dev/drm/radeon/evergreen_hdmi.c

495

val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(3);

sys/dev/drm/radeon/evergreen_hdmi.c

497

val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(5);

sys/dev/drm/radeon/evergreen_hdmi.c

499

WREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset, val);

sys/dev/drm/radeon/ni.c

872

u32 reg, u32 *val)

sys/dev/drm/radeon/ni.c

883

*val = RREG32(reg);

sys/dev/drm/radeon/r600.c

165

u32 reg, u32 *val)

sys/dev/drm/radeon/r600.c

173

*val = RREG32(reg);

sys/dev/drm/radeon/r600.c

1975

int r600_count_pipe_bits(uint32_t val)

sys/dev/drm/radeon/r600.c

1977

return hweight32(val);

sys/dev/drm/radeon/r600_cs.c

1401

unsigned val;

sys/dev/drm/radeon/r600_cs.c

1403

val = max(1U, size >> level);

sys/dev/drm/radeon/r600_cs.c

1405

val = roundup_pow_of_two(val);

sys/dev/drm/radeon/r600_cs.c

1406

return val;

sys/dev/drm/radeon/radeon.h

1870

int (*get_allowed_info_register)(struct radeon_device *rdev, u32 reg, u32 *val);

sys/dev/drm/radeon/radeon.h

2565

#define WREG32_P(reg, val, mask) \

sys/dev/drm/radeon/radeon.h

2569

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/radeon/radeon.h

2574

#define WREG32_PLL_P(reg, val, mask) \

sys/dev/drm/radeon/radeon.h

2578

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/radeon/radeon.h

2581

#define WREG32_SMC_P(reg, val, mask) \

sys/dev/drm/radeon/radeon.h

2585

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/radeon/radeon_asic.c

141

u32 reg, u32 *val)

sys/dev/drm/radeon/radeon_asic.h

378

int r600_count_pipe_bits(uint32_t val);

sys/dev/drm/radeon/radeon_asic.h

390

u32 reg, u32 *val);

sys/dev/drm/radeon/radeon_asic.h

570

u32 reg, u32 *val);

sys/dev/drm/radeon/radeon_asic.h

676

u32 reg, u32 *val);

sys/dev/drm/radeon/radeon_asic.h

786

u32 reg, u32 *val);

sys/dev/drm/radeon/radeon_asic.h

927

u32 reg, u32 *val);

sys/dev/drm/radeon/radeon_clocks.c

104

const u32 *val;

sys/dev/drm/radeon/radeon_clocks.c

112

val = of_get_property(dp, "ATY,RefCLK", NULL);

sys/dev/drm/radeon/radeon_clocks.c

113

if (!val || !*val) {

sys/dev/drm/radeon/radeon_clocks.c

117

p1pll->reference_freq = p2pll->reference_freq = (*val) / 10;

sys/dev/drm/radeon/radeon_clocks.c

151

val = of_get_property(dp, "ATY,SCLK", NULL);

sys/dev/drm/radeon/radeon_clocks.c

152

if (val && *val)

sys/dev/drm/radeon/radeon_clocks.c

153

rdev->clock.default_sclk = (*val) / 10;

sys/dev/drm/radeon/radeon_clocks.c

158

val = of_get_property(dp, "ATY,MCLK", NULL);

sys/dev/drm/radeon/radeon_clocks.c

159

if (val && *val)

sys/dev/drm/radeon/radeon_clocks.c

160

rdev->clock.default_mclk = (*val) / 10;

sys/dev/drm/radeon/radeon_combios.c

2882

uint32_t reg, val, and_mask, or_mask;

sys/dev/drm/radeon/radeon_combios.c

2902

val = RBIOS32(index);

sys/dev/drm/radeon/radeon_combios.c

2904

WREG32(reg, val);

sys/dev/drm/radeon/radeon_combios.c

2912

val = RREG32(reg);

sys/dev/drm/radeon/radeon_combios.c

2913

val = (val & and_mask) | or_mask;

sys/dev/drm/radeon/radeon_combios.c

2914

WREG32(reg, val);

sys/dev/drm/radeon/radeon_combios.c

2917

val = RBIOS16(index);

sys/dev/drm/radeon/radeon_combios.c

2919

udelay(val);

sys/dev/drm/radeon/radeon_combios.c

2922

val = RBIOS16(index);

sys/dev/drm/radeon/radeon_combios.c

2924

mdelay(val);

sys/dev/drm/radeon/radeon_combios.c

2932

val = RBIOS8(index);

sys/dev/drm/radeon/radeon_combios.c

2936

reg, val);

sys/dev/drm/radeon/radeon_combios.c

2957

val = RBIOS32(index);

sys/dev/drm/radeon/radeon_combios.c

2958

WREG32(reg, val);

sys/dev/drm/radeon/radeon_combios.c

2966

val = RREG32(reg);

sys/dev/drm/radeon/radeon_combios.c

2967

val = (val & and_mask) | or_mask;

sys/dev/drm/radeon/radeon_combios.c

2968

WREG32(reg, val);

sys/dev/drm/radeon/radeon_combios.c

2971

val = RBIOS16(index);

sys/dev/drm/radeon/radeon_combios.c

2973

udelay(val);

sys/dev/drm/radeon/radeon_combios.c

2981

val = RREG32_PLL(reg);

sys/dev/drm/radeon/radeon_combios.c

2982

val = (val & and_mask) | or_mask;

sys/dev/drm/radeon/radeon_combios.c

2983

WREG32_PLL(reg, val);

sys/dev/drm/radeon/radeon_combios.c

2987

val = RBIOS8(index);

sys/dev/drm/radeon/radeon_combios.c

2991

reg, val);

sys/dev/drm/radeon/radeon_combios.c

3013

uint32_t val, and_mask, or_mask;

sys/dev/drm/radeon/radeon_combios.c

3019

val = RBIOS32(offset);

sys/dev/drm/radeon/radeon_combios.c

3021

WREG32(addr, val);

sys/dev/drm/radeon/radeon_combios.c

3024

val = RBIOS32(offset);

sys/dev/drm/radeon/radeon_combios.c

3026

WREG32(addr, val);

sys/dev/drm/radeon/radeon_combios.c

3049

val = RBIOS16(offset);

sys/dev/drm/radeon/radeon_combios.c

3051

udelay(val);

sys/dev/drm/radeon/radeon_combios.c

3054

val = RBIOS16(offset);

sys/dev/drm/radeon/radeon_combios.c

3058

while (val--) {

sys/dev/drm/radeon/radeon_combios.c

3067

while (val--) {

sys/dev/drm/radeon/radeon_combios.c

3092

uint32_t val, shift, tmp;

sys/dev/drm/radeon/radeon_combios.c

3098

val = RBIOS32(offset);

sys/dev/drm/radeon/radeon_combios.c

3100

WREG32_PLL(addr, val);

sys/dev/drm/radeon/radeon_combios.c

3181

uint8_t val = RBIOS8(offset);

sys/dev/drm/radeon/radeon_combios.c

3182

while (val != 0xff) {

sys/dev/drm/radeon/radeon_combios.c

3185

if (val == 0x0f) {

sys/dev/drm/radeon/radeon_combios.c

3210

or_mask = val << 24;

sys/dev/drm/radeon/radeon_combios.c

3216

val = RBIOS8(offset);

sys/dev/drm/radeon/radeon_connectors.c

555

uint64_t val)

sys/dev/drm/radeon/radeon_connectors.c

577

new_coherent_mode = val ? true : false;

sys/dev/drm/radeon/radeon_connectors.c

593

if (radeon_connector->audio != val) {

sys/dev/drm/radeon/radeon_connectors.c

594

radeon_connector->audio = val;

sys/dev/drm/radeon/radeon_connectors.c

608

if (radeon_connector->dither != val) {

sys/dev/drm/radeon/radeon_connectors.c

609

radeon_connector->dither = val;

sys/dev/drm/radeon/radeon_connectors.c

622

if (radeon_encoder->underscan_type != val) {

sys/dev/drm/radeon/radeon_connectors.c

623

radeon_encoder->underscan_type = val;

sys/dev/drm/radeon/radeon_connectors.c

636

if (radeon_encoder->underscan_hborder != val) {

sys/dev/drm/radeon/radeon_connectors.c

637

radeon_encoder->underscan_hborder = val;

sys/dev/drm/radeon/radeon_connectors.c

650

if (radeon_encoder->underscan_vborder != val) {

sys/dev/drm/radeon/radeon_connectors.c

651

radeon_encoder->underscan_vborder = val;

sys/dev/drm/radeon/radeon_connectors.c

671

dac_int->tv_std = val;

sys/dev/drm/radeon/radeon_connectors.c

675

dac_int->tv_std = val;

sys/dev/drm/radeon/radeon_connectors.c

684

if (val == 0)

sys/dev/drm/radeon/radeon_connectors.c

704

if (val == 0) {

sys/dev/drm/radeon/radeon_connectors.c

710

if (val == 1 || ret == false) {

sys/dev/drm/radeon/radeon_connectors.c

726

switch (val) {

sys/dev/drm/radeon/radeon_connectors.c

753

if (radeon_encoder->output_csc == val)

sys/dev/drm/radeon/radeon_connectors.c

756

radeon_encoder->output_csc = val;

sys/dev/drm/radeon/radeon_device.c

842

static void cail_pll_write(struct card_info *info, uint32_t reg, uint32_t val)

sys/dev/drm/radeon/radeon_device.c

846

rdev->pll_wreg(rdev, reg, val);

sys/dev/drm/radeon/radeon_device.c

876

static void cail_mc_write(struct card_info *info, uint32_t reg, uint32_t val)

sys/dev/drm/radeon/radeon_device.c

880

rdev->mc_wreg(rdev, reg, val);

sys/dev/drm/radeon/radeon_device.c

892

static void cail_reg_write(struct card_info *info, uint32_t reg, uint32_t val)

sys/dev/drm/radeon/radeon_device.c

896

WREG32(reg*4, val);

sys/dev/drm/radeon/radeon_device.c

926

static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)

sys/dev/drm/radeon/radeon_device.c

930

WREG32_IO(reg*4, val);

sys/dev/drm/radeon/radeon_dp_mst.c

166

uint32_t val, temp;

sys/dev/drm/radeon/radeon_dp_mst.c

172

val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y);

sys/dev/drm/radeon/radeon_dp_mst.c

174

WREG32(NI_DP_MSE_RATE_CNTL + offset, val);

sys/dev/drm/radeon/radeon_dp_mst.c

69

u32 temp, val;

sys/dev/drm/radeon/radeon_dp_mst.c

78

val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe);

sys/dev/drm/radeon/radeon_dp_mst.c

80

val <<= (16 * satidx);

sys/dev/drm/radeon/radeon_dp_mst.c

84

temp |= val;

sys/dev/drm/radeon/radeon_i2c.c

1055

u8 *val)

sys/dev/drm/radeon/radeon_i2c.c

1078

*val = in_buf[0];

sys/dev/drm/radeon/radeon_i2c.c

1079

DRM_DEBUG("val = 0x%02x\n", *val);

sys/dev/drm/radeon/radeon_i2c.c

1082

addr, *val);

sys/dev/drm/radeon/radeon_i2c.c

1089

u8 val)

sys/dev/drm/radeon/radeon_i2c.c

1100

out_buf[1] = val;

sys/dev/drm/radeon/radeon_i2c.c

1104

addr, val);

sys/dev/drm/radeon/radeon_i2c.c

1110

u8 val;

sys/dev/drm/radeon/radeon_i2c.c

1120

0x3, &val);

sys/dev/drm/radeon/radeon_i2c.c

1121

val &= ~radeon_connector->router.ddc_mux_control_pin;

sys/dev/drm/radeon/radeon_i2c.c

1124

0x3, val);

sys/dev/drm/radeon/radeon_i2c.c

1127

0x1, &val);

sys/dev/drm/radeon/radeon_i2c.c

1128

val &= ~radeon_connector->router.ddc_mux_control_pin;

sys/dev/drm/radeon/radeon_i2c.c

1129

val |= radeon_connector->router.ddc_mux_state;

sys/dev/drm/radeon/radeon_i2c.c

1132

0x1, val);

sys/dev/drm/radeon/radeon_i2c.c

1138

u8 val;

sys/dev/drm/radeon/radeon_i2c.c

1148

0x3, &val);

sys/dev/drm/radeon/radeon_i2c.c

1149

val &= ~radeon_connector->router.cd_mux_control_pin;

sys/dev/drm/radeon/radeon_i2c.c

1152

0x3, val);

sys/dev/drm/radeon/radeon_i2c.c

1155

0x1, &val);

sys/dev/drm/radeon/radeon_i2c.c

1156

val &= ~radeon_connector->router.cd_mux_control_pin;

sys/dev/drm/radeon/radeon_i2c.c

1157

val |= radeon_connector->router.cd_mux_state;

sys/dev/drm/radeon/radeon_i2c.c

1160

0x1, val);

sys/dev/drm/radeon/radeon_i2c.c

184

uint32_t val;

sys/dev/drm/radeon/radeon_i2c.c

187

val = RREG32(rec->y_clk_reg);

sys/dev/drm/radeon/radeon_i2c.c

188

val &= rec->y_clk_mask;

sys/dev/drm/radeon/radeon_i2c.c

190

return (val != 0);

sys/dev/drm/radeon/radeon_i2c.c

199

uint32_t val;

sys/dev/drm/radeon/radeon_i2c.c

202

val = RREG32(rec->y_data_reg);

sys/dev/drm/radeon/radeon_i2c.c

203

val &= rec->y_data_mask;

sys/dev/drm/radeon/radeon_i2c.c

205

return (val != 0);

sys/dev/drm/radeon/radeon_i2c.c

213

uint32_t val;

sys/dev/drm/radeon/radeon_i2c.c

216

val = RREG32(rec->en_clk_reg) & ~rec->en_clk_mask;

sys/dev/drm/radeon/radeon_i2c.c

217

val |= clock ? 0 : rec->en_clk_mask;

sys/dev/drm/radeon/radeon_i2c.c

218

WREG32(rec->en_clk_reg, val);

sys/dev/drm/radeon/radeon_i2c.c

226

uint32_t val;

sys/dev/drm/radeon/radeon_i2c.c

229

val = RREG32(rec->en_data_reg) & ~rec->en_data_mask;

sys/dev/drm/radeon/radeon_i2c.c

230

val |= data ? 0 : rec->en_data_mask;

sys/dev/drm/radeon/radeon_i2c.c

231

WREG32(rec->en_data_reg, val);

sys/dev/drm/radeon/radeon_mode.h

797

u8 *val);

sys/dev/drm/radeon/radeon_mode.h

801

u8 val);

sys/dev/drm/radeon/si.c

1299

u32 reg, u32 *val)

sys/dev/drm/radeon/si.c

1311

*val = RREG32(reg);

sys/dev/drm/radeon/trinity_dpm.c

891

u32 val;

sys/dev/drm/radeon/trinity_dpm.c

896

val = (p + tp - 1) / tp;

sys/dev/drm/radeon/trinity_dpm.c

898

WREG32_SMC(SMU_UVD_DPM_CNTL, val);

sys/dev/drm/radeon/vce_v1_0.c

183

if (le32_to_cpu(sign->val[i].chip_id) == chip_id)

sys/dev/drm/radeon/vce_v1_0.c

191

data[0] = sign->val[i].nonce[0];

sys/dev/drm/radeon/vce_v1_0.c

192

data[1] = sign->val[i].nonce[1];

sys/dev/drm/radeon/vce_v1_0.c

193

data[2] = sign->val[i].nonce[2];

sys/dev/drm/radeon/vce_v1_0.c

194

data[3] = sign->val[i].nonce[3];

sys/dev/drm/radeon/vce_v1_0.c

201

data[0] = sign->val[i].sigval[0];

sys/dev/drm/radeon/vce_v1_0.c

202

data[1] = sign->val[i].sigval[1];

sys/dev/drm/radeon/vce_v1_0.c

203

data[2] = sign->val[i].sigval[2];

sys/dev/drm/radeon/vce_v1_0.c

204

data[3] = sign->val[i].sigval[3];

sys/dev/drm/radeon/vce_v1_0.c

206

rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect);

sys/dev/drm/radeon/vce_v1_0.c

48

} val[8];

sys/dev/drm/ttm/ttm_memory.c

100

val = zone->swap_limit;

sys/dev/drm/ttm/ttm_memory.c

102

val = zone->used_mem;

sys/dev/drm/ttm/ttm_memory.c

106

(unsigned long long) val >> 10);

sys/dev/drm/ttm/ttm_memory.c

119

unsigned long val;

sys/dev/drm/ttm/ttm_memory.c

122

chars = ksscanf(buffer, "%lu", &val);

sys/dev/drm/ttm/ttm_memory.c

126

val64 = val;

sys/dev/drm/ttm/ttm_memory.c

90

uint64_t val = 0;

sys/dev/drm/ttm/ttm_memory.c

94

val = zone->zone_mem;

sys/dev/drm/ttm/ttm_memory.c

96

val = zone->emer_mem;

sys/dev/drm/ttm/ttm_memory.c

98

val = zone->max_mem;

sys/dev/drm/ttm/ttm_page_alloc.c

166

unsigned val;

sys/dev/drm/ttm/ttm_page_alloc.c

167

chars = ksscanf(buffer, "%u", &val);

sys/dev/drm/ttm/ttm_page_alloc.c

172

val = val / (PAGE_SIZE >> 10);

sys/dev/drm/ttm/ttm_page_alloc.c

175

m->options.max_size = val;

sys/dev/drm/ttm/ttm_page_alloc.c

177

m->options.small = val;

sys/dev/drm/ttm/ttm_page_alloc.c

179

if (val > NUM_PAGES_TO_ALLOC*8) {

sys/dev/drm/ttm/ttm_page_alloc.c

184

} else if (val > NUM_PAGES_TO_ALLOC) {

sys/dev/drm/ttm/ttm_page_alloc.c

188

m->options.alloc_size = val;

sys/dev/drm/ttm/ttm_page_alloc.c

199

unsigned val = 0;

sys/dev/drm/ttm/ttm_page_alloc.c

202

val = m->options.max_size;

sys/dev/drm/ttm/ttm_page_alloc.c

204

val = m->options.small;

sys/dev/drm/ttm/ttm_page_alloc.c

206

val = m->options.alloc_size;

sys/dev/drm/ttm/ttm_page_alloc.c

208

val = val * (PAGE_SIZE >> 10);

sys/dev/drm/ttm/ttm_page_alloc.c

210

return ksnprintf(buffer, PAGE_SIZE, "%u\n", val);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

207

unsigned val;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

209

chars = sscanf(buffer, "%u", &val);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

214

val = val / (PAGE_SIZE >> 10);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

217

m->options.max_size = val;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

219

m->options.small = val;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

221

if (val > NUM_PAGES_TO_ALLOC*8) {

sys/dev/drm/ttm/ttm_page_alloc_dma.c

226

} else if (val > NUM_PAGES_TO_ALLOC) {

sys/dev/drm/ttm/ttm_page_alloc_dma.c

230

m->options.alloc_size = val;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

241

unsigned val = 0;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

244

val = m->options.max_size;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

246

val = m->options.small;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

248

val = m->options.alloc_size;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

250

val = val * (PAGE_SIZE >> 10);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

252

return snprintf(buffer, PAGE_SIZE, "%u\n", val);

sys/dev/misc/amdsbwd/amdsbwd.c

137

pmio_write(struct resource *res, uint8_t reg, uint8_t val)

sys/dev/misc/amdsbwd/amdsbwd.c

140

bus_write_1(res, 1, val); /* Data */

sys/dev/misc/amdsbwd/amdsbwd.c

150

wdctrl_write(struct amdsbwd_softc *sc, uint32_t val)

sys/dev/misc/amdsbwd/amdsbwd.c

152

bus_write_4(sc->res_ctrl, 0, val);

sys/dev/misc/amdsbwd/amdsbwd.c

162

wdcount_write(struct amdsbwd_softc *sc, uint32_t val)

sys/dev/misc/amdsbwd/amdsbwd.c

164

bus_write_4(sc->res_count, 0, val);

sys/dev/misc/amdsbwd/amdsbwd.c

170

uint32_t val;

sys/dev/misc/amdsbwd/amdsbwd.c

172

val = wdctrl_read(sc);

sys/dev/misc/amdsbwd/amdsbwd.c

173

val |= AMDSB_WD_RUN;

sys/dev/misc/amdsbwd/amdsbwd.c

174

wdctrl_write(sc, val);

sys/dev/misc/amdsbwd/amdsbwd.c

182

uint32_t val;

sys/dev/misc/amdsbwd/amdsbwd.c

184

val = wdctrl_read(sc);

sys/dev/misc/amdsbwd/amdsbwd.c

185

val &= ~AMDSB_WD_RUN;

sys/dev/misc/amdsbwd/amdsbwd.c

186

wdctrl_write(sc, val);

sys/dev/misc/amdsbwd/amdsbwd.c

194

uint32_t val;

sys/dev/misc/amdsbwd/amdsbwd.c

196

val = wdctrl_read(sc);

sys/dev/misc/amdsbwd/amdsbwd.c

197

val |= AMDSB_WD_RELOAD;

sys/dev/misc/amdsbwd/amdsbwd.c

198

wdctrl_write(sc, val);

sys/dev/misc/amdsbwd/amdsbwd.c

264

uint8_t val;

sys/dev/misc/amdsbwd/amdsbwd.c

268

val = pmio_read(pmres, AMDSB_PM_RESET_STATUS0);

sys/dev/misc/amdsbwd/amdsbwd.c

269

if (val != 0)

sys/dev/misc/amdsbwd/amdsbwd.c

270

amdsbwd_verbose_printf(dev, "ResetStatus0 = %#04x\n", val);

sys/dev/misc/amdsbwd/amdsbwd.c

271

val = pmio_read(pmres, AMDSB_PM_RESET_STATUS1);

sys/dev/misc/amdsbwd/amdsbwd.c

272

if (val != 0)

sys/dev/misc/amdsbwd/amdsbwd.c

273

amdsbwd_verbose_printf(dev, "ResetStatus1 = %#04x\n", val);

sys/dev/misc/amdsbwd/amdsbwd.c

274

if ((val & AMDSB_WD_RST_STS) != 0)

sys/dev/misc/amdsbwd/amdsbwd.c

285

val = pmio_read(pmres, AMDSB_PM_WDT_CTRL);

sys/dev/misc/amdsbwd/amdsbwd.c

286

val &= ~AMDSB_WDT_RES_MASK;

sys/dev/misc/amdsbwd/amdsbwd.c

287

val |= AMDSB_WDT_RES_1S;

sys/dev/misc/amdsbwd/amdsbwd.c

288

pmio_write(pmres, AMDSB_PM_WDT_CTRL, val);

sys/dev/misc/amdsbwd/amdsbwd.c

291

val = pmio_read(pmres, AMDSB_PM_WDT_CTRL);

sys/dev/misc/amdsbwd/amdsbwd.c

292

val &= ~AMDSB_WDT_DISABLE;

sys/dev/misc/amdsbwd/amdsbwd.c

293

pmio_write(pmres, AMDSB_PM_WDT_CTRL, val);

sys/dev/misc/amdsbwd/amdsbwd.c

305

uint32_t val;

sys/dev/misc/amdsbwd/amdsbwd.c

310

val = pmio_read(pmres, AMDSB8_PM_RESET_CTRL);

sys/dev/misc/amdsbwd/amdsbwd.c

311

if ((val & AMDSB8_RST_STS_DIS) != 0) {

sys/dev/misc/amdsbwd/amdsbwd.c

312

val &= ~AMDSB8_RST_STS_DIS;

sys/dev/misc/amdsbwd/amdsbwd.c

313

pmio_write(pmres, AMDSB8_PM_RESET_CTRL, val);

sys/dev/misc/amdsbwd/amdsbwd.c

315

val = 0;

sys/dev/misc/amdsbwd/amdsbwd.c

317

val <<= 8;

sys/dev/misc/amdsbwd/amdsbwd.c

318

val |= pmio_read(pmres, AMDSB8_PM_RESET_STATUS + i);

sys/dev/misc/amdsbwd/amdsbwd.c

320

if (val != 0)

sys/dev/misc/amdsbwd/amdsbwd.c

321

amdsbwd_verbose_printf(dev, "ResetStatus = 0x%08x\n", val);

sys/dev/misc/amdsbwd/amdsbwd.c

322

if ((val & AMDSB8_WD_RST_STS) != 0)

sys/dev/misc/amdsbwd/amdsbwd.c

333

val = pmio_read(pmres, AMDSB8_PM_WDT_CTRL);

sys/dev/misc/amdsbwd/amdsbwd.c

334

val &= ~AMDSB8_WDT_RES_MASK;

sys/dev/misc/amdsbwd/amdsbwd.c

335

val |= AMDSB8_WDT_1HZ;

sys/dev/misc/amdsbwd/amdsbwd.c

336

pmio_write(pmres, AMDSB8_PM_WDT_CTRL, val);

sys/dev/misc/amdsbwd/amdsbwd.c

338

val = pmio_read(pmres, AMDSB8_PM_WDT_CTRL);

sys/dev/misc/amdsbwd/amdsbwd.c

339

amdsbwd_verbose_printf(dev, "AMDSB8_PM_WDT_CTRL value = %#04x\n", val);

sys/dev/misc/amdsbwd/amdsbwd.c

346

val = pmio_read(pmres, AMDSB8_PM_WDT_EN);

sys/dev/misc/amdsbwd/amdsbwd.c

347

val &= ~AMDSB8_WDT_DISABLE;

sys/dev/misc/amdsbwd/amdsbwd.c

348

val |= AMDSB8_WDT_DEC_EN;

sys/dev/misc/amdsbwd/amdsbwd.c

349

pmio_write(pmres, AMDSB8_PM_WDT_EN, val);

sys/dev/misc/amdsbwd/amdsbwd.c

351

val = pmio_read(pmres, AMDSB8_PM_WDT_EN);

sys/dev/misc/amdsbwd/amdsbwd.c

352

device_printf(dev, "AMDSB8_PM_WDT_EN value = %#02x\n", val);

sys/dev/misc/amdsbwd/amdsbwd.c

361

uint8_t val;

sys/dev/misc/amdsbwd/amdsbwd.c

364

val = bus_read_1(pmres, AMDFCH41_PM_DECODE_EN0);

sys/dev/misc/amdsbwd/amdsbwd.c

365

val |= AMDFCH41_WDT_EN;

sys/dev/misc/amdsbwd/amdsbwd.c

366

bus_write_1(pmres, AMDFCH41_PM_DECODE_EN0, val);

sys/dev/misc/amdsbwd/amdsbwd.c

367

val = bus_read_1(pmres, AMDFCH41_PM_DECODE_EN0);

sys/dev/misc/amdsbwd/amdsbwd.c

368

if ((val & AMDFCH41_WDT_EN) == 0) {

sys/dev/misc/amdsbwd/amdsbwd.c

375

val);

sys/dev/misc/amdsbwd/amdsbwd.c

378

val = bus_read_1(pmres, AMDFCH41_PM_ISA_CTRL);

sys/dev/misc/amdsbwd/amdsbwd.c

379

if ((val & AMDFCH41_MMIO_EN) != 0) {

sys/dev/misc/amdsbwd/amdsbwd.c

393

val = bus_read_1(pmres, AMDFCH41_PM_DECODE_EN3);

sys/dev/misc/amdsbwd/amdsbwd.c

394

val &= ~AMDFCH41_WDT_RES_MASK;

sys/dev/misc/amdsbwd/amdsbwd.c

395

val |= AMDFCH41_WDT_RES_1S;

sys/dev/misc/amdsbwd/amdsbwd.c

396

val &= ~AMDFCH41_WDT_EN_MASK;

sys/dev/misc/amdsbwd/amdsbwd.c

397

val |= AMDFCH41_WDT_ENABLE;

sys/dev/misc/amdsbwd/amdsbwd.c

398

bus_write_1(pmres, AMDFCH41_PM_DECODE_EN3, val);

sys/dev/misc/amdsbwd/amdsbwd.c

400

val = bus_read_1(pmres, AMDFCH41_PM_DECODE_EN3);

sys/dev/misc/amdsbwd/amdsbwd.c

402

"AMDFCH41_PM_DECODE_EN3 value = %#04x\n", val);

sys/dev/misc/amdsbwd/amdsbwd.c

408

val = pmio_read(pmres, AMDFCH41_PM_ISA_CTRL);

sys/dev/misc/amdsbwd/amdsbwd.c

409

if ((val & AMDFCH41_MMIO_EN) != 0) {

sys/dev/misc/amdsbwd/amdsbwd.c

417

val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN0);

sys/dev/misc/amdsbwd/amdsbwd.c

418

val |= AMDFCH41_WDT_EN;

sys/dev/misc/amdsbwd/amdsbwd.c

419

pmio_write(pmres, AMDFCH41_PM_DECODE_EN0, val);

sys/dev/misc/amdsbwd/amdsbwd.c

421

val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN0);

sys/dev/misc/amdsbwd/amdsbwd.c

423

val);

sys/dev/misc/amdsbwd/amdsbwd.c

434

val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN3);

sys/dev/misc/amdsbwd/amdsbwd.c

435

val &= ~AMDFCH41_WDT_RES_MASK;

sys/dev/misc/amdsbwd/amdsbwd.c

436

val |= AMDFCH41_WDT_RES_1S;

sys/dev/misc/amdsbwd/amdsbwd.c

437

val &= ~AMDFCH41_WDT_EN_MASK;

sys/dev/misc/amdsbwd/amdsbwd.c

438

val |= AMDFCH41_WDT_ENABLE;

sys/dev/misc/amdsbwd/amdsbwd.c

439

pmio_write(pmres, AMDFCH41_PM_DECODE_EN3, val);

sys/dev/misc/amdsbwd/amdsbwd.c

441

val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN3);

sys/dev/misc/amdsbwd/amdsbwd.c

443

val);

sys/dev/misc/amdsbwd/amdsbwd.c

619

uint32_t val;

sys/dev/misc/amdsbwd/amdsbwd.c

622

val = wdctrl_read(sc);

sys/dev/misc/amdsbwd/amdsbwd.c

623

val &= ~AMDSB_WD_RUN;

sys/dev/misc/amdsbwd/amdsbwd.c

624

wdctrl_write(sc, val);

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

332

atkbdc_read_ivar(device_t bus, device_t dev, int index, u_long *val)

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

340

*val = (u_long)ivar->irq;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

343

*val = (u_long)ivar->flags;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

346

*val = (u_long)ivar->vendorid;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

349

*val = (u_long)ivar->serial;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

352

*val = (u_long)ivar->logicalid;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

355

*val = (u_long)ivar->compatid;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

367

atkbdc_write_ivar(device_t bus, device_t dev, int index, u_long val)

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

375

ivar->irq = (int)val;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

378

ivar->flags = (int)val;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

381

ivar->vendorid = (u_int32_t)val;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

384

ivar->serial = (u_int32_t)val;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

387

ivar->logicalid = (u_int32_t)val;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

390

ivar->compatid = (u_int32_t)val;

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

70

u_long *val);

sys/dev/misc/atkbdc_layer/atkbdc_isa.c

72

u_long val);

sys/dev/misc/cmx/cmx.c

339

cmx_sync_write_SCR(struct cmx_softc *sc, uint8_t val)

sys/dev/misc/cmx/cmx.c

347

cmx_write_SCR(sc, val);

sys/dev/misc/cmx/cmxvar.h

76

#define CMX_WRITE_1(sc, off, val) \

sys/dev/misc/cmx/cmxvar.h

77

(bus_space_write_1((sc)->bst, (sc)->bsh, off, val))

sys/dev/misc/cmx/cmxvar.h

81

#define cmx_write_BSR(sc, val) \

sys/dev/misc/cmx/cmxvar.h

82

CMX_WRITE_1(sc, REG_OFFSET_BSR, val)

sys/dev/misc/cmx/cmxvar.h

85

#define cmx_write_SCR(sc, val) \

sys/dev/misc/cmx/cmxvar.h

86

CMX_WRITE_1(sc, REG_OFFSET_SCR, val)

sys/dev/misc/cmx/cmxvar.h

89

#define cmx_write_DTR(sc, val) \

sys/dev/misc/cmx/cmxvar.h

90

CMX_WRITE_1(sc, REG_OFFSET_DTR, val)

sys/dev/misc/coremctl/coremctl.c

362

coremctl_mch_readreg(device_t dev, int reg, uint32_t *val)

sys/dev/misc/coremctl/coremctl.c

369

*val = CSR_READ_4(sc, reg);

sys/dev/misc/coremctl/coremctl.c

374

coremctl_mch_writereg(device_t dev, int reg, uint32_t val)

sys/dev/misc/coremctl/coremctl.c

381

CSR_WRITE_4(sc, reg, val);

sys/dev/misc/coremctl/coremctl.c

399

coremctl_pci_write_config(device_t dev, device_t child, int reg, uint32_t val,

sys/dev/misc/coremctl/coremctl.c

402

pci_write_config(dev, reg, val, width);

sys/dev/misc/coremctl/coremctl.c

73

#define CSR_WRITE_4(sc, ofs, val) \

sys/dev/misc/coremctl/coremctl.c

74

(*(volatile uint32_t *)((sc)->sc_mch + (ofs)) = (val))

sys/dev/misc/ecc/e5_imc_var.h

105

val = UBOX_READ_4(dev, c, PCI_E5_UBOX0_CPUNODEID);

sys/dev/misc/ecc/e5_imc_var.h

106

node = __SHIFTOUT(val, PCI_E5_UBOX0_CPUNODEID_LCLNODEID);

sys/dev/misc/ecc/e5_imc_var.h

74

uint32_t val;

sys/dev/misc/ecc/e5_imc_var.h

82

val = IMC_CPGC_READ_4(dev, c, PCI_E5_IMC_CPGC_MCMTR);

sys/dev/misc/ecc/e5_imc_var.h

83

if (val & c->cpgc_chandis)

sys/dev/misc/ecc/e5_imc_var.h

93

val = IMC_CTAD_READ_4(dev, c, PCI_E5_IMC_CTAD_DIMMMTR(dimm));

sys/dev/misc/ecc/e5_imc_var.h

94

if (val & PCI_E5_IMC_CTAD_DIMMMTR_DIMM_POP)

sys/dev/misc/ecc/ecc_e3.c

163

uint32_t val;

sys/dev/misc/ecc/ecc_e3.c

166

error = COREMCTL_MCH_READ(sc->ecc_parent, ofs, &val);

sys/dev/misc/ecc/ecc_e3.c

169

return val;

sys/dev/misc/ecc/ecc_e3.c

198

uint32_t val;

sys/dev/misc/ecc/ecc_e3.c

206

&val);

sys/dev/misc/ecc/ecc_e5.c

210

int val;

sys/dev/misc/ecc/ecc_e5.c

218

val = __SHIFTOUT(dimmmtr, PCI_E5_IMC_CTAD_DIMMMTR_RANK_CNT);

sys/dev/misc/ecc/ecc_e5.c

219

switch (val) {

sys/dev/misc/ecc/ecc_e5.c

236

ecc_printf(sc, "unknown rank count 0x%x\n", val);

sys/dev/misc/ecc/ecc_e5.c

241

val = __SHIFTOUT(dimmmtr, PCI_E5_IMC_CTAD_DIMMMTR_DDR3_WIDTH);

sys/dev/misc/ecc/ecc_e5.c

242

switch (val) {

sys/dev/misc/ecc/ecc_e5.c

253

ecc_printf(sc, "unknown ddr3 width 0x%x\n", val);

sys/dev/misc/ecc/ecc_e5.c

258

val = __SHIFTOUT(dimmmtr, PCI_E5_IMC_CTAD_DIMMMTR_DDR3_DNSTY);

sys/dev/misc/ecc/ecc_e5.c

259

switch (val) {

sys/dev/misc/ecc/ecc_e5.c

276

ecc_printf(sc, "unknown ddr3 density 0x%x\n", val);

sys/dev/misc/ecc/ecc_e5.c

361

uint32_t err_ranks, val;

sys/dev/misc/ecc/ecc_e5.c

363

val = pci_read_config(sc->ecc_dev, PCI_E5_IMC_ERROR_COR_ERR_STAT, 4);

sys/dev/misc/ecc/ecc_e5.c

365

err_ranks = (val & PCI_E5_IMC_ERROR_COR_ERR_STAT_RANKS);

sys/dev/misc/ecc/ecc_e5.c

395

if (val & PCI_E5_IMC_ERROR_COR_ERR_STAT_RANKS) {

sys/dev/misc/ecc/ecc_e5.c

397

val, 4);

sys/dev/misc/ecc/ecc_x3400.c

155

uint32_t val, dimms;

sys/dev/misc/ecc/ecc_x3400.c

159

val = MC_READ_4(PCI_X3400UC_MC_CTRL);

sys/dev/misc/ecc/ecc_x3400.c

160

if ((val & PCI_X3400UC_MC_CTRL_ECCEN) == 0) {

sys/dev/misc/ecc/ecc_x3400.c

165

val = MC_READ_4(PCI_X3400UC_MC_STS);

sys/dev/misc/ecc/ecc_x3400.c

166

if ((val & PCI_X3400UC_MC_STS_ECCEN) == 0) {

sys/dev/misc/ecc/ecc_x3400.c

171

val = MC_READ_4(PCI_X3400UC_MC_MAX_DOD);

sys/dev/misc/ecc/ecc_x3400.c

172

dimms = __SHIFTOUT(val, PCI_X3400UC_MC_MAX_DOD_DIMMS);

sys/dev/misc/evdev/evdev.h

106

int32_t val[MT_CNT];

sys/dev/misc/evdev/evdev.h

125

offsetof(union evdev_mt_slot, val[ABS_MT_INDEX(ABS_MT_TOOL_Y)]),

sys/dev/misc/evdev/evdev_mt.c

192

state->val[ABS_MT_INDEX(i)]);

sys/dev/misc/evdev/evdev_mt.c

444

val[ABS_MT_INDEX(code)] = value;

sys/dev/misc/evdev/evdev_mt.c

505

return (mt->slots[slot].val[ABS_MT_INDEX(code)]);

sys/dev/misc/evdev/evdev_mt.c

522

mt->slots[slot].val[ABS_MT_INDEX(code)] = value;

sys/dev/misc/ichwd/ichwd.c

247

#define ichwd_write_tco_1(sc, off, val) \

sys/dev/misc/ichwd/ichwd.c

248

bus_write_1((sc)->tco_res, (off), (val))

sys/dev/misc/ichwd/ichwd.c

249

#define ichwd_write_tco_2(sc, off, val) \

sys/dev/misc/ichwd/ichwd.c

250

bus_write_2((sc)->tco_res, (off), (val))

sys/dev/misc/ichwd/ichwd.c

251

#define ichwd_write_tco_4(sc, off, val) \

sys/dev/misc/ichwd/ichwd.c

252

bus_write_4((sc)->tco_res, (off), (val))

sys/dev/misc/ichwd/ichwd.c

253

#define ichwd_write_smi_4(sc, off, val) \

sys/dev/misc/ichwd/ichwd.c

254

bus_write_4((sc)->smi_res, (off), (val))

sys/dev/misc/ichwd/ichwd.c

255

#define ichwd_write_gcs_4(sc, off, val) \

sys/dev/misc/ichwd/ichwd.c

256

bus_write_4((sc)->gcs_res, (off), (val))

sys/dev/misc/ipmi/ipmi_isa.c

100

int i, unit, val;

sys/dev/misc/ipmi/ipmi_isa.c

140

if (resource_int_value(name, unit, "port", &val) == 0 && val != 0) {

sys/dev/misc/ipmi/ipmi_isa.c

141

info->address = val;

sys/dev/misc/ipmi/ipmi_isa.c

143

} else if (resource_int_value(name, unit, "maddr", &val) == 0 &&

sys/dev/misc/ipmi/ipmi_isa.c

144

val != 0) {

sys/dev/misc/ipmi/ipmi_isa.c

145

info->address = val;

sys/dev/misc/ipmi/ipmi_isa.c

150

if (resource_int_value(name, unit, "spacing", &val) == 0) {

sys/dev/misc/ipmi/ipmi_isa.c

151

switch (val) {

sys/dev/misc/kbd/atkbd.c

1281

int val, error;

sys/dev/misc/kbd/atkbd.c

1284

val = typematic(DEFAULT_DELAY, DEFAULT_RATE);

sys/dev/misc/kbd/atkbd.c

1285

error = write_kbd(state->kbdc, KBDC_SET_TYPEMATIC, val);

sys/dev/misc/kbd/atkbd.c

1287

kbd->kb_delay1 = typematic_delay(val);

sys/dev/misc/kbd/atkbd.c

1288

kbd->kb_delay2 = typematic_rate(val);

sys/dev/misc/lpbb/lpbb.c

135

lpbb_setsda(device_t dev, char val)

sys/dev/misc/lpbb/lpbb.c

139

if(val==0)

sys/dev/misc/lpbb/lpbb.c

146

lpbb_setscl(device_t dev, unsigned char val)

sys/dev/misc/lpbb/lpbb.c

150

if(val==0)

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

191

#define GPIO_WRITE(sc, reg, val) \

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

193

(sc)->sc_ld_ioh[SIO_LDN_GPIO], (reg), (val))

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

194

#define TMS_WRITE(sc, reg, val) \

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

196

(sc)->sc_ld_ioh[SIO_LDN_TMS], (reg), (val))

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

200

#define VLM_WRITE(sc, reg, val) \

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

202

(sc)->sc_ld_ioh[SIO_LDN_VLM], (reg), (val))

sys/dev/misc/pcfclock/pcfclock.c

84

#define AUTOFEED_CLOCK(val) \

sys/dev/misc/pcfclock/pcfclock.c

85

ctr = (ctr & ~(AUTOFEED)) ^ (val); ppb_wctr(ppbus, ctr)

sys/dev/misc/ppc/ppc.c

2048

ppc_read_ivar(device_t bus, device_t dev, int index, uintptr_t *val)

sys/dev/misc/ppc/ppc.c

2054

*val = (u_long)ppc->ppc_epp;

sys/dev/misc/ppc/ppc.c

2057

*val = (u_long)ppc->ppc_irq;

sys/dev/misc/ppc/ppc.c

437

int ptr, pcr, val, i;

sys/dev/misc/ppc/ppc.c

460

val = inb(idport + 1);

sys/dev/misc/ppc/ppc.c

461

if ((val & 0xf0) == 0x10) {

sys/dev/misc/ppc/ppc.c

463

} else if ((val & 0xf8) == 0x70) {

sys/dev/misc/ppc/ppc.c

465

} else if ((val & 0xf8) == 0x50) {

sys/dev/misc/ppc/ppc.c

467

} else if ((val & 0xf8) == 0x40) { /* Should be 0x30 by the

sys/dev/misc/ppc/ppc.c

472

if (bootverbose && (val != 0xff))

sys/dev/misc/ppc/ppc.c

473

kprintf("PC873xx probe at 0x%x got unknown ID 0x%x\n", idport, val);

sys/dev/misc/ppc/ppc.c

492

val = inb(idport + 1);

sys/dev/misc/ppc/ppc.c

493

if (!(val & PC873_PPENABLE)) {

sys/dev/misc/ppc/ppc.c

499

val = inb(idport + 1);

sys/dev/misc/ppc/ppc.c

501

if (pc873xx_porttab[val & 0x3] != ppc->ppc_base) {

sys/dev/misc/ppc/ppc.c

507

val &= 0xfc;

sys/dev/misc/ppc/ppc.c

511

val &= 0xfd;

sys/dev/misc/ppc/ppc.c

515

val &= 0xfe;

sys/dev/misc/ppc/ppc.c

519

val &= 0xfd;

sys/dev/misc/ppc/ppc.c

524

outb(idport + 1, val);

sys/dev/misc/ppc/ppc.c

525

outb(idport + 1, val);

sys/dev/misc/ppc/ppc.c

531

val = inb(idport + 1) & 0x3;

sys/dev/misc/ppc/ppc.c

535

if (pc873xx_porttab[val] != ppc->ppc_base) {

sys/dev/misc/ppc/ppc.c

538

pc873xx_porttab[val], ppc->ppc_base);

sys/dev/misc/ppc/ppc.c

550

irq = pc873xx_irqtab[val];

sys/dev/misc/ppc/ppc.c

67

static int ppc_read_ivar(device_t bus, device_t dev, int index, uintptr_t *val);

sys/dev/misc/ppi/ppi.c

504

u_int8_t *val = (u_int8_t *)ap->a_data;

sys/dev/misc/ppi/ppi.c

508

*val = ppb_rdtr(ppbus);

sys/dev/misc/ppi/ppi.c

511

*val = ppb_rstr(ppbus);

sys/dev/misc/ppi/ppi.c

514

*val = ppb_rctr(ppbus);

sys/dev/misc/ppi/ppi.c

517

*val = ppb_repp_D(ppbus);

sys/dev/misc/ppi/ppi.c

520

*val = ppb_recr(ppbus);

sys/dev/misc/ppi/ppi.c

523

*val = ppb_rfifo(ppbus);

sys/dev/misc/ppi/ppi.c

526

ppb_wdtr(ppbus, *val);

sys/dev/misc/ppi/ppi.c

529

ppb_wstr(ppbus, *val);

sys/dev/misc/ppi/ppi.c

532

ppb_wctr(ppbus, *val);

sys/dev/misc/ppi/ppi.c

535

ppb_wepp_D(ppbus, *val);

sys/dev/misc/ppi/ppi.c

538

ppb_wecr(ppbus, *val);

sys/dev/misc/ppi/ppi.c

541

ppb_wfifo(ppbus, *val);

sys/dev/misc/ppi/ppi.c

544

*val = ppb_repp_A(ppbus);

sys/dev/misc/ppi/ppi.c

547

ppb_wepp_A(ppbus, *val);

sys/dev/misc/psm/psm.c

6768

trackpoint_command(struct psm_softc *sc, int cmd, int loc, int val)

sys/dev/misc/psm/psm.c

6770

const int seq[] = { 0xe2, cmd, loc, val };

sys/dev/misc/psm/psm.c

7078

elantech_read_1(KBDC kbdc, int hwversion, int reg, int *val)

sys/dev/misc/psm/psm.c

7093

*val = resp[retidx];

sys/dev/misc/psm/psm.c

7099

elantech_write_1(KBDC kbdc, int hwversion, int reg, int val)

sys/dev/misc/psm/psm.c

7114

res |= send_aux_command(kbdc, val) != PSM_ACK;

sys/dev/misc/psm/psm.c

7140

int i, val, res, hwversion, reg10;

sys/dev/misc/psm/psm.c

7167

if (elantech_read_1(kbdc, hwversion, 0x10, &val) == 0)

sys/dev/misc/psm/psm.c

909

set_mouse_resolution(KBDC kbdc, int val)

sys/dev/misc/psm/psm.c

914

res = send_aux_command_and_data(kbdc, PSMC_SET_RESOLUTION, val);

sys/dev/misc/psm/psm.c

915

VLOG(2, (LOG_DEBUG, "psm: SET_RESOLUTION (%d) %04x\n", val, res));

sys/dev/misc/psm/psm.c

917

return ((res == PSM_ACK) ? val : -1);

sys/dev/misc/puc/puc.c

418

#define checkreg(val, index) \

sys/dev/misc/puc/puc.c

419

(((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)])

sys/dev/misc/puc/puc.c

490

u_char val;

sys/dev/misc/puc/puc.c

502

val = rdspio(0x09) & 0x0f;

sys/dev/misc/puc/puc.c

503

if (val != 0x0c) {

sys/dev/misc/puc/puc.c

513

val = rdspio(0x16);

sys/dev/misc/puc/puc.c

514

val |= 0x04;

sys/dev/misc/puc/puc.c

515

wrspio(0x16, val);

sys/dev/misc/puc/puc.c

516

val &= ~0x04;

sys/dev/misc/puc/puc.c

517

wrspio(0x16, val);

sys/dev/misc/puc/puc.c

536

val = rdspio(0x09) & 0x0f;

sys/dev/misc/puc/puc.c

537

if (val != 0x0c) {

sys/dev/misc/puc/puc.c

547

val = rdspio(0x16);

sys/dev/misc/puc/puc.c

548

val |= 0x04;

sys/dev/misc/puc/puc.c

549

wrspio(0x16, val);

sys/dev/misc/puc/puc.c

550

val &= ~0x04;

sys/dev/misc/puc/puc.c

551

wrspio(0x16, val);

sys/dev/misc/syscons/dragon/dragon_saver.c

102

set |= gpset(cur_x, i, val);

sys/dev/misc/syscons/dragon/dragon_saver.c

66

gpset(int x, int y, int val)

sys/dev/misc/syscons/dragon/dragon_saver.c

71

vid[x + y * SCRW] = val;

sys/dev/misc/syscons/dragon/dragon_saver.c

76

gdraw(int dx, int dy, int val)

sys/dev/misc/syscons/dragon/dragon_saver.c

90

set |= gpset(i, cur_y, val);

sys/dev/misc/syscons/sysmouse.c

237

int error = 0, val, cnt = 0;

sys/dev/misc/syscons/sysmouse.c

264

val = sysmouse_evtopkt(sc, &info, buf);

sys/dev/misc/syscons/sysmouse.c

265

if (val > 0) {

sys/dev/misc/syscons/sysmouse.c

266

error = uiomove(buf, val, uio);

sys/dev/misc/tbridge/tbridge.c

100

return val;

sys/dev/misc/tbridge/tbridge.c

92

int32_t val;

sys/dev/misc/tbridge/tbridge.c

96

"timeout_in_secs", &val);

sys/dev/misc/tbridge/tbridge.c

98

val = 600/* default timeout = 10min */;

sys/dev/netif/ae/if_ae.c

1005

uint32_t val;

sys/dev/netif/ae/if_ae.c

1007

val = AE_READ_4(sc, AE_MAC_REG);

sys/dev/netif/ae/if_ae.c

1008

val &= ~AE_MAC_RMVLAN_EN;

sys/dev/netif/ae/if_ae.c

1010

val |= AE_MAC_RMVLAN_EN;

sys/dev/netif/ae/if_ae.c

1011

AE_WRITE_4(sc, AE_MAC_REG, val);

sys/dev/netif/ae/if_ae.c

1526

uint32_t val;

sys/dev/netif/ae/if_ae.c

1531

val = AE_READ_4(sc, AE_SPICTL_REG);

sys/dev/netif/ae/if_ae.c

1532

if ((val & AE_SPICTL_VPD_EN) != 0) {

sys/dev/netif/ae/if_ae.c

1533

val &= ~AE_SPICTL_VPD_EN;

sys/dev/netif/ae/if_ae.c

1534

AE_WRITE_4(sc, AE_SPICTL_REG, val);

sys/dev/netif/ae/if_ae.c

1543

uint32_t val;

sys/dev/netif/ae/if_ae.c

1551

val = 0x100 + reg * 4;

sys/dev/netif/ae/if_ae.c

1552

AE_WRITE_4(sc, AE_VPD_CAP_REG, (val << AE_VPD_CAP_ADDR_SHIFT) &

sys/dev/netif/ae/if_ae.c

1556

val = AE_READ_4(sc, AE_VPD_CAP_REG);

sys/dev/netif/ae/if_ae.c

1557

if ((val & AE_VPD_CAP_DONE) != 0)

sys/dev/netif/ae/if_ae.c

157

#define AE_WRITE_4(_sc, reg, val) \

sys/dev/netif/ae/if_ae.c

1572

uint32_t word, reg, val;

sys/dev/netif/ae/if_ae.c

158

bus_space_write_4((_sc)->ae_mem_bt, (_sc)->ae_mem_bh, (reg), (val))

sys/dev/netif/ae/if_ae.c

159

#define AE_WRITE_2(_sc, reg, val) \

sys/dev/netif/ae/if_ae.c

160

bus_space_write_2((_sc)->ae_mem_bt, (_sc)->ae_mem_bh, (reg), (val))

sys/dev/netif/ae/if_ae.c

1605

error = ae_vpd_read_word(sc, i, &val);

sys/dev/netif/ae/if_ae.c

1609

eaddr[0] = val;

sys/dev/netif/ae/if_ae.c

161

#define AE_WRITE_1(_sc, reg, val) \

sys/dev/netif/ae/if_ae.c

1611

eaddr[1] = val;

sys/dev/netif/ae/if_ae.c

162

bus_space_write_1((_sc)->ae_mem_bt, (_sc)->ae_mem_bh, (reg), (val))

sys/dev/netif/ae/if_ae.c

172

#define AE_PHY_WRITE(sc, reg, val) \

sys/dev/netif/ae/if_ae.c

173

ae_miibus_writereg(sc->ae_dev, 0, reg, val)

sys/dev/netif/ae/if_ae.c

1813

uint32_t val;

sys/dev/netif/ae/if_ae.c

1816

val = AE_PHY_READ(sc, AE_PHY_DBG_DATA);

sys/dev/netif/ae/if_ae.c

1817

if (val & AE_PHY_DBG_POWERSAVE) {

sys/dev/netif/ae/if_ae.c

1818

val &= ~AE_PHY_DBG_POWERSAVE;

sys/dev/netif/ae/if_ae.c

1819

AE_PHY_WRITE(sc, AE_PHY_DBG_DATA, val);

sys/dev/netif/ae/if_ae.c

1827

uint32_t val;

sys/dev/netif/ae/if_ae.c

1833

val = AE_PHY_READ(sc, AE_PHY_DBG_DATA);

sys/dev/netif/ae/if_ae.c

1834

AE_PHY_WRITE(sc, AE_PHY_DBG_ADDR, val | 0x1000);

sys/dev/netif/ae/if_ae.c

267

uint32_t val;

sys/dev/netif/ae/if_ae.c

273

val = AE_READ_4(sc, AE_MAC_REG);

sys/dev/netif/ae/if_ae.c

274

if ((val & AE_MAC_RX_EN) != 0) {

sys/dev/netif/ae/if_ae.c

275

val &= ~AE_MAC_RX_EN;

sys/dev/netif/ae/if_ae.c

276

AE_WRITE_4(sc, AE_MAC_REG, val);

sys/dev/netif/ae/if_ae.c

289

val = AE_READ_4(sc, AE_IDLE_REG);

sys/dev/netif/ae/if_ae.c

290

if ((val & (AE_IDLE_RXMAC | AE_IDLE_DMAWRITE)) == 0)

sys/dev/netif/ae/if_ae.c

303

uint32_t val;

sys/dev/netif/ae/if_ae.c

309

val = AE_READ_4(sc, AE_MAC_REG);

sys/dev/netif/ae/if_ae.c

310

if ((val & AE_MAC_TX_EN) != 0) {

sys/dev/netif/ae/if_ae.c

311

val &= ~AE_MAC_TX_EN;

sys/dev/netif/ae/if_ae.c

312

AE_WRITE_4(sc, AE_MAC_REG, val);

sys/dev/netif/ae/if_ae.c

325

val = AE_READ_4(sc, AE_IDLE_REG);

sys/dev/netif/ae/if_ae.c

326

if ((val & (AE_IDLE_TXMAC | AE_IDLE_DMAREAD)) == 0)

sys/dev/netif/ae/if_ae.c

345

uint32_t val;

sys/dev/netif/ae/if_ae.c

382

val = AE_READ_4(sc, AE_MAC_REG);

sys/dev/netif/ae/if_ae.c

383

val |= AE_MAC_TX_EN | AE_MAC_RX_EN;

sys/dev/netif/ae/if_ae.c

384

AE_WRITE_4(sc, AE_MAC_REG, val);

sys/dev/netif/ae/if_ae.c

440

uint32_t val;

sys/dev/netif/ae/if_ae.c

448

val = ((reg << AE_MDIO_REGADDR_SHIFT) & AE_MDIO_REGADDR_MASK) |

sys/dev/netif/ae/if_ae.c

451

AE_WRITE_4(sc, AE_MDIO_REG, val);

sys/dev/netif/ae/if_ae.c

458

val = AE_READ_4(sc, AE_MDIO_REG);

sys/dev/netif/ae/if_ae.c

459

if ((val & (AE_MDIO_START | AE_MDIO_BUSY)) == 0)

sys/dev/netif/ae/if_ae.c

466

return ((val << AE_MDIO_DATA_SHIFT) & AE_MDIO_DATA_MASK);

sys/dev/netif/ae/if_ae.c

470

ae_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/ae/if_ae.c

484

((val << AE_MDIO_DATA_SHIFT) & AE_MDIO_DATA_MASK);

sys/dev/netif/ae/if_ae.c

586

uint32_t val;

sys/dev/netif/ae/if_ae.c

589

val = AE_READ_4(sc, AE_MAC_REG);

sys/dev/netif/ae/if_ae.c

590

val &= ~AE_MAC_FULL_DUPLEX;

sys/dev/netif/ae/if_ae.c

593

val |= AE_MAC_FULL_DUPLEX;

sys/dev/netif/ae/if_ae.c

594

AE_WRITE_4(sc, AE_MAC_REG, val);

sys/dev/netif/ae/if_ae.c

752

uint32_t val;

sys/dev/netif/ae/if_ae.c

756

val = AE_READ_4(sc, AE_ISR_REG);

sys/dev/netif/ae/if_ae.c

757

if (val == 0 || (val & AE_IMR_DEFAULT) == 0)

sys/dev/netif/ae/if_ae.c

765

val = AE_READ_4(sc, AE_ISR_REG);

sys/dev/netif/ae/if_ae.c

768

AE_WRITE_4(sc, AE_ISR_REG, val | AE_ISR_DISABLE);

sys/dev/netif/ae/if_ae.c

771

if (val & (AE_ISR_DMAR_TIMEOUT |

sys/dev/netif/ae/if_ae.c

776

if (val & AE_ISR_TX_EVENT)

sys/dev/netif/ae/if_ae.c

778

if (val & AE_ISR_RX_EVENT)

sys/dev/netif/ae/if_ae.c

793

uint32_t val;

sys/dev/netif/ae/if_ae.c

813

val = eaddr[2] << 24 | eaddr[3] << 16 | eaddr[4] << 8 | eaddr[5];

sys/dev/netif/ae/if_ae.c

814

AE_WRITE_4(sc, AE_EADDR0_REG, val);

sys/dev/netif/ae/if_ae.c

815

val = eaddr[0] << 8 | eaddr[1];

sys/dev/netif/ae/if_ae.c

816

AE_WRITE_4(sc, AE_EADDR1_REG, val);

sys/dev/netif/ae/if_ae.c

839

val = ((AE_IFG_TXIPG_DEFAULT << AE_IFG_TXIPG_SHIFT) &

sys/dev/netif/ae/if_ae.c

847

AE_WRITE_4(sc, AE_IFG_REG, val);

sys/dev/netif/ae/if_ae.c

852

val = ((AE_HDPX_LCOL_DEFAULT << AE_HDPX_LCOL_SHIFT) &

sys/dev/netif/ae/if_ae.c

860

AE_WRITE_4(sc, AE_HDPX_REG, val);

sys/dev/netif/ae/if_ae.c

866

val = AE_READ_4(sc, AE_MASTER_REG);

sys/dev/netif/ae/if_ae.c

867

val |= AE_MASTER_IMT_EN;

sys/dev/netif/ae/if_ae.c

868

AE_WRITE_4(sc, AE_MASTER_REG, val);

sys/dev/netif/ae/if_ae.c

878

val = ifp->if_mtu + ETHER_HDR_LEN + sizeof(struct ether_vlan_header) +

sys/dev/netif/ae/if_ae.c

880

AE_WRITE_2(sc, AE_MTU_REG, val);

sys/dev/netif/ae/if_ae.c

915

val = AE_READ_4(sc, AE_ISR_REG);

sys/dev/netif/ae/if_ae.c

916

if ((val & AE_ISR_PHY_LINKDOWN) != 0) {

sys/dev/netif/ae/if_ae.c

930

val = AE_READ_4(sc, AE_MASTER_REG);

sys/dev/netif/ae/if_ae.c

931

AE_WRITE_4(sc, AE_MASTER_REG, val | AE_MASTER_MANUAL_INT);

sys/dev/netif/ae/if_ae.c

942

val = AE_MAC_TX_CRC_EN | AE_MAC_TX_AUTOPAD |

sys/dev/netif/ae/if_ae.c

948

AE_WRITE_4(sc, AE_MAC_REG, val);

sys/dev/netif/ae/if_ae.c

959

val = AE_READ_4(sc, AE_MAC_REG);

sys/dev/netif/ae/if_ae.c

960

AE_WRITE_4(sc, AE_MAC_REG, val | AE_MAC_TX_EN | AE_MAC_RX_EN);

sys/dev/netif/age/if_age.c

214

age_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/age/if_age.c

225

(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |

sys/dev/netif/age/if_agevar.h

229

#define CSR_WRITE_4(_sc, reg, val) \

sys/dev/netif/age/if_agevar.h

230

bus_space_write_4((_sc)->age_mem_bt, (_sc)->age_mem_bh, (reg), (val))

sys/dev/netif/age/if_agevar.h

231

#define CSR_WRITE_2(_sc, reg, val) \

sys/dev/netif/age/if_agevar.h

232

bus_space_write_2((_sc)->age_mem_bt, (_sc)->age_mem_bh, (reg), (val))

sys/dev/netif/alc/if_alc.c

1000

CSR_WRITE_4(sc, ALC_GPHY_CFG, val | GPHY_CFG_EXT_RESET);

sys/dev/netif/alc/if_alc.c

1019

val = CSR_READ_4(sc, ALC_LPI_CTL);

sys/dev/netif/alc/if_alc.c

1020

val &= ~LPI_CTL_ENB;

sys/dev/netif/alc/if_alc.c

1021

CSR_WRITE_4(sc, ALC_LPI_CTL, val);

sys/dev/netif/alc/if_alc.c

1029

val = alc_miidbg_readreg(sc, MII_DBG_GREENCFG2);

sys/dev/netif/alc/if_alc.c

1030

val &= ~DBG_GREENCFG2_GATE_DFSE_EN;

sys/dev/netif/alc/if_alc.c

1031

alc_miidbg_writereg(sc, MII_DBG_GREENCFG2, val);

sys/dev/netif/alc/if_alc.c

1041

val = alc_miiext_readreg(sc, MII_EXT_PCS, MII_EXT_CLDCTL3);

sys/dev/netif/alc/if_alc.c

1042

val |= EXT_CLDCTL3_BP_CABLE1TH_DET_GT;

sys/dev/netif/alc/if_alc.c

1043

alc_miiext_writereg(sc, MII_EXT_PCS, MII_EXT_CLDCTL3, val);

sys/dev/netif/alc/if_alc.c

1045

val = alc_miidbg_readreg(sc, MII_DBG_GREENCFG2);

sys/dev/netif/alc/if_alc.c

1046

val |= DBG_GREENCFG2_BP_GREEN;

sys/dev/netif/alc/if_alc.c

1047

alc_miidbg_writereg(sc, MII_DBG_GREENCFG2, val);

sys/dev/netif/alc/if_alc.c

1049

val = alc_miiext_readreg(sc, MII_EXT_PCS, MII_EXT_CLDCTL5);

sys/dev/netif/alc/if_alc.c

1050

val |= EXT_CLDCTL5_BP_VD_HLFBIAS;

sys/dev/netif/alc/if_alc.c

1051

alc_miiext_writereg(sc, MII_EXT_PCS, MII_EXT_CLDCTL5, val);

sys/dev/netif/alc/if_alc.c

1241

uint32_t cap, ctl, val;

sys/dev/netif/alc/if_alc.c

1245

val = CSR_READ_4(sc, ALC_PEX_UNC_ERR_SEV);

sys/dev/netif/alc/if_alc.c

1246

val &= ~(PEX_UNC_ERR_SEV_DLP | PEX_UNC_ERR_SEV_FCP);

sys/dev/netif/alc/if_alc.c

1247

CSR_WRITE_4(sc, ALC_PEX_UNC_ERR_SEV, val);

sys/dev/netif/alc/if_alc.c

1257

val = CSR_READ_4(sc, ALC_PCIE_PHYMISC2);

sys/dev/netif/alc/if_alc.c

1258

val &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK |

sys/dev/netif/alc/if_alc.c

1260

val |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;

sys/dev/netif/alc/if_alc.c

1261

val |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;

sys/dev/netif/alc/if_alc.c

1262

CSR_WRITE_4(sc, ALC_PCIE_PHYMISC2, val);

sys/dev/netif/alc/if_alc.c

1289

val = CSR_READ_4(sc, ALC_PDLL_TRNS1);

sys/dev/netif/alc/if_alc.c

1290

val &= ~PDLL_TRNS1_D3PLLOFF_ENB;

sys/dev/netif/alc/if_alc.c

1291

CSR_WRITE_4(sc, ALC_PDLL_TRNS1, val);

sys/dev/netif/alc/if_alc.c

1292

val = CSR_READ_4(sc, ALC_MASTER_CFG);

sys/dev/netif/alc/if_alc.c

1295

if ((val & MASTER_WAKEN_25M) == 0 ||

sys/dev/netif/alc/if_alc.c

1296

(val & MASTER_CLK_SEL_DIS) == 0) {

sys/dev/netif/alc/if_alc.c

1297

val |= MASTER_WAKEN_25M | MASTER_CLK_SEL_DIS;

sys/dev/netif/alc/if_alc.c

1298

CSR_WRITE_4(sc, ALC_MASTER_CFG, val);

sys/dev/netif/alc/if_alc.c

1301

if ((val & MASTER_WAKEN_25M) == 0 ||

sys/dev/netif/alc/if_alc.c

1302

(val & MASTER_CLK_SEL_DIS) != 0) {

sys/dev/netif/alc/if_alc.c

1303

val |= MASTER_WAKEN_25M;

sys/dev/netif/alc/if_alc.c

1304

val &= ~MASTER_CLK_SEL_DIS;

sys/dev/netif/alc/if_alc.c

1305

CSR_WRITE_4(sc, ALC_MASTER_CFG, val);

sys/dev/netif/alc/if_alc.c

316

alc_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/alc/if_alc.c

323

v = alc_mii_writereg_816x(sc, phy, reg, val);

sys/dev/netif/alc/if_alc.c

325

v = alc_mii_writereg_813x(sc, phy, reg, val);

sys/dev/netif/alc/if_alc.c

330

alc_mii_writereg_813x(struct alc_softc *sc, int phy, int reg, int val)

sys/dev/netif/alc/if_alc.c

336

(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |

sys/dev/netif/alc/if_alc.c

352

alc_mii_writereg_816x(struct alc_softc *sc, int phy, int reg, int val)

sys/dev/netif/alc/if_alc.c

362

((val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT) | MDIO_REG_ADDR(reg) |

sys/dev/netif/alc/if_alc.c

436

alc_miidbg_writereg(struct alc_softc *sc, int reg, int val)

sys/dev/netif/alc/if_alc.c

442

ALC_MII_DBG_DATA, val));

sys/dev/netif/alc/if_alc.c

476

alc_miiext_writereg(struct alc_softc *sc, int devaddr, int reg, int val)

sys/dev/netif/alc/if_alc.c

488

((val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT) |

sys/dev/netif/alc/if_alc.c

507

uint16_t agc, len, val;

sys/dev/netif/alc/if_alc.c

530

val = alc_miiext_readreg(sc, MII_EXT_ANEG,

sys/dev/netif/alc/if_alc.c

532

val |= ANEG_AFEE_10BT_100M_TH;

sys/dev/netif/alc/if_alc.c

534

val);

sys/dev/netif/alc/if_alc.c

538

val = alc_miiext_readreg(sc, MII_EXT_ANEG,

sys/dev/netif/alc/if_alc.c

540

val &= ~ANEG_AFEE_10BT_100M_TH;

sys/dev/netif/alc/if_alc.c

542

val);

sys/dev/netif/alc/if_alc.c

551

val = alc_miidbg_readreg(sc, MII_DBG_MSE20DB);

sys/dev/netif/alc/if_alc.c

552

val &= ~DBG_MSE20DB_TH_MASK;

sys/dev/netif/alc/if_alc.c

553

val |= (DBG_MSE20DB_TH_HI <<

sys/dev/netif/alc/if_alc.c

555

alc_miidbg_writereg(sc, MII_DBG_MSE20DB, val);

sys/dev/netif/alc/if_alc.c

561

val = alc_miiext_readreg(sc, MII_EXT_ANEG, MII_EXT_ANEG_AFE);

sys/dev/netif/alc/if_alc.c

562

val &= ~ANEG_AFEE_10BT_100M_TH;

sys/dev/netif/alc/if_alc.c

563

alc_miiext_writereg(sc, MII_EXT_ANEG, MII_EXT_ANEG_AFE, val);

sys/dev/netif/alc/if_alc.c

568

val = alc_miidbg_readreg(sc, MII_DBG_MSE20DB);

sys/dev/netif/alc/if_alc.c

569

val &= ~DBG_MSE20DB_TH_MASK;

sys/dev/netif/alc/if_alc.c

570

val |= (DBG_MSE20DB_TH_DEFAULT << DBG_MSE20DB_TH_SHIFT);

sys/dev/netif/alc/if_alc.c

571

alc_miidbg_writereg(sc, MII_DBG_MSE20DB, val);

sys/dev/netif/alc/if_alc.c

670

uint16_t val;

sys/dev/netif/alc/if_alc.c

698

val = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr,

sys/dev/netif/alc/if_alc.c

701

ALC_MII_DBG_DATA, val & 0xFF7F);

sys/dev/netif/alc/if_alc.c

704

val = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr,

sys/dev/netif/alc/if_alc.c

707

ALC_MII_DBG_DATA, val | 0x0008);

sys/dev/netif/alc/if_alc.c

749

val = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr,

sys/dev/netif/alc/if_alc.c

752

ALC_MII_DBG_DATA, val | 0x0080);

sys/dev/netif/alc/if_alc.c

755

val = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr,

sys/dev/netif/alc/if_alc.c

758

ALC_MII_DBG_DATA, val & 0xFFF7);

sys/dev/netif/alc/if_alc.c

985

uint32_t val;

sys/dev/netif/alc/if_alc.c

987

val = CSR_READ_4(sc, ALC_GPHY_CFG);

sys/dev/netif/alc/if_alc.c

988

val &= ~(GPHY_CFG_EXT_RESET | GPHY_CFG_LED_MODE |

sys/dev/netif/alc/if_alc.c

991

val |= GPHY_CFG_SEL_ANA_RESET;

sys/dev/netif/alc/if_alc.c

993

val |= GPHY_CFG_HIB_PULSE | GPHY_CFG_HIB_EN | GPHY_CFG_SEL_ANA_RESET;

sys/dev/netif/alc/if_alc.c

996

val &= ~(GPHY_CFG_HIB_PULSE | GPHY_CFG_HIB_EN);

sys/dev/netif/alc/if_alc.c

998

CSR_WRITE_4(sc, ALC_GPHY_CFG, val);

sys/dev/netif/alc/if_alcvar.h

258

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/alc/if_alcvar.h

259

bus_space_write_4(sc->alc_res_btag, sc->alc_res_bhand, (reg), (val))

sys/dev/netif/alc/if_alcvar.h

262

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/alc/if_alcvar.h

263

bus_space_write_2(sc->alc_res_btag, sc->alc_res_bhand, (reg), (val))

sys/dev/netif/ale/if_ale.c

216

ale_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/ale/if_ale.c

234

(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |

sys/dev/netif/ale/if_alevar.h

229

#define CSR_WRITE_4(_sc, reg, val) \

sys/dev/netif/ale/if_alevar.h

230

bus_space_write_4((_sc)->ale_mem_bt, (_sc)->ale_mem_bh, (reg), (val))

sys/dev/netif/ale/if_alevar.h

231

#define CSR_WRITE_2(_sc, reg, val) \

sys/dev/netif/ale/if_alevar.h

232

bus_space_write_2((_sc)->ale_mem_bt, (_sc)->ale_mem_bh, (reg), (val))

sys/dev/netif/ale/if_alevar.h

233

#define CSR_WRITE_1(_sc, reg, val) \

sys/dev/netif/ale/if_alevar.h

234

bus_space_write_1((_sc)->ale_mem_bt, (_sc)->ale_mem_bh, (reg), (val))

sys/dev/netif/ath/ath/if_ath.c

3601

u_int32_t val;

sys/dev/netif/ath/ath/if_ath.c

3607

val = le32dec(dl + 0);

sys/dev/netif/ath/ath/if_ath.c

3608

pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^

sys/dev/netif/ath/ath/if_ath.c

3609

val;

sys/dev/netif/ath/ath/if_ath.c

3610

val = le32dec(dl + 3);

sys/dev/netif/ath/ath/if_ath.c

3611

pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^

sys/dev/netif/ath/ath/if_ath.c

3612

val;

sys/dev/netif/ath/ath/if_ath_spectral.c

192

int val;

sys/dev/netif/ath/ath/if_ath_spectral.c

268

val = * ((int *) indata);

sys/dev/netif/ath/ath/if_ath_spectral.c

269

if (val == 0)

sys/dev/netif/ath/ath/if_ath_sysctl.c

1013

int val = 0;

sys/dev/netif/ath/ath/if_ath_sysctl.c

1016

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/netif/ath/ath/if_ath_sysctl.c

1019

if (val == 0)

sys/dev/netif/ath/ath/if_ath_sysctl.c

1025

val = 0;

sys/dev/netif/ath/ath/if_ath_sysctl.c

706

int val = 0;

sys/dev/netif/ath/ath/if_ath_sysctl.c

709

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/netif/ath/ath/if_ath_sysctl.c

712

if (val == 0)

sys/dev/netif/ath/ath/if_ath_sysctl.c

716

val = 0;

sys/dev/netif/ath/ath/if_ath_sysctl.c

724

int val = 0;

sys/dev/netif/ath/ath/if_ath_sysctl.c

731

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/netif/ath/ath/if_ath_sysctl.c

734

if (val == 0)

sys/dev/netif/ath/ath/if_ath_sysctl.c

751

val = 0;

sys/dev/netif/ath/ath_hal/ah.c

228

ath_hal_wait(struct ath_hal *ah, u_int reg, uint32_t mask, uint32_t val)

sys/dev/netif/ath/ath_hal/ah.c

231

return ath_hal_waitfor(ah, reg, mask, val, AH_TIMEOUT);

sys/dev/netif/ath/ath_hal/ah.c

236

ath_hal_waitfor(struct ath_hal *ah, u_int reg, uint32_t mask, uint32_t val, uint32_t timeout)

sys/dev/netif/ath/ath_hal/ah.c

241

if ((OS_REG_READ(ah, reg) & mask) == val)

sys/dev/netif/ath/ath_hal/ah.c

247

__func__, reg, OS_REG_READ(ah, reg), mask, val);

sys/dev/netif/ath/ath_hal/ah.c

256

ath_hal_reverseBits(uint32_t val, uint32_t n)

sys/dev/netif/ath/ath_hal/ah.c

262

retval = (retval << 1) | (val & 1);

sys/dev/netif/ath/ath_hal/ah.c

263

val >>= 1;

sys/dev/netif/ath/ath_hal/ah.h

1482

uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ah_decode.h

35

uint32_t val;

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

100

*(int8_t *) val = pBase->pwrTableOffset;

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

104

*(int8_t *)val = pBase->tempSensSlope;

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

106

*(int8_t *)val = 0;

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

110

*(int8_t *)val = pBase->tempSensSlopePalOn;

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

112

*(int8_t *)val = 0;

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

27

v9287EepromGet(struct ath_hal *ah, int param, void *val)

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

41

*(int16_t *)val = pModal->noiseFloorThreshCh[0];

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

45

macaddr = val;

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

71

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

77

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

84

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

94

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_9287.c

97

*(int8_t *) val = ee->ee_antennaGainMax[1];

sys/dev/netif/ath/ath_hal/ah_eeprom_v1.c

26

v1EepromGet(struct ath_hal *ah, int param, void *val)

sys/dev/netif/ath/ath_hal/ah_eeprom_v1.c

37

macaddr = val;

sys/dev/netif/ath/ath_hal/ah_eeprom_v1.c

56

*(uint16_t *) val = ee->ee_regDomain[0];

sys/dev/netif/ath/ath_hal/ah_eeprom_v1.c

59

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v1.c

62

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

102

*(uint8_t *) val = pBase->frac_n_5g;

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

104

*(uint8_t *) val = 0;

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

107

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

112

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

119

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

129

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

132

*(int8_t *) val = ee->ee_antennaGainMax[1];

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

135

*(int8_t *) val = ee->ee_antennaGainMax[0];

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

139

*(int8_t *) val = pBase->pwr_table_offset;

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

141

*(int8_t *) val = AR5416_PWR_TABLE_OFFSET_DB;

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

145

*(uint8_t *) val = pBase->pwdclkind;

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

26

v14EepromGet(struct ath_hal *ah, int param, void *val)

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

40

*(int16_t *)val = pModal[0].noiseFloorThreshCh[0];

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

43

*(int16_t *)val = pModal[1].noiseFloorThreshCh[0];

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

47

macaddr = val;

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

92

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v14.c

96

*(uint8_t *) val = pBase->dacHiPwrMode_5G;

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1557

legacyEepromGet(struct ath_hal *ah, int param, void *val)

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1567

*(uint16_t *) val = ee->ee_opCap;

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1570

*(uint16_t *) val = ee->ee_regdomain;

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1575

*(uint16_t *) val = eeval;

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1579

macaddr = val;

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1599

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1602

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1605

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1608

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1611

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1614

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1617

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1622

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1625

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1629

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1633

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1637

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1642

*(uint16_t *) val =

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1649

*(uint16_t *) val =

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1655

*(int8_t *) val = ee->ee_antennaGainMax[0];

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1658

*(int8_t *) val = ee->ee_antennaGainMax[1];

sys/dev/netif/ath/ath_hal/ah_eeprom_v3.c

1661

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

104

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

107

*(int8_t *) val = ee->ee_antennaGainMax;

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

28

v4kEepromGet(struct ath_hal *ah, int param, void *val)

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

42

*(int16_t *)val = pModal->noiseFloorThreshCh[0];

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

46

macaddr = val;

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

80

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

83

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

88

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_eeprom_v4k.c

95

HALASSERT(val == AH_NULL);

sys/dev/netif/ath/ath_hal/ah_internal.h

610

uint32_t mask, uint32_t val);

sys/dev/netif/ath/ath_hal/ah_internal.h

612

uint32_t mask, uint32_t val, uint32_t timeout);

sys/dev/netif/ath/ath_hal/ah_internal.h

615

extern uint32_t ath_hal_reverseBits(uint32_t val, uint32_t n);

sys/dev/netif/ath/ath_hal/ah_internal.h

853

uint32_t val; /* reg value */

sys/dev/netif/ath/ath_hal/ah_osdep.c

270

r->val = ah->ah_devid;

sys/dev/netif/ath/ath_hal/ah_osdep.c

283

ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)

sys/dev/netif/ath/ath_hal/ah_osdep.c

293

__func__, reg, val, ah->ah_powerMode);

sys/dev/netif/ath/ath_hal/ah_osdep.c

304

r->val = val;

sys/dev/netif/ath/ath_hal/ah_osdep.c

310

bus_space_write_4(tag, h, reg, val);

sys/dev/netif/ath/ath_hal/ah_osdep.c

321

u_int32_t val;

sys/dev/netif/ath/ath_hal/ah_osdep.c

333

val = bus_space_read_4(tag, h, reg);

sys/dev/netif/ath/ath_hal/ah_osdep.c

343

r->val = val;

sys/dev/netif/ath/ath_hal/ah_osdep.c

347

return val;

sys/dev/netif/ath/ath_hal/ah_osdep.c

360

r->val = v;

sys/dev/netif/ath/ath_hal/ah_osdep.c

379

ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)

sys/dev/netif/ath/ath_hal/ah_osdep.c

389

__func__, reg, val, ah->ah_powerMode);

sys/dev/netif/ath/ath_hal/ah_osdep.c

395

bus_space_write_4(tag, h, reg, val);

sys/dev/netif/ath/ath_hal/ah_osdep.c

406

u_int32_t val;

sys/dev/netif/ath/ath_hal/ah_osdep.c

420

val = bus_space_read_4(tag, h, reg);

sys/dev/netif/ath/ath_hal/ah_osdep.c

423

return val;

sys/dev/netif/ath/ath_hal/ah_osdep.h

152

extern void ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val);

sys/dev/netif/ath/ath_hal/ah_regdomain.c

252

uint64_t val;

sys/dev/netif/ath/ath_hal/ah_regdomain.c

256

val = ((uint64_t) 1) << bitnum;

sys/dev/netif/ath/ath_hal/ah_regdomain.c

257

return (bitmask[byteOffset] & val) != 0;

sys/dev/netif/ath/ath_hal/ar5210/ar5210.h

267

extern void ar5210UpdateDiagReg(struct ath_hal *ah, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_beacon.c

100

val = OS_REG_READ(ah, AR_STA_ID1);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_beacon.c

101

val |= AR_STA_ID1_NO_PSPOLL; /* XXX */

sys/dev/netif/ath/ath_hal/ar5210/ar5210_beacon.c

104

val & ~(AR_STA_ID1_DEFAULT_ANTENNA | AR_STA_ID1_PCF));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_beacon.c

97

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_keycache.c

46

uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_keycache.c

47

if (val & AR_KEYTABLE_VALID)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

191

ar5210GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

199

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

212

uint32_t val = OS_REG_READ(ah, AR_GPIODI);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

213

val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

214

return val;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

226

uint32_t val = OS_REG_READ(ah, AR_GPIOCR);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

229

val &= ~(AR_GPIOCR_INT_SEL(gpio) | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA |

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

232

val |= AR_GPIOCR_INT_SEL(gpio) | AR_GPIOCR_INT_ENA;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

234

val |= AR_GPIOCR_INT_SELH;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

237

OS_REG_WRITE(ah, AR_GPIOCR, val);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

249

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

251

val = OS_REG_READ(ah, AR_PCICFG);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

254

val &= ~(AR_PCICFG_LED_PEND | AR_PCICFG_LED_ACT);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

258

val &= ~AR_PCICFG_LED_PEND;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

259

val |= AR_PCICFG_LED_ACT;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

262

val |= AR_PCICFG_LED_PEND;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

263

val &= ~AR_PCICFG_LED_ACT;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

266

OS_REG_WRITE(ah, AR_PCICFG, val);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

275

uint32_t val = OS_REG_READ(ah, AR_STA_ID1);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

276

return (val & AR_STA_ID1_DEFAULT_ANTENNA ? 2 : 1);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

282

uint32_t val = OS_REG_READ(ah, AR_STA_ID1);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

284

if (antenna != (val & AR_STA_ID1_DEFAULT_ANTENNA ? 2 : 1)) {

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

288

OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_DEFAULT_ANTENNA);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

371

uint32_t val = OS_REG_READ(ah, AR_BEACON);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

373

OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

697

ar5210UpdateDiagReg(struct ath_hal *ah, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

701

val |= AR_DIAG_SW_DIS_CRYPTO;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

702

OS_REG_WRITE(ah, AR_DIAG_SW, val);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_power.c

52

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_power.c

60

val = OS_REG_READ(ah, AR_PCICFG);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_power.c

61

if ((val & AR_PCICFG_SPWR_DN) == 0)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

120

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

125

val = OS_REG_READ(ah, AR_MCAST_FIL1);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

126

OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

128

val = OS_REG_READ(ah, AR_MCAST_FIL0);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

129

OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix)));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

140

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

145

val = OS_REG_READ(ah, AR_MCAST_FIL1);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

146

OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

148

val = OS_REG_READ(ah, AR_MCAST_FIL0);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_recv.c

149

OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

312

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

314

val = OS_REG_READ(ah, AR_STA_ID1) & 0xffff;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

317

OS_REG_WRITE(ah, AR_STA_ID1, val

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

324

OS_REG_WRITE(ah, AR_STA_ID1, val

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

331

OS_REG_WRITE(ah, AR_STA_ID1, val

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

337

OS_REG_WRITE(ah, AR_STA_ID1, val

sys/dev/netif/ath/ath_hal/ar5211/ar5211.h

248

extern HAL_BOOL ar5211GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

189

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

195

val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

196

val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

197

return ath_hal_reverseBits(val, 8);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

211

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

261

val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

262

AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

263

AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

301

val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >>

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

303

if (val != AR_PCICFG_EEPROM_SIZE_16K) {

sys/dev/netif/ath/ath_hal/ar5211/ar5211_attach.c

305

"%u (0x%x) found\n", __func__, val, val);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_beacon.c

106

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_beacon.c

109

val = OS_REG_READ(ah, AR_STA_ID1);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_beacon.c

110

val |= AR_STA_ID1_PWR_SAV; /* XXX */

sys/dev/netif/ath/ath_hal/ar5211/ar5211_beacon.c

113

val & ~(AR_STA_ID1_DEFAULT_ANTENNA | AR_STA_ID1_PCF));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_keycache.c

50

uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_keycache.c

51

if (val & AR_KEYTABLE_VALID)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

231

ar5211GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

239

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

252

uint32_t val = OS_REG_READ(ah, AR_GPIODI);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

253

val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

254

return val;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

266

uint32_t val = OS_REG_READ(ah, AR_GPIOCR);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

269

val &= ~(AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA |

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

272

val |= AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_ENA;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

274

val |= AR_GPIOCR_INT_SELH;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

277

OS_REG_WRITE(ah, AR_GPIOCR, val);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

367

uint32_t val = OS_REG_READ(ah, AR_BEACON);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

369

OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_power.c

41

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_power.c

49

val = OS_REG_READ(ah, AR_PCICFG);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_power.c

50

if ((val & AR_PCICFG_SPWR_DN) == 0)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

121

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

126

val = OS_REG_READ(ah, AR_MCAST_FIL1);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

127

OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

129

val = OS_REG_READ(ah, AR_MCAST_FIL0);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

130

OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix)));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

141

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

146

val = OS_REG_READ(ah, AR_MCAST_FIL1);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

147

OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

149

val = OS_REG_READ(ah, AR_MCAST_FIL0);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_recv.c

150

OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

2096

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

2098

val = OS_REG_READ(ah, AR_STA_ID1) & 0xffff;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

2101

OS_REG_WRITE(ah, AR_STA_ID1, val

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

2107

OS_REG_WRITE(ah, AR_STA_ID1, val

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

2114

OS_REG_WRITE(ah, AR_STA_ID1, val

sys/dev/netif/ath/ath_hal/ar5212/ar5212.h

476

extern HAL_BOOL ar5212GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

183

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

190

val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

191

val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

192

return ath_hal_reverseBits(val, 8);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

327

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

352

val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

353

AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

354

AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

467

val = OS_REG_READ(ah, AR_PCICFG);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

468

val = MS(val, AR_PCICFG_EEPROM_SIZE);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

469

if (val == 0) {

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

473

__func__, val, val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

478

} else if (val != AR_PCICFG_EEPROM_SIZE_16K) {

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

479

if (AR_PCICFG_EEPROM_SIZE_FAILED == val) {

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

482

__func__, val, val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

488

__func__, val, AR_PCICFG_EEPROM_SIZE_16K);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

721

uint16_t capField, val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

862

if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

863

pCap->halTotalQueues = val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

867

if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_attach.c

868

pCap->halKeyCacheSize = val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_beacon.c

130

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_beacon.c

133

val = OS_REG_READ(ah, AR_STA_ID1);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_beacon.c

134

val |= AR_STA_ID1_PWR_SAV; /* XXX */

sys/dev/netif/ath/ath_hal/ar5212/ar5212_beacon.c

137

val & ~(AR_STA_ID1_USE_DEFANT | AR_STA_ID1_PCF));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

107

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

110

val = OS_REG_READ(ah, AR_GPIOCR);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

111

val &= ~(AR_GPIOCR_CR_A(gpio) |

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

113

val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

115

val |= AR_GPIOCR_INT_SELH; /* interrupt on pin high */

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

117

val |= AR_GPIOCR_INT_SELL; /* interrupt on pin low */

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

120

OS_REG_WRITE(ah, AR_GPIOCR, val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

72

ar5212GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

80

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

93

uint32_t val = OS_REG_READ(ah, AR_GPIODI);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

94

val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

95

return val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_keycache.c

55

uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_keycache.c

56

if (val & AR_KEYTABLE_VALID)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1166

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1167

val = OS_REG_READ(ah, AR_PHY_RADAR_0);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1170

val &= ~AR_PHY_RADAR_0_FIRPWR;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1171

val |= SM(pe->pe_firpwr, AR_PHY_RADAR_0_FIRPWR);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1174

val &= ~AR_PHY_RADAR_0_RRSSI;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1175

val |= SM(pe->pe_rrssi, AR_PHY_RADAR_0_RRSSI);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1178

val &= ~AR_PHY_RADAR_0_HEIGHT;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1179

val |= SM(pe->pe_height, AR_PHY_RADAR_0_HEIGHT);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1182

val &= ~AR_PHY_RADAR_0_PRSSI;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1183

val |= SM(pe->pe_prssi, AR_PHY_RADAR_0_PRSSI);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1186

val &= ~AR_PHY_RADAR_0_INBAND;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1187

val |= SM(pe->pe_inband, AR_PHY_RADAR_0_INBAND);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1190

val |= AR_PHY_RADAR_0_ENA;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1192

val &= ~ AR_PHY_RADAR_0_ENA;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1244

OS_REG_WRITE(ah, AR_PHY_RADAR_0, val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1308

uint32_t val,temp;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1310

val = OS_REG_READ(ah, AR_PHY_RADAR_0);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1312

temp = MS(val,AR_PHY_RADAR_0_FIRPWR);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1315

pe->pe_rrssi = MS(val, AR_PHY_RADAR_0_RRSSI);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1316

pe->pe_height = MS(val, AR_PHY_RADAR_0_HEIGHT);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1317

pe->pe_prssi = MS(val, AR_PHY_RADAR_0_PRSSI);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1318

pe->pe_inband = MS(val, AR_PHY_RADAR_0_INBAND);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1319

pe->pe_enabled = !! (val & AR_PHY_RADAR_0_ENA);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1332

val = OS_REG_READ(ah, AR_PHY_RADAR_2);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1333

pe->pe_relpwr = !! MS(val, AR_PHY_RADAR_2_RELPWR);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1334

pe->pe_relstep = !! MS(val, AR_PHY_RADAR_2_RELSTEP);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1335

pe->pe_maxlen = !! MS(val, AR_PHY_RADAR_2_MAXLEN);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1337

pe->pe_usefir128 = !! (val & AR_PHY_RADAR_2_USEFIR128);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1338

pe->pe_blockradar = !! (val & AR_PHY_RADAR_2_BLOCKOFDMWEAK);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1339

pe->pe_enmaxrssi = !! (val & AR_PHY_RADAR_2_ENMAXRSSI);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1340

pe->pe_enrelpwr = !! (val & AR_PHY_RADAR_2_ENRELPWRCHK);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

1342

!! (val & AR_PHY_RADAR_2_ENRELSTEPCHK);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

280

uint32_t val = OS_REG_READ(ah, AR_BEACON);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

282

OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

290

OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_power.c

44

uint32_t scr, val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_power.c

69

val = OS_REG_READ(ah, AR_PCICFG);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_power.c

70

if ((val & AR_PCICFG_SPWR_DN) == 0)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

129

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

134

val = OS_REG_READ(ah, AR_MCAST_FIL1);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

135

OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

137

val = OS_REG_READ(ah, AR_MCAST_FIL0);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

138

OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix)));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

149

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

154

val = OS_REG_READ(ah, AR_MCAST_FIL1);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

155

OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

157

val = OS_REG_READ(ah, AR_MCAST_FIL0);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_recv.c

158

OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1397

int32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1448

val = OS_REG_READ(ah, AR_PHY(25));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1449

val &= 0xFFFFFE00;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1450

val |= (((uint32_t)nf << 1) & 0x1FF);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1451

OS_REG_WRITE(ah, AR_PHY(25), val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1467

val &= 0xFFFFFE00;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1468

val |= (((uint32_t)(-50) << 1) & 0x1FF);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1469

OS_REG_WRITE(ah, AR_PHY(25), val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1762

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1808

val = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1809

val &= ~(AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1812

OS_REG_WRITE(ah, AR_PHY_MASK_CTL, val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1896

val = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1897

val |= (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1900

OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4, val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

804

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

806

val = OS_REG_READ(ah, AR_STA_ID1);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

807

val &= ~(AR_STA_ID1_STA_AP | AR_STA_ID1_ADHOC);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

810

OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_STA_AP

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

815

OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_ADHOC

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

821

OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_KSRCH_MODE);

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

47

extern HAL_BOOL ar5312GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

55

extern HAL_BOOL ar5315GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

139

val = ((OS_REG_READ(ah, (AR5315_RSTIMER_BASE -((uint32_t) sh)) + AR5315_WREV)) >> AR5315_WREV_S)

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

141

AH_PRIVATE(ah)->ah_macVersion = val >> AR5315_WREV_ID_S;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

142

AH_PRIVATE(ah)->ah_macRev = val & AR5315_WREV_REVISION;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

149

val = OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + 0x0020);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

150

val = OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + 0x0080);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

152

val = ((OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + AR5312_WREV)) >> AR5312_WREV_S) & AR5312_WREV_ID;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

153

AH_PRIVATE(ah)->ah_macVersion = val >> AR5312_WREV_ID_S;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

154

AH_PRIVATE(ah)->ah_macRev = val & AR5312_WREV_REVISION;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_attach.c

70

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

110

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

114

val = OS_REG_READ(ah, gpioOffset+AR5312_GPIOCR);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

115

val &= ~(AR_GPIOCR_CR_A(gpio) |

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

117

val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

119

val |= AR_GPIOCR_INT_SELH; /* interrupt on pin high */

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

121

val |= AR_GPIOCR_INT_SELL; /* interrupt on pin low */

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

124

OS_REG_WRITE(ah, gpioOffset+AR5312_GPIOCR, val);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

72

ar5312GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

81

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

96

uint32_t val = OS_REG_READ(ah, gpioOffset+AR5312_GPIODI);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

97

val = ((val & AR5312_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

98

return val;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_misc.c

40

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_misc.c

43

val = SM(AR5312_PCICFG_LEDSEL0, AR5312_PCICFG_LEDSEL) |

sys/dev/netif/ath/ath_hal/ar5312/ar5312_misc.c

50

| val);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

110

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

114

val = OS_REG_READ(ah, gpioOffset+AR5315_GPIOINT);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

115

val &= ~(AR5315_GPIOINT_M | AR5315_GPIOINTLVL_M);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

116

val |= gpio << AR5315_GPIOINT_S;

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

118

val |= 2 << AR5315_GPIOINTLVL_S; /* interrupt on pin high */

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

120

val |= 1 << AR5315_GPIOINTLVL_S; /* interrupt on pin low */

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

123

OS_REG_WRITE(ah, gpioOffset+AR5315_GPIOINT, val);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

72

ar5315GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

81

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

96

uint32_t val = OS_REG_READ(ah, gpioOffset+AR5315_GPIODI);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

97

val = ((val & AR5315_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

98

return val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416.h

232

extern HAL_BOOL ar5416GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416.h

257

HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t val,

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

282

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

289

val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

290

val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

291

return ath_hal_reverseBits(val, 8);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

305

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

340

val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

341

AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

342

AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

893

uint16_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

956

if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

957

pCap->halTotalQueues = val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

961

if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_attach.c

962

pCap->halKeyCacheSize = val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_beacon.c

134

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_beacon.c

137

val = OS_REG_READ(ah, AR_STA_ID1);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_beacon.c

138

val |= AR_STA_ID1_PWR_SAV; /* XXX */

sys/dev/netif/ath/ath_hal/ar5416/ar5416_beacon.c

141

val & ~(AR_STA_ID1_USE_DEFANT | AR_STA_ID1_PCF));

sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c

274

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c

276

val = OS_REG_READ(ah, AR9271_CLOCK_CONTROL);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c

277

val &= 0xFFFFFEFF;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c

278

OS_REG_WRITE(ah, AR9271_CLOCK_CONTROL, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

592

int32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

630

val = OS_REG_READ(ah, ar5416_cca_regs[i]);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

631

val &= 0xFFFFFE00;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

632

val |= (((uint32_t) nf_val << 1) & 0x1ff);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

634

OS_REG_WRITE(ah, ar5416_cca_regs[i], val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

674

val = OS_REG_READ(ah, ar5416_cca_regs[i]);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

675

val &= 0xFFFFFE00;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

676

val |= (((uint32_t)(-50) << 1) & 0x1ff);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c

677

OS_REG_WRITE(ah, ar5416_cca_regs[i], val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcdc.c

101

val = OS_REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcdc.c

102

val &= 0xc0000fff;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcdc.c

103

val |= (qDcMismatch << 12) | (iDcMismatch << 21);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcdc.c

104

OS_REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcdc.c

76

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcgain.c

105

val = OS_REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcgain.c

106

val &= 0xfffff000;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcgain.c

107

val |= (qGainMismatch) | (iGainMismatch << 6);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcgain.c

108

OS_REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_adcgain.c

96

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

161

ar5416GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

167

"%s: gpio=%d, val=%d\n", __func__, gpio, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

170

if (val & 1)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

210

uint32_t val, mask;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

217

val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

220

AR_INTR_ASYNC_ENABLE_GPIO, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

228

val = MS(OS_REG_READ(ah, AR_INTR_SYNC_ENABLE),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

231

AR_INTR_SYNC_ENABLE_GPIO, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

238

val = MS(OS_REG_READ(ah, AR_INTR_SYNC_CAUSE),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

241

AR_INTR_SYNC_ENABLE_GPIO, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

243

val = MS(OS_REG_READ(ah, AR_GPIO_INTR_POL),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

247

val &= ~AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

250

val |= AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

253

AR_GPIO_INTR_POL_VAL, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

256

val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

259

AR_INTR_ASYNC_ENABLE_GPIO, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

267

val = MS(OS_REG_READ(ah, AR_INTR_SYNC_ENABLE),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

270

AR_INTR_SYNC_ENABLE_GPIO, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

378

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

380

val = OS_REG_READ(ah, AR_DIAG_SW);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

383

if (val & AR_DIAG_RXCLEAR_CTL_LOW) {

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

387

if (val & AR_DIAG_RXCLEAR_EXT_LOW) {

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

565

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

582

val = OS_REG_READ(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

583

val &= ~AR_PHY_RIFS_INIT_DELAY;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

584

OS_REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

722

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

741

if ((hang_sig & hang_list[i].mask) == hang_list[i].val) {

sys/dev/netif/ath/ath_hal/ar5416/ar5416_power.c

40

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_power.c

66

val = OS_REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_power.c

67

if (val == AR_RTC_STATUS_ON)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

125

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

127

val = OS_REG_READ(ah, AR_PHY_RADAR_0);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

130

val &= ~AR_PHY_RADAR_0_FIRPWR;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

131

val |= SM(pe->pe_firpwr, AR_PHY_RADAR_0_FIRPWR);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

134

val &= ~AR_PHY_RADAR_0_RRSSI;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

135

val |= SM(pe->pe_rrssi, AR_PHY_RADAR_0_RRSSI);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

138

val &= ~AR_PHY_RADAR_0_HEIGHT;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

139

val |= SM(pe->pe_height, AR_PHY_RADAR_0_HEIGHT);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

142

val &= ~AR_PHY_RADAR_0_PRSSI;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

143

val |= SM(pe->pe_prssi, AR_PHY_RADAR_0_PRSSI);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

146

val &= ~AR_PHY_RADAR_0_INBAND;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

147

val |= SM(pe->pe_inband, AR_PHY_RADAR_0_INBAND);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

151

val |= AR_PHY_RADAR_0_FFT_ENA;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

152

OS_REG_WRITE(ah, AR_PHY_RADAR_0, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

176

val = OS_REG_READ(ah, AR_PHY_RADAR_1);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

177

val &= ~AR_PHY_RADAR_1_RELSTEP_THRESH;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

178

val |= SM(pe->pe_relstep, AR_PHY_RADAR_1_RELSTEP_THRESH);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

179

OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

182

val = OS_REG_READ(ah, AR_PHY_RADAR_1);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

183

val &= ~AR_PHY_RADAR_1_RELPWR_THRESH;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

184

val |= SM(pe->pe_relpwr, AR_PHY_RADAR_1_RELPWR_THRESH);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

185

OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

203

val = OS_REG_READ(ah, AR_PHY_RADAR_1);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

204

val &= ~AR_PHY_RADAR_1_MAXLEN;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

205

val |= SM(pe->pe_maxlen, AR_PHY_RADAR_1_MAXLEN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

206

OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

83

uint32_t val, temp;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

85

val = OS_REG_READ(ah, AR_PHY_RADAR_0);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

87

temp = MS(val,AR_PHY_RADAR_0_FIRPWR);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

90

pe->pe_rrssi = MS(val, AR_PHY_RADAR_0_RRSSI);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

91

pe->pe_height = MS(val, AR_PHY_RADAR_0_HEIGHT);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

92

pe->pe_prssi = MS(val, AR_PHY_RADAR_0_PRSSI);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

93

pe->pe_inband = MS(val, AR_PHY_RADAR_0_INBAND);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

96

val = OS_REG_READ(ah, AR_PHY_RADAR_1);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

97

pe->pe_relpwr = MS(val, AR_PHY_RADAR_1_RELPWR_THRESH);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

98

pe->pe_relstep = MS(val, AR_PHY_RADAR_1_RELSTEP_THRESH);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_radar.c

99

pe->pe_maxlen = MS(val, AR_PHY_RADAR_1_MAXLEN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1352

uint32_t val = OS_REG_READ(ah, AR_RTC_DERIVED_CLK);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1353

val &= ~AR_RTC_DERIVED_CLK_PERIOD;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1354

val |= SM(1, AR_RTC_DERIVED_CLK_PERIOD);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1355

OS_REG_WRITE(ah, AR_RTC_DERIVED_CLK, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

2657

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

2667

val = OS_REG_READ(ah, AR_PCU_MISC_MODE2);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

2668

val &= (~AR_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

2670

val &= ~AR_PCU_MISC_MODE2_HWWAR1;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

2673

val = val & (~AR_PCU_MISC_MODE2_HWWAR2);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

2675

OS_REG_WRITE(ah, AR_PCU_MISC_MODE2, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

103

val &= ~AR_PHY_SPECTRAL_SCAN_PERIOD;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

104

val |= SM(ss->ss_period, AR_PHY_SPECTRAL_SCAN_PERIOD);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

110

val &= ~AR_PHY_SPECTRAL_SCAN_COUNT;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

111

val |= SM(ss->ss_count, AR_PHY_SPECTRAL_SCAN_COUNT);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

115

val |= AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

117

val &= ~AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

127

val &= ~AR_PHY_SPECTRAL_SCAN_COUNT_KIWI;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

128

val |= SM(ss->ss_count, AR_PHY_SPECTRAL_SCAN_COUNT_KIWI);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

132

val |= AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_KIWI;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

134

val &= ~AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_KIWI;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

138

val |= AR_PHY_SPECTRAL_SCAN_PHYERR_MASK_SELECT_KIWI;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

141

OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val | AR_PHY_SPECTRAL_SCAN_ENA);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

153

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

155

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

157

ss->ss_fft_period = MS(val, AR_PHY_SPECTRAL_SCAN_FFT_PERIOD);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

158

ss->ss_period = MS(val, AR_PHY_SPECTRAL_SCAN_PERIOD);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

160

ss->ss_count = MS(val, AR_PHY_SPECTRAL_SCAN_COUNT);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

161

ss->ss_short_report = MS(val, AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

163

ss->ss_count = MS(val, AR_PHY_SPECTRAL_SCAN_COUNT_KIWI);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

164

ss->ss_short_report = MS(val, AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_KIWI);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

166

val = OS_REG_READ(ah, AR_PHY_RADAR_1);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

167

ss->radar_bin_thresh_sel = MS(val, AR_PHY_RADAR_1_BIN_THRESH_SELECT);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

173

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

175

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

176

return MS(val, AR_PHY_SPECTRAL_SCAN_ACTIVE);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

182

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

184

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

185

return MS(val,AR_PHY_SPECTRAL_SCAN_ENA);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

191

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

196

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

197

val |= AR_PHY_SPECTRAL_SCAN_ENA;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

198

val |= AR_PHY_SPECTRAL_SCAN_ACTIVE;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

199

OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

200

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

201

val = OS_REG_READ(ah, AR_PHY_ERR_MASK_REG);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

202

OS_REG_WRITE(ah, AR_PHY_ERR_MASK_REG, val | AR_PHY_ERR_RADAR);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

208

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

209

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

212

val &= ~AR_PHY_SPECTRAL_SCAN_ENA;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

213

val &= ~AR_PHY_SPECTRAL_SCAN_ACTIVE;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

214

OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

215

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

216

val = OS_REG_READ(ah, AR_PHY_ERR_MASK_REG) & (~AR_PHY_ERR_RADAR);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

217

OS_REG_WRITE(ah, AR_PHY_ERR_MASK_REG, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

223

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

225

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

226

return val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

50

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

53

val = OS_REG_READ(ah, AR_PHY_RADAR_0);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

54

val |= AR_PHY_RADAR_0_FFT_ENA;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

57

val &= ~AR_PHY_RADAR_0_RRSSI;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

58

val |= SM(MAX_RADAR_RSSI_THRESH, AR_PHY_RADAR_0_RRSSI);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

60

val &= ~AR_PHY_RADAR_0_HEIGHT;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

61

val |= SM(MAX_RADAR_HEIGHT, AR_PHY_RADAR_0_HEIGHT);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

63

val &= ~(AR_PHY_RADAR_0_ENA);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

64

OS_REG_WRITE(ah, AR_PHY_RADAR_0, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

67

val = OS_REG_READ(ah, AR_PHY_RADAR_EXT);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

68

OS_REG_WRITE(ah, AR_PHY_RADAR_EXT, val & ~AR_PHY_RADAR_EXT_ENA);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

70

val = OS_REG_READ(ah, AR_RX_FILTER);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

71

val |= (1<<13);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

72

OS_REG_WRITE(ah, AR_RX_FILTER, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

86

uint32_t val;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

90

val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

93

val &= ~AR_PHY_SPECTRAL_SCAN_FFT_PERIOD;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

94

val |= SM(ss->ss_fft_period, AR_PHY_SPECTRAL_SCAN_FFT_PERIOD);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

98

val &= ~AR_PHY_SPECTRAL_SCAN_PERIOD;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_spectral.c

99

val |= SM(ss->ss_period, AR_PHY_SPECTRAL_SCAN_PERIOD);

sys/dev/netif/ath/ath_hal/ar9001/ar9130_attach.c

147

val = OS_REG_READ(ah, AR_SREV_CHIP_HOWL) & AR_SREV_CHIP_HOWL_ID;

sys/dev/netif/ath/ath_hal/ar9001/ar9130_attach.c

152

__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),

sys/dev/netif/ath/ath_hal/ar9001/ar9130_attach.c

153

MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));

sys/dev/netif/ath/ath_hal/ar9001/ar9130_attach.c

154

AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);

sys/dev/netif/ath/ath_hal/ar9001/ar9130_attach.c

79

uint32_t val;

sys/dev/netif/ath/ath_hal/ar9001/ar9160_attach.c

123

uint32_t val;

sys/dev/netif/ath/ath_hal/ar9001/ar9160_attach.c

167

val = OS_REG_READ(ah, AR_SREV);

sys/dev/netif/ath/ath_hal/ar9001/ar9160_attach.c

170

__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),

sys/dev/netif/ath/ath_hal/ar9001/ar9160_attach.c

171

MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));

sys/dev/netif/ath/ath_hal/ar9001/ar9160_attach.c

174

(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;

sys/dev/netif/ath/ath_hal/ar9001/ar9160_attach.c

175

AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);

sys/dev/netif/ath/ath_hal/ar9001/ar9160_attach.c

176

AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

157

uint32_t val;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

229

val = OS_REG_READ(ah, AR_SREV);

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

232

__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

233

MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

236

(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

237

AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

238

AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

428

uint32_t val;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

448

val = OS_REG_READ(ah, AR_WA);

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

454

val &= ~(AR_WA_BIT6 | AR_WA_BIT7);

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

459

val |= AR_WA_BIT22;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

470

val |= AR_WA_D3_L1_DISABLE;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

472

OS_REG_WRITE(ah, AR_WA, val);

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

474

val = AR9280_WA_DEFAULT;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

479

val &= (~AR_WA_D3_L1_DISABLE);

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

480

OS_REG_WRITE(ah, AR_WA, val);

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

536

uint32_t val = HAL_INI_VAL(ia, i, modesIndex);

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

539

val &= ~AR_AN_TOP2_PWDCLKIND;

sys/dev/netif/ath/ath_hal/ar9002/ar9280_attach.c

541

OS_REG_WRITE(ah, reg, val);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

142

uint32_t val;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

215

val = OS_REG_READ(ah, AR_SREV);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

218

__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

219

MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

222

(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

223

AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

224

AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

402

uint32_t val;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

414

val = AH_PRIVATE(ah)->ah_config.ath_hal_war70c;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

415

if (val) {

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

416

val &= 0xffff00ff;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

417

val |= 0x6f00;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

418

OS_REG_WRITE(ah, 0x570c, val);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

440

val = OS_REG_READ(ah, AR_WA);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

446

val &= ~(AR_WA_BIT6 | AR_WA_BIT7);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

457

val |= AR_WA_D3_L1_DISABLE;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

460

val |= AR_WA_BIT23;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

462

OS_REG_WRITE(ah, AR_WA, val);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

464

val = AR9285_WA_DEFAULT;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

468

val &= (~AR_WA_D3_L1_DISABLE);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

471

val |= (AR_WA_BIT6 | AR_WA_BIT7);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

474

val |= AR_WA_BIT23;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_attach.c

476

OS_REG_WRITE(ah, AR_WA, val);

sys/dev/netif/ath/ath_hal/ar9002/ar9287_attach.c

120

uint32_t val;

sys/dev/netif/ath/ath_hal/ar9002/ar9287_attach.c

197

val = OS_REG_READ(ah, AR_SREV);

sys/dev/netif/ath/ath_hal/ar9002/ar9287_attach.c

200

__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),

sys/dev/netif/ath/ath_hal/ar9002/ar9287_attach.c

201

MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));

sys/dev/netif/ath/ath_hal/ar9002/ar9287_attach.c

204

(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;

sys/dev/netif/ath/ath_hal/ar9002/ar9287_attach.c

205

AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);

sys/dev/netif/ath/ath_hal/ar9002/ar9287_attach.c

206

AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;

sys/dev/netif/ath/ath_hal/ar9002/ar9287_olc.c

84

int8_t val;

sys/dev/netif/ath/ath_hal/ar9002/ar9287_olc.c

85

(void) (ath_hal_eepromGet(ah, AR_EEP_TEMPSENSE_SLOPE, &val));

sys/dev/netif/ath/ath_hal/ar9002/ar9287_olc.c

86

slope = val;

sys/dev/netif/bce/if_bce.c

1171

bce_reg_wr_ind(struct bce_softc *sc, uint32_t offset, uint32_t val)

sys/dev/netif/bce/if_bce.c

1176

pci_write_config(dev, BCE_PCICFG_REG_WINDOW, val, 4);

sys/dev/netif/bce/if_bce.c

1188

bce_shmem_wr(struct bce_softc *sc, uint32_t offset, uint32_t val)

sys/dev/netif/bce/if_bce.c

1190

bce_reg_wr_ind(sc, sc->bce_shmem_base + offset, val);

sys/dev/netif/bce/if_bce.c

1221

uint32_t val, retry_cnt = 5;

sys/dev/netif/bce/if_bce.c

1229

val = REG_RD(sc, BCE_CTX_CTX_CTRL);

sys/dev/netif/bce/if_bce.c

1230

if ((val & BCE_CTX_CTX_CTRL_WRITE_REQ) == 0)

sys/dev/netif/bce/if_bce.c

1235

if (val & BCE_CTX_CTX_CTRL_WRITE_REQ) {

sys/dev/netif/bce/if_bce.c

1259

uint32_t val;

sys/dev/netif/bce/if_bce.c

1267

val = REG_RD(sc, BCE_EMAC_MDIO_MODE);

sys/dev/netif/bce/if_bce.c

1268

val &= ~BCE_EMAC_MDIO_MODE_AUTO_POLL;

sys/dev/netif/bce/if_bce.c

1270

REG_WR(sc, BCE_EMAC_MDIO_MODE, val);

sys/dev/netif/bce/if_bce.c

1276

val = BCE_MIPHY(phy) | BCE_MIREG(reg) |

sys/dev/netif/bce/if_bce.c

1279

REG_WR(sc, BCE_EMAC_MDIO_COMM, val);

sys/dev/netif/bce/if_bce.c

1284

val = REG_RD(sc, BCE_EMAC_MDIO_COMM);

sys/dev/netif/bce/if_bce.c

1285

if (!(val & BCE_EMAC_MDIO_COMM_START_BUSY)) {

sys/dev/netif/bce/if_bce.c

1288

val = REG_RD(sc, BCE_EMAC_MDIO_COMM);

sys/dev/netif/bce/if_bce.c

1289

val &= BCE_EMAC_MDIO_COMM_DATA;

sys/dev/netif/bce/if_bce.c

1294

if (val & BCE_EMAC_MDIO_COMM_START_BUSY) {

sys/dev/netif/bce/if_bce.c

1298

val = 0x0;

sys/dev/netif/bce/if_bce.c

1300

val = REG_RD(sc, BCE_EMAC_MDIO_COMM);

sys/dev/netif/bce/if_bce.c

1304

val = REG_RD(sc, BCE_EMAC_MDIO_MODE);

sys/dev/netif/bce/if_bce.c

1305

val |= BCE_EMAC_MDIO_MODE_AUTO_POLL;

sys/dev/netif/bce/if_bce.c

1307

REG_WR(sc, BCE_EMAC_MDIO_MODE, val);

sys/dev/netif/bce/if_bce.c

1312

return (val & 0xffff);

sys/dev/netif/bce/if_bce.c

1324

bce_miibus_write_reg(device_t dev, int phy, int reg, int val)

sys/dev/netif/bce/if_bce.c

1344

val1 = BCE_MIPHY(phy) | BCE_MIREG(reg) | val |

sys/dev/netif/bce/if_bce.c

1426

uint32_t val;

sys/dev/netif/bce/if_bce.c

1432

val = REG_RD(sc, BCE_NVM_SW_ARB);

sys/dev/netif/bce/if_bce.c

1433

if (val & BCE_NVM_SW_ARB_ARB_ARB2)

sys/dev/netif/bce/if_bce.c

1459

uint32_t val;

sys/dev/netif/bce/if_bce.c

1467

val = REG_RD(sc, BCE_NVM_SW_ARB);

sys/dev/netif/bce/if_bce.c

1468

if (!(val & BCE_NVM_SW_ARB_ARB_ARB2))

sys/dev/netif/bce/if_bce.c

1492

uint32_t val;

sys/dev/netif/bce/if_bce.c

1494

val = REG_RD(sc, BCE_NVM_ACCESS_ENABLE);

sys/dev/netif/bce/if_bce.c

1497

val | BCE_NVM_ACCESS_ENABLE_EN | BCE_NVM_ACCESS_ENABLE_WR_EN);

sys/dev/netif/bce/if_bce.c

1511

uint32_t val;

sys/dev/netif/bce/if_bce.c

1513

val = REG_RD(sc, BCE_NVM_ACCESS_ENABLE);

sys/dev/netif/bce/if_bce.c

1517

val & ~(BCE_NVM_ACCESS_ENABLE_EN | BCE_NVM_ACCESS_ENABLE_WR_EN));

sys/dev/netif/bce/if_bce.c

1556

uint32_t val;

sys/dev/netif/bce/if_bce.c

1560

val = REG_RD(sc, BCE_NVM_COMMAND);

sys/dev/netif/bce/if_bce.c

1561

if (val & BCE_NVM_COMMAND_DONE) {

sys/dev/netif/bce/if_bce.c

1562

val = REG_RD(sc, BCE_NVM_READ);

sys/dev/netif/bce/if_bce.c

1564

val = be32toh(val);

sys/dev/netif/bce/if_bce.c

1565

memcpy(ret_val, &val, 4);

sys/dev/netif/bce/if_bce.c

1592

uint32_t val;

sys/dev/netif/bce/if_bce.c

1603

val = REG_RD(sc, BCE_NVM_CFG1);

sys/dev/netif/bce/if_bce.c

1614

if (val & 0x40000000) {

sys/dev/netif/bce/if_bce.c

1618

if ((val & FLASH_BACKUP_STRAP_MASK) ==

sys/dev/netif/bce/if_bce.c

1628

if (val & (1 << 23))

sys/dev/netif/bce/if_bce.c

1637

if ((val & mask) == (flash->strapping & mask)) {

sys/dev/netif/bce/if_bce.c

1668

val = bce_shmem_rd(sc, BCE_SHARED_HW_CFG_CONFIG2) &

sys/dev/netif/bce/if_bce.c

1670

if (val)

sys/dev/netif/bce/if_bce.c

1671

sc->bce_flash_size = val;

sys/dev/netif/bce/if_bce.c

1867

uint32_t val;

sys/dev/netif/bce/if_bce.c

1873

uint32_t val = REG_RD(sc, BCE_MISC_DUAL_MEDIA_CTRL);

sys/dev/netif/bce/if_bce.c

1874

uint32_t bond_id = val & BCE_MISC_DUAL_MEDIA_CTRL_BOND_ID;

sys/dev/netif/bce/if_bce.c

1888

if (val & BCE_MISC_DUAL_MEDIA_CTRL_STRAP_OVERRIDE) {

sys/dev/netif/bce/if_bce.c

1889

strap = (val & BCE_MISC_DUAL_MEDIA_CTRL_PHY_CTRL) >> 21;

sys/dev/netif/bce/if_bce.c

1892

(val & BCE_MISC_DUAL_MEDIA_CTRL_PHY_CTRL_STRAP) >> 8;

sys/dev/netif/bce/if_bce.c

1920

val = bce_shmem_rd(sc, BCE_SHARED_HW_CFG_CONFIG);

sys/dev/netif/bce/if_bce.c

1921

if (val & BCE_SHARED_HW_CFG_PHY_2_5G)

sys/dev/netif/bce/if_bce.c

2577

uint32_t val;

sys/dev/netif/bce/if_bce.c

2593

val = bce_shmem_rd(sc, BCE_FW_MB);

sys/dev/netif/bce/if_bce.c

2594

if ((val & BCE_FW_MSG_ACK) == (msg_data & BCE_DRV_MSG_SEQ))

sys/dev/netif/bce/if_bce.c

2600

if ((val & BCE_FW_MSG_ACK) != (msg_data & BCE_DRV_MSG_SEQ) &&

sys/dev/netif/bce/if_bce.c

2628

uint32_t val;

sys/dev/netif/bce/if_bce.c

2637

val = (i / 8) | BCE_RV2P_PROC1_ADDR_CMD_RDWR;

sys/dev/netif/bce/if_bce.c

2638

REG_WR(sc, BCE_RV2P_PROC1_ADDR_CMD, val);

sys/dev/netif/bce/if_bce.c

2640

val = (i / 8) | BCE_RV2P_PROC2_ADDR_CMD_RDWR;

sys/dev/netif/bce/if_bce.c

2641

REG_WR(sc, BCE_RV2P_PROC2_ADDR_CMD, val);

sys/dev/netif/bce/if_bce.c

2722

uint32_t val;

sys/dev/netif/bce/if_bce.c

2725

val = REG_RD_IND(sc, cpu_reg->mode);

sys/dev/netif/bce/if_bce.c

2726

val &= ~cpu_reg->mode_value_halt;

sys/dev/netif/bce/if_bce.c

2728

REG_WR_IND(sc, cpu_reg->mode, val);

sys/dev/netif/bce/if_bce.c

2740

uint32_t val;

sys/dev/netif/bce/if_bce.c

2743

val = REG_RD_IND(sc, cpu_reg->mode);

sys/dev/netif/bce/if_bce.c

2744

val |= cpu_reg->mode_value_halt;

sys/dev/netif/bce/if_bce.c

2745

REG_WR_IND(sc, cpu_reg->mode, val);

sys/dev/netif/bce/if_bce.c

3289

uint32_t val;

sys/dev/netif/bce/if_bce.c

3296

val = BCE_CTX_COMMAND_ENABLED | BCE_CTX_COMMAND_MEM_INIT |

sys/dev/netif/bce/if_bce.c

3298

val |= (BCM_PAGE_BITS - 8) << 16;

sys/dev/netif/bce/if_bce.c

3299

REG_WR(sc, BCE_CTX_COMMAND, val);

sys/dev/netif/bce/if_bce.c

3303

val = REG_RD(sc, BCE_CTX_COMMAND);

sys/dev/netif/bce/if_bce.c

3304

if (!(val & BCE_CTX_COMMAND_MEM_INIT))

sys/dev/netif/bce/if_bce.c

3333

val = REG_RD(sc, BCE_CTX_HOST_PAGE_TBL_CTRL);

sys/dev/netif/bce/if_bce.c

3334

if ((val &

sys/dev/netif/bce/if_bce.c

3416

uint32_t val;

sys/dev/netif/bce/if_bce.c

3418

val = (mac_addr[0] << 8) | mac_addr[1];

sys/dev/netif/bce/if_bce.c

3419

REG_WR(sc, BCE_EMAC_MAC_MATCH0, val);

sys/dev/netif/bce/if_bce.c

3421

val = (mac_addr[2] << 24) |

sys/dev/netif/bce/if_bce.c

3425

REG_WR(sc, BCE_EMAC_MAC_MATCH1, val);

sys/dev/netif/bce/if_bce.c

3472

uint32_t val;

sys/dev/netif/bce/if_bce.c

3481

val = REG_RD(sc, BCE_MISC_ENABLE_CLR_BITS);

sys/dev/netif/bce/if_bce.c

3487

val = REG_RD(sc, BCE_MISC_NEW_CORE_CTL);

sys/dev/netif/bce/if_bce.c

3488

val &= ~BCE_MISC_NEW_CORE_CTL_DMA_ENABLE;

sys/dev/netif/bce/if_bce.c

3489

REG_WR(sc, BCE_MISC_NEW_CORE_CTL, val);

sys/dev/netif/bce/if_bce.c

3509

val = REG_RD(sc, BCE_MISC_ID);

sys/dev/netif/bce/if_bce.c

3518

val = BCE_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |

sys/dev/netif/bce/if_bce.c

3521

pci_write_config(sc->bce_dev, BCE_PCICFG_MISC_CONFIG, val, 4);

sys/dev/netif/bce/if_bce.c

3523

val = BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |

sys/dev/netif/bce/if_bce.c

3526

REG_WR(sc, BCE_PCICFG_MISC_CONFIG, val);

sys/dev/netif/bce/if_bce.c

3530

val = REG_RD(sc, BCE_PCICFG_MISC_CONFIG);

sys/dev/netif/bce/if_bce.c

3531

if ((val & (BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |

sys/dev/netif/bce/if_bce.c

3538

if (val & (BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |

sys/dev/netif/bce/if_bce.c

3546

val = REG_RD(sc, BCE_PCI_SWAP_DIAG0);

sys/dev/netif/bce/if_bce.c

3547

if (val != 0x01020304) {

sys/dev/netif/bce/if_bce.c

3576

uint32_t val;

sys/dev/netif/bce/if_bce.c

3587

val = BCE_DMA_CONFIG_DATA_BYTE_SWAP |

sys/dev/netif/bce/if_bce.c

3596

val |= (0x2 << 20) | BCE_DMA_CONFIG_CNTL_PCI_COMP_DLY;

sys/dev/netif/bce/if_bce.c

3599

val |= BCE_DMA_CONFIG_PCI_FAST_CLK_CMP;

sys/dev/netif/bce/if_bce.c

3609

val |= BCE_DMA_CONFIG_CNTL_PING_PONG_DMA;

sys/dev/netif/bce/if_bce.c

3611

REG_WR(sc, BCE_DMA_CONFIG, val);

sys/dev/netif/bce/if_bce.c

3629

val = REG_RD(sc, BCE_RPM_MGMT_PKT_CTRL) |

sys/dev/netif/bce/if_bce.c

3631

REG_WR(sc, BCE_RPM_MGMT_PKT_CTRL, val);

sys/dev/netif/bce/if_bce.c

3640

val = REG_RD(sc, BCE_MQ_CONFIG);

sys/dev/netif/bce/if_bce.c

3641

val &= ~BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE;

sys/dev/netif/bce/if_bce.c

3642

val |= BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256;

sys/dev/netif/bce/if_bce.c

3647

val |= BCE_MQ_CONFIG_BIN_MQ_MODE;

sys/dev/netif/bce/if_bce.c

3649

val |= BCE_MQ_CONFIG_HALT_DIS;

sys/dev/netif/bce/if_bce.c

3652

REG_WR(sc, BCE_MQ_CONFIG, val);

sys/dev/netif/bce/if_bce.c

3654

val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_CTX_SIZE);

sys/dev/netif/bce/if_bce.c

3655

REG_WR(sc, BCE_MQ_KNL_BYP_WIND_START, val);

sys/dev/netif/bce/if_bce.c

3656

REG_WR(sc, BCE_MQ_KNL_WIND_END, val);

sys/dev/netif/bce/if_bce.c

3659

val = (BCM_PAGE_BITS - 8) << 24;

sys/dev/netif/bce/if_bce.c

3660

REG_WR(sc, BCE_RV2P_CONFIG, val);

sys/dev/netif/bce/if_bce.c

3663

val = REG_RD(sc, BCE_TBDR_CONFIG);

sys/dev/netif/bce/if_bce.c

3664

val &= ~BCE_TBDR_CONFIG_PAGE_SIZE;

sys/dev/netif/bce/if_bce.c

3665

val |= (BCM_PAGE_BITS - 8) << 24 | 0x40;

sys/dev/netif/bce/if_bce.c

3666

REG_WR(sc, BCE_TBDR_CONFIG, val);

sys/dev/netif/bce/if_bce.c

3683

uint32_t reg, val;

sys/dev/netif/bce/if_bce.c

3690

val = sc->eaddr[0] + (sc->eaddr[1] << 8) + (sc->eaddr[2] << 16) +

sys/dev/netif/bce/if_bce.c

3692

REG_WR(sc, BCE_EMAC_BACKOFF_SEED, val);

sys/dev/netif/bce/if_bce.c

3732

val = BCE_HC_CONFIG_TX_TMR_MODE | BCE_HC_CONFIG_COLLECT_STATS;

sys/dev/netif/bce/if_bce.c

3744

val |= BCE_HC_CONFIG_ONE_SHOT | BCE_HC_CONFIG_USE_INT_PARAM;

sys/dev/netif/bce/if_bce.c

3746

val |= BCE_HC_CONFIG_SB_ADDR_INC_128B;

sys/dev/netif/bce/if_bce.c

3748

REG_WR(sc, BCE_HC_CONFIG, val);

sys/dev/netif/bce/if_bce.c

3792

val = REG_RD(sc, BCE_MISC_NEW_CORE_CTL);

sys/dev/netif/bce/if_bce.c

3793

val |= BCE_MISC_NEW_CORE_CTL_DMA_ENABLE;

sys/dev/netif/bce/if_bce.c

3794

REG_WR(sc, BCE_MISC_NEW_CORE_CTL, val);

sys/dev/netif/bce/if_bce.c

3808

val = REG_RD(sc, BCE_RPM_MGMT_PKT_CTRL) &

sys/dev/netif/bce/if_bce.c

3810

REG_WR(sc, BCE_RPM_MGMT_PKT_CTRL, val);

sys/dev/netif/bce/if_bce.c

3921

uint32_t val;

sys/dev/netif/bce/if_bce.c

3927

val = BCE_L2CTX_TX_TYPE_TYPE_L2 | BCE_L2CTX_TX_TYPE_SIZE_L2;

sys/dev/netif/bce/if_bce.c

3929

BCE_L2CTX_TX_TYPE_XI, val);

sys/dev/netif/bce/if_bce.c

3930

val = BCE_L2CTX_TX_CMD_TYPE_TYPE_L2 | (8 << 16);

sys/dev/netif/bce/if_bce.c

3932

BCE_L2CTX_TX_CMD_TYPE_XI, val);

sys/dev/netif/bce/if_bce.c

3935

val = BCE_ADDR_HI(txr->tx_bd_chain_paddr[0]);

sys/dev/netif/bce/if_bce.c

3937

BCE_L2CTX_TX_TBDR_BHADDR_HI_XI, val);

sys/dev/netif/bce/if_bce.c

3938

val = BCE_ADDR_LO(txr->tx_bd_chain_paddr[0]);

sys/dev/netif/bce/if_bce.c

3940

BCE_L2CTX_TX_TBDR_BHADDR_LO_XI, val);

sys/dev/netif/bce/if_bce.c

3943

val = BCE_L2CTX_TX_TYPE_TYPE_L2 | BCE_L2CTX_TX_TYPE_SIZE_L2;

sys/dev/netif/bce/if_bce.c

3945

BCE_L2CTX_TX_TYPE, val);

sys/dev/netif/bce/if_bce.c

3946

val = BCE_L2CTX_TX_CMD_TYPE_TYPE_L2 | (8 << 16);

sys/dev/netif/bce/if_bce.c

3948

BCE_L2CTX_TX_CMD_TYPE, val);

sys/dev/netif/bce/if_bce.c

3951

val = BCE_ADDR_HI(txr->tx_bd_chain_paddr[0]);

sys/dev/netif/bce/if_bce.c

3953

BCE_L2CTX_TX_TBDR_BHADDR_HI, val);

sys/dev/netif/bce/if_bce.c

3954

val = BCE_ADDR_LO(txr->tx_bd_chain_paddr[0]);

sys/dev/netif/bce/if_bce.c

3956

BCE_L2CTX_TX_TBDR_BHADDR_LO, val);

sys/dev/netif/bce/if_bce.c

4049

uint32_t val;

sys/dev/netif/bce/if_bce.c

4052

val = BCE_L2CTX_RX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |

sys/dev/netif/bce/if_bce.c

4076

val |= lo_water |

sys/dev/netif/bce/if_bce.c

4081

BCE_L2CTX_RX_CTX_TYPE, val);

sys/dev/netif/bce/if_bce.c

4086

val = REG_RD(rxr->sc, BCE_MQ_MAP_L2_5);

sys/dev/netif/bce/if_bce.c

4087

REG_WR(rxr->sc, BCE_MQ_MAP_L2_5, val | BCE_MQ_MAP_L2_5_ARM);

sys/dev/netif/bce/if_bce.c

4091

val = BCE_ADDR_HI(rxr->rx_bd_chain_paddr[0]);

sys/dev/netif/bce/if_bce.c

4093

BCE_L2CTX_RX_NX_BDHADDR_HI, val);

sys/dev/netif/bce/if_bce.c

4094

val = BCE_ADDR_LO(rxr->rx_bd_chain_paddr[0]);

sys/dev/netif/bce/if_bce.c

4096

BCE_L2CTX_RX_NX_BDHADDR_LO, val);

sys/dev/netif/bce/if_bce.c

692

uint32_t val;

sys/dev/netif/bce/if_bce.c

770

val = REG_RD_IND(sc, BCE_SHM_HDR_SIGNATURE);

sys/dev/netif/bce/if_bce.c

771

if ((val & BCE_SHM_HDR_SIGNATURE_SIG_MASK) ==

sys/dev/netif/bce/if_bce.c

781

val = bce_shmem_rd(sc, BCE_DEV_INFO_BC_REV);

sys/dev/netif/bce/if_bce.c

786

num = (uint8_t)(val >> (24 - (i * 8)));

sys/dev/netif/bce/if_bce.c

798

val = bce_shmem_rd(sc, BCE_PORT_FEATURE);

sys/dev/netif/bce/if_bce.c

799

if (val & BCE_PORT_FEATURE_ASF_ENABLED) {

sys/dev/netif/bce/if_bce.c

804

val = bce_shmem_rd(sc, BCE_BC_STATE_CONDITION);

sys/dev/netif/bce/if_bce.c

805

if (val & BCE_CONDITION_MFW_RUN_MASK)

sys/dev/netif/bce/if_bce.c

812

val = bce_shmem_rd(sc, BCE_BC_STATE_CONDITION) &

sys/dev/netif/bce/if_bce.c

814

if (val != BCE_CONDITION_MFW_RUN_UNKNOWN &&

sys/dev/netif/bce/if_bce.c

815

val != BCE_CONDITION_MFW_RUN_NONE) {

sys/dev/netif/bce/if_bce.c

819

val = bce_reg_rd_ind(sc, addr + j * 4);

sys/dev/netif/bce/if_bce.c

820

val = bswap32(val);

sys/dev/netif/bce/if_bce.c

821

memcpy(&sc->bce_mfw_ver[i], &val, 4);

sys/dev/netif/bce/if_bce.c

827

val = REG_RD(sc, BCE_PCICFG_MISC_STATUS);

sys/dev/netif/bce/if_bce.c

828

if (val & BCE_PCICFG_MISC_STATUS_PCIX_DET) {

sys/dev/netif/bce/if_bce.c

861

if (val & BCE_PCICFG_MISC_STATUS_M66EN)

sys/dev/netif/bce/if_bce.c

867

if (val & BCE_PCICFG_MISC_STATUS_32BIT_DET)

sys/dev/netif/bce/if_bcereg.h

533

#define REG_WR(sc, reg, val) \

sys/dev/netif/bce/if_bcereg.h

534

bus_space_write_4(sc->bce_btag, sc->bce_bhandle, reg, val)

sys/dev/netif/bce/if_bcereg.h

535

#define REG_WR16(sc, reg, val) \

sys/dev/netif/bce/if_bcereg.h

536

bus_space_write_2(sc->bce_btag, sc->bce_bhandle, reg, val)

sys/dev/netif/bce/if_bcereg.h

541

#define REG_WR_IND(sc, offset, val) bce_reg_wr_ind(sc, offset, val)

sys/dev/netif/bce/if_bcereg.h

543

#define CTX_WR(sc, cid_addr, offset, val) \

sys/dev/netif/bce/if_bcereg.h

544

bce_ctx_wr(sc, cid_addr, offset, val)

sys/dev/netif/bfe/if_bfe.c

1002

*val = CSR_READ_4(sc, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA;

sys/dev/netif/bfe/if_bfe.c

1007

bfe_writephy(struct bfe_softc *sc, uint32_t reg, uint32_t val)

sys/dev/netif/bfe/if_bfe.c

1017

(val & BFE_MDIO_DATA_DATA)));

sys/dev/netif/bfe/if_bfe.c

1030

uint32_t val;

sys/dev/netif/bfe/if_bfe.c

1033

bfe_readphy(sc, 26, &val);

sys/dev/netif/bfe/if_bfe.c

1034

bfe_writephy(sc, 26, val & 0x7fff);

sys/dev/netif/bfe/if_bfe.c

1035

bfe_readphy(sc, 26, &val);

sys/dev/netif/bfe/if_bfe.c

1038

bfe_readphy(sc, 27, &val);

sys/dev/netif/bfe/if_bfe.c

1039

bfe_writephy(sc, 27, val | (1 << 6));

sys/dev/netif/bfe/if_bfe.c

1048

uint32_t *val;

sys/dev/netif/bfe/if_bfe.c

1050

val = &sc->bfe_hwstats.tx_good_octets;

sys/dev/netif/bfe/if_bfe.c

1052

*val++ += CSR_READ_4(sc, reg);

sys/dev/netif/bfe/if_bfe.c

1053

val = &sc->bfe_hwstats.rx_good_octets;

sys/dev/netif/bfe/if_bfe.c

1055

*val++ += CSR_READ_4(sc, reg);

sys/dev/netif/bfe/if_bfe.c

494

bfe_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/bfe/if_bfe.c

501

bfe_writephy(sc, reg, val);

sys/dev/netif/bfe/if_bfe.c

650

uint32_t bar_orig, val;

sys/dev/netif/bfe/if_bfe.c

655

val = CSR_READ_4(sc, BFE_SBINTVEC);

sys/dev/netif/bfe/if_bfe.c

656

val |= cores;

sys/dev/netif/bfe/if_bfe.c

657

CSR_WRITE_4(sc, BFE_SBINTVEC, val);

sys/dev/netif/bfe/if_bfe.c

659

val = CSR_READ_4(sc, BFE_SSB_PCI_TRANS_2);

sys/dev/netif/bfe/if_bfe.c

660

val |= BFE_SSB_PCI_PREF | BFE_SSB_PCI_BURST;

sys/dev/netif/bfe/if_bfe.c

661

CSR_WRITE_4(sc, BFE_SSB_PCI_TRANS_2, val);

sys/dev/netif/bfe/if_bfe.c

681

uint32_t val;

sys/dev/netif/bfe/if_bfe.c

685

bfe_readphy(sc, 0, &val);

sys/dev/netif/bfe/if_bfe.c

686

if (val & BMCR_RESET) {

sys/dev/netif/bfe/if_bfe.c

712

uint32_t val;

sys/dev/netif/bfe/if_bfe.c

718

val = CSR_READ_4(sc, BFE_SBTMSLOW) & (BFE_RESET | BFE_REJECT | BFE_CLOCK);

sys/dev/netif/bfe/if_bfe.c

719

if (val == BFE_CLOCK) {

sys/dev/netif/bfe/if_bfe.c

745

val = CSR_READ_4(sc, BFE_DEVCTRL);

sys/dev/netif/bfe/if_bfe.c

746

if (!(val & BFE_IPP))

sys/dev/netif/bfe/if_bfe.c

815

uint32_t val;

sys/dev/netif/bfe/if_bfe.c

828

val = CSR_READ_4(sc, BFE_SBIMSTATE);

sys/dev/netif/bfe/if_bfe.c

829

if (val & (BFE_IBE | BFE_TO))

sys/dev/netif/bfe/if_bfe.c

830

CSR_WRITE_4(sc, BFE_SBIMSTATE, val & ~(BFE_IBE | BFE_TO));

sys/dev/netif/bfe/if_bfe.c

846

uint32_t val;

sys/dev/netif/bfe/if_bfe.c

848

val = ((uint32_t) data[2]) << 24;

sys/dev/netif/bfe/if_bfe.c

849

val |= ((uint32_t) data[3]) << 16;

sys/dev/netif/bfe/if_bfe.c

850

val |= ((uint32_t) data[4]) << 8;

sys/dev/netif/bfe/if_bfe.c

851

val |= ((uint32_t) data[5]);

sys/dev/netif/bfe/if_bfe.c

852

CSR_WRITE_4(sc, BFE_CAM_DATA_LO, val);

sys/dev/netif/bfe/if_bfe.c

853

val = (BFE_CAM_HI_VALID |

sys/dev/netif/bfe/if_bfe.c

856

CSR_WRITE_4(sc, BFE_CAM_DATA_HI, val);

sys/dev/netif/bfe/if_bfe.c

867

uint32_t val;

sys/dev/netif/bfe/if_bfe.c

870

val = CSR_READ_4(sc, BFE_RXCONF);

sys/dev/netif/bfe/if_bfe.c

873

val |= BFE_RXCONF_PROMISC;

sys/dev/netif/bfe/if_bfe.c

875

val &= ~BFE_RXCONF_PROMISC;

sys/dev/netif/bfe/if_bfe.c

878

val &= ~BFE_RXCONF_DBCAST;

sys/dev/netif/bfe/if_bfe.c

880

val |= BFE_RXCONF_DBCAST;

sys/dev/netif/bfe/if_bfe.c

887

val |= BFE_RXCONF_ALLMULTI;

sys/dev/netif/bfe/if_bfe.c

889

val &= ~BFE_RXCONF_ALLMULTI;

sys/dev/netif/bfe/if_bfe.c

898

CSR_WRITE_4(sc, BFE_RXCONF, val);

sys/dev/netif/bfe/if_bfe.c

971

uint32_t val = CSR_READ_4(sc, reg);

sys/dev/netif/bfe/if_bfe.c

973

if (clear && !(val & bit))

sys/dev/netif/bfe/if_bfe.c

975

if (!clear && (val & bit))

sys/dev/netif/bfe/if_bfe.c

990

bfe_readphy(struct bfe_softc *sc, uint32_t reg, uint32_t *val)

sys/dev/netif/bfe/if_bfereg.h

415

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/bfe/if_bfereg.h

416

bus_space_write_4(sc->bfe_btag, sc->bfe_bhandle, reg, val)

sys/dev/netif/bfe/if_bfereg.h

418

#define BFE_OR(sc, name, val) \

sys/dev/netif/bfe/if_bfereg.h

419

CSR_WRITE_4(sc, name, CSR_READ_4(sc, name) | val)

sys/dev/netif/bfe/if_bfereg.h

421

#define BFE_AND(sc, name, val) \

sys/dev/netif/bfe/if_bfereg.h

422

CSR_WRITE_4(sc, name, CSR_READ_4(sc, name) & val)

sys/dev/netif/bge/if_bge.c

1299

uint16_t val;

sys/dev/netif/bge/if_bge.c

1323

val = pci_read_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, 2);

sys/dev/netif/bge/if_bge.c

1324

val |= (1 << 10) | (1 << 12) | (1 << 13);

sys/dev/netif/bge/if_bge.c

1325

pci_write_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, val, 2);

sys/dev/netif/bge/if_bge.c

1442

uint32_t val;

sys/dev/netif/bge/if_bge.c

1648

val = 8;

sys/dev/netif/bge/if_bge.c

1650

val = BGE_STD_RX_RING_CNT / 8;

sys/dev/netif/bge/if_bge.c

1651

CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, val);

sys/dev/netif/bge/if_bge.c

1814

val = BGE_STATBLKSZ_FULL;

sys/dev/netif/bge/if_bge.c

1816

val = BGE_STATBLKSZ_32BYTE;

sys/dev/netif/bge/if_bge.c

1825

val |= BGE_HCCMODE_CLRTICK_TX;

sys/dev/netif/bge/if_bge.c

1829

CSR_WRITE_4(sc, BGE_HCC_MODE, val | BGE_HCCMODE_ENABLE);

sys/dev/netif/bge/if_bge.c

1842

val = BGE_MACMODE_TXDMA_ENB | BGE_MACMODE_RXDMA_ENB |

sys/dev/netif/bge/if_bge.c

1848

val |= BGE_PORTMODE_TBI;

sys/dev/netif/bge/if_bge.c

1850

val |= BGE_PORTMODE_GMII;

sys/dev/netif/bge/if_bge.c

1852

val |= BGE_PORTMODE_MII;

sys/dev/netif/bge/if_bge.c

1856

val |= BGE_MACMODE_APE_RX_EN | BGE_MACMODE_APE_TX_EN;

sys/dev/netif/bge/if_bge.c

1859

CSR_WRITE_4(sc, BGE_MAC_MODE, val);

sys/dev/netif/bge/if_bge.c

1878

val = BGE_WDMAMODE_ENABLE|BGE_WDMAMODE_ALL_ATTNS;

sys/dev/netif/bge/if_bge.c

1881

val |= BGE_WDMAMODE_STATUS_TAG_FIX;

sys/dev/netif/bge/if_bge.c

1885

val |= BGE_WDMAMODE_BURST_ALL_DATA;

sys/dev/netif/bge/if_bge.c

1887

CSR_WRITE_4(sc, BGE_WDMA_MODE, val);

sys/dev/netif/bge/if_bge.c

1899

val = CSR_READ_4(sc, BGE_RDMA_RSRVCTRL);

sys/dev/netif/bge/if_bge.c

1901

val| BGE_RDMA_RSRVCTRL_FIFO_OFLW_FIX);

sys/dev/netif/bge/if_bge.c

1905

val = BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS;

sys/dev/netif/bge/if_bge.c

1909

val |= BGE_RDMAMODE_BD_SBD_CRPT_ATTN |

sys/dev/netif/bge/if_bge.c

1913

val |= BGE_RDMAMODE_FIFO_LONG_BURST;

sys/dev/netif/bge/if_bge.c

1915

val |= BGE_RDMAMODE_TSO4_ENABLE;

sys/dev/netif/bge/if_bge.c

1916

CSR_WRITE_4(sc, BGE_RDMA_MODE, val);

sys/dev/netif/bge/if_bge.c

1936

val = BGE_SDCMODE_ENABLE;

sys/dev/netif/bge/if_bge.c

1938

val |= BGE_SDCMODE_CDELAY;

sys/dev/netif/bge/if_bge.c

1939

CSR_WRITE_4(sc, BGE_SDC_MODE, val);

sys/dev/netif/bge/if_bge.c

2757

int i, val = 0;

sys/dev/netif/bge/if_bge.c

2902

val = BGE_PCISTATE_ROM_ENABLE | BGE_PCISTATE_ROM_RETRY_ENABLE;

sys/dev/netif/bge/if_bge.c

2905

val |= BGE_PCISTATE_RETRY_SAME_DMA;

sys/dev/netif/bge/if_bge.c

2907

val |= BGE_PCISTATE_ALLOW_APE_CTLSPC_WR |

sys/dev/netif/bge/if_bge.c

2911

pci_write_config(dev, BGE_PCI_PCISTATE, val, 4);

sys/dev/netif/bge/if_bge.c

2942

uint32_t val;

sys/dev/netif/bge/if_bge.c

2953

val = CSR_READ_4(sc, BGE_MARB_MODE);

sys/dev/netif/bge/if_bge.c

2954

CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val);

sys/dev/netif/bge/if_bge.c

2963

val = CSR_READ_4(sc, BGE_MAC_MODE);

sys/dev/netif/bge/if_bge.c

2964

val = (val & ~mac_mode_mask) | mac_mode;

sys/dev/netif/bge/if_bge.c

2965

CSR_WRITE_4(sc, BGE_MAC_MODE, val);

sys/dev/netif/bge/if_bge.c

2972

val = CSR_READ_4(sc, BGE_VCPU_STATUS);

sys/dev/netif/bge/if_bge.c

2973

if (val & BGE_VCPU_STATUS_INIT_DONE)

sys/dev/netif/bge/if_bge.c

2993

val = bge_readmem_ind(sc, BGE_SRAM_FW_MB);

sys/dev/netif/bge/if_bge.c

2994

if (val == ~BGE_SRAM_FW_MB_MAGIC)

sys/dev/netif/bge/if_bge.c

3000

"timed out, found 0x%08x\n", val);

sys/dev/netif/bge/if_bge.c

3346

uint32_t val;

sys/dev/netif/bge/if_bge.c

3348

val = pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4);

sys/dev/netif/bge/if_bge.c

3349

if (val & BGE_PCISTAT_INTR_NOTACT)

sys/dev/netif/bge/if_bge.c

481

uint32_t val;

sys/dev/netif/bge/if_bge.c

488

val = pci_read_config(dev, BGE_PCI_MEMWIN_DATA, 4);

sys/dev/netif/bge/if_bge.c

490

return (val);

sys/dev/netif/bge/if_bge.c

494

bge_writemem_ind(struct bge_softc *sc, uint32_t off, uint32_t val)

sys/dev/netif/bge/if_bge.c

503

pci_write_config(dev, BGE_PCI_MEMWIN_DATA, val, 4);

sys/dev/netif/bge/if_bge.c

519

bge_writereg_ind(struct bge_softc *sc, uint32_t off, uint32_t val)

sys/dev/netif/bge/if_bge.c

524

pci_write_config(dev, BGE_PCI_REG_DATA, val, 4);

sys/dev/netif/bge/if_bge.c

528

bge_writemem_direct(struct bge_softc *sc, uint32_t off, uint32_t val)

sys/dev/netif/bge/if_bge.c

530

CSR_WRITE_4(sc, off, val);

sys/dev/netif/bge/if_bge.c

534

bge_writembx(struct bge_softc *sc, int off, int val)

sys/dev/netif/bge/if_bge.c

539

CSR_WRITE_4(sc, off, val);

sys/dev/netif/bge/if_bge.c

686

uint32_t val;

sys/dev/netif/bge/if_bge.c

708

val = CSR_READ_4(sc, BGE_MI_COMM);

sys/dev/netif/bge/if_bge.c

709

if ((val & BGE_MICOMM_BUSY) == 0) {

sys/dev/netif/bge/if_bge.c

711

val = CSR_READ_4(sc, BGE_MI_COMM);

sys/dev/netif/bge/if_bge.c

717

"(phy %d, reg %d, val 0x%08x)\n", phy, reg, val);

sys/dev/netif/bge/if_bge.c

718

val = 0;

sys/dev/netif/bge/if_bge.c

729

if (val & BGE_MICOMM_READFAIL)

sys/dev/netif/bge/if_bge.c

732

return (val & 0xFFFF);

sys/dev/netif/bge/if_bge.c

736

bge_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/bge/if_bge.c

759

BGE_MIPHY(phy) | BGE_MIREG(reg) | val);

sys/dev/netif/bge/if_bge.c

771

"(phy %d, reg %d, val %d)\n", phy, reg, val);

sys/dev/netif/bge/if_bgevar.h

102

val = CSR_READ_4(sc, BGE_MEMWIN_START + (x & 0xFFFF)); \

sys/dev/netif/bge/if_bgevar.h

105

#define BGE_MEMWIN_WRITE(sc, x, val) \

sys/dev/netif/bge/if_bgevar.h

109

CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0xFFFF), val); \

sys/dev/netif/bge/if_bgevar.h

112

#define RCB_WRITE_4(sc, rcb, offset, val) \

sys/dev/netif/bge/if_bgevar.h

114

rcb + offsetof(struct bge_rcb, offset), val)

sys/dev/netif/bge/if_bgevar.h

74

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/bge/if_bgevar.h

75

bus_space_write_4(sc->bge_btag, sc->bge_bhandle, reg, val)

sys/dev/netif/bge/if_bgevar.h

87

#define APE_WRITE_4(sc, reg, val) \

sys/dev/netif/bge/if_bgevar.h

88

bus_write_4(sc->bge_res2, reg, val)

sys/dev/netif/bge/if_bgevar.h

98

#define BGE_MEMWIN_READ(sc, x, val) \

sys/dev/netif/bnx/if_bnx.c

1118

uint32_t val;

sys/dev/netif/bnx/if_bnx.c

1122

val = mode_ctl & ~BGE_MODECTL_PCIE_PORTS;

sys/dev/netif/bnx/if_bnx.c

1126

val | BGE_MODECTL_PCIE_PL_SEL);

sys/dev/netif/bnx/if_bnx.c

1128

val = CSR_READ_4(sc, BGE_PCIE_PL_LO_PHYCTL5);

sys/dev/netif/bnx/if_bnx.c

1129

val |= BGE_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ;

sys/dev/netif/bnx/if_bnx.c

1130

CSR_WRITE_4(sc, BGE_PCIE_PL_LO_PHYCTL5, val);

sys/dev/netif/bnx/if_bnx.c

1136

val = CSR_READ_4(sc, BGE_CPMU_PADRNG_CTL);

sys/dev/netif/bnx/if_bnx.c

1137

val |= BGE_CPMU_PADRNG_CTL_RDIV2;

sys/dev/netif/bnx/if_bnx.c

1138

CSR_WRITE_4(sc, BGE_CPMU_PADRNG_CTL, val);

sys/dev/netif/bnx/if_bnx.c

1141

val = mode_ctl & ~BGE_MODECTL_PCIE_PORTS;

sys/dev/netif/bnx/if_bnx.c

1145

val | BGE_MODECTL_PCIE_DL_SEL);

sys/dev/netif/bnx/if_bnx.c

1147

val = CSR_READ_4(sc, BGE_PCIE_DL_LO_FTSMAX);

sys/dev/netif/bnx/if_bnx.c

1148

val &= ~BGE_PCIE_DL_LO_FTSMAX_MASK;

sys/dev/netif/bnx/if_bnx.c

1149

val |= BGE_PCIE_DL_LO_FTSMAX_VAL;

sys/dev/netif/bnx/if_bnx.c

1150

CSR_WRITE_4(sc, BGE_PCIE_DL_LO_FTSMAX, val);

sys/dev/netif/bnx/if_bnx.c

1155

val = CSR_READ_4(sc, BGE_CPMU_LSPD_10MB_CLK);

sys/dev/netif/bnx/if_bnx.c

1156

val &= ~BGE_CPMU_LSPD_10MB_MACCLK_MASK;

sys/dev/netif/bnx/if_bnx.c

1157

val |= BGE_CPMU_LSPD_10MB_MACCLK_6_25;

sys/dev/netif/bnx/if_bnx.c

1158

CSR_WRITE_4(sc, BGE_CPMU_LSPD_10MB_CLK, val);

sys/dev/netif/bnx/if_bnx.c

1227

uint32_t val;

sys/dev/netif/bnx/if_bnx.c

1259

val = BGE_BMANMODE_ENABLE | BGE_BMANMODE_LOMBUF_ATTN;

sys/dev/netif/bnx/if_bnx.c

1267

val |= BGE_BMANMODE_NO_TX_UNDERRUN;

sys/dev/netif/bnx/if_bnx.c

1271

val |= BGE_BMANMODE_LOMBUF_ATTN;

sys/dev/netif/bnx/if_bnx.c

1272

CSR_WRITE_4(sc, BGE_BMAN_MODE, val);

sys/dev/netif/bnx/if_bnx.c

1415

val = 8;

sys/dev/netif/bnx/if_bnx.c

1416

CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, val);

sys/dev/netif/bnx/if_bnx.c

1513

val = 0x2620;

sys/dev/netif/bnx/if_bnx.c

1516

val |= CSR_READ_4(sc, BGE_TX_LENGTHS) &

sys/dev/netif/bnx/if_bnx.c

1519

CSR_WRITE_4(sc, BGE_TX_LENGTHS, val);

sys/dev/netif/bnx/if_bnx.c

1581

val = BGE_STATBLKSZ_32BYTE;

sys/dev/netif/bnx/if_bnx.c

1588

val |= BGE_HCCMODE_CLRTICK_TX;

sys/dev/netif/bnx/if_bnx.c

1591

CSR_WRITE_4(sc, BGE_HCC_MODE, val | BGE_HCCMODE_ENABLE);

sys/dev/netif/bnx/if_bnx.c

1600

val = BGE_MACMODE_TXDMA_ENB | BGE_MACMODE_RXDMA_ENB |

sys/dev/netif/bnx/if_bnx.c

1606

val |= BGE_PORTMODE_TBI;

sys/dev/netif/bnx/if_bnx.c

1608

val |= BGE_PORTMODE_GMII;

sys/dev/netif/bnx/if_bnx.c

1610

val |= BGE_PORTMODE_MII;

sys/dev/netif/bnx/if_bnx.c

1614

val |= BGE_MACMODE_APE_RX_EN | BGE_MACMODE_APE_TX_EN;

sys/dev/netif/bnx/if_bnx.c

1617

CSR_WRITE_4(sc, BGE_MAC_MODE, val);

sys/dev/netif/bnx/if_bnx.c

1635

val = BGE_WDMAMODE_ENABLE|BGE_WDMAMODE_ALL_ATTNS;

sys/dev/netif/bnx/if_bnx.c

1637

val |= BGE_WDMAMODE_STATUS_TAG_FIX;

sys/dev/netif/bnx/if_bnx.c

1640

val |= BGE_WDMAMODE_BURST_ALL_DATA;

sys/dev/netif/bnx/if_bnx.c

1642

CSR_WRITE_4(sc, BGE_WDMA_MODE, val);

sys/dev/netif/bnx/if_bnx.c

1702

val = BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS;

sys/dev/netif/bnx/if_bnx.c

1704

val |= BGE_RDMAMODE_MULT_DMA_RD_DIS;

sys/dev/netif/bnx/if_bnx.c

1708

val |= BGE_RDMAMODE_BD_SBD_CRPT_ATTN |

sys/dev/netif/bnx/if_bnx.c

1714

val |= CSR_READ_4(sc, BGE_RDMA_MODE) &

sys/dev/netif/bnx/if_bnx.c

1720

val &= ~BGE_RDMAMODE_MULT_DMA_RD_DIS;

sys/dev/netif/bnx/if_bnx.c

1723

val |= BGE_RDMAMODE_JMB_2K_MMRR;

sys/dev/netif/bnx/if_bnx.c

1725

val |= BGE_RDMAMODE_TSO4_ENABLE;

sys/dev/netif/bnx/if_bnx.c

1726

val |= BGE_RDMAMODE_FIFO_LONG_BURST;

sys/dev/netif/bnx/if_bnx.c

1727

CSR_WRITE_4(sc, BGE_RDMA_MODE, val);

sys/dev/netif/bnx/if_bnx.c

1772

val = BGE_SDCMODE_ENABLE;

sys/dev/netif/bnx/if_bnx.c

1774

val |= BGE_SDCMODE_CDELAY;

sys/dev/netif/bnx/if_bnx.c

1775

CSR_WRITE_4(sc, BGE_SDC_MODE, val);

sys/dev/netif/bnx/if_bnx.c

1786

val = BGE_SBDIMODE_ENABLE;

sys/dev/netif/bnx/if_bnx.c

1788

val |= BGE_SBDIMODE_MULTI_TXR;

sys/dev/netif/bnx/if_bnx.c

1789

CSR_WRITE_4(sc, BGE_SBDI_MODE, val);

sys/dev/netif/bnx/if_bnx.c

2575

int i, val = 0;

sys/dev/netif/bnx/if_bnx.c

2694

val = BGE_PCISTATE_ROM_ENABLE | BGE_PCISTATE_ROM_RETRY_ENABLE;

sys/dev/netif/bnx/if_bnx.c

2696

val |= BGE_PCISTATE_ALLOW_APE_CTLSPC_WR |

sys/dev/netif/bnx/if_bnx.c

2700

pci_write_config(dev, BGE_PCI_PCISTATE, val, 4);

sys/dev/netif/bnx/if_bnx.c

2710

val = CSR_READ_4(sc, BGE_MAC_MODE);

sys/dev/netif/bnx/if_bnx.c

2711

val = (val & ~mac_mode_mask) | mac_mode;

sys/dev/netif/bnx/if_bnx.c

2712

CSR_WRITE_4(sc, BGE_MAC_MODE, val);

sys/dev/netif/bnx/if_bnx.c

2722

val = bnx_readmem_ind(sc, BGE_SRAM_FW_MB);

sys/dev/netif/bnx/if_bnx.c

2723

if (val == ~BGE_SRAM_FW_MB_MAGIC)

sys/dev/netif/bnx/if_bnx.c

2729

"timed out, found 0x%08x\n", val);

sys/dev/netif/bnx/if_bnx.c

2948

uint32_t val;

sys/dev/netif/bnx/if_bnx.c

2953

val = CSR_READ_4(sc, BGE_FLOW_ATTN);

sys/dev/netif/bnx/if_bnx.c

2954

if (val & ~BGE_FLOWATTN_MB_LOWAT) {

sys/dev/netif/bnx/if_bnx.c

2956

"flow attn 0x%08x\n", val);

sys/dev/netif/bnx/if_bnx.c

2960

val = CSR_READ_4(sc, BGE_MSI_STATUS);

sys/dev/netif/bnx/if_bnx.c

2961

if (val & ~BGE_MSISTAT_MSI_PCI_REQ) {

sys/dev/netif/bnx/if_bnx.c

2963

"msi status 0x%08x\n", val);

sys/dev/netif/bnx/if_bnx.c

2967

val = CSR_READ_4(sc, BGE_RDMA_STATUS);

sys/dev/netif/bnx/if_bnx.c

2968

if (val) {

sys/dev/netif/bnx/if_bnx.c

2970

"rmda status 0x%08x\n", val);

sys/dev/netif/bnx/if_bnx.c

2974

val = CSR_READ_4(sc, BGE_WDMA_STATUS);

sys/dev/netif/bnx/if_bnx.c

2975

if (val) {

sys/dev/netif/bnx/if_bnx.c

2977

"wdma status 0x%08x\n", val);

sys/dev/netif/bnx/if_bnx.c

3149

uint32_t val;

sys/dev/netif/bnx/if_bnx.c

3151

val = pci_read_config(sc->bnx_dev, BGE_PCI_PCISTATE, 4);

sys/dev/netif/bnx/if_bnx.c

3152

if (val & BGE_PCISTAT_INTR_NOTACT)

sys/dev/netif/bnx/if_bnx.c

3345

uint32_t *s, val;

sys/dev/netif/bnx/if_bnx.c

3360

val = CSR_READ_4(sc, BGE_RXLP_LOCSTAT_OUT_OF_BDS);

sys/dev/netif/bnx/if_bnx.c

3361

sc->bnx_norxbds += val;

sys/dev/netif/bnx/if_bnx.c

372

uint32_t val;

sys/dev/netif/bnx/if_bnx.c

375

val = pci_read_config(dev, BGE_PCI_MEMWIN_DATA, 4);

sys/dev/netif/bnx/if_bnx.c

377

return (val);

sys/dev/netif/bnx/if_bnx.c

381

bnx_writemem_ind(struct bnx_softc *sc, uint32_t off, uint32_t val)

sys/dev/netif/bnx/if_bnx.c

386

pci_write_config(dev, BGE_PCI_MEMWIN_DATA, val, 4);

sys/dev/netif/bnx/if_bnx.c

391

bnx_writemem_direct(struct bnx_softc *sc, uint32_t off, uint32_t val)

sys/dev/netif/bnx/if_bnx.c

393

CSR_WRITE_4(sc, off, val);

sys/dev/netif/bnx/if_bnx.c

397

bnx_writembx(struct bnx_softc *sc, int off, int val)

sys/dev/netif/bnx/if_bnx.c

399

CSR_WRITE_4(sc, off, val);

sys/dev/netif/bnx/if_bnx.c

481

uint32_t val;

sys/dev/netif/bnx/if_bnx.c

503

val = CSR_READ_4(sc, BGE_MI_COMM);

sys/dev/netif/bnx/if_bnx.c

504

if ((val & BGE_MICOMM_BUSY) == 0) {

sys/dev/netif/bnx/if_bnx.c

506

val = CSR_READ_4(sc, BGE_MI_COMM);

sys/dev/netif/bnx/if_bnx.c

512

"(phy %d, reg %d, val 0x%08x)\n", phy, reg, val);

sys/dev/netif/bnx/if_bnx.c

513

val = 0;

sys/dev/netif/bnx/if_bnx.c

524

if (val & BGE_MICOMM_READFAIL)

sys/dev/netif/bnx/if_bnx.c

527

return (val & 0xFFFF);

sys/dev/netif/bnx/if_bnx.c

531

bnx_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/bnx/if_bnx.c

550

BGE_MIPHY(phy) | BGE_MIREG(reg) | val);

sys/dev/netif/bnx/if_bnx.c

562

"(phy %d, reg %d, val %d)\n", phy, reg, val);

sys/dev/netif/bnx/if_bnxvar.h

102

val = CSR_READ_4(sc, BGE_MEMWIN_START + (x & 0xFFFF)); \

sys/dev/netif/bnx/if_bnxvar.h

105

#define BNX_MEMWIN_WRITE(sc, x, val) \

sys/dev/netif/bnx/if_bnxvar.h

109

CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0xFFFF), val); \

sys/dev/netif/bnx/if_bnxvar.h

112

#define RCB_WRITE_4(sc, rcb, offset, val) \

sys/dev/netif/bnx/if_bnxvar.h

114

rcb + offsetof(struct bge_rcb, offset), val)

sys/dev/netif/bnx/if_bnxvar.h

74

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/bnx/if_bnxvar.h

75

bus_space_write_4(sc->bnx_btag, sc->bnx_bhandle, reg, val)

sys/dev/netif/bnx/if_bnxvar.h

87

#define APE_WRITE_4(sc, reg, val) \

sys/dev/netif/bnx/if_bnxvar.h

88

bus_write_4(sc->bnx_res2, reg, val)

sys/dev/netif/bnx/if_bnxvar.h

98

#define BNX_MEMWIN_READ(sc, x, val) \

sys/dev/netif/bwn/bwn/if_bwn.c

3002

uint32_t val;

sys/dev/netif/bwn/bwn/if_bwn.c

3004

val = BWN_DMA_READ(dr, BWN_DMA32_RXSTATUS);

sys/dev/netif/bwn/bwn/if_bwn.c

3005

val &= BWN_DMA32_RXDPTR;

sys/dev/netif/bwn/bwn/if_bwn.c

3007

return (val / sizeof(struct bwn_dmadesc32));

sys/dev/netif/bwn/bwn/if_bwn.c

3097

uint32_t val;

sys/dev/netif/bwn/bwn/if_bwn.c

3099

val = BWN_DMA_READ(dr, BWN_DMA64_RXSTATUS);

sys/dev/netif/bwn/bwn/if_bwn.c

3100

val &= BWN_DMA64_RXSTATDPTR;

sys/dev/netif/bwn/bwn/if_bwn.c

3102

return (val / sizeof(struct bwn_dmadesc64));

sys/dev/netif/bwn/bwn/if_bwn.c

3805

bwn_ram_write(struct bwn_mac *mac, uint16_t offset, uint32_t val)

sys/dev/netif/bwn/bwn/if_bwn.c

3817

BWN_WRITE_4(mac, BWN_RAM_DATA, val);

sys/dev/netif/bwn/bwn/if_bwn.c

5400

uint32_t val = 0;

sys/dev/netif/bwn/bwn/if_bwn.c

5402

val = bwn_shm_read_2(mac, BWN_SHARED, 0x08a);

sys/dev/netif/bwn/bwn/if_bwn.c

5403

val <<= 16;

sys/dev/netif/bwn/bwn/if_bwn.c

5404

val |= bwn_shm_read_2(mac, BWN_SHARED, 0x088);

sys/dev/netif/bwn/bwn/if_bwn.c

5406

return (val);

sys/dev/netif/bwn/bwn/if_bwn.c

7152

uint16_t val[BWN_LED_MAX];

sys/dev/netif/bwn/bwn/if_bwn.c

7168

val[0] = siba_sprom_get_gpio0(sc->sc_dev);

sys/dev/netif/bwn/bwn/if_bwn.c

7169

val[1] = siba_sprom_get_gpio1(sc->sc_dev);

sys/dev/netif/bwn/bwn/if_bwn.c

7170

val[2] = siba_sprom_get_gpio2(sc->sc_dev);

sys/dev/netif/bwn/bwn/if_bwn.c

7171

val[3] = siba_sprom_get_gpio3(sc->sc_dev);

sys/dev/netif/bwn/bwn/if_bwn.c

7176

if (val[i] == 0xff) {

sys/dev/netif/bwn/bwn/if_bwn.c

7179

if (val[i] & BWN_LED_ACT_LOW)

sys/dev/netif/bwn/bwn/if_bwn.c

7181

led->led_act = val[i] & BWN_LED_ACT_MASK;

sys/dev/netif/bwn/bwn/if_bwn.c

7213

bwn_led_onoff(const struct bwn_led *led, uint16_t val, int on)

sys/dev/netif/bwn/bwn/if_bwn.c

7219

val |= led->led_mask;

sys/dev/netif/bwn/bwn/if_bwn.c

7221

val &= ~led->led_mask;

sys/dev/netif/bwn/bwn/if_bwn.c

7222

return val;

sys/dev/netif/bwn/bwn/if_bwn.c

7230

uint16_t val;

sys/dev/netif/bwn/bwn/if_bwn.c

7241

val = BWN_READ_2(mac, BWN_GPIO_CONTROL);

sys/dev/netif/bwn/bwn/if_bwn.c

7281

val = bwn_led_onoff(led, val, on);

sys/dev/netif/bwn/bwn/if_bwn.c

7283

BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);

sys/dev/netif/bwn/bwn/if_bwn.c

7327

uint16_t val;

sys/dev/netif/bwn/bwn/if_bwn.c

7329

val = BWN_READ_2(mac, BWN_GPIO_CONTROL);

sys/dev/netif/bwn/bwn/if_bwn.c

7330

val = bwn_led_onoff(led, val, 1);

sys/dev/netif/bwn/bwn/if_bwn.c

7331

BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);

sys/dev/netif/bwn/bwn/if_bwn.c

7349

uint16_t val;

sys/dev/netif/bwn/bwn/if_bwn.c

7351

val = BWN_READ_2(mac, BWN_GPIO_CONTROL);

sys/dev/netif/bwn/bwn/if_bwn.c

7352

val = bwn_led_onoff(sc->sc_blink_led, val, 0);

sys/dev/netif/bwn/bwn/if_bwn.c

7353

BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

192

uint16_t val;

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

196

val = BWN_RF_READ(mac, offset);

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

197

if ((val & mask) == value)

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

208

uint32_t val;

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

212

val = siba_read_4(sc->sc_dev, SIBA_TGSLOW);

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

214

val |= BWN_TMSLOW_MACPHYCLKEN;

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

216

val &= ~BWN_TMSLOW_MACPHYCLKEN;

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

217

siba_write_4(sc->sc_dev, SIBA_TGSLOW, val);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1440

uint16_t offset, val;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1481

for (val = 0x1e1f, offset = 0x0088; offset < 0x0098; offset++) {

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1482

BWN_PHY_WRITE(mac, offset, val);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1483

val -= 0x0202;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1485

for (val = 0x3e3f, offset = 0x0098; offset < 0x00a8; offset++) {

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1486

BWN_PHY_WRITE(mac, offset, val);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1487

val -= 0x0202;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1489

for (val = 0x2120, offset = 0x00a8; offset < 0x00c8; offset++) {

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1490

BWN_PHY_WRITE(mac, offset, (val & 0x3f3f));

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1491

val += 0x0202;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2611

uint16_t val;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2626

val = (uint8_t)(cal->ctl.q);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2627

val |= ((uint8_t)(cal->ctl.i)) << 4;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2633

| ((val & 0x00ff) << 8);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2636

| (val & 0x00ff);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1052

static const uint16_t val[] = {

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1060

BWN_PHY_WRITE(mac, addr[i], val[i]);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3622

bwn_nbits(int32_t val)

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3627

for (tmp = abs(val); tmp != 0; tmp >>= 1)

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

796

uint32_t count, freqref, freqvco, freqxtal, val[3], timeout, timeoutref,

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

841

val[0] = bwn_phy_lp_roundup(freqxtal, 1000000, 16);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

842

val[1] = bwn_phy_lp_roundup(freqxtal, 1000000 * div, 16);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

843

val[2] = bwn_phy_lp_roundup(freqvco, 3, 16);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

845

count = (bwn_phy_lp_roundup(val[2], val[1] + 16, 16) * (timeout + 1) *

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

851

tmp[0] = ((val[2] * 62500) / freqref) << 4;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

852

tmp[1] = ((val[2] * 62500) % freqref) << 4;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

868

tmp[2] = ((41 * (val[2] - 3000)) /1200) + 27;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

881

tmp[5] = bwn_phy_lp_roundup(100 * val[0], val[2], 16) * (tmp[4] * 8) *

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

895

if (val[0] == 45)

sys/dev/netif/bwn/bwn/if_bwn_util.h

36

bwn_hweight32(uint32_t val)

sys/dev/netif/bwn/bwn/if_bwn_util.h

41

r = r + (val & 1);

sys/dev/netif/bwn/bwn/if_bwn_util.h

42

val = val >> 1;

sys/dev/netif/bwn/bwn/if_bwn_util.h

49

bwn_clamp_val(int val, int lo, int hi)

sys/dev/netif/bwn/bwn/if_bwn_util.h

51

if (val < lo)

sys/dev/netif/bwn/bwn/if_bwn_util.h

53

if (val > hi)

sys/dev/netif/bwn/bwn/if_bwn_util.h

55

return val;

sys/dev/netif/bwn/siba/siba_core.c

1935

uint32_t reject, val;

sys/dev/netif/bwn/siba/siba_core.c

1938

val = siba_read_4_sub(sd, SIBA_TGSLOW);

sys/dev/netif/bwn/siba/siba_core.c

1939

val &= SIBA_TGSLOW_CLOCK | SIBA_TGSLOW_RESET | reject;

sys/dev/netif/bwn/siba/siba_core.c

1941

return (val == SIBA_TGSLOW_CLOCK);

sys/dev/netif/bwn/siba/siba_core.c

1955

uint32_t val;

sys/dev/netif/bwn/siba/siba_core.c

1966

val = siba_read_4_sub(sd, SIBA_IAS);

sys/dev/netif/bwn/siba/siba_core.c

1967

if (val & (SIBA_IAS_INBAND_ERR | SIBA_IAS_TIMEOUT)) {

sys/dev/netif/bwn/siba/siba_core.c

1968

val &= ~(SIBA_IAS_INBAND_ERR | SIBA_IAS_TIMEOUT);

sys/dev/netif/bwn/siba/siba_core.c

1969

siba_write_4_sub(sd, SIBA_IAS, val);

sys/dev/netif/bwn/siba/siba_core.c

2017

uint32_t reject, val;

sys/dev/netif/bwn/siba/siba_core.c

2027

val = siba_read_4_sub(sd, SIBA_TGSLOW);

sys/dev/netif/bwn/siba/siba_core.c

2028

if (val & reject)

sys/dev/netif/bwn/siba/siba_core.c

2032

if ((val & reject) == 0) {

sys/dev/netif/bwn/siba/siba_core.c

2037

val = siba_read_4_sub(sd, SIBA_TGSHIGH);

sys/dev/netif/bwn/siba/siba_core.c

2038

if (!(val & SIBA_TGSHIGH_BUSY))

sys/dev/netif/bwn/siba/siba_core.c

2042

if ((val & SIBA_TGSHIGH_BUSY) != 0) {

sys/dev/netif/bwn/siba/siba_core.c

2939

siba_cc_set32(device_t dev, uint32_t reg, uint32_t val)

sys/dev/netif/bwn/siba/siba_core.c

2952

SIBA_CC_SET32(scc, reg, val);

sys/dev/netif/bwn/siba/siba_core.c

2990

siba_cc_write32(device_t dev, uint32_t reg, uint32_t val)

sys/dev/netif/bwn/siba/siba_core.c

3003

SIBA_CC_WRITE32(scc, reg, val);

sys/dev/netif/bwn/siba/sibavar.h

110

#define siba_mips_write_2(sc, core, reg, val) \

sys/dev/netif/bwn/siba/sibavar.h

112

(core * SIBA_CORE_LEN) + (reg), (val))

sys/dev/netif/bwn/siba/sibavar.h

114

#define siba_mips_write_4(sc, core, reg, val) \

sys/dev/netif/bwn/siba/sibavar.h

116

(core * SIBA_CORE_LEN) + (reg), (val))

sys/dev/netif/bwn/siba/sibavar.h

132

#define SIBA_WRITE_4(siba, reg, val) \

sys/dev/netif/bwn/siba/sibavar.h

134

(reg), (val))

sys/dev/netif/bwn/siba/sibavar.h

135

#define SIBA_WRITE_2(siba, reg, val) \

sys/dev/netif/bwn/siba/sibavar.h

137

(reg), (val))

sys/dev/netif/bwn/siba/sibavar.h

171

#define SIBA_CC_WRITE32(scc, offset, val) \

sys/dev/netif/bwn/siba/sibavar.h

172

siba_write_4_sub((scc)->scc_dev, offset, val)

sys/dev/netif/dc/if_dcreg.h

756

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/dc/if_dcreg.h

757

bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val)

sys/dev/netif/de/if_devar.h

43

#define TULIP_CSR_WRITE(sc, csr, val) \

sys/dev/netif/de/if_devar.h

46

(sc)->tulip_csrs.csr, val)

sys/dev/netif/em/if_em.c

2417

int val, rid, msi_enable;

sys/dev/netif/em/if_em.c

2442

val = pci_read_config(dev, rid, 4);

sys/dev/netif/em/if_em.c

2443

if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {

sys/dev/netif/em/if_em.c

2449

if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)

sys/dev/netif/et/if_et.c

1017

uint32_t val;

sys/dev/netif/et/if_et.c

1035

val = __SHIFTIN(10, ET_MAC_HDX_ALT_BEB_TRUNC) |

sys/dev/netif/et/if_et.c

1039

CSR_WRITE_4(sc, ET_MAC_HDX, val);

sys/dev/netif/et/if_et.c

1611

uint32_t val;

sys/dev/netif/et/if_et.c

1622

val = __SHIFTIN(56, ET_IPG_NONB2B_1) |

sys/dev/netif/et/if_et.c

1626

CSR_WRITE_4(sc, ET_IPG, val);

sys/dev/netif/et/if_et.c

1631

val = __SHIFTIN(10, ET_MAC_HDX_ALT_BEB_TRUNC) |

sys/dev/netif/et/if_et.c

1635

CSR_WRITE_4(sc, ET_MAC_HDX, val);

sys/dev/netif/et/if_et.c

1646

val = eaddr[2] | (eaddr[3] << 8) | (eaddr[4] << 16) | (eaddr[5] << 24);

sys/dev/netif/et/if_et.c

1647

CSR_WRITE_4(sc, ET_MAC_ADDR1, val);

sys/dev/netif/et/if_et.c

1648

val = (eaddr[0] << 16) | (eaddr[1] << 24);

sys/dev/netif/et/if_et.c

1649

CSR_WRITE_4(sc, ET_MAC_ADDR2, val);

sys/dev/netif/et/if_et.c

1663

uint32_t val;

sys/dev/netif/et/if_et.c

1680

val = (eaddr[2] << 24) | (eaddr[3] << 16) | (eaddr[4] << 8) | eaddr[5];

sys/dev/netif/et/if_et.c

1681

CSR_WRITE_4(sc, ET_WOL_SA_LO, val);

sys/dev/netif/et/if_et.c

1682

val = (eaddr[0] << 8) | eaddr[1];

sys/dev/netif/et/if_et.c

1683

CSR_WRITE_4(sc, ET_WOL_SA_HI, val);

sys/dev/netif/et/if_et.c

1705

val = __SHIFTIN(ET_RXMAC_SEGSZ(256), ET_RXMAC_MC_SEGSZ_MAX) |

sys/dev/netif/et/if_et.c

1708

val = 0;

sys/dev/netif/et/if_et.c

1710

CSR_WRITE_4(sc, ET_RXMAC_MC_SEGSZ, val);

sys/dev/netif/et/if_et.c

1728

val = __SHIFTIN(ETHER_MIN_LEN, ET_PKTFILT_MINLEN) | ET_PKTFILT_FRAG;

sys/dev/netif/et/if_et.c

1729

CSR_WRITE_4(sc, ET_PKTFILT, val);

sys/dev/netif/et/if_et.c

1758

uint32_t val = 0;

sys/dev/netif/et/if_et.c

1760

val |= __SHIFTIN(sc->sc_rx_data[0].rbd_bufsize,

sys/dev/netif/et/if_et.c

1763

val |= __SHIFTIN(sc->sc_rx_data[1].rbd_bufsize,

sys/dev/netif/et/if_et.c

1767

CSR_WRITE_4(sc, ET_RXDMA_CTRL, val);

sys/dev/netif/et/if_et.c

1789

uint32_t val;

sys/dev/netif/et/if_et.c

1792

val = CSR_READ_4(sc, ET_MAC_CFG1);

sys/dev/netif/et/if_et.c

1793

val |= ET_MAC_CFG1_TXEN | ET_MAC_CFG1_RXEN;

sys/dev/netif/et/if_et.c

1794

val &= ~(ET_MAC_CFG1_TXFLOW | ET_MAC_CFG1_RXFLOW |

sys/dev/netif/et/if_et.c

1796

CSR_WRITE_4(sc, ET_MAC_CFG1, val);

sys/dev/netif/et/if_et.c

1806

val = CSR_READ_4(sc, ET_MAC_CFG1);

sys/dev/netif/et/if_et.c

1807

if ((val & (ET_MAC_CFG1_SYNC_TXEN | ET_MAC_CFG1_SYNC_RXEN)) ==

sys/dev/netif/et/if_et.c

437

uint32_t val;

sys/dev/netif/et/if_et.c

443

val = __SHIFTIN(phy, ET_MII_ADDR_PHY) |

sys/dev/netif/et/if_et.c

445

CSR_WRITE_4(sc, ET_MII_ADDR, val);

sys/dev/netif/et/if_et.c

453

val = CSR_READ_4(sc, ET_MII_IND);

sys/dev/netif/et/if_et.c

454

if ((val & (ET_MII_IND_BUSY | ET_MII_IND_INVALID)) == 0)

sys/dev/netif/et/if_et.c

467

val = CSR_READ_4(sc, ET_MII_STAT);

sys/dev/netif/et/if_et.c

468

ret = __SHIFTOUT(val, ET_MII_STAT_VALUE);

sys/dev/netif/et/if_et.c

480

uint32_t val;

sys/dev/netif/et/if_et.c

486

val = __SHIFTIN(phy, ET_MII_ADDR_PHY) |

sys/dev/netif/et/if_et.c

488

CSR_WRITE_4(sc, ET_MII_ADDR, val);

sys/dev/netif/et/if_et.c

496

val = CSR_READ_4(sc, ET_MII_IND);

sys/dev/netif/et/if_et.c

497

if ((val & ET_MII_IND_BUSY) == 0)

sys/dev/netif/et/if_et.c

579

uint32_t val, max_plsz;

sys/dev/netif/et/if_et.c

587

val = pci_read_config(dev, ET_PCIR_EEPROM_STATUS, 1);

sys/dev/netif/et/if_et.c

588

if (val & ET_PCIM_EEPROM_STATUS_ERROR) {

sys/dev/netif/et/if_et.c

589

device_printf(dev, "EEPROM status error 0x%02x\n", val);

sys/dev/netif/et/if_et.c

599

val = pci_read_config(dev, ET_PCIR_DEVICE_CAPS, 4);

sys/dev/netif/et/if_et.c

600

max_plsz = val & ET_PCIM_DEVICE_CAPS_MAX_PLSZ;

sys/dev/netif/et/if_et.c

628

val = ET_PCIV_L0S_LATENCY(2) | ET_PCIV_L1_LATENCY(2);

sys/dev/netif/et/if_et.c

629

pci_write_config(dev, ET_PCIR_L0S_L1_LATENCY, val, 1);

sys/dev/netif/et/if_et.c

634

val = pci_read_config(dev, ET_PCIR_DEVICE_CTRL, 2);

sys/dev/netif/et/if_et.c

635

val &= ~ET_PCIM_DEVICE_CTRL_MAX_RRSZ;

sys/dev/netif/et/if_et.c

636

val |= ET_PCIV_DEVICE_CTRL_RRSZ_2K;

sys/dev/netif/et/if_et.c

637

pci_write_config(dev, ET_PCIR_DEVICE_CTRL, val, 2);

sys/dev/netif/et/if_et.c

645

uint32_t val;

sys/dev/netif/et/if_et.c

648

val = pci_read_config(dev, ET_PCIR_MAC_ADDR0, 4);

sys/dev/netif/et/if_et.c

650

eaddr[i] = (val >> (8 * i)) & 0xff;

sys/dev/netif/et/if_et.c

652

val = pci_read_config(dev, ET_PCIR_MAC_ADDR1, 2);

sys/dev/netif/et/if_et.c

654

eaddr[i] = (val >> (8 * (i - 4))) & 0xff;

sys/dev/netif/et/if_etvar.h

64

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/et/if_etvar.h

65

bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))

sys/dev/netif/fxp/if_fxp.c

395

u_int32_t val;

sys/dev/netif/fxp/if_fxp.c

407

val = pci_read_config(dev, PCIR_COMMAND, 2);

sys/dev/netif/fxp/if_fxp.c

425

if (val & m1) {

sys/dev/netif/fxp/if_fxp.c

432

if (sc->mem == NULL && (val & m2)) {

sys/dev/netif/fxp/if_fxp.c

590

if (val & PCIM_CMD_MWRICEN &&

sys/dev/netif/fxp/if_fxpvar.h

151

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/fxp/if_fxpvar.h

152

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/fxp/if_fxpvar.h

153

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/fxp/if_fxpvar.h

154

bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/fxp/if_fxpvar.h

155

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/fxp/if_fxpvar.h

156

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/iwi/if_iwi.c

1180

uint16_t val;

sys/dev/netif/iwi/if_iwi.c

1210

val = 0;

sys/dev/netif/iwi/if_iwi.c

1215

val |= ((tmp & IWI_EEPROM_Q) >> IWI_EEPROM_SHIFT_Q) << n;

sys/dev/netif/iwi/if_iwi.c

1225

return val;

sys/dev/netif/iwi/if_iwi.c

291

uint16_t val;

sys/dev/netif/iwi/if_iwi.c

3410

int val = !iwi_getrfkill(sc);

sys/dev/netif/iwi/if_iwi.c

3412

return SYSCTL_OUT(req, &val, sizeof val);

sys/dev/netif/iwi/if_iwi.c

394

val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 0);

sys/dev/netif/iwi/if_iwi.c

395

ic->ic_macaddr[0] = val & 0xff;

sys/dev/netif/iwi/if_iwi.c

396

ic->ic_macaddr[1] = val >> 8;

sys/dev/netif/iwi/if_iwi.c

397

val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 1);

sys/dev/netif/iwi/if_iwi.c

398

ic->ic_macaddr[2] = val & 0xff;

sys/dev/netif/iwi/if_iwi.c

399

ic->ic_macaddr[3] = val >> 8;

sys/dev/netif/iwi/if_iwi.c

400

val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 2);

sys/dev/netif/iwi/if_iwi.c

401

ic->ic_macaddr[4] = val & 0xff;

sys/dev/netif/iwi/if_iwi.c

402

ic->ic_macaddr[5] = val >> 8;

sys/dev/netif/iwi/if_iwireg.h

584

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/iwi/if_iwireg.h

585

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/iwi/if_iwireg.h

587

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/iwi/if_iwireg.h

588

bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/iwi/if_iwireg.h

590

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/iwi/if_iwireg.h

591

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/iwi/if_iwireg.h

600

#define MEM_WRITE_1(sc, addr, val) do { \

sys/dev/netif/iwi/if_iwireg.h

602

CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \

sys/dev/netif/iwi/if_iwireg.h

605

#define MEM_WRITE_2(sc, addr, val) do { \

sys/dev/netif/iwi/if_iwireg.h

607

CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \

sys/dev/netif/iwi/if_iwireg.h

610

#define MEM_WRITE_4(sc, addr, val) do { \

sys/dev/netif/iwi/if_iwireg.h

612

CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \

sys/dev/netif/iwi/if_iwireg.h

623

#define IWI_EEPROM_CTL(sc, val) do { \

sys/dev/netif/iwi/if_iwireg.h

624

MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \

sys/dev/netif/iwm/if_iwm.c

2504

uint32_t val, last_read_idx = 0;

sys/dev/netif/iwm/if_iwm.c

2537

val = IWM_READ(sc, IWM_FH_UCODE_LOAD_STATUS);

sys/dev/netif/iwm/if_iwm.c

2538

val = val | (sec_num << shift_param);

sys/dev/netif/iwm/if_iwm.c

2539

IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, val);

sys/dev/netif/iwm/if_iwm.c

3165

uint32_t val;

sys/dev/netif/iwm/if_iwm.c

3167

val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]);

sys/dev/netif/iwm/if_iwm.c

3168

energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >>

sys/dev/netif/iwm/if_iwm.c

3171

energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >>

sys/dev/netif/iwm/if_iwm.c

3174

energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >>

sys/dev/netif/iwm/if_iwm_pcie_trans.c

167

iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val)

sys/dev/netif/iwm/if_iwm_pcie_trans.c

172

IWM_WRITE(sc, IWM_HBUS_TARG_PRPH_WDAT, val);

sys/dev/netif/iwm/if_iwm_pcie_trans.c

176

iwm_write_prph64(struct iwm_softc *sc, uint64_t addr, uint64_t val)

sys/dev/netif/iwm/if_iwm_pcie_trans.c

178

iwm_write_prph(sc, (uint32_t)addr, val & 0xffffffff);

sys/dev/netif/iwm/if_iwm_pcie_trans.c

179

iwm_write_prph(sc, (uint32_t)addr + 4, val >> 32);

sys/dev/netif/iwm/if_iwm_pcie_trans.c

227

uint32_t val = vals ? vals[offs] : 0;

sys/dev/netif/iwm/if_iwm_pcie_trans.c

228

IWM_WRITE(sc, IWM_HBUS_TARG_MEM_WDAT, val);

sys/dev/netif/iwm/if_iwm_pcie_trans.c

240

iwm_write_mem32(struct iwm_softc *sc, uint32_t addr, uint32_t val)

sys/dev/netif/iwm/if_iwm_pcie_trans.c

242

return iwm_write_mem(sc, addr, &val, 1);

sys/dev/netif/iwm/if_iwm_pcie_trans.c

304

uint32_t val;

sys/dev/netif/iwm/if_iwm_pcie_trans.c

308

val = iwm_read_prph(sc, reg) & mask;

sys/dev/netif/iwm/if_iwm_pcie_trans.c

309

val |= bits;

sys/dev/netif/iwm/if_iwm_pcie_trans.c

310

iwm_write_prph(sc, reg, val);

sys/dev/netif/iwm/if_iwm_pcie_trans.h

107

extern void iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val);

sys/dev/netif/iwm/if_iwm_pcie_trans.h

109

uint64_t val);

sys/dev/netif/iwm/if_iwm_pcie_trans.h

115

extern int iwm_write_mem32(struct iwm_softc *sc, uint32_t addr, uint32_t val);

sys/dev/netif/iwm/if_iwmreg.h

6957

#define IWM_WRITE(sc, reg, val) \

sys/dev/netif/iwm/if_iwmreg.h

6958

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/iwm/if_iwmreg.h

6960

#define IWM_WRITE_1(sc, reg, val) \

sys/dev/netif/iwm/if_iwmreg.h

6961

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/iwn/if_iwn.c

1636

iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,

sys/dev/netif/iwn/if_iwn.c

1640

iwn_mem_write(sc, addr, val);

sys/dev/netif/iwn/if_iwn.c

1737

uint32_t val, tmp;

sys/dev/netif/iwn/if_iwn.c

1746

val = IWN_READ(sc, IWN_EEPROM);

sys/dev/netif/iwn/if_iwn.c

1747

if (val & IWN_EEPROM_READ_VALID)

sys/dev/netif/iwn/if_iwn.c

1770

*out++ = val >> 16;

sys/dev/netif/iwn/if_iwn.c

1772

*out++ = val >> 24;

sys/dev/netif/iwn/if_iwn.c

2215

uint16_t val;

sys/dev/netif/iwn/if_iwn.c

2253

iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2254

DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));

sys/dev/netif/iwn/if_iwn.c

2256

if (val & htole16(IWN_EEPROM_SKU_CAP_11N))

sys/dev/netif/iwn/if_iwn.c

2259

iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2260

sc->rfcfg = le16toh(val);

sys/dev/netif/iwn/if_iwn.c

2287

uint16_t val;

sys/dev/netif/iwn/if_iwn.c

2302

iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2303

sc->maxpwr2GHz = val & 0xff;

sys/dev/netif/iwn/if_iwn.c

2304

sc->maxpwr5GHz = val >> 8;

sys/dev/netif/iwn/if_iwn.c

2318

iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2319

sc->eeprom_voltage = (int16_t)le16toh(val);

sys/dev/netif/iwn/if_iwn.c

2375

uint16_t val;

sys/dev/netif/iwn/if_iwn.c

2381

iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2382

base = le16toh(val);

sys/dev/netif/iwn/if_iwn.c

2396

iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2397

base = le16toh(val);

sys/dev/netif/iwn/if_iwn.c

2406

iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2407

sc->eeprom_temp_high=le16toh(val);

sys/dev/netif/iwn/if_iwn.c

2408

iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2409

sc->eeprom_temp = le16toh(val);

sys/dev/netif/iwn/if_iwn.c

2414

iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2415

sc->eeprom_temp = le16toh(val);

sys/dev/netif/iwn/if_iwn.c

2416

iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2417

volt = le16toh(val);

sys/dev/netif/iwn/if_iwn.c

2657

uint16_t val, base;

sys/dev/netif/iwn/if_iwn.c

2664

iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);

sys/dev/netif/iwn/if_iwn.c

2665

base = le16toh(val);

sys/dev/netif/iwn/if_iwn.c

5586

uint64_t val, mod;

sys/dev/netif/iwn/if_iwn.c

5596

val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;

sys/dev/netif/iwn/if_iwn.c

5597

mod = le64toh(cmd.tstamp) % val;

sys/dev/netif/iwn/if_iwn.c

5598

cmd.binitval = htole32((uint32_t)(val - mod));

sys/dev/netif/iwn/if_iwn.c

5601

ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));

sys/dev/netif/iwn/if_iwn.c

5980

uint32_t val;

sys/dev/netif/iwn/if_iwn.c

5995

val = MAX(calib->rssi[0], calib->rssi[1]);

sys/dev/netif/iwn/if_iwn.c

5996

val = MAX(calib->rssi[2], val);

sys/dev/netif/iwn/if_iwn.c

6001

if (val - calib->rssi[i] > 15 * 20)

sys/dev/netif/iwn/if_iwn.c

6141

#define inc(val, inc, max) \

sys/dev/netif/iwn/if_iwn.c

6142

if ((val) < (max)) { \

sys/dev/netif/iwn/if_iwn.c

6143

if ((val) < (max) - (inc)) \

sys/dev/netif/iwn/if_iwn.c

6144

(val) += (inc); \

sys/dev/netif/iwn/if_iwn.c

6146

(val) = (max); \

sys/dev/netif/iwn/if_iwn.c

6149

#define dec(val, dec, min) \

sys/dev/netif/iwn/if_iwn.c

6150

if ((val) > (min)) { \

sys/dev/netif/iwn/if_iwn.c

6151

if ((val) > (min) + (dec)) \

sys/dev/netif/iwn/if_iwn.c

6152

(val) -= (dec); \

sys/dev/netif/iwn/if_iwn.c

6154

(val) = (min); \

sys/dev/netif/iwn/if_iwn.c

6160

uint32_t val, rxena, fa;

sys/dev/netif/iwn/if_iwn.c

6200

val = MAX(noise[0], noise[1]);

sys/dev/netif/iwn/if_iwn.c

6201

val = MAX(noise[2], val);

sys/dev/netif/iwn/if_iwn.c

6203

calib->noise_samples[calib->cur_noise_sample] = val;

sys/dev/netif/iwn/if_iwn.c

6214

val = MIN(energy[0], energy[1]);

sys/dev/netif/iwn/if_iwn.c

6215

val = MIN(energy[2], val);

sys/dev/netif/iwn/if_iwn.c

6217

calib->energy_samples[calib->cur_energy_sample] = val;

sys/dev/netif/iwn/if_iwnreg.h

2296

#define IWN_WRITE(sc, reg, val) \

sys/dev/netif/iwn/if_iwnreg.h

2297

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/iwn/if_iwnreg.h

2299

#define IWN_WRITE_1(sc, reg, val) \

sys/dev/netif/iwn/if_iwnreg.h

2300

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/ix/ixgbe_82598.c

1079

s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/netif/ix/ixgbe_82598.c

1090

*val = (u8)atlas_ctl;

sys/dev/netif/ix/ixgbe_82598.c

1103

s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/netif/ix/ixgbe_82598.c

1109

atlas_ctl = (reg << 8) | val;

sys/dev/netif/ix/ixgbe_82598.h

45

s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/netif/ix/ixgbe_82598.h

46

s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/netif/ix/ixgbe_82599.c

2075

s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/netif/ix/ixgbe_82599.c

2086

*val = (u8)core_ctl;

sys/dev/netif/ix/ixgbe_82599.c

2099

s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/netif/ix/ixgbe_82599.c

2105

core_ctl = (reg << 8) | val;

sys/dev/netif/ix/ixgbe_82599.h

56

s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/netif/ix/ixgbe_82599.h

57

s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/netif/ix/ixgbe_api.c

1423

s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/netif/ix/ixgbe_api.c

1426

val), IXGBE_NOT_IMPLEMENTED);

sys/dev/netif/ix/ixgbe_api.c

1437

s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/netif/ix/ixgbe_api.c

1440

val), IXGBE_NOT_IMPLEMENTED);

sys/dev/netif/ix/ixgbe_api.c

1498

s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)

sys/dev/netif/ix/ixgbe_api.c

1501

reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/netif/ix/ixgbe_api.c

1513

s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)

sys/dev/netif/ix/ixgbe_api.c

1516

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/netif/ix/ixgbe_api.c

1563

s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)

sys/dev/netif/ix/ixgbe_api.c

1566

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/netif/ix/ixgbe_api.c

1578

s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)

sys/dev/netif/ix/ixgbe_api.c

1581

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/netif/ix/ixgbe_api.h

140

s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/netif/ix/ixgbe_api.h

141

s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/netif/ix/ixgbe_api.h

180

s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);

sys/dev/netif/ix/ixgbe_api.h

181

s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);

sys/dev/netif/ix/ixgbe_api.h

187

s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);

sys/dev/netif/ix/ixgbe_api.h

188

s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);

sys/dev/netif/ix/ixgbe_dcb.c

71

int val = min(bw[i] * multiplier, IXGBE_DCB_MAX_CREDIT_REFILL);

sys/dev/netif/ix/ixgbe_dcb.c

73

if (val < min_credit)

sys/dev/netif/ix/ixgbe_dcb.c

74

val = min_credit;

sys/dev/netif/ix/ixgbe_dcb.c

75

refill[i] = (u16)val;

sys/dev/netif/ix/ixgbe_osdep_pf.c

104

ixgbe_write_reg_pf(struct ixgbe_hw *hw, u32 reg, u32 val)

sys/dev/netif/ix/ixgbe_osdep_pf.c

108

reg, val);

sys/dev/netif/ix/ixgbe_osdep_pf.c

120

ixgbe_write_reg_array_pf(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)

sys/dev/netif/ix/ixgbe_osdep_pf.c

124

reg + (offset << 2), val);

sys/dev/netif/ix/ixgbe_phy.c

114

u16 *val, bool lock)

sys/dev/netif/ix/ixgbe_phy.c

164

*val = (high_bits << 8) | low_bits;

sys/dev/netif/ix/ixgbe_phy.c

192

u16 val, bool lock)

sys/dev/netif/ix/ixgbe_phy.c

202

csum = ixgbe_ones_comp_byte_add(csum, val >> 8);

sys/dev/netif/ix/ixgbe_phy.c

203

csum = ixgbe_ones_comp_byte_add(csum, val & 0xFF);

sys/dev/netif/ix/ixgbe_phy.c

219

if (ixgbe_out_i2c_byte_ack(hw, val >> 8))

sys/dev/netif/ix/ixgbe_phy.c

222

if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF))

sys/dev/netif/ix/ixgbe_phy.h

216

u16 *val, bool lock);

sys/dev/netif/ix/ixgbe_phy.h

218

u16 val, bool lock);

sys/dev/netif/ix/ixgbe_type.h

4032

s32 (*read_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 *val);

sys/dev/netif/ix/ixgbe_type.h

4034

u16 *val);

sys/dev/netif/ix/ixgbe_type.h

4035

s32 (*write_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 val);

sys/dev/netif/ix/ixgbe_type.h

4037

u16 val);

sys/dev/netif/ix/ixgbe_x550.c

546

u16 reg, u16 *val)

sys/dev/netif/ix/ixgbe_x550.c

548

return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, TRUE);

sys/dev/netif/ix/ixgbe_x550.c

562

u16 reg, u16 *val)

sys/dev/netif/ix/ixgbe_x550.c

564

return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, FALSE);

sys/dev/netif/ix/ixgbe_x550.c

577

u8 addr, u16 reg, u16 val)

sys/dev/netif/ix/ixgbe_x550.c

579

return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, TRUE);

sys/dev/netif/ix/ixgbe_x550.c

593

u8 addr, u16 reg, u16 val)

sys/dev/netif/ix/ixgbe_x550.c

595

return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, FALSE);

sys/dev/netif/jme/if_jme.c

2587

uint32_t val;

sys/dev/netif/jme/if_jme.c

2604

val = CSR_READ_4(sc, JME_GPREG1);

sys/dev/netif/jme/if_jme.c

2605

CSR_WRITE_4(sc, JME_GPREG1, val | GPREG1_DIS_RXMAC_CLKSRC);

sys/dev/netif/jme/if_jme.c

2621

val = CSR_READ_4(sc, JME_GPREG1);

sys/dev/netif/jme/if_jme.c

2622

CSR_WRITE_4(sc, JME_GPREG1, val & ~GPREG1_DIS_RXMAC_CLKSRC);

sys/dev/netif/jme/if_jme.c

2629

val = CSR_READ_4(sc, JME_GPREG1);

sys/dev/netif/jme/if_jme.c

2630

CSR_WRITE_4(sc, JME_GPREG1, val | GPREG1_DIS_RXMAC_CLKSRC);

sys/dev/netif/jme/if_jme.c

2635

val = CSR_READ_4(sc, JME_TXCSR);

sys/dev/netif/jme/if_jme.c

2636

CSR_WRITE_4(sc, JME_TXCSR, val | TXCSR_TX_ENB);

sys/dev/netif/jme/if_jme.c

2637

val = CSR_READ_4(sc, JME_RXCSR);

sys/dev/netif/jme/if_jme.c

2638

CSR_WRITE_4(sc, JME_RXCSR, val | RXCSR_RX_ENB);

sys/dev/netif/jme/if_jme.c

2646

val = CSR_READ_4(sc, JME_GPREG1);

sys/dev/netif/jme/if_jme.c

2647

CSR_WRITE_4(sc, JME_GPREG1, val & ~GPREG1_DIS_RXMAC_CLKSRC);

sys/dev/netif/jme/if_jme.c

284

uint32_t val;

sys/dev/netif/jme/if_jme.c

301

if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0)

sys/dev/netif/jme/if_jme.c

310

return ((val & SMI_DATA_MASK) >> SMI_DATA_SHIFT);

sys/dev/netif/jme/if_jme.c

317

jme_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/jme/if_jme.c

332

((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |

sys/dev/netif/jme/if_jme.c

337

if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0)

sys/dev/netif/jme/if_jme.c

4016

uint32_t val;

sys/dev/netif/jme/if_jme.c

4018

val = CSR_READ_4(sc, JME_PHYPWR);

sys/dev/netif/jme/if_jme.c

4019

val &= ~(PHYPWR_DOWN1SEL | PHYPWR_DOWN1SW |

sys/dev/netif/jme/if_jme.c

4021

CSR_WRITE_4(sc, JME_PHYPWR, val);

sys/dev/netif/jme/if_jme.c

4023

val = pci_read_config(sc->jme_dev, JME_PCI_PE1, 4);

sys/dev/netif/jme/if_jme.c

4024

val &= ~PE1_GPREG0_PHYBG;

sys/dev/netif/jme/if_jme.c

4025

val |= PE1_GPREG0_ENBG;

sys/dev/netif/jme/if_jme.c

4026

pci_write_config(sc->jme_dev, JME_PCI_PE1, val, 4);

sys/dev/netif/jme/if_jme.c

4040

uint32_t val;

sys/dev/netif/jme/if_jme.c

4042

val = CSR_READ_4(sc, JME_PHYPWR);

sys/dev/netif/jme/if_jme.c

4043

val |= PHYPWR_DOWN1SEL | PHYPWR_DOWN1SW |

sys/dev/netif/jme/if_jme.c

4045

CSR_WRITE_4(sc, JME_PHYPWR, val);

sys/dev/netif/jme/if_jme.c

4047

val = pci_read_config(sc->jme_dev, JME_PCI_PE1, 4);

sys/dev/netif/jme/if_jme.c

4048

val &= ~PE1_GPREG0_PHYBG;

sys/dev/netif/jme/if_jme.c

4049

val |= PE1_GPREG0_PDD3COLD;

sys/dev/netif/jme/if_jme.c

4050

pci_write_config(sc->jme_dev, JME_PCI_PE1, val, 4);

sys/dev/netif/jme/if_jme.c

4067

jme_miiext_write(struct jme_softc *sc, int reg, int val)

sys/dev/netif/jme/if_jme.c

4073

JME_MII_EXT_DATA, val);

sys/dev/netif/jme/if_jme.c

4082

int val;

sys/dev/netif/jme/if_jme.c

4093

val = jme_miiext_read(sc, JME_MII_EXT_COM2);

sys/dev/netif/jme/if_jme.c

4094

val &= ~JME_MII_EXT_COM2_CALIB_MODE0;

sys/dev/netif/jme/if_jme.c

4095

val |= JME_MII_EXT_COM2_CALIB_LATCH | JME_MII_EXT_COM2_CALIB_EN;

sys/dev/netif/jme/if_jme.c

4096

jme_miiext_write(sc, JME_MII_EXT_COM2, val);

sys/dev/netif/jme/if_jme.c

4100

val = jme_miiext_read(sc, JME_MII_EXT_COM2);

sys/dev/netif/jme/if_jme.c

4101

val &= ~(JME_MII_EXT_COM2_CALIB_MODE0 |

sys/dev/netif/jme/if_jme.c

4103

jme_miiext_write(sc, JME_MII_EXT_COM2, val);

sys/dev/netif/jme/if_jme.c

557

jme_eeprom_read_byte(struct jme_softc *sc, uint8_t addr, uint8_t *val)

sys/dev/netif/jme/if_jme.c

562

*val = 0;

sys/dev/netif/jme/if_jme.c

590

*val = (reg & SMBINTF_RD_DATA_MASK) >> SMBINTF_RD_DATA_SHIFT;

sys/dev/netif/jme/if_jme.c

598

uint8_t fup, reg, val;

sys/dev/netif/jme/if_jme.c

620

&val) != 0)

sys/dev/netif/jme/if_jme.c

622

eaddr[reg - JME_PAR0] = val;

sys/dev/netif/jme/if_jmevar.h

308

#define CSR_WRITE_4(_sc, reg, val) \

sys/dev/netif/jme/if_jmevar.h

309

bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))

sys/dev/netif/lge/if_lge.c

217

uint32_t val;

sys/dev/netif/lge/if_lge.c

232

val = CSR_READ_4(sc, LGE_EEDATA);

sys/dev/netif/lge/if_lge.c

235

*dest = (val >> 16) & 0xFFFF;

sys/dev/netif/lge/if_lge.c

237

*dest = val & 0xFFFF;

sys/dev/netif/lge/if_lgereg.h

544

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/lge/if_lgereg.h

545

bus_space_write_4(sc->lge_btag, sc->lge_bhandle, reg, val)

sys/dev/netif/lge/if_lgereg.h

550

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/lge/if_lgereg.h

551

bus_space_write_2(sc->lge_btag, sc->lge_bhandle, reg, val)

sys/dev/netif/lge/if_lgereg.h

556

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/lge/if_lgereg.h

557

bus_space_write_1(sc->lge_btag, sc->lge_bhandle, reg, val)

sys/dev/netif/lnc/if_lnc_pci.c

173

le_pci_wrbcr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/netif/lnc/if_lnc_pci.c

180

bus_space_write_2(lesc->sc_regt, lesc->sc_regh, PCNET_PCI_BDP, val);

sys/dev/netif/lnc/if_lnc_pci.c

195

le_pci_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/netif/lnc/if_lnc_pci.c

202

bus_space_write_2(lesc->sc_regt, lesc->sc_regh, PCNET_PCI_RDP, val);

sys/dev/netif/mii_layer/brgphy.c

577

uint16_t val;

sys/dev/netif/mii_layer/brgphy.c

595

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/netif/mii_layer/brgphy.c

605

uint16_t val;

sys/dev/netif/mii_layer/brgphy.c

615

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/netif/mii_layer/brgphy.c

642

uint16_t val;

sys/dev/netif/mii_layer/brgphy.c

651

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/netif/mii_layer/brgphy.c

659

uint16_t val;

sys/dev/netif/mii_layer/brgphy.c

672

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/netif/mii_layer/brgphy.c

680

u_int16_t val;

sys/dev/netif/mii_layer/brgphy.c

689

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/netif/mii_layer/brgphy.c

697

uint16_t val;

sys/dev/netif/mii_layer/brgphy.c

712

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/netif/mii_layer/brgphy.c

720

uint16_t val;

sys/dev/netif/mii_layer/brgphy.c

731

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/netif/mii_layer/brgphy.c

737

uint32_t val;

sys/dev/netif/mii_layer/brgphy.c

746

val = PHY_READ(sc, BRGPHY_MII_AUXCTL);

sys/dev/netif/mii_layer/brgphy.c

748

val | BRGPHY_AUXCTL_LONG_PKT);

sys/dev/netif/mii_layer/brgphy.c

751

val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);

sys/dev/netif/mii_layer/brgphy.c

753

val | BRGPHY_PHY_EXTCTL_HIGH_LA);

sys/dev/netif/mii_layer/brgphy.c

756

val = PHY_READ(sc, BRGPHY_MII_AUXCTL);

sys/dev/netif/mii_layer/brgphy.c

758

val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7));

sys/dev/netif/mii_layer/brgphy.c

760

val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);

sys/dev/netif/mii_layer/brgphy.c

762

val & ~BRGPHY_PHY_EXTCTL_HIGH_LA);

sys/dev/netif/mii_layer/brgphy.c

769

u_int32_t val;

sys/dev/netif/mii_layer/brgphy.c

773

val = PHY_READ(sc, BRGPHY_MII_AUXCTL);

sys/dev/netif/mii_layer/brgphy.c

774

PHY_WRITE(sc, BRGPHY_MII_AUXCTL, (val | (1 << 15) | (1 << 4)));

sys/dev/netif/mii_layer/brgphy.c

780

uint32_t val;

sys/dev/netif/mii_layer/brgphy.c

783

val = PHY_READ(sc, BRGPHY_MII_DSP_RW_PORT);

sys/dev/netif/mii_layer/brgphy.c

784

val &= ~(1 << 8);

sys/dev/netif/mii_layer/brgphy.c

785

PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, val);

sys/dev/netif/mii_layer/rgephy.c

457

int val;

sys/dev/netif/mii_layer/rgephy.c

466

val = PHY_READ(sc, 4) & 0xFFF;

sys/dev/netif/mii_layer/rgephy.c

467

PHY_WRITE(sc, 4, val);

sys/dev/netif/mii_layer/rgephy.c

474

val = (PHY_READ(sc, 4) & 0xFFF) | 0x7000;

sys/dev/netif/mii_layer/rgephy.c

475

PHY_WRITE(sc, 4, val);

sys/dev/netif/mii_layer/rgephy.c

480

val = (PHY_READ(sc, 4) & 0xFFF) | 0xA000;

sys/dev/netif/mii_layer/rgephy.c

481

PHY_WRITE(sc, 4, val);

sys/dev/netif/mii_layer/rgephy.c

486

val = (PHY_READ(sc, 4) & 0xFFF) | 0xB000;

sys/dev/netif/mii_layer/rgephy.c

487

PHY_WRITE(sc, 4, val);

sys/dev/netif/mii_layer/rgephy.c

492

val = (PHY_READ(sc, 4) & 0xFFF) | 0xF000;

sys/dev/netif/mii_layer/rgephy.c

493

PHY_WRITE(sc, 4, val);

sys/dev/netif/msk/if_msk.c

1017

uint32_t our, val;

sys/dev/netif/msk/if_msk.c

1028

val = 0;

sys/dev/netif/msk/if_msk.c

1032

val = Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |

sys/dev/netif/msk/if_msk.c

1039

CSR_WRITE_1(sc, B2_Y2_CLK_GATE, val);

sys/dev/netif/msk/if_msk.c

1054

val = CSR_PCI_READ_4(sc, PCI_OUR_REG_4);

sys/dev/netif/msk/if_msk.c

1055

val &= (PCI_FORCE_ASPM_REQUEST |

sys/dev/netif/msk/if_msk.c

1059

CSR_PCI_WRITE_4(sc, PCI_OUR_REG_4, val);

sys/dev/netif/msk/if_msk.c

1060

val = CSR_PCI_READ_4(sc, PCI_OUR_REG_5);

sys/dev/netif/msk/if_msk.c

1061

val &= PCI_CTL_TIM_VMAIN_AV_MSK;

sys/dev/netif/msk/if_msk.c

1062

CSR_PCI_WRITE_4(sc, PCI_OUR_REG_5, val);

sys/dev/netif/msk/if_msk.c

1069

val = CSR_READ_4(sc, B2_GP_IO);

sys/dev/netif/msk/if_msk.c

1070

val |= GLB_GPIO_STAT_RACE_DIS;

sys/dev/netif/msk/if_msk.c

1071

CSR_WRITE_4(sc, B2_GP_IO, val);

sys/dev/netif/msk/if_msk.c

1085

val = CSR_PCI_READ_4(sc, PCI_OUR_REG_1);

sys/dev/netif/msk/if_msk.c

1086

val |= PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD;

sys/dev/netif/msk/if_msk.c

1089

val &= ~PCI_Y2_PHY1_COMA;

sys/dev/netif/msk/if_msk.c

1091

val &= ~PCI_Y2_PHY2_COMA;

sys/dev/netif/msk/if_msk.c

1093

CSR_PCI_WRITE_4(sc, PCI_OUR_REG_1, val);

sys/dev/netif/msk/if_msk.c

1095

val = Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |

sys/dev/netif/msk/if_msk.c

1101

val = 0;

sys/dev/netif/msk/if_msk.c

1107

CSR_WRITE_1(sc, B2_Y2_CLK_GATE, val);

sys/dev/netif/msk/if_msk.c

1121

uint32_t val;

sys/dev/netif/msk/if_msk.c

1164

val = CSR_PCI_READ_4(sc, PEX_UNC_ERR_STAT);

sys/dev/netif/msk/if_msk.c

1165

if ((val & PEX_RX_OV) != 0) {

sys/dev/netif/msk/if_msk.c

1173

val = pci_read_config(sc->msk_dev, PCIR_CACHELNSZ, 1);

sys/dev/netif/msk/if_msk.c

1174

if (val == 0)

sys/dev/netif/msk/if_msk.c

1178

val = CSR_PCI_READ_4(sc, PCI_OUR_REG_1);

sys/dev/netif/msk/if_msk.c

1179

val |= PCI_CLS_OPT;

sys/dev/netif/msk/if_msk.c

1180

CSR_PCI_WRITE_4(sc, PCI_OUR_REG_1, val);

sys/dev/netif/msk/if_msk.c

3684

uint32_t val;

sys/dev/netif/msk/if_msk.c

3706

val = GMAC_READ_2(sc, sc_if->msk_port, GM_GP_CTRL);

sys/dev/netif/msk/if_msk.c

3707

val &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);

sys/dev/netif/msk/if_msk.c

3708

GMAC_WRITE_2(sc, sc_if->msk_port, GM_GP_CTRL, val);

sys/dev/netif/msk/if_msk.c

3714

val = CSR_READ_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR));

sys/dev/netif/msk/if_msk.c

3716

if ((val & (BMU_STOP | BMU_IDLE)) == 0) {

sys/dev/netif/msk/if_msk.c

3719

val = CSR_READ_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR));

sys/dev/netif/msk/if_msk.c

376

int i, val;

sys/dev/netif/msk/if_msk.c

385

val = GMAC_READ_2(sc, sc_if->msk_port, GM_SMI_CTRL);

sys/dev/netif/msk/if_msk.c

386

if ((val & GM_SMI_CT_RD_VAL) != 0) {

sys/dev/netif/msk/if_msk.c

387

val = GMAC_READ_2(sc, sc_if->msk_port, GM_SMI_DATA);

sys/dev/netif/msk/if_msk.c

394

val = 0;

sys/dev/netif/msk/if_msk.c

397

return (val);

sys/dev/netif/msk/if_msk.c

401

msk_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/msk/if_msk.c

410

return (msk_phy_writereg(sc_if, phy, reg, val));

sys/dev/netif/msk/if_msk.c

414

msk_phy_writereg(struct msk_if_softc *sc_if, int phy, int reg, int val)

sys/dev/netif/msk/if_msk.c

421

GMAC_WRITE_2(sc, sc_if->msk_port, GM_SMI_DATA, val);

sys/dev/netif/msk/if_mskreg.h

2113

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2114

bus_space_write_4((sc)->msk_res_bt, (sc)->msk_res_bh, (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2115

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2116

bus_space_write_2((sc)->msk_res_bt, (sc)->msk_res_bh, (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2117

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2118

bus_space_write_1((sc)->msk_res_bt, (sc)->msk_res_bh, (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2127

#define CSR_PCI_WRITE_4(sc, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2129

Y2_CFG_SPC + (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2130

#define CSR_PCI_WRITE_2(sc, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2132

Y2_CFG_SPC + (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2133

#define CSR_PCI_WRITE_1(sc, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2135

Y2_CFG_SPC + (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2151

#define MSK_IF_WRITE_4(sc_if, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2152

CSR_WRITE_4((sc_if)->msk_softc, (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2153

#define MSK_IF_WRITE_2(sc_if, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2154

CSR_WRITE_2((sc_if)->msk_softc, (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2155

#define MSK_IF_WRITE_1(sc_if, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2156

CSR_WRITE_1((sc_if)->msk_softc, (reg), (val))

sys/dev/netif/msk/if_mskreg.h

2160

#define GMAC_WRITE_2(sc, port, reg, val) \

sys/dev/netif/msk/if_mskreg.h

2161

CSR_WRITE_2((sc), GMAC_REG((port), (reg)), (val))

sys/dev/netif/msk/if_mskreg.h

318

#define PCI_OS_SPEED(val) ((val & PCI_OS_MODE_MSK) >> 28) /* PCI-X Speed */

sys/dev/netif/mxge/if_mxge.c

301

uint32_t val;

sys/dev/netif/mxge/if_mxge.c

354

val = pci_read_config(pdev, 0x178, 4);

sys/dev/netif/mxge/if_mxge.c

355

if (val != 0xffffffff) {

sys/dev/netif/mxge/if_mxge.c

356

val |= 0x40;

sys/dev/netif/mxge/if_mxge.c

357

pci_write_config(pdev, 0x178, val, 4);

sys/dev/netif/mxge/if_mxge.c

404

val = *ptr32;

sys/dev/netif/mxge/if_mxge.c

406

if (val == 0xffffffff) {

sys/dev/netif/mxge/if_mxge.c

411

*ptr32 = val | 0x40;

sys/dev/netif/my/if_myreg.h

380

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/my/if_myreg.h

381

bus_space_write_4(sc->my_btag, sc->my_bhandle, reg, val)

sys/dev/netif/my/if_myreg.h

382

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/my/if_myreg.h

383

bus_space_write_2(sc->my_btag, sc->my_bhandle, reg, val)

sys/dev/netif/my/if_myreg.h

384

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/my/if_myreg.h

385

bus_space_write_1(sc->my_btag, sc->my_bhandle, reg, val)

sys/dev/netif/nfe/if_nfe.c

785

uint32_t val;

sys/dev/netif/nfe/if_nfe.c

812

val = NFE_READ(sc, NFE_PHY_DATA);

sys/dev/netif/nfe/if_nfe.c

813

if (val != 0xffffffff && val != 0)

sys/dev/netif/nfe/if_nfe.c

816

DPRINTFN(sc, 2, "mii read phy %d reg 0x%x ret 0x%x\n", phy, reg, val);

sys/dev/netif/nfe/if_nfe.c

818

return val;

sys/dev/netif/nfe/if_nfe.c

822

nfe_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/nfe/if_nfe.c

835

NFE_WRITE(sc, NFE_PHY_DATA, val);

sys/dev/netif/nfe/if_nfereg.h

214

#define NFE_WRITE(sc, reg, val) \

sys/dev/netif/nfe/if_nfereg.h

215

bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (reg), (val))

sys/dev/netif/nge/if_ngereg.h

660

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/nge/if_ngereg.h

661

bus_space_write_4(sc->nge_btag, sc->nge_bhandle, reg, val)

sys/dev/netif/oce/oce_hw.c

207

uint32_t val;

sys/dev/netif/oce/oce_hw.c

212

if (pci_find_extcap(sc->dev, PCIY_EXPRESS, &val) == 0) {

sys/dev/netif/oce/oce_hw.c

213

if (val != 0) {

sys/dev/netif/oce/oce_hw.c

215

pci_read_config(sc->dev, val + 0x12, 2);

sys/dev/netif/oce/oce_hw.c

223

if (pci_find_extcap(sc->dev, PCIY_MSI, &val) == 0) {

sys/dev/netif/oce/oce_hw.c

224

if (val != 0)

sys/dev/netif/oce/oce_hw.c

229

if (pci_find_cap(sc->dev, PCIY_MSIX, &val) == 0) {

sys/dev/netif/oce/oce_hw.c

230

if (val != 0) {

sys/dev/netif/oce/oce_hw.c

231

val = pci_msix_count(sc->dev);

sys/dev/netif/pcn/if_pcn.c

214

pcn_csr_write(struct pcn_softc *sc, int reg, int val)

sys/dev/netif/pcn/if_pcn.c

217

CSR_WRITE_4(sc, PCN_IO32_RDP, val);

sys/dev/netif/pcn/if_pcn.c

236

pcn_bcr_write(struct pcn_softc *sc, int reg, int val)

sys/dev/netif/pcn/if_pcn.c

239

CSR_WRITE_4(sc, PCN_IO32_BDP, val);

sys/dev/netif/pcn/if_pcn.c

247

int val;

sys/dev/netif/pcn/if_pcn.c

255

val = pcn_bcr_read(sc, PCN_BCR_MIIDATA) & 0xFFFF;

sys/dev/netif/pcn/if_pcn.c

256

if (val == 0xFFFF)

sys/dev/netif/pcn/if_pcn.c

261

return(val);

sys/dev/netif/pcn/if_pcnreg.h

446

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/pcn/if_pcnreg.h

447

bus_space_write_4(sc->pcn_btag, sc->pcn_bhandle, reg, val)

sys/dev/netif/pcn/if_pcnreg.h

452

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/pcn/if_pcnreg.h

453

bus_space_write_2(sc->pcn_btag, sc->pcn_bhandle, reg, val)

sys/dev/netif/ral/rt2560.c

172

uint32_t val;

sys/dev/netif/ral/rt2560.c

179

uint8_t val;

sys/dev/netif/ral/rt2560.c

2061

rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)

sys/dev/netif/ral/rt2560.c

2076

tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;

sys/dev/netif/ral/rt2560.c

2079

DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);

sys/dev/netif/ral/rt2560.c

2085

uint32_t val;

sys/dev/netif/ral/rt2560.c

2098

val = RT2560_BBP_BUSY | reg << 8;

sys/dev/netif/ral/rt2560.c

2099

RAL_WRITE(sc, RT2560_BBPCSR, val);

sys/dev/netif/ral/rt2560.c

2102

val = RAL_READ(sc, RT2560_BBPCSR);

sys/dev/netif/ral/rt2560.c

2103

if (!(val & RT2560_BBP_BUSY))

sys/dev/netif/ral/rt2560.c

2104

return val & 0xff;

sys/dev/netif/ral/rt2560.c

2113

rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)

sys/dev/netif/ral/rt2560.c

2128

tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |

sys/dev/netif/ral/rt2560.c

2133

sc->rf_regs[reg] = val;

sys/dev/netif/ral/rt2560.c

2135

DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);

sys/dev/netif/ral/rt2560.c

2513

uint16_t val;

sys/dev/netif/ral/rt2560.c

2516

val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);

sys/dev/netif/ral/rt2560.c

2517

sc->rf_rev = (val >> 11) & 0x7;

sys/dev/netif/ral/rt2560.c

2518

sc->hw_radio = (val >> 10) & 0x1;

sys/dev/netif/ral/rt2560.c

2519

sc->led_mode = (val >> 6) & 0x7;

sys/dev/netif/ral/rt2560.c

2520

sc->rx_ant = (val >> 4) & 0x3;

sys/dev/netif/ral/rt2560.c

2521

sc->tx_ant = (val >> 2) & 0x3;

sys/dev/netif/ral/rt2560.c

2522

sc->nb_ant = val & 0x3;

sys/dev/netif/ral/rt2560.c

2526

val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);

sys/dev/netif/ral/rt2560.c

2527

if (val == 0 || val == 0xffff)

sys/dev/netif/ral/rt2560.c

2530

sc->bbp_prom[i].reg = val >> 8;

sys/dev/netif/ral/rt2560.c

2531

sc->bbp_prom[i].val = val & 0xff;

sys/dev/netif/ral/rt2560.c

2536

val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);

sys/dev/netif/ral/rt2560.c

2537

sc->txpow[i * 2] = val & 0xff;

sys/dev/netif/ral/rt2560.c

2538

sc->txpow[i * 2 + 1] = val >> 8;

sys/dev/netif/ral/rt2560.c

2545

val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE);

sys/dev/netif/ral/rt2560.c

2546

if ((val & 0xff) == 0xff)

sys/dev/netif/ral/rt2560.c

2549

sc->rssi_corr = val & 0xff;

sys/dev/netif/ral/rt2560.c

2551

sc->rssi_corr, val);

sys/dev/netif/ral/rt2560.c

2595

rt2560_def_bbp[i].val);

sys/dev/netif/ral/rt2560.c

2600

if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0)

sys/dev/netif/ral/rt2560.c

2602

rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);

sys/dev/netif/ral/rt2560.c

2689

RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);

sys/dev/netif/ral/rt2560.c

845

uint16_t val;

sys/dev/netif/ral/rt2560.c

877

val = 0;

sys/dev/netif/ral/rt2560.c

881

val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;

sys/dev/netif/ral/rt2560.c

892

return val;

sys/dev/netif/ral/rt2560reg.h

312

#define RAL_WRITE(sc, reg, val) \

sys/dev/netif/ral/rt2560reg.h

313

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/ral/rt2560reg.h

318

#define RT2560_EEPROM_CTL(sc, val) do { \

sys/dev/netif/ral/rt2560reg.h

319

RAL_WRITE((sc), RT2560_CSR21, (val)); \

sys/dev/netif/ral/rt2560var.h

143

uint8_t val;

sys/dev/netif/ral/rt2661.c

178

uint32_t val;

sys/dev/netif/ral/rt2661.c

1788

rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)

sys/dev/netif/ral/rt2661.c

1803

tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;

sys/dev/netif/ral/rt2661.c

1806

DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);

sys/dev/netif/ral/rt2661.c

1812

uint32_t val;

sys/dev/netif/ral/rt2661.c

1825

val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;

sys/dev/netif/ral/rt2661.c

1826

RAL_WRITE(sc, RT2661_PHY_CSR3, val);

sys/dev/netif/ral/rt2661.c

1829

val = RAL_READ(sc, RT2661_PHY_CSR3);

sys/dev/netif/ral/rt2661.c

1830

if (!(val & RT2661_BBP_BUSY))

sys/dev/netif/ral/rt2661.c

1831

return val & 0xff;

sys/dev/netif/ral/rt2661.c

1840

rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)

sys/dev/netif/ral/rt2661.c

185

uint8_t val;

sys/dev/netif/ral/rt2661.c

1855

tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |

sys/dev/netif/ral/rt2661.c

1860

sc->rf_regs[reg] = val;

sys/dev/netif/ral/rt2661.c

1862

DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);

sys/dev/netif/ral/rt2661.c

204

uint32_t val;

sys/dev/netif/ral/rt2661.c

2196

uint16_t val;

sys/dev/netif/ral/rt2661.c

2200

val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);

sys/dev/netif/ral/rt2661.c

2201

macaddr[0] = val & 0xff;

sys/dev/netif/ral/rt2661.c

2202

macaddr[1] = val >> 8;

sys/dev/netif/ral/rt2661.c

2204

val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);

sys/dev/netif/ral/rt2661.c

2205

macaddr[2] = val & 0xff;

sys/dev/netif/ral/rt2661.c

2206

macaddr[3] = val >> 8;

sys/dev/netif/ral/rt2661.c

2208

val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);

sys/dev/netif/ral/rt2661.c

2209

macaddr[4] = val & 0xff;

sys/dev/netif/ral/rt2661.c

2210

macaddr[5] = val >> 8;

sys/dev/netif/ral/rt2661.c

2212

val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);

sys/dev/netif/ral/rt2661.c

2214

sc->rf_rev = (val >> 11) & 0x1f;

sys/dev/netif/ral/rt2661.c

2215

sc->hw_radio = (val >> 10) & 0x1;

sys/dev/netif/ral/rt2661.c

2216

sc->rx_ant = (val >> 4) & 0x3;

sys/dev/netif/ral/rt2661.c

2217

sc->tx_ant = (val >> 2) & 0x3;

sys/dev/netif/ral/rt2661.c

2218

sc->nb_ant = val & 0x3;

sys/dev/netif/ral/rt2661.c

2222

val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);

sys/dev/netif/ral/rt2661.c

2223

sc->ext_5ghz_lna = (val >> 6) & 0x1;

sys/dev/netif/ral/rt2661.c

2224

sc->ext_2ghz_lna = (val >> 4) & 0x1;

sys/dev/netif/ral/rt2661.c

2229

val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);

sys/dev/netif/ral/rt2661.c

223

if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)

sys/dev/netif/ral/rt2661.c

2230

if ((val & 0xff) != 0xff)

sys/dev/netif/ral/rt2661.c

2231

sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */

sys/dev/netif/ral/rt2661.c

2237

val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);

sys/dev/netif/ral/rt2661.c

2238

if ((val & 0xff) != 0xff)

sys/dev/netif/ral/rt2661.c

2239

sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */

sys/dev/netif/ral/rt2661.c

2254

val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);

sys/dev/netif/ral/rt2661.c

2255

if ((val >> 8) != 0xff)

sys/dev/netif/ral/rt2661.c

2256

sc->rfprog = (val >> 8) & 0x3;

sys/dev/netif/ral/rt2661.c

2257

if ((val & 0xff) != 0xff)

sys/dev/netif/ral/rt2661.c

2258

sc->rffreq = val & 0xff;

sys/dev/netif/ral/rt2661.c

2264

val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);

sys/dev/netif/ral/rt2661.c

2265

sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */

sys/dev/netif/ral/rt2661.c

2268

sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */

sys/dev/netif/ral/rt2661.c

2275

val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);

sys/dev/netif/ral/rt2661.c

2276

if (val == 0 || val == 0xffff)

sys/dev/netif/ral/rt2661.c

2278

sc->bbp_prom[i].reg = val >> 8;

sys/dev/netif/ral/rt2661.c

2279

sc->bbp_prom[i].val = val & 0xff;

sys/dev/netif/ral/rt2661.c

2281

sc->bbp_prom[i].val);

sys/dev/netif/ral/rt2661.c

2289

uint8_t val;

sys/dev/netif/ral/rt2661.c

2293

val = rt2661_bbp_read(sc, 0);

sys/dev/netif/ral/rt2661.c

2294

if (val != 0 && val != 0xff)

sys/dev/netif/ral/rt2661.c

2306

rt2661_def_bbp[i].val);

sys/dev/netif/ral/rt2661.c

2313

rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);

sys/dev/netif/ral/rt2661.c

237

device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,

sys/dev/netif/ral/rt2661.c

2383

RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);

sys/dev/netif/ral/rt2661.c

837

uint16_t val;

sys/dev/netif/ral/rt2661.c

869

val = 0;

sys/dev/netif/ral/rt2661.c

873

val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;

sys/dev/netif/ral/rt2661.c

884

return val;

sys/dev/netif/ral/rt2661.c

892

uint32_t val;

sys/dev/netif/ral/rt2661.c

900

val = RAL_READ(sc, RT2661_STA_CSR4);

sys/dev/netif/ral/rt2661.c

901

if (!(val & RT2661_TX_STAT_VALID))

sys/dev/netif/ral/rt2661.c

905

qid = RT2661_TX_QID(val);

sys/dev/netif/ral/rt2661.c

921

switch (RT2661_TX_RESULT(val)) {

sys/dev/netif/ral/rt2661.c

923

retrycnt = RT2661_TX_RETRYCNT(val);

sys/dev/netif/ral/rt2661.c

935

retrycnt = RT2661_TX_RETRYCNT(val);

sys/dev/netif/ral/rt2661.c

949

"sending data frame failed 0x%08x\n", val);

sys/dev/netif/ral/rt2661reg.h

326

#define RAL_WRITE(sc, reg, val) \

sys/dev/netif/ral/rt2661reg.h

327

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/ral/rt2661reg.h

336

#define RT2661_EEPROM_CTL(sc, val) do { \

sys/dev/netif/ral/rt2661reg.h

337

RAL_WRITE((sc), RT2661_E2PROM_CSR, (val)); \

sys/dev/netif/ral/rt2661var.h

142

uint8_t val;

sys/dev/netif/ral/rt2860.c

1050

uint16_t val;

sys/dev/netif/ral/rt2860.c

1082

val = 0;

sys/dev/netif/ral/rt2860.c

1086

val |= ((tmp & RT2860_Q) >> RT2860_SHIFT_Q) << n;

sys/dev/netif/ral/rt2860.c

1097

return val;

sys/dev/netif/ral/rt2860.c

194

uint32_t val;

sys/dev/netif/ral/rt2860.c

201

uint8_t val;

sys/dev/netif/ral/rt2860.c

2123

rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)

sys/dev/netif/ral/rt2860.c

2139

RT2860_BBP_CSR_KICK | reg << 8 | val);

sys/dev/netif/ral/rt2860.c

2149

uint32_t val;

sys/dev/netif/ral/rt2860.c

2171

val = RAL_READ(sc, RT2860_H2M_BBPAGENT);

sys/dev/netif/ral/rt2860.c

2172

if (!(val & RT2860_BBP_CSR_KICK))

sys/dev/netif/ral/rt2860.c

2173

return val & 0xff;

sys/dev/netif/ral/rt2860.c

2185

rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)

sys/dev/netif/ral/rt2860.c

2202

(val & 0x3fffff) << 2 | (reg & 3);

sys/dev/netif/ral/rt2860.c

223

uint8_t val;

sys/dev/netif/ral/rt2860.c

2238

rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)

sys/dev/netif/ral/rt2860.c

2253

tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;

sys/dev/netif/ral/rt2860.c

2737

rt3090_def_rf[i].val);

sys/dev/netif/ral/rt2860.c

2833

rt5392_def_rf[i].val);

sys/dev/netif/ral/rt2860.c

2838

rt5390_def_rf[i].val);

sys/dev/netif/ral/rt2860.c

2990

uint8_t *val)

sys/dev/netif/ral/rt2860.c

3039

*val = rf24;

sys/dev/netif/ral/rt2860.c

3080

rt3090_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);

sys/dev/netif/ral/rt2860.c

3290

uint32_t val = arc4random();

sys/dev/netif/ral/rt2860.c

3292

if (val >= 0x03ff00 && (val & 0xf8ff00) == 0x00ff00)

sys/dev/netif/ral/rt2860.c

3293

val += 0x000100;

sys/dev/netif/ral/rt2860.c

3294

iv[0] = val;

sys/dev/netif/ral/rt2860.c

3295

iv[1] = val >> 8;

sys/dev/netif/ral/rt2860.c

3296

iv[2] = val >> 16;

sys/dev/netif/ral/rt2860.c

3428

uint16_t val;

sys/dev/netif/ral/rt2860.c

3442

val = rt2860_srom_read(sc, RT2860_EEPROM_VERSION);

sys/dev/netif/ral/rt2860.c

3443

DPRINTF(("EEPROM rev=%d, FAE=%d\n", val >> 8, val & 0xff));

sys/dev/netif/ral/rt2860.c

3447

val = rt2860_srom_read(sc, RT2860_EEPROM_MAC01);

sys/dev/netif/ral/rt2860.c

3448

macaddr[0] = val & 0xff;

sys/dev/netif/ral/rt2860.c

3449

macaddr[1] = val >> 8;

sys/dev/netif/ral/rt2860.c

3450

val = rt2860_srom_read(sc, RT2860_EEPROM_MAC23);

sys/dev/netif/ral/rt2860.c

3451

macaddr[2] = val & 0xff;

sys/dev/netif/ral/rt2860.c

3452

macaddr[3] = val >> 8;

sys/dev/netif/ral/rt2860.c

3453

val = rt2860_srom_read(sc, RT2860_EEPROM_MAC45);

sys/dev/netif/ral/rt2860.c

3454

macaddr[4] = val & 0xff;

sys/dev/netif/ral/rt2860.c

3455

macaddr[5] = val >> 8;

sys/dev/netif/ral/rt2860.c

3459

val = rt2860_srom_read(sc, RT2860_EEPROM_COUNTRY);

sys/dev/netif/ral/rt2860.c

3460

DPRINTF(("EEPROM region code=0x%04x\n", val));

sys/dev/netif/ral/rt2860.c

3465

val = rt2860_srom_read(sc, RT2860_EEPROM_BBP_BASE + i);

sys/dev/netif/ral/rt2860.c

3466

sc->bbp[i].val = val & 0xff;

sys/dev/netif/ral/rt2860.c

3467

sc->bbp[i].reg = val >> 8;

sys/dev/netif/ral/rt2860.c

3468

DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val));

sys/dev/netif/ral/rt2860.c

3473

val = rt2860_srom_read(sc, RT3071_EEPROM_RF_BASE + i);

sys/dev/netif/ral/rt2860.c

3474

sc->rf[i].val = val & 0xff;

sys/dev/netif/ral/rt2860.c

3475

sc->rf[i].reg = val >> 8;

sys/dev/netif/ral/rt2860.c

3477

sc->rf[i].val));

sys/dev/netif/ral/rt2860.c

3482

val = rt2860_srom_read(sc, RT2860_EEPROM_FREQ_LEDS);

sys/dev/netif/ral/rt2860.c

3483

sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;

sys/dev/netif/ral/rt2860.c

3485

if ((val >> 8) != 0xff) {

sys/dev/netif/ral/rt2860.c

3487

sc->leds = val >> 8;

sys/dev/netif/ral/rt2860.c

3502

val = rt2860_srom_read(sc, RT2860_EEPROM_ANTENNA);

sys/dev/netif/ral/rt2860.c

3506

sc->rf_rev = (val >> 8) & 0xf;

sys/dev/netif/ral/rt2860.c

3507

sc->ntxchains = (val >> 4) & 0xf;

sys/dev/netif/ral/rt2860.c

3508

sc->nrxchains = val & 0xf;

sys/dev/netif/ral/rt2860.c

3513

val = rt2860_srom_read(sc, RT2860_EEPROM_CONFIG);

sys/dev/netif/ral/rt2860.c

3514

DPRINTF(("EEPROM CFG 0x%04x\n", val));

sys/dev/netif/ral/rt2860.c

3516

if ((val >> 8) != 0xff)

sys/dev/netif/ral/rt2860.c

3517

sc->patch_dac = (val >> 15) & 1;

sys/dev/netif/ral/rt2860.c

3518

if ((val & 0xff) != 0xff) {

sys/dev/netif/ral/rt2860.c

3519

sc->ext_5ghz_lna = (val >> 3) & 1;

sys/dev/netif/ral/rt2860.c

3520

sc->ext_2ghz_lna = (val >> 2) & 1;

sys/dev/netif/ral/rt2860.c

3524

sc->rfswitch = val & 1;

sys/dev/netif/ral/rt2860.c

3528

val = rt2860_srom_read(sc, RT2860_EEPROM_PCIE_PSLEVEL);

sys/dev/netif/ral/rt2860.c

3529

if ((val & 0xff) != 0xff) {

sys/dev/netif/ral/rt2860.c

3530

sc->pslevel = val & 0x3;

sys/dev/netif/ral/rt2860.c

3531

val = rt2860_srom_read(sc, RT2860_EEPROM_REV);

sys/dev/netif/ral/rt2860.c

3532

if ((val & 0xff80) != 0x9280)

sys/dev/netif/ral/rt2860.c

3540

val = rt2860_srom_read(sc,

sys/dev/netif/ral/rt2860.c

3542

sc->txpow1[i + 0] = (int8_t)(val & 0xff);

sys/dev/netif/ral/rt2860.c

3543

sc->txpow1[i + 1] = (int8_t)(val >> 8);

sys/dev/netif/ral/rt2860.c

3546

val = rt2860_srom_read(sc,

sys/dev/netif/ral/rt2860.c

3548

sc->txpow2[i + 0] = (int8_t)(val & 0xff);

sys/dev/netif/ral/rt2860.c

3549

sc->txpow2[i + 1] = (int8_t)(val >> 8);

sys/dev/netif/ral/rt2860.c

3567

val = rt2860_srom_read(sc,

sys/dev/netif/ral/rt2860.c

3569

sc->txpow1[i + 14] = (int8_t)(val & 0xff);

sys/dev/netif/ral/rt2860.c

3570

sc->txpow1[i + 15] = (int8_t)(val >> 8);

sys/dev/netif/ral/rt2860.c

3572

val = rt2860_srom_read(sc,

sys/dev/netif/ral/rt2860.c

3574

sc->txpow2[i + 14] = (int8_t)(val & 0xff);

sys/dev/netif/ral/rt2860.c

3575

sc->txpow2[i + 15] = (int8_t)(val >> 8);

sys/dev/netif/ral/rt2860.c

3589

val = rt2860_srom_read(sc, RT2860_EEPROM_DELTAPWR);

sys/dev/netif/ral/rt2860.c

3591

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/dev/netif/ral/rt2860.c

3592

delta_2ghz = val & 0xf;

sys/dev/netif/ral/rt2860.c

3593

if (!(val & 0x40)) /* negative number */

sys/dev/netif/ral/rt2860.c

3596

val >>= 8;

sys/dev/netif/ral/rt2860.c

3597

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/dev/netif/ral/rt2860.c

3598

delta_5ghz = val & 0xf;

sys/dev/netif/ral/rt2860.c

3599

if (!(val & 0x40)) /* negative number */

sys/dev/netif/ral/rt2860.c

3608

val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2);

sys/dev/netif/ral/rt2860.c

3609

reg = val;

sys/dev/netif/ral/rt2860.c

3610

val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1);

sys/dev/netif/ral/rt2860.c

3611

reg |= (uint32_t)val << 16;

sys/dev/netif/ral/rt2860.c

3623

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_2GHZ);

sys/dev/netif/ral/rt2860.c

3624

sc->tssi_2ghz[0] = val & 0xff; /* [-4] */

sys/dev/netif/ral/rt2860.c

3625

sc->tssi_2ghz[1] = val >> 8; /* [-3] */

sys/dev/netif/ral/rt2860.c

3626

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_2GHZ);

sys/dev/netif/ral/rt2860.c

3627

sc->tssi_2ghz[2] = val & 0xff; /* [-2] */

sys/dev/netif/ral/rt2860.c

3628

sc->tssi_2ghz[3] = val >> 8; /* [-1] */

sys/dev/netif/ral/rt2860.c

3629

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_2GHZ);

sys/dev/netif/ral/rt2860.c

3630

sc->tssi_2ghz[4] = val & 0xff; /* [+0] */

sys/dev/netif/ral/rt2860.c

3631

sc->tssi_2ghz[5] = val >> 8; /* [+1] */

sys/dev/netif/ral/rt2860.c

3632

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_2GHZ);

sys/dev/netif/ral/rt2860.c

3633

sc->tssi_2ghz[6] = val & 0xff; /* [+2] */

sys/dev/netif/ral/rt2860.c

3634

sc->tssi_2ghz[7] = val >> 8; /* [+3] */

sys/dev/netif/ral/rt2860.c

3635

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_2GHZ);

sys/dev/netif/ral/rt2860.c

3636

sc->tssi_2ghz[8] = val & 0xff; /* [+4] */

sys/dev/netif/ral/rt2860.c

3637

sc->step_2ghz = val >> 8;

sys/dev/netif/ral/rt2860.c

3647

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_5GHZ);

sys/dev/netif/ral/rt2860.c

3648

sc->tssi_5ghz[0] = val & 0xff; /* [-4] */

sys/dev/netif/ral/rt2860.c

3649

sc->tssi_5ghz[1] = val >> 8; /* [-3] */

sys/dev/netif/ral/rt2860.c

3650

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_5GHZ);

sys/dev/netif/ral/rt2860.c

3651

sc->tssi_5ghz[2] = val & 0xff; /* [-2] */

sys/dev/netif/ral/rt2860.c

3652

sc->tssi_5ghz[3] = val >> 8; /* [-1] */

sys/dev/netif/ral/rt2860.c

3653

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_5GHZ);

sys/dev/netif/ral/rt2860.c

3654

sc->tssi_5ghz[4] = val & 0xff; /* [+0] */

sys/dev/netif/ral/rt2860.c

3655

sc->tssi_5ghz[5] = val >> 8; /* [+1] */

sys/dev/netif/ral/rt2860.c

3656

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_5GHZ);

sys/dev/netif/ral/rt2860.c

3657

sc->tssi_5ghz[6] = val & 0xff; /* [+2] */

sys/dev/netif/ral/rt2860.c

3658

sc->tssi_5ghz[7] = val >> 8; /* [+3] */

sys/dev/netif/ral/rt2860.c

3659

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_5GHZ);

sys/dev/netif/ral/rt2860.c

3660

sc->tssi_5ghz[8] = val & 0xff; /* [+4] */

sys/dev/netif/ral/rt2860.c

3661

sc->step_5ghz = val >> 8;

sys/dev/netif/ral/rt2860.c

3672

val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ);

sys/dev/netif/ral/rt2860.c

3673

sc->rssi_2ghz[0] = val & 0xff; /* Ant A */

sys/dev/netif/ral/rt2860.c

3674

sc->rssi_2ghz[1] = val >> 8; /* Ant B */

sys/dev/netif/ral/rt2860.c

3675

val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ);

sys/dev/netif/ral/rt2860.c

3681

if ((val & 0xff) != 0xff)

sys/dev/netif/ral/rt2860.c

3682

sc->txmixgain_2ghz = val & 0x7;

sys/dev/netif/ral/rt2860.c

3685

sc->rssi_2ghz[2] = val & 0xff; /* Ant C */

sys/dev/netif/ral/rt2860.c

3686

sc->lna[2] = val >> 8; /* channel group 2 */

sys/dev/netif/ral/rt2860.c

3688

val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ);

sys/dev/netif/ral/rt2860.c

3689

sc->rssi_5ghz[0] = val & 0xff; /* Ant A */

sys/dev/netif/ral/rt2860.c

3690

sc->rssi_5ghz[1] = val >> 8; /* Ant B */

sys/dev/netif/ral/rt2860.c

3691

val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ);

sys/dev/netif/ral/rt2860.c

3692

sc->rssi_5ghz[2] = val & 0xff; /* Ant C */

sys/dev/netif/ral/rt2860.c

3693

sc->lna[3] = val >> 8; /* channel group 3 */

sys/dev/netif/ral/rt2860.c

3695

val = rt2860_srom_read(sc, RT2860_EEPROM_LNA);

sys/dev/netif/ral/rt2860.c

3699

sc->lna[0] = val & 0xff;

sys/dev/netif/ral/rt2860.c

3700

sc->lna[1] = val >> 8; /* channel group 1 */

sys/dev/netif/ral/rt2860.c

3752

rt2860_def_bbp[i].val);

sys/dev/netif/ral/rt2860.c

3790

rt5390_def_bbp[i].val);

sys/dev/netif/ral/rt2860.c

3947

RAL_WRITE(sc, rt2860_def_mac[i].reg, rt2860_def_mac[i].val);

sys/dev/netif/ral/rt2860.c

4039

rt2860_mcu_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);

sys/dev/netif/ral/rt2860reg.h

1011

#define RAL_SET_REGION_4(sc, offset, val, count) \

sys/dev/netif/ral/rt2860reg.h

1013

(val), (count))

sys/dev/netif/ral/rt2860reg.h

1018

#define RT2860_EEPROM_CTL(sc, val) do { \

sys/dev/netif/ral/rt2860reg.h

1019

RAL_WRITE((sc), RT2860_PCI_EECTRL, (val)); \

sys/dev/netif/ral/rt2860reg.h

996

#define RAL_WRITE(sc, reg, val) \

sys/dev/netif/ral/rt2860reg.h

997

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/ral/rt2860var.h

192

uint8_t val;

sys/dev/netif/re/if_re.c

2544

re_write_imr(struct re_softc *sc, uint32_t val)

sys/dev/netif/re/if_re.c

2546

CSR_WRITE_2(sc, RE_IMR, val);

sys/dev/netif/re/if_re.c

2550

re_write_isr(struct re_softc *sc, uint32_t val)

sys/dev/netif/re/if_re.c

2552

CSR_WRITE_2(sc, RE_ISR, val);

sys/dev/netif/re/if_re.c

2568

re_write_imr_8125(struct re_softc *sc, uint32_t val)

sys/dev/netif/re/if_re.c

2570

CSR_WRITE_4(sc, RE_IMR0_8125, val);

sys/dev/netif/re/if_re.c

2574

re_write_isr_8125(struct re_softc *sc, uint32_t val)

sys/dev/netif/re/if_re.c

2576

CSR_WRITE_4(sc, RE_ISR0_8125, val);

sys/dev/netif/re/if_revar.h

221

#define CSR_WRITE_STREAM_4(sc, reg, val) \

sys/dev/netif/re/if_revar.h

222

bus_space_write_stream_4(sc->re_btag, sc->re_bhandle, reg, val)

sys/dev/netif/re/if_revar.h

223

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/re/if_revar.h

224

bus_space_write_4(sc->re_btag, sc->re_bhandle, reg, val)

sys/dev/netif/re/if_revar.h

225

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/re/if_revar.h

226

bus_space_write_2(sc->re_btag, sc->re_bhandle, reg, val)

sys/dev/netif/re/if_revar.h

227

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/re/if_revar.h

228

bus_space_write_1(sc->re_btag, sc->re_bhandle, reg, val)

sys/dev/netif/re/if_revar.h

237

#define CSR_SETBIT_1(sc, reg, val) \

sys/dev/netif/re/if_revar.h

238

CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (val))

sys/dev/netif/re/if_revar.h

239

#define CSR_CLRBIT_1(sc, reg, val) \

sys/dev/netif/re/if_revar.h

240

CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(val))

sys/dev/netif/re/re.c

10543

u_int16_t val;

sys/dev/netif/re/re.c

10551

val = ramcode[i + 1];

sys/dev/netif/re/re.c

10552

if (addr == 0xFFFF && val == 0xFFFF) {

sys/dev/netif/re/re.c

10555

MP_RealWritePhyOcpRegWord(sc, addr, val);

sys/dev/netif/re/re.c

4803

u_int16_t val;

sys/dev/netif/re/re.c

4810

val = MP_ReadPhyOcpRegWord(sc, 0x0C41, 0x13);

sys/dev/netif/re/re.c

4811

if (val != 0x0050) {

sys/dev/netif/re/re.c

4819

val = MP_RealReadPhyOcpRegWord(sc, 0xC416);

sys/dev/netif/re/re.c

4820

if (val != 0x0050) {

sys/dev/netif/re/re.c

4831

u_int16_t val;

sys/dev/netif/re/re.c

4838

val = MP_ReadPhyOcpRegWord(sc, 0x0C41, 0x13);

sys/dev/netif/re/re.c

4839

if (val != 0x0500) {

sys/dev/netif/re/re.c

4847

val = MP_RealReadPhyOcpRegWord(sc, 0xC416);

sys/dev/netif/re/re.c

4848

if (val != 0x0500) {

sys/dev/netif/re/re.h

1040

#define CSR_WRITE_STREAM_4(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_stream_4(sc->re_btag, sc->re_bhandle, reg, val))

sys/dev/netif/re/re.h

1041

#define CSR_WRITE_STREAM_2(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_stream_2(sc->re_btag, sc->re_bhandle, reg, val))

sys/dev/netif/re/re.h

1043

#define CSR_WRITE_4(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_4(sc->re_btag, sc->re_bhandle, reg, val))

sys/dev/netif/re/re.h

1044

#define CSR_WRITE_2(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_2(sc->re_btag, sc->re_bhandle, reg, val))

sys/dev/netif/re/re.h

1045

#define CSR_WRITE_1(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_1(sc->re_btag, sc->re_bhandle, reg, val))

sys/dev/netif/re/re.h

1052

#define RE_CMAC_WRITE_1(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_1(sc->re_cmac_tag, sc->re_cmac_handle, reg, val))

sys/dev/netif/re/re.h

1053

#define RE_CMAC_WRITE_2(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_2(sc->re_cmac_tag, sc->re_cmac_handle, reg, val))

sys/dev/netif/re/re.h

1054

#define RE_CMAC_WRITE_4(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_4(sc->re_cmac_tag, sc->re_cmac_handle, reg, val))

sys/dev/netif/re/re_dragonfly.h

43

#define RE_CMAC_WRITE_1(sc, reg, val) \

sys/dev/netif/re/re_dragonfly.h

44

bus_space_write_1(sc->re_cmac_tag, sc->re_cmac_handle, reg, val)

sys/dev/netif/re/re_dragonfly.h

45

#define RE_CMAC_WRITE_2(sc, reg, val) \

sys/dev/netif/re/re_dragonfly.h

46

bus_space_write_2(sc->re_cmac_tag, sc->re_cmac_handle, reg, val)

sys/dev/netif/re/re_dragonfly.h

47

#define RE_CMAC_WRITE_4(sc, reg, val) \

sys/dev/netif/re/re_dragonfly.h

48

bus_space_write_4(sc->re_cmac_tag, sc->re_cmac_handle, reg, val)

sys/dev/netif/rl/if_rlreg.h

391

#define CSR_WRITE_STREAM_4(sc, reg, val) \

sys/dev/netif/rl/if_rlreg.h

392

bus_space_write_stream_4(sc->rl_btag, sc->rl_bhandle, reg, val)

sys/dev/netif/rl/if_rlreg.h

393

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/rl/if_rlreg.h

394

bus_space_write_4(sc->rl_btag, sc->rl_bhandle, reg, val)

sys/dev/netif/rl/if_rlreg.h

395

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/rl/if_rlreg.h

396

bus_space_write_2(sc->rl_btag, sc->rl_bhandle, reg, val)

sys/dev/netif/rl/if_rlreg.h

397

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/rl/if_rlreg.h

398

bus_space_write_1(sc->rl_btag, sc->rl_bhandle, reg, val)

sys/dev/netif/sf/if_sf.c

219

u_int32_t val;

sys/dev/netif/sf/if_sf.c

223

val = CSR_READ_4(sc, SF_INDIRECTIO_DATA);

sys/dev/netif/sf/if_sf.c

225

val = CSR_READ_4(sc, (reg + SF_RMAP_INTREG_BASE));

sys/dev/netif/sf/if_sf.c

228

return(val);

sys/dev/netif/sf/if_sf.c

234

u_int8_t val;

sys/dev/netif/sf/if_sf.c

236

val = (csr_read_4(sc, SF_EEADDR_BASE +

sys/dev/netif/sf/if_sf.c

239

return(val);

sys/dev/netif/sf/if_sf.c

243

csr_write_4(struct sf_softc *sc, int reg, u_int32_t val)

sys/dev/netif/sf/if_sf.c

247

CSR_WRITE_4(sc, SF_INDIRECTIO_DATA, val);

sys/dev/netif/sf/if_sf.c

249

CSR_WRITE_4(sc, (reg + SF_RMAP_INTREG_BASE), val);

sys/dev/netif/sf/if_sf.c

355

u_int32_t val = 0;

sys/dev/netif/sf/if_sf.c

360

val = csr_read_4(sc, SF_PHY_REG(phy, reg));

sys/dev/netif/sf/if_sf.c

361

if (val & SF_MII_DATAVALID)

sys/dev/netif/sf/if_sf.c

368

if ((val & 0x0000FFFF) == 0xFFFF)

sys/dev/netif/sf/if_sf.c

371

return(val & 0x0000FFFF);

sys/dev/netif/sf/if_sf.c

375

sf_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/sf/if_sf.c

383

csr_write_4(sc, SF_PHY_REG(phy, reg), val);

sys/dev/netif/sf/if_sfreg.h

959

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/sf/if_sfreg.h

960

bus_space_write_4(sc->sf_btag, sc->sf_bhandle, reg, val)

sys/dev/netif/sis/if_sis.c

639

int i, val = 0;

sys/dev/netif/sis/if_sis.c

658

val = (CSR_READ_4(sc, SIS_PHYCTL) >> 16) & 0xFFFF;

sys/dev/netif/sis/if_sis.c

660

if (val == 0xFFFF)

sys/dev/netif/sis/if_sis.c

663

return(val);

sys/dev/netif/sis/if_sisreg.h

461

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/sis/if_sisreg.h

462

bus_space_write_4(sc->sis_btag, sc->sis_bhandle, reg, val)

sys/dev/netif/sk/if_sk.c

1191

uint32_t chunk, val;

sys/dev/netif/sk/if_sk.c

1194

val = sc->sk_rboff / sizeof(uint64_t);

sys/dev/netif/sk/if_sk.c

1195

sc_if->sk_rx_ramstart = val;

sys/dev/netif/sk/if_sk.c

1196

val += (chunk / sizeof(uint64_t));

sys/dev/netif/sk/if_sk.c

1197

sc_if->sk_rx_ramend = val - 1;

sys/dev/netif/sk/if_sk.c

1198

sc_if->sk_tx_ramstart = val;

sys/dev/netif/sk/if_sk.c

1199

val += (chunk / sizeof(uint64_t));

sys/dev/netif/sk/if_sk.c

1200

sc_if->sk_tx_ramend = val - 1;

sys/dev/netif/sk/if_sk.c

1202

uint32_t chunk, val;

sys/dev/netif/sk/if_sk.c

1205

val = (sc->sk_rboff + (chunk * 2 * sc_if->sk_port)) /

sys/dev/netif/sk/if_sk.c

1207

sc_if->sk_rx_ramstart = val;

sys/dev/netif/sk/if_sk.c

1208

val += (chunk / sizeof(uint64_t));

sys/dev/netif/sk/if_sk.c

1209

sc_if->sk_rx_ramend = val - 1;

sys/dev/netif/sk/if_sk.c

1210

sc_if->sk_tx_ramstart = val;

sys/dev/netif/sk/if_sk.c

1211

val += (chunk / sizeof(uint64_t));

sys/dev/netif/sk/if_sk.c

1212

sc_if->sk_tx_ramend = val - 1;

sys/dev/netif/sk/if_sk.c

2302

uint32_t val;

sys/dev/netif/sk/if_sk.c

2305

val = sk_win_read_4(sc, SK_GPIO);

sys/dev/netif/sk/if_sk.c

2307

val |= SK_GPIO_DIR0|SK_GPIO_DAT0;

sys/dev/netif/sk/if_sk.c

2309

val |= SK_GPIO_DIR2|SK_GPIO_DAT2;

sys/dev/netif/sk/if_sk.c

2310

sk_win_write_4(sc, SK_GPIO, val);

sys/dev/netif/sk/if_sk.c

2331

bhack[i].reg, bhack[i].val);

sys/dev/netif/sk/if_sk.c

2775

uint32_t val;

sys/dev/netif/sk/if_sk.c

2793

val = CSR_READ_4(sc, sc_if->sk_tx_bmu);

sys/dev/netif/sk/if_sk.c

2794

if (!(val & SK_TXBMU_TX_STOP))

sys/dev/netif/sk/if_sk.c

2804

val = SK_IF_READ_4(sc_if, 0, SK_RXQ1_BMU_CSR);

sys/dev/netif/sk/if_sk.c

2805

if (!(val & SK_RXBMU_RX_STOP))

sys/dev/netif/sk/if_sk.c

2814

val = sk_win_read_4(sc, SK_GPIO);

sys/dev/netif/sk/if_sk.c

2816

val |= SK_GPIO_DIR0;

sys/dev/netif/sk/if_sk.c

2817

val &= ~SK_GPIO_DAT0;

sys/dev/netif/sk/if_sk.c

2819

val |= SK_GPIO_DIR2;

sys/dev/netif/sk/if_sk.c

2820

val &= ~SK_GPIO_DAT2;

sys/dev/netif/sk/if_sk.c

2822

sk_win_write_4(sc, SK_GPIO, val);

sys/dev/netif/sk/if_sk.c

366

sk_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/sk/if_sk.c

371

return sk_xmac_miibus_writereg(sc_if, phy, reg, val);

sys/dev/netif/sk/if_sk.c

373

return sk_marv_miibus_writereg(sc_if, phy, reg, val);

sys/dev/netif/sk/if_sk.c

418

sk_xmac_miibus_writereg(struct sk_if_softc *sc_if, int phy, int reg, int val)

sys/dev/netif/sk/if_sk.c

435

SK_XM_WRITE_2(sc_if, XM_PHY_DATA, val);

sys/dev/netif/sk/if_sk.c

470

uint16_t val;

sys/dev/netif/sk/if_sk.c

486

val = SK_YU_READ_2(sc_if, YUKON_SMICR);

sys/dev/netif/sk/if_sk.c

487

if (val & YU_SMICR_READ_VALID)

sys/dev/netif/sk/if_sk.c

499

val = SK_YU_READ_2(sc_if, YUKON_SMIDR);

sys/dev/netif/sk/if_sk.c

502

phy, reg, val));

sys/dev/netif/sk/if_sk.c

504

return(val);

sys/dev/netif/sk/if_sk.c

508

sk_marv_miibus_writereg(struct sk_if_softc *sc_if, int phy, int reg, int val)

sys/dev/netif/sk/if_sk.c

513

phy, reg, val));

sys/dev/netif/sk/if_sk.c

515

SK_YU_WRITE_2(sc_if, YUKON_SMIDR, val);

sys/dev/netif/sk/if_skreg.h

115

#define SK_IF_WRITE_4(sc_if, skip, reg, val) \

sys/dev/netif/sk/if_skreg.h

1156

#define SK_XM_WRITE_4(sc, reg, val) \

sys/dev/netif/sk/if_skreg.h

1158

((val) & 0xFFFF)); \

sys/dev/netif/sk/if_skreg.h

1160

((val) >> 16) & 0xFFFF)

sys/dev/netif/sk/if_skreg.h

1165

#define SK_XM_WRITE_4(sc, reg, val) \

sys/dev/netif/sk/if_skreg.h

1166

sk_win_write_4(sc->sk_softc, SK_XMAC_REG(sc, reg), (val))

sys/dev/netif/sk/if_skreg.h

117

reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)

sys/dev/netif/sk/if_skreg.h

1172

#define SK_XM_WRITE_2(sc, reg, val) \

sys/dev/netif/sk/if_skreg.h

1173

sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg), val)

sys/dev/netif/sk/if_skreg.h

118

#define SK_IF_WRITE_2(sc_if, skip, reg, val) \

sys/dev/netif/sk/if_skreg.h

1198

#define SK_YU_WRITE_4(sc, reg, val) \

sys/dev/netif/sk/if_skreg.h

1199

sk_win_write_4((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))

sys/dev/netif/sk/if_skreg.h

120

reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)

sys/dev/netif/sk/if_skreg.h

1201

#define SK_YU_WRITE_2(sc, reg, val) \

sys/dev/netif/sk/if_skreg.h

1202

sk_win_write_2((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))

sys/dev/netif/sk/if_skreg.h

121

#define SK_IF_WRITE_1(sc_if, skip, reg, val) \

sys/dev/netif/sk/if_skreg.h

123

reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)

sys/dev/netif/sk/if_skreg.h

1259

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/sk/if_skreg.h

1260

bus_space_write_4((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))

sys/dev/netif/sk/if_skreg.h

1261

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/sk/if_skreg.h

1262

bus_space_write_2((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))

sys/dev/netif/sk/if_skreg.h

1263

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/sk/if_skreg.h

1264

bus_space_write_1((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))

sys/dev/netif/sk/if_skvar.h

149

int val;

sys/dev/netif/sln/if_slnreg.h

255

#define SLN_WRITE_4(adapter, reg, val) bus_space_write_4(adapter->sln_bustag, adapter->sln_bushandle, reg, val)

sys/dev/netif/sln/if_slnreg.h

256

#define SLN_WRITE_2(adapter, reg, val) bus_space_write_2(adapter->sln_bustag, adapter->sln_bushandle, reg, val)

sys/dev/netif/sln/if_slnreg.h

257

#define SLN_WRITE_1(adapter, reg, val) bus_space_write_1(adapter->sln_bustag, adapter->sln_bushandle, reg, val)

sys/dev/netif/ste/if_stereg.h

433

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/ste/if_stereg.h

434

bus_space_write_4(sc->ste_btag, sc->ste_bhandle, reg, val)

sys/dev/netif/ste/if_stereg.h

435

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/ste/if_stereg.h

436

bus_space_write_2(sc->ste_btag, sc->ste_bhandle, reg, val)

sys/dev/netif/ste/if_stereg.h

437

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/ste/if_stereg.h

438

bus_space_write_1(sc->ste_btag, sc->ste_bhandle, reg, val)

sys/dev/netif/stge/if_stge.c

430

stge_miibus_writereg(device_t dev, int phy, int reg, int val)

sys/dev/netif/stge/if_stge.c

441

frame.mii_data = val;

sys/dev/netif/stge/if_stge.c

578

uint32_t val;

sys/dev/netif/stge/if_stge.c

620

val = pci_read_config(dev, STGE_PCIR_LOMEM, 4);

sys/dev/netif/stge/if_stge.c

622

if ((val & 0x01) != 0) {

sys/dev/netif/stge/if_stge.c

629

val = pci_read_config(dev, sc->sc_res_rid, 4);

sys/dev/netif/stge/if_stge.c

630

if ((val & 0x01) == 0) {

sys/dev/netif/stge/if_stgereg.h

100

#define CSR_WRITE_2(_sc, reg, val) \

sys/dev/netif/stge/if_stgereg.h

101

bus_space_write_2((_sc)->sc_btag, (_sc)->sc_bhandle, (reg), (val))

sys/dev/netif/stge/if_stgereg.h

102

#define CSR_WRITE_1(_sc, reg, val) \

sys/dev/netif/stge/if_stgereg.h

103

bus_space_write_1((_sc)->sc_btag, (_sc)->sc_bhandle, (reg), (val))

sys/dev/netif/stge/if_stgereg.h

98

#define CSR_WRITE_4(_sc, reg, val) \

sys/dev/netif/stge/if_stgereg.h

99

bus_space_write_4((_sc)->sc_btag, (_sc)->sc_bhandle, (reg), (val))

sys/dev/netif/ti/if_tireg.h

1027

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/ti/if_tireg.h

1028

bus_space_write_4(sc->ti_btag, sc->ti_bhandle, reg, val)

sys/dev/netif/tl/if_tl.c

381

tl_dio_write8(struct tl_softc *sc, int reg, int val)

sys/dev/netif/tl/if_tl.c

384

CSR_WRITE_1(sc, TL_DIO_DATA + (reg & 3), val);

sys/dev/netif/tl/if_tl.c

389

tl_dio_write16(struct tl_softc *sc, int reg, int val)

sys/dev/netif/tl/if_tl.c

392

CSR_WRITE_2(sc, TL_DIO_DATA + (reg & 3), val);

sys/dev/netif/tl/if_tl.c

397

tl_dio_write32(struct tl_softc *sc, int reg, int val)

sys/dev/netif/tl/if_tl.c

400

CSR_WRITE_4(sc, TL_DIO_DATA + (reg & 3), val);

sys/dev/netif/tl/if_tlreg.h

491

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/tl/if_tlreg.h

492

bus_space_write_4(sc->tl_btag, sc->tl_bhandle, reg, val)

sys/dev/netif/tl/if_tlreg.h

493

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/tl/if_tlreg.h

494

bus_space_write_2(sc->tl_btag, sc->tl_bhandle, reg, val)

sys/dev/netif/tl/if_tlreg.h

495

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/tl/if_tlreg.h

496

bus_space_write_1(sc->tl_btag, sc->tl_bhandle, reg, val)

sys/dev/netif/tx/if_tx.c

1463

epic_write_eepromreg(epic_softc_t *sc, u_int8_t val)

sys/dev/netif/tx/if_tx.c

1467

CSR_WRITE_1(sc, EECTL, val);

sys/dev/netif/tx/if_tx.c

1482

epic_eeprom_clock(epic_softc_t *sc, u_int8_t val)

sys/dev/netif/tx/if_tx.c

1484

epic_write_eepromreg(sc, val);

sys/dev/netif/tx/if_tx.c

1485

epic_write_eepromreg(sc, (val | 0x4));

sys/dev/netif/tx/if_tx.c

1486

epic_write_eepromreg(sc, val);

sys/dev/netif/tx/if_tx.c

1492

epic_output_eepromw(epic_softc_t *sc, u_int16_t val)

sys/dev/netif/tx/if_tx.c

1497

if (val & (1 << i))

sys/dev/netif/tx/if_tx.c

1559

epic_write_phy_reg(epic_softc_t *sc, int phy, int reg, int val)

sys/dev/netif/tx/if_tx.c

1563

CSR_WRITE_4(sc, MIIDATA, val);

sys/dev/netif/tx/if_txvar.h

106

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/tx/if_txvar.h

107

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/tx/if_txvar.h

108

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/tx/if_txvar.h

109

bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/tx/if_txvar.h

110

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/tx/if_txvar.h

111

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/tx/if_txvar.h

121

#define PHY_WRITE_2(sc, phy, reg, val) \

sys/dev/netif/tx/if_txvar.h

122

epic_write_phy_reg((sc), (phy), (reg), (val))

sys/dev/netif/txp/if_txpreg.h

633

#define WRITE_REG(sc,reg,val) \

sys/dev/netif/txp/if_txpreg.h

634

bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, reg, val)

sys/dev/netif/vge/if_vgevar.h

134

#define CSR_WRITE_STREAM_4(sc, reg, val) \

sys/dev/netif/vge/if_vgevar.h

135

bus_space_write_stream_4(sc->vge_btag, sc->vge_bhandle, reg, val)

sys/dev/netif/vge/if_vgevar.h

136

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/vge/if_vgevar.h

137

bus_space_write_4(sc->vge_btag, sc->vge_bhandle, reg, val)

sys/dev/netif/vge/if_vgevar.h

138

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/vge/if_vgevar.h

139

bus_space_write_2(sc->vge_btag, sc->vge_bhandle, reg, val)

sys/dev/netif/vge/if_vgevar.h

140

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/vge/if_vgevar.h

141

bus_space_write_1(sc->vge_btag, sc->vge_bhandle, reg, val)

sys/dev/netif/vr/if_vrreg.h

483

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/vr/if_vrreg.h

484

bus_space_write_4(sc->vr_btag, sc->vr_bhandle, reg, val)

sys/dev/netif/vr/if_vrreg.h

485

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/vr/if_vrreg.h

486

bus_space_write_2(sc->vr_btag, sc->vr_bhandle, reg, val)

sys/dev/netif/vr/if_vrreg.h

487

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/vr/if_vrreg.h

488

bus_space_write_1(sc->vr_btag, sc->vr_bhandle, reg, val)

sys/dev/netif/wb/if_wbreg.h

386

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/wb/if_wbreg.h

387

bus_space_write_4(sc->wb_btag, sc->wb_bhandle, reg, val)

sys/dev/netif/wb/if_wbreg.h

388

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/wb/if_wbreg.h

389

bus_space_write_2(sc->wb_btag, sc->wb_bhandle, reg, val)

sys/dev/netif/wb/if_wbreg.h

390

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/wb/if_wbreg.h

391

bus_space_write_1(sc->wb_btag, sc->wb_bhandle, reg, val)

sys/dev/netif/wi/if_wi.c

1218

u_int16_t val;

sys/dev/netif/wi/if_wi.c

1221

len = sizeof(val);

sys/dev/netif/wi/if_wi.c

1223

wi_read_rid(sc, WI_RID_CUR_TX_RATE, &val, &len) == 0 &&

sys/dev/netif/wi/if_wi.c

1224

len == sizeof(val)) {

sys/dev/netif/wi/if_wi.c

1226

val = le16toh(val);

sys/dev/netif/wi/if_wi.c

1227

rate = val * 2;

sys/dev/netif/wi/if_wi.c

1750

u_int16_t val;

sys/dev/netif/wi/if_wi.c

1755

val = (vap->iv_flags & IEEE80211_F_PRIVACY) ? 1 : 0;

sys/dev/netif/wi/if_wi.c

1756

error = wi_write_val(sc, WI_RID_ENCRYPTION, val);

sys/dev/netif/wi/if_wi.c

177

wi_write_val(struct wi_softc *sc, int rid, u_int16_t val)

sys/dev/netif/wi/if_wi.c

1777

val = HOST_ENCRYPT | HOST_DECRYPT;

sys/dev/netif/wi/if_wi.c

1794

val |= PRIVACY_INVOKED;

sys/dev/netif/wi/if_wi.c

1798

error = wi_write_val(sc, WI_RID_P2_ENCRYPTION, val);

sys/dev/netif/wi/if_wi.c

180

val = htole16(val);

sys/dev/netif/wi/if_wi.c

1801

sc->sc_encryption = val;

sys/dev/netif/wi/if_wi.c

1802

if ((val & PRIVACY_INVOKED) == 0)

sys/dev/netif/wi/if_wi.c

181

return wi_write_rid(sc, rid, &val, sizeof(val));

sys/dev/netif/wi/if_wi.c

252

u_int16_t val;

sys/dev/netif/wi/if_wi.c

356

buflen = sizeof(val);

sys/dev/netif/wi/if_wi.c

357

if (wi_read_rid(sc, WI_RID_CHANNEL_LIST, &val, &buflen) != 0)

sys/dev/netif/wi/if_wi.c

358

val = htole16(0x1fff); /* assume 1-13 */

sys/dev/netif/wi/if_wi.c

359

KASSERT(val != 0, ("wi_attach: no available channels listed!"));

sys/dev/netif/wi/if_wi.c

361

val <<= 1; /* shift for base 1 indices */

sys/dev/netif/wi/if_wi.c

365

if (!isset((u_int8_t*)&val, i))

sys/dev/netif/wi/if_wi.c

428

buflen = sizeof(val);

sys/dev/netif/wi/if_wi.c

429

if (wi_read_rid(sc, WI_RID_WEP_AVAIL, &val, &buflen) == 0 &&

sys/dev/netif/wi/if_wi.c

430

val != htole16(0))

sys/dev/netif/wi/if_wi.c

448

buflen = sizeof(val);

sys/dev/netif/wi/if_wi.c

450

wi_read_rid(sc, WI_RID_DBM_ADJUST, &val, &buflen) == 0) {

sys/dev/netif/wi/if_wi.c

451

sc->sc_dbm_offset = le16toh(val);

sys/dev/netif/wi/if_wireg.h

105

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/wi/if_wireg.h

107

(sc)->wi_bus_type == WI_BUS_PCI_NATIVE ? (reg)*2 : (reg), val)

sys/dev/netif/wi/if_wireg.h

108

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/wi/if_wireg.h

110

(sc)->wi_bus_type == WI_BUS_PCI_NATIVE ? (reg)*2 : (reg), val)

sys/dev/netif/wi/if_wireg.h

111

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/wi/if_wireg.h

113

(sc)->wi_bus_type == WI_BUS_PCI_NATIVE ? (reg)*2 : (reg), val)

sys/dev/netif/wi/if_wireg.h

125

#define CSM_WRITE_1(sc, off, val) \

sys/dev/netif/wi/if_wireg.h

126

bus_space_write_1((sc)->wi_bmemtag, (sc)->wi_bmemhandle, off, val)

sys/dev/netif/wi/if_wireg.h

131

#define CSR_WRITE_STREAM_2(sc, reg, val) \

sys/dev/netif/wi/if_wireg.h

133

(sc->wi_bus_type == WI_BUS_PCI_NATIVE ? (reg) * 2 : (reg)), val)

sys/dev/netif/wi/if_wireg.h

134

#define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \

sys/dev/netif/wi/if_wireg.h

136

(sc->wi_bus_type == WI_BUS_PCI_NATIVE ? (reg) * 2 : (reg)), val, count)

sys/dev/netif/wpi/if_wpi.c

3663

uint64_t val, mod;

sys/dev/netif/wpi/if_wpi.c

3673

val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;

sys/dev/netif/wpi/if_wpi.c

3674

mod = le64toh(cmd.tstamp) % val;

sys/dev/netif/wpi/if_wpi.c

3675

cmd.binitval = htole32((uint32_t)(val - mod));

sys/dev/netif/wpi/if_wpi.c

3678

ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));

sys/dev/netif/wpi/if_wpi.c

876

uint32_t val;

sys/dev/netif/wpi/if_wpi.c

887

val = WPI_READ(sc, WPI_EEPROM);

sys/dev/netif/wpi/if_wpi.c

888

if (val & WPI_EEPROM_READ_VALID)

sys/dev/netif/wpi/if_wpi.c

897

*out++= val >> 16;

sys/dev/netif/wpi/if_wpi.c

899

*out ++= val >> 24;

sys/dev/netif/wpi/if_wpireg.h

1019

#define WPI_WRITE(sc, reg, val) \

sys/dev/netif/wpi/if_wpireg.h

1020

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/netif/xl/if_xlreg.h

638

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/netif/xl/if_xlreg.h

639

bus_space_write_4(sc->xl_btag, sc->xl_bhandle, reg, val)

sys/dev/netif/xl/if_xlreg.h

640

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/netif/xl/if_xlreg.h

641

bus_space_write_2(sc->xl_btag, sc->xl_bhandle, reg, val)

sys/dev/netif/xl/if_xlreg.h

642

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/netif/xl/if_xlreg.h

643

bus_space_write_1(sc->xl_btag, sc->xl_bhandle, reg, val)

sys/dev/pccard/exca/exca.c

148

exca_mem_putb(struct exca_softc *sc, int reg, uint8_t val)

sys/dev/pccard/exca/exca.c

150

bus_space_write_1(sc->bst, sc->bsh, sc->offset + reg, val);

sys/dev/pccard/exca/exca.c

161

exca_io_putb(struct exca_softc *sc, int reg, uint8_t val)

sys/dev/pccard/exca/exca.c

164

bus_space_write_1(sc->bst, sc->bsh, EXCA_REG_DATA, val);

sys/dev/pccard/exca/excavar.h

136

exca_putb(struct exca_softc *sc, int reg, uint8_t val)

sys/dev/pccard/exca/excavar.h

138

sc->putb(sc, reg, val);

sys/dev/pccard/pccbb/pccbb.c

1524

cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val,

sys/dev/pccard/pccbb/pccbb.c

1531

b, s, f, reg, val, width);

sys/dev/pccard/pccbb/pccbbvar.h

153

int reg, uint32_t val, int width);

sys/dev/pccard/pccbb/pccbbvar.h

160

cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val)

sys/dev/pccard/pccbb/pccbbvar.h

162

bus_space_write_4(sc->bst, sc->bsh, reg, val);

sys/dev/powermng/amdtemp/amdtemp.c

1008

(i * sizeof(val)),

sys/dev/powermng/amdtemp/amdtemp.c

1009

&val);

sys/dev/powermng/amdtemp/amdtemp.c

1012

if ((val & AMDTEMP_17H_CCD_TMP_VALID) == 0)

sys/dev/powermng/amdtemp/amdtemp.c

1033

uint32_t maxreg, i, val;

sys/dev/powermng/amdtemp/amdtemp.c

1064

(i * sizeof(val)),

sys/dev/powermng/amdtemp/amdtemp.c

1065

&val);

sys/dev/powermng/amdtemp/amdtemp.c

1067

i, error, val);

sys/dev/powermng/amdtemp/amdtemp.c

1070

if ((val & AMDTEMP_17H_CCD_TMP_VALID) == 0)

sys/dev/powermng/amdtemp/amdtemp.c

881

amdtemp_decode_fam10h_to_17h(int32_t sc_offset, uint32_t val, bool minus49)

sys/dev/powermng/amdtemp/amdtemp.c

886

temp = (val & AMDTEMP_REPTMP10H_CURTMP_MASK) * 5 / 4;

sys/dev/powermng/amdtemp/amdtemp.c

896

amdtemp_decode_fam10h_to_16h(int32_t sc_offset, uint32_t val)

sys/dev/powermng/amdtemp/amdtemp.c

906

((val >> AMDTEMP_REPTMP10H_TJSEL_SHIFT) &

sys/dev/powermng/amdtemp/amdtemp.c

910

val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49));

sys/dev/powermng/amdtemp/amdtemp.c

914

amdtemp_decode_fam17h_tctl(int32_t sc_offset, uint32_t val)

sys/dev/powermng/amdtemp/amdtemp.c

918

minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0);

sys/dev/powermng/amdtemp/amdtemp.c

920

val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49));

sys/dev/powermng/amdtemp/amdtemp.c

937

uint32_t val;

sys/dev/powermng/amdtemp/amdtemp.c

940

error = amdsmn_read(sc->sc_smn, AMDTEMP_15H_M60H_REPTMP_CTRL, &val);

sys/dev/powermng/amdtemp/amdtemp.c

942

return (amdtemp_decode_fam10h_to_16h(sc->sc_offset, val));

sys/dev/powermng/amdtemp/amdtemp.c

949

uint32_t val;

sys/dev/powermng/amdtemp/amdtemp.c

955

error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CUR_TMP, &val);

sys/dev/powermng/amdtemp/amdtemp.c

957

return (amdtemp_decode_fam17h_tctl(sc->sc_offset, val));

sys/dev/powermng/amdtemp/amdtemp.c

963

(((int)sensor - CCD_BASE) * sizeof(val)),

sys/dev/powermng/amdtemp/amdtemp.c

964

&val);

sys/dev/powermng/amdtemp/amdtemp.c

966

KASSERT((val & AMDTEMP_17H_CCD_TMP_VALID) != 0,

sys/dev/powermng/amdtemp/amdtemp.c

968

return (amdtemp_decode_fam10h_to_17h(sc->sc_offset, val, true));

sys/dev/powermng/amdtemp/amdtemp.c

979

uint32_t maxreg, i, val;

sys/dev/powermng/corecstat/corecstat.c

596

uint64_t val;

sys/dev/powermng/corecstat/corecstat.c

598

if (rdmsr_safe(msr, &val) != 0) {

sys/dev/powermng/corepower/corepower.c

211

uint64_t val;

sys/dev/powermng/corepower/corepower.c

273

val = rdmsr(MSR_RAPL_POWER_UNIT);

sys/dev/powermng/corepower/corepower.c

275

power_units = __SHIFTOUT(val, MSR_RAPL_POWER_UNIT_POWER);

sys/dev/powermng/corepower/corepower.c

276

energy_units = __SHIFTOUT(val, MSR_RAPL_POWER_UNIT_ENERGY);

sys/dev/powermng/corepower/corepower.c

277

time_units = __SHIFTOUT(val, MSR_RAPL_POWER_UNIT_TIME);

sys/dev/powermng/corepower/corepower.c

356

uint64_t val;

sys/dev/powermng/corepower/corepower.c

359

val = ((uint64_t)units) * sc->sc_joule_unit;

sys/dev/powermng/corepower/corepower.c

361

val = ((uint64_t)units) * 1000ULL * 1000ULL;

sys/dev/powermng/corepower/corepower.c

362

val /= sc->sc_joule_unit;

sys/dev/powermng/corepower/corepower.c

365

return val / secs;

sys/dev/powermng/corepower/corepower.c

415

uint64_t val;

sys/dev/powermng/corepower/corepower.c

417

if (rdmsr_safe(msr, &val) != 0) {

sys/dev/powermng/it/it.c

200

it_writereg(struct it_softc *sc, int reg, int val)

sys/dev/powermng/it/it.c

203

bus_space_write_1(sc->sc_iot, sc->sc_ioh, ITC_DATA, val);

sys/dev/powermng/lm/lm78_isa.c

256

lm_isa_writereg(struct lm_softc *lmsc, int reg, int val)

sys/dev/powermng/lm/lm78_isa.c

261

bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMC_DATA, val);

sys/dev/powermng/memtemp/memtemp_core.c

121

uint32_t val;

sys/dev/powermng/memtemp/memtemp_core.c

124

error = COREMCTL_MCH_READ(sc->temp_parent, ofs, &val);

sys/dev/powermng/memtemp/memtemp_core.c

127

return val;

sys/dev/powermng/memtemp/memtemp_core.c

131

CSR_WRITE_4(struct memtemp_core_softc *sc, int ofs, uint32_t val)

sys/dev/powermng/memtemp/memtemp_core.c

135

error = COREMCTL_MCH_WRITE(sc->temp_parent, ofs, val);

sys/dev/powermng/memtemp/memtemp_core.c

263

uint32_t val;

sys/dev/powermng/memtemp/memtemp_core.c

266

val = CSR_READ_4(dimm_sc->dimm_parent, dimm_sc->dimm_reg);

sys/dev/powermng/memtemp/memtemp_core.c

267

temp = __SHIFTOUT(val, dimm_sc->dimm_mask);

sys/dev/powermng/memtemp/memtemp_e5.c

353

uint32_t val;

sys/dev/powermng/memtemp/memtemp_e5.c

358

val = pci_read_config(dev, reg, 4);

sys/dev/powermng/memtemp/memtemp_e5.c

359

if (val & (PCI_E5_IMC_THERMAL_DIMMTEMPSTAT_TEMPHI |

sys/dev/powermng/memtemp/memtemp_e5.c

362

pci_write_config(dev, reg, val, 4);

sys/dev/powermng/memtemp/memtemp_e5.c

364

temp = __SHIFTOUT(val, PCI_E5_IMC_THERMAL_DIMMTEMPSTAT_TEMP);

sys/dev/powermng/powernow/powernow.c

231

uint32_t val;

sys/dev/powermng/powernow/powernow.c

261

val = cvid - (1 << cstate->mvs);

sys/dev/powermng/powernow/powernow.c

262

WRITE_FIDVID(cfid, (val > 0) ? val : 0, 1ULL);

sys/dev/powermng/powernow/powernow.c

287

val = cfid + 2;

sys/dev/powermng/powernow/powernow.c

289

val = FID_TO_VCO_FID(cfid) + 2;

sys/dev/powermng/powernow/powernow.c

291

val = cfid - 2;

sys/dev/powermng/powernow/powernow.c

292

WRITE_FIDVID(val, cvid, (uint64_t) cstate->pll * 1000 / 5);

sys/dev/powermng/uguru/uguru.c

1005

sc->cs.reading = val;

sys/dev/powermng/uguru/uguru.c

1011

idx, reg, val, data[0], data[1], data[2]);

sys/dev/powermng/uguru/uguru.c

1020

uint8_t val = 0x00;

sys/dev/powermng/uguru/uguru.c

1024

if (uguru_ac5_read(sc->sc_iot, sc->sc_ioh, reg, &val, sizeof(val)))

sys/dev/powermng/uguru/uguru.c

1027

sc->cs.reading = val;

sys/dev/powermng/uguru/uguru.c

40

#define UGURU_WRITE(iot, ioh, reg, val) \

sys/dev/powermng/uguru/uguru.c

41

bus_space_write_1((iot), (ioh), (reg), (val))

sys/dev/powermng/uguru/uguru.c

983

uint8_t val = 0x00;

sys/dev/powermng/uguru/uguru.c

993

uguru_read_multi(iot, ioh, &val, sizeof(val)))

sys/dev/powermng/viapm/viapm.c

474

u_char val;

sys/dev/powermng/viapm/viapm.c

476

val = VIAPM_INB(GPIO_VAL);

sys/dev/powermng/viapm/viapm.c

479

val |= VIAPM_SCL;

sys/dev/powermng/viapm/viapm.c

481

val &= ~VIAPM_SCL;

sys/dev/powermng/viapm/viapm.c

483

VIAPM_OUTB(GPIO_VAL, val);

sys/dev/powermng/viapm/viapm.c

492

u_char val;

sys/dev/powermng/viapm/viapm.c

494

val = VIAPM_INB(GPIO_VAL);

sys/dev/powermng/viapm/viapm.c

497

val |= VIAPM_SDA;

sys/dev/powermng/viapm/viapm.c

499

val &= ~VIAPM_SDA;

sys/dev/powermng/viapm/viapm.c

501

VIAPM_OUTB(GPIO_VAL, val);

sys/dev/powermng/viapm/viapm.c

67

#define VIAPM_OUTB(port,val) \

sys/dev/powermng/viapm/viapm.c

68

(bus_space_write_1(viapm->st, viapm->sh, port, (u_char)(val)))

sys/dev/raid/aac/aacvar.h

273

#define AAC_MEM0_SETREG4(sc, reg, val) bus_space_write_4(sc->aac_btag0, \

sys/dev/raid/aac/aacvar.h

274

sc->aac_bhandle0, reg, val)

sys/dev/raid/aac/aacvar.h

277

#define AAC_MEM0_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag0, \

sys/dev/raid/aac/aacvar.h

278

sc->aac_bhandle0, reg, val)

sys/dev/raid/aac/aacvar.h

281

#define AAC_MEM0_SETREG1(sc, reg, val) bus_space_write_1(sc->aac_btag0, \

sys/dev/raid/aac/aacvar.h

282

sc->aac_bhandle0, reg, val)

sys/dev/raid/aac/aacvar.h

286

#define AAC_MEM1_SETREG4(sc, reg, val) bus_space_write_4(sc->aac_btag1, \

sys/dev/raid/aac/aacvar.h

287

sc->aac_bhandle1, reg, val)

sys/dev/raid/aac/aacvar.h

290

#define AAC_MEM1_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag1, \

sys/dev/raid/aac/aacvar.h

291

sc->aac_bhandle1, reg, val)

sys/dev/raid/aac/aacvar.h

294

#define AAC_MEM1_SETREG1(sc, reg, val) bus_space_write_1(sc->aac_btag1, \

sys/dev/raid/aac/aacvar.h

295

sc->aac_bhandle1, reg, val)

sys/dev/raid/amr/amrreg.h

579

#define AMR_QPUT_IDB(sc, val) bus_space_write_4(sc->amr_btag, sc->amr_bhandle, AMR_QIDB, val)

sys/dev/raid/amr/amrreg.h

581

#define AMR_QPUT_ODB(sc, val) bus_space_write_4(sc->amr_btag, sc->amr_bhandle, AMR_QODB, val)

sys/dev/raid/amr/amrreg.h

637

#define AMR_SPUT_ISTAT(sc, val) bus_space_write_1(sc->amr_btag, sc->amr_bhandle, AMR_SINTR, val)

sys/dev/raid/amr/amrreg.h

648

#define AMR_SBYTE_SET(sc, reg, val) bus_space_write_1(sc->amr_btag, sc->amr_bhandle, reg, val)

sys/dev/raid/asr/asr.c

455

asr_set_FromFIFO(Asr_softc_t *sc, u_int32_t val)

sys/dev/raid/asr/asr.c

458

val);

sys/dev/raid/asr/asr.c

462

asr_set_ToFIFO(Asr_softc_t *sc, u_int32_t val)

sys/dev/raid/asr/asr.c

465

val);

sys/dev/raid/asr/asr.c

469

asr_set_intr(Asr_softc_t *sc, u_int32_t val)

sys/dev/raid/asr/asr.c

472

val);

sys/dev/raid/asr/osd_util.h

258

uLONG netSwap4(uLONG val);

sys/dev/raid/ciss/ciss.c

841

int val, i;

sys/dev/raid/ciss/ciss.c

853

val = pci_msix_count(sc->ciss_dev);

sys/dev/raid/ciss/ciss.c

854

if (val < CISS_MSI_COUNT) {

sys/dev/raid/ciss/ciss.c

855

val = pci_msi_count(sc->ciss_dev);

sys/dev/raid/ciss/ciss.c

856

device_printf(sc->ciss_dev, "got %d MSI messages]\n", val);

sys/dev/raid/ciss/ciss.c

857

if (val < CISS_MSI_COUNT)

sys/dev/raid/ciss/ciss.c

860

val = MIN(val, CISS_MSI_COUNT);

sys/dev/raid/ciss/ciss.c

861

if (pci_alloc_msix(sc->ciss_dev, &val) != 0) {

sys/dev/raid/ciss/ciss.c

862

if (pci_alloc_msi(sc->ciss_dev, &val) != 0)

sys/dev/raid/ciss/ciss.c

867

val = 1;

sys/dev/raid/ciss/ciss.c

868

sc->ciss_msi = val;

sys/dev/raid/ciss/ciss.c

870

ciss_printf(sc, "Using %d MSIX interrupt%s\n", val,

sys/dev/raid/ciss/ciss.c

871

(val != 1) ? "s" : "");

sys/dev/raid/ciss/ciss.c

873

for (i = 0; i < val; i++)

sys/dev/raid/ciss/cissreg.h

725

#define CISS_TL_SIMPLE_WRITE(sc, ofs, val) \

sys/dev/raid/ciss/cissreg.h

726

bus_space_write_4(sc->ciss_regs_btag, sc->ciss_regs_bhandle, ofs, val)

sys/dev/raid/hpt27xx/osm.h

141

#define os_writeb(addr, val) *(volatile HPT_U8 *)(addr) = (HPT_U8)(val)

sys/dev/raid/hpt27xx/osm.h

142

#define os_writew(addr, val) *(volatile HPT_U16 *)(addr) = (HPT_U16)(val)

sys/dev/raid/hpt27xx/osm.h

143

#define os_writel(addr, val) *(volatile HPT_U32 *)(addr) = (HPT_U32)(val)

sys/dev/raid/hptiop/hptiop.c

790

_tag = hba->u.mvfrey.outlist[hba->u.mvfrey.outlist_rptr].val;

sys/dev/raid/hptiop/hptiop.h

174

u_int32_t val;

sys/dev/raid/hptmv/mv.c

46

MV_REG_WRITE_BYTE(MV_BUS_ADDR_T base, MV_U32 offset, MV_U8 val)

sys/dev/raid/hptmv/mv.c

48

writeb((void *)((ULONG_PTR)base + offset), val);

sys/dev/raid/hptmv/mv.c

52

MV_REG_WRITE_WORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U16 val)

sys/dev/raid/hptmv/mv.c

54

writew((void *)((ULONG_PTR)base + offset), val);

sys/dev/raid/hptmv/mv.c

58

MV_REG_WRITE_DWORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U32 val)

sys/dev/raid/hptmv/mv.c

60

writel((void *)((ULONG_PTR)base + offset), val);

sys/dev/raid/hptmv/mvOs.h

100

extern void HPTLIBAPI MV_REG_WRITE_DWORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U32 val);

sys/dev/raid/hptmv/mvOs.h

98

extern void HPTLIBAPI MV_REG_WRITE_BYTE(MV_BUS_ADDR_T base, MV_U32 offset, MV_U8 val);

sys/dev/raid/hptmv/mvOs.h

99

extern void HPTLIBAPI MV_REG_WRITE_WORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U16 val);

sys/dev/raid/hptrr/osm.h

110

#define os_writeb(addr, val) *(volatile HPT_U8 *)(addr) = (HPT_U8)(val)

sys/dev/raid/hptrr/osm.h

111

#define os_writew(addr, val) *(volatile HPT_U16 *)(addr) = (HPT_U16)(val)

sys/dev/raid/hptrr/osm.h

112

#define os_writel(addr, val) *(volatile HPT_U32 *)(addr) = (HPT_U32)(val)

sys/dev/raid/ida/idavar.h

43

#define ida_outb(ida, port, val) \

sys/dev/raid/ida/idavar.h

44

bus_space_write_1((ida)->tag, (ida)->bsh, port, val)

sys/dev/raid/ida/idavar.h

45

#define ida_outw(ida, port, val) \

sys/dev/raid/ida/idavar.h

46

bus_space_write_2((ida)->tag, (ida)->bsh, port, val)

sys/dev/raid/ida/idavar.h

47

#define ida_outl(ida, port, val) \

sys/dev/raid/ida/idavar.h

48

bus_space_write_4((ida)->tag, (ida)->bsh, port, val)

sys/dev/raid/mfi/mfi_tbolt.c

644

union desc_value val;

sys/dev/raid/mfi/mfi_tbolt.c

660

val.word = ((union mfi_mpi2_reply_descriptor *)desc)->words;

sys/dev/raid/mfi/mfi_tbolt.c

663

while ((val.u.low != 0xFFFFFFFF) && (val.u.high != 0xFFFFFFFF)) {

sys/dev/raid/mfi/mfi_tbolt.c

753

val.word = ((union mfi_mpi2_reply_descriptor*)desc)->words;

sys/dev/raid/mfi/mfivar.h

172

volatile unsigned int val;

sys/dev/raid/mfi/mfivar.h

175

#define atomic_read(v) ((v)->val)

sys/dev/raid/mfi/mfivar.h

176

#define atomic_set(v,i) ((v)->val - (i))

sys/dev/raid/mfi/mfivar.h

572

#define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \

sys/dev/raid/mfi/mfivar.h

573

sc->mfi_bhandle, (reg), (val))

sys/dev/raid/mfi/mfivar.h

576

#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \

sys/dev/raid/mfi/mfivar.h

577

sc->mfi_bhandle, (reg), (val))

sys/dev/raid/mfi/mfivar.h

580

#define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \

sys/dev/raid/mfi/mfivar.h

581

sc->mfi_bhandle, (reg), (val))

sys/dev/raid/mlx/mlxreg.h

118

#define MLX_V4_PUT_MAILBOX(sc, idx, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_MAILBOX + idx, val)

sys/dev/raid/mlx/mlxreg.h

122

#define MLX_V4_PUT_IDBR(sc, val) bus_space_write_4(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_IDBR, val)

sys/dev/raid/mlx/mlxreg.h

124

#define MLX_V4_PUT_ODBR(sc, val) bus_space_write_4(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_ODBR, val)

sys/dev/raid/mlx/mlxreg.h

125

#define MLX_V4_PUT_IER(sc, val) bus_space_write_4(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_IER, val)

sys/dev/raid/mlx/mlxreg.h

127

#define MLX_V4_PUT_FWERROR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V4_FWERROR, val)

sys/dev/raid/mlx/mlxreg.h

163

#define MLX_V5_PUT_MAILBOX(sc, idx, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V5_MAILBOX + idx, val)

sys/dev/raid/mlx/mlxreg.h

167

#define MLX_V5_PUT_IDBR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V5_IDBR, val)

sys/dev/raid/mlx/mlxreg.h

169

#define MLX_V5_PUT_ODBR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V5_ODBR, val)

sys/dev/raid/mlx/mlxreg.h

170

#define MLX_V5_PUT_IER(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V5_IER, val)

sys/dev/raid/mlx/mlxreg.h

172

#define MLX_V5_PUT_FWERROR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V5_FWERROR, val)

sys/dev/raid/mlx/mlxreg.h

81

#define MLX_V3_PUT_MAILBOX(sc, idx, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_MAILBOX + idx, val)

sys/dev/raid/mlx/mlxreg.h

85

#define MLX_V3_PUT_IDBR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_IDBR, val)

sys/dev/raid/mlx/mlxreg.h

87

#define MLX_V3_PUT_ODBR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_ODBR, val)

sys/dev/raid/mlx/mlxreg.h

88

#define MLX_V3_PUT_IER(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_IER, val)

sys/dev/raid/mlx/mlxreg.h

90

#define MLX_V3_PUT_FWERROR(sc, val) bus_space_write_1(sc->mlx_btag, sc->mlx_bhandle, MLX_V3_FWERROR, val)

sys/dev/raid/mly/mlyvar.h

239

#define MLY_SET_REG(sc, reg, val) bus_space_write_1(sc->mly_btag, sc->mly_bhandle, reg, val)

sys/dev/raid/mpr/mprvar.h

503

mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)

sys/dev/raid/mpr/mprvar.h

505

bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);

sys/dev/raid/mps/mpsvar.h

471

mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)

sys/dev/raid/mps/mpsvar.h

473

bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);

sys/dev/raid/mrsas/mrsas.c

2106

u_int32_t val, fw_state;

sys/dev/raid/mrsas/mrsas.c

2110

val = mrsas_read_reg(sc, offsetof(mrsas_reg_set, outbound_scratch_pad));

sys/dev/raid/mrsas/mrsas.c

2111

fw_state = val & MFI_STATE_MASK;

sys/dev/raid/mrsas/mrsas.h

524

volatile unsigned int val;

sys/dev/raid/mrsas/mrsas.h

527

#define atomic_read(v) atomic_load_acq_int(&(v)->val)

sys/dev/raid/mrsas/mrsas.h

528

#define atomic_set(v,i) atomic_store_rel_int(&(v)->val, i)

sys/dev/raid/mrsas/mrsas.h

529

#define atomic_dec(v) atomic_fetchadd_int(&(v)->val, -1)

sys/dev/raid/mrsas/mrsas.h

530

#define atomic_inc(v) atomic_fetchadd_int(&(v)->val, 1)

sys/dev/raid/mrsas/mrsas_fp.c

1237

u_int8_t val = cdb[1] & 0xE0;

sys/dev/raid/mrsas/mrsas_fp.c

1240

cdb[1] = val | ((u_int8_t)(start_blk >> 16) & 0x1f);

sys/dev/raid/twe/twe_compat.h

59

#define TWE_CONTROL(sc, val) bus_write_4((sc)->twe_io, 0x0, (u_int32_t)val)

sys/dev/raid/twe/twe_compat.h

61

#define TWE_COMMAND_QUEUE(sc, val) bus_write_4((sc)->twe_io, 0x8, (u_int32_t)val)

sys/dev/raid/tws/tws_hdm.c

357

u_int64_t out_mfa=0, val=0;

sys/dev/raid/tws/tws_hdm.c

368

val = tws_read_reg(sc, TWS_I2O0_HOBQPL, 4);

sys/dev/raid/tws/tws_hdm.c

369

out_mfa = out_mfa | val;

sys/dev/raid/tws/tws_services.c

145

tws_swap16(u_int16_t val)

sys/dev/raid/tws/tws_services.c

147

return((val << 8) | (val >> 8));

sys/dev/raid/tws/tws_services.c

151

tws_swap32(u_int32_t val)

sys/dev/raid/tws/tws_services.c

153

return(((val << 24) | ((val << 8) & (0xFF0000)) |

sys/dev/raid/tws/tws_services.c

154

((val >> 8) & (0xFF00)) | (val >> 24)));

sys/dev/raid/tws/tws_services.c

159

tws_swap64(u_int64_t val)

sys/dev/raid/tws/tws_services.c

161

return((((u_int64_t)(tws_swap32(((u_int32_t *)(&(val)))[1]))) << 32) |

sys/dev/raid/tws/tws_services.c

162

((u_int32_t)(tws_swap32(((u_int32_t *)(&(val)))[0]))));

sys/dev/raid/tws/tws_services.h

48

u_int16_t tws_swap16(u_int16_t val);

sys/dev/raid/tws/tws_services.h

49

u_int32_t tws_swap32(u_int32_t val);

sys/dev/raid/tws/tws_services.h

50

u_int64_t tws_swap64(u_int64_t val);

sys/dev/serial/sio/sio.c

906

u_char val;

sys/dev/serial/sio/sio.c

942

val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */

sys/dev/serial/sio/sio.c

943

val = inb(esp_port + ESP_STATUS2);

sys/dev/serial/sio/sio.c

944

if ((val & 0x70) < 0x20) {

sys/dev/serial/sio/sio.c

945

kprintf("-old (%o)", val & 0x70);

sys/dev/smbus/atmel_mxt/atmel_mxt.c

1163

mxt_write_reg(atmel_mxt_softc_t *sc, uint16_t reg, uint8_t val)

sys/dev/smbus/atmel_mxt/atmel_mxt.c

1165

return mxt_write_reg_buf(sc, reg, &val, 1);

sys/dev/smbus/atmel_mxt/atmel_mxt.c

1182

int offset, uint8_t val)

sys/dev/smbus/atmel_mxt/atmel_mxt.c

1187

return mxt_write_reg(sc, reg, val);

sys/dev/smbus/atmel_mxt/atmel_mxt.c

298

static int mxt_write_reg(atmel_mxt_softc_t *sc, uint16_t reg, uint8_t val);

sys/dev/smbus/atmel_mxt/atmel_mxt.c

302

int offset, uint8_t val);

sys/dev/smbus/atmel_mxt/test_atmel.c

108

mxt_write_reg(int fd, uint16_t reg, uint8_t val)

sys/dev/smbus/atmel_mxt/test_atmel.c

110

return mxt_write_reg_buf(fd, reg, &val, 1);

sys/dev/sound/clone.c

140

int err, val;

sys/dev/sound/clone.c

142

val = snd_timestamp_precision;

sys/dev/sound/clone.c

143

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/clone.c

145

switch (val) {

sys/dev/sound/clone.c

150

snd_timestamp_precision = val;

sys/dev/sound/midi/midi.c

1386

midisynth_controller(void *n, uint8_t chn, uint8_t ctrlnum, uint16_t val)

sys/dev/sound/midi/midi.c

1395

c[2] = val;

sys/dev/sound/midi/midi.c

1400

midisynth_bender(void *n, uint8_t chn, uint16_t val)

sys/dev/sound/midi/midi.c

1405

if (val > 16383 || chn > 15)

sys/dev/sound/midi/midi.c

1409

c[1] = (u_char)val & 0x7f;

sys/dev/sound/midi/midi.c

1410

c[2] = (u_char)(val >> 7) & 0x7f;

sys/dev/sound/pci/atiixp.c

966

int err, val;

sys/dev/sound/pci/atiixp.c

973

val = sc->polling;

sys/dev/sound/pci/atiixp.c

975

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/atiixp.c

979

if (val < 0 || val > 1)

sys/dev/sound/pci/atiixp.c

983

if (val != sc->polling) {

sys/dev/sound/pci/atiixp.c

986

else if (val == 0) {

sys/dev/sound/pci/cmi.c

182

int reg, int shift, u_int32_t mask, u_int32_t val)

sys/dev/sound/pci/cmi.c

188

r |= val << shift;

sys/dev/sound/pci/cmi.c

604

cmimix_wr(struct sc_info *sc, u_int8_t port, u_int8_t val)

sys/dev/sound/pci/cmi.c

607

cmi_wr(sc, CMPCI_REG_SBDATA, val, 1);

sys/dev/sound/pci/emu10k1.c

1048

u_int32_t val, sz;

sys/dev/sound/pci/emu10k1.c

1085

val = EMU_A_ADCCR_LCHANENABLE;

sys/dev/sound/pci/emu10k1.c

1087

val |= EMU_A_ADCCR_RCHANENABLE;

sys/dev/sound/pci/emu10k1.c

1088

val |= audigy_recval(ch->spd);

sys/dev/sound/pci/emu10k1.c

1090

val = EMU_ADCCR_LCHANENABLE;

sys/dev/sound/pci/emu10k1.c

1092

val |= EMU_ADCCR_RCHANENABLE;

sys/dev/sound/pci/emu10k1.c

1093

val |= emu_recval(ch->spd);

sys/dev/sound/pci/emu10k1.c

1097

emu_wrptr(sc, 0, ch->setupreg, val);

sys/dev/sound/pci/emu10k1.c

1099

val = emu_rd(sc, EMU_INTE, 4);

sys/dev/sound/pci/emu10k1.c

1100

val |= ch->irqmask;

sys/dev/sound/pci/emu10k1.c

1101

emu_wr(sc, EMU_INTE, val, 4);

sys/dev/sound/pci/emu10k1.c

1110

val = emu_rd(sc, EMU_INTE, 4);

sys/dev/sound/pci/emu10k1.c

1111

val &= ~ch->irqmask;

sys/dev/sound/pci/emu10k1.c

1112

emu_wr(sc, EMU_INTE, val, 4);

sys/dev/sound/pci/emu10k1.c

333

u_int32_t ptr, val, mask, size, offset;

sys/dev/sound/pci/emu10k1.c

337

val = emu_rd(sc, EMU_DATA, 4);

sys/dev/sound/pci/emu10k1.c

342

val &= mask;

sys/dev/sound/pci/emu10k1.c

343

val >>= offset;

sys/dev/sound/pci/emu10k1.c

345

return val;

sys/dev/sound/pci/emu10k1.c

470

int val;

sys/dev/sound/pci/emu10k1.c

472

val = 0;

sys/dev/sound/pci/emu10k1.c

473

while (val < 7 && speed < adcspeed[val])

sys/dev/sound/pci/emu10k1.c

474

val++;

sys/dev/sound/pci/emu10k1.c

475

return val;

sys/dev/sound/pci/emu10k1.c

480

int val;

sys/dev/sound/pci/emu10k1.c

482

val = 0;

sys/dev/sound/pci/emu10k1.c

483

while (val < 8 && speed < audigy_adcspeed[val])

sys/dev/sound/pci/emu10k1.c

484

val++;

sys/dev/sound/pci/emu10k1.c

485

return val;

sys/dev/sound/pci/emu10k1.c

643

u_int32_t sa, ea, start, val, silent_page;

sys/dev/sound/pci/emu10k1.c

657

val = v->stereo ? 28 : 30;

sys/dev/sound/pci/emu10k1.c

658

val *= v->b16 ? 1 : 2;

sys/dev/sound/pci/emu10k1.c

659

start = sa + val;

sys/dev/sound/pci/emu10kx-pcm.c

686

int val;

sys/dev/sound/pci/emu10kx-pcm.c

688

val = 0;

sys/dev/sound/pci/emu10kx-pcm.c

689

while ((val < 7) && (speed < emu10k1_adcspeed[val]))

sys/dev/sound/pci/emu10kx-pcm.c

690

val++;

sys/dev/sound/pci/emu10kx-pcm.c

691

return (val);

sys/dev/sound/pci/emu10kx-pcm.c

697

int val;

sys/dev/sound/pci/emu10kx-pcm.c

699

val = 0;

sys/dev/sound/pci/emu10kx-pcm.c

700

while ((val < 8) && (speed < emu10k2_adcspeed[val]))

sys/dev/sound/pci/emu10kx-pcm.c

701

val++;

sys/dev/sound/pci/emu10kx-pcm.c

702

return (val);

sys/dev/sound/pci/emu10kx-pcm.c

947

uint32_t val, sz;

sys/dev/sound/pci/emu10kx-pcm.c

977

val = sc->is_emu10k1 ? EMU_ADCCR_LCHANENABLE : EMU_A_ADCCR_LCHANENABLE;

sys/dev/sound/pci/emu10kx-pcm.c

979

val |= sc->is_emu10k1 ? EMU_ADCCR_RCHANENABLE : EMU_A_ADCCR_RCHANENABLE;

sys/dev/sound/pci/emu10kx-pcm.c

980

val |= sc->is_emu10k1 ? emu_k1_recval(ch->spd) : emu_k2_recval(ch->spd);

sys/dev/sound/pci/emu10kx-pcm.c

982

emu_wrptr(sc->card, 0, ch->setupreg, val);

sys/dev/sound/pci/emu10kx.c

1382

uint32_t start, val, silent_page;

sys/dev/sound/pci/emu10kx.c

1395

val = v->stereo ? 28 : 30;

sys/dev/sound/pci/emu10kx.c

1396

val *= v->b16 ? 1 : 2;

sys/dev/sound/pci/emu10kx.c

1397

start = v->sa + val;

sys/dev/sound/pci/emu10kx.c

2619

emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)

sys/dev/sound/pci/emu10kx.c

2630

emu_wrptr(sc, 0, GPR(gpr), val);

sys/dev/sound/pci/emu10kx.c

395

static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val);

sys/dev/sound/pci/emu10kx.c

652

uint32_t ptr, val, mask, size, offset;

sys/dev/sound/pci/emu10kx.c

658

val = emu_rd_nolock(sc, EMU_DATA, 4);

sys/dev/sound/pci/emu10kx.c

670

val &= mask;

sys/dev/sound/pci/emu10kx.c

671

val >>= offset;

sys/dev/sound/pci/emu10kx.c

673

return (val);

sys/dev/sound/pci/emu10kx.c

709

uint32_t val;

sys/dev/sound/pci/emu10kx.c

714

val = emu_rd_nolock(sc, EMU_DATA2, 4);

sys/dev/sound/pci/emu10kx.c

718

return (val);

sys/dev/sound/pci/emu10kx.c

736

uint32_t val;

sys/dev/sound/pci/emu10kx.c

744

val = emu_rd_nolock(sc, 0x38, 4);

sys/dev/sound/pci/emu10kx.c

746

val = emu_rd_nolock(sc, 0x38, 4);

sys/dev/sound/pci/envy24.c

1703

u_int32_t val, prev;

sys/dev/sound/pci/envy24.c

1710

for (i = 0; (val = envy24_speed[i]) != 0; i++) {

sys/dev/sound/pci/envy24.c

1711

if (abs(val - speed) < abs(prev - speed))

sys/dev/sound/pci/envy24.c

1712

prev = val;

sys/dev/sound/pci/envy24.c

882

i2c_wr(void *codec, void (*ctrl)(void*, unsigned int, unsigned int), u_int32_t dev, int reg, u_int8_t val)

sys/dev/sound/pci/envy24.c

900

i2c_wrbit(ptr, ctrl, val & mask);

sys/dev/sound/pci/envy24ht.c

1614

u_int32_t val, prev;

sys/dev/sound/pci/envy24ht.c

1621

for (i = 0; (val = envy24ht_speed[i]) != 0; i++) {

sys/dev/sound/pci/envy24ht.c

1622

if (abs(val - speed) < abs(prev - speed))

sys/dev/sound/pci/envy24ht.c

1623

prev = val;

sys/dev/sound/pci/es137x.c

1437

uint32_t val;

sys/dev/sound/pci/es137x.c

1443

val = pci_read_config(dev, PCIR_LATTIMER, 1);

sys/dev/sound/pci/es137x.c

1445

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/es137x.c

1449

if (val > 255)

sys/dev/sound/pci/es137x.c

1453

pci_write_config(dev, PCIR_LATTIMER, val, 1);

sys/dev/sound/pci/es137x.c

1464

uint32_t val;

sys/dev/sound/pci/es137x.c

1470

val = ES_FIXED_RATE(es->escfg);

sys/dev/sound/pci/es137x.c

1471

if (val < es_caps.minspeed)

sys/dev/sound/pci/es137x.c

1472

val = 0;

sys/dev/sound/pci/es137x.c

1474

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/es137x.c

1478

if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed))

sys/dev/sound/pci/es137x.c

1486

if (val) {

sys/dev/sound/pci/es137x.c

1487

if (val != ES_FIXED_RATE(es->escfg)) {

sys/dev/sound/pci/es137x.c

1488

es->escfg = ES_SET_FIXED_RATE(es->escfg, val);

sys/dev/sound/pci/es137x.c

1489

es->ch[ES_DAC2].caps.maxspeed = val;

sys/dev/sound/pci/es137x.c

1490

es->ch[ES_DAC2].caps.minspeed = val;

sys/dev/sound/pci/es137x.c

1491

es->ch[ES_ADC].caps.maxspeed = val;

sys/dev/sound/pci/es137x.c

1492

es->ch[ES_ADC].caps.minspeed = val;

sys/dev/sound/pci/es137x.c

1494

es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV;

sys/dev/sound/pci/es137x.c

1514

uint32_t val, set;

sys/dev/sound/pci/es137x.c

1527

val = set;

sys/dev/sound/pci/es137x.c

1529

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/es137x.c

1533

if (!(val == 0 || val == 1))

sys/dev/sound/pci/es137x.c

1535

if (val == set)

sys/dev/sound/pci/es137x.c

1560

if (val)

sys/dev/sound/pci/es137x.c

1565

if (!val) {

sys/dev/sound/pci/es137x.c

1597

int err, val;

sys/dev/sound/pci/es137x.c

1604

val = es->polling;

sys/dev/sound/pci/es137x.c

1606

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/es137x.c

1610

if (val < 0 || val > 1)

sys/dev/sound/pci/es137x.c

1614

if (val != es->polling) {

sys/dev/sound/pci/es137x.c

1617

else if (val == 0)

sys/dev/sound/pci/hda/hdaa.c

2646

uint32_t val;

sys/dev/sound/pci/hda/hdaa.c

2648

val = w->param.eapdbtl;

sys/dev/sound/pci/hda/hdaa.c

2650

val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;

sys/dev/sound/pci/hda/hdaa.c

2652

HDA_CMD_SET_EAPD_BTL_ENABLE(0, w->nid, val));

sys/dev/sound/pci/hda/hdaa.c

385

uint32_t val;

sys/dev/sound/pci/hda/hdaa.c

410

val = connected ? 0 : 1;

sys/dev/sound/pci/hda/hdaa.c

411

if (val != ctl->forcemute) {

sys/dev/sound/pci/hda/hdaa.c

412

ctl->forcemute = val;

sys/dev/sound/pci/hda/hdaa.c

420

val = w->wclass.pin.ctrl |

sys/dev/sound/pci/hda/hdaa.c

423

val = w->wclass.pin.ctrl &

sys/dev/sound/pci/hda/hdaa.c

425

if (val != w->wclass.pin.ctrl) {

sys/dev/sound/pci/hda/hdaa.c

426

w->wclass.pin.ctrl = val;

sys/dev/sound/pci/hda/hdaa.c

462

val = connected ? 1 : 0;

sys/dev/sound/pci/hda/hdaa.c

463

if (val == ctl->forcemute)

sys/dev/sound/pci/hda/hdaa.c

465

ctl->forcemute = val;

sys/dev/sound/pci/hda/hdaa.c

474

val = w1->wclass.pin.ctrl &

sys/dev/sound/pci/hda/hdaa.c

477

val = w1->wclass.pin.ctrl |

sys/dev/sound/pci/hda/hdaa.c

479

if (val != w1->wclass.pin.ctrl) {

sys/dev/sound/pci/hda/hdaa.c

480

w1->wclass.pin.ctrl = val;

sys/dev/sound/pci/hda/hdaa.c

5258

uint32_t val;

sys/dev/sound/pci/hda/hdaa.c

5260

val = w->param.eapdbtl;

sys/dev/sound/pci/hda/hdaa.c

5263

val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;

sys/dev/sound/pci/hda/hdaa.c

5266

val));

sys/dev/sound/pci/hda/hdaa.c

6478

int error, val;

sys/dev/sound/pci/hda/hdaa.c

6484

val = 0;

sys/dev/sound/pci/hda/hdaa.c

6485

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/hda/hdaa.c

6486

if (error != 0 || req->newptr == NULL || val == 0)

sys/dev/sound/pci/hda/hdaa.c

6939

int error, val, i;

sys/dev/sound/pci/hda/hdaa.c

6943

val = (ch->bit32 == 4) ? 32 : ((ch->bit32 == 3) ? 24 :

sys/dev/sound/pci/hda/hdaa.c

6945

error = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/hda/hdaa.c

6949

if (val == 32 && HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(pcmcap))

sys/dev/sound/pci/hda/hdaa.c

6951

else if (val == 24 && HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(pcmcap))

sys/dev/sound/pci/hda/hdaa.c

6953

else if (val == 20 && HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(pcmcap))

sys/dev/sound/pci/hda/hdaa.h

253

#define VAL2QDB(ctl, val) \

sys/dev/sound/pci/hda/hdaa.h

254

(((ctl)->size + 1) * ((int)(val) - (ctl)->offset))

sys/dev/sound/pci/hda/hdaa_patches.c

519

uint32_t val;

sys/dev/sound/pci/hda/hdaa_patches.c

675

val = hda_read_coef_idx(devinfo->dev, 0x20, 0x46);

sys/dev/sound/pci/hda/hdaa_patches.c

676

hda_write_coef_idx(devinfo->dev, 0x20, 0x46, val|0x3000);

sys/dev/sound/pci/hda/hdaa_patches.c

743

uint32_t id, subid, val;

sys/dev/sound/pci/hda/hdaa_patches.c

781

val = hda_command(dev, HDA_CMD_GET_PROCESSING_COEFF(0, 0x20));

sys/dev/sound/pci/hda/hdaa_patches.c

783

hda_command(dev, HDA_CMD_SET_PROCESSING_COEFF(0, 0x20, val|0x80));

sys/dev/sound/pci/hda/hdaa_patches.c

797

uint32_t val;

sys/dev/sound/pci/hda/hdaa_patches.c

800

val = hda_command(dev, HDA_CMD_GET_PROCESSING_COEFF(0, nid));

sys/dev/sound/pci/hda/hdaa_patches.c

801

return val;

sys/dev/sound/pci/hda/hdac.c

1391

int devcount, i, err, val;

sys/dev/sound/pci/hda/hdac.c

1397

val = 0;

sys/dev/sound/pci/hda/hdac.c

1398

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/hda/hdac.c

1399

if (err != 0 || req->newptr == NULL || val == 0)

sys/dev/sound/pci/hda/hdac.c

1403

if (val == 100) {

sys/dev/sound/pci/hda/hdac.c

1406

} else if (val == 101) {

sys/dev/sound/pci/hda/hdac.c

1500

int err, val;

sys/dev/sound/pci/hda/hdac.c

1507

val = sc->polling;

sys/dev/sound/pci/hda/hdac.c

1509

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/hda/hdac.c

1513

if (val < 0 || val > 1)

sys/dev/sound/pci/hda/hdac.c

1517

if (val != sc->polling) {

sys/dev/sound/pci/hda/hdac.c

1518

if (val == 0) {

sys/dev/sound/pci/solo.c

120

static void ess_wr(struct ess_info *sc, int reg, u_int8_t val);

sys/dev/sound/pci/solo.c

122

static int ess_cmd(struct ess_info *sc, u_char val);

sys/dev/sound/pci/solo.c

123

static int ess_cmd1(struct ess_info *sc, u_char cmd, int val);

sys/dev/sound/pci/solo.c

129

static int ess_write(struct ess_info *sc, u_char reg, int val);

sys/dev/sound/pci/solo.c

197

ess_wr(struct ess_info *sc, int reg, u_int8_t val)

sys/dev/sound/pci/solo.c

199

port_wr(sc->sb, reg, val, 1);

sys/dev/sound/pci/solo.c

209

ess_dspwr(struct ess_info *sc, u_char val)

sys/dev/sound/pci/solo.c

215

ess_wr(sc, SBDSP_CMD, val);

sys/dev/sound/pci/solo.c

220

kprintf("ess_dspwr(0x%02x) timed out.\n", val);

sys/dev/sound/pci/solo.c

225

ess_cmd(struct ess_info *sc, u_char val)

sys/dev/sound/pci/solo.c

227

DEB(kprintf("ess_cmd: %x\n", val));

sys/dev/sound/pci/solo.c

228

return ess_dspwr(sc, val);

sys/dev/sound/pci/solo.c

232

ess_cmd1(struct ess_info *sc, u_char cmd, int val)

sys/dev/sound/pci/solo.c

234

DEB(kprintf("ess_cmd1: %x, %x\n", cmd, val));

sys/dev/sound/pci/solo.c

236

return ess_dspwr(sc, val & 0xff);

sys/dev/sound/pci/solo.c

253

int val;

sys/dev/sound/pci/solo.c

257

val = ess_rd(sc, SB_MIX_DATA);

sys/dev/sound/pci/solo.c

260

return val;

sys/dev/sound/pci/solo.c

278

ess_write(struct ess_info *sc, u_char reg, int val)

sys/dev/sound/pci/solo.c

280

return ess_cmd1(sc, reg, val);

sys/dev/sound/pci/spicds.c

113

spicds_wrbit(codec, val & mask);

sys/dev/sound/pci/spicds.c

123

spicds_wrbit(codec, val & mask);

sys/dev/sound/pci/spicds.c

76

spicds_wrcd(struct spicds_info *codec, int reg, u_int16_t val)

sys/dev/sound/pci/spicds.c

81

device_printf(codec->dev, "spicds_wrcd(codec, 0x%02x, 0x%02x)\n", reg, val);

sys/dev/sound/pci/via8233.c

194

int err, val;

sys/dev/sound/pci/via8233.c

199

val = via->dxs_src;

sys/dev/sound/pci/via8233.c

201

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/via8233.c

205

if (val < 0 || val > 1)

sys/dev/sound/pci/via8233.c

209

via->dxs_src = val;

sys/dev/sound/pci/via8233.c

220

int err, val;

sys/dev/sound/pci/via8233.c

227

val = via->polling;

sys/dev/sound/pci/via8233.c

229

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pci/via8233.c

233

if (val < 0 || val > 1)

sys/dev/sound/pci/via8233.c

237

if (val != via->polling) {

sys/dev/sound/pci/via8233.c

240

else if (val == 0)

sys/dev/sound/pci/via8233.c

340

via_write_codec(kobj_t obj, void *addr, int reg, uint32_t val)

sys/dev/sound/pci/via8233.c

349

VIA_AC97_DATA(val), 4);

sys/dev/sound/pci/via82c686.c

180

via_write_codec(kobj_t obj, void *addr, int reg, u_int32_t val)

sys/dev/sound/pci/via82c686.c

186

via_wr(via, VIA_CODEC_CTL, VIA_CODEC_PRIVALID | VIA_CODEC_INDEX(reg) | val, 4);

sys/dev/sound/pci/vibes.c

127

_sv_direct_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)

sys/dev/sound/pci/vibes.c

130

bus_space_write_1(sc->enh_st, sc->enh_sh, reg, val);

sys/dev/sound/pci/vibes.c

133

if (n != val) {

sys/dev/sound/pci/vibes.c

134

device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line);

sys/dev/sound/pci/vibes.c

151

_sv_indirect_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)

sys/dev/sound/pci/vibes.c

157

bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_DATA, val);

sys/dev/sound/pci/vibes.c

163

if (n != val) {

sys/dev/sound/pci/vibes.c

164

device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line);

sys/dev/sound/pcm/ac97.c

330

ac97_wrcd(struct ac97_info *codec, int reg, u_int16_t val)

sys/dev/sound/pcm/ac97.c

332

AC97_WRITE(codec->methods, codec->devinfo, reg, val);

sys/dev/sound/pcm/ac97.c

426

int val = e->recidx - 1;

sys/dev/sound/pcm/ac97.c

427

val |= val << 8;

sys/dev/sound/pcm/ac97.c

429

ac97_wrcd(codec, AC97_REG_RECSEL, val);

sys/dev/sound/pcm/ac97.c

442

int mask, max, val, reg;

sys/dev/sound/pcm/ac97.c

465

val = (left << 8) | right;

sys/dev/sound/pcm/ac97.c

480

val &= max;

sys/dev/sound/pcm/ac97.c

481

val <<= e->ofs;

sys/dev/sound/pcm/ac97.c

493

val = AC97_MUTE;

sys/dev/sound/pcm/ac97.c

502

val |= cur & ~(mask);

sys/dev/sound/pcm/ac97.c

504

ac97_wrcd(codec, reg, val);

sys/dev/sound/pcm/ac97.c

862

ac97_setflags(struct ac97_info *codec, u_int32_t val)

sys/dev/sound/pcm/ac97.c

864

codec->flags = val;

sys/dev/sound/pcm/ac97.c

880

u_int16_t val;

sys/dev/sound/pcm/ac97.c

886

val = ac97_rdcd(codec, AC97_REG_POWER);

sys/dev/sound/pcm/ac97.c

888

ea = (val >> 15) ^ inv;

sys/dev/sound/pcm/ac97.c

894

if (ea != ((val >> 15) ^ inv)) {

sys/dev/sound/pcm/ac97.c

896

ac97_wrcd(codec, AC97_REG_POWER, val ^ 0x8000);

sys/dev/sound/pcm/ac97.c

906

u_int16_t orig, val;

sys/dev/sound/pcm/ac97.c

913

val = ac97_rdcd(codec, AC97_REG_POWER);

sys/dev/sound/pcm/ac97.c

916

if ((val & 0x8000) == (orig & 0x8000))

sys/dev/sound/pcm/ac97.h

107

void ac97_wrcd(struct ac97_info *codec, int reg, u_int16_t val);

sys/dev/sound/pcm/ac97.h

97

void ac97_setflags(struct ac97_info *codec, u_int32_t val);

sys/dev/sound/pcm/channel.c

102

int err, val;

sys/dev/sound/pcm/channel.c

104

val = chn_timeout;

sys/dev/sound/pcm/channel.c

105

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/channel.c

108

if (val < CHN_TIMEOUT_MIN || val > CHN_TIMEOUT_MAX)

sys/dev/sound/pcm/channel.c

111

chn_timeout = val;

sys/dev/sound/pcm/channel.c

1386

chn_setvolume_matrix(struct pcm_channel *c, int vc, int vt, int val)

sys/dev/sound/pcm/channel.c

1394

(val >= SND_VOL_0DB_MIN && val <= SND_VOL_0DB_MAX)),

sys/dev/sound/pcm/channel.c

1396

__func__, c, vc, vt, val));

sys/dev/sound/pcm/channel.c

1399

if (val < 0)

sys/dev/sound/pcm/channel.c

1400

val = 0;

sys/dev/sound/pcm/channel.c

1401

if (val > 100)

sys/dev/sound/pcm/channel.c

1402

val = 100;

sys/dev/sound/pcm/channel.c

1404

c->volume[vc][vt] = val;

sys/dev/sound/pcm/channel.c

1427

return (val);

sys/dev/sound/pcm/channel.c

158

int err, val;

sys/dev/sound/pcm/channel.c

160

val = chn_vol_0db_pcm;

sys/dev/sound/pcm/channel.c

161

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/channel.c

164

if (val < SND_VOL_0DB_MIN || val > SND_VOL_0DB_MAX)

sys/dev/sound/pcm/channel.c

167

chn_vol_0db_pcm = val;

sys/dev/sound/pcm/channel.c

168

chn_vpc_proc(0, val);

sys/dev/sound/pcm/channel.c

179

int err, val;

sys/dev/sound/pcm/channel.c

181

val = 0;

sys/dev/sound/pcm/channel.c

182

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/channel.c

183

if (err != 0 || req->newptr == NULL || val == 0)

sys/dev/sound/pcm/channel.c

56

int err, val;

sys/dev/sound/pcm/channel.c

58

val = chn_latency;

sys/dev/sound/pcm/channel.c

59

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/channel.c

62

if (val < CHN_LATENCY_MIN || val > CHN_LATENCY_MAX)

sys/dev/sound/pcm/channel.c

65

chn_latency = val;

sys/dev/sound/pcm/channel.c

79

int err, val;

sys/dev/sound/pcm/channel.c

81

val = chn_latency_profile;

sys/dev/sound/pcm/channel.c

82

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/channel.c

85

if (val < CHN_LATENCY_PROFILE_MIN || val > CHN_LATENCY_PROFILE_MAX)

sys/dev/sound/pcm/channel.c

88

chn_latency_profile = val;

sys/dev/sound/pcm/channel.h

270

int chn_setvolume_matrix(struct pcm_channel *c, int vc, int vt, int val);

sys/dev/sound/pcm/feeder_eq.c

549

int err, val, oval;

sys/dev/sound/pcm/feeder_eq.c

558

val = 2;

sys/dev/sound/pcm/feeder_eq.c

560

val = 1;

sys/dev/sound/pcm/feeder_eq.c

562

val = 0;

sys/dev/sound/pcm/feeder_eq.c

566

oval = val;

sys/dev/sound/pcm/feeder_eq.c

567

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/feeder_eq.c

569

if (err == 0 && req->newptr != NULL && val != oval) {

sys/dev/sound/pcm/feeder_eq.c

570

if (!(val == 0 || val == 1 || val == 2)) {

sys/dev/sound/pcm/feeder_eq.c

578

if (val == 2) {

sys/dev/sound/pcm/feeder_eq.c

579

val = FEEDEQ_BYPASS;

sys/dev/sound/pcm/feeder_eq.c

581

} else if (val == 1) {

sys/dev/sound/pcm/feeder_eq.c

582

val = FEEDEQ_ENABLE;

sys/dev/sound/pcm/feeder_eq.c

585

val = FEEDEQ_DISABLE;

sys/dev/sound/pcm/feeder_eq.c

591

(void)FEEDER_SET(f, FEEDEQ_STATE, val);

sys/dev/sound/pcm/feeder_eq.c

609

int err, val, oval;

sys/dev/sound/pcm/feeder_eq.c

618

val = d->eqpreamp;

sys/dev/sound/pcm/feeder_eq.c

621

FEEDEQ_PREAMP_SIGNMARK(val), FEEDEQ_PREAMP_IPART(val),

sys/dev/sound/pcm/feeder_eq.c

622

FEEDEQ_PREAMP_FPART(val));

sys/dev/sound/pcm/feeder_eq.c

626

oval = val;

sys/dev/sound/pcm/feeder_eq.c

630

val = feed_eq_scan_preamp_arg(buf);

sys/dev/sound/pcm/feeder_eq.c

631

if (val == FEEDEQ_PREAMP_INVALID) {

sys/dev/sound/pcm/feeder_eq.c

638

if (val != oval) {

sys/dev/sound/pcm/feeder_eq.c

639

if (val < FEEDEQ_PREAMP_MIN)

sys/dev/sound/pcm/feeder_eq.c

640

val = FEEDEQ_PREAMP_MIN;

sys/dev/sound/pcm/feeder_eq.c

641

else if (val > FEEDEQ_PREAMP_MAX)

sys/dev/sound/pcm/feeder_eq.c

642

val = FEEDEQ_PREAMP_MAX;

sys/dev/sound/pcm/feeder_eq.c

644

d->eqpreamp = val;

sys/dev/sound/pcm/feeder_eq.c

650

(void)FEEDER_SET(f, FEEDEQ_PREAMP, val);

sys/dev/sound/pcm/feeder_rate.c

178

int err, val;

sys/dev/sound/pcm/feeder_rate.c

180

val = feeder_rate_min;

sys/dev/sound/pcm/feeder_rate.c

181

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/feeder_rate.c

183

if (err != 0 || req->newptr == NULL || val == feeder_rate_min)

sys/dev/sound/pcm/feeder_rate.c

186

if (!(Z_FACTOR_SAFE(val) && val < feeder_rate_max))

sys/dev/sound/pcm/feeder_rate.c

189

feeder_rate_min = val;

sys/dev/sound/pcm/feeder_rate.c

200

int err, val;

sys/dev/sound/pcm/feeder_rate.c

202

val = feeder_rate_max;

sys/dev/sound/pcm/feeder_rate.c

203

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/feeder_rate.c

205

if (err != 0 || req->newptr == NULL || val == feeder_rate_max)

sys/dev/sound/pcm/feeder_rate.c

208

if (!(Z_FACTOR_SAFE(val) && val > feeder_rate_min))

sys/dev/sound/pcm/feeder_rate.c

211

feeder_rate_max = val;

sys/dev/sound/pcm/feeder_rate.c

222

int err, val;

sys/dev/sound/pcm/feeder_rate.c

224

val = feeder_rate_round;

sys/dev/sound/pcm/feeder_rate.c

225

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/feeder_rate.c

227

if (err != 0 || req->newptr == NULL || val == feeder_rate_round)

sys/dev/sound/pcm/feeder_rate.c

230

if (val < Z_ROUNDHZ_MIN || val > Z_ROUNDHZ_MAX)

sys/dev/sound/pcm/feeder_rate.c

233

feeder_rate_round = val - (val % Z_ROUNDHZ);

sys/dev/sound/pcm/feeder_rate.c

247

int i, err, val;

sys/dev/sound/pcm/feeder_rate.c

249

val = feeder_rate_quality;

sys/dev/sound/pcm/feeder_rate.c

250

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/feeder_rate.c

252

if (err != 0 || req->newptr == NULL || val == feeder_rate_quality)

sys/dev/sound/pcm/feeder_rate.c

255

if (val < Z_QUALITY_MIN || val > Z_QUALITY_MAX)

sys/dev/sound/pcm/feeder_rate.c

258

feeder_rate_quality = val;

sys/dev/sound/pcm/feeder_rate.c

280

(void)FEEDER_SET(f, FEEDRATE_QUALITY, val);

sys/dev/sound/pcm/mixer.c

693

int i, unit, devunit, val;

sys/dev/sound/pcm/mixer.c

700

device_get_unit(dev), "eq", &val) == 0 && val != 0) {

sys/dev/sound/pcm/mixer.c

702

if ((val & SD_F_EQ_MASK) == val)

sys/dev/sound/pcm/mixer.c

703

snddev->flags |= val;

sys/dev/sound/pcm/mixer.c

717

device_get_unit(dev), snd_mixernames[i], &val) == 0) {

sys/dev/sound/pcm/mixer.c

718

if (val >= 0 && val <= 100) {

sys/dev/sound/pcm/mixer.c

719

v = (u_int16_t) val;

sys/dev/sound/pcm/pcm.h

118

#define _PCM_WRITE_S16_LE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

119

*((int16_t *)(b8)) = (val); \

sys/dev/sound/pcm/pcm.h

121

#define _PCM_WRITE_S32_LE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

122

*((int32_t *)(b8)) = (val); \

sys/dev/sound/pcm/pcm.h

125

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

127

b8[1] = val; \

sys/dev/sound/pcm/pcm.h

128

b8[0] = val >> 8; \

sys/dev/sound/pcm/pcm.h

131

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

133

b8[3] = val; \

sys/dev/sound/pcm/pcm.h

134

b8[2] = val >> 8; \

sys/dev/sound/pcm/pcm.h

135

b8[1] = val >> 16; \

sys/dev/sound/pcm/pcm.h

136

b8[0] = val >> 24; \

sys/dev/sound/pcm/pcm.h

149

#define _PCM_WRITE_U16_LE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

150

*((uint16_t *)(b8)) = (val) ^ 0x8000; \

sys/dev/sound/pcm/pcm.h

152

#define _PCM_WRITE_U32_LE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

153

*((uint32_t *)(b8)) = (val) ^ 0x80000000; \

sys/dev/sound/pcm/pcm.h

156

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

158

b8[1] = val; \

sys/dev/sound/pcm/pcm.h

159

b8[0] = (val >> 8) ^ 0x80; \

sys/dev/sound/pcm/pcm.h

162

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

164

b8[3] = val; \

sys/dev/sound/pcm/pcm.h

165

b8[2] = val >> 8; \

sys/dev/sound/pcm/pcm.h

166

b8[1] = val >> 16; \

sys/dev/sound/pcm/pcm.h

167

b8[0] = (val >> 24) ^ 0x80; \

sys/dev/sound/pcm/pcm.h

188

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

190

b8[0] = val; \

sys/dev/sound/pcm/pcm.h

191

b8[1] = val >> 8; \

sys/dev/sound/pcm/pcm.h

194

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

196

b8[0] = val; \

sys/dev/sound/pcm/pcm.h

197

b8[1] = val >> 8; \

sys/dev/sound/pcm/pcm.h

198

b8[2] = val >> 16; \

sys/dev/sound/pcm/pcm.h

199

b8[3] = val >> 24; \

sys/dev/sound/pcm/pcm.h

201

#define _PCM_WRITE_S16_BE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

202

*((int16_t *)(b8)) = (val); \

sys/dev/sound/pcm/pcm.h

204

#define _PCM_WRITE_S32_BE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

205

*((int32_t *)(b8)) = (val); \

sys/dev/sound/pcm/pcm.h

219

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

221

b8[0] = val; \

sys/dev/sound/pcm/pcm.h

222

b8[1] = (val >> 8) ^ 0x80; \

sys/dev/sound/pcm/pcm.h

225

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

227

b8[0] = val; \

sys/dev/sound/pcm/pcm.h

228

b8[1] = val >> 8; \

sys/dev/sound/pcm/pcm.h

229

b8[2] = val >> 16; \

sys/dev/sound/pcm/pcm.h

230

b8[3] = (val >> 24) ^ 0x80; \

sys/dev/sound/pcm/pcm.h

232

#define _PCM_WRITE_U16_BE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

233

*((uint16_t *)(b8)) = (val) ^ 0x8000; \

sys/dev/sound/pcm/pcm.h

235

#define _PCM_WRITE_U32_BE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

236

*((uint32_t *)(b8)) = (val) ^ 0x80000000; \

sys/dev/sound/pcm/pcm.h

255

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

257

b8[0] = val; \

sys/dev/sound/pcm/pcm.h

258

b8[1] = val >> 8; \

sys/dev/sound/pcm/pcm.h

259

b8[2] = val >> 16; \

sys/dev/sound/pcm/pcm.h

262

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

264

b8[2] = val; \

sys/dev/sound/pcm/pcm.h

265

b8[1] = val >> 8; \

sys/dev/sound/pcm/pcm.h

266

b8[0] = val >> 16; \

sys/dev/sound/pcm/pcm.h

277

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

279

b8[0] = val; \

sys/dev/sound/pcm/pcm.h

280

b8[1] = val >> 8; \

sys/dev/sound/pcm/pcm.h

281

b8[2] = (val >> 16) ^ 0x80; \

sys/dev/sound/pcm/pcm.h

284

intpcm_t val = (vval); \

sys/dev/sound/pcm/pcm.h

286

b8[2] = val; \

sys/dev/sound/pcm/pcm.h

287

b8[1] = val >> 8; \

sys/dev/sound/pcm/pcm.h

288

b8[0] = (val >> 16) ^ 0x80; \

sys/dev/sound/pcm/pcm.h

311

#define _PCM_WRITE_S8_NE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

312

*((int8_t *)(b8)) = (val); \

sys/dev/sound/pcm/pcm.h

314

#define _PCM_WRITE_U8_NE(b8, val) do { \

sys/dev/sound/pcm/pcm.h

315

*((uint8_t *)(b8)) = (val) ^ 0x80; \

sys/dev/sound/pcm/pcm.h

326

#define PCM_WRITE_S8_NE(b8, val) _PCM_WRITE_S8_NE(b8, val)

sys/dev/sound/pcm/pcm.h

327

#define PCM_WRITE_U8_NE(b8, val) _PCM_WRITE_U8_NE(b8, val)

sys/dev/sound/pcm/pcm.h

335

#define PCM_WRITE_S16_LE(b8, val) _PCM_WRITE_S16_LE(b8, val)

sys/dev/sound/pcm/pcm.h

336

#define PCM_WRITE_S16_BE(b8, val) _PCM_WRITE_S16_BE(b8, val)

sys/dev/sound/pcm/pcm.h

337

#define PCM_WRITE_U16_LE(b8, val) _PCM_WRITE_U16_LE(b8, val)

sys/dev/sound/pcm/pcm.h

338

#define PCM_WRITE_U16_BE(b8, val) _PCM_WRITE_U16_BE(b8, val)

sys/dev/sound/pcm/pcm.h

351

#define PCM_WRITE_S24_LE(b8, val) _PCM_WRITE_S24_LE(b8, val)

sys/dev/sound/pcm/pcm.h

352

#define PCM_WRITE_S24_BE(b8, val) _PCM_WRITE_S24_BE(b8, val)

sys/dev/sound/pcm/pcm.h

353

#define PCM_WRITE_U24_LE(b8, val) _PCM_WRITE_U24_LE(b8, val)

sys/dev/sound/pcm/pcm.h

354

#define PCM_WRITE_U24_BE(b8, val) _PCM_WRITE_U24_BE(b8, val)

sys/dev/sound/pcm/pcm.h

368

#define PCM_WRITE_S32_LE(b8, val) _PCM_WRITE_S32_LE(b8, val)

sys/dev/sound/pcm/pcm.h

369

#define PCM_WRITE_S32_BE(b8, val) _PCM_WRITE_S32_BE(b8, val)

sys/dev/sound/pcm/pcm.h

370

#define PCM_WRITE_U32_LE(b8, val) _PCM_WRITE_U32_LE(b8, val)

sys/dev/sound/pcm/pcm.h

371

#define PCM_WRITE_U32_BE(b8, val) _PCM_WRITE_U32_BE(b8, val)

sys/dev/sound/pcm/pcm.h

397

#define PCM_WRITE_S32_LE(b8, val) \

sys/dev/sound/pcm/pcm.h

398

_PCM_WRITE_S32_LE(b8, (val) << PCM_FXSHIFT)

sys/dev/sound/pcm/pcm.h

399

#define PCM_WRITE_S32_BE(b8, val) \

sys/dev/sound/pcm/pcm.h

400

_PCM_WRITE_S32_BE(b8, (val) << PCM_FXSHIFT)

sys/dev/sound/pcm/pcm.h

401

#define PCM_WRITE_U32_LE(b8, val) \

sys/dev/sound/pcm/pcm.h

402

_PCM_WRITE_U32_LE(b8, (val) << PCM_FXSHIFT)

sys/dev/sound/pcm/pcm.h

403

#define PCM_WRITE_U32_BE(b8, val) \

sys/dev/sound/pcm/pcm.h

404

_PCM_WRITE_U32_BE(b8, (val) << PCM_FXSHIFT)

sys/dev/sound/pcm/pcm.h

406

#define PCM_WRITE_S32_NE(b8, val) \

sys/dev/sound/pcm/pcm.h

407

_PCM_WRITE_S32_NE(b8, (val) << PCM_FXSHIFT)

sys/dev/sound/pcm/pcm.h

408

#define PCM_WRITE_U32_NE(b8, val) \

sys/dev/sound/pcm/pcm.h

409

_PCM_WRITE_U32_NE(b8, (val) << PCM_FXSHIFT)

sys/dev/sound/pcm/pcm.h

412

#define PCM_CLAMP_S8(val) \

sys/dev/sound/pcm/pcm.h

413

(((val) > PCM_S8_MAX) ? PCM_S8_MAX : \

sys/dev/sound/pcm/pcm.h

414

(((val) < PCM_S8_MIN) ? PCM_S8_MIN : (val)))

sys/dev/sound/pcm/pcm.h

415

#define PCM_CLAMP_S16(val) \

sys/dev/sound/pcm/pcm.h

416

(((val) > PCM_S16_MAX) ? PCM_S16_MAX : \

sys/dev/sound/pcm/pcm.h

417

(((val) < PCM_S16_MIN) ? PCM_S16_MIN : (val)))

sys/dev/sound/pcm/pcm.h

418

#define PCM_CLAMP_S24(val) \

sys/dev/sound/pcm/pcm.h

419

(((val) > PCM_S24_MAX) ? PCM_S24_MAX : \

sys/dev/sound/pcm/pcm.h

420

(((val) < PCM_S24_MIN) ? PCM_S24_MIN : (val)))

sys/dev/sound/pcm/pcm.h

423

#define PCM_CLAMP_S32(val) \

sys/dev/sound/pcm/pcm.h

424

(((val) > PCM_S32_MAX) ? PCM_S32_MAX : \

sys/dev/sound/pcm/pcm.h

425

(((val) < PCM_S32_MIN) ? PCM_S32_MIN : (val)))

sys/dev/sound/pcm/pcm.h

427

#define PCM_CLAMP_S32(val) \

sys/dev/sound/pcm/pcm.h

428

(((val) > PCM_S24_MAX) ? PCM_S32_MAX : \

sys/dev/sound/pcm/pcm.h

429

(((val) < PCM_S24_MIN) ? PCM_S32_MIN : \

sys/dev/sound/pcm/pcm.h

430

((val) << PCM_FXSHIFT)))

sys/dev/sound/pcm/pcm.h

433

#define PCM_CLAMP_U8(val) PCM_CLAMP_S8(val)

sys/dev/sound/pcm/pcm.h

434

#define PCM_CLAMP_U16(val) PCM_CLAMP_S16(val)

sys/dev/sound/pcm/pcm.h

435

#define PCM_CLAMP_U24(val) PCM_CLAMP_S24(val)

sys/dev/sound/pcm/pcm.h

436

#define PCM_CLAMP_U32(val) PCM_CLAMP_S32(val)

sys/dev/sound/pcm/sndstat.c

90

int err, val;

sys/dev/sound/pcm/sndstat.c

96

val = (int)SNDSTAT_PID(sndstat_dev);

sys/dev/sound/pcm/sndstat.c

97

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/sndstat.c

98

if (err == 0 && req->newptr != NULL && val == 0) {

sys/dev/sound/pcm/sound.c

1000

val = snd_clone_gc(d->clones);

sys/dev/sound/pcm/sound.c

1004

val);

sys/dev/sound/pcm/sound.c

822

pcm_setflags(device_t dev, uint32_t val)

sys/dev/sound/pcm/sound.c

826

d->flags = val;

sys/dev/sound/pcm/sound.c

871

int err, val;

sys/dev/sound/pcm/sound.c

879

val = (d->flags & SD_F_BITPERFECT) ? 1 : 0;

sys/dev/sound/pcm/sound.c

883

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/sound.c

886

if (!(val == 0 || val == 1)) {

sys/dev/sound/pcm/sound.c

894

d->flags |= (val != 0) ? SD_F_BITPERFECT : 0;

sys/dev/sound/pcm/sound.c

964

int err, val;

sys/dev/sound/pcm/sound.c

970

val = 0;

sys/dev/sound/pcm/sound.c

971

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/sound.c

973

if (err == 0 && req->newptr != NULL && val != 0) {

sys/dev/sound/pcm/sound.c

975

val = snd_clone_gc(d->clones);

sys/dev/sound/pcm/sound.c

978

device_printf(d->dev, "clone gc: pruned=%d\n", val);

sys/dev/sound/pcm/sound.c

988

int i, err, val;

sys/dev/sound/pcm/sound.c

990

val = 0;

sys/dev/sound/pcm/sound.c

991

err = sysctl_handle_int(oidp, &val, 0, req);

sys/dev/sound/pcm/sound.c

993

if (err == 0 && req->newptr != NULL && val != 0) {

sys/dev/sound/pcm/sound.h

349

void pcm_setflags(device_t dev, u_int32_t val);

sys/dev/video/bktr/bktr_audio.c

367

bctv2_gpio_write( bktr_ptr_t bktr, int port, int val )

sys/dev/video/bktr/bktr_audio.c

375

data = ((val << BCTV2_GPIO_VAL_SHIFT) & BCTV2_GPIO_VAL_MASK) |

sys/dev/video/bktr/bktr_audio.c

73

void bctv2_gpio_write( bktr_ptr_t bktr, int port, int val );

sys/dev/video/bktr/bktr_os.c

202

u_long val;

sys/dev/video/bktr/bktr_os.c

220

val = pci_read_config(dev, PCIR_COMMAND, 4);

sys/dev/video/bktr/bktr_os.c

221

val |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);

sys/dev/video/bktr/bktr_os.c

222

pci_write_config(dev, PCIR_COMMAND, val, 4);

sys/dev/video/bktr/msp34xx.c

1023

val = std;

sys/dev/video/bktr/msp34xx.c

1032

val = msp3400c_read(client, I2C_MSP3400C_DEM, 0x7e);

sys/dev/video/bktr/msp34xx.c

1033

if (val < 0x07ff)

sys/dev/video/bktr/msp34xx.c

1039

if (modelist[i].retval == val)

sys/dev/video/bktr/msp34xx.c

1043

val));

sys/dev/video/bktr/msp34xx.c

1047

if (client->amsound && (msp->norm == VIDEO_MODE_SECAM) && (val != 0x0009)) {

sys/dev/video/bktr/msp34xx.c

1050

modelist[8].name ? modelist[8].name : "unknown",val));

sys/dev/video/bktr/msp34xx.c

1051

val = 0x0009;

sys/dev/video/bktr/msp34xx.c

1052

msp3400c_write(client, I2C_MSP3400C_DEM, 0x20, val);

sys/dev/video/bktr/msp34xx.c

1061

switch (val) {

sys/dev/video/bktr/msp34xx.c

1064

if (val == 0x0008)

sys/dev/video/bktr/msp34xx.c

178

msp3400c_write(bktr_ptr_t client, int dev, int addr, int val)

sys/dev/video/bktr/msp34xx.c

181

msp_dpl_write(client, client->msp_addr, dev, addr, val);

sys/dev/video/bktr/msp34xx.c

335

int vol = 0,val = 0,balance = 0;

sys/dev/video/bktr/msp34xx.c

339

val = (vol * 0x73 / 65535) << 8;

sys/dev/video/bktr/msp34xx.c

346

muted ? "on" : "off", left, right, val>>8, balance));

sys/dev/video/bktr/msp34xx.c

347

msp3400c_write(client,I2C_MSP3400C_DFP, 0x0000, val); /* loudspeaker */

sys/dev/video/bktr/msp34xx.c

348

msp3400c_write(client,I2C_MSP3400C_DFP, 0x0006, val); /* headphones */

sys/dev/video/bktr/msp34xx.c

350

msp3400c_write(client,I2C_MSP3400C_DFP, 0x0007, val ? 0x4000 : 0);

sys/dev/video/bktr/msp34xx.c

356

int val = ((bass-32768) * 0x60 / 65535) << 8;

sys/dev/video/bktr/msp34xx.c

358

dprintk(("msp34xx: setbass: %d 0x%02x\n",bass, val>>8));

sys/dev/video/bktr/msp34xx.c

359

msp3400c_write(client,I2C_MSP3400C_DFP, 0x0002, val); /* loudspeaker */

sys/dev/video/bktr/msp34xx.c

364

int val = ((treble-32768) * 0x60 / 65535) << 8;

sys/dev/video/bktr/msp34xx.c

366

dprintk(("msp34xx: settreble: %d 0x%02x\n",treble, val>>8));

sys/dev/video/bktr/msp34xx.c

367

msp3400c_write(client,I2C_MSP3400C_DFP, 0x0003, val); /* loudspeaker */

sys/dev/video/bktr/msp34xx.c

589

int val;

sys/dev/video/bktr/msp34xx.c

596

val = msp3400c_read(client, I2C_MSP3400C_DFP, 0x18);

sys/dev/video/bktr/msp34xx.c

597

if (val > 32767)

sys/dev/video/bktr/msp34xx.c

598

val -= 65536;

sys/dev/video/bktr/msp34xx.c

599

dprintk(("msp34xx: stereo detect register: %d\n",val));

sys/dev/video/bktr/msp34xx.c

601

if (val > 4096) {

sys/dev/video/bktr/msp34xx.c

603

} else if (val < -4096) {

sys/dev/video/bktr/msp34xx.c

613

val = msp3400c_read(client, I2C_MSP3400C_DEM, 0x23);

sys/dev/video/bktr/msp34xx.c

615

val & 1, (val & 0x1e) >> 1));

sys/dev/video/bktr/msp34xx.c

617

if (val & 1) {

sys/dev/video/bktr/msp34xx.c

619

switch ((val & 0x1e) >> 1) {

sys/dev/video/bktr/msp34xx.c

646

val = msp3400c_read(client, I2C_MSP3400C_DEM, 0x200);

sys/dev/video/bktr/msp34xx.c

648

val,

sys/dev/video/bktr/msp34xx.c

649

(val & 0x0002) ? "no" : "yes",

sys/dev/video/bktr/msp34xx.c

650

(val & 0x0004) ? "no" : "yes",

sys/dev/video/bktr/msp34xx.c

651

(val & 0x0040) ? "stereo" : "mono",

sys/dev/video/bktr/msp34xx.c

652

(val & 0x0080) ? ", nicam 2nd mono" : "",

sys/dev/video/bktr/msp34xx.c

653

(val & 0x0100) ? ", bilingual/SAP" : ""));

sys/dev/video/bktr/msp34xx.c

655

if (val & 0x0040) newstereo |= VIDEO_SOUND_STEREO;

sys/dev/video/bktr/msp34xx.c

656

if (val & 0x0100) newstereo |= VIDEO_SOUND_LANG1;

sys/dev/video/bktr/msp34xx.c

703

int count, max1,max2,val1,val2, val,this;

sys/dev/video/bktr/msp34xx.c

765

val = msp3400c_read(client, I2C_MSP3400C_DFP, 0x1b);

sys/dev/video/bktr/msp34xx.c

766

if (val > 32767)

sys/dev/video/bktr/msp34xx.c

767

val -= 65536;

sys/dev/video/bktr/msp34xx.c

768

if (val1 < val)

sys/dev/video/bktr/msp34xx.c

769

val1 = val, max1 = this;

sys/dev/video/bktr/msp34xx.c

770

dprintk(("msp3400: carrier1 val: %5d / %s\n", val,

sys/dev/video/bktr/msp34xx.c

800

val = msp3400c_read(client, I2C_MSP3400C_DFP, 0x1b);

sys/dev/video/bktr/msp34xx.c

801

if (val > 32767)

sys/dev/video/bktr/msp34xx.c

802

val -= 65536;

sys/dev/video/bktr/msp34xx.c

803

if (val2 < val)

sys/dev/video/bktr/msp34xx.c

804

val2 = val, max2 = this;

sys/dev/video/bktr/msp34xx.c

805

dprintk(("msp3400: carrier2 val: %5d / %s\n", val,

sys/dev/video/bktr/msp34xx.c

939

int mode,val,i,std;

sys/dev/video/cxm/cxm.c

2072

cxm_read_ivar(device_t dev, device_t child, int index, uintptr_t* val)

sys/dev/video/cxm/cxm.c

2081

*(bus_space_handle_t **)val = &sc->bhandle;

sys/dev/video/cxm/cxm.c

2085

*(bus_space_tag_t **)val = &sc->btag;

sys/dev/video/cxm/cxm.c

2089

*(device_t **)val = &sc->iicbus;

sys/dev/video/cxm/cxm.c

2101

cxm_write_ivar(device_t dev, device_t child, int index, uintptr_t val)

sys/dev/video/cxm/cxm.c

2118

sc->iicbus = val ? *(device_t *)val : NULL;

sys/dev/video/cxm/cxm.c

89

int index, uintptr_t* val);

sys/dev/video/cxm/cxm.c

91

int index, uintptr_t val);

sys/dev/video/cxm/cxm.h

292

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/video/cxm/cxm.h

293

bus_space_write_4((sc)->btag, (sc)->bhandle, (reg), (val))

sys/dev/video/cxm/cxm.h

294

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/video/cxm/cxm.h

295

bus_space_write_2((sc)->btag, (sc)->bhandle, (reg), val))

sys/dev/video/cxm/cxm.h

296

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/video/cxm/cxm.h

297

bus_space_write_1((sc)->btag, (sc)->bhandle, (reg), val))

sys/dev/video/cxm/cxm_i2c.c

328

cxm_iic_setscl(device_t dev, int val)

sys/dev/video/cxm/cxm_i2c.c

336

CSR_WRITE_4(sc, CXM_REG_I2C_SETSCL, ~(int)(val ? 1 : 0));

sys/dev/video/cxm/cxm_i2c.c

349

cxm_iic_setsda(device_t dev, int val)

sys/dev/video/cxm/cxm_i2c.c

357

CSR_WRITE_4(sc, CXM_REG_I2C_SETSDA, ~(int)(val ? 1 : 0));

sys/dev/video/fb/bmp/splash_bmp.c

250

bmp_SetPix(BMP_INFO *info, int x, int y, u_char val)

sys/dev/video/fb/bmp/splash_bmp.c

283

outw(GDCIDX, (val << 8) | 0x00); /* set/reset */

sys/dev/video/fb/bmp/splash_bmp.c

295

*(info->vidmem+sofs) = val;

sys/dev/video/fb/bmp/splash_bmp.c

311

u_char val;

sys/dev/video/fb/bmp/splash_bmp.c

351

val = *(info->index + 2 + (count / 2)); /* byte with nybbles */

sys/dev/video/fb/bmp/splash_bmp.c

353

val &= 0xf; /* get low nybble */

sys/dev/video/fb/bmp/splash_bmp.c

355

val = (val >> 4); /* get high nybble */

sys/dev/video/fb/bmp/splash_bmp.c

357

bmp_SetPix(info, x, y, val);

sys/dev/video/fb/bmp/splash_bmp.c

429

u_char val, mask;

sys/dev/video/fb/bmp/splash_bmp.c

444

val = *p & 0xf; /* get low nybble */

sys/dev/video/fb/bmp/splash_bmp.c

447

val = *p >> 4; /* get high nybble */

sys/dev/video/fb/bmp/splash_bmp.c

449

bmp_SetPix(info, x, line, val);

sys/dev/video/fb/bmp/splash_bmp.c

458

val = (*p & mask) ? 1 : 0;

sys/dev/video/fb/bmp/splash_bmp.c

464

bmp_SetPix(info, x, line, val);

sys/dev/video/fb/fbreg.h

69

typedef int vi_fill_rect_t(video_adapter_t *adp, int val, int x, int y,

sys/dev/video/fb/vga.c

1670

u_char val;

sys/dev/video/fb/vga.c

1677

val = inb(TSREG);

sys/dev/video/fb/vga.c

1679

outb(TSREG, val | 0x20);

sys/dev/video/fb/vga.c

1681

val = inb(CRTC + 1);

sys/dev/video/fb/vga.c

1682

outb(CRTC + 1, val & ~0x80);

sys/dev/video/fb/vga.c

1686

val = inb(TSREG);

sys/dev/video/fb/vga.c

1688

outb(TSREG, val | 0x20);

sys/dev/video/fb/vga.c

1692

val = inb(TSREG);

sys/dev/video/fb/vga.c

1694

outb(TSREG, val & 0xDF);

sys/dev/video/fb/vga.c

1696

val = inb(CRTC + 1);

sys/dev/video/fb/vga.c

1697

outb(CRTC + 1, val | 0x80);

sys/dev/video/fb/vga.c

1734

planar_fill(video_adapter_t *adp, int val)

sys/dev/video/fb/vga.c

1745

outw(GDCIDX, (val << 8) | 0x00); /* set/reset */

sys/dev/video/fb/vga.c

1761

packed_fill(video_adapter_t *adp, int val)

sys/dev/video/fb/vga.c

1773

fill_io(val, adp->va_window, l);

sys/dev/video/fb/vga.c

1781

direct_fill(video_adapter_t *adp, int val)

sys/dev/video/fb/vga.c

1795

fillw_io(val, adp->va_window, l/sizeof(u_int16_t));

sys/dev/video/fb/vga.c

1801

filll_io(val, adp->va_window, l/sizeof(u_int32_t));

sys/dev/video/fb/vga.c

1831

vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)

sys/dev/video/fb/vga.c

810

fill(int val, void *d, size_t size)

sys/dev/video/fb/vga.c

815

*p++ = val;

sys/dev/video/fb/vga.c

820

filll_io(int val, vm_offset_t d, size_t size)

sys/dev/video/fb/vga.c

823

writel(d, val);

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1026

static inline void set_ena_admin_aq_common_desc_command_id(struct ena_admin_aq_common_desc *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1028

p->command_id |= val & ENA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1036

static inline void set_ena_admin_aq_common_desc_phase(struct ena_admin_aq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1038

p->flags |= val & ENA_ADMIN_AQ_COMMON_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1046

static inline void set_ena_admin_aq_common_desc_ctrl_data(struct ena_admin_aq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1048

p->flags |= (val << ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_SHIFT) & ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1056

static inline void set_ena_admin_aq_common_desc_ctrl_data_indirect(struct ena_admin_aq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1058

p->flags |= (val << ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_SHIFT) & ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1066

static inline void set_ena_admin_sq_sq_direction(struct ena_admin_sq *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1068

p->sq_identity |= (val << ENA_ADMIN_SQ_SQ_DIRECTION_SHIFT) & ENA_ADMIN_SQ_SQ_DIRECTION_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1076

static inline void set_ena_admin_acq_common_desc_command_id(struct ena_admin_acq_common_desc *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1078

p->command |= val & ENA_ADMIN_ACQ_COMMON_DESC_COMMAND_ID_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1086

static inline void set_ena_admin_acq_common_desc_phase(struct ena_admin_acq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1088

p->flags |= val & ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1096

static inline void set_ena_admin_aq_create_sq_cmd_sq_direction(struct ena_admin_aq_create_sq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1098

p->sq_identity |= (val << ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_SHIFT) & ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1106

static inline void set_ena_admin_aq_create_sq_cmd_placement_policy(struct ena_admin_aq_create_sq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1108

p->sq_caps_2 |= val & ENA_ADMIN_AQ_CREATE_SQ_CMD_PLACEMENT_POLICY_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1116

static inline void set_ena_admin_aq_create_sq_cmd_completion_policy(struct ena_admin_aq_create_sq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1118

p->sq_caps_2 |= (val << ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_SHIFT) & ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1126

static inline void set_ena_admin_aq_create_sq_cmd_is_physically_contiguous(struct ena_admin_aq_create_sq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1128

p->sq_caps_3 |= val & ENA_ADMIN_AQ_CREATE_SQ_CMD_IS_PHYSICALLY_CONTIGUOUS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1136

static inline void set_ena_admin_aq_create_cq_cmd_interrupt_mode_enabled(struct ena_admin_aq_create_cq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1138

p->cq_caps_1 |= (val << ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_SHIFT) & ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1146

static inline void set_ena_admin_aq_create_cq_cmd_cq_entry_size_words(struct ena_admin_aq_create_cq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1148

p->cq_caps_2 |= val & ENA_ADMIN_AQ_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1156

static inline void set_ena_admin_get_set_feature_common_desc_select(struct ena_admin_get_set_feature_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1158

p->flags |= val & ENA_ADMIN_GET_SET_FEATURE_COMMON_DESC_SELECT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1166

static inline void set_ena_admin_get_feature_link_desc_autoneg(struct ena_admin_get_feature_link_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1168

p->flags |= val & ENA_ADMIN_GET_FEATURE_LINK_DESC_AUTONEG_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1176

static inline void set_ena_admin_get_feature_link_desc_duplex(struct ena_admin_get_feature_link_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1178

p->flags |= (val << ENA_ADMIN_GET_FEATURE_LINK_DESC_DUPLEX_SHIFT) & ENA_ADMIN_GET_FEATURE_LINK_DESC_DUPLEX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1186

static inline void set_ena_admin_feature_offload_desc_TX_L3_csum_ipv4(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1188

p->tx |= val & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1196

static inline void set_ena_admin_feature_offload_desc_TX_L4_ipv4_csum_part(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1198

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1206

static inline void set_ena_admin_feature_offload_desc_TX_L4_ipv4_csum_full(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1208

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1216

static inline void set_ena_admin_feature_offload_desc_TX_L4_ipv6_csum_part(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1218

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1226

static inline void set_ena_admin_feature_offload_desc_TX_L4_ipv6_csum_full(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1228

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1236

static inline void set_ena_admin_feature_offload_desc_tso_ipv4(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1238

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1246

static inline void set_ena_admin_feature_offload_desc_tso_ipv6(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1248

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1256

static inline void set_ena_admin_feature_offload_desc_tso_ecn(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1258

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1266

static inline void set_ena_admin_feature_offload_desc_RX_L3_csum_ipv4(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1268

p->rx_supported |= val & ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1276

static inline void set_ena_admin_feature_offload_desc_RX_L4_ipv4_csum(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1278

p->rx_supported |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1286

static inline void set_ena_admin_feature_offload_desc_RX_L4_ipv6_csum(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1288

p->rx_supported |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1296

static inline void set_ena_admin_feature_offload_desc_RX_hash(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1298

p->rx_supported |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_HASH_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_HASH_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1306

static inline void set_ena_admin_feature_rss_flow_hash_function_funcs(struct ena_admin_feature_rss_flow_hash_function *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1308

p->supported_func |= val & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_FUNCTION_FUNCS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1316

static inline void set_ena_admin_feature_rss_flow_hash_function_selected_func(struct ena_admin_feature_rss_flow_hash_function *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1318

p->selected_func |= val & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_FUNCTION_SELECTED_FUNC_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1326

static inline void set_ena_admin_feature_rss_flow_hash_input_L3_sort(struct ena_admin_feature_rss_flow_hash_input *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1328

p->supported_input_sort |= (val << ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_SHIFT) & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1336

static inline void set_ena_admin_feature_rss_flow_hash_input_L4_sort(struct ena_admin_feature_rss_flow_hash_input *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1338

p->supported_input_sort |= (val << ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_SHIFT) & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1346

static inline void set_ena_admin_feature_rss_flow_hash_input_enable_L3_sort(struct ena_admin_feature_rss_flow_hash_input *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1348

p->enabled_input_sort |= (val << ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L3_SORT_SHIFT) & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L3_SORT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1356

static inline void set_ena_admin_feature_rss_flow_hash_input_enable_L4_sort(struct ena_admin_feature_rss_flow_hash_input *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1358

p->enabled_input_sort |= (val << ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L4_SORT_SHIFT) & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L4_SORT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1366

static inline void set_ena_admin_host_info_major(struct ena_admin_host_info *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1368

p->driver_version |= val & ENA_ADMIN_HOST_INFO_MAJOR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1376

static inline void set_ena_admin_host_info_minor(struct ena_admin_host_info *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1378

p->driver_version |= (val << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) & ENA_ADMIN_HOST_INFO_MINOR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1386

static inline void set_ena_admin_host_info_sub_minor(struct ena_admin_host_info *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1388

p->driver_version |= (val << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) & ENA_ADMIN_HOST_INFO_SUB_MINOR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1396

static inline void set_ena_admin_aenq_common_desc_phase(struct ena_admin_aenq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1398

p->flags |= val & ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1406

static inline void set_ena_admin_aenq_link_change_desc_link_status(struct ena_admin_aenq_link_change_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_admin_defs.h

1408

p->flags |= val & ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

868

u32 val, i;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

871

val = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

873

if (unlikely(val == ENA_MMIO_READ_TIMEOUT)) {

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

878

if ((val & ENA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK) ==

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1098

static inline void set_ena_admin_aq_common_desc_command_id(struct ena_admin_aq_common_desc *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1100

p->command_id |= val & ENA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1108

static inline void set_ena_admin_aq_common_desc_phase(struct ena_admin_aq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1110

p->flags |= val & ENA_ADMIN_AQ_COMMON_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1118

static inline void set_ena_admin_aq_common_desc_ctrl_data(struct ena_admin_aq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1120

p->flags |= (val << ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_SHIFT) & ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1128

static inline void set_ena_admin_aq_common_desc_ctrl_data_indirect(struct ena_admin_aq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1130

p->flags |= (val << ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_SHIFT) & ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1138

static inline void set_ena_admin_sq_sq_direction(struct ena_admin_sq *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1140

p->sq_identity |= (val << ENA_ADMIN_SQ_SQ_DIRECTION_SHIFT) & ENA_ADMIN_SQ_SQ_DIRECTION_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1148

static inline void set_ena_admin_acq_common_desc_command_id(struct ena_admin_acq_common_desc *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1150

p->command |= val & ENA_ADMIN_ACQ_COMMON_DESC_COMMAND_ID_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1158

static inline void set_ena_admin_acq_common_desc_phase(struct ena_admin_acq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1160

p->flags |= val & ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1168

static inline void set_ena_admin_aq_create_sq_cmd_sq_direction(struct ena_admin_aq_create_sq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1170

p->sq_identity |= (val << ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_SHIFT) & ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1178

static inline void set_ena_admin_aq_create_sq_cmd_placement_policy(struct ena_admin_aq_create_sq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1180

p->sq_caps_2 |= val & ENA_ADMIN_AQ_CREATE_SQ_CMD_PLACEMENT_POLICY_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1188

static inline void set_ena_admin_aq_create_sq_cmd_completion_policy(struct ena_admin_aq_create_sq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1190

p->sq_caps_2 |= (val << ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_SHIFT) & ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1198

static inline void set_ena_admin_aq_create_sq_cmd_is_physically_contiguous(struct ena_admin_aq_create_sq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1200

p->sq_caps_3 |= val & ENA_ADMIN_AQ_CREATE_SQ_CMD_IS_PHYSICALLY_CONTIGUOUS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1208

static inline void set_ena_admin_aq_create_cq_cmd_interrupt_mode_enabled(struct ena_admin_aq_create_cq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1210

p->cq_caps_1 |= (val << ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_SHIFT) & ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1218

static inline void set_ena_admin_aq_create_cq_cmd_cq_entry_size_words(struct ena_admin_aq_create_cq_cmd *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1220

p->cq_caps_2 |= val & ENA_ADMIN_AQ_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1228

static inline void set_ena_admin_get_set_feature_common_desc_select(struct ena_admin_get_set_feature_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1230

p->flags |= val & ENA_ADMIN_GET_SET_FEATURE_COMMON_DESC_SELECT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1238

static inline void set_ena_admin_get_feature_link_desc_autoneg(struct ena_admin_get_feature_link_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1240

p->flags |= val & ENA_ADMIN_GET_FEATURE_LINK_DESC_AUTONEG_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1248

static inline void set_ena_admin_get_feature_link_desc_duplex(struct ena_admin_get_feature_link_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1250

p->flags |= (val << ENA_ADMIN_GET_FEATURE_LINK_DESC_DUPLEX_SHIFT) & ENA_ADMIN_GET_FEATURE_LINK_DESC_DUPLEX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1258

static inline void set_ena_admin_feature_offload_desc_TX_L3_csum_ipv4(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1260

p->tx |= val & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1268

static inline void set_ena_admin_feature_offload_desc_TX_L4_ipv4_csum_part(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1270

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1278

static inline void set_ena_admin_feature_offload_desc_TX_L4_ipv4_csum_full(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1280

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1288

static inline void set_ena_admin_feature_offload_desc_TX_L4_ipv6_csum_part(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1290

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1298

static inline void set_ena_admin_feature_offload_desc_TX_L4_ipv6_csum_full(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1300

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1308

static inline void set_ena_admin_feature_offload_desc_tso_ipv4(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1310

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1318

static inline void set_ena_admin_feature_offload_desc_tso_ipv6(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1320

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1328

static inline void set_ena_admin_feature_offload_desc_tso_ecn(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1330

p->tx |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1338

static inline void set_ena_admin_feature_offload_desc_RX_L3_csum_ipv4(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1340

p->rx_supported |= val & ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1348

static inline void set_ena_admin_feature_offload_desc_RX_L4_ipv4_csum(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1350

p->rx_supported |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1358

static inline void set_ena_admin_feature_offload_desc_RX_L4_ipv6_csum(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1360

p->rx_supported |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1368

static inline void set_ena_admin_feature_offload_desc_RX_hash(struct ena_admin_feature_offload_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1370

p->rx_supported |= (val << ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_HASH_SHIFT) & ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_HASH_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1378

static inline void set_ena_admin_feature_rss_flow_hash_function_funcs(struct ena_admin_feature_rss_flow_hash_function *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1380

p->supported_func |= val & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_FUNCTION_FUNCS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1388

static inline void set_ena_admin_feature_rss_flow_hash_function_selected_func(struct ena_admin_feature_rss_flow_hash_function *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1390

p->selected_func |= val & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_FUNCTION_SELECTED_FUNC_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1398

static inline void set_ena_admin_feature_rss_flow_hash_input_L3_sort(struct ena_admin_feature_rss_flow_hash_input *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1400

p->supported_input_sort |= (val << ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_SHIFT) & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1408

static inline void set_ena_admin_feature_rss_flow_hash_input_L4_sort(struct ena_admin_feature_rss_flow_hash_input *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1410

p->supported_input_sort |= (val << ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_SHIFT) & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1418

static inline void set_ena_admin_feature_rss_flow_hash_input_enable_L3_sort(struct ena_admin_feature_rss_flow_hash_input *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1420

p->enabled_input_sort |= (val << ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L3_SORT_SHIFT) & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L3_SORT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1428

static inline void set_ena_admin_feature_rss_flow_hash_input_enable_L4_sort(struct ena_admin_feature_rss_flow_hash_input *p, uint16_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1430

p->enabled_input_sort |= (val << ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L4_SORT_SHIFT) & ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L4_SORT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1438

static inline void set_ena_admin_host_info_major(struct ena_admin_host_info *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1440

p->driver_version |= val & ENA_ADMIN_HOST_INFO_MAJOR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1448

static inline void set_ena_admin_host_info_minor(struct ena_admin_host_info *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1450

p->driver_version |= (val << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) & ENA_ADMIN_HOST_INFO_MINOR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1458

static inline void set_ena_admin_host_info_sub_minor(struct ena_admin_host_info *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1460

p->driver_version |= (val << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) & ENA_ADMIN_HOST_INFO_SUB_MINOR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1468

static inline void set_ena_admin_aenq_common_desc_phase(struct ena_admin_aenq_common_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1470

p->flags |= val & ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1478

static inline void set_ena_admin_aenq_link_change_desc_link_status(struct ena_admin_aenq_link_change_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_admin_defs.h

1480

p->flags |= val & ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

423

static inline void set_ena_eth_io_tx_desc_length(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

425

p->len_ctrl |= val & ENA_ETH_IO_TX_DESC_LENGTH_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

433

static inline void set_ena_eth_io_tx_desc_req_id_hi(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

435

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_REQ_ID_HI_SHIFT) & ENA_ETH_IO_TX_DESC_REQ_ID_HI_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

443

static inline void set_ena_eth_io_tx_desc_meta_desc(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

445

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_META_DESC_SHIFT) & ENA_ETH_IO_TX_DESC_META_DESC_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

453

static inline void set_ena_eth_io_tx_desc_phase(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

455

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) & ENA_ETH_IO_TX_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

463

static inline void set_ena_eth_io_tx_desc_first(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

465

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_FIRST_SHIFT) & ENA_ETH_IO_TX_DESC_FIRST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

473

static inline void set_ena_eth_io_tx_desc_last(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

475

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_LAST_SHIFT) & ENA_ETH_IO_TX_DESC_LAST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

483

static inline void set_ena_eth_io_tx_desc_comp_req(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

485

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_COMP_REQ_SHIFT) & ENA_ETH_IO_TX_DESC_COMP_REQ_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

493

static inline void set_ena_eth_io_tx_desc_l3_proto_idx(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

495

p->meta_ctrl |= val & ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

503

static inline void set_ena_eth_io_tx_desc_DF(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

505

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_DF_SHIFT) & ENA_ETH_IO_TX_DESC_DF_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

513

static inline void set_ena_eth_io_tx_desc_tso_en(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

515

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT) & ENA_ETH_IO_TX_DESC_TSO_EN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

523

static inline void set_ena_eth_io_tx_desc_l4_proto_idx(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

525

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_SHIFT) & ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

533

static inline void set_ena_eth_io_tx_desc_l3_csum_en(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

535

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT) & ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

543

static inline void set_ena_eth_io_tx_desc_l4_csum_en(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

545

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L4_CSUM_EN_SHIFT) & ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

553

static inline void set_ena_eth_io_tx_desc_ethernet_fcs_dis(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

555

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_SHIFT) & ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

563

static inline void set_ena_eth_io_tx_desc_l4_csum_partial(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

565

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_SHIFT) & ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

573

static inline void set_ena_eth_io_tx_desc_req_id_lo(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

575

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT) & ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

583

static inline void set_ena_eth_io_tx_desc_addr_hi(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

585

p->buff_addr_hi_hdr_sz |= val & ENA_ETH_IO_TX_DESC_ADDR_HI_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

593

static inline void set_ena_eth_io_tx_desc_header_length(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

595

p->buff_addr_hi_hdr_sz |= (val << ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT) & ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

603

static inline void set_ena_eth_io_tx_meta_desc_req_id_lo(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

605

p->len_ctrl |= val & ENA_ETH_IO_TX_META_DESC_REQ_ID_LO_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

613

static inline void set_ena_eth_io_tx_meta_desc_ext_valid(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

615

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_EXT_VALID_SHIFT) & ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

623

static inline void set_ena_eth_io_tx_meta_desc_mss_hi(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

625

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT) & ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

633

static inline void set_ena_eth_io_tx_meta_desc_eth_meta_type(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

635

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_SHIFT) & ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

643

static inline void set_ena_eth_io_tx_meta_desc_meta_store(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

645

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_META_STORE_SHIFT) & ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

653

static inline void set_ena_eth_io_tx_meta_desc_meta_desc(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

655

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_META_DESC_SHIFT) & ENA_ETH_IO_TX_META_DESC_META_DESC_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

663

static inline void set_ena_eth_io_tx_meta_desc_phase(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

665

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT) & ENA_ETH_IO_TX_META_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

673

static inline void set_ena_eth_io_tx_meta_desc_first(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

675

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_FIRST_SHIFT) & ENA_ETH_IO_TX_META_DESC_FIRST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

683

static inline void set_ena_eth_io_tx_meta_desc_last(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

685

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_LAST_SHIFT) & ENA_ETH_IO_TX_META_DESC_LAST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

693

static inline void set_ena_eth_io_tx_meta_desc_comp_req(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

695

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_COMP_REQ_SHIFT) & ENA_ETH_IO_TX_META_DESC_COMP_REQ_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

703

static inline void set_ena_eth_io_tx_meta_desc_req_id_hi(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

705

p->word1 |= val & ENA_ETH_IO_TX_META_DESC_REQ_ID_HI_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

713

static inline void set_ena_eth_io_tx_meta_desc_l3_hdr_len(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

715

p->word2 |= val & ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

723

static inline void set_ena_eth_io_tx_meta_desc_l3_hdr_off(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

725

p->word2 |= (val << ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT) & ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

733

static inline void set_ena_eth_io_tx_meta_desc_l4_hdr_len_in_words(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

735

p->word2 |= (val << ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT) & ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

743

static inline void set_ena_eth_io_tx_meta_desc_mss_lo(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

745

p->word2 |= (val << ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT) & ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

753

static inline void set_ena_eth_io_tx_cdesc_phase(struct ena_eth_io_tx_cdesc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

755

p->flags |= val & ENA_ETH_IO_TX_CDESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

763

static inline void set_ena_eth_io_rx_desc_phase(struct ena_eth_io_rx_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

765

p->ctrl |= val & ENA_ETH_IO_RX_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

773

static inline void set_ena_eth_io_rx_desc_first(struct ena_eth_io_rx_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

775

p->ctrl |= (val << ENA_ETH_IO_RX_DESC_FIRST_SHIFT) & ENA_ETH_IO_RX_DESC_FIRST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

783

static inline void set_ena_eth_io_rx_desc_last(struct ena_eth_io_rx_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

785

p->ctrl |= (val << ENA_ETH_IO_RX_DESC_LAST_SHIFT) & ENA_ETH_IO_RX_DESC_LAST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

793

static inline void set_ena_eth_io_rx_desc_comp_req(struct ena_eth_io_rx_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

795

p->ctrl |= (val << ENA_ETH_IO_RX_DESC_COMP_REQ_SHIFT) & ENA_ETH_IO_RX_DESC_COMP_REQ_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

803

static inline void set_ena_eth_io_rx_cdesc_base_l3_proto_idx(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

805

p->status |= val & ENA_ETH_IO_RX_CDESC_BASE_L3_PROTO_IDX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

813

static inline void set_ena_eth_io_rx_cdesc_base_src_vlan_cnt(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

815

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

823

static inline void set_ena_eth_io_rx_cdesc_base_l4_proto_idx(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

825

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

833

static inline void set_ena_eth_io_rx_cdesc_base_l3_csum_err(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

835

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

843

static inline void set_ena_eth_io_rx_cdesc_base_l4_csum_err(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

845

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

853

static inline void set_ena_eth_io_rx_cdesc_base_ipv4_frag(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

855

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

863

static inline void set_ena_eth_io_rx_cdesc_base_phase(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

865

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

873

static inline void set_ena_eth_io_rx_cdesc_base_l3_csum2(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

875

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

883

static inline void set_ena_eth_io_rx_cdesc_base_first(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

885

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

893

static inline void set_ena_eth_io_rx_cdesc_base_last(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

895

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

903

static inline void set_ena_eth_io_rx_cdesc_base_buffer(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

905

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_BUFFER_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_BUFFER_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

913

static inline void set_ena_eth_io_intr_reg_rx_intr_delay(struct ena_eth_io_intr_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

915

p->intr_control |= val & ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

923

static inline void set_ena_eth_io_intr_reg_tx_intr_delay(struct ena_eth_io_intr_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

925

p->intr_control |= (val << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT) & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

933

static inline void set_ena_eth_io_intr_reg_intr_unmask(struct ena_eth_io_intr_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

935

p->intr_control |= (val << ENA_ETH_IO_INTR_REG_INTR_UNMASK_SHIFT) & ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

943

static inline void set_ena_eth_io_numa_node_cfg_reg_numa(struct ena_eth_io_numa_node_cfg_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

945

p->numa_cfg |= val & ENA_ETH_IO_NUMA_NODE_CFG_REG_NUMA_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

953

static inline void set_ena_eth_io_numa_node_cfg_reg_enabled(struct ena_eth_io_numa_node_cfg_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h

955

p->numa_cfg |= (val << ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_SHIFT) & ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

424

static inline void set_ena_eth_io_tx_desc_length(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

426

p->len_ctrl |= val & ENA_ETH_IO_TX_DESC_LENGTH_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

434

static inline void set_ena_eth_io_tx_desc_req_id_hi(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

436

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_REQ_ID_HI_SHIFT) & ENA_ETH_IO_TX_DESC_REQ_ID_HI_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

444

static inline void set_ena_eth_io_tx_desc_meta_desc(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

446

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_META_DESC_SHIFT) & ENA_ETH_IO_TX_DESC_META_DESC_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

454

static inline void set_ena_eth_io_tx_desc_phase(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

456

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) & ENA_ETH_IO_TX_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

464

static inline void set_ena_eth_io_tx_desc_first(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

466

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_FIRST_SHIFT) & ENA_ETH_IO_TX_DESC_FIRST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

474

static inline void set_ena_eth_io_tx_desc_last(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

476

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_LAST_SHIFT) & ENA_ETH_IO_TX_DESC_LAST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

484

static inline void set_ena_eth_io_tx_desc_comp_req(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

486

p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_COMP_REQ_SHIFT) & ENA_ETH_IO_TX_DESC_COMP_REQ_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

494

static inline void set_ena_eth_io_tx_desc_l3_proto_idx(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

496

p->meta_ctrl |= val & ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

504

static inline void set_ena_eth_io_tx_desc_DF(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

506

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_DF_SHIFT) & ENA_ETH_IO_TX_DESC_DF_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

514

static inline void set_ena_eth_io_tx_desc_tso_en(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

516

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT) & ENA_ETH_IO_TX_DESC_TSO_EN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

524

static inline void set_ena_eth_io_tx_desc_l4_proto_idx(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

526

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_SHIFT) & ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

534

static inline void set_ena_eth_io_tx_desc_l3_csum_en(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

536

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT) & ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

544

static inline void set_ena_eth_io_tx_desc_l4_csum_en(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

546

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L4_CSUM_EN_SHIFT) & ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

554

static inline void set_ena_eth_io_tx_desc_ethernet_fcs_dis(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

556

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_SHIFT) & ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

564

static inline void set_ena_eth_io_tx_desc_l4_csum_partial(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

566

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_SHIFT) & ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

574

static inline void set_ena_eth_io_tx_desc_req_id_lo(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

576

p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT) & ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

584

static inline void set_ena_eth_io_tx_desc_addr_hi(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

586

p->buff_addr_hi_hdr_sz |= val & ENA_ETH_IO_TX_DESC_ADDR_HI_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

594

static inline void set_ena_eth_io_tx_desc_header_length(struct ena_eth_io_tx_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

596

p->buff_addr_hi_hdr_sz |= (val << ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT) & ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

604

static inline void set_ena_eth_io_tx_meta_desc_req_id_lo(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

606

p->len_ctrl |= val & ENA_ETH_IO_TX_META_DESC_REQ_ID_LO_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

614

static inline void set_ena_eth_io_tx_meta_desc_ext_valid(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

616

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_EXT_VALID_SHIFT) & ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

624

static inline void set_ena_eth_io_tx_meta_desc_mss_hi(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

626

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT) & ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

634

static inline void set_ena_eth_io_tx_meta_desc_eth_meta_type(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

636

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_SHIFT) & ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

644

static inline void set_ena_eth_io_tx_meta_desc_meta_store(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

646

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_META_STORE_SHIFT) & ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

654

static inline void set_ena_eth_io_tx_meta_desc_meta_desc(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

656

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_META_DESC_SHIFT) & ENA_ETH_IO_TX_META_DESC_META_DESC_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

664

static inline void set_ena_eth_io_tx_meta_desc_phase(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

666

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT) & ENA_ETH_IO_TX_META_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

674

static inline void set_ena_eth_io_tx_meta_desc_first(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

676

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_FIRST_SHIFT) & ENA_ETH_IO_TX_META_DESC_FIRST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

684

static inline void set_ena_eth_io_tx_meta_desc_last(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

686

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_LAST_SHIFT) & ENA_ETH_IO_TX_META_DESC_LAST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

694

static inline void set_ena_eth_io_tx_meta_desc_comp_req(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

696

p->len_ctrl |= (val << ENA_ETH_IO_TX_META_DESC_COMP_REQ_SHIFT) & ENA_ETH_IO_TX_META_DESC_COMP_REQ_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

704

static inline void set_ena_eth_io_tx_meta_desc_req_id_hi(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

706

p->word1 |= val & ENA_ETH_IO_TX_META_DESC_REQ_ID_HI_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

714

static inline void set_ena_eth_io_tx_meta_desc_l3_hdr_len(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

716

p->word2 |= val & ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

724

static inline void set_ena_eth_io_tx_meta_desc_l3_hdr_off(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

726

p->word2 |= (val << ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT) & ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

734

static inline void set_ena_eth_io_tx_meta_desc_l4_hdr_len_in_words(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

736

p->word2 |= (val << ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT) & ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

744

static inline void set_ena_eth_io_tx_meta_desc_mss_lo(struct ena_eth_io_tx_meta_desc *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

746

p->word2 |= (val << ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT) & ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

754

static inline void set_ena_eth_io_tx_cdesc_phase(struct ena_eth_io_tx_cdesc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

756

p->flags |= val & ENA_ETH_IO_TX_CDESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

764

static inline void set_ena_eth_io_rx_desc_phase(struct ena_eth_io_rx_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

766

p->ctrl |= val & ENA_ETH_IO_RX_DESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

774

static inline void set_ena_eth_io_rx_desc_first(struct ena_eth_io_rx_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

776

p->ctrl |= (val << ENA_ETH_IO_RX_DESC_FIRST_SHIFT) & ENA_ETH_IO_RX_DESC_FIRST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

784

static inline void set_ena_eth_io_rx_desc_last(struct ena_eth_io_rx_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

786

p->ctrl |= (val << ENA_ETH_IO_RX_DESC_LAST_SHIFT) & ENA_ETH_IO_RX_DESC_LAST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

794

static inline void set_ena_eth_io_rx_desc_comp_req(struct ena_eth_io_rx_desc *p, uint8_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

796

p->ctrl |= (val << ENA_ETH_IO_RX_DESC_COMP_REQ_SHIFT) & ENA_ETH_IO_RX_DESC_COMP_REQ_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

804

static inline void set_ena_eth_io_rx_cdesc_base_l3_proto_idx(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

806

p->status |= val & ENA_ETH_IO_RX_CDESC_BASE_L3_PROTO_IDX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

814

static inline void set_ena_eth_io_rx_cdesc_base_src_vlan_cnt(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

816

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

824

static inline void set_ena_eth_io_rx_cdesc_base_l4_proto_idx(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

826

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

834

static inline void set_ena_eth_io_rx_cdesc_base_l3_csum_err(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

836

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

844

static inline void set_ena_eth_io_rx_cdesc_base_l4_csum_err(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

846

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

854

static inline void set_ena_eth_io_rx_cdesc_base_ipv4_frag(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

856

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

864

static inline void set_ena_eth_io_rx_cdesc_base_phase(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

866

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

874

static inline void set_ena_eth_io_rx_cdesc_base_l3_csum2(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

876

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

884

static inline void set_ena_eth_io_rx_cdesc_base_first(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

886

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

894

static inline void set_ena_eth_io_rx_cdesc_base_last(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

896

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

904

static inline void set_ena_eth_io_rx_cdesc_base_buffer(struct ena_eth_io_rx_cdesc_base *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

906

p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_BUFFER_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_BUFFER_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

914

static inline void set_ena_eth_io_intr_reg_rx_intr_delay(struct ena_eth_io_intr_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

916

p->intr_control |= val & ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

924

static inline void set_ena_eth_io_intr_reg_tx_intr_delay(struct ena_eth_io_intr_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

926

p->intr_control |= (val << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT) & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

934

static inline void set_ena_eth_io_intr_reg_intr_unmask(struct ena_eth_io_intr_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

936

p->intr_control |= (val << ENA_ETH_IO_INTR_REG_INTR_UNMASK_SHIFT) & ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

944

static inline void set_ena_eth_io_numa_node_cfg_reg_numa(struct ena_eth_io_numa_node_cfg_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

946

p->numa_cfg |= val & ENA_ETH_IO_NUMA_NODE_CFG_REG_NUMA_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

954

static inline void set_ena_eth_io_numa_node_cfg_reg_enabled(struct ena_eth_io_numa_node_cfg_reg *p, uint32_t val)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h

956

p->numa_cfg |= (val << ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_SHIFT) & ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_MASK;

sys/dev/virtual/hyperv/hyperv.c

122

uint64_t val;

sys/dev/virtual/hyperv/hyperv.c

124

val = rdmsr(MSR_HV_TIME_REF_COUNT);

sys/dev/virtual/hyperv/hyperv.c

125

return (val + hyperv_cputimer.base);

sys/dev/virtual/hyperv/vmbus/vmbus.c

804

uint64_t val, orig;

sys/dev/virtual/hyperv/vmbus/vmbus.c

827

val = MSR_HV_SIMP_ENABLE | (orig & MSR_HV_SIMP_RSVD_MASK) |

sys/dev/virtual/hyperv/vmbus/vmbus.c

829

wrmsr(MSR_HV_SIMP, val);

sys/dev/virtual/hyperv/vmbus/vmbus.c

835

val = MSR_HV_SIEFP_ENABLE | (orig & MSR_HV_SIEFP_RSVD_MASK) |

sys/dev/virtual/hyperv/vmbus/vmbus.c

838

wrmsr(MSR_HV_SIEFP, val);

sys/dev/virtual/hyperv/vmbus/vmbus.c

846

val = psc->intr_vec | /* MSR_HV_SINT_AUTOEOI | notyet */

sys/dev/virtual/hyperv/vmbus/vmbus.c

848

wrmsr(sint, val);

sys/dev/virtual/hyperv/vmbus/vmbus.c

855

val = XTIMER_OFFSET | /* MSR_HV_SINT_AUTOEOI | notyet */

sys/dev/virtual/hyperv/vmbus/vmbus.c

857

wrmsr(sint, val);

sys/dev/virtual/hyperv/vmbus/vmbus.c

863

val = MSR_HV_SCTRL_ENABLE | (orig & MSR_HV_SCTRL_RSVD_MASK);

sys/dev/virtual/hyperv/vmbus/vmbus.c

864

wrmsr(MSR_HV_SCONTROL, val);

sys/dev/virtual/hyperv/vmbus/vmbus.c

871

uint64_t val;

sys/dev/virtual/hyperv/vmbus/vmbus.c

876

val = rdmsr(MSR_HV_STIMER0_CONFIG);

sys/dev/virtual/hyperv/vmbus/vmbus.c

877

if ((val & MSR_HV_STIMER_CFG_ENABLE) == 0)

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

134

uint64_t val;

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

136

val = hyperv_tsc_lfence();

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

137

return (val + hyperv_tsc_cputimer.base);

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

143

uint64_t val;

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

145

val = hyperv_tsc_mfence();

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

146

return (val + hyperv_tsc_cputimer.base);

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

160

uint64_t val, orig;

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

195

val = MSR_HV_REFTSC_ENABLE | (orig & MSR_HV_REFTSC_RSVD_MASK) |

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

198

wrmsr(MSR_HV_REFERENCE_TSC, val);

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

212

uint64_t val;

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

219

val = rdmsr(MSR_HV_REFERENCE_TSC);

sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c

220

wrmsr(MSR_HV_REFERENCE_TSC, val & MSR_HV_REFTSC_RSVD_MASK);

sys/dev/virtual/nvmm/x86/nvmm_x86.c

461

nvmm_x86_pat_validate(uint64_t val)

sys/dev/virtual/nvmm/x86/nvmm_x86.c

463

uint8_t *pat = (uint8_t *)&val;

sys/dev/virtual/nvmm/x86/nvmm_x86.h

61

uint64_t val;

sys/dev/virtual/nvmm/x86/nvmm_x86_internal.h

222

x86_set_xcr(uint32_t xcr, uint64_t val)

sys/dev/virtual/nvmm/x86/nvmm_x86_internal.h

226

low = val;

sys/dev/virtual/nvmm/x86/nvmm_x86_internal.h

227

high = val >> 32;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1267

uint64_t val;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1272

val = vmcb->state.efer & ~EFER_SVME;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1273

vmcb->state.rax = (val & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1274

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1278

val = NB_CFG_INITAPICCPUIDLO;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1279

vmcb->state.rax = (val & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1280

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1286

val = 0;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1287

vmcb->state.rax = (val & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1288

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1293

if (__predict_false(exit->u.wrmsr.val & ~EFER_VALID)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1296

if ((vmcb->state.efer ^ exit->u.wrmsr.val) &

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1300

vmcb->state.efer = exit->u.wrmsr.val | EFER_SVME;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1305

cpudata->gtsc_offset = exit->u.wrmsr.val - rdtsc();

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1357

exit->u.wrmsr.val = (rdx << 32) | (rax & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1412

uint64_t val;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1416

val = (cpudata->gprs[NVMM_X64_GPR_RDX] << 32) |

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1423

} else if (__predict_false((val & ~svm_xcr0_mask) != 0)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1425

} else if (__predict_false((val & XCR0_X87) == 0)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1429

cpudata->gxcr0 = val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1891

uint64_t val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1896

val = vmx_vmread(VMCS_GUEST_IA32_PAT);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1897

cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1898

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1902

val = cpudata->gmsr_misc_enable;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1903

cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1904

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1911

val = rdmsr(MSR_IA32_ARCH_CAPABILITIES);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1912

val &= (IA32_ARCH_RDCL_NO |

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1916

cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1917

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1923

val = 0;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1924

cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1925

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1930

cpudata->gtsc_offset = exit->u.wrmsr.val - rdtsc();

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1935

val = exit->u.wrmsr.val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1936

if (__predict_false(!nvmm_x86_pat_validate(val))) {

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1939

vmx_vmwrite(VMCS_GUEST_IA32_PAT, val);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1998

exit->u.wrmsr.val = (rdx << 32) | (rax & 0xFFFFFFFF);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2017

uint64_t val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2021

val = (cpudata->gprs[NVMM_X64_GPR_RDX] << 32) |

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2026

} else if (__predict_false((val & ~vmx_xcr0_mask) != 0)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2028

} else if (__predict_false((val & XCR0_X87) == 0)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2032

cpudata->gxcr0 = val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2689

gmsr[VMX_MSRLIST_STAR].val =

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2691

gmsr[VMX_MSRLIST_LSTAR].val =

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2693

gmsr[VMX_MSRLIST_CSTAR].val =

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2695

gmsr[VMX_MSRLIST_SFMASK].val =

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2697

gmsr[VMX_MSRLIST_KERNELGSBASE].val =

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2836

gmsr[VMX_MSRLIST_STAR].val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2838

gmsr[VMX_MSRLIST_LSTAR].val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2840

gmsr[VMX_MSRLIST_CSTAR].val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2842

gmsr[VMX_MSRLIST_SFMASK].val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2844

gmsr[VMX_MSRLIST_KERNELGSBASE].val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2990

gmsr[VMX_MSRLIST_STAR].val = 0;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2992

gmsr[VMX_MSRLIST_LSTAR].val = 0;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2994

gmsr[VMX_MSRLIST_CSTAR].val = 0;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2996

gmsr[VMX_MSRLIST_SFMASK].val = 0;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2998

gmsr[VMX_MSRLIST_KERNELGSBASE].val = 0;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3000

gmsr[VMX_MSRLIST_L1DFLUSH].val = IA32_FLUSH_CMD_L1D_FLUSH;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3279

uint64_t basic, val, true_val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3286

val = rdmsr(msr_ctls);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3290

true_val = val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3309

uint64_t basic, val, true_val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3316

val = rdmsr(msr_ctls);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3320

true_val = val;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3342

} else if (CTLS_ZERO_ALLOWED(val, i)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3344

} else if (CTLS_ONE_ALLOWED(val, i)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

675

uint64_t val;

sys/dev/virtual/virtio/balloon/virtio_balloon.c

472

uint16_t tag, uint64_t val)

sys/dev/virtual/virtio/balloon/virtio_balloon.c

483

sc->vtballoon_stats[idx].val = le64toh(val);

sys/dev/virtual/virtio/balloon/virtio_balloon.c

539

kprintf("\t%s = %lu\n", vt_balloon_names[sc->vtballoon_stats[i].tag], sc->vtballoon_stats[i].val);

sys/dev/virtual/virtio/balloon/virtio_balloon.h

123

uint64_t val;

sys/dev/virtual/virtio/mmio/virtio_mmio_kenv.c

144

char *val;

sys/dev/virtual/virtio/mmio/virtio_mmio_kenv.c

147

if ((val = kgetenv("hw.virtio.mmio.device")) == NULL)

sys/dev/virtual/virtio/mmio/virtio_mmio_kenv.c

149

vtmmio_parsearg(driver, parent, val);

sys/dev/virtual/virtio/mmio/virtio_mmio_kenv.c

150

kfreeenv(val);

sys/dev/virtual/virtio/mmio/virtio_mmio_kenv.c

154

if ((val = kgetenv(name)) == NULL)

sys/dev/virtual/virtio/mmio/virtio_mmio_kenv.c

156

vtmmio_parsearg(driver, parent, val);

sys/dev/virtual/virtio/mmio/virtio_mmio_kenv.c

157

kfreeenv(val);

sys/dev/virtual/virtio/pci/virtio_pci.c

267

uint32_t val;

sys/dev/virtual/virtio/pci/virtio_pci.c

268

val = pci_read_config(dev, msix_cap + PCIR_MSIX_TABLE, 4);

sys/dev/virtual/virtio/pci/virtio_pci.c

269

rid = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);

sys/dev/virtual/virtio/virtio/virtio.c

116

uint64_t val;

sys/dev/virtual/virtio/virtio/virtio.c

130

for (n = 0, val = 1ULL << 63; val != 0; val >>= 1) {

sys/dev/virtual/virtio/virtio/virtio.c

135

if (((features & val) == 0) || val == VIRTIO_F_BAD_FEATURE)

sys/dev/virtual/virtio/virtio/virtio.c

143

name = virtio_feature_name(val, desc);

sys/dev/virtual/virtio/virtio/virtio.c

145

sbuf_printf(&sb, "%#jx", (uintmax_t) val);

sys/dev/virtual/virtio/virtio/virtio.c

161

virtio_feature_name(uint64_t val, struct virtio_feature_desc *desc)

sys/dev/virtual/virtio/virtio/virtio.c

172

if (val == descs[i][j].vfd_val)

sys/dev/virtual/virtio/virtio/virtio.h

181

type val; \

sys/dev/virtual/virtio/virtio/virtio.h

182

virtio_read_device_config(dev, offset, &val, sizeof(type)); \

sys/dev/virtual/virtio/virtio/virtio.h

183

return (val); \

sys/dev/virtual/virtio/virtio/virtio.h

188

bus_size_t offset, type val) \

sys/dev/virtual/virtio/virtio/virtio.h

190

virtio_write_device_config(dev, offset, &val, sizeof(type)); \

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1141

uint32_t val;

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1145

val = pvscsi_read_intr_status(sc);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1147

if ((val & PVSCSI_INTR_ALL_SUPPORTED) != 0) {

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1148

pvscsi_write_intr_status(sc, val & PVSCSI_INTR_ALL_SUPPORTED);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

266

pvscsi_reg_write(struct pvscsi_softc *sc, uint32_t offset, uint32_t val)

sys/dev/virtual/vmware/pvscsi/pvscsi.c

269

bus_write_4(sc->mm_res, offset, val);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

280

pvscsi_write_intr_status(struct pvscsi_softc *sc, uint32_t val)

sys/dev/virtual/vmware/pvscsi/pvscsi.c

283

pvscsi_reg_write(sc, PVSCSI_REG_OFFSET_INTR_STATUS, val);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

61

uint32_t val);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

64

uint32_t val);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

751

uint32_t val;

sys/dev/virtual/vmware/pvscsi/pvscsi.c

756

val = pvscsi_read_intr_status(sc);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

758

DEBUG_PRINTF(2, sc->dev, "adapter reset done: %u\n", val);

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

525

trunc_powerof2(int val)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

528

return (1U << (fls(val) - 1));

sys/kern/kern_event.c

171

#define KN_HASH(val, mask) (((val) ^ (val >> 8)) & (mask))

sys/kern/kern_nrandom.c

244

static void IBAA_Seed(struct ibaa_state *ibaa, u_int32_t val);

sys/kern/kern_nrandom.c

284

IBAA_Seed (struct ibaa_state *ibaa, const u_int32_t val)

sys/kern/kern_nrandom.c

289

*iptr = ((*iptr << 3) | (*iptr >> 29)) + (val ^ (IBAA_Byte(ibaa) & 15));

sys/kern/kern_synch.c

104

#define logtsleep2(name, val) KTR_LOG(tsleep_ ## name, val)

sys/kern/kern_sysctl.c

1048

int val = (int)*(long *)arg1;

sys/kern/kern_sysctl.c

1049

error = SYSCTL_OUT(req, &val, sizeof(int));

sys/kern/kern_udev.c

189

_udev_dict_set_int(prop_dictionary_t dict, const char *key, int64_t val)

sys/kern/kern_udev.c

195

pn = prop_number_create_integer(val);

sys/kern/kern_udev.c

209

_udev_dict_set_uint(prop_dictionary_t dict, const char *key, uint64_t val)

sys/kern/kern_udev.c

215

pn = prop_number_create_unsigned_integer(val);

sys/kern/kern_udev.c

314

udev_dict_set_int(cdev_t dev, const char *key, int64_t val)

sys/kern/kern_udev.c

335

if ((error = _udev_dict_set_int(dict, "value", val))) {

sys/kern/kern_udev.c

341

error = _udev_dict_set_int(udict, key, val);

sys/kern/kern_udev.c

349

udev_dict_set_uint(cdev_t dev, const char *key, uint64_t val)

sys/kern/kern_udev.c

370

if ((error = _udev_dict_set_uint(dict, "value", val))) {

sys/kern/kern_udev.c

376

error = _udev_dict_set_uint(udict, key, val);

sys/kern/lwkt_ipiq.c

125

int64_t val = 0; \

sys/kern/lwkt_ipiq.c

129

val += ipiq_stats_percpu[cpu].name; \

sys/kern/lwkt_ipiq.c

131

error = sysctl_handle_quad(oidp, &val, 0, req); \

sys/kern/lwkt_ipiq.c

136

ipiq_stats_percpu[cpu].name = val; \

sys/kern/sys_process.c

587

stopevent(struct proc *p, unsigned int event, unsigned int val)

sys/kern/sys_process.c

598

p->p_xstat = val;

sys/kern/sysv_sem.c

530

semptr->semval = real_arg.val;

sys/kern/uipc_socket.c

2113

u_long val;

sys/kern/uipc_socket.c

2237

val = (u_long)(tv.tv_sec * hz) + tv.tv_usec / ustick;

sys/kern/uipc_socket.c

2238

if (val > INT_MAX) {

sys/kern/uipc_socket.c

2242

if (val == 0 && tv.tv_usec != 0)

sys/kern/uipc_socket.c

2243

val = 1;

sys/kern/uipc_socket.c

2247

so->so_snd.ssb_timeo = val;

sys/kern/uipc_socket.c

2250

so->so_rcv.ssb_timeo = val;

sys/kern/uipc_socket.c

2479

void *val;

sys/kern/uipc_socket.c

2485

val = sopt->sopt_val;

sys/kern/uipc_socket.c

2488

bcopy(val, mtod(m, char *), m->m_len);

sys/kern/uipc_socket.c

2490

val = (caddr_t)val + m->m_len;

sys/kern/uipc_socket.c

2510

void *val;

sys/kern/uipc_socket.c

2516

val = sopt->sopt_val;

sys/kern/uipc_socket.c

2519

bcopy(mtod(m, char *), val, m->m_len);

sys/kern/uipc_socket.c

2521

val = (caddr_t)val + m->m_len;

sys/kern/uipc_syscalls.c

1256

if (uap->val) {

sys/kern/uipc_syscalls.c

1258

error = copyin(uap->val, sopt.sopt_val, sopt.sopt_valsize);

sys/kern/uipc_syscalls.c

1265

if (uap->val)

sys/kern/uipc_syscalls.c

1309

if (uap->val) {

sys/kern/uipc_syscalls.c

1331

if (uap->val) {

sys/kern/uipc_syscalls.c

1336

error = copyin(uap->val, sopt.sopt_val, sopt.sopt_valsize);

sys/kern/uipc_syscalls.c

1348

if (uap->val)

sys/kern/uipc_syscalls.c

1349

error = copyout(sopt.sopt_val, uap->val, sopt.sopt_valsize);

sys/kern/uipc_syscalls.c

1351

if (uap->val)

sys/kern/vfs_mount.c

102

if (mnt1->mnt_stat.f_fsid.val[0] < mnt2->mnt_stat.f_fsid.val[0])

sys/kern/vfs_mount.c

104

if (mnt1->mnt_stat.f_fsid.val[0] > mnt2->mnt_stat.f_fsid.val[0])

sys/kern/vfs_mount.c

106

if (mnt1->mnt_stat.f_fsid.val[1] < mnt2->mnt_stat.f_fsid.val[1])

sys/kern/vfs_mount.c

108

if (mnt1->mnt_stat.f_fsid.val[1] > mnt2->mnt_stat.f_fsid.val[1])

sys/kern/vfs_mount.c

116

if (fsid->val[0] < mnt->mnt_stat.f_fsid.val[0])

sys/kern/vfs_mount.c

118

if (fsid->val[0] > mnt->mnt_stat.f_fsid.val[0])

sys/kern/vfs_mount.c

120

if (fsid->val[1] < mnt->mnt_stat.f_fsid.val[1])

sys/kern/vfs_mount.c

122

if (fsid->val[1] > mnt->mnt_stat.f_fsid.val[1])

sys/kern/vfs_mount.c

450

tfsid.val[1] = mtype;

sys/kern/vfs_mount.c

454

tfsid.val[0] = makeudev(255, 0);

sys/kern/vfs_mount.c

456

tfsid.val[0] = makeudev(255,

sys/kern/vfs_mount.c

462

mp->mnt_stat.f_fsid.val[0] = tfsid.val[0];

sys/kern/vfs_mount.c

463

mp->mnt_stat.f_fsid.val[1] = tfsid.val[1];

sys/kern/vfs_mount.c

488

++template->val[1];

sys/kern/vfs_mount.c

600

int32_t val;

sys/kern/vfs_mount.c

605

val = mp->mnt_stat.f_fsid.val[0];

sys/kern/vfs_mount.c

606

val = ((val & 0xFFFF0000) >> 8) | (val & 0x000000FF);

sys/kern/vfs_mount.c

607

++val;

sys/kern/vfs_mount.c

608

val = ((val << 8) & 0xFFFF0000) | (val & 0x000000FF);

sys/kern/vfs_mount.c

609

mp->mnt_stat.f_fsid.val[0] = val;

sys/kern/vfs_mount.c

612

mp->mnt_stat.f_fsid.val[1] += 0x0100;

sys/kern/vfs_subr.c

2625

int32_t val[2];

sys/kern/vfs_subr.c

2631

tmp.val[_QUAD_HIGHWORD] = (h); \

sys/kern/vfs_subr.c

2637

tmp.val[_QUAD_LOWWORD] = (l); \

sys/kern/vfs_syscalls.c

1450

buf->f_fsid.val[0] = buf->f_fsid.val[1] = 0;

sys/kern/vfs_syscalls.c

1525

buf->f_fsid.val[0] = buf->f_fsid.val[1] = 0;

sys/kern/vfs_syscalls.c

5090

sb.f_fsid.val[0] = sb.f_fsid.val[1] = 0;

sys/kern/vfs_vnops.c

861

sb->st_dev = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/libprop/prop_array_util.c

133

int ## size ## _t val) \

sys/libprop/prop_array_util.c

138

num = prop_number_create_integer((int64_t) val); \

sys/libprop/prop_array_util.c

150

uint ## size ## _t val) \

sys/libprop/prop_array_util.c

155

num = prop_number_create_unsigned_integer((uint64_t) val); \

sys/libprop/prop_array_util.c

166

int ## size ## _t val) \

sys/libprop/prop_array_util.c

171

num = prop_number_create_integer((int64_t) val); \

sys/libprop/prop_array_util.c

182

uint ## size ## _t val) \

sys/libprop/prop_array_util.c

187

num = prop_number_create_integer((int64_t) val); \

sys/libprop/prop_array_util.c

63

bool val)

sys/libprop/prop_array_util.c

68

b = prop_bool_create(val);

sys/libprop/prop_bool.c

127

_prop_bool_alloc(bool val)

sys/libprop/prop_bool.c

132

pb = val ? &_prop_bool_true : &_prop_bool_false;

sys/libprop/prop_bool.c

144

prop_bool_create(bool val)

sys/libprop/prop_bool.c

147

return (_prop_bool_alloc(val));

sys/libprop/prop_bool.c

207

bool val;

sys/libprop/prop_bool.c

215

val = true;

sys/libprop/prop_bool.c

218

val = false;

sys/libprop/prop_bool.c

220

*obj = prop_bool_create(val);

sys/libprop/prop_dictionary_util.c

145

int ## size ## _t val) \

sys/libprop/prop_dictionary_util.c

150

num = prop_number_create_integer((int64_t) val); \

sys/libprop/prop_dictionary_util.c

162

uint ## size ## _t val) \

sys/libprop/prop_dictionary_util.c

167

num = prop_number_create_unsigned_integer((uint64_t) val); \

sys/libprop/prop_dictionary_util.c

75

bool val)

sys/libprop/prop_dictionary_util.c

80

b = prop_bool_create(val);

sys/libprop/prop_number.c

328

prop_number_create_integer(int64_t val)

sys/libprop/prop_number.c

333

pnv.pnv_signed = val;

sys/libprop/prop_number.c

345

prop_number_create_unsigned_integer(uint64_t val)

sys/libprop/prop_number.c

350

pnv.pnv_unsigned = val;

sys/libprop/prop_number.c

474

prop_number_equals_integer(prop_number_t pn, int64_t val)

sys/libprop/prop_number.c

481

(pn->pn_value.pnv_unsigned > INT64_MAX || val < 0))

sys/libprop/prop_number.c

484

return (pn->pn_value.pnv_signed == val);

sys/libprop/prop_number.c

493

prop_number_equals_unsigned_integer(prop_number_t pn, uint64_t val)

sys/libprop/prop_number.c

500

(pn->pn_value.pnv_signed < 0 || val > INT64_MAX))

sys/libprop/prop_number.c

503

return (pn->pn_value.pnv_unsigned == val);

sys/net/altq/altq_red.c

582

int32_t val;

sys/net/altq/altq_red.c

587

val = 1 << FP_SHIFT;

sys/net/altq/altq_red.c

589

return (val);

sys/net/altq/altq_red.c

595

val = (val * w->w_tab[i]) >> FP_SHIFT;

sys/net/altq/altq_red.c

601

return (val);

sys/net/altq/altq_subr.c

873

uint64_t val;

sys/net/altq/altq_subr.c

877

val = rdtsc();

sys/net/altq/altq_subr.c

885

val = (((uint64_t)tv.tv_sec * 1000000 + tv.tv_usec) <<

sys/net/altq/altq_subr.c

888

return (val);

sys/net/dummynet/ip_dummynet.c

1940

int error, val, origcpu;

sys/net/dummynet/ip_dummynet.c

1942

val = dn_hz;

sys/net/dummynet/ip_dummynet.c

1943

error = sysctl_handle_int(oidp, &val, 0, req);

sys/net/dummynet/ip_dummynet.c

1946

if (val <= 0)

sys/net/dummynet/ip_dummynet.c

1948

else if (val > DN_CALLOUT_FREQ_MAX)

sys/net/dummynet/ip_dummynet.c

1949

val = DN_CALLOUT_FREQ_MAX;

sys/net/dummynet/ip_dummynet.c

1956

dn_hz = val;

sys/net/dummynet/ip_dummynet.c

1958

systimer_adjust_periodic(&dn_clock, val);

sys/net/dummynet3/ip_dummynet3.c

1919

int error, val;

sys/net/dummynet3/ip_dummynet3.c

1921

val = dn_hz;

sys/net/dummynet3/ip_dummynet3.c

1922

error = sysctl_handle_int(oidp, &val, 0, req);

sys/net/dummynet3/ip_dummynet3.c

1925

if (val <= 0)

sys/net/dummynet3/ip_dummynet3.c

1927

else if (val > DN_CALLOUT_FREQ_MAX)

sys/net/dummynet3/ip_dummynet3.c

1928

val = DN_CALLOUT_FREQ_MAX;

sys/net/dummynet3/ip_dummynet3.c

1931

dn_hz = val;

sys/net/dummynet3/ip_dummynet3.c

1932

systimer_adjust_periodic(&dn_clock, val);

sys/net/lagg/ieee8023ad_lacp.h

43

#define LACP_TIMER_ARM(port, timer, val) \

sys/net/lagg/ieee8023ad_lacp.h

44

(port)->lp_timer[(timer)] = (val)

sys/net/pfil.c

161

pfil_head_get(int type, u_long val)

sys/net/pfil.c

166

if (ph->ph_type == type && ph->ph_un.phu_val == val)

sys/net/toeplitz.c

117

for (val = 0; val < 256; ++val) {

sys/net/toeplitz.c

122

if (val & (1 << shift))

sys/net/toeplitz.c

125

cache[i][val] = res;

sys/net/toeplitz.c

92

int j, b, shift, val;

sys/net/wg/if_wg.c

1076

int name, void *val, size_t len)

sys/net/wg/if_wg.c

1082

.sopt_val = val,

sys/net/zlib.c

2041

int val = value;\

sys/net/zlib.c

2042

s->bi_buf |= (val << s->bi_valid);\

sys/net/zlib.c

2044

s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\

sys/netbt/l2cap_signal.c

1065

l2cap_cfg_opt_val_t *val;

sys/netbt/l2cap_signal.c

1086

val = (l2cap_cfg_opt_val_t *)(opt + 1);

sys/netbt/l2cap_signal.c

1087

val->mtu = htole16(chan->lc_imtu);

sys/netbt/l2cap_signal.c

1098

val = (l2cap_cfg_opt_val_t *)(opt + 1);

sys/netbt/l2cap_signal.c

1099

val->flush_timo = htole16(chan->lc_flush);

sys/netbt/l2cap_signal.c

417

l2cap_cfg_opt_val_t val;

sys/netbt/l2cap_signal.c

485

m_copydata(m, 0, L2CAP_OPT_MTU_SIZE, &val);

sys/netbt/l2cap_signal.c

486

val.mtu = letoh16(val.mtu);

sys/netbt/l2cap_signal.c

494

if (val.mtu < L2CAP_MTU_MINIMUM) {

sys/netbt/l2cap_signal.c

501

val.mtu = htole16(L2CAP_MTU_MINIMUM);

sys/netbt/l2cap_signal.c

502

memcpy(buf + len, &val, L2CAP_OPT_MTU_SIZE);

sys/netbt/l2cap_signal.c

505

chan->lc_omtu = val.mtu;

sys/netbt/l2cap_signal.c

531

m_copydata(m, 0, L2CAP_OPT_QOS_SIZE, &val);

sys/netbt/l2cap_signal.c

532

if (val.qos.service_type == L2CAP_QOS_NO_TRAFFIC ||

sys/netbt/l2cap_signal.c

533

val.qos.service_type == L2CAP_QOS_BEST_EFFORT)

sys/netbt/l2cap_signal.c

543

if (val.qos.service_type != L2CAP_QOS_GUARANTEED) {

sys/netbt/l2cap_signal.c

561

val.qos.service_type = L2CAP_QOS_BEST_EFFORT;

sys/netbt/l2cap_signal.c

566

memcpy(buf + len, &val, L2CAP_OPT_QOS_SIZE);

sys/netbt/l2cap_signal.c

627

l2cap_cfg_opt_val_t val;

sys/netbt/l2cap_signal.c

720

m_copydata(m, 0, L2CAP_OPT_MTU_SIZE, &val);

sys/netbt/l2cap_signal.c

721

chan->lc_imtu = letoh16(val.mtu);

sys/netgraph/ether/ng_ether.c

634

u_long val;

sys/netgraph/ether/ng_ether.c

640

val = strtoul(s + *off, &eptr, 16);

sys/netgraph/ether/ng_ether.c

641

if (val > 0xff || eptr == s + *off)

sys/netgraph/ether/ng_ether.c

643

buf[i] = (u_char)val;

sys/netgraph/ksocket/ng_ksocket.c

1236

int k, val;

sys/netgraph/ksocket/ng_ksocket.c

1247

val = (int)strtoul(s, &eptr, 10);

sys/netgraph/ksocket/ng_ksocket.c

1248

if (val < 0 || *eptr != '\0')

sys/netgraph/ksocket/ng_ksocket.c

1250

return (val);

sys/netgraph/ksocket/ng_ksocket.c

271

u_long val;

sys/netgraph/ksocket/ng_ksocket.c

274

val = strtoul(s + *off, &eptr, 10);

sys/netgraph/ksocket/ng_ksocket.c

275

if (val > 0xff || eptr == s + *off)

sys/netgraph/ksocket/ng_ksocket.c

278

((u_char *)&sin->sin_addr)[i] = (u_char)val;

sys/netgraph/ksocket/ng_ksocket.c

285

val = strtoul(s + *off, &eptr, 10);

sys/netgraph/ksocket/ng_ksocket.c

286

if (val > 0xffff || eptr == s + *off)

sys/netgraph/ksocket/ng_ksocket.c

289

sin->sin_port = htons(val);

sys/netgraph/netgraph.h

134

#define NG_NODE_SET_PRIVATE(node, val) do {(node)->private = val;} while (0)

sys/netgraph/netgraph.h

86

#define NG_HOOK_SET_PRIVATE(hook, val) do {(hook)->private = val;} while (0)

sys/netgraph/netgraph.h

87

#define NG_HOOK_SET_RCVMSG(hook, val) do {(hook)->rcvmsg = val;} while (0)

sys/netgraph/netgraph.h

88

#define NG_HOOK_SET_RCVDATA(hook, val) do {(hook)->rcvdata = val;} while (0)

sys/netgraph/netgraph/ng_base.c

648

u_long val;

sys/netgraph/netgraph/ng_base.c

656

val = strtoul(name + 1, &eptr, 16);

sys/netgraph/netgraph/ng_base.c

657

if (eptr - name != len - 1 || val == ULONG_MAX || val == 0)

sys/netgraph/netgraph/ng_base.c

659

return (ng_ID_t)val;

sys/netgraph/netgraph/ng_parse.c

335

long val;

sys/netgraph/netgraph/ng_parse.c

339

val = strtol(s + *off, &eptr, 0);

sys/netgraph/netgraph/ng_parse.c

340

if (val < (int8_t)0x80 || val > (u_int8_t)0xff || eptr == s + *off)

sys/netgraph/netgraph/ng_parse.c

343

val8 = (int8_t)val;

sys/netgraph/netgraph/ng_parse.c

355

int8_t val;

sys/netgraph/netgraph/ng_parse.c

357

bcopy(data + *off, &val, sizeof(int8_t));

sys/netgraph/netgraph/ng_parse.c

361

fval = val;

sys/netgraph/netgraph/ng_parse.c

365

fval = (u_int8_t)val;

sys/netgraph/netgraph/ng_parse.c

369

fval = (u_int8_t)val;

sys/netgraph/netgraph/ng_parse.c

383

int8_t val;

sys/netgraph/netgraph/ng_parse.c

387

val = 0;

sys/netgraph/netgraph/ng_parse.c

388

bcopy(&val, buf, sizeof(int8_t));

sys/netgraph/netgraph/ng_parse.c

428

long val;

sys/netgraph/netgraph/ng_parse.c

432

val = strtol(s + *off, &eptr, 0);

sys/netgraph/netgraph/ng_parse.c

433

if (val < (int16_t)0x8000

sys/netgraph/netgraph/ng_parse.c

434

|| val > (u_int16_t)0xffff || eptr == s + *off)

sys/netgraph/netgraph/ng_parse.c

437

val16 = (int16_t)val;

sys/netgraph/netgraph/ng_parse.c

449

int16_t val;

sys/netgraph/netgraph/ng_parse.c

451

bcopy(data + *off, &val, sizeof(int16_t));

sys/netgraph/netgraph/ng_parse.c

455

fval = val;

sys/netgraph/netgraph/ng_parse.c

459

fval = (u_int16_t)val;

sys/netgraph/netgraph/ng_parse.c

463

fval = (u_int16_t)val;

sys/netgraph/netgraph/ng_parse.c

477

int16_t val;

sys/netgraph/netgraph/ng_parse.c

481

val = 0;

sys/netgraph/netgraph/ng_parse.c

482

bcopy(&val, buf, sizeof(int16_t));

sys/netgraph/netgraph/ng_parse.c

522

long val; /* assumes long is at least 32 bits */

sys/netgraph/netgraph/ng_parse.c

526

val = strtol(s + *off, &eptr, 0);

sys/netgraph/netgraph/ng_parse.c

527

if (val < (int32_t)0x80000000

sys/netgraph/netgraph/ng_parse.c

528

|| val > (u_int32_t)0xffffffff || eptr == s + *off)

sys/netgraph/netgraph/ng_parse.c

531

val32 = (int32_t)val;

sys/netgraph/netgraph/ng_parse.c

543

int32_t val;

sys/netgraph/netgraph/ng_parse.c

545

bcopy(data + *off, &val, sizeof(int32_t));

sys/netgraph/netgraph/ng_parse.c

549

fval = val;

sys/netgraph/netgraph/ng_parse.c

553

fval = (u_int32_t)val;

sys/netgraph/netgraph/ng_parse.c

557

fval = (u_int32_t)val;

sys/netgraph/netgraph/ng_parse.c

571

int32_t val;

sys/netgraph/netgraph/ng_parse.c

575

val = 0;

sys/netgraph/netgraph/ng_parse.c

576

bcopy(&val, buf, sizeof(int32_t));

sys/netgraph/netgraph/ng_parse.c

616

quad_t val;

sys/netgraph/netgraph/ng_parse.c

620

val = strtoq(s + *off, &eptr, 0);

sys/netgraph/netgraph/ng_parse.c

624

val64 = (int64_t)val;

sys/netgraph/netgraph/ng_parse.c

636

int64_t val;

sys/netgraph/netgraph/ng_parse.c

638

bcopy(data + *off, &val, sizeof(int64_t));

sys/netgraph/netgraph/ng_parse.c

642

fval = val;

sys/netgraph/netgraph/ng_parse.c

646

fval = (u_int64_t)val;

sys/netgraph/netgraph/ng_parse.c

650

fval = (u_int64_t)val;

sys/netgraph/netgraph/ng_parse.c

664

int64_t val;

sys/netgraph/netgraph/ng_parse.c

668

val = 0;

sys/netgraph/netgraph/ng_parse.c

669

bcopy(&val, buf, sizeof(int64_t));

sys/netgraph/pppoe/ng_pppoe.c

182

int val;

sys/netgraph/pppoe/ng_pppoe.c

184

val = pppoe_mode;

sys/netgraph/pppoe/ng_pppoe.c

185

error = sysctl_handle_int(oidp, &val, 0, req);

sys/netgraph/pppoe/ng_pppoe.c

188

switch (val) {

sys/netgraph/pppoe/ng_pppoe.c

238

u_int16_t val;

sys/netgraph/pppoe/ng_pppoe.c

243

val = pppoe_sid++;

sys/netgraph/pppoe/ng_pppoe.c

248

if (val == 0xffff) {

sys/netgraph/pppoe/ng_pppoe.c

260

if (sp->Session_ID == val)

sys/netgraph/pppoe/ng_pppoe.c

264

return val;

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

217

u_int16_t val; \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

222

o->hdr.length = sizeof(o->val); \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

223

o->val = htole16(*(u_int16_t *)(_mtu)); \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

232

u_int16_t val; \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

237

o->hdr.length = sizeof(o->val); \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

238

o->val = htole16(*(u_int16_t *)(_flush_timo)); \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

247

ng_l2cap_flow_t val; \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

252

o->hdr.length = sizeof(o->val); \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

253

o->val.flags = ((ng_l2cap_flow_p)(_flow))->flags; \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

254

o->val.service_type = ((ng_l2cap_flow_p) \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

256

o->val.token_rate = \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

258

o->val.token_bucket_size = \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

261

o->val.peak_bandwidth = \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

264

o->val.latency = htole32(((ng_l2cap_flow_p) \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_cmds.h

266

o->val.delay_variation = \

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1267

ng_l2cap_cfg_opt_val_p val)

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1288

m_copydata(m, *off, NG_L2CAP_OPT_MTU_SIZE, val);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1289

val->mtu = le16toh(val->mtu);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1298

m_copydata(m, *off, NG_L2CAP_OPT_FLUSH_TIMO_SIZE, val);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1299

val->flush_timo = le16toh(val->flush_timo);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1307

m_copydata(m, *off, NG_L2CAP_OPT_QOS_SIZE, val);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1308

val->flow.token_rate = le32toh(val->flow.token_rate);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1309

val->flow.token_bucket_size =

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1310

le32toh(val->flow.token_bucket_size);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1311

val->flow.peak_bandwidth = le32toh(val->flow.peak_bandwidth);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1312

val->flow.latency = le32toh(val->flow.latency);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

1313

val->flow.delay_variation = le32toh(val->flow.delay_variation);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

529

ng_l2cap_cfg_opt_val_t val;

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

568

error = get_next_l2cap_opt(m, &off, &hdr, &val);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

575

ch->omtu = val.mtu;

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

579

ch->flush_timo = val.flush_timo;

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

583

bcopy(&val.flow, &ch->iflow, sizeof(ch->iflow));

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

663

ng_l2cap_cfg_opt_val_t val;

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

725

error = get_next_l2cap_opt(m, &off, &hdr, &val);

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

731

cmd->ch->imtu = val.mtu;

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

735

cmd->ch->flush_timo = val.flush_timo;

sys/netgraph7/bluetooth/l2cap/ng_l2cap_evnt.c

739

bcopy(&val.flow, &cmd->ch->oflow,

sys/netgraph7/ksocket/ng_ksocket.c

1268

int k, val;

sys/netgraph7/ksocket/ng_ksocket.c

1279

val = (int)strtoul(s, &eptr, 10);

sys/netgraph7/ksocket/ng_ksocket.c

1280

if (val < 0 || *eptr != '\0')

sys/netgraph7/ksocket/ng_ksocket.c

1282

return (val);

sys/netgraph7/ksocket/ng_ksocket.c

273

u_long val;

sys/netgraph7/ksocket/ng_ksocket.c

276

val = strtoul(s + *off, &eptr, 10);

sys/netgraph7/ksocket/ng_ksocket.c

277

if (val > 0xff || eptr == s + *off)

sys/netgraph7/ksocket/ng_ksocket.c

280

((u_char *)&sin->sin_addr)[i] = (u_char)val;

sys/netgraph7/ksocket/ng_ksocket.c

287

val = strtoul(s + *off, &eptr, 10);

sys/netgraph7/ksocket/ng_ksocket.c

288

if (val > 0xffff || eptr == s + *off)

sys/netgraph7/ksocket/ng_ksocket.c

291

sin->sin_port = htons(val);

sys/netgraph7/netgraph.h

144

#define _NG_HOOK_SET_PRIVATE(hook, val) do {(hook)->hk_private = val;} while (0)

sys/netgraph7/netgraph.h

145

#define _NG_HOOK_SET_RCVMSG(hook, val) do {(hook)->hk_rcvmsg = val;} while (0)

sys/netgraph7/netgraph.h

146

#define _NG_HOOK_SET_RCVDATA(hook, val) do {(hook)->hk_rcvdata = val;} while (0)

sys/netgraph7/netgraph.h

170

void * val, char * file, int line);

sys/netgraph7/netgraph.h

172

ng_rcvmsg_t *val, char * file, int line);

sys/netgraph7/netgraph.h

174

ng_rcvdata_t *val, char * file, int line);

sys/netgraph7/netgraph.h

217

_ng_hook_set_private(hook_p hook, void *val, char * file, int line)

sys/netgraph7/netgraph.h

220

_NG_HOOK_SET_PRIVATE(hook, val);

sys/netgraph7/netgraph.h

224

_ng_hook_set_rcvmsg(hook_p hook, ng_rcvmsg_t *val, char * file, int line)

sys/netgraph7/netgraph.h

227

_NG_HOOK_SET_RCVMSG(hook, val);

sys/netgraph7/netgraph.h

231

_ng_hook_set_rcvdata(hook_p hook, ng_rcvdata_t *val, char * file, int line)

sys/netgraph7/netgraph.h

234

_NG_HOOK_SET_RCVDATA(hook, val);

sys/netgraph7/netgraph.h

297

#define NG_HOOK_SET_PRIVATE(hook, val) _ng_hook_set_private(hook, val, _NN_)

sys/netgraph7/netgraph.h

298

#define NG_HOOK_SET_RCVMSG(hook, val) _ng_hook_set_rcvmsg(hook, val, _NN_)

sys/netgraph7/netgraph.h

299

#define NG_HOOK_SET_RCVDATA(hook, val) _ng_hook_set_rcvdata(hook, val, _NN_)

sys/netgraph7/netgraph.h

314

#define NG_HOOK_SET_PRIVATE(hook, val) _NG_HOOK_SET_PRIVATE(hook, val)

sys/netgraph7/netgraph.h

315

#define NG_HOOK_SET_RCVMSG(hook, val) _NG_HOOK_SET_RCVMSG(hook, val)

sys/netgraph7/netgraph.h

316

#define NG_HOOK_SET_RCVDATA(hook, val) _NG_HOOK_SET_RCVDATA(hook, val)

sys/netgraph7/netgraph.h

379

#define _NG_NODE_SET_PRIVATE(node, val) do {(node)->nd_private = val;} while (0)

sys/netgraph7/netgraph.h

419

static __inline void _ng_node_set_private(node_p node, void * val,

sys/netgraph7/netgraph.h

477

_ng_node_set_private(node_p node, void * val, char *file, int line)

sys/netgraph7/netgraph.h

480

_NG_NODE_SET_PRIVATE(node, val);

sys/netgraph7/netgraph.h

554

#define NG_NODE_SET_PRIVATE(node, val) _ng_node_set_private(node, val, _NN_)

sys/netgraph7/netgraph.h

575

#define NG_NODE_SET_PRIVATE(node, val) _NG_NODE_SET_PRIVATE(node, val)

sys/netgraph7/netgraph/ng_base.c

2930

int val;

sys/netgraph7/netgraph/ng_base.c

2932

val = allocated;

sys/netgraph7/netgraph/ng_base.c

2933

error = sysctl_handle_int(oidp, &val, 0, req);

sys/netgraph7/netgraph/ng_base.c

2936

if (val == 42) {

sys/netgraph7/netgraph/ng_base.c

908

u_long val;

sys/netgraph7/netgraph/ng_base.c

919

val = strtoul(name + 1, &eptr, 16);

sys/netgraph7/netgraph/ng_base.c

921

|| (val == ULONG_MAX)

sys/netgraph7/netgraph/ng_base.c

922

|| (val == 0)) {

sys/netgraph7/netgraph/ng_base.c

925

return (ng_ID_t)val;

sys/netgraph7/netgraph/ng_parse.c

1032

u_long val;

sys/netgraph7/netgraph/ng_parse.c

1038

val = strtoul(s + *off, &eptr, 16);

sys/netgraph7/netgraph/ng_parse.c

1039

if (val > 0xff || eptr == s + *off)

sys/netgraph7/netgraph/ng_parse.c

1041

buf[i] = (u_char)val;

sys/netgraph7/netgraph/ng_parse.c

337

long val;

sys/netgraph7/netgraph/ng_parse.c

341

val = strtol(s + *off, &eptr, 0);

sys/netgraph7/netgraph/ng_parse.c

342

if (val < (int8_t)0x80 || val > (u_int8_t)0xff || eptr == s + *off)

sys/netgraph7/netgraph/ng_parse.c

345

val8 = (int8_t)val;

sys/netgraph7/netgraph/ng_parse.c

358

int8_t val;

sys/netgraph7/netgraph/ng_parse.c

360

bcopy(data + *off, &val, sizeof(int8_t));

sys/netgraph7/netgraph/ng_parse.c

364

fval = val;

sys/netgraph7/netgraph/ng_parse.c

368

fval = (u_int8_t)val;

sys/netgraph7/netgraph/ng_parse.c

372

fval = (u_int8_t)val;

sys/netgraph7/netgraph/ng_parse.c

390

int8_t val;

sys/netgraph7/netgraph/ng_parse.c

394

val = 0;

sys/netgraph7/netgraph/ng_parse.c

395

bcopy(&val, buf, sizeof(int8_t));

sys/netgraph7/netgraph/ng_parse.c

435

long val;

sys/netgraph7/netgraph/ng_parse.c

439

val = strtol(s + *off, &eptr, 0);

sys/netgraph7/netgraph/ng_parse.c

440

if (val < (int16_t)0x8000

sys/netgraph7/netgraph/ng_parse.c

441

|| val > (u_int16_t)0xffff || eptr == s + *off)

sys/netgraph7/netgraph/ng_parse.c

444

val16 = (int16_t)val;

sys/netgraph7/netgraph/ng_parse.c

457

int16_t val;

sys/netgraph7/netgraph/ng_parse.c

459

bcopy(data + *off, &val, sizeof(int16_t));

sys/netgraph7/netgraph/ng_parse.c

463

fval = val;

sys/netgraph7/netgraph/ng_parse.c

467

fval = (u_int16_t)val;

sys/netgraph7/netgraph/ng_parse.c

471

fval = (u_int16_t)val;

sys/netgraph7/netgraph/ng_parse.c

489

int16_t val;

sys/netgraph7/netgraph/ng_parse.c

493

val = 0;

sys/netgraph7/netgraph/ng_parse.c

494

bcopy(&val, buf, sizeof(int16_t));

sys/netgraph7/netgraph/ng_parse.c

534

long val; /* assumes long is at least 32 bits */

sys/netgraph7/netgraph/ng_parse.c

539

val = strtol(s + *off, &eptr, 0);

sys/netgraph7/netgraph/ng_parse.c

541

val = strtoul(s + *off, &eptr, 0);

sys/netgraph7/netgraph/ng_parse.c

542

if (val < (int32_t)0x80000000

sys/netgraph7/netgraph/ng_parse.c

543

|| val > (u_int32_t)0xffffffff || eptr == s + *off)

sys/netgraph7/netgraph/ng_parse.c

546

val32 = (int32_t)val;

sys/netgraph7/netgraph/ng_parse.c

559

int32_t val;

sys/netgraph7/netgraph/ng_parse.c

561

bcopy(data + *off, &val, sizeof(int32_t));

sys/netgraph7/netgraph/ng_parse.c

565

fval = val;

sys/netgraph7/netgraph/ng_parse.c

569

fval = (u_int32_t)val;

sys/netgraph7/netgraph/ng_parse.c

573

fval = (u_int32_t)val;

sys/netgraph7/netgraph/ng_parse.c

591

int32_t val;

sys/netgraph7/netgraph/ng_parse.c

595

val = 0;

sys/netgraph7/netgraph/ng_parse.c

596

bcopy(&val, buf, sizeof(int32_t));

sys/netgraph7/netgraph/ng_parse.c

636

quad_t val;

sys/netgraph7/netgraph/ng_parse.c

640

val = strtoq(s + *off, &eptr, 0);

sys/netgraph7/netgraph/ng_parse.c

644

val64 = (int64_t)val;

sys/netgraph7/netgraph/ng_parse.c

656

int64_t val;

sys/netgraph7/netgraph/ng_parse.c

659

bcopy(data + *off, &val, sizeof(int64_t));

sys/netgraph7/netgraph/ng_parse.c

663

fval = val;

sys/netgraph7/netgraph/ng_parse.c

667

fval = (u_int64_t)val;

sys/netgraph7/netgraph/ng_parse.c

671

fval = (u_int64_t)val;

sys/netgraph7/netgraph/ng_parse.c

689

int64_t val;

sys/netgraph7/netgraph/ng_parse.c

693

val = 0;

sys/netgraph7/netgraph/ng_parse.c

694

bcopy(&val, buf, sizeof(int64_t));

sys/netgraph7/ng_gif.c

93

#define IFP2NG_SET(ifp, val) (((struct gif_softc *)(ifp->if_softc))->gif_netgraph = (val))

sys/netgraph7/ng_source.c

845

uint32_t val;

sys/netgraph7/ng_source.c

847

val = htonl(cnt->next_val);

sys/netgraph7/ng_source.c

848

cp = (caddr_t)&val + sizeof(val) - cnt->width;

sys/netgraph7/pppoe/ng_pppoe.c

503

uint16_t val, hash;

sys/netgraph7/pppoe/ng_pppoe.c

507

val = pppoe_sid++;

sys/netgraph7/pppoe/ng_pppoe.c

509

if (val == 0xffff || val == 0x0000)

sys/netgraph7/pppoe/ng_pppoe.c

510

val = pppoe_sid = 1;

sys/netgraph7/pppoe/ng_pppoe.c

513

hash = SESSHASH(val);

sys/netgraph7/pppoe/ng_pppoe.c

516

if (tsp->Session_ID == val)

sys/netgraph7/pppoe/ng_pppoe.c

520

sp->Session_ID = val;

sys/netgraph7/pppoe/ng_pppoe.c

527

CTR2(KTR_NET, "%20s: new sid %d", __func__, val);

sys/netgraph7/pppoe/ng_pppoe.c

529

return (val);

sys/netinet/ip6.h

321

#define IP6_EXTHDR_GET(val, typ, m, off, len) \

sys/netinet/ip6.h

326

(val) = (typ)(mtod((m), caddr_t) + (off)); \

sys/netinet/ip6.h

332

(val) = (typ)(mtod(t, caddr_t) + tmp); \

sys/netinet/ip6.h

334

(val) = NULL; \

sys/netinet/ip6.h

340

#define IP6_EXTHDR_GET0(val, typ, m, off, len) \

sys/netinet/ip6.h

344

(val) = (typ)mtod(m, caddr_t); \

sys/netinet/ip6.h

350

(val) = (typ)mtod(t, caddr_t); \

sys/netinet/ip6.h

352

(val) = NULL; \

sys/netproto/802_11/wlan/ieee80211_scan_sta.c

940

match_id(const uint8_t *ie, const uint8_t *val, int len)

sys/netproto/802_11/wlan/ieee80211_scan_sta.c

942

return (ie[1] == len && memcmp(ie+2, val, len) == 0);

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

452

static __inline u16 RotR1(u16 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

454

return (val >> 1) | (val << 15);

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

457

static __inline u8 Lo8(u16 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

459

return val & 0xff;

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

462

static __inline u8 Hi8(u16 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

464

return val >> 8;

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

467

static __inline u16 Lo16(u32 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

469

return val & 0xffff;

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

472

static __inline u16 Hi16(u32 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

474

return val >> 16;

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

727

static __inline u32 rotl(u32 val, int bits)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

729

return (val << bits) | (val >> (32 - bits));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

733

static __inline u32 rotr(u32 val, int bits)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

735

return (val >> bits) | (val << (32 - bits));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

739

static __inline u32 xswap(u32 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

741

return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);

sys/netproto/smb/smb_trantcp.c

85

nb_setsockopt_int(struct socket *so, int level, int name, int val)

sys/netproto/smb/smb_trantcp.c

92

sopt.sopt_val = &val;

sys/netproto/smb/smb_trantcp.c

93

sopt.sopt_valsize = sizeof(val);

sys/platform/pc64/acpica/acpi_pstate_machdep.c

632

acpi_pst_md_res_write(const struct acpi_pst_res *res, uint32_t val)

sys/platform/pc64/acpica/acpi_pstate_machdep.c

642

bus_space_write_1(res->pr_bt, res->pr_bh, reg, val);

sys/platform/pc64/acpica/acpi_pstate_machdep.c

645

bus_space_write_2(res->pr_bt, res->pr_bh, reg, val);

sys/platform/pc64/acpica/acpi_pstate_machdep.c

648

bus_space_write_4(res->pr_bt, res->pr_bh, reg, val);

sys/platform/pc64/apic/lapic.c

1000

tsc_deadlines[mycpuid].downcount_time = val;

sys/platform/pc64/apic/lapic.c

1024

uint64_t val;

sys/platform/pc64/apic/lapic.c

1029

val = tsc_deadlines[mycpuid].downcount_time;

sys/platform/pc64/apic/lapic.c

1031

if (val == 0 || now > val) {

sys/platform/pc64/apic/lapic.c

1034

val -= now;

sys/platform/pc64/apic/lapic.c

1035

val *= 1000000;

sys/platform/pc64/apic/lapic.c

1036

val += (tsc_frequency - 1);

sys/platform/pc64/apic/lapic.c

1037

val /= tsc_frequency;

sys/platform/pc64/apic/lapic.c

1038

if (val > INT_MAX)

sys/platform/pc64/apic/lapic.c

1039

val = INT_MAX;

sys/platform/pc64/apic/lapic.c

1040

return val;

sys/platform/pc64/apic/lapic.c

1044

val = LAPIC_READ(ccr_timer);

sys/platform/pc64/apic/lapic.c

1045

if (val == 0)

sys/platform/pc64/apic/lapic.c

1049

val *= 1000000;

sys/platform/pc64/apic/lapic.c

1050

val += (lapic_cputimer_intr.freq - 1);

sys/platform/pc64/apic/lapic.c

1051

val /= lapic_cputimer_intr.freq;

sys/platform/pc64/apic/lapic.c

1052

if (val > INT_MAX)

sys/platform/pc64/apic/lapic.c

1053

val = INT_MAX;

sys/platform/pc64/apic/lapic.c

1054

return val;

sys/platform/pc64/apic/lapic.c

463

uint64_t val = rdtsc() + diff;

sys/platform/pc64/apic/lapic.c

465

wrmsr(MSR_TSC_DEADLINE, val);

sys/platform/pc64/apic/lapic.c

466

tsc_deadlines[mycpuid].timestamp = val;

sys/platform/pc64/apic/lapic.c

472

uint64_t val;

sys/platform/pc64/apic/lapic.c

474

val = value;

sys/platform/pc64/apic/lapic.c

475

val *= tsc_frequency;

sys/platform/pc64/apic/lapic.c

476

val += (scale - 1);

sys/platform/pc64/apic/lapic.c

477

val /= scale;

sys/platform/pc64/apic/lapic.c

478

return val;

sys/platform/pc64/apic/lapic.c

587

uint32_t val;

sys/platform/pc64/apic/lapic.c

593

val = LAPIC_READ(ccr_timer);

sys/platform/pc64/apic/lapic.c

597

val = LAPIC_READ(ccr_timer);

sys/platform/pc64/apic/lapic.c

668

uint64_t diff, now, val;

sys/platform/pc64/apic/lapic.c

683

val = now + diff;

sys/platform/pc64/apic/lapic.c

686

if (deadline == 0 || now > deadline || val < deadline) {

sys/platform/pc64/apic/lapic.c

687

wrmsr(MSR_TSC_DEADLINE, val);

sys/platform/pc64/apic/lapic.c

688

tsc_deadlines[mycpuid].timestamp = val;

sys/platform/pc64/apic/lapic.c

692

wrmsr(MSR_TSC_DEADLINE, val);

sys/platform/pc64/apic/lapic.c

693

tsc_deadlines[mycpuid].timestamp = val;

sys/platform/pc64/apic/lapic.c

995

uint64_t val;

sys/platform/pc64/apic/lapic.c

997

val = lapic_scale_to_tsc(us, 1000000);

sys/platform/pc64/apic/lapic.c

998

val += rdtsc();

sys/platform/pc64/apic/lapic.h

101

#define LAPIC_MEM_WRITE(field, val) \

sys/platform/pc64/apic/lapic.h

103

lapic_mem->field = (val); \

sys/platform/pc64/apic/lapic.h

107

#define LAPIC_MSR_WRITE(msr, val) wrmsr((msr), (val))

sys/platform/pc64/apic/lapic.h

113

#define LAPIC_WRITE(field, val) \

sys/platform/pc64/apic/lapic.h

116

LAPIC_MSR_WRITE(LAPIC2MSR(field), (val)); \

sys/platform/pc64/apic/lapic.h

118

LAPIC_MEM_WRITE(field, (val)); \

sys/platform/pc64/include/bootinfo.h

89

#define B_SLICE(val) (((val)>>B_SLICESHIFT) & B_SLICEMASK)

sys/platform/pc64/include/bootinfo.h

92

#define B_UNIT(val) (((val) >> B_UNITSHIFT) & B_UNITMASK)

sys/platform/pc64/include/bootinfo.h

95

#define B_PARTITION(val) (((val) >> B_PARTITIONSHIFT) & B_PARTITIONMASK)

sys/platform/pc64/include/bootinfo.h

98

#define B_TYPE(val) (((val) >> B_TYPESHIFT) & B_TYPEMASK)

sys/platform/pc64/include/clock.h

54

int rtcin (int val);

sys/platform/pc64/isa/clock.c

532

u_char val;

sys/platform/pc64/isa/clock.c

537

val = inb(IO_RTC + 1);

sys/platform/pc64/isa/clock.c

540

return (val);

sys/platform/pc64/isa/clock.c

544

writertc(u_char reg, u_char val)

sys/platform/pc64/isa/clock.c

550

outb(IO_RTC + 1, val);

sys/platform/pc64/isa/clock.c

772

sysclock_t val;

sys/platform/pc64/isa/clock.c

783

val = sys_cputimer->count();

sys/platform/pc64/isa/clock.c

790

*time = val;

sys/platform/pc64/x86_64/amd64_mem.c

124

amd64_mtrr2mrt(int val)

sys/platform/pc64/x86_64/amd64_mem.c

127

if (val < 0 || val >= MTRRTOMRTLEN)

sys/platform/pc64/x86_64/amd64_mem.c

129

return (amd64_mtrrtomrt[val]);

sys/platform/pc64/x86_64/amd64_mem.c

267

int val;

sys/platform/pc64/x86_64/amd64_mem.c

269

if ((val = amd64_mtrrtype(flags)) == -1)

sys/platform/pc64/x86_64/amd64_mem.c

271

return (val & 0xff);

sys/platform/pc64/x86_64/autoconf.c

278

int len, val;

sys/platform/pc64/x86_64/autoconf.c

287

if ((ksscanf(cp, "%2x", &val) != 1) || (val > 0xff))

sys/platform/pc64/x86_64/autoconf.c

289

*(fh++) = val;

sys/platform/pc64/x86_64/cpufreq_machdep.c

100

val = 0;

sys/platform/pc64/x86_64/cpufreq_machdep.c

101

AMD0F_WRITE_FIDVID(cfid, val, 0ULL);

sys/platform/pc64/x86_64/cpufreq_machdep.c

129

val = cfid + 2;

sys/platform/pc64/x86_64/cpufreq_machdep.c

131

val = AMD0F_FID2VCO(cfid) + 2;

sys/platform/pc64/x86_64/cpufreq_machdep.c

134

val = cfid - 2;

sys/platform/pc64/x86_64/cpufreq_machdep.c

136

AMD0F_WRITE_FIDVID(val, cvid,

sys/platform/pc64/x86_64/cpufreq_machdep.c

70

uint32_t val, cfid, cvid;

sys/platform/pc64/x86_64/cpufreq_machdep.c

98

val = cvid - (1 << xsit->mvs);

sys/platform/pc64/x86_64/efirt.c

644

int error, val;

sys/platform/pc64/x86_64/efirt.c

646

val = 0;

sys/platform/pc64/x86_64/efirt.c

647

error = sysctl_handle_int(oidp, &val, 0, req);

sys/platform/pc64/x86_64/identcpu.c

1327

uint64_t val;

sys/platform/pc64/x86_64/identcpu.c

1330

val = rdmsr(true_msr);

sys/platform/pc64/x86_64/identcpu.c

1332

val = rdmsr(msr);

sys/platform/pc64/x86_64/identcpu.c

1335

return (u_int)(val >> 32);

sys/platform/pc64/x86_64/initcpu.c

103

val = regs[0];

sys/platform/pc64/x86_64/initcpu.c

104

if (val >= 0xc0000001) {

sys/platform/pc64/x86_64/initcpu.c

106

val = regs[3];

sys/platform/pc64/x86_64/initcpu.c

108

val = 0;

sys/platform/pc64/x86_64/initcpu.c

111

if (val & VIA_CPUID_HAS_RNG) {

sys/platform/pc64/x86_64/initcpu.c

112

if (!(val & VIA_CPUID_DO_RNG)) {

sys/platform/pc64/x86_64/initcpu.c

120

if (val & VIA_CPUID_HAS_ACE) {

sys/platform/pc64/x86_64/initcpu.c

121

if (!(val & VIA_CPUID_DO_ACE)) {

sys/platform/pc64/x86_64/initcpu.c

129

if (val & VIA_CPUID_HAS_ACE2) {

sys/platform/pc64/x86_64/initcpu.c

130

if (!(val & VIA_CPUID_DO_ACE2)) {

sys/platform/pc64/x86_64/initcpu.c

138

if (val & VIA_CPUID_HAS_PHE) {

sys/platform/pc64/x86_64/initcpu.c

139

if (!(val & VIA_CPUID_DO_PHE)) {

sys/platform/pc64/x86_64/initcpu.c

147

if (val & VIA_CPUID_HAS_PMM) {

sys/platform/pc64/x86_64/initcpu.c

148

if (!(val & VIA_CPUID_DO_PMM)) {

sys/platform/pc64/x86_64/initcpu.c

99

u_int regs[4], val;

sys/platform/pc64/x86_64/machdep.c

3733

uint32_t val;

sys/platform/pc64/x86_64/machdep.c

3735

val = atomic_fetchadd_32(&cpu_mwait_inhibit_deep_sleep, set ? 1 : -1);

sys/platform/pc64/x86_64/machdep.c

3743

if ((set && val == 0) || (!set && val == 1))

sys/platform/pc64/x86_64/machdep.c

535

u_long val = 0;

sys/platform/pc64/x86_64/machdep.c

539

val += cpu_idle_stats[cpu].halt;

sys/platform/pc64/x86_64/machdep.c

542

val += cpu_idle_stats[cpu].spin;

sys/platform/pc64/x86_64/machdep.c

547

val += cpu_idle_stats[cpu].mwait_cx[idx];

sys/platform/pc64/x86_64/machdep.c

550

error = sysctl_handle_quad(oidp, &val, 0, req);

sys/platform/pc64/x86_64/machdep.c

557

cpu_idle_stats[0].halt = val;

sys/platform/pc64/x86_64/machdep.c

561

cpu_idle_stats[0].spin = val;

sys/platform/pc64/x86_64/machdep.c

567

cpu_idle_stats[0].mwait_cx[idx] = val;

sys/platform/pc64/x86_64/pmap.c

6318

int val = 0;

sys/platform/pc64/x86_64/pmap.c

6325

val = MINCORE_INCORE;

sys/platform/pc64/x86_64/pmap.c

6336

val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;

sys/platform/pc64/x86_64/pmap.c

6342

val |= MINCORE_MODIFIED_OTHER;

sys/platform/pc64/x86_64/pmap.c

6348

val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;

sys/platform/pc64/x86_64/pmap.c

6351

val |= MINCORE_REFERENCED_OTHER;

sys/platform/pc64/x86_64/pmap.c

6355

return val;

sys/platform/vkernel64/platform/copyio.c

123

swapu64(volatile uint64_t *p, uint64_t val)

sys/platform/vkernel64/platform/copyio.c

145

val);

sys/platform/vkernel64/platform/copyio.c

155

swapu32(volatile uint32_t *p, uint32_t val)

sys/platform/vkernel64/platform/copyio.c

177

val);

sys/platform/vkernel64/platform/copyio.c

187

fuwordadd64(volatile uint64_t *p, uint64_t val)

sys/platform/vkernel64/platform/copyio.c

209

val);

sys/platform/vkernel64/platform/copyio.c

219

fuwordadd32(volatile uint32_t *p, uint32_t val)

sys/platform/vkernel64/platform/copyio.c

241

val);

sys/platform/vkernel64/platform/pmap.c

3163

int val = 0;

sys/platform/vkernel64/platform/pmap.c

3171

val = MINCORE_INCORE;

sys/platform/vkernel64/platform/pmap.c

3183

val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;

sys/platform/vkernel64/platform/pmap.c

3188

val |= MINCORE_MODIFIED_OTHER;

sys/platform/vkernel64/platform/pmap.c

3193

val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;

sys/platform/vkernel64/platform/pmap.c

3199

val |= MINCORE_REFERENCED_OTHER;

sys/platform/vkernel64/platform/pmap.c

3206

return val;

sys/platform/vkernel64/x86_64/autoconf.c

355

int len, val;

sys/platform/vkernel64/x86_64/autoconf.c

364

if ((ksscanf(cp, "%2x", &val) != 1) || (val > 0xff))

sys/platform/vkernel64/x86_64/autoconf.c

366

*(fh++) = val;

sys/sys/_termios.h

233

#define CCEQ(val, c) ((c) == (val) ? (val) != _POSIX_VDISABLE : 0)

sys/sys/diskslice.h

250

u_int32_t val;

sys/sys/diskslice.h

252

val = ((unit & 0x001f) << 3) | ((unit & 0x01e0) << 16) |

sys/sys/diskslice.h

256

return(val);

sys/sys/diskslice.h

320

u_int32_t val = minor(dev);

sys/sys/diskslice.h

322

val = ((val >> 3) & 0x001f) | ((val >> 16) & 0x01e0);

sys/sys/diskslice.h

323

return((int)val);

sys/sys/diskslice.h

329

u_int32_t val = minor(dev);

sys/sys/diskslice.h

331

val = ((val >> 16) & 0x000f) | ((val >> 25) & 0x0070);

sys/sys/diskslice.h

332

return(val);

sys/sys/diskslice.h

338

u_int32_t val = minor(dev);

sys/sys/diskslice.h

340

val = (val & 0x0007) | ((val >> 17) & 0x0008) | ((val >> 21) & 0x00f0);

sys/sys/diskslice.h

341

return(val);

sys/sys/exislock2.h

106

long val = xlk->pseudo_ticks;

sys/sys/exislock2.h

109

if (val == 0)

sys/sys/exislock2.h

110

return val;

sys/sys/exislock2.h

111

return (val - pseudo_ticks);

sys/sys/exislock2.h

126

long val = xlk->pseudo_ticks;

sys/sys/exislock2.h

129

if (val == 0)

sys/sys/exislock2.h

131

val = val - pseudo_ticks;

sys/sys/exislock2.h

132

if (val >= 0)

sys/sys/exislock2.h

134

if (val >= -2)

sys/sys/exislock2.h

173

long val = xlk->pseudo_ticks;

sys/sys/exislock2.h

177

if (val)

sys/sys/exislock2.h

178

val = val - pticks;

sys/sys/exislock2.h

179

if (val >= -1) {

sys/sys/imgact_elf.h

39

#define AUXARGS_ENTRY(pos, id, val) {suword64(pos++, id); suword64(pos++, val);}

sys/sys/mount.h

71

typedef struct fsid { int32_t val[2]; } fsid_t; /* file system id type */

sys/sys/pioctl.h

50

unsigned long val; /* Any extra data */

sys/sys/sem.h

76

int val; /* value for SETVAL */

sys/sys/sensors.h

210

sensor_set(struct ksensor *sens, int64_t val, enum sensor_status status)

sys/sys/sensors.h

214

sens->value = val;

sys/sys/sysctl.h

277

#define SYSCTL_INT(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

280

ptr, val, sysctl_handle_int, "I", descr)

sys/sys/sysctl.h

282

#define SYSCTL_ADD_INT(ctx, parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

285

ptr, val, sysctl_handle_int, "I", descr)

sys/sys/sysctl.h

288

#define SYSCTL_QUAD(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

291

ptr, val, sysctl_handle_quad, "Q", descr)

sys/sys/sysctl.h

293

#define SYSCTL_ADD_QUAD(ctx, parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

296

ptr, val, sysctl_handle_quad, "Q", descr)

sys/sys/sysctl.h

299

#define SYSCTL_UQUAD(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

302

ptr, val, sysctl_handle_quad, "QU", descr)

sys/sys/sysctl.h

304

#define SYSCTL_ADD_UQUAD(ctx, parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

307

ptr, val, sysctl_handle_quad, "QU", descr)

sys/sys/sysctl.h

310

#define SYSCTL_UINT(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

313

ptr, val, sysctl_handle_int, "IU", descr)

sys/sys/sysctl.h

315

#define SYSCTL_ADD_UINT(ctx, parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

318

ptr, val, sysctl_handle_int, "IU", descr)

sys/sys/sysctl.h

321

#define SYSCTL_LONG(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

324

ptr, val, sysctl_handle_long, "L", descr)

sys/sys/sysctl.h

332

#define SYSCTL_ULONG(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

335

ptr, val, sysctl_handle_long, "LU", descr)

sys/sys/sysctl.h

343

#define SYSCTL_S8(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

345

ptr, val, sysctl_handle_8, "C", descr)

sys/sys/sysctl.h

352

#define SYSCTL_S16(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

354

ptr, val, sysctl_handle_16, "S", descr)

sys/sys/sysctl.h

361

#define SYSCTL_S32(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

363

ptr, val, sysctl_handle_32, "I", descr)

sys/sys/sysctl.h

370

#define SYSCTL_S64(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

372

ptr, val, sysctl_handle_64, "Q", descr)

sys/sys/sysctl.h

379

#define SYSCTL_U8(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

381

ptr, val, sysctl_handle_8, "CU", descr)

sys/sys/sysctl.h

388

#define SYSCTL_U16(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

390

ptr, val, sysctl_handle_16, "SU", descr)

sys/sys/sysctl.h

397

#define SYSCTL_U32(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

399

ptr, val, sysctl_handle_32, "IU", descr)

sys/sys/sysctl.h

406

#define SYSCTL_U64(parent, nbr, name, access, ptr, val, descr) \

sys/sys/sysctl.h

408

ptr, val, sysctl_handle_64, "QU", descr)

sys/sys/sysctl.h

416

#define SYSCTL_BIT32(parent, nbr, name, access, ptr, val, bit, descr) \

sys/sys/sysctl.h

419

ptr, val, sysctl_handle_bit32, "I", descr)

sys/sys/sysctl.h

421

#define SYSCTL_ADD_BIT32(ctx, parent, nbr, name, access, ptr, val, bit, descr) \

sys/sys/sysctl.h

424

ptr, val, sysctl_handle_bit32, "I", descr)

sys/sys/sysctl.h

428

#define SYSCTL_BIT64(parent, nbr, name, access, ptr, val, bit, descr) \

sys/sys/sysctl.h

431

ptr, val, sysctl_handle_bit64, "I", descr)

sys/sys/sysctl.h

433

#define SYSCTL_ADD_BIT64(ctx, parent, nbr, name, access, ptr, val, bit, descr) \

sys/sys/sysctl.h

436

ptr, val, sysctl_handle_bit64, "I", descr)

sys/sys/sysproto.h

356

caddr_t val; char val_[PAD_(caddr_t)];

sys/sys/sysproto.h

375

caddr_t val; char val_[PAD_(caddr_t)];

sys/sys/systm.h

318

uint32_t swapu32(volatile uint32_t *p, uint32_t val);

sys/sys/systm.h

319

uint64_t swapu64(volatile uint64_t *p, uint64_t val);

sys/sys/systm.h

320

uint32_t fuwordadd32(volatile uint32_t *p, uint32_t val);

sys/sys/systm.h

321

uint64_t fuwordadd64(volatile uint64_t *p, uint64_t val);

sys/sys/tree.h

155

name##_SPLAY_MIN_MAX(struct name *head, int val) \

sys/sys/tree.h

157

name##_SPLAY_MINMAX(head, val); \

sys/sys/tree.h

858

name##_RB_MINMAX(struct name *head, int val) \

sys/sys/tree.h

864

if (val < 0) \

sys/sys/udev.h

49

int udev_dict_set_int(cdev_t dev, const char *key, int64_t val);

sys/sys/udev.h

50

int udev_dict_set_uint(cdev_t dev, const char *key, uint64_t val);

sys/vfs/autofs/autofs_vnops.c

126

vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/devfs/devfs_vnops.c

1417

sb->st_dev = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/devfs/devfs_vnops.c

581

vap->va_fsid = ap->a_vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/dirfs/dirfs_vnops.c

418

vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/ext2fs/ext2_alloc.c

510

e2fs_gd_set_nbfree(struct ext2_gd *gd, uint32_t val)

sys/vfs/ext2fs/ext2_alloc.c

513

gd->ext2bgd_nbfree = htole16(val & 0xffff);

sys/vfs/ext2fs/ext2_alloc.c

514

gd->ext4bgd_nbfree_hi = htole16(val >> 16);

sys/vfs/ext2fs/ext2_alloc.c

526

e2fs_gd_set_nifree(struct ext2_gd *gd, uint32_t val)

sys/vfs/ext2fs/ext2_alloc.c

529

gd->ext2bgd_nifree = htole16(val & 0xffff);

sys/vfs/ext2fs/ext2_alloc.c

530

gd->ext4bgd_nifree_hi = htole16(val >> 16);

sys/vfs/ext2fs/ext2_alloc.c

542

e2fs_gd_set_ndirs(struct ext2_gd *gd, uint32_t val)

sys/vfs/ext2fs/ext2_alloc.c

545

gd->ext2bgd_ndirs = htole16(val & 0xffff);

sys/vfs/ext2fs/ext2_alloc.c

546

gd->ext4bgd_ndirs_hi = htole16(val >> 16);

sys/vfs/ext2fs/ext2_alloc.c

557

e2fs_gd_set_i_unused(struct ext2_gd *gd, uint32_t val)

sys/vfs/ext2fs/ext2_alloc.c

560

gd->ext4bgd_i_unused = htole16(val & 0xffff);

sys/vfs/ext2fs/ext2_alloc.c

561

gd->ext4bgd_i_unused_hi = htole16(val >> 16);

sys/vfs/ext2fs/ext2_hash.c

187

int val, i;

sys/vfs/ext2fs/ext2_hash.c

191

val = (u_int)*uname++;

sys/vfs/ext2fs/ext2_hash.c

193

val = (int)*sname++;

sys/vfs/ext2fs/ext2_hash.c

195

h0 = h2 + (h1 ^ (val * multi));

sys/vfs/ext2fs/ext2_vfsops.c

978

mp->mnt_stat.f_fsid.val[0] = devid_from_dev(dev);

sys/vfs/ext2fs/ext2_vfsops.c

979

mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;

sys/vfs/fuse/fuse_vnops.c

66

vap->va_fsid = fnp->fmp->mp->mnt_stat.f_fsid.val[0];

sys/vfs/hammer/hammer_vfsops.c

711

mp->mnt_stat.f_fsid.val[0] =

sys/vfs/hammer/hammer_vfsops.c

713

mp->mnt_stat.f_fsid.val[1] =

sys/vfs/hammer/hammer_vfsops.c

715

mp->mnt_stat.f_fsid.val[1] &= HAMMER_LOCALIZE_MASK;

sys/vfs/hammer2/hammer2_lz4.c

237

LZ4_NbCommonBytes (register U64 val)

sys/vfs/hammer2/hammer2_lz4.c

242

_BitScanReverse64( &r, val );

sys/vfs/hammer2/hammer2_lz4.c

245

return (__builtin_clzll(val) >> 3);

sys/vfs/hammer2/hammer2_lz4.c

248

if (!(val>>32)) { r=4; } else { r=0; val>>=32; }

sys/vfs/hammer2/hammer2_lz4.c

249

if (!(val>>16)) { r+=2; val>>=8; } else { val>>=24; }

sys/vfs/hammer2/hammer2_lz4.c

250

r += (!val);

sys/vfs/hammer2/hammer2_lz4.c

256

_BitScanForward64( &r, val );

sys/vfs/hammer2/hammer2_lz4.c

259

return (__builtin_ctzll(val) >> 3);

sys/vfs/hammer2/hammer2_lz4.c

269

return DeBruijnBytePos[((U64)((val & -val) * 0x0218A392CDABBD3F)) >> 58];

sys/vfs/hammer2/hammer2_lz4.c

279

LZ4_NbCommonBytes (register U32 val)

sys/vfs/hammer2/hammer2_lz4.c

284

_BitScanReverse( &r, val );

sys/vfs/hammer2/hammer2_lz4.c

287

return (__builtin_clz(val) >> 3);

sys/vfs/hammer2/hammer2_lz4.c

290

if (!(val>>16)) { r=2; val>>=8; } else { r=0; val>>=24; }

sys/vfs/hammer2/hammer2_lz4.c

291

r += (!val);

sys/vfs/hammer2/hammer2_lz4.c

297

_BitScanForward( &r, val );

sys/vfs/hammer2/hammer2_lz4.c

300

return (__builtin_ctz(val) >> 3);

sys/vfs/hammer2/hammer2_lz4.c

307

return DeBruijnBytePos[((U32)((val & -(S32)val) * 0x077CB531U)) >> 27];

sys/vfs/hammer2/hammer2_vnops.c

330

vap->va_fsid = pmp->mp->mnt_stat.f_fsid.val[0];

sys/vfs/hammer2/hammer2_vnops.c

388

vap->va_fsid = pmp->mp->mnt_stat.f_fsid.val[0];

sys/vfs/hammer2/xxhash/xxhash.c

181

U32 val;

sys/vfs/hammer2/xxhash/xxhash.c

182

memcpy(&val, memPtr, sizeof(val));

sys/vfs/hammer2/xxhash/xxhash.c

183

return val;

sys/vfs/hammer2/xxhash/xxhash.c

188

U64 val;

sys/vfs/hammer2/xxhash/xxhash.c

189

memcpy(&val, memPtr, sizeof(val));

sys/vfs/hammer2/xxhash/xxhash.c

190

return val;

sys/vfs/hammer2/xxhash/xxhash.c

420

static U64 XXH64_mergeRound(U64 acc, U64 val)

sys/vfs/hammer2/xxhash/xxhash.c

422

val = XXH64_round(0, val);

sys/vfs/hammer2/xxhash/xxhash.c

423

acc ^= val;

sys/vfs/hammer2/zlib/hammer2_zlib_inffast.c

134

Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?

sys/vfs/hammer2/zlib/hammer2_zlib_inffast.c

136

"inflate: literal 0x%02x\n", here.val));

sys/vfs/hammer2/zlib/hammer2_zlib_inffast.c

137

PUP(out) = (unsigned char)(here.val);

sys/vfs/hammer2/zlib/hammer2_zlib_inffast.c

140

len = (unsigned)(here.val);

sys/vfs/hammer2/zlib/hammer2_zlib_inffast.c

165

dist = (unsigned)(here.val);

sys/vfs/hammer2/zlib/hammer2_zlib_inffast.c

284

here = dcode[here.val + (hold & ((1U << op) - 1))];

sys/vfs/hammer2/zlib/hammer2_zlib_inffast.c

294

here = lcode[here.val + (hold & ((1U << op) - 1))];

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

331

state.lencode[low].bits, state.lencode[low].val);

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

342

state.distcode[low].val);

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

747

if (here.val < 16) {

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

749

state->lens[state->have++] = here.val;

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

752

if (here.val == 16) {

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

764

else if (here.val == 17) {

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

843

here = state->lencode[last.val +

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

853

state->length = (unsigned)here.val;

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

855

Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

857

"inflate: literal 0x%02x\n", here.val));

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

893

here = state->distcode[last.val +

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

908

state->offset = (unsigned)here.val;

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

118

here.val = (unsigned short)0;

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

219

here.val = work[sym];

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

223

here.val = base[work[sym]];

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

227

here.val = 0;

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

286

(*table)[low].val = (unsigned short)(next - *table);

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

296

here.val = (unsigned short)0;

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.h

27

unsigned short val; /* offset in table or code value */

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

215

int val = value;\

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

216

s->bi_buf |= (ush)val << s->bi_valid;\

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

218

s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\

sys/vfs/hpfs/hpfs_vfsops.c

321

mp->mnt_stat.f_fsid.val[0] = (long)devid_from_dev(dev);

sys/vfs/hpfs/hpfs_vfsops.c

322

mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;

sys/vfs/isofs/cd9660/cd9660_vfsops.c

440

mp->mnt_stat.f_fsid.val[0] = devid_from_dev(dev);

sys/vfs/isofs/cd9660/cd9660_vfsops.c

441

mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;

sys/vfs/msdosfs/msdosfs_vfsops.c

600

mp->mnt_stat.f_fsid.val[0] = devid_from_dev(dev);

sys/vfs/msdosfs/msdosfs_vfsops.c

601

mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;

sys/vfs/nfs/nfs_mountrpc.c

315

int val;

sys/vfs/nfs/nfs_mountrpc.c

318

if (((val = getdec(&p)) < 0) || (val > 255))

sys/vfs/nfs/nfs_mountrpc.c

320

ip = val << 24;

sys/vfs/nfs/nfs_mountrpc.c

324

if (((val = getdec(&p)) < 0) || (val > 255))

sys/vfs/nfs/nfs_mountrpc.c

326

ip |= (val << 16);

sys/vfs/nfs/nfs_mountrpc.c

330

if (((val = getdec(&p)) < 0) || (val > 255))

sys/vfs/nfs/nfs_mountrpc.c

332

ip |= (val << 8);

sys/vfs/nfs/nfs_mountrpc.c

336

if (((val = getdec(&p)) < 0) || (val > 255))

sys/vfs/nfs/nfs_mountrpc.c

338

ip |= val;

sys/vfs/nfs/nfs_socket.c

297

int val;

sys/vfs/nfs/nfs_socket.c

302

sopt.sopt_val = &val;

sys/vfs/nfs/nfs_socket.c

303

sopt.sopt_valsize = sizeof val;

sys/vfs/nfs/nfs_socket.c

304

val = 1;

sys/vfs/nfs/nfs_socket.c

309

int val;

sys/vfs/nfs/nfs_socket.c

314

sopt.sopt_val = &val;

sys/vfs/nfs/nfs_socket.c

315

sopt.sopt_valsize = sizeof val;

sys/vfs/nfs/nfs_socket.c

316

val = 1;

sys/vfs/nfs/nfs_socket.c

322

sopt.sopt_val = &val;

sys/vfs/nfs/nfs_socket.c

323

sopt.sopt_valsize = sizeof val;

sys/vfs/nfs/nfs_socket.c

324

val = 1;

sys/vfs/nfs/nfs_subs.c

759

vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/nfs/nfs_syscalls.c

366

int val;

sys/vfs/nfs/nfs_syscalls.c

371

sopt.sopt_val = &val;

sys/vfs/nfs/nfs_syscalls.c

372

sopt.sopt_valsize = sizeof val;

sys/vfs/nfs/nfs_syscalls.c

373

val = 1;

sys/vfs/nfs/nfs_syscalls.c

379

int val;

sys/vfs/nfs/nfs_syscalls.c

384

sopt.sopt_val = &val;

sys/vfs/nfs/nfs_syscalls.c

385

sopt.sopt_valsize = sizeof val;

sys/vfs/nfs/nfs_syscalls.c

386

val = 1;

sys/vfs/nfs/nfs_syscalls.c

392

sopt.sopt_val = &val;

sys/vfs/nfs/nfs_syscalls.c

393

sopt.sopt_valsize = sizeof val;

sys/vfs/nfs/nfs_syscalls.c

394

val = 1;

sys/vfs/ntfs/ntfs_vfsops.c

468

mp->mnt_stat.f_fsid.val[0] = devid_from_dev(dev);

sys/vfs/ntfs/ntfs_vfsops.c

469

mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;

sys/vfs/nullfs/null_vfsops.c

208

fh.fh_fsid.val[1] ^= crc32(mp->mnt_stat.f_mntfromname, size);

sys/vfs/nullfs/null_vfsops.c

212

rootvp->v_mount->mnt_stat.f_fsid.val[0],

sys/vfs/nullfs/null_vfsops.c

213

rootvp->v_mount->mnt_stat.f_fsid.val[1],

sys/vfs/nullfs/null_vfsops.c

214

fh.fh_fsid.val[0],

sys/vfs/nullfs/null_vfsops.c

215

fh.fh_fsid.val[1],

sys/vfs/procfs/procfs_vnops.c

348

psp->val = procp->p_xstat;

sys/vfs/procfs/procfs_vnops.c

354

psp->val = 0; /* Not defined values */

sys/vfs/procfs/procfs_vnops.c

390

psp->val = procp->p_xstat; /* any extra info */

sys/vfs/procfs/procfs_vnops.c

560

vap->va_fsid = ap->a_vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/smbfs/smbfs_node.c

401

va->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/tmpfs/tmpfs_vnops.c

379

vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/tmpfs/tmpfs_vnops.c

420

vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/vfs/udf/udf_vfsops.c

266

mp->mnt_stat.f_fsid.val[0] = devid_from_dev(dev);

sys/vfs/udf/udf_vfsops.c

267

mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;

sys/vfs/ufs/ffs_vfsops.c

716

mp->mnt_stat.f_fsid.val[0] = fs->fs_id[0];

sys/vfs/ufs/ffs_vfsops.c

717

mp->mnt_stat.f_fsid.val[1] = fs->fs_id[1];

sys/vfs/ufs/ufs_dirhash.c

55

#define WRAPINCR(val, limit) (((val) + 1 == (limit)) ? 0 : ((val) + 1))

sys/vfs/ufs/ufs_dirhash.c

56

#define WRAPDECR(val, limit) (((val) == 0) ? ((limit) - 1) : ((val) - 1))

test/debug/vnodeinfo.c

211

printf(" mnt_stat.f_fsid %08x %08x\n", mnt.mnt_stat.f_fsid.val[0],

test/debug/vnodeinfo.c

212

mnt.mnt_stat.f_fsid.val[1]);

test/illumos/oclo/ocloexec_verify.c

126

long long val = strtoll(argv[i], &endptr, 0);

test/illumos/oclo/ocloexec_verify.c

129

(val < 0 || val > (FD_CLOEXEC | FD_CLOFORK))) {

test/illumos/oclo/ocloexec_verify.c

134

if (!verify_flags(targ_fd, (int)val))

test/libpthread/sem_d.c

64

int val;

test/libpthread/sem_d.c

74

assert(0 == sem_getvalue(&sem_b, &val));

test/libpthread/sem_d.c

75

assert(0 == val);

test/libpthread/sem_d.c

78

assert(0 == sem_getvalue(&sem_b, &val));

test/libpthread/sem_d.c

79

assert(1 == val);

test/nvmm/demo/smallkern/main.c

258

uint32_t *reg, val;

test/nvmm/demo/smallkern/main.c

307

val = reg[LAPIC_ID/4];

test/nvmm/demo/smallkern/main.c

308

if (__SHIFTOUT(val, LAPIC_ID_MASK) == 120) {

test/nvmm/demo/toyvirt/main.c

298

uint64_t val;

test/nvmm/demo/toyvirt/main.c

308

val = APICBASE_BSP | APICBASE_EN | 0xfee00000;

test/nvmm/demo/toyvirt/main.c

310

state->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

test/nvmm/demo/toyvirt/main.c

311

state->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

test/stress/fsstress/fsstress.c

2413

char *val;

test/stress/fsstress/fsstress.c

2432

val = malloc(len + 1);

test/stress/fsstress/fsstress.c

2434

memset(val, 'x', len);

test/stress/fsstress/fsstress.c

2435

val[len] = '\0';

test/stress/fsstress/fsstress.c

2437

val[i] = '/';

test/stress/fsstress/fsstress.c

2438

e = symlink_path(val, &f) < 0 ? errno : 0;

test/stress/fsstress/fsstress.c

2442

free(val);

test/stress/stress2/lib/options.c

246

unsigned long val;

test/stress/stress2/lib/options.c

259

if (sscanf(buf, "%ld", &val) != 1)

test/stress/stress2/lib/options.c

261

return val;

test/testcases/posixipc/common/common.c

61

int val;

test/testcases/posixipc/common/common.c

63

if (sem_getvalue(id, &val) < 0) {

test/testcases/posixipc/common/common.c

67

if (val != expected) {

test/testcases/posixipc/common/common.c

69

expected, val);

test/testcases/posixipc/max_value/max_value.c

12

if (sem_getvalue(&id, &val) < 0) {

test/testcases/posixipc/max_value/max_value.c

17

if (val != SEM_VALUE_MAX) {

test/testcases/posixipc/max_value/max_value.c

18

fprintf(stderr, "value %d != SEM_VALUE_MAX", val);

test/testcases/posixipc/max_value/max_value.c

22

if (val < 0) {

test/testcases/posixipc/max_value/max_value.c

6

int val;

test/testcases/sysv/sysvsem/semtest.c

191

sun.val = 1;

test/testcases/sysv/sysvsem/semtest.c

80

int val; /* value for SETVAL */

tools/regression/usr.sbin/installer/libaura/dict2/dict2.c

79

int *val = malloc(sizeof(int));

tools/regression/usr.sbin/installer/libaura/dict2/dict2.c

82

(void *)&val, &len);

tools/regression/usr.sbin/installer/libaura/dict2/dict2.c

83

if (*val != values[i]) {

tools/regression/usr.sbin/installer/libaura/dict2/dict2.c

86

*val, i, values[i]);

tools/regression/usr.sbin/installer/libaura/dict2/dict2.c

89

printf("%s_fetch: %s=>%d\n", m2s(method), keys[i], *val);

tools/regression/usr.sbin/installer/libaura/dict2/dict2.c

90

free(val);

tools/tools/ath/athdecode/main.c

115

r->val ? "change channel" : "no channel change");

tools/tools/ath/athdecode/main.c

118

fprintf(fd, "ar%u_reset.c; line %u", state.chipnum, r->val);

tools/tools/ath/athdecode/main.c

121

if (r->val)

tools/tools/ath/athdecode/main.c

123

state.chipnum, r->val);

tools/tools/ath/athdecode/main.c

128

fprintf(fd, "ar%uChipReset, channel %u MHz", state.chipnum, r->val);

tools/tools/ath/athdecode/main.c

131

fprintf(fd, "ar%uPerCalibration, channel %u MHz", state.chipnum, r->val);

tools/tools/ath/athdecode/main.c

134

fprintf(fd, "ar%uSetChannel, channel %u MHz", state.chipnum, r->val);

tools/tools/ath/athdecode/main.c

137

switch (r->val) {

tools/tools/ath/athdecode/main.c

151

fprintf(fd, "ar%uAniReset, opmode %u", state.chipnum, r->val);

tools/tools/ath/athdecode/main.c

156

fprintf(fd, "ar%uAniPoll, listenTime %u", state.chipnum, r->val);

tools/tools/ath/athdecode/main.c

159

switch (r->val) {

tools/tools/ath/athdecode/main.c

185

fprintf(fd, "ar%uAniControl, cmd %u", state.chipnum, r->val);

tools/tools/ath/athdecode/main.c

190

fprintf(fd, "mark #%u value %u/0x%x", r->reg, r->val, r->val);

tools/tools/ath/athdecode/main.c

200

switch (r->val) {

tools/tools/ath/athdecode/main.c

265

printf("Unknown device id 0x%x\n", r->val);

tools/tools/ath/athdecode/main.c

404

fprintf(fd, "%-30s %s 0x%x", buf, r->op ? "<=" : "=>", r->val);

tools/tools/ath/athdecode/main.c

411

if (r->val & (1 << (n - 1))) {

tools/tools/ath/athprom/athprom.c

129

uint16_t off, val, oval;

tools/tools/ath/athprom/athprom.c

143

val = (uint16_t) strtoul(cp+1, NULL, 0);

tools/tools/ath/athprom/athprom.c

144

if (val == 0 && errno == EINVAL)

tools/tools/ath/athprom/athprom.c

149

off, oval, val);

tools/tools/ath/athprom/athprom.c

153

eewrite(off, val);

tools/tools/toeplitz/toeplitz.c

128

int j, b, shift, val;

tools/tools/toeplitz/toeplitz.c

153

for (val = 0; val < 256; ++val) {

tools/tools/toeplitz/toeplitz.c

158

if (val & (1 << shift))

tools/tools/toeplitz/toeplitz.c

161

cache[i][val] = res;

usr.bin/calendar/nnames.c

50

#define NNAME_INIT1(val, name) \

usr.bin/calendar/nnames.c

51

{ (val), name, sizeof(name)-1, NULL, 0, NULL, 0, NULL, 0 }

usr.bin/calendar/nnames.c

52

#define NNAME_INIT2(val, name, f_name) \

usr.bin/calendar/nnames.c

53

{ (val), name, sizeof(name)-1, f_name, sizeof(f_name)-1, \

usr.bin/chat/chat.c

1352

unsigned long val = 0;

usr.bin/chat/chat.c

1412

val = -i;

usr.bin/chat/chat.c

1414

val = i;

usr.bin/chat/chat.c

1418

val = va_arg(args, unsigned int);

usr.bin/chat/chat.c

1422

val = va_arg(args, unsigned int);

usr.bin/chat/chat.c

1426

val = (unsigned long) va_arg(args, void *);

usr.bin/chat/chat.c

1498

*--str = hexchars[val % base];

usr.bin/chat/chat.c

1499

val = val / base;

usr.bin/chat/chat.c

1500

if (--prec <= 0 && val == 0)

usr.bin/chflags/chflags.c

118

val = strtol(flags, &ep, 8);

usr.bin/chflags/chflags.c

119

if (val < 0)

usr.bin/chflags/chflags.c

125

set = val;

usr.bin/chflags/chflags.c

55

long val;

usr.bin/chkey/chkey.c

246

char *val;

usr.bin/chkey/chkey.c

253

&val, &vallen) != 0) {

usr.bin/chkey/chkey.c

256

p = strchr(val, ':');

usr.bin/chpass/edit.c

193

char *buf, *p, *val;

usr.bin/chpass/edit.c

213

val = NULL;

usr.bin/chpass/edit.c

242

free(val);

usr.bin/chpass/edit.c

243

asprintf(&val, "%.*s", (int)(buf + len - p), p);

usr.bin/chpass/edit.c

244

if (val == NULL)

usr.bin/chpass/edit.c

246

if (ep->except && strpbrk(val, ep->except)) {

usr.bin/chpass/edit.c

248

tfn, ep->prompt, val);

usr.bin/chpass/edit.c

251

if ((ep->func)(val, pw, ep))

usr.bin/chpass/edit.c

256

free(val);

usr.bin/chpass/edit.c

283

free(val);

usr.bin/cksum/cksum.c

109

if (cfncn(fd, &val, &len)) {

usr.bin/cksum/cksum.c

113

pfncn(fn, val, len);

usr.bin/cksum/cksum.c

53

uint32_t val;

usr.bin/cksum/print.c

42

pcrc(char *fn, uint32_t val, off_t len)

usr.bin/cksum/print.c

44

printf("%lu %jd", (u_long)val, (intmax_t)len);

usr.bin/cksum/print.c

51

psum1(char *fn, uint32_t val, off_t len)

usr.bin/cksum/print.c

53

printf("%lu %jd", (u_long)val, (intmax_t)(len + 1023) / 1024);

usr.bin/cksum/print.c

60

psum2(char *fn, uint32_t val, off_t len)

usr.bin/cksum/print.c

62

printf("%lu %jd", (u_long)val, (intmax_t)(len + 511) / 512);

usr.bin/dc/bcode.c

808

struct value *val;

usr.bin/dc/bcode.c

812

val = pop();

usr.bin/dc/bcode.c

813

if (val == NULL) {

usr.bin/dc/bcode.c

816

stack_set_tos(&bmachine.reg[index], val);

usr.bin/dfregress/testcase.c

156

int32_t val;

usr.bin/dfregress/testcase.c

160

"timeout_in_secs", &val);

usr.bin/dfregress/testcase.c

165

tv.tv_sec = (long)val;

usr.bin/diff/diff.c

353

print_status(int val, char *path1, char *path2, const char *entry)

usr.bin/diff/diff.c

355

switch (val) {

usr.bin/dsynth/subs.c

965

uint32_t val;

usr.bin/dsynth/subs.c

990

val = iscsi_crc32(&st->st_mtime, sizeof(st->st_mtime));

usr.bin/dsynth/subs.c

991

val = iscsi_crc32_ext(&st->st_size, sizeof(st->st_size), val);

usr.bin/dsynth/subs.c

992

val = iscsi_crc32_ext(fen->fts_path, fen->fts_pathlen, val);

usr.bin/dsynth/subs.c

993

crc ^= val;

usr.bin/evtranalyze/evtranalyze.c

1141

if (EVTR_VAL_INT != ev->stmt.val->type) {

usr.bin/evtranalyze/evtranalyze.c

1149

(double)ev->ts, (double)ev->stmt.val->num);

usr.bin/evtranalyze/evtranalyze.c

1150

ctx->sum += ev->stmt.val->num;

usr.bin/evtranalyze/evtranalyze.c

117

uintptr_t val;

usr.bin/evtranalyze/evtranalyze.c

1188

evtr_variable_value_t val;

usr.bin/evtranalyze/evtranalyze.c

1200

cd->val = ev->stmt.val;

usr.bin/evtranalyze/evtranalyze.c

1273

if (ev->stmt.val->type != EVTR_VAL_CTOR) {

usr.bin/evtranalyze/evtranalyze.c

1279

if (!strcmp(ev->stmt.val->ctor.name, ctx->ctor)) {

usr.bin/evtranalyze/evtranalyze.c

128

ehash_find(const struct hashtab *tab, uintptr_t key, uintptr_t *val)

usr.bin/evtranalyze/evtranalyze.c

1281

if (!ehash_find(ctx->ctors, (uintptr_t)ev->stmt.val, &v)) {

usr.bin/evtranalyze/evtranalyze.c

1289

if (!ehash_insert(ctx->ctors, (uintptr_t)ev->stmt.val, v))

usr.bin/evtranalyze/evtranalyze.c

1292

} else if (!strcmp(ev->stmt.val->ctor.name, ctx->dtor)) {

usr.bin/evtranalyze/evtranalyze.c

1294

const char *tmp = ev->stmt.val->ctor.name;

usr.bin/evtranalyze/evtranalyze.c

1295

ev->stmt.val->ctor.name = ctx->ctor;

usr.bin/evtranalyze/evtranalyze.c

1296

if (ehash_find(ctx->ctors, (uintptr_t)ev->stmt.val, &v)) {

usr.bin/evtranalyze/evtranalyze.c

1298

ev->stmt.val->ctor.name = tmp;

usr.bin/evtranalyze/evtranalyze.c

1306

ev->stmt.val->ctor.name = tmp;

usr.bin/evtranalyze/evtranalyze.c

1316

if (ehash_delete(ctx->ctors, (uintptr_t)ev->stmt.val))

usr.bin/evtranalyze/evtranalyze.c

1318

ev->stmt.val->ctor.name = tmp;

usr.bin/evtranalyze/evtranalyze.c

138

*val = ent->val;

usr.bin/evtranalyze/evtranalyze.c

143

ehash_insert(struct hashtab *tab, uintptr_t key, uintptr_t val)

usr.bin/evtranalyze/evtranalyze.c

155

ent->val = val;

usr.bin/evtranalyze/evtranalyze.c

266

evtr_variable_value_t val, ctor_val = (evtr_variable_value_t)_p;

usr.bin/evtranalyze/evtranalyze.c

276

TAILQ_FOREACH(val, &ctor_val->ctor.args, link) {

usr.bin/evtranalyze/evtranalyze.c

277

switch (val->type) {

usr.bin/evtranalyze/evtranalyze.c

283

"%jd", val->num);

usr.bin/evtranalyze/evtranalyze.c

286

len = strlcat(p, val->str, sizeof(buf));

usr.bin/evtranalyze/evtranalyze.c

325

vector_push(vector_t v, uintmax_t val)

usr.bin/evtranalyze/evtranalyze.c

335

v->vals[v->used++] = val;

usr.bin/evtranalyze/evtranalyze.c

353

#define vector_foreach(v, val, i) \

usr.bin/evtranalyze/evtranalyze.c

354

for (i = 0, val = v->vals[0]; i < v->used; val = v->vals[++i])

usr.bin/evtranalyze/evtranalyze.c

360

uintmax_t val;

usr.bin/evtranalyze/evtranalyze.c

366

vector_foreach(v, val, i) {

usr.bin/evtranalyze/evtranalyze.c

367

diff = val - avg;

usr.bin/evtranalyze/plotter.c

165

ploticus_plot_histogram(void *_ctx, plotid_t id, double val)

usr.bin/evtranalyze/plotter.c

175

fprintf(plot->fp, "%lf\n", val);

usr.bin/evtranalyze/plotter.c

206

prop_object_t key, val;

usr.bin/evtranalyze/plotter.c

237

val = prop_dictionary_get_keysym(plot->params, key);

usr.bin/evtranalyze/plotter.c

238

assert(val != NULL);

usr.bin/evtranalyze/plotter.c

240

prop_string_cstring_nocopy(val));

usr.bin/evtranalyze/plotter.c

242

prop_string_cstring_nocopy(val)) < 0)

usr.bin/fstat/tmpfs.c

62

fsp->fsid = mount_l.mnt_stat.f_fsid.val[0];

usr.bin/kcollect/kcollect.c

439

get_influx_series(const char *val)

usr.bin/kcollect/kcollect.c

442

if ((strncmp("user", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

443

(strncmp("idle", val, 8) == 0 ) ||

usr.bin/kcollect/kcollect.c

444

(strncmp("syst", val, 8) == 0))

usr.bin/kcollect/kcollect.c

448

if (strncmp("load", val, 8) == 0)

usr.bin/kcollect/kcollect.c

452

if ((strncmp("swapuse", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

453

(strncmp("swapano", val, 8) == 0 ) ||

usr.bin/kcollect/kcollect.c

454

(strncmp("swapcac", val, 8) == 0))

usr.bin/kcollect/kcollect.c

458

if ((strncmp("fault", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

459

(strncmp("cow", val, 8) == 0 ) ||

usr.bin/kcollect/kcollect.c

460

(strncmp("zfill", val, 8) == 0))

usr.bin/kcollect/kcollect.c

464

if ((strncmp("cache", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

465

(strncmp("inact", val, 8) == 0 ) ||

usr.bin/kcollect/kcollect.c

466

(strncmp("act", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

467

(strncmp("wired", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

468

(strncmp("free", val, 8) == 0))

usr.bin/kcollect/kcollect.c

472

if ((strncmp("syscalls", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

473

(strncmp("nlookup", val, 8) == 0 ) ||

usr.bin/kcollect/kcollect.c

474

(strncmp("intr", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

475

(strncmp("ipi", val, 8) == 0) ||

usr.bin/kcollect/kcollect.c

476

(strncmp("timer", val, 8) == 0))

usr.bin/kenv/kenv.c

109

} else if (val == NULL) {

usr.bin/kenv/kenv.c

120

error = ksetenv(env, val);

usr.bin/kenv/kenv.c

122

warnx("unable to set %s to %s", env, val);

usr.bin/kenv/kenv.c

188

ksetenv(const char *env, char *val)

usr.bin/kenv/kenv.c

192

ret = kenv(KENV_SET, env, val, strlen(val)+1);

usr.bin/kenv/kenv.c

194

printf("%s=\"%s\"\n", env, val);

usr.bin/kenv/kenv.c

62

char *env, *eq, *val;

usr.bin/kenv/kenv.c

66

val = NULL;

usr.bin/kenv/kenv.c

96

val = eq;

usr.bin/ktrdump/ktrdump.c

1275

va_list_push_integral(struct my_va_list *valist, void *val, size_t valsize,

usr.bin/ktrdump/ktrdump.c

1282

r = *(uint8_t *)val; break;

usr.bin/ktrdump/ktrdump.c

1284

r = *(uint32_t *)val; break;

usr.bin/ktrdump/ktrdump.c

1286

r = (*(uint32_t *)val); break;

usr.bin/ktrdump/ktrdump.c

1288

r = *(uint64_t *)val; break;

usr.bin/limits/limits.c

366

rlim_t val;

usr.bin/limits/limits.c

370

val = resources[rcswhich].func(lc, resources[rcswhich].cap, limits[rcswhich].rlim_cur, limits[rcswhich].rlim_cur);

usr.bin/limits/limits.c

371

limits[rcswhich].rlim_cur = resources[rcswhich].func(lc, str, val, val);

usr.bin/limits/limits.c

374

val = resources[rcswhich].func(lc, resources[rcswhich].cap, limits[rcswhich].rlim_max, limits[rcswhich].rlim_max);

usr.bin/limits/limits.c

375

limits[rcswhich].rlim_max = resources[rcswhich].func(lc, str, val, val);

usr.bin/localedef/charmap.c

320

add_charmap_char(const char *name, int val)

usr.bin/localedef/charmap.c

322

add_charmap_impl(name, val, 0);

usr.bin/localedef/collate.c

1283

large[i].val = cc->wc;

usr.bin/localedef/ctype.c

188

add_ctype(int val)

usr.bin/localedef/ctype.c

192

if ((ctn = get_ctype(val)) == NULL) {

usr.bin/localedef/ctype.c

265

add_caseconv(int val, int wc)

usr.bin/localedef/ctype.c

269

ctn = get_ctype(val);

usr.bin/localedef/localedef.h

85

void add_charmap_char(const char *name, int val);

usr.bin/ministat/ministat.c

331

PlotSet(struct dataset *ds, int val)

usr.bin/ministat/ministat.c

343

bar = val-1;

usr.bin/ministat/ministat.c

384

pl->data[j * pl->width + x] |= val;

usr.bin/mkcsmapper/yacc.y

222

put8(void *ptr, size_t ofs, u_int32_t val)

usr.bin/mkcsmapper/yacc.y

225

*((u_int8_t *)ptr + ofs) = val;

usr.bin/mkcsmapper/yacc.y

229

put16(void *ptr, size_t ofs, u_int32_t val)

usr.bin/mkcsmapper/yacc.y

232

u_int16_t oval = htons(val);

usr.bin/mkcsmapper/yacc.y

237

put32(void *ptr, size_t ofs, u_int32_t val)

usr.bin/mkcsmapper/yacc.y

240

u_int32_t oval = htonl(val);

usr.bin/mkcsmapper/yacc.y

249

uint32_t val = 0;

usr.bin/mkcsmapper/yacc.y

266

val = dst_invalid;

usr.bin/mkcsmapper/yacc.y

269

val = dst_ilseq;

usr.bin/mkcsmapper/yacc.y

275

(*putfunc)(table, i, val);

usr.bin/mkcsmapper/yacc.y

448

set_src_zone(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

457

rowcol_bits = val;

usr.bin/mkcsmapper/yacc.y

483

set_dst_invalid(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

491

dst_invalid = val;

usr.bin/mkcsmapper/yacc.y

497

set_dst_ilseq(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

505

dst_ilseq = val;

usr.bin/mkcsmapper/yacc.y

511

set_oob_mode(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

519

oob_mode = val;

usr.bin/mkcsmapper/yacc.y

525

set_dst_unit_bits(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

533

switch (val) {

usr.bin/mkcsmapper/yacc.y

536

dst_unit_bits = val;

usr.bin/mkcsmapper/yacc.y

540

dst_unit_bits = val;

usr.bin/mkcsmapper/yacc.y

544

dst_unit_bits = val;

usr.bin/mkesdb/yacc.y

242

register_named_csid(char *sym, uint32_t val)

usr.bin/mkesdb/yacc.y

259

csid->ci_csid = val;

usr.bin/nl/nl.c

128

long val;

usr.bin/nl/nl.c

174

val = strtol(optarg, &ep, 10);

usr.bin/nl/nl.c

176

((val == LONG_MIN || val == LONG_MAX) && errno != 0))

usr.bin/nl/nl.c

179

incr = (int)val;

usr.bin/nl/nl.c

206

val = strtol(optarg, &ep, 10);

usr.bin/nl/nl.c

208

((val == LONG_MIN || val == LONG_MAX) && errno != 0))

usr.bin/nl/nl.c

211

startnum = (int)val;

usr.bin/nl/nl.c

215

val = strtol(optarg, &ep, 10);

usr.bin/nl/nl.c

217

((val == LONG_MIN || val == LONG_MAX) && errno != 0))

usr.bin/nl/nl.c

220

width = (int)val;

usr.bin/printf/printf.c

397

intmax_t val;

usr.bin/printf/printf.c

404

if (getnum(&val, &uval, signedconv))

usr.bin/printf/printf.c

407

PF(f, val);

usr.bin/printf/printf.c

556

intmax_t val;

usr.bin/printf/printf.c

560

if (getnum(&val, &uval, 1))

usr.bin/printf/printf.c

563

if (val < INT_MIN || val > INT_MAX) {

usr.bin/printf/printf.c

567

*ip = (int)val;

usr.bin/renice/renice.c

144

getnum(const char *com, const char *str, int *val)

usr.bin/renice/renice.c

160

*val = (int)v;

usr.bin/rpcgen/rpc_clntout.c

62

def = (definition *) l->val;

usr.bin/rpcgen/rpc_hout.c

492

def = (definition *) l->val;

usr.bin/rpcgen/rpc_main.c

518

print_funcdef(l->val, headeronly);

usr.bin/rpcgen/rpc_sample.c

273

def = l->val;

usr.bin/rpcgen/rpc_scan.c

310

findstrconst(char **str, const char **val)

usr.bin/rpcgen/rpc_scan.c

327

*val = tmp;

usr.bin/rpcgen/rpc_scan.c

332

findchrconst(char **str, const char **val)

usr.bin/rpcgen/rpc_scan.c

351

*val = tmp;

usr.bin/rpcgen/rpc_scan.c

356

findconst(char **str, const char **val)

usr.bin/rpcgen/rpc_scan.c

377

*val = tmp;

usr.bin/rpcgen/rpc_svcout.c

211

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

242

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

296

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

303

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

615

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

831

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

969

def = (definition *) l->val;

usr.bin/rpcgen/rpc_tblout.c

71

def = (definition *) l->val;

usr.bin/rpcgen/rpc_util.c

103

storeval(list **lstp, definition *val)

usr.bin/rpcgen/rpc_util.c

111

lst->val = val;

usr.bin/rpcgen/rpc_util.c

90

findval(list *lst, const char *val, int (*cmp)(definition *, const char *))

usr.bin/rpcgen/rpc_util.c

93

if ((*cmp) (lst->val, val))

usr.bin/rpcgen/rpc_util.c

94

return(lst->val);

usr.bin/rpcgen/rpc_util.h

74

definition *val;

usr.bin/showmount/showmount.c

252

int val, val2;

usr.bin/showmount/showmount.c

280

val = strcmp(mp->ml_host, tp->ml_host);

usr.bin/showmount/showmount.c

284

if (val == 0) {

usr.bin/showmount/showmount.c

289

val = val2;

usr.bin/showmount/showmount.c

297

val = val2;

usr.bin/showmount/showmount.c

300

if (val == 0) {

usr.bin/showmount/showmount.c

306

if (val < 0) {

usr.bin/systat/iostat.c

349

histogram(long double val, int colwidth, double scale)

usr.bin/systat/iostat.c

353

int v = (int)(val * scale) + 0.5;

usr.bin/systat/iostat.c

355

if (val <= 0)

usr.bin/systat/iostat.c

359

snprintf(buf, sizeof(buf), "%5.2Lf", val);

usr.bin/systat/vmstat.c

522

uint64_t val = *(uint64_t *)(((uint8_t *)&s.cp_time) +

usr.bin/systat/vmstat.c

524

f1 = 100.0 * val / total_time;

usr.bin/telnet/authenc.c

78

telnet_getenv(char *val)

usr.bin/telnet/authenc.c

80

return((char *)env_getvalue((unsigned char *)val));

usr.bin/telnet/commands.c

414

int val = 0;

usr.bin/telnet/commands.c

443

val = cpp - telopts;

usr.bin/telnet/commands.c

448

val *= 10;

usr.bin/telnet/commands.c

449

val += *cp - '0';

usr.bin/telnet/commands.c

456

} else if (val < 0 || val > 255) {

usr.bin/telnet/commands.c

466

(*func)(val, 1);

usr.bin/telnet/commands.c

526

togbinary(int val)

usr.bin/telnet/commands.c

530

if (val >= 0) {

usr.bin/telnet/commands.c

531

binmode = val;

usr.bin/telnet/commands.c

540

val = binmode ? 0 : 1;

usr.bin/telnet/commands.c

543

if (val == 1) {

usr.bin/telnet/commands.c

564

togrbinary(int val)

usr.bin/telnet/commands.c

568

if (val == -1)

usr.bin/telnet/commands.c

569

val = my_want_state_is_do(TELOPT_BINARY) ? 0 : 1;

usr.bin/telnet/commands.c

571

if (val == 1) {

usr.bin/telnet/commands.c

590

togxbinary(int val)

usr.bin/telnet/commands.c

594

if (val == -1)

usr.bin/telnet/commands.c

595

val = my_want_state_is_will(TELOPT_BINARY) ? 0 : 1;

usr.bin/telnet/commands.c

597

if (val == 1) {

usr.bin/telnet/telnet.c

1080

cc_t val;

usr.bin/telnet/telnet.c

1098

spcp->val = 0;

usr.bin/telnet/telnet.c

1106

spcp->val = *spcp->valp; \

usr.bin/telnet/telnet.c

1109

spcp->val = 0; \

usr.bin/telnet/telnet.c

1210

if (spcp->val == (cc_t)(_POSIX_VDISABLE))

usr.bin/telnet/telnet.c

1215

spcp->val = *spcp->valp;

usr.bin/telnet/telnet.c

1216

slc_add_reply(spcp - spc_data, spcp->flags, spcp->val);

usr.bin/telnet/telnet.c

1252

if ((cp[SLC_VALUE] == (unsigned char)spcp->val) &&

usr.bin/telnet/telnet.c

1268

spcp->val = (cc_t)cp[SLC_VALUE];

usr.bin/telnet/telnet.c

1277

spcp->val = (cc_t)cp[SLC_VALUE];

usr.bin/telnet/telnet.c

1285

slc_add_reply(func, spcp->flags, spcp->val);

usr.bin/telnet/telnet.c

1299

if (spcp->valp && spcp->val != *spcp->valp) {

usr.bin/telnet/telnet.c

1300

spcp->val = *spcp->valp;

usr.bin/telnet/telnet.c

1301

if (spcp->val == (cc_t)(_POSIX_VDISABLE))

usr.bin/telnet/telnet.c

1305

slc_add_reply(spcp - spc_data, spcp->flags, spcp->val);

usr.bin/telnet/telnet.c

1374

if (spcp->valp && (*spcp->valp != spcp->val)) {

usr.bin/telnet/telnet.c

1375

*spcp->valp = spcp->val;

usr.bin/top/commands.c

290

register int val = 0;

usr.bin/top/commands.c

304

val = val * 10 + (ch - '0');

usr.bin/top/commands.c

315

*intp = val;

usr.bin/top/utils.c

109

itoa(int val)

usr.bin/top/utils.c

120

if (val == 0)

usr.bin/top/utils.c

124

else while (val != 0)

usr.bin/top/utils.c

126

*--ptr = (val % 10) + '0';

usr.bin/top/utils.c

127

val /= 10;

usr.bin/top/utils.c

139

itoa_w(int val, int w)

usr.bin/top/utils.c

155

if (val == 0)

usr.bin/top/utils.c

159

else while (val != 0)

usr.bin/top/utils.c

161

*--ptr = (val % 10) + '0';

usr.bin/top/utils.c

162

val /= 10;

usr.bin/top/utils.c

172

itoa7(int val)

usr.bin/top/utils.c

175

return itoa_w(val, 7);

usr.bin/top/utils.c

185

digits(int val)

usr.bin/top/utils.c

190

if (val == 0)

usr.bin/top/utils.c

194

while (val > 0)

usr.bin/top/utils.c

197

val /= 10;

usr.bin/touch/touch.c

327

int val, isutc = 0;

usr.bin/touch/touch.c

342

val = 100000;

usr.bin/touch/touch.c

344

tvp[0].tv_usec += val * (*p - '0');

usr.bin/touch/touch.c

346

val /= 10;

usr.bin/tr/str.c

339

int ch, cnt, val;

usr.bin/tr/str.c

343

for (cnt = val = 0;;) {

usr.bin/tr/str.c

347

val = val * 8 + ch - '0';

usr.bin/tr/str.c

356

return (val);

usr.bin/truss/extern.h

44

extern const char *ioctlname(register_t val);

usr.bin/truss/main.c

229

int val = 0;

usr.bin/truss/main.c

239

funcs->enter_syscall(trussinfo, pfs.val);

usr.bin/truss/main.c

253

funcs->exit_syscall(trussinfo, pfs.val);

usr.bin/truss/main.c

256

fprintf(trussinfo->outfile, "SIGNAL %lu\n", pfs.val);

usr.bin/truss/main.c

257

sigexit = pfs.val;

usr.bin/truss/main.c

260

fprintf (trussinfo->outfile, "process exit, rval = %lu\n", pfs.val);

usr.bin/truss/main.c

271

if (ioctl(Procfd, PIOCCONT, val) == -1) {

usr.bin/truss/setup.c

112

fprintf (stderr, "process failed to exec, rval = %lu\n", pfs.val);

usr.bin/tset/set.c

39

#define CHK(val, dft) (val <= 0 ? dft : val)

usr.bin/u4bhidctl/usbhid.c

126

var->val = atoi(tmp2);

usr.bin/u4bhidctl/usbhid.c

423

hid_set_data(dbuf, &var->h, var->val);

usr.bin/u4bhidctl/usbhid.c

48

int val;

usr.bin/unifdef/unifdef.c

1050

long val;

usr.bin/unifdef/unifdef.c

1067

rt = ops->inner(ops+1, &val, &cp);

usr.bin/unifdef/unifdef.c

1070

lt = op->fn(valp, lt, *valp, rt, val);

usr.bin/unifdef/unifdef.c

1088

long val = 0;

usr.bin/unifdef/unifdef.c

1092

ret = eval_table(eval_ops, &val, cpp);

usr.bin/unifdef/unifdef.c

1093

debug("eval = %ld", val);

usr.bin/unifdef/unifdef.c

1397

const char *sym, *val;

usr.bin/unifdef/unifdef.c

1400

val = skipsym(sym);

usr.bin/unifdef/unifdef.c

1401

if (definethis && *val == '=') {

usr.bin/unifdef/unifdef.c

1402

symval[val - sym] = '\0';

usr.bin/unifdef/unifdef.c

1403

val = val + 1;

usr.bin/unifdef/unifdef.c

1404

} else if (*val == '\0') {

usr.bin/unifdef/unifdef.c

1405

val = definethis ? "1" : NULL;

usr.bin/unifdef/unifdef.c

1409

addsym2(ignorethis, sym, val);

usr.bin/unifdef/unifdef.c

1416

addsym2(bool ignorethis, const char *sym, const char *val)

usr.bin/unifdef/unifdef.c

1429

value[symind] = val;

usr.bin/unifdef/unifdef.c

1469

const char *cp, *kw, *sym, *val, *end;

usr.bin/unifdef/unifdef.c

1490

val = "1";

usr.bin/unifdef/unifdef.c

1493

val = (cp < end) ? xstrdup(cp, end) : "";

usr.bin/unifdef/unifdef.c

1496

addsym2(false, sym, val);

usr.bin/usbhidaction/usbhidaction.c

207

val = hid_get_data(buf, &cmd->item);

usr.bin/usbhidaction/usbhidaction.c

211

val = hid_get_data(buf, &cmd->item);

usr.bin/usbhidaction/usbhidaction.c

212

if (val == cmd->value)

usr.bin/usbhidaction/usbhidaction.c

217

val = (i < cmd->item.report_count) ?

usr.bin/usbhidaction/usbhidaction.c

220

if (cmd->value != val && cmd->anyvalue == 0)

usr.bin/usbhidaction/usbhidaction.c

224

(cmd->lastseen != val)))) {

usr.bin/usbhidaction/usbhidaction.c

225

docmd(cmd, val, dev, argc, argv);

usr.bin/usbhidaction/usbhidaction.c

230

(abs(cmd->lastused - val) >= cmd->debounce))) {

usr.bin/usbhidaction/usbhidaction.c

231

docmd(cmd, val, dev, argc, argv);

usr.bin/usbhidaction/usbhidaction.c

232

cmd->lastused = val;

usr.bin/usbhidaction/usbhidaction.c

236

cmd->lastseen = val;

usr.bin/usbhidaction/usbhidaction.c

88

int fd, fp, ch, n, val, i;

usr.bin/window/compress.c

155

struct cc *val;

usr.bin/window/compress.c

815

undop->val = x;

usr.bin/window/compress.c

825

undop->val = NULL;

usr.bin/window/compress.c

833

if ((*undop->pos = x = undop->val))

usr.bin/window/compress.c

848

if ((*undop->pos = x = undop->val))

usr.bin/window/var.c

49

struct value val;

usr.bin/window/var.c

52

val = *v;

usr.bin/window/var.c

53

if (val.v_type == V_STR && val.v_str != 0 &&

usr.bin/window/var.c

54

(val.v_str = str_cpy(val.v_str)) == 0)

usr.bin/window/var.c

59

val_free(val);

usr.bin/window/var.c

63

val_free(val);

usr.bin/window/var.c

73

r->r_val = val;

usr.sbin/autofs/autounmountd.c

131

mntbuf[i].f_fsid.val[0], mntbuf[i].f_fsid.val[1]);

usr.sbin/autofs/autounmountd.c

137

mntbuf[i].f_fsid.val[0], mntbuf[i].f_fsid.val[1]);

usr.sbin/autofs/autounmountd.c

146

af->af_mountpoint, af->af_fsid.val[0], af->af_fsid.val[1]);

usr.sbin/autofs/autounmountd.c

198

af->af_fsid.val[0], af->af_fsid.val[1],

usr.sbin/autofs/autounmountd.c

209

af->af_mountpoint, af->af_fsid.val[0], af->af_fsid.val[1],

usr.sbin/btconfig/btconfig.c

162

void *val;

usr.sbin/btconfig/btconfig.c

280

strlcpy((char *)(p->val), *++av, MAX_STR_SIZE);

usr.sbin/btconfig/btconfig.c

286

*(uint32_t *)(p->val) = strtoul(*++av, NULL, 16);

usr.sbin/btconfig/btconfig.c

292

*(uint32_t *)(p->val) = strtoul(*++av, NULL, 10);

usr.sbin/btconfig/btconfig.c

503

uint16_t val = btr.btr_link_policy;

usr.sbin/btconfig/btconfig.c

505

if (opt_switch > 0) val |= HCI_LINK_POLICY_ENABLE_ROLE_SWITCH;

usr.sbin/btconfig/btconfig.c

506

if (opt_switch < 0) val &= ~HCI_LINK_POLICY_ENABLE_ROLE_SWITCH;

usr.sbin/btconfig/btconfig.c

507

if (opt_hold > 0) val |= HCI_LINK_POLICY_ENABLE_HOLD_MODE;

usr.sbin/btconfig/btconfig.c

508

if (opt_hold < 0) val &= ~HCI_LINK_POLICY_ENABLE_HOLD_MODE;

usr.sbin/btconfig/btconfig.c

509

if (opt_sniff > 0) val |= HCI_LINK_POLICY_ENABLE_SNIFF_MODE;

usr.sbin/btconfig/btconfig.c

510

if (opt_sniff < 0) val &= ~HCI_LINK_POLICY_ENABLE_SNIFF_MODE;

usr.sbin/btconfig/btconfig.c

511

if (opt_park > 0) val |= HCI_LINK_POLICY_ENABLE_PARK_MODE;

usr.sbin/btconfig/btconfig.c

512

if (opt_park < 0) val &= ~HCI_LINK_POLICY_ENABLE_PARK_MODE;

usr.sbin/btconfig/btconfig.c

514

btr.btr_link_policy = val;

usr.sbin/btconfig/btconfig.c

526

uint8_t val;

usr.sbin/btconfig/btconfig.c

528

load_value(HCI_CMD_READ_SCAN_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

529

if (opt_pscan > 0) val |= HCI_PAGE_SCAN_ENABLE;

usr.sbin/btconfig/btconfig.c

530

if (opt_pscan < 0) val &= ~HCI_PAGE_SCAN_ENABLE;

usr.sbin/btconfig/btconfig.c

531

if (opt_iscan > 0) val |= HCI_INQUIRY_SCAN_ENABLE;

usr.sbin/btconfig/btconfig.c

532

if (opt_iscan < 0) val &= ~HCI_INQUIRY_SCAN_ENABLE;

usr.sbin/btconfig/btconfig.c

533

save_value(HCI_CMD_WRITE_SCAN_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

537

uint8_t val = (opt_auth > 0 ? 1 : 0);

usr.sbin/btconfig/btconfig.c

539

save_value(HCI_CMD_WRITE_AUTH_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

543

uint8_t val = (opt_encrypt > 0 ? 1 : 0);

usr.sbin/btconfig/btconfig.c

545

save_value(HCI_CMD_WRITE_ENCRYPTION_MODE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

552

uint8_t val[HCI_CLASS_SIZE];

usr.sbin/btconfig/btconfig.c

554

val[0] = (class >> 0) & 0xff;

usr.sbin/btconfig/btconfig.c

555

val[1] = (class >> 8) & 0xff;

usr.sbin/btconfig/btconfig.c

556

val[2] = (class >> 16) & 0xff;

usr.sbin/btconfig/btconfig.c

558

save_value(HCI_CMD_WRITE_UNIT_CLASS, val, HCI_CLASS_SIZE);

usr.sbin/btconfig/btconfig.c

562

uint8_t val;

usr.sbin/btconfig/btconfig.c

564

if (opt_pin > 0) val = 1;

usr.sbin/btconfig/btconfig.c

565

else val = 0;

usr.sbin/btconfig/btconfig.c

567

save_value(HCI_CMD_WRITE_PIN_TYPE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

571

uint16_t val;

usr.sbin/btconfig/btconfig.c

573

val = htole16(voice & 0x03ff);

usr.sbin/btconfig/btconfig.c

574

save_value(HCI_CMD_WRITE_VOICE_SETTING, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

578

uint16_t val;

usr.sbin/btconfig/btconfig.c

580

val = htole16(pto * 8 / 5);

usr.sbin/btconfig/btconfig.c

581

save_value(HCI_CMD_WRITE_PAGE_TIMEOUT, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

596

uint8_t val = (opt_rssi > 0 ? 1 : 0);

usr.sbin/btconfig/btconfig.c

598

save_value(HCI_CMD_WRITE_INQUIRY_MODE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

608

uint8_t val, buf[MAX_STR_SIZE];

usr.sbin/btconfig/btconfig.c

648

load_value(HCI_CMD_READ_PIN_TYPE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

649

printf("\tpin: %s\n", val ? "fixed" : "variable");

usr.sbin/btconfig/btconfig.c

653

load_value(HCI_CMD_READ_SCAN_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

654

if (val & HCI_INQUIRY_SCAN_ENABLE) tag("iscan");

usr.sbin/btconfig/btconfig.c

657

if (val & HCI_PAGE_SCAN_ENABLE) tag("pscan");

usr.sbin/btconfig/btconfig.c

660

load_value(HCI_CMD_READ_AUTH_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

661

if (val) tag("auth");

usr.sbin/btconfig/btconfig.c

664

load_value(HCI_CMD_READ_ENCRYPTION_MODE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

665

if (val) tag("encrypt");

usr.sbin/btconfig/btconfig.c

668

val = btr.btr_link_policy;

usr.sbin/btconfig/btconfig.c

669

if (val & HCI_LINK_POLICY_ENABLE_ROLE_SWITCH) tag("switch");

usr.sbin/btconfig/btconfig.c

671

if (val & HCI_LINK_POLICY_ENABLE_HOLD_MODE) tag("hold");

usr.sbin/btconfig/btconfig.c

673

if (val & HCI_LINK_POLICY_ENABLE_SNIFF_MODE) tag("sniff");

usr.sbin/btconfig/btconfig.c

675

if (val & HCI_LINK_POLICY_ENABLE_PARK_MODE) tag("park");

usr.sbin/btconfig/btconfig.c

678

load_value(HCI_CMD_READ_INQUIRY_MODE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

679

if (val) tag("rssi");

usr.sbin/chown/chown.c

246

uid_t val;

usr.sbin/chown/chown.c

254

val = strtoul(name, &ep, 10);

usr.sbin/chown/chown.c

257

return (val);

usr.sbin/config/config.y

3

int val;

usr.sbin/config/config.y

40

%token <val> NUMBER

usr.sbin/config/config.y

41

%token <val> FPNUMBER

usr.sbin/config/mkoptions.c

278

char *wd, *this, *val;

usr.sbin/config/mkoptions.c

328

val = get_word(fp);

usr.sbin/config/mkoptions.c

329

if (val == (char *)EOF)

usr.sbin/config/mkoptions.c

331

if (val == NULL) {

usr.sbin/config/mkoptions.c

336

val = genopt;

usr.sbin/config/mkoptions.c

339

val = strdup(val);

usr.sbin/config/mkoptions.c

352

po->o_file = val;

usr.sbin/cpucontrol/cpucontrol.c

74

#define HIGH(val) (uint32_t)(((val) >> 32) & 0xffffffff)

usr.sbin/cpucontrol/cpucontrol.c

75

#define LOW(val) (uint32_t)((val) & 0xffffffff)

usr.sbin/cron/lib/env.c

137

char name[MAX_ENVSTR], val[MAX_ENVSTR];

usr.sbin/cron/lib/env.c

148

name[0] = val[0] = '\0';

usr.sbin/cron/lib/env.c

149

fields = sscanf(envstr, "%[^ =] = %[^\n#]", name, val);

usr.sbin/cron/lib/env.c

164

int len = strdtb(val);

usr.sbin/cron/lib/env.c

167

if (val[0] == '\'' || val[0] == '"') {

usr.sbin/cron/lib/env.c

168

if (val[len-1] == val[0]) {

usr.sbin/cron/lib/env.c

169

val[len-1] = '\0';

usr.sbin/cron/lib/env.c

170

strcpy(val, val+1);

usr.sbin/cron/lib/env.c

176

if (strlen(name) + 1 + strlen(val) >= MAX_ENVSTR-1)

usr.sbin/cron/lib/env.c

178

sprintf(envstr, "%s=%s", name, val);

usr.sbin/cron/lib/env.c

179

Debug(DPARS, ("load_env, <%s> <%s> -> <%s>\n", name, val, envstr))

usr.sbin/dconschat/dconschat.c

189

printf("%d %02x %06x\n", state, reg->key, reg->val);

usr.sbin/dconschat/dconschat.c

193

reg->val == CSRVAL_VENDOR_PRIVATE)

usr.sbin/dconschat/dconschat.c

198

reg->val == DCONS_CSR_VAL_VER)

usr.sbin/dconschat/dconschat.c

203

hi = reg->val;

usr.sbin/dconschat/dconschat.c

205

lo = reg->val;

usr.sbin/efibootmgr/efibootmgr.c

421

uint16_t val;

usr.sbin/efibootmgr/efibootmgr.c

424

val = strtoul(&bootvar[4], NULL, 16);

usr.sbin/efibootmgr/efibootmgr.c

444

le16enc(new, val);

usr.sbin/efibootmgr/efibootmgr.c

867

os_indications_set(uint64_t mask, uint64_t val)

usr.sbin/efibootmgr/efibootmgr.c

871

le64enc(&new, (os_indications() & ~mask) | (val & mask));

usr.sbin/efivar/efivar.c

101

get_value(char *val, size_t *datalen)

usr.sbin/efivar/efivar.c

105

if (val != NULL) {

usr.sbin/efivar/efivar.c

106

*datalen = strlen(val);

usr.sbin/efivar/efivar.c

107

return ((uint8_t *)val);

usr.sbin/efivar/efivar.c

116

append_variable(char *name, char *val)

usr.sbin/efivar/efivar.c

124

data = get_value(val, &datalen);

usr.sbin/efivar/efivar.c

141

write_variable(char *name, char *val)

usr.sbin/efivar/efivar.c

149

data = get_value(val, &datalen);

usr.sbin/fwcontrol/fwcontrol.c

305

printf("verndor ID: 0x%06x\n", reg->val);

usr.sbin/fwcontrol/fwcontrol.c

336

reg->key & CSRKEY_MASK, reg->val,

usr.sbin/gifconfig/gifconfig.c

850

prefix(void *val, int size)

usr.sbin/gifconfig/gifconfig.c

852

u_char *name = (u_char *)val;

usr.sbin/inetd/inetd.c

1652

u_long val;

usr.sbin/inetd/inetd.c

1654

val = strtoul(s + 1, &eptr, 10);

usr.sbin/inetd/inetd.c

1655

if (eptr == s + 1 || val > MAX_MAXCHLD) {

usr.sbin/inetd/inetd.c

1662

if (!sep->se_accept && val != 1)

usr.sbin/inetd/inetd.c

1664

" not recommended", val, sep->se_service);

usr.sbin/inetd/inetd.c

1665

sep->se_maxchild = val;

usr.sbin/kbdcontrol/kbdcontrol.c

357

int val = value & 0xFF;

usr.sbin/kbdcontrol/kbdcontrol.c

449

if (val >= F_FN && val <= L_FN)

usr.sbin/kbdcontrol/kbdcontrol.c

450

fprintf(fp, " fkey%02d", val - F_FN + 1);

usr.sbin/kbdcontrol/kbdcontrol.c

451

else if (val >= F_SCR && val <= L_SCR)

usr.sbin/kbdcontrol/kbdcontrol.c

452

fprintf(fp, " scr%02d ", val - F_SCR + 1);

usr.sbin/kbdcontrol/kbdcontrol.c

453

else if (val >= F_ACC && val <= L_ACC)

usr.sbin/kbdcontrol/kbdcontrol.c

454

fprintf(fp, " %-6s", acc_names[val - F_ACC]);

usr.sbin/kbdcontrol/kbdcontrol.c

456

fprintf(fp, " 0x%02x ", val);

usr.sbin/kbdcontrol/kbdcontrol.c

458

fprintf(fp, " %3d ", val);

usr.sbin/kbdcontrol/kbdcontrol.c

461

if (val < ' ')

usr.sbin/kbdcontrol/kbdcontrol.c

462

fprintf(fp, " %s ", ctrl_names[val]);

usr.sbin/kbdcontrol/kbdcontrol.c

463

else if (val == 127)

usr.sbin/kbdcontrol/kbdcontrol.c

465

else if (isascii(val) && isprint(val))

usr.sbin/kbdcontrol/kbdcontrol.c

466

fprintf(fp, " '%c' ", val);

usr.sbin/kbdcontrol/kbdcontrol.c

468

fprintf(fp, " 0x%02x ", val);

usr.sbin/kbdcontrol/kbdcontrol.c

470

fprintf(fp, " %3d ", val);

usr.sbin/keyserv/setkey.c

435

hexdigit(int val)

usr.sbin/keyserv/setkey.c

437

return ("0123456789abcdef"[val]);

usr.sbin/makefs/cd9660.c

316

cd9660_arguments_set_string(const char *val, const char *fieldtitle,

usr.sbin/makefs/cd9660.c

322

if (val == NULL)

usr.sbin/makefs/cd9660.c

324

else if ((len = strlen(val)) <= length) {

usr.sbin/makefs/cd9660.c

326

test = cd9660_valid_d_chars(val);

usr.sbin/makefs/cd9660.c

328

test = cd9660_valid_a_chars(val);

usr.sbin/makefs/cd9660.c

330

memcpy(dest, val, len);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

552

uint8_t val;

usr.sbin/makefs/cd9660/cd9660_eltorito.c

558

val = 0x80; /* Bootable */

usr.sbin/makefs/cd9660/cd9660_eltorito.c

559

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

561

val = 0xff; /* CHS begin */

usr.sbin/makefs/cd9660/cd9660_eltorito.c

562

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

563

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

564

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

566

val = type; /* Part type */

usr.sbin/makefs/cd9660/cd9660_eltorito.c

567

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

569

val = 0xff; /* CHS end */

usr.sbin/makefs/cd9660/cd9660_eltorito.c

570

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

571

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

572

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/ffs/mkfs.c

927

ilog2(int val)

usr.sbin/makefs/ffs/mkfs.c

932

if (1 << n == val)

usr.sbin/makefs/ffs/mkfs.c

934

errx(1, "%s: %d is not a power of 2", __func__, val);

usr.sbin/makefs/hammer2/hammer2_compat.h

60

#define SYSCTL_INT(parent, nbr, name, access, ptr, val, descr) struct __hack

usr.sbin/makefs/hammer2/hammer2_compat.h

61

#define SYSCTL_LONG(parent, nbr, name, access, ptr, val, descr) struct __hack

usr.sbin/makefs/hammer2/hammer2_lz4.c

239

LZ4_NbCommonBytes (register U64 val)

usr.sbin/makefs/hammer2/hammer2_lz4.c

244

_BitScanReverse64( &r, val );

usr.sbin/makefs/hammer2/hammer2_lz4.c

247

return (__builtin_clzll(val) >> 3);

usr.sbin/makefs/hammer2/hammer2_lz4.c

250

if (!(val>>32)) { r=4; } else { r=0; val>>=32; }

usr.sbin/makefs/hammer2/hammer2_lz4.c

251

if (!(val>>16)) { r+=2; val>>=8; } else { val>>=24; }

usr.sbin/makefs/hammer2/hammer2_lz4.c

252

r += (!val);

usr.sbin/makefs/hammer2/hammer2_lz4.c

258

_BitScanForward64( &r, val );

usr.sbin/makefs/hammer2/hammer2_lz4.c

261

return (__builtin_ctzll(val) >> 3);

usr.sbin/makefs/hammer2/hammer2_lz4.c

271

return DeBruijnBytePos[((U64)((val & -val) * 0x0218A392CDABBD3F)) >> 58];

usr.sbin/makefs/hammer2/hammer2_lz4.c

281

LZ4_NbCommonBytes (register U32 val)

usr.sbin/makefs/hammer2/hammer2_lz4.c

286

_BitScanReverse( &r, val );

usr.sbin/makefs/hammer2/hammer2_lz4.c

289

return (__builtin_clz(val) >> 3);

usr.sbin/makefs/hammer2/hammer2_lz4.c

292

if (!(val>>16)) { r=2; val>>=8; } else { r=0; val>>=24; }

usr.sbin/makefs/hammer2/hammer2_lz4.c

293

r += (!val);

usr.sbin/makefs/hammer2/hammer2_lz4.c

299

_BitScanForward( &r, val );

usr.sbin/makefs/hammer2/hammer2_lz4.c

302

return (__builtin_ctz(val) >> 3);

usr.sbin/makefs/hammer2/hammer2_lz4.c

309

return DeBruijnBytePos[((U32)((val & -(S32)val) * 0x077CB531U)) >> 27];

usr.sbin/makefs/hammer2/hammer2_vnops.c

339

vap->va_fsid = pmp->mp->mnt_stat.f_fsid.val[0];

usr.sbin/makefs/hammer2/hammer2_vnops.c

400

vap->va_fsid = pmp->mp->mnt_stat.f_fsid.val[0];

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inffast.c

134

Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inffast.c

136

"inflate: literal 0x%02x\n", here.val));

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inffast.c

137

PUP(out) = (unsigned char)(here.val);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inffast.c

140

len = (unsigned)(here.val);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inffast.c

165

dist = (unsigned)(here.val);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inffast.c

284

here = dcode[here.val + (hold & ((1U << op) - 1))];

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inffast.c

294

here = lcode[here.val + (hold & ((1U << op) - 1))];

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

331

state.lencode[low].bits, state.lencode[low].val);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

342

state.distcode[low].val);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

747

if (here.val < 16) {

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

749

state->lens[state->have++] = here.val;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

752

if (here.val == 16) {

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

764

else if (here.val == 17) {

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

843

here = state->lencode[last.val +

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

853

state->length = (unsigned)here.val;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

855

Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

857

"inflate: literal 0x%02x\n", here.val));

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

893

here = state->distcode[last.val +

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

908

state->offset = (unsigned)here.val;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

118

here.val = (unsigned short)0;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

219

here.val = work[sym];

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

223

here.val = base[work[sym]];

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

227

here.val = 0;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

286

(*table)[low].val = (unsigned short)(next - *table);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

296

here.val = (unsigned short)0;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.h

27

unsigned short val; /* offset in table or code value */

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

215

int val = value;\

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

216

s->bi_buf |= (ush)val << s->bi_valid;\

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

218

s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\

usr.sbin/makefs/makefs.c

365

char *var, *val;

usr.sbin/makefs/makefs.c

371

for (val = var; *val; val++)

usr.sbin/makefs/makefs.c

372

if (*val == '=') {

usr.sbin/makefs/makefs.c

373

*val++ = '\0';

usr.sbin/makefs/makefs.c

376

retval = set_option_var(options, var, val, buf, len);

usr.sbin/makefs/makefs.c

382

set_option_var(const option_t *options, const char *var, const char *val,

usr.sbin/makefs/makefs.c

389

if (!*val) { \

usr.sbin/makefs/makefs.c

393

*(type *)options[i].value = (type)strsuftoll(options[i].desc, val, \

usr.sbin/makefs/makefs.c

407

strlcpy((void *)options[i].value, val, (size_t)

usr.sbin/makefs/makefs.c

411

s = estrdup(val);

usr.sbin/makefs/makefs.c

417

strlcpy(buf, val, len);

usr.sbin/makefs/makefs.c

429

val);

usr.sbin/makefs/mtree.c

467

intmax_t val;

usr.sbin/makefs/mtree.c

469

val = strtoimax(tok, &end, base);

usr.sbin/makefs/mtree.c

472

if (val < min || val > max)

usr.sbin/makefs/mtree.c

474

*res = val;

usr.sbin/memcontrol/memcontrol.c

184

if (mrd[i].mr_flags & attrnames[j].val)

usr.sbin/memcontrol/memcontrol.c

240

mrd.mr_flags |= attrnames[i].val;

usr.sbin/memcontrol/memcontrol.c

44

int val;

usr.sbin/mfiutil/mfi_cmd.c

229

long val;

usr.sbin/mfiutil/mfi_cmd.c

233

val = strtol(name, &cp, 0);

usr.sbin/mfiutil/mfi_cmd.c

235

*target_id = val;

usr.sbin/mfiutil/mfi_drive.c

163

long val;

usr.sbin/mfiutil/mfi_drive.c

170

val = strtol(drive, &cp, 0);

usr.sbin/mfiutil/mfi_drive.c

172

if (val < 0 || val >= 0xffff)

usr.sbin/mfiutil/mfi_drive.c

174

*device_id = val;

usr.sbin/mfiutil/mfi_drive.c

185

val = strtol(cp, &cp, 0);

usr.sbin/mfiutil/mfi_drive.c

186

if (val < 0 || val > 0xff || *cp != ':')

usr.sbin/mfiutil/mfi_drive.c

188

encl = val;

usr.sbin/mfiutil/mfi_drive.c

197

val = strtol(cp, &cp, 0);

usr.sbin/mfiutil/mfi_drive.c

198

if (val < 0 || val > 0xff || *cp != '\0')

usr.sbin/mfiutil/mfi_drive.c

200

slot = val;

usr.sbin/mfiutil/mfi_evt.c

107

long val;

usr.sbin/mfiutil/mfi_evt.c

129

val = strtol(arg, &cp, 0);

usr.sbin/mfiutil/mfi_evt.c

130

if (*cp != '\0' || val < 0) {

usr.sbin/mfiutil/mfi_evt.c

134

*seq = val;

usr.sbin/mfiutil/mfi_evt.c

142

long val;

usr.sbin/mfiutil/mfi_evt.c

181

val = strtol(arg, &cp, 0);

usr.sbin/mfiutil/mfi_evt.c

182

if (*cp != '\0' || val < 0 || val > 0xffff) {

usr.sbin/mfiutil/mfi_evt.c

186

*locale = val;

usr.sbin/mfiutil/mfi_evt.c

194

long val;

usr.sbin/mfiutil/mfi_evt.c

224

val = strtol(arg, &cp, 0);

usr.sbin/mfiutil/mfi_evt.c

225

if (*cp != '\0' || val < -128 || val > 127) {

usr.sbin/mfiutil/mfi_evt.c

229

*class = val;

usr.sbin/mfiutil/mfi_evt.c

535

long val;

usr.sbin/mfiutil/mfi_evt.c

587

val = strtol(optarg, &cp, 0);

usr.sbin/mfiutil/mfi_evt.c

588

if (*cp != '\0' || val <= 0) {

usr.sbin/mfiutil/mfi_evt.c

593

num_events = val;

usr.sbin/mfiutil/mfi_flash.c

77

mbox_store_word(uint8_t *mbox, uint32_t val)

usr.sbin/mfiutil/mfi_flash.c

80

mbox[0] = val & 0xff;

usr.sbin/mfiutil/mfi_flash.c

81

mbox[1] = val >> 8 & 0xff;

usr.sbin/mfiutil/mfi_flash.c

82

mbox[2] = val >> 16 & 0xff;

usr.sbin/mfiutil/mfi_flash.c

83

mbox[3] = val >> 24;

usr.sbin/mfiutil/mfi_patrol.c

250

long val;

usr.sbin/mfiutil/mfi_patrol.c

269

val = strtol(av[2], &cp, 0);

usr.sbin/mfiutil/mfi_patrol.c

275

exec_freq = val;

usr.sbin/mfiutil/mfi_patrol.c

279

val = strtol(av[3], &cp, 0);

usr.sbin/mfiutil/mfi_patrol.c

280

if (*cp != '\0' || val < 0) {

usr.sbin/mfiutil/mfi_patrol.c

284

next_exec = val;

usr.sbin/moused/moused.c

1336

rodent.mode.protocol = t->val;

usr.sbin/moused/moused.c

138

int val;

usr.sbin/moused/moused.c

2927

if (t->val != MOUSE_PROTO_UNKNOWN)

usr.sbin/moused/moused.c

2943

if (t->val != MOUSE_PROTO_UNKNOWN)

usr.sbin/moused/moused.c

2966

gettokenname(symtab_t *tab, int val)

usr.sbin/moused/moused.c

2971

if (tab[i].val == val)

usr.sbin/moused/moused.c

505

static char *gettokenname(symtab_t *tab, int val);

usr.sbin/mptutil/mpt_drive.c

242

long val;

usr.sbin/mptutil/mpt_drive.c

247

val = strtol(drive, &cp, 0);

usr.sbin/mptutil/mpt_drive.c

249

if (val < 0 || val > 0xff)

usr.sbin/mptutil/mpt_drive.c

251

*PhysDiskNum = val;

usr.sbin/mptutil/mpt_drive.c

257

if (val < 0 || val > 0xff)

usr.sbin/mptutil/mpt_drive.c

259

bus = val;

usr.sbin/mptutil/mpt_drive.c

260

val = strtol(cp + 1, &cp, 0);

usr.sbin/mptutil/mpt_drive.c

263

if (val < 0 || val > 0xff)

usr.sbin/mptutil/mpt_drive.c

265

id = val;

usr.sbin/mptutil/mpt_drive.c

267

for (val = 0; val < list->ndrives; val++) {

usr.sbin/mptutil/mpt_drive.c

268

if (list->drives[val]->PhysDiskBus == bus &&

usr.sbin/mptutil/mpt_drive.c

269

list->drives[val]->PhysDiskID == id) {

usr.sbin/mptutil/mpt_drive.c

270

*PhysDiskNum = list->drives[val]->PhysDiskNum;

usr.sbin/mtree/compare.c

124

u_int32_t len, val;

usr.sbin/mtree/compare.c

398

} else if (crc(fd, &val, &len)) {

usr.sbin/mtree/compare.c

406

if (s->cksum != val) {

usr.sbin/mtree/compare.c

411

tab, s->cksum, (unsigned long)val);

usr.sbin/mtree/create.c

196

uint32_t val, len;

usr.sbin/mtree/create.c

202

e = crc(fd, &val, &len);

usr.sbin/mtree/create.c

207

if (asprintf(&ptr, "%u", val) < 0)

usr.sbin/mtree/misc.c

117

allbits |= keylist[i].val;

usr.sbin/mtree/misc.c

130

return (k->val);

usr.sbin/mtree/misc.c

144

return (k->val);

usr.sbin/mtree/misc.c

48

u_int val; /* value */

usr.sbin/mtree/spec.c

533

char *kw, *val, *md, *ep;

usr.sbin/mtree/spec.c

545

while ((val = strsep(&t, " \t")) != NULL && *val == '\0')

usr.sbin/mtree/spec.c

547

if (val == NULL)

usr.sbin/mtree/spec.c

551

ip->cksum = strtoul(val, &ep, 10);

usr.sbin/mtree/spec.c

553

mtree_err("invalid checksum `%s'", val);

usr.sbin/mtree/spec.c

556

ip->st_rdev = parsedev(val);

usr.sbin/mtree/spec.c

559

if (strcmp("none", val) == 0)

usr.sbin/mtree/spec.c

561

else if (string_to_flags(&val, &ip->st_flags, NULL)

usr.sbin/mtree/spec.c

563

mtree_err("invalid flag `%s'", val);

usr.sbin/mtree/spec.c

566

ip->st_gid = (gid_t)strtoul(val, &ep, 10);

usr.sbin/mtree/spec.c

568

mtree_err("invalid gid `%s'", val);

usr.sbin/mtree/spec.c

573

if (gid_from_group(val, &gid) == -1)

usr.sbin/mtree/spec.c

574

mtree_err("unknown group `%s'", val);

usr.sbin/mtree/spec.c

578

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

579

md=&val[2];

usr.sbin/mtree/spec.c

581

md=val;

usr.sbin/mtree/spec.c

586

if ((m = setmode(val)) == NULL)

usr.sbin/mtree/spec.c

588

val, strerror(errno));

usr.sbin/mtree/spec.c

593

ip->st_nlink = (nlink_t)strtoul(val, &ep, 10);

usr.sbin/mtree/spec.c

595

mtree_err("invalid link count `%s'", val);

usr.sbin/mtree/spec.c

598

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

599

md=&val[2];

usr.sbin/mtree/spec.c

601

md=val;

usr.sbin/mtree/spec.c

606

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

607

md=&val[2];

usr.sbin/mtree/spec.c

609

md=val;

usr.sbin/mtree/spec.c

614

ip->st_size = (off_t)strtoll(val, &ep, 10);

usr.sbin/mtree/spec.c

616

mtree_err("invalid size `%s'", val);

usr.sbin/mtree/spec.c

619

if ((ip->slink = strdup(val)) == NULL)

usr.sbin/mtree/spec.c

621

if (strunvis(ip->slink, val) == -1)

usr.sbin/mtree/spec.c

622

mtree_err("strunvis failed on `%s'", val);

usr.sbin/mtree/spec.c

625

len = strlen(val) + 3; /* "," + str + ",\0" */

usr.sbin/mtree/spec.c

628

snprintf(ip->tags, len, ",%s,", val);

usr.sbin/mtree/spec.c

632

(time_t)strtoll(val, &ep, 10);

usr.sbin/mtree/spec.c

634

mtree_err("invalid time `%s'", val);

usr.sbin/mtree/spec.c

635

val = ep + 1;

usr.sbin/mtree/spec.c

636

ip->st_mtimespec.tv_nsec = strtol(val, &ep, 10);

usr.sbin/mtree/spec.c

638

mtree_err("invalid time `%s'", val);

usr.sbin/mtree/spec.c

641

ip->type = parsetype(val);

usr.sbin/mtree/spec.c

644

ip->st_uid = (uid_t)strtoul(val, &ep, 10);

usr.sbin/mtree/spec.c

646

mtree_err("invalid uid `%s'", val);

usr.sbin/mtree/spec.c

651

if (uid_from_user(val, &uid) == -1)

usr.sbin/mtree/spec.c

652

mtree_err("unknown user `%s'", val);

usr.sbin/mtree/spec.c

656

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

657

md=&val[2];

usr.sbin/mtree/spec.c

659

md=val;

usr.sbin/mtree/spec.c

664

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

665

md=&val[2];

usr.sbin/mtree/spec.c

667

md=val;

usr.sbin/mtree/spec.c

672

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

673

md=&val[2];

usr.sbin/mtree/spec.c

675

md=val;

usr.sbin/pciconf/cap.c

487

uint32_t val;

usr.sbin/pciconf/cap.c

493

val = read_config(fd, &p->pc_sel, ptr + PCIR_MSIX_TABLE, 4);

usr.sbin/pciconf/cap.c

494

table_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);

usr.sbin/pciconf/cap.c

495

val = read_config(fd, &p->pc_sel, ptr + PCIR_MSIX_PBA, 4);

usr.sbin/pciconf/cap.c

496

pba_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);

usr.sbin/pciconf/pciconf.c

292

uint32_t val;

usr.sbin/pciconf/pciconf.c

303

val = read_config(fd, &p->pc_sel, PCIR_IOBASEL_1, 1);

usr.sbin/pciconf/pciconf.c

304

if (val != 0 || read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1) != 0) {

usr.sbin/pciconf/pciconf.c

305

if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {

usr.sbin/pciconf/pciconf.c

308

val);

usr.sbin/pciconf/pciconf.c

314

base = PCI_PPBIOBASE(0, val);

usr.sbin/pciconf/pciconf.c

328

val = read_config(fd, &p->pc_sel, PCIR_PMBASEL_1, 2);

usr.sbin/pciconf/pciconf.c

329

if (val != 0 || read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2) != 0) {

usr.sbin/pciconf/pciconf.c

330

if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {

usr.sbin/pciconf/pciconf.c

333

val);

usr.sbin/pciconf/pciconf.c

339

base = PCI_PPBMEMBASE(0, val);

usr.sbin/pciconf/pciconf.c

381

uint32_t val;

usr.sbin/pciconf/pciconf.c

384

val = read_config(fd, &p->pc_sel, basereg, 2);

usr.sbin/pciconf/pciconf.c

385

if ((val & PCIM_CBBIO_MASK) == PCIM_CBBIO_32) {

usr.sbin/pciconf/pciconf.c

390

base = PCI_CBBIOBASE(val);

usr.sbin/pfctl/parse.y

104

char *val;

usr.sbin/pfctl/parse.y

5531

char *p, *val;

usr.sbin/pfctl/parse.y

5561

val = symget(buf);

usr.sbin/pfctl/parse.y

5562

if (val == NULL) {

usr.sbin/pfctl/parse.y

5566

parsebuf = val;

usr.sbin/pfctl/parse.y

5839

free(sym->val);

usr.sbin/pfctl/parse.y

5848

symset(const char *nam, const char *val, int persist)

usr.sbin/pfctl/parse.y

5861

free(sym->val);

usr.sbin/pfctl/parse.y

5874

sym->val = strdup(val);

usr.sbin/pfctl/parse.y

5875

if (sym->val == NULL) {

usr.sbin/pfctl/parse.y

5889

char *sym, *val;

usr.sbin/pfctl/parse.y

5892

if ((val = strrchr(s, '=')) == NULL)

usr.sbin/pfctl/parse.y

5895

if ((sym = malloc(strlen(s) - strlen(val) + 1)) == NULL)

usr.sbin/pfctl/parse.y

5898

strlcpy(sym, s, strlen(s) - strlen(val) + 1);

usr.sbin/pfctl/parse.y

5900

ret = symset(sym, val + 1, 1);

usr.sbin/pfctl/parse.y

5914

return (sym->val);

usr.sbin/pfctl/pfctl_osfp.c

784

long val = 0;

usr.sbin/pfctl/pfctl_osfp.c

848

val = val * 10 + field[i] - '0';

usr.sbin/pfctl/pfctl_osfp.c

849

if (val < 0) {

usr.sbin/pfctl/pfctl_osfp.c

856

if (val > max) {

usr.sbin/pfctl/pfctl_osfp.c

858

name, val, max);

usr.sbin/pfctl/pfctl_osfp.c

861

*var = (int)val;

usr.sbin/powerd/powerd.c

706

int val;

usr.sbin/powerd/powerd.c

711

len = sizeof(val);

usr.sbin/powerd/powerd.c

712

if (sysctlbyname("hw.acpi.acline", &val, &len, NULL, 0) < 0) {

usr.sbin/powerd/powerd.c

726

len = sizeof(val);

usr.sbin/powerd/powerd.c

727

if (sysctlbyname("hw.acpi.battery.life", &val, &len, NULL, 0) < 0) {

usr.sbin/ppp/ccp.c

189

(*algorithm[ccp->out.algorithm]->Disp)(&(*o)->val));

usr.sbin/ppp/ccp.c

365

if ((*o)->val.hdr.id == algorithm[f]->id && (*o)->algorithm == (int)f)

usr.sbin/ppp/ccp.c

370

(*o)->val.hdr.id = algorithm[f]->id;

usr.sbin/ppp/ccp.c

371

(*o)->val.hdr.len = 2;

usr.sbin/ppp/ccp.c

374

(*algorithm[f]->o.OptInit)(fp->bundle, &(*o)->val, &ccp->cfg);

usr.sbin/ppp/ccp.c

377

if (cp + (*o)->val.hdr.len > buff + sizeof buff) {

usr.sbin/ppp/ccp.c

381

memcpy(cp, &(*o)->val, (*o)->val.hdr.len);

usr.sbin/ppp/ccp.c

382

cp += (*o)->val.hdr.len;

usr.sbin/ppp/ccp.c

384

ccp->my_proto = (*o)->val.hdr.id;

usr.sbin/ppp/ccp.c

542

(fp->bundle, &(*o)->val);

usr.sbin/ppp/ccp.c

623

if (o->val.hdr.id == opt->hdr.id)

usr.sbin/ppp/ccp.c

629

memcpy(&o->val, opt, opt->hdr.len);

usr.sbin/ppp/ccp.c

630

if ((*algorithm[f]->o.Set)(fp->bundle, &o->val, &ccp->cfg) ==

usr.sbin/ppp/ccp.h

89

struct fsm_opt val;

usr.sbin/ppp/command.c

1059

int val = 1;

usr.sbin/ppp/command.c

1090

val = (*cmd->func) (&arg);

usr.sbin/ppp/command.c

1096

if (val == -1)

usr.sbin/ppp/command.c

1098

else if (val)

usr.sbin/ppp/command.c

1100

mkPrefix(argn+1, argv, prefix, sizeof prefix), val);

usr.sbin/ppp/command.c

1102

return val;

usr.sbin/ppp/command.c

2970

command_ShowNegval(unsigned val)

usr.sbin/ppp/command.c

2972

switch (val&3) {

usr.sbin/ppp/defs.c

339

NumStr(long val, char *buf, size_t sz)

usr.sbin/ppp/defs.c

347

snprintf(buf, sz, "<%ld>", val);

usr.sbin/ppp/defs.c

352

HexStr(long val, char *buf, size_t sz)

usr.sbin/ppp/defs.c

360

snprintf(buf, sz, "<0x%lx>", val);

usr.sbin/ppp/filter.c

248

int action, family, ruleno, val, width;

usr.sbin/ppp/filter.c

273

val = strtol(*argv, &wp, 0);

usr.sbin/ppp/filter.c

274

if (!*wp && val >= 0 && val < MAXFILTERS) {

usr.sbin/ppp/filter.c

275

if (val <= ruleno) {

usr.sbin/ppp/filter.c

280

action = val;

usr.sbin/ppp/filter.c

367

val = 1;

usr.sbin/ppp/filter.c

377

val = ParseUdpOrTcp(argc, argv, pe, &fe);

usr.sbin/ppp/filter.c

383

val = ParseIcmp(argc, argv, &fe);

usr.sbin/ppp/filter.c

386

val = ParseGeneric(argc, &fe);

usr.sbin/ppp/filter.c

402

if (val)

usr.sbin/ppp/filter.c

405

return val;

usr.sbin/ppp/mp.c

140

u_int16_t val;

usr.sbin/ppp/mp.c

142

ua_ntohs(MBUF_CTOP(m), &val);

usr.sbin/ppp/mp.c

143

if (val & 0x3000) {

usr.sbin/ppp/mp.c

147

header->begin = val & 0x8000 ? 1 : 0;

usr.sbin/ppp/mp.c

148

header->end = val & 0x4000 ? 1 : 0;

usr.sbin/ppp/mp.c

149

header->seq = val & 0x0fff;

usr.sbin/ppp/mp.c

641

u_int16_t val;

usr.sbin/ppp/mp.c

643

val = (begin << 15) | (end << 14) | (u_int16_t)mp->out.seq;

usr.sbin/ppp/mp.c

644

ua_htons(&val, prepend);

usr.sbin/ppp/mp.c

647

u_int32_t val;

usr.sbin/ppp/mp.c

649

val = (begin << 31) | (end << 30) | (u_int32_t)mp->out.seq;

usr.sbin/ppp/mp.c

650

ua_htonl(&val, prepend);

usr.sbin/ppp/mp.c

807

int val;

usr.sbin/ppp/mp.c

812

val = atoi(arg->argv[arg->argn]);

usr.sbin/ppp/mp.c

813

if (val <= 0) {

usr.sbin/ppp/mp.c

817

arg->cx->mp.bandwidth = val;

usr.sbin/ppp/mppe.c

386

u_int32_t val;

usr.sbin/ppp/mppe.c

390

ua_ntohl(o->data, &val);

usr.sbin/ppp/mppe.c

392

if ((n = snprintf(buf, sizeof buf, "value 0x%08x ", (unsigned)val)) > 0)

usr.sbin/ppp/mppe.c

394

if (!(val & MPPE_OPT_BITMASK)) {

usr.sbin/ppp/mppe.c

399

if (val & MPPE_OPT_128BIT) {

usr.sbin/ppp/mppe.c

404

if (val & MPPE_OPT_56BIT) {

usr.sbin/ppp/mppe.c

409

if (val & MPPE_OPT_40BIT) {

usr.sbin/ppp/mppe.c

417

(val & MPPE_OPT_STATELESS) ? "less" : "ful")) > 0)

usr.sbin/ppp/mppe.c

420

if (val & MPPE_OPT_COMPRESSED) {

usr.sbin/ppp/mppe.c

476

u_int32_t val;

usr.sbin/ppp/mppe.c

478

val = cfg->mppe.state == MPPE_STATELESS ? MPPE_OPT_STATELESS : 0;

usr.sbin/ppp/mppe.c

486

val |= MPPE_OPT_40BIT;

usr.sbin/ppp/mppe.c

488

val |= MPPE_OPT_128BIT;

usr.sbin/ppp/mppe.c

493

val |= MPPE_OPT_128BIT;

usr.sbin/ppp/mppe.c

496

val |= MPPE_OPT_56BIT;

usr.sbin/ppp/mppe.c

499

val |= MPPE_OPT_40BIT;

usr.sbin/ppp/mppe.c

502

val |= MPPE_OPT_128BIT | MPPE_OPT_56BIT | MPPE_OPT_40BIT;

usr.sbin/ppp/mppe.c

506

return val;

usr.sbin/ppp/mppe.c

649

u_int32_t val;

usr.sbin/ppp/mppe.c

652

ua_ntohl(o->data, &val);

usr.sbin/ppp/mppe.c

654

switch (val & MPPE_OPT_BITMASK) {

usr.sbin/ppp/mppe.c

668

log_Printf(LogWARN, "Unexpected MPPE options 0x%08x\n", val);

usr.sbin/ppp/mppe.c

673

mp->stateless = !!(val & MPPE_OPT_STATELESS);

usr.sbin/ppp/physical.c

238

int val;

usr.sbin/ppp/physical.c

240

val = GetParityValue(str);

usr.sbin/ppp/physical.c

241

if (val > 0) {

usr.sbin/ppp/physical.c

242

p->cfg.parity = val;

usr.sbin/ppp/physical.c

246

rstio.c_cflag |= val;

usr.sbin/ppp/timer.c

247

#define SECS(val) ((val) / SECTICKS)

usr.sbin/ppp/timer.c

248

#define HSECS(val) (((val) % SECTICKS) * 100 / SECTICKS)

usr.sbin/ppp/vjcomp.c

189

vj2asc(u_int32_t val)

usr.sbin/ppp/vjcomp.c

193

if (val)

usr.sbin/ppp/vjcomp.c

195

(int)((val>>8)&15)+1, val & 1 ? "" : "out");

usr.sbin/pstat/pstat.c

763

char val;

usr.sbin/pstat/pstat.c

835

state[j++] = ttystates[i].val;

usr.sbin/pw/psdate.c

170

long val;

usr.sbin/pw/psdate.c

182

val = strtol(str, &p, 0);

usr.sbin/pw/psdate.c

186

dt += (val * 3600L);

usr.sbin/pw/psdate.c

191

dt += (val * 60L);

usr.sbin/pw/psdate.c

195

dt += val;

usr.sbin/pw/psdate.c

199

dt += (val * 86400L);

usr.sbin/pw/psdate.c

203

dt += (val * 604800L);

usr.sbin/pw/psdate.c

208

T->tm_mon += (int) val;

usr.sbin/pw/psdate.c

214

T->tm_year += (int) val;

usr.sbin/pw/pw.c

211

config = getarg(&arglist, 'C') ? getarg(&arglist, 'C')->val : NULL;

usr.sbin/pw/pw.c

214

char * etcpath = getarg(&arglist, 'V')->val;

usr.sbin/pw/pw.c

450

ca->val = argstr;

usr.sbin/pw/pw.h

126

char const *boolean_str(int val);

usr.sbin/pw/pw.h

68

char *val;

usr.sbin/pw/pw_conf.c

196

boolean_str(int val)

usr.sbin/pw/pw_conf.c

198

if (val == -1)

usr.sbin/pw/pw_conf.c

200

else if (val == -2)

usr.sbin/pw/pw_conf.c

203

return val ? booltrue[0] : boolfalse[0];

usr.sbin/pw/pw_conf.c

395

char const *val = buf;

usr.sbin/pw/pw_conf.c

400

val = boolean_str(config.default_password);

usr.sbin/pw/pw_conf.c

403

val = boolean_str(config.reuse_uids);

usr.sbin/pw/pw_conf.c

406

val = boolean_str(config.reuse_gids);

usr.sbin/pw/pw_conf.c

409

val = config.nispasswd ? config.nispasswd : "";

usr.sbin/pw/pw_conf.c

413

val = config.dotdir ? config.dotdir : boolean_str(0);

usr.sbin/pw/pw_conf.c

416

val = config.newmail ? config.newmail : boolean_str(0);

usr.sbin/pw/pw_conf.c

419

val = config.logfile ? config.logfile : boolean_str(0);

usr.sbin/pw/pw_conf.c

422

val = config.home;

usr.sbin/pw/pw_conf.c

429

val = config.shelldir;

usr.sbin/pw/pw_conf.c

445

val = config.shell_default ? config.shell_default : bourne_shell;

usr.sbin/pw/pw_conf.c

448

val = config.default_group ? config.default_group : "";

usr.sbin/pw/pw_conf.c

465

val = config.default_class ? config.default_class : "";

usr.sbin/pw/pw_conf.c

500

fprintf(fp, "%s = \"%s\"\n", kwds[i], val);

usr.sbin/pw/pw_conf.c

502

fprintf(fp, "%s = %s\n", kwds[i], val);

usr.sbin/pw/pw_conf.c

504

printf("WROTE: %s = %s\n", kwds[i], val);

usr.sbin/pw/pw_group.c

104

if (mode != M_ADD && grp == NULL && alldigits(a_name->val)) {

usr.sbin/pw/pw_group.c

109

grp = (a_name != NULL) ? GETGRNAM(a_name->val) : GETGRGID((gid_t) atoi(a_gid->val));

usr.sbin/pw/pw_group.c

113

grp = GETGRGID(atoi(a_gid->val));

usr.sbin/pw/pw_group.c

119

fakegroup.gr_name = a_name ? a_name->val : "nogroup";

usr.sbin/pw/pw_group.c

120

fakegroup.gr_gid = a_gid ? (gid_t) atol(a_gid->val) : -1;

usr.sbin/pw/pw_group.c

124

errx(EX_DATAERR, "unknown group `%s'", a_name ? a_name->val : a_gid->val);

usr.sbin/pw/pw_group.c

142

pw_log(cnf, mode, W_GROUP, "%s(%ld) removed", a_name->val, (long) gid);

usr.sbin/pw/pw_group.c

148

grp->gr_gid = (gid_t) atoi(a_gid->val);

usr.sbin/pw/pw_group.c

151

grp->gr_name = pw_checkname((u_char *)arg->val, 0);

usr.sbin/pw/pw_group.c

156

errx(EX_DATAERR, "group name `%s' already exists", a_name->val);

usr.sbin/pw/pw_group.c

161

grp->gr_name = pw_checkname((u_char *)a_name->val, 0);

usr.sbin/pw/pw_group.c

176

if (strcmp(arg->val, "-") == 0)

usr.sbin/pw/pw_group.c

179

int fd = atoi(arg->val);

usr.sbin/pw/pw_group.c

225

(arg = getarg(args, 'm')) != NULL) && arg->val) {

usr.sbin/pw/pw_group.c

245

for (p = strtok(arg->val, ", \t"); p != NULL; p = strtok(NULL, ", \t")) {

usr.sbin/pw/pw_group.c

271

} else if (mode == M_UPDATE && (rc = chggrent(a_name->val, grp)) != 0) {

usr.sbin/pw/pw_group.c

279

if ((grp = GETGRNAM(a_name->val)) == NULL)

usr.sbin/pw/pw_group.c

325

if ((valueCopy = strdup(arg->val)) == NULL)

usr.sbin/pw/pw_group.c

359

gid = (gid_t) atol(a_gid->val);

usr.sbin/pw/pw_user.c

1007

sh = arg->val;

usr.sbin/pw/pw_user.c

143

cnf->home = arg->val;

usr.sbin/pw/pw_user.c

147

dmode_c = arg->val;

usr.sbin/pw/pw_user.c

215

cnf->expire_days = atoi(arg->val);

usr.sbin/pw/pw_user.c

218

cnf->nispasswd = arg->val;

usr.sbin/pw/pw_user.c

220

if ((arg = getarg(args, 'p')) != NULL && arg->val)

usr.sbin/pw/pw_user.c

221

cnf->password_days = atoi(arg->val);

usr.sbin/pw/pw_user.c

224

if (!*(p = arg->val)) /* Handle empty group list specially */

usr.sbin/pw/pw_user.c

235

cnf->default_class = pw_checkname((u_char *)arg->val, 0);

usr.sbin/pw/pw_user.c

237

if ((arg = getarg(args, 'G')) != NULL && arg->val) {

usr.sbin/pw/pw_user.c

240

for (p = strtok(arg->val, ", \t"); p != NULL; p = strtok(NULL, ", \t")) {

usr.sbin/pw/pw_user.c

253

if (stat(cnf->dotdir = arg->val, &st) == -1 || !S_ISDIR(st.st_mode))

usr.sbin/pw/pw_user.c

258

cnf->shell_default = arg->val;

usr.sbin/pw/pw_user.c

261

cnf->default_password = boolean_val(arg->val, cnf->default_password);

usr.sbin/pw/pw_user.c

265

if ((arg = getarg(args, 'u')) != NULL && (p = strtok(arg->val, ", \t")) != NULL) {

usr.sbin/pw/pw_user.c

271

if ((arg = getarg(args, 'i')) != NULL && (p = strtok(arg->val, ", \t")) != NULL) {

usr.sbin/pw/pw_user.c

279

if (write_userconfig(arg ? arg->val : NULL))

usr.sbin/pw/pw_user.c

297

pwd = GETPWNAM(pw_checkname((u_char *)a_name->val, 0));

usr.sbin/pw/pw_user.c

310

&& strspn(a_name->val, "0123456789") == strlen(a_name->val)

usr.sbin/pw/pw_user.c

311

&& atoi(a_name->val) > 0) { /* Assume uid */

usr.sbin/pw/pw_user.c

324

pwd = GETPWUID(atoi(a_uid->val));

usr.sbin/pw/pw_user.c

328

fakeuser.pw_name = a_name ? a_name->val : "nouser";

usr.sbin/pw/pw_user.c

329

fakeuser.pw_uid = a_uid ? (uid_t) atol(a_uid->val) : -1;

usr.sbin/pw/pw_user.c

335

errx(EX_NOUSER, "no such uid `%s'", a_uid->val);

usr.sbin/pw/pw_user.c

336

errx(EX_NOUSER, "no such user `%s'", a_name->val);

usr.sbin/pw/pw_user.c

404

rc = delnispwent(cnf->nispasswd, a_name->val);

usr.sbin/pw/pw_user.c

412

editgroups(a_name->val, NULL);

usr.sbin/pw/pw_user.c

414

pw_log(cnf, mode, W_USER, "%s(%ld) account removed", a_name->val, (long) uid);

usr.sbin/pw/pw_user.c

435

a_name->val, (long) uid, home,

usr.sbin/pw/pw_user.c

452

pwd->pw_name = pw_checkname((u_char *)arg->val, 0);

usr.sbin/pw/pw_user.c

456

if ((arg = getarg(args, 'u')) != NULL && isdigit((unsigned char)*arg->val)) {

usr.sbin/pw/pw_user.c

457

pwd->pw_uid = (uid_t) atol(arg->val);

usr.sbin/pw/pw_user.c

476

if (*arg->val == '\0' || strcmp(arg->val, "0") == 0) {

usr.sbin/pw/pw_user.c

484

time_t expire = parse_date(now, arg->val);

usr.sbin/pw/pw_user.c

487

errx(EX_DATAERR, "invalid password change date `%s'", arg->val);

usr.sbin/pw/pw_user.c

496

if (*arg->val == '\0' || strcmp(arg->val, "0") == 0) {

usr.sbin/pw/pw_user.c

504

time_t expire = parse_date(now, arg->val);

usr.sbin/pw/pw_user.c

507

errx(EX_DATAERR, "invalid account expiry date `%s'", arg->val);

usr.sbin/pw/pw_user.c

516

char *shell = shell_path(cnf->shelldir, cnf->shells, arg->val);

usr.sbin/pw/pw_user.c

535

if (strcmp(pwd->pw_dir, arg->val))

usr.sbin/pw/pw_user.c

537

if (stat(pwd->pw_dir = arg->val, &st) == -1) {

usr.sbin/pw/pw_user.c

566

else if ((pwd = GETPWNAM(a_name->val)) != NULL) /* Exists */

usr.sbin/pw/pw_user.c

567

errx(EX_DATAERR, "login name `%s' already exists", a_name->val);

usr.sbin/pw/pw_user.c

573

pwd->pw_name = a_name->val;

usr.sbin/pw/pw_user.c

596

char *gecos = pw_checkname((u_char *)arg->val, 1);

usr.sbin/pw/pw_user.c

605

if (strcmp(arg->val, "-") == 0) {

usr.sbin/pw/pw_user.c

611

int fd = atoi(arg->val);

usr.sbin/pw/pw_user.c

694

rc = chgpwent(a_name->val, pwd);

usr.sbin/pw/pw_user.c

703

rc = chgnispwent(cnf->nispasswd, a_name->val, pwd);

usr.sbin/pw/pw_user.c

721

pwd = GETPWNAM(a_name->val);

usr.sbin/pw/pw_user.c

725

a_name->val = arg->val; /* update new name */

usr.sbin/pw/pw_user.c

726

pwd = GETPWNAM(a_name->val); /* refetch renamed rec */

usr.sbin/pw/pw_user.c

730

errx(EX_NOUSER, "user '%s' disappeared during update", a_name->val);

usr.sbin/pw/pw_user.c

800

uid = (uid_t) atol(a_uid->val);

usr.sbin/pw/pw_user.c

863

if ((grp = GETGRNAM(a_gid->val)) == NULL) {

usr.sbin/pw/pw_user.c

864

gid = (gid_t) atol(a_gid->val);

usr.sbin/pw/pw_user.c

865

if ((gid == 0 && !isdigit((unsigned char)*a_gid->val)) || (grp = GETGRGID(gid)) == NULL)

usr.sbin/pw/pw_user.c

866

errx(EX_NOUSER, "group `%s' is not defined", a_gid->val);

usr.sbin/pw/pw_user.c

923

if ((result = parse_date(now, arg->val)) == now)

usr.sbin/pw/pw_user.c

924

errx(EX_DATAERR, "invalid date/time `%s'", arg->val);

usr.sbin/pw/pw_user.c

939

if ((result = parse_date(now, arg->val)) == now)

usr.sbin/pw/pw_user.c

940

errx(EX_DATAERR, "invalid date/time `%s'", arg->val);

usr.sbin/pw/pw_user.c

953

return arg->val;

usr.sbin/rtadvd/config.c

335

int32_t val;

usr.sbin/rtadvd/config.c

391

MAYHAVE(val, "maxinterval", DEF_MAXRTRADVINTERVAL);

usr.sbin/rtadvd/config.c

392

if (val < MIN_MAXINTERVAL || val > MAX_MAXINTERVAL) {

usr.sbin/rtadvd/config.c

395

"(must be between %u and %u)", __func__, val,

usr.sbin/rtadvd/config.c

399

rai->rai_maxinterval = (uint16_t)val;

usr.sbin/rtadvd/config.c

401

MAYHAVE(val, "mininterval", rai->rai_maxinterval/3);

usr.sbin/rtadvd/config.c

402

if ((uint16_t)val < MIN_MININTERVAL ||

usr.sbin/rtadvd/config.c

403

(uint16_t)val > (rai->rai_maxinterval * 3) / 4) {

usr.sbin/rtadvd/config.c

407

__func__, val, ifi->ifi_ifname, MIN_MININTERVAL,

usr.sbin/rtadvd/config.c

411

rai->rai_mininterval = (uint16_t)val;

usr.sbin/rtadvd/config.c

413

MAYHAVE(val, "chlim", DEF_ADVCURHOPLIMIT);

usr.sbin/rtadvd/config.c

414

rai->rai_hoplimit = val & 0xff;

usr.sbin/rtadvd/config.c

417

val = 0;

usr.sbin/rtadvd/config.c

419

val |= ND_RA_FLAG_MANAGED;

usr.sbin/rtadvd/config.c

421

val |= ND_RA_FLAG_OTHER;

usr.sbin/rtadvd/config.c

423

val |= ND_RA_FLAG_RTPREF_HIGH;

usr.sbin/rtadvd/config.c

425

if ((val & ND_RA_FLAG_RTPREF_HIGH)) {

usr.sbin/rtadvd/config.c

430

val |= ND_RA_FLAG_RTPREF_LOW;

usr.sbin/rtadvd/config.c

433

MAYHAVE(val, "raflags", 0);

usr.sbin/rtadvd/config.c

435

rai->rai_managedflg = val & ND_RA_FLAG_MANAGED;

usr.sbin/rtadvd/config.c

436

rai->rai_otherflg = val & ND_RA_FLAG_OTHER;

usr.sbin/rtadvd/config.c

441

rai->rai_rtpref = val & ND_RA_FLAG_RTPREF_MASK;

usr.sbin/rtadvd/config.c

448

MAYHAVE(val, "rltime", rai->rai_maxinterval * 3);

usr.sbin/rtadvd/config.c

449

if ((uint16_t)val && ((uint16_t)val < rai->rai_maxinterval ||

usr.sbin/rtadvd/config.c

450

(uint16_t)val > MAXROUTERLIFETIME)) {

usr.sbin/rtadvd/config.c

454

__func__, val, ifi->ifi_ifname, rai->rai_maxinterval,

usr.sbin/rtadvd/config.c

458

rai->rai_lifetime = val & 0xffff;

usr.sbin/rtadvd/config.c

460

MAYHAVE(val, "rtime", DEF_ADVREACHABLETIME);

usr.sbin/rtadvd/config.c

461

if (val < 0 || val > MAXREACHABLETIME) {

usr.sbin/rtadvd/config.c

465

__func__, val, ifi->ifi_ifname, MAXREACHABLETIME);

usr.sbin/rtadvd/config.c

468

rai->rai_reachabletime = (uint32_t)val;

usr.sbin/rtadvd/config.c

491

MAYHAVE(val, "clockskew", 0);

usr.sbin/rtadvd/config.c

492

rai->rai_clockskew = val;

usr.sbin/rtadvd/config.c

528

MAYHAVE(val, entbuf, 64);

usr.sbin/rtadvd/config.c

529

if (val < 0 || val > 128) {

usr.sbin/rtadvd/config.c

532

__func__, val, addr, ifi->ifi_ifname);

usr.sbin/rtadvd/config.c

535

pfx->pfx_prefixlen = (int)val;

usr.sbin/rtadvd/config.c

539

val = 0;

usr.sbin/rtadvd/config.c

541

val |= ND_OPT_PI_FLAG_ONLINK;

usr.sbin/rtadvd/config.c

543

val |= ND_OPT_PI_FLAG_AUTO;

usr.sbin/rtadvd/config.c

545

MAYHAVE(val, entbuf,

usr.sbin/rtadvd/config.c

548

pfx->pfx_onlinkflg = val & ND_OPT_PI_FLAG_ONLINK;

usr.sbin/rtadvd/config.c

549

pfx->pfx_autoconfflg = val & ND_OPT_PI_FLAG_AUTO;

usr.sbin/rtadvd/config.c

602

if (val < 0 || val64 > 0xffffffff) {

usr.sbin/rtadvd/config.c

705

MAYHAVE(val, entbuf, 256);

usr.sbin/rtadvd/config.c

706

if (val == 256) {

usr.sbin/rtadvd/config.c

708

MAYHAVE(val, oentbuf, 256);

usr.sbin/rtadvd/config.c

709

if (val != 256)

usr.sbin/rtadvd/config.c

713

val = 64;

usr.sbin/rtadvd/config.c

715

if (val < 0 || val > 128) {

usr.sbin/rtadvd/config.c

718

__func__, val, addr, ifi->ifi_ifname);

usr.sbin/rtadvd/config.c

721

rti->rti_prefixlen = (int)val;

usr.sbin/rtadvd/config.c

725

val = 0;

usr.sbin/rtadvd/config.c

727

val |= ND_RA_FLAG_RTPREF_HIGH;

usr.sbin/rtadvd/config.c

729

if ((val & ND_RA_FLAG_RTPREF_HIGH)) {

usr.sbin/rtadvd/config.c

736

val |= ND_RA_FLAG_RTPREF_LOW;

usr.sbin/rtadvd/config.c

739

MAYHAVE(val, entbuf, 256); /* XXX */

usr.sbin/rtadvd/config.c

740

if (val == 256) {

usr.sbin/rtadvd/config.c

742

MAYHAVE(val, oentbuf, 256);

usr.sbin/rtadvd/config.c

743

if (val != 256) {

usr.sbin/rtadvd/config.c

747

val = 0;

usr.sbin/rtadvd/config.c

749

rti->rti_rtpref = val & ND_RA_FLAG_RTPREF_MASK;

usr.sbin/rtadvd/config.c

826

MAYHAVE(val, entbuf, (rai->rai_maxinterval * 3 / 2));

usr.sbin/rtadvd/config.c

827

if ((uint16_t)val < rai->rai_maxinterval ||

usr.sbin/rtadvd/config.c

828

(uint16_t)val > rai->rai_maxinterval * 2) {

usr.sbin/rtadvd/config.c

831

entbuf, val, ifi->ifi_ifname, rai->rai_maxinterval,

usr.sbin/rtadvd/config.c

835

rdn->rd_ltime = val;

usr.sbin/rtadvd/config.c

875

MAYHAVE(val, entbuf, (rai->rai_maxinterval * 3 / 2));

usr.sbin/rtadvd/config.c

876

if ((uint16_t)val < rai->rai_maxinterval ||

usr.sbin/rtadvd/config.c

877

(uint16_t)val > rai->rai_maxinterval * 2) {

usr.sbin/rtadvd/config.c

880

entbuf, val, ifi->ifi_ifname, rai->rai_maxinterval,

usr.sbin/rtadvd/config.c

884

dns->dn_ltime = val;

usr.sbin/sensorsd/sensorsd.c

717

double val;

usr.sbin/sensorsd/sensorsd.c

728

val = strtod(buf, &p);

usr.sbin/sensorsd/sensorsd.c

737

rval = val * 1000 * 1000 + 273150000;

usr.sbin/sensorsd/sensorsd.c

741

rval = (val * 1000 * 1000 + 459670000) / 9 * 5;

usr.sbin/sensorsd/sensorsd.c

748

rval = val;

usr.sbin/sensorsd/sensorsd.c

753

rval = val * 1000 * 1000;

usr.sbin/sensorsd/sensorsd.c

756

rval = val * 1000.0;

usr.sbin/sensorsd/sensorsd.c

763

rval = val;

usr.sbin/sensorsd/sensorsd.c

769

rval = val * 1000 * 1000;

usr.sbin/sensorsd/sensorsd.c

772

rval = val * 1000 * 1000 * 1000;

usr.sbin/usbconfig/usbconfig.c

227

uid_t val;

usr.sbin/usbconfig/usbconfig.c

231

val = strtoul(name, &ep, 0);

usr.sbin/usbconfig/usbconfig.c

238

return (val);

usr.sbin/usbconfig/usbconfig.c

244

int val;

usr.sbin/usbconfig/usbconfig.c

248

val = strtoul(s, &ep, 0);

usr.sbin/usbconfig/usbconfig.c

255

return val;

usr.sbin/yppush/yppush_main.c

435

yppush_foreach(int status, char *key, int keylen, char *val, int vallen,

usr.sbin/yppush/yppush_main.c

443

snprintf(server, sizeof(server), "%.*s", vallen, val);

usr.sbin/ypserv/yp_dblookup.c

668

yp_getbykey(keydat *key, valdat *val)

usr.sbin/ypserv/yp_dblookup.c

680

val->valdat_val = db_val.data;

usr.sbin/ypserv/yp_dblookup.c

681

val->valdat_len = db_val.size;

usr.sbin/ypserv/yp_dblookup.c

688

yp_firstbykey(keydat *key, valdat *val)

usr.sbin/ypserv/yp_dblookup.c

698

val->valdat_val = db_val.data;

usr.sbin/ypserv/yp_dblookup.c

699

val->valdat_len = db_val.size;

usr.sbin/ypserv/yp_dblookup.c

706

yp_nextbykey(keydat *key, valdat *val)

usr.sbin/ypserv/yp_dblookup.c

719

val->valdat_val = db_val.data;

usr.sbin/ypserv/yp_dblookup.c

720

val->valdat_len = db_val.size;

usr.sbin/ypserv/yp_dnslookup.c

241

result_v2.val.valdat_len = strlen(buf);

usr.sbin/ypserv/yp_dnslookup.c

242

result_v2.val.valdat_val = buf;

usr.sbin/ypserv/yp_dnslookup.c

261

result_v1.YPVAL.val.valdat_len = strlen(buf);

usr.sbin/ypserv/yp_dnslookup.c

262

result_v1.YPVAL.val.valdat_val = buf;

usr.sbin/ypserv/yp_server.c

136

result.val.valdat_val = "";

usr.sbin/ypserv/yp_server.c

137

result.val.valdat_len = 0;

usr.sbin/ypserv/yp_server.c

158

result.stat = yp_getbykey(&argp->key, &result.val);

usr.sbin/ypserv/yp_server.c

206

result.val.valdat_val = result.key.keydat_val = "";

usr.sbin/ypserv/yp_server.c

207

result.val.valdat_len = result.key.keydat_len = 0;

usr.sbin/ypserv/yp_server.c

228

result.stat = yp_firstbykey(&result.key, &result.val);

usr.sbin/ypserv/yp_server.c

238

result.val.valdat_val = result.key.keydat_val = "";

usr.sbin/ypserv/yp_server.c

239

result.val.valdat_len = result.key.keydat_len = 0;

usr.sbin/ypserv/yp_server.c

263

result.stat = yp_nextbykey(&result.key, &result.val);

usr.sbin/ypserv/yp_server.c

467

if ((objp->ypresp_all_u.val.stat =

usr.sbin/ypserv/yp_server.c

468

yp_nextbykey(&objp->ypresp_all_u.val.key,

usr.sbin/ypserv/yp_server.c

469

&objp->ypresp_all_u.val.val)) == YP_TRUE) {

usr.sbin/ypserv/yp_server.c

494

result.ypresp_all_u.val.key.keydat_len = 0;

usr.sbin/ypserv/yp_server.c

495

result.ypresp_all_u.val.key.keydat_val = "";

usr.sbin/ypserv/yp_server.c

502

result.ypresp_all_u.val.stat = YP_YPERR;

usr.sbin/ypserv/yp_server.c

507

result.ypresp_all_u.val.stat = YP_BADARGS;

usr.sbin/ypserv/yp_server.c

517

result.ypresp_all_u.val.stat = YP_YPERR;

usr.sbin/ypserv/yp_server.c

533

result.ypresp_all_u.val.stat = YP_YPERR;

usr.sbin/ypserv/yp_server.c

552

&result.ypresp_all_u.val.key, 0) != YP_TRUE) {

usr.sbin/ypserv/yp_server.c

553

result.ypresp_all_u.val.stat = yp_errno;

usr.sbin/ypserv/yp_server.c

573

valdat val;

usr.sbin/ypserv/yp_server.c

604

result.stat = yp_getbykey(&key, &val);

usr.sbin/ypserv/yp_server.c

606

bcopy(val.valdat_val, &ypvalbuf, val.valdat_len);

usr.sbin/ypserv/yp_server.c

607

ypvalbuf[val.valdat_len] = '\0';

usr.sbin/ypserv/yp_server.c

620

valdat val;

usr.sbin/ypserv/yp_server.c

650

result.stat = yp_getbykey(&key, &val);

usr.sbin/ypserv/yp_server.c

653

result.ordernum = atoi(val.valdat_val);

usr.sbin/ypserv/yp_server.c

815

result.ypresponse_u.yp_resp_valtype.val.valdat_val = "";

usr.sbin/ypserv/yp_server.c

816

result.ypresponse_u.yp_resp_valtype.val.valdat_len = 0;

usr.sbin/ypserv/yp_server.c

843

result.ypresponse_u.yp_resp_key_valtype.val.valdat_val =

usr.sbin/ypserv/yp_server.c

845

result.ypresponse_u.yp_resp_key_valtype.val.valdat_len =

usr.sbin/ypserv/yp_server.c

874

result.ypresponse_u.yp_resp_key_valtype.val.valdat_val =

usr.sbin/ypserv/yp_server.c

876

result.ypresponse_u.yp_resp_key_valtype.val.valdat_len =

usr.sbin/zic/zic.c

1297

convert(const int_fast32_t val, char *const buf)

usr.sbin/zic/zic.c

1304

b[i] = val >> shift;

usr.sbin/zic/zic.c

1308

convert64(const zic_t val, char * const buf)

usr.sbin/zic/zic.c

1315

b[i] = val >> shift;

usr.sbin/zic/zic.c

1319

puttzcode(const int_fast32_t val, FILE *const fp)

usr.sbin/zic/zic.c

1323

convert(val, buf);

usr.sbin/zic/zic.c

1328

puttzcode64(const zic_t val, FILE * const fp)

usr.sbin/zic/zic.c

1332

convert64(val, buf);