#ifndef _MPSVAR_H
#define _MPSVAR_H
#define MPS_DRIVER_VERSION "13.00.00.02-fbsd"
#define MPS_DB_MAX_WAIT 2500
#define MPS_REQ_FRAMES 1024
#define MPS_EVT_REPLY_FRAMES 32
#define MPS_REPLY_FRAMES MPS_REQ_FRAMES
#define MPS_CHAIN_FRAMES 2048
#define MPS_SENSE_LEN SSD_FULL_SIZE
#define MPS_MSI_COUNT 1
#define MPS_SGE64_SIZE 12
#define MPS_SGE32_SIZE 8
#define MPS_SGC_SIZE 8
#define CAN_SLEEP 1
#define NO_SLEEP 0
#define MPS_PERIODIC_DELAY 1
#define MPS_SCSI_RI_INVALID_FRAME (0x00000002)
#define MPS_STRING_LENGTH 64
#define MPS_MAPTABLE_BAD_IDX 0xFFFFFFFF
#define MPS_DPM_BAD_IDX 0xFFFF
#define MPS_ENCTABLE_BAD_IDX 0xFF
#define MPS_MAX_MISSING_COUNT 0x0F
#define MPS_DEV_RESERVED 0x20000000
#define MPS_MAP_IN_USE 0x10000000
#define MPS_RAID_CHANNEL 1
#define MPS_MAP_BAD_ID 0xFFFFFFFF
#define MPS_CHIP_WD_DEVICE_ID 0x007E
#define MPS_WD_LSI_OEM 0x80
#define MPS_WD_HIDE_EXPOSE_MASK 0x03
#define MPS_WD_HIDE_ALWAYS 0x00
#define MPS_WD_EXPOSE_ALWAYS 0x01
#define MPS_WD_HIDE_IF_VOLUME 0x02
#define MPS_WD_RETRY 0x01
#define MPS_MAN_PAGE10_SIZE 0x5C
#define MPS_MAX_DISKS_IN_VOL 10
#define MPI2_WD_LOG_ENTRY 0x8002
#define MPI2_WD_SSD_THROTTLING 0x0041
#define MPI2_WD_DRIVE_LIFE_WARN 0x0043
#define MPI2_WD_DRIVE_LIFE_DEAD 0x0044
#define MPI2_WD_RAIL_MON_FAIL 0x004D
typedef uint8_t u8;
typedef uint16_t u16;
typedef uint32_t u32;
typedef uint64_t u64;
struct dev_mapping_table {
u64 physical_id;
u32 device_info;
u32 phy_bits;
u16 dpm_entry_num;
u16 dev_handle;
u8 reserved1;
u8 channel;
u16 id;
u8 missing_count;
u8 init_complete;
u8 TLR_bits;
u8 reserved2;
};
struct enc_mapping_table {
u64 enclosure_id;
u32 start_index;
u32 phy_bits;
u16 dpm_entry_num;
u16 enc_handle;
u16 num_slots;
u16 start_slot;
u8 missing_count;
u8 removal_flag;
u8 skip_search;
u8 init_complete;
};
struct map_removal_table{
u16 dpm_entry_num;
u16 dev_handle;
};
typedef struct mps_fw_diagnostic_buffer {
size_t size;
uint8_t extended_type;
uint8_t buffer_type;
uint8_t force_release;
uint32_t product_specific[23];
uint8_t immediate;
uint8_t enabled;
uint8_t valid_data;
uint8_t owned_by_firmware;
uint32_t unique_id;
} mps_fw_diagnostic_buffer_t;
struct mps_softc;
struct mps_command;
struct mpssas_softc;
union ccb;
struct mpssas_target;
struct mps_column_map;
MALLOC_DECLARE(M_MPT2);
typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
MPI2_EVENT_NOTIFICATION_REPLY *reply);
typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
struct mps_chain {
TAILQ_ENTRY(mps_chain) chain_link;
MPI2_SGE_IO_UNION *chain;
uint32_t chain_busaddr;
};
#define MPS_IOVEC_COUNT 2
struct mps_command {
TAILQ_ENTRY(mps_command) cm_link;
TAILQ_ENTRY(mps_command) cm_recovery;
struct mps_softc *cm_sc;
union ccb *cm_ccb;
void *cm_data;
u_int cm_length;
u_int cm_out_len;
struct uio cm_uio;
struct iovec cm_iovec[MPS_IOVEC_COUNT];
u_int cm_max_segs;
u_int cm_sglsize;
MPI2_SGE_IO_UNION *cm_sge;
uint8_t *cm_req;
uint8_t *cm_reply;
uint32_t cm_reply_data;
mps_command_callback_t *cm_complete;
void *cm_complete_data;
struct mpssas_target *cm_targ;
MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
u_int cm_lun;
u_int cm_flags;
#define MPS_CM_FLAGS_POLLED (1 << 0)
#define MPS_CM_FLAGS_COMPLETE (1 << 1)
#define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2)
#define MPS_CM_FLAGS_DATAOUT (1 << 3)
#define MPS_CM_FLAGS_DATAIN (1 << 4)
#define MPS_CM_FLAGS_WAKEUP (1 << 5)
#define MPS_CM_FLAGS_DD_IO (1 << 6)
#define MPS_CM_FLAGS_USE_UIO (1 << 7)
#define MPS_CM_FLAGS_SMP_PASS (1 << 8)
#define MPS_CM_FLAGS_CHAIN_FAILED (1 << 9)
#define MPS_CM_FLAGS_ERROR_MASK MPS_CM_FLAGS_CHAIN_FAILED
u_int cm_state;
#define MPS_CM_STATE_FREE 0
#define MPS_CM_STATE_BUSY 1
#define MPS_CM_STATE_TIMEDOUT 2
bus_dmamap_t cm_dmamap;
struct scsi_sense_data *cm_sense;
TAILQ_HEAD(, mps_chain) cm_chain_list;
uint32_t cm_req_busaddr;
uint32_t cm_sense_busaddr;
struct callout cm_callout;
};
struct mps_column_map {
uint16_t dev_handle;
uint8_t phys_disk_num;
};
struct mps_event_handle {
TAILQ_ENTRY(mps_event_handle) eh_list;
mps_evt_callback_t *callback;
void *data;
uint8_t mask[16];
};
struct mps_softc {
device_t mps_dev;
struct cdev *mps_cdev;
u_int mps_flags;
#define MPS_FLAGS_INTX (1 << 0)
#define MPS_FLAGS_MSI (1 << 1)
#define MPS_FLAGS_BUSY (1 << 2)
#define MPS_FLAGS_SHUTDOWN (1 << 3)
#define MPS_FLAGS_DIAGRESET (1 << 4)
#define MPS_FLAGS_ATTACH_DONE (1 << 5)
#define MPS_FLAGS_WD_AVAILABLE (1 << 6)
u_int mps_debug;
#if 0
u_int disable_msix;
#endif
u_int enable_msi;
int tm_cmds_active;
int io_cmds_active;
int io_cmds_highwater;
int chain_free;
int max_chains;
int chain_free_lowwater;
#if 0
uint64_t chain_alloc_fail;
#endif
struct sysctl_ctx_list sysctl_ctx;
struct sysctl_oid *sysctl_tree;
char fw_version[16];
struct mps_command *commands;
struct mps_chain *chains;
struct callout periodic;
struct mpssas_softc *sassc;
char tmp_string[MPS_STRING_LENGTH];
TAILQ_HEAD(, mps_command) req_list;
TAILQ_HEAD(, mps_command) high_priority_req_list;
TAILQ_HEAD(, mps_chain) chain_list;
TAILQ_HEAD(, mps_command) tm_list;
int replypostindex;
int replyfreeindex;
struct resource *mps_regs_resource;
bus_space_handle_t mps_bhandle;
bus_space_tag_t mps_btag;
int mps_regs_rid;
bus_dma_tag_t mps_parent_dmat;
bus_dma_tag_t buffer_dmat;
MPI2_IOC_FACTS_REPLY *facts;
MPI2_PORT_FACTS_REPLY *pfacts;
int num_reqs;
int num_replies;
int fqdepth;
int pqdepth;
uint8_t event_mask[16];
TAILQ_HEAD(, mps_event_handle) event_list;
struct mps_event_handle *mps_log_eh;
struct lock mps_lock;
struct intr_config_hook mps_ich;
struct resource *mps_irq[MPS_MSI_COUNT];
void *mps_intrhand[MPS_MSI_COUNT];
int mps_irq_rid[MPS_MSI_COUNT];
int mps_irq_type[MPS_MSI_COUNT];
uint8_t *req_frames;
bus_addr_t req_busaddr;
bus_dma_tag_t req_dmat;
bus_dmamap_t req_map;
uint8_t *reply_frames;
bus_addr_t reply_busaddr;
bus_dma_tag_t reply_dmat;
bus_dmamap_t reply_map;
struct scsi_sense_data *sense_frames;
bus_addr_t sense_busaddr;
bus_dma_tag_t sense_dmat;
bus_dmamap_t sense_map;
uint8_t *chain_frames;
bus_addr_t chain_busaddr;
bus_dma_tag_t chain_dmat;
bus_dmamap_t chain_map;
MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
bus_addr_t post_busaddr;
uint32_t *free_queue;
bus_addr_t free_busaddr;
bus_dma_tag_t queues_dmat;
bus_dmamap_t queues_map;
uint8_t *fw_diag_buffer;
bus_addr_t fw_diag_busaddr;
bus_dma_tag_t fw_diag_dmat;
bus_dmamap_t fw_diag_map;
uint8_t ir_firmware;
Mpi2IOCPage8_t ioc_pg8;
struct dev_mapping_table *mapping_table;
struct enc_mapping_table *enclosure_table;
struct map_removal_table *removal_table;
uint8_t *dpm_entry_used;
uint8_t *dpm_flush_entry;
Mpi2DriverMappingPage0_t *dpm_pg0;
uint16_t max_devices;
uint16_t max_enclosures;
uint16_t max_expanders;
uint8_t max_volumes;
uint8_t num_enc_table_entries;
uint8_t num_rsvd_entries;
uint8_t num_channels;
uint16_t max_dpm_entries;
uint8_t is_dpm_enable;
uint8_t track_mapping_events;
uint32_t pending_map_events;
uint8_t mt_full_retry;
uint8_t mt_add_device_failed;
mps_fw_diagnostic_buffer_t
fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
uint32_t events_to_record[4];
mps_event_entry_t recorded_events[MPS_EVENT_QUEUE_SIZE];
uint8_t event_index;
uint32_t event_number;
uint8_t eedp_enabled;
uint8_t control_TLR;
eventhandler_tag shutdown_eh;
#define MPS_DIAG_RESET_TIMEOUT 300000
uint8_t wait_for_port_enable;
uint8_t port_enable_complete;
uint8_t WD_valid_config;
uint8_t WD_hide_expose;
uint8_t DD_num_phys_disks;
uint16_t DD_dev_handle;
uint32_t DD_stripe_size;
uint32_t DD_stripe_exponent;
uint32_t DD_block_size;
uint16_t DD_block_exponent;
uint64_t DD_max_lba;
struct mps_column_map DD_column_map[MPS_MAX_DISKS_IN_VOL];
};
struct mps_config_params {
MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
u_int action;
u_int page_address;
u_int status;
void *buffer;
u_int length;
int timeout;
void (*callback)(struct mps_softc *, struct mps_config_params *);
void *cbdata;
};
struct scsi_read_capacity_eedp
{
uint8_t addr[8];
uint8_t length[4];
uint8_t protect;
};
static __inline uint32_t
mps_regread(struct mps_softc *sc, uint32_t offset)
{
return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
}
static __inline void
mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
{
bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
}
static __inline void
mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
{
if (++sc->replyfreeindex >= sc->fqdepth)
sc->replyfreeindex = 0;
sc->free_queue[sc->replyfreeindex] = busaddr;
mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
}
static __inline struct mps_chain *
mps_alloc_chain(struct mps_softc *sc)
{
struct mps_chain *chain;
if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
sc->chain_free--;
if (sc->chain_free < sc->chain_free_lowwater)
sc->chain_free_lowwater = sc->chain_free;
}
#if 0
else
sc->chain_alloc_fail++;
#endif
return (chain);
}
static __inline void
mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
{
#if 0
bzero(chain->chain, 128);
#endif
sc->chain_free++;
TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
}
static __inline void
mps_free_command(struct mps_softc *sc, struct mps_command *cm)
{
struct mps_chain *chain, *chain_temp;
if (cm->cm_reply != NULL)
mps_free_reply(sc, cm->cm_reply_data);
cm->cm_reply = NULL;
cm->cm_flags = 0;
cm->cm_complete = NULL;
cm->cm_complete_data = NULL;
cm->cm_ccb = NULL;
cm->cm_targ = NULL;
cm->cm_max_segs = 0;
cm->cm_lun = 0;
cm->cm_state = MPS_CM_STATE_FREE;
cm->cm_data = NULL;
cm->cm_length = 0;
cm->cm_out_len = 0;
cm->cm_sglsize = 0;
cm->cm_sge = NULL;
TAILQ_FOREACH_MUTABLE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
mps_free_chain(sc, chain);
}
TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
}
static __inline struct mps_command *
mps_alloc_command(struct mps_softc *sc)
{
struct mps_command *cm;
cm = TAILQ_FIRST(&sc->req_list);
if (cm == NULL)
return (NULL);
TAILQ_REMOVE(&sc->req_list, cm, cm_link);
KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command"));
cm->cm_state = MPS_CM_STATE_BUSY;
return (cm);
}
static __inline void
mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm)
{
struct mps_chain *chain, *chain_temp;
if (cm->cm_reply != NULL)
mps_free_reply(sc, cm->cm_reply_data);
cm->cm_reply = NULL;
cm->cm_flags = 0;
cm->cm_complete = NULL;
cm->cm_complete_data = NULL;
cm->cm_ccb = NULL;
cm->cm_targ = NULL;
cm->cm_lun = 0;
cm->cm_state = MPS_CM_STATE_FREE;
TAILQ_FOREACH_MUTABLE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
mps_free_chain(sc, chain);
}
TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
}
static __inline struct mps_command *
mps_alloc_high_priority_command(struct mps_softc *sc)
{
struct mps_command *cm;
cm = TAILQ_FIRST(&sc->high_priority_req_list);
if (cm == NULL)
return (NULL);
TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command"));
cm->cm_state = MPS_CM_STATE_BUSY;
return (cm);
}
static __inline void
mps_lock(struct mps_softc *sc)
{
lockmgr(&sc->mps_lock, LK_EXCLUSIVE);
}
static __inline void
mps_unlock(struct mps_softc *sc)
{
lockmgr(&sc->mps_lock, LK_RELEASE);
}
#define MPS_INFO (1 << 0)
#define MPS_TRACE (1 << 1)
#define MPS_FAULT (1 << 2)
#define MPS_EVENT (1 << 3)
#define MPS_LOG (1 << 4)
#define mps_printf(sc, args...) \
device_printf((sc)->mps_dev, ##args)
#define mps_vprintf(sc, args...) \
do { \
if (bootverbose) \
mps_printf(sc, ##args); \
} while (0)
#define mps_dprint(sc, level, msg, args...) \
do { \
if (sc->mps_debug & level) \
device_printf(sc->mps_dev, msg, ##args); \
} while (0)
#define mps_dprint_field(sc, level, msg, args...) \
do { \
if (sc->mps_debug & level) \
kprintf("\t" msg, ##args); \
} while (0)
#define MPS_PRINTFIELD_START(sc, tag...) \
mps_dprint((sc), MPS_INFO, ##tag); \
mps_dprint_field((sc), MPS_INFO, ":\n")
#define MPS_PRINTFIELD_END(sc, tag) \
mps_dprint((sc), MPS_INFO, tag "\n")
#define MPS_PRINTFIELD(sc, facts, attr, fmt) \
mps_dprint_field((sc), MPS_INFO, #attr ": " #fmt "\n", (facts)->attr)
#define MPS_EVENTFIELD_START(sc, tag...) \
mps_dprint((sc), MPS_EVENT, ##tag); \
mps_dprint_field((sc), MPS_EVENT, ":\n")
#define MPS_EVENTFIELD(sc, facts, attr, fmt) \
mps_dprint_field((sc), MPS_EVENT, #attr ": " #fmt "\n", (facts)->attr)
static __inline void
mps_from_u64(uint64_t data, U64 *mps)
{
(mps)->High = htole32((uint32_t)((data) >> 32));
(mps)->Low = htole32((uint32_t)((data) & 0xffffffff));
}
static __inline uint64_t
mps_to_u64(U64 *data)
{
return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
}
static __inline void
mps_mask_intr(struct mps_softc *sc)
{
uint32_t mask;
mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
mask |= MPI2_HIM_REPLY_INT_MASK;
mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
}
static __inline void
mps_unmask_intr(struct mps_softc *sc)
{
uint32_t mask;
mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
mask &= ~MPI2_HIM_REPLY_INT_MASK;
mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
}
int mps_pci_setup_interrupts(struct mps_softc *sc);
int mps_pci_restore(struct mps_softc *sc);
int mps_attach(struct mps_softc *sc);
int mps_free(struct mps_softc *sc);
void mps_intr(void *);
void mps_intr_msi(void *);
void mps_intr_locked(void *);
int mps_register_events(struct mps_softc *, uint8_t *, mps_evt_callback_t *,
void *, struct mps_event_handle **);
int mps_restart(struct mps_softc *);
int mps_update_events(struct mps_softc *, struct mps_event_handle *, uint8_t *);
int mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
int mps_push_sge(struct mps_command *, void *, size_t, int);
int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int);
int mps_attach_sas(struct mps_softc *sc);
int mps_detach_sas(struct mps_softc *sc);
int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
void mpi_init_sge(struct mps_command *cm, void *req, void *sge);
int mps_attach_user(struct mps_softc *);
void mps_detach_user(struct mps_softc *);
void mpssas_record_event(struct mps_softc *sc,
MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
int mps_wait_command(struct mps_softc *sc, struct mps_command *cm, int timeout);
int mps_request_polled(struct mps_softc *sc, struct mps_command *cm);
int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t
*mpi_reply, Mpi2BiosPage3_t *config_page);
int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t
*mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *,
Mpi2IOCPage8_t *);
int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply);
int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
Mpi2SasDevicePage0_t *, u32 , u16 );
int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
Mpi2DriverMappingPage0_t *, u16 );
int mps_config_get_raid_volume_pg1(struct mps_softc *sc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
u16 handle);
int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,
u64 *wwid);
int mps_config_get_raid_pd_pg0(struct mps_softc *sc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
u32 page_address);
void mpssas_ir_shutdown(struct mps_softc *sc);
int mps_reinit(struct mps_softc *sc);
void mpssas_handle_reinit(struct mps_softc *sc);
void mps_base_static_config_pages(struct mps_softc *sc);
void mps_wd_config_pages(struct mps_softc *sc);
int mps_mapping_initialize(struct mps_softc *);
void mps_mapping_topology_change_event(struct mps_softc *,
Mpi2EventDataSasTopologyChangeList_t *);
int mps_mapping_is_reinit_required(struct mps_softc *);
void mps_mapping_free_memory(struct mps_softc *sc);
int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
Mpi2DriverMappingPage0_t *, u16 );
void mps_mapping_exit(struct mps_softc *);
void mps_mapping_check_devices(struct mps_softc *, int);
int mps_mapping_allocate_memory(struct mps_softc *sc);
unsigned int mps_mapping_get_sas_id(struct mps_softc *, uint64_t , u16);
unsigned int mps_mapping_get_sas_id_from_handle(struct mps_softc *sc,
u16 handle);
unsigned int mps_mapping_get_raid_id(struct mps_softc *sc, u64 wwid,
u16 handle);
unsigned int mps_mapping_get_raid_id_from_handle(struct mps_softc *sc,
u16 volHandle);
void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *,
Mpi2EventDataSasEnclDevStatusChange_t *event_data);
void mps_mapping_ir_config_change_event(struct mps_softc *sc,
Mpi2EventDataIrConfigChangeList_t *event_data);
void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data,
MPI2_EVENT_NOTIFICATION_REPLY *event);
void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle);
void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle);
int mpssas_startup(struct mps_softc *sc);
struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t);
SYSCTL_DECL(_hw_mps);
#define mps_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
kthread_create(func, farg, proc_ptr, fmtstr, arg)
#define mps_kproc_exit(arg) kthread_exit()
#if defined(CAM_PRIORITY_XPT)
#define MPS_PRIORITY_XPT CAM_PRIORITY_XPT
#else
#define MPS_PRIORITY_XPT 5
#endif
#endif