drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1098

WREG32_SOC15(VCN, inst_idx, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1288

WREG32_SOC15(VCN, i, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

80

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE),

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1331

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

74

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE),

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

964

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1011

WREG32_SOC15(VCN, inst_idx, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1201

WREG32_SOC15(VCN, i, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

80

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE),

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

64

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE),

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

768

WREG32_SOC15(VCN, inst_idx, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

929

WREG32_SOC15(VCN, i, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1099

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

67

SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_SIZE),

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

754

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE, ring->ring_size / sizeof(uint32_t));