bin/dd/args.c

171

if (in.offset > LLONG_MAX / in.dbsz || out.offset > LLONG_MAX / out.dbsz)

bin/dd/args.c

245

out.offset = get_off(arg);

bin/dd/args.c

252

in.offset = get_off(arg);

bin/dd/dd.c

151

if (in.offset)

bin/dd/dd.c

153

if (out.offset)

bin/dd/dd.c

164

(void)ftruncate(out.fd, out.offset * out.dbsz);

bin/dd/dd.h

55

off_t offset; /* # of blocks to skip */

bin/dd/position.c

127

if (lseek(out.fd, out.offset * out.dbsz, SEEK_SET) == -1)

bin/dd/position.c

135

t_op.mt_count = out.offset;

bin/dd/position.c

143

for (cnt = 0; cnt < out.offset; ++cnt) {

bin/dd/position.c

160

while (cnt++ < out.offset)

bin/dd/position.c

67

if (lseek(in.fd, in.offset * in.dbsz, SEEK_CUR) == -1)

bin/dd/position.c

77

for (bcnt = in.dbsz, cnt = in.offset, warned = 0; cnt;) {

bin/ksh/c_test.c

535

ptest_error(Test_env *te, int offset, const char *msg)

bin/ksh/c_test.c

537

const char *op = te->pos.wp + offset >= te->wp_end ?

bin/ksh/c_test.c

538

NULL : te->pos.wp[offset];

bin/ksh/emacs.c

881

int offset = -1; /* offset of match in xbuf, else -1 */

bin/ksh/emacs.c

888

if (offset < 0) {

bin/ksh/emacs.c

900

offset = x_search(pat, 0, offset);

bin/ksh/emacs.c

903

offset = -1;

bin/ksh/emacs.c

909

offset = -1;

bin/ksh/emacs.c

911

offset = x_search(pat, 1, offset);

bin/ksh/emacs.c

921

if (offset >= 0) {

bin/ksh/emacs.c

923

offset = x_match(xbuf, pat);

bin/ksh/emacs.c

924

if (offset >= 0) {

bin/ksh/emacs.c

925

x_goto(xbuf + offset + (p - pat) -

bin/ksh/emacs.c

930

offset = x_search(pat, 0, offset);

bin/ksh/emacs.c

936

if (offset < 0)

bin/ksh/emacs.c

943

x_search(char *pat, int sameline, int offset)

bin/ksh/emacs.c

951

if (offset < 0)

bin/ksh/exec.c

1421

dbteste_error(Test_env *te, int offset, const char *msg)

bin/ksh/exec.c

1424

internal_warningf("%s: %s (offset %d)", __func__, msg, offset);

bin/ksh/history.c

556

int offset = histptr - history;

bin/ksh/history.c

559

if (offset > n - 1) {

bin/ksh/history.c

562

offset = n - 1;

bin/ksh/history.c

563

for (hp = history; hp < histptr - offset; hp++)

bin/ksh/history.c

565

memmove(history, histptr - offset, n * sizeof(char *));

bin/ksh/history.c

573

histptr = history + offset;

bin/ksh/syn.c

891

dbtestp_error(Test_env *te, int offset, const char *msg)

bin/ksh/syn.c

895

if (offset < 0) {

bin/ksh/syn.c

900

offset);

games/boggle/boggle/word.c

101

if ((sp = dictspace + offset) >= dictend)

games/boggle/boggle/word.c

107

return (fseek(fp, offset, ptrname));

games/boggle/boggle/word.c

98

dictseek(FILE *fp, long offset, int ptrname)

games/tetris/scores.c

382

printem(int level, int offset, struct highscore *hs, int n, const char *me)

games/tetris/scores.c

398

row + offset, sp->hs_time ? '*' : ' ',

games/trek/schedule.c

50

schedule(int type, double offset, int x, int y, int z)

games/trek/schedule.c

56

date = Now.date + offset;

games/trek/schedule.c

88

reschedule(struct event *e1, double offset)

games/trek/schedule.c

95

date = Now.date + offset;

include/icdb.h

36

int icdb_update(struct icdb *db, const void *entry, int offset);

lib/libarch/alpha/bwx.c

235

bwx_readb(void *handle, u_int32_t offset)

lib/libarch/alpha/bwx.c

239

return alpha_ldbu(h->virt1 + offset);

lib/libarch/alpha/bwx.c

243

bwx_readw(void *handle, u_int32_t offset)

lib/libarch/alpha/bwx.c

247

return alpha_ldwu(h->virt2 + offset);

lib/libarch/alpha/bwx.c

251

bwx_readl(void *handle, u_int32_t offset)

lib/libarch/alpha/bwx.c

255

return alpha_ldlu(h->virt4 + offset);

lib/libarch/alpha/bwx.c

259

bwx_writeb(void *handle, u_int32_t offset, u_int8_t val)

lib/libarch/alpha/bwx.c

263

alpha_stb(h->virt1 + offset, val);

lib/libarch/alpha/bwx.c

267

bwx_writew(void *handle, u_int32_t offset, u_int16_t val)

lib/libarch/alpha/bwx.c

271

alpha_stw(h->virt2 + offset, val);

lib/libarch/alpha/bwx.c

275

bwx_writel(void *handle, u_int32_t offset, u_int32_t val)

lib/libarch/alpha/bwx.c

279

alpha_stl(h->virt4 + offset, val);

lib/libarch/alpha/io.c

112

readb(void *handle, u_int32_t offset)

lib/libarch/alpha/io.c

114

return ops->readb(handle, offset);

lib/libarch/alpha/io.c

118

readw(void *handle, u_int32_t offset)

lib/libarch/alpha/io.c

120

return ops->readw(handle, offset);

lib/libarch/alpha/io.c

124

readl(void *handle, u_int32_t offset)

lib/libarch/alpha/io.c

126

return ops->readl(handle, offset);

lib/libarch/alpha/io.c

130

writeb(void *handle, u_int32_t offset, u_int8_t val)

lib/libarch/alpha/io.c

132

ops->writeb(handle, offset, val);

lib/libarch/alpha/io.c

137

writew(void *handle, u_int32_t offset, u_int16_t val)

lib/libarch/alpha/io.c

139

ops->writew(handle, offset, val);

lib/libarch/alpha/io.c

144

writel(void *handle, u_int32_t offset, u_int32_t val)

lib/libarch/alpha/io.c

146

ops->writel(handle, offset, val);

lib/libarch/alpha/io.c

151

writeb_nb(void *handle, u_int32_t offset, u_int8_t val)

lib/libarch/alpha/io.c

153

ops->writeb(handle, offset, val);

lib/libarch/alpha/io.c

157

writew_nb(void *handle, u_int32_t offset, u_int16_t val)

lib/libarch/alpha/io.c

159

ops->writew(handle, offset, val);

lib/libarch/alpha/io.c

163

writel_nb(void *handle, u_int32_t offset, u_int32_t val)

lib/libarch/alpha/io.c

165

ops->writel(handle, offset, val);

lib/libc/asr/asr_debug.c

214

if (p.offset != len)

lib/libc/asr/asr_debug.c

215

fprintf(f, ";; REMAINING GARBAGE %zu\n", len - p.offset);

lib/libc/asr/asr_debug.c

219

fprintf(f, ";; ERROR AT OFFSET %zu/%zu: %s\n", p.offset, p.len,

lib/libc/asr/asr_private.h

38

size_t offset;

lib/libc/asr/asr_private.h

45

size_t offset;

lib/libc/asr/asr_utils.c

112

dname_expand(const unsigned char *data, size_t len, size_t offset,

lib/libc/asr/asr_utils.c

118

if (offset >= len)

lib/libc/asr/asr_utils.c

122

end = start = offset;

lib/libc/asr/asr_utils.c

124

for (; (n = data[offset]); ) {

lib/libc/asr/asr_utils.c

126

if (offset + 1 >= len)

lib/libc/asr/asr_utils.c

128

ptr = 256 * (n & ~0xc0) + data[offset + 1];

lib/libc/asr/asr_utils.c

131

if (end < offset + 2)

lib/libc/asr/asr_utils.c

132

end = offset + 2;

lib/libc/asr/asr_utils.c

133

offset = start = ptr;

lib/libc/asr/asr_utils.c

136

if (offset + n + 1 >= len)

lib/libc/asr/asr_utils.c

139

if (dname_check_label(data + offset + 1, n) == -1)

lib/libc/asr/asr_utils.c

145

memmove(dst, data + offset, count);

lib/libc/asr/asr_utils.c

150

offset += n + 1;

lib/libc/asr/asr_utils.c

151

if (end < offset)

lib/libc/asr/asr_utils.c

152

end = offset;

lib/libc/asr/asr_utils.c

154

if (end < offset + 1)

lib/libc/asr/asr_utils.c

155

end = offset + 1;

lib/libc/asr/asr_utils.c

169

pack->offset = 0;

lib/libc/asr/asr_utils.c

178

unpack->offset = 0;

lib/libc/asr/asr_utils.c

188

if (p->len - p->offset < len) {

lib/libc/asr/asr_utils.c

193

memmove(data, p->buf + p->offset, len);

lib/libc/asr/asr_utils.c

194

p->offset += len;

lib/libc/asr/asr_utils.c

241

e = dname_expand(p->buf, p->len, p->offset, &p->offset, dst, max);

lib/libc/asr/asr_utils.c

294

if (p->len - p->offset < rdlen) {

lib/libc/asr/asr_utils.c

299

save_offset = p->offset;

lib/libc/asr/asr_utils.c

343

rr->rr.other.rdata = p->buf + p->offset;

lib/libc/asr/asr_utils.c

345

p->offset += rdlen;

lib/libc/asr/asr_utils.c

352

if (p->offset - save_offset != rdlen)

lib/libc/asr/asr_utils.c

364

if (p->len < p->offset + len) {

lib/libc/asr/asr_utils.c

369

memmove(p->buf + p->offset, data, len);

lib/libc/asr/asr_utils.c

370

p->offset += len;

lib/libc/asr/res_mkquery.c

83

return (p.offset);

lib/libc/asr/res_send_async.c

414

as->as.dns.obuflen = p.offset;

lib/libc/asr/res_send_async.c

504

size_t offset;

lib/libc/asr/res_send_async.c

525

offset = 0;

lib/libc/asr/res_send_async.c

531

offset = as->as.dns.datalen - sizeof(len);

lib/libc/asr/res_send_async.c

533

iov[i].iov_base = as->as.dns.obuf + offset;

lib/libc/asr/res_send_async.c

534

iov[i].iov_len = as->as.dns.obuflen - offset;

lib/libc/asr/res_send_async.c

576

size_t offset, len;

lib/libc/asr/res_send_async.c

619

offset = as->as.dns.datalen - sizeof(as->as.dns.pktlen);

lib/libc/asr/res_send_async.c

620

pos = as->as.dns.ibuf + offset;

lib/libc/asr/res_send_async.c

621

len = as->as.dns.ibuflen - offset;

lib/libc/asr/res_send_async.c

743

if (p.offset != as->as.dns.ibuflen) {

lib/libc/db/btree/bt_delete.c

369

indx_t cnt, idx, *ip, offset;

lib/libc/db/btree/bt_delete.c

423

offset = pg->linp[idx];

lib/libc/db/btree/bt_delete.c

425

if (ip[0] < offset)

lib/libc/db/btree/bt_delete.c

428

ip[0] = ip[1] < offset ? ip[1] + nksize : ip[1];

lib/libc/db/btree/bt_delete.c

461

indx_t cnt, *ip, offset;

lib/libc/db/btree/bt_delete.c

488

offset = h->linp[idx];

lib/libc/db/btree/bt_delete.c

490

if (ip[0] < offset)

lib/libc/db/btree/bt_delete.c

493

ip[0] = ip[1] < offset ? ip[1] + nbytes : ip[1];

lib/libc/db/hash/hash_page.c

645

int max_free, offset, splitnum;

lib/libc/db/hash/hash_page.c

685

offset = hashp->SPARES[splitnum] -

lib/libc/db/hash/hash_page.c

689

if (offset > SPLITMASK) {

lib/libc/db/hash/hash_page.c

698

offset = 1;

lib/libc/db/hash/hash_page.c

721

(int)OADDR_OF(splitnum, offset), 1, free_page))

lib/libc/db/hash/hash_page.c

727

offset++;

lib/libc/db/hash/hash_page.c

728

if (offset > SPLITMASK) {

lib/libc/db/hash/hash_page.c

738

offset = 0;

lib/libc/db/hash/hash_page.c

750

addr = OADDR_OF(splitnum, offset);

lib/libc/db/hash/hash_page.c

775

offset = (i ? bit - hashp->SPARES[i - 1] : bit);

lib/libc/db/hash/hash_page.c

776

if (offset >= SPLITMASK) {

lib/libc/db/hash/hash_page.c

781

addr = OADDR_OF(i, offset);

lib/libc/db/recno/rec_delete.c

146

indx_t *ip, cnt, offset;

lib/libc/db/recno/rec_delete.c

174

offset = h->linp[idx];

lib/libc/db/recno/rec_delete.c

176

if (ip[0] < offset)

lib/libc/db/recno/rec_delete.c

179

ip[0] = ip[1] < offset ? ip[1] + nbytes : ip[1];

lib/libc/net/ip6opt.c

132

u_int8_t *optp = (u_int8_t *)extbuf + offset;

lib/libc/net/ip6opt.c

156

inet6_opt_finish(void *extbuf, socklen_t extlen, int offset)

lib/libc/net/ip6opt.c

158

int updatelen = offset > 0 ? (1 + ((offset - 1) | 7)) : 0;

lib/libc/net/ip6opt.c

162

int padlen = updatelen - offset;

lib/libc/net/ip6opt.c

167

padp = (u_int8_t *)extbuf + offset;

lib/libc/net/ip6opt.c

181

inet6_opt_set_val(void *databuf, int offset, void *val, socklen_t vallen)

lib/libc/net/ip6opt.c

184

memcpy((u_int8_t *)databuf + offset, val, vallen);

lib/libc/net/ip6opt.c

185

return (offset + vallen);

lib/libc/net/ip6opt.c

189

inet6_opt_next(void *extbuf, socklen_t extlen, int offset, u_int8_t *typep,

lib/libc/net/ip6opt.c

205

if (offset == 0)

lib/libc/net/ip6opt.c

208

optp = (u_int8_t *)extbuf + offset;

lib/libc/net/ip6opt.c

237

inet6_opt_find(void *extbuf, socklen_t extlen, int offset, u_int8_t type,

lib/libc/net/ip6opt.c

253

if (offset == 0)

lib/libc/net/ip6opt.c

256

optp = (u_int8_t *)extbuf + offset;

lib/libc/net/ip6opt.c

278

inet6_opt_get_val(void *databuf, int offset, void *val, socklen_t vallen)

lib/libc/net/ip6opt.c

282

memcpy(val, (u_int8_t *)databuf + offset, vallen);

lib/libc/net/ip6opt.c

284

return (offset + vallen);

lib/libc/net/ip6opt.c

88

inet6_opt_append(void *extbuf, socklen_t extlen, int offset, u_int8_t type,

lib/libc/net/ip6opt.c

91

int currentlen = offset, padlen = 0;

lib/libc/stdio/fseek.c

147

target = offset;

lib/libc/stdio/fseek.c

151

target = st.st_size + offset;

lib/libc/stdio/fseek.c

235

(*seekfn)(fp->_cookie, (fpos_t)offset, whence) == POS_ERR) {

lib/libc/stdio/fseek.c

252

fseek(FILE *fp, long offset, int whence)

lib/libc/stdio/fseek.c

254

return (fseeko(fp, offset, whence));

lib/libc/stdio/fseek.c

49

fseeko(FILE *fp, off_t offset, int whence)

lib/libc/stdio/fseek.c

99

offset += curoff;

lib/libc/stdio/ftell.c

92

off_t offset = ftello(fp);

lib/libc/stdio/ftell.c

93

if (offset > LONG_MAX) {

lib/libc/stdio/ftell.c

97

return ((long)offset);

lib/libc/stdio/stdio.c

69

__sseek(void *cookie, fpos_t offset, int whence)

lib/libc/stdio/stdio.c

74

ret = lseek(fp->_file, offset, whence);

lib/libc/stdlib/getenv.c

44

__findenv(const char *name, int len, int *offset)

lib/libc/stdlib/getenv.c

52

for (p = environ + *offset; (cp = *p) != NULL; ++p) {

lib/libc/stdlib/getenv.c

57

*offset = p - environ;

lib/libc/stdlib/getenv.c

71

int offset = 0;

lib/libc/stdlib/getenv.c

76

return (__findenv(name, (int)(np - name), &offset));

lib/libc/stdlib/icdb.c

222

uint32_t offset;

lib/libc/stdlib/icdb.c

234

while ((offset = idxdata[hash & idxmask]) != -1) {

lib/libc/stdlib/icdb.c

235

if (icdb_get(db, entry, offset) != 0) {

lib/libc/stdlib/icdb.c

242

*idxp = offset;

lib/libc/stdlib/icdb.c

266

icdb_update(struct icdb *db, const void *entry, int offset)

lib/libc/stdlib/icdb.c

278

memcpy((uint8_t *)db->entries + offset * entrysize, entry, entrysize);

lib/libc/stdlib/icdb.c

280

msync((uint8_t *)db->entries + offset * entrysize, entrysize,

lib/libc/stdlib/malloc.c

1195

if (++i >= bp->offset)

lib/libc/stdlib/malloc.c

1210

bp->bits[bp->offset + k] = size;

lib/libc/stdlib/malloc.c

1263

validate_canary(d, ptr, info->bits[info->offset + chunknum],

lib/libc/stdlib/malloc.c

1609

if (info->bits[info->offset + chunknum] < argsz)

lib/libc/stdlib/malloc.c

1612

info->bits[info->offset + chunknum],

lib/libc/stdlib/malloc.c

1911

info->bits[info->offset + chunknum] = newsz;

lib/libc/stdlib/malloc.c

2041

if (info->bits[info->offset + chunknum] != oldsize)

lib/libc/stdlib/malloc.c

2043

info->bits[info->offset + chunknum],

lib/libc/stdlib/malloc.c

225

u_short offset; /* requested size table offset */

lib/libc/stdlib/malloc.c

985

p->offset = howmany(p->total, MALLOC_BITS);

lib/libc/stdlib/setenv.c

110

if ((C = __findenv(name, (int)(np - name), &offset)) != NULL) {

lib/libc/stdlib/setenv.c

111

int tmpoff = offset + 1;

lib/libc/stdlib/setenv.c

141

offset = cnt;

lib/libc/stdlib/setenv.c

144

if (!(environ[offset] = /* name + `=' + value */

lib/libc/stdlib/setenv.c

147

for (C = environ[offset]; (*C = *name++) && *C != '='; ++C)

lib/libc/stdlib/setenv.c

164

int offset = 0;

lib/libc/stdlib/setenv.c

178

while (__findenv(name, (int)(np - name), &offset)) {

lib/libc/stdlib/setenv.c

179

for (P = &environ[offset];; ++P)

lib/libc/stdlib/setenv.c

47

int offset = 0;

lib/libc/stdlib/setenv.c

57

if (__findenv(str, (int)(cp - str), &offset) != NULL) {

lib/libc/stdlib/setenv.c

58

environ[offset++] = str;

lib/libc/stdlib/setenv.c

60

while (__findenv(str, (int)(cp - str), &offset)) {

lib/libc/stdlib/setenv.c

61

for (P = &environ[offset];; ++P)

lib/libc/stdlib/setenv.c

96

int l_value, offset = 0;

lib/libc/sys/w_pread.c

22

pread(int fd, void *buf, size_t nbyte, off_t offset)

lib/libc/sys/w_pread.c

27

ret = HIDDEN(pread)(fd, buf, nbyte, offset);

lib/libc/sys/w_preadv.c

23

preadv(int fd, const struct iovec *iovp, int iovcnt, off_t offset)

lib/libc/sys/w_preadv.c

28

ret = HIDDEN(preadv)(fd, iovp, iovcnt, offset);

lib/libc/sys/w_pwrite.c

22

pwrite(int fd, const void *buf, size_t nbyte, off_t offset)

lib/libc/sys/w_pwrite.c

27

ret = HIDDEN(pwrite)(fd, buf, nbyte, offset);

lib/libc/sys/w_pwritev.c

23

pwritev(int fd, const struct iovec *iovp, int iovcnt, off_t offset)

lib/libc/sys/w_pwritev.c

28

ret = HIDDEN(pwritev)(fd, iovp, iovcnt, offset);

lib/libc/time/localtime.c

1235

localsub(const time_t *timep, int_fast32_t offset, struct tm *tmp)

lib/libc/time/localtime.c

1245

return gmtsub(timep, offset, tmp);

lib/libc/time/localtime.c

1266

result = localsub(&newt, offset, tmp);

lib/libc/time/localtime.c

1349

gmtsub(const time_t *timep, int_fast32_t offset, struct tm *tmp)

lib/libc/time/localtime.c

1361

result = timesub(timep, offset, gmtptr, tmp);

lib/libc/time/localtime.c

1367

if (offset != 0)

lib/libc/time/localtime.c

1405

offtime(const time_t *timep, long offset)

lib/libc/time/localtime.c

1407

return gmtsub(timep, offset, &tm);

lib/libc/time/localtime.c

1425

timesub(const time_t *timep, int_fast32_t offset, const struct state *sp,

lib/libc/time/localtime.c

143

static struct tm * gmtsub(const time_t * timep, int_fast32_t offset,

lib/libc/time/localtime.c

145

static struct tm * localsub(const time_t * timep, int_fast32_t offset,

lib/libc/time/localtime.c

1496

rem += offset - corr;

lib/libc/time/localtime.c

1544

tmp->tm_gmtoff = offset;

lib/libc/time/localtime.c

158

int_fast32_t offset);

lib/libc/time/localtime.c

162

int_fast32_t offset, int * okayp);

lib/libc/time/localtime.c

1654

int_fast32_t offset, int *okayp, int do_norm_secs)

lib/libc/time/localtime.c

166

int_fast32_t offset, int * okayp, int do_norm_secs);

lib/libc/time/localtime.c

167

static struct tm * timesub(const time_t * timep, int_fast32_t offset,

lib/libc/time/localtime.c

172

const struct rule * rulep, int_fast32_t offset);

lib/libc/time/localtime.c

1748

if ((*funcp)(&t, offset, &mytm) == NULL) {

lib/libc/time/localtime.c

1797

if ((*funcp)(&newt, offset, &mytm) == NULL)

lib/libc/time/localtime.c

1817

if ((*funcp)(&t, offset, tmp))

lib/libc/time/localtime.c

1825

int_fast32_t offset, int *okayp)

lib/libc/time/localtime.c

1834

t = time2sub(tmp, funcp, offset, okayp, FALSE);

lib/libc/time/localtime.c

1835

return *okayp ? t : time2sub(tmp, funcp, offset, okayp, TRUE);

lib/libc/time/localtime.c

1841

int_fast32_t offset)

lib/libc/time/localtime.c

1859

t = time2(tmp, funcp, offset, &okay);

lib/libc/time/localtime.c

1902

t = time2(tmp, funcp, offset, &okay);

lib/libc/time/localtime.c

1945

timeoff(struct tm *tmp, long offset)

lib/libc/time/localtime.c

1949

return time1(tmp, gmtsub, offset);

lib/libc/time/localtime.c

802

int_fast32_t offset)

lib/libc/time/localtime.c

881

return value + rulep->r_time + offset;

lib/libcbor/src/cbor/internal/encoders.c

12

size_t buffer_size, uint8_t offset) {

lib/libcbor/src/cbor/internal/encoders.c

15

buffer[0] = value + offset;

lib/libcbor/src/cbor/internal/encoders.c

20

buffer[0] = 0x18 + offset;

lib/libcbor/src/cbor/internal/encoders.c

29

size_t buffer_size, uint8_t offset) {

lib/libcbor/src/cbor/internal/encoders.c

31

buffer[0] = 0x19 + offset;

lib/libcbor/src/cbor/internal/encoders.c

46

size_t buffer_size, uint8_t offset) {

lib/libcbor/src/cbor/internal/encoders.c

48

buffer[0] = 0x1A + offset;

lib/libcbor/src/cbor/internal/encoders.c

65

size_t buffer_size, uint8_t offset) {

lib/libcbor/src/cbor/internal/encoders.c

67

buffer[0] = 0x1B + offset;

lib/libcbor/src/cbor/internal/encoders.c

88

size_t buffer_size, uint8_t offset) {

lib/libcbor/src/cbor/internal/encoders.c

91

return _cbor_encode_uint8((uint8_t)value, buffer, buffer_size, offset);

lib/libcbor/src/cbor/internal/encoders.c

93

return _cbor_encode_uint16((uint16_t)value, buffer, buffer_size, offset);

lib/libcbor/src/cbor/internal/encoders.c

95

return _cbor_encode_uint32((uint32_t)value, buffer, buffer_size, offset);

lib/libcbor/src/cbor/internal/encoders.c

97

return _cbor_encode_uint64((uint64_t)value, buffer, buffer_size, offset);

lib/libcbor/src/cbor/internal/encoders.h

19

size_t buffer_size, uint8_t offset);

lib/libcbor/src/cbor/internal/encoders.h

23

size_t buffer_size, uint8_t offset);

lib/libcbor/src/cbor/internal/encoders.h

27

size_t buffer_size, uint8_t offset);

lib/libcbor/src/cbor/internal/encoders.h

31

size_t buffer_size, uint8_t offset);

lib/libcbor/src/cbor/internal/encoders.h

35

size_t buffer_size, uint8_t offset);

lib/libcrypto/asn1/a_type.c

74

.offset = offsetof(ASN1_int_octetstring, num),

lib/libcrypto/asn1/a_type.c

79

.offset = offsetof(ASN1_int_octetstring, value),

lib/libcrypto/asn1/asn1_par.c

120

asn1_parse2(BIO *bp, const unsigned char **pp, long length, int offset,

lib/libcrypto/asn1/asn1_par.c

155

if (BIO_printf(bp, "%5ld:", (long)offset +

lib/libcrypto/asn1/asn1_par.c

183

offset + (p - *pp), depth + 1,

lib/libcrypto/asn1/asn1_par.c

197

offset + (p - *pp), depth + 1,

lib/libcrypto/asn1/asn1_par.c

68

int offset, int depth, int indent, int dump);

lib/libcrypto/asn1/asn1t.h

377

.offset = 0, \

lib/libcrypto/asn1/asn1t.h

390

.offset = offsetof(stname, field), \

lib/libcrypto/asn1/asn1t.h

409

.offset = 0, \

lib/libcrypto/asn1/asn1t.h

417

.offset = 0, \

lib/libcrypto/asn1/asn1t.h

505

.offset = offsetof(name, field), \

lib/libcrypto/asn1/asn1t.h

532

unsigned long offset; /* Offset of this field in structure */

lib/libcrypto/asn1/asn1t.h

547

unsigned long offset; /* Offset of selector field */

lib/libcrypto/asn1/p5_pbe.c

76

.offset = offsetof(PBEPARAM, salt),

lib/libcrypto/asn1/p5_pbe.c

81

.offset = offsetof(PBEPARAM, iter),

lib/libcrypto/asn1/p5_pbev2.c

128

.offset = offsetof(PBKDF2PARAM, salt),

lib/libcrypto/asn1/p5_pbev2.c

133

.offset = offsetof(PBKDF2PARAM, iter),

lib/libcrypto/asn1/p5_pbev2.c

139

.offset = offsetof(PBKDF2PARAM, keylength),

lib/libcrypto/asn1/p5_pbev2.c

145

.offset = offsetof(PBKDF2PARAM, prf),

lib/libcrypto/asn1/p5_pbev2.c

80

.offset = offsetof(PBE2PARAM, keyfunc),

lib/libcrypto/asn1/p5_pbev2.c

85

.offset = offsetof(PBE2PARAM, encryption),

lib/libcrypto/asn1/p8_pkey.c

101

.offset = offsetof(PKCS8_PRIV_KEY_INFO, attributes),

lib/libcrypto/asn1/p8_pkey.c

85

.offset = offsetof(PKCS8_PRIV_KEY_INFO, version),

lib/libcrypto/asn1/p8_pkey.c

90

.offset = offsetof(PKCS8_PRIV_KEY_INFO, pkeyalg),

lib/libcrypto/asn1/p8_pkey.c

95

.offset = offsetof(PKCS8_PRIV_KEY_INFO, pkey),

lib/libcrypto/asn1/tasn_typ.c

678

.offset = 0,

lib/libcrypto/asn1/tasn_typ.c

697

.offset = 0,

lib/libcrypto/asn1/tasn_utl.c

229

pvaltmp = offset2ptr(*pval, tt->offset);

lib/libcrypto/asn1/tasn_utl.c

257

sfld = offset2ptr(*pval, adb->offset);

lib/libcrypto/asn1/tasn_utl.c

73

#define offset2ptr(addr, offset) (void *)(((char *) addr) + offset)

lib/libcrypto/asn1/x_algor.c

69

.offset = offsetof(X509_ALGOR, algorithm),

lib/libcrypto/asn1/x_algor.c

75

.offset = offsetof(X509_ALGOR, parameter),

lib/libcrypto/asn1/x_algor.c

94

.offset = 0,

lib/libcrypto/asn1/x_attrib.c

71

.offset = offsetof(X509_ATTRIBUTE, object),

lib/libcrypto/asn1/x_attrib.c

78

.offset = offsetof(X509_ATTRIBUTE, set),

lib/libcrypto/asn1/x_crl.c

140

.offset = offsetof(X509_CRL_INFO, version),

lib/libcrypto/asn1/x_crl.c

145

.offset = offsetof(X509_CRL_INFO, sig_alg),

lib/libcrypto/asn1/x_crl.c

150

.offset = offsetof(X509_CRL_INFO, issuer),

lib/libcrypto/asn1/x_crl.c

155

.offset = offsetof(X509_CRL_INFO, lastUpdate),

lib/libcrypto/asn1/x_crl.c

161

.offset = offsetof(X509_CRL_INFO, nextUpdate),

lib/libcrypto/asn1/x_crl.c

167

.offset = offsetof(X509_CRL_INFO, revoked),

lib/libcrypto/asn1/x_crl.c

173

.offset = offsetof(X509_CRL_INFO, extensions),

lib/libcrypto/asn1/x_crl.c

400

.offset = offsetof(X509_CRL, crl),

lib/libcrypto/asn1/x_crl.c

405

.offset = offsetof(X509_CRL, sig_alg),

lib/libcrypto/asn1/x_crl.c

410

.offset = offsetof(X509_CRL, signature),

lib/libcrypto/asn1/x_crl.c

75

.offset = offsetof(X509_REVOKED, serialNumber),

lib/libcrypto/asn1/x_crl.c

80

.offset = offsetof(X509_REVOKED, revocationDate),

lib/libcrypto/asn1/x_crl.c

86

.offset = offsetof(X509_REVOKED, extensions),

lib/libcrypto/asn1/x_exten.c

68

.offset = offsetof(X509_EXTENSION, object),

lib/libcrypto/asn1/x_exten.c

74

.offset = offsetof(X509_EXTENSION, critical),

lib/libcrypto/asn1/x_exten.c

79

.offset = offsetof(X509_EXTENSION, value),

lib/libcrypto/asn1/x_exten.c

98

.offset = 0,

lib/libcrypto/asn1/x_name.c

158

.offset = 0,

lib/libcrypto/asn1/x_name.c

176

.offset = 0,

lib/libcrypto/asn1/x_name.c

93

.offset = offsetof(X509_NAME_ENTRY, object),

lib/libcrypto/asn1/x_name.c

98

.offset = offsetof(X509_NAME_ENTRY, value),

lib/libcrypto/asn1/x_pubkey.c

94

.offset = offsetof(X509_PUBKEY, algor),

lib/libcrypto/asn1/x_pubkey.c

99

.offset = offsetof(X509_PUBKEY, public_key),

lib/libcrypto/asn1/x_req.c

104

.offset = offsetof(X509_REQ_INFO, version),

lib/libcrypto/asn1/x_req.c

109

.offset = offsetof(X509_REQ_INFO, subject),

lib/libcrypto/asn1/x_req.c

114

.offset = offsetof(X509_REQ_INFO, pubkey),

lib/libcrypto/asn1/x_req.c

123

.offset = offsetof(X509_REQ_INFO, attributes),

lib/libcrypto/asn1/x_req.c

178

.offset = offsetof(X509_REQ, req_info),

lib/libcrypto/asn1/x_req.c

183

.offset = offsetof(X509_REQ, sig_alg),

lib/libcrypto/asn1/x_req.c

188

.offset = offsetof(X509_REQ, signature),

lib/libcrypto/asn1/x_sig.c

68

.offset = offsetof(X509_SIG, algor),

lib/libcrypto/asn1/x_sig.c

73

.offset = offsetof(X509_SIG, digest),

lib/libcrypto/asn1/x_spki.c

125

.offset = offsetof(NETSCAPE_SPKI, spkac),

lib/libcrypto/asn1/x_spki.c

132

.offset = offsetof(NETSCAPE_SPKI, sig_algor),

lib/libcrypto/asn1/x_spki.c

139

.offset = offsetof(NETSCAPE_SPKI, signature),

lib/libcrypto/asn1/x_spki.c

70

.offset = offsetof(NETSCAPE_SPKAC, pubkey),

lib/libcrypto/asn1/x_spki.c

75

.offset = offsetof(NETSCAPE_SPKAC, challenge),

lib/libcrypto/asn1/x_val.c

68

.offset = offsetof(X509_VAL, notBefore),

lib/libcrypto/asn1/x_val.c

73

.offset = offsetof(X509_VAL, notAfter),

lib/libcrypto/asn1/x_x509.c

102

.offset = offsetof(X509_CINF, subject),

lib/libcrypto/asn1/x_x509.c

107

.offset = offsetof(X509_CINF, key),

lib/libcrypto/asn1/x_x509.c

114

.offset = offsetof(X509_CINF, issuerUID),

lib/libcrypto/asn1/x_x509.c

121

.offset = offsetof(X509_CINF, subjectUID),

lib/libcrypto/asn1/x_x509.c

129

.offset = offsetof(X509_CINF, extensions),

lib/libcrypto/asn1/x_x509.c

226

.offset = offsetof(X509, cert_info),

lib/libcrypto/asn1/x_x509.c

231

.offset = offsetof(X509, sig_alg),

lib/libcrypto/asn1/x_x509.c

236

.offset = offsetof(X509, signature),

lib/libcrypto/asn1/x_x509.c

77

.offset = offsetof(X509_CINF, version),

lib/libcrypto/asn1/x_x509.c

82

.offset = offsetof(X509_CINF, serialNumber),

lib/libcrypto/asn1/x_x509.c

87

.offset = offsetof(X509_CINF, signature),

lib/libcrypto/asn1/x_x509.c

92

.offset = offsetof(X509_CINF, issuer),

lib/libcrypto/asn1/x_x509.c

97

.offset = offsetof(X509_CINF, validity),

lib/libcrypto/asn1/x_x509a.c

107

.offset = offsetof(X509_CERT_AUX, other),

lib/libcrypto/asn1/x_x509a.c

79

.offset = offsetof(X509_CERT_AUX, trust),

lib/libcrypto/asn1/x_x509a.c

87

.offset = offsetof(X509_CERT_AUX, reject),

lib/libcrypto/asn1/x_x509a.c

93

.offset = offsetof(X509_CERT_AUX, alias),

lib/libcrypto/asn1/x_x509a.c

99

.offset = offsetof(X509_CERT_AUX, keyid),

lib/libcrypto/bio/bss_bio.c

126

size_t offset; /* valid iff buf != NULL; 0 if len == 0 */

lib/libcrypto/bio/bss_bio.c

227

if (peer_b->offset + rest <= peer_b->size)

lib/libcrypto/bio/bss_bio.c

231

chunk = peer_b->size - peer_b->offset;

lib/libcrypto/bio/bss_bio.c

232

assert(peer_b->offset + chunk <= peer_b->size);

lib/libcrypto/bio/bss_bio.c

234

memcpy(buf, peer_b->buf + peer_b->offset, chunk);

lib/libcrypto/bio/bss_bio.c

238

peer_b->offset += chunk;

lib/libcrypto/bio/bss_bio.c

239

assert(peer_b->offset <= peer_b->size);

lib/libcrypto/bio/bss_bio.c

240

if (peer_b->offset == peer_b->size)

lib/libcrypto/bio/bss_bio.c

241

peer_b->offset = 0;

lib/libcrypto/bio/bss_bio.c

246

peer_b->offset = 0;

lib/libcrypto/bio/bss_bio.c

302

write_offset = b->offset + b->len;

lib/libcrypto/bio/bss_bio.c

414

b->offset = 0;

lib/libcrypto/bio/bss_bio.c

517

b1->offset = 0;

lib/libcrypto/bio/bss_bio.c

527

b2->offset = 0;

lib/libcrypto/bio/bss_bio.c

561

peer_b->offset = 0;

lib/libcrypto/bio/bss_bio.c

567

b->offset = 0;

lib/libcrypto/bytestring/bs_cbb.c

197

child_start = cbb->offset + cbb->pending_len_len;

lib/libcrypto/bytestring/bs_cbb.c

199

if (!CBB_flush(cbb->child) || child_start < cbb->offset ||

lib/libcrypto/bytestring/bs_cbb.c

256

cbb->base->buf[cbb->offset++] = initial_length_byte;

lib/libcrypto/bytestring/bs_cbb.c

261

cbb->base->buf[cbb->offset + i] = len;

lib/libcrypto/bytestring/bs_cbb.c

271

cbb->offset = 0;

lib/libcrypto/bytestring/bs_cbb.c

282

cbb->base->len = cbb->offset;

lib/libcrypto/bytestring/bs_cbb.c

288

cbb->offset = 0;

lib/libcrypto/bytestring/bs_cbb.c

299

cbb->offset = cbb->base->len;

lib/libcrypto/bytestring/bs_cbb.c

355

cbb->offset = cbb->base->len;

lib/libcrypto/bytestring/bytestring.h

375

size_t offset;

lib/libcrypto/cms/cms_asn1.c

1009

.offset = offsetof(CMS_EnvelopedData, version),

lib/libcrypto/cms/cms_asn1.c

1016

.offset = offsetof(CMS_EnvelopedData, originatorInfo),

lib/libcrypto/cms/cms_asn1.c

1023

.offset = offsetof(CMS_EnvelopedData, recipientInfos),

lib/libcrypto/cms/cms_asn1.c

1030

.offset = offsetof(CMS_EnvelopedData, encryptedContentInfo),

lib/libcrypto/cms/cms_asn1.c

1037

.offset = offsetof(CMS_EnvelopedData, unprotectedAttrs),

lib/libcrypto/cms/cms_asn1.c

105

.offset = offsetof(CMS_OtherCertificateFormat, otherCert),

lib/libcrypto/cms/cms_asn1.c

1057

.offset = offsetof(CMS_DigestedData, version),

lib/libcrypto/cms/cms_asn1.c

1064

.offset = offsetof(CMS_DigestedData, digestAlgorithm),

lib/libcrypto/cms/cms_asn1.c

1071

.offset = offsetof(CMS_DigestedData, encapContentInfo),

lib/libcrypto/cms/cms_asn1.c

1078

.offset = offsetof(CMS_DigestedData, digest),

lib/libcrypto/cms/cms_asn1.c

1098

.offset = offsetof(CMS_EncryptedData, version),

lib/libcrypto/cms/cms_asn1.c

1105

.offset = offsetof(CMS_EncryptedData, encryptedContentInfo),

lib/libcrypto/cms/cms_asn1.c

1112

.offset = offsetof(CMS_EncryptedData, unprotectedAttrs),

lib/libcrypto/cms/cms_asn1.c

1132

.offset = offsetof(CMS_AuthenticatedData, version),

lib/libcrypto/cms/cms_asn1.c

1139

.offset = offsetof(CMS_AuthenticatedData, originatorInfo),

lib/libcrypto/cms/cms_asn1.c

1146

.offset = offsetof(CMS_AuthenticatedData, recipientInfos),

lib/libcrypto/cms/cms_asn1.c

1153

.offset = offsetof(CMS_AuthenticatedData, macAlgorithm),

lib/libcrypto/cms/cms_asn1.c

1160

.offset = offsetof(CMS_AuthenticatedData, digestAlgorithm),

lib/libcrypto/cms/cms_asn1.c

1167

.offset = offsetof(CMS_AuthenticatedData, encapContentInfo),

lib/libcrypto/cms/cms_asn1.c

1174

.offset = offsetof(CMS_AuthenticatedData, authAttrs),

lib/libcrypto/cms/cms_asn1.c

1181

.offset = offsetof(CMS_AuthenticatedData, mac),

lib/libcrypto/cms/cms_asn1.c

1188

.offset = offsetof(CMS_AuthenticatedData, unauthAttrs),

lib/libcrypto/cms/cms_asn1.c

1208

.offset = offsetof(CMS_CompressedData, version),

lib/libcrypto/cms/cms_asn1.c

1215

.offset = offsetof(CMS_CompressedData, compressionAlgorithm),

lib/libcrypto/cms/cms_asn1.c

1222

.offset = offsetof(CMS_CompressedData, encapContentInfo),

lib/libcrypto/cms/cms_asn1.c

1243

.offset = offsetof(CMS_ContentInfo, d.other),

lib/libcrypto/cms/cms_asn1.c

125

.offset = offsetof(CMS_CertificateChoices, d.certificate),

lib/libcrypto/cms/cms_asn1.c

1254

.offset = offsetof(CMS_ContentInfo, d.data),

lib/libcrypto/cms/cms_asn1.c

1264

.offset = offsetof(CMS_ContentInfo, d.signedData),

lib/libcrypto/cms/cms_asn1.c

1274

.offset = offsetof(CMS_ContentInfo, d.envelopedData),

lib/libcrypto/cms/cms_asn1.c

1284

.offset = offsetof(CMS_ContentInfo, d.digestedData),

lib/libcrypto/cms/cms_asn1.c

1294

.offset = offsetof(CMS_ContentInfo, d.encryptedData),

lib/libcrypto/cms/cms_asn1.c

1304

.offset = offsetof(CMS_ContentInfo, d.authenticatedData),

lib/libcrypto/cms/cms_asn1.c

1314

.offset = offsetof(CMS_ContentInfo, d.compressedData),

lib/libcrypto/cms/cms_asn1.c

132

.offset = offsetof(CMS_CertificateChoices, d.extendedCertificate),

lib/libcrypto/cms/cms_asn1.c

1323

.offset = offsetof(CMS_ContentInfo, contentType),

lib/libcrypto/cms/cms_asn1.c

1376

.offset = offsetof(CMS_ContentInfo, contentType),

lib/libcrypto/cms/cms_asn1.c

1383

.offset = 0,

lib/libcrypto/cms/cms_asn1.c

139

.offset = offsetof(CMS_CertificateChoices, d.v1AttrCert),

lib/libcrypto/cms/cms_asn1.c

1410

.offset = 0,

lib/libcrypto/cms/cms_asn1.c

1433

.offset = 0,

lib/libcrypto/cms/cms_asn1.c

1454

.offset = offsetof(CMS_ReceiptsFrom, d.allOrFirstTier),

lib/libcrypto/cms/cms_asn1.c

146

.offset = offsetof(CMS_CertificateChoices, d.v2AttrCert),

lib/libcrypto/cms/cms_asn1.c

1461

.offset = offsetof(CMS_ReceiptsFrom, d.receiptList),

lib/libcrypto/cms/cms_asn1.c

1481

.offset = offsetof(CMS_ReceiptRequest, signedContentIdentifier),

lib/libcrypto/cms/cms_asn1.c

1488

.offset = offsetof(CMS_ReceiptRequest, receiptsFrom),

lib/libcrypto/cms/cms_asn1.c

1495

.offset = offsetof(CMS_ReceiptRequest, receiptsTo),

lib/libcrypto/cms/cms_asn1.c

1516

.offset = offsetof(CMS_Receipt, version),

lib/libcrypto/cms/cms_asn1.c

1523

.offset = offsetof(CMS_Receipt, contentType),

lib/libcrypto/cms/cms_asn1.c

153

.offset = offsetof(CMS_CertificateChoices, d.other),

lib/libcrypto/cms/cms_asn1.c

1530

.offset = offsetof(CMS_Receipt, signedContentIdentifier),

lib/libcrypto/cms/cms_asn1.c

1537

.offset = offsetof(CMS_Receipt, originatorSignatureValue),

lib/libcrypto/cms/cms_asn1.c

1568

.offset = offsetof(CMS_SharedInfo, keyInfo),

lib/libcrypto/cms/cms_asn1.c

1575

.offset = offsetof(CMS_SharedInfo, entityUInfo),

lib/libcrypto/cms/cms_asn1.c

1582

.offset = offsetof(CMS_SharedInfo, suppPubInfo),

lib/libcrypto/cms/cms_asn1.c

173

.offset = offsetof(CMS_SignerIdentifier, d.issuerAndSerialNumber),

lib/libcrypto/cms/cms_asn1.c

180

.offset = offsetof(CMS_SignerIdentifier, d.subjectKeyIdentifier),

lib/libcrypto/cms/cms_asn1.c

200

.offset = offsetof(CMS_EncapsulatedContentInfo, eContentType),

lib/libcrypto/cms/cms_asn1.c

207

.offset = offsetof(CMS_EncapsulatedContentInfo, eContent),

lib/libcrypto/cms/cms_asn1.c

248

.offset = offsetof(CMS_SignerInfo, version),

lib/libcrypto/cms/cms_asn1.c

255

.offset = offsetof(CMS_SignerInfo, sid),

lib/libcrypto/cms/cms_asn1.c

262

.offset = offsetof(CMS_SignerInfo, digestAlgorithm),

lib/libcrypto/cms/cms_asn1.c

269

.offset = offsetof(CMS_SignerInfo, signedAttrs),

lib/libcrypto/cms/cms_asn1.c

276

.offset = offsetof(CMS_SignerInfo, signatureAlgorithm),

lib/libcrypto/cms/cms_asn1.c

283

.offset = offsetof(CMS_SignerInfo, signature),

lib/libcrypto/cms/cms_asn1.c

290

.offset = offsetof(CMS_SignerInfo, unsignedAttrs),

lib/libcrypto/cms/cms_asn1.c

310

.offset = offsetof(CMS_OtherRevocationInfoFormat, otherRevInfoFormat),

lib/libcrypto/cms/cms_asn1.c

317

.offset = offsetof(CMS_OtherRevocationInfoFormat, otherRevInfo),

lib/libcrypto/cms/cms_asn1.c

337

.offset = offsetof(CMS_RevocationInfoChoice, d.crl),

lib/libcrypto/cms/cms_asn1.c

344

.offset = offsetof(CMS_RevocationInfoChoice, d.other),

lib/libcrypto/cms/cms_asn1.c

364

.offset = offsetof(CMS_SignedData, version),

lib/libcrypto/cms/cms_asn1.c

371

.offset = offsetof(CMS_SignedData, digestAlgorithms),

lib/libcrypto/cms/cms_asn1.c

378

.offset = offsetof(CMS_SignedData, encapContentInfo),

lib/libcrypto/cms/cms_asn1.c

385

.offset = offsetof(CMS_SignedData, certificates),

lib/libcrypto/cms/cms_asn1.c

392

.offset = offsetof(CMS_SignedData, crls),

lib/libcrypto/cms/cms_asn1.c

399

.offset = offsetof(CMS_SignedData, signerInfos),

lib/libcrypto/cms/cms_asn1.c

419

.offset = offsetof(CMS_OriginatorInfo, certificates),

lib/libcrypto/cms/cms_asn1.c

426

.offset = offsetof(CMS_OriginatorInfo, crls),

lib/libcrypto/cms/cms_asn1.c

446

.offset = offsetof(CMS_EncryptedContentInfo, contentType),

lib/libcrypto/cms/cms_asn1.c

453

.offset = offsetof(CMS_EncryptedContentInfo, contentEncryptionAlgorithm),

lib/libcrypto/cms/cms_asn1.c

460

.offset = offsetof(CMS_EncryptedContentInfo, encryptedContent),

lib/libcrypto/cms/cms_asn1.c

480

.offset = offsetof(CMS_KeyTransRecipientInfo, version),

lib/libcrypto/cms/cms_asn1.c

487

.offset = offsetof(CMS_KeyTransRecipientInfo, rid),

lib/libcrypto/cms/cms_asn1.c

494

.offset = offsetof(CMS_KeyTransRecipientInfo, keyEncryptionAlgorithm),

lib/libcrypto/cms/cms_asn1.c

501

.offset = offsetof(CMS_KeyTransRecipientInfo, encryptedKey),

lib/libcrypto/cms/cms_asn1.c

521

.offset = offsetof(CMS_OtherKeyAttribute, keyAttrId),

lib/libcrypto/cms/cms_asn1.c

528

.offset = offsetof(CMS_OtherKeyAttribute, keyAttr),

lib/libcrypto/cms/cms_asn1.c

548

.offset = offsetof(CMS_RecipientKeyIdentifier, subjectKeyIdentifier),

lib/libcrypto/cms/cms_asn1.c

555

.offset = offsetof(CMS_RecipientKeyIdentifier, date),

lib/libcrypto/cms/cms_asn1.c

562

.offset = offsetof(CMS_RecipientKeyIdentifier, other),

lib/libcrypto/cms/cms_asn1.c

582

.offset = offsetof(CMS_KeyAgreeRecipientIdentifier, d.issuerAndSerialNumber),

lib/libcrypto/cms/cms_asn1.c

589

.offset = offsetof(CMS_KeyAgreeRecipientIdentifier, d.rKeyId),

lib/libcrypto/cms/cms_asn1.c

627

.offset = offsetof(CMS_RecipientEncryptedKey, rid),

lib/libcrypto/cms/cms_asn1.c

634

.offset = offsetof(CMS_RecipientEncryptedKey, encryptedKey),

lib/libcrypto/cms/cms_asn1.c

654

.offset = offsetof(CMS_OriginatorPublicKey, algorithm),

lib/libcrypto/cms/cms_asn1.c

661

.offset = offsetof(CMS_OriginatorPublicKey, publicKey),

lib/libcrypto/cms/cms_asn1.c

681

.offset = offsetof(CMS_OriginatorIdentifierOrKey, d.issuerAndSerialNumber),

lib/libcrypto/cms/cms_asn1.c

688

.offset = offsetof(CMS_OriginatorIdentifierOrKey, d.subjectKeyIdentifier),

lib/libcrypto/cms/cms_asn1.c

695

.offset = offsetof(CMS_OriginatorIdentifierOrKey, d.originatorKey),

lib/libcrypto/cms/cms_asn1.c

71

.offset = offsetof(CMS_IssuerAndSerialNumber, issuer),

lib/libcrypto/cms/cms_asn1.c

740

.offset = offsetof(CMS_KeyAgreeRecipientInfo, version),

lib/libcrypto/cms/cms_asn1.c

747

.offset = offsetof(CMS_KeyAgreeRecipientInfo, originator),

lib/libcrypto/cms/cms_asn1.c

754

.offset = offsetof(CMS_KeyAgreeRecipientInfo, ukm),

lib/libcrypto/cms/cms_asn1.c

761

.offset = offsetof(CMS_KeyAgreeRecipientInfo, keyEncryptionAlgorithm),

lib/libcrypto/cms/cms_asn1.c

768

.offset = offsetof(CMS_KeyAgreeRecipientInfo, recipientEncryptedKeys),

lib/libcrypto/cms/cms_asn1.c

78

.offset = offsetof(CMS_IssuerAndSerialNumber, serialNumber),

lib/libcrypto/cms/cms_asn1.c

788

.offset = offsetof(CMS_KEKIdentifier, keyIdentifier),

lib/libcrypto/cms/cms_asn1.c

795

.offset = offsetof(CMS_KEKIdentifier, date),

lib/libcrypto/cms/cms_asn1.c

802

.offset = offsetof(CMS_KEKIdentifier, other),

lib/libcrypto/cms/cms_asn1.c

822

.offset = offsetof(CMS_KEKRecipientInfo, version),

lib/libcrypto/cms/cms_asn1.c

829

.offset = offsetof(CMS_KEKRecipientInfo, kekid),

lib/libcrypto/cms/cms_asn1.c

836

.offset = offsetof(CMS_KEKRecipientInfo, keyEncryptionAlgorithm),

lib/libcrypto/cms/cms_asn1.c

843

.offset = offsetof(CMS_KEKRecipientInfo, encryptedKey),

lib/libcrypto/cms/cms_asn1.c

863

.offset = offsetof(CMS_PasswordRecipientInfo, version),

lib/libcrypto/cms/cms_asn1.c

870

.offset = offsetof(CMS_PasswordRecipientInfo, keyDerivationAlgorithm),

lib/libcrypto/cms/cms_asn1.c

877

.offset = offsetof(CMS_PasswordRecipientInfo, keyEncryptionAlgorithm),

lib/libcrypto/cms/cms_asn1.c

884

.offset = offsetof(CMS_PasswordRecipientInfo, encryptedKey),

lib/libcrypto/cms/cms_asn1.c

904

.offset = offsetof(CMS_OtherRecipientInfo, oriType),

lib/libcrypto/cms/cms_asn1.c

911

.offset = offsetof(CMS_OtherRecipientInfo, oriValue),

lib/libcrypto/cms/cms_asn1.c

961

.offset = offsetof(CMS_RecipientInfo, d.ktri),

lib/libcrypto/cms/cms_asn1.c

968

.offset = offsetof(CMS_RecipientInfo, d.kari),

lib/libcrypto/cms/cms_asn1.c

975

.offset = offsetof(CMS_RecipientInfo, d.kekri),

lib/libcrypto/cms/cms_asn1.c

98

.offset = offsetof(CMS_OtherCertificateFormat, otherCertFormat),

lib/libcrypto/cms/cms_asn1.c

982

.offset = offsetof(CMS_RecipientInfo, d.pwri),

lib/libcrypto/cms/cms_asn1.c

989

.offset = offsetof(CMS_RecipientInfo, d.ori),

lib/libcrypto/dh/dh_asn1.c

104

.offset = offsetof(DH, g),

lib/libcrypto/dh/dh_asn1.c

111

.offset = offsetof(DH, length),

lib/libcrypto/dh/dh_asn1.c

97

.offset = offsetof(DH, p),

lib/libcrypto/dsa/dsa_asn1.c

106

.offset = offsetof(DSA_SIG, s),

lib/libcrypto/dsa/dsa_asn1.c

192

.offset = offsetof(DSA, version),

lib/libcrypto/dsa/dsa_asn1.c

199

.offset = offsetof(DSA, p),

lib/libcrypto/dsa/dsa_asn1.c

206

.offset = offsetof(DSA, q),

lib/libcrypto/dsa/dsa_asn1.c

213

.offset = offsetof(DSA, g),

lib/libcrypto/dsa/dsa_asn1.c

220

.offset = offsetof(DSA, pub_key),

lib/libcrypto/dsa/dsa_asn1.c

227

.offset = offsetof(DSA, priv_key),

lib/libcrypto/dsa/dsa_asn1.c

272

.offset = offsetof(DSA, p),

lib/libcrypto/dsa/dsa_asn1.c

279

.offset = offsetof(DSA, q),

lib/libcrypto/dsa/dsa_asn1.c

286

.offset = offsetof(DSA, g),

lib/libcrypto/dsa/dsa_asn1.c

359

.offset = offsetof(DSA, pub_key),

lib/libcrypto/dsa/dsa_asn1.c

366

.offset = offsetof(DSA, p),

lib/libcrypto/dsa/dsa_asn1.c

373

.offset = offsetof(DSA, q),

lib/libcrypto/dsa/dsa_asn1.c

380

.offset = offsetof(DSA, g),

lib/libcrypto/dsa/dsa_asn1.c

99

.offset = offsetof(DSA_SIG, r),

lib/libcrypto/ec/ec_asn1.c

157

.offset = offsetof(X9_62_PENTANOMIAL, k1),

lib/libcrypto/ec/ec_asn1.c

164

.offset = offsetof(X9_62_PENTANOMIAL, k2),

lib/libcrypto/ec/ec_asn1.c

171

.offset = offsetof(X9_62_PENTANOMIAL, k3),

lib/libcrypto/ec/ec_asn1.c

190

.offset = offsetof(X9_62_CHARACTERISTIC_TWO, p.other),

lib/libcrypto/ec/ec_asn1.c

201

.offset = offsetof(X9_62_CHARACTERISTIC_TWO, p.onBasis),

lib/libcrypto/ec/ec_asn1.c

211

.offset = offsetof(X9_62_CHARACTERISTIC_TWO, p.tpBasis),

lib/libcrypto/ec/ec_asn1.c

221

.offset = offsetof(X9_62_CHARACTERISTIC_TWO, p.ppBasis),

lib/libcrypto/ec/ec_asn1.c

231

.offset = offsetof(X9_62_CHARACTERISTIC_TWO, type),

lib/libcrypto/ec/ec_asn1.c

242

.offset = offsetof(X9_62_CHARACTERISTIC_TWO, m),

lib/libcrypto/ec/ec_asn1.c

249

.offset = offsetof(X9_62_CHARACTERISTIC_TWO, type),

lib/libcrypto/ec/ec_asn1.c

256

.offset = 0,

lib/libcrypto/ec/ec_asn1.c

275

.offset = offsetof(X9_62_FIELDID, p.other),

lib/libcrypto/ec/ec_asn1.c

286

.offset = offsetof(X9_62_FIELDID, p.prime),

lib/libcrypto/ec/ec_asn1.c

296

.offset = offsetof(X9_62_FIELDID, p.char_two),

lib/libcrypto/ec/ec_asn1.c

305

.offset = offsetof(X9_62_FIELDID, fieldType),

lib/libcrypto/ec/ec_asn1.c

316

.offset = offsetof(X9_62_FIELDID, fieldType),

lib/libcrypto/ec/ec_asn1.c

323

.offset = 0,

lib/libcrypto/ec/ec_asn1.c

343

.offset = offsetof(X9_62_CURVE, a),

lib/libcrypto/ec/ec_asn1.c

350

.offset = offsetof(X9_62_CURVE, b),

lib/libcrypto/ec/ec_asn1.c

357

.offset = offsetof(X9_62_CURVE, seed),

lib/libcrypto/ec/ec_asn1.c

377

.offset = offsetof(ECPARAMETERS, version),

lib/libcrypto/ec/ec_asn1.c

384

.offset = offsetof(ECPARAMETERS, fieldID),

lib/libcrypto/ec/ec_asn1.c

391

.offset = offsetof(ECPARAMETERS, curve),

lib/libcrypto/ec/ec_asn1.c

398

.offset = offsetof(ECPARAMETERS, base),

lib/libcrypto/ec/ec_asn1.c

405

.offset = offsetof(ECPARAMETERS, order),

lib/libcrypto/ec/ec_asn1.c

412

.offset = offsetof(ECPARAMETERS, cofactor),

lib/libcrypto/ec/ec_asn1.c

444

.offset = offsetof(ECPKPARAMETERS, value.named_curve),

lib/libcrypto/ec/ec_asn1.c

451

.offset = offsetof(ECPKPARAMETERS, value.parameters),

lib/libcrypto/ec/ec_asn1.c

458

.offset = offsetof(ECPKPARAMETERS, value.implicitlyCA),

lib/libcrypto/ec/ec_asn1.c

503

.offset = offsetof(EC_PRIVATEKEY, version),

lib/libcrypto/ec/ec_asn1.c

510

.offset = offsetof(EC_PRIVATEKEY, privateKey),

lib/libcrypto/ec/ec_asn1.c

517

.offset = offsetof(EC_PRIVATEKEY, parameters),

lib/libcrypto/ec/ec_asn1.c

524

.offset = offsetof(EC_PRIVATEKEY, publicKey),

lib/libcrypto/ecdsa/ecdsa.c

78

.offset = offsetof(ECDSA_SIG, r),

lib/libcrypto/ecdsa/ecdsa.c

85

.offset = offsetof(ECDSA_SIG, s),

lib/libcrypto/mlkem/mlkem_internal.c

253

int offset = DEGREE;

lib/libcrypto/mlkem/mlkem_internal.c

262

offset >>= 1;

lib/libcrypto/mlkem/mlkem_internal.c

266

for (j = k; j < k + offset; j++) {

lib/libcrypto/mlkem/mlkem_internal.c

269

odd = reduce(step_root * s->c[j + offset]);

lib/libcrypto/mlkem/mlkem_internal.c

272

s->c[j + offset] = reduce_once(even - odd +

lib/libcrypto/mlkem/mlkem_internal.c

275

k += 2 * offset;

lib/libcrypto/mlkem/mlkem_internal.c

300

int i, j, k, offset, step = DEGREE / 2;

lib/libcrypto/mlkem/mlkem_internal.c

306

for (offset = 2; offset < DEGREE; offset <<= 1) {

lib/libcrypto/mlkem/mlkem_internal.c

311

for (j = k; j < k + offset; j++) {

lib/libcrypto/mlkem/mlkem_internal.c

313

odd = s->c[j + offset];

lib/libcrypto/mlkem/mlkem_internal.c

316

s->c[j + offset] = reduce(step_root *

lib/libcrypto/mlkem/mlkem_internal.c

319

k += 2 * offset;

lib/libcrypto/mlkem/mlkem_internal.c

831

size_t offset = 0;

lib/libcrypto/mlkem/mlkem_internal.c

839

pub->t = (struct scalar *)bytes + offset;

lib/libcrypto/mlkem/mlkem_internal.c

840

offset += vector_size;

lib/libcrypto/mlkem/mlkem_internal.c

841

pub->rho = bytes + offset;

lib/libcrypto/mlkem/mlkem_internal.c

842

offset += 32;

lib/libcrypto/mlkem/mlkem_internal.c

843

pub->public_key_hash = bytes + offset;

lib/libcrypto/mlkem/mlkem_internal.c

844

offset += 32;

lib/libcrypto/mlkem/mlkem_internal.c

845

pub->m = (void *)(bytes + offset);

lib/libcrypto/mlkem/mlkem_internal.c

846

offset += vector_size * external->rank;

lib/libcrypto/mlkem/mlkem_internal.c

860

size_t offset = 0;

lib/libcrypto/mlkem/mlkem_internal.c

868

priv->pub.t = (struct scalar *)(bytes + offset);

lib/libcrypto/mlkem/mlkem_internal.c

869

offset += vector_size;

lib/libcrypto/mlkem/mlkem_internal.c

870

priv->pub.rho = bytes + offset;

lib/libcrypto/mlkem/mlkem_internal.c

871

offset += 32;

lib/libcrypto/mlkem/mlkem_internal.c

872

priv->pub.public_key_hash = bytes + offset;

lib/libcrypto/mlkem/mlkem_internal.c

873

offset += 32;

lib/libcrypto/mlkem/mlkem_internal.c

874

priv->pub.m = (void *)(bytes + offset);

lib/libcrypto/mlkem/mlkem_internal.c

875

offset += vector_size * external->rank;

lib/libcrypto/mlkem/mlkem_internal.c

876

priv->s = (void *)(bytes + offset);

lib/libcrypto/mlkem/mlkem_internal.c

877

offset += vector_size;

lib/libcrypto/mlkem/mlkem_internal.c

878

priv->fo_failure_secret = bytes + offset;

lib/libcrypto/mlkem/mlkem_internal.c

879

offset += 32;

lib/libcrypto/ocsp/ocsp_asn.c

1014

.offset = offsetof(OCSP_SERVICELOC, issuer),

lib/libcrypto/ocsp/ocsp_asn.c

1021

.offset = offsetof(OCSP_SERVICELOC, locator),

lib/libcrypto/ocsp/ocsp_asn.c

133

.offset = offsetof(OCSP_CERTID, hashAlgorithm),

lib/libcrypto/ocsp/ocsp_asn.c

140

.offset = offsetof(OCSP_CERTID, issuerNameHash),

lib/libcrypto/ocsp/ocsp_asn.c

147

.offset = offsetof(OCSP_CERTID, issuerKeyHash),

lib/libcrypto/ocsp/ocsp_asn.c

154

.offset = offsetof(OCSP_CERTID, serialNumber),

lib/libcrypto/ocsp/ocsp_asn.c

205

.offset = offsetof(OCSP_ONEREQ, reqCert),

lib/libcrypto/ocsp/ocsp_asn.c

212

.offset = offsetof(OCSP_ONEREQ, singleRequestExtensions),

lib/libcrypto/ocsp/ocsp_asn.c

263

.offset = offsetof(OCSP_REQINFO, version),

lib/libcrypto/ocsp/ocsp_asn.c

270

.offset = offsetof(OCSP_REQINFO, requestorName),

lib/libcrypto/ocsp/ocsp_asn.c

277

.offset = offsetof(OCSP_REQINFO, requestList),

lib/libcrypto/ocsp/ocsp_asn.c

284

.offset = offsetof(OCSP_REQINFO, requestExtensions),

lib/libcrypto/ocsp/ocsp_asn.c

335

.offset = offsetof(OCSP_REQUEST, tbsRequest),

lib/libcrypto/ocsp/ocsp_asn.c

342

.offset = offsetof(OCSP_REQUEST, optionalSignature),

lib/libcrypto/ocsp/ocsp_asn.c

408

.offset = offsetof(OCSP_RESPBYTES, responseType),

lib/libcrypto/ocsp/ocsp_asn.c

415

.offset = offsetof(OCSP_RESPBYTES, response),

lib/libcrypto/ocsp/ocsp_asn.c

466

.offset = offsetof(OCSP_RESPONSE, responseStatus),

lib/libcrypto/ocsp/ocsp_asn.c

473

.offset = offsetof(OCSP_RESPONSE, responseBytes),

lib/libcrypto/ocsp/ocsp_asn.c

538

.offset = offsetof(OCSP_RESPID, value.byName),

lib/libcrypto/ocsp/ocsp_asn.c

545

.offset = offsetof(OCSP_RESPID, value.byKey),

lib/libcrypto/ocsp/ocsp_asn.c

596

.offset = offsetof(OCSP_REVOKEDINFO, revocationTime),

lib/libcrypto/ocsp/ocsp_asn.c

603

.offset = offsetof(OCSP_REVOKEDINFO, revocationReason),

lib/libcrypto/ocsp/ocsp_asn.c

654

.offset = offsetof(OCSP_CERTSTATUS, value.good),

lib/libcrypto/ocsp/ocsp_asn.c

661

.offset = offsetof(OCSP_CERTSTATUS, value.revoked),

lib/libcrypto/ocsp/ocsp_asn.c

668

.offset = offsetof(OCSP_CERTSTATUS, value.unknown),

lib/libcrypto/ocsp/ocsp_asn.c

68

.offset = offsetof(OCSP_SIGNATURE, signatureAlgorithm),

lib/libcrypto/ocsp/ocsp_asn.c

719

.offset = offsetof(OCSP_SINGLERESP, certId),

lib/libcrypto/ocsp/ocsp_asn.c

726

.offset = offsetof(OCSP_SINGLERESP, certStatus),

lib/libcrypto/ocsp/ocsp_asn.c

733

.offset = offsetof(OCSP_SINGLERESP, thisUpdate),

lib/libcrypto/ocsp/ocsp_asn.c

740

.offset = offsetof(OCSP_SINGLERESP, nextUpdate),

lib/libcrypto/ocsp/ocsp_asn.c

747

.offset = offsetof(OCSP_SINGLERESP, singleExtensions),

lib/libcrypto/ocsp/ocsp_asn.c

75

.offset = offsetof(OCSP_SIGNATURE, signature),

lib/libcrypto/ocsp/ocsp_asn.c

798

.offset = offsetof(OCSP_RESPDATA, version),

lib/libcrypto/ocsp/ocsp_asn.c

805

.offset = offsetof(OCSP_RESPDATA, responderId),

lib/libcrypto/ocsp/ocsp_asn.c

812

.offset = offsetof(OCSP_RESPDATA, producedAt),

lib/libcrypto/ocsp/ocsp_asn.c

819

.offset = offsetof(OCSP_RESPDATA, responses),

lib/libcrypto/ocsp/ocsp_asn.c

82

.offset = offsetof(OCSP_SIGNATURE, certs),

lib/libcrypto/ocsp/ocsp_asn.c

826

.offset = offsetof(OCSP_RESPDATA, responseExtensions),

lib/libcrypto/ocsp/ocsp_asn.c

877

.offset = offsetof(OCSP_BASICRESP, tbsResponseData),

lib/libcrypto/ocsp/ocsp_asn.c

884

.offset = offsetof(OCSP_BASICRESP, signatureAlgorithm),

lib/libcrypto/ocsp/ocsp_asn.c

891

.offset = offsetof(OCSP_BASICRESP, signature),

lib/libcrypto/ocsp/ocsp_asn.c

898

.offset = offsetof(OCSP_BASICRESP, certs),

lib/libcrypto/ocsp/ocsp_asn.c

949

.offset = offsetof(OCSP_CRLID, crlUrl),

lib/libcrypto/ocsp/ocsp_asn.c

956

.offset = offsetof(OCSP_CRLID, crlNum),

lib/libcrypto/ocsp/ocsp_asn.c

963

.offset = offsetof(OCSP_CRLID, crlTime),

lib/libcrypto/pkcs12/p12_asn.c

137

.offset = offsetof(PKCS12_MAC_DATA, dinfo),

lib/libcrypto/pkcs12/p12_asn.c

144

.offset = offsetof(PKCS12_MAC_DATA, salt),

lib/libcrypto/pkcs12/p12_asn.c

151

.offset = offsetof(PKCS12_MAC_DATA, iter),

lib/libcrypto/pkcs12/p12_asn.c

196

.offset = offsetof(PKCS12_BAGS, value.other),

lib/libcrypto/pkcs12/p12_asn.c

207

.offset = offsetof(PKCS12_BAGS, value.x509cert),

lib/libcrypto/pkcs12/p12_asn.c

218

.offset = offsetof(PKCS12_BAGS, value.x509crl),

lib/libcrypto/pkcs12/p12_asn.c

229

.offset = offsetof(PKCS12_BAGS, value.sdsicert),

lib/libcrypto/pkcs12/p12_asn.c

239

.offset = offsetof(PKCS12_BAGS, type),

lib/libcrypto/pkcs12/p12_asn.c

250

.offset = offsetof(PKCS12_BAGS, type),

lib/libcrypto/pkcs12/p12_asn.c

257

.offset = 0,

lib/libcrypto/pkcs12/p12_asn.c

302

.offset = offsetof(PKCS12_SAFEBAG, value.other),

lib/libcrypto/pkcs12/p12_asn.c

313

.offset = offsetof(PKCS12_SAFEBAG, value.keybag),

lib/libcrypto/pkcs12/p12_asn.c

324

.offset = offsetof(PKCS12_SAFEBAG, value.shkeybag),

lib/libcrypto/pkcs12/p12_asn.c

335

.offset = offsetof(PKCS12_SAFEBAG, value.safes),

lib/libcrypto/pkcs12/p12_asn.c

345

.offset = offsetof(PKCS12_SAFEBAG, value.bag),

lib/libcrypto/pkcs12/p12_asn.c

356

.offset = offsetof(PKCS12_SAFEBAG, value.bag),

lib/libcrypto/pkcs12/p12_asn.c

367

.offset = offsetof(PKCS12_SAFEBAG, value.bag),

lib/libcrypto/pkcs12/p12_asn.c

377

.offset = offsetof(PKCS12_SAFEBAG, type),

lib/libcrypto/pkcs12/p12_asn.c

388

.offset = offsetof(PKCS12_SAFEBAG, type),

lib/libcrypto/pkcs12/p12_asn.c

395

.offset = 0,

lib/libcrypto/pkcs12/p12_asn.c

402

.offset = offsetof(PKCS12_SAFEBAG, attrib),

lib/libcrypto/pkcs12/p12_asn.c

453

.offset = 0,

lib/libcrypto/pkcs12/p12_asn.c

472

.offset = 0,

lib/libcrypto/pkcs12/p12_asn.c

72

.offset = offsetof(PKCS12, version),

lib/libcrypto/pkcs12/p12_asn.c

79

.offset = offsetof(PKCS12, authsafes),

lib/libcrypto/pkcs12/p12_asn.c

86

.offset = offsetof(PKCS12, mac),

lib/libcrypto/pkcs7/pk7_asn1.c

103

.offset = offsetof(PKCS7, d.enveloped),

lib/libcrypto/pkcs7/pk7_asn1.c

113

.offset = offsetof(PKCS7, d.signed_and_enveloped),

lib/libcrypto/pkcs7/pk7_asn1.c

123

.offset = offsetof(PKCS7, d.digest),

lib/libcrypto/pkcs7/pk7_asn1.c

133

.offset = offsetof(PKCS7, d.encrypted),

lib/libcrypto/pkcs7/pk7_asn1.c

142

.offset = offsetof(PKCS7, type),

lib/libcrypto/pkcs7/pk7_asn1.c

189

.offset = offsetof(PKCS7, type),

lib/libcrypto/pkcs7/pk7_asn1.c

196

.offset = 0,

lib/libcrypto/pkcs7/pk7_asn1.c

254

.offset = offsetof(PKCS7_SIGNED, version),

lib/libcrypto/pkcs7/pk7_asn1.c

261

.offset = offsetof(PKCS7_SIGNED, md_algs),

lib/libcrypto/pkcs7/pk7_asn1.c

268

.offset = offsetof(PKCS7_SIGNED, contents),

lib/libcrypto/pkcs7/pk7_asn1.c

275

.offset = offsetof(PKCS7_SIGNED, cert),

lib/libcrypto/pkcs7/pk7_asn1.c

282

.offset = offsetof(PKCS7_SIGNED, crl),

lib/libcrypto/pkcs7/pk7_asn1.c

289

.offset = offsetof(PKCS7_SIGNED, signer_info),

lib/libcrypto/pkcs7/pk7_asn1.c

359

.offset = offsetof(PKCS7_SIGNER_INFO, version),

lib/libcrypto/pkcs7/pk7_asn1.c

366

.offset = offsetof(PKCS7_SIGNER_INFO, issuer_and_serial),

lib/libcrypto/pkcs7/pk7_asn1.c

373

.offset = offsetof(PKCS7_SIGNER_INFO, digest_alg),

lib/libcrypto/pkcs7/pk7_asn1.c

385

.offset = offsetof(PKCS7_SIGNER_INFO, auth_attr),

lib/libcrypto/pkcs7/pk7_asn1.c

392

.offset = offsetof(PKCS7_SIGNER_INFO, digest_enc_alg),

lib/libcrypto/pkcs7/pk7_asn1.c

399

.offset = offsetof(PKCS7_SIGNER_INFO, enc_digest),

lib/libcrypto/pkcs7/pk7_asn1.c

406

.offset = offsetof(PKCS7_SIGNER_INFO, unauth_attr),

lib/libcrypto/pkcs7/pk7_asn1.c

457

.offset = offsetof(PKCS7_ISSUER_AND_SERIAL, issuer),

lib/libcrypto/pkcs7/pk7_asn1.c

464

.offset = offsetof(PKCS7_ISSUER_AND_SERIAL, serial),

lib/libcrypto/pkcs7/pk7_asn1.c

515

.offset = offsetof(PKCS7_ENVELOPE, version),

lib/libcrypto/pkcs7/pk7_asn1.c

522

.offset = offsetof(PKCS7_ENVELOPE, recipientinfo),

lib/libcrypto/pkcs7/pk7_asn1.c

529

.offset = offsetof(PKCS7_ENVELOPE, enc_data),

lib/libcrypto/pkcs7/pk7_asn1.c

599

.offset = offsetof(PKCS7_RECIP_INFO, version),

lib/libcrypto/pkcs7/pk7_asn1.c

606

.offset = offsetof(PKCS7_RECIP_INFO, issuer_and_serial),

lib/libcrypto/pkcs7/pk7_asn1.c

613

.offset = offsetof(PKCS7_RECIP_INFO, key_enc_algor),

lib/libcrypto/pkcs7/pk7_asn1.c

620

.offset = offsetof(PKCS7_RECIP_INFO, enc_key),

lib/libcrypto/pkcs7/pk7_asn1.c

671

.offset = offsetof(PKCS7_ENC_CONTENT, content_type),

lib/libcrypto/pkcs7/pk7_asn1.c

678

.offset = offsetof(PKCS7_ENC_CONTENT, algorithm),

lib/libcrypto/pkcs7/pk7_asn1.c

685

.offset = offsetof(PKCS7_ENC_CONTENT, enc_data),

lib/libcrypto/pkcs7/pk7_asn1.c

72

.offset = offsetof(PKCS7, d.other),

lib/libcrypto/pkcs7/pk7_asn1.c

736

.offset = offsetof(PKCS7_SIGN_ENVELOPE, version),

lib/libcrypto/pkcs7/pk7_asn1.c

743

.offset = offsetof(PKCS7_SIGN_ENVELOPE, recipientinfo),

lib/libcrypto/pkcs7/pk7_asn1.c

750

.offset = offsetof(PKCS7_SIGN_ENVELOPE, md_algs),

lib/libcrypto/pkcs7/pk7_asn1.c

757

.offset = offsetof(PKCS7_SIGN_ENVELOPE, enc_data),

lib/libcrypto/pkcs7/pk7_asn1.c

764

.offset = offsetof(PKCS7_SIGN_ENVELOPE, cert),

lib/libcrypto/pkcs7/pk7_asn1.c

771

.offset = offsetof(PKCS7_SIGN_ENVELOPE, crl),

lib/libcrypto/pkcs7/pk7_asn1.c

778

.offset = offsetof(PKCS7_SIGN_ENVELOPE, signer_info),

lib/libcrypto/pkcs7/pk7_asn1.c

829

.offset = offsetof(PKCS7_ENCRYPT, version),

lib/libcrypto/pkcs7/pk7_asn1.c

83

.offset = offsetof(PKCS7, d.data),

lib/libcrypto/pkcs7/pk7_asn1.c

836

.offset = offsetof(PKCS7_ENCRYPT, enc_data),

lib/libcrypto/pkcs7/pk7_asn1.c

887

.offset = offsetof(PKCS7_DIGEST, version),

lib/libcrypto/pkcs7/pk7_asn1.c

894

.offset = offsetof(PKCS7_DIGEST, md),

lib/libcrypto/pkcs7/pk7_asn1.c

901

.offset = offsetof(PKCS7_DIGEST, contents),

lib/libcrypto/pkcs7/pk7_asn1.c

908

.offset = offsetof(PKCS7_DIGEST, digest),

lib/libcrypto/pkcs7/pk7_asn1.c

93

.offset = offsetof(PKCS7, d.sign),

lib/libcrypto/pkcs7/pk7_asn1.c

964

.offset = 0,

lib/libcrypto/pkcs7/pk7_asn1.c

987

.offset = 0,

lib/libcrypto/rsa/rsa.h

294

int RSA_print_fp(FILE *fp, const RSA *r, int offset);

lib/libcrypto/rsa/rsa.h

297

int RSA_print(BIO *bp, const RSA *r, int offset);

lib/libcrypto/rsa/rsa_asn1.c

104

.offset = offsetof(RSA, n),

lib/libcrypto/rsa/rsa_asn1.c

111

.offset = offsetof(RSA, e),

lib/libcrypto/rsa/rsa_asn1.c

118

.offset = offsetof(RSA, d),

lib/libcrypto/rsa/rsa_asn1.c

125

.offset = offsetof(RSA, p),

lib/libcrypto/rsa/rsa_asn1.c

132

.offset = offsetof(RSA, q),

lib/libcrypto/rsa/rsa_asn1.c

139

.offset = offsetof(RSA, dmp1),

lib/libcrypto/rsa/rsa_asn1.c

146

.offset = offsetof(RSA, dmq1),

lib/libcrypto/rsa/rsa_asn1.c

153

.offset = offsetof(RSA, iqmp),

lib/libcrypto/rsa/rsa_asn1.c

183

.offset = offsetof(RSA, n),

lib/libcrypto/rsa/rsa_asn1.c

190

.offset = offsetof(RSA, e),

lib/libcrypto/rsa/rsa_asn1.c

231

.offset = offsetof(RSA_PSS_PARAMS, hashAlgorithm),

lib/libcrypto/rsa/rsa_asn1.c

238

.offset = offsetof(RSA_PSS_PARAMS, maskGenAlgorithm),

lib/libcrypto/rsa/rsa_asn1.c

245

.offset = offsetof(RSA_PSS_PARAMS, saltLength),

lib/libcrypto/rsa/rsa_asn1.c

252

.offset = offsetof(RSA_PSS_PARAMS, trailerField),

lib/libcrypto/rsa/rsa_asn1.c

322

.offset = offsetof(RSA_OAEP_PARAMS, hashFunc),

lib/libcrypto/rsa/rsa_asn1.c

329

.offset = offsetof(RSA_OAEP_PARAMS, maskGenFunc),

lib/libcrypto/rsa/rsa_asn1.c

336

.offset = offsetof(RSA_OAEP_PARAMS, pSourceFunc),

lib/libcrypto/rsa/rsa_asn1.c

97

.offset = offsetof(RSA, version),

lib/libcrypto/sm2/sm2_crypt.c

50

.offset = offsetof(SM2_Ciphertext, C1x),

lib/libcrypto/sm2/sm2_crypt.c

57

.offset = offsetof(SM2_Ciphertext, C1y),

lib/libcrypto/sm2/sm2_crypt.c

64

.offset = offsetof(SM2_Ciphertext, C3),

lib/libcrypto/sm2/sm2_crypt.c

71

.offset = offsetof(SM2_Ciphertext, C2),

lib/libcrypto/ts/ts_asn1.c

164

.offset = offsetof(TS_REQ, version),

lib/libcrypto/ts/ts_asn1.c

171

.offset = offsetof(TS_REQ, msg_imprint),

lib/libcrypto/ts/ts_asn1.c

178

.offset = offsetof(TS_REQ, policy_id),

lib/libcrypto/ts/ts_asn1.c

185

.offset = offsetof(TS_REQ, nonce),

lib/libcrypto/ts/ts_asn1.c

192

.offset = offsetof(TS_REQ, cert_req),

lib/libcrypto/ts/ts_asn1.c

199

.offset = offsetof(TS_REQ, extensions),

lib/libcrypto/ts/ts_asn1.c

286

.offset = offsetof(TS_ACCURACY, seconds),

lib/libcrypto/ts/ts_asn1.c

293

.offset = offsetof(TS_ACCURACY, millis),

lib/libcrypto/ts/ts_asn1.c

300

.offset = offsetof(TS_ACCURACY, micros),

lib/libcrypto/ts/ts_asn1.c

357

.offset = offsetof(TS_TST_INFO, version),

lib/libcrypto/ts/ts_asn1.c

364

.offset = offsetof(TS_TST_INFO, policy_id),

lib/libcrypto/ts/ts_asn1.c

371

.offset = offsetof(TS_TST_INFO, msg_imprint),

lib/libcrypto/ts/ts_asn1.c

378

.offset = offsetof(TS_TST_INFO, serial),

lib/libcrypto/ts/ts_asn1.c

385

.offset = offsetof(TS_TST_INFO, time),

lib/libcrypto/ts/ts_asn1.c

392

.offset = offsetof(TS_TST_INFO, accuracy),

lib/libcrypto/ts/ts_asn1.c

399

.offset = offsetof(TS_TST_INFO, ordering),

lib/libcrypto/ts/ts_asn1.c

406

.offset = offsetof(TS_TST_INFO, nonce),

lib/libcrypto/ts/ts_asn1.c

413

.offset = offsetof(TS_TST_INFO, tsa),

lib/libcrypto/ts/ts_asn1.c

420

.offset = offsetof(TS_TST_INFO, extensions),

lib/libcrypto/ts/ts_asn1.c

507

.offset = offsetof(TS_STATUS_INFO, status),

lib/libcrypto/ts/ts_asn1.c

514

.offset = offsetof(TS_STATUS_INFO, text),

lib/libcrypto/ts/ts_asn1.c

521

.offset = offsetof(TS_STATUS_INFO, failure_info),

lib/libcrypto/ts/ts_asn1.c

630

.offset = offsetof(TS_RESP, status_info),

lib/libcrypto/ts/ts_asn1.c

637

.offset = offsetof(TS_RESP, token),

lib/libcrypto/ts/ts_asn1.c

70

.offset = offsetof(TS_MSG_IMPRINT, hash_algo),

lib/libcrypto/ts/ts_asn1.c

724

.offset = offsetof(ESS_ISSUER_SERIAL, issuer),

lib/libcrypto/ts/ts_asn1.c

731

.offset = offsetof(ESS_ISSUER_SERIAL, serial),

lib/libcrypto/ts/ts_asn1.c

77

.offset = offsetof(TS_MSG_IMPRINT, hashed_msg),

lib/libcrypto/ts/ts_asn1.c

788

.offset = offsetof(ESS_CERT_ID, hash),

lib/libcrypto/ts/ts_asn1.c

795

.offset = offsetof(ESS_CERT_ID, issuer_serial),

lib/libcrypto/ts/ts_asn1.c

852

.offset = offsetof(ESS_SIGNING_CERT, cert_ids),

lib/libcrypto/ts/ts_asn1.c

859

.offset = offsetof(ESS_SIGNING_CERT, policy_info),

lib/libcrypto/ts/ts_asn1.c

916

.offset = offsetof(ESS_CERT_ID_V2, hash_alg),

lib/libcrypto/ts/ts_asn1.c

923

.offset = offsetof(ESS_CERT_ID_V2, hash),

lib/libcrypto/ts/ts_asn1.c

930

.offset = offsetof(ESS_CERT_ID_V2, issuer_serial),

lib/libcrypto/ts/ts_asn1.c

981

.offset = offsetof(ESS_SIGNING_CERT_V2, cert_ids),

lib/libcrypto/ts/ts_asn1.c

988

.offset = offsetof(ESS_SIGNING_CERT_V2, policy_info),

lib/libcrypto/txt_db/txt_db.c

106

offset = 0;

lib/libcrypto/txt_db/txt_db.c

108

if (offset != 0) {

lib/libcrypto/txt_db/txt_db.c

113

buf->data[offset] = '\0';

lib/libcrypto/txt_db/txt_db.c

114

BIO_gets(in, &(buf->data[offset]), size - offset);

lib/libcrypto/txt_db/txt_db.c

116

if (buf->data[offset] == '\0')

lib/libcrypto/txt_db/txt_db.c

118

if ((offset == 0) && (buf->data[0] == '#'))

lib/libcrypto/txt_db/txt_db.c

120

i = strlen(&(buf->data[offset]));

lib/libcrypto/txt_db/txt_db.c

121

offset += i;

lib/libcrypto/txt_db/txt_db.c

122

if (buf->data[offset-1] != '\n')

lib/libcrypto/txt_db/txt_db.c

125

buf->data[offset-1] = '\0'; /* blat the '\n' */

lib/libcrypto/txt_db/txt_db.c

126

if (!(p = malloc(add + offset)))

lib/libcrypto/txt_db/txt_db.c

128

offset = 0;

lib/libcrypto/txt_db/txt_db.c

78

int offset = 0;

lib/libcrypto/x509/x509_addr.c

118

.offset = offsetof(IPAddressOrRange, u.addressPrefix),

lib/libcrypto/x509/x509_addr.c

125

.offset = offsetof(IPAddressOrRange, u.addressRange),

lib/libcrypto/x509/x509_addr.c

146

.offset = offsetof(IPAddressChoice, u.inherit),

lib/libcrypto/x509/x509_addr.c

153

.offset = offsetof(IPAddressChoice, u.addressesOrRanges),

lib/libcrypto/x509/x509_addr.c

174

.offset = offsetof(IPAddressFamily, addressFamily),

lib/libcrypto/x509/x509_addr.c

181

.offset = offsetof(IPAddressFamily, ipAddressChoice),

lib/libcrypto/x509/x509_addr.c

201

.offset = 0,

lib/libcrypto/x509/x509_addr.c

90

.offset = offsetof(IPAddressRange, min),

lib/libcrypto/x509/x509_addr.c

97

.offset = offsetof(IPAddressRange, max),

lib/libcrypto/x509/x509_akeya.c

70

.offset = offsetof(AUTHORITY_KEYID, keyid),

lib/libcrypto/x509/x509_akeya.c

77

.offset = offsetof(AUTHORITY_KEYID, issuer),

lib/libcrypto/x509/x509_akeya.c

84

.offset = offsetof(AUTHORITY_KEYID, serial),

lib/libcrypto/x509/x509_asid.c

111

.offset = offsetof(ASIdOrRange, u.id),

lib/libcrypto/x509/x509_asid.c

118

.offset = offsetof(ASIdOrRange, u.range),

lib/libcrypto/x509/x509_asid.c

139

.offset = offsetof(ASIdentifierChoice, u.inherit),

lib/libcrypto/x509/x509_asid.c

146

.offset = offsetof(ASIdentifierChoice, u.asIdsOrRanges),

lib/libcrypto/x509/x509_asid.c

167

.offset = offsetof(ASIdentifiers, asnum),

lib/libcrypto/x509/x509_asid.c

174

.offset = offsetof(ASIdentifiers, rdi),

lib/libcrypto/x509/x509_asid.c

83

.offset = offsetof(ASRange, min),

lib/libcrypto/x509/x509_asid.c

90

.offset = offsetof(ASRange, max),

lib/libcrypto/x509/x509_bcons.c

102

.offset = offsetof(BASIC_CONSTRAINTS, ca),

lib/libcrypto/x509/x509_bcons.c

109

.offset = offsetof(BASIC_CONSTRAINTS, pathlen),

lib/libcrypto/x509/x509_cpols.c

111

.offset = 0,

lib/libcrypto/x509/x509_cpols.c

161

.offset = offsetof(POLICYINFO, policyid),

lib/libcrypto/x509/x509_cpols.c

168

.offset = offsetof(POLICYINFO, qualifiers),

lib/libcrypto/x509/x509_cpols.c

218

.offset = offsetof(POLICYQUALINFO, d.other),

lib/libcrypto/x509/x509_cpols.c

229

.offset = offsetof(POLICYQUALINFO, d.cpsuri),

lib/libcrypto/x509/x509_cpols.c

239

.offset = offsetof(POLICYQUALINFO, d.usernotice),

lib/libcrypto/x509/x509_cpols.c

248

.offset = offsetof(POLICYQUALINFO, pqualid),

lib/libcrypto/x509/x509_cpols.c

259

.offset = offsetof(POLICYQUALINFO, pqualid),

lib/libcrypto/x509/x509_cpols.c

266

.offset = 0,

lib/libcrypto/x509/x509_cpols.c

317

.offset = offsetof(USERNOTICE, noticeref),

lib/libcrypto/x509/x509_cpols.c

324

.offset = offsetof(USERNOTICE, exptext),

lib/libcrypto/x509/x509_cpols.c

375

.offset = offsetof(NOTICEREF, organization),

lib/libcrypto/x509/x509_cpols.c

382

.offset = offsetof(NOTICEREF, noticenos),

lib/libcrypto/x509/x509_crld.c

406

.offset = offsetof(DIST_POINT_NAME, name.fullname),

lib/libcrypto/x509/x509_crld.c

413

.offset = offsetof(DIST_POINT_NAME, name.relativename),

lib/libcrypto/x509/x509_crld.c

465

.offset = offsetof(DIST_POINT, distpoint),

lib/libcrypto/x509/x509_crld.c

472

.offset = offsetof(DIST_POINT, reasons),

lib/libcrypto/x509/x509_crld.c

479

.offset = offsetof(DIST_POINT, CRLissuer),

lib/libcrypto/x509/x509_crld.c

529

.offset = 0,

lib/libcrypto/x509/x509_crld.c

579

.offset = offsetof(ISSUING_DIST_POINT, distpoint),

lib/libcrypto/x509/x509_crld.c

586

.offset = offsetof(ISSUING_DIST_POINT, onlyuser),

lib/libcrypto/x509/x509_crld.c

593

.offset = offsetof(ISSUING_DIST_POINT, onlyCA),

lib/libcrypto/x509/x509_crld.c

600

.offset = offsetof(ISSUING_DIST_POINT, onlysomereasons),

lib/libcrypto/x509/x509_crld.c

607

.offset = offsetof(ISSUING_DIST_POINT, indirectCRL),

lib/libcrypto/x509/x509_crld.c

614

.offset = offsetof(ISSUING_DIST_POINT, onlyattr),

lib/libcrypto/x509/x509_extku.c

123

.offset = 0,

lib/libcrypto/x509/x509_genn.c

132

.offset = offsetof(EDIPARTYNAME, nameAssigner),

lib/libcrypto/x509/x509_genn.c

139

.offset = offsetof(EDIPARTYNAME, partyName),

lib/libcrypto/x509/x509_genn.c

190

.offset = offsetof(GENERAL_NAME, d.otherName),

lib/libcrypto/x509/x509_genn.c

197

.offset = offsetof(GENERAL_NAME, d.rfc822Name),

lib/libcrypto/x509/x509_genn.c

204

.offset = offsetof(GENERAL_NAME, d.dNSName),

lib/libcrypto/x509/x509_genn.c

212

.offset = offsetof(GENERAL_NAME, d.x400Address),

lib/libcrypto/x509/x509_genn.c

220

.offset = offsetof(GENERAL_NAME, d.directoryName),

lib/libcrypto/x509/x509_genn.c

227

.offset = offsetof(GENERAL_NAME, d.ediPartyName),

lib/libcrypto/x509/x509_genn.c

234

.offset = offsetof(GENERAL_NAME, d.uniformResourceIdentifier),

lib/libcrypto/x509/x509_genn.c

241

.offset = offsetof(GENERAL_NAME, d.iPAddress),

lib/libcrypto/x509/x509_genn.c

248

.offset = offsetof(GENERAL_NAME, d.registeredID),

lib/libcrypto/x509/x509_genn.c

298

.offset = 0,

lib/libcrypto/x509/x509_genn.c

72

.offset = offsetof(OTHERNAME, type_id),

lib/libcrypto/x509/x509_genn.c

80

.offset = offsetof(OTHERNAME, value),

lib/libcrypto/x509/x509_info.c

125

.offset = offsetof(ACCESS_DESCRIPTION, method),

lib/libcrypto/x509/x509_info.c

132

.offset = offsetof(ACCESS_DESCRIPTION, location),

lib/libcrypto/x509/x509_info.c

182

.offset = 0,

lib/libcrypto/x509/x509_ncons.c

111

.offset = offsetof(GENERAL_SUBTREE, base),

lib/libcrypto/x509/x509_ncons.c

118

.offset = offsetof(GENERAL_SUBTREE, minimum),

lib/libcrypto/x509/x509_ncons.c

125

.offset = offsetof(GENERAL_SUBTREE, maximum),

lib/libcrypto/x509/x509_ncons.c

146

.offset = offsetof(NAME_CONSTRAINTS, permittedSubtrees),

lib/libcrypto/x509/x509_ncons.c

153

.offset = offsetof(NAME_CONSTRAINTS, excludedSubtrees),

lib/libcrypto/x509/x509_pcons.c

103

.offset = offsetof(POLICY_CONSTRAINTS, requireExplicitPolicy),

lib/libcrypto/x509/x509_pcons.c

110

.offset = offsetof(POLICY_CONSTRAINTS, inhibitPolicyMapping),

lib/libcrypto/x509/x509_pku.c

102

.offset = offsetof(PKEY_USAGE_PERIOD, notAfter),

lib/libcrypto/x509/x509_pku.c

95

.offset = offsetof(PKEY_USAGE_PERIOD, notBefore),

lib/libcrypto/x509/x509_pmaps.c

101

.offset = offsetof(POLICY_MAPPING, issuerDomainPolicy),

lib/libcrypto/x509/x509_pmaps.c

108

.offset = offsetof(POLICY_MAPPING, subjectDomainPolicy),

lib/libcrypto/x509/x509_pmaps.c

128

.offset = 0,

lib/libcurses/base/lib_screen.c

406

void *data = (void *) ((char *) win + scr_params[n].offset);

lib/libcurses/base/lib_screen.c

822

const char *data = (char *) win + scr_params[y].offset;

lib/libcurses/base/lib_screen.c

95

size_t offset;

lib/libcurses/base/lib_slkset.c

124

offset = 0;

lib/libcurses/base/lib_slkset.c

127

offset = (limit - numcols) / 2;

lib/libcurses/base/lib_slkset.c

130

offset = limit - numcols;

lib/libcurses/base/lib_slkset.c

133

if (offset <= 0)

lib/libcurses/base/lib_slkset.c

134

offset = 0;

lib/libcurses/base/lib_slkset.c

136

memset(slk->ent[i].form_text, ' ', (size_t) offset);

lib/libcurses/base/lib_slkset.c

138

memcpy(slk->ent[i].form_text + offset,

lib/libcurses/base/lib_slkset.c

142

if (offset < limit) {

lib/libcurses/base/lib_slkset.c

143

memset(slk->ent[i].form_text + offset + numchrs,

lib/libcurses/base/lib_slkset.c

145

(size_t) (limit - (offset + numcols)));

lib/libcurses/base/lib_slkset.c

56

int offset = 0;

lib/libcurses/tic.h

181

unsigned offset;

lib/libcurses/tinfo/alloc_entry.c

220

size_t offset;

lib/libcurses/tinfo/alloc_entry.c

226

for (i = 0, offset = 0; i < n; i++) {

lib/libcurses/tinfo/alloc_entry.c

227

tp->ext_Names[i] = tp->ext_str_table + offset;

lib/libcurses/tinfo/alloc_entry.c

230

length - offset);

lib/libcurses/tinfo/alloc_entry.c

231

offset += strlen(tp->ext_Names[i]) + 1;

lib/libcurses/tinfo/captoinfo.c

636

int offset;

lib/libcurses/tinfo/captoinfo.c

727

fixups[myfix].offset = (int) (bufptr

lib/libcurses/tinfo/captoinfo.c

790

fixups[myfix].offset = (int) (bufptr - my_string - 1);

lib/libcurses/tinfo/captoinfo.c

996

char *p = fixups[myfix].offset + my_string;

lib/libcurses/tinfo/comp_expand.c

197

fixups[octals].offset = bufp;

lib/libcurses/tinfo/comp_expand.c

217

char *p = buffer + fixups[octals].offset;

lib/libcurses/tinfo/comp_expand.c

75

int offset;

lib/libcurses/tinfo/db_iterator.c

267

_nc_next_db(DBDIRS * state, int *offset)

lib/libcurses/tinfo/db_iterator.c

271

(void) offset;

lib/libcurses/tinfo/db_iterator.c

287

_nc_first_db(DBDIRS * state, int *offset)

lib/libcurses/tinfo/db_iterator.c

291

*offset = 0;

lib/libcurses/tinfo/init_keytry.c

81

if (_nc_tinfo_fkeys[n].offset < STRCOUNT) {

lib/libcurses/tinfo/init_keytry.c

83

CUR Strings[_nc_tinfo_fkeys[n].offset],

lib/libcurses/tinfo/parse_entry.c

126

offset = n;

lib/libcurses/tinfo/parse_entry.c

177

while (--actual > offset)

lib/libcurses/tinfo/parse_entry.c

179

tp->ext_Names[offset] = saved;

lib/libcurses/tinfo/parse_entry.c

182

temp.nte_name = tp->ext_Names[offset];

lib/libcurses/tinfo/parse_entry.c

73

unsigned offset = 0;

lib/libcurses/tinfo/parse_entry.c

83

offset = tp->ext_Booleans;

lib/libcurses/tinfo/parse_entry.c

89

offset = (unsigned) (tp->ext_Booleans + tp->ext_Numbers);

lib/libcurses/tinfo/parse_entry.c

95

offset = (unsigned) (tp->ext_Booleans + tp->ext_Numbers + tp->ext_Strings);

lib/libcurses/tinfo/read_entry.c

200

fake_read(char *src, int *offset, int limit, char *dst, unsigned want)

lib/libcurses/tinfo/read_entry.c

202

int have = (limit - *offset);

lib/libcurses/tinfo/read_entry.c

207

memcpy(dst, src + *offset, (size_t) want);

lib/libcurses/tinfo/read_entry.c

208

*offset += (int) want;

lib/libcurses/tinfo/read_entry.c

215

#define Read(buf, count) fake_read(buffer, &offset, limit, (char *) buf, (unsigned) count)

lib/libcurses/tinfo/read_entry.c

284

int offset = 0;

lib/libcurses/tinfo/read_entry.c

298

TR(TRACE_DATABASE, ("READ termtype header @%d", offset));

lib/libcurses/tinfo/read_entry.c

366

offset = (int) (have - MAX_NAME_SIZE);

lib/libcurses/tinfo/read_entry.c

415

TR(TRACE_DATABASE, ("READ extended_header @%d", offset));

lib/libcurses/tinfo/read_entry.c

455

ext_bool_count, offset));

lib/libcurses/tinfo/read_entry.c

465

ext_num_count, offset));

lib/libcurses/tinfo/read_entry.c

474

TR(TRACE_DATABASE, ("READ extended-offsets @%d", offset));

lib/libcurses/tinfo/read_entry.c

484

ext_str_limit, offset));

lib/libcurses/tinfo/read_entry.c

902

int offset;

lib/libcurses/tinfo/read_entry.c

905

_nc_first_db(&state, &offset);

lib/libcurses/tinfo/read_entry.c

907

while ((path = _nc_next_db(&state, &offset)) != 0) {

lib/libcurses/tinfo/write_entry.c

107

offset,

lib/libcurses/tinfo/write_entry.c

295

unsigned offset = 0;

lib/libcurses/tinfo/write_entry.c

362

if (_nc_write_object(tp, buffer + 1, &offset, limit - 1) != ERR) {

lib/libcurses/tinfo/write_entry.c

375

data.size = offset + 1;

lib/libcurses/tinfo/write_entry.c

555

unsigned *offset,

lib/libcurses/tinfo/write_entry.c

561

size_t have = (limit - *offset);

lib/libcurses/tinfo/write_entry.c

567

memcpy(dst + *offset, src, want);

lib/libcurses/tinfo/write_entry.c

568

*offset += (unsigned) want;

lib/libcurses/tinfo/write_entry.c

575

#define Write(buf, size, count) fake_write(buffer, offset, (size_t) limit, (char *) buf, (size_t) count, (size_t) size)

lib/libcurses/tinfo/write_entry.c

720

_nc_write_object(TERMTYPE2 *tp, char *buffer, unsigned *offset, unsigned limit)

lib/libcurses/tinfo/write_entry.c

80

unsigned offset = 0;

lib/libcurses/tinfo/write_entry.c

802

TRACE_OUT(("Header of %s @%d", namelist, *offset));

lib/libcurses/tinfo/write_entry.c

82

if (_nc_write_object(tp, buffer, &offset, limit) == ERR) {

lib/libcurses/tinfo/write_entry.c

823

TRACE_OUT(("Numerics begin at %04x", *offset));

lib/libcurses/tinfo/write_entry.c

831

TRACE_OUT(("String offsets begin at %04x", *offset));

lib/libcurses/tinfo/write_entry.c

839

TRACE_OUT(("String table begins at %04x", *offset));

lib/libcurses/tinfo/write_entry.c

888

TRACE_OUT(("WRITE extended-header @%d", *offset));

lib/libcurses/tinfo/write_entry.c

893

TRACE_OUT(("WRITE %d booleans @%d", tp->ext_Booleans, *offset));

lib/libcurses/tinfo/write_entry.c

904

TRACE_OUT(("WRITE %d numbers @%d", tp->ext_Numbers, *offset));

lib/libcurses/tinfo/write_entry.c

917

TRACE_OUT(("WRITE offsets @%d", *offset));

lib/libcurses/tinfo/write_entry.c

95

actual = fwrite(buffer, sizeof(char), (size_t) offset, fp);

lib/libcurses/tinfo/write_entry.c

951

total_size = total_size + (int) (*offset + 1);

lib/libcurses/tinfo/write_entry.c

96

if (actual != offset) {

lib/libedit/eln.c

354

size_t offset;

lib/libedit/eln.c

359

offset = 0;

lib/libedit/eln.c

361

offset += ct_enc_width(*p);

lib/libedit/eln.c

362

info->cursor = info->buffer + offset;

lib/libedit/eln.c

364

offset = 0;

lib/libedit/eln.c

366

offset += ct_enc_width(*p);

lib/libedit/eln.c

367

info->lastchar = info->buffer + offset;

lib/libedit/read.c

294

ma->offset = 0;

lib/libedit/read.c

302

ma->offset = 0;

lib/libedit/read.c

319

if (ma->macro[0][ma->offset] == '\0') {

lib/libedit/read.c

324

*cp = ma->macro[0][ma->offset++];

lib/libedit/read.c

326

if (ma->macro[0][ma->offset] == '\0') {

lib/libedit/read.c

60

int offset;

lib/libedit/read.c

92

ma->offset = 0;

lib/libelf/elf_rand.c

36

elf_rand(Elf *ar, off_t offset)

lib/libelf/elf_rand.c

42

(offset & 1) || offset < SARMAG ||

lib/libelf/elf_rand.c

43

offset >= ar->e_rawsize) {

lib/libelf/elf_rand.c

48

offset_of_member = offset + (off_t) sizeof(struct ar_hdr);

lib/libelf/elf_rand.c

56

arh = (struct ar_hdr *) (ar->e_rawfile + offset);

lib/libelf/elf_rand.c

64

ar->e_u.e_ar.e_next = offset;

lib/libelf/elf_rand.c

66

return (offset);

lib/libelf/elf_strptr.c

110

if (offset < count) {

lib/libelf/elf_strptr.c

116

if (offset < count + d->d_size) {

lib/libelf/elf_strptr.c

119

offset - count);

lib/libelf/elf_strptr.c

39

elf_strptr(Elf *e, size_t scndx, size_t offset)

lib/libelf/elf_strptr.c

56

offset >= shdr.sh_size) {

lib/libelf/elf_strptr.c

80

if (offset >= d->d_off &&

lib/libelf/elf_strptr.c

81

offset < d->d_off + d->d_size)

lib/libelf/elf_strptr.c

82

return ((char *) d->d_buf + offset - d->d_off);

lib/libelf/elf_strptr.c

92

while ((d = elf_getdata(s, d)) != NULL && count <= offset) {

lib/libelf/libelf_ar_util.c

109

bufsize - 1, 10, &offset) == 0) {

lib/libelf/libelf_ar_util.c

114

if (offset > ar->e_u.e_ar.e_rawstrtabsz) {

lib/libelf/libelf_ar_util.c

119

p = q = ar->e_u.e_ar.e_rawstrtab + offset;

lib/libelf/libelf_ar_util.c

84

size_t len, offset;

lib/libexpat/lib/expat.h

971

XML_GetInputContext(XML_Parser parser, int *offset, int *size);

lib/libexpat/lib/xmlparse.c

2574

int offset

lib/libexpat/lib/xmlparse.c

2579

memmove(parser->m_buffer, &parser->m_buffer[offset],

lib/libexpat/lib/xmlparse.c

2581

parser->m_bufferEnd -= offset;

lib/libexpat/lib/xmlparse.c

2582

parser->m_bufferPtr -= offset;

lib/libexpat/lib/xmlparse.c

2774

XML_GetInputContext(XML_Parser parser, int *offset, int *size) {

lib/libexpat/lib/xmlparse.c

2779

if (offset != NULL)

lib/libexpat/lib/xmlparse.c

2780

*offset = (int)(parser->m_eventPtr - parser->m_buffer);

lib/libexpat/lib/xmlparse.c

2787

(void)offset;

lib/libexpat/tests/basic_tests.c

3207

int offset, size;

lib/libexpat/tests/basic_tests.c

3211

if (XML_GetInputContext(g_parser, &offset, &size) != NULL)

lib/libexpat/tests/basic_tests.c

6096

int offset = 0;

lib/libexpat/tests/basic_tests.c

6098

while (offset < *leading + *bigtoken) {

lib/libexpat/tests/basic_tests.c

6099

assert_true(offset + *fillsize <= document_length);

lib/libexpat/tests/basic_tests.c

6101

= XML_Parse(parser, &document[offset], *fillsize, XML_FALSE);

lib/libexpat/tests/basic_tests.c

6105

offset += *fillsize;

lib/libexpat/tests/basic_tests.c

6124

assert_true(offset + *fillsize <= document_length);

lib/libexpat/tests/basic_tests.c

6126

= XML_Parse(parser, &document[offset], *fillsize, XML_FALSE);

lib/libexpat/tests/basic_tests.c

6130

offset += *fillsize;

lib/libexpat/tests/basic_tests.c

6231

int offset = 0;

lib/libexpat/tests/basic_tests.c

6233

assert_true(offset + *fillsize <= document_length); // or test is invalid

lib/libexpat/tests/basic_tests.c

6235

= XML_Parse(parser, &document[offset], *fillsize, XML_FALSE);

lib/libexpat/tests/basic_tests.c

6239

offset += *fillsize;

lib/libexpat/tests/basic_tests.c

6241

assert_true(offset <= INT_MAX - worstcase_bytes); // avoid overflow

lib/libexpat/tests/basic_tests.c

6242

worstcase_bytes += offset; // we might've tried to parse all pending bytes

lib/libexpat/tests/handlers.c

1645

int offset, size;

lib/libexpat/tests/handlers.c

1650

buffer = XML_GetInputContext(g_parser, &offset, &size);

lib/libexpat/tests/handlers.c

1653

if (offset != data->start_element_len)

lib/libexpat/tests/handlers.c

1659

if (XML_GetCurrentByteIndex(g_parser) != offset)

lib/libexpat/tests/misc_tests.c

630

int offset = -1;

lib/libexpat/tests/misc_tests.c

633

const char *const context = XML_GetInputContext(parser, &offset, &size);

lib/libexpat/tests/misc_tests.c

637

assert_true(offset >= 0);

lib/libexpat/tests/misc_tests.c

639

return portable_strndup(context + offset, byte_count);

lib/libfido2/src/largeblob.c

156

largeblob_get_tx(fido_dev_t *dev, size_t offset, size_t count, int *ms)

lib/libfido2/src/largeblob.c

166

(argv[2] = cbor_build_uint(offset)) == NULL) {

lib/libfido2/src/largeblob.c

464

prepare_hmac(size_t offset, const u_char *data, size_t len, fido_blob_t *hmac)

lib/libfido2/src/largeblob.c

474

if (offset > UINT32_MAX) {

lib/libfido2/src/largeblob.c

475

fido_log_debug("%s: invalid offset=%zu", __func__, offset);

lib/libfido2/src/largeblob.c

482

u32_offset = htole32((uint32_t)offset);

lib/libfido2/src/largeblob.c

494

size_t chunk_len, size_t offset, size_t totalsiz, int *ms)

lib/libfido2/src/largeblob.c

504

(argv[2] = cbor_build_uint(offset)) == NULL ||

lib/libfido2/src/largeblob.c

505

(offset == 0 && (argv[3] = cbor_build_uint(totalsiz)) == NULL)) {

lib/libfido2/src/largeblob.c

512

prepare_hmac(offset, chunk, chunk_len, hmac) < 0 ||

lib/libfido2/src/largeblob.c

611

for (size_t offset = 0; offset < cbor.len; offset += chunklen) {

lib/libfido2/src/largeblob.c

612

if ((chunklen = cbor.len - offset) > maxchunklen)

lib/libfido2/src/largeblob.c

614

if ((r = largeblob_set_tx(dev, token, cbor.ptr + offset,

lib/libfido2/src/largeblob.c

615

chunklen, offset, totalsize, ms)) != FIDO_OK ||

lib/libfuse/fuse_ops.c

293

off_t offset, struct fuse_file_info *ffi)

lib/libfuse/fuse_ops.c

312

fd.start = offset;

lib/libfuse/fuse_ops.c

324

offset, ffi);

lib/libfuse/fuse_ops.c

479

ifuse_ops_read(fuse_req_t req, fuse_ino_t ino, size_t size, off_t offset,

lib/libfuse/fuse_ops.c

502

err = f->op.read(realname, buf, size, offset, ffi);

lib/libfuse/fuse_ops.c

517

size_t size, off_t offset, struct fuse_file_info *ffi)

lib/libfuse/fuse_ops.c

532

err = f->op.write(realname, buf, size, offset, ffi);

lib/libkvm/kvm.c

102

_kvm_pwrite(kvm_t *kd, int fd, const void *buf, size_t nbytes, off_t offset)

lib/libkvm/kvm.c

107

rval = pwrite(fd, buf, nbytes, offset);

lib/libkvm/kvm.c

337

size_t offset;

lib/libkvm/kvm.c

371

offset = kcore_hdr.c_hdrsize;

lib/libkvm/kvm.c

376

sz = _kvm_pread(kd, kd->pmfd, &cpu_hdr, sizeof(cpu_hdr), (off_t)offset);

lib/libkvm/kvm.c

384

offset += kcore_hdr.c_seghdrsize;

lib/libkvm/kvm.c

395

(off_t)offset);

lib/libkvm/kvm.c

400

offset += cpu_hdr.c_size;

lib/libkvm/kvm.c

405

sz = _kvm_pread(kd, kd->pmfd, &mem_hdr, sizeof(mem_hdr), (off_t)offset);

lib/libkvm/kvm.c

410

offset += kcore_hdr.c_seghdrsize;

lib/libkvm/kvm.c

416

kd->dump_off = offset;

lib/libkvm/kvm.c

546

long offset;

lib/libkvm/kvm.c

557

offset = 0;

lib/libkvm/kvm.c

562

offset += kd->kcore_hdr->c_hdrsize;

lib/libkvm/kvm.c

576

offset += kd->kcore_hdr->c_seghdrsize;

lib/libkvm/kvm.c

585

offset += seghdr.c_size;

lib/libkvm/kvm.c

599

offset += kd->kcore_hdr->c_seghdrsize;

lib/libkvm/kvm.c

604

return (offset);

lib/libkvm/kvm.c

86

_kvm_pread(kvm_t *kd, int fd, void *buf, size_t nbytes, off_t offset)

lib/libkvm/kvm.c

91

rval = pread(fd, buf, nbytes, offset);

lib/libkvm/kvm_i386.c

182

u_long offset, pte_pa;

lib/libkvm/kvm_i386.c

197

offset = va & (kd->nbpg - 1);

lib/libkvm/kvm_i386.c

205

return (kd->nbpg - (int)offset);

lib/libkvm/kvm_i386.c

220

*pa = (pte & PG_FRAME) + offset;

lib/libkvm/kvm_i386.c

221

return (kd->nbpg - (int)offset);

lib/libkvm/kvm_mips64.c

145

int offset;

lib/libkvm/kvm_mips64.c

152

offset = (int)va & vm->pagemask;

lib/libkvm/kvm_mips64.c

159

return vm->pagesize - offset;

lib/libkvm/kvm_mips64.c

166

return vm->pagesize - offset;

lib/libkvm/kvm_mips64.c

170

return vm->pagesize - offset;

lib/libkvm/kvm_mips64.c

187

*pa = (pte & PG_FRAME) | (paddr_t)offset;

lib/libkvm/kvm_mips64.c

188

return vm->pagesize - offset;

lib/libkvm/kvm_proc.c

169

u_long addr, offset, slot;

lib/libkvm/kvm_proc.c

214

offset = va - vme.start;

lib/libkvm/kvm_proc.c

215

slot = offset / kd->nbpg + vme.aref.ar_pageoff;

lib/libkvm/kvm_proc.c

242

offset %= kd->nbpg;

lib/libkvm/kvm_proc.c

243

*cnt = kd->nbpg - offset;

lib/libkvm/kvm_proc.c

244

return (&kd->swapspc[offset]);

lib/libpcap/gencode.c

1010

u_int offset;

lib/libpcap/gencode.c

1016

offset = src_off;

lib/libpcap/gencode.c

1020

offset = dst_off;

lib/libpcap/gencode.c

1043

b1 = gen_mcmp_nl(offset + 12, BPF_W, ntohl(a[3]), ntohl(m[3]));

lib/libpcap/gencode.c

1044

b0 = gen_mcmp_nl(offset + 8, BPF_W, ntohl(a[2]), ntohl(m[2]));

lib/libpcap/gencode.c

1046

b0 = gen_mcmp_nl(offset + 4, BPF_W, ntohl(a[1]), ntohl(m[1]));

lib/libpcap/gencode.c

1048

b0 = gen_mcmp_nl(offset + 0, BPF_W, ntohl(a[0]), ntohl(m[0]));

lib/libpcap/gencode.c

3259

u_int offset;

lib/libpcap/gencode.c

3267

offset = (u_int)offsetof(struct ieee80211_frame, i_fc[0]);

lib/libpcap/gencode.c

3269

offset += IEEE80211_RADIOTAP_HDRLEN;

lib/libpcap/gencode.c

3271

b0 = gen_mcmp(offset, BPF_B, (bpf_int32)type, (bpf_u_int32)mask);

lib/libpcap/gencode.c

3426

u_int offset;

lib/libpcap/gencode.c

3434

offset = (u_int)offsetof(struct ieee80211_frame, i_fc[1]);

lib/libpcap/gencode.c

3436

offset += IEEE80211_RADIOTAP_HDRLEN;

lib/libpcap/gencode.c

3438

b0 = gen_mcmp(offset, BPF_B, (bpf_int32)fcdir,

lib/libpcap/gencode.c

3448

u_int offset = 0;

lib/libpcap/gencode.c

3451

offset = IEEE80211_RADIOTAP_HDRLEN;

lib/libpcap/gencode.c

3455

b0 = gen_p80211_addr(IEEE80211_FC1_DIR_NODS, offset +

lib/libpcap/gencode.c

3458

b1 = gen_p80211_addr(IEEE80211_FC1_DIR_TODS, offset +

lib/libpcap/gencode.c

3461

b2 = gen_p80211_addr(IEEE80211_FC1_DIR_FROMDS, offset +

lib/libpcap/gencode.c

3464

b3 = gen_p80211_addr(IEEE80211_FC1_DIR_DSTODS, offset +

lib/libpcap/gencode.c

3467

b4 = gen_p80211_addr(IEEE80211_FC1_DIR_DSTODS, offset +

lib/libpcap/gencode.c

3478

b0 = gen_p80211_addr(IEEE80211_FC1_DIR_NODS, offset +

lib/libpcap/gencode.c

3481

b1 = gen_p80211_addr(IEEE80211_FC1_DIR_TODS, offset +

lib/libpcap/gencode.c

3484

b2 = gen_p80211_addr(IEEE80211_FC1_DIR_FROMDS, offset +

lib/libpcap/gencode.c

3487

b3 = gen_p80211_addr(IEEE80211_FC1_DIR_DSTODS, offset +

lib/libpcap/gencode.c

3490

b4 = gen_p80211_addr(IEEE80211_FC1_DIR_DSTODS, offset +

lib/libpcap/gencode.c

3501

return (gen_bcmp(offset +

lib/libpcap/gencode.c

3506

return (gen_bcmp(offset +

lib/libpcap/gencode.c

3511

return (gen_bcmp(offset +

lib/libpcap/gencode.c

3516

return (gen_p80211_addr(IEEE80211_FC1_DIR_DSTODS, offset +

lib/libpcap/gencode.c

3545

gen_p80211_addr(int fcdir, u_int offset, const u_char *lladdr)

lib/libpcap/gencode.c

3549

b0 = gen_mcmp(offset, BPF_B, (bpf_int32)fcdir, IEEE80211_FC1_DIR_MASK);

lib/libpcap/gencode.c

3550

b1 = gen_bcmp(offset, IEEE80211_ADDR_LEN, lladdr);

lib/libpcap/gencode.c

470

gen_cmp(u_int offset, u_int size, bpf_int32 v)

lib/libpcap/gencode.c

476

s->s.k = offset;

lib/libpcap/gencode.c

486

gen_cmp_gt(u_int offset, u_int size, bpf_int32 v)

lib/libpcap/gencode.c

492

s->s.k = offset;

lib/libpcap/gencode.c

502

gen_mcmp(u_int offset, u_int size, bpf_int32 v, bpf_u_int32 mask)

lib/libpcap/gencode.c

504

struct block *b = gen_cmp(offset, size, v);

lib/libpcap/gencode.c

517

gen_mcmp_nl(u_int offset, u_int size, bpf_int32 v, bpf_u_int32 mask)

lib/libpcap/gencode.c

519

struct block *b = gen_cmp_nl(offset, size, v);

lib/libpcap/gencode.c

531

gen_bcmp(u_int offset, u_int size, const u_char *v)

lib/libpcap/gencode.c

541

tmp = gen_cmp(offset + size - 4, BPF_W, w);

lib/libpcap/gencode.c

551

tmp = gen_cmp(offset + size - 2, BPF_H, w);

lib/libpcap/gencode.c

558

tmp = gen_cmp(offset, BPF_B, (bpf_int32)v[0]);

lib/libpcap/gencode.c

625

gen_cmp_nl(u_int offset, u_int size, bpf_int32 v)

lib/libpcap/gencode.c

633

tmp->s.k = offset;

lib/libpcap/gencode.c

637

s->s.k = offset + off_nl;

lib/libpcap/gencode.c

969

u_int offset;

lib/libpcap/gencode.c

974

offset = src_off;

lib/libpcap/gencode.c

978

offset = dst_off;

lib/libpcap/gencode.c

999

b1 = gen_mcmp_nl(offset, BPF_W, (bpf_int32)addr, mask);

lib/libpcap/gencode.h

126

int offset;

lib/libpcap/optimize.c

1883

struct slist **offset = NULL;

lib/libpcap/optimize.c

1898

p->offset = dst - fstart;

lib/libpcap/optimize.c

1902

offset = calloc(slen, sizeof(struct slist *));

lib/libpcap/optimize.c

1903

if (!offset) {

lib/libpcap/optimize.c

1913

offset[off] = src;

lib/libpcap/optimize.c

1955

if (offset[i] == src->s.jt) {

lib/libpcap/optimize.c

1964

if (offset[i] == src->s.jf) {

lib/libpcap/optimize.c

1982

free(offset);

lib/libpcap/optimize.c

1991

off = JT(p)->offset - (p->offset + slen) - 1;

lib/libpcap/optimize.c

2007

off = JF(p)->offset - (p->offset + slen) - 1;

lib/libpcap/pcap-int.h

84

int offset; /* offset for proper alignment */

lib/libssl/bs_cbb.c

197

child_start = cbb->offset + cbb->pending_len_len;

lib/libssl/bs_cbb.c

199

if (!CBB_flush(cbb->child) || child_start < cbb->offset ||

lib/libssl/bs_cbb.c

256

cbb->base->buf[cbb->offset++] = initial_length_byte;

lib/libssl/bs_cbb.c

261

cbb->base->buf[cbb->offset + i] = len;

lib/libssl/bs_cbb.c

271

cbb->offset = 0;

lib/libssl/bs_cbb.c

282

cbb->base->len = cbb->offset;

lib/libssl/bs_cbb.c

288

cbb->offset = 0;

lib/libssl/bs_cbb.c

299

cbb->offset = cbb->base->len;

lib/libssl/bs_cbb.c

355

cbb->offset = cbb->base->len;

lib/libssl/bytestring.h

375

size_t offset;

lib/libssl/d1_pkt.c

1021

wb->offset = 0;

lib/libssl/ssl_local.h

1080

int offset; /* where to 'copy from' */

lib/libssl/ssl_pkt.c

177

rb->offset = align;

lib/libssl/ssl_pkt.c

181

pkt = rb->buf + rb->offset;

lib/libssl/ssl_pkt.c

192

rb->offset = align;

lib/libssl/ssl_pkt.c

195

s->packet = rb->buf + rb->offset;

lib/libssl/ssl_pkt.c

212

rb->offset += n;

lib/libssl/ssl_pkt.c

227

rb->offset = len + align;

lib/libssl/ssl_pkt.c

230

if (n > (int)(rb->len - rb->offset)) {

lib/libssl/ssl_pkt.c

239

if (max > (int)(rb->len - rb->offset))

lib/libssl/ssl_pkt.c

240

max = rb->len - rb->offset;

lib/libssl/ssl_pkt.c

283

rb->offset += n;

lib/libssl/ssl_pkt.c

555

wb->offset = align;

lib/libssl/ssl_pkt.c

607

i = BIO_write(s->wbio, (char *)&(wb->buf[wb->offset]),

lib/libssl/ssl_pkt.c

615

wb->offset += i;

lib/libssl/ssl_pkt.c

630

wb->offset += i;

lib/libssl/tls13_legacy.c

349

s->s3->rbuf.offset = SSL3_RT_HEADER_LENGTH;

lib/libssl/tls_buffer.c

112

if (buf->offset > buf->len)

lib/libssl/tls_buffer.c

113

buf->offset = buf->len;

lib/libssl/tls_buffer.c

161

if (buf->offset > buf->len)

lib/libssl/tls_buffer.c

164

return buf->len - buf->offset;

lib/libssl/tls_buffer.c

170

if (buf->offset > buf->len)

lib/libssl/tls_buffer.c

173

if (buf->offset == buf->len)

lib/libssl/tls_buffer.c

176

if (n > buf->len - buf->offset)

lib/libssl/tls_buffer.c

177

n = buf->len - buf->offset;

lib/libssl/tls_buffer.c

179

memcpy(rbuf, &buf->data[buf->offset], n);

lib/libssl/tls_buffer.c

181

buf->offset += n;

lib/libssl/tls_buffer.c

189

if (buf->offset > buf->len)

lib/libssl/tls_buffer.c

198

if (buf->offset == buf->len) {

lib/libssl/tls_buffer.c

200

buf->offset = 0;

lib/libssl/tls_buffer.c

202

if (buf->offset >= 4096) {

lib/libssl/tls_buffer.c

203

memmove(buf->data, &buf->data[buf->offset],

lib/libssl/tls_buffer.c

204

buf->len - buf->offset);

lib/libssl/tls_buffer.c

205

buf->len -= buf->offset;

lib/libssl/tls_buffer.c

206

buf->offset = 0;

lib/libssl/tls_buffer.c

234

if (!CBS_skip(&cbs, buf->offset))

lib/libssl/tls_buffer.c

254

buf->offset = 0;

lib/libssl/tls_buffer.c

31

size_t offset;

lib/libssl/tls_buffer.c

65

buf->offset = 0;

lib/libssl/tls_content.c

122

tls_content_set_bounds(struct tls_content *content, size_t offset, size_t len)

lib/libssl/tls_content.c

126

content_len = offset + len;

lib/libssl/tls_content.c

133

return CBS_skip(&content->cbs, offset);

lib/libssl/tls_content.h

41

int tls_content_set_bounds(struct tls_content *content, size_t offset,

lib/libtls/tls_client.c

239

off_t offset;

lib/libtls/tls_client.c

261

offset = 0;

lib/libtls/tls_client.c

269

if ((n = pwrite(sfd, data + offset, len, offset)) == -1) {

lib/libtls/tls_client.c

274

offset += n;

lib/libz/gzlib.c

367

z_off64_t ZEXPORT gzseek64(gzFile file, z_off64_t offset, int whence) {

lib/libz/gzlib.c

389

offset -= state->x.pos;

lib/libz/gzlib.c

391

offset += state->past ? 0 : state->skip;

lib/libz/gzlib.c

397

state->x.pos + offset >= 0) {

lib/libz/gzlib.c

398

ret = LSEEK(state->fd, offset - (z_off64_t)state->x.have, SEEK_CUR);

lib/libz/gzlib.c

407

state->x.pos += offset;

lib/libz/gzlib.c

412

if (offset < 0) {

lib/libz/gzlib.c

415

offset += state->x.pos;

lib/libz/gzlib.c

416

if (offset < 0) /* before start of file! */

lib/libz/gzlib.c

424

n = GT_OFF(state->x.have) || (z_off64_t)state->x.have > offset ?

lib/libz/gzlib.c

425

(unsigned)offset : state->x.have;

lib/libz/gzlib.c

429

offset -= n;

lib/libz/gzlib.c

433

state->skip = offset;

lib/libz/gzlib.c

434

return state->x.pos + offset;

lib/libz/gzlib.c

438

z_off_t ZEXPORT gzseek(gzFile file, z_off_t offset, int whence) {

lib/libz/gzlib.c

441

ret = gzseek64(file, (z_off64_t)offset, whence);

lib/libz/gzlib.c

470

z_off64_t offset;

lib/libz/gzlib.c

481

offset = LSEEK(state->fd, 0, SEEK_CUR);

lib/libz/gzlib.c

482

if (offset == -1)

lib/libz/gzlib.c

485

offset -= state->strm.avail_in; /* don't count buffered input */

lib/libz/gzlib.c

486

return offset;

lib/libz/infback.c

555

state->offset = (unsigned)here.val;

lib/libz/infback.c

561

state->offset += BITS(state->extra);

lib/libz/infback.c

564

if (state->offset > state->wsize - (state->whave < state->wsize ?

lib/libz/infback.c

574

Tracevv((stderr, "inflate: distance %u\n", state->offset));

lib/libz/infback.c

579

copy = state->wsize - state->offset;

lib/libz/infback.c

585

from = put - state->offset;

lib/libz/inflate.c

1069

state->offset = (unsigned)here.val;

lib/libz/inflate.c

1076

state->offset += BITS(state->extra);

lib/libz/inflate.c

1081

if (state->offset > state->dmax) {

lib/libz/inflate.c

1091

Tracevv((stderr, "inflate: distance %u\n", state->offset));

lib/libz/inflate.c

1097

if (state->offset > copy) { /* copy from window */

lib/libz/inflate.c

1098

copy = state->offset - copy;

lib/libz/inflate.c

1133

from = put - state->offset;

lib/libz/inflate.h

106

unsigned offset; /* distance back to copy string from */

libexec/comsat/comsat.c

221

off_t offset;

libexec/comsat/comsat.c

228

offset = strtonum(cp, 0, LLONG_MAX, &errstr);

libexec/comsat/comsat.c

238

notify(utp, offset);

libexec/comsat/comsat.c

245

notify(struct utmp *utp, off_t offset)

libexec/comsat/comsat.c

283

jkfprintf(tp, name, offset);

libexec/comsat/comsat.c

289

jkfprintf(FILE *tp, char name[], off_t offset)

libexec/comsat/comsat.c

300

(void)fseeko(fi, offset, SEEK_SET);

libexec/ld.so/malloc.c

122

u_short offset; /* requested size table offset */

libexec/ld.so/malloc.c

382

u_int i, offset, mask;

libexec/ld.so/malloc.c

394

offset = getrbyte(d);

libexec/ld.so/malloc.c

399

r = &d->free_regions[(i + offset) & mask];

libexec/ld.so/malloc.c

411

offset = i;

libexec/ld.so/malloc.c

418

r = &d->free_regions[(i + offset) & mask];

libexec/ld.so/malloc.c

507

p->offset = 0xdead;

libexec/ld.so/malloc.c

512

p->offset = howmany(p->total, MALLOC_BITS);

libexec/ld.so/malloc.c

686

bp->bits[bp->offset + k] = size;

libexec/ld.so/malloc.c

729

validate_canary(ptr, info->bits[info->offset + chunknum],

libexec/ld.so/resolve.c

783

u_int offset;

libexec/ld.so/resolve.c

788

vaddr_t offset;

libexec/ld.so/resolve.c

804

syscalls[i].offset >= len)

libexec/ld.so/resolve.c

815

offset = exec_base - base;

libexec/ld.so/resolve.c

820

pins[syscalls[i].sysno] = syscalls[i].offset - offset;

libexec/ld.so/resolve.c

822

base += offset;

libexec/ld.so/resolve.c

823

len = len - offset;

libexec/ld.so/sparc64/rtld_machine.c

372

Elf_Addr offset;

libexec/ld.so/sparc64/rtld_machine.c

406

offset = value - ((Elf_Addr)pltaddr);

libexec/ld.so/sparc64/rtld_machine.c

407

if ((int64_t)(offset-4) <= (1L<<20) &&

libexec/ld.so/sparc64/rtld_machine.c

408

(int64_t)(offset-4) >= -(1L<<20)) {

libexec/ld.so/sparc64/rtld_machine.c

424

*where1 = BAA | (((offset-4) >> 2) &0x7ffff);

libexec/ld.so/sparc64/rtld_machine.c

465

} else if ((int64_t)(offset-8) <= (1L<<31) &&

libexec/ld.so/sparc64/rtld_machine.c

466

(int64_t)(offset-8) >= -((1L<<31) - 4)) {

libexec/ld.so/sparc64/rtld_machine.c

483

where2[0] = CALL | (((offset-8) >> 2) & 0x3fffffff);

libexec/ld.so/tib.c

155

Elf_Addr offset;

libexec/ld.so/tib.c

175

offset = 0;

libexec/ld.so/tib.c

192

offset = static_tls_align_offset + sizeof(struct tib) +

libexec/ld.so/tib.c

194

offset = ELF_ROUND(offset, align) - static_tls_align_offset

libexec/ld.so/tib.c

196

static_tls_size = offset + msize;

libexec/ld.so/tib.c

217

offset = static_tls_size;

libexec/ld.so/tib.c

221

return offset;

libexec/ld.so/tib.c

76

#define TLS_ADDR(tibp, offset) ((char *)(tibp) + sizeof(struct tib) + (offset))

libexec/ld.so/tib.c

89

#define TLS_ADDR(tibp, offset) ((char *)(tibp) - (offset))

libexec/snmpd/snmpd_metrics/kroute.c

1323

int offset;

libexec/snmpd/snmpd_metrics/kroute.c

1326

for (offset = 0; offset < len; offset += rtm->rtm_msglen) {

libexec/snmpd/snmpd_metrics/kroute.c

1327

next = buf + offset;

libexec/snmpd/snmpd_metrics/kroute.c

1388

return (offset);

regress/lib/libc/asr/bin/common.c

420

pack->offset = 0;

regress/lib/libc/asr/bin/common.c

426

dname_expand(const unsigned char *data, size_t len, size_t offset,

regress/lib/libc/asr/bin/common.c

432

if (offset >= len)

regress/lib/libc/asr/bin/common.c

436

end = start = offset;

regress/lib/libc/asr/bin/common.c

438

for(; (n = data[offset]); ) {

regress/lib/libc/asr/bin/common.c

440

if (offset + 2 > len)

regress/lib/libc/asr/bin/common.c

442

ptr = 256 * (n & ~0xc0) + data[offset + 1];

regress/lib/libc/asr/bin/common.c

445

if (end < offset + 2)

regress/lib/libc/asr/bin/common.c

446

end = offset + 2;

regress/lib/libc/asr/bin/common.c

447

offset = ptr;

regress/lib/libc/asr/bin/common.c

450

if (offset + n + 1 > len)

regress/lib/libc/asr/bin/common.c

457

memmove(dst, data + offset, count);

regress/lib/libc/asr/bin/common.c

462

offset += n + 1;

regress/lib/libc/asr/bin/common.c

463

if (end < offset)

regress/lib/libc/asr/bin/common.c

464

end = offset;

regress/lib/libc/asr/bin/common.c

466

if (end < offset + 1)

regress/lib/libc/asr/bin/common.c

467

end = offset + 1;

regress/lib/libc/asr/bin/common.c

482

if (p->len - p->offset < len) {

regress/lib/libc/asr/bin/common.c

487

memmove(data, p->data + p->offset, len);

regress/lib/libc/asr/bin/common.c

488

p->offset += len;

regress/lib/libc/asr/bin/common.c

535

e = dname_expand(p->data, p->len, p->offset, &p->offset, dst, max);

regress/lib/libc/asr/bin/common.c

588

if (p->len - p->offset < rdlen) {

regress/lib/libc/asr/bin/common.c

593

save_offset = p->offset;

regress/lib/libc/asr/bin/common.c

637

rr->rr.other.rdata = p->data + p->offset;

regress/lib/libc/asr/bin/common.c

639

p->offset += rdlen;

regress/lib/libc/asr/bin/common.c

646

if (p->offset - save_offset != rdlen)

regress/lib/libc/asr/bin/common.h

73

size_t offset;

regress/lib/libc/asr/bin/res_mkquery.c

172

if (p.offset != len)

regress/lib/libc/asr/bin/res_mkquery.c

173

printf(";; REMAINING GARBAGE %zu\n", len - p.offset);

regress/lib/libc/asr/bin/res_mkquery.c

177

printf(";; ERROR AT OFFSET %zu/%zu: %s\n", p.offset, p.len,

regress/lib/libc/asr/bin/res_query.c

208

if (p.offset != len)

regress/lib/libc/asr/bin/res_query.c

209

printf(";; REMAINING GARBAGE %zu\n", len - p.offset);

regress/lib/libc/asr/bin/res_query.c

213

printf(";; ERROR AT OFFSET %zu/%zu: %s\n", p.offset, p.len,

regress/lib/libc/regex/debug.c

68

register sopno offset = 2;

regress/lib/libc/regex/debug.c

69

# define GAP() { if (offset % 5 == 0) { \

regress/lib/libc/regex/debug.c

79

offset++; \

regress/lib/libcrypto/ecdsa/ecdsatest.c

127

unsigned char dirt, offset;

regress/lib/libcrypto/ecdsa/ecdsatest.c

239

offset = raw_buf[10] % buf_len;

regress/lib/libcrypto/ecdsa/ecdsatest.c

241

raw_buf[offset] ^= dirt;

regress/lib/libcrypto/ecdsa/ecdsatest.c

264

raw_buf[offset] ^= dirt;

regress/lib/libedit/read/test_getcmd.c

94

*ma->macro, ma->offset);

regress/lib/libssl/buffer/buffertest.c

116

rs.offset = 0;

regress/lib/libssl/buffer/buffertest.c

33

size_t offset;

regress/lib/libssl/buffer/buffertest.c

42

if (rs->offset > rs->len)

regress/lib/libssl/buffer/buffertest.c

45

if ((size_t)(n = buflen) > (rs->len - rs->offset))

regress/lib/libssl/buffer/buffertest.c

46

n = rs->len - rs->offset;

regress/lib/libssl/buffer/buffertest.c

51

memcpy(buf, &rs->buf[rs->offset], n);

regress/lib/libssl/buffer/buffertest.c

52

rs->offset += n;

regress/lib/libssl/record/recordtest.c

104

if ((size_t)(n = buflen) > (ws->len - ws->offset))

regress/lib/libssl/record/recordtest.c

105

n = ws->len - ws->offset;

regress/lib/libssl/record/recordtest.c

110

memcpy(&ws->buf[ws->offset], buf, n);

regress/lib/libssl/record/recordtest.c

111

ws->offset += n;

regress/lib/libssl/record/recordtest.c

380

rs.offset = 0;

regress/lib/libssl/record/recordtest.c

474

ws.offset = 0;

regress/lib/libssl/record/recordtest.c

70

size_t offset;

regress/lib/libssl/record/recordtest.c

83

if ((size_t)(n = buflen) > (rs->len - rs->offset))

regress/lib/libssl/record/recordtest.c

84

n = rs->len - rs->offset;

regress/lib/libssl/record/recordtest.c

89

memcpy(buf, &rs->buf[rs->offset], n);

regress/lib/libssl/record/recordtest.c

90

rs->offset += n;

regress/sys/arch/amd64/vmm/vcpu.c

76

uint16_t offset;

regress/sys/arch/amd64/vmm/vcpu.c

81

[VMM_EX_GP] = { .segment = 0x0, .offset = 0x0B5D },

regress/sys/dev/video/videotest.c

505

buffer.m.offset);

regress/sys/fileops/fileops.c

115

c_lseek(off_t offset, int whence)

regress/sys/fileops/fileops.c

117

off_t ret = lseek(fd, offset, whence);

regress/sys/fileops/fileops.c

120

curpos = offset;

regress/sys/fileops/fileops.c

123

curpos += offset;

regress/sys/kern/ptrace/xstate/xstate.c

109

xstate->components[XSTATE_COMPONENT_SSE].offset);

regress/sys/kern/ptrace/xstate/xstate.c

111

xstate->components[XSTATE_COMPONENT_AVX].offset);

regress/sys/kern/ptrace/xstate/xstate.c

121

xstate->components[XSTATE_COMPONENT_SSE].offset);

regress/sys/kern/ptrace/xstate/xstate.c

123

xstate->components[XSTATE_COMPONENT_AVX].offset);

regress/sys/kern/ptrace/xstate/xstate.c

27

uint32_t offset;

regress/sys/kern/ptrace/xstate/xstate.c

88

xstate->components[XSTATE_COMPONENT_SSE].offset = 160;

regress/sys/kern/ptrace/xstate/xstate.c

93

xstate->components[XSTATE_COMPONENT_AVX].offset = leaf.b;

regress/sys/uvm/mmap_4g/mmap_4g.c

24

off_t offset;

regress/sys/uvm/mmap_4g/mmap_4g.c

34

offset = 4LL * 1024LL * 1024LL * 1024LL - sz/2;

regress/sys/uvm/mmap_4g/mmap_4g.c

36

if (lseek(fd, offset, SEEK_SET) != offset)

regress/sys/uvm/mmap_4g/mmap_4g.c

47

fd, offset);

regress/sys/uvm/mmap_4g/mmap_4g.c

66

if (lseek(fd, offset, SEEK_SET) != offset)

regress/sys/uvm/mmap_4g/mmap_4g.c

73

p[i], offset + i);

regress/usr.bin/ssh/modpipe.c

110

if (mods[i].offset < total ||

regress/usr.bin/ssh/modpipe.c

111

mods[i].offset >= total + s)

regress/usr.bin/ssh/modpipe.c

115

buf[mods[i].offset - total] ^= mods[i].m1;

regress/usr.bin/ssh/modpipe.c

118

buf[mods[i].offset - total] &= mods[i].m1;

regress/usr.bin/ssh/modpipe.c

119

buf[mods[i].offset - total] |= mods[i].m2;

regress/usr.bin/ssh/modpipe.c

138

if (mods[i].offset < total)

regress/usr.bin/ssh/modpipe.c

40

unsigned long long offset;

regress/usr.bin/ssh/modpipe.c

52

what, &m->offset, &m1, &m2)) < 3)

sbin/clri/clri.c

115

if (pwrite(fd, sblock, sizeof(sblock), offset) != sizeof(sblock))

sbin/clri/clri.c

127

offset = ino_to_fsba(sbp, inonum); /* inode to fs blk */

sbin/clri/clri.c

128

offset = fsbtodb(sbp, offset); /* fs blk disk blk */

sbin/clri/clri.c

129

offset *= DEV_BSIZE; /* disk blk to bytes */

sbin/clri/clri.c

132

if (pread(fd, ibuf, bsize, offset) != bsize)

sbin/clri/clri.c

154

if (pwrite(fd, ibuf, bsize, offset) != bsize)

sbin/clri/clri.c

70

off_t offset;

sbin/clri/clri.c

88

offset = (off_t)(sblock_try[i]);

sbin/clri/clri.c

89

if (pread(fd, sblock, sizeof(sblock), offset) != sizeof(sblock))

sbin/disklabel/editor.c

1812

u_int64_t maxsize = 0, offset;

sbin/disklabel/editor.c

1816

offset = DL_GETPOFFSET(&lp->d_partitions[partno]);

sbin/disklabel/editor.c

1818

if (offset < chunk->start || offset >= chunk->stop)

sbin/disklabel/editor.c

1820

maxsize = chunk->stop - offset;

sbin/dump/dumprmt.c

229

rmtseek(int offset, int pos)

sbin/dump/dumprmt.c

233

(void)snprintf(line, sizeof(line), "L%d\n%d\n", offset, pos);

sbin/dump/dumprmt.c

79

int rmtseek(int offset, int pos);

sbin/dump/traverse.c

776

off_t offset;

sbin/dump/traverse.c

809

offset = secno * secsize;

sbin/dump/traverse.c

812

if ((cnt = pread(diskfd, bufp, seccount * secsize, offset)) ==

sbin/dump/traverse.c

856

if ((cnt = pread(diskfd, mybufp, secsize, offset + i)) ==

sbin/dump/traverse.c

862

(long long)(offset + i) / DEV_BSIZE, secsize);

sbin/dump/traverse.c

866

"got=%d\n", disk, (long long)(offset + i) / DEV_BSIZE,

sbin/fsck_ext2fs/utilities.c

286

off_t offset;

sbin/fsck_ext2fs/utilities.c

288

offset = blk;

sbin/fsck_ext2fs/utilities.c

289

offset *= DEV_BSIZE;

sbin/fsck_ext2fs/utilities.c

290

if (pread(fd, buf, size, offset) == size)

sbin/fsck_ext2fs/utilities.c

297

if (pread(fd, cp, secsize, offset + i) != secsize) {

sbin/fsck_ext2fs/utilities.c

300

(long long)(offset + i) / secsize,

sbin/fsck_ext2fs/utilities.c

317

off_t offset;

sbin/fsck_ext2fs/utilities.c

321

offset = blk;

sbin/fsck_ext2fs/utilities.c

322

offset *= DEV_BSIZE;

sbin/fsck_ext2fs/utilities.c

323

if (pwrite(fd, buf, size, offset) == size) {

sbin/fsck_ext2fs/utilities.c

330

if (pwrite(fd, cp, secsize, offset + i) != secsize) {

sbin/fsck_ext2fs/utilities.c

333

(long long)(offset + i) / secsize,

sbin/fsck_ffs/inode.c

61

long ret, ndb, offset;

sbin/fsck_ffs/inode.c

82

if (--ndb == 0 && (offset = blkoff(&sblock,

sbin/fsck_ffs/inode.c

85

numfrags(&sblock, fragroundup(&sblock, offset));

sbin/fsck_ffs/utilities.c

381

off_t offset;

sbin/fsck_ffs/utilities.c

383

offset = blk;

sbin/fsck_ffs/utilities.c

384

offset *= DEV_BSIZE;

sbin/fsck_ffs/utilities.c

385

if (pread(fd, buf, size, offset) == size)

sbin/fsck_ffs/utilities.c

392

if (pread(fd, cp, secsize, offset + i) != secsize) {

sbin/fsck_ffs/utilities.c

395

(long long)(offset + i) / secsize,

sbin/fsck_ffs/utilities.c

412

off_t offset;

sbin/fsck_ffs/utilities.c

416

offset = blk;

sbin/fsck_ffs/utilities.c

417

offset *= DEV_BSIZE;

sbin/fsck_ffs/utilities.c

418

if (pwrite(fd, buf, size, offset) == size) {

sbin/fsck_ffs/utilities.c

425

if (pwrite(fd, cp, secsize, offset + i) != secsize) {

sbin/fsck_ffs/utilities.c

428

(long long)(offset + i) / secsize,

sbin/iked/config.c

853

off_t offset = 0;

sbin/iked/config.c

864

offset += sizeof(*pol);

sbin/iked/config.c

873

memcpy(&pp, buf + offset, sizeof(pp));

sbin/iked/config.c

874

offset += sizeof(pp);

sbin/iked/config.c

881

memcpy(&xf, buf + offset, sizeof(xf));

sbin/iked/config.c

882

offset += sizeof(xf);

sbin/iked/config.c

911

off_t offset = 0;

sbin/iked/config.c

919

offset += sizeof(id);

sbin/iked/config.c

933

memcpy(flow, buf + offset, sizeof(*flow));

sbin/iked/ikev2_msg.c

823

size_t max_len, left, offset=0;

sbin/iked/ikev2_msg.c

882

data = ibuf_seek(in, offset, 0);

sbin/iked/ikev2_msg.c

919

offset += MINIMUM(left, max_len);

sbin/iked/ikev2_pld.c

1000

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

1006

buf = msgbuf + offset;

sbin/iked/ikev2_pld.c

1032

ikev2_validate_notify(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

1042

memcpy(n, msgbuf + offset, sizeof(*n));

sbin/iked/ikev2_pld.c

1049

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

105

struct iked_message *msg, size_t offset, size_t left);

sbin/iked/ikev2_pld.c

1060

if (ikev2_validate_notify(msg, offset, left, &n))

sbin/iked/ikev2_pld.c

1070

if ((buf = ibuf_seek(msg->msg_data, offset + sizeof(n), left)) == NULL)

sbin/iked/ikev2_pld.c

119

struct iked_message *msg, size_t offset)

sbin/iked/ikev2_pld.c

1386

ikev2_validate_delete(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

139

offset += sizeof(*hdr);

sbin/iked/ikev2_pld.c

1396

memcpy(del, msgbuf + offset, sizeof(*del));

sbin/iked/ikev2_pld.c

1408

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

141

return (ikev2_pld_payloads(env, msg, offset,

sbin/iked/ikev2_pld.c

1414

if (ikev2_validate_delete(msg, offset, left, &del))

sbin/iked/ikev2_pld.c

1438

buf = msgbuf + offset + sizeof(del);

sbin/iked/ikev2_pld.c

1457

ikev2_validate_tss(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

146

ikev2_validate_pld(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

1467

memcpy(tsp, msgbuf + offset, sizeof(*tsp));

sbin/iked/ikev2_pld.c

1474

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

1480

if (ikev2_validate_tss(msg, offset, left, &tsp))

sbin/iked/ikev2_pld.c

1483

offset += sizeof(tsp);

sbin/iked/ikev2_pld.c

1490

if (ikev2_validate_ts(msg, offset, left, &ts))

sbin/iked/ikev2_pld.c

1500

offset += sizeof(ts);

sbin/iked/ikev2_pld.c

1504

if (ikev2_pld_ts(env, pld, msg, offset, ts_len, ts.ts_type))

sbin/iked/ikev2_pld.c

1507

offset += ts_len;

sbin/iked/ikev2_pld.c

1515

ikev2_validate_ts(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

1526

memcpy(ts, msgbuf + offset, sizeof(*ts));

sbin/iked/ikev2_pld.c

1545

struct iked_message *msg, size_t offset, size_t left, unsigned int type)

sbin/iked/ikev2_pld.c

1552

ptr = msgbuf + offset;

sbin/iked/ikev2_pld.c

158

memcpy(pld, msgbuf + offset, sizeof(*pld));

sbin/iked/ikev2_pld.c

1617

ikev2_validate_ef(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

1627

memcpy(frag, msgbuf + offset, sizeof(*frag));

sbin/iked/ikev2_pld.c

1634

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

1649

if (ikev2_validate_ef(msg, offset, left, &frag) != 0)

sbin/iked/ikev2_pld.c

1655

offset += sizeof(frag);

sbin/iked/ikev2_pld.c

1656

buf = msgbuf + offset;

sbin/iked/ikev2_pld.c

1768

size_t offset;

sbin/iked/ikev2_pld.c

1781

offset = 0;

sbin/iked/ikev2_pld.c

1785

ptr = ibuf_seek(e, offset, el->frag_size);

sbin/iked/ikev2_pld.c

1791

offset += el->frag_size;

sbin/iked/ikev2_pld.c

1828

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

1845

buf = msgbuf + offset;

sbin/iked/ikev2_pld.c

187

size_t offset, size_t length, unsigned int payload)

sbin/iked/ikev2_pld.c

1882

ikev2_validate_cp(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

1892

memcpy(cp, msgbuf + offset, sizeof(*cp));

sbin/iked/ikev2_pld.c

1899

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

1911

if (ikev2_validate_cp(msg, offset, left, &cp))

sbin/iked/ikev2_pld.c

1914

ptr = msgbuf + offset + sizeof(cp);

sbin/iked/ikev2_pld.c

199

total = length - offset;

sbin/iked/ikev2_pld.c

201

while (payload != 0 && offset < length) {

sbin/iked/ikev2_pld.c

202

if (ikev2_validate_pld(msg, offset, total, &pld))

sbin/iked/ikev2_pld.c

2072

ikev2_validate_eap(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

2082

memcpy(hdr, msgbuf + offset, sizeof(*hdr));

sbin/iked/ikev2_pld.c

2089

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

2096

if (ikev2_validate_eap(msg, offset, left, &hdr))

sbin/iked/ikev2_pld.c

2112

if ((eap = ibuf_seek(msg->msg_data, offset, eap_len)) == NULL) {

sbin/iked/ikev2_pld.c

214

offset += sizeof(pld);

sbin/iked/ikev2_pld.c

2142

struct iked_message *msg, size_t offset)

sbin/iked/ikev2_pld.c

2172

offset += sizeof(*hdr);

sbin/iked/ikev2_pld.c

2175

total = length - offset;

sbin/iked/ikev2_pld.c

2179

while (payload != 0 && offset < length) {

sbin/iked/ikev2_pld.c

2180

if (ikev2_validate_pld(msg, offset, total, &pld))

sbin/iked/ikev2_pld.c

2192

offset += sizeof(pld);

sbin/iked/ikev2_pld.c

2199

buf = msgbuf + offset;

sbin/iked/ikev2_pld.c

2208

offset += left;

sbin/iked/ikev2_pld.c

222

ret = ikev2_pld_sa(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

226

ret = ikev2_pld_ke(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

230

ret = ikev2_pld_id(env, &pld, msg, offset, left,

sbin/iked/ikev2_pld.c

234

ret = ikev2_pld_cert(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

238

ret = ikev2_pld_certreq(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

241

ret = ikev2_pld_auth(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

245

ret = ikev2_pld_nonce(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

249

ret = ikev2_pld_notify(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

252

ret = ikev2_pld_delete(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

256

ret = ikev2_pld_tss(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

259

ret = ikev2_pld_e(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

262

ret = ikev2_pld_ef(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

265

ret = ikev2_pld_cp(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

268

ret = ikev2_pld_eap(env, &pld, msg, offset, left);

sbin/iked/ikev2_pld.c

271

print_hex(msgbuf, offset,

sbin/iked/ikev2_pld.c

287

offset += left;

sbin/iked/ikev2_pld.c

295

ikev2_validate_sa(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

306

memcpy(sap, msgbuf + offset, sizeof(*sap));

sbin/iked/ikev2_pld.c

344

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

356

if (ikev2_validate_sa(msg, offset, left, &sap))

sbin/iked/ikev2_pld.c

364

offset += sizeof(sap);

sbin/iked/ikev2_pld.c

382

memcpy(&spi32, msgbuf + offset, 4);

sbin/iked/ikev2_pld.c

386

memcpy(&spi64, msgbuf + offset, 8);

sbin/iked/ikev2_pld.c

395

offset += sap.sap_spisize;

sbin/iked/ikev2_pld.c

438

r = ikev2_pld_xform(env, msg, offset, total);

sbin/iked/ikev2_pld.c

453

offset += total;

sbin/iked/ikev2_pld.c

461

ikev2_validate_xform(struct iked_message *msg, size_t offset, size_t total,

sbin/iked/ikev2_pld.c

472

memcpy(xfrm, msgbuf + offset, sizeof(*xfrm));

sbin/iked/ikev2_pld.c

491

size_t offset, size_t total)

sbin/iked/ikev2_pld.c

499

if (ikev2_validate_xform(msg, offset, total, &xfrm))

sbin/iked/ikev2_pld.c

540

if (ikev2_pld_attr(env, &xfrm, msg, offset + sizeof(xfrm),

sbin/iked/ikev2_pld.c

562

offset += xfrm_length;

sbin/iked/ikev2_pld.c

565

ret = ikev2_pld_xform(env, msg, offset, total);

sbin/iked/ikev2_pld.c

577

ikev2_validate_attr(struct iked_message *msg, size_t offset, size_t total,

sbin/iked/ikev2_pld.c

587

memcpy(attr, msgbuf + offset, sizeof(*attr));

sbin/iked/ikev2_pld.c

594

struct iked_message *msg, size_t offset, size_t total)

sbin/iked/ikev2_pld.c

602

if (ikev2_validate_attr(msg, offset, total, &attr))

sbin/iked/ikev2_pld.c

613

offset += sizeof(attr);

sbin/iked/ikev2_pld.c

633

print_hex(msgbuf, offset + sizeof(attr),

sbin/iked/ikev2_pld.c

635

offset += attr_length;

sbin/iked/ikev2_pld.c

641

ret = ikev2_pld_attr(env, xfrm, msg, offset, total);

sbin/iked/ikev2_pld.c

648

ikev2_validate_ke(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

658

memcpy(kex, msgbuf + offset, sizeof(*kex));

sbin/iked/ikev2_pld.c

665

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

672

if (ikev2_validate_ke(msg, offset, left, &kex))

sbin/iked/ikev2_pld.c

679

buf = msgbuf + offset + sizeof(kex);

sbin/iked/ikev2_pld.c

705

ikev2_validate_id(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

715

memcpy(id, msgbuf + offset, sizeof(*id));

sbin/iked/ikev2_pld.c

728

struct iked_message *msg, size_t offset, size_t left, unsigned int payload)

sbin/iked/ikev2_pld.c

738

if (ikev2_validate_id(msg, offset, left, &id))

sbin/iked/ikev2_pld.c

744

ptr = msgbuf + offset;

sbin/iked/ikev2_pld.c

790

ikev2_validate_cert(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

800

memcpy(cert, msgbuf + offset, sizeof(*cert));

sbin/iked/ikev2_pld.c

811

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

821

if (ikev2_validate_cert(msg, offset, left, &cert))

sbin/iked/ikev2_pld.c

823

offset += sizeof(cert);

sbin/iked/ikev2_pld.c

825

buf = msgbuf + offset;

sbin/iked/ikev2_pld.c

869

ikev2_validate_certreq(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

879

memcpy(cert, msgbuf + offset, sizeof(*cert));

sbin/iked/ikev2_pld.c

886

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

894

if (ikev2_validate_certreq(msg, offset, left, &cert))

sbin/iked/ikev2_pld.c

896

offset += sizeof(cert);

sbin/iked/ikev2_pld.c

898

buf = msgbuf + offset;

sbin/iked/ikev2_pld.c

937

ikev2_validate_auth(struct iked_message *msg, size_t offset, size_t left,

sbin/iked/ikev2_pld.c

947

memcpy(auth, msgbuf + offset, sizeof(*auth));

sbin/iked/ikev2_pld.c

960

struct iked_message *msg, size_t offset, size_t left)

sbin/iked/ikev2_pld.c

968

if (ikev2_validate_auth(msg, offset, left, &auth))

sbin/iked/ikev2_pld.c

970

offset += sizeof(auth);

sbin/iked/ikev2_pld.c

972

buf = msgbuf + offset;

sbin/iked/util.c

469

print_hex(const uint8_t *buf, off_t offset, size_t length)

sbin/iked/util.c

483

print_debug("%02x", buf[offset + i]);

sbin/iked/util.c

489

print_hexval(const uint8_t *buf, off_t offset, size_t length)

sbin/iked/util.c

498

print_debug("%02x", buf[offset + i]);

sbin/isakmpd/dpd.c

200

dpd_timer_interval(u_int32_t offset)

sbin/isakmpd/dpd.c

212

v -= offset;

sbin/isakmpd/field.c

180

value = decode_field[(int) f->type] (buf + f->offset, f->len, f->maps);

sbin/isakmpd/field.c

203

if (extract_val(buf + f->offset, f->len, &val))

sbin/isakmpd/field.c

214

buf[f->offset] = val;

sbin/isakmpd/field.c

217

encode_16(buf + f->offset, val);

sbin/isakmpd/field.c

220

encode_32(buf + f->offset, val);

sbin/isakmpd/field.c

229

memcpy(val, buf + f->offset, f->len);

sbin/isakmpd/field.c

236

memcpy(buf + f->offset, val, f->len);

sbin/isakmpd/field.h

39

int offset;

sbin/isakmpd/message.c

2452

message_copy(struct message *msg, size_t offset, size_t *szp)

sbin/isakmpd/message.c

2462

if (sz <= offset)

sbin/isakmpd/message.c

2465

start = offset - (sz - msg->iov[i].iov_len);

sbin/isakmpd/message.c

2469

*szp = sz - offset;

sbin/ncheck_ffs/ncheck_ffs.c

272

off_t offset;

sbin/ncheck_ffs/ncheck_ffs.c

276

offset = blkno * DEV_BSIZE;

sbin/ncheck_ffs/ncheck_ffs.c

279

if ((cnt = pread(diskfd, buf, size, offset)) == size)

sbin/ncheck_ffs/ncheck_ffs.c

310

if ((cnt = pread(diskfd, buf, secsize, offset + i)) ==

sbin/ncheck_ffs/ncheck_ffs.c

316

(long long)(offset + i) / DEV_BSIZE, secsize);

sbin/ncheck_ffs/ncheck_ffs.c

320

"got=%d", disk, (long long)(offset + i) / DEV_BSIZE,

sbin/newfs_ext2fs/mke2fs.c

1365

off_t offset;

sbin/newfs_ext2fs/mke2fs.c

1367

offset = bno;

sbin/newfs_ext2fs/mke2fs.c

1368

n = pread(fd, bf, size, offset * sectorsize);

sbin/newfs_ext2fs/mke2fs.c

1381

off_t offset;

sbin/newfs_ext2fs/mke2fs.c

1385

offset = bno;

sbin/newfs_ext2fs/mke2fs.c

1386

n = pwrite(fd, bf, size, offset * sectorsize);

sbin/newfs_ext2fs/mke2fs.c

762

uint32_t offset;

sbin/newfs_ext2fs/mke2fs.c

773

{.offset = ~0U},

sbin/newfs_ext2fs/mke2fs.c

813

v = oldfs[fsm->offset];

sbin/newfs_ext2fs/mke2fs.c

820

oldfs[fsm->offset] = 0;

sbin/pflogd/pflogd.c

516

off_t offset;

sbin/pflogd/pflogd.c

522

offset = ftello(f);

sbin/pflogd/pflogd.c

523

if (offset == (off_t)-1) {

sbin/pflogd/pflogd.c

534

ftruncate(fileno(f), offset);

sbin/route/route.c

2187

size_t srclen, offset;

sbin/route/route.c

2193

offset = offsetof(struct sockaddr_rtdns, sr_dns);

sbin/route/route.c

2194

if (rtdns->sr_len < offset) {

sbin/route/route.c

2196

offset);

sbin/route/route.c

2199

srclen = rtdns->sr_len - offset;

sbin/route/route.c

2251

size_t srclen, offset;

sbin/route/route.c

2259

offset = offsetof(struct sockaddr_rtstatic, sr_static);

sbin/route/route.c

2260

if (rtstatic->sr_len <= offset) {

sbin/route/route.c

2262

offset);

sbin/route/route.c

2265

srclen = rtstatic->sr_len - offset;

sbin/route/route.c

2339

size_t srclen, offset;

sbin/route/route.c

2341

offset = offsetof(struct sockaddr_rtsearch, sr_search);

sbin/route/route.c

2342

if (rtsearch->sr_len <= offset) {

sbin/route/route.c

2344

offset);

sbin/route/route.c

2347

srclen = rtsearch->sr_len - offset;

sbin/shutdown/shutdown.c

223

if (offset > 0) {

sbin/shutdown/shutdown.c

224

shuttime = time(NULL) + offset;

sbin/shutdown/shutdown.c

265

if (offset > tlist[i + 1].timeleft) {

sbin/shutdown/shutdown.c

266

tlist[i].timeleft = offset;

sbin/shutdown/shutdown.c

267

tlist[i].timetowait = offset - tlist[i + 1].timeleft;

sbin/shutdown/shutdown.c

277

if (offset > TEN_HOURS ||

sbin/shutdown/shutdown.c

278

(offset > 0 && tlist[i].timetowait < tlist[i+1].timetowait / 5))

sbin/shutdown/shutdown.c

505

offset = 0;

sbin/shutdown/shutdown.c

513

offset = minutes * 60;

sbin/shutdown/shutdown.c

570

if ((offset = shuttime - now) < 0) {

sbin/shutdown/shutdown.c

89

static time_t offset, shuttime;

sbin/unwind/libunbound/dns64/dns64.c

199

extract_ipv4(const uint8_t ipv6[], size_t ipv6_len, const int offset)

sbin/unwind/libunbound/dns64/dns64.c

204

log_assert(offset == 32 || offset == 40 || offset == 48 || offset == 56 ||

sbin/unwind/libunbound/dns64/dns64.c

205

offset == 64 || offset == 96);

sbin/unwind/libunbound/dns64/dns64.c

206

for(i = 0, pos = offset / 8; i < 4; i++, pos++) {

sbin/unwind/libunbound/iterator/iter_scrub.c

114

size_t offset = 0;

sbin/unwind/libunbound/iterator/iter_scrub.c

121

offset = 0;

sbin/unwind/libunbound/iterator/iter_scrub.c

125

offset = 2;

sbin/unwind/libunbound/iterator/iter_scrub.c

128

offset = 6;

sbin/unwind/libunbound/iterator/iter_scrub.c

137

if(len < offset+1)

sbin/unwind/libunbound/iterator/iter_scrub.c

139

*nm = rr->ttl_data+sizeof(uint32_t)+sizeof(uint16_t)+offset;

sbin/unwind/libunbound/services/authzone.c

2540

struct dns_msg* msg, struct auth_rrset* rrset, size_t offset)

sbin/unwind/libunbound/services/authzone.c

2549

if(d->rr_len[i] < 2+offset)

sbin/unwind/libunbound/services/authzone.c

2551

if(!(dlen = dname_valid(d->rr_data[i]+2+offset,

sbin/unwind/libunbound/services/authzone.c

2552

d->rr_len[i]-2-offset)))

sbin/unwind/libunbound/services/authzone.c

2554

domain = az_find_name(z, d->rr_data[i]+2+offset, dlen);

sbin/unwind/libunbound/services/listen_dnsport.c

4367

int64_t stream_id, uint64_t offset, const uint8_t* data,

sbin/unwind/libunbound/services/listen_dnsport.c

4374

"datalen %d%s%s", (int)stream_id, (int)offset, (int)datalen,

sbin/unwind/libunbound/services/listen_dnsport.c

4466

int64_t stream_id, uint64_t offset, uint64_t datalen, void* user_data,

sbin/unwind/libunbound/services/listen_dnsport.c

4472

"datalen %d", (int)stream_id, (int)offset, (int)datalen);

sbin/unwind/libunbound/services/listen_dnsport.c

4483

if(offset+datalen >= stream->outlen) {

sbin/unwind/libunbound/sldns/keyraw.c

206

uint16_t offset;

sbin/unwind/libunbound/sldns/keyraw.c

212

offset = 1;

sbin/unwind/libunbound/sldns/keyraw.c

220

*q = BN_bin2bn(key+offset, SHA_DIGEST_LENGTH, NULL);

sbin/unwind/libunbound/sldns/keyraw.c

221

offset += SHA_DIGEST_LENGTH;

sbin/unwind/libunbound/sldns/keyraw.c

223

*p = BN_bin2bn(key+offset, (int)length, NULL);

sbin/unwind/libunbound/sldns/keyraw.c

224

offset += length;

sbin/unwind/libunbound/sldns/keyraw.c

226

*g = BN_bin2bn(key+offset, (int)length, NULL);

sbin/unwind/libunbound/sldns/keyraw.c

227

offset += length;

sbin/unwind/libunbound/sldns/keyraw.c

229

*y = BN_bin2bn(key+offset, (int)length, NULL);

sbin/unwind/libunbound/sldns/keyraw.c

381

uint16_t offset;

sbin/unwind/libunbound/sldns/keyraw.c

392

offset = 3;

sbin/unwind/libunbound/sldns/keyraw.c

395

offset = 1;

sbin/unwind/libunbound/sldns/keyraw.c

399

if(len < (size_t)offset + exp + 1)

sbin/unwind/libunbound/sldns/keyraw.c

405

(void) BN_bin2bn(key+offset, (int)exp, *e);

sbin/unwind/libunbound/sldns/keyraw.c

406

offset += exp;

sbin/unwind/libunbound/sldns/keyraw.c

415

(void) BN_bin2bn(key+offset, (int)(len - offset), *n);

sbin/unwind/libunbound/sldns/parseutil.c

170

int32_t offset = (int32_t)((uint32_t) time - (uint32_t) now);

sbin/unwind/libunbound/sldns/parseutil.c

171

return (int64_t) now + offset;

sbin/unwind/libunbound/util/configlexer.c

6634

yy_size_t offset = (yy_c_buf_p) - (yytext_ptr);

sbin/unwind/libunbound/util/configlexer.c

6670

(yy_c_buf_p) = (yytext_ptr) + offset;

sbin/unwind/libunbound/util/data/msgencode.c

182

compress_tree_newnode(uint8_t* dname, int labs, size_t offset,

sbin/unwind/libunbound/util/data/msgencode.c

193

n->offset = offset;

sbin/unwind/libunbound/util/data/msgencode.c

210

compress_tree_store(uint8_t* dname, int labs, size_t offset,

sbin/unwind/libunbound/util/data/msgencode.c

222

if(offset > PTR_MAX_OFFSET) {

sbin/unwind/libunbound/util/data/msgencode.c

226

if(!(newnode = compress_tree_newnode(dname, labs, offset,

sbin/unwind/libunbound/util/data/msgencode.c

242

offset += lablen+1;

sbin/unwind/libunbound/util/data/msgencode.c

284

ptr = PTR_CREATE(p->offset);

sbin/unwind/libunbound/util/data/msgencode.c

306

*owner_ptr = htons(PTR_CREATE(p->offset));

sbin/unwind/libunbound/util/data/msgencode.c

94

size_t offset;

sbin/unwind/libunbound/util/data/msgparse.h

213

#define PTR_CREATE(offset) ((uint16_t)(0xc000 | (offset)))

sbin/unwind/libunbound/validator/val_secalgo.c

1122

uint16_t offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1132

offset = 1;

sbin/unwind/libunbound/validator/val_secalgo.c

1140

Q.data = key+offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1142

offset += SHA1_LENGTH;

sbin/unwind/libunbound/validator/val_secalgo.c

1144

P.data = key+offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1146

offset += length;

sbin/unwind/libunbound/validator/val_secalgo.c

1148

G.data = key+offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1150

offset += length;

sbin/unwind/libunbound/validator/val_secalgo.c

1152

Y.data = key+offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1154

offset += length;

sbin/unwind/libunbound/validator/val_secalgo.c

1183

uint16_t offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1195

offset = 3;

sbin/unwind/libunbound/validator/val_secalgo.c

1198

offset = 1;

sbin/unwind/libunbound/validator/val_secalgo.c

1202

if(len < (size_t)offset + exp + 1)

sbin/unwind/libunbound/validator/val_secalgo.c

1205

exponent.data = key+offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1207

offset += exp;

sbin/unwind/libunbound/validator/val_secalgo.c

1208

modulus.data = key+offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1209

modulus.len = (len - offset);

sbin/unwind/libunbound/validator/val_secalgo.c

1761

size_t offset;

sbin/unwind/libunbound/validator/val_secalgo.c

1819

offset = 1;

sbin/unwind/libunbound/validator/val_secalgo.c

1820

nettle_mpz_set_str_256_u(pubkey.q, 20, key+offset);

sbin/unwind/libunbound/validator/val_secalgo.c

1821

offset += 20;

sbin/unwind/libunbound/validator/val_secalgo.c

1822

nettle_mpz_set_str_256_u(pubkey.p, (64 + key_t_value*8), key+offset);

sbin/unwind/libunbound/validator/val_secalgo.c

1823

offset += (64 + key_t_value*8);

sbin/unwind/libunbound/validator/val_secalgo.c

1824

nettle_mpz_set_str_256_u(pubkey.g, (64 + key_t_value*8), key+offset);

sbin/unwind/libunbound/validator/val_secalgo.c

1825

offset += (64 + key_t_value*8);

sbin/unwind/libunbound/validator/val_secalgo.c

1826

nettle_mpz_set_str_256_u(pubkey.y, (64 + key_t_value*8), key+offset);

sys/arch/alpha/alpha/db_interface.c

450

db_expr_t offset;

sys/arch/alpha/alpha/db_interface.c

452

db_find_sym_and_offset(addr, &name, &offset);

sys/arch/alpha/alpha/db_trace.c

176

db_expr_t offset;

sys/arch/alpha/alpha/db_trace.c

199

db_find_sym_and_offset(pc, &name, &offset);

sys/arch/alpha/alpha/db_trace.c

204

offset = 65536;

sys/arch/alpha/alpha/db_trace.c

210

for (i = sizeof (int); i <= offset; i += sizeof (int)) {

sys/arch/alpha/alpha/in_cksum.c

100

if ((offset = 3 & (long) lw) != 0) {

sys/arch/alpha/alpha/in_cksum.c

101

const u_int32_t *masks = in_masks + (offset << 2);

sys/arch/alpha/alpha/in_cksum.c

102

lw = (u_int32_t *) (((long) lw) - offset);

sys/arch/alpha/alpha/in_cksum.c

104

len -= 4 - offset;

sys/arch/alpha/alpha/in_cksum.c

114

offset = 32 - (0x1f & (long) lw);

sys/arch/alpha/alpha/in_cksum.c

115

if (offset < 32 && len > offset) {

sys/arch/alpha/alpha/in_cksum.c

116

len -= offset;

sys/arch/alpha/alpha/in_cksum.c

117

if (4 & offset) {

sys/arch/alpha/alpha/in_cksum.c

121

if (8 & offset) {

sys/arch/alpha/alpha/in_cksum.c

125

if (16 & offset) {

sys/arch/alpha/alpha/in_cksum.c

91

int offset;

sys/arch/alpha/dev/bus_dma.c

404

_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/alpha/eisa/eisa_machdep.c

334

u_int32_t offset;

sys/arch/alpha/eisa/eisa_machdep.c

383

eisa_read_config_word(cfgaddr, &offset);

sys/arch/alpha/eisa/eisa_machdep.c

384

cfgaddr += sizeof(offset) * eisa_config_stride;

sys/arch/alpha/eisa/eisa_machdep.c

386

if (offset != 0 && offset != 0xffffffff) {

sys/arch/alpha/eisa/eisa_machdep.c

389

i, offset, eisaid);

sys/arch/alpha/eisa/eisa_machdep.c

397

ecud->ecud_offset = offset;

sys/arch/alpha/include/loadfile_machdep.h

39

#define LOADADDR(a) (((u_long)(a)) + offset)

sys/arch/alpha/isa/isadma_bounce.c

383

isadma_bounce_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/alpha/isa/isadma_bounce.c

397

if (offset >= map->dm_mapsize)

sys/arch/alpha/isa/isadma_bounce.c

399

if (len == 0 || (offset + len) > map->dm_mapsize)

sys/arch/alpha/isa/isadma_bounce.c

423

memcpy((char *)cookie->id_bouncebuf + offset,

sys/arch/alpha/isa/isadma_bounce.c

424

(char *)cookie->id_origbuf + offset, len);

sys/arch/alpha/isa/isadma_bounce.c

431

memcpy((char *)cookie->id_origbuf + offset,

sys/arch/alpha/isa/isadma_bounce.c

432

(char *)cookie->id_bouncebuf + offset, len);

sys/arch/alpha/isa/isadma_bounce.c

453

m_copydata(m0, offset, len,

sys/arch/alpha/isa/isadma_bounce.c

454

(char *)cookie->id_bouncebuf + offset);

sys/arch/alpha/isa/isadma_bounce.c

461

for (moff = offset, m = m0; m != NULL && len != 0;

sys/arch/alpha/isa/isadma_bounce.c

478

(char *)cookie->id_bouncebuf + offset,

sys/arch/alpha/isa/isadma_bounce.c

483

offset += minlen;

sys/arch/alpha/pci/apecs_pci.c

108

apecs_conf_read(void *cpv, pcitag_t tag, int offset)

sys/arch/alpha/pci/apecs_pci.c

130

(offset & ~0x03) << 5 | /* XXX */

sys/arch/alpha/pci/apecs_pci.c

153

apecs_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)

sys/arch/alpha/pci/apecs_pci.c

175

(offset & ~0x03) << 5 | /* XXX */

sys/arch/alpha/pci/cia_pci.c

106

cia_conf_read(void *cpv, pcitag_t tag, int offset)

sys/arch/alpha/pci/cia_pci.c

151

tag | (offset & ~0x03));

sys/arch/alpha/pci/cia_pci.c

155

tag | (offset & ~0x03));

sys/arch/alpha/pci/cia_pci.c

160

(offset & ~0x03) << 5 | /* XXX */

sys/arch/alpha/pci/cia_pci.c

201

cia_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)

sys/arch/alpha/pci/cia_pci.c

231

tag | (offset & ~0x03));

sys/arch/alpha/pci/cia_pci.c

235

tag | (offset & ~0x03));

sys/arch/alpha/pci/cia_pci.c

240

(offset & ~0x03) << 5 | /* XXX */

sys/arch/alpha/pci/irongate_pci.c

122

irongate_conf_read(void *ipv, pcitag_t tag, int offset)

sys/arch/alpha/pci/irongate_pci.c

137

return (irongate_conf_read0(ipv, tag, offset));

sys/arch/alpha/pci/irongate_pci.c

141

irongate_conf_read0(void *ipv, pcitag_t tag, int offset)

sys/arch/alpha/pci/irongate_pci.c

147

REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));

sys/arch/alpha/pci/irongate_pci.c

158

irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data)

sys/arch/alpha/pci/irongate_pci.c

163

REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));

sys/arch/alpha/pci/lca_pci.c

111

lca_conf_read(void *cpv, pcitag_t tag, int offset)

sys/arch/alpha/pci/lca_pci.c

142

(offset & ~0x03) << 5 | /* XXX */

sys/arch/alpha/pci/lca_pci.c

171

lca_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)

sys/arch/alpha/pci/lca_pci.c

198

(offset & ~0x03) << 5 | /* XXX */

sys/arch/alpha/pci/mcpcia_pci.c

108

mcpcia_conf_read(void *cpv, pcitag_t tag, int offset)

sys/arch/alpha/pci/mcpcia_pci.c

125

paddr |= ((unsigned long) ((offset >> 2) << 7));

sys/arch/alpha/pci/mcpcia_pci.c

136

mcpcia_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)

sys/arch/alpha/pci/mcpcia_pci.c

153

paddr |= ((unsigned long) ((offset >> 2) << 7));

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

344

__C(CHIP,_io_subregion)(void *v, bus_space_handle_t ioh, bus_size_t offset,

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

348

*nioh = ioh + offset;

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

347

__C(CHIP,_mem_subregion)(void *v, bus_space_handle_t memh, bus_size_t offset,

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

351

*nmemh = memh + offset;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

427

__C(CHIP,_io_subregion)(void *v, bus_space_handle_t ioh, bus_size_t offset,

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

431

*nioh = ioh + offset;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

480

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

485

offset = tmpioh & 3;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

488

rval = ((val) >> (8 * offset)) & 0xff;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

499

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

504

offset = tmpioh & 3;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

507

rval = ((val) >> (8 * offset)) & 0xffff;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

518

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

523

offset = tmpioh & 3;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

527

rval = ((val) >> (8 * offset)) & 0xffffffff;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

582

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

585

offset = tmpioh & 3;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

586

nval = val << (8 * offset);

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

598

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

601

offset = tmpioh & 3;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

602

nval = val << (8 * offset);

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

614

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

617

offset = tmpioh & 3;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

653

__C(CHIP,_mem_subregion)(void *v, bus_space_handle_t memh, bus_size_t offset,

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

657

*nmemh = memh + offset;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

709

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

717

offset = tmpmemh & 3;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

720

rval = ((val) >> (8 * offset)) & 0xff;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

731

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

739

offset = tmpmemh & 3;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

742

rval = ((val) >> (8 * offset)) & 0xffff;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

753

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

761

offset = tmpmemh & 3;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

765

rval = ((val) >> (8 * offset)) & 0xffffffff;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

825

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

831

offset = tmpmemh & 3;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

832

nval = val << (8 * offset);

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

845

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

851

offset = tmpmemh & 3;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

852

nval = val << (8 * offset);

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

865

register int offset;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

871

offset = tmpmemh & 3;

sys/arch/alpha/pci/tsp_pci.c

117

tsp_conf_read(void *cpv, pcitag_t tag, int offset)

sys/arch/alpha/pci/tsp_pci.c

122

datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));

sys/arch/alpha/pci/tsp_pci.c

130

tsp_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)

sys/arch/alpha/pci/tsp_pci.c

135

datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));

sys/arch/alpha/tc/tc_bus_mem.c

265

tc_mem_subregion(void *v, bus_space_handle_t memh, bus_size_t offset,

sys/arch/alpha/tc/tc_bus_mem.c

270

if ((offset & 0x7) != 0)

sys/arch/alpha/tc/tc_bus_mem.c

274

*nmemh = memh + (offset << 1);

sys/arch/alpha/tc/tc_bus_mem.c

276

*nmemh = memh + offset;

sys/arch/amd64/amd64/bus_space.c

660

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/amd64/amd64/bus_space.c

663

*nbshp = bsh + offset;

sys/arch/amd64/amd64/codepatch.c

174

int32_t offset;

sys/arch/amd64/amd64/codepatch.c

190

offset = (vaddr_t)func - (patch->addr + 5);

sys/arch/amd64/amd64/codepatch.c

193

memcpy(rwaddr + 1, &offset, sizeof(offset));

sys/arch/amd64/amd64/db_trace.c

143

db_expr_t offset;

sys/arch/amd64/amd64/db_trace.c

147

sym = db_search_symbol(callpc, DB_STGY_ANY, &offset);

sys/arch/amd64/amd64/db_trace.c

158

offset = 1;

sys/arch/amd64/amd64/db_trace.c

163

offset = 0;

sys/arch/amd64/amd64/db_trace.c

175

if (lastframe == 0 && offset == 0 && !have_addr) {

sys/arch/amd64/amd64/db_trace.c

210

if (lastframe == 0 && offset == 0 && !have_addr) {

sys/arch/amd64/amd64/disksubr.c

128

int offset;

sys/arch/amd64/amd64/disksubr.c

144

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/amd64/amd64/disksubr.c

146

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/amd64/amd64/efifb.c

294

wdf->offset = 0;

sys/arch/amd64/include/bus.h

125

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);

sys/arch/amd64/include/bus.h

477

handle, bus_size_t offset, bus_size_t length, int flags)

sys/arch/amd64/include/loadfile_machdep.h

45

#define LOADADDR(a) (((((u_long)(a)) + offset)&0xfffffff) + \

sys/arch/amd64/include/loadfile_machdep.h

48

#define LOADADDR(a) ((a) + offset)

sys/arch/amd64/include/tcb.h

40

__amd64_read_tcb(long offset)

sys/arch/amd64/include/tcb.h

43

__asm__ ("movq %%fs:(%1),%0" : "=r" (val) : "r" (offset));

sys/arch/amd64/isa/isa_machdep.c

563

_isa_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/amd64/isa/isa_machdep.c

570

if (offset >= map->dm_mapsize)

sys/arch/amd64/isa/isa_machdep.c

572

if (len == 0 || (offset + len) > map->dm_mapsize)

sys/arch/amd64/isa/isa_machdep.c

589

memcpy(cookie->id_bouncebuf + offset,

sys/arch/amd64/isa/isa_machdep.c

590

cookie->id_origbuf + offset, len);

sys/arch/amd64/isa/isa_machdep.c

593

_bus_dmamap_sync(t, map, offset, len, op);

sys/arch/amd64/isa/isa_machdep.c

601

memcpy(cookie->id_origbuf + offset,

sys/arch/amd64/isa/isa_machdep.c

602

cookie->id_bouncebuf + offset, len);

sys/arch/amd64/pci/pci_machdep.c

284

int bir, offset;

sys/arch/amd64/pci/pci_machdep.c

292

offset = (table & PCI_MSIX_TABLE_OFF);

sys/arch/amd64/pci/pci_machdep.c

298

_bus_space_map(memt, base + offset, tblsz * 16, 0, memh))

sys/arch/amd64/stand/efiboot/efidev.c

859

esp_seek(struct open_file *f, off_t offset, int where)

sys/arch/amd64/stand/efiboot/efidev.c

873

position += offset;

sys/arch/amd64/stand/efiboot/efidev.c

876

position = offset;

sys/arch/amd64/stand/efiboot/efipxe.c

210

tftp_seek(struct open_file *f, off_t offset, int where)

sys/arch/amd64/stand/efiboot/efipxe.c

216

if (tftpfile->inbufoff + offset < 0 ||

sys/arch/amd64/stand/efiboot/efipxe.c

217

tftpfile->inbufoff + offset > tftpfile->inbufsize) {

sys/arch/amd64/stand/efiboot/efipxe.c

221

tftpfile->inbufoff += offset;

sys/arch/amd64/stand/efiboot/efipxe.c

224

if (offset < 0 || offset > tftpfile->inbufsize) {

sys/arch/amd64/stand/efiboot/efipxe.c

228

tftpfile->inbufoff = offset;

sys/arch/amd64/stand/libsa/pxe.c

137

uw->buffer.offset = VTOPOFF(pkt);

sys/arch/amd64/stand/libsa/pxe.c

172

ur->buffer.offset = VTOPOFF(pkt);

sys/arch/amd64/stand/libsa/pxe.c

405

bangpxe_off = pxe->EntryPointSP.offset;

sys/arch/amd64/stand/libsa/pxe.c

409

pxenv_off = pxenv->RMEntry.offset;

sys/arch/amd64/stand/libsa/pxe.c

434

SEGOFF2FLAT(gci->Buffer.segment, gci->Buffer.offset),

sys/arch/amd64/stand/libsa/pxe.h

51

uint16_t offset;

sys/arch/arm/arm/bus_dma.c

474

_bus_dmamap_sync_linear(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/arm/arm/bus_dma.c

481

while (offset >= ds->ds_len) {

sys/arch/arm/arm/bus_dma.c

482

offset -= ds->ds_len;

sys/arch/arm/arm/bus_dma.c

487

paddr_t pa = ds->ds_addr + offset;

sys/arch/arm/arm/bus_dma.c

488

size_t seglen = min(len, ds->ds_len - offset);

sys/arch/arm/arm/bus_dma.c

490

_bus_dmamap_sync_segment(va + offset, pa, seglen, ops);

sys/arch/arm/arm/bus_dma.c

492

offset += seglen;

sys/arch/arm/arm/bus_dma.c

498

_bus_dmamap_sync_mbuf(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/arm/arm/bus_dma.c

503

bus_size_t voff = offset;

sys/arch/arm/arm/bus_dma.c

504

bus_size_t ds_off = offset;

sys/arch/arm/arm/bus_dma.c

551

_bus_dmamap_sync_uio(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/arm/arm/bus_dma.c

557

bus_size_t voff = offset;

sys/arch/arm/arm/bus_dma.c

558

bus_size_t ds_off = offset;

sys/arch/arm/arm/bus_dma.c

590

_bus_dmamap_sync_raw(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/arm/arm/bus_dma.c

596

while (offset >= ds->ds_len) {

sys/arch/arm/arm/bus_dma.c

597

offset -= ds->ds_len;

sys/arch/arm/arm/bus_dma.c

601

vaddr_t va = ds->_ds_vaddr + offset;

sys/arch/arm/arm/bus_dma.c

602

paddr_t pa = ds->ds_addr + offset;

sys/arch/arm/arm/bus_dma.c

603

size_t seglen = min(len, ds->ds_len - offset);

sys/arch/arm/arm/bus_dma.c

607

offset += seglen;

sys/arch/arm/arm/bus_dma.c

625

_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/arm/arm/bus_dma.c

631

t, map, offset, len, ops);

sys/arch/arm/arm/bus_dma.c

642

if (offset >= map->dm_mapsize)

sys/arch/arm/arm/bus_dma.c

644

offset, map->dm_mapsize);

sys/arch/arm/arm/bus_dma.c

645

if ((offset + len) > map->dm_mapsize)

sys/arch/arm/arm/bus_dma.c

686

_bus_dmamap_sync_linear(t, map, offset, len, ops);

sys/arch/arm/arm/bus_dma.c

690

_bus_dmamap_sync_mbuf(t, map, offset, len, ops);

sys/arch/arm/arm/bus_dma.c

694

_bus_dmamap_sync_uio(t, map, offset, len, ops);

sys/arch/arm/arm/bus_dma.c

698

_bus_dmamap_sync_raw(t, map, offset, len, ops);

sys/arch/arm/arm/disassem.c

590

int offset;

sys/arch/arm/arm/disassem.c

592

offset = insn & 0xfff;

sys/arch/arm/arm/disassem.c

596

loc += offset;

sys/arch/arm/arm/disassem.c

598

loc -= offset;

sys/arch/arm/arm/disassem.c

609

di->di_printf("#0x%03x", offset);

sys/arch/arm/arm/disassem.c

619

int offset;

sys/arch/arm/arm/disassem.c

621

offset = ((insn & 0xf00) >> 4) | (insn & 0xf);

sys/arch/arm/arm/disassem.c

625

loc += offset;

sys/arch/arm/arm/disassem.c

627

loc -= offset;

sys/arch/arm/arm/disassem.c

636

di->di_printf("#0x%02x", offset);

sys/arch/arm/arm/disksubr.c

100

int offset;

sys/arch/arm/arm/disksubr.c

116

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/arm/arm/disksubr.c

118

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/arm/armv7/armv7_space.c

212

armv7_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/arm/armv7/armv7_space.c

216

*nbshp = bsh + offset;

sys/arch/arm/armv7/armv7_space.c

221

armv7_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/arm/include/bus.h

385

bus_size_t offset, bus_size_t size, \

sys/arch/arm/include/bus.h

406

bus_size_t offset, bus_size_t len, int flags);

sys/arch/arm/include/bus.h

410

bus_size_t offset);

sys/arch/arm/include/bus.h

414

bus_size_t offset);

sys/arch/arm/include/bus.h

418

bus_size_t offset);

sys/arch/arm/include/bus.h

422

bus_size_t offset);

sys/arch/arm/include/bus.h

426

bus_size_t offset, u_int8_t value);

sys/arch/arm/include/bus.h

430

bus_size_t offset, u_int16_t value);

sys/arch/arm/include/bus.h

434

bus_size_t offset, u_int32_t value);

sys/arch/arm/include/bus.h

438

bus_size_t offset, u_int64_t value);

sys/arch/arm/include/bus.h

442

bus_size_t offset, u_int8_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

446

bus_size_t offset, u_int16_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

450

bus_size_t offset, u_int32_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

454

bus_size_t offset, u_int64_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

458

bus_size_t offset, const u_int8_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

462

bus_size_t offset, const u_int16_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

466

bus_size_t offset, const u_int32_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

470

bus_size_t offset, const u_int64_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

474

bus_size_t offset, u_int8_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

478

bus_size_t offset, u_int16_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

482

bus_size_t offset, u_int32_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

486

bus_size_t offset, u_int64_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

490

bus_size_t offset, const u_int8_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

494

bus_size_t offset, const u_int16_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

498

bus_size_t offset, const u_int32_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

502

bus_size_t offset, const u_int64_t *addr, bus_size_t count);

sys/arch/arm/include/bus.h

506

bus_size_t offset, u_int8_t value, bus_size_t count);

sys/arch/arm/include/bus.h

510

bus_size_t offset, u_int16_t value, bus_size_t count);

sys/arch/arm/include/bus.h

514

bus_size_t offset, u_int32_t value, bus_size_t count);

sys/arch/arm/include/bus.h

518

bus_size_t offset, u_int64_t value, bus_size_t count);

sys/arch/arm/include/bus.h

522

bus_size_t offset, u_int8_t value, bus_size_t count);

sys/arch/arm/include/bus.h

526

bus_size_t offset, u_int16_t value, bus_size_t count);

sys/arch/arm/include/bus.h

530

bus_size_t offset, u_int32_t value, bus_size_t count);

sys/arch/arm/include/bus.h

534

bus_size_t offset, u_int64_t value, bus_size_t count);

sys/arch/arm64/arm64/bus_space.c

235

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/arm64/arm64/bus_space.c

237

*nbshp = bsh + offset;

sys/arch/arm64/arm64/cpu.c

1818

uint64_t offset = data - pa;

sys/arch/arm64/arm64/cpu.c

1819

uint64_t *startvec = (uint64_t *)(start_pg + offset);

sys/arch/arm64/arm64/db_trace.c

59

db_expr_t offset;

sys/arch/arm64/arm64/db_trace.c

98

sym = db_search_symbol(lastlr, DB_STGY_ANY, &offset);

sys/arch/arm64/arm64/disksubr.c

100

int offset;

sys/arch/arm64/arm64/disksubr.c

116

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/arm64/arm64/disksubr.c

118

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/arm64/dev/acpiiort.c

130

uint32_t rid, offset;

sys/arch/arm64/dev/acpiiort.c

146

offset = iort->offset;

sys/arch/arm64/dev/acpiiort.c

148

node = (struct acpi_iort_node *)((char *)iort + offset);

sys/arch/arm64/dev/acpiiort.c

156

offset += node->length;

sys/arch/arm64/dev/acpiiort.c

166

offset = map[i].output_reference;

sys/arch/arm64/dev/acpiiort.c

188

node = (struct acpi_iort_node *)((char *)iort + offset);

sys/arch/arm64/dev/acpiiort.c

67

uint32_t offset;

sys/arch/arm64/dev/acpiiort.c

77

offset = iort->offset;

sys/arch/arm64/dev/acpiiort.c

79

node = (struct acpi_iort_node *)((char *)iort + offset);

sys/arch/arm64/dev/acpiiort.c

82

offset += node->length;

sys/arch/arm64/dev/acpipci.c

388

uint32_t rid, offset;

sys/arch/arm64/dev/acpipci.c

406

offset = iort->offset;

sys/arch/arm64/dev/acpipci.c

408

node = (struct acpi_iort_node *)((char *)iort + offset);

sys/arch/arm64/dev/acpipci.c

414

offset += node->length;

sys/arch/arm64/dev/acpipci.c

424

offset = map[i].output_reference;

sys/arch/arm64/dev/acpipci.c

443

node = (struct acpi_iort_node *)((char *)iort + offset);

sys/arch/arm64/dev/acpipci.c

818

uint32_t offset = map[i].output_reference;

sys/arch/arm64/dev/acpipci.c

822

return acpipci_iort_map(iort, offset, id, ic);

sys/arch/arm64/dev/acpipci.c

829

return acpipci_iort_map(iort, offset, id, ic);

sys/arch/arm64/dev/acpipci.c

837

acpipci_iort_map(struct acpi_iort *iort, uint32_t offset, uint32_t id,

sys/arch/arm64/dev/acpipci.c

841

(struct acpi_iort_node *)((char *)iort + offset);

sys/arch/arm64/dev/acpipci.c

878

uint32_t rid, offset;

sys/arch/arm64/dev/acpipci.c

896

offset = iort->offset;

sys/arch/arm64/dev/acpipci.c

898

node = (struct acpi_iort_node *)((char *)iort + offset);

sys/arch/arm64/dev/acpipci.c

907

offset += node->length;

sys/arch/arm64/dev/agintc.c

320

int idx, offset, nredist;

sys/arch/arm64/dev/agintc.c

449

offset = 0;

sys/arch/arm64/dev/agintc.c

456

offset + GICR_TYPER);

sys/arch/arm64/dev/agintc.c

466

printf("probing redistributor %d %x\n", nredist, offset);

sys/arch/arm64/dev/agintc.c

469

offset += sz;

sys/arch/arm64/dev/agintc.c

470

if (offset >= faa->fa_reg[1 + idx].size ||

sys/arch/arm64/dev/agintc.c

472

offset = 0;

sys/arch/arm64/dev/agintc.c

487

offset = 0;

sys/arch/arm64/dev/agintc.c

493

offset + GICR_TYPER);

sys/arch/arm64/dev/agintc.c

503

sc->sc_rbase_ioh[idx], offset + GICR_TYPER) >> 32;

sys/arch/arm64/dev/agintc.c

513

sc->sc_rbase_ioh[idx], offset + GICR_TYPER) >> 8;

sys/arch/arm64/dev/agintc.c

516

offset, sz, &sc->sc_r_ioh[nredist]);

sys/arch/arm64/dev/agintc.c

520

offset + GICR_PROPBASER,

sys/arch/arm64/dev/agintc.c

525

offset + GICR_PENDBASER,

sys/arch/arm64/dev/agintc.c

530

offset + GICR_CTLR, GICR_CTLR_ENABLE_LPIS);

sys/arch/arm64/dev/agintc.c

533

offset += sz;

sys/arch/arm64/dev/agintc.c

534

if (offset >= faa->fa_reg[1 + idx].size ||

sys/arch/arm64/dev/agintc.c

536

offset = 0;

sys/arch/arm64/dev/ampchwm.c

118

uint16_t offset = 0;

sys/arch/arm64/dev/ampchwm.c

136

bus_space_read_region_8(sc->sc_iot, sc->sc_ioh, offset, &hdr.data, 1);

sys/arch/arm64/dev/ampchwm.c

148

offset += sizeof(hdr);

sys/arch/arm64/dev/ampchwm.c

150

bus_space_read_region_8(sc->sc_iot, sc->sc_ioh, offset,

sys/arch/arm64/dev/ampchwm.c

152

if (ampchwm_attach_sensors(sc, i, &metric, &offset))

sys/arch/arm64/dev/aplefuse.c

103

memcpy(p, &buf[offset], MIN(size, 4 - offset));

sys/arch/arm64/dev/aplefuse.c

104

size -= MIN(size, 4 - offset);

sys/arch/arm64/dev/aplefuse.c

105

p += MIN(size, 4 - offset);

sys/arch/arm64/dev/aplefuse.c

107

offset = 0;

sys/arch/arm64/dev/aplefuse.c

93

int offset;

sys/arch/arm64/dev/aplefuse.c

98

offset = addr & 0x3;

sys/arch/arm64/dev/aplhidev.c

85

uint16_t offset;

sys/arch/arm64/dev/aplsmc.c

738

uint64_t offset, time;

sys/arch/arm64/dev/aplsmc.c

745

offset = lemtoh64(data);

sys/arch/arm64/dev/aplsmc.c

750

time = lemtoh64(data) + offset;

sys/arch/arm64/dev/aplsmc.c

762

uint64_t offset, time;

sys/arch/arm64/dev/aplsmc.c

771

offset = time - lemtoh64(data);

sys/arch/arm64/dev/aplsmc.c

773

htolem64(data, offset);

sys/arch/arm64/dev/pci_machdep.c

83

int bir, offset;

sys/arch/arm64/dev/pci_machdep.c

91

offset = (table & PCI_MSIX_TABLE_OFF);

sys/arch/arm64/dev/pci_machdep.c

97

bus_space_map(memt, base + offset, tblsz * 16, 0, memh))

sys/arch/arm64/include/bus.h

318

bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,

sys/arch/arm64/include/loadfile_machdep.h

40

#define LOADADDR(a) (((((u_long)(a)) + offset)&0x7fffffffff) + \

sys/arch/arm64/stand/efiboot/efidev.c

651

esp_seek(struct open_file *f, off_t offset, int where)

sys/arch/arm64/stand/efiboot/efidev.c

665

position += offset;

sys/arch/arm64/stand/efiboot/efidev.c

668

position = offset;

sys/arch/arm64/stand/efiboot/efipxe.c

237

mtftp_seek(struct open_file *f, off_t offset, int where)

sys/arch/arm64/stand/efiboot/efipxe.c

243

if (tftpfile->inbufoff + offset < 0 ||

sys/arch/arm64/stand/efiboot/efipxe.c

244

tftpfile->inbufoff + offset > tftpfile->inbufsize) {

sys/arch/arm64/stand/efiboot/efipxe.c

248

tftpfile->inbufoff += offset;

sys/arch/arm64/stand/efiboot/efipxe.c

251

if (offset < 0 || offset > tftpfile->inbufsize) {

sys/arch/arm64/stand/efiboot/efipxe.c

255

tftpfile->inbufoff = offset;

sys/arch/armv7/exynos/ec_commands.h

1146

uint8_t offset;

sys/arch/armv7/exynos/ec_commands.h

1160

uint8_t offset;

sys/arch/armv7/exynos/ec_commands.h

330

uint32_t offset; /* Starting value for read buffer */

sys/arch/armv7/exynos/ec_commands.h

373

uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */

sys/arch/armv7/exynos/ec_commands.h

445

uint32_t offset; /* Byte offset to read */

sys/arch/armv7/exynos/ec_commands.h

453

uint32_t offset; /* Byte offset to write */

sys/arch/armv7/exynos/ec_commands.h

466

uint32_t offset; /* Byte offset to erase */

sys/arch/armv7/exynos/ec_commands.h

550

uint32_t offset;

sys/arch/armv7/exynos/ec_commands.h

741

uint32_t offset; /* Offset in flash to hash */

sys/arch/armv7/exynos/ec_commands.h

751

uint32_t offset; /* Offset in flash which was hashed */

sys/arch/armv7/exynos/ec_commands.h

816

uint32_t offset; /* Byte offset to read */

sys/arch/armv7/exynos/ec_commands.h

824

uint32_t offset; /* Byte offset to write */

sys/arch/armv7/exynos/exehci.c

221

bus_size_t offset;

sys/arch/armv7/exynos/exehci.c

247

offset = USB_HOST_POWER_5250;

sys/arch/armv7/exynos/exehci.c

249

offset = USB_HOST_POWER_54XX;

sys/arch/armv7/exynos/exehci.c

251

val = regmap_read_4(pmurm, offset);

sys/arch/armv7/exynos/exehci.c

253

regmap_write_4(pmurm, offset, val);

sys/arch/armv7/include/loadfile_machdep.h

40

#define LOADADDR(a) (((((u_long)(a)) + offset)&0xfffffff) + \

sys/arch/armv7/omap/amdisplay.c

598

wdf->offset = 0;

sys/arch/armv7/omap/omdisplay.c

1299

omdisplay_mmap(void *v, off_t offset, int prot)

sys/arch/armv7/omap/omdisplay.c

1304

if ((offset & PAGE_MASK) != 0)

sys/arch/armv7/omap/omdisplay.c

1310

if (offset < 0 ||

sys/arch/armv7/omap/omdisplay.c

1311

offset >= screen->rinfo.ri_stride * screen->rinfo.ri_height)

sys/arch/armv7/omap/omdisplay.c

1315

offset, prot, BUS_DMA_WAITOK | BUS_DMA_COHERENT));

sys/arch/armv7/omap/omdisplay.c

449

paddr_t omdisplay_mmap(void *v, off_t offset, int prot);

sys/arch/armv7/omap/omdisplay.c

602

wsdisp_info->offset = 0;

sys/arch/armv7/stand/efiboot/efipxe.c

237

mtftp_seek(struct open_file *f, off_t offset, int where)

sys/arch/armv7/stand/efiboot/efipxe.c

243

if (tftpfile->inbufoff + offset < 0 ||

sys/arch/armv7/stand/efiboot/efipxe.c

244

tftpfile->inbufoff + offset > tftpfile->inbufsize) {

sys/arch/armv7/stand/efiboot/efipxe.c

248

tftpfile->inbufoff += offset;

sys/arch/armv7/stand/efiboot/efipxe.c

251

if (offset < 0 || offset > tftpfile->inbufsize) {

sys/arch/armv7/stand/efiboot/efipxe.c

255

tftpfile->inbufoff = offset;

sys/arch/armv7/stand/efiboot/exec.c

142

u_long offset = 0;

sys/arch/hppa/dev/astro.c

671

paddr_t offset = pa & PAGE_MASK;

sys/arch/hppa/dev/astro.c

682

return (e->ipe_dva | offset);

sys/arch/hppa/dev/dino.c

510

dino_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/hppa/dev/dino.c

513

*nbshp = bsh + offset;

sys/arch/hppa/dev/elroy.c

351

elroy_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/hppa/dev/elroy.c

354

*nbshp = bsh + offset;

sys/arch/hppa/dev/elroy.c

74

bus_size_t offset, bus_size_t size,

sys/arch/hppa/gsc/if_ie_gsc.c

211

ie_gsc_read16(struct ie_softc *sc, int offset)

sys/arch/hppa/gsc/if_ie_gsc.c

213

volatile u_int16_t *addr = (volatile u_int16_t *)(sc->bh + offset);

sys/arch/hppa/gsc/if_ie_gsc.c

220

ie_gsc_write16(struct ie_softc *sc, int offset, u_int16_t v)

sys/arch/hppa/gsc/if_ie_gsc.c

222

volatile u_int16_t *addr = (volatile u_int16_t *)(sc->bh + offset);

sys/arch/hppa/gsc/if_ie_gsc.c

229

ie_gsc_write24(struct ie_softc *sc, int offset, int v)

sys/arch/hppa/gsc/if_ie_gsc.c

231

volatile u_int16_t *addr = (volatile u_int16_t *)(sc->bh + offset);

sys/arch/hppa/gsc/if_ie_gsc.c

240

ie_gsc_memcopyin(struct ie_softc *sc, void *p, int offset, size_t size)

sys/arch/hppa/gsc/if_ie_gsc.c

242

pdcache(0, sc->bh + offset, size);

sys/arch/hppa/gsc/if_ie_gsc.c

243

bcopy ((void *)((u_long)sc->bh + offset), p, size);

sys/arch/hppa/gsc/if_ie_gsc.c

247

ie_gsc_memcopyout(struct ie_softc *sc, const void *p, int offset, size_t size)

sys/arch/hppa/gsc/if_ie_gsc.c

249

bcopy (p, (void *)((u_long)sc->bh + offset), size);

sys/arch/hppa/gsc/if_ie_gsc.c

250

fdcache(0, sc->bh + offset, size);

sys/arch/hppa/gsc/if_ie_gsc.c

91

u_int16_t ie_gsc_read16(struct ie_softc *sc, int offset);

sys/arch/hppa/gsc/if_ie_gsc.c

92

void ie_gsc_write16(struct ie_softc *sc, int offset, u_int16_t v);

sys/arch/hppa/gsc/if_ie_gsc.c

93

void ie_gsc_write24(struct ie_softc *sc, int offset, int addr);

sys/arch/hppa/gsc/if_ie_gsc.c

94

void ie_gsc_memcopyin(struct ie_softc *sc, void *p, int offset, size_t);

sys/arch/hppa/hppa/disksubr.c

228

int offset;

sys/arch/hppa/hppa/disksubr.c

240

offset = LABELOFFSET;

sys/arch/hppa/hppa/disksubr.c

244

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/hppa/hppa/disksubr.c

251

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/hppa/hppa/mainbus.c

351

mbus_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/hppa/hppa/mainbus.c

354

*nbshp = bsh + offset;

sys/arch/hppa/hppa/mainbus.c

87

bus_size_t offset, bus_size_t size,

sys/arch/hppa/include/bus.h

48

bus_size_t offset, bus_size_t size,

sys/arch/hppa/include/loadfile_machdep.h

47

#define LOADADDR(a) ((u_int)(a) + offset)

sys/arch/hppa/include/loadfile_machdep.h

65

#define LOADADDR(a) (((u_int)(a)) + offset)

sys/arch/hppa/stand/libsa/libsa.h

67

off_t lif_seek(struct open_file *f, off_t offset, int where);

sys/arch/hppa/stand/libsa/lif.c

208

lif_seek(f, offset, where)

sys/arch/hppa/stand/libsa/lif.c

210

off_t offset;

sys/arch/hppa/stand/libsa/lif.c

217

fp->f_seek = offset;

sys/arch/hppa/stand/libsa/lif.c

220

fp->f_seek += offset;

sys/arch/hppa/stand/libsa/lif.c

223

fp->f_seek = fp->f_count - offset;

sys/arch/hppa/stand/libsa/pdc.c

135

int offset, xfer, ret;

sys/arch/hppa/stand/libsa/pdc.c

205

offset = blk - dp->last_blk;

sys/arch/hppa/stand/libsa/pdc.c

206

xfer = min(dp->last_read - offset, size);

sys/arch/hppa/stand/libsa/pdc.c

212

offset, xfer, size, blk);

sys/arch/hppa/stand/libsa/pdc.c

214

bcopy(dp->buf + offset, buf, xfer);

sys/arch/hppa/stand/libsa/pdc.c

222

offset = blk & IOPGOFSET;

sys/arch/hppa/stand/libsa/pdc.c

232

(u_int)blk - offset, dp->buf, IODC_IOSIZ, IODC_IOSIZ)) < 0) {

sys/arch/hppa/stand/libsa/pdc.c

236

blk - offset, IODC_IOSIZ, ret);

sys/arch/hppa/stand/libsa/pdc.c

246

dp->last_blk = blk - offset;

sys/arch/hppa/stand/libsa/pdc.c

248

if ((ret -= offset) > size)

sys/arch/hppa/stand/libsa/pdc.c

250

bcopy(dp->buf + offset, buf, ret);

sys/arch/i386/i386/bios.c

224

bios32_entry.offset = (uint32_t)ISA_HOLE_VADDR(h->entry);

sys/arch/i386/i386/bios.c

651

if (bios32_entry.offset == 0)

sys/arch/i386/i386/bios.c

694

e->offset = (vaddr_t)ent;

sys/arch/i386/i386/codepatch.c

182

int32_t offset;

sys/arch/i386/i386/codepatch.c

195

offset = (vaddr_t)func - (patch->addr + 5);

sys/arch/i386/i386/codepatch.c

198

memcpy(rwaddr + 1, &offset, sizeof(offset));

sys/arch/i386/i386/db_trace.c

159

db_expr_t offset;

sys/arch/i386/i386/db_trace.c

163

sym = db_search_symbol(callpc, DB_STGY_ANY, &offset);

sys/arch/i386/i386/db_trace.c

174

offset = 1;

sys/arch/i386/i386/db_trace.c

179

offset = 0;

sys/arch/i386/i386/db_trace.c

192

if (lastframe == 0 && offset == 0 && !have_addr) {

sys/arch/i386/i386/db_trace.c

213

if (lastframe == 0 && offset == 0 && !have_addr) {

sys/arch/i386/i386/disksubr.c

128

int offset;

sys/arch/i386/i386/disksubr.c

144

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/i386/i386/disksubr.c

146

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/i386/i386/machdep.c

3864

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/i386/i386/machdep.c

3866

*nbshp = bsh + offset;

sys/arch/i386/i386/pmap.c

1317

pmap_tlb_shootpage(curcpu()->ci_curpmap, ((vaddr_t)ptes) + ptp->offset);

sys/arch/i386/i386/pmap.c

1323

pmap_tlb_shootpage(pm, ((vaddr_t)PTE_BASE) + ptp->offset);

sys/arch/i386/i386/pmapae.c

936

pmap_tlb_shootpage(curcpu()->ci_curpmap, ((vaddr_t)ptes) + ptp->offset);

sys/arch/i386/i386/pmapae.c

942

pmap_tlb_shootpage(pm, ((vaddr_t)PTE_BASE) + ptp->offset);

sys/arch/i386/include/biosvar.h

99

uint32_t offset;

sys/arch/i386/include/bus.h

98

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);

sys/arch/i386/include/loadfile_machdep.h

43

#define LOADADDR(a) ((((u_long)(a)) + offset)&0xfffffff)

sys/arch/i386/include/tcb.h

38

__i386_read_tcb(int offset)

sys/arch/i386/include/tcb.h

41

__asm__ ("movl %%gs:(%1),%0" : "=r" (val) : "r" (offset));

sys/arch/i386/isa/isa_machdep.c

870

_isa_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/i386/isa/isa_machdep.c

877

if (offset >= map->dm_mapsize)

sys/arch/i386/isa/isa_machdep.c

879

if (len == 0 || (offset + len) > map->dm_mapsize)

sys/arch/i386/isa/isa_machdep.c

896

memcpy(cookie->id_bouncebuf + offset,

sys/arch/i386/isa/isa_machdep.c

897

(char *)cookie->id_origbuf + offset, len);

sys/arch/i386/isa/isa_machdep.c

900

_bus_dmamap_sync(t, map, offset, len, op);

sys/arch/i386/isa/isa_machdep.c

908

memcpy(cookie->id_origbuf + offset,

sys/arch/i386/isa/isa_machdep.c

909

(char *)cookie->id_bouncebuf + offset, len);

sys/arch/i386/pci/glxsb.c

654

int offset;

sys/arch/i386/pci/glxsb.c

714

offset = 0;

sys/arch/i386/pci/glxsb.c

723

crd->crd_skip + offset, len, op_src);

sys/arch/i386/pci/glxsb.c

726

crd->crd_skip + offset, len, op_src);

sys/arch/i386/pci/glxsb.c

728

bcopy(crp->crp_buf + crd->crd_skip + offset, op_src,

sys/arch/i386/pci/glxsb.c

740

crd->crd_skip + offset, len, op_dst, M_NOWAIT);

sys/arch/i386/pci/glxsb.c

743

crd->crd_skip + offset, len, op_dst);

sys/arch/i386/pci/glxsb.c

745

bcopy(op_dst, crp->crp_buf + crd->crd_skip + offset,

sys/arch/i386/pci/glxsb.c

750

offset += len;

sys/arch/i386/pci/pcibios.c

154

pcibios_entry.segment, pcibios_entry.offset,

sys/arch/i386/pci/pcibios.c

389

u_int32_t offset;

sys/arch/i386/pci/pcibios.c

394

args.offset = (u_int32_t)table;

sys/arch/i386/stand/libsa/pxe.c

137

uw->buffer.offset = VTOPOFF(pkt);

sys/arch/i386/stand/libsa/pxe.c

172

ur->buffer.offset = VTOPOFF(pkt);

sys/arch/i386/stand/libsa/pxe.c

405

bangpxe_off = pxe->EntryPointSP.offset;

sys/arch/i386/stand/libsa/pxe.c

409

pxenv_off = pxenv->RMEntry.offset;

sys/arch/i386/stand/libsa/pxe.c

434

SEGOFF2FLAT(gci->Buffer.segment, gci->Buffer.offset),

sys/arch/i386/stand/libsa/pxe.h

51

uint16_t offset;

sys/arch/landisk/dev/obio.c

217

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);

sys/arch/landisk/dev/obio.c

336

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/landisk/dev/obio.c

338

*nbshp = bsh + offset;

sys/arch/landisk/dev/obio.c

368

uint8_t obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/landisk/dev/obio.c

369

uint16_t obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/landisk/dev/obio.c

370

uint32_t obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/landisk/dev/obio.c

372

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

374

bus_size_t offset, uint16_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

376

bus_size_t offset, uint32_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

378

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

380

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

382

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

384

bus_size_t offset, uint16_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

386

bus_size_t offset, uint32_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

388

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

390

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

391

void obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

393

void obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

395

void obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

398

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

400

bus_size_t offset, const uint16_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

402

bus_size_t offset, const uint32_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

404

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

406

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

408

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

410

bus_size_t offset, const uint16_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

412

bus_size_t offset, const uint32_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

414

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

416

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/landisk/dev/obio.c

417

void obio_iomem_set_multi_1(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

419

void obio_iomem_set_multi_2(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

421

void obio_iomem_set_multi_4(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

424

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

426

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

428

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

562

obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/landisk/dev/obio.c

564

return *(volatile uint8_t *)(bsh + offset);

sys/arch/landisk/dev/obio.c

568

obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/landisk/dev/obio.c

570

return *(volatile uint16_t *)(bsh + offset);

sys/arch/landisk/dev/obio.c

574

obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/landisk/dev/obio.c

576

return *(volatile uint32_t *)(bsh + offset);

sys/arch/landisk/dev/obio.c

581

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

583

volatile uint8_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

592

bus_size_t offset, uint16_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

594

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

603

bus_size_t offset, uint32_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

605

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

614

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

616

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

627

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

629

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

640

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

642

volatile uint8_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

651

bus_size_t offset, uint16_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

653

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

662

bus_size_t offset, uint32_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

664

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

673

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

675

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

686

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

688

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

699

obio_iomem_write_1(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

702

*(volatile uint8_t *)(bsh + offset) = value;

sys/arch/landisk/dev/obio.c

706

obio_iomem_write_2(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

709

*(volatile uint16_t *)(bsh + offset) = value;

sys/arch/landisk/dev/obio.c

713

obio_iomem_write_4(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/landisk/dev/obio.c

716

*(volatile uint32_t *)(bsh + offset) = value;

sys/arch/landisk/dev/obio.c

721

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

723

volatile uint8_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

732

bus_size_t offset, const uint16_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

734

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

743

bus_size_t offset, const uint32_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

745

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

754

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

756

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

767

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

769

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

780

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

782

volatile uint8_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

791

bus_size_t offset, const uint16_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

793

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

802

bus_size_t offset, const uint32_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

804

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

813

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

815

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

826

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/landisk/dev/obio.c

828

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

839

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

841

volatile uint8_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

850

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

852

volatile uint16_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

861

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

863

volatile uint32_t *p = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

872

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

874

volatile uint8_t *addr = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

883

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

885

volatile uint16_t *addr = (void *)(bsh + offset);

sys/arch/landisk/dev/obio.c

894

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

896

volatile uint32_t *addr = (void *)(bsh + offset);

sys/arch/landisk/include/loadfile_machdep.h

39

#define LOADADDR(a) (((u_long)(a)) + offset)

sys/arch/landisk/landisk/bus_dma.c

345

_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/landisk/landisk/bus_dma.c

352

DPRINTF(("bus_dmamap_sync: t = %p, map = %p, offset = %ld, len = %ld, ops = %x\n", t, map, offset, len, ops));

sys/arch/landisk/landisk/bus_dma.c

362

if (offset >= map->dm_mapsize)

sys/arch/landisk/landisk/bus_dma.c

364

if ((offset + len) > map->dm_mapsize)

sys/arch/landisk/landisk/bus_dma.c

376

if (offset >= map->dm_segs[i].ds_len) {

sys/arch/landisk/landisk/bus_dma.c

377

offset -= map->dm_segs[i].ds_len;

sys/arch/landisk/landisk/bus_dma.c

386

minlen = len < map->dm_segs[i].ds_len - offset ?

sys/arch/landisk/landisk/bus_dma.c

387

len : map->dm_segs[i].ds_len - offset;

sys/arch/landisk/landisk/bus_dma.c

390

naddr = addr + offset;

sys/arch/landisk/landisk/bus_dma.c

395

offset = 0;

sys/arch/landisk/landisk/bus_dma.c

402

i, addr, offset, addr, offset + minlen - 1, len));

sys/arch/landisk/landisk/bus_dma.c

430

offset = 0;

sys/arch/landisk/landisk/disksubr.c

101

int offset;

sys/arch/landisk/landisk/disksubr.c

117

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/landisk/landisk/disksubr.c

119

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/landisk/stand/xxboot/ufs12.c

726

ufs12_seek(struct open_file *f, off_t offset, int where)

sys/arch/landisk/stand/xxboot/ufs12.c

733

fp->f_seekp = offset;

sys/arch/landisk/stand/xxboot/ufs12.c

736

fp->f_seekp += offset;

sys/arch/landisk/stand/xxboot/ufs12.c

743

fp->f_seekp = fsize - offset;

sys/arch/landisk/stand/xxboot/ufs12.h

41

off_t ufs12_seek(struct open_file *f, off_t offset, int where);

sys/arch/loongson/dev/bonito.c

780

bonito_conf_addr(const struct bonito_config *bc, pcitag_t tag, int offset,

sys/arch/loongson/dev/bonito.c

791

*cfgoff = (1 << d) | (f << 8) | offset;

sys/arch/loongson/dev/bonito.c

794

*cfgoff = tag | offset;

sys/arch/loongson/dev/bonito.c

835

bonito_conf_read(void *v, pcitag_t tag, int offset)

sys/arch/loongson/dev/bonito.c

843

(*hook->read)(hook->cookie, &sc->sc_pc, tag, offset,

sys/arch/loongson/dev/bonito.c

848

return bonito_conf_read_internal(sc->sc_bonito, tag, offset);

sys/arch/loongson/dev/bonito.c

853

int offset)

sys/arch/loongson/dev/bonito.c

860

if (bonito_conf_addr(bc, tag, offset, &cfgoff, &pcimap_cfg))

sys/arch/loongson/dev/bonito.c

896

bonito_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data)

sys/arch/loongson/dev/bonito.c

906

(*hook->write)(hook->cookie, &sc->sc_pc, tag, offset,

sys/arch/loongson/dev/bonito.c

911

if (bonito_conf_addr(sc->sc_bonito, tag, offset, &cfgoff, &pcimap_cfg))

sys/arch/loongson/dev/glx.c

159

int offset, pcireg_t *data)

sys/arch/loongson/dev/glx.c

166

if (tag == glxbase_tag && offset >= PCI_MSR_CTRL)

sys/arch/loongson/dev/glx.c

177

*data = glx_fn0_read(offset);

sys/arch/loongson/dev/glx.c

182

*data = glx_fn2_read(offset);

sys/arch/loongson/dev/glx.c

185

*data = glx_fn3_read(offset);

sys/arch/loongson/dev/glx.c

188

*data = glx_fn4_read(offset);

sys/arch/loongson/dev/glx.c

191

*data = glx_fn5_read(offset);

sys/arch/loongson/dev/glx.c

204

int offset, pcireg_t data)

sys/arch/loongson/dev/glx.c

211

if (tag == glxbase_tag && offset >= PCI_MSR_CTRL)

sys/arch/loongson/dev/glx.c

220

glx_fn0_write(offset, data);

sys/arch/loongson/dev/glx.c

225

glx_fn2_write(offset, data);

sys/arch/loongson/dev/glx.c

228

glx_fn3_write(offset, data);

sys/arch/loongson/dev/glx.c

231

glx_fn4_write(offset, data);

sys/arch/loongson/dev/glx.c

234

glx_fn5_write(offset, data);

sys/arch/loongson/dev/htb.c

263

htb_conf_addr(const struct bonito_config *bc, pcitag_t tag, int offset,

sys/arch/loongson/dev/htb.c

276

htb_conf_read(void *v, pcitag_t tag, int offset)

sys/arch/loongson/dev/htb.c

278

return REGVAL(htb_cfg_space_addr(tag, offset));

sys/arch/loongson/dev/htb.c

282

htb_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data)

sys/arch/loongson/dev/htb.c

284

REGVAL(htb_cfg_space_addr(tag, offset)) = data;

sys/arch/loongson/dev/htb.c

288

htb_cfg_space_addr(pcitag_t tag, int offset)

sys/arch/loongson/dev/htb.c

298

return pa + tag + (offset & 0xfffc);

sys/arch/loongson/dev/radeonfb.c

310

wdf->offset = 0;

sys/arch/loongson/dev/sisfb.c

304

wdf->offset = 0;

sys/arch/loongson/dev/sisfb.c

339

sisfb_mmap(void *v, off_t offset, int prot)

sys/arch/loongson/dev/sisfb.c

344

if ((offset & PAGE_MASK) != 0)

sys/arch/loongson/dev/sisfb.c

347

if (offset < 0 || offset >= ri->ri_stride * ri->ri_height)

sys/arch/loongson/dev/sisfb.c

358

return XKPHYS_TO_PHYS((paddr_t)ri->ri_bits) + offset;

sys/arch/loongson/dev/smfb.c

285

wdf->offset = 0;

sys/arch/loongson/dev/smfb.c

306

smfb_mmap(void *v, off_t offset, int prot)

sys/arch/loongson/dev/smfb.c

311

if ((offset & PAGE_MASK) != 0)

sys/arch/loongson/dev/smfb.c

314

if (offset < 0 || offset >= ri->ri_stride * ri->ri_height)

sys/arch/loongson/dev/smfb.c

317

return XKPHYS_TO_PHYS((paddr_t)ri->ri_bits) + offset;

sys/arch/loongson/include/bus.h

333

bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,

sys/arch/loongson/include/loadfile_machdep.h

39

#define LOADADDR(a) (((u_long)(a)) + offset)

sys/arch/loongson/loongson/bus_space.c

177

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/loongson/loongson/bus_space.c

179

*nbshp = bsh + offset;

sys/arch/loongson/loongson/disksubr.c

101

int offset;

sys/arch/loongson/loongson/disksubr.c

117

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/loongson/loongson/disksubr.c

119

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/loongson/loongson/loongson3_intr.c

41

#define HT_REGVAL(offset) REGVAL32(loongson3_ht_cfg_base + (offset))

sys/arch/loongson/stand/boot/libsa.h

62

off_t rdfs_seek(struct open_file *f, off_t offset, int where);

sys/arch/loongson/stand/boot/rd.c

112

rdfs_seek(struct open_file *f, off_t offset, int whence)

sys/arch/loongson/stand/boot/rd.c

116

rdoffs = offset;

sys/arch/loongson/stand/boot/rd.c

119

rdoffs += offset;

sys/arch/luna88k/cbus/pcex.c

107

pcexmmap(dev_t dev, off_t offset, int prot)

sys/arch/luna88k/cbus/pcex.c

113

if (offset >= 0 && offset < 0x1000000)

sys/arch/luna88k/cbus/pcex.c

114

cookie = (paddr_t)(PCEXMEM_BASE + offset);

sys/arch/luna88k/cbus/pcex.c

117

if (offset >= 0 && offset < 0x10000)

sys/arch/luna88k/cbus/pcex.c

118

cookie = (paddr_t)(PCEXIO_BASE + offset);

sys/arch/luna88k/dev/lunafb.c

247

wsd_fbip->offset = 8;

sys/arch/luna88k/dev/lunafb.c

295

omfbmmap(void *v, off_t offset, int prot)

sys/arch/luna88k/dev/lunafb.c

301

if ((offset & PAGE_MASK) != 0)

sys/arch/luna88k/dev/lunafb.c

305

if (offset >= 0 && offset < OMFB_SIZE)

sys/arch/luna88k/dev/lunafb.c

306

cookie = (paddr_t)(trunc_page(dc->dc_videobase) + offset);

sys/arch/luna88k/dev/lunafb.c

308

if (offset >= 0 &&

sys/arch/luna88k/dev/lunafb.c

309

offset < dc->dc_rowbytes * dc->dc_ht * hwplanebits + PAGE_SIZE)

sys/arch/luna88k/dev/lunafb.c

310

cookie = (paddr_t)(trunc_page(OMFB_FB_RADDR) + offset);

sys/arch/luna88k/dev/mb89352.c

1013

ti->offset = sc->sc_imess[4];

sys/arch/luna88k/dev/mb89352.c

1015

if (ti->offset == 0) {

sys/arch/luna88k/dev/mb89352.c

1018

ti->offset > 8) {

sys/arch/luna88k/dev/mb89352.c

1019

ti->period = ti->offset = 0;

sys/arch/luna88k/dev/mb89352.c

1025

ti->offset, ti->period * 4);

sys/arch/luna88k/dev/mb89352.c

1178

sc->sc_omess[0] = ti->offset;

sys/arch/luna88k/dev/mb89352.c

1794

ti->period = ti->offset = 0;

sys/arch/luna88k/dev/mb89352.c

331

ti->offset = SPC_SYNC_REQ_ACK_OFS;

sys/arch/luna88k/dev/mb89352.c

333

ti->period = ti->offset = 0;

sys/arch/luna88k/dev/mb89352.c

515

if (ti->offset != 0)

sys/arch/luna88k/dev/mb89352.c

517

((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);

sys/arch/luna88k/dev/mb89352.c

962

ti->period = ti->offset = 0;

sys/arch/luna88k/dev/mb89352.c

970

ti->period = ti->offset = 0;

sys/arch/luna88k/dev/mb89352var.h

108

u_char offset; /* Offset suggestion */

sys/arch/luna88k/dev/xp.c

237

xpmmap(dev_t dev, off_t offset, int prot)

sys/arch/luna88k/dev/xp.c

248

if (offset >= 0 &&

sys/arch/luna88k/dev/xp.c

249

offset < sc->sc_shm_size) {

sys/arch/luna88k/dev/xp.c

250

pa = (paddr_t)(trunc_page(sc->sc_shm_base) + offset);

sys/arch/luna88k/include/bus.h

134

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/luna88k/include/bus.h

136

*nbshp = bsh + offset;

sys/arch/luna88k/include/bus.h

202

bus_addr_t offset, u_int8_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

205

*dest++ = bus_space_read_1(tag, handle, offset);

sys/arch/luna88k/include/bus.h

210

bus_addr_t offset, u_int16_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

213

*dest++ = bus_space_read_2(tag, handle, offset);

sys/arch/luna88k/include/bus.h

218

bus_addr_t offset, u_int32_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

221

*dest++ = bus_space_read_4(tag, handle, offset);

sys/arch/luna88k/include/bus.h

230

bus_addr_t offset, u_int8_t *dest, size_t size)

sys/arch/luna88k/include/bus.h

235

__bus_space_read_2(tag, handle, offset);

sys/arch/luna88k/include/bus.h

242

bus_addr_t offset, u_int8_t *dest, size_t size)

sys/arch/luna88k/include/bus.h

247

__bus_space_read_4(tag, handle, offset);

sys/arch/luna88k/include/bus.h

264

bus_addr_t offset, u_int8_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

267

*dest++ = bus_space_read_1(tag, handle, offset++);

sys/arch/luna88k/include/bus.h

272

bus_addr_t offset, u_int16_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

275

*dest++ = bus_space_read_2(tag, handle, offset);

sys/arch/luna88k/include/bus.h

276

offset += 2;

sys/arch/luna88k/include/bus.h

282

bus_addr_t offset, u_int32_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

285

*dest++ = bus_space_read_4(tag, handle, offset);

sys/arch/luna88k/include/bus.h

286

offset += 4;

sys/arch/luna88k/include/bus.h

335

bus_addr_t offset, u_int8_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

338

bus_space_write_1(tag, handle, offset, *dest++);

sys/arch/luna88k/include/bus.h

343

bus_addr_t offset, u_int16_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

346

bus_space_write_2(tag, handle, offset, *dest++);

sys/arch/luna88k/include/bus.h

351

bus_addr_t offset, u_int32_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

354

bus_space_write_4(tag, handle, offset, *dest++);

sys/arch/luna88k/include/bus.h

364

bus_addr_t offset, u_int8_t *dest, size_t size)

sys/arch/luna88k/include/bus.h

368

__bus_space_write_2(tag, handle, offset,*(u_int16_t *)dest);

sys/arch/luna88k/include/bus.h

375

bus_addr_t offset, u_int8_t *dest, size_t size)

sys/arch/luna88k/include/bus.h

379

__bus_space_write_4(tag, handle, offset, *(u_int32_t *)dest);

sys/arch/luna88k/include/bus.h

395

bus_addr_t offset, u_int8_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

398

bus_space_write_1(tag, handle, offset++, *dest++);

sys/arch/luna88k/include/bus.h

403

bus_addr_t offset, u_int16_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

406

bus_space_write_2(tag, handle, offset, *dest++);

sys/arch/luna88k/include/bus.h

407

offset += 2;

sys/arch/luna88k/include/bus.h

413

bus_addr_t offset, u_int32_t *dest, size_t count)

sys/arch/luna88k/include/bus.h

416

bus_space_write_4(tag, handle, offset, *dest++);

sys/arch/luna88k/include/bus.h

417

offset += 4;

sys/arch/luna88k/include/bus.h

437

bus_addr_t offset, u_int8_t value, size_t count)

sys/arch/luna88k/include/bus.h

440

bus_space_write_1(tag, handle, offset, value);

sys/arch/luna88k/include/bus.h

445

bus_addr_t offset, u_int16_t value, size_t count)

sys/arch/luna88k/include/bus.h

448

bus_space_write_2(tag, handle, offset, value);

sys/arch/luna88k/include/bus.h

453

bus_addr_t offset, u_int32_t value, size_t count)

sys/arch/luna88k/include/bus.h

456

bus_space_write_4(tag, handle, offset, value);

sys/arch/luna88k/include/bus.h

475

bus_addr_t offset, u_int8_t value, size_t count)

sys/arch/luna88k/include/bus.h

478

bus_space_write_1(tag, handle, offset++, value);

sys/arch/luna88k/include/bus.h

483

bus_addr_t offset, u_int16_t value, size_t count)

sys/arch/luna88k/include/bus.h

486

bus_space_write_2(tag, handle, offset, value);

sys/arch/luna88k/include/bus.h

487

offset += 2;

sys/arch/luna88k/include/bus.h

493

bus_addr_t offset, u_int32_t value, size_t count)

sys/arch/luna88k/include/bus.h

496

bus_space_write_4(tag, handle, offset, value);

sys/arch/luna88k/include/bus.h

497

offset += 4;

sys/arch/luna88k/include/loadfile_machdep.h

37

#define LOADADDR(a) (((u_long)(a)) + offset)

sys/arch/m88k/m88k/db_disasm.c

591

u_int32_t offset = inst & 0x1f;

sys/arch/m88k/m88k/db_disasm.c

596

db_printf("<%d>", offset);

sys/arch/m88k/m88k/db_interface.c

173

db_expr_t offset;

sys/arch/m88k/m88k/db_interface.c

233

&name, &offset);

sys/arch/m88k/m88k/db_interface.c

234

if (name != NULL && (u_int)offset <= db_maxoff)

sys/arch/m88k/m88k/db_interface.c

235

db_printf("%s+0x%08x", name, (u_int)offset);

sys/arch/m88k/m88k/db_interface.c

242

&name, &offset);

sys/arch/m88k/m88k/db_interface.c

243

if (name != NULL && (u_int)offset <= db_maxoff)

sys/arch/m88k/m88k/db_interface.c

244

db_printf("%s+0x%08x", name, (u_int)offset);

sys/arch/m88k/m88k/db_interface.c

253

&name, &offset);

sys/arch/m88k/m88k/db_interface.c

254

if (name != NULL && (u_int)offset <= db_maxoff)

sys/arch/m88k/m88k/db_interface.c

255

db_printf("%s+0x%08x", name, (u_int)offset);

sys/arch/m88k/m88k/db_interface.c

294

&name, &offset);

sys/arch/m88k/m88k/db_interface.c

295

if (name != NULL && (u_int)offset <= db_maxoff)

sys/arch/m88k/m88k/db_interface.c

296

db_printf("%s+0x%08x", name, (u_int)offset);

sys/arch/m88k/m88k/db_interface.c

307

&name, &offset);

sys/arch/m88k/m88k/db_interface.c

308

if (name != NULL && (u_int)offset <= db_maxoff)

sys/arch/m88k/m88k/db_interface.c

310

(u_int)offset);

sys/arch/m88k/m88k/db_interface.c

320

&name, &offset);

sys/arch/m88k/m88k/db_interface.c

322

(u_int)offset <= db_maxoff)

sys/arch/m88k/m88k/db_interface.c

324

(u_int)offset);

sys/arch/m88k/m88k/db_interface.c

539

db_expr_t offset;

sys/arch/m88k/m88k/db_interface.c

544

db_find_xtrn_sym_and_offset(l, &name, &offset);

sys/arch/m88k/m88k/db_interface.c

545

if (name && (u_int)offset <= db_maxoff)

sys/arch/m88k/m88k/db_interface.c

546

db_printf("stopped at 0x%lx (%s+0x%lx)\n", l, name, offset);

sys/arch/m88k/m88k/m88100_machdep.c

108

dmax += dmt_en_info[enbits].offset;

sys/arch/m88k/m88k/m88100_machdep.c

181

dmax += dmt_en_info[enbits].offset;

sys/arch/m88k/m88k/m88100_machdep.c

49

unsigned char offset;

sys/arch/macppc/dev/i2s.c

776

i2s_mute(u_int offset, int mute)

sys/arch/macppc/dev/i2s.c

778

if (offset == 0)

sys/arch/macppc/dev/i2s.c

781

DPRINTF(("gpio: %x, %d -> ", offset, macobio_read(offset) & GPIO_DATA));

sys/arch/macppc/dev/i2s.c

784

if (mute == (macobio_read(offset) & GPIO_DATA))

sys/arch/macppc/dev/i2s.c

785

macobio_write(offset, !mute | GPIO_DDR_OUTPUT);

sys/arch/macppc/dev/i2s.c

787

DPRINTF(("%d\n", macobio_read(offset) & GPIO_DATA));

sys/arch/macppc/dev/if_mc.c

1001

sc->sc_rxframe.rx_frame = sc->sc_rxbuf + offset;

sys/arch/macppc/dev/if_mc.c

964

int status, offset, statoff;

sys/arch/macppc/dev/if_mc.c

995

offset = i * MACE_BUFLEN;

sys/arch/macppc/dev/if_mc.c

996

statoff = offset + datalen;

sys/arch/macppc/dev/uni_n.c

204

memc_read(struct memc_softc *sc, int offset)

sys/arch/macppc/dev/uni_n.c

206

return in32(sc->sc_baseaddr + offset);

sys/arch/macppc/dev/uni_n.c

210

memc_write(struct memc_softc *sc, int offset, uint32_t value)

sys/arch/macppc/dev/uni_n.c

212

out32(sc->sc_baseaddr + offset, value);

sys/arch/macppc/dev/uni_n.c

216

memc_enable(struct memc_softc *sc, int offset, uint32_t bits)

sys/arch/macppc/dev/uni_n.c

218

bits |= memc_read(sc, offset);

sys/arch/macppc/dev/uni_n.c

219

memc_write(sc, offset, bits);

sys/arch/macppc/dev/uni_n.c

223

memc_disable(struct memc_softc *sc, int offset, uint32_t bits)

sys/arch/macppc/dev/uni_n.c

225

bits = memc_read(sc, offset) & ~bits;

sys/arch/macppc/dev/uni_n.c

226

memc_write(sc, offset, bits);

sys/arch/macppc/include/bus.h

193

bus_size_t offset, u_int8_t *addr, size_t count)

sys/arch/macppc/include/bus.h

195

volatile u_int8_t *s = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

204

bus_size_t offset, u_int16_t *addr, size_t count)

sys/arch/macppc/include/bus.h

206

volatile u_int16_t *s = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

216

bus_size_t offset, u_int32_t *addr, size_t count)

sys/arch/macppc/include/bus.h

218

volatile u_int32_t *s = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

242

bus_size_t offset, const u_int8_t *addr, size_t count)

sys/arch/macppc/include/bus.h

244

volatile u_int8_t *d = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

253

bus_size_t offset, const u_int16_t *addr, size_t count)

sys/arch/macppc/include/bus.h

255

volatile u_int16_t *d = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

265

bus_size_t offset, const u_int32_t *addr, size_t count)

sys/arch/macppc/include/bus.h

267

volatile u_int32_t *d = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

290

bus_size_t offset, u_int8_t *addr, size_t count)

sys/arch/macppc/include/bus.h

292

volatile u_int16_t *s = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

304

bus_size_t offset, u_int8_t *addr, size_t count)

sys/arch/macppc/include/bus.h

306

volatile u_int32_t *s = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

333

bus_size_t offset, const u_int8_t *addr, size_t count)

sys/arch/macppc/include/bus.h

335

volatile u_int16_t *d = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

347

bus_size_t offset, const u_int8_t *addr, size_t count)

sys/arch/macppc/include/bus.h

349

volatile u_int32_t *d = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

381

bus_size_t offset, u_int8_t val, size_t count)

sys/arch/macppc/include/bus.h

383

volatile u_int8_t *d = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

392

bus_size_t offset, u_int16_t val, size_t count)

sys/arch/macppc/include/bus.h

394

volatile u_int16_t *d = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

404

bus_size_t offset, u_int32_t val, size_t count)

sys/arch/macppc/include/bus.h

406

volatile u_int32_t *d = __BA(tag, bsh, offset);

sys/arch/macppc/include/bus.h

70

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);

sys/arch/macppc/include/loadfile_machdep.h

39

#define LOADADDR(a) (((u_long)(a)) + offset)

sys/arch/macppc/macppc/disksubr.c

189

int offset;

sys/arch/macppc/macppc/disksubr.c

200

offset = 0;

sys/arch/macppc/macppc/disksubr.c

204

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/macppc/macppc/disksubr.c

211

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/macppc/macppc/machdep.c

336

long offset = (u_long)handler - (u_long)&extint_call;

sys/arch/macppc/macppc/machdep.c

340

if (offset > 0x1ffffff || offset < -0x1ffffff)

sys/arch/macppc/macppc/machdep.c

346

offset &= 0x3ffffff;

sys/arch/macppc/macppc/machdep.c

347

extint_call = (extint_call & 0xfc000003) | offset;

sys/arch/macppc/pci/ht.c

150

ht_conf_read(void *cpv, pcitag_t tag, int offset)

sys/arch/macppc/pci/ht.c

159

printf("ht_conf_read: tag=%x, offset=%x\n", val, offset);

sys/arch/macppc/pci/ht.c

163

val |= (offset << 2);

sys/arch/macppc/pci/ht.c

170

val |= offset;

sys/arch/macppc/pci/ht.c

173

val |= offset;

sys/arch/macppc/pci/ht.c

183

ht_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)

sys/arch/macppc/pci/ht.c

192

val, offset, data);

sys/arch/macppc/pci/ht.c

196

val |= (offset << 2);

sys/arch/macppc/pci/ht.c

204

val |= offset;

sys/arch/macppc/pci/ht.c

208

val |= offset;

sys/arch/macppc/pci/macobio.c

240

macobio_enable(int offset, u_int32_t bits)

sys/arch/macppc/pci/macobio.c

246

bits |= in32rb(sc->obiomem + offset);

sys/arch/macppc/pci/macobio.c

247

out32rb(sc->obiomem + offset, bits);

sys/arch/macppc/pci/macobio.c

250

macobio_disable(int offset, u_int32_t bits)

sys/arch/macppc/pci/macobio.c

256

bits = in32rb(sc->obiomem + offset) & ~bits;

sys/arch/macppc/pci/macobio.c

257

out32rb(sc->obiomem + offset, bits);

sys/arch/macppc/pci/macobio.c

261

macobio_read(int offset)

sys/arch/macppc/pci/macobio.c

267

return in8rb(sc->obiomem + offset);

sys/arch/macppc/pci/macobio.c

271

macobio_write(int offset, uint8_t bits)

sys/arch/macppc/pci/macobio.c

277

out8rb(sc->obiomem + offset, bits);

sys/arch/macppc/pci/mpcpcibus.c

440

mpc_gen_config_reg(void *cpv, pcitag_t tag, int offset)

sys/arch/macppc/pci/mpcpcibus.c

449

reg = val | offset | 1;

sys/arch/macppc/pci/mpcpcibus.c

450

reg |= (offset >> 8) << 28;

sys/arch/macppc/pci/mpcpcibus.c

462

reg = 1 << (dev) | fcn << 8 | offset;

sys/arch/macppc/pci/mpcpcibus.c

469

reg = val | offset | 1;

sys/arch/macppc/pci/mpcpcibus.c

475

reg = 0x80000000 | val | offset;

sys/arch/macppc/pci/mpcpcibus.c

483

mpc_conf_read(void *cpv, pcitag_t tag, int offset)

sys/arch/macppc/pci/mpcpcibus.c

493

if (offset & 3 ||

sys/arch/macppc/pci/mpcpcibus.c

494

offset < 0 || offset >= PCI_CONFIG_SPACE_SIZE) {

sys/arch/macppc/pci/mpcpcibus.c

496

printf ("pci_conf_read: bad reg %x\n", offset);

sys/arch/macppc/pci/mpcpcibus.c

50

u_int32_t mpc_gen_config_reg(void *cpv, pcitag_t tag, int offset);

sys/arch/macppc/pci/mpcpcibus.c

501

reg = mpc_gen_config_reg(cpv, tag, offset);

sys/arch/macppc/pci/mpcpcibus.c

506

if ((cp->config_type & 2) && (offset & 0x04))

sys/arch/macppc/pci/mpcpcibus.c

529

if (!((offset == 0) && (data == 0xffffffff))) {

sys/arch/macppc/pci/mpcpcibus.c

533

offset);

sys/arch/macppc/pci/mpcpcibus.c

543

mpc_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)

sys/arch/macppc/pci/mpcpcibus.c

550

reg = mpc_gen_config_reg(cpv, tag, offset);

sys/arch/macppc/pci/mpcpcibus.c

556

if ((cp->config_type & 2) && (offset & 0x04))

sys/arch/macppc/pci/mpcpcibus.c

564

dev, fcn, offset);

sys/arch/macppc/pci/vgafb.c

232

wdf->offset = 0;

sys/arch/macppc/stand/hfs.c

90

hfs_seek(struct open_file *f, off_t offset, int where)

sys/arch/macppc/stand/hfs.c

94

return OF_seek(OF_fd, offset);

sys/arch/mips64/mips64/clock.c

220

uint32_t offset = 16, t0;

sys/arch/mips64/mips64/clock.c

224

cp0_set_compare(t0 + offset);

sys/arch/mips64/mips64/clock.c

225

if (cp0_get_count() - t0 < offset)

sys/arch/mips64/mips64/clock.c

227

offset *= 2;

sys/arch/octeon/dev/amdcf.c

813

cfi_erase_block(struct amdcf_softc *sc, u_int offset)

sys/arch/octeon/dev/amdcf.c

817

if (offset > sc->sc_size)

sys/arch/octeon/dev/amdcf.c

823

cfi_amd_write(sc, offset, 0, CFI_AMD_BLOCK_ERASE);

sys/arch/octeon/dev/amdcf.c

825

error = cfi_wait_ready(sc, offset, sc->sc_erase_timeout,

sys/arch/octeon/dev/amdcf.c

898

cfi_read(struct amdcf_softc *sc, bus_size_t base, bus_size_t offset)

sys/arch/octeon/dev/amdcf.c

901

base | (offset * sc->sc_shift));

sys/arch/octeon/dev/amdcf.c

905

cfi_write(struct amdcf_softc *sc, bus_size_t base, bus_size_t offset,

sys/arch/octeon/dev/amdcf.c

909

base | (offset * sc->sc_shift), val);

sys/arch/octeon/dev/cn30xxfpareg.h

295

uint64_t offset :62;

sys/arch/octeon/dev/cn30xxfpareg.h

300

uint64_t offset :31;

sys/arch/octeon/dev/cn30xxfpareg.h

306

uint64_t offset :29;

sys/arch/octeon/dev/cn30xxfpareg.h

321

uint64_t offset :36;

sys/arch/octeon/dev/cn30xxfpareg.h

327

uint64_t offset :36;

sys/arch/octeon/dev/cn30xxfpareg.h

336

uint64_t offset :36;

sys/arch/octeon/dev/octdwctwo.c

278

octdwctwo_reg2_rd(struct octdwctwo_softc *sc, bus_size_t offset)

sys/arch/octeon/dev/octdwctwo.c

282

value = bus_space_read_8(sc->sc_bust, sc->sc_regh2, offset);

sys/arch/octeon/dev/octdwctwo.c

287

octdwctwo_reg2_wr(struct octdwctwo_softc *sc, bus_size_t offset, u_int64_t value)

sys/arch/octeon/dev/octdwctwo.c

289

bus_space_write_8(sc->sc_bust, sc->sc_regh2, offset, value);

sys/arch/octeon/dev/octdwctwo.c

291

bus_space_read_8(sc->sc_bust, sc->sc_regh2, offset);

sys/arch/octeon/dev/octdwctwo.c

295

octdwctwo_reg_set(struct octdwctwo_softc *sc, bus_size_t offset,

sys/arch/octeon/dev/octdwctwo.c

299

value = bus_space_read_8(sc->sc_bust, sc->sc_regh, offset);

sys/arch/octeon/dev/octdwctwo.c

302

bus_space_write_8(sc->sc_bust, sc->sc_regh, offset, value);

sys/arch/octeon/dev/octdwctwo.c

303

bus_space_read_8(sc->sc_bust, sc->sc_regh, offset);

sys/arch/octeon/dev/octdwctwo.c

307

octdwctwo_reg_clear(struct octdwctwo_softc *sc, bus_size_t offset,

sys/arch/octeon/dev/octdwctwo.c

311

value = bus_space_read_8(sc->sc_bust, sc->sc_regh, offset);

sys/arch/octeon/dev/octdwctwo.c

314

bus_space_write_8(sc->sc_bust, sc->sc_regh, offset, value);

sys/arch/octeon/dev/octdwctwo.c

315

bus_space_read_8(sc->sc_bust, sc->sc_regh, offset);

sys/arch/octeon/dev/octeon_pcibus.c

322

octeon_pcibus_pci_conf_read(void *v, pcitag_t tag, int offset)

sys/arch/octeon/dev/octeon_pcibus.c

328

if (offset & 0x4){

sys/arch/octeon/dev/octeon_pcibus.c

329

cfgoff = OCTEON_PCI_CFG1 + (offset & 0xfff8);

sys/arch/octeon/dev/octeon_pcibus.c

331

cfgoff = OCTEON_PCI_CFG0 + (offset & 0xfff8);

sys/arch/octeon/dev/octeon_pcibus.c

334

cfgoff = tag + offset;

sys/arch/octeon/dev/octeon_pcibus.c

335

if (offset & 0x4) {

sys/arch/octeon/dev/octeon_pcibus.c

347

octeon_pcibus_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data)

sys/arch/octeon/dev/octeon_pcibus.c

352

if (offset & 0x4){

sys/arch/octeon/dev/octeon_pcibus.c

353

cfgoff = OCTEON_PCI_CFG1 + (offset & 0xfff8);

sys/arch/octeon/dev/octeon_pcibus.c

355

cfgoff = OCTEON_PCI_CFG0 + (offset & 0xfff8);

sys/arch/octeon/dev/octeon_pcibus.c

358

cfgoff = tag + offset;

sys/arch/octeon/dev/octeon_pcibus.c

359

if (offset & 0x4){

sys/arch/octeon/dev/octpcie.c

747

octpcie_conf_read(void *v, pcitag_t tag, int offset)

sys/arch/octeon/dev/octpcie.c

755

tag | (offset & 0xfffc));

sys/arch/octeon/dev/octpcie.c

761

octpcie_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data)

sys/arch/octeon/dev/octpcie.c

769

tag | (offset & 0xfffc), data);

sys/arch/octeon/include/bus.h

299

bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,

sys/arch/octeon/include/loadfile_machdep.h

39

#define LOADADDR(a) (((u_long)(a)) + offset)

sys/arch/octeon/include/octeonvar.h

383

octeon_lmtdma_write_8(off_t offset, uint64_t value)

sys/arch/octeon/include/octeonvar.h

385

*(volatile uint64_t *)(0xffffffffffffa400ULL + offset) = value;

sys/arch/octeon/include/octeonvar.h

389

octeon_cvmseg_read_8(size_t offset)

sys/arch/octeon/include/octeonvar.h

391

return *(volatile uint64_t *)(0xffffffffffff8000ULL + offset);

sys/arch/octeon/include/octeonvar.h

395

octeon_cvmseg_write_8(size_t offset, uint64_t value)

sys/arch/octeon/include/octeonvar.h

397

*(volatile uint64_t *)(0xffffffffffff8000ULL + offset) = value;

sys/arch/octeon/octeon/bus_space.c

177

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/octeon/octeon/bus_space.c

179

*nbshp = bsh + offset;

sys/arch/octeon/octeon/disksubr.c

101

int offset;

sys/arch/octeon/octeon/disksubr.c

117

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/octeon/octeon/disksubr.c

119

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/powerpc/ddb/db_disasm.c

572

db_expr_t offset;

sys/arch/powerpc/ddb/db_disasm.c

641

db_find_sym_and_offset(LI, &name, &offset);

sys/arch/powerpc/ddb/db_disasm.c

643

if (offset == 0) {

sys/arch/powerpc/ddb/db_disasm.c

650

offset);

sys/arch/powerpc/ddb/db_disasm.c

679

db_find_sym_and_offset(BD, &name, &offset);

sys/arch/powerpc/ddb/db_disasm.c

681

if (offset == 0) {

sys/arch/powerpc/ddb/db_disasm.c

687

"0x%x (%s+0x%lx)", BD, name, offset);

sys/arch/powerpc/ddb/db_trace.c

137

db_expr_t offset;

sys/arch/powerpc/ddb/db_trace.c

169

sym = db_search_symbol(lr - 4, DB_STGY_ANY, &offset);

sys/arch/powerpc/powerpc/bus_dma.c

431

_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,

sys/arch/powerpc/powerpc/bus_dma.c

441

if (offset >= map->dm_segs[i].ds_len) {

sys/arch/powerpc/powerpc/bus_dma.c

442

offset -= map->dm_segs[i].ds_len;

sys/arch/powerpc/powerpc/bus_dma.c

446

minlen = len < map->dm_segs[i].ds_len - offset ?

sys/arch/powerpc/powerpc/bus_dma.c

447

len : map->dm_segs[i].ds_len - offset;

sys/arch/powerpc/powerpc/bus_dma.c

449

addr = map->dm_segs[i].ds_addr + offset;

sys/arch/powerpc/powerpc/bus_space.c

377

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/powerpc/powerpc/bus_space.c

379

*nbshp = bsh + offset;

sys/arch/powerpc/powerpc/trap.c

235

db_expr_t offset;

sys/arch/powerpc/powerpc/trap.c

429

db_find_sym_and_offset(frame->srr0, &name, &offset);

sys/arch/powerpc/powerpc/trap.c

432

offset = frame->srr0;

sys/arch/powerpc/powerpc/trap.c

436

offset = frame->srr0;

sys/arch/powerpc/powerpc/trap.c

439

type, frame->srr1, frame->srr0, name, offset, frame->lr);

sys/arch/powerpc64/dev/astfb.c

205

wdf->offset = 0;

sys/arch/powerpc64/dev/pci_machdep.c

54

int bir, offset;

sys/arch/powerpc64/dev/pci_machdep.c

62

offset = (table & PCI_MSIX_TABLE_OFF);

sys/arch/powerpc64/dev/pci_machdep.c

68

bus_space_map(memt, base + offset, tblsz * 16, 0, memh))

sys/arch/powerpc64/dev/phb.c

431

int i, len, offset, nentries;

sys/arch/powerpc64/dev/phb.c

470

offset = PHB_DMA_OFFSET >> tce_page_shift;

sys/arch/powerpc64/dev/phb.c

472

tce[i + offset] = pa | IODA_TCE_READ | IODA_TCE_WRITE;

sys/arch/powerpc64/include/bus.h

311

bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,

sys/arch/powerpc64/powerpc64/bus_space.c

209

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/powerpc64/powerpc64/bus_space.c

211

*nbshp = bsh + offset;

sys/arch/powerpc64/powerpc64/db_disasm.c

572

db_expr_t offset;

sys/arch/powerpc64/powerpc64/db_disasm.c

641

db_find_sym_and_offset(LI, &name, &offset);

sys/arch/powerpc64/powerpc64/db_disasm.c

643

if (offset == 0) {

sys/arch/powerpc64/powerpc64/db_disasm.c

650

offset);

sys/arch/powerpc64/powerpc64/db_disasm.c

679

db_find_sym_and_offset(BD, &name, &offset);

sys/arch/powerpc64/powerpc64/db_disasm.c

681

if (offset == 0) {

sys/arch/powerpc64/powerpc64/db_disasm.c

687

"0x%x (%s+0x%lx)", BD, name, offset);

sys/arch/powerpc64/powerpc64/db_interface.c

111

Elf_Addr offset;

sys/arch/powerpc64/powerpc64/db_interface.c

116

offset = (Elf_Addr)db_machine_init - (Elf_Addr)val;

sys/arch/powerpc64/powerpc64/db_interface.c

119

symp->st_value += offset;

sys/arch/powerpc64/powerpc64/db_trace.c

100

db_expr_t offset;

sys/arch/powerpc64/powerpc64/db_trace.c

130

sym = db_search_symbol(callpc, DB_STGY_ANY, &offset);

sys/arch/powerpc64/powerpc64/disksubr.c

100

int offset;

sys/arch/powerpc64/powerpc64/disksubr.c

116

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/powerpc64/powerpc64/disksubr.c

118

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/powerpc64/powerpc64/pmap.c

1495

int offset;

sys/arch/powerpc64/powerpc64/pmap.c

1498

for (offset = 0; offset < PAGE_SIZE; offset += cacheline_size)

sys/arch/powerpc64/powerpc64/pmap.c

1499

__asm volatile ("dcbz 0, %0" :: "r"(va + offset));

sys/arch/powerpc64/powerpc64/pmap.c

1508

int offset;

sys/arch/powerpc64/powerpc64/pmap.c

1511

for (offset = 0; offset < PAGE_SIZE; offset += cacheline_size)

sys/arch/powerpc64/powerpc64/pmap.c

1512

__asm volatile ("dcbf 0, %0" :: "r"(va + offset));

sys/arch/riscv64/dev/pci_machdep.c

54

int bir, offset;

sys/arch/riscv64/dev/pci_machdep.c

62

offset = (table & PCI_MSIX_TABLE_OFF);

sys/arch/riscv64/dev/pci_machdep.c

68

bus_space_map(memt, base + offset, tblsz * 16, 0, memh))

sys/arch/riscv64/dev/smtgpio.c

128

bus_size_t offset = smtgpio_bank_offset(bank);

sys/arch/riscv64/dev/smtgpio.c

130

if (offset == (bus_size_t)-1 || pin >= 32)

sys/arch/riscv64/dev/smtgpio.c

134

HSET4(sc, offset + GPIO_PDR, (1U << pin));

sys/arch/riscv64/dev/smtgpio.c

136

HCLR4(sc, offset + GPIO_PDR, (1U << pin));

sys/arch/riscv64/dev/smtgpio.c

146

bus_size_t offset = smtgpio_bank_offset(bank);

sys/arch/riscv64/dev/smtgpio.c

150

if (offset == (bus_size_t)-1 || pin >= 32)

sys/arch/riscv64/dev/smtgpio.c

153

reg = HREAD4(sc, offset + GPIO_PLR);

sys/arch/riscv64/dev/smtgpio.c

167

bus_size_t offset = smtgpio_bank_offset(bank);

sys/arch/riscv64/dev/smtgpio.c

169

if (offset == (bus_size_t)-1 || pin >= 32)

sys/arch/riscv64/dev/smtgpio.c

175

HWRITE4(sc, offset + GPIO_PSR, (1U << pin));

sys/arch/riscv64/dev/smtgpio.c

177

HWRITE4(sc, offset + GPIO_PCR, (1U << pin));

sys/arch/riscv64/dev/smtpinctrl.c

105

bus_size_t offset = -1;

sys/arch/riscv64/dev/smtpinctrl.c

109

offset = (pin + 1) * 4;

sys/arch/riscv64/dev/smtpinctrl.c

111

offset = (pin + 24) * 4;

sys/arch/riscv64/dev/smtpinctrl.c

113

if (offset == -1) {

sys/arch/riscv64/dev/smtpinctrl.c

118

val = HREAD4(sc, offset);

sys/arch/riscv64/dev/smtpinctrl.c

137

HWRITE4(sc, offset, val);

sys/arch/riscv64/dev/stfclock.c

1123

uint32_t bits, offset;

sys/arch/riscv64/dev/stfclock.c

1125

offset = JH7110_SYSCLK_ASSERT_OFFSET + (idx / 32) * 4;

sys/arch/riscv64/dev/stfclock.c

1129

HSET4(sc, offset, bits);

sys/arch/riscv64/dev/stfclock.c

1131

HCLR4(sc, offset, bits);

sys/arch/riscv64/dev/stfclock.c

632

uint32_t bits, offset;

sys/arch/riscv64/dev/stfclock.c

634

offset = JH7110_AONCLK_ASSERT_OFFSET + (idx / 32) * 4;

sys/arch/riscv64/dev/stfclock.c

638

HSET4(sc, offset, bits);

sys/arch/riscv64/dev/stfclock.c

640

HCLR4(sc, offset, bits);

sys/arch/riscv64/dev/stfclock.c

847

uint32_t bits, offset;

sys/arch/riscv64/dev/stfclock.c

849

offset = JH7110_STGCLK_ASSERT_OFFSET + (idx / 32) * 4;

sys/arch/riscv64/dev/stfclock.c

853

HSET4(sc, offset, bits);

sys/arch/riscv64/dev/stfclock.c

855

HCLR4(sc, offset, bits);

sys/arch/riscv64/include/bus.h

326

bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,

sys/arch/riscv64/include/loadfile_machdep.h

40

#define LOADADDR(a) (((((u_long)(a)) + offset)&0x3fffffffff) + \

sys/arch/riscv64/riscv64/bus_space.c

254

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/riscv64/riscv64/bus_space.c

256

*nbshp = bsh + offset;

sys/arch/riscv64/riscv64/db_trace.c

101

subr = ra - (vaddr_t)offset;

sys/arch/riscv64/riscv64/db_trace.c

55

db_expr_t offset;

sys/arch/riscv64/riscv64/db_trace.c

79

sym = db_search_symbol(ra, DB_STGY_ANY, &offset);

sys/arch/riscv64/riscv64/disksubr.c

115

offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);

sys/arch/riscv64/riscv64/disksubr.c

117

dlp = (struct disklabel *)(bp->b_data + offset);

sys/arch/riscv64/riscv64/disksubr.c

99

int offset;

sys/arch/riscv64/stand/efiboot/efipxe.c

237

mtftp_seek(struct open_file *f, off_t offset, int where)

sys/arch/riscv64/stand/efiboot/efipxe.c

243

if (tftpfile->inbufoff + offset < 0 ||

sys/arch/riscv64/stand/efiboot/efipxe.c

244

tftpfile->inbufoff + offset > tftpfile->inbufsize) {

sys/arch/riscv64/stand/efiboot/efipxe.c

248

tftpfile->inbufoff += offset;

sys/arch/riscv64/stand/efiboot/efipxe.c

251

if (offset < 0 || offset > tftpfile->inbufsize) {

sys/arch/riscv64/stand/efiboot/efipxe.c

255

tftpfile->inbufoff = offset;

sys/arch/sh/dev/shpcic.c

1000

__shpcic_mem_write_1(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

1001

offset += 1;

sys/arch/sh/dev/shpcic.c

1007

bus_size_t offset, const uint16_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1010

__shpcic_mem_write_2(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

1011

offset += 2;

sys/arch/sh/dev/shpcic.c

1017

bus_size_t offset, const uint32_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1020

__shpcic_mem_write_4(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

1021

offset += 4;

sys/arch/sh/dev/shpcic.c

1031

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1035

__shpcic_io_write_2(bsh, offset, *(uint16_t *)addr);

sys/arch/sh/dev/shpcic.c

1037

offset += 2;

sys/arch/sh/dev/shpcic.c

1043

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1047

__shpcic_io_write_4(bsh, offset, *(uint32_t *)addr);

sys/arch/sh/dev/shpcic.c

1049

offset += 4;

sys/arch/sh/dev/shpcic.c

1055

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1059

__shpcic_mem_write_2(bsh, offset, *(uint16_t *)addr);

sys/arch/sh/dev/shpcic.c

1061

offset += 2;

sys/arch/sh/dev/shpcic.c

1067

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1071

__shpcic_mem_write_4(bsh, offset, *(uint32_t *)addr);

sys/arch/sh/dev/shpcic.c

1073

offset += 4;

sys/arch/sh/dev/shpcic.c

1082

bus_size_t offset, uint8_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1085

__shpcic_io_write_1(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1091

bus_size_t offset, uint16_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1094

__shpcic_io_write_2(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1100

bus_size_t offset, uint32_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1103

__shpcic_io_write_4(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1109

bus_size_t offset, uint8_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1112

__shpcic_mem_write_1(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1118

bus_size_t offset, uint16_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1121

__shpcic_mem_write_2(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1127

bus_size_t offset, uint32_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1130

__shpcic_mem_write_4(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1139

bus_size_t offset, uint8_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1142

__shpcic_io_write_1(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1143

offset += 1;

sys/arch/sh/dev/shpcic.c

1149

bus_size_t offset, uint16_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1152

__shpcic_io_write_2(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1153

offset += 2;

sys/arch/sh/dev/shpcic.c

1159

bus_size_t offset, uint32_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1162

__shpcic_io_write_4(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1163

offset += 4;

sys/arch/sh/dev/shpcic.c

1169

bus_size_t offset, uint8_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1172

__shpcic_mem_write_1(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1173

offset += 1;

sys/arch/sh/dev/shpcic.c

1179

bus_size_t offset, uint16_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1182

__shpcic_mem_write_2(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1183

offset += 2;

sys/arch/sh/dev/shpcic.c

1189

bus_size_t offset, uint32_t value, bus_size_t count)

sys/arch/sh/dev/shpcic.c

1192

__shpcic_mem_write_4(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

1193

offset += 4;

sys/arch/sh/dev/shpcic.c

367

bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)

sys/arch/sh/dev/shpcic.c

369

*nbshp = bsh + offset;

sys/arch/sh/dev/shpcic.c

401

bus_size_t offset);

sys/arch/sh/dev/shpcic.c

403

bus_size_t offset);

sys/arch/sh/dev/shpcic.c

405

bus_size_t offset);

sys/arch/sh/dev/shpcic.c

407

bus_size_t offset);

sys/arch/sh/dev/shpcic.c

409

bus_size_t offset);

sys/arch/sh/dev/shpcic.c

411

bus_size_t offset);

sys/arch/sh/dev/shpcic.c

414

__shpcic_io_read_1(bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

416

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;

sys/arch/sh/dev/shpcic.c

422

__shpcic_io_read_2(bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

424

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;

sys/arch/sh/dev/shpcic.c

430

__shpcic_io_read_4(bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

432

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;

sys/arch/sh/dev/shpcic.c

438

__shpcic_mem_read_1(bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

440

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;

sys/arch/sh/dev/shpcic.c

446

__shpcic_mem_read_2(bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

448

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;

sys/arch/sh/dev/shpcic.c

454

__shpcic_mem_read_4(bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

456

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;

sys/arch/sh/dev/shpcic.c

465

shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

469

value = __shpcic_io_read_1(bsh, offset);

sys/arch/sh/dev/shpcic.c

475

shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

479

value = __shpcic_io_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

485

shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

489

value = __shpcic_io_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

495

shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

499

value = __shpcic_mem_read_1(bsh, offset);

sys/arch/sh/dev/shpcic.c

505

shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

509

value = __shpcic_mem_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

515

shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)

sys/arch/sh/dev/shpcic.c

519

value = __shpcic_mem_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

529

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

532

*addr++ = __shpcic_io_read_1(bsh, offset);

sys/arch/sh/dev/shpcic.c

538

bus_size_t offset, uint16_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

541

*addr++ = __shpcic_io_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

547

bus_size_t offset, uint32_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

550

*addr++ = __shpcic_io_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

556

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

559

*addr++ = __shpcic_mem_read_1(bsh, offset);

sys/arch/sh/dev/shpcic.c

565

bus_size_t offset, uint16_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

568

*addr++ = __shpcic_mem_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

574

bus_size_t offset, uint32_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

577

*addr++ = __shpcic_mem_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

587

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

591

*(uint16_t *)addr = __shpcic_io_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

598

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

602

*(uint32_t *)addr = __shpcic_io_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

609

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

613

*(uint16_t *)addr = __shpcic_mem_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

620

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

624

*(uint32_t *)addr = __shpcic_mem_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

634

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

637

*addr++ = __shpcic_io_read_1(bsh, offset);

sys/arch/sh/dev/shpcic.c

638

offset += 1;

sys/arch/sh/dev/shpcic.c

644

bus_size_t offset, uint16_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

647

*addr++ = __shpcic_io_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

648

offset += 2;

sys/arch/sh/dev/shpcic.c

654

bus_size_t offset, uint32_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

657

*addr++ = __shpcic_io_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

658

offset += 4;

sys/arch/sh/dev/shpcic.c

664

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

667

*addr++ = __shpcic_mem_read_1(bsh, offset);

sys/arch/sh/dev/shpcic.c

668

offset += 1;

sys/arch/sh/dev/shpcic.c

674

bus_size_t offset, uint16_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

677

*addr++ = __shpcic_mem_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

678

offset += 2;

sys/arch/sh/dev/shpcic.c

684

bus_size_t offset, uint32_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

687

*addr++ = __shpcic_mem_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

688

offset += 4;

sys/arch/sh/dev/shpcic.c

698

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

702

*(uint16_t *)addr = __shpcic_io_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

704

offset += 2;

sys/arch/sh/dev/shpcic.c

710

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

714

*(uint32_t *)addr = __shpcic_io_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

716

offset += 4;

sys/arch/sh/dev/shpcic.c

722

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

726

*(uint16_t *)addr = __shpcic_mem_read_2(bsh, offset);

sys/arch/sh/dev/shpcic.c

728

offset += 2;

sys/arch/sh/dev/shpcic.c

734

bus_size_t offset, uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

738

*(uint32_t *)addr = __shpcic_mem_read_4(bsh, offset);

sys/arch/sh/dev/shpcic.c

740

offset += 4;

sys/arch/sh/dev/shpcic.c

746

bus_size_t offset, uint8_t value);

sys/arch/sh/dev/shpcic.c

748

bus_size_t offset, uint16_t value);

sys/arch/sh/dev/shpcic.c

750

bus_size_t offset, uint32_t value);

sys/arch/sh/dev/shpcic.c

752

bus_size_t offset, uint8_t value);

sys/arch/sh/dev/shpcic.c

754

bus_size_t offset, uint16_t value);

sys/arch/sh/dev/shpcic.c

756

bus_size_t offset, uint32_t value);

sys/arch/sh/dev/shpcic.c

759

__shpcic_io_write_1(bus_space_handle_t bsh, bus_size_t offset,

sys/arch/sh/dev/shpcic.c

762

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;

sys/arch/sh/dev/shpcic.c

768

__shpcic_io_write_2(bus_space_handle_t bsh, bus_size_t offset,

sys/arch/sh/dev/shpcic.c

771

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;

sys/arch/sh/dev/shpcic.c

777

__shpcic_io_write_4(bus_space_handle_t bsh, bus_size_t offset,

sys/arch/sh/dev/shpcic.c

780

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;

sys/arch/sh/dev/shpcic.c

786

__shpcic_mem_write_1(bus_space_handle_t bsh, bus_size_t offset,

sys/arch/sh/dev/shpcic.c

789

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;

sys/arch/sh/dev/shpcic.c

795

__shpcic_mem_write_2(bus_space_handle_t bsh, bus_size_t offset,

sys/arch/sh/dev/shpcic.c

798

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;

sys/arch/sh/dev/shpcic.c

804

__shpcic_mem_write_4(bus_space_handle_t bsh, bus_size_t offset,

sys/arch/sh/dev/shpcic.c

807

u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;

sys/arch/sh/dev/shpcic.c

817

bus_size_t offset, uint8_t value)

sys/arch/sh/dev/shpcic.c

819

__shpcic_io_write_1(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

824

bus_size_t offset, uint16_t value)

sys/arch/sh/dev/shpcic.c

826

__shpcic_io_write_2(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

831

bus_size_t offset, uint32_t value)

sys/arch/sh/dev/shpcic.c

833

__shpcic_io_write_4(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

838

bus_size_t offset, uint8_t value)

sys/arch/sh/dev/shpcic.c

840

__shpcic_mem_write_1(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

845

bus_size_t offset, uint16_t value)

sys/arch/sh/dev/shpcic.c

847

__shpcic_mem_write_2(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

852

bus_size_t offset, uint32_t value)

sys/arch/sh/dev/shpcic.c

854

__shpcic_mem_write_4(bsh, offset, value);

sys/arch/sh/dev/shpcic.c

862

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

865

__shpcic_io_write_1(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

871

bus_size_t offset, const uint16_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

874

__shpcic_io_write_2(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

880

bus_size_t offset, const uint32_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

883

__shpcic_io_write_4(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

889

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

892

__shpcic_mem_write_1(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

898

bus_size_t offset, const uint16_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

901

__shpcic_mem_write_2(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

907

bus_size_t offset, const uint32_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

910

__shpcic_mem_write_4(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

920

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

924

__shpcic_io_write_2(bsh, offset, *(uint16_t *)addr);

sys/arch/sh/dev/shpcic.c

931

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

935

__shpcic_io_write_4(bsh, offset, *(uint32_t *)addr);

sys/arch/sh/dev/shpcic.c

942

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

946

__shpcic_mem_write_2(bsh, offset, *(uint16_t *)addr);

sys/arch/sh/dev/shpcic.c

953

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

957

__shpcic_mem_write_4(bsh, offset, *(uint32_t *)addr);

sys/arch/sh/dev/shpcic.c

967

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

970

__shpcic_io_write_1(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

971

offset += 1;

sys/arch/sh/dev/shpcic.c

977

bus_size_t offset, const uint16_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

980

__shpcic_io_write_2(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

981

offset += 2;

sys/arch/sh/dev/shpcic.c

987

bus_size_t offset, const uint32_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcic.c

990

__shpcic_io_write_4(bsh, offset, *addr++);

sys/arch/sh/dev/shpcic.c

991

offset += 4;

sys/arch/sh/dev/shpcic.c

997

bus_size_t offset, const uint8_t *addr, bus_size_t count)

sys/arch/sh/dev/shpcicvar.h

103

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

105

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

107

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

109

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

113

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

115

bus_size_t offset, uint16_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

117

bus_size_t offset, uint32_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

119

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

121

bus_size_t offset, uint16_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

123

bus_size_t offset, uint32_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

127

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

129

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

131

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

133

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

137

bus_size_t offset, uint8_t data);

sys/arch/sh/dev/shpcicvar.h

139

bus_size_t offset, uint16_t data);

sys/arch/sh/dev/shpcicvar.h

141

bus_size_t offset, uint32_t data);

sys/arch/sh/dev/shpcicvar.h

143

bus_size_t offset, uint8_t data);

sys/arch/sh/dev/shpcicvar.h

145

bus_size_t offset, uint16_t data);

sys/arch/sh/dev/shpcicvar.h

147

bus_size_t offset, uint32_t data);

sys/arch/sh/dev/shpcicvar.h

151

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

153

bus_size_t offset, const uint16_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

155

bus_size_t offset, const uint32_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

157

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

159

bus_size_t offset, const uint16_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

161

bus_size_t offset, const uint32_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

165

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

167

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

169

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

171

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

175

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

177

bus_size_t offset, const uint16_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

179

bus_size_t offset, const uint32_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

181

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

183

bus_size_t offset, const uint16_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

185

bus_size_t offset, const uint32_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

189

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

191

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

193

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

195

bus_size_t offset, const uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

199

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

201

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

203

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

205

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

207

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

209

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

213

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

215

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

217

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

219

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

221

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

223

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

71

int shpcic_iomem_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset,

sys/arch/sh/dev/shpcicvar.h

80

uint8_t shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/sh/dev/shpcicvar.h

81

uint16_t shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/sh/dev/shpcicvar.h

82

uint32_t shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/sh/dev/shpcicvar.h

83

uint8_t shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/sh/dev/shpcicvar.h

84

uint16_t shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/sh/dev/shpcicvar.h

85

uint32_t shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);

sys/arch/sh/dev/shpcicvar.h

89

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

91

bus_size_t offset, uint16_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

93

bus_size_t offset, uint32_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

95

bus_size_t offset, uint8_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

97

bus_size_t offset, uint16_t *addr, bus_size_t count);

sys/arch/sh/dev/shpcicvar.h

99

bus_size_t offset, uint32_t *addr, bus_size_t count);

sys/arch/sh/sh/db_interface.c

583

db_expr_t offset;

sys/arch/sh/sh/db_interface.c

585

db_find_sym_and_offset((vaddr_t)value, &name, &offset);

sys/arch/sh/sh/db_interface.c

586

if (name != NULL && offset <= db_maxoff && offset != value)

sys/arch/sh/sh/db_trace.c

138

db_expr_t offset;

sys/arch/sh/sh/db_trace.c

145

sym = db_search_symbol(callpc, DB_STGY_ANY, &offset);

sys/arch/sh/sh/db_trace.c

156

if (lastframe == 0 && offset == 0) {

sys/arch/sh/sh/db_trace.c

163

db_nextframe(callpc - offset, &frame, &callpc);

sys/arch/sparc64/dev/central.c

168

int64_t offset = BUS_ADDR_PADDR(addr);

sys/arch/sparc64/dev/central.c

186

paddr = offset - sc->sc_range[i].coffset;

sys/arch/sparc64/dev/centralvar.h

51

#define central_bus_map(t, slot, offset, sz, flags, hp) \

sys/arch/sparc64/dev/centralvar.h

52

bus_space_map(t, BUS_ADDR(slot, offset), sz, flags, hp)

sys/arch/sparc64/dev/creator.c

254

wdf->offset = 0;

sys/arch/sparc64/dev/ebus.c

419

_ebus_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset,

sys/arch/sparc64/dev/ebus.c

429

(int)t->default_type, (unsigned long long)offset, (int)size,

sys/arch/sparc64/dev/ebus.c

441

(t, t0, offset, size, flags, hp));

sys/arch/sparc64/dev/ebus.c

444

hi = offset >> 32UL;

sys/arch/sparc64/dev/ebus.c

445

lo = offset & 0xffffffff;

sys/arch/sparc64/dev/ebus.c

466

(unsigned long long)offset, (unsigned long long)pciaddr));

sys/arch/sparc64/dev/ebus.c

477

bus_addr_t offset = paddr;

sys/arch/sparc64/dev/ebus.c

493

if (offset != paddr)

sys/arch/sparc64/dev/ebus_mainbus.c

186

ebus_mainbus_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset,

sys/arch/sparc64/dev/ebus_mainbus.c

196

(unsigned long long)offset, (int)size, (int)flags));

sys/arch/sparc64/dev/ebus_mainbus.c

207

(t, t0, offset, size, flags, hp));

sys/arch/sparc64/dev/ebus_mainbus.c

210

hi = offset >> 32UL;

sys/arch/sparc64/dev/ebus_mainbus.c

211

lo = offset & 0xffffffff;

sys/arch/sparc64/dev/ebus_mainbus.c

229

(unsigned long long)offset, (unsigned long long)addr));

sys/arch/sparc64/dev/fhc.c

188

int64_t offset = BUS_ADDR_PADDR(addr);

sys/arch/sparc64/dev/fhc.c

206

paddr = offset - sc->sc_range[i].coffset;

sys/arch/sparc64/dev/fhcvar.h

77

#define fhc_bus_map(t, slot, offset, sz, flags, hp) \

sys/arch/sparc64/dev/fhcvar.h

78

bus_space_map(t, BUS_ADDR(slot, offset), sz, flags, hp)

sys/arch/sparc64/dev/gfb.c

121

wdf->offset = 0;

sys/arch/sparc64/dev/gfxp.c

278

wdf->offset = 0;

sys/arch/sparc64/dev/gfxp.c

566

gfxp_indexed_write(struct gfxp_softc *sc, bus_size_t offset, uint32_t value)

sys/arch/sparc64/dev/gfxp.c

570

PM2V_INDEX_HIGH, offset >> 8);

sys/arch/sparc64/dev/gfxp.c

572

PM2V_INDEX_LOW, offset & 0xff);

sys/arch/sparc64/dev/ifb.c

564

wdf->offset = 0;

sys/arch/sparc64/dev/iommu.c

1530

bus_addr_t offset, bus_size_t len, int ops)

sys/arch/sparc64/dev/iommu.c

1542

if (offset < map->dm_segs[i].ds_len)

sys/arch/sparc64/dev/iommu.c

1544

offset -= map->dm_segs[i].ds_len;

sys/arch/sparc64/dev/iommu.c

1548

panic("iommu_dvmamap_sync: too short %lu", offset);

sys/arch/sparc64/dev/iommu.c

1551

count = MIN(map->dm_segs[i].ds_len - offset, len);

sys/arch/sparc64/dev/iommu.c

1553

map->dm_segs[i].ds_addr + offset, count))

sys/arch/sparc64/dev/iommu.c

1569

bus_addr_t offset, bus_size_t len, int ops)

sys/arch/sparc64/dev/iommu.c

1589

_iommu_dvmamap_sync(t, t0, map, offset, len, ops);

sys/arch/sparc64/dev/iommu.c

1833

paddr_t offset = pa & PAGE_MASK;

sys/arch/sparc64/dev/iommu.c

1842

return (e->ipe_va | offset);

sys/arch/sparc64/dev/machfb.c

351

wdf->offset = 0;

sys/arch/sparc64/dev/pci_machdep.c

568

int bir, offset;

sys/arch/sparc64/dev/pci_machdep.c

576

offset = (table & PCI_MSIX_TABLE_OFF);

sys/arch/sparc64/dev/pci_machdep.c

582

bus_space_map(memt, base + offset, tblsz * 16, 0, &memh))

sys/arch/sparc64/dev/pci_machdep.c

605

int bir, offset;

sys/arch/sparc64/dev/pci_machdep.c

613

offset = (table & PCI_MSIX_TABLE_OFF);

sys/arch/sparc64/dev/pci_machdep.c

619

bus_space_map(memt, base + offset, tblsz * 16, 0, memh))

sys/arch/sparc64/dev/psycho.c

1000

psycho_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset,

sys/arch/sparc64/dev/psycho.c

1007

"flags %d", t->default_type, (unsigned long long)offset,

sys/arch/sparc64/dev/psycho.c

1022

(t, t0, offset, size, flags, hp));

sys/arch/sparc64/dev/psycho.c

1031

paddr = pp->pp_range[i].phys_lo + offset;

sys/arch/sparc64/dev/psycho.c

1036

(long)ss, (long)offset,

sys/arch/sparc64/dev/psycho.c

1048

bus_addr_t offset = paddr;

sys/arch/sparc64/dev/psycho.c

1070

paddr = pp->pp_range[i].phys_lo + offset;

sys/arch/sparc64/dev/psycho.c

1074

(long)ss, (long)offset,

sys/arch/sparc64/dev/psycho.c

1330

bus_size_t offset, bus_size_t len, int ops)

sys/arch/sparc64/dev/pyro.c

613

pyro_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset,

sys/arch/sparc64/dev/pyro.c

621

(unsigned long long)offset,

sys/arch/sparc64/dev/pyro.c

635

(t, t0, offset, size, flags, hp));

sys/arch/sparc64/dev/pyro.c

644

paddr = pbm->pp_range[i].phys_lo + offset;

sys/arch/sparc64/dev/pyro.c

657

bus_addr_t offset = paddr;

sys/arch/sparc64/dev/pyro.c

677

paddr = pbm->pp_range[i].phys_lo + offset;

sys/arch/sparc64/dev/radeonfb.c

272

wdf->offset = 0;

sys/arch/sparc64/dev/raptor.c

261

wdf->offset = 0;

sys/arch/sparc64/dev/sbbc.c

316

sbbc_attach_tod(struct sbbc_softc *sc, uint32_t offset)

sys/arch/sparc64/dev/sbbc.c

321

tod = (struct sbbc_sram_tod *)(sc->sc_sram + offset);

sys/arch/sparc64/dev/sbbc.c

359

sbbc_attach_cons(struct sbbc_softc *sc, uint32_t offset)

sys/arch/sparc64/dev/sbbc.c

369

cons = (struct sbbc_sram_cons *)(sc->sc_sram + offset);

sys/arch/sparc64/dev/sbbc.c

374

sc->sc_sram_cons = sc->sc_sram + offset;

sys/arch/sparc64/dev/sbus.c

502

int64_t offset = BUS_ADDR_PADDR(addr);

sys/arch/sparc64/dev/sbus.c

522

paddr = sc->sc_range[i].poffset + offset;

sys/arch/sparc64/dev/sbus.c

526

(long)slot, (long)offset, (long)sc->sc_range[i].poffset,

sys/arch/sparc64/dev/sbus.c

536

sbus_bus_addr(bus_space_tag_t t, u_int btype, u_int offset)

sys/arch/sparc64/dev/sbus.c

547

baddr = sc->sc_range[i].poffset + offset;

sys/arch/sparc64/dev/schizo.c

665

schizo_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset,

sys/arch/sparc64/dev/schizo.c

673

(unsigned long long)offset,

sys/arch/sparc64/dev/schizo.c

687

(t, t0, offset, size, flags, hp));

sys/arch/sparc64/dev/schizo.c

696

paddr = pbm->sp_range[i].phys_lo + offset;

sys/arch/sparc64/dev/schizo.c

709

bus_addr_t offset = paddr;

sys/arch/sparc64/dev/schizo.c

729

paddr = pbm->sp_range[i].phys_lo + offset;

sys/arch/sparc64/dev/upa.c

173

upa_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset,

sys/arch/sparc64/dev/upa.c

188

(t, t0, offset, size, flags, hp));

sys/arch/sparc64/dev/upa.c

192

if (offset < sc->sc_range[i].ur_space)

sys/arch/sparc64/dev/upa.c

194

if (offset >= (sc->sc_range[i].ur_space +

sys/arch/sparc64/dev/upa.c

202

offset -= sc->sc_range[i].ur_space;

sys/arch/sparc64/dev/upa.c

203

offset += sc->sc_range[i].ur_addr;

sys/arch/sparc64/dev/upa.c

205

return ((*t->sparc_bus_map)(t, t0, offset, size, flags, hp));

sys/arch/sparc64/dev/vdsk.c

1090

sc->sc_vd->vd_desc[desc].offset = lba;

sys/arch/sparc64/dev/vdsk.c

95

uint64_t offset;

sys/arch/sparc64/dev/vdsp.c

1149

uio.uio_offset = dm->offset * DEV_BSIZE;

sys/arch/sparc64/dev/vdsp.c

1223

uio.uio_offset = vd->offset * DEV_BSIZE;

sys/arch/sparc64/dev/vdsp.c

1322

uio.uio_offset = vd->offset * DEV_BSIZE;

sys/arch/sparc64/dev/vdsp.c

158

uint64_t offset;

sys/arch/sparc64/dev/vdsp.c

176

uint64_t offset;

sys/arch/sparc64/dev/vgafb.c

215

wdf->offset = 0;

sys/arch/sparc64/dev/viommu.c

873

bus_addr_t offset, bus_size_t len, int ops)

sys/arch/sparc64/dev/viommu.c

891

_viommu_dvmamap_sync(t, t0, map, offset, len, ops);

sys/arch/sparc64/dev/vldcp.c

499

paddr_t pa, offset;

sys/arch/sparc64/dev/vldcp.c

524

offset = 0;

sys/arch/sparc64/dev/vldcp.c

529

hi->hi_cookie + offset, pa, nbytes, &nbytes);

sys/arch/sparc64/dev/vldcp.c

536

err = copyout(buf, (caddr_t)hi->hi_addr + offset, nbytes);

sys/arch/sparc64/dev/vldcp.c

543

offset += nbytes;

sys/arch/sparc64/dev/vldcp.c

548

offset = 0;

sys/arch/sparc64/dev/vldcp.c

552

err = copyin((caddr_t)hi->hi_addr + offset, buf, nbytes);

sys/arch/sparc64/dev/vldcp.c

559

hi->hi_cookie + offset, pa, nbytes, &nbytes);

sys/arch/sparc64/dev/vldcp.c

567

offset += nbytes;

sys/arch/sparc64/dev/vpci.c

538

vpci_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset,

sys/arch/sparc64/dev/vpci.c

549

(t, t0, offset, size, flags, hp));

sys/arch/sparc64/dev/vpci.c

553

if (ss == 0x02 && offset > 0xffffffff)

sys/arch/sparc64/dev/vpci.c

566

if (offset < child || offset >= child + rsize)

sys/arch/sparc64/dev/vpci.c

572

(t, t0, paddr + offset - child, size, flags, hp));

sys/arch/sparc64/dev/vpci.c

582

bus_addr_t offset = paddr;

sys/arch/sparc64/dev/vpci.c

595

paddr = pbm->vp_range[i].phys_lo + offset;

sys/arch/sparc64/include/loadfile_machdep.h

44

#define LOADADDR(a) (((u_long)(a) & 0x0fffffff) + offset)

sys/arch/sparc64/include/loadfile_machdep.h

56

#define LOADADDR(a) (((u_long)(a)) + offset)

sys/arch/sparc64/sparc64/db_trace.c

122

db_find_sym_and_offset(pc, &name, &offset);

sys/arch/sparc64/sparc64/db_trace.c

98

db_expr_t offset;

sys/arch/sparc64/sparc64/in4_cksum.c

91

extern int in_cksum_internal(struct mbuf *, int len, int offset, int sum);

sys/arch/sparc64/sparc64/machdep.c

1215

bus_addr_t offset, bus_size_t len, int ops)

sys/arch/sparc64/sparc64/machdep.c

1551

bus_space_handle_t handle, bus_size_t offset, bus_size_t size,

sys/arch/sparc64/sparc64/machdep.c

1555

nhandlep->bh_ptr += offset;

sys/arch/sparc64/sparc64/openfirm.c

761

cell_t offset;

sys/arch/sparc64/sparc64/openfirm.c

766

db_expr_t offset;

sys/arch/sparc64/sparc64/openfirm.c

781

args->offset = -1;

sys/arch/sparc64/sparc64/openfirm.c

788

symbol = db_search_symbol(value, 0, &offset);

sys/arch/sparc64/sparc64/openfirm.c

793

args->offset = -1;

sys/arch/sparc64/sparc64/openfirm.c

796

args->offset = offset;

sys/ddb/db_command.c

898

db_expr_t value, offset;

sys/ddb/db_command.c

907

db_find_xtrn_sym_and_offset((vaddr_t)value, &name, &offset);

sys/ddb/db_command.c

908

if (name != 0 && offset <= db_maxoff && offset != value) {

sys/ddb/db_command.c

910

if (offset != 0)

sys/ddb/db_command.c

913

(long)offset, DB_FORMAT_R, 1, 0));

sys/ddb/db_ctf.c

381

uint32_t offset = db_ctf.cth->cth_typeoff;

sys/ddb/db_ctf.c

387

while (offset < db_ctf.cth->cth_stroff) {

sys/ddb/db_ctf.c

391

ctt = (struct ctf_type *)(db_ctf.data + offset);

sys/ddb/db_ctf.c

397

db_printf("incorrect type at offset %u", offset);

sys/ddb/db_ctf.c

400

offset += toff;

sys/ddb/db_ctf.c

631

db_ctf_off2name(uint32_t offset)

sys/ddb/db_ctf.c

638

if (CTF_NAME_STID(offset) != CTF_STRTAB_0)

sys/ddb/db_ctf.c

641

if (CTF_NAME_OFFSET(offset) >= db_ctf.cth->cth_strlen)

sys/ddb/db_ctf.c

644

if (db_ctf.cth->cth_stroff + CTF_NAME_OFFSET(offset) >= db_ctf.dlen)

sys/ddb/db_ctf.c

647

name = db_ctf.data + db_ctf.cth->cth_stroff + CTF_NAME_OFFSET(offset);

sys/dev/acpi/acpi.c

1520

acpi_read_pmreg(struct acpi_softc *sc, int reg, int offset)

sys/dev/acpi/acpi.c

1531

KASSERT(offset == 0);

sys/dev/acpi/acpi.c

1543

KASSERT(offset == 0);

sys/dev/acpi/acpi.c

1555

return (acpi_read_pmreg(sc, ACPIREG_PM1A_EN, offset) |

sys/dev/acpi/acpi.c

1556

acpi_read_pmreg(sc, ACPIREG_PM1B_EN, offset));

sys/dev/acpi/acpi.c

1558

return (acpi_read_pmreg(sc, ACPIREG_PM1A_STS, offset) |

sys/dev/acpi/acpi.c

1559

acpi_read_pmreg(sc, ACPIREG_PM1B_STS, offset));

sys/dev/acpi/acpi.c

1561

return (acpi_read_pmreg(sc, ACPIREG_PM1A_CNT, offset) |

sys/dev/acpi/acpi.c

1562

acpi_read_pmreg(sc, ACPIREG_PM1B_CNT, offset));

sys/dev/acpi/acpi.c

1564

dnprintf(50, "read GPE_STS offset: %.2x %.2x %.2x\n", offset,

sys/dev/acpi/acpi.c

1566

if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {

sys/dev/acpi/acpi.c

1572

offset, sc->sc_fadt->gpe0_blk_len>>1,

sys/dev/acpi/acpi.c

1574

if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {

sys/dev/acpi/acpi.c

1591

regval = bus_space_read_1(sc->sc_iot, ioh, offset);

sys/dev/acpi/acpi.c

1594

regval = bus_space_read_2(sc->sc_iot, ioh, offset);

sys/dev/acpi/acpi.c

1597

regval = bus_space_read_4(sc->sc_iot, ioh, offset);

sys/dev/acpi/acpi.c

1603

sc->sc_pmregs[reg].addr, offset, regval);

sys/dev/acpi/acpi.c

1609

acpi_write_pmreg(struct acpi_softc *sc, int reg, int offset, int regval)

sys/dev/acpi/acpi.c

1622

KASSERT(offset == 0);

sys/dev/acpi/acpi.c

1639

KASSERT(offset == 0);

sys/dev/acpi/acpi.c

1651

acpi_write_pmreg(sc, ACPIREG_PM1A_EN, offset, regval);

sys/dev/acpi/acpi.c

1652

acpi_write_pmreg(sc, ACPIREG_PM1B_EN, offset, regval);

sys/dev/acpi/acpi.c

1655

acpi_write_pmreg(sc, ACPIREG_PM1A_STS, offset, regval);

sys/dev/acpi/acpi.c

1656

acpi_write_pmreg(sc, ACPIREG_PM1B_STS, offset, regval);

sys/dev/acpi/acpi.c

1659

acpi_write_pmreg(sc, ACPIREG_PM1A_CNT, offset, regval);

sys/dev/acpi/acpi.c

1660

acpi_write_pmreg(sc, ACPIREG_PM1B_CNT, offset, regval);

sys/dev/acpi/acpi.c

1664

offset, sc->sc_fadt->gpe0_blk_len>>1,

sys/dev/acpi/acpi.c

1666

if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {

sys/dev/acpi/acpi.c

1672

offset, sc->sc_fadt->gpe0_blk_len>>1,

sys/dev/acpi/acpi.c

1674

if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {

sys/dev/acpi/acpi.c

1691

bus_space_write_1(sc->sc_iot, ioh, offset, regval);

sys/dev/acpi/acpi.c

1694

bus_space_write_2(sc->sc_iot, ioh, offset, regval);

sys/dev/acpi/acpi.c

1697

bus_space_write_4(sc->sc_iot, ioh, offset, regval);

sys/dev/acpi/acpi.c

1702

sc->sc_pmregs[reg].name, sc->sc_pmregs[reg].addr, offset, regval);

sys/dev/acpi/acpi.c

893

int offset;

sys/dev/acpi/acpi.c

901

if (pci_get_capability(pc, tag, PCI_CAP_PWRMGMT, &offset, 0)) {

sys/dev/acpi/acpi.c

903

reg = pci_conf_read(pc, tag, offset + PCI_PMCSR);

sys/dev/acpi/acpi.c

904

pci_conf_write(pc, tag, offset + PCI_PMCSR, reg);

sys/dev/acpi/acpireg.h

753

uint32_t offset;

sys/dev/acpi/acpisbs.c

235

void *p = (void *)&sc->sc_battery + check.offset;

sys/dev/acpi/acpisbs.c

308

void *p = (void *)&sc->sc_battery + check.offset;

sys/dev/acpi/acpisbs.c

64

size_t offset;

sys/dev/acpi/tpm.c

693

tpm_waitfor(struct tpm_softc *sc, bus_size_t offset, uint32_t mask,

sys/dev/acpi/tpm.c

701

r = bus_space_read_4(sc->sc_bt, sc->sc_bh, offset);

sys/dev/acpi/tpm.c

706

r = bus_space_read_4(sc->sc_bt, sc->sc_bh, offset);

sys/dev/dt/dt_dev.c

700

dtrv->dtrv_offset = (caddr_t)e->offset;

sys/dev/fdt/amlclock.c

206

amlclock_get_cpu_freq(struct amlclock_softc *sc, bus_size_t offset)

sys/dev/fdt/amlclock.c

211

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

213

if (sc->sc_g12b && offset == HHI_SYS_CPU_CLK_CNTL0)

sys/dev/fdt/amlclock.c

244

amlclock_set_cpu_freq(struct amlclock_softc *sc, bus_size_t offset,

sys/dev/fdt/amlclock.c

255

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

263

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

267

if (sc->sc_g12b && offset == HHI_SYS_CPU_CLK_CNTL0)

sys/dev/fdt/amlclock.c

275

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

306

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

312

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

316

HSET4(sc, offset, HHI_SYS_CPU_CLK_DYN_ENABLE);

sys/dev/fdt/amlclock.c

317

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

321

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

325

HSET4(sc, offset, HHI_SYS_CPU_CLK_POSTMUX0);

sys/dev/fdt/amlclock.c

327

HCLR4(sc, offset, HHI_SYS_CPU_CLK_POSTMUX0);

sys/dev/fdt/amlclock.c

330

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

333

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

337

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

343

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

347

HSET4(sc, offset, HHI_SYS_CPU_CLK_DYN_ENABLE);

sys/dev/fdt/amlclock.c

348

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

352

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

356

HSET4(sc, offset, HHI_SYS_CPU_CLK_POSTMUX1);

sys/dev/fdt/amlclock.c

358

HCLR4(sc, offset, HHI_SYS_CPU_CLK_POSTMUX1);

sys/dev/fdt/amlclock.c

361

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

364

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

372

amlclock_set_pll_freq(struct amlclock_softc *sc, bus_size_t offset,

sys/dev/fdt/amlclock.c

392

HSET4(sc, offset, HHI_SYS_DPLL_RESET);

sys/dev/fdt/amlclock.c

393

HCLR4(sc, offset, HHI_SYS_DPLL_EN);

sys/dev/fdt/amlclock.c

395

reg = HREAD4(sc, offset);

sys/dev/fdt/amlclock.c

401

HWRITE4(sc, offset, reg);

sys/dev/fdt/amlclock.c

403

HSET4(sc, offset, HHI_SYS_DPLL_RESET);

sys/dev/fdt/amlclock.c

404

HSET4(sc, offset, HHI_SYS_DPLL_EN);

sys/dev/fdt/amlclock.c

405

HCLR4(sc, offset, HHI_SYS_DPLL_RESET);

sys/dev/fdt/amlclock.c

408

if (HREAD4(sc, offset) & HHI_SYS_DPLL_LOCK)

sys/dev/fdt/amltemp.c

124

bus_addr_t offset;

sys/dev/fdt/amltemp.c

129

offset = 0x128;

sys/dev/fdt/amltemp.c

132

offset = 0x0f0;

sys/dev/fdt/amltemp.c

146

sc->sc_calib = regmap_read_4(rm, offset);

sys/dev/fdt/bcm2835_dmac.c

115

bcmdmac_write(struct bcmdmac_softc *sc, bus_size_t offset, uint32_t value)

sys/dev/fdt/bcm2835_dmac.c

117

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, value);

sys/dev/fdt/bcm2835_dmac.c

121

bcmdmac_read(struct bcmdmac_softc *sc, bus_size_t offset)

sys/dev/fdt/bcm2835_dmac.c

123

return bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset);

sys/dev/fdt/bcm2835_sdhost.c

185

bcmsdhost_write(struct bcmsdhost_softc *sc, bus_size_t offset, uint32_t value)

sys/dev/fdt/bcm2835_sdhost.c

187

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, value);

sys/dev/fdt/bcm2835_sdhost.c

191

bcmsdhost_read(struct bcmsdhost_softc *sc, bus_size_t offset)

sys/dev/fdt/bcm2835_sdhost.c

193

return bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset);

sys/dev/fdt/dwpcie.c

774

dwpcie_get_capability(struct dwpcie_softc *sc, int capid, int *offset,

sys/dev/fdt/dwpcie.c

784

if (offset)

sys/dev/fdt/dwpcie.c

785

*offset = ofs;

sys/dev/fdt/ehci_fdt.c

102

offset = MARVELL_EHCI_HOST_OFFSET;

sys/dev/fdt/ehci_fdt.c

104

sc->sc.sc_size = sc->sc_size - offset;

sys/dev/fdt/ehci_fdt.c

105

if (bus_space_subregion(sc->sc.iot, sc->sc_ioh, offset,

sys/dev/fdt/ehci_fdt.c

82

bus_size_t offset = 0;

sys/dev/fdt/hireset.c

80

uint32_t offset = cells[0];

sys/dev/fdt/hireset.c

90

regmap_write_4(rm, offset + 0, (1 << bit));

sys/dev/fdt/hireset.c

92

regmap_write_4(rm, offset + 4, (1 << bit));

sys/dev/fdt/hitemp.c

129

sc->sc_offset = hitemp_compat[i].offset;

sys/dev/fdt/hitemp.c

160

bus_size_t offset = 0;

sys/dev/fdt/hitemp.c

167

offset + HI3660_TEMP);

sys/dev/fdt/hitemp.c

171

offset += sc->sc_offset;

sys/dev/fdt/hitemp.c

67

bus_size_t offset;

sys/dev/fdt/if_dwqe_fdt.c

426

uint32_t phandle, offset, reg, shift;

sys/dev/fdt/if_dwqe_fdt.c

436

offset = cells[1];

sys/dev/fdt/if_dwqe_fdt.c

457

reg = regmap_read_4(rm, offset);

sys/dev/fdt/if_dwqe_fdt.c

460

regmap_write_4(rm, offset, reg);

sys/dev/fdt/if_mvpp.c

3347

mvpp2_rxq_offset_set(struct mvpp2_port *port, int prxq, int offset)

sys/dev/fdt/if_mvpp.c

3351

offset = offset >> 5;

sys/dev/fdt/if_mvpp.c

3354

val |= ((offset << MVPP2_RXQ_PACKET_OFFSET_OFFS) &

sys/dev/fdt/if_mvpp.c

3518

mvpp2_prs_tcam_data_cmp(struct mvpp2_prs_entry *pe, int offset, uint16_t data)

sys/dev/fdt/if_mvpp.c

3520

int byte_offset = MVPP2_PRS_TCAM_DATA_BYTE(offset);

sys/dev/fdt/if_mvpp.c

3666

mvpp2_prs_sram_offset_set(struct mvpp2_prs_entry *pe, uint32_t type, int offset,

sys/dev/fdt/if_mvpp.c

3679

if (offset < 0) {

sys/dev/fdt/if_mvpp.c

3681

offset = -offset;

sys/dev/fdt/if_mvpp.c

3688

mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_UDF_OFFS, offset);

sys/dev/fdt/if_mvpp.c

3690

pe->sram.byte[udf_byte] |= (offset >> udf_byte_offset);

sys/dev/fdt/if_mvpp.c

767

int lu_first, int lu_max, int offset)

sys/dev/fdt/if_mvpp.c

783

reg |= MVPP2_PRS_INIT_OFF_VAL(port, offset);

sys/dev/fdt/qcsmem.c

219

if (!pte->offset || !pte->size)

sys/dev/fdt/qcsmem.c

235

pte->offset;

sys/dev/fdt/qcsmem.c

337

entry->offset = header->free_offset;

sys/dev/fdt/qcsmem.c

43

uint32_t offset;

sys/dev/fdt/qcsmem.c

468

if (entry->size + entry->offset > sc->sc_aux_size)

sys/dev/fdt/qcsmem.c

474

return bus_space_vaddr(sc->sc_iot, sc->sc_ioh) + entry->offset;

sys/dev/fdt/qcsmem.c

63

uint32_t offset;

sys/dev/fdt/rkdrm.c

268

wdf->offset = 0;

sys/dev/fdt/rkpcie.c

403

bus_size_t size, offset;

sys/dev/fdt/rkpcie.c

454

offset = addr - sc->sc_axi_addr - PCIE_ATR_OB_REGION0_SIZE;

sys/dev/fdt/rkpcie.c

455

region = 1 + (offset / PCIE_ATR_OB_REGION_SIZE);

sys/dev/fdt/simplefb.c

263

wdf->offset = sc->sc_paddr & PAGE_MASK;

sys/dev/fdt/ssdfb.c

637

wdf->offset = 0;

sys/dev/fdt/sxiccmu.c

1925

sxiccmu_d1_mmc_set_frequency(struct sxiccmu_softc *sc, bus_size_t offset,

sys/dev/fdt/sxiccmu.c

1955

reg = SXIREAD4(sc, offset);

sys/dev/fdt/sxiccmu.c

1962

SXIWRITE4(sc, offset, reg);

sys/dev/fdt/sxiccmu.c

2069

sxiccmu_h6_mmc_set_frequency(struct sxiccmu_softc *sc, bus_size_t offset,

sys/dev/fdt/sxiccmu.c

2096

reg = SXIREAD4(sc, offset);

sys/dev/fdt/sxiccmu.c

2103

SXIWRITE4(sc, offset, reg);

sys/dev/fdt/sxiccmu.c

366

bus_size_t offset;

sys/dev/fdt/sxiccmu.c

465

.offset = 0x00b0

sys/dev/fdt/sxiccmu.c

489

.offset = 0x000c

sys/dev/fdt/sxiccmu.c

500

.offset = 0x0028

sys/dev/fdt/sxiccmu.c

602

sxiccmu_devices[i].offset, 4, &clock->sc_ioh);

sys/dev/fdt/xhci_fdt.c

524

bus_size_t offset;

sys/dev/fdt/xhci_fdt.c

547

offset = EXYNOS5_USBDRD0_POWER;

sys/dev/fdt/xhci_fdt.c

549

offset = EXYNOS5420_USBDRD1_POWER;

sys/dev/fdt/xhci_fdt.c

551

val = regmap_read_4(pmurm, offset);

sys/dev/fdt/xhci_fdt.c

553

regmap_write_4(pmurm, offset, val);

sys/dev/gpio/gpio.c

169

gpio_pin_map(void *gpio, int offset, u_int32_t mask, struct gpio_pinmap *map)

sys/dev/gpio/gpio.c

180

pin = offset + i;

sys/dev/ic/acx.c

1453

acx_read_eeprom(struct acx_softc *sc, uint32_t offset, uint8_t *val)

sys/dev/ic/acx.c

1458

CSR_WRITE_4(sc, ACXREG_EEPROM_ADDR, offset);

sys/dev/ic/acx.c

1469

sc->sc_dev.dv_xname, offset);

sys/dev/ic/acx.c

1630

acx_load_firmware(struct acx_softc *sc, uint32_t offset, const uint8_t *data,

sys/dev/ic/acx.c

1668

CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);

sys/dev/ic/acx.c

1673

CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));

sys/dev/ic/acx.c

1684

CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);

sys/dev/ic/acx.c

1691

CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));

sys/dev/ic/aic6360.c

1023

ti->offset = sc->sc_imess[4];

sys/dev/ic/aic6360.c

1025

if (ti->offset == 0) {

sys/dev/ic/aic6360.c

1028

ti->offset > 8) {

sys/dev/ic/aic6360.c

1029

ti->period = ti->offset = 0;

sys/dev/ic/aic6360.c

1034

ti->offset);

sys/dev/ic/aic6360.c

1195

sc->sc_omess[0] = ti->offset;

sys/dev/ic/aic6360.c

1795

ti->period = ti->offset = 0;

sys/dev/ic/aic6360.c

406

ti->offset = AIC_SYNC_REQ_ACK_OFS;

sys/dev/ic/aic6360.c

408

ti->period = ti->offset = 0;

sys/dev/ic/aic6360.c

582

if (ti->offset != 0)

sys/dev/ic/aic6360.c

584

((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);

sys/dev/ic/aic6360.c

972

ti->period = ti->offset = 0;

sys/dev/ic/aic6360.c

980

ti->period = ti->offset = 0;

sys/dev/ic/aic6360var.h

115

u_char offset; /* Offset suggestion */

sys/dev/ic/aic6915.c

1193

sf_read_eeprom(struct sf_softc *sc, int offset)

sys/dev/ic/aic6915.c

1197

reg = sf_genreg_read(sc, SF_EEPROM_BASE + (offset & ~3));

sys/dev/ic/aic6915.c

1199

return ((reg >> (8 * (offset & 3))) & 0xff);

sys/dev/ic/aic79xx.c

10388

ahd_inb_scbram(struct ahd_softc *ahd, u_int offset)

sys/dev/ic/aic79xx.c

10406

value = ahd_inb(ahd, offset);

sys/dev/ic/aic79xx.c

10413

ahd_inw_scbram(struct ahd_softc *ahd, u_int offset)

sys/dev/ic/aic79xx.c

10415

return (ahd_inb_scbram(ahd, offset)

sys/dev/ic/aic79xx.c

10416

| (ahd_inb_scbram(ahd, offset+1) << 8));

sys/dev/ic/aic79xx.c

10420

ahd_inl_scbram(struct ahd_softc *ahd, u_int offset)

sys/dev/ic/aic79xx.c

10422

return (ahd_inw_scbram(ahd, offset)

sys/dev/ic/aic79xx.c

10423

| (ahd_inw_scbram(ahd, offset+2) << 16));

sys/dev/ic/aic79xx.c

10427

ahd_inq_scbram(struct ahd_softc *ahd, u_int offset)

sys/dev/ic/aic79xx.c

10429

return (ahd_inl_scbram(ahd, offset)

sys/dev/ic/aic79xx.c

10430

| ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32);

sys/dev/ic/aic79xx.c

173

u_int period, u_int offset);

sys/dev/ic/aic79xx.c

179

u_int period, u_int offset,

sys/dev/ic/aic79xx.c

2950

u_int period, u_int *offset, int wide,

sys/dev/ic/aic79xx.c

2965

*offset = MIN(*offset, maxoffset);

sys/dev/ic/aic79xx.c

2968

*offset = MIN(*offset, tinfo->user.offset);

sys/dev/ic/aic79xx.c

2970

*offset = MIN(*offset, tinfo->goal.offset);

sys/dev/ic/aic79xx.c

3026

tinfo->curr.offset = AHD_OFFSET_UNKNOWN;

sys/dev/ic/aic79xx.c

3030

|| tinfo->curr.offset != tinfo->goal.offset

sys/dev/ic/aic79xx.c

3033

&& (tinfo->goal.offset != 0

sys/dev/ic/aic79xx.c

3053

u_int period, u_int offset, u_int ppr_options,

sys/dev/ic/aic79xx.c

3067

if (period == 0 || offset == 0) {

sys/dev/ic/aic79xx.c

3069

offset = 0;

sys/dev/ic/aic79xx.c

3077

tinfo->user.offset = offset;

sys/dev/ic/aic79xx.c

3083

tinfo->goal.offset = offset;

sys/dev/ic/aic79xx.c

3088

old_offset = tinfo->curr.offset;

sys/dev/ic/aic79xx.c

3093

|| old_offset != offset

sys/dev/ic/aic79xx.c

3099

tinfo->curr.offset = offset;

sys/dev/ic/aic79xx.c

3106

if (offset != 0) {

sys/dev/ic/aic79xx.c

3112

period, offset);

sys/dev/ic/aic79xx.c

3273

u_int offset;

sys/dev/ic/aic79xx.c

3283

offset = tinfo->offset;

sys/dev/ic/aic79xx.c

3305

offset *= 2;

sys/dev/ic/aic79xx.c

3353

ahd_outb(ahd, NEGOFFSET, offset);

sys/dev/ic/aic79xx.c

3693

u_int offset;

sys/dev/ic/aic79xx.c

3704

offset = tinfo->goal.offset;

sys/dev/ic/aic79xx.c

3712

dosync = tinfo->curr.offset != offset || tinfo->curr.period != period;

sys/dev/ic/aic79xx.c

3722

dosync = tinfo->goal.offset != 0;

sys/dev/ic/aic79xx.c

3754

offset = tinfo->goal.offset;

sys/dev/ic/aic79xx.c

3755

ahd_validate_offset(ahd, tinfo, period, &offset,

sys/dev/ic/aic79xx.c

3760

ahd_construct_ppr(ahd, devinfo, period, offset,

sys/dev/ic/aic79xx.c

3763

ahd_construct_sdtr(ahd, devinfo, period, offset);

sys/dev/ic/aic79xx.c

3776

u_int period, u_int offset)

sys/dev/ic/aic79xx.c

3778

if (offset == 0)

sys/dev/ic/aic79xx.c

3784

ahd->msgout_buf[ahd->msgout_index++] = offset;

sys/dev/ic/aic79xx.c

3789

devinfo->lun, period, offset);

sys/dev/ic/aic79xx.c

3819

u_int period, u_int offset, u_int bus_width,

sys/dev/ic/aic79xx.c

3829

if (offset == 0)

sys/dev/ic/aic79xx.c

3836

ahd->msgout_buf[ahd->msgout_index++] = offset;

sys/dev/ic/aic79xx.c

3844

bus_width, period, offset, ppr_options);

sys/dev/ic/aic79xx.c

4322

u_int offset;

sys/dev/ic/aic79xx.c

4342

saved_offset = offset = ahd->msgin_buf[4];

sys/dev/ic/aic79xx.c

4345

ahd_validate_offset(ahd, tinfo, period, &offset,

sys/dev/ic/aic79xx.c

4354

period, offset);

sys/dev/ic/aic79xx.c

4357

offset, ppr_options,

sys/dev/ic/aic79xx.c

4368

if (saved_offset != offset) {

sys/dev/ic/aic79xx.c

4386

period, offset);

sys/dev/ic/aic79xx.c

4492

u_int offset;

sys/dev/ic/aic79xx.c

4515

offset = ahd->msgin_buf[5];

sys/dev/ic/aic79xx.c

4526

offset = 0;

sys/dev/ic/aic79xx.c

4528

saved_offset = offset;

sys/dev/ic/aic79xx.c

4541

ahd_validate_offset(ahd, tinfo, period, &offset,

sys/dev/ic/aic79xx.c

4551

|| saved_offset != offset

sys/dev/ic/aic79xx.c

4555

offset = 0;

sys/dev/ic/aic79xx.c

4572

ahd_construct_ppr(ahd, devinfo, period, offset,

sys/dev/ic/aic79xx.c

4586

bus_width, period, offset, ppr_options);

sys/dev/ic/aic79xx.c

4592

offset, ppr_options,

sys/dev/ic/aic79xx.c

4764

if (tinfo->goal.offset != tinfo->curr.offset) {

sys/dev/ic/aic79xx.c

5842

int offset;

sys/dev/ic/aic79xx.c

5844

offset = (PAGE_SIZE / sizeof(*hscb)) - scb_data->scbs_left;

sys/dev/ic/aic79xx.c

5846

hscb = &((struct hardware_scb *)hscb_map->vaddr)[offset];

sys/dev/ic/aic79xx.c

5847

hscb_busaddr = hscb_map->busaddr + (offset * sizeof(*hscb));

sys/dev/ic/aic79xx.c

5871

int offset;

sys/dev/ic/aic79xx.c

5873

offset = ((ahd_sglist_allocsize(ahd) / ahd_sglist_size(ahd))

sys/dev/ic/aic79xx.c

5876

segs = sg_map->vaddr + offset;

sys/dev/ic/aic79xx.c

5877

sg_busaddr = sg_map->busaddr + offset;

sys/dev/ic/aic79xx.c

5906

int offset;

sys/dev/ic/aic79xx.c

5908

offset = PAGE_SIZE - (AHD_SENSE_BUFSIZE * scb_data->sense_left);

sys/dev/ic/aic79xx.c

5910

sense_data = sense_map->vaddr + offset;

sys/dev/ic/aic79xx.c

5911

sense_busaddr = sense_map->busaddr + offset;

sys/dev/ic/aic79xx.c

6574

tinfo->user.offset = MAX_OFFSET;

sys/dev/ic/aic79xx.c

6667

user_tinfo->offset = MAX_OFFSET;

sys/dev/ic/aic79xx.c

6669

user_tinfo->offset = 0;

sys/dev/ic/aic79xx.c

6696

user_tinfo->period, user_tinfo->offset,

sys/dev/ic/aic79xx.h

1432

u_int period, u_int *offset,

sys/dev/ic/aic79xx.h

1460

u_int period, u_int offset,

sys/dev/ic/aic79xx.h

742

uint8_t offset; /* Sync offset */

sys/dev/ic/aic79xx_inline.h

147

u_int ahd_inb_scbram(struct ahd_softc *ahd, u_int offset);

sys/dev/ic/aic79xx_inline.h

148

u_int ahd_inw_scbram(struct ahd_softc *ahd, u_int offset);

sys/dev/ic/aic79xx_inline.h

149

uint32_t ahd_inl_scbram(struct ahd_softc *ahd, u_int offset);

sys/dev/ic/aic79xx_inline.h

150

uint64_t ahd_inq_scbram(struct ahd_softc *ahd, u_int offset);

sys/dev/ic/aic79xx_openbsd.c

564

u_int width, ppr_options, period, offset;

sys/dev/ic/aic79xx_openbsd.c

596

offset = 0;

sys/dev/ic/aic79xx_openbsd.c

599

offset = tinfo->user.offset;

sys/dev/ic/aic79xx_openbsd.c

613

ahd_validate_offset(ahd, NULL, period, &offset, width, ROLE_UNKNOWN);

sys/dev/ic/aic79xx_openbsd.c

615

if (offset == 0) {

sys/dev/ic/aic79xx_openbsd.c

625

ahd_set_syncrate(ahd, &devinfo, period, offset, ppr_options,

sys/dev/ic/aic79xx_openbsd.h

117

#define ahd_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) \

sys/dev/ic/aic79xx_openbsd.h

118

bus_dmamap_sync(dma_tag, dmamap, offset, len, op)

sys/dev/ic/aic7xxx.c

175

u_int period, u_int offset);

sys/dev/ic/aic7xxx.c

181

u_int period, u_int offset,

sys/dev/ic/aic7xxx.c

1830

u_int *offset, int wide, role_t role)

sys/dev/ic/aic7xxx.c

1845

*offset = MIN(*offset, maxoffset);

sys/dev/ic/aic7xxx.c

1848

*offset = MIN(*offset, tinfo->user.offset);

sys/dev/ic/aic7xxx.c

1850

*offset = MIN(*offset, tinfo->goal.offset);

sys/dev/ic/aic7xxx.c

1906

tinfo->curr.offset = AHC_OFFSET_UNKNOWN;

sys/dev/ic/aic7xxx.c

1910

|| tinfo->curr.offset != tinfo->goal.offset

sys/dev/ic/aic7xxx.c

1913

&& (tinfo->goal.offset != 0

sys/dev/ic/aic7xxx.c

1934

u_int offset, u_int ppr_options, u_int type, int paused)

sys/dev/ic/aic7xxx.c

1949

offset = 0;

sys/dev/ic/aic7xxx.c

1957

tinfo->user.offset = offset;

sys/dev/ic/aic7xxx.c

1963

tinfo->goal.offset = offset;

sys/dev/ic/aic7xxx.c

1968

old_offset = tinfo->curr.offset;

sys/dev/ic/aic7xxx.c

1973

|| old_offset != offset

sys/dev/ic/aic7xxx.c

2003

scsirate |= offset & SOFS;

sys/dev/ic/aic7xxx.c

2018

ahc_outb(ahc, SCSIOFFSET, offset);

sys/dev/ic/aic7xxx.c

2023

tinfo->curr.offset = offset;

sys/dev/ic/aic7xxx.c

2029

if (offset != 0) {

sys/dev/ic/aic7xxx.c

2034

? " DT" : "", offset);

sys/dev/ic/aic7xxx.c

2157

pending_hscb->scsioffset = tinfo->curr.offset;

sys/dev/ic/aic7xxx.c

2414

u_int offset;

sys/dev/ic/aic7xxx.c

2425

offset = tinfo->goal.offset;

sys/dev/ic/aic7xxx.c

2433

dosync = tinfo->curr.offset != offset || tinfo->curr.period != period;

sys/dev/ic/aic7xxx.c

2443

dosync = tinfo->goal.offset != 0;

sys/dev/ic/aic7xxx.c

2476

offset = tinfo->goal.offset;

sys/dev/ic/aic7xxx.c

2477

ahc_validate_offset(ahc, tinfo, rate, &offset,

sys/dev/ic/aic7xxx.c

2482

ahc_construct_ppr(ahc, devinfo, period, offset,

sys/dev/ic/aic7xxx.c

2485

ahc_construct_sdtr(ahc, devinfo, period, offset);

sys/dev/ic/aic7xxx.c

2498

u_int period, u_int offset)

sys/dev/ic/aic7xxx.c

2500

if (offset == 0)

sys/dev/ic/aic7xxx.c

2506

ahc->msgout_buf[ahc->msgout_index++] = offset;

sys/dev/ic/aic7xxx.c

2511

devinfo->lun, period, offset);

sys/dev/ic/aic7xxx.c

2541

u_int period, u_int offset, u_int bus_width,

sys/dev/ic/aic7xxx.c

2544

if (offset == 0)

sys/dev/ic/aic7xxx.c

2551

ahc->msgout_buf[ahc->msgout_index++] = offset;

sys/dev/ic/aic7xxx.c

2559

bus_width, period, offset, ppr_options);

sys/dev/ic/aic7xxx.c

3087

u_int offset;

sys/dev/ic/aic7xxx.c

3107

saved_offset = offset = ahc->msgin_buf[4];

sys/dev/ic/aic7xxx.c

3111

ahc_validate_offset(ahc, tinfo, syncrate, &offset,

sys/dev/ic/aic7xxx.c

3121

period, offset);

sys/dev/ic/aic7xxx.c

3125

offset, ppr_options,

sys/dev/ic/aic7xxx.c

3136

if (saved_offset != offset) {

sys/dev/ic/aic7xxx.c

3154

period, offset);

sys/dev/ic/aic7xxx.c

3261

u_int offset;

sys/dev/ic/aic7xxx.c

3284

offset = ahc->msgin_buf[5];

sys/dev/ic/aic7xxx.c

3295

offset = 0;

sys/dev/ic/aic7xxx.c

3297

saved_offset = offset;

sys/dev/ic/aic7xxx.c

3314

&offset, bus_width,

sys/dev/ic/aic7xxx.c

3324

|| saved_offset != offset

sys/dev/ic/aic7xxx.c

3328

offset = 0;

sys/dev/ic/aic7xxx.c

3346

ahc_construct_ppr(ahc, devinfo, period, offset,

sys/dev/ic/aic7xxx.c

3360

bus_width, period, offset, ppr_options);

sys/dev/ic/aic7xxx.c

3367

offset, ppr_options,

sys/dev/ic/aic7xxx.c

3511

if (tinfo->goal.offset != tinfo->curr.offset) {

sys/dev/ic/aic7xxx.c

4843

tinfo->user.offset = MAX_OFFSET;

sys/dev/ic/aic7xxx.c

4852

u_int offset;

sys/dev/ic/aic7xxx.c

4864

offset = MAX_OFFSET_ULTRA2;

sys/dev/ic/aic7xxx.c

4866

offset = ahc_inb(ahc, TARG_OFFSET + i);

sys/dev/ic/aic7xxx.c

4867

if ((scsirate & ~WIDEXFER) == 0 && offset != 0)

sys/dev/ic/aic7xxx.c

4875

if (offset == 0)

sys/dev/ic/aic7xxx.c

4878

tinfo->user.offset = MAX_OFFSET;

sys/dev/ic/aic7xxx.c

4896

tinfo->user.offset = MAX_OFFSET;

sys/dev/ic/aic7xxx.c

4899

tinfo->user.offset = 0;

sys/dev/ic/aic7xxx_inline.h

440

int offset;

sys/dev/ic/aic7xxx_inline.h

442

offset = scb - ahc->scb_data->scbarray;

sys/dev/ic/aic7xxx_inline.h

443

return (&ahc->scb_data->sense[offset]);

sys/dev/ic/aic7xxx_inline.h

449

int offset;

sys/dev/ic/aic7xxx_inline.h

451

offset = scb - ahc->scb_data->scbarray;

sys/dev/ic/aic7xxx_inline.h

453

+ (offset * sizeof(struct scsi_sense_data)));

sys/dev/ic/aic7xxx_openbsd.c

378

scb->hscb->scsioffset = tinfo->curr.offset;

sys/dev/ic/aic7xxx_openbsd.c

636

u_int width, ppr_options, period, offset;

sys/dev/ic/aic7xxx_openbsd.c

665

offset = 0;

sys/dev/ic/aic7xxx_openbsd.c

668

offset = tinfo->user.offset;

sys/dev/ic/aic7xxx_openbsd.c

683

ahc_validate_offset(ahc, NULL, syncrate, &offset, width,

sys/dev/ic/aic7xxx_openbsd.c

686

if (offset == 0) {

sys/dev/ic/aic7xxx_openbsd.c

696

ahc_set_syncrate(ahc, &devinfo, syncrate, period, offset, ppr_options,

sys/dev/ic/aic7xxx_openbsd.h

107

#define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) \

sys/dev/ic/aic7xxx_openbsd.h

108

bus_dmamap_sync(dma_tag, dmamap, offset, len, op)

sys/dev/ic/aic7xxx_seeprom.c

286

u_int offset;

sys/dev/ic/aic7xxx_seeprom.c

289

offset = MAX_OFFSET_ULTRA2;

sys/dev/ic/aic7xxx_seeprom.c

291

offset = 0;

sys/dev/ic/aic7xxx_seeprom.c

292

ahc_outb(ahc, TARG_OFFSET + i, offset);

sys/dev/ic/aic7xxxvar.h

1254

u_int *offset, int wide,

sys/dev/ic/aic7xxxvar.h

725

uint8_t offset; /* Sync offset */

sys/dev/ic/ar5210.c

2347

ar5k_ar5210_eeprom_read(struct ath_hal *hal, u_int32_t offset, u_int16_t *data)

sys/dev/ic/ar5210.c

2357

(void)AR5K_REG_READ(AR5K_AR5210_EEPROM_BASE + (4 * offset));

sys/dev/ic/ar5210.c

2375

ar5k_ar5210_eeprom_write(struct ath_hal *hal, u_int32_t offset, u_int16_t data)

sys/dev/ic/ar5210.c

2385

AR5K_REG_WRITE(AR5K_AR5210_EEPROM_BASE + (4 * offset), data);

sys/dev/ic/ar5211.c

2497

ar5k_ar5211_eeprom_read(struct ath_hal *hal, u_int32_t offset, u_int16_t *data)

sys/dev/ic/ar5211.c

2504

AR5K_REG_WRITE(AR5K_AR5211_EEPROM_BASE, (u_int8_t)offset);

sys/dev/ic/ar5211.c

2524

ar5k_ar5211_eeprom_write(struct ath_hal *hal, u_int32_t offset, u_int16_t data)

sys/dev/ic/ar5211.c

2537

AR5K_REG_WRITE(AR5K_AR5211_EEPROM_BASE, (u_int8_t)offset - 1);

sys/dev/ic/ar5212.c

2924

ar5k_ar5212_eeprom_read(struct ath_hal *hal, u_int32_t offset, u_int16_t *data)

sys/dev/ic/ar5212.c

2931

AR5K_REG_WRITE(AR5K_AR5212_EEPROM_BASE, (u_int8_t)offset);

sys/dev/ic/ar5212.c

2951

ar5k_ar5212_eeprom_write(struct ath_hal *hal, u_int32_t offset, u_int16_t data)

sys/dev/ic/ar5212.c

2964

AR5K_REG_WRITE(AR5K_AR5212_EEPROM_BASE, (u_int8_t)offset - 1);

sys/dev/ic/ar5416.c

243

uint32_t reg, offset;

sys/dev/ic/ar5416.c

254

offset = chainoffset[i];

sys/dev/ic/ar5416.c

256

offset = i * 0x1000;

sys/dev/ic/ar5416.c

258

AR_WRITE(sc, AR_PHY_SWITCH_CHAIN_0 + offset,

sys/dev/ic/ar5416.c

261

reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset);

sys/dev/ic/ar5416.c

266

AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0 + offset, reg);

sys/dev/ic/ar5416.c

272

reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);

sys/dev/ic/ar5416.c

277

AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);

sys/dev/ic/ar5416.c

283

reg = AR_READ(sc, AR_PHY_RXGAIN + offset);

sys/dev/ic/ar5416.c

285

AR_WRITE(sc, AR_PHY_RXGAIN + offset, reg);

sys/dev/ic/ar5416.c

287

reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);

sys/dev/ic/ar5416.c

290

AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);

sys/dev/ic/ar5416.c

436

uint32_t reg, offset;

sys/dev/ic/ar5416.c

475

offset = chainoffset[i];

sys/dev/ic/ar5416.c

477

offset = i * 0x1000;

sys/dev/ic/ar5416.c

512

AR_WRITE(sc, AR_PHY_TPCRG5 + offset, reg);

sys/dev/ic/ar5416.c

516

AR_WRITE(sc, AR_PHY_PDADC_TBL_BASE + offset + j,

sys/dev/ic/ar5xxx.c

1005

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

1010

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

1025

u_int32_t total, offset;

sys/dev/ic/ar5xxx.c

1036

for (offset = 0x1f, octet = 0, total = 0;

sys/dev/ic/ar5xxx.c

1037

offset >= 0x1d; offset--) {

sys/dev/ic/ar5xxx.c

1038

if (hal->ah_eeprom_read(hal, offset, &data) != 0)

sys/dev/ic/ar5xxx.c

1271

ar5k_rfregs_op(u_int32_t *rf, u_int32_t offset, u_int32_t reg, u_int32_t bits,

sys/dev/ic/ar5xxx.c

1284

AR5K_PRINTF("invalid values at offset %u\n", offset);

sys/dev/ic/ar5xxx.c

1288

entry = ((first - 1) / 8) + offset;

sys/dev/ic/ar5xxx.c

697

ar5k_eeprom_read_ants(struct ath_hal *hal, u_int32_t *offset, u_int mode)

sys/dev/ic/ar5xxx.c

700

u_int32_t o = *offset;

sys/dev/ic/ar5xxx.c

747

*offset = o;

sys/dev/ic/ar5xxx.c

753

ar5k_eeprom_read_modes(struct ath_hal *hal, u_int32_t *offset, u_int mode)

sys/dev/ic/ar5xxx.c

756

u_int32_t o = *offset;

sys/dev/ic/ar5xxx.c

828

*offset = o;

sys/dev/ic/ar5xxx.c

837

u_int32_t offset;

sys/dev/ic/ar5xxx.c

865

for (cksum = 0, offset = 0; offset < AR5K_EEPROM_INFO_MAX; offset++) {

sys/dev/ic/ar5xxx.c

866

AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val);

sys/dev/ic/ar5xxx.c

896

offset = AR5K_EEPROM_CTL(hal->ah_ee_version);

sys/dev/ic/ar5xxx.c

900

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

910

offset = AR5K_EEPROM_MODES_11A(hal->ah_ee_version);

sys/dev/ic/ar5xxx.c

912

if ((ret = ar5k_eeprom_read_ants(hal, &offset, mode)) != 0)

sys/dev/ic/ar5xxx.c

915

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

921

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

929

if ((ret = ar5k_eeprom_read_modes(hal, &offset, mode)) != 0)

sys/dev/ic/ar5xxx.c

933

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

941

offset = AR5K_EEPROM_MODES_11B(hal->ah_ee_version);

sys/dev/ic/ar5xxx.c

943

if ((ret = ar5k_eeprom_read_ants(hal, &offset, mode)) != 0)

sys/dev/ic/ar5xxx.c

946

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

951

if ((ret = ar5k_eeprom_read_modes(hal, &offset, mode)) != 0)

sys/dev/ic/ar5xxx.c

955

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

961

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

974

offset = AR5K_EEPROM_MODES_11G(hal->ah_ee_version);

sys/dev/ic/ar5xxx.c

976

if ((ret = ar5k_eeprom_read_ants(hal, &offset, mode)) != 0)

sys/dev/ic/ar5xxx.c

979

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

984

if ((ret = ar5k_eeprom_read_modes(hal, &offset, mode)) != 0)

sys/dev/ic/ar5xxx.c

988

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

994

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.c

997

AR5K_EEPROM_READ(offset++, val);

sys/dev/ic/ar5xxx.h

1054

_t int (_a _n##_eeprom_read)(struct ath_hal *, u_int32_t offset, \

sys/dev/ic/ar5xxx.h

1056

_t int (_a _n##_eeprom_write)(struct ath_hal *, u_int32_t offset, \

sys/dev/ic/ar9280.c

246

uint32_t reg, offset;

sys/dev/ic/ar9280.c

256

offset = chainoffset[i];

sys/dev/ic/ar9280.c

258

offset = i * 0x1000;

sys/dev/ic/ar9280.c

260

AR_WRITE(sc, AR_PHY_SWITCH_CHAIN_0 + offset,

sys/dev/ic/ar9280.c

263

reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset);

sys/dev/ic/ar9280.c

268

AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0 + offset, reg);

sys/dev/ic/ar9280.c

271

reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);

sys/dev/ic/ar9280.c

280

AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);

sys/dev/ic/ar9280.c

286

reg = AR_READ(sc, AR_PHY_RXGAIN + offset);

sys/dev/ic/ar9280.c

291

AR_WRITE(sc, AR_PHY_RXGAIN + offset, reg);

sys/dev/ic/ar9285.c

200

uint32_t reg, offset = 0x1000;

sys/dev/ic/ar9285.c

225

reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);

sys/dev/ic/ar9285.c

234

AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);

sys/dev/ic/ar9285.c

246

reg = AR_READ(sc, AR_PHY_RXGAIN + offset);

sys/dev/ic/ar9285.c

249

AR_WRITE(sc, AR_PHY_RXGAIN + offset, reg);

sys/dev/ic/ar9287.c

173

uint32_t reg, offset;

sys/dev/ic/ar9287.c

179

offset = i * 0x1000;

sys/dev/ic/ar9287.c

181

AR_WRITE(sc, AR_PHY_SWITCH_CHAIN_0 + offset,

sys/dev/ic/ar9287.c

184

reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset);

sys/dev/ic/ar9287.c

189

AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0 + offset, reg);

sys/dev/ic/ar9287.c

191

reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);

sys/dev/ic/ar9287.c

196

AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);

sys/dev/ic/ar9287.c

198

reg = AR_READ(sc, AR_PHY_RXGAIN + offset);

sys/dev/ic/ar9287.c

203

AR_WRITE(sc, AR_PHY_RXGAIN + offset, reg);

sys/dev/ic/ar9287.c

350

uint32_t reg, offset;

sys/dev/ic/ar9287.c

385

offset = i * 0x1000;

sys/dev/ic/ar9287.c

399

reg = AR_READ(sc, AR_PHY_CH0_TX_PWRCTRL11 + offset);

sys/dev/ic/ar9287.c

401

AR_WRITE(sc, AR_PHY_CH0_TX_PWRCTRL11 + offset, reg);

sys/dev/ic/ar9287.c

423

AR_WRITE(sc, AR_PHY_TPCRG5 + offset, reg);

sys/dev/ic/ar9287.c

427

AR_WRITE(sc, AR_PHY_PDADC_TBL_BASE + offset + j,

sys/dev/ic/bt8xx.h

282

short offset;

sys/dev/ic/bwi.c

1626

size_t *size, size_t *offset)

sys/dev/ic/bwi.c

1648

*offset = ntohl(h->fileoffset);

sys/dev/ic/bwi.c

1709

size_t offset;

sys/dev/ic/bwi.c

1728

&mac->mac_ucode_size, &offset);

sys/dev/ic/bwi.c

1734

mac->mac_ucode = (mac->mac_fw + offset);

sys/dev/ic/bwi.c

1748

&mac->mac_pcm_size, &offset);

sys/dev/ic/bwi.c

1754

mac->mac_pcm = (mac->mac_fw + offset);

sys/dev/ic/bwi.c

1778

&mac->mac_iv_size, &offset);

sys/dev/ic/bwi.c

1784

mac->mac_iv = (mac->mac_fw + offset);

sys/dev/ic/bwi.c

1810

&mac->mac_iv_ext_size, &offset);

sys/dev/ic/bwi.c

1816

mac->mac_iv_ext = (mac->mac_fw + offset);

sys/dev/ic/dc.c

2044

int i, pos, offset;

sys/dev/ic/dc.c

2050

offset = offsetof(struct dc_list_data, dc_rx_list[pos]);

sys/dev/ic/dc.c

2052

offset, sizeof(struct dc_desc),

sys/dev/ic/dc.c

2082

int i, offset, total_len = 0, consumed = 0;

sys/dev/ic/dc.c

2091

offset = offsetof(struct dc_list_data, dc_rx_list[i]);

sys/dev/ic/dc.c

2093

offset, sizeof(struct dc_desc),

sys/dev/ic/dc.c

2183

int idx, offset;

sys/dev/ic/dc.c

2195

offset = offsetof(struct dc_list_data, dc_tx_list[idx]);

sys/dev/ic/dc.c

2197

offset, sizeof(struct dc_desc),

sys/dev/ic/dc.c

2278

offset, sizeof(struct dc_desc),

sys/dev/ic/dwiic.c

100

DPRINTF(("%s: read at 0x%x = 0x%x\n", sc->sc_dev.dv_xname, offset, b));

sys/dev/ic/dwiic.c

106

dwiic_write(struct dwiic_softc *sc, int offset, uint32_t val)

sys/dev/ic/dwiic.c

108

DPRINTF(("%s: write at 0x%x: 0x%x\n", sc->sc_dev.dv_xname, offset,

sys/dev/ic/dwiic.c

111

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);

sys/dev/ic/dwiic.c

96

dwiic_read(struct dwiic_softc *sc, int offset)

sys/dev/ic/dwiic.c

98

u_int32_t b = bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset);

sys/dev/ic/elink3.c

1538

epreadeeprom(bus_space_tag_t iot, bus_space_handle_t ioh, int offset)

sys/dev/ic/elink3.c

1543

bus_space_write_1(iot, ioh, 0, 0x80 + offset);

sys/dev/ic/elink3.c

1579

ep_read_eeprom(struct ep_softc *sc, u_int16_t offset)

sys/dev/ic/elink3.c

1595

readcmd | offset);

sys/dev/ic/fxp.c

222

fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data)

sys/dev/ic/fxp.c

239

fxp_eeprom_shiftin(sc, offset, sc->eeprom_size);

sys/dev/ic/fxp.c

266

fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)

sys/dev/ic/fxp.c

271

fxp_eeprom_putword(sc, offset + i, data[i]);

sys/dev/ic/fxp.c

600

fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset,

sys/dev/ic/fxp.c

628

if ((i + offset) & (1 << (x - 1))) {

sys/dev/ic/i82365.c

1052

h->mem[win].offset = card_offset;

sys/dev/ic/i82365.c

1247

pcic_chip_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset,

sys/dev/ic/i82365.c

1251

bus_addr_t ioaddr = pcihp->addr + offset;

sys/dev/ic/i82365.c

967

(h->mem[win].offset >> PCIC_CARDMEM_ADDRX_SHIFT) & 0xff);

sys/dev/ic/i82365.c

969

((h->mem[win].offset >> (PCIC_CARDMEM_ADDRX_SHIFT + 8)) &

sys/dev/ic/i82365var.h

67

long offset;

sys/dev/ic/i82596var.h

209

u_int16_t (*ie_bus_read16)(struct ie_softc *, int offset);

sys/dev/ic/i82596var.h

210

void (*ie_bus_write16)(struct ie_softc *, int offset,

sys/dev/ic/i82596var.h

212

void (*ie_bus_write24)(struct ie_softc *, int offset,

sys/dev/ic/iosf.c

103

rv |= (offset & IOSF_MBI_MASK_LO) << IOSF_MBI_MCR_OFFSET_SHIFT;

sys/dev/ic/iosf.c

108

iosf_mbi_mcrx(uint32_t offset)

sys/dev/ic/iosf.c

110

return (offset & IOSF_MBI_MASK_HI);

sys/dev/ic/iosf.c

119

uint32_t offset)

sys/dev/ic/iosf.c

123

mcr = iosf_mbi_mcr(op, port, offset);

sys/dev/ic/iosf.c

124

mcrx = iosf_mbi_mcrx(offset);

sys/dev/ic/iosf.c

135

uint32_t offset, uint32_t mdr)

sys/dev/ic/iosf.c

139

mcr = iosf_mbi_mcr(op, port, offset);

sys/dev/ic/iosf.c

140

mcrx = iosf_mbi_mcrx(offset);

sys/dev/ic/iosf.c

149

uint32_t offset, uint32_t bits, uint32_t mask)

sys/dev/ic/iosf.c

153

mcr = iosf_mbi_mcr(op, port, offset);

sys/dev/ic/iosf.c

154

mcrx = iosf_mbi_mcrx(offset);

sys/dev/ic/iosf.c

172

iosf_mbi_read(uint8_t port, uint8_t opcode, uint32_t offset, uint32_t *mdrp)

sys/dev/ic/iosf.c

182

*mdrp = iosf_mbi_mdr_read(mbi, port, opcode, offset);

sys/dev/ic/iosf.c

188

iosf_mbi_write(uint8_t port, uint8_t opcode, uint32_t offset, uint32_t mdr)

sys/dev/ic/iosf.c

198

iosf_mbi_mdr_write(mbi, port, opcode, offset, mdr);

sys/dev/ic/iosf.c

204

iosf_mbi_modify(uint8_t port, uint8_t opcode, uint32_t offset,

sys/dev/ic/iosf.c

215

iosf_mbi_mdr_modify(mbi, port, opcode, offset, bits, mask);

sys/dev/ic/iosf.c

98

iosf_mbi_mcr(uint8_t op, uint8_t port, uint32_t offset)

sys/dev/ic/lemac.c

254

lemac_input(struct lemac_softc *sc, bus_size_t offset, size_t length)

sys/dev/ic/lemac.c

265

LEMAC_GETBUF16(sc, offset, sizeof(eh) / 2, (void *)&eh);

sys/dev/ic/lemac.c

284

LEMAC_GETBUF16(sc, offset + sizeof(eh),

sys/dev/ic/lemac.c

289

offset + length - 1);

sys/dev/ic/mc6845reg.h

35

char vsyncs, vsynce, vde, offset;

sys/dev/ic/mpi.c

564

struct mpi_cfg_raid_physdisk *physdisk, int period, int offset, int try)

sys/dev/ic/mpi.c

574

"link quirks: 0x%x\n", DEVNAME(sc), period, offset, try,

sys/dev/ic/mpi.c

632

pg1.req_offset = offset;

sys/dev/ic/ncr53c9x.c

1621

ti->offset = sc->sc_imess[4];

sys/dev/ic/ncr53c9x.c

1624

ti->offset == 0 ||

sys/dev/ic/ncr53c9x.c

1635

ti->offset = 0;

sys/dev/ic/ncr53c9x.c

1666

if (ti->offset > 15)

sys/dev/ic/ncr53c9x.c

1667

ti->offset = 15;

sys/dev/ic/ncr53c9x.c

1816

sc->sc_omess[4] = ti->offset;

sys/dev/ic/ncr53c9x.c

2374

ti->offset = 15;

sys/dev/ic/ncr53c9x.c

445

ti->offset = 0;

sys/dev/ic/ncr53c9x.c

531

syncoff = ti->offset;

sys/dev/ic/ncr53c9xvar.h

172

u_char offset; /* Offset suggestion */

sys/dev/ic/oosiop.c

671

oosiop_set_syncparam(struct oosiop_softc *sc, int id, int period, int offset)

sys/dev/ic/oosiop.c

677

if (offset == 0) {

sys/dev/ic/oosiop.c

696

sc->sc_tgt[id].sxfer = ((i - 4) << 4) | offset;

sys/dev/ic/oosiop.c

710

sc->sc_tgt[id].sxfer = (synctbl[i].tp << 4) | offset;

sys/dev/ic/osiop.c

1138

ti->offset = 0;

sys/dev/ic/osiop.c

1180

ti->offset = ds->msgbuf[5];

sys/dev/ic/osiop.c

1793

if (ti->offset != 0) {

sys/dev/ic/osiop.c

1829

printf(" MHz %d REQ/ACK offset", ti->offset);

sys/dev/ic/osiop.c

1844

int period, offset, sxfer, sbcl;

sys/dev/ic/osiop.c

1850

offset = sc->sc_tinfo[target].offset;

sys/dev/ic/osiop.c

1854

if (offset <= OSIOP_MAX_OFFSET)

sys/dev/ic/osiop.c

1855

sxfer = offset;

sys/dev/ic/osiop.c

1880

sxfer = (sxfer << 4) | ((offset <= OSIOP_MAX_OFFSET) ?

sys/dev/ic/osiop.c

1881

offset : OSIOP_MAX_OFFSET);

sys/dev/ic/osiop.c

864

sc->sc_tinfo[i].offset = 0;

sys/dev/ic/osiop.c

977

ti->offset = 0;

sys/dev/ic/osiopvar.h

185

int offset; /* Offset suggestion */

sys/dev/ic/pgt.c

193

pgt_read_4(struct pgt_softc *sc, uint16_t offset)

sys/dev/ic/pgt.c

195

return (bus_space_read_4(sc->sc_iotag, sc->sc_iohandle, offset));

sys/dev/ic/pgt.c

199

pgt_write_4(struct pgt_softc *sc, uint16_t offset, uint32_t value)

sys/dev/ic/pgt.c

201

bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, offset, value);

sys/dev/ic/pgt.c

209

pgt_write_4_flush(struct pgt_softc *sc, uint16_t offset, uint32_t value)

sys/dev/ic/pgt.c

211

bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, offset, value);

sys/dev/ic/qla.c

1015

offset = (req * QLA_QUEUE_ENTRY_SIZE);

sys/dev/ic/qla.c

1016

iocb = QLA_DMA_KVA(sc->sc_requests) + offset;

sys/dev/ic/qla.c

1018

offset, QLA_QUEUE_ENTRY_SIZE, BUS_DMASYNC_POSTWRITE);

sys/dev/ic/qla.c

1028

offset = (req * QLA_QUEUE_ENTRY_SIZE);

sys/dev/ic/qla.c

1029

iocb = QLA_DMA_KVA(sc->sc_requests) + offset;

sys/dev/ic/qla.c

1030

bus_dmamap_sync(sc->sc_dmat, QLA_DMA_MAP(sc->sc_requests), offset,

sys/dev/ic/qla.c

1087

qla_read(struct qla_softc *sc, bus_size_t offset)

sys/dev/ic/qla.c

1090

v = bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset);

sys/dev/ic/qla.c

1091

bus_space_barrier(sc->sc_iot, sc->sc_ioh, offset, 2,

sys/dev/ic/qla.c

1097

qla_write(struct qla_softc *sc, bus_size_t offset, u_int16_t value)

sys/dev/ic/qla.c

1099

bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, value);

sys/dev/ic/qla.c

1100

bus_space_barrier(sc->sc_iot, sc->sc_ioh, offset, 2,

sys/dev/ic/qla.c

972

int offset, error, done;

sys/dev/ic/qlw.c

166

qlw_queue_read(struct qlw_softc *sc, bus_size_t offset)

sys/dev/ic/qlw.c

168

return qlw_read(sc, sc->sc_mbox_base + offset);

sys/dev/ic/qlw.c

172

qlw_queue_write(struct qlw_softc *sc, bus_size_t offset, u_int16_t value)

sys/dev/ic/qlw.c

174

qlw_write(sc, sc->sc_mbox_base + offset, value);

sys/dev/ic/qlw.c

808

int offset, error, done;

sys/dev/ic/qlw.c

854

offset = (req * QLW_QUEUE_ENTRY_SIZE);

sys/dev/ic/qlw.c

855

iocb = QLW_DMA_KVA(sc->sc_requests) + offset;

sys/dev/ic/qlw.c

857

offset, QLW_QUEUE_ENTRY_SIZE, BUS_DMASYNC_POSTWRITE);

sys/dev/ic/qlw.c

860

offset, QLW_QUEUE_ENTRY_SIZE, BUS_DMASYNC_PREWRITE);

sys/dev/ic/qlw.c

869

offset = (req * QLW_QUEUE_ENTRY_SIZE);

sys/dev/ic/qlw.c

870

iocb = QLW_DMA_KVA(sc->sc_requests) + offset;

sys/dev/ic/qlw.c

871

bus_dmamap_sync(sc->sc_dmat, QLW_DMA_MAP(sc->sc_requests), offset,

sys/dev/ic/qlw.c

880

bus_dmamap_sync(sc->sc_dmat, QLW_DMA_MAP(sc->sc_requests), offset,

sys/dev/ic/qlw.c

888

offset = (req * QLW_QUEUE_ENTRY_SIZE);

sys/dev/ic/qlw.c

889

iocb = QLW_DMA_KVA(sc->sc_requests) + offset;

sys/dev/ic/qlw.c

890

bus_dmamap_sync(sc->sc_dmat, QLW_DMA_MAP(sc->sc_requests), offset,

sys/dev/ic/qlw.c

897

bus_dmamap_sync(sc->sc_dmat, QLW_DMA_MAP(sc->sc_requests), offset,

sys/dev/ic/qlw.c

951

qlw_read(struct qlw_softc *sc, bus_size_t offset)

sys/dev/ic/qlw.c

954

v = bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset);

sys/dev/ic/qlw.c

955

bus_space_barrier(sc->sc_iot, sc->sc_ioh, offset, 2,

sys/dev/ic/qlw.c

961

qlw_write(struct qlw_softc *sc, bus_size_t offset, u_int16_t value)

sys/dev/ic/qlw.c

963

bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, value);

sys/dev/ic/qlw.c

964

bus_space_barrier(sc->sc_iot, sc->sc_ioh, offset, 2,

sys/dev/ic/qwx.c

4800

.offset = offsetof(struct qmi_response_type_v01, result),

sys/dev/ic/qwx.c

4809

.offset = offsetof(struct qmi_response_type_v01, error),

sys/dev/ic/qwx.c

4818

.offset = 0,

sys/dev/ic/qwx.c

4830

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4839

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4848

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4857

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4866

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4875

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4884

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4893

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4902

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4911

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4920

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4929

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4938

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4947

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4956

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4965

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4974

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4983

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

4993

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

5002

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

5011

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

5020

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

5029

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

5038

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwx.c

5055

.offset = offsetof(struct qmi_wlanfw_ind_register_resp_msg_v01,

sys/dev/ic/qwx.c

5065

.offset = offsetof(struct qmi_wlanfw_ind_register_resp_msg_v01,

sys/dev/ic/qwx.c

5074

.offset = offsetof(struct qmi_wlanfw_ind_register_resp_msg_v01,

sys/dev/ic/qwx.c

5091

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5100

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5109

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5118

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5127

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5136

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5145

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5154

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5163

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5172

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5181

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5190

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5199

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5208

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5217

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5226

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5235

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5244

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5253

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5262

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5271

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5280

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5289

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5298

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5307

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5316

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5325

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwx.c

5342

.offset = offsetof(struct qmi_wlanfw_host_cap_resp_msg_v01, resp),

sys/dev/ic/qwx.c

5359

.offset = offsetof(struct qmi_wlanfw_mem_cfg_s_v01, offset),

sys/dev/ic/qwx.c

5367

.offset = offsetof(struct qmi_wlanfw_mem_cfg_s_v01, size),

sys/dev/ic/qwx.c

5375

.offset = offsetof(struct qmi_wlanfw_mem_cfg_s_v01, secure_flag),

sys/dev/ic/qwx.c

5391

.offset = offsetof(struct qmi_wlanfw_mem_seg_s_v01,

sys/dev/ic/qwx.c

5400

.offset = offsetof(struct qmi_wlanfw_mem_seg_s_v01, type),

sys/dev/ic/qwx.c

5408

.offset = offsetof(struct qmi_wlanfw_mem_seg_s_v01, mem_cfg_len),

sys/dev/ic/qwx.c

5416

.offset = offsetof(struct qmi_wlanfw_mem_seg_s_v01, mem_cfg),

sys/dev/ic/qwx.c

5433

.offset = offsetof(struct qmi_wlanfw_request_mem_ind_msg_v01,

sys/dev/ic/qwx.c

5442

.offset = offsetof(struct qmi_wlanfw_request_mem_ind_msg_v01,

sys/dev/ic/qwx.c

5460

.offset = offsetof(struct qmi_wlanfw_mem_seg_resp_s_v01, addr),

sys/dev/ic/qwx.c

5468

.offset = offsetof(struct qmi_wlanfw_mem_seg_resp_s_v01, size),

sys/dev/ic/qwx.c

5476

.offset = offsetof(struct qmi_wlanfw_mem_seg_resp_s_v01, type),

sys/dev/ic/qwx.c

5484

.offset = offsetof(struct qmi_wlanfw_mem_seg_resp_s_v01, restore),

sys/dev/ic/qwx.c

5500

.offset = offsetof(struct qmi_wlanfw_respond_mem_req_msg_v01,

sys/dev/ic/qwx.c

5509

.offset = offsetof(struct qmi_wlanfw_respond_mem_req_msg_v01,

sys/dev/ic/qwx.c

5527

.offset = offsetof(struct qmi_wlanfw_respond_mem_resp_msg_v01,

sys/dev/ic/qwx.c

5553

.offset = offsetof(struct qmi_wlanfw_rf_chip_info_s_v01,

sys/dev/ic/qwx.c

5562

.offset = offsetof(struct qmi_wlanfw_rf_chip_info_s_v01,

sys/dev/ic/qwx.c

5579

.offset = offsetof(struct qmi_wlanfw_rf_board_info_s_v01,

sys/dev/ic/qwx.c

5596

.offset = offsetof(struct qmi_wlanfw_soc_info_s_v01, soc_id),

sys/dev/ic/qwx.c

5612

.offset = offsetof(struct qmi_wlanfw_fw_version_info_s_v01,

sys/dev/ic/qwx.c

5621

.offset = offsetof(struct qmi_wlanfw_fw_version_info_s_v01,

sys/dev/ic/qwx.c

5638

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01, resp),

sys/dev/ic/qwx.c

5647

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5656

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5666

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5675

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5685

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5694

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5704

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5713

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5723

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5732

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5741

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5750

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5759

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5768

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5777

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5786

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5795

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5804

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5813

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5822

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwx.c

5839

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5848

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5857

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5866

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5875

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5884

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5893

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5902

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5911

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5920

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5929

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5938

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5947

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5956

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwx.c

5974

.offset = offsetof(struct qmi_wlanfw_bdf_download_resp_msg_v01,

sys/dev/ic/qwx.c

5992

.offset = offsetof(struct qmi_wlanfw_m3_info_req_msg_v01, addr),

sys/dev/ic/qwx.c

6000

.offset = offsetof(struct qmi_wlanfw_m3_info_req_msg_v01, size),

sys/dev/ic/qwx.c

6016

.offset = offsetof(struct qmi_wlanfw_m3_info_resp_msg_v01, resp),

sys/dev/ic/qwx.c

6033

.offset = offsetof(struct qmi_wlanfw_wlan_ini_req_msg_v01,

sys/dev/ic/qwx.c

6042

.offset = offsetof(struct qmi_wlanfw_wlan_ini_req_msg_v01,

sys/dev/ic/qwx.c

6059

.offset = offsetof(struct qmi_wlanfw_wlan_ini_resp_msg_v01,

sys/dev/ic/qwx.c

6077

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwx.c

6086

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwx.c

6095

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwx.c

6104

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwx.c

6113

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwx.c

6130

.offset = offsetof(struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01,

sys/dev/ic/qwx.c

6139

.offset = offsetof(struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01,

sys/dev/ic/qwx.c

6148

.offset = offsetof(struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01,

sys/dev/ic/qwx.c

6165

.offset = offsetof(struct qmi_wlanfw_shadow_reg_cfg_s_v01, id),

sys/dev/ic/qwx.c

6173

.offset = offsetof(struct qmi_wlanfw_shadow_reg_cfg_s_v01,

sys/dev/ic/qwx.c

6174

offset),

sys/dev/ic/qwx.c

6189

.offset = offsetof(struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01,

sys/dev/ic/qwx.c

6206

.offset = offsetof(struct qmi_wlanfw_wlan_mode_req_msg_v01,

sys/dev/ic/qwx.c

6215

.offset = offsetof(struct qmi_wlanfw_wlan_mode_req_msg_v01,

sys/dev/ic/qwx.c

6224

.offset = offsetof(struct qmi_wlanfw_wlan_mode_req_msg_v01,

sys/dev/ic/qwx.c

6241

.offset = offsetof(struct qmi_wlanfw_wlan_mode_resp_msg_v01,

sys/dev/ic/qwx.c

6259

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6268

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6277

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6286

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6296

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6306

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6315

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6324

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6334

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6343

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6352

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6362

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6371

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6380

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwx.c

6398

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_resp_msg_v01, resp),

sys/dev/ic/qwx.c

6637

if (ei->offset + ei->elem_size > output_len) {

sys/dev/ic/qwx.c

6738

if (ei->offset + sizeof(*datalen) > output_len) {

sys/dev/ic/qwx.c

6743

memcpy(output + ei->offset, datalen, sizeof(*datalen));

sys/dev/ic/qwx.c

6884

if (ei->offset + ei->elem_size > output_len) {

sys/dev/ic/qwx.c

6898

if (qwx_qmi_decode_byte(output + ei->offset, ei, p))

sys/dev/ic/qwx.c

6906

if (qwx_qmi_decode_word(output + ei->offset, ei, p))

sys/dev/ic/qwx.c

6914

if (qwx_qmi_decode_dword(output + ei->offset, ei, p))

sys/dev/ic/qwx.c

6921

if (qwx_qmi_decode_qword(output + ei->offset, ei, p))

sys/dev/ic/qwx.c

6936

output + ei->offset, output_len - ei->offset,

sys/dev/ic/qwx.c

6946

output + ei->offset, output_len - ei->offset,

sys/dev/ic/qwx.c

7007

if (ei->offset + ei->elem_size > output_len) {

sys/dev/ic/qwx.c

7013

pvalid = (uint8_t *)output + ei->offset;

sys/dev/ic/qwx.c

7112

outoff = ei->offset + (ei->elem_size * i);

sys/dev/ic/qwx.c

7834

memcpy(datalen, input + ei->offset, sizeof(uint32_t));

sys/dev/ic/qwx.c

7861

memcpy(p, input + ei->offset + (i * ei->elem_size), ei->elem_size);

sys/dev/ic/qwx.c

7879

memcpy(&val, input + ei->offset + (i * ei->elem_size), ei->elem_size);

sys/dev/ic/qwx.c

7899

memcpy(&val, input + ei->offset + (i * ei->elem_size), ei->elem_size);

sys/dev/ic/qwx.c

7919

memcpy(&val, input + ei->offset + (i * ei->elem_size), ei->elem_size);

sys/dev/ic/qwx.c

7938

memcpy(&do_encode, input + ei->offset, sizeof(uint8_t));

sys/dev/ic/qwx.c

8028

if (ei->offset + ei->elem_size > input_len) {

sys/dev/ic/qwx.c

8042

memcpy(&do_encode, input + ei->offset, sizeof(uint8_t));

sys/dev/ic/qwx.c

8077

size_t inoff = ei->offset + (i * ei->elem_size);

sys/dev/ic/qwx.c

8091

size_t inoff = ei->offset;

sys/dev/ic/qwx.c

8127

memcpy(&do_encode, input + ei->offset, sizeof(uint8_t));

sys/dev/ic/qwx.c

8166

size_t inoff = ei->offset + (i * ei->elem_size);

sys/dev/ic/qwxreg.h

6483

uint32_t offset;

sys/dev/ic/qwxreg.h

6630

uint64_t offset;

sys/dev/ic/qwxreg.h

6720

uint16_t offset;

sys/dev/ic/qwz.c

1828

.offset = offsetof(struct qmi_response_type_v01, result),

sys/dev/ic/qwz.c

1837

.offset = offsetof(struct qmi_response_type_v01, error),

sys/dev/ic/qwz.c

1846

.offset = 0,

sys/dev/ic/qwz.c

1858

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1867

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1876

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1885

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1894

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1903

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1912

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1921

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1930

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1939

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1948

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1957

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1966

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1975

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1984

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

1993

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2002

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2011

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2021

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2030

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2039

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2048

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2057

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2066

.offset = offsetof(struct qmi_wlanfw_ind_register_req_msg_v01,

sys/dev/ic/qwz.c

2083

.offset = offsetof(struct qmi_wlanfw_ind_register_resp_msg_v01,

sys/dev/ic/qwz.c

2093

.offset = offsetof(struct qmi_wlanfw_ind_register_resp_msg_v01,

sys/dev/ic/qwz.c

2102

.offset = offsetof(struct qmi_wlanfw_ind_register_resp_msg_v01,

sys/dev/ic/qwz.c

2119

.offset = offsetof(struct wlfw_host_mlo_chip_info_s_v01,

sys/dev/ic/qwz.c

2128

.offset = offsetof(struct wlfw_host_mlo_chip_info_s_v01,

sys/dev/ic/qwz.c

2137

.offset = offsetof(struct wlfw_host_mlo_chip_info_s_v01,

sys/dev/ic/qwz.c

2146

.offset = offsetof(struct wlfw_host_mlo_chip_info_s_v01,

sys/dev/ic/qwz.c

2163

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2172

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2181

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2190

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2199

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2208

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2217

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2226

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2235

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2244

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2253

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2262

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2271

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2280

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2289

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2298

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2307

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2316

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2325

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2334

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2343

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2352

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2361

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2370

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2379

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2388

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2397

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2406

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2415

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2424

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2433

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2442

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2451

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2460

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2469

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2478

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2487

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2496

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2505

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2514

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2523

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2532

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2541

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2550

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2559

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2568

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2577

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2587

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2596

.offset = offsetof(struct qmi_wlanfw_host_cap_req_msg_v01,

sys/dev/ic/qwz.c

2613

.offset = offsetof(struct qmi_wlanfw_host_cap_resp_msg_v01, resp),

sys/dev/ic/qwz.c

2638

.offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01, resp),

sys/dev/ic/qwz.c

2647

.offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,

sys/dev/ic/qwz.c

2656

.offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,

sys/dev/ic/qwz.c

2665

.offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,

sys/dev/ic/qwz.c

2674

.offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,

sys/dev/ic/qwz.c

2683

.offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,

sys/dev/ic/qwz.c

2692

.offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,

sys/dev/ic/qwz.c

2709

.offset = offsetof(struct qmi_wlanfw_mem_cfg_s_v01, offset),

sys/dev/ic/qwz.c

2717

.offset = offsetof(struct qmi_wlanfw_mem_cfg_s_v01, size),

sys/dev/ic/qwz.c

2725

.offset = offsetof(struct qmi_wlanfw_mem_cfg_s_v01, secure_flag),

sys/dev/ic/qwz.c

2741

.offset = offsetof(struct qmi_wlanfw_mem_seg_s_v01,

sys/dev/ic/qwz.c

2750

.offset = offsetof(struct qmi_wlanfw_mem_seg_s_v01, type),

sys/dev/ic/qwz.c

2758

.offset = offsetof(struct qmi_wlanfw_mem_seg_s_v01, mem_cfg_len),

sys/dev/ic/qwz.c

2766

.offset = offsetof(struct qmi_wlanfw_mem_seg_s_v01, mem_cfg),

sys/dev/ic/qwz.c

2783

.offset = offsetof(struct qmi_wlanfw_request_mem_ind_msg_v01,

sys/dev/ic/qwz.c

2792

.offset = offsetof(struct qmi_wlanfw_request_mem_ind_msg_v01,

sys/dev/ic/qwz.c

2810

.offset = offsetof(struct qmi_wlanfw_mem_seg_resp_s_v01, addr),

sys/dev/ic/qwz.c

2818

.offset = offsetof(struct qmi_wlanfw_mem_seg_resp_s_v01, size),

sys/dev/ic/qwz.c

2826

.offset = offsetof(struct qmi_wlanfw_mem_seg_resp_s_v01, type),

sys/dev/ic/qwz.c

2834

.offset = offsetof(struct qmi_wlanfw_mem_seg_resp_s_v01, restore),

sys/dev/ic/qwz.c

2850

.offset = offsetof(struct qmi_wlanfw_respond_mem_req_msg_v01,

sys/dev/ic/qwz.c

2859

.offset = offsetof(struct qmi_wlanfw_respond_mem_req_msg_v01,

sys/dev/ic/qwz.c

2877

.offset = offsetof(struct qmi_wlanfw_respond_mem_resp_msg_v01,

sys/dev/ic/qwz.c

2903

.offset = offsetof(struct qmi_wlanfw_rf_chip_info_s_v01,

sys/dev/ic/qwz.c

2912

.offset = offsetof(struct qmi_wlanfw_rf_chip_info_s_v01,

sys/dev/ic/qwz.c

2929

.offset = offsetof(struct qmi_wlanfw_rf_board_info_s_v01,

sys/dev/ic/qwz.c

2946

.offset = offsetof(struct qmi_wlanfw_soc_info_s_v01, soc_id),

sys/dev/ic/qwz.c

2962

.offset = offsetof(struct qmi_wlanfw_dev_mem_info_s_v01,

sys/dev/ic/qwz.c

2971

.offset = offsetof(struct qmi_wlanfw_dev_mem_info_s_v01,

sys/dev/ic/qwz.c

2988

.offset = offsetof(struct qmi_wlanfw_fw_version_info_s_v01,

sys/dev/ic/qwz.c

2997

.offset = offsetof(struct qmi_wlanfw_fw_version_info_s_v01,

sys/dev/ic/qwz.c

3014

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01, resp),

sys/dev/ic/qwz.c

3023

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3032

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3042

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3051

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3061

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3070

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3080

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3089

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3099

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3108

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3117

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3126

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3135

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3144

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3153

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3162

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3171

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3180

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3189

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3198

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3207

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3216

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01, fw_caps),

sys/dev/ic/qwz.c

3224

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3233

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3242

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,

sys/dev/ic/qwz.c

3251

.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01, dev_mem),

sys/dev/ic/qwz.c

3268

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3277

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3286

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3295

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3304

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3313

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3322

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3331

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3340

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3349

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3358

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3367

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3376

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3385

.offset = offsetof(struct qmi_wlanfw_bdf_download_req_msg_v01,

sys/dev/ic/qwz.c

3403

.offset = offsetof(struct qmi_wlanfw_bdf_download_resp_msg_v01,

sys/dev/ic/qwz.c

3421

.offset = offsetof(struct qmi_wlanfw_m3_info_req_msg_v01, addr),

sys/dev/ic/qwz.c

3429

.offset = offsetof(struct qmi_wlanfw_m3_info_req_msg_v01, size),

sys/dev/ic/qwz.c

3445

.offset = offsetof(struct qmi_wlanfw_m3_info_resp_msg_v01, resp),

sys/dev/ic/qwz.c

3462

.offset = offsetof(struct qmi_wlanfw_wlan_ini_req_msg_v01,

sys/dev/ic/qwz.c

3471

.offset = offsetof(struct qmi_wlanfw_wlan_ini_req_msg_v01,

sys/dev/ic/qwz.c

3488

.offset = offsetof(struct qmi_wlanfw_wlan_ini_resp_msg_v01,

sys/dev/ic/qwz.c

3506

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwz.c

3515

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwz.c

3524

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwz.c

3533

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwz.c

3542

.offset = offsetof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01,

sys/dev/ic/qwz.c

3559

.offset = offsetof(struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01,

sys/dev/ic/qwz.c

3568

.offset = offsetof(struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01,

sys/dev/ic/qwz.c

3577

.offset = offsetof(struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01,

sys/dev/ic/qwz.c

3594

.offset = offsetof(struct qmi_wlanfw_shadow_reg_cfg_s_v01, id),

sys/dev/ic/qwz.c

3602

.offset = offsetof(struct qmi_wlanfw_shadow_reg_cfg_s_v01,

sys/dev/ic/qwz.c

3603

offset),

sys/dev/ic/qwz.c

3618

.offset = offsetof(struct qmi_wlanfw_shadow_reg_v3_cfg_s_v01,

sys/dev/ic/qwz.c

3635

.offset = offsetof(struct qmi_wlanfw_wlan_mode_req_msg_v01,

sys/dev/ic/qwz.c

3644

.offset = offsetof(struct qmi_wlanfw_wlan_mode_req_msg_v01,

sys/dev/ic/qwz.c

3653

.offset = offsetof(struct qmi_wlanfw_wlan_mode_req_msg_v01,

sys/dev/ic/qwz.c

3670

.offset = offsetof(struct qmi_wlanfw_wlan_mode_resp_msg_v01,

sys/dev/ic/qwz.c

3688

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3697

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3706

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3715

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3725

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3735

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3744

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3753

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3763

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3772

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3781

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3791

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3800

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3809

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,

sys/dev/ic/qwz.c

3827

.offset = offsetof(struct qmi_wlanfw_wlan_cfg_resp_msg_v01, resp),

sys/dev/ic/qwz.c

4066

if (ei->offset + ei->elem_size > output_len) {

sys/dev/ic/qwz.c

4167

if (ei->offset + sizeof(*datalen) > output_len) {

sys/dev/ic/qwz.c

4172

memcpy(output + ei->offset, datalen, sizeof(*datalen));

sys/dev/ic/qwz.c

4313

if (ei->offset + ei->elem_size > output_len) {

sys/dev/ic/qwz.c

4327

if (qwz_qmi_decode_byte(output + ei->offset, ei, p))

sys/dev/ic/qwz.c

4335

if (qwz_qmi_decode_word(output + ei->offset, ei, p))

sys/dev/ic/qwz.c

4343

if (qwz_qmi_decode_dword(output + ei->offset, ei, p))

sys/dev/ic/qwz.c

4350

if (qwz_qmi_decode_qword(output + ei->offset, ei, p))

sys/dev/ic/qwz.c

4365

output + ei->offset, output_len - ei->offset,

sys/dev/ic/qwz.c

4375

output + ei->offset, output_len - ei->offset,

sys/dev/ic/qwz.c

4436

if (ei->offset + ei->elem_size > output_len) {

sys/dev/ic/qwz.c

4442

pvalid = (uint8_t *)output + ei->offset;

sys/dev/ic/qwz.c

4541

outoff = ei->offset + (ei->elem_size * i);

sys/dev/ic/qwz.c

5317

memcpy(datalen, input + ei->offset, sizeof(uint32_t));

sys/dev/ic/qwz.c

5344

memcpy(p, input + ei->offset + (i * ei->elem_size), ei->elem_size);

sys/dev/ic/qwz.c

5362

memcpy(&val, input + ei->offset + (i * ei->elem_size), ei->elem_size);

sys/dev/ic/qwz.c

5382

memcpy(&val, input + ei->offset + (i * ei->elem_size), ei->elem_size);

sys/dev/ic/qwz.c

5402

memcpy(&val, input + ei->offset + (i * ei->elem_size), ei->elem_size);

sys/dev/ic/qwz.c

5421

memcpy(&do_encode, input + ei->offset, sizeof(uint8_t));

sys/dev/ic/qwz.c

5511

if (ei->offset + ei->elem_size > input_len) {

sys/dev/ic/qwz.c

5525

memcpy(&do_encode, input + ei->offset, sizeof(uint8_t));

sys/dev/ic/qwz.c

5560

size_t inoff = ei->offset + (i * ei->elem_size);

sys/dev/ic/qwz.c

5574

size_t inoff = ei->offset;

sys/dev/ic/qwz.c

5610

memcpy(&do_encode, input + ei->offset, sizeof(uint8_t));

sys/dev/ic/qwz.c

5649

size_t inoff = ei->offset + (i * ei->elem_size);

sys/dev/ic/qwzreg.h

6537

uint32_t offset;

sys/dev/ic/qwzreg.h

6755

uint64_t offset;

sys/dev/ic/qwzreg.h

6845

uint16_t offset;

sys/dev/ic/rt2661reg.h

249

uint8_t offset;

sys/dev/ic/rt2661reg.h

277

uint8_t offset;

sys/dev/ic/rt2661reg.h

336

RAL_READ_REGION_4(struct rt2661_softc *sc, bus_size_t offset,

sys/dev/ic/rt2661reg.h

340

for (; count > 0; count--, datap++, offset += 4)

sys/dev/ic/rt2661reg.h

341

*datap = RAL_READ(sc, offset);

sys/dev/ic/rt2661reg.h

359

RAL_WRITE_REGION_1(struct rt2661_softc *sc, bus_size_t offset,

sys/dev/ic/rt2661reg.h

363

for (; count > 0; count--, datap++, offset++)

sys/dev/ic/rt2661reg.h

364

RAL_WRITE_1(sc, offset, *datap);

sys/dev/ic/rt2860reg.h

1113

#define RAL_WRITE_REGION_1(sc, offset, datap, count) \

sys/dev/ic/rt2860reg.h

1114

bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \

sys/dev/ic/rt2860reg.h

1117

#define RAL_SET_REGION_4(sc, offset, val, count) \

sys/dev/ic/rt2860reg.h

1118

bus_space_set_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \

sys/dev/ic/rtl81x9reg.h

974

#define CSR_SETBIT_1(sc, offset, val) \

sys/dev/ic/rtl81x9reg.h

975

CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) | (val))

sys/dev/ic/rtl81x9reg.h

977

#define CSR_CLRBIT_1(sc, offset, val) \

sys/dev/ic/rtl81x9reg.h

978

CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) & ~(val))

sys/dev/ic/rtl81x9reg.h

980

#define CSR_SETBIT_2(sc, offset, val) \

sys/dev/ic/rtl81x9reg.h

981

CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) | (val))

sys/dev/ic/rtl81x9reg.h

983

#define CSR_CLRBIT_2(sc, offset, val) \

sys/dev/ic/rtl81x9reg.h

984

CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) & ~(val))

sys/dev/ic/rtl81x9reg.h

986

#define CSR_SETBIT_4(sc, offset, val) \

sys/dev/ic/rtl81x9reg.h

987

CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) | (val))

sys/dev/ic/rtl81x9reg.h

989

#define CSR_CLRBIT_4(sc, offset, val) \

sys/dev/ic/rtl81x9reg.h

990

CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val))

sys/dev/ic/rtwn.c

2572

int offset = chain * 0x20;

sys/dev/ic/rtwn.c

2626

tx[0] = (rtwn_bb_read(sc, R92C_TX_POWER_BEFORE_IQK_A + offset) >> 16)

sys/dev/ic/rtwn.c

2628

tx[1] = (rtwn_bb_read(sc, R92C_TX_POWER_AFTER_IQK_A + offset) >> 16)

sys/dev/ic/rtwn.c

2636

rx[0] = (rtwn_bb_read(sc, R92C_RX_POWER_BEFORE_IQK_A_2 + offset) >> 16)

sys/dev/ic/rtwn.c

2638

rx[1] = (rtwn_bb_read(sc, R92C_RX_POWER_AFTER_IQK_A_2 + offset) >> 16)

sys/dev/ic/siop.c

1016

offset = bus_space_read_1(sc->sc_c.sc_rt,

sys/dev/ic/siop.c

1024

if (offset == 0 &&

sys/dev/ic/siop.c

1026

offset = siop_cmd->saved_offset;

sys/dev/ic/siop.c

1027

siop_update_resid(&siop_cmd->cmd_c, offset);

sys/dev/ic/siop.c

128

bus_addr_t offset;

sys/dev/ic/siop.c

1292

sc->sc_c.targets[target]->offset = 0;

sys/dev/ic/siop.c

130

offset = siop_cmd->cmd_c.dsa -

sys/dev/ic/siop.c

133

SIOP_DMA_MAP(siop_cmd->siop_cbdp->xfers), offset,

sys/dev/ic/siop.c

146

siop_script_read(struct siop_softc *sc, u_int offset)

sys/dev/ic/siop.c

150

offset * 4);

sys/dev/ic/siop.c

152

return siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[offset]);

sys/dev/ic/siop.c

157

siop_script_write(struct siop_softc *sc, u_int offset, u_int32_t val)

sys/dev/ic/siop.c

161

offset * 4, val);

sys/dev/ic/siop.c

163

sc->sc_c.sc_script[offset] = siop_htoc32(&sc->sc_c, val);

sys/dev/ic/siop.c

347

int offset, target, lun, tag;

sys/dev/ic/siop.c

776

siop_target->target_c.offset = 0;

sys/dev/ic/siop.c

787

siop_target->target_c.offset = 0;

sys/dev/ic/siop.c

968

offset = bus_space_read_1(sc->sc_c.sc_rt,

sys/dev/ic/siop.c

971

printf("disconnect offset %d\n", offset);

sys/dev/ic/siop.c

973

siop_sdp(&siop_cmd->cmd_c, offset);

sys/dev/ic/siop.c

982

offset = bus_space_read_1(sc->sc_c.sc_rt,

sys/dev/ic/siop.c

985

printf("saveoffset offset %d\n", offset);

sys/dev/ic/siop.c

987

siop_cmd->saved_offset = offset;

sys/dev/ic/siop_common.c

1023

printf(" MHz %d REQ/ACK offset ", siop_target->offset);

sys/dev/ic/siop_common.c

350

siop_target->offset = siop_target->period = 0;

sys/dev/ic/siop_common.c

392

siop_target->offset = siop_target->period = 0;

sys/dev/ic/siop_common.c

407

int sync, offset, options, scf = 0;

sys/dev/ic/siop_common.c

420

offset = tables->msg_in[5];

sys/dev/ic/siop_common.c

428

siop_target->offset = 0;

sys/dev/ic/siop_common.c

433

if (offset > sc->maxoff || sync < sc->dt_minsync ||

sys/dev/ic/siop_common.c

437

sc->sc_dev.dv_xname, target, offset, sync);

sys/dev/ic/siop_common.c

441

siop_target->offset = 0;

sys/dev/ic/siop_common.c

452

siop_target->offset = offset;

sys/dev/ic/siop_common.c

468

siop_target->offset = 0;

sys/dev/ic/siop_common.c

480

siop_target->offset = 0;

sys/dev/ic/siop_common.c

490

(siop_target->offset & SXFER_MO_MASK) << 8;

sys/dev/ic/siop_common.c

519

int sync, maxoffset, offset, i;

sys/dev/ic/siop_common.c

527

offset = tables->msg_in[4];

sys/dev/ic/siop_common.c

533

printf("sdtr: sync %d offset %d\n", sync, offset);

sys/dev/ic/siop_common.c

535

if (offset > maxoffset || sync < sc->st_minsync ||

sys/dev/ic/siop_common.c

544

siop_target->offset = offset;

sys/dev/ic/siop_common.c

560

(offset & SXFER_MO_MASK) << 8;

sys/dev/ic/siop_common.c

577

siop_target->offset = siop_target->period = 0;

sys/dev/ic/siop_common.c

580

printf("sdtr (target): sync %d offset %d\n", sync, offset);

sys/dev/ic/siop_common.c

582

if (offset == 0 || sync > sc->st_maxsync) { /* async */

sys/dev/ic/siop_common.c

585

if (offset > maxoffset)

sys/dev/ic/siop_common.c

586

offset = maxoffset;

sys/dev/ic/siop_common.c

596

siop_target->offset = offset;

sys/dev/ic/siop_common.c

612

(offset & SXFER_MO_MASK) << 8;

sys/dev/ic/siop_common.c

614

siop_sdtr_msg(siop_cmd, 0, sync, offset);

sys/dev/ic/siop_common.c

620

siop_target->offset = siop_target->period = 0;

sys/dev/ic/siop_common.c

647

siop_sdtr_msg(struct siop_common_cmd *siop_cmd, int offset, int ssync, int soff)

sys/dev/ic/siop_common.c

649

siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;

sys/dev/ic/siop_common.c

650

siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_SDTR_LEN;

sys/dev/ic/siop_common.c

651

siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_SDTR;

sys/dev/ic/siop_common.c

652

siop_cmd->siop_tables->msg_out[offset + 3] = ssync;

sys/dev/ic/siop_common.c

653

siop_cmd->siop_tables->msg_out[offset + 4] = soff;

sys/dev/ic/siop_common.c

655

siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_SDTR_LEN + 2);

sys/dev/ic/siop_common.c

659

siop_wdtr_msg(struct siop_common_cmd *siop_cmd, int offset, int wide)

sys/dev/ic/siop_common.c

661

siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;

sys/dev/ic/siop_common.c

662

siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_WDTR_LEN;

sys/dev/ic/siop_common.c

663

siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_WDTR;

sys/dev/ic/siop_common.c

664

siop_cmd->siop_tables->msg_out[offset + 3] = wide;

sys/dev/ic/siop_common.c

666

siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_WDTR_LEN + 2);

sys/dev/ic/siop_common.c

670

siop_ppr_msg(struct siop_common_cmd *siop_cmd, int offset, int ssync, int soff)

sys/dev/ic/siop_common.c

672

siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;

sys/dev/ic/siop_common.c

673

siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_PPR_LEN;

sys/dev/ic/siop_common.c

674

siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_PPR;

sys/dev/ic/siop_common.c

675

siop_cmd->siop_tables->msg_out[offset + 3] = ssync;

sys/dev/ic/siop_common.c

676

siop_cmd->siop_tables->msg_out[offset + 4] = 0; /* reserved */

sys/dev/ic/siop_common.c

677

siop_cmd->siop_tables->msg_out[offset + 5] = soff;

sys/dev/ic/siop_common.c

678

siop_cmd->siop_tables->msg_out[offset + 6] = 1; /* wide */

sys/dev/ic/siop_common.c

679

siop_cmd->siop_tables->msg_out[offset + 7] = MSG_EXT_PPR_PROT_DT;

sys/dev/ic/siop_common.c

681

siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_PPR_LEN + 2);

sys/dev/ic/siop_common.c

687

int offset, dbc, sstat;

sys/dev/ic/siop_common.c

699

offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);

sys/dev/ic/siop_common.c

700

if (offset >= SIOP_NSG) {

sys/dev/ic/siop_common.c

702

sc->sc_dev.dv_xname, offset);

sys/dev/ic/siop_common.c

705

table = &siop_cmd->siop_tables->data[offset];

sys/dev/ic/siop_common.c

707

printf("siop_ma: offset %d count=%d addr=0x%x ", offset,

sys/dev/ic/siop_common.c

751

siop_sdp(struct siop_common_cmd *siop_cmd, int offset)

sys/dev/ic/siop_common.c

764

if (offset == SIOP_NSG)

sys/dev/ic/siop_common.c

767

if (offset > SIOP_NSG) {

sys/dev/ic/siop_common.c

769

printf("offset %d > %d\n", offset, SIOP_NSG);

sys/dev/ic/siop_common.c

783

siop_update_resid(siop_cmd, offset);

sys/dev/ic/siop_common.c

791

table = &siop_cmd->siop_tables->data[offset];

sys/dev/ic/siop_common.c

804

bcopy(&siop_cmd->siop_tables->data[offset],

sys/dev/ic/siop_common.c

806

(SIOP_NSG - offset) * sizeof(scr_table_t));

sys/dev/ic/siop_common.c

810

siop_update_resid(struct siop_common_cmd *siop_cmd, int offset)

sys/dev/ic/siop_common.c

824

for (i = 0; i < offset; i++)

sys/dev/ic/siop_common.c

833

table = &siop_cmd->siop_tables->data[offset];

sys/dev/ic/siop_common.c

842

int offset;

sys/dev/ic/siop_common.c

854

offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);

sys/dev/ic/siop_common.c

860

offset--;

sys/dev/ic/siop_common.c

861

table = &siop_cmd->siop_tables->data[offset];

sys/dev/ic/siop_common.c

878

SIOP_SCRATCHA + 1, offset);

sys/dev/ic/siop_common.c

991

if (siop_target->offset == 0)

sys/dev/ic/siopvar_common.h

110

int offset;

sys/dev/ic/sti.c

1180

wdf->offset = 0;

sys/dev/ic/sti.c

1246

sti_mmap(void *v, off_t offset, int prot)

sys/dev/ic/sti.c

1254

if ((offset & PAGE_MASK) != 0)

sys/dev/ic/sti.c

1257

if (offset < 0 || offset >= scr->fblen)

sys/dev/ic/sti.c

1261

pa = bus_space_mmap(rom->memt, scr->fbaddr, offset, prot,

sys/dev/ic/sti.c

1264

pa = scr->fbaddr + offset;

sys/dev/ic/sti.c

462

addr = bases[regno] + (r->offset << PGSHIFT);

sys/dev/ic/stireg.h

175

u_int offset :14; /* page offset dev io space relative */

sys/dev/ic/tcic2.c

1130

tcic_chip_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset,

sys/dev/ic/tcic2.c

1134

bus_addr_t ioaddr = pcihp->addr + offset;

sys/dev/ic/tcic2.c

840

(u_long)h->mem[win].offset));

sys/dev/ic/tcic2.c

862

reg = ((h->mem[win].offset >> TCIC_MEM_SHIFT) & TCIC_MMAP_ADDR_MASK);

sys/dev/ic/tcic2.c

970

h->mem[win].offset = card_offset;

sys/dev/ic/tcic2var.h

67

long offset;

sys/dev/ic/tea5757.c

114

reg = tea->read(tea->iot, tea->ioh, tea->offset);

sys/dev/ic/tea5757.c

123

tea->init(tea->iot, tea->ioh, tea->offset, 0);

sys/dev/ic/tea5757.c

127

tea->write_bit(tea->iot, tea->ioh, tea->offset, 1);

sys/dev/ic/tea5757.c

129

tea->write_bit(tea->iot, tea->ioh, tea->offset, 0);

sys/dev/ic/tea5757.c

131

tea->rset(tea->iot, tea->ioh, tea->offset, 0);

sys/dev/ic/tea5757.h

69

bus_size_t offset;

sys/dev/ic/tireg.h

1048

#define TI_RING_DMA_ADDR(sc, offset) \

sys/dev/ic/tireg.h

1050

offsetof(struct ti_ring_data, offset))

sys/dev/ic/tireg.h

1052

#define TI_RING_DMASYNC(sc, offset, op) \

sys/dev/ic/tireg.h

1054

offsetof(struct ti_ring_data, offset), \

sys/dev/ic/tireg.h

1055

sizeof(((struct ti_ring_data *)0)->offset), (op))

sys/dev/ic/vga.c

659

vga_mmap(void *v, off_t offset, int prot)

sys/dev/ic/vga.c

664

return (*vc->vc_mmap)(v, offset, prot);

sys/dev/ic/vga_subr.c

85

int offset, i, j, s;

sys/dev/ic/vga_subr.c

88

offset = (fontset << 13) | (first << 5);

sys/dev/ic/vga_subr.c

96

offset + (i << 5) + j,

sys/dev/ipmi.c

1001

cmd[4] = offset;

sys/dev/ipmi.c

1034

int len, sdrlen, offset;

sys/dev/ipmi.c

1066

for (offset = sizeof(shdr); offset < sdrlen; offset += maxsdrlen) {

sys/dev/ipmi.c

1067

len = sdrlen - offset;

sys/dev/ipmi.c

1071

if (get_sdr_partial(sc, recid, resid, offset, len,

sys/dev/ipmi.c

1072

psdr + offset, NULL)) {

sys/dev/ipmi.c

1074

offset, len);

sys/dev/ipmi.c

248

bmc_read(struct ipmi_softc *sc, int offset)

sys/dev/ipmi.c

252

offset * sc->sc_if_iospacing));

sys/dev/ipmi.c

255

offset * sc->sc_if_iospacing));

sys/dev/ipmi.c

259

bmc_write(struct ipmi_softc *sc, int offset, u_int8_t val)

sys/dev/ipmi.c

263

offset * sc->sc_if_iospacing, val);

sys/dev/ipmi.c

266

offset * sc->sc_if_iospacing, val);

sys/dev/ipmi.c

276

v = bmc_read(sc, a->offset);

sys/dev/ipmi.c

330

a.offset = _BT_CTRL_REG;

sys/dev/ipmi.c

353

a.offset = _BT_CTRL_REG;

sys/dev/ipmi.c

370

a.offset = _BT_CTRL_REG;

sys/dev/ipmi.c

469

a.offset = _SMIC_FLAG_REG;

sys/dev/ipmi.c

627

a.offset = _KCS_STATUS_REGISTER;

sys/dev/ipmi.c

994

u_int8_t offset, u_int8_t length, void *buffer, u_int16_t *nxtRecordId)

sys/dev/ipmivar.h

53

int offset;

sys/dev/isa/pcdisplay.c

331

pcdisplay_mmap(void *v, off_t offset, int prot)

sys/dev/kcov.c

412

kcovmmap(dev_t dev, off_t offset, int prot)

sys/dev/kcov.c

424

if (offset < 0 || offset >= kd->kd_nmemb * KCOV_BUF_MEMB_SIZE)

sys/dev/kcov.c

427

va = (vaddr_t)kd->kd_buf + offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1028

$$.offset = 0;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1033

$$.offset = $3;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1038

$$.offset = -$3;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1043

$$.offset = 0;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1048

$$.offset = $3;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1053

$$.offset = -$3;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1630

+ dest->offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1632

+ src->offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1703

+ dest->offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1705

+ src->offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1762

addr = instruction_ptr + address->offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1765

addr = address->offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1768

addr = address->symbol->info.linfo->address + address->offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

1772

+ src->offset;

sys/dev/microcode/aic7xxx/aicasm_gram.y

862

$$.offset = 0;

sys/dev/microcode/aic7xxx/aicasm_gram.y

877

$$.offset = $3->info.cinfo->value;

sys/dev/microcode/aic7xxx/aicasm_gram.y

888

$$.offset = $3;

sys/dev/microcode/aic7xxx/aicasm_gram.y

897

$$.offset = 0;

sys/dev/microcode/aic7xxx/aicasm_gram.y

947

$$.offset = 0;

sys/dev/microcode/aic7xxx/aicasm_symbol.h

145

int offset;

sys/dev/microcode/bwi/build/build.c

43

int i, j, offset;

sys/dev/microcode/bwi/build/build.c

87

for (i = 0, offset = headersize; i < nfiles; i++) {

sys/dev/microcode/bwi/build/build.c

88

h[i].fileoffset = offset;

sys/dev/microcode/bwi/build/build.c

89

offset += h[i].filesize;

sys/dev/microcode/siop/ncr53cxxx.c

110

unsigned offset;

sys/dev/microcode/siop/ncr53cxxx.c

459

fprintf (outfp, "\t0x%08x,\n", p->offset / 4);

sys/dev/microcode/siop/ncr53cxxx.c

524

fprintf (outfp, "\t0x%08x,\n", p->offset / 4);

sys/dev/microcode/siop/ncr53cxxx.c

642

if (p->offset > dsps)

sys/dev/microcode/siop/ncr53cxxx.c

645

script[p->offset / 4] += dsps;

sys/dev/microcode/siop/ncr53cxxx.c

676

p->offset = dsps + 4;

sys/dev/microcode/siop/ncr53cxxx.c

844

p->offset = dsps + 4;

sys/dev/microcode/siop/ncr53cxxx.c

859

p->offset = dsps + 4;

sys/dev/mii/mii.c

118

if (offloc != MII_OFFSET_ANY && offloc != offset) {

sys/dev/mii/mii.c

119

offset++;

sys/dev/mii/mii.c

143

child->mii_offset = offset;

sys/dev/mii/mii.c

146

offset++;

sys/dev/mii/mii.c

67

int bmsr, offset = 0;

sys/dev/mii/mii.c

97

offset++;

sys/dev/ofw/ofw_misc.c

109

regmap_write_4(struct regmap *rm, bus_size_t offset, uint32_t value)

sys/dev/ofw/ofw_misc.c

111

KASSERT(offset <= rm->rm_size - sizeof(uint32_t));

sys/dev/ofw/ofw_misc.c

112

bus_space_write_4(rm->rm_tag, rm->rm_handle, offset, value);

sys/dev/ofw/ofw_misc.c

116

regmap_read_4(struct regmap *rm, bus_size_t offset)

sys/dev/ofw/ofw_misc.c

118

KASSERT(offset <= rm->rm_size - sizeof(uint32_t));

sys/dev/ofw/ofw_misc.c

119

return bus_space_read_4(rm->rm_tag, rm->rm_handle, offset);

sys/dev/ofw/ofw_misc.c

631

uint32_t offset, bitlen;

sys/dev/ofw/ofw_misc.c

660

offset = nc->nc_offset % 8;

sys/dev/ofw/ofw_misc.c

676

*p++ |= (tmp << (8 - offset)) & (mask << (8 - offset));

sys/dev/ofw/ofw_misc.c

677

bitlen -= MIN(offset, bitlen);

sys/dev/ofw/ofw_misc.c

678

mask >>= offset;

sys/dev/ofw/ofw_misc.c

683

*p = (tmp >> offset) & mask;

sys/dev/ofw/ofw_misc.c

684

bitlen -= MIN(8 - offset, bitlen);

sys/dev/ofw/ofw_misc.c

706

uint32_t offset, bitlen;

sys/dev/ofw/ofw_misc.c

735

offset = nc->nc_offset % 8;

sys/dev/ofw/ofw_misc.c

750

tmp &= ~(mask << offset);

sys/dev/ofw/ofw_misc.c

751

tmp |= (*p++ << offset) & (mask << offset);

sys/dev/ofw/ofw_misc.c

752

bitlen -= MIN(8 - offset, bitlen);

sys/dev/ofw/ofw_misc.c

756

tmp &= ~(mask >> (8 - offset));

sys/dev/ofw/ofw_misc.c

757

tmp |= (*p >> (8 - offset)) & (mask >> (8 - offset));

sys/dev/ofw/ofw_misc.c

758

bitlen -= MIN(offset, bitlen);

sys/dev/pci/agp_ali.c

240

agp_ali_bind_page(void *sc, bus_addr_t offset, paddr_t physical, int flags)

sys/dev/pci/agp_ali.c

244

asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] =

sys/dev/pci/agp_ali.c

249

agp_ali_unbind_page(void *sc, bus_size_t offset)

sys/dev/pci/agp_ali.c

253

asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] = 0;

sys/dev/pci/agp_amd.c

319

agp_amd_bind_page(void *sc, bus_size_t offset, paddr_t physical, int flags)

sys/dev/pci/agp_amd.c

323

asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] =

sys/dev/pci/agp_amd.c

328

agp_amd_unbind_page(void *sc, bus_size_t offset)

sys/dev/pci/agp_amd.c

332

asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] = 0;

sys/dev/pci/agp_i810.c

578

agp_i810_bind_page(void *sc, bus_addr_t offset, paddr_t physical, int flags)

sys/dev/pci/agp_i810.c

589

intagp_write_gtt(isc, offset - isc->isc_apaddr, physical);

sys/dev/pci/agp_i810.c

593

agp_i810_unbind_page(void *sc, bus_size_t offset)

sys/dev/pci/agp_i810.c

597

intagp_write_gtt(isc, offset - isc->isc_apaddr,

sys/dev/pci/agp_intel.c

427

agp_intel_bind_page(void *sc, bus_addr_t offset, paddr_t physical, int flags)

sys/dev/pci/agp_intel.c

431

isc->gatt->ag_virtual[(offset - isc->isc_apaddr) >> AGP_PAGE_SHIFT] =

sys/dev/pci/agp_intel.c

436

agp_intel_unbind_page(void *sc, bus_size_t offset)

sys/dev/pci/agp_intel.c

440

isc->gatt->ag_virtual[(offset - isc->isc_apaddr) >> AGP_PAGE_SHIFT] = 0;

sys/dev/pci/agp_sis.c

226

agp_sis_bind_page(void *sc, bus_addr_t offset, paddr_t physical, int flags)

sys/dev/pci/agp_sis.c

230

ssc->gatt->ag_virtual[(offset - ssc->ssc_apaddr) >> AGP_PAGE_SHIFT] =

sys/dev/pci/agp_sis.c

235

agp_sis_unbind_page(void *sc, bus_addr_t offset)

sys/dev/pci/agp_sis.c

239

ssc->gatt->ag_virtual[(offset - ssc->ssc_apaddr) >> AGP_PAGE_SHIFT] = 0;

sys/dev/pci/agp_via.c

278

agp_via_bind_page(void *sc, bus_addr_t offset, paddr_t physical, int flags)

sys/dev/pci/agp_via.c

282

vsc->gatt->ag_virtual[(offset - vsc->vsc_apaddr) >> AGP_PAGE_SHIFT] =

sys/dev/pci/agp_via.c

287

agp_via_unbind_page(void *sc, bus_addr_t offset)

sys/dev/pci/agp_via.c

291

vsc->gatt->ag_virtual[(offset - vsc->vsc_apaddr) >> AGP_PAGE_SHIFT] = 0;

sys/dev/pci/autri.c

1167

sc->sc_play.offset = 0;

sys/dev/pci/autri.c

1206

sc->sc_rec.offset = 0;

sys/dev/pci/autrivar.h

57

u_int offset; /* filled up to here */

sys/dev/pci/azalia_codec.c

2570

azalia_ampcap_ov(widget_t *w, int type, int offset, int steps, int size,

sys/dev/pci/azalia_codec.c

2575

cap = (offset & 0x7f) | ((steps & 0x7f) << 8) |

sys/dev/pci/azalia_codec.c

2589

int bits, offset;

sys/dev/pci/azalia_codec.c

2594

offset = CORB_CD_DEVICE_OFFSET;

sys/dev/pci/azalia_codec.c

2598

offset = CORB_CD_PORT_OFFSET;

sys/dev/pci/azalia_codec.c

2605

w->d.pin.config |= val << offset;

sys/dev/pci/bktr/bktr_card.c

390

writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data )

sys/dev/pci/bktr/bktr_card.c

401

readEEProm(bktr_ptr_t bktr, int offset, int count, u_char *data)

sys/dev/pci/bktr/bktr_card.c

414

if ( (offset + count) > max )

sys/dev/pci/bktr/bktr_card.c

418

if ( i2cWrite( bktr, addr, offset, -1 ) == -1 )

sys/dev/pci/bktr/bktr_card.c

442

signCard( bktr_ptr_t bktr, int offset, int count, u_char *sig )

sys/dev/pci/bktr/bktr_card.h

88

int signCard( bktr_ptr_t bktr, int offset, int count, u_char *sig );

sys/dev/pci/bktr/bktr_card.h

91

int writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data );

sys/dev/pci/bktr/bktr_card.h

92

int readEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data );

sys/dev/pci/bktr/bktr_core.c

1705

int offset;

sys/dev/pci/bktr/bktr_core.c

1979

offset = (((struct eeProm *)arg)->offset);

sys/dev/pci/bktr/bktr_core.c

1982

if ( writeEEProm( bktr, offset, count, buf ) < 0 )

sys/dev/pci/bktr/bktr_core.c

1987

offset = (((struct eeProm *)arg)->offset);

sys/dev/pci/bktr/bktr_core.c

1990

if ( readEEProm( bktr, offset, count, buf ) < 0 )

sys/dev/pci/bktr/bktr_core.c

1995

offset = (((struct eeProm *)arg)->offset);

sys/dev/pci/bktr/bktr_core.c

1998

if ( signCard( bktr, offset, count, buf ) < 0 )

sys/dev/pci/bktr/bktr_os.c

455

bktr_mmap(dev_t dev, off_t offset, int nprot)

sys/dev/pci/bktr/bktr_os.c

467

if (offset < 0)

sys/dev/pci/bktr/bktr_os.c

470

if (offset >= bktr->alloc_pages * PAGE_SIZE)

sys/dev/pci/bktr/bktr_os.c

474

offset, nprot, BUS_DMA_WAITOK));

sys/dev/pci/cs4280.c

791

cs4280_download(struct cs4280_softc *sc, const u_int32_t *src, u_int32_t offset,

sys/dev/pci/cs4280.c

800

if ((offset&3) || (len&3))

sys/dev/pci/cs4280.c

809

BA1WRITE4(sc, offset+ctr*4, htole32(*(src+ctr)));

sys/dev/pci/cs4280.c

812

c0 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+0);

sys/dev/pci/cs4280.c

813

c1 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+1);

sys/dev/pci/cs4280.c

814

c2 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+2);

sys/dev/pci/cs4280.c

815

c3 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+3);

sys/dev/pci/cs4280.c

819

offset+ctr*4, data, con);

sys/dev/pci/cs4280.c

833

u_int32_t offset = 0;

sys/dev/pci/cs4280.c

847

err = cs4280_download(sc, &BA1Struct->map[offset],

sys/dev/pci/cs4280.c

848

BA1Struct->memory[idx].offset, BA1Struct->memory[idx].size);

sys/dev/pci/cs4280.c

854

offset += BA1Struct->memory[idx].size / sizeof(u_int32_t);

sys/dev/pci/cs4280.c

861

cs4280_checkimage(struct cs4280_softc *sc, u_int32_t *src, u_int32_t offset,

sys/dev/pci/cs4280.c

867

if ((offset&3) || (len&3))

sys/dev/pci/cs4280.c

875

data = BA1READ4(sc, offset+ctr*4);

sys/dev/pci/cs4280.c

878

offset+ctr*4, data, *(src+ctr));

sys/dev/pci/cs4280.c

890

u_int32_t offset = 0;

sys/dev/pci/cs4280.c

895

err = cs4280_checkimage(sc, &BA1Struct->map[offset],

sys/dev/pci/cs4280.c

896

BA1Struct->memory[idx].offset,

sys/dev/pci/cs4280.c

902

offset += BA1Struct->memory[idx].size / sizeof(u_int32_t);

sys/dev/pci/cs4280reg.h

271

u_int32_t offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

1429

void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

1430

uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

1545

#define WREG32_FIELD_OFFSET(reg, offset, field, val) \

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

1546

WREG32(mm##reg + offset, (RREG32(mm##reg + offset) & ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))

sys/dev/pci/drm/amd/amdgpu/amdgpu.h

1571

#define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd.h

311

uint64_t *offset, uint32_t flags, bool criu_resume);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

1694

uint64_t *offset, uint32_t flags, bool criu_resume)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

1739

if (!offset || !*offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

1741

user_addr = untagged_addr(*offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

1747

sg = create_sg_table(*offset, size);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

1851

if (offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

1852

*offset = amdgpu_bo_mmap_offset(bo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1287

u32 offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO_V3_1, asVoltageObj[0]);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1290

while (offset < size) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1291

ATOM_VOLTAGE_OBJECT_V3 *vo = (ATOM_VOLTAGE_OBJECT_V3 *)(start + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

1295

offset += le16_to_cpu(vo->asGpioVoltageObj.sHeader.usSize);

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

376

int offset, int len)

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

387

atrm_arg_elements[0].integer.value = offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

399

memcpy(bios+offset, obj->buffer.pointer, obj->buffer.length);

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

494

unsigned int offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

505

offset = vfct->VBIOSImageOffset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

507

while (offset < tbl_size) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

508

GOP_VBIOS_CONTENT *vbios = (GOP_VBIOS_CONTENT *)((char *)hdr + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

511

offset += sizeof(VFCT_IMAGE_HEADER);

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

512

if (offset > tbl_size) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

517

offset += vhdr->ImageLength;

sys/dev/pci/drm/amd/amdgpu/amdgpu_bios.c

518

if (offset > tbl_size) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_cgs.c

44

static uint32_t amdgpu_cgs_read_register(struct cgs_device *cgs_device, unsigned int offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_cgs.c

47

return RREG32(offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_cgs.c

50

static void amdgpu_cgs_write_register(struct cgs_device *cgs_device, unsigned int offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_cgs.c

54

WREG32(offset, value);

sys/dev/pci/drm/amd/amdgpu/amdgpu_cs.c

128

uint32_t *offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_cs.c

141

if (size != PAGE_SIZE || data->offset > (size - 8))

sys/dev/pci/drm/amd/amdgpu/amdgpu_cs.c

147

*offset = data->offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1061

uint32_t offset, se, sh, cu, wave, simd, data[32];

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1067

offset = (*pos & GENMASK_ULL(6, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1105

while (size && (offset < x * 4)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1108

value = data[offset >> 2];

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1117

offset += 4;

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1153

uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data;

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1159

offset = (*pos & GENMASK_ULL(11, 0)) >> 2;

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1186

adev->gfx.funcs->read_wave_vgprs(adev, 0, simd, wave, thread, offset, size>>2, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

1189

adev->gfx.funcs->read_wave_sgprs(adev, 0, simd, wave, offset, size>>2, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

230

static ssize_t amdgpu_debugfs_regs2_op(struct file *f, char __user *buf, u32 offset, size_t size, int write_en)

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

238

if (size & 0x3 || offset & 0x3)

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

281

value = RREG32(offset >> 2);

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

286

amdgpu_mm_wreg_mmio_rlc(adev, offset >> 2, value, rd->id.xcc_id);

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

292

offset += 4;

sys/dev/pci/drm/amd/amdgpu/amdgpu_dev_coredump.c

199

amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t count,

sys/dev/pci/drm/amd/amdgpu/amdgpu_dev_coredump.c

210

iter.offset = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_dev_coredump.c

211

iter.start = offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1640

unsigned long flags, offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1643

offset = find_first_zero_bit(adev->wb.used, adev->wb.num_wb);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1644

if (offset < adev->wb.num_wb) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1645

__set_bit(offset, adev->wb.used);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

1647

*wb = offset << 3; /* convert to dw offset */

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

766

uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

771

if (offset < adev->rmmio_size)

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

772

return (readb(adev->rmmio + offset));

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

834

void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value)

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

839

if (offset < adev->rmmio_size)

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

840

writeb(value, adev->rmmio + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1185

le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1368

le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1543

uint16_t offset, ihdr_ver;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1546

offset = le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1548

offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1597

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1605

offset = le16_to_cpu(bhdr->table_list[GC].offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1607

if (!offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1610

gc_info = (union gc_info *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1707

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1715

offset = le16_to_cpu(bhdr->table_list[MALL_INFO].offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1717

if (!offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1720

mall_info = (union mall_info *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1761

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1780

offset = le16_to_cpu(bhdr->table_list[VCN_INFO].offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1782

if (!offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1785

vcn_info = (union vcn_info *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1814

uint64_t vram_size, pos, offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1823

offset = le16_to_cpu(bhdr.table_list[NPS_INFO].offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1826

amdgpu_device_vram_access(adev, (pos + offset), nps_data,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1849

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1868

offset = le16_to_cpu(bhdr->table_list[NPS_INFO].offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1870

if (!offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1878

(union nps_info *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

398

uint16_t offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

401

offset = le16_to_cpu(info->offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

405

(struct nps_info_header *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

412

if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

455

uint16_t offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

490

offset = offsetof(struct binary_header, binary_checksum) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

492

size = le16_to_cpu(bhdr->binary_size) - offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

495

if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

503

offset = le16_to_cpu(info->offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

506

if (offset) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

508

(struct ip_discovery_header *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

515

if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

524

offset = le16_to_cpu(info->offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

527

if (offset) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

529

(struct gpu_info_header *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

537

if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

546

offset = le16_to_cpu(info->offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

549

if (offset) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

551

(struct harvest_info_header *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

559

if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

568

offset = le16_to_cpu(info->offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

571

if (offset) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

573

(struct vcn_info_header *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

581

if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

590

offset = le16_to_cpu(info->offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

593

if (0 && offset) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

595

(struct mall_info_header *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

603

if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

664

le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

720

u16 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

725

offset = le16_to_cpu(bhdr->table_list[HARVEST_INFO].offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

727

if (!offset) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

732

harvest_info = (struct harvest_table *)(adev->mman.discovery_bin + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c

1808

unsigned long offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c

1813

offset = x * 4 + y * sb->pitch[0];

sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c

1814

amdgpu_res_first(abo->tbo.resource, offset, 4, &cursor);

sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c

684

uint64_t *offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c

716

*offset = ((u64)metadata[9] << 16u) |

sys/dev/pci/drm/amd/amdgpu/amdgpu_display.c

720

*offset = ((u64)metadata[9] << 8u) |

sys/dev/pci/drm/amd/amdgpu/amdgpu_drv.c

3646

wdf->offset = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.c

307

void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.c

324

t = offset / AMDGPU_GPU_PAGE_SIZE;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.c

355

void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.c

366

t = offset / AMDGPU_GPU_PAGE_SIZE;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.c

391

void amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.c

398

amdgpu_gart_map(adev, offset, pages, dma_addr, flags, adev->gart.ptr);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.h

60

void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.h

62

void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gart.h

65

void amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gem.c

1205

vm_entries[num_mappings].offset = mapping->offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gem.c

1215

vm_entries[num_mappings].offset = mapping->offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ih.c

319

signed int offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ih.c

325

rptr += iv_size * offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ih.h

100

#define amdgpu_ih_decode_iv_ts(adev, ih, rptr, offset) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_ih.h

102

(adev)->irq.ih_funcs->decode_iv_ts((ih), (rptr), (offset)))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ih.h

117

signed int offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ih.h

93

signed int offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

43

#define WREG32_SOC15_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

52

offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT | \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

56

offset; \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

62

#define RREG32_SOC15_JPEG_DPG_MODE(inst_idx, offset, mask_en) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

67

offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

71

#define WREG32_SOC24_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

81

offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT | \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

85

#define RREG32_SOC24_JPEG_DPG_MODE(inst_idx, offset, mask_en) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

92

offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

96

#define ADD_SOC24_JPEG_TO_DPG_SRAM(inst_idx, offset, value, indirect) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.h

98

*adev->jpeg.inst[inst_idx].dpg_sram_curr_addr++ = offset; \

sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c

1078

uint32_t bios_offset = info->vbios_info.offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mode.h

236

int offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mode.h

251

u32 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

1511

uint64_t offset, fb_base;

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

1517

offset = (bo->tbo.resource->start << PAGE_SHIFT) + fb_base;

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

1518

return amdgpu_gmc_sign_extend(offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

1531

uint64_t offset = AMDGPU_BO_INVALID_OFFSET;

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

1534

offset = amdgpu_gmc_agp_addr(&bo->tbo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

1536

if (offset == AMDGPU_BO_INVALID_OFFSET)

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

1537

offset = (bo->tbo.resource->start << PAGE_SHIFT) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

1540

return amdgpu_gmc_sign_extend(offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

447

uint64_t offset, uint64_t size,

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

454

offset &= LINUX_PAGE_MASK;

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

476

(*bo_ptr)->placements[i].fpfn = offset >> PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c

477

(*bo_ptr)->placements[i].lpfn = (offset + size) >> PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.h

271

uint64_t offset, uint64_t size,

sys/dev/pci/drm/amd/amdgpu/amdgpu_object.h

71

uint64_t offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c

414

amdgpu_device_vram_access(adev, db_header_pos + db_dir.entry_list[i].offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c

425

amdgpu_device_vram_access(adev, db_header_pos + db_dir.entry_list[i].offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.h

315

uint16_t offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1226

record.offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

516

tmp = cpu_to_le64((record->offset & 0xffffffffffff));

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

545

record->offset = (le64_to_cpu(tmp) & 0xffffffffffff);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

129

uint64_t offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.c

212

#define amdgpu_ring_get_gpu_addr(ring, offset) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.c

213

(ring->adev->wb.gpu_addr + offset * 4)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.c

215

#define amdgpu_ring_get_cpu_addr(ring, offset) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.c

216

(&ring->adev->wb.wb[offset])

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h

288

void (*patch_cntl)(struct amdgpu_ring *ring, unsigned offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h

289

void (*patch_ce)(struct amdgpu_ring *ring, unsigned offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h

290

void (*patch_de)(struct amdgpu_ring *ring, unsigned offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h

527

unsigned int offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h

534

WARN_ON(offset > ring->buf_mask);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h

535

WARN_ON(ring->ring[offset] != 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h

538

if (cur < offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.h

540

ring->ring[offset] = cur - offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

301

u64 readp, offset, start, end;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

320

offset = readp - start;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

321

e->sw_rptr = (e->sw_cptr + offset) & ring->buf_mask;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

439

unsigned offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

444

offset = ring->wptr & ring->buf_mask;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

446

amdgpu_ring_mux_ib_mark_offset(mux, ring, offset, type);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

509

struct amdgpu_ring *ring, u64 offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

529

chunk->cntl_offset = offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

532

chunk->de_offset = offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.c

535

chunk->ce_offset = offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring_mux.h

114

u64 offset, enum amdgpu_ring_mux_offset_type type);

sys/dev/pci/drm/amd/amdgpu/amdgpu_rlc.h

166

unsigned int offset : 25;

sys/dev/pci/drm/amd/amdgpu/amdgpu_rlc.h

209

uint32_t offset : 25;

sys/dev/pci/drm/amd/amdgpu/amdgpu_trace.h

249

__field(u64, offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_trace.h

257

__entry->offset = mapping->offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_trace.h

262

__entry->offset, __entry->flags)

sys/dev/pci/drm/amd/amdgpu/amdgpu_trace.h

273

__field(u64, offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_trace.h

281

__entry->offset = mapping->offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_trace.h

286

__entry->offset, __entry->flags)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1047

gtt->offset = (u64)tmp->start << PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1104

if (gtt->offset == AMDGPU_BO_INVALID_OFFSET)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1108

amdgpu_gart_unbind(adev, gtt->offset, ttm->num_pages);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1533

unsigned long offset, void *buf,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1567

amdgpu_res_first(abo->tbo.resource, offset, len, &src_mm);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1607

unsigned long offset, void *buf, int len,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1619

!amdgpu_ttm_access_memory_sdma(bo, offset, buf, len, write))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1622

amdgpu_res_first(bo->resource, offset, len, &cursor);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

186

unsigned int offset, num_pages, num_dw, num_bytes;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

212

offset = mm_cur->start & ~LINUX_PAGE_MASK;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

214

num_pages = PFN_UP(*size + offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

217

*size = min(*size, (uint64_t)num_pages * PAGE_SIZE - offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

222

*addr += offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

309

amdgpu_res_first(src->mem, src->offset, size, &src_mm);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

310

amdgpu_res_first(dst->mem, dst->offset, size, &dst_mm);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

395

src.offset = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

396

dst.offset = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

621

mem->bus.offset = mem->start << PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

626

mem->bus.offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

628

mem->bus.offset += adev->gmc.aper_base;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

632

mem->bus.offset = mem->start << PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

633

mem->bus.offset += adev->doorbell.base;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

638

mem->bus.offset = mem->start << PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

639

mem->bus.offset += adev->rmmio_remap.bus_addr;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

693

u64 offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

900

gtt->offset + (page_idx << PAGE_SHIFT),

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

907

gtt->offset + ((page_idx + 1) << PAGE_SHIFT),

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

928

amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

990

gtt->offset = AMDGPU_BO_INVALID_OFFSET;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

998

gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

999

amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.h

113

unsigned long offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.h

148

u64 offset, u64 size,

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1130

uint32_t offset, data[4];

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1145

offset = adev->reg_offset[UVD_HWIP][ring->me][1];

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1147

offset = UVD_BASE_SI;

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1149

data[0] = PACKET0(offset + UVD_GPCOM_VCPU_DATA0, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1150

data[1] = PACKET0(offset + UVD_GPCOM_VCPU_DATA1, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1151

data[2] = PACKET0(offset + UVD_GPCOM_VCPU_CMD, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1152

data[3] = PACKET0(offset + UVD_NO_OP, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

499

unsigned int offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

503

offset = le32_to_cpu(hdr->ucode_array_offset_bytes);

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

505

memcpy_toio(adev->uvd.inst[i].cpu_addr, adev->uvd.fw->data + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

817

struct amdgpu_bo *bo, unsigned int offset)

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

825

if (offset & 0x3F) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

836

msg = ptr + offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

290

unsigned int offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

310

offset = le32_to_cpu(hdr->ucode_array_offset_bytes);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

313

memcpy_toio(cpu_addr, adev->vce.fw->data + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

314

adev->vce.fw->size - offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

604

int64_t offset = ((uint64_t)size) * ((int64_t)index);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

615

addr += offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

616

fpfn = PAGE_ALIGN(offset) >> PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

620

lpfn = (0x100000000ULL - PAGE_ALIGN(offset)) >> PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

389

unsigned int offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

393

offset = le32_to_cpu(hdr->ucode_array_offset_bytes);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

396

adev->vcn.inst[i].fw->data + offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h

134

#define RREG32_SOC15_DPG_MODE(inst_idx, offset, mask_en) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h

139

offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h

143

#define WREG32_SOC15_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h

153

offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h

156

offset; \

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h

195

#define WREG32_SOC24_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h

205

offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.h

208

offset; \

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1053

u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag, u32 xcc_id)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1091

if (offset == reg_access_ctrl->grbm_cntl) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1095

writel(v, ((void __iomem *)adev->rmmio) + (offset * 4));

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1096

} else if (offset == reg_access_ctrl->grbm_idx) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1100

writel(v, ((void __iomem *)adev->rmmio) + (offset * 4));

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1109

writel((offset | flag), scratch_reg1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1125

"vfgate is disabled, rlcg failed to program reg: 0x%05x\n", offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1128

"wrong operation type, rlcg failed to program reg: 0x%05x\n", offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1131

"register is not in range, rlcg failed to program reg: 0x%05x\n", offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1134

"unknown error type, rlcg failed to program reg: 0x%05x\n", offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1138

"timeout: rlcg faled to program reg: 0x%05x\n", offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1151

u32 offset, u32 value,

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1161

amdgpu_virt_rlcg_reg_rw(adev, offset, value, rlcg_flag, xcc_id);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1166

WREG32_NO_KIQ(offset, value);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1168

WREG32(offset, value);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1172

u32 offset, u32 acc_flags, u32 hwip, u32 xcc_id)

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1181

return amdgpu_virt_rlcg_reg_rw(adev, offset, 0, rlcg_flag, xcc_id);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1184

return RREG32_NO_KIQ(offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1186

return RREG32(offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

451

u32 offset, u32 value,

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

454

u32 offset, u32 acc_flags, u32 hwip, u32 xcc_id);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.h

463

u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag, u32 xcc_id);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1168

uint64_t offset, uint64_t vram_base,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1226

amdgpu_res_first(pages_addr ? NULL : res, offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1431

mapping->offset, vram_base, mem,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1857

uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1863

|| offset & AMDGPU_GPU_PAGE_MASK

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1868

|| check_add_overflow(offset, size, &tmp)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1873

if (bo && offset + size > amdgpu_bo_size(bo))

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1903

uint64_t saddr, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1912

r = amdgpu_vm_verify_parameters(adev, bo, saddr, offset, size);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1934

mapping->offset = offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1962

uint64_t saddr, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1970

r = amdgpu_vm_verify_parameters(adev, bo, saddr, offset, size);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

1990

mapping->offset = offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

2102

before->offset = tmp->offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

2112

after->offset = tmp->offset;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

2113

after->offset += (after->start - tmp->start) << PAGE_SHIFT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.h

546

uint64_t offset, uint64_t vram_base,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.h

567

uint64_t addr, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.h

571

uint64_t addr, uint64_t offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.h

35

uint32_t (*get_reg_offset)(struct amdgpu_vpe *vpe, uint32_t inst, uint32_t offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.h

98

#define vpe_get_reg_offset(vpe, inst, offset) \

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.h

99

((vpe)->funcs->get_reg_offset ? (vpe)->funcs->get_reg_offset((vpe), (inst), (offset)) : 0)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

687

u64 offset, u64 length,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

705

amdgpu_res_first(res, offset, length, &cursor);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vram_mgr.c

725

amdgpu_res_first(res, offset, length, &cursor);

sys/dev/pci/drm/amd/amdgpu/atom.c

1622

int offset = index * 2 + 4;

sys/dev/pci/drm/amd/amdgpu/atom.c

1623

int idx = CU16(ctx->data_table + offset);

sys/dev/pci/drm/amd/amdgpu/atom.c

1642

int offset = index * 2 + 4;

sys/dev/pci/drm/amd/amdgpu/atom.c

1643

int idx = CU16(ctx->cmd_table + offset);

sys/dev/pci/drm/amd/amdgpu/atombios_i2c.c

162

void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device *adev, u8 slave_addr, u8 line_number, u8 offset, u8 data)

sys/dev/pci/drm/amd/amdgpu/atombios_i2c.c

167

args.ucRegIndex = offset;

sys/dev/pci/drm/amd/amdgpu/atombios_i2c.h

31

u8 slave_addr, u8 line_number, u8 offset, u8 data);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1180

u32 offset, tmp;

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1183

offset = adev->mode_info.audio.pin[i].offset;

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1184

tmp = RREG32_AUDIO_ENDPT(offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1219

tmp = RREG32(mmAFMT_AUDIO_SRC_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1221

WREG32(mmAFMT_AUDIO_SRC_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1267

WREG32_AUDIO_ENDPT(dig->afmt->pin->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1308

tmp = RREG32_AUDIO_ENDPT(dig->afmt->pin->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1321

WREG32_AUDIO_ENDPT(dig->afmt->pin->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1407

WREG32_AUDIO_ENDPT(dig->afmt->pin->offset, eld_reg_to_type[i][0], tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1420

WREG32_AUDIO_ENDPT(pin->offset, ixAZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1452

adev->mode_info.audio.pin[i].offset = pin_offsets[i];

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1485

tmp = RREG32(mmHDMI_ACR_32_0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1487

WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1488

tmp = RREG32(mmHDMI_ACR_32_1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1490

WREG32(mmHDMI_ACR_32_1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1492

tmp = RREG32(mmHDMI_ACR_44_0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1494

WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1495

tmp = RREG32(mmHDMI_ACR_44_1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1497

WREG32(mmHDMI_ACR_44_1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1499

tmp = RREG32(mmHDMI_ACR_48_0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1501

WREG32(mmHDMI_ACR_48_0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1502

tmp = RREG32(mmHDMI_ACR_48_1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1504

WREG32(mmHDMI_ACR_48_1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1521

WREG32(mmAFMT_AVI_INFO0 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1523

WREG32(mmAFMT_AVI_INFO1 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1525

WREG32(mmAFMT_AVI_INFO2 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1527

WREG32(mmAFMT_AVI_INFO3 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1594

tmp = RREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1596

WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp); /* send null packets when required */

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1598

WREG32(mmAFMT_AUDIO_CRC_CONTROL + dig->afmt->offset, 0x1000);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1600

tmp = RREG32(mmHDMI_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1625

WREG32(mmHDMI_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1627

tmp = RREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1631

WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1633

tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1638

WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1640

tmp = RREG32(mmAFMT_INFOFRAME_CONTROL0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1643

WREG32(mmAFMT_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1645

tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1648

WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1650

WREG32(mmHDMI_GC + dig->afmt->offset, 0); /* unset HDMI_GC_AVMUTE */

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1652

tmp = RREG32(mmHDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1657

WREG32(mmHDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1659

tmp = RREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1662

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1664

tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1673

WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1677

tmp = RREG32(mmAFMT_60958_0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1679

WREG32(mmAFMT_60958_0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1681

tmp = RREG32(mmAFMT_60958_1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1683

WREG32(mmAFMT_60958_1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1685

tmp = RREG32(mmAFMT_60958_2 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1692

WREG32(mmAFMT_60958_2 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1696

WREG32(mmAFMT_AUDIO_PACKET_CONTROL2 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1717

tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1722

WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1724

tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1726

WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1728

tmp = RREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1731

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1733

WREG32(mmAFMT_RAMP_CONTROL0 + dig->afmt->offset, 0x00FFFFFF);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1734

WREG32(mmAFMT_RAMP_CONTROL1 + dig->afmt->offset, 0x007FFFFF);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1735

WREG32(mmAFMT_RAMP_CONTROL2 + dig->afmt->offset, 0x00000001);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1736

WREG32(mmAFMT_RAMP_CONTROL3 + dig->afmt->offset, 0x00000001);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1766

enable ? "En" : "Dis", dig->afmt->offset, amdgpu_encoder->encoder_id);

sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c

1780

adev->mode_info.afmt[i]->offset = dig_offsets[i];

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1157

tmp = RREG32_AUDIO_ENDPT(adev->mode_info.audio.pin[i].offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1191

WREG32(mmAFMT_AUDIO_SRC_CONTROL + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1237

WREG32_AUDIO_ENDPT(dig->afmt->pin->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1275

tmp = RREG32_AUDIO_ENDPT(dig->afmt->pin->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1296

WREG32_AUDIO_ENDPT(dig->afmt->pin->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1308

u32 offset;

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1333

offset = dig->afmt->pin->offset;

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1385

WREG32_AUDIO_ENDPT(offset, eld_reg_to_type[i][0], value);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1398

WREG32_AUDIO_ENDPT(pin->offset, ixAZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1441

adev->mode_info.audio.pin[i].offset = pin_offsets[i];

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1470

tmp = RREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1474

WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1487

tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1491

WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1493

tmp = RREG32(mmHDMI_ACR_32_0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1495

WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1496

tmp = RREG32(mmHDMI_ACR_32_1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1498

WREG32(mmHDMI_ACR_32_1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1500

tmp = RREG32(mmHDMI_ACR_44_0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1502

WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1503

tmp = RREG32(mmHDMI_ACR_44_1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1505

WREG32(mmHDMI_ACR_44_1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1507

tmp = RREG32(mmHDMI_ACR_48_0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1509

WREG32(mmHDMI_ACR_48_0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1510

tmp = RREG32(mmHDMI_ACR_48_1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1512

WREG32(mmHDMI_ACR_48_1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1542

WREG32(mmAFMT_AVI_INFO0 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1544

WREG32(mmAFMT_AVI_INFO1 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1546

WREG32(mmAFMT_AVI_INFO2 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1548

WREG32(mmAFMT_AVI_INFO3 + dig->afmt->offset,

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1551

tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1555

WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1600

tmp = RREG32(mmAFMT_INFOFRAME_CONTROL0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1602

WREG32(mmAFMT_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1604

tmp = RREG32(mmAFMT_60958_0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1606

WREG32(mmAFMT_60958_0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1608

tmp = RREG32(mmAFMT_60958_1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1610

WREG32(mmAFMT_60958_1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1612

tmp = RREG32(mmAFMT_60958_2 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1619

WREG32(mmAFMT_60958_2 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1621

tmp = RREG32(mmAFMT_AUDIO_PACKET_CONTROL2 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1623

WREG32(mmAFMT_AUDIO_PACKET_CONTROL2 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1625

tmp = RREG32(mmHDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1628

WREG32(mmHDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1630

tmp = RREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1633

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1644

tmp = RREG32(mmHDMI_GC + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1646

WREG32(mmHDMI_GC + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1658

tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1663

WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1665

tmp = RREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1667

WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1669

tmp = RREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1671

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1673

tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1678

WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1680

tmp = RREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1682

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1695

tmp = RREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1697

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1699

tmp = RREG32(mmDP_SEC_TIMESTAMP + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1701

WREG32(mmDP_SEC_TIMESTAMP + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1703

tmp = RREG32(mmDP_SEC_CNTL + dig->afmt->offset);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1708

WREG32(mmDP_SEC_CNTL + dig->afmt->offset, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1710

WREG32(mmDP_SEC_CNTL + dig->afmt->offset, 0);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1809

enable ? "En" : "Dis", dig->afmt->offset, amdgpu_encoder->encoder_id);

sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c

1823

adev->mode_info.afmt[i]->offset = dig_offsets[i];

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1135

u32 offset, tmp;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1138

offset = adev->mode_info.audio.pin[i].offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1139

tmp = RREG32_AUDIO_ENDPT(offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1169

u32 offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1174

offset = dig->afmt->offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1176

WREG32(mmAFMT_AUDIO_SRC_CONTROL + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1190

u32 tmp = 0, offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1195

offset = dig->afmt->pin->offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1239

WREG32_AUDIO_ENDPT(offset, ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1251

u32 offset, tmp;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1258

offset = dig->afmt->pin->offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1281

tmp = RREG32_AUDIO_ENDPT(offset, ixAZALIA_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1290

WREG32_AUDIO_ENDPT(offset, ixAZALIA_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1301

u32 offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1326

offset = dig->afmt->pin->offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1379

WREG32_AUDIO_ENDPT(offset, eld_reg_to_type[i][0], value);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1392

WREG32_AUDIO_ENDPT(pin->offset, ixAZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1433

adev->mode_info.audio.pin[i].offset = pin_offsets[i];

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1464

uint32_t offset = dig->afmt->offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1466

WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT));

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1467

WREG32(mmHDMI_ACR_32_1 + offset, acr.n_32khz);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1469

WREG32(mmHDMI_ACR_44_0 + offset, (acr.cts_44_1khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT));

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1470

WREG32(mmHDMI_ACR_44_1 + offset, acr.n_44_1khz);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1472

WREG32(mmHDMI_ACR_48_0 + offset, (acr.cts_48khz << HDMI_ACR_48_0__HDMI_ACR_CTS_48__SHIFT));

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1473

WREG32(mmHDMI_ACR_48_1 + offset, acr.n_48khz);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1486

uint32_t offset = dig->afmt->offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1490

WREG32(mmAFMT_AVI_INFO0 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1492

WREG32(mmAFMT_AVI_INFO1 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1494

WREG32(mmAFMT_AVI_INFO2 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1496

WREG32(mmAFMT_AVI_INFO3 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1536

uint32_t offset, val;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1547

offset = dig->afmt->offset;

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1561

WREG32(mmHDMI_VBI_PACKET_CONTROL + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1564

WREG32(mmAFMT_AUDIO_CRC_CONTROL + offset, 0x1000);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1566

val = RREG32(mmHDMI_CONTROL + offset);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1593

WREG32(mmHDMI_CONTROL + offset, val);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1595

WREG32(mmHDMI_VBI_PACKET_CONTROL + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1600

WREG32(mmHDMI_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1604

WREG32(mmAFMT_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1607

WREG32(mmHDMI_INFOFRAME_CONTROL1 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1610

WREG32(mmHDMI_GC + offset, 0); /* unset HDMI_GC_AVMUTE */

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1612

WREG32(mmHDMI_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1616

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1622

WREG32(mmHDMI_ACR_PACKET_CONTROL + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1625

WREG32(mmHDMI_ACR_PACKET_CONTROL + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1631

WREG32(mmAFMT_60958_0 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1634

WREG32(mmAFMT_60958_1 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1637

WREG32(mmAFMT_60958_2 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1648

WREG32(mmAFMT_AUDIO_PACKET_CONTROL2 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1669

WREG32_OR(mmHDMI_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1673

WREG32_P(mmHDMI_INFOFRAME_CONTROL1 + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1677

WREG32_OR(mmAFMT_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1680

WREG32(mmAFMT_RAMP_CONTROL0 + offset, 0x00FFFFFF);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1681

WREG32(mmAFMT_RAMP_CONTROL1 + offset, 0x007FFFFF);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1682

WREG32(mmAFMT_RAMP_CONTROL2 + offset, 0x00000001);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1683

WREG32(mmAFMT_RAMP_CONTROL3 + offset, 0x00000001);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1713

enable ? "En" : "Dis", dig->afmt->offset, amdgpu_encoder->encoder_id);

sys/dev/pci/drm/amd/amdgpu/dce_v8_0.c

1727

adev->mode_info.afmt[i]->offset = dig_offsets[i];

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5619

unsigned int offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5647

rlc_toc->offset = ALIGN(rlc_toc->offset * 4, PAGE_SIZE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5651

rlc_autoload_info[rlc_toc->id].offset = rlc_toc->offset * 4;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5676

if (total_size < rlc_autoload_info[FIRMWARE_ID_MAX-1].offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5677

total_size = rlc_autoload_info[FIRMWARE_ID_MAX-1].offset +

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5725

toc_offset = rlc_autoload_info[id].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5857

rlc_g_offset = rlc_autoload_info[FIRMWARE_ID_RLC_G_UCODE].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5909

rlc_autoload_info[FIRMWARE_ID_CP_ME].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5946

rlc_autoload_info[FIRMWARE_ID_CP_CE].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5983

rlc_autoload_info[FIRMWARE_ID_CP_PFP].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6020

rlc_autoload_info[FIRMWARE_ID_CP_MEC].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8331

uint32_t offset,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8345

if (offset == reg)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8352

static bool gfx_v10_0_is_rlcg_access_range(struct amdgpu_device *adev, u32 offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8354

return gfx_v10_0_check_rlcg_range(adev, offset, NULL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8916

uint64_t offset, ce_payload_gpu_addr;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8922

offset = offsetof(struct v10_gfx_meta_data, ce_payload);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8923

ce_payload_gpu_addr = amdgpu_csa_vaddr(ring->adev) + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8924

ce_payload_cpu_addr = adev->virt.csa_cpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8946

uint64_t offset, gds_addr, de_payload_gpu_addr;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8950

offset = offsetof(struct v10_gfx_meta_data, de_payload);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8951

de_payload_gpu_addr = amdgpu_csa_vaddr(ring->adev) + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8952

de_payload_cpu_addr = adev->virt.csa_cpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1197

unsigned int offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1208

rlc_autoload_info[ucode->id].offset = ucode->offset * 4;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1226

if (total_size < rlc_autoload_info[SOC21_FIRMWARE_ID_MAX-1].offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1227

total_size = rlc_autoload_info[SOC21_FIRMWARE_ID_MAX-1].offset +

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1268

toc_offset = rlc_autoload_info[id].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1508

rlc_g_offset = rlc_autoload_info[SOC21_FIRMWARE_ID_RLC_G_UCODE].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3071

rlc_autoload_info[SOC21_FIRMWARE_ID_RS64_ME].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3073

rlc_autoload_info[SOC21_FIRMWARE_ID_RS64_ME_P0_STACK].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3078

rlc_autoload_info[SOC21_FIRMWARE_ID_RS64_PFP].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3080

rlc_autoload_info[SOC21_FIRMWARE_ID_RS64_PFP_P0_STACK].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3085

rlc_autoload_info[SOC21_FIRMWARE_ID_RS64_MEC].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3087

rlc_autoload_info[SOC21_FIRMWARE_ID_RS64_MEC_P0_STACK].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3093

rlc_autoload_info[SOC21_FIRMWARE_ID_CP_ME].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3098

rlc_autoload_info[SOC21_FIRMWARE_ID_CP_PFP].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3103

rlc_autoload_info[SOC21_FIRMWARE_ID_CP_MEC].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6211

uint64_t offset, gds_addr, de_payload_gpu_addr;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6215

offset = offsetof(struct v10_gfx_meta_data, de_payload);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6216

de_payload_gpu_addr = amdgpu_csa_vaddr(ring->adev) + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6217

de_payload_cpu_addr = adev->virt.csa_cpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1031

unsigned int offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1047

rlc_autoload_info[ucode->id].offset =

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1048

ucode->offset * RLC_TOC_OFFSET_DWUNIT * 4;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1067

if (total_size < rlc_autoload_info[SOC24_FIRMWARE_ID_MAX-1].offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1068

total_size = rlc_autoload_info[SOC24_FIRMWARE_ID_MAX-1].offset +

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1109

toc_offset = rlc_autoload_info[id].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1316

rlc_g_offset = rlc_autoload_info[SOC24_FIRMWARE_ID_RLC_G_UCODE].offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5184

uint32_t offset,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5198

if (offset == reg)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5205

static bool gfx_v9_0_is_rlcg_access_range(struct amdgpu_device *adev, u32 offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5207

return gfx_v9_0_check_rlcg_range(adev, offset,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5449

unsigned offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5451

u32 control = ring->ring[offset];

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5454

ring->ring[offset] = control;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5458

unsigned offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5469

if (offset + (payload_size >> 2) <= ring->buf_mask + 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5470

memcpy((void *)&ring->ring[offset], ce_payload_cpu_addr, payload_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5472

memcpy((void *)&ring->ring[offset], ce_payload_cpu_addr,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5473

(ring->buf_mask + 1 - offset) << 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5474

payload_size -= (ring->buf_mask + 1 - offset) << 2;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5476

ce_payload_cpu_addr + ((ring->buf_mask + 1 - offset) << 2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5482

unsigned offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5496

if (offset + (payload_size >> 2) <= ring->buf_mask + 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5497

memcpy((void *)&ring->ring[offset], de_payload_cpu_addr, payload_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5499

memcpy((void *)&ring->ring[offset], de_payload_cpu_addr,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5500

(ring->buf_mask + 1 - offset) << 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5501

payload_size -= (ring->buf_mask + 1 - offset) << 2;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5503

de_payload_cpu_addr + ((ring->buf_mask + 1 - offset) << 2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5675

uint64_t offset, ce_payload_gpu_addr;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5681

offset = offsetof(struct v9_gfx_meta_data, ce_payload);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5682

ce_payload_gpu_addr = amdgpu_csa_vaddr(ring->adev) + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5683

ce_payload_cpu_addr = adev->virt.csa_cpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5765

uint64_t offset, gds_addr, de_payload_gpu_addr;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5769

offset = offsetof(struct v9_gfx_meta_data, de_payload);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5770

de_payload_gpu_addr = amdgpu_csa_vaddr(ring->adev) + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5771

de_payload_cpu_addr = adev->virt.csa_cpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

423

uint32_t offset = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

440

size += snprintf(str + size, 256 - size, "%x", wb_ptr[offset]);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

441

offset++;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

459

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

463

offset = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

470

(wb_ptr[offset] == pattern))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

473

offset++;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1697

uint32_t offset,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1716

if (offset == reg)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1723

static bool gfx_v9_4_3_is_rlcg_access_range(struct amdgpu_device *adev, u32 offset)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1725

return gfx_v9_4_3_check_rlcg_range(adev, offset,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

64

#define NORMALIZE_XCC_REG_OFFSET(offset) \

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

65

(offset & 0xFFFF)

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

36

#define NORMALIZE_JPEG_REG_OFFSET(offset) \

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

37

(offset & 0x1FFFF)

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

664

u64 offset;

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

666

offset = RREG32_SOC15(MMHUB, 0, regMMMC_VM_FB_OFFSET);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

667

offset &= MMMC_VM_FB_OFFSET__FB_OFFSET_MASK;

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

668

offset <<= 24;

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

670

return offset;

sys/dev/pci/drm/amd/amdgpu/nbio_v7_0.c

130

static uint32_t nbio_7_0_read_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset)

sys/dev/pci/drm/amd/amdgpu/nbio_v7_0.c

134

WREG32_SOC15(NBIO, 0, mmSYSHUB_INDEX, offset);

sys/dev/pci/drm/amd/amdgpu/nbio_v7_0.c

140

static void nbio_7_0_write_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset,

sys/dev/pci/drm/amd/amdgpu/nbio_v7_0.c

143

WREG32_SOC15(NBIO, 0, mmSYSHUB_INDEX, offset);

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

406

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

409

offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64);

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

411

ret = psp_wait_for(psp, offset, MBOX_TOS_READY_FLAG,

sys/dev/pci/drm/amd/amdgpu/psp_v11_0.c

420

WREG32(offset, GFX_CTRL_CMD_ID_MODE1_RST);

sys/dev/pci/drm/amd/amdgpu/psp_v12_0.c

219

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/psp_v12_0.c

222

offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64);

sys/dev/pci/drm/amd/amdgpu/psp_v12_0.c

224

ret = psp_wait_for(psp, offset, MBOX_TOS_READY_FLAG,

sys/dev/pci/drm/amd/amdgpu/psp_v12_0.c

233

WREG32(offset, GFX_CTRL_CMD_ID_MODE1_RST);

sys/dev/pci/drm/amd/amdgpu/psp_v12_0.c

237

offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33);

sys/dev/pci/drm/amd/amdgpu/psp_v12_0.c

239

ret = psp_wait_for(psp, offset, MBOX_TOS_RESP_FLAG, MBOX_TOS_RESP_MASK,

sys/dev/pci/drm/amd/amdgpu/psp_v3_1.c

310

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/psp_v3_1.c

313

offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64);

sys/dev/pci/drm/amd/amdgpu/psp_v3_1.c

315

ret = psp_wait_for(psp, offset, 0x80000000, 0x8000FFFF, 0);

sys/dev/pci/drm/amd/amdgpu/psp_v3_1.c

323

WREG32(offset, GFX_CTRL_CMD_ID_MODE1_RST);

sys/dev/pci/drm/amd/amdgpu/psp_v3_1.c

327

offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33);

sys/dev/pci/drm/amd/amdgpu/psp_v3_1.c

329

ret = psp_wait_for(psp, offset, 0x80000000, 0x80000000, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

125

#define WREG32_SDMA(instance, offset, value) \

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

126

WREG32(sdma_v4_0_get_reg_offset(adev, (instance), (offset)), value)

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

127

#define RREG32_SDMA(instance, offset) \

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

128

RREG32(sdma_v4_0_get_reg_offset(adev, (instance), (offset)))

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

442

u32 instance, u32 offset)

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

446

return (adev->reg_offset[SDMA0_HWIP][0][0] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

448

return (adev->reg_offset[SDMA1_HWIP][0][0] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

450

return (adev->reg_offset[SDMA2_HWIP][0][1] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

452

return (adev->reg_offset[SDMA3_HWIP][0][1] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

454

return (adev->reg_offset[SDMA4_HWIP][0][1] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

456

return (adev->reg_offset[SDMA5_HWIP][0][1] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

458

return (adev->reg_offset[SDMA6_HWIP][0][1] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

460

return (adev->reg_offset[SDMA7_HWIP][0][1] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4.c

38

uint32_t offset)

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4.c

44

return (sdma_base + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4.c

46

return (sdma_base + SDMA1_REG_OFFSET + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4.c

48

return (sdma_base + SDMA2_REG_OFFSET + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4.c

50

return (sdma_base + SDMA3_REG_OFFSET + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4.c

52

return (sdma_base + SDMA4_REG_OFFSET + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

100

#define WREG32_SDMA(instance, offset, value) \

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

101

WREG32(sdma_v4_4_2_get_reg_offset(adev, (instance), (offset)), value)

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

102

#define RREG32_SDMA(instance, offset) \

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

103

RREG32(sdma_v4_4_2_get_reg_offset(adev, (instance), (offset)))

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

117

u32 instance, u32 offset)

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

121

return (adev->reg_offset[SDMA0_HWIP][dev_inst][0] + offset);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

651

u32 orig, data, offset;

sys/dev/pci/drm/amd/amdgpu/si_dma.c

661

offset = DMA0_REGISTER_OFFSET;

sys/dev/pci/drm/amd/amdgpu/si_dma.c

663

offset = DMA1_REGISTER_OFFSET;

sys/dev/pci/drm/amd/amdgpu/si_dma.c

664

orig = data = RREG32(mmDMA_POWER_CNTL + offset);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

667

WREG32(mmDMA_POWER_CNTL + offset, data);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

668

WREG32(mmDMA_CLK_CTRL + offset, 0x00000100);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

673

offset = DMA0_REGISTER_OFFSET;

sys/dev/pci/drm/amd/amdgpu/si_dma.c

675

offset = DMA1_REGISTER_OFFSET;

sys/dev/pci/drm/amd/amdgpu/si_dma.c

676

orig = data = RREG32(mmDMA_POWER_CNTL + offset);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

679

WREG32(mmDMA_POWER_CNTL + offset, data);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

681

orig = data = RREG32(mmDMA_CLK_CTRL + offset);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

684

WREG32(mmDMA_CLK_CTRL + offset, data);

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

105

#define SOC15_WAIT_ON_RREG_OFFSET(ip, inst, reg, offset, expected_value, mask) \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

107

(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + (reg) + (offset)), \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

191

#define WREG32_SOC15_OFFSET_RLC(ip, inst, reg, offset, value) \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

192

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, value, AMDGPU_REGS_RLC, ip##_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

194

#define RREG32_SOC15_OFFSET_RLC(ip, inst, reg, offset) \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

195

__RREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, AMDGPU_REGS_RLC, ip##_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

37

#define SOC15_REG_OFFSET1(ip, inst, reg, offset) \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

38

(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + (reg)+(offset))

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

78

#define RREG32_SOC15_OFFSET(ip, inst, reg, offset) \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

80

(offset), 0, ip##_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

96

#define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

97

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, \

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

282

uint64_t offset;

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

291

offset = AMDGPU_UVD_FIRMWARE_OFFSET;

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

293

WREG32(mmUVD_VCPU_CACHE_OFFSET0, offset >> 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

296

offset += size;

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

298

WREG32(mmUVD_VCPU_CACHE_OFFSET1, offset >> 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

301

offset += size;

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

304

WREG32(mmUVD_VCPU_CACHE_OFFSET2, offset >> 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

608

uint64_t offset;

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

617

offset = AMDGPU_UVD_FIRMWARE_OFFSET;

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

619

WREG32(mmUVD_VCPU_CACHE_OFFSET0, offset >> 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

622

offset += size;

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

624

WREG32(mmUVD_VCPU_CACHE_OFFSET1, offset >> 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

627

offset += size;

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

630

WREG32(mmUVD_VCPU_CACHE_OFFSET2, offset >> 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

677

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

693

offset = 0;

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

699

offset = size;

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

707

lower_32_bits(adev->uvd.inst[i].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

709

upper_32_bits(adev->uvd.inst[i].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

714

lower_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

716

upper_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

791

uint32_t offset, size, tmp;

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

835

offset = 0;

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

841

offset = size;

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

850

lower_32_bits(adev->uvd.inst[i].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

852

upper_32_bits(adev->uvd.inst[i].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

857

lower_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

859

upper_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

170

uint32_t size, offset;

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

185

offset = AMDGPU_VCE_FIRMWARE_OFFSET;

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

187

WREG32(mmVCE_VCPU_CACHE_OFFSET0, offset & 0x7fffffff);

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

190

offset += size;

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

192

WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0x7fffffff);

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

195

offset += size;

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

197

WREG32(mmVCE_VCPU_CACHE_OFFSET2, offset & 0x7fffffff);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

551

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

571

offset = AMDGPU_VCE_FIRMWARE_OFFSET;

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

573

WREG32(mmVCE_VCPU_CACHE_OFFSET0, offset & 0x7fffffff);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

577

offset += size;

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

579

WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0x7fffffff);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

581

offset += size;

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

583

WREG32(mmVCE_VCPU_CACHE_OFFSET2, offset & 0x7fffffff);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

586

offset += size + VCE_V3_0_STACK_SIZE + VCE_V3_0_DATA_SIZE;

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

588

WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0xfffffff);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

590

offset += size;

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

592

WREG32(mmVCE_VCPU_CACHE_OFFSET2, offset & 0xfffffff);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

208

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

248

offset = AMDGPU_VCE_FIRMWARE_OFFSET;

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

268

offset & ~0x0f000000);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

287

offset = (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) ? offset + size : 0;

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

290

(offset & ~0x0f000000) | (1 << 24));

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

293

offset += size;

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

296

(offset & ~0x0f000000) | (2 << 24));

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

632

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

646

offset = AMDGPU_VCE_FIRMWARE_OFFSET;

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

661

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET0), offset & ~0x0f000000);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

669

offset = (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) ? offset + size : 0;

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

671

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET1), (offset & ~0x0f000000) | (1 << 24));

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

676

offset += size;

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

678

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET2), (offset & ~0x0f000000) | (2 << 24));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

358

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

367

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

373

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

382

lower_32_bits(adev->vcn.inst->gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

384

upper_32_bits(adev->vcn.inst->gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

390

lower_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

392

upper_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

426

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

438

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

444

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

453

lower_32_bits(adev->vcn.inst->gpu_addr + offset), 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

455

upper_32_bits(adev->vcn.inst->gpu_addr + offset), 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

463

lower_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

466

upper_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1960

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2000

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2010

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2023

lower_32_bits(adev->vcn.inst->gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2027

upper_32_bits(adev->vcn.inst->gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2038

lower_32_bits(adev->vcn.inst->gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2043

upper_32_bits(adev->vcn.inst->gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

385

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

397

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

403

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

412

lower_32_bits(adev->vcn.inst->gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

414

upper_32_bits(adev->vcn.inst->gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

420

lower_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

422

upper_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

443

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

464

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

472

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

489

lower_32_bits(adev->vcn.inst->gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

492

upper_32_bits(adev->vcn.inst->gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

509

lower_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

512

upper_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1411

uint32_t offset, size, tmp, i, rb_bufsz;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1449

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1461

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1473

lower_32_bits(adev->vcn.inst[i].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1477

upper_32_bits(adev->vcn.inst[i].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1487

lower_32_bits(adev->vcn.inst[i].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1492

upper_32_bits(adev->vcn.inst[i].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

599

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

612

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

618

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

626

lower_32_bits(adev->vcn.inst[i].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

628

upper_32_bits(adev->vcn.inst[i].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

634

lower_32_bits(adev->vcn.inst[i].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

636

upper_32_bits(adev->vcn.inst[i].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

656

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

677

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

685

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

702

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

705

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

722

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

725

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1393

uint32_t offset, cache_size;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1444

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1455

offset = cache_size;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1465

cache_addr = adev->vcn.inst[i].gpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1479

cache_addr = adev->vcn.inst[i].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1959

uint32_t offset, size, *create;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1964

offset = msg[1];

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1967

if (offset + size > end) {

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1972

create = ptr + addr + offset - start;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

525

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

534

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

540

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

548

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

550

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

556

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

558

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

578

uint32_t offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

599

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

607

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

624

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

627

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

644

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

647

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1340

uint32_t offset, cache_size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1399

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1410

offset = cache_size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1420

cache_addr = adev->vcn.inst[i].gpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1434

cache_addr = adev->vcn.inst[i].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1876

uint32_t offset, size, *create;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1881

offset = msg[1];

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1884

if (offset + size > end) {

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1889

create = ptr + addr + offset - start;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

451

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

464

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

470

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

477

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

479

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

485

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

487

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

514

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

538

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

546

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

563

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

566

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

583

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

586

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1052

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1062

offset = cache_size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1072

cache_addr = adev->vcn.inst[vcn_inst].gpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1082

cache_addr = adev->vcn.inst[vcn_inst].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

456

uint32_t offset, size, vcn_inst;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

474

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

481

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

489

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

491

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

498

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

501

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

533

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

560

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

568

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

585

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

588

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

605

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

609

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

86

#define NORMALIZE_VCN_REG_OFFSET(offset) \

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

87

(offset & 0x1FFFF)

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

998

uint32_t offset, cache_size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

402

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

415

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

421

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

428

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

430

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

436

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

438

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

465

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

492

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

500

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

517

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

520

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

538

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

542

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

366

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

379

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

385

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

392

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

394

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

400

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

402

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

429

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

454

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

462

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

479

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

482

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

499

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

502

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

424

uint32_t offset, size, vcn_inst;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

438

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

444

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

452

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

454

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset));

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

460

lower_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

462

upper_32_bits(adev->vcn.inst[inst].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE));

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

489

uint32_t offset, size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

516

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

524

offset = size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

541

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

544

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset), 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

561

lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

565

upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

790

uint32_t offset, cache_size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

844

offset = 0;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

854

offset = cache_size;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

864

cache_addr = adev->vcn.inst[vcn_inst].gpu_addr + offset;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

874

cache_addr = adev->vcn.inst[vcn_inst].gpu_addr + offset +

sys/dev/pci/drm/amd/amdgpu/vpe_v6_1.c

64

static uint32_t vpe_v6_1_get_reg_offset(struct amdgpu_vpe *vpe, uint32_t inst, uint32_t offset)

sys/dev/pci/drm/amd/amdgpu/vpe_v6_1.c

70

return base + offset;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1054

uint64_t offset = args->mmap_offset;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1124

offset = kfd_get_process_doorbells(pdd);

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1125

if (!offset) {

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1134

offset = dev->adev->rmmio_remap.bus_addr;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1135

if (!offset || (PAGE_SIZE > 4096)) {

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1143

pdd->drm_priv, (struct kgd_mem **) &mem, &offset,

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1167

args->mmap_offset = offset;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1971

bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL |

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1975

bo_bucket->offset = KFD_MMAP_TYPE_MMIO |

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1978

bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo);

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

1989

bo_bucket->offset,

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2302

u64 offset;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2309

offset = kfd_get_process_doorbells(pdd);

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2310

if (!offset)

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2318

offset = pdd->dev->adev->rmmio_remap.bus_addr;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2319

if (!offset || (PAGE_SIZE > 4096)) {

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2324

offset = bo_priv->user_addr;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2329

&offset, bo_bucket->alloc_flags, criu_resume);

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2335

bo_bucket->size, bo_bucket->addr, offset);

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2354

bo_bucket->restored_offset = offset;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

2356

bo_bucket->restored_offset = offset;

sys/dev/pci/drm/amd/amdkfd/kfd_migrate.c

532

ttm_res_offset = (start_mgr - prange->start + prange->offset) << PAGE_SHIFT;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

279

uint64_t offset;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

281

offset = kfd_hiq_mqd_stride(dev) * virtual_xcc_id;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

285

mqd_mem_obj->gpu_addr = dev->dqm->hiq_sdma_mqd.gpu_addr + offset;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

287

dev->dqm->hiq_sdma_mqd.cpu_ptr + offset);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

68

uint64_t offset;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

74

offset = (q->sdma_engine_id *

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

79

offset += dev->dqm->mqd_mgrs[KFD_MQD_TYPE_HIQ]->mqd_size *

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

83

+ offset);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

84

mqd_mem_obj->gpu_addr = dev->dqm->hiq_sdma_mqd.gpu_addr + offset;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager.c

86

dev->dqm->hiq_sdma_mqd.cpu_ptr + offset);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

666

uint64_t offset)

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

668

xcc_mqd_mem_obj->gtt_mem = (offset == 0) ?

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

670

xcc_mqd_mem_obj->gpu_addr = mqd_mem_obj->gpu_addr + offset;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

672

+ offset);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

684

uint64_t offset = mm->mqd_stride(mm, q);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

689

get_xcc_mqd(mqd_mem_obj, &xcc_mqd_mem_obj, offset*xcc);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

695

m->cp_mqd_stride_size = offset;

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

791

uint64_t offset = mm->mqd_stride(mm, qp);

sys/dev/pci/drm/amd/amdkfd/kfd_mqd_manager_v9.c

806

get_xcc_mqd(mqd_mem_obj, &xcc_mqd_mem_obj, offset * xcc);

sys/dev/pci/drm/amd/amdkfd/kfd_priv.h

79

#define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \

sys/dev/pci/drm/amd/amdkfd/kfd_process.c

1339

unsigned long offset;

sys/dev/pci/drm/amd/amdkfd/kfd_process.c

1352

offset = KFD_MMAP_TYPE_RESERVED_MEM | KFD_MMAP_GPU_ID(dev->id);

sys/dev/pci/drm/amd/amdkfd/kfd_process.c

1355

MAP_SHARED, offset);

sys/dev/pci/drm/amd/amdkfd/kfd_smi_events.c

127

size_t size, loff_t *offset)

sys/dev/pci/drm/amd/amdkfd/kfd_smi_events.c

82

size_t size, loff_t *offset)

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1016

new->offset = old->offset;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1017

old->offset += new->npages;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1019

new->offset = old->offset + npages;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1402

unsigned long offset, unsigned long npages, bool readonly,

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1414

last_start = prange->start + offset;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1419

for (i = offset; i < offset + npages; i++) {

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1426

if (i < offset + npages - 1 &&

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1478

svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset,

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1511

r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly,

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

161

unsigned long offset, unsigned long npages,

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1725

unsigned long offset;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

177

addr += offset;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1770

offset = (addr >> PAGE_SHIFT) - prange->start;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1771

r = svm_range_dma_map(prange, ctx->bitmap, offset, npages,

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1794

map_start_vma = max(map_start, prange->start + offset);

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1795

map_last_vma = min(map_last, prange->start + offset + npages - 1);

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1797

offset = map_start_vma - prange->start;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

1799

r = svm_range_map_to_gpus(prange, offset, npages, readonly,

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

2052

new->offset = old->offset;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

208

unsigned long offset, unsigned long npages,

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

227

r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages,

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

237

unsigned long offset, unsigned long npages)

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

245

for (i = offset; i < offset + npages; i++) {

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

644

prange->offset = 0;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

909

uint64_t offset, uint64_t *vram_pages)

sys/dev/pci/drm/amd/amdkfd/kfd_svm.c

911

unsigned char *src = (unsigned char *)psrc + offset;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.h

121

uint64_t offset;

sys/dev/pci/drm/amd/amdkfd/kfd_svm.h

185

unsigned long offset, unsigned long npages);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1209

adev->mode_info.audio.pin[i].offset = 0;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12771

unsigned int offset,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12793

input->offset = offset;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12809

output->ack.offset);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12837

int offset;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12861

res = dc_edid_parser_recv_cea_ack(dm->dc, &offset);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

4168

int offset = 0;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

4191

offset += snprintf(rd_buf + offset, rd_buf_size - offset,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

53

lp_read_i2c(void *handle, uint32_t address, uint8_t offset, uint8_t *data, uint32_t size)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

57

struct i2c_payload i2c_payloads[] = {{true, address, 1, &offset},

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

652

unsigned int offset,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

673

rc_offset[0] = (unsigned char) offset & 0xFF;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

674

rc_offset[1] = (unsigned char) (offset >> 8) & 0xFF;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

675

rc_offset[2] = (unsigned char) (offset >> 16) & 0xFF;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

676

rc_offset[3] = (unsigned char) (offset >> 24) & 0xFF;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

132

static uint8_t get_number_of_objects(struct bios_parser *bp, uint32_t offset)

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

136

uint32_t object_table_offset = bp->object_info_tbl_offset + offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1512

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1519

offset = le16_to_cpu(object->usRecordOffset)

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1523

header = GET_IMAGE(ATOM_COMMON_RECORD_HEADER, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1528

offset += header->ucRecordSize;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1830

info->offset =

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1832

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1833

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1834

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1972

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1978

offset = le16_to_cpu(bp->object_info_tbl.v1_1->usEncoderObjectTableOffset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1982

offset = le16_to_cpu(bp->object_info_tbl.v1_1->usConnectorObjectTableOffset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1986

offset = le16_to_cpu(bp->object_info_tbl.v1_1->usRouterObjectTableOffset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1992

offset = le16_to_cpu(bp->object_info_tbl.v1_3->usMiscObjectTableOffset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

1999

offset += bp->object_info_tbl_offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

2001

tbl = ((ATOM_OBJECT_TABLE *) bios_get_image(&bp->base, offset,

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

2018

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

2026

offset = le16_to_cpu(object->usSrcDstTableOffset)

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

2029

number = GET_IMAGE(uint8_t, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

2033

offset += sizeof(uint8_t);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

2034

*id_list = (uint16_t *)bios_get_image(&bp->base, offset, *number * sizeof(uint16_t));

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

218

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

232

offset = le16_to_cpu(object->usRecordOffset)

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

236

header = GET_IMAGE(ATOM_COMMON_RECORD_HEADER, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

254

offset += header->ucRecordSize;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

293

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

295

offset = le16_to_cpu(object->usRecordOffset)

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

299

header = GET_IMAGE(ATOM_COMMON_RECORD_HEADER, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

304

offset += header->ucRecordSize;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

870

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

877

offset = le16_to_cpu(object->usRecordOffset)

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

881

header = GET_IMAGE(ATOM_COMMON_RECORD_HEADER, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser.c

894

offset += header->ucRecordSize;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2179

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2186

offset = object->encoder_recordoffset + bp->object_info_tbl_offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2189

header = GET_IMAGE(struct atom_common_record_header, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2194

offset += header->record_size;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2216

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2223

offset = object->disp_recordoffset + bp->object_info_tbl_offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2226

header = GET_IMAGE(struct atom_common_record_header, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2231

offset += header->record_size;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2252

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2259

offset = object->disp_recordoffset + bp->object_info_tbl_offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2262

header = GET_IMAGE(struct atom_common_record_header, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2267

offset += header->record_size;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2338

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2345

offset = object->disp_recordoffset + bp->object_info_tbl_offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2348

header = GET_IMAGE(struct atom_common_record_header, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

2353

offset += header->record_size;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

389

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

419

offset = object->disp_recordoffset + bp->object_info_tbl_offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

427

offset = object_path_v3->disp_recordoffset + bp->object_info_tbl_offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

432

header = GET_IMAGE(struct atom_common_record_header, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

452

offset += header->record_size;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

531

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

538

offset = object->disp_recordoffset + bp->object_info_tbl_offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

541

header = GET_IMAGE(struct atom_common_record_header, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

555

offset += header->record_size;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

608

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

615

offset = le16_to_cpu(object->disp_recordoffset)

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

619

header = GET_IMAGE(struct atom_common_record_header, offset);

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

633

offset += header->record_size;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

687

info->offset =

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

690

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

691

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser2.c

692

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser_helper.c

37

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/bios/bios_parser_helper.c

40

if (bp->bios && offset + size < bp->bios_size)

sys/dev/pci/drm/amd/display/dc/bios/bios_parser_helper.c

41

return bp->bios + offset;

sys/dev/pci/drm/amd/display/dc/bios/bios_parser_helper.h

31

uint8_t *bios_get_image(struct dc_bios *bp, uint32_t offset,

sys/dev/pci/drm/amd/display/dc/bios/bios_parser_helper.h

38

#define GET_IMAGE(type, offset) ((type *) bios_get_image(&bp->base, offset, sizeof(type)))

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c

54

#define IND_REG(offset) offset

sys/dev/pci/drm/amd/display/dc/core/dc.c

2595

if (pin_info.mask == 0xFFFFFFFF || pin_info.offset == 0xFFFFFFFF) {

sys/dev/pci/drm/amd/display/dc/core/dc.c

2601

pin_info.offset,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1438

params->offset = odm_slice_src.x;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1029

int offset = -1;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1031

offset = 1;

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1037

for (int i = nearest_smallest_index; (i > 0 && !search_for_max_increase) || (i < (LUMINANCE_DATA_TABLE_SIZE - 1) && search_for_max_increase); i += offset) {

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1039

lumin_millinits_temp = stream->lumin_data.luminance_millinits[i + offset];

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1043

if (stream->lumin_data.refresh_rate_hz[i + offset] == stream->lumin_data.refresh_rate_hz[i])

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1046

int target_brightness = (stream->lumin_data.luminance_millinits[i + offset] >= (current_brightness + flicker_criteria_millinits)) ?

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1056

refresh = dc_stream_get_refresh_hz_linear_interpolation(stream, i, i + offset, target_brightness);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1058

refresh = dc_stream_get_refresh_hz_linear_interpolation(stream, i + offset, i, target_brightness);

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1060

if (refresh == stream->lumin_data.refresh_rate_hz[i + offset])

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

1061

return stream->lumin_data.refresh_rate_hz[i + offset];

sys/dev/pci/drm/amd/display/dc/dc_edid_parser.c

30

int offset,

sys/dev/pci/drm/amd/display/dc/dc_edid_parser.c

41

offset,

sys/dev/pci/drm/amd/display/dc/dc_edid_parser.c

50

bool dc_edid_parser_recv_cea_ack(struct dc *dc, int *offset)

sys/dev/pci/drm/amd/display/dc/dc_edid_parser.c

57

return dmcu->funcs->recv_edid_cea_ack(dmcu, offset);

sys/dev/pci/drm/amd/display/dc/dc_edid_parser.h

32

int offset,

sys/dev/pci/drm/amd/display/dc/dc_edid_parser.h

37

bool dc_edid_parser_recv_cea_ack(struct dc *dc, int *offset);

sys/dev/pci/drm/amd/display/dc/dc_fused_io.c

29

loc->offset = op->offset;

sys/dev/pci/drm/amd/display/dc/dce/dce_dmcu.c

815

int offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_dmcu.c

830

header = ((uint32_t)offset & 0xFFFF) << 16 | (total_length & 0xFFFF);

sys/dev/pci/drm/amd/display/dc/dce/dce_dmcu.c

906

static bool dcn10_recv_edid_cea_ack(struct dmcu *dmcu, int *offset)

sys/dev/pci/drm/amd/display/dc/dce/dce_dmcu.c

924

*offset = data[2]; /* nack */

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1507

REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1509

REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1514

REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1516

REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1521

REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1523

REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1528

REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1530

REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1535

REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1537

REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1542

REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1544

REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1549

REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1551

REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1556

REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c

1558

REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

198

curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

210

curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

231

curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

243

curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

263

curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

275

curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

295

curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

307

curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

327

curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

339

curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

359

curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

371

curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

391

curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

403

curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

423

curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

435

curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

389

uint32_t offset = 0;

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

395

offset = 0;

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

398

offset = mmD2VGA_CONTROL - mmD1VGA_CONTROL;

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

401

offset = mmD3VGA_CONTROL - mmD1VGA_CONTROL;

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

404

offset = mmD4VGA_CONTROL - mmD1VGA_CONTROL;

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

407

offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL;

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

410

offset = mmD6VGA_CONTROL - mmD1VGA_CONTROL;

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

416

value = dm_read_reg_soc15(tg->ctx, mmD1VGA_CONTROL, offset);

sys/dev/pci/drm/amd/display/dc/dce120/dce120_timing_generator.c

424

dm_write_reg_soc15(tg->ctx, mmD1VGA_CONTROL, offset, value);

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

136

exp_region0_lut_offset, curve0->offset,

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

138

exp_region1_lut_offset, curve1->offset,

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

183

if (!convert_to_custom_float_format(corner_points[0].red.offset, &fmt,

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

188

if (!convert_to_custom_float_format(corner_points[0].green.offset, &fmt,

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

193

if (!convert_to_custom_float_format(corner_points[0].blue.offset, &fmt,

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

479

lut_params->arr_curve_points[i].offset =

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

480

lut_params->arr_curve_points[k].offset + (1 << seg_distr[k]);

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

656

lut_params->arr_curve_points[i].offset =

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_cm_common.c

657

lut_params->arr_curve_points[k].offset + (1 << seg_distr[k]);

sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_cm_common.c

241

lut_params->arr_curve_points[i].offset =

sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_cm_common.c

242

lut_params->arr_curve_points[k].offset + (1 << seg_distr[k]);

sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_cm_common.c

339

if (!convert_to_custom_float_format(corner_points[0].red.offset, &fmt,

sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_cm_common.c

344

if (!convert_to_custom_float_format(corner_points[0].green.offset, &fmt,

sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_cm_common.c

349

if (!convert_to_custom_float_format(corner_points[0].blue.offset, &fmt,

sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_cm_common.c

93

exp_region0_lut_offset, curve0->offset,

sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_cm_common.c

95

exp_region1_lut_offset, curve1->offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

661

CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

663

CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

668

CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

670

CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

675

CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

677

CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

682

CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

684

CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

689

CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

691

CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

696

CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

698

CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

703

CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

705

CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

710

CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

712

CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

717

CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

719

CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

724

CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

726

CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

731

CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

733

CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

738

CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

740

CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

745

CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

747

CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

752

CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

754

CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

759

CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

761

CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

766

CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

768

CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

773

CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

775

CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

811

CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

813

CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

818

CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

820

CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

825

CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

827

CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

832

CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

834

CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

839

CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

841

CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

846

CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

848

CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

853

CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

855

CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

860

CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

862

CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

867

CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

869

CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

874

CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

876

CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

881

CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

883

CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

888

CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

890

CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

895

CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

897

CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

902

CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

904

CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

909

CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

911

CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

916

CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

918

CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

923

CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

925

CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1000

CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1002

CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1007

CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1009

CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1014

CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1016

CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1021

CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1023

CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1028

CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1030

CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1035

CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1037

CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1073

CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1075

CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1080

CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1082

CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1087

CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1089

CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1094

CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1096

CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1101

CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1103

CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1108

CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1110

CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1115

CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1117

CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1122

CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1124

CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1129

CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1131

CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1136

CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1138

CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1143

CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1145

CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1150

CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1152

CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1157

CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1159

CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1164

CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1166

CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1171

CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1173

CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1178

CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1180

CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1185

CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1187

CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

923

CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

925

CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

930

CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

932

CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

937

CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

939

CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

944

CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

946

CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

951

CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

953

CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

958

CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

960

CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

965

CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

967

CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

972

CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

974

CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

979

CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

981

CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

986

CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

988

CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

993

CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

995

CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

193

info->offset = mmDC_GPIO_DDC1_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

196

info->offset = mmDC_GPIO_DDC2_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

199

info->offset = mmDC_GPIO_DDC3_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

202

info->offset = mmDC_GPIO_DDC4_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

205

info->offset = mmDC_GPIO_DDC5_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

208

info->offset = mmDC_GPIO_DDC6_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

211

info->offset = mmDC_GPIO_DDCVGA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

214

info->offset = mmDC_GPIO_I2CPAD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

225

info->offset = mmDC_GPIO_DDC1_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

228

info->offset = mmDC_GPIO_DDC2_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

231

info->offset = mmDC_GPIO_DDC3_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

234

info->offset = mmDC_GPIO_DDC4_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

237

info->offset = mmDC_GPIO_DDC5_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

240

info->offset = mmDC_GPIO_DDC6_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

243

info->offset = mmDC_GPIO_DDCVGA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

246

info->offset = mmDC_GPIO_I2CPAD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

254

info->offset = mmDC_GPIO_GENERIC_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

283

info->offset = mmDC_GPIO_HPD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

311

info->offset = mmDC_GPIO_SYNCA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

315

info->offset = mmDC_GPIO_SYNCA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

328

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

332

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

337

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

341

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

356

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

357

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

358

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

40

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

45

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

215

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

218

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

221

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

224

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

227

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

230

info->offset = REG(DC_GPIO_DDC6_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

233

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

236

info->offset = REG(DC_GPIO_I2CPAD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

247

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

250

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

253

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

256

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

259

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

262

info->offset = REG(DC_GPIO_DDC6_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

265

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

268

info->offset = REG(DC_GPIO_I2CPAD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

276

info->offset = REG(DC_GPIO_GENERIC_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

305

info->offset = REG(DC_GPIO_HPD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

333

info->offset = REG(DC_GPIO_SYNCA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

337

info->offset = REG(DC_GPIO_SYNCA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

350

info->offset = REG(DC_GPIO_GENLK_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

354

info->offset = REG(DC_GPIO_GENLK_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

359

info->offset = REG(DC_GPIO_GENLK_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

363

info->offset = REG(DC_GPIO_GENLK_A);

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

378

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

379

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

380

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

62

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

67

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

222

info->offset = mmDC_GPIO_DDC1_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

225

info->offset = mmDC_GPIO_DDC2_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

228

info->offset = mmDC_GPIO_DDC3_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

231

info->offset = mmDC_GPIO_DDC4_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

234

info->offset = mmDC_GPIO_DDC5_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

237

info->offset = mmDC_GPIO_DDC6_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

240

info->offset = mmDC_GPIO_DDCVGA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

243

info->offset = mmDC_GPIO_I2CPAD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

254

info->offset = mmDC_GPIO_DDC1_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

257

info->offset = mmDC_GPIO_DDC2_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

260

info->offset = mmDC_GPIO_DDC3_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

263

info->offset = mmDC_GPIO_DDC4_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

266

info->offset = mmDC_GPIO_DDC5_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

269

info->offset = mmDC_GPIO_DDC6_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

272

info->offset = mmDC_GPIO_DDCVGA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

275

info->offset = mmDC_GPIO_I2CPAD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

283

info->offset = mmDC_GPIO_GENERIC_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

312

info->offset = mmDC_GPIO_HPD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

340

info->offset = mmDC_GPIO_SYNCA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

344

info->offset = mmDC_GPIO_SYNCA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

357

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

361

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

366

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

370

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

379

info->offset = mmGPIOPAD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

390

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

391

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

392

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

64

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

69

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

222

info->offset = mmDC_GPIO_DDC1_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

225

info->offset = mmDC_GPIO_DDC2_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

228

info->offset = mmDC_GPIO_DDC3_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

231

info->offset = mmDC_GPIO_DDC4_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

234

info->offset = mmDC_GPIO_DDC5_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

237

info->offset = mmDC_GPIO_DDC6_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

240

info->offset = mmDC_GPIO_DDCVGA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

243

info->offset = mmDC_GPIO_I2CPAD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

254

info->offset = mmDC_GPIO_DDC1_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

257

info->offset = mmDC_GPIO_DDC2_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

260

info->offset = mmDC_GPIO_DDC3_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

263

info->offset = mmDC_GPIO_DDC4_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

266

info->offset = mmDC_GPIO_DDC5_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

269

info->offset = mmDC_GPIO_DDC6_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

272

info->offset = mmDC_GPIO_DDCVGA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

275

info->offset = mmDC_GPIO_I2CPAD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

283

info->offset = mmDC_GPIO_GENERIC_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

312

info->offset = mmDC_GPIO_HPD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

340

info->offset = mmDC_GPIO_SYNCA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

344

info->offset = mmDC_GPIO_SYNCA_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

357

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

361

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

366

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

370

info->offset = mmDC_GPIO_GENLK_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

379

info->offset = mmGPIOPAD_A;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

390

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

391

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

392

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

64

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

69

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

215

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

218

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

221

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

224

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

227

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

230

info->offset = REG(DC_GPIO_DDC6_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

233

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

236

info->offset = REG(DC_GPIO_I2CPAD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

247

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

250

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

253

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

256

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

259

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

262

info->offset = REG(DC_GPIO_DDC6_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

265

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

268

info->offset = REG(DC_GPIO_I2CPAD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

276

info->offset = REG(DC_GPIO_GENERIC_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

305

info->offset = REG(DC_GPIO_HPD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

333

info->offset = REG(DC_GPIO_SYNCA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

337

info->offset = REG(DC_GPIO_SYNCA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

350

info->offset = REG(DC_GPIO_GENLK_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

354

info->offset = REG(DC_GPIO_GENLK_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

359

info->offset = REG(DC_GPIO_GENLK_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

363

info->offset = REG(DC_GPIO_GENLK_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

378

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

379

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

380

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

62

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

67

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

204

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

207

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

210

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

213

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

216

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

219

info->offset = REG(DC_GPIO_DDC6_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

222

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

234

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

237

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

240

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

243

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

246

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

249

info->offset = REG(DC_GPIO_DDC6_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

252

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

261

info->offset = REG(DC_GPIO_GENERIC_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

290

info->offset = REG(DC_GPIO_HPD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

351

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

352

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

353

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

66

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

71

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

200

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

203

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

206

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

209

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

212

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

215

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

227

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

230

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

233

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

236

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

239

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

242

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

251

info->offset = REG(DC_GPIO_GENERIC_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

280

info->offset = REG(DC_GPIO_HPD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

341

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

342

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

343

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

65

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

70

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

211

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

214

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

217

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

220

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

223

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

226

info->offset = REG(DC_GPIO_DDC6_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

229

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

241

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

244

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

247

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

250

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

253

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

256

info->offset = REG(DC_GPIO_DDC6_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

259

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

268

info->offset = REG(DC_GPIO_GENERIC_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

297

info->offset = REG(DC_GPIO_HPD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

358

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

359

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

360

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

73

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

78

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

201

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

204

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

207

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

210

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

213

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

216

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

228

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

231

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

234

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

237

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

240

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

243

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

252

info->offset = REG(DC_GPIO_GENERIC_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

281

info->offset = REG(DC_GPIO_HPD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

342

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

343

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

344

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

66

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

71

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

182

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

185

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

188

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

191

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

194

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

197

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

209

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

212

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

215

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

218

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

221

info->offset = REG(DC_GPIO_DDC5_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

224

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

233

info->offset = REG(DC_GPIO_GENERIC_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

259

info->offset = REG(DC_GPIO_HPD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

317

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

318

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

319

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

64

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

69

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

166

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

169

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

172

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

175

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

181

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

193

info->offset = REG(DC_GPIO_DDC1_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

196

info->offset = REG(DC_GPIO_DDC2_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

199

info->offset = REG(DC_GPIO_DDC3_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

202

info->offset = REG(DC_GPIO_DDC4_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

208

info->offset = REG(DC_GPIO_DDCVGA_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

217

info->offset = REG(DC_GPIO_GENERIC_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

243

info->offset = REG(DC_GPIO_HPD_A);

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

301

info->offset_y = info->offset + 2;

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

302

info->offset_en = info->offset + 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

303

info->offset_mask = info->offset - 1;

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

39

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

44

switch (offset) {

sys/dev/pci/drm/amd/display/dc/gpio/gpio_service.c

128

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/gpio_service.c

134

if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {

sys/dev/pci/drm/amd/display/dc/gpio/gpio_service.c

144

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/gpio_service.c

151

if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {

sys/dev/pci/drm/amd/display/dc/gpio/gpio_service.c

187

pin.offset = 0xFFFFFFFF;

sys/dev/pci/drm/amd/display/dc/gpio/gpio_service.c

490

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/gpio/gpio_service.c

498

if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en))

sys/dev/pci/drm/amd/display/dc/gpio/hw_translate.h

31

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

131

uint8_t offset;

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

143

offset = hdcp_i2c_offsets[message_info->msg_id];

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

144

i2c_payloads[0].data = &offset;

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

170

buff[0] = offset;

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

238

uint32_t offset = 0;

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

264

dpcd_addr + offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

265

data + offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

273

dpcd_addr + offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

274

data + offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

294

dpcd_addr + offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

295

data + offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

300

dpcd_addr + offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

301

data + offset,

sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c

309

offset += cur_length;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

350

if (!convert_to_custom_float_format(arr_points[0].offset, &fmt,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

570

regamma_params->arr_curve_points[i].offset =

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

571

regamma_params->arr_curve_points[k].offset + (1 << seg_distr[k]);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2040

pipe_ctx->stream_res.test_pattern_params.offset);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3257

int width, int height, int offset)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3260

color_space, color_depth, solid_color, width, height, offset);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

151

int width, int height, int offset);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1181

int width, int height, int offset)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1184

color_space, color_depth, solid_color, width, height, offset);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

91

int width, int height, int offset);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2094

pipe_ctx->stream_res.test_pattern_params.offset);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

427

int width, int height, int offset);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

343

int offset;

sys/dev/pci/drm/amd/display/dc/inc/hw/aux_engine.h

104

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/inc/hw/dmcu.h

78

int offset,

sys/dev/pci/drm/amd/display/dc/inc/hw/dmcu.h

86

bool (*recv_edid_cea_ack)(struct dmcu *dmcu, int *offset);

sys/dev/pci/drm/amd/display/dc/inc/hw/gpio.h

85

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/inc/hw/hw_shared.h

60

uint32_t offset;

sys/dev/pci/drm/amd/display/dc/inc/hw/hw_shared.h

67

struct fixed31_32 offset;

sys/dev/pci/drm/amd/display/dc/inc/hw/opp.h

345

int offset);

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

536

tp_params->offset);

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

568

tp_params->offset);

sys/dev/pci/drm/amd/display/dc/link/link_detection.c

271

uint8_t offset = HDMI_SCDC_MANUFACTURER_OUI;

sys/dev/pci/drm/amd/display/dc/link/link_detection.c

273

link_query_ddc_data(ddc_service, slave_address, &offset,

sys/dev/pci/drm/amd/display/dc/link/link_detection.c

274

sizeof(offset), sink->scdc_caps.manufacturer_OUI.byte,

sys/dev/pci/drm/amd/display/dc/link/link_detection.c

277

offset = HDMI_SCDC_DEVICE_ID;

sys/dev/pci/drm/amd/display/dc/link/link_detection.c

279

link_query_ddc_data(ddc_service, slave_address, &offset,

sys/dev/pci/drm/amd/display/dc/link/link_detection.c

280

sizeof(offset), &(sink->scdc_caps.device_id.byte),

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

357

uint8_t offset = 0xA;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

396

slave_address, &offset, 1, &value, 1);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

401

buffer[0] = offset;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

446

slave_address, &offset, 1, &value, 1);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

451

buffer[0] = offset;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

416

uint8_t offset;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

420

offset = 1;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

423

offset = 2;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

426

offset = 3;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

429

offset = 4;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

432

offset = 5;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

435

offset = 6;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

438

offset = 7;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

441

offset = 8;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

444

offset = 0xFF;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

447

if (offset != 0xFF) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

449

((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (offset - 1));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

546

uint8_t offset = HDMI_SCDC_SINK_VERSION;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

555

link_query_ddc_data(ddc_service, slave_address, &offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

556

sizeof(offset), &sink_version, sizeof(sink_version));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

581

uint8_t offset = HDMI_SCDC_TMDS_CONFIG;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

588

link_query_ddc_data(ddc_service, slave_address, &offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

589

sizeof(offset), &tmds_config, sizeof(tmds_config));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

594

offset = HDMI_SCDC_SCRAMBLER_STATUS;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

596

&offset, sizeof(offset), &scramble_status,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

598

offset = HDMI_SCDC_STATUS_FLAGS;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c

600

&offset, sizeof(offset), &status_data.byte,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.c

101

uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.c

107

!is_immediate_downstream(link, offset) &&

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.c

91

static inline bool is_immediate_downstream(struct dc_link *link, uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.c

94

offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.h

45

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1000

((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (offset - 1));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1012

offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1186

uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1192

if (is_repeater(link_training_setting, offset))

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1194

((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (offset - 1));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1201

if (is_repeater(link_training_setting, offset)) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1205

offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1229

uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1238

if (is_repeater(lt_settings, offset))

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1240

((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (offset - 1));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1259

offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1261

if (is_repeater(lt_settings, offset)) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1264

offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1284

if (is_repeater(lt_settings, offset)) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1290

offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1298

offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1356

uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1360

dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_cr, offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1361

dp_set_hw_lane_settings(link, link_res, lt_settings, offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

1388

uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

457

bool is_repeater(const struct link_training_settings *lt_settings, uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

459

return (lt_settings->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT) && (offset != 0);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

532

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

536

if (offset == 0 && retries == 1 && lt_settings->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

539

return dpia_get_eq_aux_rd_interval(link, lt_settings, offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

540

} else if (is_repeater(lt_settings, offset))

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

542

link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

600

uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

609

if (is_repeater(link_training_setting, offset)) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

612

((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (offset - 1));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

642

if (is_repeater(link_training_setting, offset)) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

646

offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

651

((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (offset - 1));

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

656

offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

994

void repeater_training_done(struct dc_link *link, uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h

103

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h

149

bool is_repeater(const struct link_training_settings *lt_settings, uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h

195

uint32_t offset,

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h

49

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h

66

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h

77

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h

86

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h

98

void repeater_training_done(struct dc_link *link, uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

224

uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

243

dp_set_hw_training_pattern(link, link_res, lt_settings->pattern_for_cr, offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

259

offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

269

offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

274

offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

292

offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

344

uint32_t offset)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

358

if (is_repeater(lt_settings, offset) && link_dp_get_encoding_format(&lt_settings->link_settings) == DP_8b_10b_ENCODING)

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

361

dp_set_hw_training_pattern(link, link_res, tr_pattern, offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

366

dp_set_hw_lane_settings(link, link_res, lt_settings, offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

377

tr_pattern, offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

379

dpcd_set_lane_settings(link, lt_settings, offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

382

wait_time_microsec = dp_get_eq_aux_rd_interval(link, lt_settings, offset, retries_ch_eq);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

397

offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.h

46

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.h

52

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.h

58

uint32_t offset);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

195

const uint8_t offset = dp_parse_lttpr_repeater_count(

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

227

if (offset != 0xFF) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

228

if (offset == 2) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

232

} else if (offset > 2) {

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.c

183

const uint32_t offset = reduced_address - extended_address;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.c

193

memcpy(&extended_data[offset], reduced_data, reduced_size);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_hpd.c

116

pin_info.offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

517

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

519

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

524

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

526

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

531

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

533

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

538

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

540

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

545

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

547

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

552

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

554

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

559

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

561

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

566

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

568

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

574

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

576

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

581

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

583

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

588

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

590

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

595

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

597

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

602

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

604

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

609

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

611

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

616

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

618

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

623

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

625

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

630

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

632

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

666

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

668

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

673

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

675

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

681

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

683

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

688

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

690

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

695

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

697

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

702

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

704

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

709

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

711

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

716

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

718

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

724

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

726

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

731

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

733

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

738

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

740

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

745

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

747

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

752

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

754

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

759

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

761

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

766

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

768

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

773

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

775

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

780

MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

782

MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

374

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

376

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

381

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

383

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

388

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

390

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

395

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

397

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

402

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

404

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

409

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

411

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

416

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

418

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

423

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

425

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

431

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

433

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

438

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

440

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

445

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

447

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

452

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

454

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

459

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

461

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

466

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

468

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

473

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

475

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

480

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

482

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

487

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

489

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

526

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

528

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

533

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

535

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

541

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

543

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

548

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

550

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

555

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

557

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

562

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

564

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

569

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

571

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

576

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

578

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

584

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

586

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

591

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

593

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

598

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

600

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

605

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

607

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

612

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

614

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

619

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

621

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

626

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

628

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

633

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

635

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

640

MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,

sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

642

MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,

sys/dev/pci/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

50

int offset)

sys/dev/pci/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

99

DPG_X_OFFSET, offset,

sys/dev/pci/drm/amd/display/dc/opp/dcn20/dcn20_opp.h

154

int offset);

sys/dev/pci/drm/amd/display/dmub/dmub_srv.h

199

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/inc/dmub_cmd.h

5760

uint16_t offset; /**< offset into the CEA block */

sys/dev/pci/drm/amd/display/dmub/inc/dmub_cmd.h

5782

uint16_t offset; /**< offset of the chunk into the CEA block */

sys/dev/pci/drm/amd/display/dmub/inc/dmub_cmd.h

5885

uint8_t offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

158

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

167

dmub_dcn20_translate_addr(&cw0->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

169

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

170

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

176

dmub_dcn20_translate_addr(&cw1->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

178

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

179

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

197

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

203

dmub_dcn20_translate_addr(&cw2->offset, fb_base, fb_offset,

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

204

&offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

206

REG_WRITE(DMCUB_REGION3_CW2_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

207

REG_WRITE(DMCUB_REGION3_CW2_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

219

dmub_dcn20_translate_addr(&cw3->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

221

REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

222

REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

229

dmub_dcn20_translate_addr(&cw4->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

233

REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

234

REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

240

REG_WRITE(DMCUB_REGION4_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

241

REG_WRITE(DMCUB_REGION4_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

248

dmub_dcn20_translate_addr(&cw5->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

250

REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

251

REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

257

REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

258

REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

264

dmub_dcn20_translate_addr(&cw6->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

266

REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.c

267

REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.h

176

const struct dmub_srv_common_reg_offset offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

100

dmub_dcn30_translate_addr(&cw0->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

102

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

103

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

109

dmub_dcn30_translate_addr(&cw1->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

111

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

112

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

130

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

134

offset = cw2->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

137

REG_WRITE(DMCUB_REGION3_CW2_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

138

REG_WRITE(DMCUB_REGION3_CW2_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

150

offset = cw3->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

152

REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

153

REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

159

offset = cw4->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

163

REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

164

REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

170

REG_WRITE(DMCUB_REGION4_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

171

REG_WRITE(DMCUB_REGION4_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

178

offset = cw5->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

180

REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

181

REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

187

REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

188

REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

194

offset = cw6->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

196

REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

197

REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn30.c

91

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

161

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

168

dmub_dcn31_translate_addr(&cw0->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

170

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

171

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

177

dmub_dcn31_translate_addr(&cw1->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

179

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

180

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

198

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

200

offset = cw3->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

202

REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

203

REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

209

offset = cw4->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

211

REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

212

REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

218

offset = cw5->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

220

REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

221

REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

227

REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

228

REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

234

offset = cw6->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

236

REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c

237

REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.h

177

const struct dmub_srv_dcn31_reg_offset offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

161

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

168

dmub_dcn32_translate_addr(&cw0->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

170

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

171

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

177

dmub_dcn32_translate_addr(&cw1->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

179

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

180

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

194

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

198

offset = cw0->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

200

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

201

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

207

offset = cw1->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

209

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

210

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

228

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

230

offset = cw3->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

232

REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

233

REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

239

offset = cw4->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

241

REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

242

REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

248

offset = cw5->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

250

REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

251

REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

257

REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

258

REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

264

offset = cw6->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

266

REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

267

REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

46

#define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.h

193

struct dmub_srv_dcn32_reg_offset offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

166

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

171

dmub_dcn35_translate_addr(&cw0->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

173

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

174

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

180

dmub_dcn35_translate_addr(&cw1->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

182

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

183

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

197

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

200

offset = cw0->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

201

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

202

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

207

offset = cw1->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

208

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

209

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

225

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

227

offset = cw3->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

229

REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

230

REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

236

offset = cw4->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

238

REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

239

REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

245

offset = cw5->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

247

REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

248

REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

254

REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

255

REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

261

offset = cw6->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

263

REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

264

REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

270

offset = region6->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

272

REG_WRITE(DMCUB_REGION6_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

273

REG_WRITE(DMCUB_REGION6_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

44

#define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.h

195

struct dmub_srv_dcn35_reg_offset offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn351.c

21

#define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn36.c

21

#define DMUB_SR(reg) REG_STRUCT->offset.reg = REG_OFFSET_EXP(reg);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

130

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

140

dmub_dcn401_translate_addr(&cw0->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

142

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

143

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

149

dmub_dcn401_translate_addr(&cw1->offset, fb_base, fb_offset, &offset);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

151

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

152

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

167

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

174

offset = cw0->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

176

REG_WRITE(DMCUB_REGION3_CW0_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

177

REG_WRITE(DMCUB_REGION3_CW0_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

183

offset = cw1->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

185

REG_WRITE(DMCUB_REGION3_CW1_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

186

REG_WRITE(DMCUB_REGION3_CW1_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

205

union dmub_addr offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

207

offset = cw3->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

209

REG_WRITE(DMCUB_REGION3_CW3_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

210

REG_WRITE(DMCUB_REGION3_CW3_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

216

offset = cw4->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

218

REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

219

REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

225

offset = cw5->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

227

REG_WRITE(DMCUB_REGION3_CW5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

228

REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

234

REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

235

REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

241

offset = cw6->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

243

REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

244

REG_WRITE(DMCUB_REGION3_CW6_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

250

offset = region6->offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

252

REG_WRITE(DMCUB_REGION6_OFFSET, offset.u.low_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c

253

REG_WRITE(DMCUB_REGION6_OFFSET_HIGH, offset.u.high_part);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.h

195

const struct dmub_srv_dcn401_reg_offset offset;

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.h

43

#define REG(reg) (REGS)->offset.reg

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c

682

cw0.offset.quad_part = inst_fb->gpu_addr;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c

686

cw1.offset.quad_part = stack_fb->gpu_addr;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c

708

cw2.offset.quad_part = data_fb->gpu_addr;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c

712

cw3.offset.quad_part = bios_fb->gpu_addr;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c

716

cw4.offset.quad_part = mail_fb->gpu_addr;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c

732

cw5.offset.quad_part = tracebuff_fb->gpu_addr;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c

739

cw6.offset.quad_part = fw_state_fb->gpu_addr;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv.c

745

region6.offset.quad_part = shared_state_fb->gpu_addr;

sys/dev/pci/drm/amd/display/include/gpio_service_interface.h

51

uint32_t offset,

sys/dev/pci/drm/amd/display/include/gpio_service_interface.h

56

uint32_t offset,

sys/dev/pci/drm/amd/display/include/gpio_service_interface.h

73

uint32_t offset,

sys/dev/pci/drm/amd/display/include/gpio_types.h

77

uint32_t offset;

sys/dev/pci/drm/amd/display/modules/color/color_gamma.c

1347

struct fixed31_32 offset = dc_fixpt_zero;

sys/dev/pci/drm/amd/display/modules/color/color_gamma.c

1372

offset = dc_fixpt_add(min, max);

sys/dev/pci/drm/amd/display/modules/color/color_gamma.c

1377

ramp->entries.red[i], delta), offset);

sys/dev/pci/drm/amd/display/modules/color/color_gamma.c

1380

ramp->entries.green[i], delta), offset);

sys/dev/pci/drm/amd/display/modules/color/color_gamma.c

1383

ramp->entries.blue[i], delta), offset);

sys/dev/pci/drm/amd/display/modules/inc/mod_hdcp.h

138

uint8_t offset;

sys/dev/pci/drm/amd/display/modules/inc/mod_hdcp.h

154

uint8_t offset,

sys/dev/pci/drm/amd/include/cgs_common.h

164

#define cgs_read_register(dev, offset) \

sys/dev/pci/drm/amd/include/cgs_common.h

165

CGS_CALL(read_register, dev, offset)

sys/dev/pci/drm/amd/include/cgs_common.h

166

#define cgs_write_register(dev, offset, value) \

sys/dev/pci/drm/amd/include/cgs_common.h

167

CGS_CALL(write_register, dev, offset, value)

sys/dev/pci/drm/amd/include/cgs_common.h

90

typedef uint32_t (*cgs_read_register_t)(struct cgs_device *cgs_device, unsigned offset);

sys/dev/pci/drm/amd/include/cgs_common.h

98

typedef void (*cgs_write_register_t)(struct cgs_device *cgs_device, unsigned offset,

sys/dev/pci/drm/amd/include/discovery.h

50

uint16_t offset; /* Byte offset */

sys/dev/pci/drm/amd/include/kgd_pp_interface.h

427

int (*emit_clock_levels)(void *handle, enum pp_clock_type type, char *buf, int *offset);

sys/dev/pci/drm/amd/pm/amdgpu_dpm.c

1266

int *offset)

sys/dev/pci/drm/amd/pm/amdgpu_dpm.c

1278

offset);

sys/dev/pci/drm/amd/pm/inc/amdgpu_dpm.h

505

int *offset);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

410

while (config_regs->offset != 0xFFFFFFFF) {

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

416

data = RREG32_SMC(config_regs->offset);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

419

data = RREG32_DIDT(config_regs->offset);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

422

data = RREG32(config_regs->offset);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

433

WREG32_SMC(config_regs->offset, data);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

436

WREG32_DIDT(config_regs->offset, data);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

439

WREG32(config_regs->offset, data);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

71

u32 offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2851

u32 data = 0, offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2856

while (config_regs->offset != 0xFFFFFFFF) {

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2859

offset = SMC_CG_IND_START + config_regs->offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2860

if (offset < SMC_CG_IND_END)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2861

data = RREG32_SMC(offset);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2864

data = RREG32(config_regs->offset);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2873

offset = SMC_CG_IND_START + config_regs->offset;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2874

if (offset < SMC_CG_IND_END)

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2875

WREG32_SMC(offset, data);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2878

WREG32(config_regs->offset, data);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

861

u32 offset;

sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c

714

int *offset)

sys/dev/pci/drm/amd/pm/powerplay/amd_powerplay.c

724

return hwmgr->hwmgr_func->emit_clock_levels(hwmgr, type, buf, offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1228

uint16_t offset)

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1240

table_address += offset;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1247

uint16_t offset)

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

1251

get_edc_leakage_table(hwmgr, offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

268

unsigned int offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO_V3_1, asVoltageObj[0]);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

271

while (offset < size) {

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

273

(const ATOM_VOLTAGE_OBJECT_V3 *)(start + offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

279

offset += le16_to_cpu(voltage_object->asGpioVoltageObj.sHeader.usSize);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

622

unsigned int offset = offsetof(ATOM_GPIO_PIN_LUT, asGPIO_Pin[0]);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

625

while (offset < size) {

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

627

(const ATOM_GPIO_PIN_ASSIGNMENT *)(start + offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

637

offset += offsetof(ATOM_GPIO_PIN_ASSIGNMENT, ucGPIO_ID) + 1;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomctrl.h

346

uint16_t offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c

35

unsigned int offset =

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c

39

while (offset < size) {

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c

41

(const union atom_voltage_object_v4 *)(start + offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c

47

offset += le16_to_cpu(voltage_object->gpio_voltage_obj.header.object_size);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2929

uint16_t offset;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2944

offset = data->edc_hilo_leakage_offset_from_vbios.usEdcDidtLoDpm7TableOffset;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2946

offset = data->edc_hilo_leakage_offset_from_vbios.usEdcDidtHiDpm7TableOffset;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2950

offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4001

uint32_t offset, val_vid;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4027

offset = data->soft_regs_start + smum_get_offsetof(hwmgr,

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4033

activity_percent = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h

47

uint32_t offset;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

906

while (config_regs->offset != 0xFFFFFFFF) {

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

912

data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

916

data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

920

data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

924

data = cgs_read_register(hwmgr->device, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

934

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, config_regs->offset, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

938

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

942

cgs_write_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

946

cgs_write_register(hwmgr->device, config_regs->offset, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

90

uint32_t phm_set_field_to_u32(u32 offset, u32 original_data, u32 field, u32 size)

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

95

shift = (offset % 4) << 3;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.h

116

static inline void phm_get_sysfs_buf(char **buf, int *offset)

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.h

118

if (!*buf || !offset)

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.h

121

*offset = offset_in_page(*buf);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.h

122

*buf -= *offset;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.h

97

extern uint32_t phm_set_field_to_u32(u32 offset, u32 original_data, u32 field, u32 size);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4683

enum pp_clock_type type, char *buf, int *offset)

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4712

*offset += sysfs_emit_at(buf, *offset, "%d: %uMhz %s\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4725

*offset += sysfs_emit_at(buf, *offset, "%d: %uMhz %s\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4738

*offset += sysfs_emit_at(buf, *offset, "%d: %uMhz %s\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4753

*offset += sysfs_emit_at(buf, *offset, "%d: %uMhz %s\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4767

*offset += sysfs_emit_at(buf, *offset, "%d: %s %s %s\n", i,

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4788

*offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_SCLK");

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4791

*offset += sysfs_emit_at(buf, *offset, "%d: %10uMhz %10umV\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4799

*offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_MCLK");

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4802

*offset += sysfs_emit_at(buf, *offset, "%d: %10uMhz %10umV\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4810

*offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_RANGE");

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4811

*offset += sysfs_emit_at(buf, *offset, "SCLK: %7uMHz %10uMHz\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4814

*offset += sysfs_emit_at(buf, *offset, "MCLK: %7uMHz %10uMHz\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4817

*offset += sysfs_emit_at(buf, *offset, "VDDC: %7umV %11umV\n",

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

755

while (config_regs->offset != 0xFFFFFFFF) {

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

758

data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

761

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

764

data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

767

cgs_write_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

770

data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_SE_CAC, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

773

cgs_write_ind_register(hwmgr->device, CGS_IND_REG_SE_CAC, config_regs->offset, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

789

while (config_regs->offset != 0xFFFFFFFF) {

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

790

data = cgs_read_register(hwmgr->device, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

793

cgs_write_register(hwmgr->device, config_regs->offset, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.h

46

uint32_t offset;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.h

54

uint32_t offset;

sys/dev/pci/drm/amd/pm/powerplay/inc/hwmgr.h

315

enum pp_clock_type type, char *buf, int *offset);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2777

uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2794

offset = clk_activity_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2795

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2797

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2808

offset = up_hyst_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2809

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2812

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2829

offset = clk_activity_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2830

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2832

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2843

offset = up_hyst_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2844

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2847

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2564

uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2581

offset = clk_activity_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2582

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2584

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2595

offset = up_hyst_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2596

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2599

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2616

offset = clk_activity_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2617

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2619

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2630

offset = up_hyst_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2631

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2634

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2602

uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2619

offset = clk_activity_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2620

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2622

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2633

offset = up_hyst_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2634

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2637

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2654

offset = clk_activity_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2655

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2657

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2668

offset = up_hyst_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2669

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2672

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu8_smumgr.h

70

uint32_t offset;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3163

uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3180

offset = clk_activity_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3181

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3183

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3194

offset = up_hyst_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3195

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3198

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3215

offset = clk_activity_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3216

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3218

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3229

offset = up_hyst_offset & ~0x3;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3230

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3233

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3112

static int smu_emit_ppclk_levels(void *handle, enum pp_clock_type type, char *buf, int *offset)

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3127

return smu->ppt_funcs->emit_clk_levels(smu, clk_type, buf, offset);

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3787

size_t offset = *size;

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3792

offset += sysfs_emit_at(sysbuf, offset,

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3796

offset += sysfs_emit_at(sysbuf, offset,

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3801

*size = offset;

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3810

size_t offset = 0;

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3827

smu_print_dpm_policy(dpm_policy, sysbuf, &offset);

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

3829

return offset;

sys/dev/pci/drm/amd/pm/swsmu/inc/amdgpu_smu.h

736

int (*emit_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, char *buf, int *offset);

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

801

enum smu_clk_type type, char *buf, int *offset)

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

815

*offset += sysfs_emit_at(buf, *offset, "unavailable\n");

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

919

*offset += sysfs_emit_at(buf, *offset, "%d: %uMhz %s\n",

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

926

*offset += sysfs_emit_at(buf, *offset, "0: %s %s %dMhz *\n",

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1260

int *offset)

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1306

*offset += sysfs_emit_at(buf, *offset,

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1334

*offset += sysfs_emit_at(buf, *offset,

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1345

*offset += sysfs_emit_at(buf, *offset, "%d: %s %s %dMhz %s\n", i,

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1367

*offset += sysfs_emit_at(buf, *offset, "OD_SCLK:\n0: %uMhz\n1: %uMhz\n",

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1375

*offset += sysfs_emit_at(buf, *offset, "OD_MCLK:\n1: %uMHz\n", od_table->UclkFmax);

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1382

*offset += sysfs_emit_at(buf, *offset, "OD_VDDC_CURVE:\n");

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1395

*offset += sysfs_emit_at(buf, *offset, "%d: %uMHz %umV\n",

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1403

*offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_RANGE");

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1410

*offset += sysfs_emit_at(buf, *offset, "SCLK: %7uMhz %10uMhz\n",

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1417

*offset += sysfs_emit_at(buf, *offset, "MCLK: %7uMhz %10uMhz\n",

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1425

*offset += sysfs_emit_at(buf, *offset,

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1431

*offset += sysfs_emit_at(buf, *offset,

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1437

*offset += sysfs_emit_at(buf, *offset,

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1443

*offset += sysfs_emit_at(buf, *offset,

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1449

*offset += sysfs_emit_at(buf, *offset,

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1455

*offset += sysfs_emit_at(buf, *offset,

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

827

enum smu_clk_type type, char *buf, int *offset)

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

844

*offset += sysfs_emit_at(buf, *offset, "unavailable\n");

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

853

*offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_SCLK");

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

854

*offset += sysfs_emit_at(buf, *offset, "0: %uMhz\n1: %uMhz\n",

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

885

*offset += sysfs_emit_at(buf, *offset, "%s:\n", "OD_MCLK");

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

886

*offset += sysfs_emit_at(buf, *offset, "0: %uMhz\n1: %uMhz\n",

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

956

*offset += sysfs_emit_at(buf, *offset, "%d: %uMhz %s\n", i,

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

972

*offset += sysfs_emit_at(buf, *offset, "%d: %uMhz %s\n",

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3285

int idx, int offset, uint32_t *val)

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3300

param = ((idx & 0xffff) << 16) | (offset & 0xfffc);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3306

int idx, int offset, uint32_t *val, int count)

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3314

ret = __smu_v13_0_6_mca_dump_bank(smu, type, idx, offset + (i << 2), &val[i]);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3769

int idx, int offset, u32 *val)

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3784

param = ((idx & 0xffff) << 16) | (offset & 0xfffc);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3790

int idx, int offset, u32 *val, int count)

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3798

ret = __smu_v13_0_6_aca_bank_dump(smu, type, idx, offset + (i << 2), &val[i]);

sys/dev/pci/drm/amd/pm/swsmu/smu_cmn.h

188

static inline void smu_cmn_get_sysfs_buf(char **buf, int *offset)

sys/dev/pci/drm/amd/pm/swsmu/smu_cmn.h

190

if (!*buf || !offset)

sys/dev/pci/drm/amd/pm/swsmu/smu_cmn.h

193

*offset = offset_in_page(*buf);

sys/dev/pci/drm/amd/pm/swsmu/smu_cmn.h

194

*buf -= *offset;

sys/dev/pci/drm/apple/apldrm.c

142

wdf->offset = 0; /* XXX */

sys/dev/pci/drm/apple/dcp.c

580

u32 addr_idx, disp_idx, offset;

sys/dev/pci/drm/apple/dcp.c

599

offset = ph_args.args[2];

sys/dev/pci/drm/apple/dcp.c

614

if (offset > resource_size(&dcp->disp_bw_scratch_res) - 4) {

sys/dev/pci/drm/apple/dcp.c

621

dcp->disp_bw_scratch_offset = offset;

sys/dev/pci/drm/apple/iomfb.c

175

u16 offset = dcp_packet_start(ch, depth);

sys/dev/pci/drm/apple/iomfb.c

177

void *out = dcp->shmem + dcp_tx_offset(context) + offset;

sys/dev/pci/drm/apple/iomfb.c

186

trace_iomfb_push(dcp, call, context, offset, depth);

sys/dev/pci/drm/apple/iomfb.c

191

ch->end[depth] = offset + ALIGN(data_len, DCP_PACKET_ALIGNMENT);

sys/dev/pci/drm/apple/iomfb.c

194

dcpep_msg(context, data_len, offset));

sys/dev/pci/drm/apple/iomfb.c

258

void *data, u32 length, u16 offset)

sys/dev/pci/drm/apple/iomfb.c

283

ch->end[depth] = offset + ALIGN(length, DCP_PACKET_ALIGNMENT);

sys/dev/pci/drm/apple/iomfb.c

317

u16 offset;

sys/dev/pci/drm/apple/iomfb.c

323

offset = FIELD_GET(IOMFB_MSG_OFFSET, message);

sys/dev/pci/drm/apple/iomfb.c

333

data = dcp->shmem + channel_offset + offset;

sys/dev/pci/drm/apple/iomfb.c

338

dcpep_handle_cb(dcp, ctx_id, data, length, offset);

sys/dev/pci/drm/apple/iomfb.c

70

static inline u64 dcpep_msg(enum dcp_context_id id, u32 length, u16 offset)

sys/dev/pci/drm/apple/iomfb.c

74

FIELD_PREP(IOMFB_MSG_OFFSET, offset) |

sys/dev/pci/drm/apple/iomfb.h

119

u32 offset;

sys/dev/pci/drm/apple/iomfb.h

329

u32 offset;

sys/dev/pci/drm/apple/iomfb_template.c

530

if (req->offset + req->length > dcp->chunks.length) {

sys/dev/pci/drm/apple/iomfb_template.c

535

memcpy(dcp->chunks.data + req->offset, req->data, req->length);

sys/dev/pci/drm/apple/iomfb_template.c

670

u32 offset = dcp->disp_bw_scratch_offset;

sys/dev/pci/drm/apple/iomfb_template.c

672

rt_bw.reg_scratch = dcp->disp_registers[index]->start + offset;

sys/dev/pci/drm/apple/iomfb_template.h

70

u32 offset;

sys/dev/pci/drm/apple/trace.h

229

int offset, int depth),

sys/dev/pci/drm/apple/trace.h

230

TP_ARGS(dcp, method, context, offset, depth),

sys/dev/pci/drm/apple/trace.h

236

__field(int, offset)

sys/dev/pci/drm/apple/trace.h

242

__entry->context = context; __entry->offset = offset;

sys/dev/pci/drm/apple/trace.h

248

__entry->offset, __entry->depth));

sys/dev/pci/drm/display/drm_dp_aux_dev.c

141

static loff_t auxdev_llseek(struct file *file, loff_t offset, int whence)

sys/dev/pci/drm/display/drm_dp_aux_dev.c

143

return fixed_size_llseek(file, offset, whence, AUX_MAX_OFFSET);

sys/dev/pci/drm/display/drm_dp_dual_mode_helper.c

101

memcpy(buffer, tmpbuf + offset, size);

sys/dev/pci/drm/display/drm_dp_dual_mode_helper.c

128

u8 offset, const void *buffer, size_t size)

sys/dev/pci/drm/display/drm_dp_dual_mode_helper.c

145

memcpy(data, &offset, 1);

sys/dev/pci/drm/display/drm_dp_dual_mode_helper.c

64

u8 offset, void *buffer, size_t size)

sys/dev/pci/drm/display/drm_dp_dual_mode_helper.c

85

.len = size + offset,

sys/dev/pci/drm/display/drm_dp_dual_mode_helper.c

91

if (offset) {

sys/dev/pci/drm/display/drm_dp_dual_mode_helper.c

92

tmpbuf = kmalloc(size + offset, GFP_KERNEL);

sys/dev/pci/drm/display/drm_dp_helper.c

2594

static int drm_dp_read_ident(struct drm_dp_aux *aux, unsigned int offset,

sys/dev/pci/drm/display/drm_dp_helper.c

2597

return drm_dp_dpcd_read_data(aux, offset, ident, sizeof(*ident));

sys/dev/pci/drm/display/drm_dp_helper.c

2630

unsigned int offset = is_branch ? DP_BRANCH_OUI : DP_SINK_OUI;

sys/dev/pci/drm/display/drm_dp_helper.c

2633

ret = drm_dp_read_ident(aux, offset, ident);

sys/dev/pci/drm/display/drm_dp_helper.c

2851

int offset;

sys/dev/pci/drm/display/drm_dp_helper.c

2854

for (offset = 0; offset < buf_size; offset += block_size) {

sys/dev/pci/drm/display/drm_dp_helper.c

2856

address + offset,

sys/dev/pci/drm/display/drm_dp_helper.c

2857

&buf[offset], block_size);

sys/dev/pci/drm/display/drm_dp_helper.c

291

unsigned int offset;

sys/dev/pci/drm/display/drm_dp_helper.c

299

offset = DP_128B132B_TRAINING_AUX_RD_INTERVAL;

sys/dev/pci/drm/display/drm_dp_helper.c

306

offset = DP_TRAINING_AUX_RD_INTERVAL;

sys/dev/pci/drm/display/drm_dp_helper.c

315

offset = DP_128B132B_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER(dp_phy);

sys/dev/pci/drm/display/drm_dp_helper.c

322

offset = DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER(dp_phy);

sys/dev/pci/drm/display/drm_dp_helper.c

328

if (offset < DP_RECEIVER_CAP_SIZE) {

sys/dev/pci/drm/display/drm_dp_helper.c

329

rd_interval = dpcd[offset];

sys/dev/pci/drm/display/drm_dp_helper.c

331

if (drm_dp_dpcd_read_byte(aux, offset, &rd_interval) < 0) {

sys/dev/pci/drm/display/drm_dp_helper.c

3969

unsigned int offset = DP_EDP_BACKLIGHT_BRIGHTNESS_MSB;

sys/dev/pci/drm/display/drm_dp_helper.c

3983

offset = DP_EDP_PANEL_TARGET_LUMINANCE_VALUE;

sys/dev/pci/drm/display/drm_dp_helper.c

3992

ret = drm_dp_dpcd_write_data(aux, offset, buf, len);

sys/dev/pci/drm/display/drm_dp_helper.c

557

u8 request, uint offset, void *buffer, int ret)

sys/dev/pci/drm/display/drm_dp_helper.c

563

aux->name, offset, arrow, ret, min(ret, 20), buffer);

sys/dev/pci/drm/display/drm_dp_helper.c

566

aux->name, offset, arrow, ret);

sys/dev/pci/drm/display/drm_dp_helper.c

582

unsigned int offset, void *buffer, size_t size)

sys/dev/pci/drm/display/drm_dp_helper.c

589

msg.address = offset;

sys/dev/pci/drm/display/drm_dp_helper.c

658

int drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset)

sys/dev/pci/drm/display/drm_dp_helper.c

663

ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, &buffer, 1);

sys/dev/pci/drm/display/drm_dp_helper.c

666

drm_dp_dump_access(aux, DP_AUX_NATIVE_READ, offset, &buffer, ret);

sys/dev/pci/drm/display/drm_dp_helper.c

739

ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,

sys/dev/pci/drm/display/drm_dp_helper.c

751

ret = drm_dp_mst_dpcd_read(aux, offset, buffer, size);

sys/dev/pci/drm/display/drm_dp_helper.c

753

ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset,

sys/dev/pci/drm/display/drm_dp_helper.c

756

drm_dp_dump_access(aux, DP_AUX_NATIVE_READ, offset, buffer, ret);

sys/dev/pci/drm/display/drm_dp_helper.c

777

ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,

sys/dev/pci/drm/display/drm_dp_helper.c

783

ret = drm_dp_mst_dpcd_write(aux, offset, buffer, size);

sys/dev/pci/drm/display/drm_dp_helper.c

785

ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset,

sys/dev/pci/drm/display/drm_dp_helper.c

788

drm_dp_dump_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, ret);

sys/dev/pci/drm/display/drm_dp_mst_topology.c

1155

u8 port_num, u32 offset, u8 num_bytes, u8 *bytes)

sys/dev/pci/drm/display/drm_dp_mst_topology.c

1161

req.u.dpcd_write.dpcd_address = offset;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2157

unsigned int offset, void *buffer, size_t size)

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2163

offset, size, buffer);

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2180

unsigned int offset, void *buffer, size_t size)

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2186

offset, size, buffer);

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2729

u8 port_num, u32 offset, u8 num_bytes)

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2735

req.u.dpcd_read.dpcd_address = offset;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2745

int tosend, total, offset;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2750

offset = 0;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2754

ret = drm_dp_dpcd_write_data(mgr->aux, regbase + offset,

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2755

&msg[offset],

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2765

offset += tosend;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

3473

int offset, int size, u8 *bytes)

sys/dev/pci/drm/display/drm_dp_mst_topology.c

3489

build_dpcd_read(txmsg, port->port_num, offset, size);

sys/dev/pci/drm/display/drm_dp_mst_topology.c

3500

mstb, port->port_num, offset, size);

sys/dev/pci/drm/display/drm_dp_mst_topology.c

3524

int offset, int size, u8 *bytes)

sys/dev/pci/drm/display/drm_dp_mst_topology.c

3540

build_dpcd_write(txmsg, port->port_num, offset, size, bytes);

sys/dev/pci/drm/display/drm_dp_mst_topology.c

73

int offset, int size, u8 *bytes);

sys/dev/pci/drm/display/drm_dp_mst_topology.c

76

int offset, int size, u8 *bytes);

sys/dev/pci/drm/display/drm_dp_tunnel.c

206

static int next_reg_area(int *offset)

sys/dev/pci/drm/display/drm_dp_tunnel.c

208

*offset = find_next_bit(dptun_info_regs, 64, *offset);

sys/dev/pci/drm/display/drm_dp_tunnel.c

210

return find_next_zero_bit(dptun_info_regs, 64, *offset + 1) - *offset;

sys/dev/pci/drm/display/drm_dp_tunnel.c

220

int offset = 0;

sys/dev/pci/drm/display/drm_dp_tunnel.c

223

while ((len = next_reg_area(&offset))) {

sys/dev/pci/drm/display/drm_dp_tunnel.c

224

int address = DP_TUNNELING_BASE + offset;

sys/dev/pci/drm/display/drm_dp_tunnel.c

229

offset += len;

sys/dev/pci/drm/display/drm_scdc_helper.c

110

ssize_t drm_scdc_write(struct i2c_adapter *adapter, u8 offset,

sys/dev/pci/drm/display/drm_scdc_helper.c

128

memcpy(data, &offset, sizeof(offset));

sys/dev/pci/drm/display/drm_scdc_helper.c

70

ssize_t drm_scdc_read(struct i2c_adapter *adapter, u8 offset, void *buffer,

sys/dev/pci/drm/display/drm_scdc_helper.c

79

.buf = &offset,

sys/dev/pci/drm/drm_bridge.c

261

void *__devm_drm_bridge_alloc(struct device *dev, size_t size, size_t offset,

sys/dev/pci/drm/drm_bridge.c

280

bridge = container + offset;

sys/dev/pci/drm/drm_buddy.c

31

u64 offset)

sys/dev/pci/drm/drm_buddy.c

311

u64 offset = 0;

sys/dev/pci/drm/drm_buddy.c

369

root = drm_block_alloc(mm, NULL, order, offset);

sys/dev/pci/drm/drm_buddy.c

380

offset += root_size;

sys/dev/pci/drm/drm_buddy.c

441

u64 offset = drm_buddy_block_offset(block);

sys/dev/pci/drm/drm_buddy.c

446

block->left = drm_block_alloc(mm, block, block_order, offset);

sys/dev/pci/drm/drm_buddy.c

45

block->header = offset;

sys/dev/pci/drm/drm_buddy.c

451

offset + (mm->chunk_size << block_order));

sys/dev/pci/drm/drm_client_modeset.c

910

struct drm_client_offset *offset = &offsets[i];

sys/dev/pci/drm/drm_client_modeset.c

918

mode->name, offset->x, offset->y);

sys/dev/pci/drm/drm_client_modeset.c

935

modeset->x = offset->x;

sys/dev/pci/drm/drm_client_modeset.c

936

modeset->y = offset->y;

sys/dev/pci/drm/drm_crtc.c

444

size_t size, size_t offset,

sys/dev/pci/drm/drm_crtc.c

462

crtc = container + offset;

sys/dev/pci/drm/drm_debugfs.c

230

(u64)(uintptr_t)va->gem.obj, va->gem.offset);

sys/dev/pci/drm/drm_drv.c

2098

drmmmap(dev_t kdev, off_t offset, int prot)

sys/dev/pci/drm/drm_drv.c

912

size_t size, size_t offset)

sys/dev/pci/drm/drm_drv.c

924

drm = container + offset;

sys/dev/pci/drm/drm_drv.c

959

size_t size, size_t offset)

sys/dev/pci/drm/drm_drv.c

969

drm = container + offset;

sys/dev/pci/drm/drm_dumb_buffers.c

130

&args->offset);

sys/dev/pci/drm/drm_dumb_buffers.c

133

&args->offset);

sys/dev/pci/drm/drm_edid.c

4864

int modes = 0, offset = 0, i, multi_present = 0, multi_len;

sys/dev/pci/drm/drm_edid.c

4876

offset += hdmi_vsdb_latency_length(db);

sys/dev/pci/drm/drm_edid.c

4880

if (len < (8 + offset + 2))

sys/dev/pci/drm/drm_edid.c

4884

offset++;

sys/dev/pci/drm/drm_edid.c

4885

if (db[8 + offset] & (1 << 7)) {

sys/dev/pci/drm/drm_edid.c

4889

multi_present = (db[8 + offset] & 0x60) >> 5;

sys/dev/pci/drm/drm_edid.c

4892

offset++;

sys/dev/pci/drm/drm_edid.c

4893

vic_len = db[8 + offset] >> 5;

sys/dev/pci/drm/drm_edid.c

4894

hdmi_3d_len = db[8 + offset] & 0x1f;

sys/dev/pci/drm/drm_edid.c

4896

for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {

sys/dev/pci/drm/drm_edid.c

4899

vic = db[9 + offset + i];

sys/dev/pci/drm/drm_edid.c

4902

offset += 1 + vic_len;

sys/dev/pci/drm/drm_edid.c

4911

if (len < (8 + offset + hdmi_3d_len - 1))

sys/dev/pci/drm/drm_edid.c

4919

structure_all = (db[8 + offset] << 8) | db[9 + offset];

sys/dev/pci/drm/drm_edid.c

4923

mask = (db[10 + offset] << 8) | db[11 + offset];

sys/dev/pci/drm/drm_edid.c

4934

offset += multi_len;

sys/dev/pci/drm/drm_edid.c

4942

detail_present = ((db[8 + offset + i] & 0x0f) > 7);

sys/dev/pci/drm/drm_edid.c

4948

vic_index = db[8 + offset + i] >> 4;

sys/dev/pci/drm/drm_edid.c

4951

switch (db[8 + offset + i] & 0x0f) {

sys/dev/pci/drm/drm_edid.c

4960

if ((db[9 + offset + i] >> 4) == 1)

sys/dev/pci/drm/drm_encoder.c

244

void *__drmm_encoder_alloc(struct drm_device *dev, size_t size, size_t offset,

sys/dev/pci/drm/drm_encoder.c

257

encoder = container + offset;

sys/dev/pci/drm/drm_fb_helper.c

1147

var_1->red.offset == var_2->red.offset &&

sys/dev/pci/drm/drm_fb_helper.c

1150

var_1->green.offset == var_2->green.offset &&

sys/dev/pci/drm/drm_fb_helper.c

1153

var_1->blue.offset == var_2->blue.offset &&

sys/dev/pci/drm/drm_fb_helper.c

1156

var_1->transp.offset == var_2->transp.offset &&

sys/dev/pci/drm/drm_fb_helper.c

1167

var->red.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1168

var->green.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1169

var->blue.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1173

var->transp.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1180

var->red.offset = 10;

sys/dev/pci/drm/drm_fb_helper.c

1181

var->green.offset = 5;

sys/dev/pci/drm/drm_fb_helper.c

1182

var->blue.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1186

var->transp.offset = 15;

sys/dev/pci/drm/drm_fb_helper.c

1190

var->red.offset = 11;

sys/dev/pci/drm/drm_fb_helper.c

1191

var->green.offset = 5;

sys/dev/pci/drm/drm_fb_helper.c

1192

var->blue.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1196

var->transp.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1199

var->red.offset = 16;

sys/dev/pci/drm/drm_fb_helper.c

1200

var->green.offset = 8;

sys/dev/pci/drm/drm_fb_helper.c

1201

var->blue.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1205

var->transp.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1209

var->red.offset = 16;

sys/dev/pci/drm/drm_fb_helper.c

1210

var->green.offset = 8;

sys/dev/pci/drm/drm_fb_helper.c

1211

var->blue.offset = 0;

sys/dev/pci/drm/drm_fb_helper.c

1215

var->transp.offset = 24;

sys/dev/pci/drm/drm_fb_helper.c

1320

if (!var->red.offset && !var->green.offset &&

sys/dev/pci/drm/drm_fb_helper.c

1321

!var->blue.offset && !var->transp.offset &&

sys/dev/pci/drm/drm_fb_helper.c

734

start = pageref->offset;

sys/dev/pci/drm/drm_fb_helper.c

851

value = (red << info->var.red.offset) |

sys/dev/pci/drm/drm_fb_helper.c

852

(green << info->var.green.offset) |

sys/dev/pci/drm/drm_fb_helper.c

853

(blue << info->var.blue.offset);

sys/dev/pci/drm/drm_fb_helper.c

857

mask <<= info->var.transp.offset;

sys/dev/pci/drm/drm_fbdev_dma.c

131

size_t offset = clip->y1 * fb->pitches[0];

sys/dev/pci/drm/drm_fbdev_dma.c

138

offset += clip->x1 / 8;

sys/dev/pci/drm/drm_fbdev_dma.c

142

offset += clip->x1 / 4;

sys/dev/pci/drm/drm_fbdev_dma.c

146

offset += clip->x1 / 2;

sys/dev/pci/drm/drm_fbdev_dma.c

150

offset += clip->x1 * fb->format->cpp[0];

sys/dev/pci/drm/drm_fbdev_dma.c

155

src = fb_helper->info->screen_buffer + offset;

sys/dev/pci/drm/drm_fbdev_dma.c

156

iosys_map_incr(dst, offset); /* go to first pixel within clip rect */

sys/dev/pci/drm/drm_fbdev_shmem.c

83

static struct page *drm_fbdev_shmem_get_page(struct fb_info *info, unsigned long offset)

sys/dev/pci/drm/drm_fbdev_shmem.c

89

unsigned int i = offset >> PAGE_SHIFT;

sys/dev/pci/drm/drm_fbdev_shmem.c

92

if (fb_WARN_ON_ONCE(info, offset > obj->size))

sys/dev/pci/drm/drm_fbdev_ttm.c

104

src = fb_helper->info->screen_buffer + offset;

sys/dev/pci/drm/drm_fbdev_ttm.c

105

iosys_map_incr(dst, offset); /* go to first pixel within clip rect */

sys/dev/pci/drm/drm_fbdev_ttm.c

80

size_t offset = clip->y1 * fb->pitches[0];

sys/dev/pci/drm/drm_fbdev_ttm.c

87

offset += clip->x1 / 8;

sys/dev/pci/drm/drm_fbdev_ttm.c

91

offset += clip->x1 / 4;

sys/dev/pci/drm/drm_fbdev_ttm.c

95

offset += clip->x1 / 2;

sys/dev/pci/drm/drm_fbdev_ttm.c

99

offset += clip->x1 * fb->format->cpp[0];

sys/dev/pci/drm/drm_file.c

571

size_t count, loff_t *offset)

sys/dev/pci/drm/drm_gem.c

134

ret = dev->driver->gem_fault(obj, ufi, entry->offset + (vaddr -

sys/dev/pci/drm/drm_gem.c

581

u32 handle, u64 *offset)

sys/dev/pci/drm/drm_gem.c

600

*offset = drm_vma_node_offset_addr(&obj->vma_node);

sys/dev/pci/drm/drm_gem_dma_helper.c

187

off_t offset, vaddr_t vaddr, vm_page_t *pps, int npages, int centeridx,

sys/dev/pci/drm/drm_gem_dma_helper.c

196

offset -= drm_vma_node_offset_addr(&obj->base.vma_node);

sys/dev/pci/drm/drm_gem_dma_helper.c

200

for (lcv = 0; lcv < npages; lcv++, offset += PAGE_SIZE,

sys/dev/pci/drm/drm_gem_dma_helper.c

209

offset, access_type, BUS_DMA_NOCACHE);

sys/dev/pci/drm/drm_gpuvm.c

2136

op.map.gem.offset = req->map.gem.offset;

sys/dev/pci/drm/drm_gpuvm.c

2184

u64 req_offset = req->map.gem.offset;

sys/dev/pci/drm/drm_gpuvm.c

2195

u64 offset = va->gem.offset;

sys/dev/pci/drm/drm_gpuvm.c

2206

offset == req_offset;

sys/dev/pci/drm/drm_gpuvm.c

2227

.gem.offset = offset + req_range,

sys/dev/pci/drm/drm_gpuvm.c

2248

.gem.offset = offset,

sys/dev/pci/drm/drm_gpuvm.c

2253

offset + ls_range == req_offset;

sys/dev/pci/drm/drm_gpuvm.c

2290

.gem.offset = offset + ls_range +

sys/dev/pci/drm/drm_gpuvm.c

2304

offset == req_offset +

sys/dev/pci/drm/drm_gpuvm.c

2328

.gem.offset = offset + req_end - addr,

sys/dev/pci/drm/drm_gpuvm.c

2370

u64 offset = va->gem.offset;

sys/dev/pci/drm/drm_gpuvm.c

2379

prev.gem.offset = offset;

sys/dev/pci/drm/drm_gpuvm.c

2388

next.gem.offset = offset + (req_end - addr);

sys/dev/pci/drm/drm_linux.c

2624

dmabuf_seek(struct file *fp, off_t *offset, int whence, struct proc *p)

sys/dev/pci/drm/drm_linux.c

2629

if (*offset != 0)

sys/dev/pci/drm/drm_linux.c

2645

*offset = newoff;

sys/dev/pci/drm/drm_linux.c

2989

uint32_t offset, capid;

sys/dev/pci/drm/drm_linux.c

2993

offset = PCI_PCIE_ECAP;

sys/dev/pci/drm/drm_linux.c

2997

reg = pci_conf_read(pdev->pc, pdev->tag, offset);

sys/dev/pci/drm/drm_linux.c

3001

offset = PCI_PCIE_ECAP_NEXT(reg);

sys/dev/pci/drm/drm_linux.c

3009

reg = pci_conf_read(pdev->pc, pdev->tag, offset + RBCAP0);

sys/dev/pci/drm/drm_linux.c

3016

reg = pci_conf_read(pdev->pc, pdev->tag, offset + RBCTRL0);

sys/dev/pci/drm/drm_linux.c

3025

pci_conf_write(pdev->pc, pdev->tag, offset + RBCTRL0, reg);

sys/dev/pci/drm/drm_linux.c

3214

syncfile_seek(struct file *fp, off_t *offset, int whence, struct proc *p)

sys/dev/pci/drm/drm_linux.c

3218

if (*offset != 0)

sys/dev/pci/drm/drm_linux.c

3234

*offset = newoff;

sys/dev/pci/drm/drm_mtrr.c

44

drm_mtrr_add(unsigned long offset, size_t size, int flags)

sys/dev/pci/drm/drm_mtrr.c

50

mrdesc.mr_base = offset;

sys/dev/pci/drm/drm_mtrr.c

62

drm_mtrr_del(int handle, unsigned long offset, size_t size, int flags)

sys/dev/pci/drm/drm_mtrr.c

68

mrdesc.mr_base = offset;

sys/dev/pci/drm/drm_panel.c

403

void *__devm_drm_panel_alloc(struct device *dev, size_t size, size_t offset,

sys/dev/pci/drm/drm_panel.c

420

panel = container + offset;

sys/dev/pci/drm/drm_panic.c

159

static void drm_panic_write_pixel16(void *vaddr, unsigned int offset, u16 color)

sys/dev/pci/drm/drm_panic.c

161

u16 *p = vaddr + offset;

sys/dev/pci/drm/drm_panic.c

166

static void drm_panic_write_pixel24(void *vaddr, unsigned int offset, u32 color)

sys/dev/pci/drm/drm_panic.c

168

u8 *p = vaddr + offset;

sys/dev/pci/drm/drm_panic.c

181

unsigned int offset, u32 color)

sys/dev/pci/drm/drm_panic.c

184

u8 *p = vaddr + offset;

sys/dev/pci/drm/drm_panic.c

191

if (offset == PAGE_SIZE - 1)

sys/dev/pci/drm/drm_panic.c

197

if (offset == PAGE_SIZE - 2)

sys/dev/pci/drm/drm_panic.c

204

static void drm_panic_write_pixel32(void *vaddr, unsigned int offset, u32 color)

sys/dev/pci/drm/drm_panic.c

206

u32 *p = vaddr + offset;

sys/dev/pci/drm/drm_panic.c

211

static void drm_panic_write_pixel(void *vaddr, unsigned int offset, u32 color, unsigned int cpp)

sys/dev/pci/drm/drm_panic.c

215

drm_panic_write_pixel16(vaddr, offset, color);

sys/dev/pci/drm/drm_panic.c

218

drm_panic_write_pixel24(vaddr, offset, color);

sys/dev/pci/drm/drm_panic.c

221

drm_panic_write_pixel32(vaddr, offset, color);

sys/dev/pci/drm/drm_panic.c

248

unsigned int offset;

sys/dev/pci/drm/drm_panic.c

250

offset = (y + clip->y1) * dpitch + (x + clip->x1) * cpp;

sys/dev/pci/drm/drm_panic.c

251

new_page = offset >> PAGE_SHIFT;

sys/dev/pci/drm/drm_panic.c

252

offset = offset % PAGE_SIZE;

sys/dev/pci/drm/drm_panic.c

265

if (cpp == 3 && offset + 3 > PAGE_SIZE)

sys/dev/pci/drm/drm_panic.c

267

offset, fg32);

sys/dev/pci/drm/drm_panic.c

269

drm_panic_write_pixel(vaddr, offset, fg32, cpp);

sys/dev/pci/drm/drm_panic.c

347

unsigned int offset;

sys/dev/pci/drm/drm_panic.c

349

offset = y * dpitch + x * cpp;

sys/dev/pci/drm/drm_panic.c

350

new_page = offset >> PAGE_SHIFT;

sys/dev/pci/drm/drm_panic.c

351

offset = offset % PAGE_SIZE;

sys/dev/pci/drm/drm_panic.c

362

if (cpp == 3 && offset + 3 > PAGE_SIZE)

sys/dev/pci/drm/drm_panic.c

364

offset, color);

sys/dev/pci/drm/drm_panic.c

366

drm_panic_write_pixel(vaddr, offset, color, cpp);

sys/dev/pci/drm/drm_plane.c

254

mod->offset = 0;

sys/dev/pci/drm/drm_plane.c

565

size_t offset, uint32_t possible_crtcs,

sys/dev/pci/drm/drm_plane.c

584

plane = container + offset;

sys/dev/pci/drm/drm_plane.c

604

size_t offset, uint32_t possible_crtcs,

sys/dev/pci/drm/drm_plane.c

623

plane = container + offset;

sys/dev/pci/drm/drm_print.c

102

copy = len - (iterator->start - iterator->offset);

sys/dev/pci/drm/drm_print.c

110

str + (iterator->start - iterator->offset), copy);

sys/dev/pci/drm/drm_print.c

112

iterator->offset = iterator->start + copy;

sys/dev/pci/drm/drm_print.c

115

ssize_t pos = iterator->offset - iterator->start;

sys/dev/pci/drm/drm_print.c

122

iterator->offset += len;

sys/dev/pci/drm/drm_print.c

141

if (iterator->offset + len <= iterator->start) {

sys/dev/pci/drm/drm_print.c

142

iterator->offset += len;

sys/dev/pci/drm/drm_print.c

147

if ((iterator->offset >= iterator->start) && (len < iterator->remain)) {

sys/dev/pci/drm/drm_print.c

148

ssize_t pos = iterator->offset - iterator->start;

sys/dev/pci/drm/drm_print.c

154

iterator->offset += len;

sys/dev/pci/drm/drm_print.c

474

readl(regset->base + regset->regs[i].offset));

sys/dev/pci/drm/drm_print.c

92

if (iterator->offset < iterator->start) {

sys/dev/pci/drm/drm_print.c

97

if (iterator->offset + len <= iterator->start) {

sys/dev/pci/drm/drm_print.c

98

iterator->offset += len;

sys/dev/pci/drm/drm_vma_manager.c

147

unsigned long offset;

sys/dev/pci/drm/drm_vma_manager.c

154

offset = node->start;

sys/dev/pci/drm/drm_vma_manager.c

155

if (start >= offset) {

sys/dev/pci/drm/drm_vma_manager.c

158

if (start == offset)

sys/dev/pci/drm/drm_vma_manager.c

167

offset = best->start + best->size;

sys/dev/pci/drm/drm_vma_manager.c

168

if (offset < start + pages)

sys/dev/pci/drm/i915/display/dvo_ns2501.c

195

u8 offset;

sys/dev/pci/drm/i915/display/dvo_ns2501.c

301

[0] = { .offset = 0x0a, .value = 0x81, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

303

[1] = { .offset = 0x12, .value = 0x02, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

304

[2] = { .offset = 0x18, .value = 0x07, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

305

[3] = { .offset = 0x19, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

306

[4] = { .offset = 0x1a, .value = 0x00, }, /* PLL?, ignored */

sys/dev/pci/drm/i915/display/dvo_ns2501.c

308

[5] = { .offset = 0x1e, .value = 0x02, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

309

[6] = { .offset = 0x1f, .value = 0x40, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

310

[7] = { .offset = 0x20, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

311

[8] = { .offset = 0x21, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

312

[9] = { .offset = 0x22, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

313

[10] = { .offset = 0x23, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

314

[11] = { .offset = 0x24, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

315

[12] = { .offset = 0x25, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

316

[13] = { .offset = 0x26, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

317

[14] = { .offset = 0x27, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

318

[15] = { .offset = 0x7e, .value = 0x18, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

320

[16] = { .offset = 0x84, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

321

[17] = { .offset = 0x85, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

322

[18] = { .offset = 0x86, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

323

[19] = { .offset = 0x87, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

324

[20] = { .offset = 0x88, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

325

[21] = { .offset = 0x89, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

326

[22] = { .offset = 0x8a, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

327

[23] = { .offset = 0x8b, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

328

[24] = { .offset = 0x8c, .value = 0x10, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

329

[25] = { .offset = 0x8d, .value = 0x02, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

331

[26] = { .offset = 0x90, .value = 0xff, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

332

[27] = { .offset = 0x91, .value = 0x07, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

333

[28] = { .offset = 0x92, .value = 0xa0, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

334

[29] = { .offset = 0x93, .value = 0x02, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

335

[30] = { .offset = 0x94, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

336

[31] = { .offset = 0x95, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

337

[32] = { .offset = 0x96, .value = 0x05, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

338

[33] = { .offset = 0x97, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

340

[34] = { .offset = 0x9a, .value = 0x88, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

341

[35] = { .offset = 0x9b, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

343

[36] = { .offset = 0x9e, .value = 0x25, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

344

[37] = { .offset = 0x9f, .value = 0x03, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

345

[38] = { .offset = 0xa0, .value = 0x28, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

346

[39] = { .offset = 0xa1, .value = 0x01, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

347

[40] = { .offset = 0xa2, .value = 0x28, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

348

[41] = { .offset = 0xa3, .value = 0x05, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

350

[42] = { .offset = 0xa4, .value = 0x84, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

351

[43] = { .offset = 0xa5, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

352

[44] = { .offset = 0xa6, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

353

[45] = { .offset = 0xa7, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

354

[46] = { .offset = 0xa8, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

356

[47] = { .offset = 0xa9, .value = 0x04, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

357

[48] = { .offset = 0xaa, .value = 0x70, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

358

[49] = { .offset = 0xab, .value = 0x4f, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

359

[50] = { .offset = 0xac, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

360

[51] = { .offset = 0xad, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

361

[52] = { .offset = 0xb6, .value = 0x09, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

362

[53] = { .offset = 0xb7, .value = 0x03, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

364

[54] = { .offset = 0xba, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

365

[55] = { .offset = 0xbb, .value = 0x20, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

366

[56] = { .offset = 0xf3, .value = 0x90, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

367

[57] = { .offset = 0xf4, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

368

[58] = { .offset = 0xf7, .value = 0x88, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

370

[59] = { .offset = 0xf8, .value = 0x0a, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

371

[60] = { .offset = 0xf9, .value = 0x00, }

sys/dev/pci/drm/i915/display/dvo_ns2501.c

375

[0] = { .offset = 0x35, .value = 0xff, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

376

[1] = { .offset = 0x34, .value = 0x00, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

377

[2] = { .offset = 0x08, .value = 0x30, },

sys/dev/pci/drm/i915/display/dvo_ns2501.c

602

ns2501_writeb(dvo, regs_init[i].offset, regs_init[i].value);

sys/dev/pci/drm/i915/display/dvo_ns2501.c

606

ns2501_writeb(dvo, mode_agnostic_values[i].offset,

sys/dev/pci/drm/i915/display/i9xx_plane.c

1170

u32 val, base, offset;

sys/dev/pci/drm/i915/display/i9xx_plane.c

1212

offset = intel_de_read(display,

sys/dev/pci/drm/i915/display/i9xx_plane.c

1217

offset = intel_de_read(display,

sys/dev/pci/drm/i915/display/i9xx_plane.c

1220

offset = intel_de_read(display,

sys/dev/pci/drm/i915/display/i9xx_plane.c

1224

offset = 0;

sys/dev/pci/drm/i915/display/i9xx_plane.c

1229

drm_WARN_ON(display->drm, offset != 0);

sys/dev/pci/drm/i915/display/i9xx_plane.c

235

u32 offset;

sys/dev/pci/drm/i915/display/i9xx_plane.c

260

offset = intel_plane_compute_aligned_offset(&src_x, &src_y,

sys/dev/pci/drm/i915/display/i9xx_plane.c

263

offset = 0;

sys/dev/pci/drm/i915/display/i9xx_plane.c

281

if (offset == 0) {

sys/dev/pci/drm/i915/display/i9xx_plane.c

288

offset = intel_plane_adjust_aligned_offset(&src_x, &src_y, plane_state, 0,

sys/dev/pci/drm/i915/display/i9xx_plane.c

289

offset, offset - alignment);

sys/dev/pci/drm/i915/display/i9xx_plane.c

321

plane_state->view.color_plane[0].offset = offset;

sys/dev/pci/drm/i915/display/i9xx_plane.c

372

return plane_state->view.color_plane[0].offset;

sys/dev/pci/drm/i915/display/intel_bios.c

218

size = max(size, ptrs->panel_name.offset +

sys/dev/pci/drm/i915/display/intel_bios.c

260

lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;

sys/dev/pci/drm/i915/display/intel_bios.c

271

if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||

sys/dev/pci/drm/i915/display/intel_bios.c

272

ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||

sys/dev/pci/drm/i915/display/intel_bios.c

273

ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)

sys/dev/pci/drm/i915/display/intel_bios.c

289

if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||

sys/dev/pci/drm/i915/display/intel_bios.c

290

ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||

sys/dev/pci/drm/i915/display/intel_bios.c

291

ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)

sys/dev/pci/drm/i915/display/intel_bios.c

296

if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||

sys/dev/pci/drm/i915/display/intel_bios.c

297

ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||

sys/dev/pci/drm/i915/display/intel_bios.c

298

ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)

sys/dev/pci/drm/i915/display/intel_bios.c

302

if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)

sys/dev/pci/drm/i915/display/intel_bios.c

307

const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +

sys/dev/pci/drm/i915/display/intel_bios.c

3100

loff_t offset;

sys/dev/pci/drm/i915/display/intel_bios.c

3108

offset = intel_rom_find(rom, *(const u32 *)vbt_signature);

sys/dev/pci/drm/i915/display/intel_bios.c

3109

if (offset < 0)

sys/dev/pci/drm/i915/display/intel_bios.c

3112

if (sizeof(struct vbt_header) > intel_rom_size(rom) - offset) {

sys/dev/pci/drm/i915/display/intel_bios.c

3119

vbt_size = intel_rom_read16(rom, offset + offsetof(struct vbt_header, vbt_size));

sys/dev/pci/drm/i915/display/intel_bios.c

3120

if (vbt_size > intel_rom_size(rom) - offset) {

sys/dev/pci/drm/i915/display/intel_bios.c

3129

intel_rom_read_block(rom, vbt, offset, vbt_size);

sys/dev/pci/drm/i915/display/intel_bios.c

321

u32 offset;

sys/dev/pci/drm/i915/display/intel_bios.c

324

offset = raw_block_offset(bdb, BDB_LFP_DATA);

sys/dev/pci/drm/i915/display/intel_bios.c

327

if (ptrs->ptr[i].fp_timing.offset < offset ||

sys/dev/pci/drm/i915/display/intel_bios.c

328

ptrs->ptr[i].dvo_timing.offset < offset ||

sys/dev/pci/drm/i915/display/intel_bios.c

329

ptrs->ptr[i].panel_pnp_id.offset < offset)

sys/dev/pci/drm/i915/display/intel_bios.c

332

ptrs->ptr[i].fp_timing.offset -= offset;

sys/dev/pci/drm/i915/display/intel_bios.c

333

ptrs->ptr[i].dvo_timing.offset -= offset;

sys/dev/pci/drm/i915/display/intel_bios.c

334

ptrs->ptr[i].panel_pnp_id.offset -= offset;

sys/dev/pci/drm/i915/display/intel_bios.c

338

if (ptrs->panel_name.offset < offset)

sys/dev/pci/drm/i915/display/intel_bios.c

341

ptrs->panel_name.offset -= offset;

sys/dev/pci/drm/i915/display/intel_bios.c

354

table->offset = total_size - table_size;

sys/dev/pci/drm/i915/display/intel_bios.c

364

next->offset = prev->offset + size;

sys/dev/pci/drm/i915/display/intel_bios.c

370

int i, size, table_size, block_size, offset, fp_timing_size;

sys/dev/pci/drm/i915/display/intel_bios.c

440

ptrs->panel_name.offset = size * 16;

sys/dev/pci/drm/i915/display/intel_bios.c

443

offset = block - bdb;

sys/dev/pci/drm/i915/display/intel_bios.c

446

ptrs->ptr[i].fp_timing.offset += offset;

sys/dev/pci/drm/i915/display/intel_bios.c

447

ptrs->ptr[i].dvo_timing.offset += offset;

sys/dev/pci/drm/i915/display/intel_bios.c

448

ptrs->ptr[i].panel_pnp_id.offset += offset;

sys/dev/pci/drm/i915/display/intel_bios.c

452

ptrs->panel_name.offset += offset;

sys/dev/pci/drm/i915/display/intel_bios.c

595

return (const void *)data + ptrs->ptr[index].dvo_timing.offset;

sys/dev/pci/drm/i915/display/intel_bios.c

603

return (const void *)data + ptrs->ptr[index].fp_timing.offset;

sys/dev/pci/drm/i915/display/intel_bios.c

614

return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;

sys/dev/pci/drm/i915/display/intel_bios.c

622

return (const void *)data + ptrs->panel_name.offset;

sys/dev/pci/drm/i915/display/intel_bo.c

44

int intel_bo_read_from_page(struct drm_gem_object *obj, u64 offset, void *dst, int size)

sys/dev/pci/drm/i915/display/intel_bo.c

46

return i915_gem_object_read_from_page(to_intel_bo(obj), offset, dst, size);

sys/dev/pci/drm/i915/display/intel_bo.h

21

int intel_bo_read_from_page(struct drm_gem_object *obj, u64 offset, void *dst, int size);

sys/dev/pci/drm/i915/display/intel_cursor.c

104

offset = intel_plane_compute_aligned_offset(&src_x, &src_y,

sys/dev/pci/drm/i915/display/intel_cursor.c

127

offset += (src_h * src_w - 1) * fb->format->cpp[0];

sys/dev/pci/drm/i915/display/intel_cursor.c

130

plane_state->view.color_plane[0].offset = offset;

sys/dev/pci/drm/i915/display/intel_cursor.c

38

return plane_state->view.color_plane[0].offset;

sys/dev/pci/drm/i915/display/intel_cursor.c

90

u32 offset;

sys/dev/pci/drm/i915/display/intel_display.c

723

plane_state->view.color_plane[0].offset, 0);

sys/dev/pci/drm/i915/display/intel_display_types.h

124

u32 offset;

sys/dev/pci/drm/i915/display/intel_dmc.c

1252

u32 r, offset;

sys/dev/pci/drm/i915/display/intel_dmc.c

1277

offset = readcount + dmc->dmc_info[dmc_id].dmc_offset * 4;

sys/dev/pci/drm/i915/display/intel_dmc.c

1278

if (offset > fw->size) {

sys/dev/pci/drm/i915/display/intel_dmc.c

1283

dmc_header = (struct intel_dmc_header_base *)&fw->data[offset];

sys/dev/pci/drm/i915/display/intel_dmc.c

1284

parse_dmc_fw_header(dmc, dmc_header, fw->size - offset, dmc_id);

sys/dev/pci/drm/i915/display/intel_dmc.c

311

u32 offset;

sys/dev/pci/drm/i915/display/intel_dmc.c

527

u32 offset = i915_mmio_reg_offset(reg);

sys/dev/pci/drm/i915/display/intel_dmc.c

531

return offset >= start && offset < end;

sys/dev/pci/drm/i915/display/intel_dmc.c

537

u32 offset = i915_mmio_reg_offset(reg);

sys/dev/pci/drm/i915/display/intel_dmc.c

541

return offset >= start && offset < end;

sys/dev/pci/drm/i915/display/intel_dmc.c

984

dmc->dmc_info[dmc_id].dmc_offset = fw_info[i].offset;

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

231

u32 offset = i915_mmio_reg_offset(reg);

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

236

if (ranges[i].start <= offset && offset <= end)

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

298

u32 offset;

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

456

unsigned int offset;

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

467

offset = hdcp2_msg_data->offset;

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

478

offset, (void *)byte, len);

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

484

offset += ret;

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

523

unsigned int offset;

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

534

offset = hdcp2_msg_data->offset;

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

554

offset += HDCP_2_2_RXINFO_LEN;

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

569

ret = drm_dp_dpcd_read(aux, offset,

sys/dev/pci/drm/i915/display/intel_dp_hdcp.c

579

offset += ret;

sys/dev/pci/drm/i915/display/intel_dpt.c

43

u64 offset,

sys/dev/pci/drm/i915/display/intel_dpt.c

50

gen8_set_pte(base + offset / I915_GTT_PAGE_SIZE,

sys/dev/pci/drm/i915/display/intel_dsb.c

882

u32 offset = intel_dsb_buffer_ggtt_offset(&dsb->dsb_buf);

sys/dev/pci/drm/i915/display/intel_dsb.c

890

intel_de_read_fw(display, DSB_CURRENT_HEAD(pipe, dsb->id)) - offset,

sys/dev/pci/drm/i915/display/intel_dsb.c

891

intel_de_read_fw(display, DSB_HEAD(pipe, dsb->id)) - offset,

sys/dev/pci/drm/i915/display/intel_dsb.c

892

intel_de_read_fw(display, DSB_TAIL(pipe, dsb->id)) - offset);

sys/dev/pci/drm/i915/display/intel_fb.c

1089

u32 offset, offset_aligned;

sys/dev/pci/drm/i915/display/intel_fb.c

1111

offset = (tile_rows * pitch_tiles + tiles) * tile_size;

sys/dev/pci/drm/i915/display/intel_fb.c

1113

offset_aligned = offset;

sys/dev/pci/drm/i915/display/intel_fb.c

1119

offset, offset_aligned);

sys/dev/pci/drm/i915/display/intel_fb.c

1121

offset = *y * pitch + *x * cpp;

sys/dev/pci/drm/i915/display/intel_fb.c

1122

offset_aligned = offset;

sys/dev/pci/drm/i915/display/intel_fb.c

1125

*y = (offset % alignment) / pitch;

sys/dev/pci/drm/i915/display/intel_fb.c

1126

*x = ((offset % alignment) - *y * pitch) / cpp;

sys/dev/pci/drm/i915/display/intel_fb.c

1381

u32 offset;

sys/dev/pci/drm/i915/display/intel_fb.c

1383

offset = intel_compute_aligned_offset(display, x, y, &fb->base, color_plane,

sys/dev/pci/drm/i915/display/intel_fb.c

1388

return offset / tile_size;

sys/dev/pci/drm/i915/display/intel_fb.c

1501

assign_bfld_chk_ovf(display, remap_info->offset, obj_offset);

sys/dev/pci/drm/i915/display/intel_fb.c

1727

u32 offset;

sys/dev/pci/drm/i915/display/intel_fb.c

1775

offset = calc_plane_aligned_offset(fb, i, &x, &y);

sys/dev/pci/drm/i915/display/intel_fb.c

1779

offset, gtt_offset_rotated, x, y,

sys/dev/pci/drm/i915/display/intel_fb.c

1784

offset, gtt_offset_remapped, x, y,

sys/dev/pci/drm/i915/display/intel_fb.c

1789

max_size = max(max_size, offset + size);

sys/dev/pci/drm/i915/display/intel_fb.c

1874

u32 offset;

sys/dev/pci/drm/i915/display/intel_fb.c

1890

offset = calc_plane_aligned_offset(intel_fb, i, &x, &y);

sys/dev/pci/drm/i915/display/intel_fb.c

1893

offset, gtt_offset, x, y,

sys/dev/pci/drm/i915/display/intel_hdmi.c

1300

unsigned int offset, void *buffer, size_t size)

sys/dev/pci/drm/i915/display/intel_hdmi.c

1305

u8 start = offset & 0xff;

sys/dev/pci/drm/i915/display/intel_hdmi.c

1327

unsigned int offset, void *buffer, size_t size)

sys/dev/pci/drm/i915/display/intel_hdmi.c

1339

write_buf[0] = offset & 0xff;

sys/dev/pci/drm/i915/display/intel_hdmi.c

1711

unsigned int offset;

sys/dev/pci/drm/i915/display/intel_hdmi.c

1713

offset = HDCP_2_2_HDMI_REG_WR_MSG_OFFSET;

sys/dev/pci/drm/i915/display/intel_hdmi.c

1714

return intel_hdmi_hdcp_write(dig_port, offset, buf, size);

sys/dev/pci/drm/i915/display/intel_hdmi.c

1725

unsigned int offset;

sys/dev/pci/drm/i915/display/intel_hdmi.c

1744

offset = HDCP_2_2_HDMI_REG_RD_MSG_OFFSET;

sys/dev/pci/drm/i915/display/intel_hdmi.c

1745

ret = intel_hdmi_hdcp_read(dig_port, offset, buf, ret);

sys/dev/pci/drm/i915/display/intel_overlay.c

562

static u32 calc_swidthsw(struct intel_display *display, u32 offset, u32 width)

sys/dev/pci/drm/i915/display/intel_overlay.c

567

sw = ALIGN((offset & 31) + width, 32);

sys/dev/pci/drm/i915/display/intel_overlay.c

569

sw = ALIGN((offset & 63) + width, 64);

sys/dev/pci/drm/i915/display/intel_plane.c

1290

u32 offset;

sys/dev/pci/drm/i915/display/intel_plane.c

1295

offset = ((y / YTILE_HEIGHT) * width_in_blocks + (x / YTILE_WIDTH)) * YTILE_SIZE;

sys/dev/pci/drm/i915/display/intel_plane.c

1302

offset += swizzle * 4;

sys/dev/pci/drm/i915/display/intel_plane.c

1303

return offset;

sys/dev/pci/drm/i915/display/intel_plane.c

1308

u32 offset;

sys/dev/pci/drm/i915/display/intel_plane.c

1313

offset = ((y / YTILE_HEIGHT) * width_in_blocks + (x / YTILE_WIDTH)) * YTILE_SIZE;

sys/dev/pci/drm/i915/display/intel_plane.c

1321

offset += swizzle * 4;

sys/dev/pci/drm/i915/display/intel_plane.c

1322

return offset;

sys/dev/pci/drm/i915/display/intel_psr.c

3593

unsigned int offset;

sys/dev/pci/drm/i915/display/intel_psr.c

3595

offset = intel_dp->psr.panel_replay_enabled ?

sys/dev/pci/drm/i915/display/intel_psr.c

3598

ret = drm_dp_dpcd_readb(aux, offset, status);

sys/dev/pci/drm/i915/display/intel_psr.c

3602

offset = intel_dp->psr.panel_replay_enabled ?

sys/dev/pci/drm/i915/display/intel_psr.c

3605

ret = drm_dp_dpcd_readb(aux, offset, error_status);

sys/dev/pci/drm/i915/display/intel_vbt_defs.h

1225

u16 offset; /* offsets are from start of bdb */

sys/dev/pci/drm/i915/display/intel_vdsc_regs.h

139

#define DSC_PPS6_FIRST_LINE_BPG_OFFSET(offset) REG_FIELD_PREP(DSC_PPS6_FIRST_LINE_BPG_OFFSET_MASK, \

sys/dev/pci/drm/i915/display/intel_vdsc_regs.h

140

offset)

sys/dev/pci/drm/i915/display/intel_vdsc_regs.h

191

#define DSC_PPS17_SL_BPG_OFFSET(offset) REG_FIELD_PREP(DSC_PPS17_SL_BPG_OFFSET_MASK, offset)

sys/dev/pci/drm/i915/display/intel_vdsc_regs.h

196

#define DSC_PPS18_NSL_BPG_OFFSET(offset) REG_FIELD_PREP(DSC_PPS18_NSL_BPG_OFFSET_MASK, offset)

sys/dev/pci/drm/i915/display/intel_vdsc_regs.h

197

#define DSC_PPS18_SL_OFFSET_ADJ(offset) REG_FIELD_PREP(DSC_PPS18_SL_OFFSET_ADJ_MASK, offset)

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1271

u32 offset = plane_state->view.color_plane[color_plane].offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1274

drm_WARN_ON(display->drm, offset & 0x1fffff);

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1275

return offset >> 9;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1277

drm_WARN_ON(display->drm, offset & 0xfff);

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1278

return offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1918

u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1947

plane_state->view.color_plane[ccs_plane].offset = aux_offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1956

int *x, int *y, u32 *offset)

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1962

u32 aux_offset = plane_state->view.color_plane[aux_plane].offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1967

*offset = intel_plane_compute_aligned_offset(x, y, plane_state, 0);

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1976

if (aux_plane && *offset > aux_offset)

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1977

*offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1978

*offset,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1991

if (*offset == 0) {

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1998

*offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

1999

*offset,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2000

*offset - alignment);

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2022

u32 offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2033

ret = skl_calc_main_surface_offset(plane_state, &x, &y, &offset);

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2044

offset, aux_plane)) {

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2045

if (offset == 0)

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2048

offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2049

offset, offset - alignment);

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2066

plane_state->view.color_plane[0].offset = offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2095

u32 offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2107

offset = intel_plane_compute_aligned_offset(&x, &y,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2111

u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2114

if (offset > aux_offset)

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2115

offset = intel_plane_adjust_aligned_offset(&x, &y,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2118

offset,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2122

offset, ccs_plane)) {

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2123

if (offset == 0)

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2126

offset = intel_plane_adjust_aligned_offset(&x, &y,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2129

offset, offset - alignment);

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2146

plane_state->view.color_plane[uv_plane].offset = offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2158

u32 offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2180

offset = intel_plane_compute_aligned_offset(&x, &y,

sys/dev/pci/drm/i915/display/skl_universal_plane.c

2184

plane_state->view.color_plane[ccs_plane].offset = offset;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

3013

u32 val, base, offset, stride_mult, tiling, alpha;

sys/dev/pci/drm/i915/display/skl_universal_plane.c

3148

offset = intel_de_read(display, PLANE_OFFSET(pipe, plane_id));

sys/dev/pci/drm/i915/display/skl_universal_plane.c

3149

drm_WARN_ON(display->drm, offset != 0);

sys/dev/pci/drm/i915/display/skl_universal_plane.h

33

int *x, int *y, u32 *offset);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1017

if (entry->offset != i915_vma_offset(vma)) {

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1018

entry->offset = i915_vma_offset(vma) | UPDATE;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1165

unsigned long offset;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1167

offset = cache->node.start;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1169

offset += cache->page << PAGE_SHIFT;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1172

io_mapping_map_atomic_wc(&ggtt->iomap, offset);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1258

unsigned long offset;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1313

offset = cache->node.start;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1317

offset,

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1322

offset += page << PAGE_SHIFT;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1326

offset);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1382

u64 offset = reloc->offset;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1388

offset >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1392

GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32)));

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1393

clflush_write32(vaddr + offset_in_page(offset),

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1398

offset += sizeof(u32);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1427

(int) reloc->offset,

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1438

(int) reloc->offset,

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1479

if (unlikely(reloc->offset >

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1484

(int)reloc->offset,

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1488

if (unlikely(reloc->offset & 3)) {

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1492

(int)reloc->offset);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1554

u64 offset = eb_relocate_entry(eb, ev, r);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1556

if (likely(offset == 0))

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1559

if ((s64)offset < 0) {

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1560

remain = (int)offset;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1584

offset = gen8_canonical_addr(offset & ~UPDATE);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1585

__put_user(offset, &urelocs[r - stack].presumed_offset);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1604

u64 offset = eb_relocate_entry(eb, ev, &relocs[i]);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1606

if ((s64)offset < 0) {

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

1607

err = (int)offset;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

3651

if (!(exec2_list[i].offset & UPDATE))

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

3654

exec2_list[i].offset =

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

3655

gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

3656

unsafe_put_user(exec2_list[i].offset,

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

3657

&user_exec_list[i].offset,

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

392

start != entry->offset)

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

429

pin_flags |= entry->offset | PIN_OFFSET_FIXED;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

448

pin_flags = entry->offset & PIN_OFFSET_MASK;

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

522

entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK)))

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

537

entry->offset = gen8_noncanonical_addr(entry->offset);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

675

if (entry->offset != i915_vma_offset(vma)) {

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

676

entry->offset = i915_vma_offset(vma) | UPDATE;

sys/dev/pci/drm/i915/gem/i915_gem_lmem.c

18

resource_size_t offset;

sys/dev/pci/drm/i915/gem/i915_gem_lmem.c

22

offset = i915_gem_object_get_dma_address(obj, n);

sys/dev/pci/drm/i915/gem/i915_gem_lmem.c

23

offset -= obj->mm.region->region.start;

sys/dev/pci/drm/i915/gem/i915_gem_lmem.c

25

return io_mapping_map_wc(&obj->mm.region->iomap, offset, size);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1032

&obj->mmo.offsets, offset) {

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1060

rb_entry(rb, typeof(*mmo), offset);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1089

pos = rb_entry(rb, typeof(*pos), offset);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1104

rb_link_node(&mmo->offset, rb, p);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1105

rb_insert_color(&mmo->offset, &obj->mmo.offsets);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

111

if (range_overflows(args->offset, args->size, (u64)obj->base.size)) {

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1167

u64 *offset, struct drm_file *file)

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1178

*offset = obj->ops->mmap_offset(obj);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

119

args->offset);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1194

*offset = drm_vma_node_offset_addr(&mmo->vma_node);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1202

u64 *offset)

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1214

err = __assign_mmap_offset(obj, mmap_type, offset, file);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1225

u64 *offset)

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1239

return __assign_mmap_offset_handle(file, handle, mmap_type, offset);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

1311

return __assign_mmap_offset_handle(file, args->handle, type, &args->offset);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

146

obj->base.uao, args->offset, 0, UVM_MAPFLAG(PROT_READ | PROT_WRITE,

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

242

view.partial.offset = rounddown(page_offset, chunk);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

245

(obj->base.size >> PAGE_SHIFT) - view.partial.offset);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

357

start += vma->gtt_view.partial.offset;

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

369

*pfn += obj_offset - vma->gtt_view.partial.offset;

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

72

if (args->size == 0 || args->offset & PAGE_MASK)

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

734

start += vma->gtt_view.partial.offset;

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

75

if (args->offset + size < args->offset)

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

767

obj_offset = (entry->offset >> PAGE_SHIFT) - drm_vma_node_start(&mmo->vma_node);

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

866

pfn += obj_offset - vma->gtt_view.partial.offset;

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

917

off_t offset, vaddr_t vaddr, vm_page_t *pps, int npages, int centeridx,

sys/dev/pci/drm/i915/gem/i915_gem_mman.c

928

entry->offset >> PAGE_SHIFT,

sys/dev/pci/drm/i915/gem/i915_gem_mman.h

30

u32 handle, u64 *offset);

sys/dev/pci/drm/i915/gem/i915_gem_mman.h

42

off_t offset, vaddr_t vaddr, vm_page_t *pps, int npages,

sys/dev/pci/drm/i915/gem/i915_gem_object.c

275

rbtree_postorder_for_each_entry_safe(mmo, mn, &obj->mmo.offsets, offset)

sys/dev/pci/drm/i915/gem/i915_gem_object.c

338

offset) {

sys/dev/pci/drm/i915/gem/i915_gem_object.c

514

i915_gem_object_read_from_page_kmap(struct drm_i915_gem_object *obj, u64 offset, void *dst, int size)

sys/dev/pci/drm/i915/gem/i915_gem_object.c

516

pgoff_t idx = offset >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gem/i915_gem_object.c

520

+ offset_in_page(offset);

sys/dev/pci/drm/i915/gem/i915_gem_object.c

529

i915_gem_object_read_from_page_iomap(struct drm_i915_gem_object *obj, u64 offset, void *dst, int size)

sys/dev/pci/drm/i915/gem/i915_gem_object.c

531

pgoff_t idx = offset >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gem/i915_gem_object.c

540

src_ptr = src_map + offset_in_page(offset);

sys/dev/pci/drm/i915/gem/i915_gem_object.c

571

int i915_gem_object_read_from_page(struct drm_i915_gem_object *obj, u64 offset, void *dst, int size)

sys/dev/pci/drm/i915/gem/i915_gem_object.c

573

GEM_BUG_ON(overflows_type(offset >> PAGE_SHIFT, pgoff_t));

sys/dev/pci/drm/i915/gem/i915_gem_object.c

574

GEM_BUG_ON(offset >= obj->base.size);

sys/dev/pci/drm/i915/gem/i915_gem_object.c

575

GEM_BUG_ON(offset_in_page(offset) > PAGE_SIZE - size);

sys/dev/pci/drm/i915/gem/i915_gem_object.c

579

i915_gem_object_read_from_page_kmap(obj, offset, dst, size);

sys/dev/pci/drm/i915/gem/i915_gem_object.c

581

i915_gem_object_read_from_page_iomap(obj, offset, dst, size);

sys/dev/pci/drm/i915/gem/i915_gem_object.h

378

unsigned int *offset);

sys/dev/pci/drm/i915/gem/i915_gem_object.h

400

#define i915_gem_object_page_iter_get_sg(obj, it, n, offset) ({ \

sys/dev/pci/drm/i915/gem/i915_gem_object.h

402

__i915_gem_object_page_iter_get_sg(obj, it, n, offset); \

sys/dev/pci/drm/i915/gem/i915_gem_object.h

425

unsigned int *offset)

sys/dev/pci/drm/i915/gem/i915_gem_object.h

427

return __i915_gem_object_page_iter_get_sg(obj, &obj->mm.get_page, n, offset);

sys/dev/pci/drm/i915/gem/i915_gem_object.h

445

#define i915_gem_object_get_sg(obj, n, offset) ({ \

sys/dev/pci/drm/i915/gem/i915_gem_object.h

447

__i915_gem_object_get_sg(obj, n, offset); \

sys/dev/pci/drm/i915/gem/i915_gem_object.h

470

unsigned int *offset)

sys/dev/pci/drm/i915/gem/i915_gem_object.h

472

return __i915_gem_object_page_iter_get_sg(obj, &obj->mm.get_dma_page, n, offset);

sys/dev/pci/drm/i915/gem/i915_gem_object.h

490

#define i915_gem_object_get_sg_dma(obj, n, offset) ({ \

sys/dev/pci/drm/i915/gem/i915_gem_object.h

492

__i915_gem_object_get_sg_dma(obj, n, offset); \

sys/dev/pci/drm/i915/gem/i915_gem_object.h

724

unsigned long offset,

sys/dev/pci/drm/i915/gem/i915_gem_object.h

813

int i915_gem_object_read_from_page(struct drm_i915_gem_object *obj, u64 offset, void *dst, int size);

sys/dev/pci/drm/i915/gem/i915_gem_object_types.h

232

struct rb_node offset;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

399

unsigned int offset = fb->panic_tiling(sb->width, x, y);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

401

iosys_map_wr(&sb->map[0], offset, u32, color);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

413

unsigned int offset;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

418

offset = fb->panic_tiling(sb->width, x, y);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

420

offset = y * sb->pitch[0] + x * sb->format->cpp[0];

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

422

new_page = offset >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

423

offset = offset % PAGE_SIZE;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

431

u32 *pix = panic->vaddr + offset;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

602

unsigned long offset,

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

610

offset, size, obj->base.size));

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

622

drm_clflush_virt_range(ptr + offset, size);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

648

unsigned int *offset)

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

731

*offset = n - idx;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

746

*offset = 0;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

753

*offset = n - base;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

765

unsigned int offset;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

769

sg = i915_gem_object_get_sg(obj, n, &offset);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

770

return sg_page(sg) + offset;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

791

unsigned int offset;

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

793

sg = i915_gem_object_get_sg_dma(obj, n, &offset);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

796

*len = sg_dma_len(sg) - (offset << PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/i915_gem_pages.c

798

return sg_dma_address(sg) + (offset << PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/i915_gem_phys.c

207

void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset;

sys/dev/pci/drm/i915/gem/i915_gem_phys.c

210

void *vaddr = dmah->kva + args->offset;

sys/dev/pci/drm/i915/gem/i915_gem_phys.c

243

void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset;

sys/dev/pci/drm/i915/gem/i915_gem_phys.c

246

void *vaddr = dmah->kva + args->offset;

sys/dev/pci/drm/i915/gem/i915_gem_phys.c

74

sg->offset = 0;

sys/dev/pci/drm/i915/gem/i915_gem_region.c

118

resource_size_t offset,

sys/dev/pci/drm/i915/gem/i915_gem_region.c

122

GEM_BUG_ON(offset == I915_BO_INVALID_OFFSET);

sys/dev/pci/drm/i915/gem/i915_gem_region.c

125

GEM_WARN_ON(!IS_ALIGNED(offset, mem->min_page_size)))

sys/dev/pci/drm/i915/gem/i915_gem_region.c

128

if (range_overflows(offset, size, resource_size(&mem->region)))

sys/dev/pci/drm/i915/gem/i915_gem_region.c

132

offset + size > resource_size(&mem->io) &&

sys/dev/pci/drm/i915/gem/i915_gem_region.c

136

return __i915_gem_object_create_region(mem, offset, size, 0,

sys/dev/pci/drm/i915/gem/i915_gem_region.c

34

resource_size_t offset,

sys/dev/pci/drm/i915/gem/i915_gem_region.c

94

err = mem->ops->init_object(mem, obj, offset, size, page_size, flags);

sys/dev/pci/drm/i915/gem/i915_gem_region.h

61

resource_size_t offset,

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

523

kiocb.ki_pos = arg->offset;

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

536

pos = arg->offset;

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

669

resource_size_t offset,

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

788

resource_size_t offset;

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

799

offset = 0;

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

807

if (uvm_obj_wire(uao, trunc_page(offset),

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

808

trunc_page(offset) + PAGE_SIZE, &plist)) {

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

818

uvm_obj_unwire(uao, trunc_page(offset),

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

819

trunc_page(offset) + PAGE_SIZE);

sys/dev/pci/drm/i915/gem/i915_gem_shmem.c

823

offset += len;

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

616

resource_size_t offset, resource_size_t size)

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

622

GEM_BUG_ON(range_overflows(offset, size, resource_size(&i915->dsm.stolen)));

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

639

sg->offset = 0;

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

642

sg_dma_address(sg) = (dma_addr_t)i915->dsm.stolen.start + offset;

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

741

resource_size_t offset,

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

768

if (offset != I915_BO_INVALID_OFFSET) {

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

771

&offset, &size);

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

773

stolen->start = offset;

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

128

resource_size_t offset,

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

140

if (offset != I915_BO_INVALID_OFFSET) {

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

141

WARN_ON(overflows_type(offset >> PAGE_SHIFT, place->fpfn));

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

142

place->fpfn = offset >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

1497

resource_size_t offset,

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

1514

obj->bo_offset = offset;

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

726

unsigned long offset, void *buf,

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

735

unsigned long page = offset >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

746

offset -= page << PAGE_SHIFT;

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

748

unsigned long bytes = min(bytes_left, PAGE_SIZE - offset);

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

753

ptr = ioremap_wc(iomap + daddr + offset, bytes);

sys/dev/pci/drm/i915/gem/i915_gem_ttm.c

766

offset = 0;

sys/dev/pci/drm/i915/gem/i915_gem_ttm.h

57

resource_size_t offset,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

1022

offset, size);

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

1148

u64 size, u64 offset,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

1159

err = i915_vma_pin(vma, size, 0, flags | offset);

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

1177

pr_err("gpu-write failed at offset=%llx\n", offset);

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

1183

pr_err("cpu-check failed at offset=%llx\n", offset);

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

243

sg->offset = 0;

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

288

sg->offset = 0;

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

598

unsigned int offset;

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

650

for (offset = 4096; offset < page_size; offset += 4096) {

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

655

err = i915_vma_pin(vma, 0, 0, flags | offset);

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

675

__func__, offset, page_size))

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

868

unsigned int offset;

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

874

.offset = 0,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

879

.offset = 0,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

884

.offset = 0,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

889

.offset = 0,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

894

.offset = 0,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

899

.offset = 0,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

904

.offset = 0,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

909

.offset = 0,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

914

.offset = SZ_2M,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

919

.offset = SZ_2M - SZ_64K,

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

950

unsigned int offset = objects[i].offset;

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

988

if (offset)

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

989

flags |= PIN_OFFSET_FIXED | offset;

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

999

if (!has_pte64 && !offset &&

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

344

static u64 swizzle_bit(unsigned int bit, u64 offset)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

346

return (offset & BIT_ULL(bit)) >> (bit - 6);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

601

u64 offset = round_up(t->width * t->height * 4, t->align);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

616

&t->buffers[i], t->hole + offset,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

632

u64 offset = round_up(t->width * t->height * 4, 2 * t->align);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

638

&t->buffers[1], t->hole + offset / 2,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

639

&t->buffers[0], t->hole + 2 * offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

649

&t->buffers[1], t->hole + 3 * offset / 2);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

108

iowrite32(v, &map[offset / sizeof(*map)]);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

116

static int gtt_get(struct context *ctx, unsigned long offset, u32 *v)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

142

*v = ioread32(&map[offset / sizeof(*map)]);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

150

static int wc_set(struct context *ctx, unsigned long offset, u32 v)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

165

map[offset / sizeof(*map)] = v;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

167

__i915_gem_object_flush_map(ctx->obj, offset, sizeof(*map));

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

173

static int wc_get(struct context *ctx, unsigned long offset, u32 *v)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

188

*v = map[offset / sizeof(*map)];

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

194

static int gpu_set(struct context *ctx, unsigned long offset, u32 v)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

224

*cs++ = lower_32_bits(i915_ggtt_offset(vma) + offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

225

*cs++ = upper_32_bits(i915_ggtt_offset(vma) + offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

23

static int cpu_set(struct context *ctx, unsigned long offset, u32 v)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

230

*cs++ = i915_ggtt_offset(vma) + offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

234

*cs++ = i915_ggtt_offset(vma) + offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

277

int (*set)(struct context *ctx, unsigned long offset, u32 v);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

278

int (*get)(struct context *ctx, unsigned long offset, u32 *v);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

35

page = i915_gem_object_get_page(ctx->obj, offset >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

36

cpu = kmap_local_page(page) + offset_in_page(offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

54

static int cpu_get(struct context *ctx, unsigned long offset, u32 *v)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

66

page = i915_gem_object_get_page(ctx->obj, offset >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

67

cpu = kmap_local_page(page) + offset_in_page(offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_coherency.c

82

static int gtt_set(struct context *ctx, unsigned long offset, u32 v)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1490

static int check_scratch(struct i915_address_space *vm, u64 offset)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1496

offset, offset + sizeof(u32) - 1);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1498

if (!node || node->start > offset)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1501

GEM_BUG_ON(offset >= node->start + node->size);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1504

upper_32_bits(offset), lower_32_bits(offset));

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1511

u64 offset, u32 value)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1520

GEM_BUG_ON(offset < I915_GTT_PAGE_SIZE);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1522

err = check_scratch(ctx->vm, offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1532

*cmd++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1533

*cmd++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1536

*cmd++ = offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1599

u64 offset, u32 *value)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1610

GEM_BUG_ON(offset < I915_GTT_PAGE_SIZE);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1612

err = check_scratch(ctx->vm, offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1639

*cmd++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1640

*cmd++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1675

*cmd++ = offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1855

u64 offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1858

offset = igt_random_offset(&prng,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1863

offset, 0xdeadbeef);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1866

offset, &value);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1873

upper_32_bits(offset),

sys/dev/pci/drm/i915/gem/selftests/i915_gem_context.c

1874

lower_32_bits(offset),

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

100

unsigned long offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1162

u64 offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1174

err = __assign_mmap_offset(obj, I915_MMAP_TYPE_FIXED, &offset, NULL);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1184

addr = igt_mmap_offset(i915, offset, obj->base.size,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

136

n = page - view.partial.offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1436

u64 offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1444

err = __assign_mmap_offset(obj, type, &offset, NULL);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1448

addr = igt_mmap_offset(i915, offset, obj->base.size, PROT_WRITE, MAP_SHARED);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

151

offset = tiled_offset(tile, page << PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

152

if (offset >= obj->base.size)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1545

u64 offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1562

err = __assign_mmap_offset(obj, type, &offset, NULL);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1566

addr = igt_mmap_offset(i915, offset, obj->base.size, PROT_WRITE, MAP_SHARED);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

157

p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

158

cpu = kmap(p) + offset_in_page(offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

163

view.partial.offset,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

168

offset >> PAGE_SHIFT,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

169

(unsigned int)offset_in_page(offset),

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

170

offset,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1740

u64 offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1745

err = __assign_mmap_offset(obj, type, &offset, NULL);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

1749

addr = igt_mmap_offset(i915, offset, obj->base.size, PROT_WRITE, MAP_SHARED);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

217

unsigned long offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

233

n = page - view.partial.offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

247

offset = tiled_offset(tile, page << PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

248

if (offset >= obj->base.size)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

253

p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

254

cpu = kmap(p) + offset_in_page(offset);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

259

view.partial.offset,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

264

offset >> PAGE_SHIFT,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

265

(unsigned int)offset_in_page(offset),

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

266

offset,

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

39

static u64 swizzle_bit(unsigned int bit, u64 offset)

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

41

return (offset & BIT_ULL(bit)) >> (bit - 6);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

617

u64 offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

624

ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

663

u64 offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

729

err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

902

u64 offset;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

913

err = __assign_mmap_offset(obj, type, &offset, NULL);

sys/dev/pci/drm/i915/gem/selftests/i915_gem_mman.c

917

addr = igt_mmap_offset(i915, offset, obj->base.size, PROT_WRITE, MAP_SHARED);

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

112

struct i915_vma *vma, u64 offset,

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

123

batch = igt_emit_store_dw(vma, offset, count, val);

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

43

u64 offset,

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

65

GEM_BUG_ON(offset + (count - 1) * PAGE_SIZE > i915_vma_size(vma));

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

66

offset += i915_vma_offset(vma);

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

71

*cmd++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

72

*cmd++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

78

*cmd++ = offset;

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

82

*cmd++ = offset;

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.c

85

offset += PAGE_SIZE;

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.h

26

u64 offset,

sys/dev/pci/drm/i915/gem/selftests/igt_gem_utils.h

31

struct i915_vma *vma, u64 offset,

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

187

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

227

*cs++ = offset;

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

234

offset = cs_offset;

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

238

offset |= MI_BATCH_NON_SECURE;

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

245

*cs++ = offset;

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

252

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

258

offset |= MI_BATCH_NON_SECURE;

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

265

*cs++ = offset;

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

272

u64 offset, u32 length,

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

287

*cs++ = offset;

sys/dev/pci/drm/i915/gt/gen2_engine_cs.h

22

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen2_engine_cs.h

25

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen2_engine_cs.h

28

u64 offset, u32 length,

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

230

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

244

cs = __gen6_emit_bb_start(cs, offset, security);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

252

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

266

cs = __gen6_emit_bb_start(cs, offset, security);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.h

27

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen6_engine_cs.h

30

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

104

return (cs - bc->start) * sizeof(*bc->start) + bc->offset;

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

149

u32 offset = batch_offset(state, cs);

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

171

return offset;

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

181

u32 offset = batch_offset(state, cs);

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

183

*cs++ = surface_start - state->offset;

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

193

return offset;

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

216

u32 offset = batch_offset(state, cs);

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

221

*cs++ = (binding_table - state->offset) | 1;

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

231

return offset;

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

29

u32 offset;

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

93

u32 *start, u32 offset, u32 max_bytes)

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

96

bc->offset = offset;

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

97

bc->start = start + bc->offset / sizeof(*bc->start);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

482

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

507

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

508

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

523

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

526

return __xehp_emit_bb_start(rq, offset, len, flags, MI_ARB_DISABLE);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

530

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

533

return __xehp_emit_bb_start(rq, offset, len, flags, MI_ARB_ENABLE);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

537

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

564

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

565

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

573

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

579

return gen8_emit_bb_start_noarb(rq, offset, len, flags);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

589

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.c

590

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

30

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

33

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

37

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

40

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

54

u32 bit_group_1, u32 offset)

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

60

batch[2] = offset;

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

66

u32 bit_group_1, u32 offset)

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

68

return __gen8_emit_pipe_control(batch, 0, bit_group_1, offset);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

72

u32 bit_group_1, u32 offset)

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

75

bit_group_1, offset);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

79

__gen8_emit_write_rcs(u32 *cs, u32 value, u32 offset, u32 flags0, u32 flags1)

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

83

*cs++ = offset;

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

765

u64 offset,

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

769

u64 idx = offset >> GEN8_PTE_SHIFT;

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

786

u64 offset,

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

790

u64 idx = offset >> GEN8_PTE_SHIFT;

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

799

GEM_BUG_ON(!IS_ALIGNED(offset, SZ_64K));

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

815

u64 offset,

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

820

return xehp_ppgtt_insert_entry_lm(vm, addr, offset,

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

823

return gen8_ppgtt_insert_entry(vm, addr, offset, pat_index, flags);

sys/dev/pci/drm/i915/gt/intel_context_sseu.c

20

u64 offset;

sys/dev/pci/drm/i915/gt/intel_context_sseu.c

27

offset = i915_ggtt_offset(ce->state) +

sys/dev/pci/drm/i915/gt/intel_context_sseu.c

31

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/intel_context_sseu.c

32

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

2268

size_t offset;

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

2272

.offset = offsetof(typeof(engine->props), x), \

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

2290

read_ul(&engine->props, p->offset),

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

2291

read_ul(&engine->defaults, p->offset));

sys/dev/pci/drm/i915/gt/intel_engine_types.h

542

u64 offset, u32 length,

sys/dev/pci/drm/i915/gt/intel_engine_types.h

94

u32 offset;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

369

static bool gen8_ggtt_bind_ptes(struct i915_ggtt *ggtt, u32 offset,

sys/dev/pci/drm/i915/gt/intel_ggtt.c

422

*cs++ = offset << 12;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

458

offset += n_ptes;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

483

u64 offset,

sys/dev/pci/drm/i915/gt/intel_ggtt.c

489

(gen8_pte_t __iomem *)ggtt->gsm + offset / I915_GTT_PAGE_SIZE;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

497

u64 offset, bool *is_present, bool *is_local)

sys/dev/pci/drm/i915/gt/intel_ggtt.c

501

(gen8_pte_t __iomem *)ggtt->gsm + offset / I915_GTT_PAGE_SIZE;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

507

dma_addr_t addr, u64 offset,

sys/dev/pci/drm/i915/gt/intel_ggtt.c

515

gen8_ggtt_bind_ptes(ggtt, offset, NULL, 1, pte))

sys/dev/pci/drm/i915/gt/intel_ggtt.c

518

gen8_ggtt_insert_page(vm, addr, offset, pat_index, flags);

sys/dev/pci/drm/i915/gt/intel_ggtt.c

648

u64 offset,

sys/dev/pci/drm/i915/gt/intel_ggtt.c

654

(gen6_pte_t __iomem *)ggtt->gsm + offset / I915_GTT_PAGE_SIZE;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

662

u64 offset,

sys/dev/pci/drm/i915/gt/intel_ggtt.c

667

(gen6_pte_t __iomem *)ggtt->gsm + offset / I915_GTT_PAGE_SIZE;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

731

u64 offset;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

739

gen8_ggtt_insert_page(arg->vm, arg->addr, arg->offset,

sys/dev/pci/drm/i915/gt/intel_ggtt.c

748

u64 offset,

sys/dev/pci/drm/i915/gt/intel_ggtt.c

752

struct insert_page arg = { vm, addr, offset, pat_index };

sys/dev/pci/drm/i915/gt/intel_ggtt.c

837

u64 offset, bool *is_present, bool *is_local)

sys/dev/pci/drm/i915/gt/intel_ggtt.c

841

return ggtt->vm.read_entry(vm, offset, is_present, is_local);

sys/dev/pci/drm/i915/gt/intel_ggtt.c

857

u64 offset;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

864

offset = ggtt->vm.total - GUC_TOP_RESERVE_SIZE;

sys/dev/pci/drm/i915/gt/intel_ggtt.c

867

GUC_TOP_RESERVE_SIZE, offset,

sys/dev/pci/drm/i915/gt/intel_ggtt_gmch.c

20

u64 offset,

sys/dev/pci/drm/i915/gt/intel_ggtt_gmch.c

27

intel_gmch_gtt_insert_page(addr, offset >> PAGE_SHIFT, flags);

sys/dev/pci/drm/i915/gt/intel_ggtt_gmch.c

31

u64 offset, bool *is_present, bool *is_local)

sys/dev/pci/drm/i915/gt/intel_ggtt_gmch.c

33

return intel_gmch_gtt_read_entry(offset >> PAGE_SHIFT,

sys/dev/pci/drm/i915/gt/intel_gt_mcr.c

566

u32 offset = i915_mmio_reg_offset(reg);

sys/dev/pci/drm/i915/gt/intel_gt_mcr.c

572

if (IS_GSI_REG(offset))

sys/dev/pci/drm/i915/gt/intel_gt_mcr.c

573

offset += gt->uncore->gsi_offset;

sys/dev/pci/drm/i915/gt/intel_gt_mcr.c

576

if (offset >= entry->start && offset <= entry->end)

sys/dev/pci/drm/i915/gt/intel_gt_regs.h

22

#define PERF_REG(offset) _MMIO(offset)

sys/dev/pci/drm/i915/gt/intel_gtt.h

328

u64 offset,

sys/dev/pci/drm/i915/gt/intel_gtt.h

337

u64 offset,

sys/dev/pci/drm/i915/gt/intel_gtt.h

345

u64 offset, bool *is_present, bool *is_local);

sys/dev/pci/drm/i915/gt/intel_gtt.h

599

u64 offset, bool *is_present, bool *is_local);

sys/dev/pci/drm/i915/gt/intel_lrc.c

1901

wa_bb[i]->offset = batch_ptr - batch;

sys/dev/pci/drm/i915/gt/intel_lrc.c

1902

if (GEM_DEBUG_WARN_ON(!IS_ALIGNED(wa_bb[i]->offset,

sys/dev/pci/drm/i915/gt/intel_lrc.c

1909

wa_bb[i]->size = batch_ptr - (batch + wa_bb[i]->offset);

sys/dev/pci/drm/i915/gt/intel_lrc.c

84

u32 offset = 0;

sys/dev/pci/drm/i915/gt/intel_lrc.c

876

(ggtt_offset + wa_ctx->per_ctx.offset) | 0x01;

sys/dev/pci/drm/i915/gt/intel_lrc.c

882

wa_ctx->indirect_ctx.offset,

sys/dev/pci/drm/i915/gt/intel_lrc.c

89

offset <<= 7;

sys/dev/pci/drm/i915/gt/intel_lrc.c

90

offset |= v & ~BIT(7);

sys/dev/pci/drm/i915/gt/intel_lrc.c

93

regs[0] = base + (offset << 2);

sys/dev/pci/drm/i915/gt/intel_migrate.c

1003

offset = 0;

sys/dev/pci/drm/i915/gt/intel_migrate.c

1005

offset = CHUNK_SZ;

sys/dev/pci/drm/i915/gt/intel_migrate.c

1035

len = emit_pte(rq, &it, pat_index, is_lmem, offset, CHUNK_SZ);

sys/dev/pci/drm/i915/gt/intel_migrate.c

1045

err = emit_clear(rq, offset, len, value, is_lmem);

sys/dev/pci/drm/i915/gt/intel_migrate.c

1054

err = emit_copy_ccs(rq, offset, INDIRECT_ACCESS, offset,

sys/dev/pci/drm/i915/gt/intel_migrate.c

16

u64 offset;

sys/dev/pci/drm/i915/gt/intel_migrate.c

180

d.offset = base + sz;

sys/dev/pci/drm/i915/gt/intel_migrate.c

211

vm->vm.foreach(&vm->vm, base, d.offset - base,

sys/dev/pci/drm/i915/gt/intel_migrate.c

213

d.offset = base + CHUNK_SZ;

sys/dev/pci/drm/i915/gt/intel_migrate.c

215

d.offset,

sys/dev/pci/drm/i915/gt/intel_migrate.c

219

vm->vm.foreach(&vm->vm, base, d.offset - base,

sys/dev/pci/drm/i915/gt/intel_migrate.c

366

u64 offset,

sys/dev/pci/drm/i915/gt/intel_migrate.c

385

GEM_BUG_ON(!IS_ALIGNED(offset, SZ_2M));

sys/dev/pci/drm/i915/gt/intel_migrate.c

387

offset /= SZ_2M;

sys/dev/pci/drm/i915/gt/intel_migrate.c

388

offset *= SZ_64K;

sys/dev/pci/drm/i915/gt/intel_migrate.c

389

offset += 3 * CHUNK_SZ;

sys/dev/pci/drm/i915/gt/intel_migrate.c

396

offset >>= 12;

sys/dev/pci/drm/i915/gt/intel_migrate.c

397

offset *= sizeof(u64);

sys/dev/pci/drm/i915/gt/intel_migrate.c

398

offset += 2 * CHUNK_SZ;

sys/dev/pci/drm/i915/gt/intel_migrate.c

401

offset += (u64)rq->engine->instance << 32;

sys/dev/pci/drm/i915/gt/intel_migrate.c

412

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/intel_migrate.c

413

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/intel_migrate.c

433

offset = round_up(offset, SZ_64K);

sys/dev/pci/drm/i915/gt/intel_migrate.c

445

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/intel_migrate.c

446

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/intel_migrate.c

454

offset += 8;

sys/dev/pci/drm/i915/gt/intel_migrate.c

48

vm->insert_page(vm, 0, d->offset,

sys/dev/pci/drm/i915/gt/intel_migrate.c

52

d->offset += SZ_2M;

sys/dev/pci/drm/i915/gt/intel_migrate.c

68

vm->insert_page(vm, px_dma(pt), d->offset,

sys/dev/pci/drm/i915/gt/intel_migrate.c

71

d->offset += SZ_64K;

sys/dev/pci/drm/i915/gt/intel_migrate.c

80

vm->insert_page(vm, px_dma(pt), d->offset,

sys/dev/pci/drm/i915/gt/intel_migrate.c

83

d->offset += PAGE_SIZE;

sys/dev/pci/drm/i915/gt/intel_migrate.c

917

static int emit_clear(struct i915_request *rq, u32 offset, int size,

sys/dev/pci/drm/i915/gt/intel_migrate.c

946

*cs++ = offset;

sys/dev/pci/drm/i915/gt/intel_migrate.c

966

*cs++ = offset;

sys/dev/pci/drm/i915/gt/intel_migrate.c

975

*cs++ = offset;

sys/dev/pci/drm/i915/gt/intel_migrate.c

995

u32 offset;

sys/dev/pci/drm/i915/gt/intel_mocs.c

568

static const u32 offset[] = {

sys/dev/pci/drm/i915/gt/intel_mocs.c

577

GEM_BUG_ON(engine->id >= ARRAY_SIZE(offset));

sys/dev/pci/drm/i915/gt/intel_mocs.c

578

return offset[engine->id];

sys/dev/pci/drm/i915/gt/intel_reset.c

864

vma_offset = vma->gtt_view.partial.offset << PAGE_SHIFT;

sys/dev/pci/drm/i915/gt/intel_ring.h

83

u32 offset = addr - rq->ring->vaddr;

sys/dev/pci/drm/i915/gt/intel_ring.h

85

GEM_BUG_ON(offset > rq->ring->size);

sys/dev/pci/drm/i915/gt/intel_ring.h

86

return intel_ring_wrap(rq->ring, offset);

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

114

intel_uncore_write_fw(engine->uncore, hwsp, offset);

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

78

static void set_hwsp(struct intel_engine_cs *engine, u32 offset)

sys/dev/pci/drm/i915/gt/intel_timeline.c

148

unsigned int offset)

sys/dev/pci/drm/i915/gt/intel_timeline.c

157

err = intel_timeline_init(timeline, gt, global_hwsp, offset);

sys/dev/pci/drm/i915/gt/intel_timeline.c

168

unsigned int offset)

sys/dev/pci/drm/i915/gt/intel_timeline.c

173

tl = __intel_timeline_create(engine->gt, hwsp, offset);

sys/dev/pci/drm/i915/gt/intel_timeline.c

78

unsigned int offset)

sys/dev/pci/drm/i915/gt/intel_timeline.c

86

timeline->hwsp_offset = offset;

sys/dev/pci/drm/i915/gt/intel_timeline.h

21

unsigned int offset);

sys/dev/pci/drm/i915/gt/intel_timeline.h

31

unsigned int offset);

sys/dev/pci/drm/i915/gt/intel_wopcm.c

107

u32 offset;

sys/dev/pci/drm/i915/gt/intel_wopcm.c

114

offset = guc_wopcm_base + GEN9_GUC_WOPCM_OFFSET;

sys/dev/pci/drm/i915/gt/intel_wopcm.c

115

if (offset > guc_wopcm_size ||

sys/dev/pci/drm/i915/gt/intel_wopcm.c

116

(guc_wopcm_size - offset) < sizeof(u32)) {

sys/dev/pci/drm/i915/gt/intel_wopcm.c

120

(u32)(offset + sizeof(u32)) / SZ_1K);

sys/dev/pci/drm/i915/gt/intel_workarounds.c

2961

static bool mcr_range(struct drm_i915_private *i915, u32 offset)

sys/dev/pci/drm/i915/gt/intel_workarounds.c

2981

if (offset >= mcr_ranges[i].start &&

sys/dev/pci/drm/i915/gt/intel_workarounds.c

2982

offset <= mcr_ranges[i].end)

sys/dev/pci/drm/i915/gt/intel_workarounds.c

3012

u32 offset = i915_mmio_reg_offset(wa->reg);

sys/dev/pci/drm/i915/gt/intel_workarounds.c

3014

if (mcr_range(i915, offset))

sys/dev/pci/drm/i915/gt/intel_workarounds.c

3018

*cs++ = offset;

sys/dev/pci/drm/i915/gt/selftest_execlists.c

1053

const u32 offset =

sys/dev/pci/drm/i915/gt/selftest_execlists.c

1084

*cs++ = offset;

sys/dev/pci/drm/i915/gt/selftest_execlists.c

1089

*cs++ = offset + idx * sizeof(u32);

sys/dev/pci/drm/i915/gt/selftest_execlists.c

1093

*cs++ = offset;

sys/dev/pci/drm/i915/gt/selftest_execlists.c

2748

u64 offset = i915_vma_offset((*prev)->batch);

sys/dev/pci/drm/i915/gt/selftest_execlists.c

2752

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/selftest_execlists.c

2753

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/selftest_execlists.c

3049

unsigned int offset)

sys/dev/pci/drm/i915/gt/selftest_execlists.c

3100

addr = i915_vma_offset(result) + offset + i * sizeof(*cs);

sys/dev/pci/drm/i915/gt/selftest_execlists.c

3149

unsigned int offset)

sys/dev/pci/drm/i915/gt/selftest_execlists.c

3170

batch = create_gpr_user(engine, vma, offset);

sys/dev/pci/drm/i915/gt/selftest_lrc.c

240

u32 offset = READ_ONCE(hw[dw]);

sys/dev/pci/drm/i915/gt/selftest_lrc.c

242

if ((offset ^ lrc[dw]) & lri_mask) {

sys/dev/pci/drm/i915/gt/selftest_lrc.c

244

engine->name, dw, offset, lrc[dw]);

sys/dev/pci/drm/i915/gt/selftest_lrc.c

275

static int find_offset(const u32 *lri, u32 offset)

sys/dev/pci/drm/i915/gt/selftest_lrc.c

280

if (lri[i] == offset)

sys/dev/pci/drm/i915/gt/selftest_lrc.c

301

u32 offset;

sys/dev/pci/drm/i915/gt/selftest_lrc.c

386

if (dw != t->offset) {

sys/dev/pci/drm/i915/gt/selftest_lrc.c

392

t->offset);

sys/dev/pci/drm/i915/gt/selftest_lrc.c

567

const u32 offset =

sys/dev/pci/drm/i915/gt/selftest_lrc.c

593

*cs++ = offset;

sys/dev/pci/drm/i915/gt/selftest_lrc.c

740

const u32 offset =

sys/dev/pci/drm/i915/gt/selftest_lrc.c

765

*cs++ = offset;

sys/dev/pci/drm/i915/gt/selftest_lrc.c

770

*cs++ = offset + idx * sizeof(u32);

sys/dev/pci/drm/i915/gt/selftest_lrc.c

81

const u32 offset =

sys/dev/pci/drm/i915/gt/selftest_lrc.c

959

static u32 safe_poison(u32 offset, u32 poison)

sys/dev/pci/drm/i915/gt/selftest_lrc.c

966

if (offset == i915_mmio_reg_offset(RING_PREDICATE_RESULT(0)))

sys/dev/pci/drm/i915/gt/selftest_lrc.c

98

*cs++ = offset;

sys/dev/pci/drm/i915/gt/selftest_migrate.c

148

u32 offset;

sys/dev/pci/drm/i915/gt/selftest_migrate.c

156

offset = 0;

sys/dev/pci/drm/i915/gt/selftest_migrate.c

158

offset = CHUNK_SZ;

sys/dev/pci/drm/i915/gt/selftest_migrate.c

188

len = emit_pte(rq, &it, pat_index, true, offset, CHUNK_SZ);

sys/dev/pci/drm/i915/gt/selftest_migrate.c

198

err = emit_copy_ccs(rq, offset, dst_access,

sys/dev/pci/drm/i915/gt/selftest_migrate.c

199

offset, src_access, len);

sys/dev/pci/drm/i915/gt/selftest_migrate.c

373

int offset = ((i * PAGE_SIZE) /

sys/dev/pci/drm/i915/gt/selftest_migrate.c

379

if (vaddr[offset + x]) {

sys/dev/pci/drm/i915/gt/selftest_migrate.c

382

igt_hexdump(vaddr + offset,

sys/dev/pci/drm/i915/gt/selftest_mocs.c

104

u32 *offset)

sys/dev/pci/drm/i915/gt/selftest_mocs.c

109

GEM_BUG_ON(!IS_ALIGNED(*offset, sizeof(u32)));

sys/dev/pci/drm/i915/gt/selftest_mocs.c

118

*cs++ = *offset;

sys/dev/pci/drm/i915/gt/selftest_mocs.c

122

*offset += sizeof(u32);

sys/dev/pci/drm/i915/gt/selftest_mocs.c

132

u32 *offset)

sys/dev/pci/drm/i915/gt/selftest_mocs.c

145

return read_regs(rq, addr, table->n_entries, offset);

sys/dev/pci/drm/i915/gt/selftest_mocs.c

150

u32 *offset)

sys/dev/pci/drm/i915/gt/selftest_mocs.c

157

return read_regs(rq, addr, (table->n_entries + 1) / 2, offset);

sys/dev/pci/drm/i915/gt/selftest_mocs.c

182

static bool mcr_range(struct drm_i915_private *i915, u32 offset)

sys/dev/pci/drm/i915/gt/selftest_mocs.c

189

return GRAPHICS_VER(i915) >= 8 && offset >= 0xb000 && offset <= 0xb4ff;

sys/dev/pci/drm/i915/gt/selftest_mocs.c

222

u32 offset;

sys/dev/pci/drm/i915/gt/selftest_mocs.c

235

offset = i915_ggtt_offset(vma);

sys/dev/pci/drm/i915/gt/selftest_mocs.c

237

err = read_mocs_table(rq, arg->mocs, &offset);

sys/dev/pci/drm/i915/gt/selftest_mocs.c

239

err = read_l3cc_table(rq, arg->l3cc, &offset);

sys/dev/pci/drm/i915/gt/selftest_mocs.c

240

offset -= i915_ggtt_offset(vma);

sys/dev/pci/drm/i915/gt/selftest_mocs.c

241

GEM_BUG_ON(offset > PAGE_SIZE);

sys/dev/pci/drm/i915/gt/selftest_mocs.c

256

GEM_BUG_ON(arg->vaddr + offset != vaddr);

sys/dev/pci/drm/i915/gt/selftest_timeline.c

247

int order, offset;

sys/dev/pci/drm/i915/gt/selftest_timeline.c

253

for (offset = -1; offset <= (order > 1); offset++) {

sys/dev/pci/drm/i915/gt/selftest_timeline.c

254

u64 ctx = BIT_ULL(order) + offset;

sys/dev/pci/drm/i915/gt/selftest_timeline.c

266

for (offset = -1; offset <= (order > 1); offset++) {

sys/dev/pci/drm/i915/gt/selftest_timeline.c

267

u64 ctx = BIT_ULL(order) + offset;

sys/dev/pci/drm/i915/gt/selftest_timeline.c

900

u32 offset, end;

sys/dev/pci/drm/i915/gt/selftest_timeline.c

915

offset = 0;

sys/dev/pci/drm/i915/gt/selftest_timeline.c

917

while (offset < end) {

sys/dev/pci/drm/i915/gt/selftest_timeline.c

918

if (!op(w->map[offset + 1], w->map[offset])) {

sys/dev/pci/drm/i915/gt/selftest_timeline.c

920

name, w->map[offset + 1], w->map[offset]);

sys/dev/pci/drm/i915/gt/selftest_timeline.c

924

offset += 2;

sys/dev/pci/drm/i915/gt/selftest_workarounds.c

869

u64 offset = i915_vma_offset(results) + sizeof(u32) * i;

sys/dev/pci/drm/i915/gt/selftest_workarounds.c

877

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/selftest_workarounds.c

878

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/selftest_workarounds.c

961

u32 offset = i915_mmio_reg_offset(reg);

sys/dev/pci/drm/i915/gt/selftest_workarounds.c

965

i915_mmio_reg_offset(tbl->reg) == offset)

sys/dev/pci/drm/i915/gt/uc/intel_gsc_binary_headers.h

101

u32 offset;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_binary_headers.h

19

u32 offset;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

142

min_size = layout->boot1.offset + layout->boot1.size;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

156

bpdt_header = data + layout->boot1.offset;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

265

u32 offset = i915_ggtt_offset(gsc->local);

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

273

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

274

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

395

u64 offset;

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

406

offset = i915_ggtt_offset(vma);

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

417

offset,

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

419

offset + GSC_VER_PKT_SZ,

sys/dev/pci/drm/i915/gt/uc/intel_gsc_fw.c

70

return entry->offset & INTEL_GSC_CPD_ENTRY_OFFSET_MASK;

sys/dev/pci/drm/i915/gt/uc/intel_guc.c

266

u32 offset, flags;

sys/dev/pci/drm/i915/gt/uc/intel_guc.c

270

offset = intel_guc_ggtt_offset(guc, log->vma) >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gt/uc/intel_guc.c

279

(offset << GUC_LOG_BUF_ADDR_SHIFT);

sys/dev/pci/drm/i915/gt/uc/intel_guc.h

419

u32 offset = i915_ggtt_offset(vma);

sys/dev/pci/drm/i915/gt/uc/intel_guc.h

421

GEM_BUG_ON(offset < i915_ggtt_pin_bias(vma));

sys/dev/pci/drm/i915/gt/uc/intel_guc.h

422

GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));

sys/dev/pci/drm/i915/gt/uc/intel_guc.h

424

return offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

1073

size_t offset = offsetof(struct __guc_ads_blob,

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

1076

return IOSYS_MAP_INIT_OFFSET(&guc->ads_map, offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

117

u32 offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

119

offset = guc_ads_regset_offset(guc) +

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

122

return PAGE_ALIGN(offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

127

u32 offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

129

offset = guc_ads_golden_ctxt_offset(guc) +

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

132

return PAGE_ALIGN(offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

137

u32 offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

139

offset = guc_ads_waklv_offset(guc) +

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

142

return PAGE_ALIGN(offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

147

u32 offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

149

offset = guc_ads_capture_offset(guc) +

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

152

return PAGE_ALIGN(offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

270

return (int)ra->offset - (int)rb->offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

315

u32 offset, u32 flags)

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

319

.offset = offset,

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

339

GEM_BUG_ON(slot[0].offset == slot[1].offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

340

if (slot[1].offset > slot[0].offset)

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

482

u32 addr_ggtt, offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

484

offset = guc_ads_regset_offset(guc);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

485

addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

487

iosys_map_memcpy_to(&guc->ads_map, offset, guc->ads_regset,

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

544

u32 addr_ggtt, offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

563

offset = guc_ads_golden_ctxt_offset(guc);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

564

addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

634

unsigned long offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

647

offset = guc_ads_golden_ctxt_offset(guc);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

648

addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

675

offset, real_size);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

676

offset += alloc_size;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

830

static void guc_waklv_enable_simple(struct intel_guc *guc, u32 *offset, u32 *remain, u32 klv_id)

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

843

iosys_map_memcpy_to(&guc->ads_map, *offset, klv_entry, size);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

844

*offset += size;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

851

u32 offset, addr_ggtt, remain, size;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

860

offset = guc_ads_waklv_offset(guc);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

865

guc_waklv_enable_simple(guc, &offset, &remain,

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

867

guc_waklv_enable_simple(guc, &offset, &remain,

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

876

guc_waklv_enable_simple(guc, &offset, &remain,

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

883

offset = guc_ads_waklv_offset(guc);

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

884

addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

1360

u32 class, u32 id, u32 offset, u32 *is_ext)

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

1377

if (offset == match->list[j].reg.reg)

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

1385

if (offset == matchext->extlist[j].reg.reg) {

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

1483

node->eng_class, 0, regs[j].offset, &is_ext);

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

1485

i915_error_printf(ebuf, " REG-0x%08x", regs[j].offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

1515

if (regs[i].offset == reg_ipehr.reg)

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

1517

else if (regs[i].offset == reg_instdone.reg)

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

429

ptr[i].offset = match->list[i].reg.reg;

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

440

ptr[i].offset = matchext->extlist[j].reg.reg;

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

874

read += guc_capture_log_remove_dw(guc, buf, &reg->offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_fwif.h

371

u32 offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_log.c

375

size_t offset = PAGE_SIZE;/* for the log_buffer_states */

sys/dev/pci/drm/i915/gt/uc/intel_guc_log.c

380

offset += intel_guc_get_log_buffer_size(log, i);

sys/dev/pci/drm/i915/gt/uc/intel_guc_log.c

383

return offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

177

static int guc_action_slpc_query(struct intel_guc *guc, u32 offset)

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

182

offset,

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

195

u32 offset = intel_guc_ggtt_offset(guc, slpc->vma);

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

198

ret = guc_action_slpc_query(guc, offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

332

static int guc_action_slpc_reset(struct intel_guc *guc, u32 offset)

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

337

offset,

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

350

u32 offset = intel_guc_ggtt_offset(guc, slpc->vma);

sys/dev/pci/drm/i915/gt/uc/intel_guc_slpc.c

353

ret = guc_action_slpc_reset(guc, offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

1590

u32 offset = intel_guc_engine_usage_offset(guc);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

1593

offset,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2460

u32 offset,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2472

action[len++] = offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2474

offset += sizeof(struct guc_lrc_desc_v69);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2475

action[len++] = offset;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2526

u32 offset,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2532

offset,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2569

u32 offset = intel_guc_ggtt_offset(guc, guc->lrc_desc_pool_v69) +

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2576

offset, loop);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2579

offset, loop);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

4204

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

4207

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

5639

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

5676

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

5677

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

5686

u64 offset, u32 len,

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

5721

*cs++ = lower_32_bits(offset);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

5722

*cs++ = upper_32_bits(offset);

sys/dev/pci/drm/i915/gt/uc/intel_huc_fw.c

127

return entry->offset & INTEL_GSC_CPD_ENTRY_OFFSET_MASK;

sys/dev/pci/drm/i915/gt/uc/intel_huc_fw.c

224

u32 offset = entry_offset(entry);

sys/dev/pci/drm/i915/gt/uc/intel_huc_fw.c

226

if (offset < size && css_valid(data + offset, size - offset))

sys/dev/pci/drm/i915/gt/uc/intel_huc_fw.c

227

huc_fw->dma_start_offset = offset;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1019

u32 offset = uc_fw->type * INTEL_UC_RSVD_GGTT_PER_FW;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1031

offset += SZ_8M;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1036

GEM_BUG_ON(offset + uc_fw->obj->base.size > node->size);

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1039

return lower_32_bits(node->start + offset);

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1092

u64 offset;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1102

offset = uc_fw->vma_res.start + uc_fw->dma_start_offset;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1103

GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000);

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1104

intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset));

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1105

intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset));

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1341

u32 offset = uc_fw->dma_start_offset + sizeof(struct uc_css_header) + uc_fw->ucode_size;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1349

idx = offset >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1350

offset = offset_in_page(offset);

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1355

u32 len = min_t(u32, size, PAGE_SIZE - offset);

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1362

memcpy_from_page(dst, page, offset, len);

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1364

offset = 0;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1375

u32 len = min_t(u32, size, PAGE_SIZE - offset);

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1385

memcpy_fromio(dst, vaddr + offset, len);

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1388

offset = 0;

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.h

306

int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 offset, u32 dma_flags);

sys/dev/pci/drm/i915/gvt/cfg_space.c

117

int intel_vgpu_emulate_cfg_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/cfg_space.c

126

offset + bytes > vgpu->gvt->device_info.cfg_space_size))

sys/dev/pci/drm/i915/gvt/cfg_space.c

129

memcpy(p_data, vgpu_cfg_space(vgpu) + offset, bytes);

sys/dev/pci/drm/i915/gvt/cfg_space.c

146

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/cfg_space.c

148

u8 old = vgpu_cfg_space(vgpu)[offset];

sys/dev/pci/drm/i915/gvt/cfg_space.c

152

vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/cfg_space.c

168

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/cfg_space.c

170

u32 *pval = (u32 *)(vgpu_cfg_space(vgpu) + offset);

sys/dev/pci/drm/i915/gvt/cfg_space.c

177

vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/cfg_space.c

181

static void emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/cfg_space.c

185

bool lo = IS_ALIGNED(offset, 8);

sys/dev/pci/drm/i915/gvt/cfg_space.c

199

switch (offset) {

sys/dev/pci/drm/i915/gvt/cfg_space.c

203

intel_vgpu_write_pci_bar(vgpu, offset,

sys/dev/pci/drm/i915/gvt/cfg_space.c

214

intel_vgpu_write_pci_bar(vgpu, offset,

sys/dev/pci/drm/i915/gvt/cfg_space.c

220

intel_vgpu_write_pci_bar(vgpu, offset, 0x0, false);

sys/dev/pci/drm/i915/gvt/cfg_space.c

223

switch (offset) {

sys/dev/pci/drm/i915/gvt/cfg_space.c

231

intel_vgpu_write_pci_bar(vgpu, offset, new, lo);

sys/dev/pci/drm/i915/gvt/cfg_space.c

237

intel_vgpu_write_pci_bar(vgpu, offset, new, lo);

sys/dev/pci/drm/i915/gvt/cfg_space.c

241

intel_vgpu_write_pci_bar(vgpu, offset, new, lo);

sys/dev/pci/drm/i915/gvt/cfg_space.c

256

int intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/cfg_space.c

266

offset + bytes > vgpu->gvt->device_info.cfg_space_size))

sys/dev/pci/drm/i915/gvt/cfg_space.c

270

if (IS_ALIGNED(offset, 2) && offset == PCI_COMMAND) {

sys/dev/pci/drm/i915/gvt/cfg_space.c

273

return emulate_pci_command_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/cfg_space.c

276

switch (rounddown(offset, 4)) {

sys/dev/pci/drm/i915/gvt/cfg_space.c

278

if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, 4)))

sys/dev/pci/drm/i915/gvt/cfg_space.c

280

return emulate_pci_rom_bar_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/cfg_space.c

283

if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, 4)))

sys/dev/pci/drm/i915/gvt/cfg_space.c

285

emulate_pci_bar_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/cfg_space.c

288

if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, 4)))

sys/dev/pci/drm/i915/gvt/cfg_space.c

296

if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, 4)))

sys/dev/pci/drm/i915/gvt/cfg_space.c

303

vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/cfg_space.c

306

vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1017

intel_gvt_mmio_is_sr_in_ctx(gvt, offset) &&

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1025

if (intel_gvt_mmio_has_mode_mask(s->vgpu->gvt, offset))

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1027

offset, &data, 4);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1029

vgpu_vreg(vgpu, offset) = data;

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1770

unsigned long copy_len, offset;

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1781

offset = gma & (I915_GTT_PAGE_SIZE - 1);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1783

copy_len = (end_gma - gma) >= (I915_GTT_PAGE_SIZE - offset) ?

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1784

I915_GTT_PAGE_SIZE - offset : end_gma - gma;

sys/dev/pci/drm/i915/gvt/cmd_parser.c

847

static inline bool is_mocs_mmio(unsigned int offset)

sys/dev/pci/drm/i915/gvt/cmd_parser.c

849

return ((offset >= 0xc800) && (offset <= 0xcff8)) ||

sys/dev/pci/drm/i915/gvt/cmd_parser.c

850

((offset >= 0xb020) && (offset <= 0xb0a0));

sys/dev/pci/drm/i915/gvt/cmd_parser.c

853

static int is_cmd_update_pdps(unsigned int offset,

sys/dev/pci/drm/i915/gvt/cmd_parser.c

857

return i915_mmio_reg_equal(_MMIO(offset), GEN8_RING_PDP_UDW(base, 0));

sys/dev/pci/drm/i915/gvt/cmd_parser.c

861

unsigned int offset, unsigned int index)

sys/dev/pci/drm/i915/gvt/cmd_parser.c

895

unsigned int offset, unsigned int index, char *cmd)

sys/dev/pci/drm/i915/gvt/cmd_parser.c

902

if (offset + 4 > gvt->device_info.mmio_size) {

sys/dev/pci/drm/i915/gvt/cmd_parser.c

904

cmd, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

911

intel_gvt_mmio_set_cmd_accessible(gvt, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

912

mmio_info = intel_gvt_find_mmio_info(gvt, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

914

intel_gvt_mmio_set_cmd_write_patch(gvt, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

918

if (!intel_gvt_mmio_is_cmd_accessible(gvt, offset)) {

sys/dev/pci/drm/i915/gvt/cmd_parser.c

920

cmd, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

926

if (offset == i915_mmio_reg_offset(GEN8_L3SQCREG4) ||

sys/dev/pci/drm/i915/gvt/cmd_parser.c

927

offset == 0x21f0 ||

sys/dev/pci/drm/i915/gvt/cmd_parser.c

929

offset == i915_mmio_reg_offset(INSTPM)))

sys/dev/pci/drm/i915/gvt/cmd_parser.c

933

cmd, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

940

if (IS_BROADWELL(gvt->gt->i915) && offset == 0x215c)

sys/dev/pci/drm/i915/gvt/cmd_parser.c

943

gvt_vgpu_err("not allowed cmd %s reg (%x)\n", cmd, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

957

vreg = &vgpu_vreg(s->vgpu, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

959

if (is_cmd_update_pdps(offset, s) &&

sys/dev/pci/drm/i915/gvt/cmd_parser.c

960

cmd_pdp_mmio_update_handler(s, offset, index))

sys/dev/pci/drm/i915/gvt/cmd_parser.c

963

if (offset == i915_mmio_reg_offset(DERRMR) ||

sys/dev/pci/drm/i915/gvt/cmd_parser.c

964

offset == i915_mmio_reg_offset(FORCEWAKE_MT)) {

sys/dev/pci/drm/i915/gvt/cmd_parser.c

969

if (is_mocs_mmio(offset))

sys/dev/pci/drm/i915/gvt/cmd_parser.c

974

if (intel_gvt_mmio_is_cmd_write_patch(gvt, offset)) {

sys/dev/pci/drm/i915/gvt/cmd_parser.c

980

mmio_info = intel_gvt_find_mmio_info(gvt, offset);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

988

ret = mmio_info->write(s->vgpu, offset,

sys/dev/pci/drm/i915/gvt/cmd_parser.c

992

offset);

sys/dev/pci/drm/i915/gvt/debugfs.c

117

node->offset, node->preg, node->vreg,

sys/dev/pci/drm/i915/gvt/debugfs.c

37

u32 offset;

sys/dev/pci/drm/i915/gvt/debugfs.c

51

if (ma->offset < mb->offset)

sys/dev/pci/drm/i915/gvt/debugfs.c

53

else if (ma->offset > mb->offset)

sys/dev/pci/drm/i915/gvt/debugfs.c

59

u32 offset, void *data)

sys/dev/pci/drm/i915/gvt/debugfs.c

65

preg = intel_uncore_read_notrace(gvt->gt->uncore, _MMIO(offset));

sys/dev/pci/drm/i915/gvt/debugfs.c

66

vreg = vgpu_vreg(param->vgpu, offset);

sys/dev/pci/drm/i915/gvt/debugfs.c

73

node->offset = offset;

sys/dev/pci/drm/i915/gvt/display.h

67

unsigned int offset;

sys/dev/pci/drm/i915/gvt/dmabuf.c

88

sg->offset = 0;

sys/dev/pci/drm/i915/gvt/edid.c

142

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/edid.c

147

memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);

sys/dev/pci/drm/i915/gvt/edid.c

149

pin_select = vgpu_vreg(vgpu, offset) & _GMBUS_PIN_SEL_MASK;

sys/dev/pci/drm/i915/gvt/edid.c

181

static int gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/edid.c

188

if (vgpu_vreg(vgpu, offset) & GMBUS_SW_CLR_INT) {

sys/dev/pci/drm/i915/gvt/edid.c

190

vgpu_vreg(vgpu, offset) &= ~GMBUS_SW_CLR_INT;

sys/dev/pci/drm/i915/gvt/edid.c

243

if (gmbus1_bus_cycle(vgpu_vreg(vgpu, offset))

sys/dev/pci/drm/i915/gvt/edid.c

277

vgpu_vreg(vgpu, offset) = wvalue;

sys/dev/pci/drm/i915/gvt/edid.c

282

static int gmbus3_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/edid.c

291

static int gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/edid.c

305

memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);

sys/dev/pci/drm/i915/gvt/edid.c

316

memcpy(&vgpu_vreg(vgpu, offset), &reg_data, byte_count);

sys/dev/pci/drm/i915/gvt/edid.c

317

memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);

sys/dev/pci/drm/i915/gvt/edid.c

338

memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);

sys/dev/pci/drm/i915/gvt/edid.c

344

static int gmbus2_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/edid.c

347

u32 value = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/edid.c

349

if (!(vgpu_vreg(vgpu, offset) & GMBUS_INUSE))

sys/dev/pci/drm/i915/gvt/edid.c

350

vgpu_vreg(vgpu, offset) |= GMBUS_INUSE;

sys/dev/pci/drm/i915/gvt/edid.c

355

static int gmbus2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/edid.c

361

vgpu_vreg(vgpu, offset) &= ~GMBUS_INUSE;

sys/dev/pci/drm/i915/gvt/edid.c

380

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/edid.c

384

if (drm_WARN_ON(&i915->drm, bytes > 8 && (offset & (bytes - 1))))

sys/dev/pci/drm/i915/gvt/edid.c

387

if (offset == i915_mmio_reg_offset(PCH_GMBUS2))

sys/dev/pci/drm/i915/gvt/edid.c

388

return gmbus2_mmio_read(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/edid.c

389

else if (offset == i915_mmio_reg_offset(PCH_GMBUS3))

sys/dev/pci/drm/i915/gvt/edid.c

390

return gmbus3_mmio_read(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/edid.c

392

memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);

sys/dev/pci/drm/i915/gvt/edid.c

410

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/edid.c

414

if (drm_WARN_ON(&i915->drm, bytes > 8 && (offset & (bytes - 1))))

sys/dev/pci/drm/i915/gvt/edid.c

417

if (offset == i915_mmio_reg_offset(PCH_GMBUS0))

sys/dev/pci/drm/i915/gvt/edid.c

418

return gmbus0_mmio_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/edid.c

419

else if (offset == i915_mmio_reg_offset(PCH_GMBUS1))

sys/dev/pci/drm/i915/gvt/edid.c

420

return gmbus1_mmio_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/edid.c

421

else if (offset == i915_mmio_reg_offset(PCH_GMBUS2))

sys/dev/pci/drm/i915/gvt/edid.c

422

return gmbus2_mmio_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/edid.c

423

else if (offset == i915_mmio_reg_offset(PCH_GMBUS3))

sys/dev/pci/drm/i915/gvt/edid.c

424

return gmbus3_mmio_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/edid.c

426

memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);

sys/dev/pci/drm/i915/gvt/edid.c

439

static inline int get_aux_ch_reg(unsigned int offset)

sys/dev/pci/drm/i915/gvt/edid.c

443

switch (offset & 0xff) {

sys/dev/pci/drm/i915/gvt/edid.c

481

unsigned int offset,

sys/dev/pci/drm/i915/gvt/edid.c

490

int reg = get_aux_ch_reg(offset);

sys/dev/pci/drm/i915/gvt/edid.c

493

vgpu_vreg(vgpu, offset) = value;

sys/dev/pci/drm/i915/gvt/edid.c

500

msg = vgpu_vreg(vgpu, offset + 4);

sys/dev/pci/drm/i915/gvt/edid.c

511

vgpu_vreg(vgpu, offset) =

sys/dev/pci/drm/i915/gvt/edid.c

560

vgpu_vreg(vgpu, offset + 4) = aux_data_for_write;

sys/dev/pci/drm/i915/gvt/edid.h

136

unsigned int offset, void *p_data, unsigned int bytes);

sys/dev/pci/drm/i915/gvt/edid.h

139

unsigned int offset, void *p_data, unsigned int bytes);

sys/dev/pci/drm/i915/gvt/edid.h

143

unsigned int offset,

sys/dev/pci/drm/i915/gvt/execlist.c

131

u32 ctx_status_ptr_reg, ctx_status_buf_reg, offset;

sys/dev/pci/drm/i915/gvt/execlist.c

150

offset = ctx_status_buf_reg + write_pointer * 8;

sys/dev/pci/drm/i915/gvt/execlist.c

152

vgpu_vreg(vgpu, offset) = status->ldw;

sys/dev/pci/drm/i915/gvt/execlist.c

153

vgpu_vreg(vgpu, offset + 4) = status->udw;

sys/dev/pci/drm/i915/gvt/execlist.c

171

vgpu->id, write_pointer, offset, status->ldw, status->udw);

sys/dev/pci/drm/i915/gvt/execlist.c

42

#define execlist_ring_mmio(e, offset) ((e)->mmio_base + (offset))

sys/dev/pci/drm/i915/gvt/gtt.c

2180

if (g_gtt_index == pos->offset >>

sys/dev/pci/drm/i915/gvt/gtt.c

2182

if (off != pos->offset) {

sys/dev/pci/drm/i915/gvt/gtt.c

2184

int last_off = pos->offset &

sys/dev/pci/drm/i915/gvt/gtt.c

2209

partial_pte->offset = off;

sys/dev/pci/drm/i915/gvt/gtt.c

2450

pos->offset, pos->data);

sys/dev/pci/drm/i915/gvt/gtt.c

2771

u32 idx, num_low, num_hi, offset;

sys/dev/pci/drm/i915/gvt/gtt.c

2778

offset = vgpu_aperture_gmadr_base(vgpu) >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gvt/gtt.c

2782

write_pte64(vgpu->gvt->gt->ggtt, offset + idx, pte);

sys/dev/pci/drm/i915/gvt/gtt.c

2786

offset = vgpu_hidden_gmadr_base(vgpu) >> PAGE_SHIFT;

sys/dev/pci/drm/i915/gvt/gtt.c

2790

write_pte64(vgpu->gvt->gt->ggtt, offset + idx, pte);

sys/dev/pci/drm/i915/gvt/gtt.c

567

unsigned long offset = index;

sys/dev/pci/drm/i915/gvt/gtt.c

572

offset -= (vgpu_aperture_gmadr_base(mm->vgpu) >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gvt/gtt.c

573

mm->ggtt_mm.host_ggtt_aperture[offset] = entry->val64;

sys/dev/pci/drm/i915/gvt/gtt.c

575

offset -= (vgpu_hidden_gmadr_base(mm->vgpu) >> PAGE_SHIFT);

sys/dev/pci/drm/i915/gvt/gtt.c

576

mm->ggtt_mm.host_ggtt_hidden[offset] = entry->val64;

sys/dev/pci/drm/i915/gvt/gtt.h

144

unsigned long offset;

sys/dev/pci/drm/i915/gvt/gvt.h

256

i915_reg_t offset;

sys/dev/pci/drm/i915/gvt/gvt.h

461

#define vgpu_vreg(vgpu, offset) \

sys/dev/pci/drm/i915/gvt/gvt.h

462

(*(u32 *)(vgpu->mmio.vreg + (offset)))

sys/dev/pci/drm/i915/gvt/gvt.h

465

#define vgpu_vreg64(vgpu, offset) \

sys/dev/pci/drm/i915/gvt/gvt.h

466

(*(u64 *)(vgpu->mmio.vreg + (offset)))

sys/dev/pci/drm/i915/gvt/gvt.h

473

u32 offset, u32 val, bool low)

sys/dev/pci/drm/i915/gvt/gvt.h

478

offset = rounddown(offset, 4);

sys/dev/pci/drm/i915/gvt/gvt.h

479

pval = (u32 *)(vgpu_cfg_space(vgpu) + offset);

sys/dev/pci/drm/i915/gvt/gvt.h

541

int intel_vgpu_emulate_cfg_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/gvt.h

544

int intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/gvt.h

591

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

593

gvt->mmio.mmio_attribute[offset >> 2] |= F_ACCESSED;

sys/dev/pci/drm/i915/gvt/gvt.h

605

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

607

return gvt->mmio.mmio_attribute[offset >> 2] & F_CMD_ACCESS;

sys/dev/pci/drm/i915/gvt/gvt.h

618

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

620

gvt->mmio.mmio_attribute[offset >> 2] |= F_CMD_ACCESS;

sys/dev/pci/drm/i915/gvt/gvt.h

630

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

632

return gvt->mmio.mmio_attribute[offset >> 2] & F_UNALIGN;

sys/dev/pci/drm/i915/gvt/gvt.h

645

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

647

return gvt->mmio.mmio_attribute[offset >> 2] & F_MODE_MASK;

sys/dev/pci/drm/i915/gvt/gvt.h

661

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

663

return gvt->mmio.mmio_attribute[offset >> 2] & F_SR_IN_CTX;

sys/dev/pci/drm/i915/gvt/gvt.h

675

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

677

gvt->mmio.mmio_attribute[offset >> 2] |= F_SR_IN_CTX;

sys/dev/pci/drm/i915/gvt/gvt.h

690

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

692

gvt->mmio.mmio_attribute[offset >> 2] |= F_CMD_WRITE_PATCH;

sys/dev/pci/drm/i915/gvt/gvt.h

705

struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/gvt.h

707

return gvt->mmio.mmio_attribute[offset >> 2] & F_CMD_WRITE_PATCH;

sys/dev/pci/drm/i915/gvt/handlers.c

100

static void read_vreg(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1002

vgpu_vreg(vgpu, offset) &= ~ADPA_CRT_HOTPLUG_FORCE_TRIGGER;

sys/dev/pci/drm/i915/gvt/handlers.c

1007

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1011

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1012

data = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1015

vgpu_vreg(vgpu, offset) |= FDI_MPHY_IOSFSB_RESET_STATUS;

sys/dev/pci/drm/i915/gvt/handlers.c

1017

vgpu_vreg(vgpu, offset) &= ~FDI_MPHY_IOSFSB_RESET_STATUS;

sys/dev/pci/drm/i915/gvt/handlers.c

1021

#define DSPSURF_TO_PIPE(display, offset) \

sys/dev/pci/drm/i915/gvt/handlers.c

1022

calc_index(offset, DSPSURF(display, PIPE_A), DSPSURF(display, PIPE_B), DSPSURF(display, PIPE_C))

sys/dev/pci/drm/i915/gvt/handlers.c

1024

static int pri_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1029

u32 pipe = DSPSURF_TO_PIPE(display, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

103

memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1032

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1033

vgpu_vreg_t(vgpu, DSPSURFLIVE(display, pipe)) = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1045

#define SPRSURF_TO_PIPE(offset) \

sys/dev/pci/drm/i915/gvt/handlers.c

1046

calc_index(offset, SPRSURF(PIPE_A), SPRSURF(PIPE_B), SPRSURF(PIPE_C))

sys/dev/pci/drm/i915/gvt/handlers.c

1048

static int spr_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1051

u32 pipe = SPRSURF_TO_PIPE(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1054

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1055

vgpu_vreg_t(vgpu, SPRSURFLIVE(pipe)) = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

106

static void write_vreg(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1066

unsigned int offset, void *p_data,

sys/dev/pci/drm/i915/gvt/handlers.c

1071

enum pipe pipe = REG_50080_TO_PIPE(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1072

enum plane_id plane = REG_50080_TO_PLANE(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1075

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1077

vgpu_vreg_t(vgpu, DSPSURFLIVE(display, pipe)) = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1080

vgpu_vreg_t(vgpu, SPRSURFLIVE(pipe)) = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1083

if ((vgpu_vreg(vgpu, offset) & REG50080_FLIP_TYPE_MASK) == REG50080_FLIP_TYPE_ASYNC)

sys/dev/pci/drm/i915/gvt/handlers.c

109

memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

113

unsigned int offset)

sys/dev/pci/drm/i915/gvt/handlers.c

117

hash_for_each_possible(gvt->mmio.mmio_info_table, e, node, offset) {

sys/dev/pci/drm/i915/gvt/handlers.c

1176

#define OFFSET_TO_DP_AUX_PORT(offset) (((offset) & 0xF00) >> 8)

sys/dev/pci/drm/i915/gvt/handlers.c

118

if (e->offset == offset)

sys/dev/pci/drm/i915/gvt/handlers.c

1182

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1186

int port_index = OFFSET_TO_DP_AUX_PORT(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1196

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1197

data = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1200

offset != i915_mmio_reg_offset(DP_AUX_CH_CTL(port_index))) {

sys/dev/pci/drm/i915/gvt/handlers.c

1204

offset != i915_mmio_reg_offset(port_index ?

sys/dev/pci/drm/i915/gvt/handlers.c

1213

vgpu_vreg(vgpu, offset) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1221

msg = vgpu_vreg(vgpu, offset + 4);

sys/dev/pci/drm/i915/gvt/handlers.c

124

static int setup_mmio_info(struct intel_gvt *gvt, u32 offset, u32 size,

sys/dev/pci/drm/i915/gvt/handlers.c

1241

vgpu_vreg(vgpu, offset + 4) = AUX_NATIVE_REPLY_NAK;

sys/dev/pci/drm/i915/gvt/handlers.c

1242

dp_aux_ch_ctl_trans_done(vgpu, data, offset, 2, true);

sys/dev/pci/drm/i915/gvt/handlers.c

1258

u32 r = vgpu_vreg(vgpu, offset + 8 + t * 4);

sys/dev/pci/drm/i915/gvt/handlers.c

1280

vgpu_vreg(vgpu, offset + 4) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1281

dp_aux_ch_ctl_trans_done(vgpu, data, offset, 1,

sys/dev/pci/drm/i915/gvt/handlers.c

1299

vgpu_vreg(vgpu, offset + 4) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1300

vgpu_vreg(vgpu, offset + 8) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1301

vgpu_vreg(vgpu, offset + 12) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1302

vgpu_vreg(vgpu, offset + 16) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1303

vgpu_vreg(vgpu, offset + 20) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1305

dp_aux_ch_ctl_trans_done(vgpu, data, offset, len + 2,

sys/dev/pci/drm/i915/gvt/handlers.c

1312

vgpu_vreg(vgpu, offset + 4 * idx) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1334

vgpu_vreg(vgpu, offset +

sys/dev/pci/drm/i915/gvt/handlers.c

134

if (WARN_ON(!IS_ALIGNED(offset, 4)))

sys/dev/pci/drm/i915/gvt/handlers.c

1340

dp_aux_ch_ctl_trans_done(vgpu, data, offset, len + 2,

sys/dev/pci/drm/i915/gvt/handlers.c

1346

intel_gvt_i2c_handle_aux_ch_write(vgpu, port_index, offset, p_data);

sys/dev/pci/drm/i915/gvt/handlers.c

1349

trigger_aux_channel_interrupt(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1353

static int mbctl_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1357

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1361

static int vga_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1366

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1367

vga_disable = vgpu_vreg(vgpu, offset) & VGA_DISP_DISABLE;

sys/dev/pci/drm/i915/gvt/handlers.c

137

start = offset;

sys/dev/pci/drm/i915/gvt/handlers.c

138

end = offset + size;

sys/dev/pci/drm/i915/gvt/handlers.c

1382

if (display->sbi.registers[i].offset == sbi_offset)

sys/dev/pci/drm/i915/gvt/handlers.c

1392

unsigned int offset, u32 value)

sys/dev/pci/drm/i915/gvt/handlers.c

1399

if (display->sbi.registers[i].offset == offset)

sys/dev/pci/drm/i915/gvt/handlers.c

1411

display->sbi.registers[i].offset = offset;

sys/dev/pci/drm/i915/gvt/handlers.c

1415

static int sbi_data_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1423

vgpu_vreg(vgpu, offset) = read_virtual_sbi_register(vgpu, sbi_offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1425

read_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1429

static int sbi_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1434

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1435

data = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1443

vgpu_vreg(vgpu, offset) = data;

sys/dev/pci/drm/i915/gvt/handlers.c

1458

static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1463

read_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1465

switch (offset) {

sys/dev/pci/drm/i915/gvt/handlers.c

1467

if (offset + bytes > _vgtif_reg(vgt_id) + 4)

sys/dev/pci/drm/i915/gvt/handlers.c

1472

if (offset + bytes >

sys/dev/pci/drm/i915/gvt/handlers.c

1485

offset, bytes, *(u32 *)p_data);

sys/dev/pci/drm/i915/gvt/handlers.c

1534

static int pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1540

switch (offset) {

sys/dev/pci/drm/i915/gvt/handlers.c

1568

offset, bytes, data);

sys/dev/pci/drm/i915/gvt/handlers.c

1573

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1579

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1584

if ((offset == _PS_1A_CTRL || offset == _PS_2A_CTRL ||

sys/dev/pci/drm/i915/gvt/handlers.c

1585

offset == _PS_1B_CTRL || offset == _PS_2B_CTRL ||

sys/dev/pci/drm/i915/gvt/handlers.c

1586

offset == _PS_1C_CTRL) && (val & PS_BINDING_MASK) != PS_BINDING_PIPE) {

sys/dev/pci/drm/i915/gvt/handlers.c

1593

return intel_vgpu_default_mmio_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1597

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1599

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1601

if (vgpu_vreg(vgpu, offset) &

sys/dev/pci/drm/i915/gvt/handlers.c

1603

vgpu_vreg(vgpu, offset) |=

sys/dev/pci/drm/i915/gvt/handlers.c

1606

vgpu_vreg(vgpu, offset) &=

sys/dev/pci/drm/i915/gvt/handlers.c

1612

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1614

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1616

if (vgpu_vreg(vgpu, offset) & DBUF_POWER_REQUEST)

sys/dev/pci/drm/i915/gvt/handlers.c

1617

vgpu_vreg(vgpu, offset) |= DBUF_POWER_STATE;

sys/dev/pci/drm/i915/gvt/handlers.c

1619

vgpu_vreg(vgpu, offset) &= ~DBUF_POWER_STATE;

sys/dev/pci/drm/i915/gvt/handlers.c

1625

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1627

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1629

if (vgpu_vreg(vgpu, offset) & FPGA_DBG_RM_NOCLAIM)

sys/dev/pci/drm/i915/gvt/handlers.c

1630

vgpu_vreg(vgpu, offset) &= ~FPGA_DBG_RM_NOCLAIM;

sys/dev/pci/drm/i915/gvt/handlers.c

1634

static int dma_ctrl_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1640

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1641

mode = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1653

static int gen9_trtte_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

166

intel_gvt_render_mmio_to_engine(struct intel_gvt *gvt, unsigned int offset)

sys/dev/pci/drm/i915/gvt/handlers.c

1665

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1670

static int gen9_trtt_chicken_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1673

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1677

static int dpll_status_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1694

vgpu_vreg(vgpu, offset) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1696

return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1699

static int mailbox_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

171

offset &= ~GENMASK(11, 0);

sys/dev/pci/drm/i915/gvt/handlers.c

173

if (engine->mmio_base == offset)

sys/dev/pci/drm/i915/gvt/handlers.c

1754

return intel_vgpu_default_mmio_write(vgpu, offset, &value, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1757

static int hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1762

intel_gvt_render_mmio_to_engine(vgpu->gvt, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1767

offset, value);

sys/dev/pci/drm/i915/gvt/handlers.c

1778

offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1783

vgpu->id, value, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1785

return intel_vgpu_default_mmio_write(vgpu, offset, &value, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1789

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

179

#define offset_to_fence_num(offset) \

sys/dev/pci/drm/i915/gvt/handlers.c

180

((offset - i915_mmio_reg_offset(FENCE_REG_GEN6_LO(0))) >> 3)

sys/dev/pci/drm/i915/gvt/handlers.c

1800

return intel_vgpu_default_mmio_write(vgpu, offset, &v, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1803

static int skl_lcpll_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1812

vgpu_vreg(vgpu, offset) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1818

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1825

vgpu_vreg(vgpu, offset) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1831

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1838

vgpu_vreg(vgpu, offset) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1844

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1849

switch (offset) {

sys/dev/pci/drm/i915/gvt/handlers.c

1859

vgpu_vreg(vgpu, offset) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1865

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1867

u32 v = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1871

vgpu_vreg(vgpu, offset) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1873

return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1877

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1881

if (offset == _PORT_PCS_DW12_GRP_A || offset == _PORT_PCS_DW12_GRP_B) {

sys/dev/pci/drm/i915/gvt/handlers.c

1882

vgpu_vreg(vgpu, offset - 0x600) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1883

vgpu_vreg(vgpu, offset - 0x800) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1885

vgpu_vreg(vgpu, offset - 0x400) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1886

vgpu_vreg(vgpu, offset - 0x600) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1889

vgpu_vreg(vgpu, offset) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1895

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1914

vgpu_vreg(vgpu, offset) = v;

sys/dev/pci/drm/i915/gvt/handlers.c

1920

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1922

vgpu_vreg(vgpu, offset) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

1936

static int bxt_ppat_low_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1949

vgpu_vreg(vgpu, offset) = lower_32_bits(pat);

sys/dev/pci/drm/i915/gvt/handlers.c

1955

unsigned int offset, void *p_data,

sys/dev/pci/drm/i915/gvt/handlers.c

1959

read_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1960

vgpu_vreg(vgpu, offset) &= ~GS_MIA_IN_RESET;

sys/dev/pci/drm/i915/gvt/handlers.c

1965

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

1969

intel_gvt_render_mmio_to_engine(gvt, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

1980

offset == i915_mmio_reg_offset(RING_TIMESTAMP(engine->mmio_base)) ||

sys/dev/pci/drm/i915/gvt/handlers.c

1981

offset == i915_mmio_reg_offset(RING_TIMESTAMP_UDW(engine->mmio_base))) {

sys/dev/pci/drm/i915/gvt/handlers.c

1985

vgpu_vreg(vgpu, offset) =

sys/dev/pci/drm/i915/gvt/handlers.c

1986

intel_uncore_read(gvt->gt->uncore, _MMIO(offset));

sys/dev/pci/drm/i915/gvt/handlers.c

1990

return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

1993

static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

1997

const struct intel_engine_cs *engine = intel_gvt_render_mmio_to_engine(vgpu->gvt, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

2035

static int ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

2040

intel_gvt_render_mmio_to_engine(vgpu->gvt, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

2048

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

2095

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

2099

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

2100

vgpu_vreg(vgpu, offset) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

2102

switch (offset) {

sys/dev/pci/drm/i915/gvt/handlers.c

2127

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

2131

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

2132

data = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

2139

vgpu_vreg(vgpu, offset) = data;

sys/dev/pci/drm/i915/gvt/handlers.c

2144

unsigned int offset, void *p_data,

sys/dev/pci/drm/i915/gvt/handlers.c

2150

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

229

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

249

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

2825

unsigned int offset)

sys/dev/pci/drm/i915/gvt/handlers.c

2832

if (offset >= i915_mmio_reg_offset(block->offset) &&

sys/dev/pci/drm/i915/gvt/handlers.c

2833

offset < i915_mmio_reg_offset(block->offset) + block->size)

sys/dev/pci/drm/i915/gvt/handlers.c

2864

static int handle_mmio(struct intel_gvt_mmio_table_iter *iter, u32 offset,

sys/dev/pci/drm/i915/gvt/handlers.c

2871

if (WARN_ON(!IS_ALIGNED(offset, 4)))

sys/dev/pci/drm/i915/gvt/handlers.c

2874

start = offset;

sys/dev/pci/drm/i915/gvt/handlers.c

2875

end = offset + size;

sys/dev/pci/drm/i915/gvt/handlers.c

2893

info->offset = i;

sys/dev/pci/drm/i915/gvt/handlers.c

2897

hash_add(gvt->mmio.mmio_info_table, &info->node, info->offset);

sys/dev/pci/drm/i915/gvt/handlers.c

2904

u32 offset, u32 size)

sys/dev/pci/drm/i915/gvt/handlers.c

292

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

2922

block->offset = _MMIO(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

2930

static int handle_mmio_cb(struct intel_gvt_mmio_table_iter *iter, u32 offset,

sys/dev/pci/drm/i915/gvt/handlers.c

2933

if (size < 1024 || offset == i915_mmio_reg_offset(GEN9_GFX_MOCS(0)))

sys/dev/pci/drm/i915/gvt/handlers.c

2934

return handle_mmio(iter, offset, size);

sys/dev/pci/drm/i915/gvt/handlers.c

2936

return handle_mmio_block(iter, offset, size);

sys/dev/pci/drm/i915/gvt/handlers.c

2957

i915_mmio_reg_offset(gvt->mmio.mmio_block->offset));

sys/dev/pci/drm/i915/gvt/handlers.c

297

old = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

301

switch (offset) {

sys/dev/pci/drm/i915/gvt/handlers.c

3042

int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),

sys/dev/pci/drm/i915/gvt/handlers.c

3050

ret = handler(gvt, e->offset, data);

sys/dev/pci/drm/i915/gvt/handlers.c

3057

if (i915_mmio_reg_offset(block->offset) == VGT_PVINFO_PAGE)

sys/dev/pci/drm/i915/gvt/handlers.c

3061

ret = handler(gvt, i915_mmio_reg_offset(block->offset) + j, data);

sys/dev/pci/drm/i915/gvt/handlers.c

3079

int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

3082

read_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3096

int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

3099

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3113

int intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

3118

old_vreg = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

3119

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3120

mask = vgpu_vreg(vgpu, offset) >> 16;

sys/dev/pci/drm/i915/gvt/handlers.c

3121

vgpu_vreg(vgpu, offset) = (old_vreg & ~mask) |

sys/dev/pci/drm/i915/gvt/handlers.c

3122

(vgpu_vreg(vgpu, offset) & mask);

sys/dev/pci/drm/i915/gvt/handlers.c

313

gvt_vgpu_err("invalid forcewake offset 0x%x\n", offset);

sys/dev/pci/drm/i915/gvt/handlers.c

3138

int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

3154

mmio_block = find_mmio_block(gvt, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

3158

return func(vgpu, offset, pdata, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3165

mmio_info = intel_gvt_find_mmio_info(gvt, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

3167

gvt_dbg_mmio("untracked MMIO %08x len %d\n", offset, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3172

return mmio_info->read(vgpu, offset, pdata, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3178

if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) {

sys/dev/pci/drm/i915/gvt/handlers.c

3179

old_vreg = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

3183

ret = mmio_info->write(vgpu, offset, pdata, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3185

gvt_vgpu_err("try to write RO reg %x\n", offset);

sys/dev/pci/drm/i915/gvt/handlers.c

3191

data |= vgpu_vreg(vgpu, offset) & ro_mask;

sys/dev/pci/drm/i915/gvt/handlers.c

3192

ret = mmio_info->write(vgpu, offset, &data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3196

if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) {

sys/dev/pci/drm/i915/gvt/handlers.c

3197

u32 mask = vgpu_vreg(vgpu, offset) >> 16;

sys/dev/pci/drm/i915/gvt/handlers.c

3199

vgpu_vreg(vgpu, offset) = (old_vreg & ~mask)

sys/dev/pci/drm/i915/gvt/handlers.c

320

vgpu_vreg(vgpu, offset) = new;

sys/dev/pci/drm/i915/gvt/handlers.c

3200

| (vgpu_vreg(vgpu, offset) & mask);

sys/dev/pci/drm/i915/gvt/handlers.c

3208

intel_vgpu_default_mmio_read(vgpu, offset, pdata, bytes) :

sys/dev/pci/drm/i915/gvt/handlers.c

3209

intel_vgpu_default_mmio_write(vgpu, offset, pdata, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

3227

static int mmio_pm_restore_handler(struct intel_gvt *gvt, u32 offset, void *data)

sys/dev/pci/drm/i915/gvt/handlers.c

3232

if (gvt->mmio.mmio_attribute[offset >> 2] & F_PM_SAVE)

sys/dev/pci/drm/i915/gvt/handlers.c

3233

intel_uncore_write(&dev_priv->uncore, _MMIO(offset), vgpu_vreg(vgpu, offset));

sys/dev/pci/drm/i915/gvt/handlers.c

325

static int gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

331

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

332

data = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

369

vgpu_vreg(vgpu, offset) = 0;

sys/dev/pci/drm/i915/gvt/handlers.c

374

static int gmbus_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

377

return intel_gvt_i2c_handle_gmbus_read(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

380

static int gmbus_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

383

return intel_gvt_i2c_handle_gmbus_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

387

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

389

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

391

if (vgpu_vreg(vgpu, offset) & PANEL_POWER_ON) {

sys/dev/pci/drm/i915/gvt/handlers.c

405

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

407

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

409

if (vgpu_vreg(vgpu, offset) & TRANS_ENABLE)

sys/dev/pci/drm/i915/gvt/handlers.c

410

vgpu_vreg(vgpu, offset) |= TRANS_STATE_ENABLE;

sys/dev/pci/drm/i915/gvt/handlers.c

412

vgpu_vreg(vgpu, offset) &= ~TRANS_STATE_ENABLE;

sys/dev/pci/drm/i915/gvt/handlers.c

416

static int lcpll_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

419

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

421

if (vgpu_vreg(vgpu, offset) & LCPLL_PLL_DISABLE)

sys/dev/pci/drm/i915/gvt/handlers.c

422

vgpu_vreg(vgpu, offset) &= ~LCPLL_PLL_LOCK;

sys/dev/pci/drm/i915/gvt/handlers.c

424

vgpu_vreg(vgpu, offset) |= LCPLL_PLL_LOCK;

sys/dev/pci/drm/i915/gvt/handlers.c

426

if (vgpu_vreg(vgpu, offset) & LCPLL_CD_SOURCE_FCLK)

sys/dev/pci/drm/i915/gvt/handlers.c

427

vgpu_vreg(vgpu, offset) |= LCPLL_CD_SOURCE_FCLK_DONE;

sys/dev/pci/drm/i915/gvt/handlers.c

429

vgpu_vreg(vgpu, offset) &= ~LCPLL_CD_SOURCE_FCLK_DONE;

sys/dev/pci/drm/i915/gvt/handlers.c

434

static int dpy_reg_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

437

switch (offset) {

sys/dev/pci/drm/i915/gvt/handlers.c

442

vgpu_vreg(vgpu, offset) = 1 << 17;

sys/dev/pci/drm/i915/gvt/handlers.c

445

vgpu_vreg(vgpu, offset) = 0x3;

sys/dev/pci/drm/i915/gvt/handlers.c

448

vgpu_vreg(vgpu, offset) = 0x2f << 16;

sys/dev/pci/drm/i915/gvt/handlers.c

454

read_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

712

static int pipeconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

717

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

718

data = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

721

vgpu_vreg(vgpu, offset) |= TRANSCONF_STATE_ENABLE;

sys/dev/pci/drm/i915/gvt/handlers.c

725

vgpu_vreg(vgpu, offset) &= ~TRANSCONF_STATE_ENABLE;

sys/dev/pci/drm/i915/gvt/handlers.c

786

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

790

intel_gvt_render_mmio_to_engine(vgpu->gvt, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

792

if (bytes != 4 || !IS_ALIGNED(offset, bytes) || !engine) {

sys/dev/pci/drm/i915/gvt/handlers.c

794

vgpu->id, offset, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

801

vgpu->id, reg_nonpriv, offset);

sys/dev/pci/drm/i915/gvt/handlers.c

803

intel_vgpu_default_mmio_write(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

808

static int ddi_buf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

811

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

813

if (vgpu_vreg(vgpu, offset) & DDI_BUF_CTL_ENABLE) {

sys/dev/pci/drm/i915/gvt/handlers.c

814

vgpu_vreg(vgpu, offset) &= ~DDI_BUF_IS_IDLE;

sys/dev/pci/drm/i915/gvt/handlers.c

816

vgpu_vreg(vgpu, offset) |= DDI_BUF_IS_IDLE;

sys/dev/pci/drm/i915/gvt/handlers.c

817

if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E)))

sys/dev/pci/drm/i915/gvt/handlers.c

825

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

827

vgpu_vreg(vgpu, offset) &= ~*(u32 *)p_data;

sys/dev/pci/drm/i915/gvt/handlers.c

893

static unsigned int calc_index(unsigned int offset, i915_reg_t _start,

sys/dev/pci/drm/i915/gvt/handlers.c

901

if (offset < start || offset > end)

sys/dev/pci/drm/i915/gvt/handlers.c

903

offset -= start;

sys/dev/pci/drm/i915/gvt/handlers.c

904

return offset / stride;

sys/dev/pci/drm/i915/gvt/handlers.c

907

#define FDI_RX_CTL_TO_PIPE(offset) \

sys/dev/pci/drm/i915/gvt/handlers.c

908

calc_index(offset, FDI_RX_CTL(PIPE_A), FDI_RX_CTL(PIPE_B), FDI_RX_CTL(PIPE_C))

sys/dev/pci/drm/i915/gvt/handlers.c

910

#define FDI_TX_CTL_TO_PIPE(offset) \

sys/dev/pci/drm/i915/gvt/handlers.c

911

calc_index(offset, FDI_TX_CTL(PIPE_A), FDI_TX_CTL(PIPE_B), FDI_TX_CTL(PIPE_C))

sys/dev/pci/drm/i915/gvt/handlers.c

913

#define FDI_RX_IMR_TO_PIPE(offset) \

sys/dev/pci/drm/i915/gvt/handlers.c

914

calc_index(offset, FDI_RX_IMR(PIPE_A), FDI_RX_IMR(PIPE_B), FDI_RX_IMR(PIPE_C))

sys/dev/pci/drm/i915/gvt/handlers.c

917

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

923

if (FDI_RX_CTL_TO_PIPE(offset) != INVALID_INDEX)

sys/dev/pci/drm/i915/gvt/handlers.c

924

index = FDI_RX_CTL_TO_PIPE(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

925

else if (FDI_TX_CTL_TO_PIPE(offset) != INVALID_INDEX)

sys/dev/pci/drm/i915/gvt/handlers.c

926

index = FDI_TX_CTL_TO_PIPE(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

927

else if (FDI_RX_IMR_TO_PIPE(offset) != INVALID_INDEX)

sys/dev/pci/drm/i915/gvt/handlers.c

928

index = FDI_RX_IMR_TO_PIPE(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

930

gvt_vgpu_err("Unsupported registers %x\n", offset);

sys/dev/pci/drm/i915/gvt/handlers.c

934

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

950

if (offset == _FDI_RXA_CTL)

sys/dev/pci/drm/i915/gvt/handlers.c

957

#define DP_TP_CTL_TO_PORT(offset) \

sys/dev/pci/drm/i915/gvt/handlers.c

958

calc_index(offset, DP_TP_CTL(PORT_A), DP_TP_CTL(PORT_B), DP_TP_CTL(PORT_E))

sys/dev/pci/drm/i915/gvt/handlers.c

960

static int dp_tp_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/handlers.c

967

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

969

index = DP_TP_CTL_TO_PORT(offset);

sys/dev/pci/drm/i915/gvt/handlers.c

970

data = (vgpu_vreg(vgpu, offset) & GENMASK(10, 8)) >> 8;

sys/dev/pci/drm/i915/gvt/handlers.c

979

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

987

vgpu_vreg(vgpu, offset) = (reg_val & ~sticky_mask) |

sys/dev/pci/drm/i915/gvt/handlers.c

988

(vgpu_vreg(vgpu, offset) & sticky_mask);

sys/dev/pci/drm/i915/gvt/handlers.c

989

vgpu_vreg(vgpu, offset) &= ~(reg_val & sticky_mask);

sys/dev/pci/drm/i915/gvt/handlers.c

994

unsigned int offset, void *p_data, unsigned int bytes)

sys/dev/pci/drm/i915/gvt/handlers.c

998

write_vreg(vgpu, offset, p_data, bytes);

sys/dev/pci/drm/i915/gvt/handlers.c

999

data = vgpu_vreg(vgpu, offset);

sys/dev/pci/drm/i915/gvt/interrupt.c

420

#define MSI_CAP_CONTROL(offset) (offset + 2)

sys/dev/pci/drm/i915/gvt/interrupt.c

421

#define MSI_CAP_ADDRESS(offset) (offset + 4)

sys/dev/pci/drm/i915/gvt/interrupt.c

422

#define MSI_CAP_DATA(offset) (offset + 8)

sys/dev/pci/drm/i915/gvt/interrupt.c

427

unsigned long offset = vgpu->gvt->device_info.msi_cap_offset;

sys/dev/pci/drm/i915/gvt/interrupt.c

431

control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset));

sys/dev/pci/drm/i915/gvt/interrupt.c

432

addr = *(u32 *)(vgpu_cfg_space(vgpu) + MSI_CAP_ADDRESS(offset));

sys/dev/pci/drm/i915/gvt/interrupt.c

433

data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset));

sys/dev/pci/drm/i915/gvt/kvmgt.c

1180

minsz = offsetofend(struct vfio_region_info, offset);

sys/dev/pci/drm/i915/gvt/kvmgt.c

1190

info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);

sys/dev/pci/drm/i915/gvt/kvmgt.c

1196

info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);

sys/dev/pci/drm/i915/gvt/kvmgt.c

1207

info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);

sys/dev/pci/drm/i915/gvt/kvmgt.c

1212

info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);

sys/dev/pci/drm/i915/gvt/kvmgt.c

1228

sparse->areas[0].offset =

sys/dev/pci/drm/i915/gvt/kvmgt.c

1234

info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);

sys/dev/pci/drm/i915/gvt/kvmgt.c

1243

info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);

sys/dev/pci/drm/i915/gvt/kvmgt.c

1265

info.offset =

sys/dev/pci/drm/i915/gvt/kvmgt.c

442

size_t count, u16 offset, bool is_write)

sys/dev/pci/drm/i915/gvt/kvmgt.c

447

if (offset + count > sizeof(*regs))

sys/dev/pci/drm/i915/gvt/kvmgt.c

455

switch (offset) {

sys/dev/pci/drm/i915/gvt/kvmgt.c

483

offset);

sys/dev/pci/drm/i915/gvt/kvmgt.c

487

memcpy(buf, (char *)regs + offset, count);

sys/dev/pci/drm/i915/gvt/kvmgt.c

494

size_t count, u16 offset, bool is_write)

sys/dev/pci/drm/i915/gvt/kvmgt.c

496

if (offset + count > region->vfio_edid_regs.edid_size)

sys/dev/pci/drm/i915/gvt/kvmgt.c

500

memcpy(region->edid_blob + offset, buf, count);

sys/dev/pci/drm/i915/gvt/kvmgt.c

502

memcpy(buf, region->edid_blob + offset, count);

sys/dev/pci/drm/i915/gvt/kvmgt.c

851

int offset;

sys/dev/pci/drm/i915/gvt/kvmgt.c

857

offset = (u64)(*ppos & VFIO_PCI_OFFSET_MASK) -

sys/dev/pci/drm/i915/gvt/kvmgt.c

860

return (offset >= gvt->device_info.gtt_start_offset &&

sys/dev/pci/drm/i915/gvt/kvmgt.c

861

offset < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt)) ?

sys/dev/pci/drm/i915/gvt/mmio.c

114

unsigned int offset = 0;

sys/dev/pci/drm/i915/gvt/mmio.c

123

offset = intel_vgpu_gpa_to_mmio_offset(vgpu, pa);

sys/dev/pci/drm/i915/gvt/mmio.c

128

if (reg_is_gtt(gvt, offset)) {

sys/dev/pci/drm/i915/gvt/mmio.c

129

if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, 4) &&

sys/dev/pci/drm/i915/gvt/mmio.c

130

!IS_ALIGNED(offset, 8)))

sys/dev/pci/drm/i915/gvt/mmio.c

135

!reg_is_gtt(gvt, offset + bytes - 1)))

sys/dev/pci/drm/i915/gvt/mmio.c

138

ret = intel_vgpu_emulate_ggtt_mmio_read(vgpu, offset,

sys/dev/pci/drm/i915/gvt/mmio.c

145

if (drm_WARN_ON_ONCE(&i915->drm, !reg_is_mmio(gvt, offset))) {

sys/dev/pci/drm/i915/gvt/mmio.c

150

if (drm_WARN_ON(&i915->drm, !reg_is_mmio(gvt, offset + bytes - 1)))

sys/dev/pci/drm/i915/gvt/mmio.c

153

if (!intel_gvt_mmio_is_unalign(gvt, offset)) {

sys/dev/pci/drm/i915/gvt/mmio.c

154

if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, bytes)))

sys/dev/pci/drm/i915/gvt/mmio.c

158

ret = intel_vgpu_mmio_reg_rw(vgpu, offset, p_data, bytes, true);

sys/dev/pci/drm/i915/gvt/mmio.c

162

intel_gvt_mmio_set_accessed(gvt, offset);

sys/dev/pci/drm/i915/gvt/mmio.c

168

offset, bytes);

sys/dev/pci/drm/i915/gvt/mmio.c

189

unsigned int offset = 0;

sys/dev/pci/drm/i915/gvt/mmio.c

199

offset = intel_vgpu_gpa_to_mmio_offset(vgpu, pa);

sys/dev/pci/drm/i915/gvt/mmio.c

204

if (reg_is_gtt(gvt, offset)) {

sys/dev/pci/drm/i915/gvt/mmio.c

205

if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, 4) &&

sys/dev/pci/drm/i915/gvt/mmio.c

206

!IS_ALIGNED(offset, 8)))

sys/dev/pci/drm/i915/gvt/mmio.c

211

!reg_is_gtt(gvt, offset + bytes - 1)))

sys/dev/pci/drm/i915/gvt/mmio.c

214

ret = intel_vgpu_emulate_ggtt_mmio_write(vgpu, offset,

sys/dev/pci/drm/i915/gvt/mmio.c

221

if (drm_WARN_ON_ONCE(&i915->drm, !reg_is_mmio(gvt, offset))) {

sys/dev/pci/drm/i915/gvt/mmio.c

226

ret = intel_vgpu_mmio_reg_rw(vgpu, offset, p_data, bytes, false);

sys/dev/pci/drm/i915/gvt/mmio.c

230

intel_gvt_mmio_set_accessed(gvt, offset);

sys/dev/pci/drm/i915/gvt/mmio.c

234

gvt_vgpu_err("fail to emulate MMIO write %08x len %d\n", offset,

sys/dev/pci/drm/i915/gvt/mmio.c

72

unsigned int offset = 0;

sys/dev/pci/drm/i915/gvt/mmio.c

79

offset = intel_vgpu_gpa_to_mmio_offset(vgpu, pa);

sys/dev/pci/drm/i915/gvt/mmio.c

80

if (reg_is_mmio(gvt, offset)) {

sys/dev/pci/drm/i915/gvt/mmio.c

82

intel_vgpu_default_mmio_read(vgpu, offset, p_data,

sys/dev/pci/drm/i915/gvt/mmio.c

85

intel_vgpu_default_mmio_write(vgpu, offset, p_data,

sys/dev/pci/drm/i915/gvt/mmio.c

87

} else if (reg_is_gtt(gvt, offset)) {

sys/dev/pci/drm/i915/gvt/mmio.c

88

offset -= gvt->device_info.gtt_start_offset;

sys/dev/pci/drm/i915/gvt/mmio.c

89

pt = vgpu->gtt.ggtt_mm->ggtt_mm.virtual_ggtt + offset;

sys/dev/pci/drm/i915/gvt/mmio.h

102

int intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/mmio.h

63

u32 offset;

sys/dev/pci/drm/i915/gvt/mmio.h

77

int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),

sys/dev/pci/drm/i915/gvt/mmio.h

81

unsigned int offset);

sys/dev/pci/drm/i915/gvt/mmio.h

94

int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/mmio.h

96

int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/mmio.h

99

int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,

sys/dev/pci/drm/i915/gvt/mmio_context.c

182

i915_reg_t offset;

sys/dev/pci/drm/i915/gvt/mmio_context.c

193

offset.reg = regs[ring_id];

sys/dev/pci/drm/i915/gvt/mmio_context.c

196

intel_uncore_read_fw(uncore, offset);

sys/dev/pci/drm/i915/gvt/mmio_context.c

197

offset.reg += 4;

sys/dev/pci/drm/i915/gvt/mmio_context.c

201

offset.reg = 0xb020;

sys/dev/pci/drm/i915/gvt/mmio_context.c

204

intel_uncore_read_fw(uncore, offset);

sys/dev/pci/drm/i915/gvt/mmio_context.c

205

offset.reg += 4;

sys/dev/pci/drm/i915/gvt/mmio_context.c

420

i915_reg_t offset, l3_offset;

sys/dev/pci/drm/i915/gvt/mmio_context.c

433

offset.reg = regs[engine->id];

sys/dev/pci/drm/i915/gvt/mmio_context.c

436

old_v = vgpu_vreg_t(pre, offset);

sys/dev/pci/drm/i915/gvt/mmio_context.c

440

new_v = vgpu_vreg_t(next, offset);

sys/dev/pci/drm/i915/gvt/mmio_context.c

445

intel_uncore_write_fw(uncore, offset, new_v);

sys/dev/pci/drm/i915/gvt/mmio_context.c

447

offset.reg += 4;

sys/dev/pci/drm/i915/i915_cmd_parser.c

1159

unsigned long offset, unsigned long length,

sys/dev/pci/drm/i915/i915_cmd_parser.c

1187

src + offset,

sys/dev/pci/drm/i915/i915_cmd_parser.c

1215

x = offset_in_page(offset);

sys/dev/pci/drm/i915/i915_cmd_parser.c

1216

for (n = offset >> PAGE_SHIFT; remain; n++) {

sys/dev/pci/drm/i915/i915_cmd_parser.c

1266

u32 offset;

sys/dev/pci/drm/i915/i915_cmd_parser.c

1268

for (offset = desc->reg.offset; offset < length;

sys/dev/pci/drm/i915/i915_cmd_parser.c

1269

offset += step) {

sys/dev/pci/drm/i915/i915_cmd_parser.c

1270

const u32 reg_addr = cmd[offset] & desc->reg.mask;

sys/dev/pci/drm/i915/i915_cmd_parser.c

1298

(offset + 2 > length ||

sys/dev/pci/drm/i915/i915_cmd_parser.c

1299

(cmd[offset + 1] & reg->mask) != reg->value)) {

sys/dev/pci/drm/i915/i915_cmd_parser.c

1318

u32 offset =

sys/dev/pci/drm/i915/i915_cmd_parser.c

1320

u32 condition = cmd[offset] &

sys/dev/pci/drm/i915/i915_cmd_parser.c

1327

if (desc->bits[i].offset >= length) {

sys/dev/pci/drm/i915/i915_cmd_parser.c

1333

dword = cmd[desc->bits[i].offset] &

sys/dev/pci/drm/i915/i915_cmd_parser.c

1350

static int check_bbstart(u32 *cmd, u32 offset, u32 length,

sys/dev/pci/drm/i915/i915_cmd_parser.c

1393

if (target_cmd_index == offset)

sys/dev/pci/drm/i915/i915_cmd_parser.c

1452

u32 *cmd, *batch_end, offset = 0;

sys/dev/pci/drm/i915/i915_cmd_parser.c

1521

ret = check_bbstart(cmd, offset, length, batch_length,

sys/dev/pci/drm/i915/i915_cmd_parser.c

1528

__set_bit(offset, jump_whitelist);

sys/dev/pci/drm/i915/i915_cmd_parser.c

1531

offset += length;

sys/dev/pci/drm/i915/i915_cmd_parser.c

154

u32 offset;

sys/dev/pci/drm/i915/i915_cmd_parser.c

172

u32 offset;

sys/dev/pci/drm/i915/i915_cmd_parser.c

229

.reg = { .offset = 1, .mask = 0x007FFFFC, .step = 2 } ),

sys/dev/pci/drm/i915/i915_cmd_parser.c

231

.reg = { .offset = 1, .mask = 0x007FFFFC },

sys/dev/pci/drm/i915/i915_cmd_parser.c

233

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

238

.reg = { .offset = 1, .mask = 0x007FFFFC },

sys/dev/pci/drm/i915/i915_cmd_parser.c

240

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

263

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

270

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

276

.offset = 1,

sys/dev/pci/drm/i915/i915_cmd_parser.c

282

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

290

.offset = 2,

sys/dev/pci/drm/i915/i915_cmd_parser.c

299

.offset = 1,

sys/dev/pci/drm/i915/i915_cmd_parser.c

304

.offset = 1,

sys/dev/pci/drm/i915/i915_cmd_parser.c

322

.reg = { .offset = 1, .mask = 0x007FFFFC, .step = 1 } ),

sys/dev/pci/drm/i915/i915_cmd_parser.c

341

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

348

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

353

.offset = 1,

sys/dev/pci/drm/i915/i915_cmd_parser.c

360

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

368

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

385

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

392

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

397

.offset = 1,

sys/dev/pci/drm/i915/i915_cmd_parser.c

404

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

412

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

422

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

429

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

434

.offset = 1,

sys/dev/pci/drm/i915/i915_cmd_parser.c

441

.offset = 0,

sys/dev/pci/drm/i915/i915_cmd_parser.c

486

.reg = { .offset = 1, .mask = 0x007FFFFC, .step = 2 } ),

sys/dev/pci/drm/i915/i915_cmd_parser.c

489

.reg = { .offset = 1, .mask = 0x007FFFFC } ),

sys/dev/pci/drm/i915/i915_cmd_parser.c

492

.reg = { .offset = 1, .mask = 0x007FFFFC } ),

sys/dev/pci/drm/i915/i915_cmd_parser.c

494

.reg = { .offset = 1, .mask = 0x007FFFFC, .step = 1 } ),

sys/dev/pci/drm/i915/i915_cmd_parser.c

504

.offset = 0,

sys/dev/pci/drm/i915/i915_debugfs.c

217

vma->gtt_view.partial.offset << PAGE_SHIFT,

sys/dev/pci/drm/i915/i915_debugfs.c

227

vma->gtt_view.rotated.plane[0].offset,

sys/dev/pci/drm/i915/i915_debugfs.c

232

vma->gtt_view.rotated.plane[1].offset);

sys/dev/pci/drm/i915/i915_debugfs.c

241

vma->gtt_view.remapped.plane[0].offset,

sys/dev/pci/drm/i915/i915_debugfs.c

246

vma->gtt_view.remapped.plane[1].offset);

sys/dev/pci/drm/i915/i915_driver.c

1984

wdf->offset = 0;

sys/dev/pci/drm/i915/i915_gem.c

206

shmem_pread(struct vm_page *page, int offset, int len, char __user *user_data,

sys/dev/pci/drm/i915/i915_gem.c

215

drm_clflush_virt_range(vaddr + offset, len);

sys/dev/pci/drm/i915/i915_gem.c

217

ret = __copy_to_user(user_data, vaddr + offset, len);

sys/dev/pci/drm/i915/i915_gem.c

230

unsigned long offset;

sys/dev/pci/drm/i915/i915_gem.c

252

offset = offset_in_page(args->offset);

sys/dev/pci/drm/i915/i915_gem.c

253

for (idx = args->offset >> PAGE_SHIFT; remain; idx++) {

sys/dev/pci/drm/i915/i915_gem.c

255

unsigned int length = min_t(u64, remain, PAGE_SIZE - offset);

sys/dev/pci/drm/i915/i915_gem.c

257

ret = shmem_pread(page, offset, length, user_data,

sys/dev/pci/drm/i915/i915_gem.c

264

offset = 0;

sys/dev/pci/drm/i915/i915_gem.c

279

loff_t base, int offset,

sys/dev/pci/drm/i915/i915_gem.c

288

(void __force *)vaddr + offset,

sys/dev/pci/drm/i915/i915_gem.c

294

(void __force *)vaddr + offset,

sys/dev/pci/drm/i915/i915_gem.c

384

unsigned long remain, offset;

sys/dev/pci/drm/i915/i915_gem.c

392

overflows_type(args->offset, offset))

sys/dev/pci/drm/i915/i915_gem.c

405

offset = args->offset;

sys/dev/pci/drm/i915/i915_gem.c

415

unsigned page_offset = offset_in_page(offset);

sys/dev/pci/drm/i915/i915_gem.c

421

offset >> PAGE_SHIFT),

sys/dev/pci/drm/i915/i915_gem.c

426

page_base += offset & LINUX_PAGE_MASK;

sys/dev/pci/drm/i915/i915_gem.c

437

offset += page_length;

sys/dev/pci/drm/i915/i915_gem.c

481

if (range_overflows_t(u64, args->offset, args->size, obj->base.size)) {

sys/dev/pci/drm/i915/i915_gem.c

486

trace_i915_gem_object_pread(obj, args->offset, args->size);

sys/dev/pci/drm/i915/i915_gem.c

514

loff_t base, int offset,

sys/dev/pci/drm/i915/i915_gem.c

522

unwritten = __copy_from_user_inatomic_nocache((void __force *)vaddr + offset,

sys/dev/pci/drm/i915/i915_gem.c

527

unwritten = copy_from_user((void __force *)vaddr + offset,

sys/dev/pci/drm/i915/i915_gem.c

548

unsigned long remain, offset;

sys/dev/pci/drm/i915/i915_gem.c

556

overflows_type(args->offset, offset))

sys/dev/pci/drm/i915/i915_gem.c

584

offset = args->offset;

sys/dev/pci/drm/i915/i915_gem.c

594

unsigned int page_offset = offset_in_page(offset);

sys/dev/pci/drm/i915/i915_gem.c

602

offset >> PAGE_SHIFT),

sys/dev/pci/drm/i915/i915_gem.c

608

page_base += offset & LINUX_PAGE_MASK;

sys/dev/pci/drm/i915/i915_gem.c

624

offset += page_length;

sys/dev/pci/drm/i915/i915_gem.c

642

shmem_pwrite(struct vm_page *page, int offset, int len, char __user *user_data,

sys/dev/pci/drm/i915/i915_gem.c

652

drm_clflush_virt_range(vaddr + offset, len);

sys/dev/pci/drm/i915/i915_gem.c

654

ret = __copy_from_user(vaddr + offset, user_data, len);

sys/dev/pci/drm/i915/i915_gem.c

656

drm_clflush_virt_range(vaddr + offset, len);

sys/dev/pci/drm/i915/i915_gem.c

670

unsigned long offset;

sys/dev/pci/drm/i915/i915_gem.c

700

offset = offset_in_page(args->offset);

sys/dev/pci/drm/i915/i915_gem.c

701

for (idx = args->offset >> PAGE_SHIFT; remain; idx++) {

sys/dev/pci/drm/i915/i915_gem.c

703

unsigned int length = min_t(u64, remain, PAGE_SIZE - offset);

sys/dev/pci/drm/i915/i915_gem.c

705

ret = shmem_pwrite(page, offset, length, user_data,

sys/dev/pci/drm/i915/i915_gem.c

706

(offset | length) & partial_cacheline_write,

sys/dev/pci/drm/i915/i915_gem.c

713

offset = 0;

sys/dev/pci/drm/i915/i915_gem.c

762

if (range_overflows_t(u64, args->offset, args->size, obj->base.size)) {

sys/dev/pci/drm/i915/i915_gem.c

773

trace_i915_gem_object_pwrite(obj, args->offset, args->size);

sys/dev/pci/drm/i915/i915_gem_gtt.c

105

u64 size, u64 offset, unsigned long color,

sys/dev/pci/drm/i915/i915_gem_gtt.c

112

GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));

sys/dev/pci/drm/i915/i915_gem_gtt.c

113

GEM_BUG_ON(range_overflows(offset, size, vm->total));

sys/dev/pci/drm/i915/i915_gem_gtt.c

118

node->start = offset;

sys/dev/pci/drm/i915/i915_gem_gtt.c

202

u64 offset;

sys/dev/pci/drm/i915/i915_gem_gtt.c

280

offset = random_offset(start, end,

sys/dev/pci/drm/i915/i915_gem_gtt.c

282

err = i915_gem_gtt_reserve(vm, ww, node, size, offset, color, flags);

sys/dev/pci/drm/i915/i915_gem_gtt.h

31

u64 size, u64 offset, unsigned long color,

sys/dev/pci/drm/i915/i915_gpu_error.c

106

e->cur->offset = 0;

sys/dev/pci/drm/i915/i915_gpu_error.c

1086

start = sg->offset;

sys/dev/pci/drm/i915/i915_gpu_error.c

1264

dma_addr_t offset = dma - mem->region.start;

sys/dev/pci/drm/i915/i915_gpu_error.c

1267

if (offset + PAGE_SIZE > resource_size(&mem->io)) {

sys/dev/pci/drm/i915/i915_gpu_error.c

1272

s = io_mapping_map_wc(&mem->iomap, offset, PAGE_SIZE);

sys/dev/pci/drm/i915/i915_gpu_error.c

72

sg->offset = offset_in_page(addr);

sys/dev/pci/drm/i915/i915_gpu_error.h

318

char *buf, loff_t offset, size_t count);

sys/dev/pci/drm/i915/i915_gtt_view_types.h

11

u32 offset:31;

sys/dev/pci/drm/i915/i915_gtt_view_types.h

32

u64 offset;

sys/dev/pci/drm/i915/i915_ioctl.c

62

entry_offset == (reg->offset & -entry->size))

sys/dev/pci/drm/i915/i915_ioctl.c

71

flags = reg->offset & (entry->size - 1);

sys/dev/pci/drm/i915/i915_mm.c

136

struct scatterlist *sgl, unsigned long offset,

sys/dev/pci/drm/i915/i915_mm.c

150

while (offset >= r.sgt.max >> PAGE_SHIFT) {

sys/dev/pci/drm/i915/i915_mm.c

151

offset -= r.sgt.max >> PAGE_SHIFT;

sys/dev/pci/drm/i915/i915_mm.c

156

r.sgt.curr = offset << PAGE_SHIFT;

sys/dev/pci/drm/i915/i915_mm.h

38

struct scatterlist *sgl, unsigned long offset,

sys/dev/pci/drm/i915/i915_perf.c

1010

ret = append_oa_status(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

1023

return gen8_append_oa_reports(stream, buf, count, offset);

sys/dev/pci/drm/i915/i915_perf.c

1050

size_t *offset)

sys/dev/pci/drm/i915/i915_perf.c

1057

size_t start_offset = *offset;

sys/dev/pci/drm/i915/i915_perf.c

1120

ret = append_oa_sample(stream, buf, count, offset, report);

sys/dev/pci/drm/i915/i915_perf.c

1131

if (start_offset != *offset) {

sys/dev/pci/drm/i915/i915_perf.c

1164

size_t *offset)

sys/dev/pci/drm/i915/i915_perf.c

1203

ret = append_oa_status(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

1219

ret = append_oa_status(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

1227

return gen7_append_oa_reports(stream, buf, count, offset);

sys/dev/pci/drm/i915/i915_perf.c

1288

size_t *offset)

sys/dev/pci/drm/i915/i915_perf.c

1290

return stream->perf->ops.read(stream, buf, count, offset);

sys/dev/pci/drm/i915/i915_perf.c

1456

static bool oa_find_reg_in_lri(u32 *state, u32 reg, u32 *offset, u32 end)

sys/dev/pci/drm/i915/i915_perf.c

1458

u32 idx = *offset;

sys/dev/pci/drm/i915/i915_perf.c

1470

*offset = idx;

sys/dev/pci/drm/i915/i915_perf.c

1476

u32 offset, len = (ce->engine->context_size - PAGE_SIZE) / 4;

sys/dev/pci/drm/i915/i915_perf.c

1482

for (offset = 0; offset < len; ) {

sys/dev/pci/drm/i915/i915_perf.c

1483

if (IS_MI_LRI_CMD(state[offset])) {

sys/dev/pci/drm/i915/i915_perf.c

1489

MI_LRI_LEN(state[offset]) & 0x1);

sys/dev/pci/drm/i915/i915_perf.c

1491

if (oa_find_reg_in_lri(state, reg, &offset, len))

sys/dev/pci/drm/i915/i915_perf.c

1494

offset++;

sys/dev/pci/drm/i915/i915_perf.c

1498

return offset < len ? offset : U32_MAX;

sys/dev/pci/drm/i915/i915_perf.c

1505

u32 offset = perf->ctx_oactxctrl_offset;

sys/dev/pci/drm/i915/i915_perf.c

1508

if (offset)

sys/dev/pci/drm/i915/i915_perf.c

1511

offset = oa_context_image_offset(ce, i915_mmio_reg_offset(reg));

sys/dev/pci/drm/i915/i915_perf.c

1512

perf->ctx_oactxctrl_offset = offset;

sys/dev/pci/drm/i915/i915_perf.c

1516

ce->engine->name, offset);

sys/dev/pci/drm/i915/i915_perf.c

1519

return offset && offset != U32_MAX ? 0 : -ENODEV;

sys/dev/pci/drm/i915/i915_perf.c

1934

bool save, i915_reg_t reg, u32 offset,

sys/dev/pci/drm/i915/i915_perf.c

1948

*cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d;

sys/dev/pci/drm/i915/i915_perf.c

2499

u32 offset;

sys/dev/pci/drm/i915/i915_perf.c

2508

u32 offset;

sys/dev/pci/drm/i915/i915_perf.c

2515

offset = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET;

sys/dev/pci/drm/i915/i915_perf.c

2518

*cs++ = offset + flex->offset * sizeof(u32);

sys/dev/pci/drm/i915/i915_perf.c

2637

u32 offset = stream->perf->ctx_oactxctrl_offset;

sys/dev/pci/drm/i915/i915_perf.c

2641

offset + 1,

sys/dev/pci/drm/i915/i915_perf.c

3469

size_t offset = 0;

sys/dev/pci/drm/i915/i915_perf.c

3493

ret = stream->ops->read(stream, buf, count, &offset);

sys/dev/pci/drm/i915/i915_perf.c

3495

} while (!offset && !ret);

sys/dev/pci/drm/i915/i915_perf.c

3498

ret = stream->ops->read(stream, buf, count, &offset);

sys/dev/pci/drm/i915/i915_perf.c

3517

return offset ?: (ret ?: -EAGAIN);

sys/dev/pci/drm/i915/i915_perf.c

640

size_t *offset,

sys/dev/pci/drm/i915/i915_perf.c

645

if ((count - *offset) < header.size)

sys/dev/pci/drm/i915/i915_perf.c

648

if (copy_to_user(buf + *offset, &header, sizeof(header)))

sys/dev/pci/drm/i915/i915_perf.c

651

(*offset) += header.size;

sys/dev/pci/drm/i915/i915_perf.c

676

size_t *offset,

sys/dev/pci/drm/i915/i915_perf.c

688

if ((count - *offset) < header.size)

sys/dev/pci/drm/i915/i915_perf.c

691

buf += *offset;

sys/dev/pci/drm/i915/i915_perf.c

711

(*offset) += header.size;

sys/dev/pci/drm/i915/i915_perf.c

740

size_t *offset)

sys/dev/pci/drm/i915/i915_perf.c

747

size_t start_offset = *offset;

sys/dev/pci/drm/i915/i915_perf.c

883

ret = append_oa_sample(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf.c

913

if (start_offset != *offset) {

sys/dev/pci/drm/i915/i915_perf.c

959

size_t *offset)

sys/dev/pci/drm/i915/i915_perf.c

990

ret = append_oa_status(stream, buf, count, offset,

sys/dev/pci/drm/i915/i915_perf_types.h

156

size_t *offset);

sys/dev/pci/drm/i915/i915_perf_types.h

401

size_t *offset);

sys/dev/pci/drm/i915/i915_reg_defs.h

187

#define MCR_REG(offset) ((const i915_mcr_reg_t){ .reg = (offset) })

sys/dev/pci/drm/i915/i915_scatterlist.c

116

offset = node->start << PAGE_SHIFT;

sys/dev/pci/drm/i915/i915_scatterlist.c

121

if (offset != prev_end || sg->length >= max_segment) {

sys/dev/pci/drm/i915/i915_scatterlist.c

125

sg_dma_address(sg) = region_start + offset;

sys/dev/pci/drm/i915/i915_scatterlist.c

137

offset += len;

sys/dev/pci/drm/i915/i915_scatterlist.c

140

prev_end = offset;

sys/dev/pci/drm/i915/i915_scatterlist.c

203

u64 block_size, offset;

sys/dev/pci/drm/i915/i915_scatterlist.c

206

offset = drm_buddy_block_offset(block);

sys/dev/pci/drm/i915/i915_scatterlist.c

211

if (offset != prev_end || sg->length >= max_segment) {

sys/dev/pci/drm/i915/i915_scatterlist.c

215

sg_dma_address(sg) = region_start + offset;

sys/dev/pci/drm/i915/i915_scatterlist.c

227

offset += len;

sys/dev/pci/drm/i915/i915_scatterlist.c

230

prev_end = offset;

sys/dev/pci/drm/i915/i915_scatterlist.c

86

u64 block_size, offset, prev_end;

sys/dev/pci/drm/i915/i915_scatterlist.h

132

GEM_BUG_ON(sg->offset);

sys/dev/pci/drm/i915/i915_scatterlist.h

37

s.max = s.curr = s.sgp->offset;

sys/dev/pci/drm/i915/i915_sysfs.c

103

ret = l3_access_valid(i915, offset);

sys/dev/pci/drm/i915/i915_sysfs.c

124

memcpy(remap_info + offset / sizeof(u32), buf, count);

sys/dev/pci/drm/i915/i915_sysfs.c

49

static int l3_access_valid(struct drm_i915_private *i915, loff_t offset)

sys/dev/pci/drm/i915/i915_sysfs.c

54

if (!IS_ALIGNED(offset, sizeof(u32)))

sys/dev/pci/drm/i915/i915_sysfs.c

57

if (offset >= GEN7_L3LOG_SIZE)

sys/dev/pci/drm/i915/i915_sysfs.c

66

loff_t offset, size_t count)

sys/dev/pci/drm/i915/i915_sysfs.c

73

ret = l3_access_valid(i915, offset);

sys/dev/pci/drm/i915/i915_sysfs.c

78

count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);

sys/dev/pci/drm/i915/i915_sysfs.c

84

i915->l3_parity.remap_info[slice] + offset / sizeof(u32),

sys/dev/pci/drm/i915/i915_sysfs.c

94

loff_t offset, size_t count)

sys/dev/pci/drm/i915/i915_vma.c

1050

sg = rotate_pages(obj, rot_info->plane[i].offset,

sys/dev/pci/drm/i915/i915_vma.c

1090

unsigned long offset, unsigned int alignment_pad,

sys/dev/pci/drm/i915/i915_vma.c

1117

addr = i915_gem_object_get_dma_address_len(obj, offset, &length);

sys/dev/pci/drm/i915/i915_vma.c

1128

offset += length / I915_GTT_PAGE_SIZE;

sys/dev/pci/drm/i915/i915_vma.c

1132

offset += src_stride - width;

sys/dev/pci/drm/i915/i915_vma.c

1154

unsigned int offset;

sys/dev/pci/drm/i915/i915_vma.c

1156

iter = i915_gem_object_get_sg_dma(obj, obj_offset, &offset);

sys/dev/pci/drm/i915/i915_vma.c

1162

len = min(sg_dma_len(iter) - (offset << PAGE_SHIFT),

sys/dev/pci/drm/i915/i915_vma.c

1166

sg_dma_address(iter) + (offset << PAGE_SHIFT);

sys/dev/pci/drm/i915/i915_vma.c

1176

offset = 0;

sys/dev/pci/drm/i915/i915_vma.c

1215

rem_info->plane[color_plane].offset,

sys/dev/pci/drm/i915/i915_vma.c

1223

rem_info->plane[color_plane].offset,

sys/dev/pci/drm/i915/i915_vma.c

1296

sg = remap_contiguous_pages(obj, view->partial.offset, count, st, st->sgl);

sys/dev/pci/drm/i915/i915_vma.c

194

view->partial.offset,

sys/dev/pci/drm/i915/i915_vma.c

1949

vma_offset = vma->gtt_view.partial.offset << PAGE_SHIFT;

sys/dev/pci/drm/i915/i915_vma.c

863

u64 offset = flags & PIN_OFFSET_MASK;

sys/dev/pci/drm/i915/i915_vma.c

864

if (!IS_ALIGNED(offset, alignment) ||

sys/dev/pci/drm/i915/i915_vma.c

865

range_overflows(offset, size, end))

sys/dev/pci/drm/i915/i915_vma.c

873

if (offset < guard || offset + size > end - guard)

sys/dev/pci/drm/i915/i915_vma.c

878

offset - guard,

sys/dev/pci/drm/i915/i915_vma.c

978

rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,

sys/dev/pci/drm/i915/i915_vma.c

989

src_idx = src_stride * (height - 1) + column + offset;

sys/dev/pci/drm/i915/i915_vma_resource.c

366

u64 offset,

sys/dev/pci/drm/i915/i915_vma_resource.c

371

u64 last = offset + size - 1;

sys/dev/pci/drm/i915/i915_vma_resource.c

376

i915_vma_resource_color_adjust_range(vm, &offset, &last);

sys/dev/pci/drm/i915/i915_vma_resource.c

377

node = vma_res_itree_iter_first(&vm->pending_unbind, offset, last);

sys/dev/pci/drm/i915/i915_vma_resource.c

384

node = vma_res_itree_iter_next(node, offset, last);

sys/dev/pci/drm/i915/i915_vma_resource.c

451

u64 offset,

sys/dev/pci/drm/i915/i915_vma_resource.c

457

u64 last = offset + size - 1;

sys/dev/pci/drm/i915/i915_vma_resource.c

463

i915_vma_resource_color_adjust_range(vm, &offset, &last);

sys/dev/pci/drm/i915/i915_vma_resource.c

464

node = vma_res_itree_iter_first(&vm->pending_unbind, offset, last);

sys/dev/pci/drm/i915/i915_vma_resource.c

477

node = vma_res_itree_iter_next(node, offset, last);

sys/dev/pci/drm/i915/intel_device_info.c

297

static void ip_ver_read(struct drm_i915_private *i915, u32 offset, struct intel_ip_version *ip)

sys/dev/pci/drm/i915/intel_device_info.c

308

addr = pci_iomap_range(pdev, 0, offset, sizeof(u32));

sys/dev/pci/drm/i915/intel_device_info.c

316

offset);

sys/dev/pci/drm/i915/intel_device_info.c

327

ip->ver, ip->rel, offset, val, expected_ver, expected_rel);

sys/dev/pci/drm/i915/intel_gvt.c

100

save_mmio(iter, offset, size);

sys/dev/pci/drm/i915/intel_gvt.c

81

static void save_mmio(struct intel_gvt_mmio_table_iter *iter, u32 offset,

sys/dev/pci/drm/i915/intel_gvt.c

87

for (i = offset; i < offset + size; i += 4) {

sys/dev/pci/drm/i915/intel_gvt.c

95

u32 offset, u32 size)

sys/dev/pci/drm/i915/intel_gvt.c

97

if (WARN_ON(!IS_ALIGNED(offset, 4)))

sys/dev/pci/drm/i915/intel_gvt.h

37

u32 offset, u32 size);

sys/dev/pci/drm/i915/intel_memory_region.c

198

resource_size_t offset,

sys/dev/pci/drm/i915/intel_memory_region.c

205

return i915_ttm_buddy_man_reserve(man, offset, size);

sys/dev/pci/drm/i915/intel_memory_region.c

38

u8 value, resource_size_t offset,

sys/dev/pci/drm/i915/intel_memory_region.c

53

&mem->region, &mem->io.start, &offset, caller,

sys/dev/pci/drm/i915/intel_memory_region.c

62

resource_size_t offset,

sys/dev/pci/drm/i915/intel_memory_region.c

73

va = ioremap_wc(mem->io.start + offset, PAGE_SIZE);

sys/dev/pci/drm/i915/intel_memory_region.c

77

&mem->io.start, &offset, caller);

sys/dev/pci/drm/i915/intel_memory_region.c

82

err = __iopagetest(mem, va, PAGE_SIZE, val[i], offset, caller);

sys/dev/pci/drm/i915/intel_memory_region.c

86

err = __iopagetest(mem, va, PAGE_SIZE, ~val[i], offset, caller);

sys/dev/pci/drm/i915/intel_memory_region.h

119

resource_size_t offset,

sys/dev/pci/drm/i915/intel_memory_region.h

53

resource_size_t offset,

sys/dev/pci/drm/i915/intel_region_ttm.c

205

resource_size_t offset,

sys/dev/pci/drm/i915/intel_region_ttm.c

217

if (offset != I915_BO_INVALID_OFFSET) {

sys/dev/pci/drm/i915/intel_region_ttm.c

218

if (WARN_ON(overflows_type(offset >> PAGE_SHIFT, place.fpfn))) {

sys/dev/pci/drm/i915/intel_region_ttm.c

222

place.fpfn = offset >> PAGE_SHIFT;

sys/dev/pci/drm/i915/intel_region_ttm.h

40

resource_size_t offset,

sys/dev/pci/drm/i915/intel_uncore.c

1010

entry->domains & ~uncore->fw_domains, offset);

sys/dev/pci/drm/i915/intel_uncore.c

1202

static bool is_shadowed(struct intel_uncore *uncore, u32 offset)

sys/dev/pci/drm/i915/intel_uncore.c

1207

if (IS_GSI_REG(offset))

sys/dev/pci/drm/i915/intel_uncore.c

1208

offset += uncore->gsi_offset;

sys/dev/pci/drm/i915/intel_uncore.c

1210

return BSEARCH(offset,

sys/dev/pci/drm/i915/intel_uncore.c

1222

#define __fwtable_reg_read_fw_domains(uncore, offset) \

sys/dev/pci/drm/i915/intel_uncore.c

1225

if (NEEDS_FORCE_WAKE((offset))) \

sys/dev/pci/drm/i915/intel_uncore.c

1226

__fwd = find_fw_domain(uncore, offset); \

sys/dev/pci/drm/i915/intel_uncore.c

1230

#define __fwtable_reg_write_fw_domains(uncore, offset) \

sys/dev/pci/drm/i915/intel_uncore.c

1233

const u32 __offset = (offset); \

sys/dev/pci/drm/i915/intel_uncore.c

1901

u32 offset = i915_mmio_reg_offset(reg); \

sys/dev/pci/drm/i915/intel_uncore.c

1949

fw_engine = __fwtable_reg_read_fw_domains(uncore, offset); \

sys/dev/pci/drm/i915/intel_uncore.c

2007

u32 offset = i915_mmio_reg_offset(reg); \

sys/dev/pci/drm/i915/intel_uncore.c

2024

if (NEEDS_FORCE_WAKE(offset)) \

sys/dev/pci/drm/i915/intel_uncore.c

2038

fw_engine = __fwtable_reg_write_fw_domains(uncore, offset); \

sys/dev/pci/drm/i915/intel_uncore.c

955

static int fw_range_cmp(u32 offset, const struct intel_forcewake_range *entry)

sys/dev/pci/drm/i915/intel_uncore.c

957

if (offset < entry->start)

sys/dev/pci/drm/i915/intel_uncore.c

959

else if (offset > entry->end)

sys/dev/pci/drm/i915/intel_uncore.c

985

find_fw_domain(struct intel_uncore *uncore, u32 offset)

sys/dev/pci/drm/i915/intel_uncore.c

989

if (IS_GSI_REG(offset))

sys/dev/pci/drm/i915/intel_uncore.c

990

offset += uncore->gsi_offset;

sys/dev/pci/drm/i915/intel_uncore.c

992

entry = BSEARCH(offset,

sys/dev/pci/drm/i915/intel_uncore.h

330

u32 offset = i915_mmio_reg_offset(reg); \

sys/dev/pci/drm/i915/intel_uncore.h

331

if (IS_GSI_REG(offset)) \

sys/dev/pci/drm/i915/intel_uncore.h

332

offset += uncore->gsi_offset; \

sys/dev/pci/drm/i915/intel_uncore.h

333

return read##s__(uncore->regs + offset); \

sys/dev/pci/drm/i915/intel_uncore.h

340

u32 offset = i915_mmio_reg_offset(reg); \

sys/dev/pci/drm/i915/intel_uncore.h

341

if (IS_GSI_REG(offset)) \

sys/dev/pci/drm/i915/intel_uncore.h

342

offset += uncore->gsi_offset; \

sys/dev/pci/drm/i915/intel_uncore.h

343

write##s__(val, uncore->regs + offset); \

sys/dev/pci/drm/i915/pxp/intel_pxp_tee.c

117

unsigned int offset = 0;

sys/dev/pci/drm/i915/pxp/intel_pxp_tee.c

133

sg = i915_gem_object_get_sg_dma(pxp->stream_cmd.obj, 0, &offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1381

u64 offset = tmp.start + n * PAGE_SIZE;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1385

offset,

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1398

u64 offset = tmp.start + order[n] * PAGE_SIZE;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1401

vaddr = io_mapping_map_atomic_wc(&ggtt->iomap, offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1409

u64 offset = tmp.start + order[n] * PAGE_SIZE;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1413

vaddr = io_mapping_map_atomic_wc(&ggtt->iomap, offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1507

static int reserve_gtt_with_resource(struct i915_vma *vma, u64 offset)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1520

offset,

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1643

u64 offset;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1657

offset = igt_random_offset(&prng,

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1662

err = reserve_gtt_with_resource(vma, offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1671

if (vma->node.start != offset ||

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1675

offset, 2*I915_GTT_PAGE_SIZE);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1837

u64 offset;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1846

offset = vma->node.start;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1863

if (vma->node.start != offset) {

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

1865

offset, vma->node.start);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

436

u64 offset;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

456

u64 offset;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

458

offset = p->offset;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

468

if (offset < hole_start + aligned_size)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

470

offset -= aligned_size;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

473

err = i915_vma_pin(vma, 0, 0, offset | flags);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

476

__func__, p->name, err, npages, prime, offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

481

i915_vma_misplaced(vma, 0, 0, offset | flags)) {

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

484

offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

492

if (offset + aligned_size > hole_end)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

494

offset += aligned_size;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

498

offset = p->offset;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

508

if (offset < hole_start + aligned_size)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

510

offset -= aligned_size;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

514

i915_vma_misplaced(vma, 0, 0, offset | flags)) {

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

517

offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

531

if (offset + aligned_size > hole_end)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

533

offset += aligned_size;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

537

offset = p->offset;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

547

if (offset < hole_start + aligned_size)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

549

offset -= aligned_size;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

552

err = i915_vma_pin(vma, 0, 0, offset | flags);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

555

__func__, p->name, err, npages, prime, offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

560

i915_vma_misplaced(vma, 0, 0, offset | flags)) {

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

563

offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

571

if (offset + aligned_size > hole_end)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

573

offset += aligned_size;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

577

offset = p->offset;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

587

if (offset < hole_start + aligned_size)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

589

offset -= aligned_size;

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

593

i915_vma_misplaced(vma, 0, 0, offset | flags)) {

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

596

offset);

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

610

if (offset + aligned_size > hole_end)

sys/dev/pci/drm/i915/selftests/i915_gem_gtt.c

612

offset += aligned_size;

sys/dev/pci/drm/i915/selftests/i915_request.c

1959

static u32 *emit_timestamp_store(u32 *cs, struct intel_context *ce, u32 offset)

sys/dev/pci/drm/i915/selftests/i915_request.c

1963

*cs++ = offset;

sys/dev/pci/drm/i915/selftests/i915_request.c

1969

static u32 *emit_store_dw(u32 *cs, u32 offset, u32 value)

sys/dev/pci/drm/i915/selftests/i915_request.c

1972

*cs++ = offset;

sys/dev/pci/drm/i915/selftests/i915_request.c

1979

static u32 *emit_semaphore_poll(u32 *cs, u32 mode, u32 value, u32 offset)

sys/dev/pci/drm/i915/selftests/i915_request.c

1986

*cs++ = offset;

sys/dev/pci/drm/i915/selftests/i915_request.c

1992

static u32 *emit_semaphore_poll_until(u32 *cs, u32 offset, u32 value)

sys/dev/pci/drm/i915/selftests/i915_request.c

1994

return emit_semaphore_poll(cs, MI_SEMAPHORE_SAD_EQ_SDD, value, offset);

sys/dev/pci/drm/i915/selftests/i915_request.c

2017

const u32 offset = hwsp_offset(ce, sema);

sys/dev/pci/drm/i915/selftests/i915_request.c

2048

cs = emit_store_dw(cs, offset, 0);

sys/dev/pci/drm/i915/selftests/i915_request.c

2050

cs = emit_semaphore_poll_until(cs, offset, i);

sys/dev/pci/drm/i915/selftests/i915_request.c

2051

cs = emit_timestamp_store(cs, ce, offset + i * sizeof(u32));

sys/dev/pci/drm/i915/selftests/i915_request.c

2052

cs = emit_store_dw(cs, offset, 0);

sys/dev/pci/drm/i915/selftests/i915_request.c

2092

const u32 offset = hwsp_offset(ce, sema);

sys/dev/pci/drm/i915/selftests/i915_request.c

2129

cs = emit_timestamp_store(cs, ce, offset + i * sizeof(u32));

sys/dev/pci/drm/i915/selftests/i915_request.c

2163

const u32 offset = hwsp_offset(ce, sema);

sys/dev/pci/drm/i915/selftests/i915_request.c

2197

cs = emit_store_dw(cs, offset + i * sizeof(u32), -1);

sys/dev/pci/drm/i915/selftests/i915_request.c

2198

cs = emit_semaphore_poll_until(cs, offset, i);

sys/dev/pci/drm/i915/selftests/i915_request.c

2199

cs = emit_timestamp_store(cs, ce, offset + i * sizeof(u32));

sys/dev/pci/drm/i915/selftests/i915_request.c

2239

const u32 offset =

sys/dev/pci/drm/i915/selftests/i915_request.c

2255

cs = emit_semaphore_poll(cs, mode, value, offset);

sys/dev/pci/drm/i915/selftests/i915_request.c

2266

const u32 offset = hwsp_offset(ce, sema);

sys/dev/pci/drm/i915/selftests/i915_request.c

2321

cs = emit_timestamp_store(cs, ce, offset + i * sizeof(u32));

sys/dev/pci/drm/i915/selftests/i915_request.c

2357

const u32 offset = hwsp_offset(ce, sema);

sys/dev/pci/drm/i915/selftests/i915_request.c

2384

u32 addr = offset + ARRAY_SIZE(arr) * i * sizeof(u32);

sys/dev/pci/drm/i915/selftests/i915_request.c

2451

const u32 offset = hwsp_offset(ce, sema);

sys/dev/pci/drm/i915/selftests/i915_request.c

2477

u32 addr = offset + 2 * i * sizeof(u32);

sys/dev/pci/drm/i915/selftests/i915_request.c

2494

cs = emit_semaphore_poll_until(cs, offset, i);

sys/dev/pci/drm/i915/selftests/i915_request.c

2519

cs = emit_store_dw(cs, offset, i);

sys/dev/pci/drm/i915/selftests/i915_request.c

2571

const u32 offset = hwsp_offset(ce, sema);

sys/dev/pci/drm/i915/selftests/i915_request.c

2605

cs = emit_store_dw(cs, offset + i * sizeof(u32), -1);

sys/dev/pci/drm/i915/selftests/i915_request.c

2606

cs = emit_semaphore_poll_until(cs, offset, i);

sys/dev/pci/drm/i915/selftests/i915_request.c

2607

cs = emit_timestamp_store(cs, ce, offset + i * sizeof(u32));

sys/dev/pci/drm/i915/selftests/i915_vma.c

1040

unsigned int offset;

sys/dev/pci/drm/i915/selftests/i915_vma.c

1044

offset = (x * plane_info[0].dst_stride + y) * PAGE_SIZE;

sys/dev/pci/drm/i915/selftests/i915_vma.c

1046

offset = (y * plane_info[0].dst_stride + x) * PAGE_SIZE;

sys/dev/pci/drm/i915/selftests/i915_vma.c

1048

iowrite32(val, &map[offset / sizeof(*map)]);

sys/dev/pci/drm/i915/selftests/i915_vma.c

1071

unsigned int offset, src_idx;

sys/dev/pci/drm/i915/selftests/i915_vma.c

1079

offset = src_idx * PAGE_SIZE;

sys/dev/pci/drm/i915/selftests/i915_vma.c

1081

val = ioread32(&map[offset / sizeof(*map)]);

sys/dev/pci/drm/i915/selftests/i915_vma.c

369

r->plane[n].offset + x);

sys/dev/pci/drm/i915/selftests/i915_vma.c

446

r->plane[n].offset + x);

sys/dev/pci/drm/i915/selftests/i915_vma.c

456

unsigned int offset;

sys/dev/pci/drm/i915/selftests/i915_vma.c

469

offset = 0;

sys/dev/pci/drm/i915/selftests/i915_vma.c

483

if (sg_dma_address(sg) + offset != src) {

sys/dev/pci/drm/i915/selftests/i915_vma.c

490

offset += PAGE_SIZE;

sys/dev/pci/drm/i915/selftests/i915_vma.c

617

for_each_prime_number_from(plane_info[0].offset, 0, max_offset) {

sys/dev/pci/drm/i915/selftests/i915_vma.c

618

for_each_prime_number_from(plane_info[1].offset, 0, max_offset) {

sys/dev/pci/drm/i915/selftests/i915_vma.c

687

plane_info[0].offset,

sys/dev/pci/drm/i915/selftests/i915_vma.c

692

plane_info[1].offset);

sys/dev/pci/drm/i915/selftests/i915_vma.c

719

unsigned long offset,

sys/dev/pci/drm/i915/selftests/i915_vma.c

733

src = i915_gem_object_get_dma_address(obj, offset);

sys/dev/pci/drm/i915/selftests/i915_vma.c

736

offset);

sys/dev/pci/drm/i915/selftests/i915_vma.c

740

offset++;

sys/dev/pci/drm/i915/selftests/i915_vma.c

807

unsigned int sz, offset;

sys/dev/pci/drm/i915/selftests/i915_vma.c

825

for_each_prime_number_from(offset, 0, npages - sz) {

sys/dev/pci/drm/i915/selftests/i915_vma.c

829

view.partial.offset = offset;

sys/dev/pci/drm/i915/selftests/i915_vma.c

847

p->name, offset, sz);

sys/dev/pci/drm/i915/selftests/i915_vma.c

852

if (!assert_partial(obj, vma, offset, sz)) {

sys/dev/pci/drm/i915/selftests/i915_vma.c

854

p->name, offset, sz);

sys/dev/pci/drm/i915/selftests/igt_mmap.c

13

u64 offset,

sys/dev/pci/drm/i915/selftests/igt_mmap.c

26

offset / PAGE_SIZE, size / PAGE_SIZE);

sys/dev/pci/drm/i915/selftests/igt_mmap.c

30

pr_info("Failed to lookup %llx\n", offset);

sys/dev/pci/drm/i915/selftests/igt_mmap.h

16

u64 offset,

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

1095

u32 offset;

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

1109

offset = igt_random_offset(&prng, 0, obj->base.size,

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

1113

memset32(vaddr + offset / sizeof(u32), val ^ 0xdeadbeaf,

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

1120

dword = igt_random_offset(&prng, offset,

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

1121

offset + size,

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

1127

size, align, offset);

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

163

u32 i, offset, count, *order;

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

191

offset = igt_random_offset(&prng, 0, chunk_size, size,

sys/dev/pci/drm/i915/selftests/intel_memory_region.c

194

err = intel_memory_region_reserve(mem, start + offset, size);

sys/dev/pci/drm/i915/selftests/intel_uncore.c

148

unsigned int offset;

sys/dev/pci/drm/i915/selftests/intel_uncore.c

211

i915_reg_t mmio = _MMIO(engine->mmio_base + r->offset);

sys/dev/pci/drm/i915/selftests/intel_uncore.c

212

u32 __iomem *reg = intel_uncore_regs(uncore) + engine->mmio_base + r->offset;

sys/dev/pci/drm/i915/selftests/intel_uncore.c

283

u32 offset;

sys/dev/pci/drm/i915/selftests/intel_uncore.c

304

for (offset = 0; offset < FW_RANGE; offset += 4) {

sys/dev/pci/drm/i915/selftests/intel_uncore.c

305

i915_reg_t reg = { offset };

sys/dev/pci/drm/i915/selftests/intel_uncore.c

309

set_bit(offset, valid);

sys/dev/pci/drm/i915/selftests/intel_uncore.c

315

for_each_set_bit(offset, valid, FW_RANGE) {

sys/dev/pci/drm/i915/selftests/intel_uncore.c

316

i915_reg_t reg = { offset };

sys/dev/pci/drm/i915/selftests/intel_uncore.c

327

offset);

sys/dev/pci/drm/i915/selftests/mock_gtt.c

29

u64 offset,

sys/dev/pci/drm/i915/selftests/mock_region.c

62

resource_size_t offset,

sys/dev/pci/drm/i915/selftests/mock_region.c

76

obj->bo_offset = offset;

sys/dev/pci/drm/i915/selftests/scatterlist.c

258

GEM_BUG_ON(sg->offset != 0);

sys/dev/pci/drm/i915/selftests/scatterlist.c

288

int offset;

sys/dev/pci/drm/i915/selftests/scatterlist.c

290

for (offset = -1; offset <= 1; offset++) {

sys/dev/pci/drm/i915/selftests/scatterlist.c

291

unsigned long sz = size + offset;

sys/dev/pci/drm/i915/soc/intel_rom.c

125

u32 intel_rom_read32(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.c

127

return rom->read32(rom, offset);

sys/dev/pci/drm/i915/soc/intel_rom.c

130

u16 intel_rom_read16(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.c

132

return rom->read16(rom, offset);

sys/dev/pci/drm/i915/soc/intel_rom.c

136

loff_t offset, size_t size)

sys/dev/pci/drm/i915/soc/intel_rom.c

142

rom->read_block(rom, data, offset, size);

sys/dev/pci/drm/i915/soc/intel_rom.c

147

*ptr++ = rom->read32(rom, offset + index);

sys/dev/pci/drm/i915/soc/intel_rom.c

152

loff_t offset;

sys/dev/pci/drm/i915/soc/intel_rom.c

154

for (offset = 0; offset < rom->size; offset += 4) {

sys/dev/pci/drm/i915/soc/intel_rom.c

155

if (rom->read32(rom, offset) == needle)

sys/dev/pci/drm/i915/soc/intel_rom.c

156

return offset;

sys/dev/pci/drm/i915/soc/intel_rom.c

25

loff_t offset;

sys/dev/pci/drm/i915/soc/intel_rom.c

29

u32 (*read32)(struct intel_rom *rom, loff_t offset);

sys/dev/pci/drm/i915/soc/intel_rom.c

30

u16 (*read16)(struct intel_rom *rom, loff_t offset);

sys/dev/pci/drm/i915/soc/intel_rom.c

31

void (*read_block)(struct intel_rom *rom, void *data, loff_t offset, size_t size);

sys/dev/pci/drm/i915/soc/intel_rom.c

35

static u32 spi_read32(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.c

38

rom->offset + offset);

sys/dev/pci/drm/i915/soc/intel_rom.c

43

static u16 spi_read16(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.c

45

return spi_read32(rom, offset) & 0xffff;

sys/dev/pci/drm/i915/soc/intel_rom.c

63

rom->offset = intel_uncore_read(rom->uncore, OROM_OFFSET) & OROM_OFFSET_MASK;

sys/dev/pci/drm/i915/soc/intel_rom.c

73

static u32 pci_read32(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.c

75

return ioread32(rom->oprom + offset);

sys/dev/pci/drm/i915/soc/intel_rom.c

78

static u16 pci_read16(struct intel_rom *rom, loff_t offset)

sys/dev/pci/drm/i915/soc/intel_rom.c

80

return ioread16(rom->oprom + offset);

sys/dev/pci/drm/i915/soc/intel_rom.c

84

loff_t offset, size_t size)

sys/dev/pci/drm/i915/soc/intel_rom.c

86

memcpy_fromio(data, rom->oprom + offset, size);

sys/dev/pci/drm/i915/soc/intel_rom.h

17

u32 intel_rom_read32(struct intel_rom *rom, loff_t offset);

sys/dev/pci/drm/i915/soc/intel_rom.h

18

u16 intel_rom_read16(struct intel_rom *rom, loff_t offset);

sys/dev/pci/drm/i915/soc/intel_rom.h

20

loff_t offset, size_t size);

sys/dev/pci/drm/include/drm/display/drm_dp_dual_mode_helper.h

69

u8 offset, void *buffer, size_t size);

sys/dev/pci/drm/include/drm/display/drm_dp_dual_mode_helper.h

71

u8 offset, const void *buffer, size_t size);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

533

int drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

536

ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

538

ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

556

unsigned int offset,

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

561

ret = drm_dp_dpcd_read(aux, offset, buffer, size);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

585

unsigned int offset,

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

590

ret = drm_dp_dpcd_write(aux, offset, buffer, size);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

610

unsigned int offset, u8 *valuep)

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

612

return drm_dp_dpcd_read(aux, offset, valuep, 1);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

626

unsigned int offset, u8 value)

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

628

return drm_dp_dpcd_write(aux, offset, &value, 1);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

640

unsigned int offset, u8 *valuep)

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

642

return drm_dp_dpcd_read_data(aux, offset, valuep, 1);

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

654

unsigned int offset, u8 value)

sys/dev/pci/drm/include/drm/display/drm_dp_helper.h

656

return drm_dp_dpcd_write_data(aux, offset, &value, 1);

sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h

909

unsigned int offset, void *buffer, size_t size);

sys/dev/pci/drm/include/drm/display/drm_dp_mst_helper.h

911

unsigned int offset, void *buffer, size_t size);

sys/dev/pci/drm/include/drm/display/drm_scdc_helper.h

34

ssize_t drm_scdc_read(struct i2c_adapter *adapter, u8 offset, void *buffer,

sys/dev/pci/drm/include/drm/display/drm_scdc_helper.h

36

ssize_t drm_scdc_write(struct i2c_adapter *adapter, u8 offset,

sys/dev/pci/drm/include/drm/display/drm_scdc_helper.h

51

static inline int drm_scdc_readb(struct i2c_adapter *adapter, u8 offset,

sys/dev/pci/drm/include/drm/display/drm_scdc_helper.h

54

return drm_scdc_read(adapter, offset, value, sizeof(*value));

sys/dev/pci/drm/include/drm/display/drm_scdc_helper.h

69

static inline int drm_scdc_writeb(struct i2c_adapter *adapter, u8 offset,

sys/dev/pci/drm/include/drm/display/drm_scdc_helper.h

72

return drm_scdc_write(adapter, offset, &value, sizeof(value));

sys/dev/pci/drm/include/drm/drm_bridge.h

1172

void *__devm_drm_bridge_alloc(struct device *dev, size_t size, size_t offset,

sys/dev/pci/drm/include/drm/drm_crtc.h

1227

size_t size, size_t offset,

sys/dev/pci/drm/include/drm/drm_drv.h

377

uint64_t *offset);

sys/dev/pci/drm/include/drm/drm_drv.h

451

size_t size, size_t offset);

sys/dev/pci/drm/include/drm/drm_drv.h

492

size_t size, size_t offset);

sys/dev/pci/drm/include/drm/drm_encoder.h

219

size_t size, size_t offset,

sys/dev/pci/drm/include/drm/drm_file.h

481

size_t count, loff_t *offset);

sys/dev/pci/drm/include/drm/drm_framebuffer.h

319

u32 offset;

sys/dev/pci/drm/include/drm/drm_gem.h

597

u32 handle, u64 *offset);

sys/dev/pci/drm/include/drm/drm_gpuvm.h

1113

va->gem.offset = op->gem.offset;

sys/dev/pci/drm/include/drm/drm_gpuvm.h

112

u64 offset;

sys/dev/pci/drm/include/drm/drm_gpuvm.h

867

u64 offset;

sys/dev/pci/drm/include/drm/drm_panel.h

297

void *__devm_drm_panel_alloc(struct device *dev, size_t size, size_t offset,

sys/dev/pci/drm/include/drm/drm_plane.h

824

size_t size, size_t offset,

sys/dev/pci/drm/include/drm/drm_plane.h

869

size_t size, size_t offset,

sys/dev/pci/drm/include/drm/drm_print.h

242

ssize_t offset;

sys/dev/pci/drm/include/drm/drm_print.h

342

iter->offset = 0;

sys/dev/pci/drm/include/drm/drm_simple_kms_helper.h

10

return __drmm_encoder_alloc(dev, size, offset, NULL, type, NULL);

sys/dev/pci/drm/include/drm/drm_simple_kms_helper.h

8

size_t offset, int type)

sys/dev/pci/drm/include/drm/ttm/ttm_bo.h

430

int ttm_bo_access(struct ttm_buffer_object *bo, unsigned long offset,

sys/dev/pci/drm/include/drm/ttm/ttm_device.h

198

int (*access_memory)(struct ttm_buffer_object *bo, unsigned long offset,

sys/dev/pci/drm/include/drm/ttm/ttm_resource.h

234

phys_addr_t offset;

sys/dev/pci/drm/include/linux/dma-mapping.h

49

dma_map_page(void *dev, struct vm_page *page, size_t offset,

sys/dev/pci/drm/include/linux/dma-mapping.h

55

dma_map_page_attrs(void *dev, struct vm_page *page, size_t offset,

sys/dev/pci/drm/include/linux/scatterlist.h

117

unsigned int length, unsigned int offset)

sys/dev/pci/drm/include/linux/scatterlist.h

121

sgl->offset = offset;

sys/dev/pci/drm/include/linux/scatterlist.h

31

unsigned int offset;

sys/dev/pci/drm/include/uapi/drm/amdgpu_drm.h

1043

__u32 offset;

sys/dev/pci/drm/include/uapi/drm/amdgpu_drm.h

1337

__u32 offset;

sys/dev/pci/drm/include/uapi/drm/amdgpu_drm.h

819

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/drm.h

226

unsigned long offset; /**< Requested physical address (0 for SAREA)*/

sys/dev/pci/drm/include/uapi/drm/drm.h

561

unsigned long offset; /**< In bytes -- will round to page boundary */

sys/dev/pci/drm/include/uapi/drm/drm_mode.h

1099

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/drm_mode.h

1214

__u32 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

1000

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

1023

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

1136

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

1210

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

1271

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

1582

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

2653

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

936

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

952

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/i915_drm.h

968

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/radeon_drm.h

197

unsigned char cmd_type, offset, stride, count;

sys/dev/pci/drm/include/uapi/drm/radeon_drm.h

200

unsigned char cmd_type, offset, stride, count;

sys/dev/pci/drm/include/uapi/drm/radeon_drm.h

677

unsigned int offset;

sys/dev/pci/drm/include/uapi/drm/radeon_drm.h

871

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/radeon_drm.h

897

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/radeon_drm.h

910

__u64 offset;

sys/dev/pci/drm/include/uapi/drm/radeon_drm.h

946

__u64 offset;

sys/dev/pci/drm/include/uapi/linux/kfd_ioctl.h

724

__u64 offset;

sys/dev/pci/drm/radeon/atom.c

1384

int offset = index * 2 + 4;

sys/dev/pci/drm/radeon/atom.c

1385

int idx = CU16(ctx->data_table + offset);

sys/dev/pci/drm/radeon/atom.c

1404

int offset = index * 2 + 4;

sys/dev/pci/drm/radeon/atom.c

1405

int idx = CU16(ctx->cmd_table + offset);

sys/dev/pci/drm/radeon/ci_dpm.c

548

while (config_regs->offset != 0xFFFFFFFF) {

sys/dev/pci/drm/radeon/ci_dpm.c

554

data = RREG32_SMC(config_regs->offset);

sys/dev/pci/drm/radeon/ci_dpm.c

557

data = RREG32_DIDT(config_regs->offset);

sys/dev/pci/drm/radeon/ci_dpm.c

560

data = RREG32(config_regs->offset << 2);

sys/dev/pci/drm/radeon/ci_dpm.c

570

WREG32_SMC(config_regs->offset, data);

sys/dev/pci/drm/radeon/ci_dpm.c

573

WREG32_DIDT(config_regs->offset, data);

sys/dev/pci/drm/radeon/ci_dpm.c

576

WREG32(config_regs->offset << 2, data);

sys/dev/pci/drm/radeon/ci_dpm.h

167

u32 offset;

sys/dev/pci/drm/radeon/dce3_1_afmt.c

171

void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

177

WREG32(DCE3_HDMI0_ACR_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

181

WREG32_P(HDMI0_ACR_32_0 + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

184

WREG32_P(HDMI0_ACR_32_1 + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

188

WREG32_P(HDMI0_ACR_44_0 + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

191

WREG32_P(HDMI0_ACR_44_1 + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

195

WREG32_P(HDMI0_ACR_48_0 + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

198

WREG32_P(HDMI0_ACR_48_1 + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

203

void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset)

sys/dev/pci/drm/radeon/dce3_1_afmt.c

208

WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

212

WREG32(AFMT_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

216

WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

220

WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,

sys/dev/pci/drm/radeon/dce3_1_afmt.c

224

void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute)

sys/dev/pci/drm/radeon/dce3_1_afmt.c

230

WREG32_OR(HDMI0_GC + offset, HDMI0_GC_AVMUTE);

sys/dev/pci/drm/radeon/dce3_1_afmt.c

232

WREG32_AND(HDMI0_GC + offset, ~HDMI0_GC_AVMUTE);

sys/dev/pci/drm/radeon/dce6_afmt.c

121

WREG32(AFMT_AUDIO_SRC_CONTROL + dig->afmt->offset,

sys/dev/pci/drm/radeon/dce6_afmt.c

150

WREG32_ENDPOINT(dig->pin->offset,

sys/dev/pci/drm/radeon/dce6_afmt.c

166

tmp = RREG32_ENDPOINT(dig->pin->offset,

sys/dev/pci/drm/radeon/dce6_afmt.c

175

WREG32_ENDPOINT(dig->pin->offset,

sys/dev/pci/drm/radeon/dce6_afmt.c

191

tmp = RREG32_ENDPOINT(dig->pin->offset,

sys/dev/pci/drm/radeon/dce6_afmt.c

200

WREG32_ENDPOINT(dig->pin->offset,

sys/dev/pci/drm/radeon/dce6_afmt.c

255

WREG32_ENDPOINT(dig->pin->offset, eld_reg_to_type[i][0], value);

sys/dev/pci/drm/radeon/dce6_afmt.c

266

WREG32_ENDPOINT(pin->offset, AZ_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL,

sys/dev/pci/drm/radeon/dce6_afmt.c

66

u32 offset, tmp;

sys/dev/pci/drm/radeon/dce6_afmt.c

69

offset = rdev->audio.pin[i].offset;

sys/dev/pci/drm/radeon/dce6_afmt.c

70

tmp = RREG32_ENDPOINT(offset,

sys/dev/pci/drm/radeon/dce6_afmt.h

35

u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);

sys/dev/pci/drm/radeon/dce6_afmt.h

36

void dce6_endpoint_wreg(struct radeon_device *rdev, u32 offset, u32 reg, u32 v);

sys/dev/pci/drm/radeon/evergreen_cs.c

1795

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

1820

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/evergreen_cs.c

1824

ib[idx + 0] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

1825

ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff);

sys/dev/pci/drm/radeon/evergreen_cs.c

1854

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

1866

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/evergreen_cs.c

1870

ib[idx+0] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

1871

ib[idx+1] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

1890

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

1901

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/evergreen_cs.c

1905

ib[idx+0] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

1906

ib[idx+1] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

1917

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

1929

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/evergreen_cs.c

1933

ib[idx+1] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

1934

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2094

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2102

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/evergreen_cs.c

2106

ib[idx+1] = (ib[idx+1] & 0x3) | (offset & 0xfffffffc);

sys/dev/pci/drm/radeon/evergreen_cs.c

2107

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2116

u64 offset, tmp;

sys/dev/pci/drm/radeon/evergreen_cs.c

2159

offset = reloc->gpu_offset + tmp;

sys/dev/pci/drm/radeon/evergreen_cs.c

2167

ib[idx] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2168

ib[idx+1] = (ib[idx+1] & 0xffffff00) | (upper_32_bits(offset) & 0xff);

sys/dev/pci/drm/radeon/evergreen_cs.c

2197

offset = reloc->gpu_offset + tmp;

sys/dev/pci/drm/radeon/evergreen_cs.c

2205

ib[idx+2] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2206

ib[idx+3] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2242

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2249

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/evergreen_cs.c

2253

ib[idx+1] = offset & 0xfffffff8;

sys/dev/pci/drm/radeon/evergreen_cs.c

2254

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2259

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2271

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/evergreen_cs.c

2275

ib[idx+1] = offset & 0xfffffffc;

sys/dev/pci/drm/radeon/evergreen_cs.c

2276

ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff);

sys/dev/pci/drm/radeon/evergreen_cs.c

2281

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2293

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/evergreen_cs.c

2297

ib[idx+1] = offset & 0xfffffffc;

sys/dev/pci/drm/radeon/evergreen_cs.c

2298

ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff);

sys/dev/pci/drm/radeon/evergreen_cs.c

2351

u32 size, offset, mip_address, tex_dim;

sys/dev/pci/drm/radeon/evergreen_cs.c

2417

offset = radeon_get_ib_value(p, idx+1+(i*8)+0);

sys/dev/pci/drm/radeon/evergreen_cs.c

2419

if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2422

size + offset, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2423

ib[idx+1+(i*8)+1] = radeon_bo_size(reloc->robj) - offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2426

offset64 = reloc->gpu_offset + offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2494

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2500

offset = radeon_get_ib_value(p, idx+1);

sys/dev/pci/drm/radeon/evergreen_cs.c

2501

offset += ((u64)(radeon_get_ib_value(p, idx+2) & 0xff)) << 32;

sys/dev/pci/drm/radeon/evergreen_cs.c

2502

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2504

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2507

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2508

ib[idx+1] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2509

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2513

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2519

offset = radeon_get_ib_value(p, idx+3);

sys/dev/pci/drm/radeon/evergreen_cs.c

2520

offset += ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32;

sys/dev/pci/drm/radeon/evergreen_cs.c

2521

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2523

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2526

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2527

ib[idx+3] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2528

ib[idx+4] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2533

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2544

offset = radeon_get_ib_value(p, idx+0);

sys/dev/pci/drm/radeon/evergreen_cs.c

2545

offset += ((u64)(radeon_get_ib_value(p, idx+1) & 0xff)) << 32UL;

sys/dev/pci/drm/radeon/evergreen_cs.c

2546

if (offset & 0x7) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2550

if ((offset + 8) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2552

offset + 8, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2555

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2556

ib[idx+0] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2557

ib[idx+1] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2566

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2573

offset = radeon_get_ib_value(p, idx+1);

sys/dev/pci/drm/radeon/evergreen_cs.c

2574

offset += ((u64)(radeon_get_ib_value(p, idx+2) & 0xff)) << 32;

sys/dev/pci/drm/radeon/evergreen_cs.c

2575

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2577

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2580

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2581

ib[idx+1] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2582

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2593

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2600

offset = radeon_get_ib_value(p, idx+3);

sys/dev/pci/drm/radeon/evergreen_cs.c

2601

offset += ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32;

sys/dev/pci/drm/radeon/evergreen_cs.c

2602

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2604

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2607

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2608

ib[idx+3] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2609

ib[idx+4] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2643

uint64_t offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2650

offset = radeon_get_ib_value(p, idx + 1);

sys/dev/pci/drm/radeon/evergreen_cs.c

2651

swap = offset & 0x3;

sys/dev/pci/drm/radeon/evergreen_cs.c

2652

offset &= ~0x3;

sys/dev/pci/drm/radeon/evergreen_cs.c

2654

offset += ((u64)(radeon_get_ib_value(p, idx + 2) & 0xff)) << 32;

sys/dev/pci/drm/radeon/evergreen_cs.c

2656

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2657

ib[idx+1] = (offset & 0xfffffffc) | swap;

sys/dev/pci/drm/radeon/evergreen_cs.c

2658

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2667

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2678

offset = radeon_get_ib_value(p, idx + 0);

sys/dev/pci/drm/radeon/evergreen_cs.c

2679

offset += ((u64)(radeon_get_ib_value(p, idx + 1) & 0xff)) << 32UL;

sys/dev/pci/drm/radeon/evergreen_cs.c

2680

if (offset & 0x7) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2684

if ((offset + 8) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2686

offset + 8, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2689

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2690

ib[idx + 0] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2691

ib[idx + 1] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2700

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2707

offset = radeon_get_ib_value(p, idx + 1);

sys/dev/pci/drm/radeon/evergreen_cs.c

2708

offset += ((u64)(radeon_get_ib_value(p, idx + 2) & 0xff)) << 32;

sys/dev/pci/drm/radeon/evergreen_cs.c

2709

if ((offset + 8) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2711

offset + 8, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2714

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2715

ib[idx + 1] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2716

ib[idx + 2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

2727

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2734

offset = radeon_get_ib_value(p, idx + 5);

sys/dev/pci/drm/radeon/evergreen_cs.c

2735

offset += ((u64)(radeon_get_ib_value(p, idx + 6) & 0xff)) << 32;

sys/dev/pci/drm/radeon/evergreen_cs.c

2736

if ((offset + 8) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

2738

offset + 8, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/evergreen_cs.c

2741

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2742

ib[idx + 5] = offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

2743

ib[idx + 6] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/evergreen_cs.c

400

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

438

offset = (u64)track->cb_color_bo_offset[id] << 8;

sys/dev/pci/drm/radeon/evergreen_cs.c

439

if (offset & (surf.base_align - 1)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

441

__func__, __LINE__, id, offset, surf.base_align);

sys/dev/pci/drm/radeon/evergreen_cs.c

445

offset += (u64)surf.layer_size * mslice;

sys/dev/pci/drm/radeon/evergreen_cs.c

446

if (offset > radeon_bo_size(track->cb_color_bo[id])) {

sys/dev/pci/drm/radeon/evergreen_cs.c

567

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

613

offset = (u64)track->db_s_read_offset << 8;

sys/dev/pci/drm/radeon/evergreen_cs.c

614

if (offset & (surf.base_align - 1)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

616

__func__, __LINE__, offset, surf.base_align);

sys/dev/pci/drm/radeon/evergreen_cs.c

619

offset += (u64)surf.layer_size * mslice;

sys/dev/pci/drm/radeon/evergreen_cs.c

620

if (offset > radeon_bo_size(track->db_s_read_bo)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

632

offset = (u64)track->db_s_write_offset << 8;

sys/dev/pci/drm/radeon/evergreen_cs.c

633

if (offset & (surf.base_align - 1)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

635

__func__, __LINE__, offset, surf.base_align);

sys/dev/pci/drm/radeon/evergreen_cs.c

638

offset += (u64)surf.layer_size * mslice;

sys/dev/pci/drm/radeon/evergreen_cs.c

639

if (offset > radeon_bo_size(track->db_s_write_bo)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

664

u64 offset;

sys/dev/pci/drm/radeon/evergreen_cs.c

711

offset = (u64)track->db_z_read_offset << 8;

sys/dev/pci/drm/radeon/evergreen_cs.c

712

if (offset & (surf.base_align - 1)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

714

__func__, __LINE__, offset, surf.base_align);

sys/dev/pci/drm/radeon/evergreen_cs.c

717

offset += (u64)surf.layer_size * mslice;

sys/dev/pci/drm/radeon/evergreen_cs.c

718

if (offset > radeon_bo_size(track->db_z_read_bo)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

727

offset = (u64)track->db_z_write_offset << 8;

sys/dev/pci/drm/radeon/evergreen_cs.c

728

if (offset & (surf.base_align - 1)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

730

__func__, __LINE__, offset, surf.base_align);

sys/dev/pci/drm/radeon/evergreen_cs.c

733

offset += (u64)surf.layer_size * mslice;

sys/dev/pci/drm/radeon/evergreen_cs.c

734

if (offset > radeon_bo_size(track->db_z_write_bo)) {

sys/dev/pci/drm/radeon/evergreen_cs.c

951

u64 offset = (u64)track->vgt_strmout_bo_offset[i] +

sys/dev/pci/drm/radeon/evergreen_cs.c

953

if (offset > radeon_bo_size(track->vgt_strmout_bo[i])) {

sys/dev/pci/drm/radeon/evergreen_cs.c

955

i, offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

210

void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

215

WREG32(AFMT_AVI_INFO0 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

217

WREG32(AFMT_AVI_INFO1 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

219

WREG32(AFMT_AVI_INFO2 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

221

WREG32(AFMT_AVI_INFO3 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

224

WREG32_P(HDMI_INFOFRAME_CONTROL1 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

308

void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset)

sys/dev/pci/drm/radeon/evergreen_hdmi.c

313

WREG32(HDMI_VBI_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

319

void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc)

sys/dev/pci/drm/radeon/evergreen_hdmi.c

326

val = RREG32(HDMI_CONTROL + offset);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

353

WREG32(HDMI_CONTROL + offset, val);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

356

void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset)

sys/dev/pci/drm/radeon/evergreen_hdmi.c

361

WREG32(AFMT_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

364

WREG32(AFMT_60958_0 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

367

WREG32(AFMT_60958_1 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

370

WREG32(AFMT_60958_2 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

378

WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

381

WREG32(HDMI_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

386

WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

391

void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute)

sys/dev/pci/drm/radeon/evergreen_hdmi.c

397

WREG32_OR(HDMI_GC + offset, HDMI_GC_AVMUTE);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

399

WREG32_AND(HDMI_GC + offset, ~HDMI_GC_AVMUTE);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

416

WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

421

WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

424

WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

427

WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

431

WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

433

WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

439

enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

459

WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

462

WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

467

val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

475

WREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset, val);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

478

WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

484

WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

485

WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

69

void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

82

WREG32(HDMI_ACR_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

85

WREG32(HDMI_ACR_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.c

89

WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz));

sys/dev/pci/drm/radeon/evergreen_hdmi.c

90

WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

92

WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz));

sys/dev/pci/drm/radeon/evergreen_hdmi.c

93

WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz);

sys/dev/pci/drm/radeon/evergreen_hdmi.c

95

WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz));

sys/dev/pci/drm/radeon/evergreen_hdmi.c

96

WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz);

sys/dev/pci/drm/radeon/evergreen_hdmi.h

43

void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.h

45

void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,

sys/dev/pci/drm/radeon/evergreen_hdmi.h

63

void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);

sys/dev/pci/drm/radeon/evergreen_hdmi.h

65

u32 offset, int bpc);

sys/dev/pci/drm/radeon/evergreen_hdmi.h

66

void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);

sys/dev/pci/drm/radeon/evergreen_hdmi.h

67

void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);

sys/dev/pci/drm/radeon/kv_dpm.c

167

while (config_regs->offset != 0xFFFFFFFF) {

sys/dev/pci/drm/radeon/kv_dpm.c

173

data = RREG32_SMC(config_regs->offset);

sys/dev/pci/drm/radeon/kv_dpm.c

176

data = RREG32_DIDT(config_regs->offset);

sys/dev/pci/drm/radeon/kv_dpm.c

179

data = RREG32(config_regs->offset << 2);

sys/dev/pci/drm/radeon/kv_dpm.c

190

WREG32_SMC(config_regs->offset, data);

sys/dev/pci/drm/radeon/kv_dpm.c

193

WREG32_DIDT(config_regs->offset, data);

sys/dev/pci/drm/radeon/kv_dpm.c

196

WREG32(config_regs->offset << 2, data);

sys/dev/pci/drm/radeon/kv_dpm.h

45

u32 offset;

sys/dev/pci/drm/radeon/mkregtable.c

108

unsigned offset;

sys/dev/pci/drm/radeon/mkregtable.c

119

static struct offset *offset_new(unsigned o)

sys/dev/pci/drm/radeon/mkregtable.c

121

struct offset *offset;

sys/dev/pci/drm/radeon/mkregtable.c

123

offset = (struct offset *)malloc(sizeof(struct offset));

sys/dev/pci/drm/radeon/mkregtable.c

124

if (offset) {

sys/dev/pci/drm/radeon/mkregtable.c

125

INIT_LIST_HEAD(&offset->list);

sys/dev/pci/drm/radeon/mkregtable.c

126

offset->offset = o;

sys/dev/pci/drm/radeon/mkregtable.c

128

return offset;

sys/dev/pci/drm/radeon/mkregtable.c

131

static void table_offset_add(struct table *t, struct offset *offset)

sys/dev/pci/drm/radeon/mkregtable.c

133

list_add_tail(&offset->list, &t->offsets);

sys/dev/pci/drm/radeon/mkregtable.c

171

struct offset *offset;

sys/dev/pci/drm/radeon/mkregtable.c

179

list_for_each_entry(offset, &t->offsets, list) {

sys/dev/pci/drm/radeon/mkregtable.c

180

i = (offset->offset >> 2) / 32;

sys/dev/pci/drm/radeon/mkregtable.c

181

m = (offset->offset >> 2) & 31;

sys/dev/pci/drm/radeon/mkregtable.c

200

struct offset *offset;

sys/dev/pci/drm/radeon/mkregtable.c

252

offset = offset_new(o);

sys/dev/pci/drm/radeon/mkregtable.c

253

table_offset_add(t, offset);

sys/dev/pci/drm/radeon/r100.c

1625

track->zb.offset = idx_value;

sys/dev/pci/drm/radeon/r100.c

1638

track->cb[0].offset = idx_value;

sys/dev/pci/drm/radeon/r100.c

1680

track->textures[0].cube_info[i].offset = idx_value;

sys/dev/pci/drm/radeon/r100.c

1698

track->textures[1].cube_info[i].offset = idx_value;

sys/dev/pci/drm/radeon/r100.c

1716

track->textures[2].cube_info[i].offset = idx_value;

sys/dev/pci/drm/radeon/r100.c

2172

size += track->textures[idx].cube_info[face].offset;

sys/dev/pci/drm/radeon/r100.c

2285

size += track->cb[i].offset;

sys/dev/pci/drm/radeon/r100.c

2292

track->cb[i].offset, track->maxy);

sys/dev/pci/drm/radeon/r100.c

2304

size += track->zb.offset;

sys/dev/pci/drm/radeon/r100.c

2311

track->zb.offset, track->maxy);

sys/dev/pci/drm/radeon/r100.c

2324

size += track->aa.offset;

sys/dev/pci/drm/radeon/r100.c

2331

track->aa.offset, track->maxy);

sys/dev/pci/drm/radeon/r100.c

2434

track->cb[i].offset = 0;

sys/dev/pci/drm/radeon/r100.c

2440

track->zb.offset = 0;

sys/dev/pci/drm/radeon/r100.c

2476

track->textures[i].cube_info[face].offset = 0;

sys/dev/pci/drm/radeon/r100.c

3114

uint32_t offset, uint32_t obj_size)

sys/dev/pci/drm/radeon/r100.c

3153

DRM_DEBUG_KMS("writing surface %d %d %x %x\n", reg, flags, offset, offset+obj_size-1);

sys/dev/pci/drm/radeon/r100.c

3155

WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset);

sys/dev/pci/drm/radeon/r100.c

3156

WREG32(RADEON_SURFACE0_UPPER_BOUND + surf_index, offset + obj_size - 1);

sys/dev/pci/drm/radeon/r100_track.h

19

unsigned offset;

sys/dev/pci/drm/radeon/r100_track.h

29

unsigned offset;

sys/dev/pci/drm/radeon/r200.c

189

track->zb.offset = idx_value;

sys/dev/pci/drm/radeon/r200.c

202

track->cb[0].offset = idx_value;

sys/dev/pci/drm/radeon/r200.c

273

track->textures[i].cube_info[face - 1].offset = idx_value;

sys/dev/pci/drm/radeon/r300.c

1130

track->aa.offset = idx_value;

sys/dev/pci/drm/radeon/r300.c

673

track->cb[i].offset = idx_value;

sys/dev/pci/drm/radeon/r300.c

686

track->zb.offset = idx_value;

sys/dev/pci/drm/radeon/r600.c

3030

uint32_t offset, uint32_t obj_size)

sys/dev/pci/drm/radeon/r600.h

44

void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);

sys/dev/pci/drm/radeon/r600.h

45

void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);

sys/dev/pci/drm/radeon/r600.h

48

void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,

sys/dev/pci/drm/radeon/r600.h

50

void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,

sys/dev/pci/drm/radeon/r600.h

52

void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);

sys/dev/pci/drm/radeon/r600_cs.c

1416

unsigned offset, i;

sys/dev/pci/drm/radeon/r600_cs.c

1428

for (i = 0, offset = 0; i < nlevels; i++) {

sys/dev/pci/drm/radeon/r600_cs.c

1450

offset = round_up(offset, base_align);

sys/dev/pci/drm/radeon/r600_cs.c

1452

offset += size;

sys/dev/pci/drm/radeon/r600_cs.c

1454

*mipmap_size = offset;

sys/dev/pci/drm/radeon/r600_cs.c

1653

uint64_t offset;

sys/dev/pci/drm/radeon/r600_cs.c

1678

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/r600_cs.c

1682

ib[idx + 0] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

1683

ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff);

sys/dev/pci/drm/radeon/r600_cs.c

1708

uint64_t offset;

sys/dev/pci/drm/radeon/r600_cs.c

1719

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/r600_cs.c

1723

ib[idx+0] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

1724

ib[idx+1] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

1763

uint64_t offset;

sys/dev/pci/drm/radeon/r600_cs.c

1771

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/r600_cs.c

1775

ib[idx+1] = (ib[idx+1] & 0x3) | (offset & 0xfffffff0);

sys/dev/pci/drm/radeon/r600_cs.c

1776

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

1785

u64 offset, tmp;

sys/dev/pci/drm/radeon/r600_cs.c

1811

offset = reloc->gpu_offset + tmp;

sys/dev/pci/drm/radeon/r600_cs.c

1819

ib[idx] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

1820

ib[idx+1] = (ib[idx+1] & 0xffffff00) | (upper_32_bits(offset) & 0xff);

sys/dev/pci/drm/radeon/r600_cs.c

1841

offset = reloc->gpu_offset + tmp;

sys/dev/pci/drm/radeon/r600_cs.c

1849

ib[idx+2] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

1850

ib[idx+3] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

1876

uint64_t offset;

sys/dev/pci/drm/radeon/r600_cs.c

1883

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/r600_cs.c

1887

ib[idx+1] = offset & 0xfffffff8;

sys/dev/pci/drm/radeon/r600_cs.c

1888

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

1893

uint64_t offset;

sys/dev/pci/drm/radeon/r600_cs.c

1905

offset = reloc->gpu_offset +

sys/dev/pci/drm/radeon/r600_cs.c

1909

ib[idx+1] = offset & 0xfffffffc;

sys/dev/pci/drm/radeon/r600_cs.c

1910

ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff);

sys/dev/pci/drm/radeon/r600_cs.c

1960

u32 size, offset, base_offset, mip_offset;

sys/dev/pci/drm/radeon/r600_cs.c

2005

offset = radeon_get_ib_value(p, idx+1+(i*7)+0);

sys/dev/pci/drm/radeon/r600_cs.c

2007

if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/r600_cs.c

2010

size + offset, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/r600_cs.c

2011

ib[idx+1+(i*7)+1] = radeon_bo_size(reloc->robj) - offset;

sys/dev/pci/drm/radeon/r600_cs.c

2014

offset64 = reloc->gpu_offset + offset;

sys/dev/pci/drm/radeon/r600_cs.c

2099

u64 offset;

sys/dev/pci/drm/radeon/r600_cs.c

2112

offset = (u64)radeon_get_ib_value(p, idx+1) << 8;

sys/dev/pci/drm/radeon/r600_cs.c

2113

if (offset != track->vgt_strmout_bo_offset[idx_value]) {

sys/dev/pci/drm/radeon/r600_cs.c

2116

offset, track->vgt_strmout_bo_offset[idx_value]);

sys/dev/pci/drm/radeon/r600_cs.c

2120

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/r600_cs.c

2123

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/r600_cs.c

2146

u64 offset;

sys/dev/pci/drm/radeon/r600_cs.c

2152

offset = radeon_get_ib_value(p, idx+1);

sys/dev/pci/drm/radeon/r600_cs.c

2153

offset += ((u64)(radeon_get_ib_value(p, idx+2) & 0xff)) << 32;

sys/dev/pci/drm/radeon/r600_cs.c

2154

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/r600_cs.c

2157

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/r600_cs.c

2160

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/r600_cs.c

2161

ib[idx+1] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

2162

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

2166

u64 offset;

sys/dev/pci/drm/radeon/r600_cs.c

2172

offset = radeon_get_ib_value(p, idx+3);

sys/dev/pci/drm/radeon/r600_cs.c

2173

offset += ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32;

sys/dev/pci/drm/radeon/r600_cs.c

2174

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/r600_cs.c

2177

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/r600_cs.c

2180

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/r600_cs.c

2181

ib[idx+3] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

2182

ib[idx+4] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

2187

u64 offset;

sys/dev/pci/drm/radeon/r600_cs.c

2198

offset = radeon_get_ib_value(p, idx+0);

sys/dev/pci/drm/radeon/r600_cs.c

2199

offset += ((u64)(radeon_get_ib_value(p, idx+1) & 0xff)) << 32UL;

sys/dev/pci/drm/radeon/r600_cs.c

2200

if (offset & 0x7) {

sys/dev/pci/drm/radeon/r600_cs.c

2204

if ((offset + 8) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/r600_cs.c

2206

offset + 8, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/r600_cs.c

2209

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/r600_cs.c

2210

ib[idx+0] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

2211

ib[idx+1] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

2220

u64 offset;

sys/dev/pci/drm/radeon/r600_cs.c

2227

offset = radeon_get_ib_value(p, idx+1);

sys/dev/pci/drm/radeon/r600_cs.c

2228

offset += ((u64)(radeon_get_ib_value(p, idx+2) & 0xff)) << 32;

sys/dev/pci/drm/radeon/r600_cs.c

2229

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/r600_cs.c

2231

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/r600_cs.c

2234

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/r600_cs.c

2235

ib[idx+1] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

2236

ib[idx+2] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

2244

u64 offset;

sys/dev/pci/drm/radeon/r600_cs.c

2251

offset = radeon_get_ib_value(p, idx+3);

sys/dev/pci/drm/radeon/r600_cs.c

2252

offset += ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32;

sys/dev/pci/drm/radeon/r600_cs.c

2253

if ((offset + 4) > radeon_bo_size(reloc->robj)) {

sys/dev/pci/drm/radeon/r600_cs.c

2255

offset + 4, radeon_bo_size(reloc->robj));

sys/dev/pci/drm/radeon/r600_cs.c

2258

offset += reloc->gpu_offset;

sys/dev/pci/drm/radeon/r600_cs.c

2259

ib[idx+3] = offset;

sys/dev/pci/drm/radeon/r600_cs.c

2260

ib[idx+4] = upper_32_bits(offset) & 0xff;

sys/dev/pci/drm/radeon/r600_cs.c

723

u64 offset = (u64)track->vgt_strmout_bo_offset[i] +

sys/dev/pci/drm/radeon/r600_cs.c

725

if (offset > radeon_bo_size(track->vgt_strmout_bo[i])) {

sys/dev/pci/drm/radeon/r600_cs.c

727

i, offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

178

void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

187

WREG32_P(acr_ctl + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

193

WREG32_P(HDMI0_ACR_32_0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

196

WREG32_P(HDMI0_ACR_32_1 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

200

WREG32_P(HDMI0_ACR_44_0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

203

WREG32_P(HDMI0_ACR_44_1 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

207

WREG32_P(HDMI0_ACR_48_0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

210

WREG32_P(HDMI0_ACR_48_1 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

218

void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

223

WREG32(HDMI0_AVI_INFO0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

225

WREG32(HDMI0_AVI_INFO1 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

227

WREG32(HDMI0_AVI_INFO2 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

229

WREG32(HDMI0_AVI_INFO3 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

232

WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

235

WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

251

uint32_t offset = dig->afmt->offset;

sys/dev/pci/drm/radeon/r600_hdmi.c

254

WREG32(HDMI0_AUDIO_INFO0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

256

WREG32(HDMI0_AUDIO_INFO1 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

269

uint32_t offset = dig->afmt->offset;

sys/dev/pci/drm/radeon/r600_hdmi.c

271

return (RREG32(HDMI0_STATUS + offset) & 0x10) != 0;

sys/dev/pci/drm/radeon/r600_hdmi.c

319

void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset)

sys/dev/pci/drm/radeon/r600_hdmi.c

324

WREG32_OR(HDMI0_VBI_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

330

void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset)

sys/dev/pci/drm/radeon/r600_hdmi.c

335

WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

345

WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

349

WREG32_P(HDMI0_INFOFRAME_CONTROL1 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

353

WREG32_AND(HDMI0_GENERIC_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

362

WREG32_P(HDMI0_60958_0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

367

WREG32_P(HDMI0_60958_1 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

372

void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute)

sys/dev/pci/drm/radeon/r600_hdmi.c

378

WREG32_OR(HDMI0_GC + offset, HDMI0_GC_AVMUTE);

sys/dev/pci/drm/radeon/r600_hdmi.c

380

WREG32_AND(HDMI0_GC + offset, ~HDMI0_GC_AVMUTE);

sys/dev/pci/drm/radeon/r600_hdmi.c

399

uint32_t offset;

sys/dev/pci/drm/radeon/r600_hdmi.c

405

offset = dig->afmt->offset;

sys/dev/pci/drm/radeon/r600_hdmi.c

427

value = RREG32(HDMI0_AUDIO_PACKET_CONTROL + offset);

sys/dev/pci/drm/radeon/r600_hdmi.c

429

WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

432

WREG32_OR(HDMI0_CONTROL + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

435

WREG32_AND(HDMI0_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

440

WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,

sys/dev/pci/drm/radeon/r600_hdmi.c

497

WREG32(HDMI0_CONTROL + dig->afmt->offset, hdmi);

sys/dev/pci/drm/radeon/r600_hdmi.c

512

enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);

sys/dev/pci/drm/radeon/radeon.h

1760

u32 offset;

sys/dev/pci/drm/radeon/radeon.h

1941

uint32_t offset, uint32_t obj_size);

sys/dev/pci/drm/radeon/radeon.h

2911

uint64_t offset,

sys/dev/pci/drm/radeon/radeon.h

635

void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,

sys/dev/pci/drm/radeon/radeon.h

637

int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,

sys/dev/pci/drm/radeon/radeon_asic.h

340

uint32_t offset, uint32_t obj_size);

sys/dev/pci/drm/radeon/radeon_asic.h

92

uint32_t offset, uint32_t obj_size);

sys/dev/pci/drm/radeon/radeon_atombios.c

3402

u32 offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO, asVoltageObj[0]);

sys/dev/pci/drm/radeon/radeon_atombios.c

3405

while (offset < size) {

sys/dev/pci/drm/radeon/radeon_atombios.c

3406

ATOM_VOLTAGE_OBJECT *vo = (ATOM_VOLTAGE_OBJECT *)(start + offset);

sys/dev/pci/drm/radeon/radeon_atombios.c

3409

offset += offsetof(ATOM_VOLTAGE_OBJECT, asFormula.ucVIDAdjustEntries) +

sys/dev/pci/drm/radeon/radeon_atombios.c

3419

u32 offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO_V2, asVoltageObj[0]);

sys/dev/pci/drm/radeon/radeon_atombios.c

3422

while (offset < size) {

sys/dev/pci/drm/radeon/radeon_atombios.c

3423

ATOM_VOLTAGE_OBJECT_V2 *vo = (ATOM_VOLTAGE_OBJECT_V2 *)(start + offset);

sys/dev/pci/drm/radeon/radeon_atombios.c

3426

offset += offsetof(ATOM_VOLTAGE_OBJECT_V2, asFormula.asVIDAdjustEntries) +

sys/dev/pci/drm/radeon/radeon_atombios.c

3436

u32 offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO_V3_1, asVoltageObj[0]);

sys/dev/pci/drm/radeon/radeon_atombios.c

3439

while (offset < size) {

sys/dev/pci/drm/radeon/radeon_atombios.c

3440

ATOM_VOLTAGE_OBJECT_V3 *vo = (ATOM_VOLTAGE_OBJECT_V3 *)(start + offset);

sys/dev/pci/drm/radeon/radeon_atombios.c

3444

offset += le16_to_cpu(vo->asGpioVoltageObj.sHeader.usSize);

sys/dev/pci/drm/radeon/radeon_audio.c

275

rdev->audio.pin[i].offset = pin_offsets[i];

sys/dev/pci/drm/radeon/radeon_audio.c

288

u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)

sys/dev/pci/drm/radeon/radeon_audio.c

291

return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);

sys/dev/pci/drm/radeon/radeon_audio.c

296

void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,

sys/dev/pci/drm/radeon/radeon_audio.c

300

rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);

sys/dev/pci/drm/radeon/radeon_audio.c

485

radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,

sys/dev/pci/drm/radeon/radeon_audio.c

57

static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)

sys/dev/pci/drm/radeon/radeon_audio.c

577

radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);

sys/dev/pci/drm/radeon/radeon_audio.c

589

radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);

sys/dev/pci/drm/radeon/radeon_audio.c

607

radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);

sys/dev/pci/drm/radeon/radeon_audio.c

619

radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);

sys/dev/pci/drm/radeon/radeon_audio.c

62

static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,

sys/dev/pci/drm/radeon/radeon_audio.c

631

radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);

sys/dev/pci/drm/radeon/radeon_audio.h

38

u32 (*endpoint_rreg)(struct radeon_device *rdev, u32 offset, u32 reg);

sys/dev/pci/drm/radeon/radeon_audio.h

40

u32 offset, u32 reg, u32 v);

sys/dev/pci/drm/radeon/radeon_audio.h

56

void (*update_acr)(struct drm_encoder *encoder, long offset,

sys/dev/pci/drm/radeon/radeon_audio.h

58

void (*set_vbi_packet)(struct drm_encoder *encoder, u32 offset);

sys/dev/pci/drm/radeon/radeon_audio.h

59

void (*set_color_depth)(struct drm_encoder *encoder, u32 offset, int bpc);

sys/dev/pci/drm/radeon/radeon_audio.h

60

void (*set_avi_packet)(struct radeon_device *rdev, u32 offset,

sys/dev/pci/drm/radeon/radeon_audio.h

62

void (*set_audio_packet)(struct drm_encoder *encoder, u32 offset);

sys/dev/pci/drm/radeon/radeon_audio.h

63

void (*set_mute)(struct drm_encoder *encoder, u32 offset, bool mute);

sys/dev/pci/drm/radeon/radeon_audio.h

74

u32 offset, u32 reg);

sys/dev/pci/drm/radeon/radeon_audio.h

76

u32 offset, u32 reg, u32 v);

sys/dev/pci/drm/radeon/radeon_audio.h

92

void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,

sys/dev/pci/drm/radeon/radeon_audio.h

94

void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);

sys/dev/pci/drm/radeon/radeon_audio.h

95

void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);

sys/dev/pci/drm/radeon/radeon_bios.c

285

int offset, int len)

sys/dev/pci/drm/radeon/radeon_bios.c

296

atrm_arg_elements[0].integer.value = offset;

sys/dev/pci/drm/radeon/radeon_bios.c

308

memcpy(bios+offset, obj->buffer.pointer, obj->buffer.length);

sys/dev/pci/drm/radeon/radeon_bios.c

755

unsigned offset;

sys/dev/pci/drm/radeon/radeon_bios.c

767

offset = vfct->VBIOSImageOffset;

sys/dev/pci/drm/radeon/radeon_bios.c

769

while (offset < tbl_size) {

sys/dev/pci/drm/radeon/radeon_bios.c

770

GOP_VBIOS_CONTENT *vbios = (GOP_VBIOS_CONTENT *)((char *)hdr + offset);

sys/dev/pci/drm/radeon/radeon_bios.c

773

offset += sizeof(VFCT_IMAGE_HEADER);

sys/dev/pci/drm/radeon/radeon_bios.c

774

if (offset > tbl_size) {

sys/dev/pci/drm/radeon/radeon_bios.c

779

offset += vhdr->ImageLength;

sys/dev/pci/drm/radeon/radeon_bios.c

780

if (offset > tbl_size) {

sys/dev/pci/drm/radeon/radeon_combios.c

137

uint16_t offset = 0, check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

1406

uint16_t offset;

sys/dev/pci/drm/radeon/radeon_combios.c

1418

offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);

sys/dev/pci/drm/radeon/radeon_combios.c

1419

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

1420

ver = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

1422

tmds->slave_addr = RBIOS8(offset + 4 + 2);

sys/dev/pci/drm/radeon/radeon_combios.c

1424

gpio = RBIOS8(offset + 4 + 3);

sys/dev/pci/drm/radeon/radeon_combios.c

255

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

2634

u16 offset, misc, misc2 = 0;

sys/dev/pci/drm/radeon/radeon_combios.c

2659

offset = combios_get_table_offset(dev, COMBIOS_OVERDRIVE_INFO_TABLE);

sys/dev/pci/drm/radeon/radeon_combios.c

2660

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

2663

rev = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

2666

thermal_controller = RBIOS8(offset + 3);

sys/dev/pci/drm/radeon/radeon_combios.c

2667

gpio = RBIOS8(offset + 4) & 0x3f;

sys/dev/pci/drm/radeon/radeon_combios.c

2668

i2c_addr = RBIOS8(offset + 5);

sys/dev/pci/drm/radeon/radeon_combios.c

267

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

2670

thermal_controller = RBIOS8(offset + 4);

sys/dev/pci/drm/radeon/radeon_combios.c

2671

gpio = RBIOS8(offset + 5) & 0x3f;

sys/dev/pci/drm/radeon/radeon_combios.c

2672

i2c_addr = RBIOS8(offset + 6);

sys/dev/pci/drm/radeon/radeon_combios.c

2674

thermal_controller = RBIOS8(offset + 4);

sys/dev/pci/drm/radeon/radeon_combios.c

2675

gpio = RBIOS8(offset + 5) & 0x3f;

sys/dev/pci/drm/radeon/radeon_combios.c

2676

i2c_addr = RBIOS8(offset + 6);

sys/dev/pci/drm/radeon/radeon_combios.c

2677

clk_bit = RBIOS8(offset + 0xa);

sys/dev/pci/drm/radeon/radeon_combios.c

2678

data_bit = RBIOS8(offset + 0xb);

sys/dev/pci/drm/radeon/radeon_combios.c

2729

offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE);

sys/dev/pci/drm/radeon/radeon_combios.c

2730

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

2731

rev = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

2734

rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2);

sys/dev/pci/drm/radeon/radeon_combios.c

2735

rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6);

sys/dev/pci/drm/radeon/radeon_combios.c

2741

misc = RBIOS16(offset + 0x5 + 0x0);

sys/dev/pci/drm/radeon/radeon_combios.c

2743

misc2 = RBIOS16(offset + 0x5 + 0xe);

sys/dev/pci/drm/radeon/radeon_combios.c

2757

RBIOS16(offset + 0x5 + 0xb) * 4;

sys/dev/pci/drm/radeon/radeon_combios.c

2758

tmp = RBIOS8(offset + 0x5 + 0xd);

sys/dev/pci/drm/radeon/radeon_combios.c

2761

u8 entries = RBIOS8(offset + 0x5 + 0xb);

sys/dev/pci/drm/radeon/radeon_combios.c

2762

u16 voltage_table_offset = RBIOS16(offset + 0x5 + 0xc);

sys/dev/pci/drm/radeon/radeon_combios.c

279

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

2793

RBIOS8(offset + 0x5 + 0x10);

sys/dev/pci/drm/radeon/radeon_combios.c

2886

uint16_t offset;

sys/dev/pci/drm/radeon/radeon_combios.c

2896

offset = combios_get_table_offset(dev, COMBIOS_TMDS_POWER_ON_TABLE);

sys/dev/pci/drm/radeon/radeon_combios.c

2897

rev = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

2898

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

2899

rev = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

2901

blocks = RBIOS8(offset + 3);

sys/dev/pci/drm/radeon/radeon_combios.c

2902

index = offset + 4;

sys/dev/pci/drm/radeon/radeon_combios.c

291

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

2955

offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);

sys/dev/pci/drm/radeon/radeon_combios.c

2956

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

2957

index = offset + 10;

sys/dev/pci/drm/radeon/radeon_combios.c

3012

static void combios_parse_mmio_table(struct drm_device *dev, uint16_t offset)

sys/dev/pci/drm/radeon/radeon_combios.c

3016

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

3017

while (RBIOS16(offset)) {

sys/dev/pci/drm/radeon/radeon_combios.c

3018

uint16_t cmd = ((RBIOS16(offset) & 0xe000) >> 13);

sys/dev/pci/drm/radeon/radeon_combios.c

3019

uint32_t addr = (RBIOS16(offset) & 0x1fff);

sys/dev/pci/drm/radeon/radeon_combios.c

302

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

3023

offset += 2;

sys/dev/pci/drm/radeon/radeon_combios.c

3026

val = RBIOS32(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3027

offset += 4;

sys/dev/pci/drm/radeon/radeon_combios.c

3031

val = RBIOS32(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3032

offset += 4;

sys/dev/pci/drm/radeon/radeon_combios.c

3036

and_mask = RBIOS32(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3037

offset += 4;

sys/dev/pci/drm/radeon/radeon_combios.c

3038

or_mask = RBIOS32(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3039

offset += 4;

sys/dev/pci/drm/radeon/radeon_combios.c

3046

and_mask = RBIOS32(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3047

offset += 4;

sys/dev/pci/drm/radeon/radeon_combios.c

3048

or_mask = RBIOS32(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3049

offset += 4;

sys/dev/pci/drm/radeon/radeon_combios.c

3056

val = RBIOS16(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3057

offset += 2;

sys/dev/pci/drm/radeon/radeon_combios.c

3061

val = RBIOS16(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3062

offset += 2;

sys/dev/pci/drm/radeon/radeon_combios.c

3091

static void combios_parse_pll_table(struct drm_device *dev, uint16_t offset)

sys/dev/pci/drm/radeon/radeon_combios.c

3095

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

3096

while (RBIOS8(offset)) {

sys/dev/pci/drm/radeon/radeon_combios.c

3097

uint8_t cmd = ((RBIOS8(offset) & 0xc0) >> 6);

sys/dev/pci/drm/radeon/radeon_combios.c

3098

uint8_t addr = (RBIOS8(offset) & 0x3f);

sys/dev/pci/drm/radeon/radeon_combios.c

3102

offset++;

sys/dev/pci/drm/radeon/radeon_combios.c

3105

val = RBIOS32(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3106

offset += 4;

sys/dev/pci/drm/radeon/radeon_combios.c

311

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

3110

shift = RBIOS8(offset) * 8;

sys/dev/pci/drm/radeon/radeon_combios.c

3111

offset++;

sys/dev/pci/drm/radeon/radeon_combios.c

3112

and_mask = RBIOS8(offset) << shift;

sys/dev/pci/drm/radeon/radeon_combios.c

3114

offset++;

sys/dev/pci/drm/radeon/radeon_combios.c

3115

or_mask = RBIOS8(offset) << shift;

sys/dev/pci/drm/radeon/radeon_combios.c

3116

offset++;

sys/dev/pci/drm/radeon/radeon_combios.c

3182

uint16_t offset)

sys/dev/pci/drm/radeon/radeon_combios.c

3187

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

3188

uint8_t val = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3190

offset++;

sys/dev/pci/drm/radeon/radeon_combios.c

320

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

3209

uint32_t or_mask = RBIOS16(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3210

offset += 2;

sys/dev/pci/drm/radeon/radeon_combios.c

3223

val = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3264

uint16_t offset;

sys/dev/pci/drm/radeon/radeon_combios.c

3273

offset = combios_get_table_offset(dev, COMBIOS_DETECTED_MEM_TABLE);

sys/dev/pci/drm/radeon/radeon_combios.c

3274

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

3275

rev = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3277

mem_cntl = RBIOS32(offset + 1);

sys/dev/pci/drm/radeon/radeon_combios.c

3278

mem_size = RBIOS16(offset + 5);

sys/dev/pci/drm/radeon/radeon_combios.c

3286

offset =

sys/dev/pci/drm/radeon/radeon_combios.c

3288

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

3289

rev = RBIOS8(offset - 1);

sys/dev/pci/drm/radeon/radeon_combios.c

329

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

3296

while (RBIOS8(offset)) {

sys/dev/pci/drm/radeon/radeon_combios.c

3297

ram = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3299

RBIOS8(offset + 1);

sys/dev/pci/drm/radeon/radeon_combios.c

3307

offset += 2;

sys/dev/pci/drm/radeon/radeon_combios.c

3310

mem_size = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

3312

mem_size = RBIOS8(offset);

sys/dev/pci/drm/radeon/radeon_combios.c

338

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

347

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

356

offset = check_offset;

sys/dev/pci/drm/radeon/radeon_combios.c

367

offset = RBIOS16(rdev->bios_header_start + check_offset);

sys/dev/pci/drm/radeon/radeon_combios.c

369

return offset;

sys/dev/pci/drm/radeon/radeon_combios.c

640

u16 offset;

sys/dev/pci/drm/radeon/radeon_combios.c

646

offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE);

sys/dev/pci/drm/radeon/radeon_combios.c

647

if (offset) {

sys/dev/pci/drm/radeon/radeon_combios.c

648

blocks = RBIOS8(offset + 2);

sys/dev/pci/drm/radeon/radeon_combios.c

650

id = RBIOS8(offset + 3 + (i * 5) + 0);

sys/dev/pci/drm/radeon/radeon_combios.c

652

clk = RBIOS8(offset + 3 + (i * 5) + 3);

sys/dev/pci/drm/radeon/radeon_combios.c

653

data = RBIOS8(offset + 3 + (i * 5) + 4);

sys/dev/pci/drm/radeon/radeon_device.c

395

unsigned long offset = find_first_zero_bit(rdev->doorbell.used, rdev->doorbell.num_doorbells);

sys/dev/pci/drm/radeon/radeon_device.c

396

if (offset < rdev->doorbell.num_doorbells) {

sys/dev/pci/drm/radeon/radeon_device.c

397

__set_bit(offset, rdev->doorbell.used);

sys/dev/pci/drm/radeon/radeon_device.c

398

*doorbell = offset;

sys/dev/pci/drm/radeon/radeon_display.c

1534

rdev->mode_info.afmt[i]->offset = eg_offsets[i];

sys/dev/pci/drm/radeon/radeon_display.c

1542

rdev->mode_info.afmt[0]->offset = DCE3_HDMI_OFFSET0;

sys/dev/pci/drm/radeon/radeon_display.c

1547

rdev->mode_info.afmt[1]->offset = DCE3_HDMI_OFFSET1;

sys/dev/pci/drm/radeon/radeon_display.c

1554

rdev->mode_info.afmt[0]->offset = DCE2_HDMI_OFFSET0;

sys/dev/pci/drm/radeon/radeon_display.c

1561

rdev->mode_info.afmt[1]->offset = DCE2_HDMI_OFFSET1;

sys/dev/pci/drm/radeon/radeon_display.c

560

int offset = crtc->y * pitch_pixels + crtc->x;

sys/dev/pci/drm/radeon/radeon_display.c

564

offset *= 1;

sys/dev/pci/drm/radeon/radeon_display.c

568

offset *= 2;

sys/dev/pci/drm/radeon/radeon_display.c

571

offset *= 3;

sys/dev/pci/drm/radeon/radeon_display.c

574

offset *= 4;

sys/dev/pci/drm/radeon/radeon_display.c

577

base += offset;

sys/dev/pci/drm/radeon/radeon_drv.c

798

wdf->offset = 0;

sys/dev/pci/drm/radeon/radeon_gart.c

287

void radeon_gart_unbind(struct radeon_device *rdev, unsigned int offset,

sys/dev/pci/drm/radeon/radeon_gart.c

297

t = offset / RADEON_GPU_PAGE_SIZE;

sys/dev/pci/drm/radeon/radeon_gart.c

331

int radeon_gart_bind(struct radeon_device *rdev, unsigned int offset,

sys/dev/pci/drm/radeon/radeon_gart.c

343

t = offset / RADEON_GPU_PAGE_SIZE;

sys/dev/pci/drm/radeon/radeon_gem.c

783

if (args->offset < RADEON_VA_RESERVED_SIZE) {

sys/dev/pci/drm/radeon/radeon_gem.c

786

(unsigned long)args->offset,

sys/dev/pci/drm/radeon/radeon_gem.c

839

args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;

sys/dev/pci/drm/radeon/radeon_gem.c

843

r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);

sys/dev/pci/drm/radeon/radeon_legacy_crtc.c

510

int offset = y * pitch_pixels + x;

sys/dev/pci/drm/radeon/radeon_legacy_crtc.c

513

offset *= 1;

sys/dev/pci/drm/radeon/radeon_legacy_crtc.c

517

offset *= 2;

sys/dev/pci/drm/radeon/radeon_legacy_crtc.c

520

offset *= 3;

sys/dev/pci/drm/radeon/radeon_legacy_crtc.c

523

offset *= 4;

sys/dev/pci/drm/radeon/radeon_legacy_crtc.c

528

base += offset;

sys/dev/pci/drm/radeon/radeon_mode.h

239

int offset;

sys/dev/pci/drm/radeon/radeon_mode.h

464

uint32_t offset;

sys/dev/pci/drm/radeon/radeon_object.c

741

unsigned long offset, size, lpfn;

sys/dev/pci/drm/radeon/radeon_object.c

753

offset = bo->resource->start << PAGE_SHIFT;

sys/dev/pci/drm/radeon/radeon_object.c

754

if ((offset + size) <= rdev->mc.visible_vram_size)

sys/dev/pci/drm/radeon/radeon_object.c

775

offset = bo->resource->start << PAGE_SHIFT;

sys/dev/pci/drm/radeon/radeon_object.c

777

if ((offset + size) > rdev->mc.visible_vram_size)

sys/dev/pci/drm/radeon/radeon_ttm.c

277

mem->bus.offset = (mem->start << PAGE_SHIFT) +

sys/dev/pci/drm/radeon/radeon_ttm.c

285

mem->bus.offset = mem->start << PAGE_SHIFT;

sys/dev/pci/drm/radeon/radeon_ttm.c

287

if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)

sys/dev/pci/drm/radeon/radeon_ttm.c

289

mem->bus.offset += rdev->mc.aper_base;

sys/dev/pci/drm/radeon/radeon_ttm.c

297

mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);

sys/dev/pci/drm/radeon/radeon_ttm.c

307

mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +

sys/dev/pci/drm/radeon/radeon_ttm.c

322

u64 offset;

sys/dev/pci/drm/radeon/radeon_ttm.c

453

gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);

sys/dev/pci/drm/radeon/radeon_ttm.c

460

r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,

sys/dev/pci/drm/radeon/radeon_ttm.c

464

ttm->num_pages, (unsigned)gtt->offset);

sys/dev/pci/drm/radeon/radeon_ttm.c

482

radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);

sys/dev/pci/drm/radeon/radeon_uvd.c

467

unsigned offset, unsigned buf_sizes[])

sys/dev/pci/drm/radeon/radeon_uvd.c

474

if (offset & 0x3F) {

sys/dev/pci/drm/radeon/radeon_uvd.c

485

msg = ptr + offset;

sys/dev/pci/drm/radeon/radeon_uvd.c

567

unsigned idx, cmd, offset;

sys/dev/pci/drm/radeon/radeon_uvd.c

572

offset = radeon_get_ib_value(p, data0);

sys/dev/pci/drm/radeon/radeon_uvd.c

583

start += offset;

sys/dev/pci/drm/radeon/radeon_uvd.c

592

DRM_ERROR("invalid reloc offset %X!\n", offset);

sys/dev/pci/drm/radeon/radeon_uvd.c

626

r = radeon_uvd_cs_msg(p, reloc->robj, offset, buf_sizes);

sys/dev/pci/drm/radeon/radeon_vce.c

504

uint64_t start, end, offset;

sys/dev/pci/drm/radeon/radeon_vce.c

508

offset = radeon_get_ib_value(p, lo);

sys/dev/pci/drm/radeon/radeon_vce.c

520

start += offset;

sys/dev/pci/drm/radeon/radeon_vce.c

526

DRM_ERROR("invalid reloc offset %llX!\n", offset);

sys/dev/pci/drm/radeon/si.c

5513

u32 orig, data, offset;

sys/dev/pci/drm/radeon/si.c

5519

offset = DMA0_REGISTER_OFFSET;

sys/dev/pci/drm/radeon/si.c

5521

offset = DMA1_REGISTER_OFFSET;

sys/dev/pci/drm/radeon/si.c

5522

orig = data = RREG32(DMA_POWER_CNTL + offset);

sys/dev/pci/drm/radeon/si.c

5525

WREG32(DMA_POWER_CNTL + offset, data);

sys/dev/pci/drm/radeon/si.c

5526

WREG32(DMA_CLK_CTRL + offset, 0x00000100);

sys/dev/pci/drm/radeon/si.c

5531

offset = DMA0_REGISTER_OFFSET;

sys/dev/pci/drm/radeon/si.c

5533

offset = DMA1_REGISTER_OFFSET;

sys/dev/pci/drm/radeon/si.c

5534

orig = data = RREG32(DMA_POWER_CNTL + offset);

sys/dev/pci/drm/radeon/si.c

5537

WREG32(DMA_POWER_CNTL + offset, data);

sys/dev/pci/drm/radeon/si.c

5539

orig = data = RREG32(DMA_CLK_CTRL + offset);

sys/dev/pci/drm/radeon/si.c

5542

WREG32(DMA_CLK_CTRL + offset, data);

sys/dev/pci/drm/radeon/si_dpm.c

2676

u32 data = 0, offset;

sys/dev/pci/drm/radeon/si_dpm.c

2681

while (config_regs->offset != 0xFFFFFFFF) {

sys/dev/pci/drm/radeon/si_dpm.c

2684

offset = SMC_CG_IND_START + config_regs->offset;

sys/dev/pci/drm/radeon/si_dpm.c

2685

if (offset < SMC_CG_IND_END)

sys/dev/pci/drm/radeon/si_dpm.c

2686

data = RREG32_SMC(offset);

sys/dev/pci/drm/radeon/si_dpm.c

2689

data = RREG32(config_regs->offset << 2);

sys/dev/pci/drm/radeon/si_dpm.c

2698

offset = SMC_CG_IND_START + config_regs->offset;

sys/dev/pci/drm/radeon/si_dpm.c

2699

if (offset < SMC_CG_IND_END)

sys/dev/pci/drm/radeon/si_dpm.c

2700

WREG32_SMC(offset, data);

sys/dev/pci/drm/radeon/si_dpm.c

2703

WREG32(config_regs->offset << 2, data);

sys/dev/pci/drm/radeon/si_dpm.h

36

u32 offset;

sys/dev/pci/drm/ttm/tests/ttm_resource_test.c

141

KUNIT_ASSERT_EQ(test, res->bus.offset, 0);

sys/dev/pci/drm/ttm/ttm_bo.c

1065

addr = bo->resource->bus.offset;

sys/dev/pci/drm/ttm/ttm_bo_util.c

317

unsigned long offset,

sys/dev/pci/drm/ttm/ttm_bo_util.c

326

map->virtual = ((u8 *)bo->resource->bus.addr) + offset;

sys/dev/pci/drm/ttm/ttm_bo_util.c

338

bo->resource->bus.offset + offset,

sys/dev/pci/drm/ttm/ttm_bo_util.c

442

unsigned long offset, size;

sys/dev/pci/drm/ttm/ttm_bo_util.c

458

offset = start_page << PAGE_SHIFT;

sys/dev/pci/drm/ttm/ttm_bo_util.c

460

return ttm_bo_ioremap(bo, offset, size, map);

sys/dev/pci/drm/ttm/ttm_bo_util.c

52

if (mem->bus.offset || mem->bus.addr)

sys/dev/pci/drm/ttm/ttm_bo_util.c

539

if (bus_space_map(bo->bdev->memt, mem->bus.offset,

sys/dev/pci/drm/ttm/ttm_bo_util.c

68

if (!mem->bus.offset && !mem->bus.addr)

sys/dev/pci/drm/ttm/ttm_bo_util.c

74

mem->bus.offset = 0;

sys/dev/pci/drm/ttm/ttm_bo_vm.c

409

return (bo->resource->bus.offset >> PAGE_SHIFT) + page_offset;

sys/dev/pci/drm/ttm/ttm_bo_vm.c

516

drm_vma_node_start(&bo->base.vma_node) - (ufi->entry->offset >> PAGE_SHIFT);

sys/dev/pci/drm/ttm/ttm_bo_vm.c

518

drm_vma_node_start(&bo->base.vma_node) - (ufi->entry->offset >> PAGE_SHIFT);

sys/dev/pci/drm/ttm/ttm_bo_vm.c

646

unsigned long offset,

sys/dev/pci/drm/ttm/ttm_bo_vm.c

649

unsigned long page = offset >> PAGE_SHIFT;

sys/dev/pci/drm/ttm/ttm_bo_vm.c

656

offset -= page << PAGE_SHIFT;

sys/dev/pci/drm/ttm/ttm_bo_vm.c

658

unsigned long bytes = min(bytes_left, PAGE_SIZE - offset);

sys/dev/pci/drm/ttm/ttm_bo_vm.c

667

ptr = (uint8_t *)ttm_kmap_obj_virtual(&map, &is_iomem) + offset;

sys/dev/pci/drm/ttm/ttm_bo_vm.c

678

offset = 0;

sys/dev/pci/drm/ttm/ttm_bo_vm.c

700

int ttm_bo_access(struct ttm_buffer_object *bo, unsigned long offset,

sys/dev/pci/drm/ttm/ttm_bo_vm.c

705

if (len < 1 || (offset + len) > bo->base.size)

sys/dev/pci/drm/ttm/ttm_bo_vm.c

721

ret = ttm_bo_vm_access_kmap(bo, offset, buf, len, write);

sys/dev/pci/drm/ttm/ttm_bo_vm.c

726

(bo, offset, buf, len, write);

sys/dev/pci/drm/ttm/ttm_bo_vm.c

742

unsigned long offset = (addr) - vma->vm_start +

sys/dev/pci/drm/ttm/ttm_bo_vm.c

746

return ttm_bo_access(bo, offset, buf, len, write);

sys/dev/pci/drm/ttm/ttm_bo_vm.c

96

return (bo->resource->bus.offset >> PAGE_SHIFT) + page_offset;

sys/dev/pci/drm/ttm/ttm_resource.c

337

res->bus.offset = 0;

sys/dev/pci/drm/ttm/ttm_resource.c

849

ioremap_wc(mem->bus.offset,

sys/dev/pci/drm/ttm/ttm_resource.c

852

if (bus_space_map(bdev->memt, mem->bus.offset,

sys/dev/pci/drm/ttm/ttm_resource.c

865

memremap(mem->bus.offset, mem->size,

sys/dev/pci/drm/ttm/ttm_resource.c

870

if (bus_space_map(bdev->memt, mem->bus.offset,

sys/dev/pci/drm/ttm/ttm_resource.c

886

ioremap(mem->bus.offset,

sys/dev/pci/drm/ttm/ttm_resource.c

889

if (bus_space_map(bdev->memt, mem->bus.offset,

sys/dev/pci/emuxki.c

579

u_int8_t size, offset = 0;

sys/dev/pci/emuxki.c

587

offset = (reg >> 16) & 0x1f;

sys/dev/pci/emuxki.c

588

mask = ((1 << size) - 1) << offset;

sys/dev/pci/emuxki.c

593

>> offset;

sys/dev/pci/emuxki.c

602

u_int8_t size, offset;

sys/dev/pci/emuxki.c

615

offset = (reg >> 16) & 0x1f;

sys/dev/pci/emuxki.c

616

mask = ((1 << size) - 1) << offset;

sys/dev/pci/emuxki.c

617

data = ((data << offset) & mask) |

sys/dev/pci/fmsradio.c

168

r->tea.offset = FM_IO_CTL;

sys/dev/pci/fmsradio.c

206

radio->tea.ioh, radio->tea.offset),

sys/dev/pci/fmsradio.c

215

sf256pcs_hw_read(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t offset)

sys/dev/pci/fmsradio.c

225

bus_space_write_2(iot, ioh, offset, d | PCS_CLOCK_OFF);

sys/dev/pci/fmsradio.c

231

bus_space_write_2(iot, ioh, offset, d | PCS_CLOCK_ON);

sys/dev/pci/fmsradio.c

232

bus_space_write_2(iot, ioh, offset, d | PCS_CLOCK_OFF);

sys/dev/pci/fmsradio.c

233

res |= bus_space_read_2(iot, ioh, offset) &

sys/dev/pci/fmsradio.c

257

bus_size_t offset, u_int32_t d)

sys/dev/pci/fmsradio.c

262

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

263

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

268

bus_size_t offset, u_int32_t d)

sys/dev/pci/fmsradio.c

273

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

274

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

292

radio->tea.ioh, radio->tea.offset),

sys/dev/pci/fmsradio.c

302

bus_size_t offset)

sys/dev/pci/fmsradio.c

312

bus_space_write_2(iot, ioh, offset, d | PCPR_CLOCK_OFF);

sys/dev/pci/fmsradio.c

318

bus_space_write_2(iot, ioh, offset, d | PCPR_CLOCK_ON);

sys/dev/pci/fmsradio.c

319

bus_space_write_2(iot, ioh, offset, d | PCPR_CLOCK_OFF);

sys/dev/pci/fmsradio.c

320

res |= bus_space_read_2(iot, ioh, offset) &

sys/dev/pci/fmsradio.c

343

bus_size_t offset, u_int32_t d)

sys/dev/pci/fmsradio.c

348

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

349

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

354

bus_size_t offset, u_int32_t d)

sys/dev/pci/fmsradio.c

359

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

360

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

378

radio->tea.ioh, radio->tea.offset),

sys/dev/pci/fmsradio.c

387

sf64pcr_hw_read(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t offset)

sys/dev/pci/fmsradio.c

397

bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_OFF);

sys/dev/pci/fmsradio.c

403

bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_ON);

sys/dev/pci/fmsradio.c

406

bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_OFF);

sys/dev/pci/fmsradio.c

409

res |= bus_space_read_2(iot, ioh, offset) & PCR_DATA_ON ? 1 : 0;

sys/dev/pci/fmsradio.c

413

bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_ON);

sys/dev/pci/fmsradio.c

416

i = bus_space_read_1(iot, ioh, offset);

sys/dev/pci/fmsradio.c

419

bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_OFF);

sys/dev/pci/fmsradio.c

421

i = bus_space_read_2(iot, ioh, offset);

sys/dev/pci/fmsradio.c

447

bus_size_t offset, u_int32_t d)

sys/dev/pci/fmsradio.c

452

bus_space_write_2(iot, ioh, offset, d);

sys/dev/pci/fmsradio.c

458

bus_size_t offset, u_int32_t d)

sys/dev/pci/fmsradio.c

493

radio->tea.offset, v);

sys/dev/pci/fmsradio.c

496

radio->tea.offset, v);

sys/dev/pci/fmsradio.c

515

radio->tea.offset);

sys/dev/pci/fmsradio.c

521

radio->tea.offset);

sys/dev/pci/fmsradio.c

529

radio->tea.offset);

sys/dev/pci/if_bge.c

3517

bus_addr_t offset, toff;

sys/dev/pci/if_bge.c

3536

offset = offsetof(struct bge_ring_data, bge_rx_return_ring);

sys/dev/pci/if_bge.c

3539

toff = offset + (rx_cons * sizeof (struct bge_rx_bd));

sys/dev/pci/if_bge.c

3550

offset, tosync * sizeof (struct bge_rx_bd),

sys/dev/pci/if_bge.c

3680

bus_addr_t offset, toff;

sys/dev/pci/if_bge.c

3699

offset = offsetof(struct bge_ring_data, bge_tx_ring);

sys/dev/pci/if_bge.c

3702

toff = offset + (cons * sizeof (struct bge_tx_bd));

sys/dev/pci/if_bge.c

3712

offset, tosync * sizeof (struct bge_tx_bd),

sys/dev/pci/if_bgereg.h

2319

#define RCB_WRITE_4(sc, rcb, offset, val) \

sys/dev/pci/if_bgereg.h

2321

rcb + offsetof(struct bge_rcb, offset), val)

sys/dev/pci/if_bgereg.h

2323

#define RCB_WRITE_2(sc, rcb, offset, val) \

sys/dev/pci/if_bgereg.h

2325

rcb + offsetof(struct bge_rcb, offset), val)

sys/dev/pci/if_bgereg.h

2790

#define BGE_RING_DMA_ADDR(sc, offset) \

sys/dev/pci/if_bgereg.h

2792

offsetof(struct bge_ring_data, offset))

sys/dev/pci/if_bnx.c

1002

offset);

sys/dev/pci/if_bnx.c

1009

"val = 0x%08X\n", __FUNCTION__, offset, val);

sys/dev/pci/if_bnx.c

1028

bnx_reg_wr_ind(struct bnx_softc *sc, u_int32_t offset, u_int32_t val)

sys/dev/pci/if_bnx.c

1033

__FUNCTION__, offset, val);

sys/dev/pci/if_bnx.c

1036

offset);

sys/dev/pci/if_bnx.c

1053

u_int32_t idx, offset = ctx_offset + cid_addr;

sys/dev/pci/if_bnx.c

1059

(offset | BNX_CTX_CTX_CTRL_WRITE_REQ));

sys/dev/pci/if_bnx.c

1076

REG_WR(sc, BNX_CTX_DATA_ADR, offset);

sys/dev/pci/if_bnx.c

1521

bnx_nvram_erase_page(struct bnx_softc *sc, u_int32_t offset)

sys/dev/pci/if_bnx.c

1541

REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);

sys/dev/pci/if_bnx.c

1574

bnx_nvram_read_dword(struct bnx_softc *sc, u_int32_t offset,

sys/dev/pci/if_bnx.c

1585

offset = ((offset / sc->bnx_flash_info->page_size) <<

sys/dev/pci/if_bnx.c

1587

(offset % sc->bnx_flash_info->page_size);

sys/dev/pci/if_bnx.c

1595

REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);

sys/dev/pci/if_bnx.c

1617

"offset 0x%08X!\n", __FILE__, __LINE__, offset);

sys/dev/pci/if_bnx.c

1636

bnx_nvram_write_dword(struct bnx_softc *sc, u_int32_t offset, u_int8_t *val,

sys/dev/pci/if_bnx.c

1647

offset = ((offset / sc->bnx_flash_info->page_size) <<

sys/dev/pci/if_bnx.c

1649

(offset % sc->bnx_flash_info->page_size);

sys/dev/pci/if_bnx.c

1660

REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);

sys/dev/pci/if_bnx.c

1672

"offset 0x%08X\n", __FILE__, __LINE__, offset);

sys/dev/pci/if_bnx.c

1802

bnx_nvram_read(struct bnx_softc *sc, u_int32_t offset, u_int8_t *ret_buf,

sys/dev/pci/if_bnx.c

1819

offset32 = offset;

sys/dev/pci/if_bnx.c

1829

pre_len = 4 - (offset & 3);

sys/dev/pci/if_bnx.c

1843

memcpy(ret_buf, buf + (offset & 3), pre_len);

sys/dev/pci/if_bnx.c

1920

bnx_nvram_write(struct bnx_softc *sc, u_int32_t offset, u_int8_t *data_buf,

sys/dev/pci/if_bnx.c

1929

offset32 = offset;

sys/dev/pci/if_bnx.c

2809

u_int32_t offset;

sys/dev/pci/if_bnx.c

2819

offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);

sys/dev/pci/if_bnx.c

2823

for (j = 0; j < (fw->text_len / 4); j++, offset += 4)

sys/dev/pci/if_bnx.c

2824

REG_WR_IND(sc, offset, fw->text[j]);

sys/dev/pci/if_bnx.c

2828

offset = cpu_reg->spad_base + (fw->data_addr - cpu_reg->mips_view_base);

sys/dev/pci/if_bnx.c

2832

for (j = 0; j < (fw->data_len / 4); j++, offset += 4)

sys/dev/pci/if_bnx.c

2833

REG_WR_IND(sc, offset, fw->data[j]);

sys/dev/pci/if_bnx.c

2837

offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base);

sys/dev/pci/if_bnx.c

2841

for (j = 0; j < (fw->sbss_len / 4); j++, offset += 4)

sys/dev/pci/if_bnx.c

2842

REG_WR_IND(sc, offset, fw->sbss[j]);

sys/dev/pci/if_bnx.c

2846

offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base);

sys/dev/pci/if_bnx.c

2850

for (j = 0; j < (fw->bss_len/4); j++, offset += 4)

sys/dev/pci/if_bnx.c

2851

REG_WR_IND(sc, offset, fw->bss[j]);

sys/dev/pci/if_bnx.c

2855

offset = cpu_reg->spad_base +

sys/dev/pci/if_bnx.c

2860

for (j = 0; j < (fw->rodata_len / 4); j++, offset += 4)

sys/dev/pci/if_bnx.c

2861

REG_WR_IND(sc, offset, fw->rodata[j]);

sys/dev/pci/if_bnx.c

3154

u_int32_t vcid_addr, offset;

sys/dev/pci/if_bnx.c

3170

for(offset = 0; offset < PHY_CTX_SIZE; offset += 4) {

sys/dev/pci/if_bnx.c

3171

CTX_WR(sc, 0x00, offset, 0);

sys/dev/pci/if_bnx.c

997

bnx_reg_rd_ind(struct bnx_softc *sc, u_int32_t offset)

sys/dev/pci/if_bnxreg.h

679

#define REG_RD_IND(sc, offset) bnx_reg_rd_ind(sc, offset)

sys/dev/pci/if_bnxreg.h

680

#define REG_WR_IND(sc, offset, val) bnx_reg_wr_ind(sc, offset, val)

sys/dev/pci/if_bnxreg.h

681

#define CTX_WR(sc, cid_addr, offset, val) bnx_ctx_wr(sc, cid_addr, offset, val)

sys/dev/pci/if_bnxt.c

4292

int offset;

sys/dev/pci/if_bnxt.c

4298

for (offset = 0; offset < 256; offset += sizeof(out->data)) {

sys/dev/pci/if_bnxt.c

4299

req.page_offset = htole16(offset);

sys/dev/pci/if_bnxt.c

4310

memcpy(sff->sff_data + offset, out->data, sizeof(out->data));

sys/dev/pci/if_bnxtreg.h

55954

uint32_t offset;

sys/dev/pci/if_bnxtreg.h

56039

uint32_t offset;

sys/dev/pci/if_bnxtreg.h

67099

uint16_t offset;

sys/dev/pci/if_bnxtreg.h

68251

uint32_t offset;

sys/dev/pci/if_bnxtreg.h

68321

uint32_t offset;

sys/dev/pci/if_bnxtreg.h

68598

uint32_t offset;

sys/dev/pci/if_bnxtreg.h

68718

uint32_t offset;

sys/dev/pci/if_bnxtreg.h

91049

uint16_t offset;

sys/dev/pci/if_bnxtreg.h

91129

uint16_t offset;

sys/dev/pci/if_bnxtreg.h

91508

uint32_t offset;

sys/dev/pci/if_bwfm_pci.c

1009

uint32_t page, offset, sromctl;

sys/dev/pci/if_bwfm_pci.c

1059

offset = (core->co_base + base) & (BWFM_PCI_BAR0_REG_SIZE - 1);

sys/dev/pci/if_bwfm_pci.c

1065

sc->sc_reg_ioh, offset + i * sizeof(uint16_t));

sys/dev/pci/if_bwfm_pci.c

1826

uint32_t page, offset;

sys/dev/pci/if_bwfm_pci.c

1829

offset = reg & (BWFM_PCI_BAR0_REG_SIZE - 1);

sys/dev/pci/if_bwfm_pci.c

1831

return bus_space_read_4(sc->sc_reg_iot, sc->sc_reg_ioh, offset);

sys/dev/pci/if_bwfm_pci.c

1838

uint32_t page, offset;

sys/dev/pci/if_bwfm_pci.c

1841

offset = reg & (BWFM_PCI_BAR0_REG_SIZE - 1);

sys/dev/pci/if_bwfm_pci.c

1843

bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh, offset, val);

sys/dev/pci/if_de.c

1210

tulip_mii_get_phyaddr(tulip_softc_t * const sc, unsigned offset)

sys/dev/pci/if_de.c

1218

if (offset == 0)

sys/dev/pci/if_de.c

1220

offset--;

sys/dev/pci/if_de.c

1222

if (offset == 0) {

sys/dev/pci/if_de.c

151

unsigned tulip_mii_get_phyaddr(tulip_softc_t * const sc, unsigned offset);

sys/dev/pci/if_em.c

1805

int offset;

sys/dev/pci/if_em.c

1809

sc->osdep.em_pa.pa_tag, PCI_CAP_ID_ST, &offset, &val)) {

sys/dev/pci/if_em.c

1812

offset += PCI_ST_SMIA_OFFSET;

sys/dev/pci/if_em.c

1814

offset, 0x06);

sys/dev/pci/if_em.c

3431

int offset;

sys/dev/pci/if_em.c

3445

PCI_CAP_PCIEXPRESS, &offset, NULL))

sys/dev/pci/if_em.c

3450

offset + PCI_PCIE_LCSR);

sys/dev/pci/if_em.c

3467

offset + PCI_PCIE_LCSR, val);

sys/dev/pci/if_em_hw.c

10111

em_read_eeprom_spt(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

10148

if ((offset + i) % 2) {

sys/dev/pci/if_em_hw.c

10151

&& hw->eeprom_shadow_ram[offset + i].modified) {

sys/dev/pci/if_em_hw.c

10153

hw->eeprom_shadow_ram[offset+i].eeprom_word;

sys/dev/pci/if_em_hw.c

10156

act_offset = bank_offset + (offset + i - 1) * 2;

sys/dev/pci/if_em_hw.c

10160

&& hw->eeprom_shadow_ram[offset+i].modified

sys/dev/pci/if_em_hw.c

10161

&& hw->eeprom_shadow_ram[offset+i+1].modified) {

sys/dev/pci/if_em_hw.c

10162

data[i] = hw->eeprom_shadow_ram[offset+i].eeprom_word;

sys/dev/pci/if_em_hw.c

10163

data[i+1] = hw->eeprom_shadow_ram[offset+i+1].eeprom_word;

sys/dev/pci/if_em_hw.c

10166

act_offset = bank_offset + (offset + i) * 2;

sys/dev/pci/if_em_hw.c

10172

&& hw->eeprom_shadow_ram[offset+i].modified) {

sys/dev/pci/if_em_hw.c

10173

data[i] = hw->eeprom_shadow_ram[offset+i].eeprom_word;

sys/dev/pci/if_em_hw.c

10183

&& hw->eeprom_shadow_ram[offset+i+1].modified) {

sys/dev/pci/if_em_hw.c

10185

hw->eeprom_shadow_ram[offset+i+1].eeprom_word;

sys/dev/pci/if_em_hw.c

10206

em_read_eeprom_ich8(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

10223

return em_read_eeprom_spt(hw, offset, words, data);

sys/dev/pci/if_em_hw.c

10243

hw->eeprom_shadow_ram[offset + i].modified == TRUE) {

sys/dev/pci/if_em_hw.c

10245

hw->eeprom_shadow_ram[offset + i].eeprom_word;

sys/dev/pci/if_em_hw.c

10248

act_offset = bank_offset + ((offset + i) * 2);

sys/dev/pci/if_em_hw.c

10273

em_write_eeprom_ich8(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

10291

if ((offset + i) < E1000_SHADOW_RAM_WORDS) {

sys/dev/pci/if_em_hw.c

10292

hw->eeprom_shadow_ram[offset + i].modified =

sys/dev/pci/if_em_hw.c

10294

hw->eeprom_shadow_ram[offset + i].eeprom_word =

sys/dev/pci/if_em_hw.c

10553

em_read_ich8_data32(struct em_hw *hw, uint32_t offset, uint32_t *data)

sys/dev/pci/if_em_hw.c

10564

if (offset > ICH_FLASH_LINEAR_ADDR_MASK)

sys/dev/pci/if_em_hw.c

10566

flash_linear_address = (ICH_FLASH_LINEAR_ADDR_MASK & offset) +

sys/dev/pci/if_em_hw.c

10976

em_read_invm_i210(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

10981

switch (offset)

sys/dev/pci/if_em_hw.c

10987

ret_val = em_read_invm_word_i210(hw, offset, data);

sys/dev/pci/if_em_hw.c

10995

ret_val = em_read_invm_word_i210(hw, offset, data);

sys/dev/pci/if_em_hw.c

11002

ret_val = em_read_invm_word_i210(hw, offset, data);

sys/dev/pci/if_em_hw.c

11009

ret_val = em_read_invm_word_i210(hw, offset, data);

sys/dev/pci/if_em_hw.c

11016

ret_val = em_read_invm_word_i210(hw, offset, data);

sys/dev/pci/if_em_hw.c

11023

ret_val = em_read_invm_word_i210(hw, offset, data);

sys/dev/pci/if_em_hw.c

11030

DEBUGOUT1("NVM word 0x%02x is not mapped.\n", offset);

sys/dev/pci/if_em_hw.c

5554

em_read_phy_reg_i2c(struct em_hw *hw, uint32_t offset, uint16_t *data)

sys/dev/pci/if_em_hw.c

5564

i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |

sys/dev/pci/if_em_hw.c

5601

em_write_phy_reg_i2c(struct em_hw *hw, uint32_t offset, uint16_t data)

sys/dev/pci/if_em_hw.c

5622

i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |

sys/dev/pci/if_em_hw.c

5662

em_read_sfp_data_byte(struct em_hw *hw, uint16_t offset, uint8_t *data)

sys/dev/pci/if_em_hw.c

5670

if (offset > E1000_I2CCMD_SFP_DIAG_ADDR(255)) {

sys/dev/pci/if_em_hw.c

5679

i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |

sys/dev/pci/if_em_hw.c

6872

em_read_eeprom(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

6886

if ((offset >= eeprom->word_size) ||

sys/dev/pci/if_em_hw.c

6887

(words > eeprom->word_size - offset) ||

sys/dev/pci/if_em_hw.c

6890

" size = %d\n", offset, eeprom->word_size);

sys/dev/pci/if_em_hw.c

6907

return em_read_eeprom_eerd(hw, offset, words, data);

sys/dev/pci/if_em_hw.c

6911

return em_read_eeprom_ich8(hw, offset, words, data);

sys/dev/pci/if_em_hw.c

6915

return em_read_invm_i210(hw, offset, words, data);

sys/dev/pci/if_em_hw.c

6933

if ((eeprom->address_bits == 8) && (offset >= 128))

sys/dev/pci/if_em_hw.c

6938

em_shift_out_ee_bits(hw, (uint16_t) (offset * 2),

sys/dev/pci/if_em_hw.c

6957

em_shift_out_ee_bits(hw, (uint16_t) (offset + i),

sys/dev/pci/if_em_hw.c

6982

em_read_eeprom_eerd(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

6988

eerd = ((offset + i) << E1000_EEPROM_RW_ADDR_SHIFT) +

sys/dev/pci/if_em_hw.c

7014

em_write_eeprom_eewr(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

7025

((offset + i) << E1000_EEPROM_RW_ADDR_SHIFT) |

sys/dev/pci/if_em_hw.c

7268

em_write_eeprom(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

7282

if ((offset >= eeprom->word_size) ||

sys/dev/pci/if_em_hw.c

7283

(words > eeprom->word_size - offset) ||

sys/dev/pci/if_em_hw.c

7290

return em_write_eeprom_eewr(hw, offset, words, data);

sys/dev/pci/if_em_hw.c

7293

return em_write_eeprom_ich8(hw, offset, words, data);

sys/dev/pci/if_em_hw.c

7300

status = em_write_eeprom_microwire(hw, offset, words, data);

sys/dev/pci/if_em_hw.c

7302

status = em_write_eeprom_spi(hw, offset, words, data);

sys/dev/pci/if_em_hw.c

7322

em_write_eeprom_spi(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

7345

if ((eeprom->address_bits == 8) && (offset >= 128))

sys/dev/pci/if_em_hw.c

7351

em_shift_out_ee_bits(hw, (uint16_t) ((offset + widx) * 2),

sys/dev/pci/if_em_hw.c

7370

if ((((offset + widx) * 2) % eeprom->page_size) == 0) {

sys/dev/pci/if_em_hw.c

7390

em_write_eeprom_microwire(struct em_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/if_em_hw.c

7418

em_shift_out_ee_bits(hw, (uint16_t) (offset + words_written),

sys/dev/pci/if_em_hw.c

7665

uint16_t offset = EEPROM_PBA_BYTE_1;

sys/dev/pci/if_em_hw.c

7670

if (em_read_eeprom(hw, offset, 1, &eeprom_data) < 0) {

sys/dev/pci/if_em_hw.c

7678

if (em_read_eeprom(hw, ++offset, 1, &eeprom_data) < 0) {

sys/dev/pci/if_em_hw.c

7697

uint16_t offset;

sys/dev/pci/if_em_hw.c

7709

offset = i >> 1;

sys/dev/pci/if_em_hw.c

7710

if (em_read_eeprom(hw, offset + ia_base_addr, 1, &eeprom_data)

sys/dev/pci/if_em_hw.c

8122

uint32_t offset;

sys/dev/pci/if_em_hw.c

8145

for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {

sys/dev/pci/if_em_hw.c

8151

vfta_value = (offset == vfta_offset) ? vfta_bit_in_reg : 0;

sys/dev/pci/if_em_hw.c

8152

E1000_WRITE_REG_ARRAY(hw, VFTA, offset, vfta_value);

sys/dev/pci/if_em_hw.c

8165

uint32_t offset;

sys/dev/pci/if_em_hw.c

8168

for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {

sys/dev/pci/if_em_hw.c

8170

E1000_WRITE_REG_ARRAY(hw, VFTA, offset, 0);

sys/dev/pci/if_em_hw.c

8479

em_write_reg_io(struct em_hw *hw, uint32_t offset, uint32_t value)

sys/dev/pci/if_em_hw.c

8483

em_io_write(hw, io_addr, offset);

sys/dev/pci/if_em_hw.c

9316

uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET;

sys/dev/pci/if_em_hw.c

9319

offset = (offset >> 2);

sys/dev/pci/if_em_hw.c

9323

E1000_READ_REG_ARRAY_DWORD(hw, HOST_IF, offset + i);

sys/dev/pci/if_em_hw.h

3826

#define BM_PHY_REG_PAGE(offset) \

sys/dev/pci/if_em_hw.h

3827

((uint16_t)(((offset) >> PHY_PAGE_SHIFT) & 0xFFFF))

sys/dev/pci/if_em_hw.h

3828

#define BM_PHY_REG_NUM(offset) \

sys/dev/pci/if_em_hw.h

3829

((uint16_t)(((offset) & MAX_PHY_REG_ADDRESS) |\

sys/dev/pci/if_em_hw.h

3830

(((offset) >> (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)) &\

sys/dev/pci/if_em_osdep.h

86

#define E1000_READ_OFFSET(hw, offset) \

sys/dev/pci/if_em_osdep.h

89

offset)

sys/dev/pci/if_em_osdep.h

92

#define E1000_WRITE_OFFSET(hw, offset, value) \

sys/dev/pci/if_em_osdep.h

95

offset, value)

sys/dev/pci/if_ice.c

12514

uint16_t i, tlv, tlv_len, tlv_start, buf, offset;

sys/dev/pci/if_ice.c

12542

offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_FEC_OFFSET;

sys/dev/pci/if_ice.c

12543

status = ice_read_sr_word(hw, offset, &buf);

sys/dev/pci/if_ice.c

12552

offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_PHY_OFFSET;

sys/dev/pci/if_ice.c

12554

status = ice_read_sr_word(hw, (offset + i), &buf);

sys/dev/pci/if_ice.c

12566

offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_PHY_OFFSET +

sys/dev/pci/if_ice.c

12569

status = ice_read_sr_word(hw, (offset + i), &buf);

sys/dev/pci/if_ice.c

13619

ice_rw_sff_eeprom(struct ice_softc *sc, uint16_t dev_addr, uint16_t offset,

sys/dev/pci/if_ice.c

13636

status = ice_aq_sff_eeprom(hw, 0, dev_addr, offset, page,

sys/dev/pci/if_ice.c

13673

ice_read_sff_eeprom(struct ice_softc *sc, uint16_t dev_addr, uint16_t offset,

sys/dev/pci/if_ice.c

13676

return ice_rw_sff_eeprom(sc, dev_addr, offset, page, data, length,

sys/dev/pci/if_ice.c

13682

ice_write_sff_eeprom(struct ice_softc *sc, uint16_t dev_addr, uint16_t offset,

sys/dev/pci/if_ice.c

13685

return ice_rw_sff_eeprom(sc, dev_addr, offset, page, data, length,

sys/dev/pci/if_ice.c

13696

uint16_t offset = 0;

sys/dev/pci/if_ice.c

13722

for (; offset <= IFSFF_DATA_LEN - chunksize; offset += chunksize) {

sys/dev/pci/if_ice.c

13723

error = ice_read_sff_eeprom(sc, sff->sff_addr, offset,

sys/dev/pci/if_ice.c

13724

sff->sff_page, &sff->sff_data[0] + offset, chunksize);

sys/dev/pci/if_ice.c

14936

uint16_t i, size = 0, offset;

sys/dev/pci/if_ice.c

15031

offset = le16toh(section->section_entry[0].offset);

sys/dev/pci/if_ice.c

15039

if (offset + size > ICE_PKG_BUF_SIZE) {

sys/dev/pci/if_ice.c

15045

new_topo = ((uint8_t *)section) + offset;

sys/dev/pci/if_ice.c

15626

uint16_t offset, size;

sys/dev/pci/if_ice.c

15641

offset = le16toh(state->buf->section_entry[state->sect_idx].offset);

sys/dev/pci/if_ice.c

15642

if (offset < ICE_MIN_S_OFF || offset > ICE_MAX_S_OFF)

sys/dev/pci/if_ice.c

15650

if (offset + size > ICE_PKG_BUF_SIZE)

sys/dev/pci/if_ice.c

15658

le16toh(state->buf->section_entry[state->sect_idx].offset);

sys/dev/pci/if_ice.c

15862

uint32_t sect_type, uint32_t *offset, void *(*handler)(uint32_t sect_type,

sys/dev/pci/if_ice.c

15863

void *section, uint32_t index, uint32_t *offset))

sys/dev/pci/if_ice.c

15885

offset);

sys/dev/pci/if_ice.c

15893

state->entry_idx, offset);

sys/dev/pci/if_ice.c

15911

uint32_t *offset)

sys/dev/pci/if_ice.c

15921

if (offset)

sys/dev/pci/if_ice.c

15922

*offset = 0;

sys/dev/pci/if_ice.c

15974

uint32_t *offset)

sys/dev/pci/if_ice.c

15987

if (offset)

sys/dev/pci/if_ice.c

15988

*offset = 0;

sys/dev/pci/if_ice.c

16288

uint32_t offset, info, i;

sys/dev/pci/if_ice.c

16311

&offset, &info, NULL);

sys/dev/pci/if_ice.c

16317

status, offset, info);

sys/dev/pci/if_ice.c

16547

sect->offset = CPU_TO_LE16(ICE_META_VLAN_MODE_ENTRY);

sys/dev/pci/if_ice.c

17388

uint32_t dst_len, sect_len, offset = 0;

sys/dev/pci/if_ice.c

17487

if (offset > dst_len)

sys/dev/pci/if_ice.c

17495

if ((offset + sect_len) > dst_len)

sys/dev/pci/if_ice.c

17496

sect_len = dst_len - offset;

sys/dev/pci/if_ice.c

17498

memcpy(dst + offset, src, sect_len);

sys/dev/pci/if_ice.c

17499

offset += sect_len;

sys/dev/pci/if_ice.c

17543

uint32_t *offset)

sys/dev/pci/if_ice.c

17552

if (offset)

sys/dev/pci/if_ice.c

17558

*offset = le16toh(fv_section->base_offset) + index;

sys/dev/pci/if_ice.c

17578

uint32_t offset;

sys/dev/pci/if_ice.c

17590

&offset, ice_sw_fv_handler);

sys/dev/pci/if_ice.c

19487

buf->section_entry[sect_count].offset = htole16(data_end);

sys/dev/pci/if_ice.c

19690

p->offset = htole16(tmp->prof_id);

sys/dev/pci/if_ice.c

19759

p->offset = htole16(tmp->ptype);

sys/dev/pci/if_ice.c

19793

p->offset = htole16(tmp->vsi);

sys/dev/pci/if_ice.c

19863

uint32_t offset, info;

sys/dev/pci/if_ice.c

19866

last, &offset, &info, NULL);

sys/dev/pci/if_ice.c

19870

status, offset, info);

sys/dev/pci/if_ice.c

2200

from = src_ctx + ce_info->offset;

sys/dev/pci/if_ice.c

2241

from = src_ctx + ce_info->offset;

sys/dev/pci/if_ice.c

2285

from = src_ctx + ce_info->offset;

sys/dev/pci/if_ice.c

2337

from = src_ctx + ce_info->offset;

sys/dev/pci/if_ice.c

23531

uint8_t offset = 0;

sys/dev/pci/if_ice.c

23545

buf[offset] = (priority0 << ICE_IEEE_ETS_PRIO_1_S) | priority1;

sys/dev/pci/if_ice.c

23546

offset++;

sys/dev/pci/if_ice.c

23562

buf[offset] = ets_cfg->tcbwtable[i];

sys/dev/pci/if_ice.c

23563

buf[ICE_MAX_TRAFFIC_CLASS + offset] = ets_cfg->tsatable[i];

sys/dev/pci/if_ice.c

23564

offset++;

sys/dev/pci/if_ice.c

23689

uint16_t typelen, len, offset = 0;

sys/dev/pci/if_ice.c

23702

offset++;

sys/dev/pci/if_ice.c

23714

buf[offset] = (priority << ICE_IEEE_APP_PRIO_S) | selector;

sys/dev/pci/if_ice.c

23715

buf[offset + 1] = (dcbcfg->app[i].prot_id >> 0x8) & 0xFF;

sys/dev/pci/if_ice.c

23716

buf[offset + 2] = dcbcfg->app[i].prot_id & 0xFF;

sys/dev/pci/if_ice.c

23718

offset += 3;

sys/dev/pci/if_ice.c

23802

uint8_t offset = 0;

sys/dev/pci/if_ice.c

23824

offset = 5;

sys/dev/pci/if_ice.c

23833

buf[offset] = etscfg->tcbwtable[i];

sys/dev/pci/if_ice.c

23834

buf[offset + ICE_MAX_TRAFFIC_CLASS] = etscfg->tsatable[i];

sys/dev/pci/if_ice.c

23835

offset++;

sys/dev/pci/if_ice.c

23924

uint16_t len, offset = 0, tlvid = ICE_TLV_ID_START;

sys/dev/pci/if_ice.c

23934

offset += len + 2;

sys/dev/pci/if_ice.c

23937

offset > ICE_LLDPDU_SIZE)

sys/dev/pci/if_ice.c

23944

*miblen = offset;

sys/dev/pci/if_ice.c

27160

uint8_t offset = 0;

sys/dev/pci/if_ice.c

27173

((buf[offset] & ICE_IEEE_ETS_PRIO_1_M) >>

sys/dev/pci/if_ice.c

27176

((buf[offset] & ICE_IEEE_ETS_PRIO_0_M) >>

sys/dev/pci/if_ice.c

27178

offset++;

sys/dev/pci/if_ice.c

27194

ets_cfg->tcbwtable[i] = buf[offset];

sys/dev/pci/if_ice.c

27195

ets_cfg->tsatable[i] = buf[ICE_MAX_TRAFFIC_CLASS + offset++];

sys/dev/pci/if_ice.c

27286

uint16_t offset = 0;

sys/dev/pci/if_ice.c

27302

offset++;

sys/dev/pci/if_ice.c

27312

while (offset < len) {

sys/dev/pci/if_ice.c

27313

dcbcfg->app[i].priority = ((buf[offset] &

sys/dev/pci/if_ice.c

27316

dcbcfg->app[i].selector = ((buf[offset] &

sys/dev/pci/if_ice.c

27319

dcbcfg->app[i].prot_id = (buf[offset + 1] << 0x8) |

sys/dev/pci/if_ice.c

27320

buf[offset + 2];

sys/dev/pci/if_ice.c

27322

offset += 3;

sys/dev/pci/if_ice.c

27379

uint16_t offset = 0;

sys/dev/pci/if_ice.c

27398

((buf[offset] & ICE_CEE_PGID_PRIO_1_M) >>

sys/dev/pci/if_ice.c

27401

((buf[offset] & ICE_CEE_PGID_PRIO_0_M) >>

sys/dev/pci/if_ice.c

27403

offset++;

sys/dev/pci/if_ice.c

27413

etscfg->tcbwtable[i] = buf[offset++];

sys/dev/pci/if_ice.c

27422

etscfg->maxtcs = buf[offset];

sys/dev/pci/if_ice.c

27460

uint16_t len, typelen, offset = 0;

sys/dev/pci/if_ice.c

27476

app = (struct ice_cee_app_prio *)(tlv->tlvinfo + offset);

sys/dev/pci/if_ice.c

27499

offset += sizeof(*app);

sys/dev/pci/if_ice.c

27601

uint16_t offset = 0;

sys/dev/pci/if_ice.c

27616

offset += sizeof(typelen) + len;

sys/dev/pci/if_ice.c

27619

if (type == ICE_TLV_TYPE_END || offset > ICE_LLDPDU_SIZE)

sys/dev/pci/if_ice.c

3437

uint32_t offset, size;

sys/dev/pci/if_ice.c

3441

offset = banks->nvm_ptr;

sys/dev/pci/if_ice.c

3446

offset = banks->orom_ptr;

sys/dev/pci/if_ice.c

3451

offset = banks->netlist_ptr;

sys/dev/pci/if_ice.c

3481

return offset + (second_bank_active ? size : 0);

sys/dev/pci/if_ice.c

3483

return offset + (second_bank_active ? 0 : size);

sys/dev/pci/if_ice.c

3506

ice_aq_read_nvm(struct ice_hw *hw, uint16_t module_typeid, uint32_t offset,

sys/dev/pci/if_ice.c

3517

if (offset > ICE_AQC_NVM_MAX_OFFSET)

sys/dev/pci/if_ice.c

3529

cmd->offset_low = htole16(offset & 0xFFFF);

sys/dev/pci/if_ice.c

3530

cmd->offset_high = (offset >> 16) & 0xFF;

sys/dev/pci/if_ice.c

3552

ice_read_flat_nvm(struct ice_hw *hw, uint32_t offset, uint32_t *length,

sys/dev/pci/if_ice.c

3565

if (read_shadow_ram && ((offset + inlen) > (hw->flash.sr_words * 2u))) {

sys/dev/pci/if_ice.c

3579

sector_offset = offset % ICE_AQ_MAX_BUF_LEN;

sys/dev/pci/if_ice.c

3590

offset, (uint16_t)read_size, data + bytes_read, last_cmd,

sys/dev/pci/if_ice.c

3596

offset += read_size;

sys/dev/pci/if_ice.c

3624

uint32_t offset = (max_size + min_size) / 2;

sys/dev/pci/if_ice.c

3628

status = ice_read_flat_nvm(hw, offset, &len, &data, false);

sys/dev/pci/if_ice.c

3633

offset);

sys/dev/pci/if_ice.c

3635

max_size = offset;

sys/dev/pci/if_ice.c

3639

offset);

sys/dev/pci/if_ice.c

3640

min_size = offset;

sys/dev/pci/if_ice.c

3666

ice_read_sr_word_aq(struct ice_hw *hw, uint16_t offset, uint16_t *data)

sys/dev/pci/if_ice.c

3678

status = ice_read_flat_nvm(hw, offset * sizeof(uint16_t), &bytes,

sys/dev/pci/if_ice.c

3696

ice_read_sr_word(struct ice_hw *hw, uint16_t offset, uint16_t *data)

sys/dev/pci/if_ice.c

3702

status = ice_read_sr_word_aq(hw, offset, data);

sys/dev/pci/if_ice.c

3724

ice_read_sr_pointer(struct ice_hw *hw, uint16_t offset, uint32_t *pointer)

sys/dev/pci/if_ice.c

3729

status = ice_read_sr_word(hw, offset, &value);

sys/dev/pci/if_ice.c

3756

ice_read_sr_area_size(struct ice_hw *hw, uint16_t offset, uint32_t *size)

sys/dev/pci/if_ice.c

3761

status = ice_read_sr_word(hw, offset, &value);

sys/dev/pci/if_ice.c

3877

uint16_t module, uint32_t offset, uint8_t *data, uint32_t length)

sys/dev/pci/if_ice.c

3896

status = ice_read_flat_nvm(hw, start + offset, &length, data, false);

sys/dev/pci/if_ice.c

3915

uint32_t offset, uint16_t *data)

sys/dev/pci/if_ice.c

3921

offset * sizeof(uint16_t), (uint8_t *)&data_local,

sys/dev/pci/if_ice.c

4005

uint32_t offset, uint16_t *data)

sys/dev/pci/if_ice.c

4016

return ice_read_nvm_module(hw, bank, hdr_len + offset, data);

sys/dev/pci/if_ice.c

4081

uint32_t offset, uint16_t *data)

sys/dev/pci/if_ice.c

4087

offset * sizeof(uint16_t), (uint8_t *)&data_local,

sys/dev/pci/if_ice.c

4157

uint32_t offset;

sys/dev/pci/if_ice.c

4185

for (offset = 0; (offset + 512) <= hw->flash.banks.orom_size;

sys/dev/pci/if_ice.c

4186

offset += 512) {

sys/dev/pci/if_ice.c

4190

tmp = (struct ice_orom_civd_info *)&orom_data[offset];

sys/dev/pci/if_ice.c

4197

offset);

sys/dev/pci/if_ice.c

4278

uint32_t offset, uint16_t *data)

sys/dev/pci/if_ice.c

4284

offset * sizeof(uint16_t), (uint8_t *)&data_local,

sys/dev/pci/if_icereg.h

11282

uint16_t offset;

sys/dev/pci/if_icereg.h

11312

uint16_t offset;

sys/dev/pci/if_icereg.h

11319

uint16_t offset;

sys/dev/pci/if_icereg.h

11428

uint16_t offset;

sys/dev/pci/if_icereg.h

12971

uint32_t offset; /* offset to read/write, in bytes */

sys/dev/pci/if_icereg.h

13810

uint16_t offset;

sys/dev/pci/if_icereg.h

13817

.offset = offsetof(struct _struct, _ele), \

sys/dev/pci/if_icevar.h

3205

uint16_t offset;

sys/dev/pci/if_icevar.h

3403

uint32_t *offset);

sys/dev/pci/if_icevar.h

3434

uint32_t offset;

sys/dev/pci/if_icevar.h

3520

uint16_t offset;

sys/dev/pci/if_icevar.h

3526

uint16_t offset;

sys/dev/pci/if_icevar.h

3532

uint16_t offset;

sys/dev/pci/if_icevar.h

3580

uint16_t offset;

sys/dev/pci/if_icevar.h

3705

uint8_t offset;

sys/dev/pci/if_icevar.h

415

ice_find_next_bit(const ice_bitmap_t *bitmap, uint16_t size, uint16_t offset)

sys/dev/pci/if_icevar.h

419

if (offset >= size)

sys/dev/pci/if_icevar.h

425

i = BIT_CHUNK(offset);

sys/dev/pci/if_icevar.h

429

for (j = offset % BITS_PER_CHUNK; j < BITS_PER_CHUNK; j++) {

sys/dev/pci/if_ipw.c

2039

ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,

sys/dev/pci/if_ipw.c

2042

for (; count > 0; offset++, datap++, count--) {

sys/dev/pci/if_ipw.c

2043

CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);

sys/dev/pci/if_ipw.c

2044

*datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));

sys/dev/pci/if_ipw.c

2049

ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,

sys/dev/pci/if_ipw.c

2052

for (; count > 0; offset++, datap++, count--) {

sys/dev/pci/if_ipw.c

2053

CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);

sys/dev/pci/if_ipw.c

2054

CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);

sys/dev/pci/if_iwireg.h

466

#define CSR_READ_REGION_4(sc, offset, datap, count) \

sys/dev/pci/if_iwireg.h

467

bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \

sys/dev/pci/if_iwireg.h

479

#define CSR_WRITE_REGION_1(sc, offset, datap, count) \

sys/dev/pci/if_iwireg.h

480

bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \

sys/dev/pci/if_iwm.c

10013

(const char *)image->fw_sect[sec_idx].fws_data + offset,

sys/dev/pci/if_iwm.c

10019

offset += sc->fw_paging_db[idx].fw_paging_size;

sys/dev/pci/if_iwm.c

10025

(const char *)image->fw_sect[sec_idx].fws_data + offset,

sys/dev/pci/if_iwm.c

11017

uint32_t offset = 0, nextoff = 0, nmpdu = 0, len;

sys/dev/pci/if_iwm.c

11026

while (m0 && offset + minsz < IWM_RBUF_SIZE) {

sys/dev/pci/if_iwm.c

11027

pkt = (struct iwm_rx_packet *)(m0->m_data + offset);

sys/dev/pci/if_iwm.c

11037

if (len < minsz || len > (IWM_RBUF_SIZE - offset))

sys/dev/pci/if_iwm.c

11055

size_t maxlen = IWM_RBUF_SIZE - offset - minsz;

sys/dev/pci/if_iwm.c

11056

nextoff = offset +

sys/dev/pci/if_iwm.c

11063

if (offset > 0)

sys/dev/pci/if_iwm.c

11064

m_adj(m0, offset);

sys/dev/pci/if_iwm.c

11085

m_adj(m, offset);

sys/dev/pci/if_iwm.c

11366

offset += roundup(len, IWM_FH_RSCSR_FRAME_ALIGN);

sys/dev/pci/if_iwm.c

2922

iwm_nvm_read_chunk(struct iwm_softc *sc, uint16_t section, uint16_t offset,

sys/dev/pci/if_iwm.c

2925

offset = 0;

sys/dev/pci/if_iwm.c

2927

.offset = htole16(offset),

sys/dev/pci/if_iwm.c

2963

offset_read = le16toh(nvm_resp->offset);

sys/dev/pci/if_iwm.c

2970

if (offset_read != offset) {

sys/dev/pci/if_iwm.c

2980

memcpy(data + offset, resp_data, bytes_read);

sys/dev/pci/if_iwm.c

4075

uint32_t chunk_sz, offset;

sys/dev/pci/if_iwm.c

4079

for (offset = 0; offset < byte_cnt; offset += chunk_sz) {

sys/dev/pci/if_iwm.c

4083

addr = dst_addr + offset;

sys/dev/pci/if_iwm.c

4084

len = MIN(chunk_sz, byte_cnt - offset);

sys/dev/pci/if_iwm.c

4085

data = section + offset;

sys/dev/pci/if_iwm.c

4170

uint32_t offset;

sys/dev/pci/if_iwm.c

4176

offset = fws->fw_sect[i].fws_devoff;

sys/dev/pci/if_iwm.c

4180

err = iwm_firmware_load_sect(sc, offset, data, dlen);

sys/dev/pci/if_iwm.c

4204

uint32_t offset;

sys/dev/pci/if_iwm.c

4218

offset = fws->fw_sect[i].fws_devoff;

sys/dev/pci/if_iwm.c

4226

if (!data || offset == IWM_CPU1_CPU2_SEPARATOR_SECTION ||

sys/dev/pci/if_iwm.c

4227

offset == IWM_PAGING_SEPARATOR_SECTION)

sys/dev/pci/if_iwm.c

4233

err = iwm_firmware_load_sect(sc, offset, data, dlen);

sys/dev/pci/if_iwm.c

7653

preq->mac_header.offset = 0;

sys/dev/pci/if_iwm.c

7664

preq->band_data[0].offset = htole16(frm - (uint8_t *)wh);

sys/dev/pci/if_iwm.c

7690

preq->band_data[1].offset = htole16(frm - (uint8_t *)wh);

sys/dev/pci/if_iwm.c

7707

preq->common_data.offset = htole16(frm - (uint8_t *)wh);

sys/dev/pci/if_iwm.c

9960

uint32_t offset = 0;

sys/dev/pci/if_iwmreg.h

2377

uint16_t offset;

sys/dev/pci/if_iwmreg.h

2442

uint16_t offset;

sys/dev/pci/if_iwmreg.h

5362

uint16_t offset;

sys/dev/pci/if_iwn.c

6209

cmd.offset = htole16(sc->eeprom_temp);

sys/dev/pci/if_iwn.c

6211

cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);

sys/dev/pci/if_iwn.c

6212

DPRINTF(("setting radio sensor offset to %d\n", letoh16(cmd.offset)));

sys/dev/pci/if_iwnreg.h

1126

int16_t offset;

sys/dev/pci/if_iwx.c

10778

uint32_t offset = 0, nextoff = 0, nmpdu = 0, len;

sys/dev/pci/if_iwx.c

10787

while (m0 && offset + minsz < IWX_RBUF_SIZE) {

sys/dev/pci/if_iwx.c

10788

pkt = (struct iwx_rx_packet *)(m0->m_data + offset);

sys/dev/pci/if_iwx.c

10811

if (len < minsz || len > (IWX_RBUF_SIZE - offset))

sys/dev/pci/if_iwx.c

10829

size_t maxlen = IWX_RBUF_SIZE - offset - minsz;

sys/dev/pci/if_iwx.c

10830

nextoff = offset +

sys/dev/pci/if_iwx.c

10839

if (offset > 0)

sys/dev/pci/if_iwx.c

10840

m_adj(m0, offset);

sys/dev/pci/if_iwx.c

10856

m_adj(m, offset);

sys/dev/pci/if_iwx.c

11258

offset += roundup(len, IWX_FH_RSCSR_FRAME_ALIGN);

sys/dev/pci/if_iwx.c

7292

preq->mac_header.offset = 0;

sys/dev/pci/if_iwx.c

7303

preq->band_data[0].offset = htole16(frm - (uint8_t *)wh);

sys/dev/pci/if_iwx.c

7329

preq->band_data[1].offset = htole16(frm - (uint8_t *)wh);

sys/dev/pci/if_iwx.c

7346

preq->common_data.offset = htole16(frm - (uint8_t *)wh);

sys/dev/pci/if_iwxreg.h

333

uint32_t offset;

sys/dev/pci/if_iwxreg.h

7304

uint16_t offset;

sys/dev/pci/if_ixgb_osdep.h

88

#define IXGB_READ_REG_ARRAY(a, reg, offset) \

sys/dev/pci/if_ixgb_osdep.h

91

(IXGB_##reg + ((offset) << 2)))

sys/dev/pci/if_ixgb_osdep.h

93

#define IXGB_WRITE_REG_ARRAY(a, reg, offset, value) \

sys/dev/pci/if_ixgb_osdep.h

96

(IXGB_##reg + ((offset) << 2)), value)

sys/dev/pci/if_ixl.c

4784

unsigned int offset = pack->lsb / 8;

sys/dev/pci/if_ixl.c

4786

const uint8_t *in = src + pack->offset;

sys/dev/pci/if_ixl.c

4787

uint8_t *out = dst + offset;

sys/dev/pci/if_ixl.c

998

uint16_t offset;

sys/dev/pci/if_jme.c

403

uint32_t offset;

sys/dev/pci/if_jme.c

406

offset = 0;

sys/dev/pci/if_jme.c

407

if (jme_eeprom_read_byte(sc, offset++, &fup) != 0 ||

sys/dev/pci/if_jme.c

410

if (jme_eeprom_read_byte(sc, offset++, &fup) != 0 ||

sys/dev/pci/if_jme.c

415

if (jme_eeprom_read_byte(sc, offset, &fup) != 0)

sys/dev/pci/if_jme.c

419

if (jme_eeprom_read_byte(sc, offset + 1, &reg) != 0)

sys/dev/pci/if_jme.c

423

if (jme_eeprom_read_byte(sc, offset + 2,

sys/dev/pci/if_jme.c

434

offset += JME_EEPROM_DESC_BYTES;

sys/dev/pci/if_jme.c

435

} while (match != ETHER_ADDR_LEN && offset < JME_EEPROM_END);

sys/dev/pci/if_lii.c

453

uint32_t offset = 0x100;

sys/dev/pci/if_lii.c

457

while ((*sc->sc_memread)(sc, offset, &val) == 0) {

sys/dev/pci/if_lii.c

458

offset += 4;

sys/dev/pci/if_lii.c

463

if ((*sc->sc_memread)(sc, offset, &val1))

sys/dev/pci/if_lii.c

466

offset += 4;

sys/dev/pci/if_mcx.c

3518

mcx_cmdq_mboxes_pas(struct mcx_dmamem *mxm, int offset, int npages,

sys/dev/pci/if_mcx.c

3524

mbox = offset / MCX_CMDQ_MAILBOX_DATASIZE;

sys/dev/pci/if_mcx.c

3525

offset %= MCX_CMDQ_MAILBOX_DATASIZE;

sys/dev/pci/if_mcx.c

3528

pas += (offset / sizeof(*pas));

sys/dev/pci/if_mcx.c

3529

mbox_pages = (MCX_CMDQ_MAILBOX_DATASIZE - offset) / sizeof(*pas);

sys/dev/pci/if_mcx.c

6989

bus_size_t offset;

sys/dev/pci/if_mcx.c

7007

offset = (MCX_PAGE_SIZE * uar) + MCX_UAR_CQ_DOORBELL;

sys/dev/pci/if_mcx.c

7012

bus_space_write_raw_8(sc->sc_memt, sc->sc_memh, offset, htobe64(uval));

sys/dev/pci/if_mcx.c

7013

mcx_bar(sc, offset, sizeof(uval), BUS_SPACE_BARRIER_WRITE);

sys/dev/pci/if_mcx.c

7090

bus_size_t offset;

sys/dev/pci/if_mcx.c

7093

offset = (MCX_PAGE_SIZE * uar) + MCX_UAR_EQ_DOORBELL_ARM;

sys/dev/pci/if_mcx.c

7096

mcx_wr(sc, offset, val);

sys/dev/pci/if_mcx.c

7097

mcx_bar(sc, offset, sizeof(val), BUS_SPACE_BARRIER_WRITE);

sys/dev/pci/if_mcx.c

7719

int offset, error;

sys/dev/pci/if_mcx.c

7734

for (offset = 0; offset < 256; offset += MCX_MCIA_EEPROM_BYTES) {

sys/dev/pci/if_mcx.c

7741

mcia.rm_dev_addr = htobe16(offset);

sys/dev/pci/if_mcx.c

7748

DEVNAME(sc), offset);

sys/dev/pci/if_mcx.c

7752

memcpy(sff->sff_data + offset, mcia.rm_data,

sys/dev/pci/if_mwx.c

2865

size_t buflen, fwlen, offset = 0;

sys/dev/pci/if_mwx.c

2974

fwbuf + offset, len, 4096);

sys/dev/pci/if_mwx.c

2979

offset += len;

sys/dev/pci/if_mwx.c

3736

int i, offset = 4;

sys/dev/pci/if_mwx.c

3746

memset(sku + offset, 0x28, 8);

sys/dev/pci/if_mwx.c

3747

offset += 8;

sys/dev/pci/if_mwx.c

3751

memset(sku + offset, 0x28, 8);

sys/dev/pci/if_mwx.c

3752

offset += 8;

sys/dev/pci/if_mwx.c

3754

sku[offset++] = 0x28;

sys/dev/pci/if_mwx.c

3759

memset(sku + offset, 0x28, 10);

sys/dev/pci/if_mwx.c

3760

offset += 12;

sys/dev/pci/if_mwx.c

3765

memset(sku + offset, 0x28, 12);

sys/dev/pci/if_mwx.c

3766

offset += 12;

sys/dev/pci/if_mwx.c

3894

uint32_t offset;

sys/dev/pci/if_mwx.c

3908

offset = 3 * coverage_class;

sys/dev/pci/if_mwx.c

3909

reg_offset = offset | (offset << 16);

sys/dev/pci/if_mwx.c

4542

int rateidx = 0, offset = 4;

sys/dev/pci/if_mwx.c

4550

offset = 0;

sys/dev/pci/if_mwx.c

4555

rateidx += offset;

sys/dev/pci/if_mwx.c

4558

rateidx = offset;

sys/dev/pci/if_mwx.c

504

uint32_t offset = MT_HIF_REMAP_L1_GET_OFFSET(reg);

sys/dev/pci/if_mwx.c

510

return MT_HIF_REMAP_BASE_L1 + offset;

sys/dev/pci/if_myx.c

1451

u_int32_t offset, u_int idx)

sys/dev/pci/if_myx.c

1465

offset + sizeof(txd) * ((idx + i) % sc->sc_tx_ring_count),

sys/dev/pci/if_myx.c

1477

offset + sizeof(txd) * ((idx + i) % sc->sc_tx_ring_count),

sys/dev/pci/if_myx.c

1491

u_int32_t offset = sc->sc_tx_ring_offset;

sys/dev/pci/if_myx.c

1571

offset + sizeof(txd) * idx, &txd, sizeof(txd));

sys/dev/pci/if_myx.c

1573

myx_write_txd_tail(sc, ms, flags, offset, idx);

sys/dev/pci/if_myx.c

1591

myx_write_txd_tail(sc, ms, flags, offset, sc->sc_tx_ring_prod);

sys/dev/pci/if_myx.c

1594

offset + sizeof(txd) * sc->sc_tx_ring_prod, &txd,

sys/dev/pci/if_myx.c

1597

bus_space_barrier(sc->sc_memt, sc->sc_memh, offset,

sys/dev/pci/if_myx.c

1601

offset + sizeof(txd) * (sc->sc_tx_ring_prod + 1) -

sys/dev/pci/if_myx.c

1607

offset + sizeof(txd) * sc->sc_tx_ring_prod, sizeof(txd),

sys/dev/pci/if_myx.c

1832

u_int32_t offset = mrr->mrr_offset;

sys/dev/pci/if_myx.c

1849

myx_bus_space_write(sc, offset + p * sizeof(rxd),

sys/dev/pci/if_myx.c

1861

offset, sizeof(rxd) * sc->sc_rx_ring_count,

sys/dev/pci/if_myx.c

1867

myx_bus_space_write(sc, offset + first * sizeof(rxd),

sys/dev/pci/if_myx.c

1879

u_int32_t offset = mrr->mrr_offset;

sys/dev/pci/if_myx.c

1897

myx_bus_space_write(sc, offset + i * sizeof(rxd),

sys/dev/pci/if_myx.c

375

u_int32_t offset;

sys/dev/pci/if_myx.c

379

myx_read(sc, MYX_HEADER_POS, &offset, sizeof(offset));

sys/dev/pci/if_myx.c

380

offset = betoh32(offset);

sys/dev/pci/if_myx.c

381

if (offset + sizeof(hdr) > sc->sc_mems) {

sys/dev/pci/if_myx.c

386

myx_read(sc, offset, &hdr, sizeof(hdr));

sys/dev/pci/if_myx.c

387

offset = betoh32(hdr.fw_specs);

sys/dev/pci/if_myx.c

390

bus_space_read_region_1(sc->sc_memt, sc->sc_memh, offset, strings, len);

sys/dev/pci/if_myx.c

419

u_int32_t offset;

sys/dev/pci/if_myx.c

432

memcpy(&offset, fw + MYX_HEADER_POS, sizeof(offset));

sys/dev/pci/if_myx.c

433

offset = betoh32(offset);

sys/dev/pci/if_myx.c

434

if ((offset + sizeof(hdr)) > fwlen) {

sys/dev/pci/if_myx.c

439

memcpy(&hdr, fw + offset, sizeof(hdr));

sys/dev/pci/if_myx.c

442

DEVNAME(sc), offset, betoh32(hdr.fw_hdrlength),

sys/dev/pci/if_myx.c

561

int offset;

sys/dev/pci/if_myx.c

565

&offset, NULL)) {

sys/dev/pci/if_myx.c

567

offset + PCI_PCIE_LCSR);

sys/dev/pci/if_ngbe.c

2372

uint32_t offset;

sys/dev/pci/if_ngbe.c

2374

for (offset = 0; offset < hw->mac.vft_size; offset++) {

sys/dev/pci/if_ngbe.c

2375

NGBE_WRITE_REG(hw, NGBE_PSR_VLAN_TBL(offset), 0);

sys/dev/pci/if_ngbe.c

2377

hw->mac.vft_shadow[offset] = 0;

sys/dev/pci/if_ngbe.c

2380

for (offset = 0; offset < NGBE_PSR_VLAN_SWC_ENTRIES; offset++) {

sys/dev/pci/if_ngbe.c

2381

NGBE_WRITE_REG(hw, NGBE_PSR_VLAN_SWC_IDX, offset);

sys/dev/pci/if_ngbe.c

2507

ngbe_eepromcheck_cap(struct ngbe_softc *sc, uint16_t offset, uint32_t *data)

sys/dev/pci/if_ngbereg.h

1082

#define NGBE_READ_REG_ARRAY(a, reg, offset) \

sys/dev/pci/if_ngbereg.h

1084

((struct ngbe_osdep *)(a)->back)->os_memh, (reg + ((offset) << 2)))

sys/dev/pci/if_ngbereg.h

1085

#define NGBE_WRITE_REG_ARRAY(a, reg, offset, value) \

sys/dev/pci/if_ngbereg.h

1088

(reg + ((offset) << 2)), value)

sys/dev/pci/if_ngbereg.h

143

#define NGBE_PHY_CONFIG(offset) (0x14000 + ((offset) * 4))

sys/dev/pci/if_qwx_pci.c

1494

qwx_pcic_read32(struct qwx_softc *sc, uint32_t offset)

sys/dev/pci/if_qwx_pci.c

1505

&& offset >= ATH11K_PCI_ACCESS_ALWAYS_OFF;

sys/dev/pci/if_qwx_pci.c

1509

if (offset < ATH11K_PCI_WINDOW_START)

sys/dev/pci/if_qwx_pci.c

1510

val = qwx_pci_read(sc, offset);

sys/dev/pci/if_qwx_pci.c

1512

val = psc->sc_pci_ops->window_read32(sc, offset);

sys/dev/pci/if_qwx_pci.c

1521

qwx_pcic_write32(struct qwx_softc *sc, uint32_t offset, uint32_t value)

sys/dev/pci/if_qwx_pci.c

1531

&& offset >= ATH11K_PCI_ACCESS_ALWAYS_OFF;

sys/dev/pci/if_qwx_pci.c

1535

if (offset < ATH11K_PCI_WINDOW_START)

sys/dev/pci/if_qwx_pci.c

1536

qwx_pci_write(sc, offset, value);

sys/dev/pci/if_qwx_pci.c

1538

psc->sc_pci_ops->window_write32(sc, offset, value);

sys/dev/pci/if_qwx_pci.c

1817

qwx_pci_get_window_start(struct qwx_softc *sc, uint32_t offset)

sys/dev/pci/if_qwx_pci.c

1822

if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)

sys/dev/pci/if_qwx_pci.c

1825

else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(sc)) <

sys/dev/pci/if_qwx_pci.c

1834

qwx_pci_select_window(struct qwx_softc *sc, uint32_t offset)

sys/dev/pci/if_qwx_pci.c

1837

uint32_t window = FIELD_GET(ATH11K_PCI_WINDOW_VALUE_MASK, offset);

sys/dev/pci/if_qwx_pci.c

1852

qwx_pci_window_write32(struct qwx_softc *sc, uint32_t offset, uint32_t value)

sys/dev/pci/if_qwx_pci.c

1856

window_start = qwx_pci_get_window_start(sc, offset);

sys/dev/pci/if_qwx_pci.c

1862

qwx_pci_select_window(sc, offset);

sys/dev/pci/if_qwx_pci.c

1864

(offset & ATH11K_PCI_WINDOW_RANGE_MASK), value);

sys/dev/pci/if_qwx_pci.c

1870

(offset & ATH11K_PCI_WINDOW_RANGE_MASK), value);

sys/dev/pci/if_qwx_pci.c

1875

qwx_pci_window_read32(struct qwx_softc *sc, uint32_t offset)

sys/dev/pci/if_qwx_pci.c

1879

window_start = qwx_pci_get_window_start(sc, offset);

sys/dev/pci/if_qwx_pci.c

1885

qwx_pci_select_window(sc, offset);

sys/dev/pci/if_qwx_pci.c

1887

(offset & ATH11K_PCI_WINDOW_RANGE_MASK));

sys/dev/pci/if_qwx_pci.c

1893

(offset & ATH11K_PCI_WINDOW_RANGE_MASK));

sys/dev/pci/if_qwx_pci.c

1974

qwx_pci_set_link_reg(struct qwx_softc *sc, uint32_t offset, uint32_t value,

sys/dev/pci/if_qwx_pci.c

1980

v = qwx_pcic_read32(sc, offset);

sys/dev/pci/if_qwx_pci.c

1985

qwx_pcic_write32(sc, offset, (v & ~mask) | value);

sys/dev/pci/if_qwx_pci.c

1987

v = qwx_pcic_read32(sc, offset);

sys/dev/pci/if_qwx_pci.c

1995

offset, v & mask, value);

sys/dev/pci/if_qwx_pci.c

2564

uint64_t base = QWX_DMA_DVA(ring->dmamem), offset;

sys/dev/pci/if_qwx_pci.c

2569

offset = ptr - base;

sys/dev/pci/if_qwx_pci.c

2570

if (offset >= ring->size)

sys/dev/pci/if_qwx_pci.c

2573

return QWX_DMA_KVA(ring->dmamem) + offset;

sys/dev/pci/if_qwx_pci.c

2634

uint64_t base = QWX_DMA_DVA(ring->dmamem), offset;

sys/dev/pci/if_qwx_pci.c

2640

offset = wp - base;

sys/dev/pci/if_qwx_pci.c

2641

if (offset >= ring->size)

sys/dev/pci/if_qwx_pci.c

2644

return addr + offset;

sys/dev/pci/if_qwx_pci.c

2650

uint64_t base = QWX_DMA_DVA(ring->dmamem), offset;

sys/dev/pci/if_qwx_pci.c

2655

offset = wp - base;

sys/dev/pci/if_qwx_pci.c

2656

if (offset >= ring->size)

sys/dev/pci/if_qwx_pci.c

2659

return &ring->data[offset / sizeof(ring->data[0])];

sys/dev/pci/if_qwx_pci.c

3590

uint64_t base = QWX_DMA_DVA(ring->dmamem), offset;

sys/dev/pci/if_qwx_pci.c

3596

offset = rp - base;

sys/dev/pci/if_qwx_pci.c

3597

if (offset >= ring->size)

sys/dev/pci/if_qwx_pci.c

3600

return addr + offset;

sys/dev/pci/if_qwz_pci.c

1334

qwz_pcic_read32(struct qwz_softc *sc, uint32_t offset)

sys/dev/pci/if_qwz_pci.c

1345

&& offset >= ATH12K_PCI_ACCESS_ALWAYS_OFF;

sys/dev/pci/if_qwz_pci.c

1349

if (offset < ATH12K_PCI_WINDOW_START)

sys/dev/pci/if_qwz_pci.c

1350

val = qwz_pci_read(sc, offset);

sys/dev/pci/if_qwz_pci.c

1352

val = psc->sc_pci_ops->window_read32(sc, offset);

sys/dev/pci/if_qwz_pci.c

1361

qwz_pcic_write32(struct qwz_softc *sc, uint32_t offset, uint32_t value)

sys/dev/pci/if_qwz_pci.c

1371

&& offset >= ATH12K_PCI_ACCESS_ALWAYS_OFF;

sys/dev/pci/if_qwz_pci.c

1375

if (offset < ATH12K_PCI_WINDOW_START)

sys/dev/pci/if_qwz_pci.c

1376

qwz_pci_write(sc, offset, value);

sys/dev/pci/if_qwz_pci.c

1378

psc->sc_pci_ops->window_write32(sc, offset, value);

sys/dev/pci/if_qwz_pci.c

1658

qwz_pci_get_window_start(struct qwz_softc *sc, uint32_t offset)

sys/dev/pci/if_qwz_pci.c

1663

if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH12K_PCI_WINDOW_RANGE_MASK)

sys/dev/pci/if_qwz_pci.c

1666

else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG) <

sys/dev/pci/if_qwz_pci.c

1675

qwz_pci_select_window(struct qwz_softc *sc, uint32_t offset)

sys/dev/pci/if_qwz_pci.c

1678

uint32_t window = FIELD_GET(ATH12K_PCI_WINDOW_VALUE_MASK, offset);

sys/dev/pci/if_qwz_pci.c

1699

qwz_pci_is_offset_within_mhi_region(uint32_t offset)

sys/dev/pci/if_qwz_pci.c

1701

return (offset >= PCI_MHIREGLEN_REG && offset <= PCI_MHI_REGION_END);

sys/dev/pci/if_qwz_pci.c

1705

qwz_pci_window_write32(struct qwz_softc *sc, uint32_t offset, uint32_t value)

sys/dev/pci/if_qwz_pci.c

1709

window_start = qwz_pci_get_window_start(sc, offset);

sys/dev/pci/if_qwz_pci.c

1715

qwz_pci_select_window(sc, offset);

sys/dev/pci/if_qwz_pci.c

1717

if (qwz_pci_is_offset_within_mhi_region(offset)) {

sys/dev/pci/if_qwz_pci.c

1718

offset = offset - PCI_MHIREGLEN_REG;

sys/dev/pci/if_qwz_pci.c

1719

qwz_pci_write(sc, offset & ATH12K_PCI_WINDOW_RANGE_MASK,

sys/dev/pci/if_qwz_pci.c

1723

(offset & ATH12K_PCI_WINDOW_RANGE_MASK), value);

sys/dev/pci/if_qwz_pci.c

1730

(offset & ATH12K_PCI_WINDOW_RANGE_MASK), value);

sys/dev/pci/if_qwz_pci.c

1735

qwz_pci_window_read32(struct qwz_softc *sc, uint32_t offset)

sys/dev/pci/if_qwz_pci.c

1739

window_start = qwz_pci_get_window_start(sc, offset);

sys/dev/pci/if_qwz_pci.c

1745

qwz_pci_select_window(sc, offset);

sys/dev/pci/if_qwz_pci.c

1747

if (qwz_pci_is_offset_within_mhi_region(offset)) {

sys/dev/pci/if_qwz_pci.c

1748

offset = offset - PCI_MHIREGLEN_REG;

sys/dev/pci/if_qwz_pci.c

1750

offset & ATH12K_PCI_WINDOW_RANGE_MASK);

sys/dev/pci/if_qwz_pci.c

1753

(offset & ATH12K_PCI_WINDOW_RANGE_MASK));

sys/dev/pci/if_qwz_pci.c

1760

(offset & ATH12K_PCI_WINDOW_RANGE_MASK));

sys/dev/pci/if_qwz_pci.c

1841

qwz_pci_set_link_reg(struct qwz_softc *sc, uint32_t offset, uint32_t value,

sys/dev/pci/if_qwz_pci.c

1847

v = qwz_pcic_read32(sc, offset);

sys/dev/pci/if_qwz_pci.c

1852

qwz_pcic_write32(sc, offset, (v & ~mask) | value);

sys/dev/pci/if_qwz_pci.c

1854

v = qwz_pcic_read32(sc, offset);

sys/dev/pci/if_qwz_pci.c

1862

offset, v & mask, value);

sys/dev/pci/if_qwz_pci.c

2431

uint64_t base = QWZ_DMA_DVA(ring->dmamem), offset;

sys/dev/pci/if_qwz_pci.c

2436

offset = ptr - base;

sys/dev/pci/if_qwz_pci.c

2437

if (offset >= ring->size)

sys/dev/pci/if_qwz_pci.c

2440

return QWZ_DMA_KVA(ring->dmamem) + offset;

sys/dev/pci/if_qwz_pci.c

2501

uint64_t base = QWZ_DMA_DVA(ring->dmamem), offset;

sys/dev/pci/if_qwz_pci.c

2507

offset = wp - base;

sys/dev/pci/if_qwz_pci.c

2508

if (offset >= ring->size)

sys/dev/pci/if_qwz_pci.c

2511

return addr + offset;

sys/dev/pci/if_qwz_pci.c

2517

uint64_t base = QWZ_DMA_DVA(ring->dmamem), offset;

sys/dev/pci/if_qwz_pci.c

2522

offset = wp - base;

sys/dev/pci/if_qwz_pci.c

2523

if (offset >= ring->size)

sys/dev/pci/if_qwz_pci.c

2526

return &ring->data[offset / sizeof(ring->data[0])];

sys/dev/pci/if_qwz_pci.c

3454

uint64_t base = QWZ_DMA_DVA(ring->dmamem), offset;

sys/dev/pci/if_qwz_pci.c

3460

offset = rp - base;

sys/dev/pci/if_qwz_pci.c

3461

if (offset >= ring->size)

sys/dev/pci/if_qwz_pci.c

3464

return addr + offset;

sys/dev/pci/if_re_pci.c

128

int offset;

sys/dev/pci/if_re_pci.c

179

&offset, NULL)) {

sys/dev/pci/if_re_pci.c

181

reg = pci_conf_read(pc, pa->pa_tag, offset + PCI_PCIE_LCSR);

sys/dev/pci/if_re_pci.c

184

pci_conf_write(pc, pa->pa_tag, offset + PCI_PCIE_LCSR, reg);

sys/dev/pci/if_rge.c

189

int offset;

sys/dev/pci/if_rge.c

286

&offset, NULL)) {

sys/dev/pci/if_rge.c

289

offset + PCI_PCIE_LCSR);

sys/dev/pci/if_rge.c

292

pci_conf_write(pa->pa_pc, pa->pa_tag, offset + PCI_PCIE_LCSR,

sys/dev/pci/if_se.c

204

se_read_eeprom(struct se_softc *sc, int offset)

sys/dev/pci/if_se.c

209

KASSERT(offset <= EI_OFFSET);

sys/dev/pci/if_se.c

212

EI_REQ | EI_OP_RD | (offset << EI_OFFSET_SHIFT));

sys/dev/pci/if_stge.c

1398

stge_read_eeprom(struct stge_softc *sc, int offset, uint16_t *data)

sys/dev/pci/if_stge.c

1406

EC_EepromAddress(offset) | EC_EepromOpcode(EC_OP_RR));

sys/dev/pci/if_vic.c

553

u_int offset;

sys/dev/pci/if_vic.c

592

offset = sizeof(struct vic_data);

sys/dev/pci/if_vic.c

597

sc->sc_rxq[q].slots = (struct vic_rxdesc *)&kva[offset];

sys/dev/pci/if_vic.c

598

sc->sc_data->vd_rx_offset[q] = offset;

sys/dev/pci/if_vic.c

609

offset += sizeof(struct vic_rxdesc);

sys/dev/pci/if_vic.c

614

sc->sc_txq = (struct vic_txdesc *)&kva[offset];

sys/dev/pci/if_vic.c

616

sc->sc_data->vd_tx_offset = offset;

sys/dev/pci/if_vmx.c

1563

uint32_t offset = 0;

sys/dev/pci/if_vmx.c

1596

offset = hdrlen + offsetof(struct tcphdr, th_sum);

sys/dev/pci/if_vmx.c

1598

offset = hdrlen + offsetof(struct udphdr, uh_sum);

sys/dev/pci/if_vmx.c

1604

offset &= VMXNET3_TX_OP_M;

sys/dev/pci/if_vmx.c

1608

sop->tx_word2 |= htole32(offset << VMXNET3_TX_OP_S);

sys/dev/pci/if_vr.c

919

int offset = ((total_len + 3) & ~3) + ETHER_CRC_LEN + 2;

sys/dev/pci/if_vr.c

921

((u_int8_t *)m->m_data + offset));

sys/dev/pci/if_wpi.c

1535

uint32_t i, offset, count;

sys/dev/pci/if_wpi.c

1560

offset = sc->errptr + sizeof (uint32_t);

sys/dev/pci/if_wpi.c

1563

wpi_mem_read_region_4(sc, offset, (uint32_t *)&dump,

sys/dev/pci/if_wpi.c

1578

offset += sizeof (dump);

sys/dev/pci/if_wpireg.h

824

#define WPI_WRITE_REGION_4(sc, offset, datap, count) \

sys/dev/pci/if_wpireg.h

825

bus_space_write_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \

sys/dev/pci/igc_i225.c

447

igc_read_nvm_srrd_i225(struct igc_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/igc_i225.c

463

status = igc_read_nvm_eerd(hw, offset, count, data + i);

sys/dev/pci/igc_i225.c

492

igc_write_nvm_srwr_i225(struct igc_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/igc_i225.c

508

status = __igc_write_nvm_srwr(hw, offset, count,

sys/dev/pci/igc_i225.c

533

__igc_write_nvm_srwr(struct igc_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/igc_i225.c

546

if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||

sys/dev/pci/igc_i225.c

554

eewr = ((offset + i) << IGC_NVM_RW_ADDR_SHIFT) |

sys/dev/pci/igc_mac.c

102

uint16_t offset, nvm_alt_mac_addr_offset, nvm_data;

sys/dev/pci/igc_mac.c

126

offset = nvm_alt_mac_addr_offset + (i >> 1);

sys/dev/pci/igc_mac.c

127

ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);

sys/dev/pci/igc_mac.c

49

igc_write_vfta_generic(struct igc_hw *hw, uint32_t offset, uint32_t value)

sys/dev/pci/igc_mac.c

53

IGC_WRITE_REG_ARRAY(hw, IGC_VFTA, offset, value);

sys/dev/pci/igc_nvm.c

136

igc_read_nvm_eerd(struct igc_hw *hw, uint16_t offset, uint16_t words,

sys/dev/pci/igc_nvm.c

148

if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||

sys/dev/pci/igc_nvm.c

155

eerd = ((offset + i) << IGC_NVM_RW_ADDR_SHIFT) +

sys/dev/pci/igc_phy.c

100

uint32_t IGC_UNUSEDARG offset, uint16_t IGC_UNUSEDARG data)

sys/dev/pci/igc_phy.c

172

igc_read_phy_reg_mdic(struct igc_hw *hw, uint32_t offset, uint16_t *data)

sys/dev/pci/igc_phy.c

179

if (offset > MAX_PHY_REG_ADDRESS) {

sys/dev/pci/igc_phy.c

180

DEBUGOUT1("PHY Address %d is out of range\n", offset);

sys/dev/pci/igc_phy.c

188

mdic = ((offset << IGC_MDIC_REG_SHIFT) |

sys/dev/pci/igc_phy.c

211

if (((mdic & IGC_MDIC_REG_MASK) >> IGC_MDIC_REG_SHIFT) != offset) {

sys/dev/pci/igc_phy.c

213

offset, (mdic & IGC_MDIC_REG_MASK) >> IGC_MDIC_REG_SHIFT);

sys/dev/pci/igc_phy.c

230

igc_write_phy_reg_mdic(struct igc_hw *hw, uint32_t offset, uint16_t data)

sys/dev/pci/igc_phy.c

237

if (offset > MAX_PHY_REG_ADDRESS) {

sys/dev/pci/igc_phy.c

238

DEBUGOUT1("PHY Address %d is out of range\n", offset);

sys/dev/pci/igc_phy.c

246

mdic = (((uint32_t)data) | (offset << IGC_MDIC_REG_SHIFT) |

sys/dev/pci/igc_phy.c

269

if (((mdic & IGC_MDIC_REG_MASK) >> IGC_MDIC_REG_SHIFT) != offset)

sys/dev/pci/igc_phy.c

63

uint32_t IGC_UNUSEDARG offset, uint16_t IGC_UNUSEDARG *data)

sys/dev/pci/igc_phy.c

792

igc_write_phy_reg_gpy(struct igc_hw *hw, uint32_t offset, uint16_t data)

sys/dev/pci/igc_phy.c

794

uint8_t dev_addr = (offset & GPY_MMD_MASK) >> GPY_MMD_SHIFT;

sys/dev/pci/igc_phy.c

799

offset = offset & GPY_REG_MASK;

sys/dev/pci/igc_phy.c

805

ret_val = igc_write_phy_reg_mdic(hw, offset, data);

sys/dev/pci/igc_phy.c

810

ret_val = igc_write_xmdio_reg(hw, (uint16_t)offset, dev_addr,

sys/dev/pci/igc_phy.c

828

igc_read_phy_reg_gpy(struct igc_hw *hw, uint32_t offset, uint16_t *data)

sys/dev/pci/igc_phy.c

830

uint8_t dev_addr = (offset & GPY_MMD_MASK) >> GPY_MMD_SHIFT;

sys/dev/pci/igc_phy.c

835

offset = offset & GPY_REG_MASK;

sys/dev/pci/igc_phy.c

841

ret_val = igc_read_phy_reg_mdic(hw, offset, data);

sys/dev/pci/igc_phy.c

846

ret_val = igc_read_xmdio_reg(hw, (uint16_t)offset, dev_addr,

sys/dev/pci/igc_phy.h

27

int igc_read_phy_reg_mdic(struct igc_hw *, uint32_t offset, uint16_t *);

sys/dev/pci/igc_phy.h

28

int igc_write_phy_reg_mdic(struct igc_hw *, uint32_t offset, uint16_t);

sys/dev/pci/ixgb_ee.c

387

ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)

sys/dev/pci/ixgb_ee.c

405

ixgb_shift_out_bits(hw, offset, 6);

sys/dev/pci/ixgb_ee.c

440

ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t offset)

sys/dev/pci/ixgb_ee.c

452

ixgb_shift_out_bits(hw, offset, 6);

sys/dev/pci/ixgb_hw.c

623

uint32_t offset;

sys/dev/pci/ixgb_hw.c

625

for(offset = 0; offset < IXGB_VLAN_FILTER_TBL_SIZE; offset++)

sys/dev/pci/ixgb_hw.c

626

IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0);

sys/dev/pci/ixgbe.c

1012

((offset + i) >= 128))

sys/dev/pci/ixgbe.c

1018

ixgbe_shift_out_eeprom_bits(hw, (uint16_t)((offset + i) * 2),

sys/dev/pci/ixgbe.c

1033

if (((offset + i) & (page_size - 1)) ==

sys/dev/pci/ixgbe.c

1057

int32_t ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t data)

sys/dev/pci/ixgbe.c

1065

if (offset >= hw->eeprom.word_size) {

sys/dev/pci/ixgbe.c

1070

status = ixgbe_write_eeprom_buffer_bit_bang(hw, offset, 1, &data);

sys/dev/pci/ixgbe.c

1085

static int32_t ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe.c

1113

((offset + i) >= 128))

sys/dev/pci/ixgbe.c

1119

ixgbe_shift_out_eeprom_bits(hw, (uint16_t)((offset + i) * 2),

sys/dev/pci/ixgbe.c

1142

int32_t ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe.c

1151

if (offset >= hw->eeprom.word_size) {

sys/dev/pci/ixgbe.c

1156

status = ixgbe_read_eeprom_buffer_bit_bang(hw, offset, 1, data);

sys/dev/pci/ixgbe.c

1171

int32_t ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe.c

1188

if (offset >= hw->eeprom.word_size) {

sys/dev/pci/ixgbe.c

1195

eerd = ((offset + i) << IXGBE_EEPROM_RW_ADDR_SHIFT) |

sys/dev/pci/ixgbe.c

1221

int32_t ixgbe_read_eerd_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t *data)

sys/dev/pci/ixgbe.c

1223

return ixgbe_read_eerd_buffer_generic(hw, offset, 1, data);

sys/dev/pci/ixgbe.c

1235

int32_t ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe.c

1252

if (offset >= hw->eeprom.word_size) {

sys/dev/pci/ixgbe.c

1259

eewr = ((offset + i) << IXGBE_EEPROM_RW_ADDR_SHIFT) |

sys/dev/pci/ixgbe.c

1290

int32_t ixgbe_write_eewr_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t data)

sys/dev/pci/ixgbe.c

1292

return ixgbe_write_eewr_buffer_generic(hw, offset, 1, &data);

sys/dev/pci/ixgbe.c

3428

uint32_t offset;

sys/dev/pci/ixgbe.c

3432

for (offset = 0; offset < hw->mac.vft_size; offset++)

sys/dev/pci/ixgbe.c

3433

IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0);

sys/dev/pci/ixgbe.c

3435

for (offset = 0; offset < IXGBE_VLVF_ENTRIES; offset++) {

sys/dev/pci/ixgbe.c

3436

IXGBE_WRITE_REG(hw, IXGBE_VLVF(offset), 0);

sys/dev/pci/ixgbe.c

3437

IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2), 0);

sys/dev/pci/ixgbe.c

3438

IXGBE_WRITE_REG(hw, IXGBE_VLVFB((offset * 2) + 1), 0);

sys/dev/pci/ixgbe.c

975

static int32_t ixgbe_write_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe.h

155

#define IXGBE_READ_REG_ARRAY(a, reg, offset) \

sys/dev/pci/ixgbe.h

157

((struct ixgbe_osdep *)(a)->back)->os_memh, (reg + ((offset) << 2)))

sys/dev/pci/ixgbe.h

158

#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \

sys/dev/pci/ixgbe.h

160

((struct ixgbe_osdep *)(a)->back)->os_memh, (reg + ((offset) << 2)), value)

sys/dev/pci/ixgbe.h

180

int32_t ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t data);

sys/dev/pci/ixgbe.h

181

int32_t ixgbe_read_eerd_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t *data);

sys/dev/pci/ixgbe.h

182

int32_t ixgbe_write_eewr_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t data);

sys/dev/pci/ixgbe.h

183

int32_t ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe_82598.c

1059

uint32_t offset;

sys/dev/pci/ixgbe_82598.c

1064

for (offset = 0; offset < hw->mac.vft_size; offset++)

sys/dev/pci/ixgbe_82598.c

1065

IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0);

sys/dev/pci/ixgbe_82598.c

1068

for (offset = 0; offset < hw->mac.vft_size; offset++)

sys/dev/pci/ixgbe_82598.c

1069

IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset),

sys/dev/pci/ixgbe_82599.c

1558

uint16_t offset, uint16_t *data)

sys/dev/pci/ixgbe_82599.c

1570

(offset <= IXGBE_EERD_MAX_ADDR))

sys/dev/pci/ixgbe_82599.c

1571

ret_val = ixgbe_read_eerd_generic(hw, offset, data);

sys/dev/pci/ixgbe_82599.c

1573

ret_val = ixgbe_read_eeprom_bit_bang_generic(hw, offset, data);

sys/dev/pci/ixgbe_82599.c

91

uint16_t offset, uint16_t *data);

sys/dev/pci/ixgbe_phy.c

2028

bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, uint8_t offset, uint8_t addr)

sys/dev/pci/ixgbe_phy.c

2031

offset == IXGBE_SFF_IDENTIFIER &&

sys/dev/pci/ixgbe_type.h

4020

int32_t (*read_i2c_byte_unlocked)(struct ixgbe_hw *, uint8_t offset, uint8_t addr,

sys/dev/pci/ixgbe_type.h

4022

int32_t (*write_i2c_byte_unlocked)(struct ixgbe_hw *, uint8_t offset, uint8_t addr,

sys/dev/pci/ixgbe_x540.c

375

int32_t ixgbe_read_eerd_X540(struct ixgbe_hw *hw, uint16_t offset, uint16_t *data)

sys/dev/pci/ixgbe_x540.c

382

status = ixgbe_read_eerd_generic(hw, offset, data);

sys/dev/pci/ixgbe_x540.c

399

int32_t ixgbe_write_eewr_X540(struct ixgbe_hw *hw, uint16_t offset, uint16_t data)

sys/dev/pci/ixgbe_x540.c

406

status = ixgbe_write_eewr_generic(hw, offset, data);

sys/dev/pci/ixgbe_x540.c

63

int32_t ixgbe_read_eerd_X540(struct ixgbe_hw *hw, uint16_t offset, uint16_t *data);

sys/dev/pci/ixgbe_x540.c

64

int32_t ixgbe_write_eewr_X540(struct ixgbe_hw *hw, uint16_t offset, uint16_t data);

sys/dev/pci/ixgbe_x550.c

2935

int32_t ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, uint16_t offset,uint16_t *data)

sys/dev/pci/ixgbe_x550.c

2948

buffer.address = htobe32(offset * 2);

sys/dev/pci/ixgbe_x550.c

2979

uint16_t offset, uint16_t words,

sys/dev/pci/ixgbe_x550.c

3010

buffer.address = htobe32((offset + current_word) * 2);

sys/dev/pci/ixgbe_x550.c

3053

int32_t ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe_x550.c

3069

buffer.address = htobe32(offset * 2);

sys/dev/pci/ixgbe_x550.c

3086

int32_t ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe_x550.c

3095

status = ixgbe_write_ee_hostif_data_X550(hw, offset, data);

sys/dev/pci/ixgbe_x550.c

65

int32_t ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe_x550.c

68

uint16_t offset, uint16_t words,

sys/dev/pci/ixgbe_x550.c

70

int32_t ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ixgbe_x550.c

72

int32_t ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, uint16_t offset,

sys/dev/pci/ksmn.c

238

int i, raw, offset = 0;

sys/dev/pci/ksmn.c

243

offset -= CURTMP_17H_RANGE_ADJUST;

sys/dev/pci/ksmn.c

244

offset -= sc->sc_tctl_offset;

sys/dev/pci/ksmn.c

246

offset *= 100000;

sys/dev/pci/ksmn.c

249

s->value = raw * 125000 + offset + 273150000;

sys/dev/pci/ksmn.c

251

offset = CURTMP_17H_RANGE_ADJUST * 100000;

sys/dev/pci/ksmn.c

257

s->value = (reg & CURTMP_CCD_MASK) * 125000 - offset +

sys/dev/pci/maestro.c

1163

u_int offset = ((caddr_t)start - sc->dmabase) >> 1;

sys/dev/pci/maestro.c

1168

sc->play.wpwa = APU_USE_SYSMEM | (offset >> 8);

sys/dev/pci/maestro.c

1171

DPRINTF(("offset = %x, size=%x\n", offset, size));

sys/dev/pci/maestro.c

1176

sc->play.end = offset+size;

sys/dev/pci/maestro.c

1177

sc->play.start = offset;

sys/dev/pci/mmuagp.c

391

mmuagp_bind_page(void *sc, bus_addr_t offset, paddr_t physical, int flags)

sys/dev/pci/mmuagp.c

395

msc->gatt->ag_virtual[(offset - msc->msc_apaddr) >> AGP_PAGE_SHIFT] =

sys/dev/pci/mmuagp.c

400

mmuagp_unbind_page(void *sc, bus_addr_t offset)

sys/dev/pci/mmuagp.c

404

msc->gatt->ag_virtual[(offset - msc->msc_apaddr) >> AGP_PAGE_SHIFT] = 0;

sys/dev/pci/pccbb.c

1712

pccbb_pcmcia_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset,

sys/dev/pci/pccbb.c

1716

bus_addr_t ioaddr = pcihp->addr + offset;

sys/dev/pci/pccbb.c

2183

phys_addr, phys_end, ph->mem[win].offset));

sys/dev/pci/pccbb.c

2213

off_low = (ph->mem[win].offset >> PCIC_CARDMEM_ADDRX_SHIFT) & 0xff;

sys/dev/pci/pccbb.c

2214

off_high = ((ph->mem[win].offset >> (PCIC_CARDMEM_ADDRX_SHIFT + 8))

sys/dev/pci/pccbb.c

2316

ph->mem[win].offset = card_offset;

sys/dev/pci/pccbbvar.h

86

long offset;

sys/dev/pci/pci.c

1103

pci_vpd_read(pci_chipset_tag_t pc, pcitag_t tag, int offset, int count,

sys/dev/pci/pci.c

1110

if ((offset + count) >= PCI_VPD_ADDRESS_MASK)

sys/dev/pci/pci.c

1116

for (i = 0; i < count; offset += sizeof(*data), i++) {

sys/dev/pci/pci.c

1119

reg |= PCI_VPD_ADDRESS(offset);

sys/dev/pci/pci.c

605

int *offset, pcireg_t *value)

sys/dev/pci/pci.c

639

if (offset)

sys/dev/pci/pci.c

640

*offset = ofs;

sys/dev/pci/pci.c

653

int *offset, pcireg_t *value)

sys/dev/pci/pci.c

668

if (offset)

sys/dev/pci/pci.c

669

*offset = ofs;

sys/dev/pci/pci.c

682

int *offset, pcireg_t *value)

sys/dev/pci/pci.c

700

if (offset)

sys/dev/pci/pci.c

701

*offset = ofs;

sys/dev/pci/pci.c

743

int offset;

sys/dev/pci/pci.c

745

if (pci_get_capability(pc, tag, PCI_CAP_PWRMGMT, &offset, 0)) {

sys/dev/pci/pci.c

746

reg = pci_conf_read(pc, tag, offset + PCI_PMCSR);

sys/dev/pci/pci.c

756

int offset, ostate = state;

sys/dev/pci/pci.c

778

if (pci_get_capability(pc, tag, PCI_CAP_PWRMGMT, &offset, 0)) {

sys/dev/pci/pci.c

792

reg = pci_conf_read(pc, tag, offset + PCI_PMCSR);

sys/dev/pci/pci.c

796

pci_conf_write(pc, tag, offset + PCI_PMCSR,

sys/dev/pci/puc.c

258

if (desc->ports[i].offset >= sc->sc_bar_mappings[bar].s ||

sys/dev/pci/puc.c

260

sc->sc_bar_mappings[bar].h, desc->ports[i].offset,

sys/dev/pci/puc.c

261

sc->sc_bar_mappings[bar].s - desc->ports[i].offset,

sys/dev/pci/pucvar.h

51

u_short offset;

sys/dev/pci/qle.c

1292

int offset, error, done;

sys/dev/pci/qle.c

1347

offset = (req * QLE_QUEUE_ENTRY_SIZE);

sys/dev/pci/qle.c

1348

iocb = QLE_DMA_KVA(sc->sc_requests) + offset;

sys/dev/pci/qle.c

1350

offset, QLE_QUEUE_ENTRY_SIZE, BUS_DMASYNC_POSTWRITE);

sys/dev/pci/qle.c

1360

offset = (req * QLE_QUEUE_ENTRY_SIZE);

sys/dev/pci/qle.c

1361

iocb = QLE_DMA_KVA(sc->sc_requests) + offset;

sys/dev/pci/qle.c

1362

bus_dmamap_sync(sc->sc_dmat, QLE_DMA_MAP(sc->sc_requests), offset,

sys/dev/pci/qle.c

1369

bus_dmamap_sync(sc->sc_dmat, QLE_DMA_MAP(sc->sc_requests), offset,

sys/dev/pci/qle.c

1420

qle_read(struct qle_softc *sc, int offset)

sys/dev/pci/qle.c

1423

v = bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset);

sys/dev/pci/qle.c

1424

bus_space_barrier(sc->sc_iot, sc->sc_ioh, offset, 4,

sys/dev/pci/qle.c

1430

qle_write(struct qle_softc *sc, int offset, u_int32_t value)

sys/dev/pci/qle.c

1432

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, value);

sys/dev/pci/qle.c

1433

bus_space_barrier(sc->sc_iot, sc->sc_ioh, offset, 4,

sys/dev/pci/qle.c

1441

bus_size_t offset = mbox * 2;

sys/dev/pci/qle.c

1442

v = bus_space_read_2(sc->sc_iot, sc->sc_mbox_ioh, offset);

sys/dev/pci/qle.c

1443

bus_space_barrier(sc->sc_iot, sc->sc_mbox_ioh, offset, 2,

sys/dev/pci/qle.c

1451

bus_size_t offset = (mbox * 2);

sys/dev/pci/qle.c

1452

bus_space_write_2(sc->sc_iot, sc->sc_mbox_ioh, offset, value);

sys/dev/pci/qle.c

1453

bus_space_barrier(sc->sc_iot, sc->sc_mbox_ioh, offset, 2,

sys/dev/pci/qle.c

1830

u_int64_t offset;

sys/dev/pci/qle.c

1839

offset = (req * QLE_QUEUE_ENTRY_SIZE);

sys/dev/pci/qle.c

1840

iocb = QLE_DMA_KVA(sc->sc_requests) + offset;

sys/dev/pci/qle.c

1841

bus_dmamap_sync(sc->sc_dmat, QLE_DMA_MAP(sc->sc_requests), offset,

sys/dev/pci/qle.c

1960

u_int64_t offset;

sys/dev/pci/qle.c

1969

offset = (req * QLE_QUEUE_ENTRY_SIZE);

sys/dev/pci/qle.c

1970

iocb = QLE_DMA_KVA(sc->sc_requests) + offset;

sys/dev/pci/qle.c

1971

bus_dmamap_sync(sc->sc_dmat, QLE_DMA_MAP(sc->sc_requests), offset,

sys/dev/pci/tga.c

1103

int offset = 1 * dc->dc_tgaconf->tgac_vvbr_units;

sys/dev/pci/tga.c

1145

tga_srcb = offset + (sy + src->ri_yorigin) * src->ri_stride +

sys/dev/pci/tga.c

1147

tga_dstb = offset + (dy + dst->ri_yorigin) * dst->ri_stride +

sys/dev/pci/tga.c

583

wsd_fbip->offset = 0;

sys/dev/pci/tga.c

688

tga_mmap(void *v, off_t offset, int prot)

sys/dev/pci/tga.c

693

if (offset >= dc->dc_tgaconf->tgac_cspace_size || offset < 0)

sys/dev/pci/tga.c

700

offset += dc->dc_tgaconf->tgac_cspace_size / 2;

sys/dev/pci/tga.c

703

return (sc->sc_dc->dc_paddr + offset);

sys/dev/pci/virtio_pci.c

1240

unsigned offset = 0;

sys/dev/pci/virtio_pci.c

1242

offset = vsc->sc_vqs[idx].vq_notify_off *

sys/dev/pci/virtio_pci.c

1245

bus_space_write_2(sc->sc_notify_iot, sc->sc_notify_ioh, offset, idx);

sys/dev/pci/virtio_pci.c

377

int offset;

sys/dev/pci/virtio_pci.c

383

if (!pci_get_capability(pc, tag, PCI_CAP_VENDSPEC, &offset, &v.reg[0]))

sys/dev/pci/virtio_pci.c

389

v.reg[i] = pci_conf_read(pc, tag, offset + i * 4);

sys/dev/pci/virtio_pci.c

391

__func__, offset, v.vcap.cap_len, v.vcap.cfg_type, v.vcap.bar,

sys/dev/pci/virtio_pci.c

392

v.vcap.offset, v.vcap.length);

sys/dev/pci/virtio_pci.c

393

offset = v.vcap.cap_next;

sys/dev/pci/virtio_pci.c

394

} while (offset != 0);

sys/dev/pci/virtio_pci.c

403

unsigned int offset, i, len;

sys/dev/pci/virtio_pci.c

412

if (!pci_get_capability(pc, tag, PCI_CAP_VENDSPEC, &offset, &v->reg[0]))

sys/dev/pci/virtio_pci.c

417

v->reg[i] = pci_conf_read(pc, tag, offset + i * 4);

sys/dev/pci/virtio_pci.c

420

offset = v->vcap.cap_next;

sys/dev/pci/virtio_pci.c

421

} while (offset != 0);

sys/dev/pci/virtio_pci.c

423

if (offset == 0)

sys/dev/pci/virtio_pci.c

433

v->reg[i] = pci_conf_read(pc, tag, offset + i * 4);

sys/dev/pci/virtio_pci.c

475

bus_size_t len = caps[i]->offset + caps[i]->length;

sys/dev/pci/virtio_pci.c

503

notify.cap.offset, notify.cap.length, &sc->sc_notify_ioh) != 0) {

sys/dev/pci/virtio_pci.c

516

device.offset, device.length, &sc->sc_devcfg_ioh) != 0) {

sys/dev/pci/virtio_pci.c

528

isr.offset, isr.length, &sc->sc_isr_ioh) != 0) {

sys/dev/pci/virtio_pci.c

539

common.offset, common.length, &sc->sc_ioh) != 0) {

sys/dev/pci/virtio_pci.c

65

int virtio_pci_adjust_config_region(struct virtio_pci_softc *, int offset);

sys/dev/pci/virtio_pci.c

770

virtio_pci_adjust_config_region(struct virtio_pci_softc *sc, int offset)

sys/dev/pci/virtio_pci.c

774

if (sc->sc_devcfg_offset == offset)

sys/dev/pci/virtio_pci.c

776

sc->sc_devcfg_offset = offset;

sys/dev/pci/virtio_pci.c

777

sc->sc_devcfg_iosize = sc->sc_iosize - offset;

sys/dev/pci/virtio_pcireg.h

49

uint32_t offset; /* Offset within bar. */

sys/dev/pci/yds.c

1207

sc->sc_play.offset = 0;

sys/dev/pci/yds.c

1334

sc->sc_rec.offset = 0;

sys/dev/pci/yds.c

925

cpu = sc->sc_play.offset;

sys/dev/pci/yds.c

938

sc->sc_play.offset += blk;

sys/dev/pci/yds.c

939

if (sc->sc_play.offset >= len) {

sys/dev/pci/yds.c

940

sc->sc_play.offset -= len;

sys/dev/pci/yds.c

942

if (sc->sc_play.offset != 0)

sys/dev/pci/yds.c

965

cpu = sc->sc_rec.offset;

sys/dev/pci/yds.c

978

sc->sc_rec.offset += blk;

sys/dev/pci/yds.c

979

if (sc->sc_rec.offset >= len) {

sys/dev/pci/yds.c

980

sc->sc_rec.offset -= len;

sys/dev/pci/yds.c

982

if (sc->sc_rec.offset != 0)

sys/dev/pci/ydsreg.h

364

u_int offset; /* filled up to here */

sys/dev/pcmcia/cfxga.c

597

wdf->stride = wdf->offset = wdf->cmsize = 0;

sys/dev/pcmcia/cfxga.c

603

wdf->offset = 0;

sys/dev/pcmcia/if_malo.c

500

int offset, i;

sys/dev/pcmcia/if_malo.c

515

for (offset = 0; offset < sc->sc_fw_h_size; offset += bsize) {

sys/dev/pcmcia/if_malo.c

516

if (sc->sc_fw_h_size - offset >= MALO_FW_HELPER_BSIZE)

sys/dev/pcmcia/if_malo.c

519

bsize = sc->sc_fw_h_size - offset;

sys/dev/pcmcia/if_malo.c

523

sc->sc_dev.dv_xname, bsize, offset);

sys/dev/pcmcia/if_malo.c

525

uc = (uint16_t *)(sc->sc_fw_h + offset);

sys/dev/pcmcia/if_malo.c

559

int offset, i, retry = 0;

sys/dev/pcmcia/if_malo.c

575

for (offset = 0; offset < sc->sc_fw_m_size; offset += bsize) {

sys/dev/pcmcia/if_malo.c

589

offset -= bsize;

sys/dev/pcmcia/if_malo.c

597

sc->sc_dev.dv_xname, bsize, offset);

sys/dev/pcmcia/if_malo.c

599

uc = (uint16_t *)(sc->sc_fw_m + offset);

sys/dev/pcmcia/if_ne_pcmcia.c

1004

AX88190_LAN_IOBASE, AX88190_LAN_IOSIZE, &pcmh, &offset,

sys/dev/pcmcia/if_ne_pcmcia.c

1013

bus_space_read_1(pcmh.memt, pcmh.memh, offset + 0) |

sys/dev/pcmcia/if_ne_pcmcia.c

1014

bus_space_read_1(pcmh.memt, pcmh.memh, offset + 2) << 8,

sys/dev/pcmcia/if_ne_pcmcia.c

1017

bus_space_write_1(pcmh.memt, pcmh.memh, offset,

sys/dev/pcmcia/if_ne_pcmcia.c

1019

bus_space_write_1(pcmh.memt, pcmh.memh, offset + 2,

sys/dev/pcmcia/if_ne_pcmcia.c

1022

printf(" 0x%x", bus_space_read_1(pcmh.memt, pcmh.memh, offset + 0) |

sys/dev/pcmcia/if_ne_pcmcia.c

1023

bus_space_read_1(pcmh.memt, pcmh.memh, offset + 2) << 8);

sys/dev/pcmcia/if_ne_pcmcia.c

929

bus_size_t offset;

sys/dev/pcmcia/if_ne_pcmcia.c

942

ETHER_ADDR_LEN * 2, &pcmh, &offset, &mwindow)) {

sys/dev/pcmcia/if_ne_pcmcia.c

949

offset + (j * 2));

sys/dev/pcmcia/if_ne_pcmcia.c

995

bus_size_t offset;

sys/dev/pcmcia/if_xe.c

1039

bus_size_t offset = sc->sc_offset;

sys/dev/pcmcia/if_xe.c

1064

space = bus_space_read_2(bst, bsh, offset + TSO0) & 0x7fff;

sys/dev/pcmcia/if_xe.c

1086

bus_space_write_2(bst, bsh, offset + TSO2, (u_int16_t)len + pad + 2);

sys/dev/pcmcia/if_xe.c

1087

bus_space_write_2(bst, bsh, offset + EDP, (u_int16_t)len + pad);

sys/dev/pcmcia/if_xe.c

1090

bus_space_write_raw_multi_2(bst, bsh, offset + EDP,

sys/dev/pcmcia/if_xe.c

1093

bus_space_write_1(bst, bsh, offset + EDP,

sys/dev/pcmcia/if_xe.c

1099

bus_space_write_1(bst, bsh, offset + CR, TX_PKT | ENABLE_INT);

sys/dev/pcmcia/if_xe.c

1102

bus_space_write_2(bst, bsh, offset + EDP, 0);

sys/dev/pcmcia/if_xe.c

1104

bus_space_write_1(bst, bsh, offset + EDP, 0);

sys/dev/pcmcia/if_xe.c

1199

bus_size_t offset = sc->sc_offset;

sys/dev/pcmcia/if_xe.c

1208

bus_space_write_1(bst, bsh, offset + IA + i,

sys/dev/pcmcia/if_xe.c

1231

bus_space_write_1(bst, bsh, offset + pos,

sys/dev/pcmcia/if_xe.c

1250

bus_size_t offset = sc->sc_offset;

sys/dev/pcmcia/if_xe.c

1254

bus_space_write_1(bst, bsh, offset + GP1, 0);

sys/dev/pcmcia/if_xe.c

1257

bus_space_write_1(bst, bsh, offset + GP1, POWER_UP);

sys/dev/pcmcia/if_xe.c

1260

bus_space_write_1(bst, bsh, offset + GP1, POWER_UP | 4);

sys/dev/pcmcia/if_xe.c

1269

bus_size_t offset = sc->sc_offset;

sys/dev/pcmcia/if_xe.c

1273

bus_space_write_1(bst, bsh, offset + CR, SOFT_RESET);

sys/dev/pcmcia/if_xe.c

1275

bus_space_write_1(bst, bsh, offset + CR, 0);

sys/dev/pcmcia/if_xe.c

1283

bus_space_write_1(bst, bsh, offset + GP0,

sys/dev/pcmcia/if_xe.c

1289

sc->sc_rev = bus_space_read_1(bst, bsh, offset + BV) &

sys/dev/pcmcia/if_xe.c

1299

bus_space_write_1(bst, bsh, offset + GP0, GP1_OUT);

sys/dev/pcmcia/if_xe.c

1305

bus_space_write_1(bst, bsh, offset + IMR0,

sys/dev/pcmcia/if_xe.c

1309

bus_space_write_1(bst, bsh, offset + IMR0, 0xff);

sys/dev/pcmcia/if_xe.c

1313

bus_space_write_1(bst, bsh, offset + IMR1, 1);

sys/dev/pcmcia/if_xe.c

1321

bus_space_write_1(bst, bsh, offset + SWC0, 0x20);

sys/dev/pcmcia/if_xe.c

1328

bus_space_write_2(bst, bsh, offset + RBS0, 0x2000);

sys/dev/pcmcia/if_xe.c

1338

bus_space_write_2(bst, bsh, offset + DO0, DO_CHG_OFFSET);

sys/dev/pcmcia/if_xe.c

1342

bus_space_write_1(bst, bsh, offset + RX0MSK,

sys/dev/pcmcia/if_xe.c

1344

bus_space_write_1(bst, bsh, offset + TX0MSK,

sys/dev/pcmcia/if_xe.c

1349

bus_space_write_1(bst, bsh, offset + TX1MSK, 0xb0);

sys/dev/pcmcia/if_xe.c

1350

bus_space_write_1(bst, bsh, offset + RXST0, 0);

sys/dev/pcmcia/if_xe.c

1351

bus_space_write_1(bst, bsh, offset + TXST0, 0);

sys/dev/pcmcia/if_xe.c

1352

bus_space_write_1(bst, bsh, offset + TXST1, 0);

sys/dev/pcmcia/if_xe.c

1357

bus_space_write_1(bst, bsh, offset + MSR,

sys/dev/pcmcia/if_xe.c

1358

bus_space_read_1(bst, bsh, offset + MSR) | SELECT_MII);

sys/dev/pcmcia/if_xe.c

1365

bus_space_write_1(bst, bsh, offset + SWC1, SWC1_AUTO_MEDIA);

sys/dev/pcmcia/if_xe.c

1375

bus_space_write_1(bst, bsh, offset + LED,

sys/dev/pcmcia/if_xe.c

1378

bus_space_write_1(bst, bsh, offset + LED3,

sys/dev/pcmcia/if_xe.c

1383

bus_space_write_1(bst, bsh, offset + CMD0, ENABLE_RX | ONLINE);

sys/dev/pcmcia/if_xe.c

1388

bus_space_write_1(bst, bsh, offset + IMR0, 0xff);

sys/dev/pcmcia/if_xe.c

1391

bus_space_write_1(bst, bsh, offset + IMR1, 1);

sys/dev/pcmcia/if_xe.c

1396

bus_space_write_1(bst, bsh, offset + CR, ENABLE_INT);

sys/dev/pcmcia/if_xe.c

1400

if ((bus_space_read_1(bst, bsh, offset + 0x10) & 0x01) == 0)

sys/dev/pcmcia/if_xe.c

1402

bus_space_write_1(bst, bsh, offset + 0x10, 0x11);

sys/dev/pcmcia/if_xe.c

1421

bus_size_t offset = sc->sc_offset;

sys/dev/pcmcia/if_xe.c

1425

printf(" %2.2x", bus_space_read_1(bst, bsh, offset + i));

sys/dev/pcmcia/if_xe.c

1434

bus_space_read_1(bst, bsh, offset + i));

sys/dev/pcmcia/if_xe.c

1447

bus_space_read_1(bst, bsh, offset + i));

sys/dev/pcmcia/if_xe.c

826

bus_size_t offset = sc->sc_offset;

sys/dev/pcmcia/if_xe.c

829

bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW);

sys/dev/pcmcia/if_xe.c

833

bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH);

sys/dev/pcmcia/if_xe.c

844

bus_size_t offset = sc->sc_offset;

sys/dev/pcmcia/if_xe.c

848

bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_LOW);

sys/dev/pcmcia/if_xe.c

852

bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_HIGH);

sys/dev/pcmcia/if_xe.c

863

bus_size_t offset = sc->sc_offset;

sys/dev/pcmcia/if_xe.c

867

bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW);

sys/dev/pcmcia/if_xe.c

871

x = bus_space_read_1(bst, bsh, offset + GP2) & MDIO;

sys/dev/pcmcia/if_xe.c

872

bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH);

sys/dev/pcmcia/pcmcia.c

585

pcmcia_io_map(struct pcmcia_function *pf, int width, bus_addr_t offset,

sys/dev/pcmcia/pcmcia.c

591

width, offset, size, pcihp, windowp))

sys/dev/pcmcia/pcmcia_cis.c

249

int16_t offset;

sys/dev/pcmcia/pcmcia_cis.c

254

*((u_int16_t *) & offset) =

sys/dev/pcmcia/pcmcia_cis.c

259

addr = tuple.ptr + offset;

sys/dev/pv/hyperv.c

1521

uint32_t offset)

sys/dev/pv/hyperv.c

1534

if (offset) {

sys/dev/pv/hyperv.c

1535

rrd->rd_cons += offset;

sys/dev/pv/hyperv.c

1554

uint32_t offset, pktlen;

sys/dev/pv/hyperv.c

1566

offset = raw ? 0 : VMBUS_CHANPKT_GETLEN(cph.cph_hlen);

sys/dev/pv/hyperv.c

1567

pktlen = VMBUS_CHANPKT_GETLEN(cph.cph_tlen) - offset;

sys/dev/pv/hyperv.c

1574

rv = hv_ring_read(&ch->ch_rrd, data, pktlen, offset);

sys/dev/pv/if_vio.c

473

size_t allocsize, rxqsize, txqsize, offset = 0;

sys/dev/pv/if_vio.c

506

(struct virtio_net_hdr *)(kva + offset);

sys/dev/pv/if_vio.c

507

offset += sizeof(struct virtio_net_hdr) * txqsize;

sys/dev/pv/if_vio.c

511

sc->sc_ctrl_cmd = (void *)(kva + offset);

sys/dev/pv/if_vio.c

512

offset += sizeof(*sc->sc_ctrl_cmd);

sys/dev/pv/if_vio.c

513

sc->sc_ctrl_status = (void *)(kva + offset);

sys/dev/pv/if_vio.c

514

offset += sizeof(*sc->sc_ctrl_status);

sys/dev/pv/if_vio.c

515

sc->sc_ctrl_rx = (void *)(kva + offset);

sys/dev/pv/if_vio.c

516

offset += sizeof(*sc->sc_ctrl_rx);

sys/dev/pv/if_vio.c

517

sc->sc_ctrl_mq_pairs = (void *)(kva + offset);

sys/dev/pv/if_vio.c

518

offset += sizeof(*sc->sc_ctrl_mq_pairs);

sys/dev/pv/if_vio.c

519

sc->sc_ctrl_guest_offloads = (void *)(kva + offset);

sys/dev/pv/if_vio.c

520

offset += sizeof(*sc->sc_ctrl_guest_offloads);

sys/dev/pv/if_vio.c

521

sc->sc_ctrl_mac_tbl_uc = (void *)(kva + offset);

sys/dev/pv/if_vio.c

522

offset += sizeof(*sc->sc_ctrl_mac_tbl_uc) +

sys/dev/pv/if_vio.c

524

sc->sc_ctrl_mac_tbl_mc = (void *)(kva + offset);

sys/dev/pv/if_vio.c

525

offset += sizeof(*sc->sc_ctrl_mac_tbl_mc) +

sys/dev/pv/if_vio.c

528

KASSERT(offset == allocsize);

sys/dev/pv/if_xnf.c

756

int i, flags, len, offset;

sys/dev/pv/if_xnf.c

768

offset = rxd->rxd_rsp.rxp_offset;

sys/dev/pv/if_xnf.c

792

if (len < 0 || (len + offset > PAGE_SIZE)) {

sys/dev/pv/if_xnf.c

799

m->m_data += offset;

sys/dev/pv/viogpu.c

617

wdf->offset = 0;

sys/dev/pv/viogpu.h

205

__le64 offset;

sys/dev/pv/viogpu.h

252

__le64 offset;

sys/dev/pv/viogpu.h

428

__le64 offset;

sys/dev/pv/virtio.c

261

int offset = vq->vq_indirectoffset +

sys/dev/pv/virtio.c

264

bus_dmamap_sync(sc->sc_dmat, vq->vq_dmamap, offset,

sys/dev/sbus/agten.c

240

wdf->offset = 0;

sys/dev/sbus/agten.c

286

agten_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/agten.c

290

if (offset & PGOFSET)

sys/dev/sbus/agten.c

294

if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {

sys/dev/sbus/agten.c

296

sc->sc_physoffset + offset, prot, BUS_SPACE_MAP_LINEAR));

sys/dev/sbus/bwtwo.c

220

wdf->offset = 0;

sys/dev/sbus/bwtwo.c

248

bwtwo_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/bwtwo.c

252

if (offset & PGOFSET)

sys/dev/sbus/bwtwo.c

255

if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize)

sys/dev/sbus/bwtwo.c

257

BWTWO_VID_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));

sys/dev/sbus/cgsix.c

274

wdf->offset = 0;

sys/dev/sbus/cgthree.c

286

wdf->offset = 0;

sys/dev/sbus/cgthree.c

328

cgthree_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/cgthree.c

332

if (offset & PGOFSET || offset < 0)

sys/dev/sbus/cgthree.c

337

if (offset >= NOOVERLAY)

sys/dev/sbus/cgthree.c

338

offset -= NOOVERLAY;

sys/dev/sbus/cgthree.c

339

else if (offset >= START)

sys/dev/sbus/cgthree.c

340

offset -= START;

sys/dev/sbus/cgthree.c

342

offset = 0;

sys/dev/sbus/cgthree.c

343

if (offset >= sc->sc_sunfb.sf_fbsize)

sys/dev/sbus/cgthree.c

346

CGTHREE_VID_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));

sys/dev/sbus/cgthree.c

348

if (offset < sc->sc_sunfb.sf_fbsize)

sys/dev/sbus/cgthree.c

350

CGTHREE_VID_OFFSET + offset, prot,

sys/dev/sbus/cgtwelve.c

283

wdf->offset = 0;

sys/dev/sbus/cgtwelve.c

425

cgtwelve_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/cgtwelve.c

429

if (offset & PGOFSET || offset < 0)

sys/dev/sbus/cgtwelve.c

436

if (offset < sc->sc_sunfb.sf_fbsize * 32) {

sys/dev/sbus/cgtwelve.c

437

return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr, offset,

sys/dev/sbus/mgx.c

363

wdf->offset = 0;

sys/dev/sbus/mgx.c

396

mgx_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/mgx.c

400

if (offset & PGOFSET)

sys/dev/sbus/mgx.c

404

if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {

sys/dev/sbus/mgx.c

406

offset, prot, BUS_SPACE_MAP_LINEAR));

sys/dev/sbus/qec.c

226

bus_addr_t offset = BUS_ADDR_PADDR(addr);

sys/dev/sbus/qec.c

241

(t, t0, offset, size, flags, hp));

sys/dev/sbus/qec.c

252

paddr = sc->sc_range[i].poffset + offset;

sys/dev/sbus/rfx.c

325

wdf->offset = 0;

sys/dev/sbus/rfx.c

358

rfx_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/rfx.c

362

if (offset & PGOFSET)

sys/dev/sbus/rfx.c

365

if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {

sys/dev/sbus/rfx.c

367

RFX_VRAM_ADDR + offset, prot, BUS_SPACE_MAP_LINEAR));

sys/dev/sbus/rfx.c

475

u_int32_t *data, offset, value;

sys/dev/sbus/rfx.c

502

offset = *data++;

sys/dev/sbus/rfx.c

505

if (offset == (u_int32_t)-1 && value == (u_int32_t)-1)

sys/dev/sbus/rfx.c

510

offset = letoh32(offset);

sys/dev/sbus/rfx.c

511

value = letoh32(offset);

sys/dev/sbus/rfx.c

514

if (offset & (1U << 31)) {

sys/dev/sbus/rfx.c

515

offset = (offset & ~(1U << 31)) - RFX_RAMDAC_ADDR;

sys/dev/sbus/rfx.c

516

if (offset < RFX_RAMDAC_SIZE)

sys/dev/sbus/rfx.c

517

sc->sc_ramdac[offset] = value >> 24;

sys/dev/sbus/rfx.c

519

offset -= RFX_CONTROL_ADDR;

sys/dev/sbus/rfx.c

520

if (offset < RFX_CONTROL_SIZE)

sys/dev/sbus/rfx.c

521

sc->sc_ctrl[offset >> 2] = value;

sys/dev/sbus/sbusvar.h

100

#define sbus_bus_map(t, slot, offset, sz, flags, unused, hp) \

sys/dev/sbus/sbusvar.h

101

bus_space_map(t, BUS_ADDR(slot, offset), sz, flags, hp)

sys/dev/sbus/stp4020.c

653

stp4020_chip_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset,

sys/dev/sbus/stp4020.c

660

offset, size, &pcihp->ioh);

sys/dev/sbus/tvtwo.c

317

wdf->offset = 0;

sys/dev/sbus/tvtwo.c

362

tvtwo_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/tvtwo.c

366

if (offset & PGOFSET)

sys/dev/sbus/tvtwo.c

370

if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize * 4) {

sys/dev/sbus/tvtwo.c

372

PX_PLANE24_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));

sys/dev/sbus/vigra.c

334

wdf->offset = 0;

sys/dev/sbus/vigra.c

380

vigra_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/vigra.c

384

if (offset & PGOFSET)

sys/dev/sbus/vigra.c

387

if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {

sys/dev/sbus/vigra.c

389

offset, prot, BUS_SPACE_MAP_LINEAR));

sys/dev/sbus/zx.c

332

wdf->offset = 0;

sys/dev/sbus/zx.c

366

zx_mmap(void *v, off_t offset, int prot)

sys/dev/sbus/zx.c

370

if (offset & PGOFSET)

sys/dev/sbus/zx.c

374

if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {

sys/dev/sbus/zx.c

376

ZX_OFF_SS0 + offset, prot, BUS_SPACE_MAP_LINEAR));

sys/dev/sdmmc/sdhc.c

160

sdhc_read_1(struct sdhc_host *hp, bus_size_t offset)

sys/dev/sdmmc/sdhc.c

165

reg = bus_space_read_4(hp->iot, hp->ioh, offset & ~3);

sys/dev/sdmmc/sdhc.c

166

return (reg >> ((offset & 3) * 8)) & 0xff;

sys/dev/sdmmc/sdhc.c

169

return bus_space_read_1(hp->iot, hp->ioh, offset);

sys/dev/sdmmc/sdhc.c

173

sdhc_read_2(struct sdhc_host *hp, bus_size_t offset)

sys/dev/sdmmc/sdhc.c

178

reg = bus_space_read_4(hp->iot, hp->ioh, offset & ~2);

sys/dev/sdmmc/sdhc.c

179

return (reg >> ((offset & 2) * 8)) & 0xffff;

sys/dev/sdmmc/sdhc.c

182

return bus_space_read_2(hp->iot, hp->ioh, offset);

sys/dev/sdmmc/sdhc.c

186

sdhc_write_1(struct sdhc_host *hp, bus_size_t offset, uint8_t value)

sys/dev/sdmmc/sdhc.c

191

reg = bus_space_read_4(hp->iot, hp->ioh, offset & ~3);

sys/dev/sdmmc/sdhc.c

192

reg &= ~(0xff << ((offset & 3) * 8));

sys/dev/sdmmc/sdhc.c

193

reg |= (value << ((offset & 3) * 8));

sys/dev/sdmmc/sdhc.c

194

bus_space_write_4(hp->iot, hp->ioh, offset & ~3, reg);

sys/dev/sdmmc/sdhc.c

198

bus_space_write_1(hp->iot, hp->ioh, offset, value);

sys/dev/sdmmc/sdhc.c

202

sdhc_write_2(struct sdhc_host *hp, bus_size_t offset, uint16_t value)

sys/dev/sdmmc/sdhc.c

207

switch (offset) {

sys/dev/sdmmc/sdhc.c

225

reg = bus_space_read_4(hp->iot, hp->ioh, offset & ~2);

sys/dev/sdmmc/sdhc.c

226

reg &= ~(0xffff << ((offset & 2) * 8));

sys/dev/sdmmc/sdhc.c

227

reg |= (value << ((offset & 2) * 8));

sys/dev/sdmmc/sdhc.c

228

bus_space_write_4(hp->iot, hp->ioh, offset & ~2, reg);

sys/dev/sdmmc/sdhc.c

232

bus_space_write_2(hp->iot, hp->ioh, offset, value);

sys/dev/softraid_concat.c

103

int64_t lbaoffs, offset;

sys/dev/softraid_concat.c

125

offset = lbaoffs;

sys/dev/softraid_concat.c

132

offset -= chunksize;

sys/dev/softraid_concat.c

148

lbaoffs, chunk, chunkend, offset, length, leftover, data);

sys/dev/softraid_concat.c

150

blkno = offset >> DEV_BSHIFT;

sys/dev/softraid_raid0.c

122

int64_t chunkoffs, lbaoffs, offset, stripoffs;

sys/dev/softraid_raid0.c

146

offset = chunkoffs + stripoffs;

sys/dev/softraid_raid0.c

161

lbaoffs, strip_no, chunk, stripoffs, chunkoffs, offset,

sys/dev/softraid_raid0.c

164

blkno = offset >> DEV_BSHIFT;

sys/dev/softraid_raid0.c

182

offset += length;

sys/dev/softraid_raid0.c

184

offset -= stripoffs;

sys/dev/softraid_raid5.c

377

int64_t chunk_offs, lbaoffs, offset, strip_offs;

sys/dev/softraid_raid5.c

418

offset = chunk_offs + strip_offs;

sys/dev/softraid_raid5.c

432

lba = offset >> DEV_BSHIFT;

sys/dev/softraid_raid6.c

378

int64_t chunk_offs, lbaoffs, offset, strip_offs;

sys/dev/softraid_raid6.c

411

offset = chunk_offs + strip_offs;

sys/dev/softraid_raid6.c

429

lba = offset >> DEV_BSHIFT;

sys/dev/tc/zs_ioasic.c

790

zs_ioasic_isconsole(tc_offset_t offset, int channel)

sys/dev/tc/zs_ioasic.c

793

offset == zs_ioasic_console_offset &&

sys/dev/usb/dwc2/dwc2_core.c

952

int dwc2_hsotg_wait_bit_set(struct dwc2_hsotg *hsotg, u32 offset, u32 mask,

sys/dev/usb/dwc2/dwc2_core.c

958

if (dwc2_readl(hsotg, offset) & mask)

sys/dev/usb/dwc2/dwc2_core.c

975

int dwc2_hsotg_wait_bit_clear(struct dwc2_hsotg *hsotg, u32 offset, u32 mask,

sys/dev/usb/dwc2/dwc2_core.c

981

if (!(dwc2_readl(hsotg, offset) & mask))

sys/dev/usb/dwc2/dwc2_core.h

1276

pr_info("info:: wrote %08x to %p\n", value, hsotg->regs + offset);

sys/dev/usb/dwc2/dwc2_core.h

1280

static inline void dwc2_readl_rep(struct dwc2_hsotg *hsotg, u32 offset,

sys/dev/usb/dwc2/dwc2_core.h

1287

u32 x = dwc2_readl(hsotg, offset);

sys/dev/usb/dwc2/dwc2_core.h

1293

static inline void dwc2_writel_rep(struct dwc2_hsotg *hsotg, u32 offset,

sys/dev/usb/dwc2/dwc2_core.h

1300

dwc2_writel(hsotg, *buf++, offset);

sys/dev/usb/dwc2/dwc2_hcd.c

2465

chan->xfer_dma += frame_desc->offset +

sys/dev/usb/dwc2/dwc2_hcd.c

2469

chan->xfer_buf += frame_desc->offset +

sys/dev/usb/dwc2/dwc2_hcd.c

4761

urb->iso_frame_desc[i].offset,

sys/dev/usb/dwc2/dwc2_hcd.c

4890

urb->iso_frame_desc[i].offset,

sys/dev/usb/dwc2/dwc2_hcd.h

183

u32 offset;

sys/dev/usb/dwc2/dwc2_hcd.h

731

struct dwc2_hcd_urb *dwc2_urb, int desc_num, u32 offset,

sys/dev/usb/dwc2/dwc2_hcd.h

734

dwc2_urb->iso_descs[desc_num].offset = offset;

sys/dev/usb/dwc2/dwc2_hcdddma.c

567

dma_desc->buf = (u32)(DMAADDR(qtd->urb->usbdma, frame_desc->offset));

sys/dev/usb/dwc2/dwc2_hcdddma.c

916

dma_desc->buf = (u32)(DMAADDR(qtd->urb->usbdma, frame_desc->offset));

sys/dev/usb/dwc2/dwc2_hcdintr.c

978

memcpy(qtd->urb->buf + frame_desc->offset +

sys/dev/usb/if_mtw.c

661

uint32_t offset)

sys/dev/usb/if_mtw.c

671

if (sc->asic_ver == 0x7612 && offset >= 0x90000)

sys/dev/usb/if_mtw.c

697

mtw_write_cfg(sc, MTW_MCU_DMA_ADDR, offset + sent);

sys/dev/usb/if_otus.c

1725

uint32_t tmp, offset;

sys/dev/usb/if_otus.c

1733

offset = 2 * 0x1000;

sys/dev/usb/if_otus.c

1742

otus_write(sc, AR_PHY_SWITCH_CHAIN_0 + offset, tmp);

sys/dev/usb/if_otus.c

1775

tmp = otus_phy_get_def(sc, AR_PHY_RXGAIN + offset);

sys/dev/usb/if_otus.c

1778

otus_write(sc, AR_PHY_RXGAIN + offset, tmp);

sys/dev/usb/if_otus.c

1789

tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ + offset);

sys/dev/usb/if_otus.c

1792

otus_write(sc, AR_PHY_GAIN_2GHZ + offset, tmp);

sys/dev/usb/if_otus.c

1799

tmp = otus_phy_get_def(sc, AR_PHY_TIMING_CTRL4 + offset);

sys/dev/usb/if_otus.c

1802

otus_write(sc, AR_PHY_TIMING_CTRL4 + offset, tmp);

sys/dev/usb/if_rum.c

1420

int offset;

sys/dev/usb/if_rum.c

1427

for (offset = 0; offset < len; offset += 64) {

sys/dev/usb/if_rum.c

1428

USETW(req.wIndex, reg + offset);

sys/dev/usb/if_rum.c

1429

USETW(req.wLength, MIN(len - offset, 64));

sys/dev/usb/if_rum.c

1431

error = usbd_do_request(sc->sc_udev, &req, buf + offset);

sys/dev/usb/if_rumreg.h

196

uint8_t offset;

sys/dev/usb/if_rumreg.h

214

uint8_t offset;

sys/dev/usb/if_uaq.c

1090

int count, offset;

sys/dev/usb/if_uaq.c

1127

offset = total_len - ((count + 1) * sizeof(desc));

sys/dev/usb/if_uaq.c

1128

if (offset != ((desc & UAQ_RX_HDR_OFFSET_MASK) >>

sys/dev/usb/if_uaq.c

1131

sc->sc_dev.dv_xname, offset,

sys/dev/usb/if_uaq.c

1135

if (offset < 0 || offset > total_len) {

sys/dev/usb/if_uaq.c

1137

sc->sc_dev.dv_xname, offset, total_len);

sys/dev/usb/if_uaq.c

1141

pdesc = (uint64_t *)(buf + offset);

sys/dev/usb/if_uaq.c

1142

total_len = offset;

sys/dev/usb/if_udav.c

352

udav_mem_read(struct udav_softc *sc, int offset, void *buf, int len)

sys/dev/usb/if_udav.c

366

offset &= 0xffff;

sys/dev/usb/if_udav.c

372

USETW(req.wIndex, offset);

sys/dev/usb/if_udav.c

381

sc->sc_dev.dv_xname, __func__, offset, err));

sys/dev/usb/if_udav.c

389

udav_mem_write(struct udav_softc *sc, int offset, void *buf, int len)

sys/dev/usb/if_udav.c

403

offset &= 0xffff;

sys/dev/usb/if_udav.c

409

USETW(req.wIndex, offset);

sys/dev/usb/if_udav.c

418

sc->sc_dev.dv_xname, __func__, offset, err));

sys/dev/usb/if_udav.c

426

udav_mem_write1(struct udav_softc *sc, int offset, unsigned char ch)

sys/dev/usb/if_udav.c

440

offset &= 0xffff;

sys/dev/usb/if_udav.c

445

USETW(req.wIndex, offset);

sys/dev/usb/if_udav.c

454

sc->sc_dev.dv_xname, __func__, offset, err));

sys/dev/usb/if_udav.c

463

udav_csr_read(struct udav_softc *sc, int offset, void *buf, int len)

sys/dev/usb/if_udav.c

477

offset &= 0xff;

sys/dev/usb/if_udav.c

483

USETW(req.wIndex, offset);

sys/dev/usb/if_udav.c

492

sc->sc_dev.dv_xname, __func__, offset, err));

sys/dev/usb/if_udav.c

500

udav_csr_write(struct udav_softc *sc, int offset, void *buf, int len)

sys/dev/usb/if_udav.c

514

offset &= 0xff;

sys/dev/usb/if_udav.c

520

USETW(req.wIndex, offset);

sys/dev/usb/if_udav.c

529

sc->sc_dev.dv_xname, __func__, offset, err));

sys/dev/usb/if_udav.c

536

udav_csr_read1(struct udav_softc *sc, int offset)

sys/dev/usb/if_udav.c

546

return (udav_csr_read(sc, offset, &val, 1) ? 0 : val);

sys/dev/usb/if_udav.c

551

udav_csr_write1(struct udav_softc *sc, int offset, unsigned char ch)

sys/dev/usb/if_udav.c

565

offset &= 0xff;

sys/dev/usb/if_udav.c

570

USETW(req.wIndex, offset);

sys/dev/usb/if_udav.c

579

sc->sc_dev.dv_xname, __func__, offset, err));

sys/dev/usb/if_upgt.c

1645

uint16_t eeprom_offset = letoh16(eeprom->offset);

sys/dev/usb/if_upgt.c

620

int offset, bra_end = 0;

sys/dev/usb/if_upgt.c

625

for (offset = 0; offset < sc->sc_fw_size; offset += sizeof(*uc)) {

sys/dev/usb/if_upgt.c

626

uc = (uint32_t *)(sc->sc_fw + offset);

sys/dev/usb/if_upgt.c

630

for (; offset < sc->sc_fw_size; offset += sizeof(*uc)) {

sys/dev/usb/if_upgt.c

631

uc = (uint32_t *)(sc->sc_fw + offset);

sys/dev/usb/if_upgt.c

635

if (offset == sc->sc_fw_size) {

sys/dev/usb/if_upgt.c

641

sc->sc_dev.dv_xname, offset);

sys/dev/usb/if_upgt.c

646

while (offset < sc->sc_fw_size && bra_end == 0) {

sys/dev/usb/if_upgt.c

648

bra_option = (struct upgt_fw_bra_option *)(sc->sc_fw + offset);

sys/dev/usb/if_upgt.c

721

offset += sizeof(struct upgt_fw_bra_option) + bra_option_len;

sys/dev/usb/if_upgt.c

735

int offset, bsize, n, i, len;

sys/dev/usb/if_upgt.c

763

for (offset = 0; offset < sc->sc_fw_size; offset += bsize) {

sys/dev/usb/if_upgt.c

764

if (sc->sc_fw_size - offset > UPGT_FW_BLOCK_SIZE)

sys/dev/usb/if_upgt.c

767

bsize = sc->sc_fw_size - offset;

sys/dev/usb/if_upgt.c

769

n = upgt_fw_copy(sc->sc_fw + offset, data_cmd->buf, bsize);

sys/dev/usb/if_upgt.c

772

sc->sc_dev.dv_xname, offset, n, bsize);

sys/dev/usb/if_upgt.c

860

int offset, block, len;

sys/dev/usb/if_upgt.c

862

offset = 0;

sys/dev/usb/if_upgt.c

864

while (offset < UPGT_EEPROM_SIZE) {

sys/dev/usb/if_upgt.c

866

sc->sc_dev.dv_xname, offset, block);

sys/dev/usb/if_upgt.c

888

eeprom->offset = htole16(offset);

sys/dev/usb/if_upgt.c

909

offset += block;

sys/dev/usb/if_upgt.c

910

if (UPGT_EEPROM_SIZE - offset < block)

sys/dev/usb/if_upgt.c

911

block = UPGT_EEPROM_SIZE - offset;

sys/dev/usb/if_upgtvar.h

243

uint16_t offset;

sys/dev/usb/if_url.c

353

url_mem(struct url_softc *sc, int cmd, int offset, void *buf, int len)

sys/dev/usb/if_url.c

372

USETW(req.wValue, offset);

sys/dev/usb/if_url.c

384

offset, err));

sys/dev/usb/if_urndis.c

819

int offset;

sys/dev/usb/if_urndis.c

822

offset = 0;

sys/dev/usb/if_urndis.c

825

msg = (struct rndis_packet_msg *)((char*)c->sc_buf + offset);

sys/dev/usb/if_urndis.c

911

offset += letoh32(msg->rm_len);

sys/dev/usb/udl.c

1234

uint16_t offset;

sys/dev/usb/udl.c

1237

offset = 0;

sys/dev/usb/udl.c

1240

UDL_CTRL_CMD_READ_EDID, 0x00a1, (offset << 8), lbuf, 64);

sys/dev/usb/udl.c

1243

bcopy(lbuf + 1, buf + offset, 63);

sys/dev/usb/udl.c

1244

offset += 63;

sys/dev/usb/udl.c

1247

UDL_CTRL_CMD_READ_EDID, 0x00a1, (offset << 8), lbuf, 64);

sys/dev/usb/udl.c

1250

bcopy(lbuf + 1, buf + offset, 63);

sys/dev/usb/udl.c

1251

offset += 63;

sys/dev/usb/udl.c

1254

UDL_CTRL_CMD_READ_EDID, 0x00a1, (offset << 8), lbuf, 3);

sys/dev/usb/udl.c

1257

bcopy(lbuf + 1, buf + offset, 2);

sys/dev/usb/udl.c

531

wdf->offset = 0;

sys/dev/usb/ulpt.c

660

int offset = 0, remain;

sys/dev/usb/ulpt.c

687

memcpy(bufp, &ucode[offset], len);

sys/dev/usb/ulpt.c

700

offset += len;

sys/dev/usb/uoak_subr.c

345

uoak_sensor_refresh(struct uoak_sensor *s, int mag, int offset)

sys/dev/usb/uoak_subr.c

350

s->avg.value = s->vavg * mag + offset;

sys/dev/usb/uoak_subr.c

351

s->max.value = s->vmax * mag + offset;

sys/dev/usb/uoak_subr.c

352

s->min.value = s->vmin * mag + offset;

sys/dev/usb/uoakv.c

283

sc->sc_sensor[ch].offset[target] = result;

sys/dev/usb/uoakv.c

334

sc->sc_sensor[i].offset[target] / 100,

sys/dev/usb/uoakv.c

335

sc->sc_sensor[i].offset[target] % 100);

sys/dev/usb/uoakv.c

51

unsigned int offset[OAK_V_TARGET_MAX]; /* absolute offset (mV) */

sys/dev/usb/usb_mem.c

264

usb_syncmem(struct usb_dma *p, bus_addr_t offset, bus_size_t len, int ops)

sys/dev/usb/usb_mem.c

266

bus_dmamap_sync(p->block->tag, p->block->map, p->offs + offset,

sys/dev/usb/utvfu.c

1683

sc->sc_mmap[i].v4l2_buf.m.offset = i * sc->sc_max_frame_sz;

sys/dev/usb/utvfu.c

1694

sc->sc_mmap[i].v4l2_buf.m.offset,

sys/dev/usb/utvfu.c

1720

DEVNAME(sc), __func__, qb->index, qb->m.offset, qb->length);

sys/dev/usb/uvideo.c

2146

fb->offset = 0;

sys/dev/usb/uvideo.c

2580

fb->offset = 0;

sys/dev/usb/uvideo.c

2590

fb->offset = 0;

sys/dev/usb/uvideo.c

2613

if (sample_len > fb->buf_size - fb->offset) {

sys/dev/usb/uvideo.c

2616

sample_len = fb->buf_size - fb->offset;

sys/dev/usb/uvideo.c

2620

bcopy(frame + sh->bLength, buf + fb->offset, sample_len);

sys/dev/usb/uvideo.c

2621

fb->offset += sample_len;

sys/dev/usb/uvideo.c

2627

DEVNAME(sc), __func__, fb->offset);

sys/dev/usb/uvideo.c

2629

if (fb->offset < fb->buf_size &&

sys/dev/usb/uvideo.c

2639

uvideo_mmap_queue(sc, fb->offset, fb->error);

sys/dev/usb/uvideo.c

2645

uvideo_read(sc, fb->buf, fb->offset);

sys/dev/usb/uvideo.c

2696

uvideo_mmap_queue(sc, fb->offset, 0);

sys/dev/usb/uvideo.c

2699

uvideo_read(sc, fb->buf, fb->offset);

sys/dev/usb/uvideo.c

2701

fb->offset = 0;

sys/dev/usb/uvideo.c

2716

(fb->offset + sample_len) <= fb->buf_size) {

sys/dev/usb/uvideo.c

2717

bcopy(frame, buf + fb->offset, sample_len);

sys/dev/usb/uvideo.c

2718

fb->offset += sample_len;

sys/dev/usb/uvideo.c

3996

sc->sc_mmap[i].v4l2_buf.m.offset = i * buf_size;

sys/dev/usb/uvideo.c

4007

sc->sc_mmap[i].v4l2_buf.m.offset,

sys/dev/usb/uvideo.c

4038

qb->m.offset,

sys/dev/usb/uvideo.c

4459

int offset = 0, remain;

sys/dev/usb/uvideo.c

4493

len = ucode[offset];

sys/dev/usb/uvideo.c

4494

addr = ucode[offset + 1] | (ucode[offset + 2] << 8);

sys/dev/usb/uvideo.c

4495

offset += 3;

sys/dev/usb/uvideo.c

4499

0xa0, addr, &ucode[offset], len);

sys/dev/usb/uvideo.c

4509

offset += len;

sys/dev/usb/uvideo.h

651

int offset;

sys/dev/usb/xhcivar.h

137

xhci_read_1(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t offset)

sys/dev/usb/xhcivar.h

140

reg = bus_space_read_4(iot, ioh, offset & ~3);

sys/dev/usb/xhcivar.h

141

return (reg >> ((offset & 3) * 8)) & 0xff;

sys/dev/usb/xhcivar.h

145

xhci_read_2(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t offset)

sys/dev/usb/xhcivar.h

148

reg = bus_space_read_4(iot, ioh, offset & ~2);

sys/dev/usb/xhcivar.h

149

return (reg >> ((offset & 2) * 8)) & 0xffff;

sys/dev/video.c

398

bzero(sc->sc_fbuffer_mmap + vb->m.offset, vb->length);

sys/dev/wscons/wsconsio.h

474

u_int offset; /* first pixel offset (bytes) */

sys/dev/wscons/wsdisplay.c

1404

wsdisplaymmap(dev_t dev, off_t offset, int prot)

sys/dev/wscons/wsdisplay.c

1419

return ((*sc->sc_accessops->mmap)(sc->sc_accesscookie, offset, prot));

sys/dev/wscons/wsdisplay.c

2868

skip_char_right(struct wsscreen *scr, u_int offset)

sys/dev/wscons/wsdisplay.c

2872

u_int current = offset;

sys/dev/wscons/wsdisplay.c

2894

skip_char_left(struct wsscreen *scr, u_int offset)

sys/dev/wscons/wsdisplay.c

2898

u_int current = offset;

sys/dev/wscons/wstpad.c

1575

int width, height, diag, offset, h_res, v_res, h_unit, v_unit, i;

sys/dev/wscons/wstpad.c

1655

offset = width * tp->params.left_edge / 4096;

sys/dev/wscons/wstpad.c

1656

tp->edge.left = (offset ? input->hw.x_min + offset : INT_MIN);

sys/dev/wscons/wstpad.c

1657

offset = width * tp->params.right_edge / 4096;

sys/dev/wscons/wstpad.c

1658

tp->edge.right = (offset ? input->hw.x_max - offset : INT_MAX);

sys/dev/wscons/wstpad.c

1659

offset = height * tp->params.bottom_edge / 4096;

sys/dev/wscons/wstpad.c

1660

tp->edge.bottom = (offset ? input->hw.y_min + offset : INT_MIN);

sys/dev/wscons/wstpad.c

1661

tp->edge.low = tp->edge.bottom + offset / 2;

sys/dev/wscons/wstpad.c

1662

offset = height * tp->params.top_edge / 4096;

sys/dev/wscons/wstpad.c

1663

tp->edge.top = (offset ? input->hw.y_max - offset : INT_MAX);

sys/dev/wscons/wstpad.c

1665

offset = width * abs(tp->params.center_width) / 8192;

sys/dev/wscons/wstpad.c

1667

tp->edge.center_left = tp->edge.center - offset;

sys/dev/wscons/wstpad.c

1668

tp->edge.center_right = tp->edge.center + offset;

sys/dev/x86emu/x86emu.c

1443

int8_t offset;

sys/dev/x86emu/x86emu.c

1446

offset = (int8_t) fetch_byte_imm(emu);

sys/dev/x86emu/x86emu.c

1447

target = (uint16_t) (emu->x86.R_IP + (int16_t) offset);

sys/dev/x86emu/x86emu.c

2518

uint16_t offset;

sys/dev/x86emu/x86emu.c

2520

offset = fetch_word_imm(emu);

sys/dev/x86emu/x86emu.c

2521

emu->x86.R_AL = fetch_data_byte(emu, offset);

sys/dev/x86emu/x86emu.c

2531

uint16_t offset;

sys/dev/x86emu/x86emu.c

2533

offset = fetch_word_imm(emu);

sys/dev/x86emu/x86emu.c

2535

emu->x86.R_EAX = fetch_data_long(emu, offset);

sys/dev/x86emu/x86emu.c

2537

emu->x86.R_AX = fetch_data_word(emu, offset);

sys/dev/x86emu/x86emu.c

2548

uint16_t offset;

sys/dev/x86emu/x86emu.c

2550

offset = fetch_word_imm(emu);

sys/dev/x86emu/x86emu.c

2551

store_data_byte(emu, offset, emu->x86.R_AL);

sys/dev/x86emu/x86emu.c

2561

uint16_t offset;

sys/dev/x86emu/x86emu.c

2563

offset = fetch_word_imm(emu);

sys/dev/x86emu/x86emu.c

2565

store_data_long(emu, offset, emu->x86.R_EAX);

sys/dev/x86emu/x86emu.c

2567

store_data_word(emu, offset, emu->x86.R_AX);

sys/dev/x86emu/x86emu.c

3686

int8_t offset;

sys/dev/x86emu/x86emu.c

3689

offset = (int8_t) fetch_byte_imm(emu);

sys/dev/x86emu/x86emu.c

3690

target = (uint16_t) (emu->x86.R_IP + offset);

sys/dev/x86emu/x86emu.c

3814

int8_t offset;

sys/dev/x86emu/x86emu.c

3816

offset = (int8_t) fetch_byte_imm(emu);

sys/dev/x86emu/x86emu.c

3817

target = (uint16_t) (emu->x86.R_IP + offset);

sys/dev/x86emu/x86emu.c

444

fetch_data_byte(struct x86emu *emu, uint32_t offset)

sys/dev/x86emu/x86emu.c

446

return fetch_byte(emu, get_data_segment(emu), offset);

sys/dev/x86emu/x86emu.c

459

fetch_data_word(struct x86emu *emu, uint32_t offset)

sys/dev/x86emu/x86emu.c

461

return fetch_word(emu, get_data_segment(emu), offset);

sys/dev/x86emu/x86emu.c

47

static uint8_t fetch_data_byte (struct x86emu *, uint32_t offset);

sys/dev/x86emu/x86emu.c

474

fetch_data_long(struct x86emu *emu, uint32_t offset)

sys/dev/x86emu/x86emu.c

476

return fetch_long(emu, get_data_segment(emu), offset);

sys/dev/x86emu/x86emu.c

48

static uint8_t fetch_byte (struct x86emu *, uint segment, uint32_t offset);

sys/dev/x86emu/x86emu.c

49

static uint16_t fetch_data_word (struct x86emu *, uint32_t offset);

sys/dev/x86emu/x86emu.c

490

fetch_byte(struct x86emu *emu, uint32_t segment, uint32_t offset)

sys/dev/x86emu/x86emu.c

492

return (*emu->emu_rdb) (emu, ((uint32_t) segment << 4) + offset);

sys/dev/x86emu/x86emu.c

50

static uint16_t fetch_word (struct x86emu *, uint32_t segment, uint32_t offset);

sys/dev/x86emu/x86emu.c

506

fetch_word(struct x86emu *emu, uint32_t segment, uint32_t offset)

sys/dev/x86emu/x86emu.c

508

return (*emu->emu_rdw) (emu, ((uint32_t) segment << 4) + offset);

sys/dev/x86emu/x86emu.c

51

static uint32_t fetch_data_long (struct x86emu *, uint32_t offset);

sys/dev/x86emu/x86emu.c

52

static uint32_t fetch_long (struct x86emu *, uint32_t segment, uint32_t offset);

sys/dev/x86emu/x86emu.c

522

fetch_long(struct x86emu *emu, uint32_t segment, uint32_t offset)

sys/dev/x86emu/x86emu.c

524

return (*emu->emu_rdl) (emu, ((uint32_t) segment << 4) + offset);

sys/dev/x86emu/x86emu.c

53

static void store_data_byte (struct x86emu *, uint32_t offset, uint8_t val);

sys/dev/x86emu/x86emu.c

539

store_data_byte(struct x86emu *emu, uint32_t offset, uint8_t val)

sys/dev/x86emu/x86emu.c

54

static void store_byte (struct x86emu *, uint32_t segment, uint32_t offset, uint8_t val);

sys/dev/x86emu/x86emu.c

541

store_byte(emu, get_data_segment(emu), offset, val);

sys/dev/x86emu/x86emu.c

55

static void store_data_word (struct x86emu *, uint32_t offset, uint16_t val);

sys/dev/x86emu/x86emu.c

556

store_data_word(struct x86emu *emu, uint32_t offset, uint16_t val)

sys/dev/x86emu/x86emu.c

558

store_word(emu, get_data_segment(emu), offset, val);

sys/dev/x86emu/x86emu.c

56

static void store_word (struct x86emu *, uint32_t segment, uint32_t offset, uint16_t val);

sys/dev/x86emu/x86emu.c

57

static void store_data_long (struct x86emu *, uint32_t offset, uint32_t val);

sys/dev/x86emu/x86emu.c

573

store_data_long(struct x86emu *emu, uint32_t offset, uint32_t val)

sys/dev/x86emu/x86emu.c

575

store_long(emu, get_data_segment(emu), offset, val);

sys/dev/x86emu/x86emu.c

58

static void store_long (struct x86emu *, uint32_t segment, uint32_t offset, uint32_t val);

sys/dev/x86emu/x86emu.c

590

store_byte(struct x86emu *emu, uint32_t segment, uint32_t offset, uint8_t val)

sys/dev/x86emu/x86emu.c

592

(*emu->emu_wrb) (emu, ((uint32_t) segment << 4) + offset, val);

sys/dev/x86emu/x86emu.c

607

store_word(struct x86emu *emu, uint32_t segment, uint32_t offset, uint16_t val)

sys/dev/x86emu/x86emu.c

609

(*emu->emu_wrw) (emu, ((uint32_t) segment << 4) + offset, val);

sys/dev/x86emu/x86emu.c

624

store_long(struct x86emu *emu, uint32_t segment, uint32_t offset, uint32_t val)

sys/dev/x86emu/x86emu.c

626

(*emu->emu_wrl) (emu, ((uint32_t) segment << 4) + offset, val);

sys/dev/x86emu/x86emu.c

893

uint32_t offset, sib;

sys/dev/x86emu/x86emu.c

897

offset = emu->x86.R_EAX;

sys/dev/x86emu/x86emu.c

900

offset = emu->x86.R_ECX;

sys/dev/x86emu/x86emu.c

903

offset = emu->x86.R_EDX;

sys/dev/x86emu/x86emu.c

906

offset = emu->x86.R_EBX;

sys/dev/x86emu/x86emu.c

910

offset = decode_sib_address(emu, sib, 0);

sys/dev/x86emu/x86emu.c

914

offset = fetch_long_imm(emu);

sys/dev/x86emu/x86emu.c

917

offset = emu->x86.R_EBP;

sys/dev/x86emu/x86emu.c

921

offset = emu->x86.R_ESI;

sys/dev/x86emu/x86emu.c

924

offset = emu->x86.R_EDI;

sys/dev/x86emu/x86emu.c

930

offset += (int8_t)fetch_byte_imm(emu);

sys/dev/x86emu/x86emu.c

932

offset += fetch_long_imm(emu);

sys/dev/x86emu/x86emu.c

933

return offset;

sys/dev/x86emu/x86emu.c

935

uint16_t offset;

sys/dev/x86emu/x86emu.c

940

offset = emu->x86.R_BX + emu->x86.R_SI;

sys/dev/x86emu/x86emu.c

943

offset = emu->x86.R_BX + emu->x86.R_DI;

sys/dev/x86emu/x86emu.c

947

offset = emu->x86.R_BP + emu->x86.R_SI;

sys/dev/x86emu/x86emu.c

951

offset = emu->x86.R_BP + emu->x86.R_DI;

sys/dev/x86emu/x86emu.c

954

offset = emu->x86.R_SI;

sys/dev/x86emu/x86emu.c

957

offset = emu->x86.R_DI;

sys/dev/x86emu/x86emu.c

961

offset = fetch_word_imm(emu);

sys/dev/x86emu/x86emu.c

964

offset = emu->x86.R_BP;

sys/dev/x86emu/x86emu.c

968

offset = emu->x86.R_BX;

sys/dev/x86emu/x86emu.c

974

offset += (int8_t)fetch_byte_imm(emu);

sys/dev/x86emu/x86emu.c

976

offset += fetch_word_imm(emu);

sys/dev/x86emu/x86emu.c

977

return offset;

sys/isofs/cd9660/cd9660_lookup.c

425

cd9660_bufatoff(struct iso_node *ip, off_t offset, char **res,

sys/isofs/cd9660/cd9660_lookup.c

435

lbn = lblkno(imp, offset);

sys/isofs/cd9660/cd9660_lookup.c

444

*res = (char *)bp->b_data + blkoff(imp, offset);

sys/isofs/cd9660/cd9660_rrip.c

503

ana->iso_ce_off = isonum_733(p->offset);

sys/isofs/cd9660/cd9660_rrip.h

137

char offset [ISODCL ( 12, 19)];

sys/isofs/udf/ecma167-udf.h

815

#define GETICB(ad_type, fentry, offset) \

sys/isofs/udf/ecma167-udf.h

816

(struct ad_type *)&fentry->data[offset]

sys/isofs/udf/udf.h

99

int offset;

sys/isofs/udf/udf_vnops.c

1014

int offset, error = 0;

sys/isofs/udf/udf_vnops.c

1062

offset = 0;

sys/isofs/udf/udf_vnops.c

1065

offset = up->u_diroff;

sys/isofs/udf/udf_vnops.c

1075

ds = udf_opendir(up, offset, fsize, ump);

sys/isofs/udf/udf_vnops.c

1124

up->u_diroff = ds->offset + ds->off;

sys/isofs/udf/udf_vnops.c

1138

offset = 0;

sys/isofs/udf/udf_vnops.c

1217

udf_readatoffset(struct unode *up, int *size, off_t offset,

sys/isofs/udf/udf_vnops.c

1231

error = udf_bmap_internal(up, offset, &sector, &max_size);

sys/isofs/udf/udf_vnops.c

1263

*data = (uint8_t *)&bp1->b_data[offset % ump->um_bsize];

sys/isofs/udf/udf_vnops.c

1272

udf_bmap_internal(struct unode *up, off_t offset, daddr_t *sector,

sys/isofs/udf/udf_vnops.c

1318

offset -= icblen;

sys/isofs/udf/udf_vnops.c

1333

} while(offset >= icblen);

sys/isofs/udf/udf_vnops.c

1335

lsector = (offset >> ump->um_bshift) +

sys/isofs/udf/udf_vnops.c

1348

offset -= icblen;

sys/isofs/udf/udf_vnops.c

1361

} while(offset >= icblen);

sys/isofs/udf/udf_vnops.c

1363

lsector = (offset >> ump->um_bshift) +

sys/isofs/udf/udf_vnops.c

451

off_t fsize, offset;

sys/isofs/udf/udf_vnops.c

461

offset = uio->uio_offset;

sys/isofs/udf/udf_vnops.c

463

if (size > fsize - offset)

sys/isofs/udf/udf_vnops.c

464

size = fsize - offset;

sys/isofs/udf/udf_vnops.c

465

error = udf_readatoffset(up, &size, offset, &bp, &data);

sys/isofs/udf/udf_vnops.c

578

udf_opendir(struct unode *up, int offset, int fsize, struct umount *ump)

sys/isofs/udf/udf_vnops.c

585

ds->offset = offset;

sys/isofs/udf/udf_vnops.c

599

if (ds->offset + ds->off >= ds->fsize) {

sys/isofs/udf/udf_vnops.c

607

error = udf_readatoffset(ds->node, &ds->size, ds->offset,

sys/isofs/udf/udf_vnops.c

662

ds->offset += ds->size;

sys/isofs/udf/udf_vnops.c

664

error = udf_readatoffset(ds->node, &ds->size, ds->offset,

sys/isofs/udf/udf_vnops.c

711

ds->this_off = ds->offset + ds->off;

sys/isofs/udf/udf_vnops.c

782

last_off = ds->offset + ds->off;

sys/kern/exec_elf.c

1063

size_t phsize, offset, pfilesz = 0, total;

sys/kern/exec_elf.c

1096

for (offset = 0; offset < ph->p_filesz; offset += total) {

sys/kern/exec_elf.c

1097

Elf_Note *np2 = (Elf_Note *)((char *)np + offset);

sys/kern/exec_elf.c

1100

if (offset + sizeof(Elf_Note) > ph->p_filesz)

sys/kern/exec_elf.c

1104

if (offset + total > ph->p_filesz)

sys/kern/exec_elf.c

1159

off_t offset;

sys/kern/exec_elf.c

1192

offset = ws.notestart + notesize;

sys/kern/exec_elf.c

1193

if (offset != ws.secstart)

sys/kern/exec_elf.c

1195

(long long) offset, (long long) ws.secstart);

sys/kern/exec_elf.c

1205

if (offset != pent->p_offset)

sys/kern/exec_elf.c

1207

(long long) offset, i,

sys/kern/exec_elf.c

1231

offset += ws.psections[i].p_filesz;

sys/kern/exec_elf.c

161

long diff, offset, bdiff;

sys/kern/exec_elf.c

212

offset = ph->p_offset - bdiff;

sys/kern/exec_elf.c

224

offset, *prot, flags);

sys/kern/exec_elf.c

227

base + psize, vp, offset + psize, *prot, flags);

sys/kern/exec_elf.c

230

NEW_VMCMD2(vcset, vmcmd_map_pagedvn, psize, base, vp, offset,

sys/kern/exec_elf.c

272

elf_adjustpins(vaddr_t *basep, size_t *lenp, u_int *pins, int npins, u_int offset)

sys/kern/exec_elf.c

280

pins[i] -= offset;

sys/kern/exec_elf.c

282

*basep += offset;

sys/kern/exec_elf.c

283

*lenp -= offset;

sys/kern/exec_elf.c

291

u_int offset;

sys/kern/exec_elf.c

310

syscalls[i].offset > len) {

sys/kern/exec_elf.c

326

pins[syscalls[i].sysno] = syscalls[i].offset;

sys/kern/exec_subr.c

55

struct vnode *vp, u_long offset, u_int prot, int flags)

sys/kern/exec_subr.c

67

vcp->ev_offset = offset;

sys/kern/kern_clockintr.c

657

db_expr_t offset;

sys/kern/kern_clockintr.c

661

db_find_sym_and_offset((vaddr_t)cl->cl_func, &name, &offset);

sys/kern/kern_descrip.c

536

off_t offset = foffset(fp);

sys/kern/kern_descrip.c

541

fl.l_start = offset - fl.l_len;

sys/kern/kern_descrip.c

543

fl.l_start += offset;

sys/kern/kern_descrip.c

605

off_t offset = foffset(fp);

sys/kern/kern_descrip.c

610

fl.l_start = offset - fl.l_len;

sys/kern/kern_descrip.c

612

fl.l_start += offset;

sys/kern/kern_intrmap.c

157

unsigned int i, offset;

sys/kern/kern_intrmap.c

166

offset = (grid * unit) % ic->ic_count;

sys/kern/kern_intrmap.c

168

cpumap[i] = offset + i;

sys/kern/kern_intrmap.c

171

cpumap[i], offset, ic->ic_count);

sys/kern/kern_timeout.c

977

db_expr_t offset;

sys/kern/kern_timeout.c

982

db_find_sym_and_offset((vaddr_t)to->to_func, &name, &offset);

sys/kern/subr_hibernate.c

138

hibernate_write(union hibernate_info *hib, daddr_t offset, vaddr_t addr,

sys/kern/subr_hibernate.c

143

if (hib == NULL || offset < 0 || blks == 0) {

sys/kern/subr_hibernate.c

1489

chunks[i].offset = blkctr;

sys/kern/subr_hibernate.c

150

if (offset + blks > hib->image_size) {

sys/kern/subr_hibernate.c

153

__func__, hib->image_offset, offset, blks);

sys/kern/subr_hibernate.c

156

offset += hib->image_offset;

sys/kern/subr_hibernate.c

159

if (offset + blks > btodb(HIBERNATE_CHUNK_TABLE_SIZE)) {

sys/kern/subr_hibernate.c

1607

chunks[i].compressed_size = dbtob(blkctr - chunks[i].offset);

sys/kern/subr_hibernate.c

162

__func__, hib->chunktable_offset, offset, blks);

sys/kern/subr_hibernate.c

165

offset += hib->chunktable_offset;

sys/kern/subr_hibernate.c

168

if (offset != hib->sig_offset || size != hib->sec_size) {

sys/kern/subr_hibernate.c

171

__func__, hib->sig_offset, offset, blks);

sys/kern/subr_hibernate.c

180

return (hib->io_func(hib->dev, offset, addr, size, HIB_W,

sys/kern/subr_hibernate.c

1836

blkctr = chunks[fchunks[i]].offset + hib->image_offset;

sys/kern/subr_prof.c

281

syscallarg(u_long) offset;

sys/kern/subr_prof.c

342

upp->pr_off = SCARG(uap, offset);

sys/kern/sys_futex.c

192

off = entry->offset +

sys/kern/uipc_socket.c

1070

offset = 0;

sys/kern/uipc_socket.c

1092

if (so->so_oobmark && len > so->so_oobmark - offset)

sys/kern/uipc_socket.c

1093

len = so->so_oobmark - offset;

sys/kern/uipc_socket.c

1174

offset += len;

sys/kern/uipc_socket.c

1175

if (offset == so->so_oobmark)

sys/kern/uipc_socket.c

855

u_long len, offset, moff;

sys/kern/vfs_syscalls.c

1944

syscallarg(off_t) offset;

sys/kern/vfs_syscalls.c

1949

off_t offset;

sys/kern/vfs_syscalls.c

1958

offset = SCARG(uap, offset);

sys/kern/vfs_syscalls.c

1960

error = (*fp->f_ops->fo_seek)(fp, &offset, SCARG(uap, whence), p);

sys/kern/vfs_syscalls.c

1964

*(off_t *)retval = offset;

sys/kern/vfs_syscalls.c

3322

syscallarg(off_t) offset;

sys/kern/vfs_syscalls.c

3335

auio.uio_offset = SCARG(uap, offset);

sys/kern/vfs_syscalls.c

3350

syscallarg(off_t) offset;

sys/kern/vfs_syscalls.c

3364

auio.uio_offset = SCARG(uap, offset);

sys/kern/vfs_syscalls.c

3382

syscallarg(off_t) offset;

sys/kern/vfs_syscalls.c

3395

auio.uio_offset = SCARG(uap, offset);

sys/kern/vfs_syscalls.c

3410

syscallarg(off_t) offset;

sys/kern/vfs_syscalls.c

3424

auio.uio_offset = SCARG(uap, offset);

sys/kern/vfs_vnops.c

307

vn_rdwr(enum uio_rw rw, struct vnode *vp, caddr_t base, int len, off_t offset,

sys/kern/vfs_vnops.c

320

auio.uio_offset = offset;

sys/kern/vfs_vnops.c

352

off_t offset;

sys/kern/vfs_vnops.c

360

offset = uio->uio_offset = fp->f_offset;

sys/kern/vfs_vnops.c

362

offset = uio->uio_offset;

sys/kern/vfs_vnops.c

365

if (vp->v_type != VCHR && count > LLONG_MAX - offset) {

sys/kern/vfs_vnops.c

638

vn_seek(struct file *fp, off_t *offset, int whence, struct proc *p)

sys/kern/vfs_vnops.c

659

newoff = fp->f_offset + *offset;

sys/kern/vfs_vnops.c

667

newoff = *offset + (off_t)vattr.va_size;

sys/kern/vfs_vnops.c

670

newoff = *offset;

sys/kern/vfs_vnops.c

683

*offset = newoff;

sys/lib/libsa/cd9660.c

341

cd9660_seek(struct open_file *f, off_t offset, int where)

sys/lib/libsa/cd9660.c

347

fp->off = offset;

sys/lib/libsa/cd9660.c

350

fp->off += offset;

sys/lib/libsa/cd9660.c

353

fp->off = fp->size - offset;

sys/lib/libsa/cd9660.h

41

off_t cd9660_seek(struct open_file *f, off_t offset, int where);

sys/lib/libsa/cread.c

359

lseek(int fd, off_t offset, int where)

sys/lib/libsa/cread.c

371

return(olseek(fd, offset, where));

sys/lib/libsa/cread.c

376

off_t res = olseek(fd, offset, where);

sys/lib/libsa/cread.c

386

offset += s->stream.total_out;

sys/lib/libsa/cread.c

391

if (offset < s->stream.total_out) {

sys/lib/libsa/cread.c

413

if (offset > s->stream.total_out) {

sys/lib/libsa/cread.c

414

off_t toskip = offset - s->stream.total_out;

sys/lib/libsa/cread.c

434

if (offset != s->stream.total_out)

sys/lib/libsa/cread.c

437

return(offset);

sys/lib/libsa/loadfile_elf.c

83

paddr_t offset = marks[MARK_START], shpp, elfp;

sys/lib/libsa/lseek.c

68

lseek(int fd, off_t offset, int where)

sys/lib/libsa/lseek.c

70

olseek(int fd, off_t offset, int where)

sys/lib/libsa/lseek.c

86

f->f_offset = offset;

sys/lib/libsa/lseek.c

89

f->f_offset += offset;

sys/lib/libsa/lseek.c

99

return (f->f_ops->seek)(f, offset, where);

sys/lib/libsa/nfs.c

565

nfs_seek(struct open_file *f, off_t offset, int where)

sys/lib/libsa/nfs.c

572

d->off = offset;

sys/lib/libsa/nfs.c

575

d->off += offset;

sys/lib/libsa/nfs.c

578

d->off = size - offset;

sys/lib/libsa/nfs.h

39

off_t nfs_seek(struct open_file *f, off_t offset, int where);

sys/lib/libsa/nullfs.c

94

null_seek(struct open_file *f, off_t offset, int where)

sys/lib/libsa/stand.h

185

off_t null_seek(struct open_file *f, off_t offset, int where);

sys/lib/libsa/stand.h

67

off_t (*seek)(struct open_file *f, off_t offset, int where);

sys/lib/libsa/tftp.c

396

tftp_seek(struct open_file *f, off_t offset, int where)

sys/lib/libsa/tftp.c

403

tftpfile->off = offset;

sys/lib/libsa/tftp.c

406

tftpfile->off += offset;

sys/lib/libsa/ufs.c

656

ufs_seek(struct open_file *f, off_t offset, int where)

sys/lib/libsa/ufs.c

662

fp->f_seekp = offset;

sys/lib/libsa/ufs.c

665

fp->f_seekp += offset;

sys/lib/libsa/ufs.c

668

fp->f_seekp = fp->f_di.di_size - offset;

sys/lib/libsa/ufs.h

41

off_t ufs_seek(struct open_file *f, off_t offset, int where);

sys/lib/libsa/ufs2.c

652

ufs2_seek(struct open_file *f, off_t offset, int where)

sys/lib/libsa/ufs2.c

658

fp->f_seekp = offset;

sys/lib/libsa/ufs2.c

661

fp->f_seekp += offset;

sys/lib/libsa/ufs2.c

664

fp->f_seekp = fp->f_di.di_size - offset;

sys/lib/libz/infback.c

555

state->offset = (unsigned)here.val;

sys/lib/libz/infback.c

561

state->offset += BITS(state->extra);

sys/lib/libz/infback.c

564

if (state->offset > state->wsize - (state->whave < state->wsize ?

sys/lib/libz/infback.c

574

Tracevv((stderr, "inflate: distance %u\n", state->offset));

sys/lib/libz/infback.c

579

copy = state->wsize - state->offset;

sys/lib/libz/infback.c

585

from = put - state->offset;

sys/lib/libz/inflate.c

1069

state->offset = (unsigned)here.val;

sys/lib/libz/inflate.c

1076

state->offset += BITS(state->extra);

sys/lib/libz/inflate.c

1081

if (state->offset > state->dmax) {

sys/lib/libz/inflate.c

1091

Tracevv((stderr, "inflate: distance %u\n", state->offset));

sys/lib/libz/inflate.c

1097

if (state->offset > copy) { /* copy from window */

sys/lib/libz/inflate.c

1098

copy = state->offset - copy;

sys/lib/libz/inflate.c

1133

from = put - state->offset;

sys/lib/libz/inflate.h

106

unsigned offset; /* distance back to copy string from */

sys/msdosfs/msdosfs_lookup.c

937

uint32_t offset = pdep->de_fndoffset;

sys/msdosfs/msdosfs_lookup.c

941

dep->de_Name, dep, offset);

sys/msdosfs/msdosfs_lookup.c

945

offset += sizeof(struct direntry);

sys/msdosfs/msdosfs_lookup.c

947

offset -= sizeof(struct direntry);

sys/msdosfs/msdosfs_lookup.c

948

error = pcbmap(pdep, de_cluster(pmp, offset), &bn, 0, &blsize);

sys/msdosfs/msdosfs_lookup.c

956

ep = bptoep(pmp, bp, offset);

sys/msdosfs/msdosfs_lookup.c

963

&& offset != pdep->de_fndoffset) {

sys/msdosfs/msdosfs_lookup.c

967

offset += sizeof(struct direntry);

sys/msdosfs/msdosfs_lookup.c

975

offset -= sizeof(struct direntry);

sys/msdosfs/msdosfs_lookup.c

978

|| !(offset & pmp->pm_crbomask)

sys/msdosfs/msdosfs_lookup.c

985

&& !(offset & pmp->pm_crbomask)

sys/msdosfs/msdosfs_lookup.c

986

&& offset);

sys/msdosfs/msdosfs_vnops.c

1428

off_t offset, wlast = -1;

sys/msdosfs/msdosfs_vnops.c

1456

offset = uio->uio_offset;

sys/msdosfs/msdosfs_vnops.c

1458

(offset & (sizeof(struct direntry) - 1)))

sys/msdosfs/msdosfs_vnops.c

1476

offset);

sys/msdosfs/msdosfs_vnops.c

1479

if (offset < bias) {

sys/msdosfs/msdosfs_vnops.c

1480

for (n = (int)offset / sizeof(struct direntry);

sys/msdosfs/msdosfs_vnops.c

1500

dirbuf.d_off = offset +

sys/msdosfs/msdosfs_vnops.c

1507

offset = dirbuf.d_off;

sys/msdosfs/msdosfs_vnops.c

1513

lbn = de_cluster(pmp, offset - bias);

sys/msdosfs/msdosfs_vnops.c

1514

on = (offset - bias) & pmp->pm_crbomask;

sys/msdosfs/msdosfs_vnops.c

1516

diff = dep->de_FileSize - (offset - bias);

sys/msdosfs/msdosfs_vnops.c

1535

dentp++, offset += sizeof(struct direntry)) {

sys/msdosfs/msdosfs_vnops.c

1566

wlast = offset;

sys/msdosfs/msdosfs_vnops.c

1623

dirbuf.d_off = offset + sizeof(struct direntry);

sys/msdosfs/msdosfs_vnops.c

1628

offset = wlast;

sys/msdosfs/msdosfs_vnops.c

1642

uio->uio_offset = offset;

sys/msdosfs/msdosfs_vnops.c

1644

if (dep->de_FileSize - (offset - bias) <= 0)

sys/net/art.c

213

art_bindex(unsigned int offset, unsigned int bits,

sys/net/art.c

219

KASSERT(plen >= offset);

sys/net/art.c

220

KASSERT(plen <= (offset + bits));

sys/net/art.c

226

plen -= offset;

sys/net/art.c

232

addr += (offset / 8);

sys/net/art.c

235

boff = (offset % 8);

sys/net/art.c

270

unsigned int offset = 0;

sys/net/art.c

288

unsigned int p = offset + bits;

sys/net/art.c

299

j = art_bindex(offset, bits, addr, p);

sys/net/art.c

307

offset = p;

sys/net/art.c

367

unsigned int offset = 0;

sys/net/art.c

396

p = offset + bits;

sys/net/art.c

401

j = art_bindex(offset, bits, addr, p);

sys/net/art.c

409

offset = p;

sys/net/art.c

415

i = art_bindex(offset, bits, addr, plen);

sys/net/pipex.c

2046

int length = 0, offset = 0, hlen, nseq;

sys/net/pipex.c

2115

GETSHORT(offset, cp);

sys/net/pipex.c

2117

length -= hlen + offset;

sys/net/pipex.c

2118

hlen += off0 + offset;

sys/net/radix.c

1128

rn_inithead0(struct radix_node_head *rnh, int offset)

sys/net/radix.c

1131

int off = offset * NBBY;

sys/net80211/ieee80211_output.c

877

u_int i, offset = 0, len;

sys/net80211/ieee80211_output.c

885

offset = i & ~1;

sys/net80211/ieee80211_output.c

891

len = i - offset + 1;

sys/net80211/ieee80211_output.c

899

*frm = offset;

sys/net80211/ieee80211_output.c

906

memcpy(frm, &ic->ic_tim_bitmap[offset], len);

sys/netinet/ip_output.c

1813

u_int16_t csum, offset;

sys/netinet/ip_output.c

1816

offset = ip->ip_hl << 2;

sys/netinet/ip_output.c

1817

csum = in4_cksum(m, 0, offset, m->m_pkthdr.len - offset);

sys/netinet/ip_output.c

1823

offset += offsetof(struct tcphdr, th_sum);

sys/netinet/ip_output.c

1827

offset += offsetof(struct udphdr, uh_sum);

sys/netinet/ip_output.c

1831

offset += offsetof(struct icmp, icmp_cksum);

sys/netinet/ip_output.c

1838

if ((offset + sizeof(u_int16_t)) > m->m_len)

sys/netinet/ip_output.c

1839

m_copyback(m, offset, sizeof(csum), &csum, M_NOWAIT);

sys/netinet/ip_output.c

1841

*(u_int16_t *)(mtod(m, caddr_t) + offset) = csum;

sys/netinet/ip_output.c

1852

u_int16_t csum = 0, offset;

sys/netinet/ip_output.c

1854

offset = ip->ip_hl << 2;

sys/netinet/ip_output.c

1863

offset + ip->ip_p));

sys/netinet/ip_output.c

1866

offset += offsetof(struct tcphdr, th_sum);

sys/netinet/ip_output.c

1868

offset += offsetof(struct udphdr, uh_sum);

sys/netinet/ip_output.c

1870

offset += offsetof(struct icmp, icmp_cksum);

sys/netinet/ip_output.c

1871

if ((offset + sizeof(u_int16_t)) > m->m_len)

sys/netinet/ip_output.c

1872

m_copyback(m, offset, sizeof(csum), &csum, M_NOWAIT);

sys/netinet/ip_output.c

1874

*(u_int16_t *)(mtod(m, caddr_t) + offset) = csum;

sys/netinet6/frag6.c

122

int offset = *offp, nxt, i, next;

sys/netinet6/frag6.c

128

ip6f = ip6_exthdr_get(mp, offset, sizeof(*ip6f));

sys/netinet6/frag6.c

135

offset);

sys/netinet6/frag6.c

146

(((ntohs(ip6->ip6_plen) - offset) & 0x7) != 0)) {

sys/netinet6/frag6.c

155

offset += sizeof(struct ip6_frag);

sys/netinet6/frag6.c

166

*offp = offset;

sys/netinet6/frag6.c

171

if (sizeof(struct ip6_hdr) + ntohs(ip6->ip6_plen) <= offset) {

sys/netinet6/frag6.c

234

q6->ip6q_unfrglen = offset - sizeof(struct ip6_hdr) -

sys/netinet6/frag6.c

244

frgpartlen = sizeof(struct ip6_hdr) + ntohs(ip6->ip6_plen) - offset;

sys/netinet6/frag6.c

251

offset - sizeof(struct ip6_frag) +

sys/netinet6/frag6.c

258

offset - sizeof(struct ip6_frag) +

sys/netinet6/frag6.c

304

ip6af->ip6af_offset = offset;

sys/netinet6/frag6.c

405

offset = ip6af->ip6af_offset - sizeof(struct ip6_frag);

sys/netinet6/frag6.c

407

next += offset - sizeof(struct ip6_hdr);

sys/netinet6/frag6.c

425

if (frag6_deletefraghdr(*mp, offset) != 0) {

sys/netinet6/frag6.c

448

int prvnxt = ip6_get_prevhdr(*mp, offset);

sys/netinet6/frag6.c

462

*offp = offset;

sys/netinet6/frag6.c

494

frag6_deletefraghdr(struct mbuf *m, int offset)

sys/netinet6/frag6.c

498

if (m->m_len >= offset + sizeof(struct ip6_frag)) {

sys/netinet6/frag6.c

500

mtod(m, caddr_t), offset);

sys/netinet6/frag6.c

505

if ((t = m_split(m, offset, M_DONTWAIT)) == NULL)

sys/netinet6/ip6_output.c

2655

int nxtp, offset;

sys/netinet6/ip6_output.c

2658

offset = ip6_lasthdr(m, 0, IPPROTO_IPV6, &nxtp);

sys/netinet6/ip6_output.c

2659

if (offset <= 0 || nxtp != nxt)

sys/netinet6/ip6_output.c

2662

csum = (u_int16_t)(in6_cksum(m, 0, offset, m->m_pkthdr.len - offset));

sys/netinet6/ip6_output.c

2666

offset += offsetof(struct tcphdr, th_sum);

sys/netinet6/ip6_output.c

2670

offset += offsetof(struct udphdr, uh_sum);

sys/netinet6/ip6_output.c

2676

offset += offsetof(struct icmp6_hdr, icmp6_cksum);

sys/netinet6/ip6_output.c

2680

if ((offset + sizeof(u_int16_t)) > m->m_len)

sys/netinet6/ip6_output.c

2681

m_copyback(m, offset, sizeof(csum), &csum, M_NOWAIT);

sys/netinet6/ip6_output.c

2683

*(u_int16_t *)(mtod(m, caddr_t) + offset) = csum;

sys/netinet6/ip6_output.c

2694

int nxt, offset;

sys/netinet6/ip6_output.c

2697

offset = ip6_lasthdr(m, 0, IPPROTO_IPV6, &nxt);

sys/netinet6/ip6_output.c

2704

htonl(m->m_pkthdr.len - offset), htonl(nxt));

sys/netinet6/ip6_output.c

2707

offset += offsetof(struct tcphdr, th_sum);

sys/netinet6/ip6_output.c

2709

offset += offsetof(struct udphdr, uh_sum);

sys/netinet6/ip6_output.c

2711

offset += offsetof(struct icmp6_hdr, icmp6_cksum);

sys/netinet6/ip6_output.c

2712

if ((offset + sizeof(u_int16_t)) > m->m_len)

sys/netinet6/ip6_output.c

2713

m_copyback(m, offset, sizeof(csum), &csum, M_NOWAIT);

sys/netinet6/ip6_output.c

2715

*(u_int16_t *)(mtod(m, caddr_t) + offset) = csum;

sys/nfs/nfs_vnops.c

2931

nfs_commit(struct vnode *vp, u_quad_t offset, int cnt, struct proc *procp)

sys/nfs/nfs_vnops.c

2946

txdr_hyper(offset, tl);

sys/ntfs/ntfs_vfsops.c

556

uint64_t bmsize, offset;

sys/ntfs/ntfs_vfsops.c

570

for (offset = 0; offset < bmsize; offset += chunksize) {

sys/ntfs/ntfs_vfsops.c

571

if (chunksize > bmsize - offset)

sys/ntfs/ntfs_vfsops.c

572

chunksize = bmsize - offset;

sys/ntfs/ntfs_vfsops.c

575

offset, chunksize, tmp, NULL);

sys/scsi/scsi_base.c

1241

size_t offset;

sys/scsi/scsi_base.c

1245

offset = sizeof(struct scsi_mode_header);

sys/scsi/scsi_base.c

1248

offset = sizeof(struct scsi_mode_header_big);

sys/scsi/scsi_base.c

1261

general = (struct scsi_blk_desc *)&buf->buf[offset];

sys/scsi/scsi_base.c

1271

direct = (struct scsi_direct_blk_desc *)&buf->buf[offset];

sys/sys/ctf.h

135

#define _CTF_DATA(encoding, offset, bits) \

sys/sys/ctf.h

136

(((encoding) << 24) | ((offset) << 16) | (bits))

sys/sys/exec.h

167

u_long len, u_long addr, struct vnode *vp, u_long offset,

sys/sys/exec.h

169

#define NEW_VMCMD(evsp,proc,len,addr,vp,offset,prot) \

sys/sys/exec.h

170

new_vmcmd(evsp,proc,len,addr,vp,offset,prot, 0);

sys/sys/exec.h

171

#define NEW_VMCMD2(evsp,proc,len,addr,vp,offset,prot,flags) \

sys/sys/exec.h

172

new_vmcmd(evsp,proc,len,addr,vp,offset,prot,flags)

sys/sys/file.h

125

off_t offset;

sys/sys/file.h

128

offset = fp->f_offset;

sys/sys/file.h

130

return (offset);

sys/sys/hibernate.h

72

daddr_t offset; /* Abs. disk block locating chunk */

sys/sys/syscallargs.h

776

syscallarg(off_t) offset;

sys/sys/syscallargs.h

794

syscallarg(off_t) offset;

sys/sys/syscallargs.h

801

syscallarg(off_t) offset;

sys/sys/syscallargs.h

808

syscallarg(off_t) offset;

sys/sys/syscallargs.h

815

syscallarg(off_t) offset;

sys/sys/syscallargs.h

822

syscallarg(u_long) offset;

sys/sys/videoio.h

4768

u_int32_t offset;

sys/sys/videoio.h

5779

u_int64_t offset;

sys/sys/videoio.h

5874

u_int32_t offset;

sys/ufs/ext2fs/ext2fs_inode.c

215

int offset, size, level;

sys/ufs/ext2fs/ext2fs_inode.c

256

offset = blkoff(fs, length - 1);

sys/ufs/ext2fs/ext2fs_inode.c

261

error = ext2fs_buf_alloc(oip, lbn, offset + 1, cred, &bp,

sys/ufs/ext2fs/ext2fs_inode.c

282

offset = blkoff(fs, length);

sys/ufs/ext2fs/ext2fs_inode.c

283

if (offset == 0) {

sys/ufs/ext2fs/ext2fs_inode.c

290

error = ext2fs_buf_alloc(oip, lbn, offset, cred, &bp,

sys/ufs/ext2fs/ext2fs_inode.c

298

memset(bp->b_data + offset, 0, size - offset);

sys/ufs/ext2fs/ext2fs_lookup.c

614

int offset = *entryoffsetinblockp;

sys/ufs/ext2fs/ext2fs_lookup.c

622

ep = (struct ext2fs_direct *) ((char *)data + offset);

sys/ufs/ext2fs/ext2fs_lookup.c

632

(dirchk && ext2fs_dirbadentry(vdp, ep, offset))) {

sys/ufs/ext2fs/ext2fs_lookup.c

635

i = dirblksize - (offset & (dirblksize - 1));

sys/ufs/ext2fs/ext2fs_lookup.c

637

offset += i;

sys/ufs/ext2fs/ext2fs_lookup.c

688

offset += letoh16(ep->e2d_reclen);

sys/ufs/ext2fs/ext2fs_lookup.c

689

*entryoffsetinblockp = offset;

sys/ufs/ext2fs/ext2fs_lookup.c

696

ep = (struct ext2fs_direct *) ((char *)data + offset);

sys/ufs/ext2fs/ext2fs_subr.c

107

*res = (char *)bp->b_data + blkoff(fs, offset);

sys/ufs/ext2fs/ext2fs_subr.c

60

ext2fs_bufatoff(struct inode *ip, off_t offset, char **res, struct buf **bpp)

sys/ufs/ext2fs/ext2fs_subr.c

70

lbn = lblkno(fs, offset);

sys/ufs/ext2fs/ext2fs_subr.c

93

*res = (char *)bp->b_data + blkoff(fs, offset);

sys/ufs/ffs/ffs_inode.c

135

int offset, size, level;

sys/ufs/ffs/ffs_inode.c

209

offset = blkoff(fs, length);

sys/ufs/ffs/ffs_inode.c

210

if (offset == 0) {

sys/ufs/ffs/ffs_inode.c

225

memset(bp->b_data + offset, 0, size - offset);

sys/ufs/ffs/ffs_subr.c

57

ffs_bufatoff(struct inode *ip, off_t offset, char **res, struct buf **bpp)

sys/ufs/ffs/ffs_subr.c

67

lbn = lblkno(fs, offset);

sys/ufs/ffs/ffs_subr.c

77

*res = (char *)bp->b_data + blkoff(fs, offset);

sys/ufs/mfs/mfs_vnops.c

148

long offset = bp->b_blkno << DEV_BSHIFT;

sys/ufs/mfs/mfs_vnops.c

151

if (bp->b_bcount > mfsp->mfs_size - offset)

sys/ufs/mfs/mfs_vnops.c

152

bp->b_bcount = mfsp->mfs_size - offset;

sys/ufs/mfs/mfs_vnops.c

154

base = mfsp->mfs_baseoff + offset;

sys/ufs/ufs/inode.h

141

int (* iv_bufatoff)(struct inode *, off_t offset, char **res,

sys/ufs/ufs/inode.h

161

#define UFS_BUFATOFF(ip, offset, res, bpp) \

sys/ufs/ufs/inode.h

162

((ip)->i_vtbl->iv_bufatoff)((ip), (offset), (res), (bpp))

sys/ufs/ufs/ufs_dirhash.c

317

doff_t blkoff, bmask, offset, prevoff;

sys/ufs/ufs/ufs_dirhash.c

376

for (i = slot; (offset = DH_ENTRY(dh, i)) != DIRHASH_EMPTY;

sys/ufs/ufs/ufs_dirhash.c

378

if (offset == dh->dh_seqoff)

sys/ufs/ufs/ufs_dirhash.c

380

if (offset == dh->dh_seqoff) {

sys/ufs/ufs/ufs_dirhash.c

391

for (; (offset = DH_ENTRY(dh, slot)) != DIRHASH_EMPTY;

sys/ufs/ufs/ufs_dirhash.c

393

if (offset == DIRHASH_DEL)

sys/ufs/ufs/ufs_dirhash.c

397

if (offset < 0 || offset >= DIP(ip, size))

sys/ufs/ufs/ufs_dirhash.c

399

if ((offset & ~bmask) != blkoff) {

sys/ufs/ufs/ufs_dirhash.c

402

blkoff = offset & ~bmask;

sys/ufs/ufs/ufs_dirhash.c

406

dp = (struct direct *)(bp->b_data + (offset & bmask));

sys/ufs/ufs/ufs_dirhash.c

408

DIRBLKSIZ - (offset & (DIRBLKSIZ - 1))) {

sys/ufs/ufs/ufs_dirhash.c

417

if (offset & (DIRBLKSIZ - 1)) {

sys/ufs/ufs/ufs_dirhash.c

419

offset);

sys/ufs/ufs/ufs_dirhash.c

425

prevoff = offset;

sys/ufs/ufs/ufs_dirhash.c

430

if (dh->dh_seqopt == 0 && dh->dh_seqoff == offset)

sys/ufs/ufs/ufs_dirhash.c

432

dh->dh_seqoff = offset + DIRSIZ(dp);

sys/ufs/ufs/ufs_dirhash.c

435

*offp = offset;

sys/ufs/ufs/ufs_dirhash.c

594

ufsdirhash_add(struct inode *ip, struct direct *dirp, doff_t offset)

sys/ufs/ufs/ufs_dirhash.c

608

DIRHASH_ASSERT(offset < dh->dh_dirblks * DIRBLKSIZ,

sys/ufs/ufs/ufs_dirhash.c

626

DH_ENTRY(dh, slot) = offset;

sys/ufs/ufs/ufs_dirhash.c

629

ufsdirhash_adjfree(dh, offset, -DIRSIZ(dirp));

sys/ufs/ufs/ufs_dirhash.c

63

void ufsdirhash_adjfree(struct dirhash *dh, doff_t offset, int diff);

sys/ufs/ufs/ufs_dirhash.c

639

ufsdirhash_remove(struct inode *ip, struct direct *dirp, doff_t offset)

sys/ufs/ufs/ufs_dirhash.c

653

DIRHASH_ASSERT(offset < dh->dh_dirblks * DIRBLKSIZ,

sys/ufs/ufs/ufs_dirhash.c

656

slot = ufsdirhash_findslot(dh, dirp->d_name, dirp->d_namlen, offset);

sys/ufs/ufs/ufs_dirhash.c

66

doff_t offset);

sys/ufs/ufs/ufs_dirhash.c

662

ufsdirhash_adjfree(dh, offset, DIRSIZ(dirp));

sys/ufs/ufs/ufs_dirhash.c

67

doff_t ufsdirhash_getprev(struct direct *dp, doff_t offset);

sys/ufs/ufs/ufs_dirhash.c

700

ufsdirhash_newblk(struct inode *ip, doff_t offset)

sys/ufs/ufs/ufs_dirhash.c

714

DIRHASH_ASSERT(offset == dh->dh_dirblks * DIRBLKSIZ,

sys/ufs/ufs/ufs_dirhash.c

716

block = offset / DIRBLKSIZ;

sys/ufs/ufs/ufs_dirhash.c

736

ufsdirhash_dirtrunc(struct inode *ip, doff_t offset)

sys/ufs/ufs/ufs_dirhash.c

750

DIRHASH_ASSERT(offset <= dh->dh_dirblks * DIRBLKSIZ,

sys/ufs/ufs/ufs_dirhash.c

752

block = howmany(offset, DIRBLKSIZ);

sys/ufs/ufs/ufs_dirhash.c

792

ufsdirhash_checkblock(struct inode *ip, char *buf, doff_t offset)

sys/ufs/ufs/ufs_dirhash.c

809

block = offset / DIRBLKSIZ;

sys/ufs/ufs/ufs_dirhash.c

810

if ((offset & (DIRBLKSIZ - 1)) != 0 || block >= dh->dh_dirblks)

sys/ufs/ufs/ufs_dirhash.c

835

ufsdirhash_findslot(dh, dp->d_name, dp->d_namlen, offset + i);

sys/ufs/ufs/ufs_dirhash.c

872

ufsdirhash_adjfree(struct dirhash *dh, doff_t offset, int diff)

sys/ufs/ufs/ufs_dirhash.c

877

block = offset / DIRBLKSIZ;

sys/ufs/ufs/ufs_dirhash.c

908

ufsdirhash_findslot(struct dirhash *dh, char *name, int namelen, doff_t offset)

sys/ufs/ufs/ufs_dirhash.c

917

while (DH_ENTRY(dh, slot) != offset &&

sys/ufs/ufs/ufs_dirhash.c

920

if (DH_ENTRY(dh, slot) != offset)

sys/ufs/ufs/ufs_dirhash.c

962

ufsdirhash_getprev(struct direct *dirp, doff_t offset)

sys/ufs/ufs/ufs_dirhash.c

969

blkoff = offset & ~(DIRBLKSIZ - 1); /* offset of start of block */

sys/ufs/ufs/ufs_dirhash.c

970

entrypos = offset & (DIRBLKSIZ - 1); /* entry relative to block */

sys/ufs/ufs/ufs_lookup.c

592

ufs_dirbad(struct inode *ip, doff_t offset, char *how)

sys/ufs/ufs/ufs_lookup.c

598

mp->mnt_stat.f_mntonname, ip->i_number, offset, how);

sys/uvm/uvm_addr.c

1089

vsize_t sz, vaddr_t align, vaddr_t offset,

sys/uvm/uvm_addr.c

1105

sz, align, offset, prot, hint) == 0)

sys/uvm/uvm_addr.c

1128

VMMAP_FREE_END(entry), sz, align, offset,

sys/uvm/uvm_addr.c

1140

sz, align, offset, before_gap, after_gap) == 0) {

sys/uvm/uvm_addr.c

1155

sz, align, offset, before_gap, after_gap);

sys/uvm/uvm_addr.c

1339

vsize_t sz, vaddr_t align, vaddr_t offset,

sys/uvm/uvm_addr.c

1357

0, sz, align, offset, dir, start, end - sz,

sys/uvm/uvm_addr.c

1375

0, sz, align, offset, dir, start, end - sz,

sys/uvm/uvm_addr.c

188

uvm_addr_align_forward(vaddr_t addr, vaddr_t align, vaddr_t offset)

sys/uvm/uvm_addr.c

192

KASSERT(offset < align || (align == 0 && offset == 0));

sys/uvm/uvm_addr.c

194

KASSERT((offset & PAGE_MASK) == 0);

sys/uvm/uvm_addr.c

198

adjusted += offset;

sys/uvm/uvm_addr.c

203

uvm_addr_align_backward(vaddr_t addr, vaddr_t align, vaddr_t offset)

sys/uvm/uvm_addr.c

207

KASSERT(offset < align || (align == 0 && offset == 0));

sys/uvm/uvm_addr.c

209

KASSERT((offset & PAGE_MASK) == 0);

sys/uvm/uvm_addr.c

213

adjusted += offset;

sys/uvm/uvm_addr.c

223

vaddr_t align, vaddr_t offset,

sys/uvm/uvm_addr.c

241

low_addr = uvm_addr_align_forward(tmp = low_addr, align, offset);

sys/uvm/uvm_addr.c

251

high_addr = uvm_addr_align_backward(tmp = high_addr, align, offset);

sys/uvm/uvm_addr.c

308

vaddr_t hint, vsize_t sz, vaddr_t align, vaddr_t offset,

sys/uvm/uvm_addr.c

350

sz, align, offset, before_gap, after_gap) == 0) {

sys/uvm/uvm_addr.c

375

vsize_t sz, vaddr_t align, vaddr_t offset, vm_prot_t prot, vaddr_t hint)

sys/uvm/uvm_addr.c

390

entry_out, addr_out, sz, align, offset, prot, hint);

sys/uvm/uvm_addr.c

470

vsize_t sz, vaddr_t align, vaddr_t offset,

sys/uvm/uvm_addr.c

483

align, offset, 1, uaddr->uaddr_minaddr, uaddr->uaddr_maxaddr - sz,

sys/uvm/uvm_addr.c

525

vsize_t sz, vaddr_t align, vaddr_t offset,

sys/uvm/uvm_addr.c

544

minaddr = uvm_addr_align_forward(uaddr->uaddr_minaddr, align, offset);

sys/uvm/uvm_addr.c

546

align, offset);

sys/uvm/uvm_addr.c

560

hint = uvm_addr_align_forward(tmp, align, offset);

sys/uvm/uvm_addr.c

593

sz, align, offset, before_gap, after_gap) == 0) {

sys/uvm/uvm_addr.c

721

vsize_t sz, vaddr_t align, vaddr_t offset, vm_prot_t prot, vaddr_t hint)

sys/uvm/uvm_addr.c

729

sz, align, offset, 0, 0) == 0)

sys/uvm/uvm_addr.c

807

vsize_t sz, vaddr_t align, vaddr_t offset,

sys/uvm/uvm_addr.c

833

sz, align, offset, 0, guardsz) != 0) {

sys/uvm/uvm_addr.c

919

vsize_t sz, vaddr_t align, vaddr_t offset,

sys/uvm/uvm_addr.c

982

sz, align, offset, before_gap, after_gap);

sys/uvm/uvm_addr.h

58

vsize_t sz, vaddr_t align, vaddr_t offset,

sys/uvm/uvm_amap.c

1126

amap_lookup(struct vm_aref *aref, vaddr_t offset)

sys/uvm/uvm_amap.c

1132

AMAP_B2SLOT(slot, offset);

sys/uvm/uvm_amap.c

1150

amap_lookups(struct vm_aref *aref, vaddr_t offset,

sys/uvm/uvm_amap.c

1157

AMAP_B2SLOT(slot, offset);

sys/uvm/uvm_amap.c

1183

amap_populate(struct vm_aref *aref, vaddr_t offset)

sys/uvm/uvm_amap.c

1189

AMAP_B2SLOT(slot, offset);

sys/uvm/uvm_amap.c

1204

amap_add(struct vm_aref *aref, vaddr_t offset, struct vm_anon *anon,

sys/uvm/uvm_amap.c

1211

AMAP_B2SLOT(slot, offset);

sys/uvm/uvm_amap.c

1248

amap_unadd(struct vm_aref *aref, vaddr_t offset)

sys/uvm/uvm_amap.c

1256

AMAP_B2SLOT(slot, offset);

sys/uvm/uvm_amap.c

1277

amap_adjref_anons(struct vm_amap *amap, vaddr_t offset, vsize_t len,

sys/uvm/uvm_amap.c

1295

amap_pp_adjref(amap, offset, len, refv);

sys/uvm/uvm_amap.c

1309

amap_ref(struct vm_amap *amap, vaddr_t offset, vsize_t len, int flags)

sys/uvm/uvm_amap.c

1314

amap_adjref_anons(amap, offset, len, 1, (flags & AMAP_REFALL) != 0);

sys/uvm/uvm_amap.c

1325

amap_unref(struct vm_amap *amap, vaddr_t offset, vsize_t len, boolean_t all)

sys/uvm/uvm_amap.c

1346

amap_adjref_anons(amap, offset, len, -1, all);

sys/uvm/uvm_amap.c

211

pp_getreflen(int *ppref, int offset, int *refp, int *lenp)

sys/uvm/uvm_amap.c

214

if (ppref[offset] > 0) { /* chunk size must be 1 */

sys/uvm/uvm_amap.c

215

*refp = ppref[offset] - 1; /* don't forget to adjust */

sys/uvm/uvm_amap.c

218

*refp = (ppref[offset] * -1) - 1;

sys/uvm/uvm_amap.c

219

*lenp = ppref[offset+1];

sys/uvm/uvm_amap.c

229

pp_setreflen(int *ppref, int offset, int ref, int len)

sys/uvm/uvm_amap.c

232

ppref[offset] = ref + 1;

sys/uvm/uvm_amap.c

234

ppref[offset] = (ref + 1) * -1;

sys/uvm/uvm_amap.c

235

ppref[offset+1] = len;

sys/uvm/uvm_amap.c

822

amap_splitref(struct vm_aref *origref, struct vm_aref *splitref, vaddr_t offset)

sys/uvm/uvm_amap.c

828

AMAP_B2SLOT(leftslots, offset);

sys/uvm/uvm_aobj.c

1042

for (lcv = 0, current_offset = offset ; lcv < maxpages ;

sys/uvm/uvm_aobj.c

834

uao_dropswap(&aobj->u_obj, pg->offset >> PAGE_SHIFT);

sys/uvm/uvm_aobj.c

942

uao_dropswap(uobj, pg->offset >> PAGE_SHIFT);

sys/uvm/uvm_aobj.c

971

uao_get(struct uvm_object *uobj, voff_t offset, struct vm_page **pps,

sys/uvm/uvm_aobj.c

999

for (lcv = 0, current_offset = offset ; lcv < maxpages ;

sys/uvm/uvm_device.c

350

curr_offset = entry->offset + (vaddr - entry->start);

sys/uvm/uvm_fault.c

1207

ufi->entry->offset + (flt->startva - ufi->entry->start),

sys/uvm/uvm_fault.c

1556

uao_dropswap(uobj, pg->offset >> PAGE_SHIFT);

sys/uvm/uvm_fault.c

1592

uoff = (ufi->orig_rvaddr - ufi->entry->start) + ufi->entry->offset;

sys/uvm/uvm_fault.c

865

uoff = (flt->startva - ufi->entry->start) + ufi->entry->offset;

sys/uvm/uvm_map.c

1143

entry->offset = uoffset;

sys/uvm/uvm_map.c

1247

if (e1->offset + (e1->end - e1->start) != e2->offset)

sys/uvm/uvm_map.c

1429

entry->offset = 0;

sys/uvm/uvm_map.c

2589

next->offset = 0;

sys/uvm/uvm_map.c

2608

next->offset += adj;

sys/uvm/uvm_map.c

2617

next->offset += adj;

sys/uvm/uvm_map.c

2884

(long long)entry->offset, entry->aref.ar_amap,

sys/uvm/uvm_map.c

2945

(*pr)("<%p,0x%llx> ", pg, (long long)pg->offset);

sys/uvm/uvm_map.c

2977

pg->uobject, pg->uanon, (long long)pg->offset);

sys/uvm/uvm_map.c

3487

new_entry->offset = old_entry->offset;

sys/uvm/uvm_map.c

3505

new_entry->offset += off;

sys/uvm/uvm_map.c

3908

entry->offset = 0;

sys/uvm/uvm_map.c

4493

cp_start - entry->start + entry->offset,

sys/uvm/uvm_map.c

4494

cp_end - entry->start + entry->offset, flags);

sys/uvm/uvm_map.c

4974

entry->offset = 0;

sys/uvm/uvm_map.c

5005

uvm_map_mquery(struct vm_map *map, vaddr_t *addr_p, vsize_t sz, voff_t offset,

sys/uvm/uvm_map.c

5017

if (offset != UVM_UNKNOWN_OFFSET) {

sys/uvm/uvm_map.c

5019

pmap_offset = PMAP_PREFER_OFFSET(offset);

sys/uvm/uvm_map.c

5026

if (!(flags & UVM_FLAG_FIXED) && offset != UVM_UNKNOWN_OFFSET) {

sys/uvm/uvm_map.c

5361

kve->kve_offset = entry->offset;

sys/uvm/uvm_map.c

874

entry->offset = 0;

sys/uvm/uvm_map.h

154

voff_t offset; /* offset into object */

sys/uvm/uvm_object.c

132

voff_t offset = start;

sys/uvm/uvm_object.c

143

error = (*uobj->pgops->pgo_get)(uobj, offset, pgs, &npages, 0,

sys/uvm/uvm_object.c

174

offset += (voff_t)npages << PAGE_SHIFT;

sys/uvm/uvm_object.c

182

uvm_obj_unwire(uobj, start, offset);

sys/uvm/uvm_object.c

196

off_t offset;

sys/uvm/uvm_object.c

199

for (offset = start; offset < end; offset += PAGE_SIZE) {

sys/uvm/uvm_object.c

200

pg = uvm_pagelookup(uobj, offset);

sys/uvm/uvm_page.c

1003

pg->offset = 0xdeadbeef;

sys/uvm/uvm_page.c

1213

p.offset = off;

sys/uvm/uvm_page.c

704

pg->offset = off;

sys/uvm/uvm_page.c

843

voff_t offset;

sys/uvm/uvm_page.c

856

offset = off + ptoa(i++);

sys/uvm/uvm_page.c

857

tpg = uvm_pagelookup(obj, offset);

sys/uvm/uvm_page.c

867

uvm_pagealloc_pg(pg, obj, offset, NULL);

sys/uvm/uvm_page.c

87

return a->offset < b->offset ? -1 : a->offset > b->offset;

sys/uvm/uvm_page.c

938

pg->offset = newoff;

sys/uvm/uvm_page.h

104

voff_t offset; /* [o] offset into object */

sys/uvm/uvm_pager.c

347

uobj->pgops->pgo_cluster(uobj, center->offset, &lo, &hi);

sys/uvm/uvm_pager.c

361

center_idx = (center->offset - lo) >> PAGE_SHIFT;

sys/uvm/uvm_pager.c

377

curoff = center->offset + incr;

sys/uvm/uvm_pager.c

651

pg->offset >> PAGE_SHIFT);

sys/uvm/uvm_pager.c

663

pg->offset >> PAGE_SHIFT, 0);

sys/uvm/uvm_pdaemon.c

438

result = uao_set_swslot(uobj, pg->offset >> PAGE_SHIFT, slot);

sys/uvm/uvm_pdaemon.c

507

slot = uao_dropswap(pg->uobject, pg->offset >> PAGE_SHIFT);

sys/uvm/uvm_vnode.c

1146

file_offset = pps[0]->offset;

sys/uvm/uvm_vnode.c

791

(long long)pp->offset);

sys/uvm/uvm_vnode.c

836

uvn_cluster(struct uvm_object *uobj, voff_t offset, voff_t *loffset,

sys/uvm/uvm_vnode.c

840

*loffset = offset;

sys/uvm/uvm_vnode.c

909

uvn_get(struct uvm_object *uobj, voff_t offset, struct vm_page **pps,

sys/uvm/uvm_vnode.c

936

for (lcv = 0, current_offset = offset ; lcv < *npagesp ;

sys/uvm/uvm_vnode.c

997

for (lcv = 0, current_offset = offset;

usr.bin/calendar/day.c

168

offset = tp->tm_wday == 5 ? 3 : 1;

usr.bin/calendar/day.c

170

offset = 0; /* Except not when range is set explicitly */

usr.bin/calendar/day.c

427

if (((v1 = offset + f_dayAfter) < 50) && (interval == YEARLY)) {

usr.bin/calendar/day.c

53

int *cumdays, offset;

usr.bin/calendar/day.c

548

if (tdiff <= offset + f_dayAfter ||

usr.bin/calendar/day.c

623

int offset;

usr.bin/calendar/day.c

626

offset = strlen(s);

usr.bin/calendar/day.c

632

switch(*(s + offset - 2)) {

usr.bin/calendar/day.c

635

return(atoi(s + offset - 2));

usr.bin/calendar/day.c

644

if (offset > 4 && !strcasecmp(s + offset - 4, "last"))

usr.bin/calendar/day.c

646

else if (offset > 5 && !strcasecmp(s + offset - 5, "first"))

usr.bin/calendar/day.c

648

else if (offset > 6 && !strcasecmp(s + offset - 6, "second"))

usr.bin/calendar/day.c

650

else if (offset > 5 && !strcasecmp(s + offset - 5, "third"))

usr.bin/calendar/day.c

652

else if (offset > 6 && !strcasecmp(s + offset - 6, "fourth"))

usr.bin/col/col.c

480

addto_lineno(int *lno, int offset)

usr.bin/col/col.c

482

if (offset > 0) {

usr.bin/col/col.c

483

if (*lno >= INT_MAX - offset)

usr.bin/col/col.c

486

if (*lno < INT_MIN - offset)

usr.bin/col/col.c

489

*lno += offset;

usr.bin/comm/comm.c

156

show(FILE *fp, char *offset, char *buf)

usr.bin/comm/comm.c

158

while (printf("%s%s", offset, buf) >= 0 && fgets(buf, MAXLINELEN, fp))

usr.bin/ctfconv/parse.c

1058

subparse_member(struct dwdie *die, size_t psz, struct itype *it, size_t offset)

usr.bin/ctfconv/parse.c

1126

ref = die->die_offset - offset;

usr.bin/ctfdump/ctfdump.c

420

uint32_t idx = 1, offset = cth.cth_typeoff;

usr.bin/ctfdump/ctfdump.c

423

while (offset < stroff) {

usr.bin/ctfdump/ctfdump.c

424

ctf_dump_type(&cth, data, dlen, stroff, &offset, idx++);

usr.bin/ctfdump/ctfdump.c

430

uint32_t offset = 0;

usr.bin/ctfdump/ctfdump.c

433

while (offset < cth.cth_strlen) {

usr.bin/ctfdump/ctfdump.c

434

str = ctf_off2name(&cth, data, dlen, offset);

usr.bin/ctfdump/ctfdump.c

436

printf(" [%u] ", offset);

usr.bin/ctfdump/ctfdump.c

438

offset += printf("%s\n", str);

usr.bin/ctfdump/ctfdump.c

441

offset++;

usr.bin/ctfdump/ctfdump.c

455

uint32_t stroff, uint32_t *offset, uint32_t idx)

usr.bin/ctfdump/ctfdump.c

457

const char *p = data + *offset;

usr.bin/ctfdump/ctfdump.c

593

errx(1, "incorrect type %u at offset %u", kind, *offset);

usr.bin/ctfdump/ctfdump.c

598

*offset += toff;

usr.bin/ctfdump/ctfdump.c

647

uint32_t offset)

usr.bin/ctfdump/ctfdump.c

651

if (CTF_NAME_STID(offset) != CTF_STRTAB_0)

usr.bin/ctfdump/ctfdump.c

654

if (CTF_NAME_OFFSET(offset) >= cth->cth_strlen)

usr.bin/ctfdump/ctfdump.c

657

if (cth->cth_stroff + CTF_NAME_OFFSET(offset) >= dlen)

usr.bin/ctfdump/ctfdump.c

660

name = data + cth->cth_stroff + CTF_NAME_OFFSET(offset);

usr.bin/cvs/diff_internals.c

1005

ptrdiff_t offset = context_vec_ptr - context_vec_start;

usr.bin/cvs/diff_internals.c

1010

context_vec_ptr = context_vec_start + offset;

usr.bin/diff/diffreg.c

1007

ptrdiff_t offset = context_vec_ptr - context_vec_start;

usr.bin/diff/diffreg.c

1012

context_vec_ptr = context_vec_start + offset;

usr.bin/dig/lib/dns/compress.c

138

*offset = node->offset;

usr.bin/dig/lib/dns/compress.c

144

const dns_name_t *prefix, uint16_t offset)

usr.bin/dig/lib/dns/compress.c

167

if (offset >= 0x4000)

usr.bin/dig/lib/dns/compress.c

173

toffset = (uint16_t)(offset + (length - tlength));

usr.bin/dig/lib/dns/compress.c

185

node->offset = toffset;

usr.bin/dig/lib/dns/compress.c

197

dns_compress_rollback(dns_compress_t *cctx, uint16_t offset) {

usr.bin/dig/lib/dns/compress.c

209

while (node != NULL && node->offset >= offset) {

usr.bin/dig/lib/dns/compress.c

90

dns_name_t *prefix, uint16_t *offset)

usr.bin/dig/lib/dns/compress.c

97

REQUIRE(offset != NULL);

usr.bin/dig/lib/dns/include/dns/compress.h

120

dns_name_t *prefix, uint16_t *offset);

usr.bin/dig/lib/dns/include/dns/compress.h

139

const dns_name_t *prefix, uint16_t offset);

usr.bin/dig/lib/dns/include/dns/compress.h

155

dns_compress_rollback(dns_compress_t *cctx, uint16_t offset);

usr.bin/dig/lib/dns/include/dns/compress.h

42

uint16_t offset;

usr.bin/dig/lib/dns/name.c

1161

unsigned int offset, count, length, nlabels;

usr.bin/dig/lib/dns/name.c

1167

offset = 0;

usr.bin/dig/lib/dns/name.c

1170

while (offset != length) {

usr.bin/dig/lib/dns/name.c

1172

offsets[nlabels++] = offset;

usr.bin/dig/lib/dns/name.c

1174

offset++;

usr.bin/dig/lib/dns/name.c

1176

offset += count;

usr.bin/dig/lib/dns/name.c

1178

INSIST(offset <= length);

usr.bin/dig/lib/dns/name.c

1188

set_name->length = offset;

usr.bin/dig/lib/dns/name.c

1195

INSIST(offset == name->length);

usr.bin/dig/lib/dns/name.c

1372

uint16_t offset;

usr.bin/dig/lib/dns/name.c

1397

offset = target->used; /*XXX*/

usr.bin/dig/lib/dns/name.c

1434

dns_compress_add(cctx, name, &gp, offset);

usr.bin/dig/lib/dns/name.c

1444

dns_compress_add(cctx, name, name, offset);

usr.bin/dig/lib/isc/include/isc/socket.h

93

unsigned int offset; /*%< offset into buffer list */

usr.bin/dig/lib/isc/unix/socket.c

813

ev->offset = 0;

usr.bin/file/magic-load.c

533

ml->offset = 0;

usr.bin/file/magic-load.c

548

endptr = magic_strtoll(s, &ml->offset);

usr.bin/file/magic-load.c

553

if (ml->offset < 0 && !ml->offset_relative) {

usr.bin/file/magic-test.c

1021

m.rm_so = ms->offset;

usr.bin/file/magic-test.c

1032

ms->offset = m.rm_so;

usr.bin/file/magic-test.c

1034

ms->offset = m.rm_eo;

usr.bin/file/magic-test.c

1082

if (range > (uint64_t)ms->size - ms->offset)

usr.bin/file/magic-test.c

1083

range = ms->size - ms->offset;

usr.bin/file/magic-test.c

1088

if (end > ms->size - ms->offset) {

usr.bin/file/magic-test.c

1089

if (size > ms->size - ms->offset)

usr.bin/file/magic-test.c

1092

end = ms->size - ms->offset - size;

usr.bin/file/magic-test.c

1099

start = ms->base + ms->offset;

usr.bin/file/magic-test.c

1105

n = magic_test_eq(start, ms->size - ms->offset, ml->test_string,

usr.bin/file/magic-test.c

1119

n = magic_test_eq(start + i, ms->size - ms->offset - i,

usr.bin/file/magic-test.c

1133

magic_add_string(ms, ml, found, ms->size - ms->offset);

usr.bin/file/magic-test.c

1135

ms->offset = (found + size) - ms->base;

usr.bin/file/magic-test.c

1248

saved_offset = ms->offset;

usr.bin/file/magic-test.c

1255

ms->offset = saved_offset;

usr.bin/file/magic-test.c

1262

ms->offset = saved_offset;

usr.bin/file/magic-test.c

1270

int64_t offset, wanted, next;

usr.bin/file/magic-test.c

1277

wanted = ms->start + ml->offset;

usr.bin/file/magic-test.c

1281

if (wanted < 0 && (size_t)-wanted > ms->offset)

usr.bin/file/magic-test.c

1283

if (wanted > 0 && ms->offset + wanted > ms->size)

usr.bin/file/magic-test.c

1285

next = ms->offset + ml->indirect_offset;

usr.bin/file/magic-test.c

1332

if (wanted < 0 && (size_t)-wanted > ms->offset)

usr.bin/file/magic-test.c

1334

if (wanted > 0 && ms->offset + wanted > ms->size)

usr.bin/file/magic-test.c

1336

offset = ms->offset + wanted;

usr.bin/file/magic-test.c

1338

offset = wanted;

usr.bin/file/magic-test.c

1339

if (offset < 0 || (size_t)offset > ms->size)

usr.bin/file/magic-test.c

1341

ms->offset = offset; /* test function may update */

usr.bin/file/magic-test.c

1360

"'%s'", ml->type_string, ml->test_operator, offset,

usr.bin/file/magic-test.c

1361

ms->offset, ml->result == NULL ? "" : ml->result);

usr.bin/file/magic-test.c

1372

magic_warn(ml, "use %s at offset %lld", ml->name, offset);

usr.bin/file/magic-test.c

1373

magic_test_children(named, ms, offset, *ml->name == '^');

usr.bin/file/magic-test.c

1399

ms.offset = 0;

usr.bin/file/magic-test.c

173

magic_copy_from(struct magic_state *ms, ssize_t offset, void *dst, size_t size)

usr.bin/file/magic-test.c

175

if (offset < 0)

usr.bin/file/magic-test.c

176

offset = ms->offset;

usr.bin/file/magic-test.c

177

if (offset + size > ms->size)

usr.bin/file/magic-test.c

179

memcpy(dst, ms->base + offset, size);

usr.bin/file/magic-test.c

230

size_t outlen, offset;

usr.bin/file/magic-test.c

235

for (offset = 0; offset < outlen; offset++) {

usr.bin/file/magic-test.c

236

if (s[offset] == '\0' || !isprint((u_char)s[offset])) {

usr.bin/file/magic-test.c

237

outlen = offset;

usr.bin/file/magic-test.c

341

ms->offset += sizeof value;

usr.bin/file/magic-test.c

377

ms->offset += sizeof value;

usr.bin/file/magic-test.c

413

ms->offset += sizeof value;

usr.bin/file/magic-test.c

449

ms->offset += sizeof value;

usr.bin/file/magic-test.c

481

ms->offset += sizeof value;

usr.bin/file/magic-test.c

517

ms->offset += sizeof value;

usr.bin/file/magic-test.c

553

ms->offset += sizeof value;

usr.bin/file/magic-test.c

589

ms->offset += sizeof value;

usr.bin/file/magic-test.c

615

ms->offset += sizeof value0;

usr.bin/file/magic-test.c

641

ms->offset += sizeof value0;

usr.bin/file/magic-test.c

679

s = ms->base + ms->offset;

usr.bin/file/magic-test.c

680

slen = ms->size - ms->offset;

usr.bin/file/magic-test.c

708

ms->offset = s - ms->base + ml->test_string_size;

usr.bin/file/magic-test.c

733

s = ms->base + ms->offset;

usr.bin/file/magic-test.c

734

if (ms->size - ms->offset < 1)

usr.bin/file/magic-test.c

737

if (slen + 1 > ms->size - ms->offset)

usr.bin/file/magic-test.c

768

ms->offset += slen + 1;

usr.bin/file/magic-test.c

814

ms->offset += sizeof value;

usr.bin/file/magic-test.c

860

ms->offset += sizeof value;

usr.bin/file/magic-test.c

906

ms->offset += sizeof value;

usr.bin/file/magic-test.c

952

ms->offset += sizeof value;

usr.bin/file/magic.h

115

int64_t offset;

usr.bin/file/magic.h

170

size_t offset;

usr.bin/file/text.c

113

size_t offset;

usr.bin/file/text.c

115

for (offset = 0; offset < size; offset++) {

usr.bin/file/text.c

116

if (!f(data[offset]))

usr.bin/grep/util.c

201

regoff_t offset;

usr.bin/grep/util.c

220

offset = 0;

usr.bin/grep/util.c

224

if (offset)

usr.bin/grep/util.c

226

r = grep_search(&fg_pattern[i], l->dat + offset,

usr.bin/grep/util.c

227

l->len - offset, &pmatch, flags);

usr.bin/grep/util.c

228

pmatch.rm_so += offset;

usr.bin/grep/util.c

229

pmatch.rm_eo += offset;

usr.bin/grep/util.c

232

if (offset)

usr.bin/grep/util.c

234

pmatch.rm_so = offset;

usr.bin/grep/util.c

281

offset = pmatch.rm_eo;

usr.bin/indent/io.c

350

int offset = p - in_buffer;

usr.bin/indent/io.c

355

p = in_buffer + offset;

usr.bin/infocmp/infocmp.c

1500

int offset;

usr.bin/infocmp/infocmp.c

1503

_nc_first_db(&state, &offset);

usr.bin/infocmp/infocmp.c

1504

while ((path2 = _nc_next_db(&state, &offset)) != 0) {

usr.bin/less/ch.c

63

unsigned int offset;

usr.bin/less/ch.c

71

#define ch_offset thisfile->offset

usr.bin/less/ch.c

753

thisfile->offset = 0;

usr.bin/lex/gen.c

275

int offset = base[i];

usr.bin/lex/gen.c

277

chk[offset] = EOB_POSITION;

usr.bin/lex/gen.c

278

chk[offset - 1] = ACTION_POSITION;

usr.bin/lex/gen.c

279

nxt[offset - 1] = anum; /* action number */

usr.bin/lex/gen.c

396

int offset = base[i];

usr.bin/lex/gen.c

398

chk[offset] = EOB_POSITION;

usr.bin/lex/gen.c

399

chk[offset - 1] = ACTION_POSITION;

usr.bin/lex/gen.c

400

nxt[offset - 1] = anum; /* action number */

usr.bin/mail/def.h

100

#define positionof(block, offset) ((off_t)(block) * 4096 + (offset))

usr.bin/mail/fio.c

135

this.m_block = blockof(offset);

usr.bin/mail/fio.c

136

this.m_offset = offsetof(offset);

usr.bin/mail/fio.c

159

offset += count;

usr.bin/mail/fio.c

66

setptr(FILE *ibuf, off_t offset)

usr.bin/mail/fio.c

81

if (offset == 0) {

usr.bin/mail/fio.c

85

(void)fseeko(ibuf, offset, SEEK_SET);

usr.bin/mail/fio.c

93

offset = ftell(otf);

usr.bin/mandoc/dbm_map.c

133

dbm_get(int32_t offset)

usr.bin/mandoc/dbm_map.c

135

offset = be32toh(offset);

usr.bin/mandoc/dbm_map.c

136

if (offset < 0) {

usr.bin/mandoc/dbm_map.c

137

warnx("dbm_get: Database corrupt: offset %d", offset);

usr.bin/mandoc/dbm_map.c

140

if (offset >= max_offset) {

usr.bin/mandoc/dbm_map.c

142

offset, max_offset);

usr.bin/mandoc/dbm_map.c

145

return dbm_base + offset;

usr.bin/mandoc/dbm_map.c

154

dbm_getint(int32_t offset)

usr.bin/mandoc/dbm_map.c

156

return (int32_t *)dbm_base + offset;

usr.bin/mandoc/man_term.c

1006

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/man_term.c

1041

p->tcol->offset = 0;

usr.bin/mandoc/man_term.c

1054

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/man_term.c

1064

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/man_term.c

1081

p->tcol->offset = 0;

usr.bin/mandoc/man_term.c

1106

p->tcol->offset = 0;

usr.bin/mandoc/man_term.c

1118

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/man_term.c

1119

p->tcol->rmargin = p->tcol->offset + vollen + titlen <

usr.bin/mandoc/man_term.c

1131

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/man_term.c

1138

p->tcol->offset = 0;

usr.bin/mandoc/man_term.c

164

mt.offset = term_len(p, p->defindent);

usr.bin/mandoc/man_term.c

249

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/man_term.c

383

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

404

p->tcol->offset -= p->tcol->offset > v ? v : p->tcol->offset;

usr.bin/mandoc/man_term.c

406

p->tcol->offset += v;

usr.bin/mandoc/man_term.c

408

p->tcol->offset = v;

usr.bin/mandoc/man_term.c

409

if (p->tcol->offset > SHRT_MAX)

usr.bin/mandoc/man_term.c

410

p->tcol->offset = term_len(p, p->defindent);

usr.bin/mandoc/man_term.c

456

if (len < 0 && (size_t)(-len) > mt->offset)

usr.bin/mandoc/man_term.c

457

len = -mt->offset;

usr.bin/mandoc/man_term.c

46

size_t offset; /* Default offset in basic units. */

usr.bin/mandoc/man_term.c

464

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

465

p->tcol->rmargin = mt->offset + len;

usr.bin/mandoc/man_term.c

491

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

510

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

545

if (len < 0 && (size_t)(-len) > mt->offset)

usr.bin/mandoc/man_term.c

546

len = -mt->offset;

usr.bin/mandoc/man_term.c

555

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

556

p->tcol->rmargin = mt->offset + len;

usr.bin/mandoc/man_term.c

561

p->tcol->offset = mt->offset + len;

usr.bin/mandoc/man_term.c

584

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

620

if (len < 0 && (size_t)(-len) > mt->offset)

usr.bin/mandoc/man_term.c

621

len = -mt->offset;

usr.bin/mandoc/man_term.c

630

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

631

p->tcol->rmargin = mt->offset + len;

usr.bin/mandoc/man_term.c

644

p->tcol->offset = mt->offset + len;

usr.bin/mandoc/man_term.c

666

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

681

mt->offset = term_len(p, p->defindent);

usr.bin/mandoc/man_term.c

698

p->tcol->offset = term_len(p, p->defindent) / 2 + 1;

usr.bin/mandoc/man_term.c

699

p->tcol->rmargin = mt->offset;

usr.bin/mandoc/man_term.c

700

p->trailspace = mt->offset / term_len(p, 1);

usr.bin/mandoc/man_term.c

704

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

723

mt->offset = term_len(p, p->defindent);

usr.bin/mandoc/man_term.c

740

p->tcol->offset = 0;

usr.bin/mandoc/man_term.c

741

p->tcol->rmargin = mt->offset;

usr.bin/mandoc/man_term.c

742

p->trailspace = mt->offset / term_len(p, 1);

usr.bin/mandoc/man_term.c

746

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

797

if (n->aux < 0 && (size_t)(-n->aux) > mt->offset)

usr.bin/mandoc/man_term.c

798

n->aux = -mt->offset;

usr.bin/mandoc/man_term.c

802

mt->offset += n->aux;

usr.bin/mandoc/man_term.c

803

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

826

mt->offset -= n->parent->head->aux;

usr.bin/mandoc/man_term.c

827

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

857

p->tcol->offset = mt->offset;

usr.bin/mandoc/man_term.c

858

p->tcol->rmargin = mt->offset + len;

usr.bin/mandoc/man_term.c

866

p->tcol->offset = mt->offset + len;

usr.bin/mandoc/man_term.c

888

p->tcol->offset = mt->offset;

usr.bin/mandoc/mdoc_term.c

1000

p->tcol->rmargin = p->tcol->offset + term_len(p, 1);

usr.bin/mandoc/mdoc_term.c

1285

p->tcol->offset = term_len(p, p->defindent);

usr.bin/mandoc/mdoc_term.c

1308

p->tcol->offset = 0;

usr.bin/mandoc/mdoc_term.c

1328

p->tcol->offset += term_len(p, p->defindent + 1);

usr.bin/mandoc/mdoc_term.c

1355

p->tcol->rmargin = p->tcol->offset + term_len(p, 4);

usr.bin/mandoc/mdoc_term.c

1368

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/mdoc_term.c

1431

int offset; /* In basic units. */

usr.bin/mandoc/mdoc_term.c

1445

p->tcol->offset += term_len(p, p->defindent + 1);

usr.bin/mandoc/mdoc_term.c

1447

p->tcol->offset += term_len(p, (p->defindent + 1) * 2);

usr.bin/mandoc/mdoc_term.c

1449

offset = a2width(p, n->norm->Bd.offs);

usr.bin/mandoc/mdoc_term.c

1450

if (offset < 0 && (size_t)(-offset) > p->tcol->offset)

usr.bin/mandoc/mdoc_term.c

1451

p->tcol->offset = 0;

usr.bin/mandoc/mdoc_term.c

1452

else if (offset < SHRT_MAX)

usr.bin/mandoc/mdoc_term.c

1453

p->tcol->offset += offset;

usr.bin/mandoc/mdoc_term.c

1519

p->tcol->offset = term_len(p, p->defindent) / 2 + 1;

usr.bin/mandoc/mdoc_term.c

1523

p->tcol->offset = term_len(p, p->defindent);

usr.bin/mandoc/mdoc_term.c

1759

p->tcol->rmargin = p->tcol->offset + term_len(p, 4);

usr.bin/mandoc/mdoc_term.c

1771

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/mdoc_term.c

304

size_t offset, rmargin; /* In basic units. */

usr.bin/mandoc/mdoc_term.c

327

offset = p->tcol->offset;

usr.bin/mandoc/mdoc_term.c

436

p->tcol->offset = offset;

usr.bin/mandoc/mdoc_term.c

459

p->tcol->offset = 0;

usr.bin/mandoc/mdoc_term.c

471

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/mdoc_term.c

481

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/mdoc_term.c

490

p->tcol->offset = 0;

usr.bin/mandoc/mdoc_term.c

520

p->tcol->offset = 0;

usr.bin/mandoc/mdoc_term.c

532

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/mdoc_term.c

533

p->tcol->rmargin = p->tcol->offset + vollen + titlen <

usr.bin/mandoc/mdoc_term.c

545

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/mdoc_term.c

552

p->tcol->offset = 0;

usr.bin/mandoc/mdoc_term.c

633

int offset; /* Start of column in basic units. */

usr.bin/mandoc/mdoc_term.c

669

offset = 0;

usr.bin/mandoc/mdoc_term.c

678

offset = a2width(p, bl->norm->Bl.offs);

usr.bin/mandoc/mdoc_term.c

679

if (offset < 0 && (size_t)(-offset) > p->tcol->offset)

usr.bin/mandoc/mdoc_term.c

680

offset = -p->tcol->offset;

usr.bin/mandoc/mdoc_term.c

681

else if (offset > SHRT_MAX)

usr.bin/mandoc/mdoc_term.c

682

offset = 0;

usr.bin/mandoc/mdoc_term.c

713

offset += term_hspan(p, &su) + dcol;

usr.bin/mandoc/mdoc_term.c

743

if (width < 0 && (size_t)(-width) > p->tcol->offset)

usr.bin/mandoc/mdoc_term.c

744

width = -p->tcol->offset;

usr.bin/mandoc/mdoc_term.c

844

p->tcol->offset += offset;

usr.bin/mandoc/mdoc_term.c

854

p->tcol->rmargin = p->tcol->offset + width;

usr.bin/mandoc/mdoc_term.c

856

p->tcol->offset += width;

usr.bin/mandoc/mdoc_term.c

860

p->tcol->rmargin = p->tcol->offset + width;

usr.bin/mandoc/mdoc_term.c

983

p->tcol->offset += term_len(p, 6);

usr.bin/mandoc/mdoc_term.c

985

p->tcol->offset += term_len(p, 1) +

usr.bin/mandoc/out.c

116

size_t offset, size_t rmargin)

usr.bin/mandoc/out.c

392

if (rmargin <= offset + xwidth)

usr.bin/mandoc/out.c

394

xwidth = rmargin - offset - xwidth;

usr.bin/mandoc/preconv.c

110

preconv_cue(const struct buf *b, size_t offset)

usr.bin/mandoc/preconv.c

115

ln = b->buf + offset;

usr.bin/mandoc/preconv.c

116

sz = b->sz - offset;

usr.bin/mandoc/read.c

564

size_t offset;

usr.bin/mandoc/read.c

600

offset = 3;

usr.bin/mandoc/read.c

603

offset = 0;

usr.bin/mandoc/read.c

606

mparse_buf_r(curp, blk, offset, 1);

usr.bin/mandoc/roff_term.c

171

p->tcol->offset -= pouse;

usr.bin/mandoc/roff_term.c

188

pomin = -p->tcol->offset;

usr.bin/mandoc/roff_term.c

191

p->tcol->offset += pouse;

usr.bin/mandoc/roff_term.c

254

if (p->tcol->offset + len <= maxoff)

usr.bin/mandoc/roff_term.c

256

else if (p->tcol->offset < maxoff)

usr.bin/mandoc/roff_term.c

257

p->ti = maxoff - p->tcol->offset;

usr.bin/mandoc/roff_term.c

262

if ((size_t)len < p->tcol->offset)

usr.bin/mandoc/roff_term.c

265

p->ti = -p->tcol->offset;

usr.bin/mandoc/roff_term.c

270

p->ti = len - p->tcol->offset;

usr.bin/mandoc/roff_term.c

273

p->tcol->offset += p->ti;

usr.bin/mandoc/roff_term.c

71

p->tcol->offset = p->tcol->rmargin;

usr.bin/mandoc/tbl_term.c

157

static size_t offset; /* Of the table as a whole. */

usr.bin/mandoc/tbl_term.c

176

save_offset = tp->tcol->offset;

usr.bin/mandoc/tbl_term.c

192

tblcalc(&tp->tbl, sp, tp->tcol->offset, tp->tcol->rmargin);

usr.bin/mandoc/tbl_term.c

196

offset = tp->tcol->offset;

usr.bin/mandoc/tbl_term.c

223

if (offset + tsz > tp->tcol->rmargin)

usr.bin/mandoc/tbl_term.c

225

offset = offset + tp->tcol->rmargin > tsz ?

usr.bin/mandoc/tbl_term.c

226

((offset + tp->tcol->rmargin - tsz) / enw / 2) *

usr.bin/mandoc/tbl_term.c

228

tp->tcol->offset = offset;

usr.bin/mandoc/tbl_term.c

243

tp->tcol->offset = offset;

usr.bin/mandoc/tbl_term.c

253

coloff = tp->tcol->offset;

usr.bin/mandoc/tbl_term.c

269

tp->tcol->offset = coloff;

usr.bin/mandoc/tbl_term.c

290

tp->tcol->offset = coloff + enw;

usr.bin/mandoc/tbl_term.c

300

coloff = tp->tcols[1].offset;

usr.bin/mandoc/tbl_term.c

351

(*tp->advance)(tp, tp->tcols->offset);

usr.bin/mandoc/tbl_term.c

395

tp->tcol->offset += enw;

usr.bin/mandoc/tbl_term.c

469

tp->tcol->offset -= enw;

usr.bin/mandoc/tbl_term.c

564

if (tp->tcol->offset > tp->viscol)

usr.bin/mandoc/tbl_term.c

567

tp->tcol->offset - tp->viscol);

usr.bin/mandoc/tbl_term.c

597

tp->tcol->offset = save_offset;

usr.bin/mandoc/tbl_term.c

637

(*tp->advance)(tp, tp->tcols->offset);

usr.bin/mandoc/tbl_term.c

815

target = tp->tcol->offset + len;

usr.bin/mandoc/term.c

110

vbl = (p->flags & TERMP_NOPAD) || p->tcol->offset < p->viscol ?

usr.bin/mandoc/term.c

111

0 : p->tcol->offset - p->viscol;

usr.bin/mandoc/term.c

227

p->tcol->rmargin : p->tcol->offset;

usr.bin/mandoc/term.c

706

if (p->tcol->offset > (size_t)(-bu)) {

usr.bin/mandoc/term.c

708

p->tcol->offset += bu;

usr.bin/mandoc/term.c

710

p->ti -= p->tcol->offset;

usr.bin/mandoc/term.c

711

p->tcol->offset = 0;

usr.bin/mandoc/term.c

720

if (p->tcol->rmargin <= p->tcol->offset)

usr.bin/mandoc/term.c

722

lsz = p->tcol->rmargin - p->tcol->offset;

usr.bin/mandoc/term.h

54

size_t offset; /* Current left margin [BU]. */

usr.bin/mandoc/term_ascii.c

220

if ((int)p->tcol->offset > p->ti)

usr.bin/mandoc/term_ascii.c

221

p->tcol->offset -= p->ti;

usr.bin/mandoc/term_ascii.c

223

p->tcol->offset = 0;

usr.bin/mandoc/term_ascii.c

409

if ((int)p->tcol->offset > p->ti)

usr.bin/mandoc/term_ascii.c

410

p->tcol->offset -= p->ti;

usr.bin/mandoc/term_ascii.c

412

p->tcol->offset = 0;

usr.bin/mandoc/term_ps.c

1255

if ((int)p->tcol->offset > p->ti)

usr.bin/mandoc/term_ps.c

1256

p->tcol->offset -= p->ti;

usr.bin/mandoc/term_ps.c

1258

p->tcol->offset = 0;

usr.bin/mg/undo.c

264

undo_add_insert(struct line *lp, int offset, int size)

usr.bin/mg/undo.c

275

reg.r_offset = offset;

usr.bin/mg/undo.c

278

pos = find_dot(lp, offset);

usr.bin/mg/undo.c

311

undo_add_delete(struct line *lp, int offset, int size, int isreg)

usr.bin/mg/undo.c

322

reg.r_offset = offset;

usr.bin/mg/undo.c

325

pos = find_dot(lp, offset);

usr.bin/mg/undo.c

327

if (offset == llength(lp)) /* if it's a newline... */

usr.bin/mg/undo.c

367

undo_add_change(struct line *lp, int offset, int size)

usr.bin/mg/undo.c

373

undo_add_delete(lp, offset, size, 0);

usr.bin/mg/undo.c

374

undo_add_insert(lp, offset, size);

usr.bin/mg/undo.c

487

int offset, save;

usr.bin/mg/undo.c

546

&offset, &lineno) == FALSE) {

usr.bin/mg/undo.c

553

curwp->w_doto = offset;

usr.bin/mg/undo.c

567

offset = curwp->w_doto;

usr.bin/mg/undo.c

571

curwp->w_doto = offset;

usr.bin/mg/undo.c

64

find_lo(int pos, struct line **olp, int *offset, int *lnum)

usr.bin/mg/undo.c

75

*offset = 0;

usr.bin/mg/undo.c

81

*offset = pos;

usr.bin/openssl/asn1pars.c

195

.opt.value = &cfg.offset,

usr.bin/openssl/asn1pars.c

377

if (cfg.offset >= num) {

usr.bin/openssl/asn1pars.c

381

num -= cfg.offset;

usr.bin/openssl/asn1pars.c

386

if (BIO_write(derout, str + cfg.offset,

usr.bin/openssl/asn1pars.c

393

if (!cfg.noout && !ASN1_parse_dump(out, &str[cfg.offset], cfg.length,

usr.bin/openssl/asn1pars.c

85

int offset;

usr.bin/patch/patch.c

1077

patch_match(LINENUM base, LINENUM offset, LINENUM fuzz)

usr.bin/patch/patch.c

1086

for (iline = base + offset + fuzz; pline <= pat_lines; pline++, iline++) {

usr.bin/patch/patch.c

1087

ilineptr = ifetch(iline, offset >= 0);

usr.bin/patch/patch.c

712

LINENUM offset;

usr.bin/patch/patch.c

731

for (offset = 1; ; offset++) {

usr.bin/patch/patch.c

732

bool check_after = (offset <= max_pos_offset);

usr.bin/patch/patch.c

733

bool check_before = (offset <= max_neg_offset);

usr.bin/patch/patch.c

735

if (check_after && patch_match(first_guess, offset, fuzz)) {

usr.bin/patch/patch.c

739

last_offset, offset);

usr.bin/patch/patch.c

741

last_offset = offset;

usr.bin/patch/patch.c

742

return first_guess + offset;

usr.bin/patch/patch.c

743

} else if (check_before && patch_match(first_guess, -offset, fuzz)) {

usr.bin/patch/patch.c

747

last_offset, -offset);

usr.bin/patch/patch.c

749

last_offset = -offset;

usr.bin/patch/patch.c

750

return first_guess - offset;

usr.bin/pkgconf/libpkgconf/fragment.c

503

ptrdiff_t offset = dst - out;

usr.bin/pkgconf/libpkgconf/fragment.c

506

dst = out + offset;

usr.bin/pkgconf/libpkgconf/personality.c

162

typedef void (*personality_keyword_func_t)(pkgconf_cross_personality_t *p, const char *keyword, const size_t lineno, const ptrdiff_t offset, char *value);

usr.bin/pkgconf/libpkgconf/personality.c

166

const ptrdiff_t offset;

usr.bin/pkgconf/libpkgconf/personality.c

170

personality_bool_func(pkgconf_cross_personality_t *p, const char *keyword, const size_t lineno, const ptrdiff_t offset, char *value)

usr.bin/pkgconf/libpkgconf/personality.c

175

bool *dest = (bool *)((char *) p + offset);

usr.bin/pkgconf/libpkgconf/personality.c

180

personality_copy_func(pkgconf_cross_personality_t *p, const char *keyword, const size_t lineno, const ptrdiff_t offset, char *value)

usr.bin/pkgconf/libpkgconf/personality.c

185

char **dest = (char **)((char *) p + offset);

usr.bin/pkgconf/libpkgconf/personality.c

190

personality_fragment_func(pkgconf_cross_personality_t *p, const char *keyword, const size_t lineno, const ptrdiff_t offset, char *value)

usr.bin/pkgconf/libpkgconf/personality.c

195

pkgconf_list_t *dest = (pkgconf_list_t *)((char *) p + offset);

usr.bin/pkgconf/libpkgconf/personality.c

227

pair->func(p, keyword, lineno, pair->offset, value);

usr.bin/pkgconf/libpkgconf/pkg.c

143

typedef void (*pkgconf_pkg_parser_keyword_func_t)(pkgconf_client_t *client, pkgconf_pkg_t *pkg, const char *keyword, const size_t lineno, const ptrdiff_t offset, const char *value);

usr.bin/pkgconf/libpkgconf/pkg.c

147

const ptrdiff_t offset;

usr.bin/pkgconf/libpkgconf/pkg.c

157

pkgconf_pkg_parser_tuple_func(pkgconf_client_t *client, pkgconf_pkg_t *pkg, const char *keyword, const size_t lineno, const ptrdiff_t offset, const char *value)

usr.bin/pkgconf/libpkgconf/pkg.c

162

char **dest = (char **)((char *) pkg + offset);

usr.bin/pkgconf/libpkgconf/pkg.c

167

pkgconf_pkg_parser_version_func(pkgconf_client_t *client, pkgconf_pkg_t *pkg, const char *keyword, const size_t lineno, const ptrdiff_t offset, const char *value)

usr.bin/pkgconf/libpkgconf/pkg.c

173

char **dest = (char **)((char *) pkg + offset);

usr.bin/pkgconf/libpkgconf/pkg.c

192

pkgconf_pkg_parser_fragment_func(pkgconf_client_t *client, pkgconf_pkg_t *pkg, const char *keyword, const size_t lineno, const ptrdiff_t offset, const char *value)

usr.bin/pkgconf/libpkgconf/pkg.c

194

pkgconf_list_t *dest = (pkgconf_list_t *)((char *) pkg + offset);

usr.bin/pkgconf/libpkgconf/pkg.c

213

pkgconf_pkg_parser_dependency_func(pkgconf_client_t *client, pkgconf_pkg_t *pkg, const char *keyword, const size_t lineno, const ptrdiff_t offset, const char *value)

usr.bin/pkgconf/libpkgconf/pkg.c

218

pkgconf_list_t *dest = (pkgconf_list_t *)((char *) pkg + offset);

usr.bin/pkgconf/libpkgconf/pkg.c

224

pkgconf_pkg_parser_internal_dependency_func(pkgconf_client_t *client, pkgconf_pkg_t *pkg, const char *keyword, const size_t lineno, const ptrdiff_t offset, const char *value)

usr.bin/pkgconf/libpkgconf/pkg.c

229

pkgconf_list_t *dest = (pkgconf_list_t *)((char *) pkg + offset);

usr.bin/pkgconf/libpkgconf/pkg.c

235

pkgconf_pkg_parser_private_dependency_func(pkgconf_client_t *client, pkgconf_pkg_t *pkg, const char *keyword, const size_t lineno, const ptrdiff_t offset, const char *value)

usr.bin/pkgconf/libpkgconf/pkg.c

240

pkgconf_list_t *dest = (pkgconf_list_t *)((char *) pkg + offset);

usr.bin/pkgconf/libpkgconf/pkg.c

276

pair->func(pkg->owner, pkg, keyword, lineno, pair->offset, value);

usr.bin/pkgconf/libpkgconf/pkg.c

429

const ptrdiff_t offset;

usr.bin/pkgconf/libpkgconf/pkg.c

466

char **p = (char **)((char *) pkg + pkgconf_pkg_validations[i].offset);

usr.bin/rcs/diff.c

916

ptrdiff_t offset = context_vec_ptr - context_vec_start;

usr.bin/rcs/diff.c

921

context_vec_ptr = context_vec_start + offset;

usr.bin/sdiff/sdiff.c

828

static size_t offset = 0;

usr.bin/sdiff/sdiff.c

846

offset = strlen(*s);

usr.bin/sdiff/sdiff.c

862

offset = strlen(*s);

usr.bin/sdiff/sdiff.c

867

newsiz = offset + 1 + strlen(append) + 1;

usr.bin/sdiff/sdiff.c

877

strlcpy(*s + offset, "\n", newsiz - offset);

usr.bin/sdiff/sdiff.c

878

strlcat(*s + offset, append, newsiz - offset);

usr.bin/sdiff/sdiff.c

882

offset = newsiz - 1;

usr.bin/sendbug/sendbug.c

195

off_t offset = -1;

usr.bin/sendbug/sendbug.c

211

offset = o;

usr.bin/sendbug/sendbug.c

213

if (offset != -1) {

usr.bin/sendbug/sendbug.c

217

fseeko(dfp, offset, SEEK_SET);

usr.bin/sendbug/sendbug.c

218

while (offset != -1 && !feof(dfp)) {

usr.bin/snmp/snmp.c

563

snmp_v3_secparamsoffset(void *cookie, size_t offset)

usr.bin/snmp/snmp.c

567

*spoffset = offset;

usr.bin/snmp/usm.c

480

usm_digest_pos(void *data, size_t offset)

usr.bin/snmp/usm.c

484

usmcookie->digestoffset = offset;

usr.bin/sort/bwstring.c

378

bwsnocpy(struct bwstring *dst, const struct bwstring *src, size_t offset,

usr.bin/sort/bwstring.c

381

if (offset >= src->len) {

usr.bin/sort/bwstring.c

385

size_t nums = src->len - offset;

usr.bin/sort/bwstring.c

393

memcpy(dst->data.cstr, src->data.cstr + offset,

usr.bin/sort/bwstring.c

397

memcpy(dst->data.wstr, src->data.wstr + offset,

usr.bin/sort/bwstring.c

575

size_t offset, size_t len)

usr.bin/sort/bwstring.c

583

if (len1 <= offset) {

usr.bin/sort/bwstring.c

584

return (len2 <= offset) ? 0 : -1;

usr.bin/sort/bwstring.c

586

if (len2 <= offset)

usr.bin/sort/bwstring.c

589

len1 -= offset;

usr.bin/sort/bwstring.c

590

len2 -= offset;

usr.bin/sort/bwstring.c

603

s1 = bws1->data.cstr + offset;

usr.bin/sort/bwstring.c

604

s2 = bws2->data.cstr + offset;

usr.bin/sort/bwstring.c

611

s1 = bws1->data.wstr + offset;

usr.bin/sort/bwstring.c

612

s2 = bws2->data.wstr + offset;

usr.bin/sort/bwstring.c

630

bwscmp(const struct bwstring *bws1, const struct bwstring *bws2, size_t offset)

usr.bin/sort/bwstring.c

638

len1 -= offset;

usr.bin/sort/bwstring.c

639

len2 -= offset;

usr.bin/sort/bwstring.c

646

res = bwsncmp(bws1, bws2, offset, cmp_len);

usr.bin/sort/bwstring.c

677

bwscoll(const struct bwstring *bws1, const struct bwstring *bws2, size_t offset)

usr.bin/sort/bwstring.c

684

if (len1 <= offset)

usr.bin/sort/bwstring.c

685

return (len2 <= offset) ? 0 : -1;

usr.bin/sort/bwstring.c

687

if (len2 <= offset)

usr.bin/sort/bwstring.c

690

len1 -= offset;

usr.bin/sort/bwstring.c

691

len2 -= offset;

usr.bin/sort/bwstring.c

697

s1 = bws1->data.cstr + offset;

usr.bin/sort/bwstring.c

698

s2 = bws2->data.cstr + offset;

usr.bin/sort/bwstring.c

717

s1 = bws1->data.wstr + offset;

usr.bin/sort/bwstring.c

718

s2 = bws2->data.wstr + offset;

usr.bin/sort/bwstring.h

89

struct bwstring *bwsnocpy(struct bwstring *dst, const struct bwstring *src, size_t offset, size_t size);

usr.bin/sort/bwstring.h

90

int bwscmp(const struct bwstring *bws1, const struct bwstring *bws2, size_t offset);

usr.bin/sort/bwstring.h

91

int bwsncmp(const struct bwstring *bws1, const struct bwstring *bws2, size_t offset, size_t len);

usr.bin/sort/bwstring.h

92

int bwscoll(const struct bwstring *bws1, const struct bwstring *bws2, size_t offset);

usr.bin/sort/coll.c

1002

size_t offset __unused)

usr.bin/sort/coll.c

1075

size_t offset __unused)

usr.bin/sort/coll.c

1231

monthcoll(struct key_value *kv1, struct key_value *kv2, size_t offset __unused)

usr.bin/sort/coll.c

459

key_coll(struct keys_array *ps1, struct keys_array *ps2, size_t offset)

usr.bin/sort/coll.c

469

res = sm->func(&(ps2->key[i]), &(ps1->key[i]), offset);

usr.bin/sort/coll.c

471

res = sm->func(&(ps1->key[i]), &(ps2->key[i]), offset);

usr.bin/sort/coll.c

477

offset = 0;

usr.bin/sort/coll.c

49

static int wstrcoll(struct key_value *kv1, struct key_value *kv2, size_t offset);

usr.bin/sort/coll.c

50

static int gnumcoll(struct key_value*, struct key_value *, size_t offset);

usr.bin/sort/coll.c

51

static int monthcoll(struct key_value*, struct key_value *, size_t offset);

usr.bin/sort/coll.c

52

static int numcoll(struct key_value*, struct key_value *, size_t offset);

usr.bin/sort/coll.c

53

static int hnumcoll(struct key_value*, struct key_value *, size_t offset);

usr.bin/sort/coll.c

54

static int randomcoll(struct key_value*, struct key_value *, size_t offset);

usr.bin/sort/coll.c

545

size_t offset)

usr.bin/sort/coll.c

549

ret = key_coll(&((*ss1)->ka), &((*ss2)->ka), offset);

usr.bin/sort/coll.c

55

static int versioncoll(struct key_value*, struct key_value *, size_t offset);

usr.bin/sort/coll.c

552

if (offset)

usr.bin/sort/coll.c

553

printf("; offset=%zu", offset);

usr.bin/sort/coll.c

612

get_list_call_func(size_t offset)

usr.bin/sort/coll.c

621

if (offset <= 20)

usr.bin/sort/coll.c

622

return lsarray[offset];

usr.bin/sort/coll.c

747

wstrcoll(struct key_value *kv1, struct key_value *kv2, size_t offset)

usr.bin/sort/coll.c

751

if (offset)

usr.bin/sort/coll.c

752

printf("; offset=%zu\n", offset);

usr.bin/sort/coll.c

759

return bwscoll(kv1->k, kv2->k, offset);

usr.bin/sort/coll.c

776

size_t offset __unused, bool use_suffix)

usr.bin/sort/coll.c

930

numcoll(struct key_value *kv1, struct key_value *kv2, size_t offset)

usr.bin/sort/coll.c

932

return numcoll_impl(kv1, kv2, offset, false);

usr.bin/sort/coll.c

939

hnumcoll(struct key_value *kv1, struct key_value *kv2, size_t offset)

usr.bin/sort/coll.c

941

return numcoll_impl(kv1, kv2, offset, true);

usr.bin/sort/coll.c

949

size_t offset __unused)

usr.bin/sort/coll.h

142

int key_coll(struct keys_array *ks1, struct keys_array *ks2, size_t offset);

usr.bin/sort/coll.h

146

int list_coll_offset(struct sort_list_item **ss1, struct sort_list_item **ss2, size_t offset);

usr.bin/sort/coll.h

148

listcoll_t get_list_call_func(size_t offset);

usr.bin/sort/sort.h

82

typedef int (*cmpcoll_t)(struct key_value *kv1, struct key_value *kv2, size_t offset);

usr.bin/ssh/bitmap.c

102

size_t offset;

usr.bin/ssh/bitmap.c

106

offset = n / BITMAP_BITS;

usr.bin/ssh/bitmap.c

107

if (offset > b->top)

usr.bin/ssh/bitmap.c

108

b->top = offset;

usr.bin/ssh/bitmap.c

109

b->d[offset] |= (BITMAP_WTYPE)1 << (n & BITMAP_WMASK);

usr.bin/ssh/bitmap.c

126

size_t offset;

usr.bin/ssh/bitmap.c

130

offset = n / BITMAP_BITS;

usr.bin/ssh/bitmap.c

131

if (offset > b->top)

usr.bin/ssh/bitmap.c

133

b->d[offset] &= ~((BITMAP_WTYPE)1 << (n & BITMAP_WMASK));

usr.bin/ssh/bitmap.c

190

size_t i, offset, shift;

usr.bin/ssh/bitmap.c

200

b->top = offset = ((l + (BITMAP_BYTES - 1)) / BITMAP_BYTES) - 1;

usr.bin/ssh/bitmap.c

203

b->d[offset] |= (BITMAP_WTYPE)s[i] << shift;

usr.bin/ssh/bitmap.c

205

offset--;

usr.bin/ssh/gss-serv.c

219

OM_uint32 offset;

usr.bin/ssh/gss-serv.c

251

offset = oidl+6;

usr.bin/ssh/gss-serv.c

253

if (ename->length < offset+4)

usr.bin/ssh/gss-serv.c

256

name->length = get_u32(tok+offset);

usr.bin/ssh/gss-serv.c

257

offset += 4;

usr.bin/ssh/gss-serv.c

259

if (UINT_MAX - offset < name->length)

usr.bin/ssh/gss-serv.c

261

if (ename->length < offset+name->length)

usr.bin/ssh/gss-serv.c

265

memcpy(name->value, tok+offset, name->length);

usr.bin/ssh/libcrux_mlkem768_sha3.h

1799

size_t offset = start + (size_t)8U * i0;

usr.bin/ssh/libcrux_mlkem768_sha3.h

1804

Eurydice_slice_subslice3(blocks, offset, offset + (size_t)8U,

usr.bin/ssh/libcrux_mlkem768_sha3.h

3448

size_t offset = start + (size_t)8U * i0;

usr.bin/ssh/libcrux_mlkem768_sha3.h

3453

Eurydice_slice_subslice3(blocks, offset, offset + (size_t)8U,

usr.bin/ssh/libcrux_mlkem768_sha3.h

3786

size_t offset = start + (size_t)8U * i0;

usr.bin/ssh/libcrux_mlkem768_sha3.h

3791

Eurydice_slice_subslice3(blocks, offset, offset + (size_t)8U,

usr.bin/ssh/libcrux_mlkem768_sha3.h

4043

size_t offset = start + (size_t)8U * i0;

usr.bin/ssh/libcrux_mlkem768_sha3.h

4048

Eurydice_slice_subslice3(blocks, offset, offset + (size_t)8U,

usr.bin/ssh/libcrux_mlkem768_sha3.h

4266

size_t offset = start + (size_t)8U * i0;

usr.bin/ssh/libcrux_mlkem768_sha3.h

4271

Eurydice_slice_subslice3(blocks, offset, offset + (size_t)8U,

usr.bin/ssh/libcrux_mlkem768_sha3.h

7296

size_t offset = round * step * (size_t)2U;

usr.bin/ssh/libcrux_mlkem768_sha3.h

7297

size_t offset_vec = offset / (size_t)16U;

usr.bin/ssh/libcrux_mlkem768_sha3.h

7799

size_t offset = round * step * (size_t)2U;

usr.bin/ssh/libcrux_mlkem768_sha3.h

7801

offset / LIBCRUX_ML_KEM_VECTOR_TRAITS_FIELD_ELEMENTS_IN_VECTOR;

usr.bin/ssh/libcrux_mlkem768_sha3.h

8845

size_t offset = (size_t)(outcome_set0 >> 2U);

usr.bin/ssh/libcrux_mlkem768_sha3.h

8846

sampled_i16s[(size_t)8U * chunk_number + offset] = outcome_1 - outcome_2;

usr.bin/ssh/sftp-client.c

107

uint64_t offset)

usr.bin/ssh/sftp-client.c

114

req->offset = offset;

usr.bin/ssh/sftp-client.c

1498

send_read_request(struct sftp_conn *conn, u_int id, uint64_t offset,

usr.bin/ssh/sftp-client.c

1509

(r = sshbuf_put_u64(msg, offset)) != 0 ||

usr.bin/ssh/sftp-client.c

1581

uint64_t offset = 0, size, highwater = 0, maxack = 0;

usr.bin/ssh/sftp-client.c

1652

offset = highwater = maxack = st.st_size;

usr.bin/ssh/sftp-client.c

1658

progress_counter = offset;

usr.bin/ssh/sftp-client.c

1685

(unsigned long long)offset,

usr.bin/ssh/sftp-client.c

1686

(unsigned long long)offset + buflen - 1,

usr.bin/ssh/sftp-client.c

1689

buflen, offset);

usr.bin/ssh/sftp-client.c

1690

offset += buflen;

usr.bin/ssh/sftp-client.c

1692

send_read_request(conn, req->id, req->offset,

usr.bin/ssh/sftp-client.c

1722

(unsigned long long)req->offset,

usr.bin/ssh/sftp-client.c

1723

(unsigned long long)req->offset + len - 1);

usr.bin/ssh/sftp-client.c

1728

if ((lseek(local_fd, req->offset, SEEK_SET) == -1 ||

usr.bin/ssh/sftp-client.c

1742

if (maxack < req->offset + len)

usr.bin/ssh/sftp-client.c

1743

maxack = req->offset + len;

usr.bin/ssh/sftp-client.c

1744

if (!reordered && req->offset <= highwater)

usr.bin/ssh/sftp-client.c

1746

else if (!reordered && req->offset > highwater)

usr.bin/ssh/sftp-client.c

1760

(unsigned long long)req->offset + len,

usr.bin/ssh/sftp-client.c

1761

(unsigned long long)req->offset +

usr.bin/ssh/sftp-client.c

1765

req->offset += len;

usr.bin/ssh/sftp-client.c

1767

req->offset, req->len, handle, handle_len);

usr.bin/ssh/sftp-client.c

1773

if (size > 0 && offset > size) {

usr.bin/ssh/sftp-client.c

1777

(unsigned long long)offset,

usr.bin/ssh/sftp-client.c

2010

off_t offset, progress_counter;

usr.bin/ssh/sftp-client.c

2087

offset = progress_counter = (resume ? c.size : 0);

usr.bin/ssh/sftp-client.c

2114

ack = request_enqueue(&acks, ++id, len, offset);

usr.bin/ssh/sftp-client.c

2120

(r = sshbuf_put_u64(msg, offset)) != 0 ||

usr.bin/ssh/sftp-client.c

2125

id, (unsigned long long)offset, len);

usr.bin/ssh/sftp-client.c

2157

ack->id, ack->len, (unsigned long long)ack->offset);

usr.bin/ssh/sftp-client.c

2166

if (maxack < ack->offset + ack->len)

usr.bin/ssh/sftp-client.c

2167

maxack = ack->offset + ack->len;

usr.bin/ssh/sftp-client.c

2168

if (!reordered && ack->offset <= highwater)

usr.bin/ssh/sftp-client.c

2170

else if (!reordered && ack->offset > highwater) {

usr.bin/ssh/sftp-client.c

2176

offset += len;

usr.bin/ssh/sftp-client.c

2177

if (offset < 0)

usr.bin/ssh/sftp-client.c

2436

uint64_t offset = 0, size;

usr.bin/ssh/sftp-client.c

2490

offset = 0;

usr.bin/ssh/sftp-client.c

2518

(unsigned long long)offset,

usr.bin/ssh/sftp-client.c

2519

(unsigned long long)offset + buflen - 1,

usr.bin/ssh/sftp-client.c

2522

buflen, offset);

usr.bin/ssh/sftp-client.c

2523

offset += buflen;

usr.bin/ssh/sftp-client.c

2525

send_read_request(from, req->id, req->offset,

usr.bin/ssh/sftp-client.c

2560

(unsigned long long)req->offset,

usr.bin/ssh/sftp-client.c

2561

(unsigned long long)req->offset + len - 1);

usr.bin/ssh/sftp-client.c

2572

(r = sshbuf_put_u64(msg, req->offset)) != 0 ||

usr.bin/ssh/sftp-client.c

2577

id, (unsigned long long)offset, len);

usr.bin/ssh/sftp-client.c

2590

(unsigned long long)req->offset + len,

usr.bin/ssh/sftp-client.c

2591

(unsigned long long)req->offset +

usr.bin/ssh/sftp-client.c

2595

req->offset += len;

usr.bin/ssh/sftp-client.c

2597

req->offset, req->len,

usr.bin/ssh/sftp-client.c

2604

if (size > 0 && offset > size) {

usr.bin/ssh/sftp-client.c

2608

(unsigned long long)offset,

usr.bin/ssh/sftp-client.c

96

uint64_t offset;

usr.bin/ssh/sftp-glob.c

37

int offset;

usr.bin/ssh/sftp-glob.c

56

r->offset = 0;

usr.bin/ssh/sftp-glob.c

66

if (od->dir[od->offset] == NULL)

usr.bin/ssh/sftp-glob.c

70

strlcpy(ret.d_name, od->dir[od->offset++]->filename,

usr.bin/ssh/sshbuf-getput-basic.c

100

if (offset >= SIZE_MAX - len)

usr.bin/ssh/sshbuf-getput-basic.c

102

if (offset + len > sshbuf_len(buf)) {

usr.bin/ssh/sshbuf-getput-basic.c

110

check_roffset(const struct sshbuf *buf, size_t offset, size_t len,

usr.bin/ssh/sshbuf-getput-basic.c

116

if ((r = check_offset(buf, 0, offset, len)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

118

*p = sshbuf_ptr(buf) + offset;

usr.bin/ssh/sshbuf-getput-basic.c

123

sshbuf_peek_u64(const struct sshbuf *buf, size_t offset, uint64_t *valp)

usr.bin/ssh/sshbuf-getput-basic.c

130

if ((r = check_roffset(buf, offset, 8, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

138

sshbuf_peek_u32(const struct sshbuf *buf, size_t offset, uint32_t *valp)

usr.bin/ssh/sshbuf-getput-basic.c

145

if ((r = check_roffset(buf, offset, 4, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

153

sshbuf_peek_u16(const struct sshbuf *buf, size_t offset, uint16_t *valp)

usr.bin/ssh/sshbuf-getput-basic.c

160

if ((r = check_roffset(buf, offset, 2, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

168

sshbuf_peek_u8(const struct sshbuf *buf, size_t offset, u_char *valp)

usr.bin/ssh/sshbuf-getput-basic.c

175

if ((r = check_roffset(buf, offset, 1, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

436

check_woffset(struct sshbuf *buf, size_t offset, size_t len, u_char **p)

usr.bin/ssh/sshbuf-getput-basic.c

441

if ((r = check_offset(buf, 1, offset, len)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

445

*p = sshbuf_mutable_ptr(buf) + offset;

usr.bin/ssh/sshbuf-getput-basic.c

450

sshbuf_poke_u64(struct sshbuf *buf, size_t offset, uint64_t val)

usr.bin/ssh/sshbuf-getput-basic.c

455

if ((r = check_woffset(buf, offset, 8, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

462

sshbuf_poke_u32(struct sshbuf *buf, size_t offset, uint32_t val)

usr.bin/ssh/sshbuf-getput-basic.c

467

if ((r = check_woffset(buf, offset, 4, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

474

sshbuf_poke_u16(struct sshbuf *buf, size_t offset, uint16_t val)

usr.bin/ssh/sshbuf-getput-basic.c

479

if ((r = check_woffset(buf, offset, 2, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

486

sshbuf_poke_u8(struct sshbuf *buf, size_t offset, u_char val)

usr.bin/ssh/sshbuf-getput-basic.c

491

if ((r = check_woffset(buf, offset, 1, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

498

sshbuf_poke(struct sshbuf *buf, size_t offset, void *v, size_t len)

usr.bin/ssh/sshbuf-getput-basic.c

503

if ((r = check_woffset(buf, offset, len, &p)) != 0)

usr.bin/ssh/sshbuf-getput-basic.c

96

check_offset(const struct sshbuf *buf, int wr, size_t offset, size_t len)

usr.bin/ssh/sshbuf-misc.c

273

sshbuf_cmp(const struct sshbuf *b, size_t offset,

usr.bin/ssh/sshbuf-misc.c

278

if (offset > SSHBUF_SIZE_MAX || len > SSHBUF_SIZE_MAX || len == 0)

usr.bin/ssh/sshbuf-misc.c

280

if (offset + len > sshbuf_len(b))

usr.bin/ssh/sshbuf-misc.c

282

if (timingsafe_bcmp(sshbuf_ptr(b) + offset, s, len) != 0)

usr.bin/ssh/sshbuf.h

192

int sshbuf_peek_u64(const struct sshbuf *buf, size_t offset,

usr.bin/ssh/sshbuf.h

194

int sshbuf_peek_u32(const struct sshbuf *buf, size_t offset,

usr.bin/ssh/sshbuf.h

196

int sshbuf_peek_u16(const struct sshbuf *buf, size_t offset,

usr.bin/ssh/sshbuf.h

198

int sshbuf_peek_u8(const struct sshbuf *buf, size_t offset,

usr.bin/ssh/sshbuf.h

205

int sshbuf_poke_u64(struct sshbuf *buf, size_t offset, uint64_t val);

usr.bin/ssh/sshbuf.h

206

int sshbuf_poke_u32(struct sshbuf *buf, size_t offset, uint32_t val);

usr.bin/ssh/sshbuf.h

207

int sshbuf_poke_u16(struct sshbuf *buf, size_t offset, uint16_t val);

usr.bin/ssh/sshbuf.h

208

int sshbuf_poke_u8(struct sshbuf *buf, size_t offset, u_char val);

usr.bin/ssh/sshbuf.h

209

int sshbuf_poke(struct sshbuf *buf, size_t offset, void *v, size_t len);

usr.bin/ssh/sshbuf.h

289

int sshbuf_cmp(const struct sshbuf *b, size_t offset,

usr.bin/systat/engine.c

199

move_horiz(int offset)

usr.bin/systat/engine.c

202

if (offset <= 0)

usr.bin/systat/engine.c

204

else if (offset >= MAX_LINE_BUF)

usr.bin/systat/engine.c

207

linepos = offset;

usr.bin/systat/engine.c

209

move(curr_line, offset);

usr.bin/systat/engine.c

266

int len, offset;

usr.bin/systat/engine.c

290

offset = (fld->width - len) / 2;

usr.bin/systat/engine.c

292

offset = (fld->width / 2) - (cpos - str);

usr.bin/systat/engine.c

293

if (offset < 0)

usr.bin/systat/engine.c

294

offset = 0;

usr.bin/systat/engine.c

295

else if (offset > (fld->width - len))

usr.bin/systat/engine.c

296

offset = fld->width - len;

usr.bin/systat/engine.c

298

move_horiz(fld->start + offset);

usr.bin/telnet/utilities.c

100

fprintf(NetTrace, "%c 0x%x\t", direction, offset);

usr.bin/telnet/utilities.c

111

offset += BYTES_PER_LINE/2;

usr.bin/telnet/utilities.c

119

offset += BYTES_PER_LINE;

usr.bin/telnet/utilities.c

94

int offset;

usr.bin/telnet/utilities.c

96

offset = 0;

usr.bin/tic/dump_entry.c

1493

unsigned offset = 0;

usr.bin/tic/dump_entry.c

1499

if (_nc_write_object(tterm, bigbuf, &offset, sizeof(bigbuf)) == OK) {

usr.bin/tic/dump_entry.c

1507

for (n = 0; n < offset; ++n) {

usr.bin/tic/dump_entry.c

1521

for (n = 0; n < offset; ++n) {

usr.bin/tic/dump_entry.c

433

op_length(const char *src, int offset)

usr.bin/tic/dump_entry.c

437

if (offset > 0 && src[offset - 1] == '\\') {

usr.bin/tic/dump_entry.c

443

ch = src[offset + result];

usr.bin/tic/dump_entry.c

456

while ((ch = src[offset + n]) != '\0') {

usr.bin/tic/tic.c

2713

char *a = tp->Strings[all_fkeys[j].offset];

usr.bin/tic/tic.c

2716

result[used].name = strnames[all_fkeys[j].offset];

usr.bin/tmux/cmd-list-keys.c

101

u_int i, ltsz, len = 0, offset = 0;

usr.bin/tmux/cmd-list-keys.c

113

memcpy(l + offset, lt, ltsz * sizeof *l);

usr.bin/tmux/cmd-list-keys.c

114

offset += ltsz;

usr.bin/tmux/cmd-pipe-pane.c

172

memcpy(wpo, &wp->offset, sizeof *wpo);

usr.bin/tmux/control.c

259

memcpy(&cp->offset, &wp->offset, sizeof cp->offset);

usr.bin/tmux/control.c

260

memcpy(&cp->queued, &wp->offset, sizeof cp->queued);

usr.bin/tmux/control.c

332

return (&cp->offset);

usr.bin/tmux/control.c

344

memcpy(&cp->offset, &wp->offset, sizeof cp->offset);

usr.bin/tmux/control.c

345

memcpy(&cp->queued, &wp->offset, sizeof cp->queued);

usr.bin/tmux/control.c

368

memcpy(&cp->offset, &wp->offset, sizeof cp->offset);

usr.bin/tmux/control.c

369

memcpy(&cp->queued, &wp->offset, sizeof cp->queued);

usr.bin/tmux/control.c

517

window_pane_update_used_data(wp, &cp->offset, SIZE_MAX);

usr.bin/tmux/control.c

629

new_data = window_pane_get_new_data(wp, &cp->offset, &new_size);

usr.bin/tmux/control.c

63

struct window_pane_offset offset;

usr.bin/tmux/control.c

644

window_pane_update_used_data(wp, &cp->offset, size);

usr.bin/tmux/format-draw.c

103

fr->start += offset;

usr.bin/tmux/format-draw.c

104

fr->end += offset;

usr.bin/tmux/format-draw.c

111

struct screen *s, struct format_ranges *frs, u_int offset, u_int start,

usr.bin/tmux/format-draw.c

118

screen_write_cursormove(octx, ocx + offset, ocy, 0);

usr.bin/tmux/format-draw.c

120

format_update_ranges(frs, s, offset, start, width);

usr.bin/tmux/format-draw.c

126

u_int ocx, u_int ocy, u_int offset, u_int width, struct screen *list,

usr.bin/tmux/format-draw.c

134

format_draw_put(octx, ocx, ocy, list, frs, offset, 0, width);

usr.bin/tmux/format-draw.c

149

screen_write_cursormove(octx, ocx + offset, ocy, 0);

usr.bin/tmux/format-draw.c

151

offset += list_left->cx;

usr.bin/tmux/format-draw.c

156

screen_write_cursormove(octx, ocx + offset + width -

usr.bin/tmux/format-draw.c

164

format_draw_put(octx, ocx, ocy, list, frs, offset, start, width);

usr.bin/tmux/format-draw.c

74

format_update_ranges(struct format_ranges *frs, struct screen *s, u_int offset,

usr.bin/tmux/grid.c

110

gce->offset = at - 1;

usr.bin/tmux/grid.c

125

else if (gce->offset >= gl->extdsize)

usr.bin/tmux/grid.c

134

gee = &gl->extddata[gce->offset];

usr.bin/tmux/grid.c

176

gee = &gl->extddata[gce->offset];

usr.bin/tmux/grid.c

178

gce->offset = idx++;

usr.bin/tmux/grid.c

208

u_int old_offset = gce->offset;

usr.bin/tmux/grid.c

214

gce->offset = old_offset;

usr.bin/tmux/grid.c

548

if (gce->offset >= gl->extdsize)

usr.bin/tmux/grid.c

551

gee = &gl->extddata[gce->offset];

usr.bin/tmux/input.c

1017

new_data = window_pane_get_new_data(wp, &wp->offset, &new_size);

usr.bin/tmux/input.c

1019

window_pane_update_used_data(wp, &wp->offset, new_size);

usr.bin/tmux/mode-tree.c

1124

if (mtd->offset + y > mtd->line_size - 1)

usr.bin/tmux/mode-tree.c

1127

line = mtd->offset + y;

usr.bin/tmux/mode-tree.c

1236

if (mtd->offset + y < mtd->line_size) {

usr.bin/tmux/mode-tree.c

1240

mtd->current = mtd->offset + y;

usr.bin/tmux/mode-tree.c

1324

mtd->offset = 0;

usr.bin/tmux/mode-tree.c

1330

mtd->offset = mtd->current - mtd->height + 1;

usr.bin/tmux/mode-tree.c

1332

mtd->offset = 0;

usr.bin/tmux/mode-tree.c

223

mtd->offset = mtd->current - mtd->height + 1;

usr.bin/tmux/mode-tree.c

308

mtd->offset = mtd->line_size - mtd->height;

usr.bin/tmux/mode-tree.c

312

if (mtd->current < mtd->offset)

usr.bin/tmux/mode-tree.c

313

mtd->offset--;

usr.bin/tmux/mode-tree.c

323

mtd->offset = 0;

usr.bin/tmux/mode-tree.c

328

if (mtd->current > mtd->offset + mtd->height - 1)

usr.bin/tmux/mode-tree.c

329

mtd->offset++;

usr.bin/tmux/mode-tree.c

430

mtd->offset = mtd->current - mtd->height + 1;

usr.bin/tmux/mode-tree.c

432

mtd->offset = 0;

usr.bin/tmux/mode-tree.c

438

mtd->offset = mtd->current - mtd->height + 1;

usr.bin/tmux/mode-tree.c

440

mtd->offset = 0;

usr.bin/tmux/mode-tree.c

75

u_int offset;

usr.bin/tmux/mode-tree.c

778

if (i < mtd->offset)

usr.bin/tmux/mode-tree.c

780

if (i > mtd->offset + h - 1)

usr.bin/tmux/mode-tree.c

785

screen_write_cursormove(&ctx, 0, i - mtd->offset, 0);

usr.bin/tmux/mode-tree.c

913

screen_write_cursormove(&ctx, 0, mtd->current - mtd->offset, 0);

usr.bin/tmux/names.c

45

struct timeval offset;

usr.bin/tmux/names.c

47

timersub(tv, &w->name_time, &offset);

usr.bin/tmux/names.c

48

if (offset.tv_sec != 0 || offset.tv_usec > NAME_INTERVAL)

usr.bin/tmux/names.c

50

return (NAME_INTERVAL - offset.tv_usec);

usr.bin/tmux/screen.c

815

utf8_to_data(gl->extddata[gce->offset].data,

usr.bin/tmux/server-client.c

1629

minimum = wp->offset.used;

usr.bin/tmux/server-client.c

1674

wp->offset.used -= wp->base_offset;

usr.bin/tmux/status.c

1900

u_int offset, char flag)

usr.bin/tmux/status.c

1939

offset += utf8_cstrwidth(c->prompt_string);

usr.bin/tmux/status.c

1940

offset += ax;

usr.bin/tmux/status.c

1941

if (offset > 2)

usr.bin/tmux/status.c

1942

offset -= 2;

usr.bin/tmux/status.c

1944

offset = 0;

usr.bin/tmux/status.c

1946

if (menu_display(menu, MENU_NOMOUSE|MENU_TAB, 0, NULL, offset, py, c,

usr.bin/tmux/status.c

1959

const char *word, u_int offset, char flag)

usr.bin/tmux/status.c

2037

offset += utf8_cstrwidth(c->prompt_string);

usr.bin/tmux/status.c

2038

offset += ax;

usr.bin/tmux/status.c

2039

if (offset > 2)

usr.bin/tmux/status.c

2040

offset -= 2;

usr.bin/tmux/status.c

2042

offset = 0;

usr.bin/tmux/status.c

2044

if (menu_display(menu, MENU_NOMOUSE|MENU_TAB, 0, NULL, offset, py, c,

usr.bin/tmux/status.c

2100

status_prompt_complete(struct client *c, const char *word, u_int offset)

usr.bin/tmux/status.c

2117

list = status_prompt_complete_list(&size, word, offset == 0);

usr.bin/tmux/status.c

2134

offset += 2;

usr.bin/tmux/status.c

2140

offset, '\0');

usr.bin/tmux/status.c

2164

offset, flag);

usr.bin/tmux/status.c

2181

!status_prompt_complete_list_menu(c, list, size, offset, flag)) {

usr.bin/tmux/status.c

795

status_prompt_redraw_character(struct screen_write_ctx *ctx, u_int offset,

usr.bin/tmux/status.c

801

if (*width < offset) {

usr.bin/tmux/status.c

805

if (*width >= offset + pwidth)

usr.bin/tmux/status.c

808

if (*width > offset + pwidth)

usr.bin/tmux/status.c

829

struct screen_write_ctx *ctx, u_int offset, u_int pwidth, u_int *width,

usr.bin/tmux/status.c

836

return (status_prompt_redraw_character(ctx, offset, pwidth,

usr.bin/tmux/status.c

850

u_int i, lines, offset, left, start, width, n;

usr.bin/tmux/status.c

926

offset = (pcursor - left) + 1;

usr.bin/tmux/status.c

929

offset = 0;

usr.bin/tmux/status.c

932

c->prompt_cursor = ax + start + pcursor - offset;

usr.bin/tmux/status.c

936

if (!status_prompt_redraw_quote(c, pcursor, &ctx, offset,

usr.bin/tmux/status.c

939

if (!status_prompt_redraw_character(&ctx, offset, pwidth,

usr.bin/tmux/status.c

943

status_prompt_redraw_quote(c, pcursor, &ctx, offset, pwidth, &width,

usr.bin/tmux/tmux.h

1249

struct window_pane_offset offset;

usr.bin/tmux/tmux.h

827

u_int offset;

usr.bin/tmux/tty-term.c

328

tty_term_override_next(const char *s, size_t *offset)

usr.bin/tmux/tty-term.c

331

size_t n = 0, at = *offset;

usr.bin/tmux/tty-term.c

351

*offset = at + 1;

usr.bin/tmux/tty-term.c

353

*offset = at;

usr.bin/tmux/tty-term.c

363

size_t offset = 0;

usr.bin/tmux/tty-term.c

369

while ((s = tty_term_override_next(capabilities, &offset)) != NULL) {

usr.bin/tmux/tty-term.c

441

size_t offset;

usr.bin/tmux/tty-term.c

451

offset = 0;

usr.bin/tmux/tty-term.c

452

first = tty_term_override_next(s, &offset);

usr.bin/tmux/tty-term.c

454

tty_term_apply(term, s + offset, 0);

usr.bin/tmux/tty-term.c

532

size_t offset, namelen;

usr.bin/tmux/tty-term.c

592

offset = 0;

usr.bin/tmux/tty-term.c

593

first = tty_term_override_next(s, &offset);

usr.bin/tmux/tty-term.c

595

tty_add_features(feat, s + offset, ":");

usr.bin/tmux/window-copy.c

3420

u_int offset, gap;

usr.bin/tmux/window-copy.c

3429

offset = 0;

usr.bin/tmux/window-copy.c

3432

offset = gd->hsize;

usr.bin/tmux/window-copy.c

3435

offset = py + gap - gd->sy;

usr.bin/tmux/window-copy.c

3436

data->cy = py - offset;

usr.bin/tmux/window-copy.c

3438

data->oy = gd->hsize - offset;

usr.bin/tmux/window-copy.c

3702

utf8_to_data(gl->extddata[gce->offset].data, &ud);

usr.bin/tmux/window-copy.c

4641

window_copy_get_current_offset(struct window_pane *wp, u_int *offset,

usr.bin/tmux/window-copy.c

4652

*offset = hsize - data->oy;

usr.bin/tmux/window-copy.c

614

u_int ox, oy, px, py, n, offset, size;

usr.bin/tmux/window-copy.c

637

window_copy_get_current_offset(wp, &offset, &size) == 0)

usr.bin/tmux/window-copy.c

645

delta = (int)offset - new_offset;

usr.bin/tmux/window-customize.c

117

uint64_t offset;

usr.bin/tmux/window-customize.c

121

offset = ((char *)oe - (char *)options_table) / sizeof *options_table;

usr.bin/tmux/window-customize.c

122

return ((2ULL << 62)|(offset << 32)|((idx + 1) << 1)|1);

usr.bin/tmux/window-tree.c

1238

data->offset = 0;

usr.bin/tmux/window-tree.c

1247

data->offset--;

usr.bin/tmux/window-tree.c

1250

data->offset++;

usr.bin/tmux/window-tree.c

126

int offset;

usr.bin/tmux/window-tree.c

428

u_int loop, total, visible, each, width, offset;

usr.bin/tmux/window-tree.c

465

if (data->offset < -(int)start)

usr.bin/tmux/window-tree.c

466

data->offset = -(int)start;

usr.bin/tmux/window-tree.c

467

if (data->offset > (int)(total - end))

usr.bin/tmux/window-tree.c

468

data->offset = (int)(total - end);

usr.bin/tmux/window-tree.c

469

start += data->offset;

usr.bin/tmux/window-tree.c

470

end += data->offset;

usr.bin/tmux/window-tree.c

526

offset = 3 + (i * each);

usr.bin/tmux/window-tree.c

528

offset = (i * each);

usr.bin/tmux/window-tree.c

534

screen_write_cursormove(ctx, cx + offset, cy, 0);

usr.bin/tmux/window-tree.c

542

window_tree_draw_label(ctx, cx + offset, cy, width, sy, &gc,

usr.bin/tmux/window-tree.c

547

screen_write_cursormove(ctx, cx + offset + width, cy, 0);

usr.bin/tmux/window-tree.c

563

u_int loop, total, visible, each, width, offset;

usr.bin/tmux/window-tree.c

600

if (data->offset < -(int)start)

usr.bin/tmux/window-tree.c

601

data->offset = -(int)start;

usr.bin/tmux/window-tree.c

602

if (data->offset > (int)(total - end))

usr.bin/tmux/window-tree.c

603

data->offset = (int)(total - end);

usr.bin/tmux/window-tree.c

604

start += data->offset;

usr.bin/tmux/window-tree.c

605

end += data->offset;

usr.bin/tmux/window-tree.c

660

offset = 3 + (i * each);

usr.bin/tmux/window-tree.c

662

offset = (i * each);

usr.bin/tmux/window-tree.c

668

screen_write_cursormove(ctx, cx + offset, cy, 0);

usr.bin/tmux/window-tree.c

674

window_tree_draw_label(ctx, cx + offset, cy, each, sy, &gc,

usr.bin/tmux/window-tree.c

679

screen_write_cursormove(ctx, cx + offset + width, cy, 0);

usr.bin/unvis/unvis.c

79

int offset = 0, c, ret;

usr.bin/unvis/unvis.c

84

offset++;

usr.bin/unvis/unvis.c

94

warnx("%s: offset: %d: can't decode", filename, offset);

usr.bin/vi/common/cut.h

40

size_t offset; /* 0-N: initial, unerasable chars. */

usr.bin/vi/common/options.c

203

int offset;

usr.bin/vi/common/options.c

412

int ch, equals, nf, nf2, offset, qmark, rval;

usr.bin/vi/common/options.c

463

offset = op - optlist;

usr.bin/vi/common/options.c

464

spo = sp->opts + offset;

usr.bin/vi/common/options.c

508

if (!O_ISSET(sp, offset))

usr.bin/vi/common/options.c

511

if (O_ISSET(sp, offset))

usr.bin/vi/common/options.c

519

O_CLR(sp, offset);

usr.bin/vi/common/options.c

521

O_SET(sp, offset);

usr.bin/vi/common/options.c

527

ex_optchange(sp, offset, NULL, &turnoff) ||

usr.bin/vi/common/options.c

528

v_optchange(sp, offset, NULL, &turnoff) ||

usr.bin/vi/common/options.c

529

sp->gp->scr_optchange(sp, offset, NULL, &turnoff)) {

usr.bin/vi/common/options.c

537

O_CLR(sp, offset);

usr.bin/vi/common/options.c

539

O_SET(sp, offset);

usr.bin/vi/common/options.c

608

O_VAL(sp, offset) == value)

usr.bin/vi/common/options.c

613

if (o_set(sp, offset, 0, NULL, value)) {

usr.bin/vi/common/options.c

622

ex_optchange(sp, offset, sep, &value) ||

usr.bin/vi/common/options.c

623

v_optchange(sp, offset, sep, &value) ||

usr.bin/vi/common/options.c

624

sp->gp->scr_optchange(sp, offset, sep, &value)) {

usr.bin/vi/common/options.c

631

if (o_set(sp, offset, 0, NULL, value))

usr.bin/vi/common/options.c

654

O_STR(sp, offset) != NULL &&

usr.bin/vi/common/options.c

655

!strcmp(O_STR(sp, offset), sep))

usr.bin/vi/common/options.c

660

if (o_set(sp, offset, OS_STRDUP, sep, 0)) {

usr.bin/vi/common/options.c

669

ex_optchange(sp, offset, sep, NULL) ||

usr.bin/vi/common/options.c

670

v_optchange(sp, offset, sep, NULL) ||

usr.bin/vi/common/options.c

671

sp->gp->scr_optchange(sp, offset, sep, NULL)) {

usr.bin/vi/common/options.c

678

if (o_set(sp, offset, OS_STRDUP, sep, 0))

usr.bin/vi/common/options.c

891

int curlen, offset;

usr.bin/vi/common/options.c

894

offset = op - optlist;

usr.bin/vi/common/options.c

899

"%s%s", O_ISSET(sp, offset) ? "" : "no", op->name);

usr.bin/vi/common/options.c

902

curlen += ex_printf(sp, "%s=%ld", op->name, O_VAL(sp, offset));

usr.bin/vi/common/options.c

906

O_STR(sp, offset) == NULL ? "" : O_STR(sp, offset));

usr.bin/vi/common/options.c

985

return (optlist + ap->offset);

usr.bin/vi/ex/ex_init.c

113

ex_optchange(SCR *sp, int offset, char *str, u_long *valp)

usr.bin/vi/ex/ex_init.c

115

switch (offset) {

usr.bin/vi/ex/ex_subst.c

345

size_t offset, saved_offset, scno;

usr.bin/vi/ex/ex_subst.c

510

offset = 0;

usr.bin/vi/ex/ex_subst.c

534

nextmatch: match[0].rm_so = offset;

usr.bin/vi/ex/ex_subst.c

579

BUILD(sp, s + offset, 1)

usr.bin/vi/ex/ex_subst.c

580

++offset;

usr.bin/vi/ex/ex_subst.c

652

BUILD(sp, s + offset, match[0].rm_eo - offset);

usr.bin/vi/ex/ex_subst.c

675

BUILD(sp, s + offset, match[0].rm_so - offset);

usr.bin/vi/ex/ex_subst.c

686

skip: offset = match[0].rm_eo;

usr.bin/vi/ex/ex_subst.c

706

BUILD(sp, s + offset, len)

usr.bin/vi/ex/ex_subst.c

709

offset = saved_offset;

usr.bin/vi/ex/ex_subst.c

723

offset -= last;

usr.bin/vi/ex/ex_subst.c

735

len = llen - offset;

usr.bin/vi/ex/ex_subst.c

739

BUILD(sp, s, offset);

usr.bin/vi/ex/ex_subst.c

748

if (offset == len) {

usr.bin/vi/ex/ex_subst.c

775

BUILD(sp, s + offset, len)

usr.bin/vi/vi/v_init.c

101

v_optchange(SCR *sp, int offset, char *str, u_long *valp)

usr.bin/vi/vi/v_init.c

103

switch (offset) {

usr.bin/vi/vi/v_scroll.c

325

recno_t offset;

usr.bin/vi/vi/v_scroll.c

348

offset = (F_ISSET(vp, VC_C1SET) ? vp->count : 1) * (IS_SPLIT(sp) ?

usr.bin/vi/vi/v_scroll.c

350

offset = offset <= 2 ? 1 : offset - 2;

usr.bin/vi/vi/v_scroll.c

351

if (vs_sm_scroll(sp, &vp->m_stop, offset, CNTRL_F))

usr.bin/vi/vi/v_scroll.c

371

recno_t offset;

usr.bin/vi/vi/v_scroll.c

399

offset = (F_ISSET(vp, VC_C1SET) ? vp->count : 1) * (IS_SPLIT(sp) ?

usr.bin/vi/vi/v_scroll.c

401

offset = offset <= 2 ? 1 : offset - 2;

usr.bin/vi/vi/v_scroll.c

402

if (vs_sm_scroll(sp, &vp->m_stop, offset, CNTRL_B))

usr.bin/vi/vi/v_txt.c

1050

if (tp->cno <= tp->offset) {

usr.bin/vi/vi/v_txt.c

1068

max = tp->offset;

usr.bin/vi/vi/v_txt.c

1147

if (tp->cno <= tp->offset) {

usr.bin/vi/vi/v_txt.c

1165

max = tp->offset;

usr.bin/vi/vi/v_txt.c

1451

if (tp->cno == tp->offset)

usr.bin/vi/vi/v_txt.c

1477

if (off == tp->offset || isblank(p[-1]))

usr.bin/vi/vi/v_txt.c

1482

if (off == tp->offset || !inword(p[-1]))

usr.bin/vi/vi/v_txt.c

1488

if (off == tp->offset ||

usr.bin/vi/vi/v_txt.c

1532

if (off == tp->ai || off == tp->offset)

usr.bin/vi/vi/v_txt.c

1619

if (off == tp->ai || off == tp->offset)

usr.bin/vi/vi/v_txt.c

1636

if ((off == tp->ai || off == tp->offset) && ex_is_unmap(p, len))

usr.bin/vi/vi/v_txt.c

1660

if (!tp->len || tp->offset || !tp->ai)

usr.bin/vi/vi/v_txt.c

1909

ai_reset = !isindent || tp->cno == tp->ai + tp->offset;

usr.bin/vi/vi/v_txt.c

1916

for (; tp->cno > tp->offset &&

usr.bin/vi/vi/v_txt.c

1995

if (off == tp->ai || off == tp->offset)

usr.bin/vi/vi/v_txt.c

2334

if (off == tp->ai || off == tp->offset)

usr.bin/vi/vi/v_txt.c

2757

if (off == tp->ai || off == tp->offset) {

usr.bin/vi/vi/v_txt.c

2774

wmtp->offset = len;

usr.bin/vi/vi/v_txt.c

2798

if (off == tp->ai || off == tp->offset)

usr.bin/vi/vi/v_txt.c

293

tp->ai = tp->insert = tp->offset = tp->owrite = 0;

usr.bin/vi/vi/v_txt.c

353

tp->offset = 0;

usr.bin/vi/vi/v_txt.c

356

tp->offset = tp->cno;

usr.bin/vi/vi/v_txt.c

363

++tp->offset;

usr.bin/vi/vi/v_txt.c

572

if (L__cedit == 1 && (L__filec == 0 || tp->cno == tp->offset)) {

usr.bin/vi/vi/v_txt.c

673

if (tp->cno <= tp->offset)

usr.bin/vi/vi/v_txt.c

681

tp->cno >= tp->offset + 1)

usr.bin/vi/vi/v_txt.c

802

if (wmt.offset != 0 ||

usr.bin/vi/vi/v_txt.c

804

#define WMTSPACE wmt.offset + wmt.owrite + wmt.insert

usr.bin/vi/vi/v_txt.c

809

ntp->cno += wmt.offset;

usr.bin/vi/vi/v_txt.c

864

if (tp->cno <= tp->offset)

usr.bin/vi/vi/v_txt.c

871

if (FL_ISSET(is_flags, IS_RUNNING) && tp->cno >= tp->offset + 1)

usr.bin/vi/vi/v_txt.c

945

if (tp->ai == 0 || tp->cno > tp->ai + tp->offset + 1)

usr.bin/vi/vi/v_txt.c

958

if (tp->ai == 0 || tp->cno > tp->ai + tp->offset + 1)

usr.bin/vi/vi/v_txt.c

963

tp->owrite += tp->cno - tp->offset;

usr.bin/vi/vi/v_txt.c

965

tp->cno = tp->offset;

usr.bin/vi/vi/v_txt.c

968

if (tp->ai == 0 || tp->cno > tp->ai + tp->offset)

usr.bin/vi/vi/v_txt.c

979

if (tp->cno <= tp->offset && LF_ISSET(TXT_BS)) {

usr.bin/vi/vi/v_txt.c

997

if (tp->cno <= tp->offset) {

usr.sbin/amd/rpcx/nfs_prot.h

248

u_int offset;

usr.sbin/amd/rpcx/nfs_prot.h

298

u_int offset;

usr.sbin/amd/rpcx/nfs_prot_xdr.c

198

if (!xdr_u_int(xdrs, &objp->offset))

usr.sbin/amd/rpcx/nfs_prot_xdr.c

247

if (!xdr_u_int(xdrs, &objp->offset))

usr.sbin/bgpd/timer.c

74

timer_set(struct timer_head *th, enum Timer timer, u_int offset)

usr.sbin/bgpd/timer.c

80

ms = monotime_from_sec(offset);

usr.sbin/btrace/ksyms.c

119

if (base_addr == 0 && (void *)phdr.p_offset <= offset &&

usr.sbin/btrace/ksyms.c

120

offset < (void *)(phdr.p_offset + phdr.p_filesz))

usr.sbin/btrace/ksyms.c

123

(offset - (void *)phdr.p_offset));

usr.sbin/btrace/ksyms.c

228

read_syms_buf(char *elfbuf, size_t elfbuf_sz, caddr_t offset, caddr_t dtrv_va)

usr.sbin/btrace/ksyms.c

241

sls = read_syms(elf, offset, dtrv_va);

usr.sbin/btrace/ksyms.c

423

Elf_Addr offset;

usr.sbin/btrace/ksyms.c

440

offset = pc - entry->sym_value;

usr.sbin/btrace/ksyms.c

441

if (offset != 0) {

usr.sbin/btrace/ksyms.c

443

entry->sym_name, (unsigned long long)offset);

usr.sbin/btrace/ksyms.c

455

Elf_Addr offset;

usr.sbin/btrace/ksyms.c

462

offset = pc - entry->sym_value;

usr.sbin/btrace/ksyms.c

463

if (offset != 0) {

usr.sbin/btrace/ksyms.c

465

entry->sym_name, (unsigned long long)offset);

usr.sbin/btrace/ksyms.c

62

read_syms(Elf *elf, const void *offset, const void *dtrv_va)

usr.sbin/dhcpd/bpf.c

267

int length = 0, offset = 0;

usr.sbin/dhcpd/bpf.c

332

offset = decode_hw_header(interface->rbuf +

usr.sbin/dhcpd/bpf.c

340

if (offset < 0) {

usr.sbin/dhcpd/bpf.c

345

interface->rbuf_offset += offset;

usr.sbin/dhcpd/bpf.c

346

hdr.bh_caplen -= offset;

usr.sbin/dhcpd/bpf.c

349

offset = decode_udp_ip_header(interface->rbuf +

usr.sbin/dhcpd/bpf.c

354

if (offset < 0) {

usr.sbin/dhcpd/bpf.c

359

interface->rbuf_offset += offset;

usr.sbin/dhcpd/bpf.c

360

hdr.bh_caplen -= offset;

usr.sbin/dhcrelay/bpf.c

376

ssize_t offset = 0;

usr.sbin/dhcrelay/bpf.c

440

offset = decode_hw_header(interface->rbuf,

usr.sbin/dhcrelay/bpf.c

449

if (offset < 0) {

usr.sbin/dhcrelay/bpf.c

455

offset = decode_udp_ip_header(interface->rbuf,

usr.sbin/dhcrelay/bpf.c

456

interface->rbuf_len, offset, pc, hdr.bh_csumflags);

usr.sbin/dhcrelay/bpf.c

459

if (offset < 0) {

usr.sbin/dhcrelay/bpf.c

464

hdr.bh_caplen -= offset - interface->rbuf_offset;

usr.sbin/dhcrelay/bpf.c

465

interface->rbuf_offset = offset;

usr.sbin/dhcrelay/packet.c

102

size_t offset, struct packet_ctx *pc, unsigned int intfhtype)

usr.sbin/dhcrelay/packet.c

108

if (buflen < offset + ETHER_HDR_LEN)

usr.sbin/dhcrelay/packet.c

117

memcpy(&buf[offset], &eh, ETHER_HDR_LEN);

usr.sbin/dhcrelay/packet.c

118

offset += ETHER_HDR_LEN;

usr.sbin/dhcrelay/packet.c

124

return (offset);

usr.sbin/dhcrelay/packet.c

128

assemble_udp_ip_header(unsigned char *buf, size_t buflen, size_t offset,

usr.sbin/dhcrelay/packet.c

134

if (buflen < offset + sizeof(ip) + sizeof(udp))

usr.sbin/dhcrelay/packet.c

150

memcpy(&buf[offset], &ip, sizeof(ip));

usr.sbin/dhcrelay/packet.c

151

offset += sizeof(ip);

usr.sbin/dhcrelay/packet.c

163

memcpy(&buf[offset], &udp, sizeof(udp));

usr.sbin/dhcrelay/packet.c

164

offset += sizeof(udp);

usr.sbin/dhcrelay/packet.c

166

return (offset);

usr.sbin/dhcrelay/packet.c

171

size_t offset, struct packet_ctx *pc, unsigned int intfhtype)

usr.sbin/dhcrelay/packet.c

178

if (buflen < offset + ENC_HDRLEN + sizeof(*ip))

usr.sbin/dhcrelay/packet.c

180

offset += ENC_HDRLEN;

usr.sbin/dhcrelay/packet.c

181

ip_len = (buf[offset] & 0xf) << 2;

usr.sbin/dhcrelay/packet.c

182

if (buflen < offset + ip_len)

usr.sbin/dhcrelay/packet.c

185

ip = (struct ip *)(buf + offset);

usr.sbin/dhcrelay/packet.c

192

offset += ip_len;

usr.sbin/dhcrelay/packet.c

198

if (buflen < offset + ETHER_HDR_LEN)

usr.sbin/dhcrelay/packet.c

201

memcpy(pc->pc_dmac, buf + offset, ETHER_ADDR_LEN);

usr.sbin/dhcrelay/packet.c

202

memcpy(pc->pc_smac, buf + offset + ETHER_ADDR_LEN,

usr.sbin/dhcrelay/packet.c

204

offset += ETHER_HDR_LEN;

usr.sbin/dhcrelay/packet.c

213

return (offset);

usr.sbin/dhcrelay/packet.c

218

size_t offset, struct packet_ctx *pc, u_int16_t csumflags)

usr.sbin/dhcrelay/packet.c

233

if (buflen < offset + sizeof(*ip))

usr.sbin/dhcrelay/packet.c

235

ip_len = (buf[offset] & 0xf) << 2;

usr.sbin/dhcrelay/packet.c

236

if (buflen < offset + ip_len)

usr.sbin/dhcrelay/packet.c

239

ip = (struct ip *)(buf + offset);

usr.sbin/dhcrelay/packet.c

244

wrapsum(checksum(buf + offset, ip_len, 0)) != 0) {

usr.sbin/dhcrelay/packet.c

266

if (buflen != offset + ntohs(ip->ip_len))

usr.sbin/dhcrelay/packet.c

268

ntohs(ip->ip_len), buflen - offset);

usr.sbin/dhcrelay/packet.c

272

if (buflen < offset + ntohs(ip->ip_len))

usr.sbin/dhcrelay/packet.c

276

if (buflen < offset + ip_len + sizeof(*udp))

usr.sbin/dhcrelay/packet.c

278

udp = (struct udphdr *)(buf + offset + ip_len);

usr.sbin/dhcrelay/packet.c

282

if (buflen < offset + ip_len + ntohs(udp->uh_ulen))

usr.sbin/dhcrelay/packet.c

284

data = buf + offset + ip_len + sizeof(*udp);

usr.sbin/dhcrelay/packet.c

335

return (offset + ip_len + sizeof(*udp));

usr.sbin/dhcrelay6/bpf.c

303

int length = 0, offset = 0;

usr.sbin/dhcrelay6/bpf.c

367

offset = decode_hw_header(interface->rbuf,

usr.sbin/dhcrelay6/bpf.c

375

if (offset < 0) {

usr.sbin/dhcrelay6/bpf.c

379

interface->rbuf_offset += offset;

usr.sbin/dhcrelay6/bpf.c

380

hdr.bh_caplen -= offset;

usr.sbin/dhcrelay6/bpf.c

383

offset = decode_udp_ip6_header(interface->rbuf,

usr.sbin/dhcrelay6/bpf.c

388

if (offset < 0) {

usr.sbin/dhcrelay6/bpf.c

392

interface->rbuf_offset += offset;

usr.sbin/dhcrelay6/bpf.c

393

hdr.bh_caplen -= offset;

usr.sbin/eigrpd/kroute.c

1331

size_t offset;

usr.sbin/eigrpd/kroute.c

1334

for (offset = 0; offset < len; offset += rtm->rtm_msglen) {

usr.sbin/eigrpd/kroute.c

1335

next = buf + offset;

usr.sbin/eigrpd/kroute.c

1337

if (len < offset + sizeof(unsigned short) ||

usr.sbin/eigrpd/kroute.c

1338

len < offset + rtm->rtm_msglen)

usr.sbin/eigrpd/kroute.c

1406

return (offset);

usr.sbin/eigrpd/tlv.c

360

unsigned int tlv_len, min_len, max_plen, plen, offset;

usr.sbin/eigrpd/tlv.c

395

offset = TLV_HDR_LEN;

usr.sbin/eigrpd/tlv.c

398

memcpy(&ri->nexthop.v4, buf + offset, sizeof(ri->nexthop.v4));

usr.sbin/eigrpd/tlv.c

399

offset += sizeof(ri->nexthop.v4);

usr.sbin/eigrpd/tlv.c

402

memcpy(&ri->nexthop.v6, buf + offset, sizeof(ri->nexthop.v6));

usr.sbin/eigrpd/tlv.c

403

offset += sizeof(ri->nexthop.v6);

usr.sbin/eigrpd/tlv.c

411

memcpy(&ri->emetric, buf + offset, sizeof(ri->emetric));

usr.sbin/eigrpd/tlv.c

417

offset += sizeof(ri->emetric);

usr.sbin/eigrpd/tlv.c

421

memcpy(&ri->metric, buf + offset, sizeof(ri->metric));

usr.sbin/eigrpd/tlv.c

424

offset += sizeof(ri->metric);

usr.sbin/eigrpd/tlv.c

427

memcpy(&ri->prefixlen, buf + offset, sizeof(ri->prefixlen));

usr.sbin/eigrpd/tlv.c

428

offset += sizeof(ri->prefixlen);

usr.sbin/eigrpd/tlv.c

450

memcpy(&ri->prefix.v4, buf + offset, plen);

usr.sbin/eigrpd/tlv.c

454

memcpy(&ri->prefix.v6, buf + offset, plen);

usr.sbin/gpioctl/gpioctl.c

110

char *driver, *offset, *mask;

usr.sbin/gpioctl/gpioctl.c

116

offset = argv[3];

usr.sbin/gpioctl/gpioctl.c

120

ga_offset = strtonum(offset, 0, INT_MAX, &errstr);

usr.sbin/gpioctl/gpioctl.c

122

errx(1, "offset is %s: %s", errstr, offset);

usr.sbin/gpioctl/gpioctl.c

319

devattach(char *dvname, int offset, u_int32_t mask, u_int32_t flags)

usr.sbin/gpioctl/gpioctl.c

325

attach.ga_offset = offset;

usr.sbin/hostapd/apme.c

347

int offset;

usr.sbin/hostapd/apme.c

349

if ((offset = hostapd_apme_offset(apme, buf, len)) < 0)

usr.sbin/hostapd/apme.c

351

wh = (struct ieee80211_frame *)(buf + offset);

usr.sbin/hostapd/handle.c

118

int offset, min_rate = 0, val;

usr.sbin/hostapd/handle.c

120

if ((offset = hostapd_apme_offset(apme, buf, len)) < 0)

usr.sbin/hostapd/handle.c

122

wh = (struct ieee80211_frame *)(buf + offset);

usr.sbin/hostapd/handle.c

289

int ret = 0, offset;

usr.sbin/hostapd/handle.c

356

if ((offset = hostapd_apme_offset(apme, buf, len)) < 0)

usr.sbin/hostapd/handle.c

358

if (write(apme->a_raw, buf + offset, len - offset) == -1)

usr.sbin/ldomctl/config.c

427

uint64_t offset, guest_use;

usr.sbin/ldomctl/config.c

460

if (!md_get_prop_val(md, node2, "offset", &offset) ||

usr.sbin/ldomctl/config.c

463

rombase = base + offset;

usr.sbin/ldomctl/mdesc.c

515

uint32_t offset;

usr.sbin/ldomctl/mdesc.c

522

offset = 0;

usr.sbin/ldomctl/mdesc.c

524

name->offset = offset;

usr.sbin/ldomctl/mdesc.c

525

offset += (strlen(name->str) + 1);

usr.sbin/ldomctl/mdesc.c

527

name_blk_size = roundup(offset, MD_ALIGNMENT_SIZE);

usr.sbin/ldomctl/mdesc.c

529

offset = 0;

usr.sbin/ldomctl/mdesc.c

531

data->offset = offset;

usr.sbin/ldomctl/mdesc.c

532

offset += data->len;

usr.sbin/ldomctl/mdesc.c

533

offset = roundup(offset, MD_ALIGNMENT_SIZE);

usr.sbin/ldomctl/mdesc.c

535

data_blk_size = roundup(offset, MD_ALIGNMENT_SIZE);

usr.sbin/ldomctl/mdesc.c

563

mde->name_offset = htobe32(node->name->offset);

usr.sbin/ldomctl/mdesc.c

573

mde->name_offset = htobe32(prop->name->offset);

usr.sbin/ldomctl/mdesc.c

583

htobe32(prop->d.data->offset);

usr.sbin/ldomctl/mdesc.h

90

uint32_t offset;

usr.sbin/ldomctl/mdesc.h

99

uint32_t offset;

usr.sbin/ldomctl/mdstore.c

120

uint64_t offset;

usr.sbin/ldomctl/mdstore.c

341

uint16_t type, uint64_t offset)

usr.sbin/ldomctl/mdstore.c

366

mr->offset = offset;

usr.sbin/ldpd/kroute.c

1555

size_t offset;

usr.sbin/ldpd/kroute.c

1558

for (offset = 0; offset < len; offset += rtm->rtm_msglen) {

usr.sbin/ldpd/kroute.c

1559

next = buf + offset;

usr.sbin/ldpd/kroute.c

1561

if (len < offset + sizeof(unsigned short) ||

usr.sbin/ldpd/kroute.c

1562

len < offset + rtm->rtm_msglen)

usr.sbin/ldpd/kroute.c

1634

return (offset);

usr.sbin/lldpd/pdu.c

49

tlv_read(struct tlv *tlv, const uint8_t *buf, size_t len, unsigned int offset)

usr.sbin/lldpd/pdu.c

54

len -= offset;

usr.sbin/lldpd/pdu.c

60

buf += offset;

usr.sbin/lldpd/pdu.c

76

tlv->tlv_offset = offset;

usr.sbin/lldpd/pdu.c

90

unsigned int offset = tlv->tlv_offset + 2 + tlv->tlv_len;

usr.sbin/lldpd/pdu.c

92

return (tlv_read(tlv, pdu, len, offset));

usr.sbin/makefs/cd9660/cd9660_rrip.h

140

char offset [ISODCL ( 12, 19)];

usr.sbin/makefs/cd9660/cd9660_write.c

376

cd9660_write_buffered(FILE *fd, off_t offset, int buff_len,

usr.sbin/makefs/cd9660/cd9660_write.c

432

off_t offset, off_t sector)

usr.sbin/makefs/cd9660/cd9660_write.c

437

offset += writenode->isoDirRecord->length[0];

usr.sbin/makefs/cd9660/cd9660_write.c

438

if (fseeko(fd, sector * diskStructure->sectorSize + offset, SEEK_SET) ==

usr.sbin/makefs/cd9660/cd9660_write.c

446

offset += CD9660_SUSP_ENTRY_SIZE(myattr);

usr.sbin/makefs/cd9660/cd9660_write.c

468

if (fseeko(fd, sector * diskStructure->sectorSize + offset,

usr.sbin/makefs/cd9660/iso9660_rrip.c

158

t->attr.su_entry.CE.offset);

usr.sbin/makefs/cd9660/iso9660_rrip.h

142

u_char offset [ISODCL ( 13, 20)];

usr.sbin/makefs/ffs.c

232

poffset = (fsopts->offset + sectorsize - 1) / sectorsize;

usr.sbin/makefs/ffs.c

328

fsopts->offset + LABELSECTOR * DEV_BSIZE + LABELOFFSET);

usr.sbin/makefs/ffs.c

365

pp->p_offset * lp->d_secsize == fsopts->offset) {

usr.sbin/makefs/ffs.c

391

fsopts->offset != 0 || fsopts->sectorsize != -1 ||

usr.sbin/makefs/ffs.c

487

if (fsopts->offset == 0)

usr.sbin/makefs/ffs.c

498

if (fsopts->offset != 0)

usr.sbin/makefs/ffs.c

499

if (lseek(fsopts->fd, fsopts->offset, SEEK_SET) == -1) {

usr.sbin/makefs/ffs.c

783

off_t bufleft, chunk, offset;

usr.sbin/makefs/ffs.c

841

offset = DIP(din, size) - bufleft;

usr.sbin/makefs/ffs.c

848

errno = ffs_balloc(&in, offset, chunk, &bp);

usr.sbin/makefs/ffs.c

856

(long long)offset, (long long)chunk);

usr.sbin/makefs/ffs/buf.c

112

off_t offset;

usr.sbin/makefs/ffs/buf.c

118

offset = bp->b_blkno * fs->sectorsize + fs->offset;

usr.sbin/makefs/ffs/buf.c

120

if (lseek(bp->b_fs->fd, offset, SEEK_SET) == -1)

usr.sbin/makefs/ffs/buf.c

57

off_t offset;

usr.sbin/makefs/ffs/buf.c

64

offset = (*bpp)->b_blkno * fs->sectorsize + fs->offset;

usr.sbin/makefs/ffs/buf.c

65

if (lseek((*bpp)->b_fs->fd, offset, SEEK_SET) == -1)

usr.sbin/makefs/ffs/buf.c

67

(long long)(*bpp)->b_blkno, (long long)offset);

usr.sbin/makefs/ffs/buf.c

71

(*bpp)->b_bcount, (long long)offset, rv);

usr.sbin/makefs/ffs/buf.c

74

(*bpp)->b_bcount, (long long)offset, rv);

usr.sbin/makefs/ffs/ffs_balloc.c

319

ffs_balloc_ufs2(struct inode *ip, off_t offset, int bufsize, struct mkfsbuf **bpp)

usr.sbin/makefs/ffs/ffs_balloc.c

332

lbn = lblkno(fs, offset);

usr.sbin/makefs/ffs/ffs_balloc.c

333

size = blkoff(fs, offset) + bufsize;

usr.sbin/makefs/ffs/ffs_balloc.c

60

ffs_balloc(struct inode *ip, off_t offset, int bufsize, struct mkfsbuf **bpp)

usr.sbin/makefs/ffs/ffs_balloc.c

63

return ffs_balloc_ufs2(ip, offset, bufsize, bpp);

usr.sbin/makefs/ffs/ffs_balloc.c

65

return ffs_balloc_ufs1(ip, offset, bufsize, bpp);

usr.sbin/makefs/ffs/ffs_balloc.c

69

ffs_balloc_ufs1(struct inode *ip, off_t offset, int bufsize, struct mkfsbuf **bpp)

usr.sbin/makefs/ffs/ffs_balloc.c

83

lbn = lblkno(fs, offset);

usr.sbin/makefs/ffs/ffs_balloc.c

84

size = blkoff(fs, offset) + bufsize;

usr.sbin/makefs/ffs/mkfs.c

752

off_t offset;

usr.sbin/makefs/ffs/mkfs.c

754

offset = bno * fsopts->sectorsize + fsopts->offset;

usr.sbin/makefs/ffs/mkfs.c

755

if (lseek(fsopts->fd, offset, SEEK_SET) < 0)

usr.sbin/makefs/ffs/mkfs.c

775

off_t offset;

usr.sbin/makefs/ffs/mkfs.c

777

offset = bno * fsopts->sectorsize + fsopts->offset;

usr.sbin/makefs/ffs/mkfs.c

778

if (lseek(fsopts->fd, offset, SEEK_SET) == -1)

usr.sbin/makefs/makefs.c

147

fsoptions.offset =

usr.sbin/makefs/makefs.h

148

off_t offset; /* offset from start of file */

usr.sbin/makefs/msdos.c

128

msdos_opt->offset = fsopts->offset;

usr.sbin/makefs/msdos/mkfs_msdos.c

256

if (o.offset == 0)

usr.sbin/makefs/msdos/mkfs_msdos.c

278

if (o.offset && o.offset != lseek(fd, o.offset, SEEK_SET)) {

usr.sbin/makefs/msdos/mkfs_msdos.c

279

warnx("cannot seek to %jd", (intmax_t)o.offset);

usr.sbin/makefs/msdos/mkfs_msdos.c

306

bpb.bsec -= (o.offset / bpb.bps);

usr.sbin/makefs/msdos/mkfs_msdos.c

612

if (!x && lseek(fd1, o.offset, SEEK_SET)) {

usr.sbin/makefs/msdos/mkfs_msdos.h

50

AOPT(off_t, offset, 0) \

usr.sbin/mopd/otherOS/pf-snit.c

158

u_short offset;

usr.sbin/mopd/otherOS/pf-snit.c

169

offset = ((int)s_offset(struct ether_header *, ether_type))/sizeof(u_short);

usr.sbin/mopd/otherOS/pf-snit.c

170

*fwp++ = ENF_PUSHWORD + offset; /* Check Ethernet type II */

usr.sbin/mopd/otherOS/pf-snit.c

173

*fwp++ = ENF_PUSHWORD + offset + 4; /* Check 802.3 protocol prot */

usr.sbin/mopd/otherOS/pf-snit.c

176

*fwp++ = ENF_PUSHWORD + offset + 1; /* Check for SSAP and DSAP */

usr.sbin/mtree/create.c

131

int fd, offset;

usr.sbin/mtree/create.c

144

offset = printf("%*s%s", indent, "", escaped_name);

usr.sbin/mtree/create.c

146

offset = printf("%*s %s", indent, "", escaped_name);

usr.sbin/mtree/create.c

150

if (offset > (INDENTNAMELEN + indent))

usr.sbin/mtree/create.c

151

offset = MAXLINELEN;

usr.sbin/mtree/create.c

153

offset += printf("%*s", (INDENTNAMELEN + indent) - offset, "");

usr.sbin/mtree/create.c

156

output(indent, &offset, "type=%s", inotype(p->fts_statp->st_mode));

usr.sbin/mtree/create.c

161

output(indent, &offset, "uname=%s", name);

usr.sbin/mtree/create.c

168

output(indent, &offset, "uid=%u", p->fts_statp->st_uid);

usr.sbin/mtree/create.c

174

output(indent, &offset, "gname=%s", name);

usr.sbin/mtree/create.c

181

output(indent, &offset, "gid=%u", p->fts_statp->st_gid);

usr.sbin/mtree/create.c

184

output(indent, &offset, "mode=%#o", p->fts_statp->st_mode & MBITS);

usr.sbin/mtree/create.c

186

output(indent, &offset, "nlink=%u", p->fts_statp->st_nlink);

usr.sbin/mtree/create.c

188

output(indent, &offset, "size=%lld",

usr.sbin/mtree/create.c

191

output(indent, &offset, "time=%lld.%ld",

usr.sbin/mtree/create.c

199

output(indent, &offset, "cksum=%u", val);

usr.sbin/mtree/create.c

208

output(indent, &offset, "md5digest=%s", md5digest);

usr.sbin/mtree/create.c

217

output(indent, &offset, "rmd160digest=%s", rmd160digest);

usr.sbin/mtree/create.c

226

output(indent, &offset, "sha1digest=%s", sha1digest);

usr.sbin/mtree/create.c

235

output(indent, &offset, "sha256digest=%s", sha256digest);

usr.sbin/mtree/create.c

245

output(indent, &offset, "link=%s", escaped_name);

usr.sbin/mtree/create.c

255

output(indent, &offset, "flags=%s", file_flags);

usr.sbin/mtree/create.c

257

output(indent, &offset, "flags=none");

usr.sbin/mtree/create.c

369

output(int indent, int *offset, const char *fmt, ...)

usr.sbin/mtree/create.c

378

if (*offset + strlen(buf) > MAXLINELEN - 3) {

usr.sbin/mtree/create.c

380

*offset = INDENTNAMELEN + indent;

usr.sbin/mtree/create.c

382

*offset += printf(" %s", buf) + 1;

usr.sbin/nsd/difffile.c

342

size_t offset = 0;

usr.sbin/nsd/difffile.c

357

offset = 2 * sizeof(void*);

usr.sbin/nsd/difffile.c

358

if(rr1->rdlength != offset + 20) {

usr.sbin/nsd/difffile.c

363

assert(rr1->rdlength == offset + 20);

usr.sbin/nsd/difffile.c

364

if (memcmp(rr1->rdata + offset, rr2->rdata + offset, 4) == 0)

usr.sbin/nsd/difffile.c

375

for (size_t i=0; i < descriptor->rdata.length && offset < rr1->rdlength; i++) {

usr.sbin/nsd/difffile.c

378

if(offset == rr1->rdlength &&

usr.sbin/nsd/difffile.c

381

if(!lookup_rdata_field_entry(descriptor, i, rr1, offset,

usr.sbin/nsd/difffile.c

387

if(!lookup_rdata_field_entry(descriptor, i, rr2, offset,

usr.sbin/nsd/difffile.c

402

offset += field_len1;

usr.sbin/nsd/difffile.c

407

const uint8_t *name1 = rr1->rdata + offset;

usr.sbin/nsd/difffile.c

408

const uint8_t *name2 = rr2->rdata + offset;

usr.sbin/nsd/difffile.c

414

length1 = buf_dname_length(name1, rr1->rdlength - offset);

usr.sbin/nsd/difffile.c

415

length2 = buf_dname_length(name2, rr2->rdlength - offset);

usr.sbin/nsd/difffile.c

427

offset += field_len1;

usr.sbin/nsd/difffile.c

435

if(memcmp(rr1->rdata+offset, rr2->rdata+offset, field_len1) != 0) {

usr.sbin/nsd/difffile.c

440

offset += field_len1;

usr.sbin/nsd/dns.h

263

uint16_t offset,

usr.sbin/nsd/ixfr.c

136

if(found) return found->offset;

usr.sbin/nsd/ixfr.c

143

const uint8_t* dname, size_t len, uint16_t offset)

usr.sbin/nsd/ixfr.c

148

if(offset > MAX_COMPRESSION_OFFSET)

usr.sbin/nsd/ixfr.c

157

entry->offset = offset;

usr.sbin/nsd/ixfr.c

163

uint8_t* dname, size_t len, uint16_t offset)

usr.sbin/nsd/ixfr.c

167

if(offset > MAX_COMPRESSION_OFFSET)

usr.sbin/nsd/ixfr.c

173

pktcompression_insert(pcomp, dname, len, offset);

usr.sbin/nsd/ixfr.c

179

if(offset > MAX_COMPRESSION_OFFSET - lablen - 1)

usr.sbin/nsd/ixfr.c

184

offset += lablen+1;

usr.sbin/nsd/ixfr.c

200

uint16_t offset;

usr.sbin/nsd/ixfr.c

207

if((offset=pktcompression_find(pcomp, rr, dname_len))!=0) {

usr.sbin/nsd/ixfr.c

210

buffer_write_u16(packet, (uint16_t)(0xc000 | offset));

usr.sbin/nsd/ixfr.c

2254

uint16_t offset = 0;

usr.sbin/nsd/ixfr.c

2259

if(rr->rdlength == offset &&

usr.sbin/nsd/ixfr.c

2262

if(!lookup_rdata_field_entry(descriptor, i, rr, offset,

usr.sbin/nsd/ixfr.c

2274

offset += field_len;

usr.sbin/nsd/ixfr.c

243

uint16_t offset; /* The offset in rr. */

usr.sbin/nsd/ixfr.c

257

offset = 0;

usr.sbin/nsd/ixfr.c

263

if(rdlen == offset && field->is_optional)

usr.sbin/nsd/ixfr.c

273

rdlen, rr, offset, &domain);

usr.sbin/nsd/ixfr.c

301

pcomp, rr+offset, rdlen-offset);

usr.sbin/nsd/ixfr.c

312

if(rdlen-offset<1)

usr.sbin/nsd/ixfr.c

314

dlen = buf_dname_length(rr+offset,

usr.sbin/nsd/ixfr.c

315

rdlen-offset);

usr.sbin/nsd/ixfr.c

322

if(rdlen-offset<1)

usr.sbin/nsd/ixfr.c

324

field_len = ((uint16_t)(rr+offset)[0]) + 1;

usr.sbin/nsd/ixfr.c

331

field_len = rdlen - offset;

usr.sbin/nsd/ixfr.c

338

if((size_t)offset+field_len > rdlen)

usr.sbin/nsd/ixfr.c

343

buffer_write(packet, rr+offset, field_len);

usr.sbin/nsd/ixfr.c

345

offset += field_len;

usr.sbin/nsd/ixfr.c

52

uint16_t offset;

usr.sbin/nsd/nsec3.c

169

size_t offset;

usr.sbin/nsd/nsec3.c

173

offset = 4;

usr.sbin/nsd/nsec3.c

174

if(rr->rdlength < offset+1 ||

usr.sbin/nsd/nsec3.c

175

rr->rdlength < offset+1+rr->rdata[offset])

usr.sbin/nsd/nsec3.c

177

offset += 1 + rr->rdata[offset];

usr.sbin/nsd/nsec3.c

178

if(rr->rdlength < offset+1 ||

usr.sbin/nsd/nsec3.c

179

rr->rdlength < offset+1+rr->rdata[offset])

usr.sbin/nsd/nsec3.c

181

offset += 1 + rr->rdata[offset];

usr.sbin/nsd/nsec3.c

182

if (rr->rdlength >= offset + 3 && /* has types in bitmap */

usr.sbin/nsd/nsec3.c

183

rr->rdata[offset] == 0 && /* first window = 0, */

usr.sbin/nsd/nsec3.c

186

(rr->rdata[offset+2] & 0x02))

usr.sbin/nsd/query.c

112

query_add_compression_domain(struct query *q, domain_type *domain, uint16_t offset)

usr.sbin/nsd/query.c

119

offset));

usr.sbin/nsd/query.c

120

query_put_dname_offset(q, domain, offset);

usr.sbin/nsd/query.c

121

offset += label_length(dname_name(domain_dname(domain))) + 1;

usr.sbin/nsd/query.c

1565

uint16_t offset;

usr.sbin/nsd/query.c

1578

offset = dname_label_offsets(q->qname)[domain_dname(closest_encloser)->label_count - 1] + QHEADERSZ;

usr.sbin/nsd/query.c

1579

query_add_compression_domain(q, closest_encloser, offset);

usr.sbin/nsd/query.c

71

query_put_dname_offset(struct query *q, domain_type *domain, uint16_t offset)

usr.sbin/nsd/query.c

77

if (offset > MAX_COMPRESSION_OFFSET)

usr.sbin/nsd/query.c

82

q->compressed_dname_offsets[domain->number] = offset;

usr.sbin/nsd/query.h

176

uint16_t offset);

usr.sbin/nsd/query.h

207

uint16_t offset);

usr.sbin/nsd/radtree.c

1246

if(byte < n->offset)

usr.sbin/nsd/radtree.c

1248

byte -= n->offset;

usr.sbin/nsd/radtree.c

1358

if(byte < n->offset)

usr.sbin/nsd/radtree.c

1362

byte -= n->offset;

usr.sbin/nsd/radtree.c

153

if(byte < n->offset) {

usr.sbin/nsd/radtree.c

156

byte -= n->offset;

usr.sbin/nsd/radtree.c

217

n->offset = byte;

usr.sbin/nsd/radtree.c

221

n->offset = byte;

usr.sbin/nsd/radtree.c

224

} else if(byte < n->offset) {

usr.sbin/nsd/radtree.c

227

unsigned need = n->offset-byte;

usr.sbin/nsd/radtree.c

244

n->offset = byte;

usr.sbin/nsd/radtree.c

246

} else if(byte-n->offset >= n->len) {

usr.sbin/nsd/radtree.c

248

unsigned need = (byte-n->offset) - n->len + 1;

usr.sbin/nsd/radtree.c

411

add->pidx = addstr[r->len] - r->node->offset;

usr.sbin/nsd/radtree.c

477

r->node->pidx = r->str[common_len]-com->offset;

usr.sbin/nsd/radtree.c

479

add->pidx = addstr[common_len]-com->offset;

usr.sbin/nsd/radtree.c

558

if(byte < n->offset || byte-n->offset >= n->len) {

usr.sbin/nsd/radtree.c

564

assert(byte>=n->offset && byte-n->offset<n->len);

usr.sbin/nsd/radtree.c

565

byte -= n->offset;

usr.sbin/nsd/radtree.c

579

} else if(n->array[byte-n->offset].node == NULL) {

usr.sbin/nsd/radtree.c

581

byte -= n->offset;

usr.sbin/nsd/radtree.c

600

if(!radsel_split(rt->region, &n->array[byte-n->offset],

usr.sbin/nsd/radtree.c

650

join[par->array[pidx].len] = child->pidx + n->offset;

usr.sbin/nsd/radtree.c

670

n->offset = 0;

usr.sbin/nsd/radtree.c

710

assert((int)shuf <= 255-(int)n->offset);

usr.sbin/nsd/radtree.c

713

n->offset += shuf;

usr.sbin/nsd/radtree.c

834

if(byte < n->offset)

usr.sbin/nsd/radtree.c

836

byte -= n->offset;

usr.sbin/nsd/radtree.c

877

if(byte < n->offset) {

usr.sbin/nsd/radtree.c

882

byte -= n->offset;

usr.sbin/nsd/radtree.h

45

uint8_t offset;

usr.sbin/nsd/rdata.c

1011

*offset += length + 4;

usr.sbin/nsd/rdata.c

1053

size_t index, const rr_type* rr, uint16_t offset, uint16_t* field_len,

usr.sbin/nsd/rdata.c

1061

offset, domain);

usr.sbin/nsd/rdata.c

1071

if(offset > rr->rdlength)

usr.sbin/nsd/rdata.c

1077

if(rr->rdlength - offset <

usr.sbin/nsd/rdata.c

1081

memcpy(domain, rr->rdata+offset, sizeof(void*));

usr.sbin/nsd/rdata.c

1084

dlen = buf_dname_length(rr->rdata+offset,

usr.sbin/nsd/rdata.c

1085

rr->rdlength-offset);

usr.sbin/nsd/rdata.c

1093

if(rr->rdlength - offset < 1)

usr.sbin/nsd/rdata.c

1095

flen = (rr->rdata+offset)[0];

usr.sbin/nsd/rdata.c

1103

*field_len = rr->rdlength - offset;

usr.sbin/nsd/rdata.c

1111

if(offset + *field_len > rr->rdlength)

usr.sbin/nsd/rdata.c

1119

const uint8_t* rdata, uint16_t rdlength, uint16_t offset,

usr.sbin/nsd/rdata.c

1127

rdata, offset, domain);

usr.sbin/nsd/rdata.c

1137

if(offset > rdlength)

usr.sbin/nsd/rdata.c

1150

dlen = buf_dname_length(rdata+offset, rdlength-offset);

usr.sbin/nsd/rdata.c

1158

if(rdlength - offset < 1)

usr.sbin/nsd/rdata.c

1160

flen = (rdata+offset)[0];

usr.sbin/nsd/rdata.c

1168

*field_len = rdlength - offset;

usr.sbin/nsd/rdata.c

1176

if(offset + *field_len > rdlength)

usr.sbin/nsd/rdata.c

1187

uint16_t offset = 0;

usr.sbin/nsd/rdata.c

1195

if(rr->rdlength == offset &&

usr.sbin/nsd/rdata.c

1198

if(!lookup_rdata_field_entry(descriptor, i, rr, offset,

usr.sbin/nsd/rdata.c

1209

offset += field_len;

usr.sbin/nsd/rdata.c

1220

uint16_t offset = 0; /* The offset in rr->rdatas. */

usr.sbin/nsd/rdata.c

1233

if(rr->rdlength == offset &&

usr.sbin/nsd/rdata.c

1236

if(!lookup_rdata_field_entry(descriptor, i, rr, offset,

usr.sbin/nsd/rdata.c

1250

memcpy(buf+pos, rr->rdata+offset, field_len);

usr.sbin/nsd/rdata.c

1253

offset += field_len;

usr.sbin/nsd/rdata.c

136

const uint8_t *rdata, uint16_t *offset)

usr.sbin/nsd/rdata.c

139

assert(rdlength >= *offset);

usr.sbin/nsd/rdata.c

140

if (rdlength - *offset == 0)

usr.sbin/nsd/rdata.c

143

name = rdata + *offset;

usr.sbin/nsd/rdata.c

163

*offset += (label - name) + 1 /* root label */;

usr.sbin/nsd/rdata.c

180

uint16_t *offset)

usr.sbin/nsd/rdata.c

184

if(rdlength - *offset < (uint16_t)sizeof(void*))

usr.sbin/nsd/rdata.c

186

memcpy(&domain, rdata+*offset, sizeof(void*));

usr.sbin/nsd/rdata.c

189

*offset += sizeof(void*);

usr.sbin/nsd/rdata.c

195

skip_string(struct buffer* output, uint16_t rdlength, uint16_t* offset)

usr.sbin/nsd/rdata.c

198

if (rdlength - *offset < 1)

usr.sbin/nsd/rdata.c

201

if (length + 1 > rdlength - *offset)

usr.sbin/nsd/rdata.c

204

*offset += length + 1;

usr.sbin/nsd/rdata.c

210

skip_strings(struct buffer* output, uint16_t rdlength, uint16_t* offset)

usr.sbin/nsd/rdata.c

213

while(*offset < rdlength) {

usr.sbin/nsd/rdata.c

214

int32_t slen = skip_string(output, rdlength, offset);

usr.sbin/nsd/rdata.c

233

uint16_t *offset)

usr.sbin/nsd/rdata.c

236

if(rdlength - *offset < 1)

usr.sbin/nsd/rdata.c

238

n = rdata[*offset];

usr.sbin/nsd/rdata.c

239

if((size_t)rdlength - *offset < 1 + n)

usr.sbin/nsd/rdata.c

243

char ch = (char) rdata[*offset+i];

usr.sbin/nsd/rdata.c

251

(unsigned) rdata[*offset+i]);

usr.sbin/nsd/rdata.c

255

*offset += 1;

usr.sbin/nsd/rdata.c

256

*offset += n;

usr.sbin/nsd/rdata.c

2584

uint16_t *offset)

usr.sbin/nsd/rdata.c

2586

size_t size = rdlength - *offset;

usr.sbin/nsd/rdata.c

2596

address_family = read_uint16(rdata + *offset);

usr.sbin/nsd/rdata.c

2597

prefix = rdata[*offset + 2];

usr.sbin/nsd/rdata.c

2598

length = rdata[*offset + 3] & APL_LENGTH_MASK;

usr.sbin/nsd/rdata.c

2599

negated = rdata[*offset + 3] & APL_NEGATION_MASK;

usr.sbin/nsd/rdata.c

2611

memmove(address, rdata + *offset + 4, length);

usr.sbin/nsd/rdata.c

2619

*offset += 4 + length;

usr.sbin/nsd/rdata.c

262

uint16_t *offset)

usr.sbin/nsd/rdata.c

265

for (size_t i = *offset; i < rdlength; ++i) {

usr.sbin/nsd/rdata.c

277

*offset = rdlength;

usr.sbin/nsd/rdata.c

2806

uint16_t offset, struct domain** domain)

usr.sbin/nsd/rdata.c

2816

if(rdlength < 3 || offset < 3)

usr.sbin/nsd/rdata.c

2827

return buf_dname_length(rdata+offset, rdlength-offset);

usr.sbin/nsd/rdata.c

283

const uint8_t* rdata, uint16_t* offset)

usr.sbin/nsd/rdata.c

288

if(rdlength - *offset < 1)

usr.sbin/nsd/rdata.c

290

len = rdata[*offset];

usr.sbin/nsd/rdata.c

291

if(((size_t)len) + 1 > (size_t)rdlength - *offset)

usr.sbin/nsd/rdata.c

295

char ch = (char) rdata[*offset + i];

usr.sbin/nsd/rdata.c

304

(unsigned) rdata[*offset + i]);

usr.sbin/nsd/rdata.c

307

*offset += 1;

usr.sbin/nsd/rdata.c

308

*offset += len;

usr.sbin/nsd/rdata.c

314

const uint8_t* rdata, uint16_t* offset)

usr.sbin/nsd/rdata.c

316

while (*offset < rdlength) {

usr.sbin/nsd/rdata.c

317

if(!print_unquoted(output, rdlength, rdata, offset))

usr.sbin/nsd/rdata.c

319

if(*offset < rdlength)

usr.sbin/nsd/rdata.c

336

uint16_t *offset)

usr.sbin/nsd/rdata.c

339

assert(rdlength >= *offset);

usr.sbin/nsd/rdata.c

340

if(((size_t)*offset) + 4 > rdlength)

usr.sbin/nsd/rdata.c

342

if(!inet_ntop(AF_INET, rdata + *offset, str, sizeof(str)))

usr.sbin/nsd/rdata.c

345

*offset += 4;

usr.sbin/nsd/rdata.c

360

uint16_t *offset)

usr.sbin/nsd/rdata.c

363

assert(rdlength >= *offset);

usr.sbin/nsd/rdata.c

364

if (rdlength - *offset < 16)

usr.sbin/nsd/rdata.c

366

if (!inet_ntop(AF_INET6, rdata + *offset, str, sizeof(str)))

usr.sbin/nsd/rdata.c

369

*offset += 16;

usr.sbin/nsd/rdata.c

3783

amtrelay_relay_length(uint16_t rdlength, const uint8_t *rdata, uint16_t offset,

usr.sbin/nsd/rdata.c

3794

if(rdlength < 2 || offset < 2)

usr.sbin/nsd/rdata.c

3805

return buf_dname_length(rdata+offset, rdlength-offset);

usr.sbin/nsd/rdata.c

384

uint16_t *offset)

usr.sbin/nsd/rdata.c

387

assert(rdlength >= *offset);

usr.sbin/nsd/rdata.c

388

if (rdlength - *offset < 8)

usr.sbin/nsd/rdata.c

390

a1 = read_uint16(rdata + *offset);

usr.sbin/nsd/rdata.c

391

a2 = read_uint16(rdata + *offset + 2);

usr.sbin/nsd/rdata.c

3910

uint16_t offset = 0;

usr.sbin/nsd/rdata.c

392

a3 = read_uint16(rdata + *offset + 4);

usr.sbin/nsd/rdata.c

3927

if((rr1->rdlength == offset || rr2->rdlength == offset) &&

usr.sbin/nsd/rdata.c

393

a4 = read_uint16(rdata + *offset + 6);

usr.sbin/nsd/rdata.c

3936

if(!lookup_rdata_field_entry(descriptor, i, rr1, offset,

usr.sbin/nsd/rdata.c

3939

if(!lookup_rdata_field_entry(descriptor, i, rr2, offset,

usr.sbin/nsd/rdata.c

396

*offset += 8;

usr.sbin/nsd/rdata.c

3965

res = compare_bytestring(rr1->rdata + offset,

usr.sbin/nsd/rdata.c

3966

field_len1, rr2->rdata + offset, field_len2);

usr.sbin/nsd/rdata.c

3971

offset += field_len1;

usr.sbin/nsd/rdata.c

4088

retrieve_rdata_ref_domain_offset(const struct rr* rr, uint16_t offset)

usr.sbin/nsd/rdata.c

4091

if(rr->rdlength < offset+sizeof(void*))

usr.sbin/nsd/rdata.c

4093

memcpy(&domain, rr->rdata+offset, sizeof(void*));

usr.sbin/nsd/rdata.c

411

const uint8_t *rdata, uint16_t *offset)

usr.sbin/nsd/rdata.c

415

if (rdlength < *offset || rdlength - *offset < 2)

usr.sbin/nsd/rdata.c

417

id = read_uint16(rdata + *offset);

usr.sbin/nsd/rdata.c

4207

uint16_t offset = 0;

usr.sbin/nsd/rdata.c

4212

if(rr->rdlength == offset &&

usr.sbin/nsd/rdata.c

4215

if(!lookup_rdata_field_entry(descriptor, i, rr, offset,

usr.sbin/nsd/rdata.c

4225

offset += field_len;

usr.sbin/nsd/rdata.c

423

*offset += 2;

usr.sbin/nsd/rdata.c

438

uint16_t *offset)

usr.sbin/nsd/rdata.c

445

assert(rdlength >= *offset);

usr.sbin/nsd/rdata.c

446

if (rdlength - *offset < 4)

usr.sbin/nsd/rdata.c

448

time = (time_t)read_uint32(rdata + *offset);

usr.sbin/nsd/rdata.c

453

*offset += 4;

usr.sbin/nsd/rdata.c

468

uint16_t *offset)

usr.sbin/nsd/rdata.c

472

if(rdlength - *offset == 0)

usr.sbin/nsd/rdata.c

474

size = rdata[*offset];

usr.sbin/nsd/rdata.c

475

if (rdlength - ((size_t)*offset) < 1 + size)

usr.sbin/nsd/rdata.c

480

*offset += 1;

usr.sbin/nsd/rdata.c

485

length = b32_ntop(rdata + *offset + 1, size,

usr.sbin/nsd/rdata.c

490

*offset += 1 + size;

usr.sbin/nsd/rdata.c

505

uint16_t *offset)

usr.sbin/nsd/rdata.c

508

size_t size = rdlength - *offset;

usr.sbin/nsd/rdata.c

515

length = __b64_ntop(rdata + *offset, size,

usr.sbin/nsd/rdata.c

520

*offset += size;

usr.sbin/nsd/rdata.c

552

uint16_t *offset)

usr.sbin/nsd/rdata.c

554

size_t size = rdlength - *offset;

usr.sbin/nsd/rdata.c

560

buffer_print_hex(output, rdata+*offset, size);

usr.sbin/nsd/rdata.c

562

*offset += size;

usr.sbin/nsd/rdata.c

577

uint16_t *offset)

usr.sbin/nsd/rdata.c

580

assert(rdlength >= *offset);

usr.sbin/nsd/rdata.c

581

if (rdlength - *offset == 0)

usr.sbin/nsd/rdata.c

584

length = rdata[*offset];

usr.sbin/nsd/rdata.c

585

if (rdlength - *offset < 1 + length)

usr.sbin/nsd/rdata.c

591

buffer_print_hex(output, rdata + *offset + 1, length);

usr.sbin/nsd/rdata.c

592

*offset += 1 + (uint16_t)length;

usr.sbin/nsd/rdata.c

599

skip_nsec(struct buffer* packet, uint16_t rdlength, uint16_t *offset)

usr.sbin/nsd/rdata.c

604

while (rdlength - *offset - length > 2) {

usr.sbin/nsd/rdata.c

611

if (rdlength - *offset - length < 2 + blocks)

usr.sbin/nsd/rdata.c

618

*offset += length;

usr.sbin/nsd/rdata.c

619

if (rdlength != *offset)

usr.sbin/nsd/rdata.c

636

const uint8_t *rdata, uint16_t *offset)

usr.sbin/nsd/rdata.c

640

rdata += *offset;

usr.sbin/nsd/rdata.c

641

while(rdlength - *offset > 0) {

usr.sbin/nsd/rdata.c

646

if(rdlength - *offset < 2)

usr.sbin/nsd/rdata.c

650

*offset += 2;

usr.sbin/nsd/rdata.c

652

if(rdlength - *offset < bitmap_size)

usr.sbin/nsd/rdata.c

668

*offset += bitmap_size;

usr.sbin/nsd/rdata.c

964

uint16_t *offset)

usr.sbin/nsd/rdata.c

970

assert(rdlength >= *offset);

usr.sbin/nsd/rdata.c

971

if (rdlength - *offset < 4)

usr.sbin/nsd/rdata.c

974

key = read_uint16(rdata + *offset);

usr.sbin/nsd/rdata.c

975

length = read_uint16(rdata + *offset + 2);

usr.sbin/nsd/rdata.c

977

if (rdlength - *offset < length + 4)

usr.sbin/nsd/rdata.c

985

if(!svcparams[key].print_rdata(output, key, rdata+*offset+4, length))

usr.sbin/nsd/rdata.c

987

*offset += length+4;

usr.sbin/nsd/rdata.c

993

*offset += 4;

usr.sbin/nsd/rdata.c

998

dp = rdata + *offset + 4;

usr.sbin/nsd/rdata.h

318

uint16_t offset, struct domain** domain);

usr.sbin/nsd/rdata.h

498

uint16_t offset, struct domain** domain);

usr.sbin/nsd/rdata.h

550

size_t index, const rr_type* rr, uint16_t offset, uint16_t* field_len,

usr.sbin/nsd/rdata.h

558

const uint8_t* rdata, uint16_t rdlength, uint16_t offset,

usr.sbin/nsd/rdata.h

590

uint16_t offset);

usr.sbin/nsd/rdata.h

671

uint16_t offset) {

usr.sbin/nsd/rdata.h

673

assert(rr->rdlength >= offset+(uint16_t)sizeof(void*));

usr.sbin/nsd/rdata.h

674

memcpy(&domain, rr->rdata+offset, sizeof(void*));

usr.sbin/nsd/simdzone/src/generic/types.h

407

size_t offset = highest_port < 0 ? 0 : (size_t)highest_port / 8 + 1;

usr.sbin/nsd/simdzone/src/generic/types.h

409

memset(bitmap + offset, 0, length - offset);

usr.sbin/nsd/udb.h

466

int udb_exp_offset(uint64_t offset);

usr.sbin/ntpd/client.c

235

handle_auto(uint8_t trusted, double offset)

usr.sbin/ntpd/client.c

247

if (offset < AUTO_THRESHOLD) {

usr.sbin/ntpd/client.c

253

v[count++] = offset;

usr.sbin/ntpd/client.c

260

offset = (v[AUTO_REPLIES / 2 - 1] + v[AUTO_REPLIES / 2]) / 2;

usr.sbin/ntpd/client.c

262

offset = v[AUTO_REPLIES / 2];

usr.sbin/ntpd/client.c

263

priv_settime(offset, "");

usr.sbin/ntpd/client.c

286

double T1, T2, T3, T4, offset, delay;

usr.sbin/ntpd/client.c

386

p->reply[p->shift].offset = ((T2 - T1) + (T3 - T4)) / 2 - getoffset();

usr.sbin/ntpd/client.c

437

offset = p->reply[p->shift].offset;

usr.sbin/ntpd/client.c

443

handle_auto(p->trusted, p->reply[p->shift].offset);

usr.sbin/ntpd/client.c

445

priv_settime(p->reply[p->shift].offset, "");

usr.sbin/ntpd/client.c

459

offset, delay, (long long)interval);

usr.sbin/ntpd/constraint.c

682

double offset;

usr.sbin/ntpd/constraint.c

696

offset = gettime_from_timeval(&tv[0]) -

usr.sbin/ntpd/constraint.c

701

offset);

usr.sbin/ntpd/control.c

368

cp->offset = cp->delay = 0.0;

usr.sbin/ntpd/control.c

371

cp->offset += p->reply[shift].offset;

usr.sbin/ntpd/control.c

383

cp->offset /= validdelaycnt;

usr.sbin/ntpd/control.c

413

cp->offset *= 1000.0;

usr.sbin/ntpd/control.c

455

cs->offset = s->offsets[shift].offset * 1000.0;

usr.sbin/ntpd/ntp.c

317

if (conf->settime && s->offsets[0].offset)

usr.sbin/ntpd/ntp.c

318

priv_settime(s->offsets[0].offset, NULL);

usr.sbin/ntpd/ntp.c

706

priv_adjfreq(double offset)

usr.sbin/ntpd/ntp.c

720

conf->freq.overall_offset += offset;

usr.sbin/ntpd/ntp.c

721

offset = conf->freq.overall_offset;

usr.sbin/ntpd/ntp.c

724

conf->freq.xy += offset * curtime;

usr.sbin/ntpd/ntp.c

726

conf->freq.y += offset;

usr.sbin/ntpd/ntp.c

802

offset_median = offsets[i]->offset;

usr.sbin/ntpd/ntp.c

824

p->reply[i].offset -= offset_median;

usr.sbin/ntpd/ntp.c

829

s->offsets[i].offset -= offset_median;

usr.sbin/ntpd/ntp.c

830

s->update.offset -= offset_median;

usr.sbin/ntpd/ntp.c

845

if ((*a)->offset < (*b)->offset)

usr.sbin/ntpd/ntp.c

847

else if ((*a)->offset > (*b)->offset)

usr.sbin/ntpd/ntp.c

854

priv_settime(double offset, char *msg)

usr.sbin/ntpd/ntp.c

856

if (offset == 0)

usr.sbin/ntpd/ntp.c

859

&offset, sizeof(offset));

usr.sbin/ntpd/ntp.c

874

update_scale(double offset)

usr.sbin/ntpd/ntp.c

876

offset += getoffset();

usr.sbin/ntpd/ntp.c

877

if (offset < 0)

usr.sbin/ntpd/ntp.c

878

offset = -offset;

usr.sbin/ntpd/ntp.c

880

if (offset > QSCALE_OFF_MAX || !conf->status.synced ||

usr.sbin/ntpd/ntp.c

883

else if (offset < QSCALE_OFF_MIN)

usr.sbin/ntpd/ntp.c

886

conf->scale = QSCALE_OFF_MAX / offset;

usr.sbin/ntpd/ntpd.c

881

printf(" %12.3fms %9.3fms %8.3fms\n", cpeer->offset,

usr.sbin/ntpd/ntpd.c

927

csensor->offset, csensor->correction);

usr.sbin/ntpd/ntpd.h

151

double offset;

usr.sbin/ntpd/ntpd.h

279

double offset;

usr.sbin/ntpd/ntpd.h

292

double offset;

usr.sbin/ntpd/sensors.c

216

s->offsets[s->shift].offset = (sensor.value / -1e9) - getoffset() +

usr.sbin/ntpd/sensors.c

230

s->offsets[s->shift].offset);

usr.sbin/ntpd/sensors.c

258

s->update.offset =

usr.sbin/ntpd/sensors.c

259

(offsets[i - 1]->offset + offsets[i]->offset) / 2;

usr.sbin/ntpd/sensors.c

263

log_debug("sensor update %s: offset %f", s->device, s->update.offset);

usr.sbin/ospf6d/interface.c

853

int offset = offsetof(struct ospf_hdr, chksum);

usr.sbin/ospf6d/interface.c

855

log_debug("if_set_ipv6_checksum setting cksum offset to %d", offset);

usr.sbin/ospf6d/interface.c

856

if (setsockopt(fd, IPPROTO_IPV6, IPV6_CHECKSUM, &offset,

usr.sbin/ospf6d/interface.c

857

sizeof(offset)) == -1) {

usr.sbin/ospf6d/kroute.c

1356

size_t offset;

usr.sbin/ospf6d/kroute.c

1359

for (offset = 0; offset < len; offset += rtm->rtm_msglen) {

usr.sbin/ospf6d/kroute.c

1360

next = buf + offset;

usr.sbin/ospf6d/kroute.c

1362

if (len < offset + sizeof(u_short) ||

usr.sbin/ospf6d/kroute.c

1363

len < offset + rtm->rtm_msglen)

usr.sbin/ospf6d/kroute.c

1614

return (offset);

usr.sbin/ospfd/kroute.c

1393

size_t offset;

usr.sbin/ospfd/kroute.c

1396

for (offset = 0; offset < len; offset += rtm->rtm_msglen) {

usr.sbin/ospfd/kroute.c

1397

next = buf + offset;

usr.sbin/ospfd/kroute.c

1399

if (len < offset + sizeof(u_short) ||

usr.sbin/ospfd/kroute.c

1400

len < offset + rtm->rtm_msglen)

usr.sbin/ospfd/kroute.c

1648

return (offset);

usr.sbin/pppd/pppstats/pppstats.c

143

#define V(offset) MAX0(cur.offset - old.offset)

usr.sbin/pppd/pppstats/pppstats.c

144

#define W(offset) MAX0(ccs.offset - ocs.offset)

usr.sbin/procmap/procmap.c

640

printf(" offset = %lx,", (unsigned long)vme->offset);

usr.sbin/procmap/procmap.c

765

(unsigned long)vme->offset,

usr.sbin/procmap/procmap.c

773

vme->object.uvm_obj, (unsigned long)vme->offset,

usr.sbin/procmap/procmap.c

825

(int)sizeof(void *) * 2, (unsigned long)vme->offset,

usr.sbin/rdate/ntp.c

142

double offset, error;

usr.sbin/rdate/ntp.c

167

ret = sync_ntp(s, res->ai_addr, &offset, &error);

usr.sbin/rdate/ntp.c

183

fprintf(stderr, "Correction: %.6f +/- %.6f\n", offset, error);

usr.sbin/rdate/ntp.c

189

create_timeval(offset, new, adjust);

usr.sbin/rdate/ntp.c

193

sync_ntp(int fd, const struct sockaddr *peer, double *offset, double *error)

usr.sbin/rdate/ntp.c

203

*offset = 0.0;

usr.sbin/rdate/ntp.c

243

if ((a = x - *offset) < 0.0)

usr.sbin/rdate/ntp.c

249

*offset = x;

usr.sbin/rdate/ntp.c

254

fprintf(stderr, "Best: %.6f +/- %.6f\n", *offset, *error);

usr.sbin/rdate/ntp.c

447

current_time(double offset)

usr.sbin/rdate/ntp.c

464

return (offset + TAI64_TO_SEC(t) + 1.0e-6 * current.tv_usec);

usr.sbin/relayd/util.c

332

print_hex(uint8_t *buf, off_t offset, size_t length)

usr.sbin/relayd/util.c

346

print_debug("%02x", buf[offset + i]);

usr.sbin/sasyncd/net.c

331

int i, offset;

usr.sbin/sasyncd/net.c

386

offset = 0;

usr.sbin/sasyncd/net.c

390

memcpy(m->buf + offset, &v, sizeof v);

usr.sbin/sasyncd/net.c

391

offset += sizeof v;

usr.sbin/sasyncd/net.c

393

memcpy(m->buf + offset, &v, sizeof v);

usr.sbin/sasyncd/net.c

394

offset += sizeof v;

usr.sbin/sasyncd/net.c

396

memcpy(m->buf + offset, &v, sizeof v);

usr.sbin/sasyncd/net.c

397

offset += sizeof v;

usr.sbin/sasyncd/net.c

398

memcpy(m->buf + offset, hash, sizeof hash);

usr.sbin/sasyncd/net.c

399

offset += sizeof hash;

usr.sbin/sasyncd/net.c

400

memcpy(m->buf + offset, iv, sizeof iv);

usr.sbin/sasyncd/net.c

401

offset += sizeof iv;

usr.sbin/sasyncd/net.c

402

memcpy(m->buf + offset, buf, len);

usr.sbin/sasyncd/net.c

668

int padlen = 0, offset = 0;

usr.sbin/sasyncd/net.c

710

offset = 0;

usr.sbin/sasyncd/net.c

711

memcpy(&v, blob + offset, sizeof v);

usr.sbin/sasyncd/net.c

713

offset += sizeof v;

usr.sbin/sasyncd/net.c

720

memcpy(&v, blob + offset, sizeof v);

usr.sbin/sasyncd/net.c

722

offset += sizeof v;

usr.sbin/sasyncd/net.c

724

rhash = blob + offset;

usr.sbin/smtpd/mta_session.c

560

int offset;

usr.sbin/smtpd/mta_session.c

690

offset = strlen(ibuf+1)+2;

usr.sbin/smtpd/mta_session.c

692

base64_encode((unsigned char *)ibuf + offset, strlen(ibuf + offset), obuf, sizeof obuf);

usr.sbin/smtpd/smtpctl.c

402

srv_iter_evpids(uint32_t msgid, uint64_t *evpid, int *offset)

usr.sbin/smtpd/smtpctl.c

408

if (*offset == 0) {

usr.sbin/smtpd/smtpctl.c

424

if (*offset >= n)

usr.sbin/smtpd/smtpctl.c

426

*evpid = evpids[*offset];

usr.sbin/smtpd/smtpctl.c

427

*offset += 1;

usr.sbin/smtpd/to.c

148

long offset;

usr.sbin/smtpd/to.c

154

offset = lt->tm_gmtoff;

usr.sbin/smtpd/to.c

163

offset >= 0 ? '+' : '-',

usr.sbin/smtpd/to.c

164

abs((int)offset / 3600),

usr.sbin/smtpd/to.c

165

abs((int)offset % 3600) / 60,

usr.sbin/smtpd/to.c

558

size_t offset;

usr.sbin/smtpd/to.c

569

offset = p - s;

usr.sbin/smtpd/to.c

574

p = buffer + offset;

usr.sbin/smtpd/unpack_dns.c

128

rr->rr.other.rdata = p->buf + p->offset;

usr.sbin/smtpd/unpack_dns.c

130

p->offset += rdlen;

usr.sbin/smtpd/unpack_dns.c

137

if (p->offset - save_offset != rdlen)

usr.sbin/smtpd/unpack_dns.c

144

dname_expand(const unsigned char *data, size_t len, size_t offset,

usr.sbin/smtpd/unpack_dns.c

151

end = start = offset;

usr.sbin/smtpd/unpack_dns.c

154

if (offset >= len)

usr.sbin/smtpd/unpack_dns.c

157

if (!(n = data[offset]))

usr.sbin/smtpd/unpack_dns.c

161

if (offset + 2 > len)

usr.sbin/smtpd/unpack_dns.c

163

ptr = 256 * (n & ~0xc0) + data[offset + 1];

usr.sbin/smtpd/unpack_dns.c

166

if (end < offset + 2)

usr.sbin/smtpd/unpack_dns.c

167

end = offset + 2;

usr.sbin/smtpd/unpack_dns.c

168

offset = start = ptr;

usr.sbin/smtpd/unpack_dns.c

171

if (offset + n + 1 > len)

usr.sbin/smtpd/unpack_dns.c

177

memmove(dst, data + offset, count);

usr.sbin/smtpd/unpack_dns.c

182

offset += n + 1;

usr.sbin/smtpd/unpack_dns.c

183

if (end < offset)

usr.sbin/smtpd/unpack_dns.c

184

end = offset;

usr.sbin/smtpd/unpack_dns.c

186

if (end < offset + 1)

usr.sbin/smtpd/unpack_dns.c

187

end = offset + 1;

usr.sbin/smtpd/unpack_dns.c

232

if (p->len - p->offset < len) {

usr.sbin/smtpd/unpack_dns.c

237

memmove(data, p->buf + p->offset, len);

usr.sbin/smtpd/unpack_dns.c

238

p->offset += len;

usr.sbin/smtpd/unpack_dns.c

285

e = dname_expand(p->buf, p->len, p->offset, &p->offset, dst, max);

usr.sbin/smtpd/unpack_dns.c

35

unpack->offset = 0;

usr.sbin/smtpd/unpack_dns.c

79

if (p->len - p->offset < rdlen) {

usr.sbin/smtpd/unpack_dns.c

84

save_offset = p->offset;

usr.sbin/smtpd/unpack_dns.h

28

size_t offset;

usr.sbin/tcpdump/print-nhrp.c

76

u_int16_t offset;

usr.sbin/unbound/dns64/dns64.c

199

extract_ipv4(const uint8_t ipv6[], size_t ipv6_len, const int offset)

usr.sbin/unbound/dns64/dns64.c

204

log_assert(offset == 32 || offset == 40 || offset == 48 || offset == 56 ||

usr.sbin/unbound/dns64/dns64.c

205

offset == 64 || offset == 96);

usr.sbin/unbound/dns64/dns64.c

206

for(i = 0, pos = offset / 8; i < 4; i++, pos++) {

usr.sbin/unbound/iterator/iter_scrub.c

114

size_t offset = 0;

usr.sbin/unbound/iterator/iter_scrub.c

121

offset = 0;

usr.sbin/unbound/iterator/iter_scrub.c

125

offset = 2;

usr.sbin/unbound/iterator/iter_scrub.c

128

offset = 6;

usr.sbin/unbound/iterator/iter_scrub.c

137

if(len < offset+1)

usr.sbin/unbound/iterator/iter_scrub.c

139

*nm = rr->ttl_data+sizeof(uint32_t)+sizeof(uint16_t)+offset;

usr.sbin/unbound/services/authzone.c

2540

struct dns_msg* msg, struct auth_rrset* rrset, size_t offset)

usr.sbin/unbound/services/authzone.c

2549

if(d->rr_len[i] < 2+offset)

usr.sbin/unbound/services/authzone.c

2551

if(!(dlen = dname_valid(d->rr_data[i]+2+offset,

usr.sbin/unbound/services/authzone.c

2552

d->rr_len[i]-2-offset)))

usr.sbin/unbound/services/authzone.c

2554

domain = az_find_name(z, d->rr_data[i]+2+offset, dlen);

usr.sbin/unbound/services/listen_dnsport.c

4367

int64_t stream_id, uint64_t offset, const uint8_t* data,

usr.sbin/unbound/services/listen_dnsport.c

4374

"datalen %d%s%s", (int)stream_id, (int)offset, (int)datalen,

usr.sbin/unbound/services/listen_dnsport.c

4466

int64_t stream_id, uint64_t offset, uint64_t datalen, void* user_data,

usr.sbin/unbound/services/listen_dnsport.c

4472

"datalen %d", (int)stream_id, (int)offset, (int)datalen);

usr.sbin/unbound/services/listen_dnsport.c

4483

if(offset+datalen >= stream->outlen) {

usr.sbin/unbound/sldns/keyraw.c

206

uint16_t offset;

usr.sbin/unbound/sldns/keyraw.c

212

offset = 1;

usr.sbin/unbound/sldns/keyraw.c

220

*q = BN_bin2bn(key+offset, SHA_DIGEST_LENGTH, NULL);

usr.sbin/unbound/sldns/keyraw.c

221

offset += SHA_DIGEST_LENGTH;

usr.sbin/unbound/sldns/keyraw.c

223

*p = BN_bin2bn(key+offset, (int)length, NULL);

usr.sbin/unbound/sldns/keyraw.c

224

offset += length;

usr.sbin/unbound/sldns/keyraw.c

226

*g = BN_bin2bn(key+offset, (int)length, NULL);

usr.sbin/unbound/sldns/keyraw.c

227

offset += length;

usr.sbin/unbound/sldns/keyraw.c

229

*y = BN_bin2bn(key+offset, (int)length, NULL);

usr.sbin/unbound/sldns/keyraw.c

381

uint16_t offset;

usr.sbin/unbound/sldns/keyraw.c

392

offset = 3;

usr.sbin/unbound/sldns/keyraw.c

395

offset = 1;

usr.sbin/unbound/sldns/keyraw.c

399

if(len < (size_t)offset + exp + 1)

usr.sbin/unbound/sldns/keyraw.c

405

(void) BN_bin2bn(key+offset, (int)exp, *e);

usr.sbin/unbound/sldns/keyraw.c

406

offset += exp;

usr.sbin/unbound/sldns/keyraw.c

415

(void) BN_bin2bn(key+offset, (int)(len - offset), *n);

usr.sbin/unbound/sldns/parseutil.c

170

int32_t offset = (int32_t)((uint32_t) time - (uint32_t) now);

usr.sbin/unbound/sldns/parseutil.c

171

return (int64_t) now + offset;

usr.sbin/unbound/testcode/doqclient.c

938

int64_t stream_id, uint64_t offset, const uint8_t* data,

usr.sbin/unbound/testcode/doqclient.c

945

(int)stream_id, (int)offset, (int)datalen,

usr.sbin/unbound/testcode/testpkts.c

319

hexstr2bin(char *hexstr, int len, uint8_t *buf, size_t offset, size_t buf_len)

usr.sbin/unbound/testcode/testpkts.c

350

if (bufpos + offset + 1 <= buf_len) {

usr.sbin/unbound/testcode/testpkts.c

351

buf[bufpos+offset] = int8;

usr.sbin/unbound/util/data/msgencode.c

182

compress_tree_newnode(uint8_t* dname, int labs, size_t offset,

usr.sbin/unbound/util/data/msgencode.c

193

n->offset = offset;

usr.sbin/unbound/util/data/msgencode.c

210

compress_tree_store(uint8_t* dname, int labs, size_t offset,

usr.sbin/unbound/util/data/msgencode.c

222

if(offset > PTR_MAX_OFFSET) {

usr.sbin/unbound/util/data/msgencode.c

226

if(!(newnode = compress_tree_newnode(dname, labs, offset,

usr.sbin/unbound/util/data/msgencode.c

242

offset += lablen+1;

usr.sbin/unbound/util/data/msgencode.c

284

ptr = PTR_CREATE(p->offset);

usr.sbin/unbound/util/data/msgencode.c

306

*owner_ptr = htons(PTR_CREATE(p->offset));

usr.sbin/unbound/util/data/msgencode.c

94

size_t offset;

usr.sbin/unbound/util/data/msgparse.h

213

#define PTR_CREATE(offset) ((uint16_t)(0xc000 | (offset)))

usr.sbin/unbound/util/shm_side/shm_main.c

230

int offset;

usr.sbin/unbound/util/shm_side/shm_main.c

237

offset = worker->thread_num + 1;

usr.sbin/unbound/util/shm_side/shm_main.c

239

stat_info = worker->daemon->shm_info->ptr_arr + offset;

usr.sbin/unbound/validator/val_secalgo.c

1122

uint16_t offset;

usr.sbin/unbound/validator/val_secalgo.c

1132

offset = 1;

usr.sbin/unbound/validator/val_secalgo.c

1140

Q.data = key+offset;

usr.sbin/unbound/validator/val_secalgo.c

1142

offset += SHA1_LENGTH;

usr.sbin/unbound/validator/val_secalgo.c

1144

P.data = key+offset;

usr.sbin/unbound/validator/val_secalgo.c

1146

offset += length;

usr.sbin/unbound/validator/val_secalgo.c

1148

G.data = key+offset;

usr.sbin/unbound/validator/val_secalgo.c

1150

offset += length;

usr.sbin/unbound/validator/val_secalgo.c

1152

Y.data = key+offset;

usr.sbin/unbound/validator/val_secalgo.c

1154

offset += length;

usr.sbin/unbound/validator/val_secalgo.c

1183

uint16_t offset;

usr.sbin/unbound/validator/val_secalgo.c

1195

offset = 3;

usr.sbin/unbound/validator/val_secalgo.c

1198

offset = 1;

usr.sbin/unbound/validator/val_secalgo.c

1202

if(len < (size_t)offset + exp + 1)

usr.sbin/unbound/validator/val_secalgo.c

1205

exponent.data = key+offset;

usr.sbin/unbound/validator/val_secalgo.c

1207

offset += exp;

usr.sbin/unbound/validator/val_secalgo.c

1208

modulus.data = key+offset;

usr.sbin/unbound/validator/val_secalgo.c

1209

modulus.len = (len - offset);

usr.sbin/unbound/validator/val_secalgo.c

1761

size_t offset;

usr.sbin/unbound/validator/val_secalgo.c

1819

offset = 1;

usr.sbin/unbound/validator/val_secalgo.c

1820

nettle_mpz_set_str_256_u(pubkey.q, 20, key+offset);

usr.sbin/unbound/validator/val_secalgo.c

1821

offset += 20;

usr.sbin/unbound/validator/val_secalgo.c

1822

nettle_mpz_set_str_256_u(pubkey.p, (64 + key_t_value*8), key+offset);

usr.sbin/unbound/validator/val_secalgo.c

1823

offset += (64 + key_t_value*8);

usr.sbin/unbound/validator/val_secalgo.c

1824

nettle_mpz_set_str_256_u(pubkey.g, (64 + key_t_value*8), key+offset);

usr.sbin/unbound/validator/val_secalgo.c

1825

offset += (64 + key_t_value*8);

usr.sbin/unbound/validator/val_secalgo.c

1826

nettle_mpz_set_str_256_u(pubkey.y, (64 + key_t_value*8), key+offset);

usr.sbin/vmd/dhcp.c

105

optslen = buflen - offset - OPTIONS_OFFSET;

usr.sbin/vmd/dhcp.c

108

opts = buf + offset + OPTIONS_OFFSET;

usr.sbin/vmd/dhcp.c

176

if ((offset = assemble_hw_header(respbuf, respbuflen, 0,

usr.sbin/vmd/dhcp.c

256

if ((offset = assemble_udp_ip_header(respbuf, respbuflen, offset, &pc,

usr.sbin/vmd/dhcp.c

262

memcpy(respbuf + offset, &resp, resplen);

usr.sbin/vmd/dhcp.c

263

respbuflen = offset + resplen;

usr.sbin/vmd/dhcp.c

49

ssize_t offset, optslen, respbuflen = 0;

usr.sbin/vmd/dhcp.c

67

if ((offset = decode_hw_header(buf, buflen, 0, &pc, HTYPE_ETHER)) < 0)

usr.sbin/vmd/dhcp.c

77

if ((offset = decode_udp_ip_header(buf, buflen, offset, &pc)) < 0)

usr.sbin/vmd/dhcp.c

85

if ((size_t)offset + OPTIONS_OFFSET > buflen)

usr.sbin/vmd/dhcp.c

88

memcpy(&req, buf + offset, OPTIONS_OFFSET);

usr.sbin/vmd/fw_cfg.c

128

fw_cfg_state.offset = 0;

usr.sbin/vmd/fw_cfg.c

142

fw_cfg_state.offset = 0;

usr.sbin/vmd/fw_cfg.c

186

if (fw_cfg_state.offset < fw_cfg_state.size)

usr.sbin/vmd/fw_cfg.c

187

len = fw_cfg_state.size - fw_cfg_state.offset;

usr.sbin/vmd/fw_cfg.c

195

fw_cfg_state.data + fw_cfg_state.offset, len)) {

usr.sbin/vmd/fw_cfg.c

207

fw_cfg_state.offset += len;

usr.sbin/vmd/fw_cfg.c

209

if (fw_cfg_state.offset == fw_cfg_state.size)

usr.sbin/vmd/fw_cfg.c

239

if (fw_cfg_state.offset < fw_cfg_state.size) {

usr.sbin/vmd/fw_cfg.c

241

fw_cfg_state.data[fw_cfg_state.offset++]);

usr.sbin/vmd/fw_cfg.c

242

if (fw_cfg_state.offset == fw_cfg_state.size)

usr.sbin/vmd/fw_cfg.c

59

size_t offset;

usr.sbin/vmd/loadfile_elf.c

105

#define LOADADDR(a) ((((u_long)(a)) + offset)&0xfffffff)

usr.sbin/vmd/loadfile_elf.c

617

paddr_t offset = marks[MARK_START], shpp, elfp;

usr.sbin/vmd/loadfile_elf.c

835

paddr_t offset = marks[MARK_START], shpp, elfp;

usr.sbin/vmd/packet.c

105

if (buflen < offset + ETHER_HDR_LEN)

usr.sbin/vmd/packet.c

114

memcpy(&buf[offset], &eh, ETHER_HDR_LEN);

usr.sbin/vmd/packet.c

115

offset += ETHER_HDR_LEN;

usr.sbin/vmd/packet.c

121

return (offset);

usr.sbin/vmd/packet.c

125

assemble_udp_ip_header(unsigned char *buf, size_t buflen, size_t offset,

usr.sbin/vmd/packet.c

131

if (buflen < offset + sizeof(ip) + sizeof(udp))

usr.sbin/vmd/packet.c

147

memcpy(&buf[offset], &ip, sizeof(ip));

usr.sbin/vmd/packet.c

148

offset += sizeof(ip);

usr.sbin/vmd/packet.c

160

memcpy(&buf[offset], &udp, sizeof(udp));

usr.sbin/vmd/packet.c

161

offset += sizeof(udp);

usr.sbin/vmd/packet.c

163

return (offset);

usr.sbin/vmd/packet.c

168

size_t offset, struct packet_ctx *pc, unsigned int intfhtype)

usr.sbin/vmd/packet.c

177

if (buflen < offset + ENC_HDRLEN + sizeof(*ip))

usr.sbin/vmd/packet.c

179

offset += ENC_HDRLEN;

usr.sbin/vmd/packet.c

180

ip_len = (buf[offset] & 0xf) << 2;

usr.sbin/vmd/packet.c

181

if (buflen < offset + ip_len)

usr.sbin/vmd/packet.c

184

ip = (struct ip *)(buf + offset);

usr.sbin/vmd/packet.c

191

offset += ip_len;

usr.sbin/vmd/packet.c

197

if (buflen < offset + ETHER_HDR_LEN)

usr.sbin/vmd/packet.c

200

eh = (struct ether_header *)(buf + offset);

usr.sbin/vmd/packet.c

208

offset += ETHER_HDR_LEN;

usr.sbin/vmd/packet.c

217

return (offset);

usr.sbin/vmd/packet.c

222

size_t offset, struct packet_ctx *pc)

usr.sbin/vmd/packet.c

232

if (buflen < offset + sizeof(*ip))

usr.sbin/vmd/packet.c

234

ip = (struct ip *)(buf + offset);

usr.sbin/vmd/packet.c

239

buflen < offset + ip_len)

usr.sbin/vmd/packet.c

246

if (wrapsum(checksum(buf + offset, ip_len, 0)) != 0)

usr.sbin/vmd/packet.c

260

if (buflen != offset + ntohs(ip->ip_len))

usr.sbin/vmd/packet.c

262

ntohs(ip->ip_len), buflen - offset);

usr.sbin/vmd/packet.c

266

if (buflen < offset + ntohs(ip->ip_len))

usr.sbin/vmd/packet.c

270

if (buflen < offset + ip_len + sizeof(*udp))

usr.sbin/vmd/packet.c

272

udp = (struct udphdr *)(buf + offset + ip_len);

usr.sbin/vmd/packet.c

275

if (buflen < offset + ip_len + ntohs(udp->uh_ulen))

usr.sbin/vmd/packet.c

277

data = buf + offset + ip_len + sizeof(*udp);

usr.sbin/vmd/packet.c

305

return (offset + ip_len + sizeof(*udp));

usr.sbin/vmd/packet.c

99

size_t offset, struct packet_ctx *pc, unsigned int intfhtype)

usr.sbin/vmd/vioblk.c

254

off_t offset;

usr.sbin/vmd/vioblk.c

314

offset = cmd->sector * VIRTIO_BLK_SECTOR_SIZE;

usr.sbin/vmd/vioblk.c

315

sz = vioblk_io(vioblk, vq_info, is_write, offset, table,

usr.sbin/vmd/vioblk.c

642

off_t offset, struct vring_desc *desc_tbl, struct vring_desc **desc)

usr.sbin/vmd/vioblk.c

688

if (offset % VIRTIO_BLK_SECTOR_SIZE != 0 &&

usr.sbin/vmd/vioblk.c

701

sz = dev->file.pwritev(dev->file.p, io_v, io_idx, offset);

usr.sbin/vmd/vioblk.c

703

sz = dev->file.preadv(dev->file.p, io_v, io_idx, offset);

usr.sbin/vmd/vioblk.c

706

"sz=%ld", __func__, (is_write ? "write" : "read"), offset,

usr.sbin/vmd/vioqcow2.c

305

qc2_preadv(void *p, struct iovec *iov, int cnt, off_t offset)

usr.sbin/vmd/vioqcow2.c

308

off_t pos = offset;

usr.sbin/vmd/vioqcow2.c

378

qc2_pwritev(void *p, struct iovec *iov, int cnt, off_t offset)

usr.sbin/vmd/vioqcow2.c

381

off_t pos = offset;

usr.sbin/vmd/vioraw.c

35

raw_preadv(void *file, struct iovec *iov, int cnt, off_t offset)

usr.sbin/vmd/vioraw.c

37

return preadv(*(int *)file, iov, cnt, offset);

usr.sbin/vmd/vioraw.c

47

raw_pwritev(void *file, struct iovec *iov, int cnt, off_t offset)

usr.sbin/vmd/vioraw.c

49

return pwritev(*(int *)file, iov, cnt, offset);

usr.sbin/vmd/vioscsi.c

365

info->offset = block * VIOSCSI_BLOCK_SIZE_CDROM;

usr.sbin/vmd/vioscsi.c

386

if (f->pread(f->p, info->buf, info->len, info->offset) != info->len) {

usr.sbin/vmd/virtio.c

1427

cap.virtio.offset = VIO1_CFG_BAR_OFFSET;

usr.sbin/vmd/virtio.c

1432

cap.virtio.offset = VIO1_DEV_BAR_OFFSET;

usr.sbin/vmd/virtio.c

1436

cap.virtio.offset = VIO1_ISR_BAR_OFFSET;

usr.sbin/vmd/virtio.c

1440

cap.virtio.offset = VIO1_NOTIFY_BAR_OFFSET;

usr.sbin/vmd/virtio.h

334

off_t offset;

usr.sbin/wsmoused/mouse_protocols.c

403

int offset, sum = 0, i, j;

usr.sbin/wsmoused/mouse_protocols.c

417

offset = 0x28 - buf[0];

usr.sbin/wsmoused/mouse_protocols.c

422

buf[i] += offset;

usr.sbin/wsmoused/mouse_protocols.c

426

buf[i] += offset;

usr.sbin/wsmoused/mouse_protocols.c

430

buf[1] -= offset;

usr.sbin/wsmoused/mouse_protocols.c

431

buf[2] -= offset;

usr.sbin/zic/zic.c

1621

abbroffset(char *buf, zic_t offset)

usr.sbin/zic/zic.c

1626

if (offset < 0) {

usr.sbin/zic/zic.c

1627

offset = -offset;

usr.sbin/zic/zic.c

1631

seconds = offset % SECSPERMIN;

usr.sbin/zic/zic.c

1632

offset /= SECSPERMIN;

usr.sbin/zic/zic.c

1633

minutes = offset % MINSPERHOUR;

usr.sbin/zic/zic.c

1634

offset /= MINSPERHOUR;

usr.sbin/zic/zic.c

1635

if (100 <= offset) {

usr.sbin/zic/zic.c

1641

*p++ = '0' + offset / 10;

usr.sbin/zic/zic.c

1642

*p++ = '0' + offset % 10;

usr.sbin/zic/zic.c

1705

stringoffset(char *result, size_t size, zic_t offset)

usr.sbin/zic/zic.c

1711

if (offset < 0) {

usr.sbin/zic/zic.c

1713

offset = -offset;

usr.sbin/zic/zic.c

1715

seconds = offset % SECSPERMIN;

usr.sbin/zic/zic.c

1716

offset /= SECSPERMIN;

usr.sbin/zic/zic.c

1717

minutes = offset % MINSPERHOUR;

usr.sbin/zic/zic.c

1718

offset /= MINSPERHOUR;

usr.sbin/zic/zic.c

1719

hours = offset;

usr.sbin/zic/zic.c

2098

zic_t offset;

usr.sbin/zic/zic.c

2125

offset = rp->r_todisgmt ? 0 : gmtoff;

usr.sbin/zic/zic.c

2127

offset = oadd(offset, stdoff);

usr.sbin/zic/zic.c

2132

jtime = tadd(jtime, -offset);

usr.sbin/zic/zic.c

2174

offset = oadd(zp->z_gmtoff, rp->r_stdoff);

usr.sbin/zic/zic.c

2175

type = addtype(offset, ab, rp->r_stdoff != 0,