Symbol: I32_bit
sys/arch/arm/acpi/acpi_machdep.c
272
cpsie(I32_bit);
sys/arch/arm/acpi/acpi_machdep.c
278
cpsid(I32_bit);
sys/arch/arm/arm/fiq.c
55
#define IRQ_BIT I32_bit
sys/arch/arm/arm32/arm32_machdep.c
263
if (GetCPSR() & I32_bit) {
sys/arch/arm/arm32/fault.c
255
if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
sys/arch/arm/arm32/fault.c
831
if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
sys/arch/arm/at91/at91aic.c
190
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
208
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
275
enable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
321
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
355
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
392
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
429
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
448
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
454
(void)enable_interrupts(I32_bit);
sys/arch/arm/at91/at91aic.c
456
(void)disable_interrupts(I32_bit);
sys/arch/arm/at91/at91st.c
298
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/broadcom/bcm2835_intr.c
438
pic_do_pending_ints(I32_bit, oldipl, frame);
sys/arch/arm/cortex/gic.c
384
pic_do_pending_ints(I32_bit, ipl, tf);
sys/arch/arm/cortex/gic.c
407
pic_do_pending_ints(I32_bit, old_ipl, tf);
sys/arch/arm/cortex/gic_splfuncs.c
62
if ((psw & I32_bit) == 0 || newipl == IPL_NONE) {
sys/arch/arm/cortex/gic_splfuncs.c
85
if ((psw & I32_bit) == 0) {
sys/arch/arm/cortex/gicv3.c
763
pic_do_pending_ints(I32_bit, ipl, frame);
sys/arch/arm/cortex/gicv3.c
790
pic_do_pending_ints(I32_bit, oldipl, frame);
sys/arch/arm/ep93xx/ep93xx_intr.c
203
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ep93xx/ep93xx_intr.c
222
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ep93xx/ep93xx_intr.c
272
enable_interrupts(I32_bit);
sys/arch/arm/ep93xx/ep93xx_intr.c
309
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ep93xx/ep93xx_intr.c
324
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ep93xx/ep93xx_intr.c
363
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/ep93xx/ep93xx_intr.c
375
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/footbridge/footbridge_intr.h
112
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/footbridge/footbridge_irqhandler.c
203
enable_interrupts(I32_bit);
sys/arch/arm/footbridge/footbridge_irqhandler.c
240
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/footbridge/footbridge_irqhandler.c
264
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/footbridge/footbridge_irqhandler.c
321
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/footbridge/isa/isa_machdep.c
382
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/footbridge/isa/isa_machdep.c
406
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/gemini/gemini_icu.c
188
pic_do_pending_ints(I32_bit, oldipl, frame);
sys/arch/arm/gemini/gemini_ipm.c
177
psw = disable_interrupts(I32_bit);
sys/arch/arm/gemini/gemini_ipm.c
210
psw = disable_interrupts(I32_bit);
sys/arch/arm/gemini/gemini_pci.c
95
#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
sys/arch/arm/gemini/gemini_timer.c
159
psw = disable_interrupts(I32_bit);
sys/arch/arm/gemini/gemini_timer.c
262
psw = disable_interrupts(I32_bit);
sys/arch/arm/imx/imx23_icoll.c
178
cpsie(I32_bit);
sys/arch/arm/imx/imx23_icoll.c
180
cpsid(I32_bit);
sys/arch/arm/imx/imx23_icoll.c
189
cpsie(I32_bit);
sys/arch/arm/imx/imx23_icoll.c
197
cpsid(I32_bit);
sys/arch/arm/imx/imx23_icoll.c
280
if ((psw & I32_bit) == 0) {
sys/arch/arm/imx/imx31_icu.c
189
cpsie(I32_bit);
sys/arch/arm/imx/imx31_icu.c
197
cpsid(I32_bit);
sys/arch/arm/imx/imx51_ipuv3.c
842
save = disable_interrupts(I32_bit);
sys/arch/arm/imx/imx51_tzic.c
163
enable_interrupts(I32_bit|F32_bit);
sys/arch/arm/imx/imx51_tzic.c
256
pic_do_pending_ints(I32_bit, oldipl, frame);
sys/arch/arm/imx/imx51_tzic.c
264
disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/imx/imxclock.c
139
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/include/cpufunc.h
317
mask &= (I32_bit | F32_bit);
sys/arch/arm/include/cpufunc.h
334
mask &= (I32_bit | F32_bit);
sys/arch/arm/include/cpufunc.h
341
case I32_bit | F32_bit:
sys/arch/arm/include/cpufunc.h
344
case I32_bit:
sys/arch/arm/include/cpufunc.h
364
(__set_cpsr_c((I32_bit | F32_bit), (old_cpsr) & (I32_bit | F32_bit)))
sys/arch/arm/include/cpufunc.h
366
#define ENABLE_INTERRUPT() cpsie(I32_bit)
sys/arch/arm/include/cpufunc.h
367
#define DISABLE_INTERRUPT() cpsid(I32_bit)
sys/arch/arm/include/cpufunc.h
368
#define DISABLE_INTERRUPT_SAVE() cpsid(I32_bit)
sys/arch/arm/include/cpufunc.h
381
switch (psw & (I32_bit|F32_bit)) {
sys/arch/arm/include/cpufunc.h
382
case I32_bit: __asm("cpsie\ti"); break;
sys/arch/arm/include/cpufunc.h
384
case I32_bit|F32_bit: __asm("cpsie\tif"); break;
sys/arch/arm/include/cpufunc.h
400
switch (psw & (I32_bit|F32_bit)) {
sys/arch/arm/include/cpufunc.h
401
case I32_bit: __asm("cpsid\ti"); break;
sys/arch/arm/include/cpufunc.h
403
case I32_bit|F32_bit: __asm("cpsid\tif"); break;
sys/arch/arm/include/locore.h
123
#define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
sys/arch/arm/include/locore.h
124
#define IRQenable __set_cpsr_c(I32_bit, 0);
sys/arch/arm/include/locore.h
133
(((psr) & PSR_MODE) == PSR_USR32_MODE && ((psr) & I32_bit) == 0)
sys/arch/arm/include/locore.h
77
orr rTMP, rTMP, #(I32_bit) ; \
sys/arch/arm/include/locore.h
82
bic rTMP, rTMP, #(I32_bit) ; \
sys/arch/arm/include/locore.h
87
orr rTMP, rTMP, #(I32_bit | F32_bit) ; \
sys/arch/arm/include/locore.h
92
bic rTMP, rTMP, #(I32_bit | F32_bit) ; \
sys/arch/arm/iomd/iomd_irqhandler.c
121
enable_interrupts(I32_bit | F32_bit);
sys/arch/arm/iomd/iomd_irqhandler.c
160
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/iomd/iomd_irqhandler.c
390
int mask = I32_bit | F32_bit;
sys/arch/arm/iomd/iomd_irqhandler.c
415
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/iomd/iomd_irqhandler.c
435
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_clk.c
278
savedints = disable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_clk.c
289
savedints = disable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
260
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
279
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
327
enable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
354
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
369
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
407
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
422
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/ixp12x0/ixp12x0_pci.c
67
#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
sys/arch/arm/marvell/armadaxp.c
668
if ((psw & I32_bit) == 0) {
sys/arch/arm/marvell/dove.c
498
psw = disable_interrupts(I32_bit | F32_bit);
sys/arch/arm/marvell/mvsoc_intr.c
93
pic_do_pending_ints(I32_bit, oldipl, frame);
sys/arch/arm/nxp/imx6_platform.c
302
cpsid(I32_bit|F32_bit);
sys/arch/arm/nxp/imxpcie.c
67
#define PCIE_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
sys/arch/arm/ofw/ofw_irqhandler.c
333
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ofw/ofw_irqhandler.c
353
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/ofw/ofw_irqhandler.c
99
enable_interrupts(I32_bit | F32_bit);
sys/arch/arm/pic/pic_splfuncs.c
102
if ((psw & I32_bit) == 0)
sys/arch/arm/pic/pic_splfuncs.c
75
if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
sys/arch/arm/s3c2xx0/s3c2410.c
251
disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/s3c2xx0/s3c2410_extint.c
210
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2410_extint.c
256
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2410_extint.c
284
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2410_intr.c
129
enable_interrupts(I32_bit); /* allow nested interrupts */
sys/arch/arm/s3c2xx0/s3c2410_intr.c
135
disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2410_intr.c
156
int save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2410_intr.c
178
disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2410_intr.c
209
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2410_intr.c
356
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2440.c
312
disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/s3c2xx0/s3c2440_extint.c
242
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2440_extint.c
288
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2440_extint.c
316
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2440_intr.c
159
enable_interrupts(I32_bit); /* allow nested interrupts */
sys/arch/arm/s3c2xx0/s3c2440_intr.c
165
disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2440_intr.c
186
int save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2440_intr.c
208
disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2440_intr.c
239
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2440_intr.c
390
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c24x0_clk.c
84
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2800_clk.c
87
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2800_intr.c
108
enable_interrupts(I32_bit); /* allow nested interrupts */
sys/arch/arm/s3c2xx0/s3c2800_intr.c
114
disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2800_intr.c
145
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2800_pci.c
157
#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
127
save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
154
enable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2xx0_intr.h
101
int save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2xx0_intr.h
110
int save = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2xx0_intr.h
133
psw = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2xx0_intr.h
150
psw = disable_interrupts(I32_bit);
sys/arch/arm/s3c2xx0/s3c2xx0_intr.h
162
int psw = disable_interrupts(I32_bit);
sys/arch/arm/sa11x0/sa11x0.c
191
SetCPSR(I32_bit, 0);
sys/arch/arm/sa11x0/sa11x0_irqhandler.c
213
saved_cpsr = SetCPSR(I32_bit, I32_bit);
sys/arch/arm/sa11x0/sa11x0_irqhandler.c
218
SetCPSR(I32_bit, saved_cpsr & I32_bit);
sys/arch/arm/sa11x0/sa11x0_irqhandler.c
255
saved_cpsr = SetCPSR(I32_bit, I32_bit);
sys/arch/arm/sa11x0/sa11x0_irqhandler.c
259
SetCPSR(I32_bit, saved_cpsr & I32_bit);
sys/arch/arm/sa11x0/sa11x0_ost.c
300
saved_ints = disable_interrupts(I32_bit);
sys/arch/arm/sa11x0/sa11x0_ost.c
348
saved_ints = disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/sunxi/sunxi_intc.c
214
pic_do_pending_ints(I32_bit, oldipl, frame);
sys/arch/arm/ti/am18xx_intc.c
218
pic_do_pending_ints(I32_bit, old_ipl, frame);
sys/arch/arm/ti/ti_omapintc.c
169
pic_do_pending_ints(I32_bit, oldipl, frame);
sys/arch/arm/xscale/becc_icu.c
283
enable_interrupts(I32_bit);
sys/arch/arm/xscale/becc_icu.c
307
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/becc_icu.c
325
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/becc_icu.c
375
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/xscale/becc_intr.h
89
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/becc_pci.c
84
#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
sys/arch/arm/xscale/becc_timer.c
149
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/becc_timer.c
204
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/i80200_icu.c
119
oldirqstate = disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/xscale/i80200_icu.c
99
oldirqstate = disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/xscale/i80312_pci.c
74
#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
sys/arch/arm/xscale/i80321_icu.c
257
enable_interrupts(I32_bit);
sys/arch/arm/xscale/i80321_icu.c
292
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/i80321_icu.c
310
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/i80321_icu.c
403
frame->cf_tf.tf_spsr |= I32_bit;
sys/arch/arm/xscale/i80321_icu.c
426
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/xscale/i80321_icu.c
438
frame->cf_tf.tf_spsr &= ~I32_bit;
sys/arch/arm/xscale/i80321_intr.h
79
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/i80321_intr.h
84
oldirqstate &= ~I32_bit;
sys/arch/arm/xscale/i80321_pci.c
75
#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
sys/arch/arm/xscale/i80321_timer.c
233
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_intr.c
316
enable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_intr.c
357
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_intr.c
375
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_intr.c
432
oldirqstate = enable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_intr.h
76
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_timer.c
159
oldirqstate = disable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_timer.c
208
savedints = disable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_wdog.c
139
s = disable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425_wdog.c
164
s = disable_interrupts(I32_bit);
sys/arch/arm/xscale/ixp425var.h
61
#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
sys/arch/arm/xscale/pxa2x0.c
343
irq = disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/xscale/pxa2x0_apm.c
1462
s = disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/xscale/pxa2x0_apm.c
877
save = disable_interrupts(I32_bit|F32_bit);
sys/arch/arm/xscale/pxa2x0_intr.c
136
enable_interrupts(I32_bit);
sys/arch/arm/xscale/pxa2x0_intr.c
209
int save = disable_interrupts(I32_bit);
sys/arch/arm/xscale/pxa2x0_intr.c
228
int psw = disable_interrupts(I32_bit);
sys/arch/arm/xscale/pxa2x0_intr.c
293
psw = disable_interrupts(I32_bit);
sys/arch/arm/xscale/pxa2x0_intr.c
318
psw = disable_interrupts(I32_bit);
sys/arch/arm/xscale/pxa2x0_intr.h
110
int psw = disable_interrupts(I32_bit);
sys/arch/arm/xscale/pxa2x0_intr.h
81
psw = disable_interrupts(I32_bit);
sys/arch/arm/xscale/pxa2x0_intr.h
98
psw = disable_interrupts(I32_bit);
sys/arch/arm/xscale/pxa2x0_lcd.c
347
save = disable_interrupts(I32_bit);
sys/arch/epoc32/epoc32/intr.c
59
pic_do_pending_ints(I32_bit, oldipl, frame);
sys/arch/evbarm/armadillo/armadillo9_machdep.c
368
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/g42xxeb/gb225_pcic.c
334
save = disable_interrupts(I32_bit);
sys/arch/evbarm/g42xxeb/obio.c
119
int psw = disable_interrupts(I32_bit); /* XXX */
sys/arch/evbarm/g42xxeb/obio.c
158
psw = disable_interrupts(I32_bit);
sys/arch/evbarm/g42xxeb/obio.c
169
psw = disable_interrupts(I32_bit);
sys/arch/evbarm/g42xxeb/obio.c
320
save = disable_interrupts(I32_bit);
sys/arch/evbarm/g42xxeb/obio.c
358
save = disable_interrupts(I32_bit);
sys/arch/evbarm/g42xxeb/obio.c
390
save = disable_interrupts(I32_bit);
sys/arch/evbarm/g42xxeb/obio.c
409
save = disable_interrupts(I32_bit);
sys/arch/evbarm/hdl_g/hdlg_machdep.c
682
(void)disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/ifpga/ifpga_intr.c
245
enable_interrupts(I32_bit);
sys/arch/evbarm/ifpga/ifpga_intr.c
269
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/ifpga/ifpga_intr.c
287
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/ifpga/ifpga_intr.c
340
oldirqstate = enable_interrupts(I32_bit);
sys/arch/evbarm/ifpga/ifpga_intr.h
74
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/imx31/imx31lk_machdep.c
341
disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/iq80310/iq80310_intr.c
263
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/iq80310/iq80310_intr.c
271
oldirqstate = disable_interrupts(I32_bit); \
sys/arch/evbarm/iq80310/iq80310_intr.c
313
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/iq80310/iq80310_intr.c
350
enable_interrupts(I32_bit);
sys/arch/evbarm/iq80310/iq80310_intr.c
387
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/iq80310/iq80310_intr.c
405
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/iq80310/iq80310_intr.c
459
oldirqstate = enable_interrupts(I32_bit);
sys/arch/evbarm/iq80310/iq80310_intr.c
482
oldirqstate = enable_interrupts(I32_bit);
sys/arch/evbarm/iq80310/iq80310_timer.c
218
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/iq80310/iq80310_timer.c
257
oldirqstate = disable_interrupts(I32_bit);
sys/arch/evbarm/iq80321/iq80321_machdep.c
295
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/ixdp425/ixdp425_machdep.c
271
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/ixm1200/ixm1200_machdep.c
254
disable_interrupts(I32_bit);
sys/arch/evbarm/iyonix/iyonix_machdep.c
321
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/lubbock/lubbock_machdep.c
1074
int save = disable_interrupts(I32_bit);
sys/arch/evbarm/lubbock/obio.c
141
psw = disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/lubbock/obio.c
166
psw = disable_interrupts(I32_bit);
sys/arch/evbarm/lubbock/obio.c
177
psw = disable_interrupts(I32_bit);
sys/arch/evbarm/lubbock/obio.c
317
psw = disable_interrupts(I32_bit);
sys/arch/evbarm/lubbock/obio.c
99
psw = disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/mmnet/mmnet_machdep.c
219
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/mpcsa/mpcsa_machdep.c
242
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/npwr_fc/npwr_fc_machdep.c
283
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/nslu2/nslu2_leds.c
115
is = disable_interrupts(I32_bit);
sys/arch/evbarm/nslu2/nslu2_leds.c
133
is = disable_interrupts(I32_bit);
sys/arch/evbarm/nslu2/nslu2_leds.c
157
is = disable_interrupts(I32_bit);
sys/arch/evbarm/nslu2/nslu2_leds.c
84
is = disable_interrupts(I32_bit);
sys/arch/evbarm/nslu2/nslu2_leds.c
97
is = disable_interrupts(I32_bit);
sys/arch/evbarm/nslu2/nslu2_machdep.c
298
(void) disable_interrupts(I32_bit | F32_bit);
sys/arch/evbarm/stand/boot2440/main.c
487
: "I" (I32_bit)
sys/arch/evbarm/tsarm/tsarm_machdep.c
285
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/evbarm/tsarm/tspld.c
495
i = disable_interrupts(I32_bit|F32_bit);
sys/arch/hpcarm/hpcarm/kloader_machdep.c
81
disable_interrupts(I32_bit|F32_bit);
sys/arch/hpcarm/hpcarm/softintr.c
117
"=r" (saved_cpsr) : "i" (I32_bit) : "r1");
sys/arch/hpcarm/hpcarm/softintr.c
119
saved_cpsr = SetCPSR(I32_bit, I32_bit);
sys/arch/hpcarm/hpcarm/softintr.c
143
SetCPSR(I32_bit, I32_bit & saved_cpsr);
sys/arch/hpcarm/hpcarm/softintr.c
159
"i" (I32_bit) : "r1");
sys/arch/hpcarm/hpcarm/softintr.c
161
saved_cpsr = SetCPSR(I32_bit, I32_bit);
sys/arch/hpcarm/hpcarm/softintr.c
169
SetCPSR(I32_bit, I32_bit & saved_cpsr);
sys/arch/hpcarm/hpcarm/softintr.c
182
SetCPSR(I32_bit, I32_bit & saved_cpsr);
sys/arch/hpcarm/hpcarm/softintr.c
81
saved_cpsr = SetCPSR(I32_bit, I32_bit);
sys/arch/hpcarm/hpcarm/softintr.c
85
SetCPSR(I32_bit, I32_bit & saved_cpsr);
sys/arch/hpcarm/hpcarm/softintr.c
87
SetCPSR(I32_bit, I32_bit & saved_cpsr);
sys/arch/iyonix/iyonix/iyonix_machdep.c
305
(void) disable_interrupts(I32_bit|F32_bit);
sys/arch/shark/isa/clock.c
390
savedints = disable_interrupts(I32_bit);
sys/arch/shark/isa/isa_irqhandler.c
136
enable_interrupts(I32_bit | F32_bit);
sys/arch/shark/isa/isa_irqhandler.c
352
oldirqstate = disable_interrupts(I32_bit);
sys/arch/shark/isa/isa_irqhandler.c
372
oldirqstate = disable_interrupts(I32_bit);
sys/arch/shark/ofw/ofw.c
283
saved_irq_state = disable_interrupts(I32_bit);
sys/arch/shark/shark/hat.c
225
savedints = disable_interrupts(I32_bit);
sys/arch/shark/shark/profile.c
370
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/profile.c
386
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
1055
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
1124
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
1138
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
1150
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
1266
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
1286
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
1298
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
3445
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
3498
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/scr.c
3542
savedInts = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/sequoia.c
277
sequoiaLock_savedints = disable_interrupts(I32_bit | F32_bit);
sys/arch/shark/shark/shark_machdep.c
214
(void)disable_interrupts(I32_bit | F32_bit);
sys/arch/zaurus/zaurus/kloader_machdep.c
86
disable_interrupts(I32_bit|F32_bit);