#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: tsarm_machdep.c,v 1.37 2024/02/20 23:36:01 andvar Exp $");
#include "opt_arm_debug.h"
#include "opt_console.h"
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/exec.h>
#include <sys/proc.h>
#include <sys/msgbuf.h>
#include <sys/reboot.h>
#include <sys/termios.h>
#include <sys/ksyms.h>
#include <sys/bus.h>
#include <sys/cpu.h>
#include <uvm/uvm_extern.h>
#include <dev/cons.h>
#include <machine/db_machdep.h>
#include <ddb/db_sym.h>
#include <ddb/db_extern.h>
#include <acorn32/include/bootconfig.h>
#include <arm/locore.h>
#include <arm/undefined.h>
#define IRQ_STACK_SIZE 8
#define ABT_STACK_SIZE 8
#define UND_STACK_SIZE 8
#include <arm/arm32/machdep.h>
#include <arm/ep93xx/ep93xxreg.h>
#include <arm/ep93xx/ep93xxvar.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#include "epcom.h"
#if NEPCOM > 0
#include <arm/ep93xx/epcomvar.h>
#endif
#include "isa.h"
#if NISA > 0
#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
#endif
#include <machine/isa_machdep.h>
#include <evbarm/tsarm/tsarmreg.h>
#include "ksyms.h"
#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
#define KERNEL_VM_SIZE 0x0C000000
struct bootconfig bootconfig;
char *boot_args = NULL;
char *boot_file = NULL;
vaddr_t physical_start;
vaddr_t physical_freestart;
vaddr_t physical_freeend;
vaddr_t physical_freeend_low;
vaddr_t physical_end;
u_int free_pages;
paddr_t msgbufphys;
static struct arm32_dma_range tsarm_dma_ranges[4];
#if NISA > 0
extern void isa_tsarm_init(u_int, u_int);
#endif
#define KERNEL_PT_SYS 0
#define KERNEL_PT_KERNEL 1
#define KERNEL_PT_KERNEL_NUM 4
#define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
#define KERNEL_PT_VMDATA_NUM 4
#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
void consinit(void);
#ifndef CONSPEED
#define CONSPEED B115200
#endif
#ifndef CONMODE
#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8)
#endif
int comcnspeed = CONSPEED;
int comcnmode = CONMODE;
#if KGDB
#ifndef KGDB_DEVNAME
#error Must define KGDB_DEVNAME
#endif
const char kgdb_devname[] = KGDB_DEVNAME;
#ifndef KGDB_DEVADDR
#error Must define KGDB_DEVADDR
#endif
unsigned long kgdb_devaddr = KGDB_DEVADDR;
#ifndef KGDB_DEVRATE
#define KGDB_DEVRATE CONSPEED
#endif
int kgdb_devrate = KGDB_DEVRATE;
#ifndef KGDB_DEVMODE
#define KGDB_DEVMODE CONMODE
#endif
int kgdb_devmode = KGDB_DEVMODE;
#endif
void
cpu_reboot(int howto, char *bootstr)
{
if (cold) {
doshutdownhooks();
pmf_system_shutdown(boothowto);
printf("\r\n");
printf("The operating system has halted.\r\n");
printf("Please press any key to reboot.\r\n");
cngetc();
printf("\r\nrebooting...\r\n");
goto reset;
}
if (!(howto & RB_NOSYNC))
bootsync();
splhigh();
if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
dumpsys();
doshutdownhooks();
pmf_system_shutdown(boothowto);
IRQdisable;
if (howto & RB_HALT) {
printf("\r\n");
printf("The operating system has halted.\r\n");
printf("Please press any key to reboot.\r\n");
cngetc();
}
printf("\r\nrebooting...\r\n");
reset:
(void) disable_interrupts(I32_bit|F32_bit);
{
uint32_t feed, ctrl;
feed = TS7XXX_IO16_VBASE + TS7XXX_WDOGFEED;
ctrl = TS7XXX_IO16_VBASE + TS7XXX_WDOGCTRL;
__asm volatile (
"mov r0, #0x5\n"
"mov r1, #0x1\n"
"strh r0, [%0]\n"
"strh r1, [%1]\n"
:
: "r" (feed), "r" (ctrl)
: "r0", "r1"
);
}
for (;;);
}
static const struct pmap_devmap tsarm_devmap[] = {
DEVMAP_ENTRY(
EP93XX_AHB_VBASE,
EP93XX_AHB_HWBASE,
EP93XX_AHB_SIZE
),
DEVMAP_ENTRY(
EP93XX_APB_VBASE,
EP93XX_APB_HWBASE,
EP93XX_APB_SIZE
),
DEVMAP_ENTRY(
TS7XXX_IO8_VBASE,
TS7XXX_IO8_HWBASE,
TS7XXX_IO8_SIZE
),
DEVMAP_ENTRY(
TS7XXX_IO16_VBASE,
TS7XXX_IO16_HWBASE,
TS7XXX_IO16_SIZE
),
DEVMAP_ENTRY_END
};
vaddr_t
initarm(void *arg)
{
#ifdef FIXME
struct bootconfig *passed_bootconfig = arg;
extern char _end[];
#endif
int loop;
int loop1;
u_int l1pagetable;
#ifdef FIXME
paddr_t memstart;
psize_t memsize;
i80321_calibrate_delay();
#endif
consinit();
#ifdef VERBOSE_INIT_ARM
printf("\nNetBSD/tsarm booting ...\n");
#endif
if (set_cpufuncs())
panic("cpu not recognized!");
#ifdef FIXME
i80321_sdram_bounds(&obio_bs_tag, VERDE_PMMR_BASE + VERDE_MCU_BASE,
&memstart, &memsize);
memstart = 0x0;
memsize = 0x2000000;
#endif
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#endif
bootconfig.dramblocks = 4;
bootconfig.dram[0].address = 0x0UL;
bootconfig.dram[0].pages = 0x800000UL / PAGE_SIZE;
bootconfig.dram[1].address = 0x1000000UL;
bootconfig.dram[1].pages = 0x800000UL / PAGE_SIZE;
bootconfig.dram[2].address = 0x4000000UL;
bootconfig.dram[2].pages = 0x800000UL / PAGE_SIZE;
bootconfig.dram[3].address = 0x5000000UL;
bootconfig.dram[3].pages = 0x800000UL / PAGE_SIZE;
physical_start = bootconfig.dram[0].address;
physical_end = bootconfig.dram[0].address +
(bootconfig.dram[0].pages * PAGE_SIZE);
physical_freestart = 0x00009000UL;
physical_freeend = 0x00200000UL;
physmem = (physical_end - physical_start) / PAGE_SIZE;
#ifdef VERBOSE_INIT_ARM
printf("physmemory: 0x%"PRIxPSIZE" pages at 0x%08lx -> 0x%08lx\n", physmem,
physical_start, physical_end - 1);
#endif
#ifdef VERBOSE_INIT_ARM
printf("Allocating page tables\n");
#endif
free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
#ifdef VERBOSE_INIT_ARM
printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
physical_freestart, free_pages, free_pages);
#endif
#define valloc_pages(var, np) \
alloc_pages((var).pv_pa, (np)); \
(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
#define alloc_pages(var, np) \
physical_freeend -= ((np) * PAGE_SIZE); \
if (physical_freeend < physical_freestart) \
panic("initarm: out of memory"); \
(var) = physical_freeend; \
free_pages -= (np); \
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
&& kernel_l1pt.pv_pa == 0) {
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
} else {
valloc_pages(kernel_pt_table[loop1],
L2_TABLE_SIZE / PAGE_SIZE);
++loop1;
}
}
if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
panic("initarm: Failed to align the kernel page directory");
alloc_pages(systempage.pv_pa, 1);
valloc_pages(irqstack, IRQ_STACK_SIZE);
valloc_pages(abtstack, ABT_STACK_SIZE);
valloc_pages(undstack, UND_STACK_SIZE);
valloc_pages(kernelstack, UPAGES);
#ifdef VERBOSE_INIT_ARM
printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
irqstack.pv_va);
printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
abtstack.pv_va);
printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
undstack.pv_va);
printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
kernelstack.pv_va);
#endif
alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
physical_freeend_low = physical_freeend;
#ifdef VERBOSE_INIT_ARM
printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
#endif
l1pagetable = kernel_l1pt.pv_pa;
pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
&kernel_pt_table[KERNEL_PT_SYS]);
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
&kernel_pt_table[KERNEL_PT_KERNEL + loop]);
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
pmap_curmaxkvaddr =
KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
#ifdef VERBOSE_INIT_ARM
printf("Mapping kernel\n");
#endif
{
extern char etext[], _end[];
size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
u_int logical;
textsize = (textsize + PGOFSET) & ~PGOFSET;
totalsize = (totalsize + PGOFSET) & ~PGOFSET;
logical = 0x00200000;
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
physical_start + logical, textsize,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
physical_start + logical, totalsize - textsize,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
}
#ifdef VERBOSE_INIT_ARM
printf("Constructing L2 page tables\n");
#endif
pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
}
pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_devmap_bootstrap(l1pagetable, tsarm_devmap);
{
extern char _end[];
physical_freestart = physical_start +
(((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
KERNEL_BASE);
physical_freeend = physical_end;
free_pages =
(physical_freeend - physical_freestart) / PAGE_SIZE;
}
#ifdef VERBOSE_INIT_ARM
printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
physical_freestart, free_pages, free_pages);
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
#endif
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
cpu_setttb(kernel_l1pt.pv_pa, true);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
#ifdef VERBOSE_INIT_ARM
printf("done!\n");
#endif
#ifdef VERBOSE_INIT_ARM
printf("bootstrap done.\n");
#endif
arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
#ifdef VERBOSE_INIT_ARM
printf("init subsystems: stacks ");
#endif
set_stackptr(PSR_IRQ32_MODE,
irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_ABT32_MODE,
abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_UND32_MODE,
undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
#ifdef VERBOSE_INIT_ARM
printf("vectors ");
#endif
data_abort_handler_address = (u_int)data_abort_handler;
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
undefined_handler_address = (u_int)undefinedinstruction_bounce;
#ifdef VERBOSE_INIT_ARM
printf("undefined ");
#endif
undefined_init();
#ifdef VERBOSE_INIT_ARM
printf("page ");
#endif
uvm_md_init();
uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
atop(physical_freestart), atop(physical_freeend),
VM_FREELIST_DEFAULT);
uvm_page_physload(0, atop(physical_freeend_low),
0, atop(physical_freeend_low),
VM_FREELIST_DEFAULT);
uvm_page_physload(atop(0x1000000), atop(0x1800000),
atop(0x1000000), atop(0x1800000),
VM_FREELIST_DEFAULT);
uvm_page_physload(atop(0x4000000), atop(0x4800000),
atop(0x4000000), atop(0x4800000),
VM_FREELIST_DEFAULT);
uvm_page_physload(atop(0x5000000), atop(0x5800000),
atop(0x5000000), atop(0x5800000),
VM_FREELIST_DEFAULT);
physmem = 0x2000000 / PAGE_SIZE;
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
#ifdef VERBOSE_INIT_ARM
printf("irq ");
#endif
ep93xx_intr_init();
#if NISA > 0
isa_intr_init();
#ifdef VERBOSE_INIT_ARM
printf("isa ");
#endif
isa_tsarm_init(TS7XXX_IO16_VBASE + TS7XXX_ISAIO,
TS7XXX_IO16_VBASE + TS7XXX_ISAMEM);
#endif
#ifdef VERBOSE_INIT_ARM
printf("done.\n");
#endif
#ifdef BOOTHOWTO
boothowto = BOOTHOWTO;
#endif
#ifdef DDB
db_machine_init();
if (boothowto & RB_KDB)
Debugger();
#endif
return kernelstack.pv_va + USPACE_SVC_STACK_TOP;
}
void
consinit(void)
{
static int consinit_called;
bus_space_handle_t ioh;
if (consinit_called != 0)
return;
consinit_called = 1;
pmap_devmap_register(tsarm_devmap);
#if 0
isa_tsarm_init(TS7XXX_IO16_VBASE + TS7XXX_ISAIO,
TS7XXX_IO16_VBASE + TS7XXX_ISAMEM);
if (comcnattach(&isa_io_bs_tag, 0x3e8, comcnspeed,
COM_FREQ, COM_TYPE_NORMAL, comcnmode))
{
panic("can't init serial console");
}
#endif
#if NEPCOM > 0
bus_space_map(&ep93xx_bs_tag, EP93XX_APB_HWBASE + EP93XX_APB_UART1,
EP93XX_APB_UART_SIZE, 0, &ioh);
if (epcomcnattach(&ep93xx_bs_tag, EP93XX_APB_HWBASE + EP93XX_APB_UART1,
ioh, comcnspeed, comcnmode))
{
panic("can't init serial console");
}
#else
panic("serial console not configured");
#endif
#if KGDB
#if NEPCOM > 0
if (strcmp(kgdb_devname, "epcom") == 0) {
epcom_kgdb_attach(&ep93xx_bs_tag, kgdb_devaddr, kgdb_devrate,
kgdb_devmode);
}
#endif
#endif
}
bus_dma_tag_t
ep93xx_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template)
{
int i;
struct arm32_bus_dma_tag *dmat;
for (i = 0; i < bootconfig.dramblocks; i++) {
tsarm_dma_ranges[i].dr_sysbase = bootconfig.dram[i].address;
tsarm_dma_ranges[i].dr_busbase = bootconfig.dram[i].address;
tsarm_dma_ranges[i].dr_len = bootconfig.dram[i].pages *
PAGE_SIZE;
}
dmat = dma_tag_template;
dmat->_ranges = tsarm_dma_ranges;
dmat->_nranges = bootconfig.dramblocks;
return dmat;
}
void
cpu_startup_hook(void)
{
ep93xx_intr_evcnt_attach();
}