arch/arm/vdso/vgettimeofday.c

13

int __vdso_clock_gettime(clockid_t clock,

arch/arm/vdso/vgettimeofday.c

16

return __cvdso_clock_gettime32(clock, ts);

arch/arm/vdso/vgettimeofday.c

19

int __vdso_clock_gettime64(clockid_t clock,

arch/arm/vdso/vgettimeofday.c

22

return __cvdso_clock_gettime(clock, ts);

arch/arm64/kernel/vdso/vgettimeofday.c

13

int __kernel_clock_gettime(clockid_t clock,

arch/arm64/kernel/vdso/vgettimeofday.c

16

return __cvdso_clock_gettime(clock, ts);

arch/arm64/kernel/vdso/vgettimeofday.c

9

int __kernel_clock_gettime(clockid_t clock, struct __kernel_timespec *ts);

arch/arm64/kernel/vdso32/vgettimeofday.c

11

int __vdso_clock_gettime(clockid_t clock,

arch/arm64/kernel/vdso32/vgettimeofday.c

14

return __cvdso_clock_gettime32(clock, ts);

arch/arm64/kernel/vdso32/vgettimeofday.c

17

int __vdso_clock_gettime64(clockid_t clock,

arch/arm64/kernel/vdso32/vgettimeofday.c

20

return __cvdso_clock_gettime(clock, ts);

arch/loongarch/include/asm/time.h

46

unsigned int clock)

arch/loongarch/include/asm/time.h

48

clockevents_calc_mult_shift(cd, clock, 4);

arch/loongarch/vdso/vgettimeofday.c

10

int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts)

arch/loongarch/vdso/vgettimeofday.c

12

return __cvdso_clock_gettime(clock, ts);

arch/mips/include/asm/gt64120.h

563

extern void gt641xx_set_base_clock(unsigned int clock);

arch/mips/include/asm/time.h

68

unsigned int clock)

arch/mips/include/asm/time.h

70

clockevents_calc_mult_shift(cd, clock, 4);

arch/mips/kernel/cevt-gt641xx.c

19

void gt641xx_set_base_clock(unsigned int clock)

arch/mips/kernel/cevt-gt641xx.c

21

gt641xx_base_clock = clock;

arch/mips/vdso/vgettimeofday.c

15

int __vdso_clock_gettime(clockid_t clock,

arch/mips/vdso/vgettimeofday.c

18

return __cvdso_clock_gettime32(clock, ts);

arch/mips/vdso/vgettimeofday.c

43

int __vdso_clock_gettime64(clockid_t clock,

arch/mips/vdso/vgettimeofday.c

46

return __cvdso_clock_gettime(clock, ts);

arch/mips/vdso/vgettimeofday.c

49

int __vdso_clock_getres_time64(clockid_t clock, struct __kernel_timespec *ts)

arch/mips/vdso/vgettimeofday.c

51

return __cvdso_clock_getres(clock, ts);

arch/mips/vdso/vgettimeofday.c

56

int __vdso_clock_gettime(clockid_t clock,

arch/mips/vdso/vgettimeofday.c

59

return __cvdso_clock_gettime(clock, ts);

arch/parisc/kernel/vdso32/vdso32_generic.c

14

int __vdso_clock_gettime(clockid_t clock, struct old_timespec32 *ts);

arch/parisc/kernel/vdso32/vdso32_generic.c

15

int __vdso_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts);

arch/parisc/kernel/vdso32/vdso32_generic.c

24

int __vdso_clock_gettime(clockid_t clock, struct old_timespec32 *ts)

arch/parisc/kernel/vdso32/vdso32_generic.c

26

return syscall2(__NR_clock_gettime, (long)clock, (long)ts);

arch/parisc/kernel/vdso32/vdso32_generic.c

29

int __vdso_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts)

arch/parisc/kernel/vdso32/vdso32_generic.c

31

return syscall2(__NR_clock_gettime64, (long)clock, (long)ts);

arch/parisc/kernel/vdso64/vdso64_generic.c

12

int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts);

arch/parisc/kernel/vdso64/vdso64_generic.c

21

int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts)

arch/parisc/kernel/vdso64/vdso64_generic.c

23

return syscall2(__NR_clock_gettime, (long)clock, (long)ts);

arch/powerpc/boot/4xx.c

472

unsigned int clock;

arch/powerpc/boot/4xx.c

492

clock = ser_clk;

arch/powerpc/boot/4xx.c

494

clock = plb_clk / __fix_zero(sdr & 0xff, 256);

arch/powerpc/boot/4xx.c

496

dt_fixup_clock(path, clock);

arch/powerpc/include/asm/cpm1.h

603

int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode);

arch/powerpc/include/asm/cpm2.h

1135

int __init cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);

arch/powerpc/include/asm/cpm2.h

1136

int __init cpm2_smc_clk_setup(enum cpm_clk_target target, int clock);

arch/powerpc/include/asm/udbg.h

29

void __init udbg_uart_setup(unsigned int speed, unsigned int clock);

arch/powerpc/include/asm/udbg.h

30

unsigned int __init udbg_probe_uart_speed(unsigned int clock);

arch/powerpc/include/asm/vdso/gettimeofday.h

127

int __c_kernel_clock_gettime(clockid_t clock, struct __kernel_timespec *ts,

arch/powerpc/include/asm/vdso/gettimeofday.h

132

int __c_kernel_clock_gettime(clockid_t clock, struct old_timespec32 *ts,

arch/powerpc/include/asm/vdso/gettimeofday.h

134

int __c_kernel_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts,

arch/powerpc/kernel/legacy_serial.c

141

legacy_port->uartclk = clock;

arch/powerpc/kernel/legacy_serial.c

147

legacy_info->clock = clock;

arch/powerpc/kernel/legacy_serial.c

35

unsigned int clock;

arch/powerpc/kernel/legacy_serial.c

350

info->speed = udbg_probe_uart_speed(info->clock);

arch/powerpc/kernel/legacy_serial.c

354

udbg_uart_setup(info->speed, info->clock);

arch/powerpc/kernel/legacy_serial.c

84

u32 clock = BASE_BAUD * 16;

arch/powerpc/kernel/legacy_serial.c

91

clock = be32_to_cpup(clk);

arch/powerpc/kernel/time.c

801

struct clocksource *clock = &clocksource_timebase;

arch/powerpc/kernel/time.c

803

if (clocksource_register_hz(clock, tb_ticks_per_sec)) {

arch/powerpc/kernel/time.c

805

clock->name);

arch/powerpc/kernel/time.c

810

clock->name, clock->mult, clock->shift);

arch/powerpc/kernel/udbg_16550.c

102

if (clock == 0)

arch/powerpc/kernel/udbg_16550.c

103

clock = 1843200;

arch/powerpc/kernel/udbg_16550.c

107

base_bauds = clock / 16;

arch/powerpc/kernel/udbg_16550.c

124

unsigned int __init udbg_probe_uart_speed(unsigned int clock)

arch/powerpc/kernel/udbg_16550.c

149

speed = (clock / prescaler) / (divisor * 16);

arch/powerpc/kernel/udbg_16550.c

152

if (speed > (clock / 16))

arch/powerpc/kernel/udbg_16550.c

95

void __init udbg_uart_setup(unsigned int speed, unsigned int clock)

arch/powerpc/kernel/vdso/vgettimeofday.c

12

return __cvdso_clock_gettime_data(vd, clock, ts);

arch/powerpc/kernel/vdso/vgettimeofday.c

21

int __c_kernel_clock_gettime(clockid_t clock, struct old_timespec32 *ts,

arch/powerpc/kernel/vdso/vgettimeofday.c

24

return __cvdso_clock_gettime32_data(vd, clock, ts);

arch/powerpc/kernel/vdso/vgettimeofday.c

27

int __c_kernel_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts,

arch/powerpc/kernel/vdso/vgettimeofday.c

30

return __cvdso_clock_gettime_data(vd, clock, ts);

arch/powerpc/kernel/vdso/vgettimeofday.c

9

int __c_kernel_clock_gettime(clockid_t clock, struct __kernel_timespec *ts,

arch/powerpc/platforms/8xx/cpm1.c

244

int __init cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)

arch/powerpc/platforms/8xx/cpm1.c

344

if (clk_map[i][0] == target && clk_map[i][1] == clock) {

arch/powerpc/platforms/embedded6xx/ls_uart.c

57

#define AVR_QUOT(clock) ((clock) + 8 * 9600) / (16 * 9600)

arch/powerpc/sysdev/cpm2.c

135

int __init cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)

arch/powerpc/sysdev/cpm2.c

237

if (clk_map[i][0] == target && clk_map[i][1] == clock) {

arch/powerpc/sysdev/cpm2.c

261

int __init cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)

arch/powerpc/sysdev/cpm2.c

297

if (clk_map[i][0] == target && clk_map[i][1] == clock) {

arch/powerpc/sysdev/fsl_gtm.c

181

prescaler = gtm->clock / frequency;

arch/powerpc/sysdev/fsl_gtm.c

382

const u32 *clock;

arch/powerpc/sysdev/fsl_gtm.c

394

clock = of_get_property(np, "clock-frequency", &size);

arch/powerpc/sysdev/fsl_gtm.c

395

if (!clock || size != sizeof(*clock)) {

arch/powerpc/sysdev/fsl_gtm.c

399

gtm->clock = *clock;

arch/powerpc/sysdev/fsl_gtm.c

70

unsigned int clock;

arch/riscv/kernel/vdso/vgettimeofday.c

13

int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts)

arch/riscv/kernel/vdso/vgettimeofday.c

15

return __cvdso_clock_gettime(clock, ts);

arch/s390/include/asm/debug.h

33

unsigned long clock : 60;

arch/s390/include/asm/timex.h

199

int get_phys_clock(unsigned long *clock);

arch/s390/kernel/debug.c

1066

if (from->clock != 0LL) {

arch/s390/kernel/debug.c

1093

active->clock = timestamp;

arch/s390/kernel/debug.c

1655

sec = entry->clock;

arch/s390/kernel/debug.c

408

if (act_entry->clock == 0LL)

arch/s390/kernel/perf_pai.c

622

data.time = event->clock();

arch/s390/kernel/time.c

286

int get_phys_clock(unsigned long *clock)

arch/s390/kernel/time.c

293

*clock = get_tod_clock() - lpar_offset;

arch/s390/kernel/vdso/vdso.h

10

int __s390_vdso_clock_getres(clockid_t clock, struct __kernel_timespec *ts);

arch/s390/kernel/vdso/vdso.h

9

int __s390_vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts);

arch/s390/kernel/vdso/vdso_generic.c

11

int __s390_vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts)

arch/s390/kernel/vdso/vdso_generic.c

13

return __cvdso_clock_gettime(clock, ts);

arch/s390/kernel/vdso/vdso_generic.c

16

int __s390_vdso_clock_getres(clockid_t clock, struct __kernel_timespec *ts)

arch/s390/kernel/vdso/vdso_generic.c

18

return __cvdso_clock_getres(clock, ts);

arch/s390/kernel/vtime.c

119

u64 timer, clock, user, guest, system, hardirq, softirq;

arch/s390/kernel/vtime.c

123

clock = lc->last_update_clock;

arch/s390/kernel/vtime.c

130

clock = lc->last_update_clock - clock;

arch/s390/kernel/vtime.c

148

lc->steal_timer += clock - user - guest - system - hardirq - softirq;

arch/s390/pci/pci_report.c

62

sec = entry->clock;

arch/sparc/include/asm/vvar.h

23

} clock;

arch/sparc/kernel/vdso.c

32

vdata->vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;

arch/sparc/kernel/vdso.c

33

vdata->clock.cycle_last = tk->tkr_mono.cycle_last;

arch/sparc/kernel/vdso.c

34

vdata->clock.mask = tk->tkr_mono.mask;

arch/sparc/kernel/vdso.c

35

vdata->clock.mult = tk->tkr_mono.mult;

arch/sparc/kernel/vdso.c

36

vdata->clock.shift = tk->tkr_mono.shift;

arch/sparc/vdso/vclock_gettime.c

152

v = (cycles - vvar->clock.cycle_last) & vvar->clock.mask;

arch/sparc/vdso/vclock_gettime.c

153

return v * vvar->clock.mult;

arch/sparc/vdso/vclock_gettime.c

162

v = (cycles - vvar->clock.cycle_last) & vvar->clock.mask;

arch/sparc/vdso/vclock_gettime.c

163

return v * vvar->clock.mult;

arch/sparc/vdso/vclock_gettime.c

177

ns = __shr64(ns, vvar->clock.shift);

arch/sparc/vdso/vclock_gettime.c

197

ns = __shr64(ns, vvar->clock.shift);

arch/sparc/vdso/vclock_gettime.c

217

ns = __shr64(ns, vvar->clock.shift);

arch/sparc/vdso/vclock_gettime.c

237

ns = __shr64(ns, vvar->clock.shift);

arch/sparc/vdso/vclock_gettime.c

274

__vdso_clock_gettime(clockid_t clock, struct __kernel_old_timespec *ts)

arch/sparc/vdso/vclock_gettime.c

278

switch (clock) {

arch/sparc/vdso/vclock_gettime.c

295

return vdso_fallback_gettime(clock, ts);

arch/sparc/vdso/vclock_gettime.c

302

__vdso_clock_gettime_stick(clockid_t clock, struct __kernel_old_timespec *ts)

arch/sparc/vdso/vclock_gettime.c

306

switch (clock) {

arch/sparc/vdso/vclock_gettime.c

323

return vdso_fallback_gettime(clock, ts);

arch/sparc/vdso/vclock_gettime.c

66

notrace static long vdso_fallback_gettime(long clock, struct __kernel_old_timespec *ts)

arch/sparc/vdso/vclock_gettime.c

69

register long o0 __asm__("o0") = clock;

arch/x86/entry/vdso/common/vclock_gettime.c

36

int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts)

arch/x86/entry/vdso/common/vclock_gettime.c

38

return __cvdso_clock_gettime(clock, ts);

arch/x86/entry/vdso/common/vclock_gettime.c

44

int __vdso_clock_getres(clockid_t clock,

arch/x86/entry/vdso/common/vclock_gettime.c

47

return __cvdso_clock_getres(clock, res);

arch/x86/entry/vdso/common/vclock_gettime.c

54

int __vdso_clock_gettime(clockid_t clock, struct old_timespec32 *ts)

arch/x86/entry/vdso/common/vclock_gettime.c

56

return __cvdso_clock_gettime32(clock, ts);

arch/x86/entry/vdso/common/vclock_gettime.c

62

int __vdso_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts)

arch/x86/entry/vdso/common/vclock_gettime.c

64

return __cvdso_clock_gettime(clock, ts);

arch/x86/entry/vdso/common/vclock_gettime.c

70

int __vdso_clock_getres(clockid_t clock, struct old_timespec32 *res)

arch/x86/entry/vdso/common/vclock_gettime.c

72

return __cvdso_clock_getres_time32(clock, res);

arch/x86/entry/vdso/common/vclock_gettime.c

78

int __vdso_clock_getres_time64(clockid_t clock, struct __kernel_timespec *ts)

arch/x86/entry/vdso/common/vclock_gettime.c

80

return __cvdso_clock_getres(clock, ts);

arch/x86/kernel/cpu/vmware.c

231

u64 clock;

arch/x86/kernel/cpu/vmware.c

234

clock = READ_ONCE(steal->clock);

arch/x86/kernel/cpu/vmware.c

248

clock = ((u64)high << 32) | low;

arch/x86/kernel/cpu/vmware.c

251

return mul_u64_u32_shr(clock, vmware_cyc2ns.cyc2ns_mul,

arch/x86/kernel/cpu/vmware.c

56

u64 clock; /* stolen time counter in units of vtsc */

arch/x86/kvm/x86.c

2357

struct pvclock_clock clock; /* extract of a clocksource struct */

arch/x86/kvm/x86.c

2373

vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;

arch/x86/kvm/x86.c

2374

vdata->clock.cycle_last = tk->tkr_mono.cycle_last;

arch/x86/kvm/x86.c

2375

vdata->clock.mask = tk->tkr_mono.mask;

arch/x86/kvm/x86.c

2376

vdata->clock.mult = tk->tkr_mono.mult;

arch/x86/kvm/x86.c

2377

vdata->clock.shift = tk->tkr_mono.shift;

arch/x86/kvm/x86.c

2378

vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;

arch/x86/kvm/x86.c

2379

vdata->clock.offset = tk->tkr_mono.base;

arch/x86/kvm/x86.c

2381

vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;

arch/x86/kvm/x86.c

2624

gtod_is_based_on_tsc(gtod->clock.vclock_mode);

arch/x86/kvm/x86.c

2638

ka->use_master_clock, gtod->clock.vclock_mode);

arch/x86/kvm/x86.c

2758

if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)

arch/x86/kvm/x86.c

2911

u64 last = pvclock_gtod_data.clock.cycle_last;

arch/x86/kvm/x86.c

2928

static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,

arch/x86/kvm/x86.c

2934

switch (clock->vclock_mode) {

arch/x86/kvm/x86.c

2940

v = (tsc_pg_val - clock->cycle_last) &

arch/x86/kvm/x86.c

2941

clock->mask;

arch/x86/kvm/x86.c

2950

v = (*tsc_timestamp - clock->cycle_last) &

arch/x86/kvm/x86.c

2951

clock->mask;

arch/x86/kvm/x86.c

2960

return v * clock->mult;

arch/x86/kvm/x86.c

2999

ns = gtod->clock.base_cycles;

arch/x86/kvm/x86.c

3000

ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);

arch/x86/kvm/x86.c

3001

ns >>= gtod->clock.shift;

arch/x86/kvm/x86.c

3002

ns += ktime_to_ns(gtod->clock.offset);

arch/x86/kvm/x86.c

3019

ns = gtod->clock.base_cycles;

arch/x86/kvm/x86.c

3020

ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);

arch/x86/kvm/x86.c

3021

ns >>= gtod->clock.shift;

arch/x86/kvm/x86.c

3038

if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))

arch/x86/kvm/x86.c

3052

if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))

arch/x86/kvm/x86.c

3070

if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))

arch/x86/kvm/x86.c

3144

vclock_mode = pvclock_gtod_data.clock.vclock_mode;

arch/x86/kvm/x86.c

3237

data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);

arch/x86/kvm/x86.c

3239

data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;

arch/x86/kvm/x86.c

3261

return data.clock;

arch/x86/kvm/x86.c

7228

data.clock += now_real_ns - data.realtime;

arch/x86/kvm/x86.c

7235

ka->kvmclock_offset = data.clock - now_raw_ns;

arch/x86/kvm/x86.c

9973

if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&

arch/x86/um/vdso/um_vdso.c

16

int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts)

arch/x86/um/vdso/um_vdso.c

22

: "0" (__NR_clock_gettime), "D" (clock), "S" (ts)

drivers/accel/amdxdna/aie2_pci.c

771

struct amdxdna_drm_query_clock_metadata *clock;

drivers/accel/amdxdna/aie2_pci.c

777

clock = kzalloc_obj(*clock);

drivers/accel/amdxdna/aie2_pci.c

778

if (!clock)

drivers/accel/amdxdna/aie2_pci.c

781

snprintf(clock->mp_npu_clock.name, sizeof(clock->mp_npu_clock.name),

drivers/accel/amdxdna/aie2_pci.c

783

clock->mp_npu_clock.freq_mhz = ndev->npuclk_freq;

drivers/accel/amdxdna/aie2_pci.c

784

snprintf(clock->h_clock.name, sizeof(clock->h_clock.name), "H Clock");

drivers/accel/amdxdna/aie2_pci.c

785

clock->h_clock.freq_mhz = ndev->hclk_freq;

drivers/accel/amdxdna/aie2_pci.c

787

if (copy_to_user(u64_to_user_ptr(args->buffer), clock, sizeof(*clock)))

drivers/accel/amdxdna/aie2_pci.c

790

kfree(clock);

drivers/ata/pata_amd.c

43

static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offset, int speed, int clock)

drivers/ata/pata_amd.c

59

if (clock >= 2)

drivers/ata/pata_amd.c

97

switch (clock) {

drivers/ata/pata_artop.c

109

pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);

drivers/ata/pata_artop.c

163

pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);

drivers/ata/pata_artop.c

224

u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;

drivers/ata/pata_artop.c

262

u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;

drivers/ata/pata_artop.c

40

static int clock = 0;

drivers/ata/pata_it821x.c

193

int clock, altclock;

drivers/ata/pata_it821x.c

199

clock = itdev->want[0][1];

drivers/ata/pata_it821x.c

202

clock = itdev->want[1][1];

drivers/ata/pata_it821x.c

207

if (clock == ATA_ANY)

drivers/ata/pata_it821x.c

208

clock = altclock;

drivers/ata/pata_it821x.c

211

if (clock == ATA_ANY)

drivers/ata/pata_it821x.c

214

if (clock == itdev->clock_mode)

drivers/ata/pata_it821x.c

218

if (clock == ATA_66)

drivers/ata/pata_legacy.c

66

u8 clock[2];

drivers/ata/pata_opti.c

110

int clock;

drivers/ata/pata_opti.c

126

clock = ioread16(regio + 5) & 1;

drivers/ata/pata_opti.c

133

addr = addr_timing[clock][pio];

drivers/ata/pata_opti.c

136

u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];

drivers/ata/pata_opti.c

143

opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);

drivers/ata/pata_opti.c

144

opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);

drivers/ata/pata_pdc202xx_old.c

183

void __iomem *clock = master + 0x11;

drivers/ata/pata_pdc202xx_old.c

190

iowrite8(ioread8(clock) | sel66, clock);

drivers/ata/pata_pdc202xx_old.c

192

iowrite8(ioread8(clock) & ~sel66, clock);

drivers/ata/pata_pdc202xx_old.c

234

void __iomem *clock = master + 0x11;

drivers/ata/pata_pdc202xx_old.c

240

iowrite8(ioread8(clock) & ~sel66, clock);

drivers/ata/pata_pdc202xx_old.c

244

iowrite8(ioread8(clock) & ~sel66, clock);

drivers/ata/pata_sc1200.c

120

int clock = sc1200_clock();

drivers/ata/pata_sc1200.c

127

format = udma_timing[clock][mode - XFER_UDMA_0];

drivers/ata/pata_sc1200.c

129

format = mwdma_timing[clock][mode - XFER_MW_DMA_0];

drivers/ata/sata_sx4.c

1221

u32 clock = 0;

drivers/ata/sata_sx4.c

1258

clock = (ticks / 300000);

drivers/ata/sata_sx4.c

1260

clock, clock);

drivers/ata/sata_sx4.c

1262

clock = (clock * 33);

drivers/ata/sata_sx4.c

1264

clock, clock);

drivers/ata/sata_sx4.c

1267

fparam = (1400000 / clock) - 2;

drivers/atm/he.c

2119

unsigned cid, rsr0, rsr1, rsr4, tsr0, tsr0_aal, tsr4, period, reg, clock;

drivers/atm/he.c

2221

clock = he_is622(he_dev) ? 66667000 : 50000000;

drivers/atm/he.c

2222

period = clock / pcr_goal;

drivers/atm/he.c

556

unsigned clock, rate, delta;

drivers/atm/he.c

566

clock = he_is622(he_dev) ? 66667000 : 50000000;

drivers/atm/he.c

576

unsigned period = clock / rate;

drivers/bcma/driver_chipcommon_pmu.c

392

u32 clock;

drivers/bcma/driver_chipcommon_pmu.c

408

clock = (25000000 / 4) * ndiv * p2div / p1div;

drivers/bcma/driver_chipcommon_pmu.c

411

clock = (25000000 / 2) * ndiv * p2div / p1div;

drivers/bcma/driver_chipcommon_pmu.c

414

clock = clock / 4;

drivers/bcma/driver_chipcommon_pmu.c

416

return clock;

drivers/bluetooth/hci_bcm.c

186

struct bcm_write_uart_clock_setting clock;

drivers/bluetooth/hci_bcm.c

188

clock.type = BCM_UART_CLOCK_48MHZ;

drivers/bluetooth/hci_bcm.c

190

bt_dev_dbg(hdev, "Set Controller clock (%d)", clock.type);

drivers/bluetooth/hci_bcm.c

195

skb = __hci_cmd_sync(hdev, 0xfc45, 1, &clock, HCI_INIT_TIMEOUT);

drivers/bus/ti-sysc.c

328

struct clk *clock;

drivers/bus/ti-sysc.c

337

clock = of_clk_get_by_name(np, n);

drivers/bus/ti-sysc.c

338

if (!IS_ERR(clock)) {

drivers/bus/ti-sysc.c

339

clk_put(clock);

drivers/bus/ti-sysc.c

348

clock = devm_get_clk_from_child(ddata->dev, child, name);

drivers/bus/ti-sysc.c

349

if (IS_ERR(clock))

drivers/bus/ti-sysc.c

350

return PTR_ERR(clock);

drivers/bus/ti-sysc.c

363

cl->clk = clock;

drivers/bus/ti-sysc.c

366

clk_put(clock);

drivers/bus/ti-sysc.c

510

struct clk *clock;

drivers/bus/ti-sysc.c

517

clock = ddata->clocks[i];

drivers/bus/ti-sysc.c

520

if (IS_ERR_OR_NULL(clock))

drivers/bus/ti-sysc.c

523

error = clk_enable(clock);

drivers/bus/ti-sysc.c

532

clock = ddata->clocks[i];

drivers/bus/ti-sysc.c

535

if (IS_ERR_OR_NULL(clock))

drivers/bus/ti-sysc.c

538

clk_disable(clock);

drivers/bus/ti-sysc.c

546

struct clk *clock;

drivers/bus/ti-sysc.c

553

clock = ddata->clocks[i];

drivers/bus/ti-sysc.c

554

if (IS_ERR_OR_NULL(clock))

drivers/bus/ti-sysc.c

557

clk_disable(clock);

drivers/bus/ti-sysc.c

563

struct clk *clock;

drivers/bus/ti-sysc.c

570

clock = ddata->clocks[i];

drivers/bus/ti-sysc.c

573

if (IS_ERR_OR_NULL(clock))

drivers/bus/ti-sysc.c

576

error = clk_enable(clock);

drivers/bus/ti-sysc.c

585

clock = ddata->clocks[i];

drivers/bus/ti-sysc.c

586

if (IS_ERR_OR_NULL(clock))

drivers/bus/ti-sysc.c

589

clk_disable(clock);

drivers/bus/ti-sysc.c

597

struct clk *clock;

drivers/bus/ti-sysc.c

604

clock = ddata->clocks[i];

drivers/bus/ti-sysc.c

607

if (IS_ERR_OR_NULL(clock))

drivers/bus/ti-sysc.c

610

clk_disable(clock);

drivers/clk/bcm/clk-bcm2835.c

1028

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

1029

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1030

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1039

rate = bcm2835_clock_rate_from_divisor(clock, parent_rate, div);

drivers/clk/bcm/clk-bcm2835.c

1047

static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock)

drivers/clk/bcm/clk-bcm2835.c

1049

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1050

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1056

clk_hw_get_name(&clock->hw));

drivers/clk/bcm/clk-bcm2835.c

1065

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

1066

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1067

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1075

bcm2835_clock_wait_busy(clock);

drivers/clk/bcm/clk-bcm2835.c

1080

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

1081

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1082

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1108

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

1109

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1110

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1151

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

1152

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1153

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1164

*avgrate = bcm2835_clock_rate_from_divisor(clock, *prate, *div);

drivers/clk/bcm/clk-bcm2835.c

1170

high = bcm2835_clock_rate_from_divisor(clock, *prate,

drivers/clk/bcm/clk-bcm2835.c

1173

low = bcm2835_clock_rate_from_divisor(clock, *prate,

drivers/clk/bcm/clk-bcm2835.c

1269

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

1270

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1271

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1280

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

1281

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1282

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1302

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

1303

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

1304

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

1442

struct bcm2835_clock *clock;

drivers/clk/bcm/clk-bcm2835.c

1488

clock = devm_kzalloc(cprman->dev, sizeof(*clock), GFP_KERNEL);

drivers/clk/bcm/clk-bcm2835.c

1489

if (!clock)

drivers/clk/bcm/clk-bcm2835.c

1492

clock->cprman = cprman;

drivers/clk/bcm/clk-bcm2835.c

1493

clock->data = clock_data;

drivers/clk/bcm/clk-bcm2835.c

1494

clock->hw.init = &init;

drivers/clk/bcm/clk-bcm2835.c

1496

ret = devm_clk_hw_register(cprman->dev, &clock->hw);

drivers/clk/bcm/clk-bcm2835.c

1499

return &clock->hw;

drivers/clk/bcm/clk-bcm2835.c

934

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

935

struct bcm2835_cprman *cprman = clock->cprman;

drivers/clk/bcm/clk-bcm2835.c

936

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

945

struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);

drivers/clk/bcm/clk-bcm2835.c

946

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-bcm2835.c

977

static unsigned long bcm2835_clock_rate_from_divisor(struct bcm2835_clock *clock,

drivers/clk/bcm/clk-bcm2835.c

981

const struct bcm2835_clock_data *data = clock->data;

drivers/clk/bcm/clk-kona-setup.c

532

const char **clock;

drivers/clk/bcm/clk-kona-setup.c

548

for (clock = clocks; *clock; clock++)

drivers/clk/bcm/clk-kona-setup.c

549

if (*clock == BAD_CLK_NAME)

drivers/clk/bcm/clk-kona-setup.c

551

orig_count = (u32)(clock - clocks);

drivers/clk/clk-cdce706.c

485

unsigned clock, source;

drivers/clk/clk-cdce706.c

504

ret = cdce706_reg_read(cdce, CDCE706_CLKIN_CLOCK, &clock);

drivers/clk/clk-cdce706.c

507

cdce->clkin[0].parent = !!(clock & CDCE706_CLKIN_CLOCK_MASK);

drivers/clk/clk-rp1.c

1040

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

1041

const struct rp1_clock_data *data = clock->data;

drivers/clk/clk-rp1.c

1158

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

1165

clock->cached_rate = rate;

drivers/clk/clk-rp1.c

1172

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

1174

return clock->cached_rate;

drivers/clk/clk-rp1.c

780

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

781

struct rp1_clockman *clockman = clock->clockman;

drivers/clk/clk-rp1.c

782

const struct rp1_clock_data *data = clock->data;

drivers/clk/clk-rp1.c

790

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

791

struct rp1_clockman *clockman = clock->clockman;

drivers/clk/clk-rp1.c

792

const struct rp1_clock_data *data = clock->data;

drivers/clk/clk-rp1.c

815

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

816

struct rp1_clockman *clockman = clock->clockman;

drivers/clk/clk-rp1.c

817

const struct rp1_clock_data *data = clock->data;

drivers/clk/clk-rp1.c

833

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

834

struct rp1_clockman *clockman = clock->clockman;

drivers/clk/clk-rp1.c

835

const struct rp1_clock_data *data = clock->data;

drivers/clk/clk-rp1.c

880

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

881

struct rp1_clockman *clockman = clock->clockman;

drivers/clk/clk-rp1.c

882

const struct rp1_clock_data *data = clock->data;

drivers/clk/clk-rp1.c

915

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

916

struct rp1_clockman *clockman = clock->clockman;

drivers/clk/clk-rp1.c

917

const struct rp1_clock_data *data = clock->data;

drivers/clk/clk-rp1.c

956

struct rp1_clk_desc *clock = container_of(hw, struct rp1_clk_desc, hw);

drivers/clk/clk-rp1.c

957

struct rp1_clockman *clockman = clock->clockman;

drivers/clk/clk-rp1.c

958

const struct rp1_clock_data *data = clock->data;

drivers/clk/renesas/clk-div6.c

152

struct div6_clock *clock = to_div6_clock(hw);

drivers/clk/renesas/clk-div6.c

156

clock->div = div;

drivers/clk/renesas/clk-div6.c

158

val = readl(clock->reg) & ~CPG_DIV6_DIV_MASK;

drivers/clk/renesas/clk-div6.c

161

writel(val | CPG_DIV6_DIV(clock->div - 1), clock->reg);

drivers/clk/renesas/clk-div6.c

168

struct div6_clock *clock = to_div6_clock(hw);

drivers/clk/renesas/clk-div6.c

172

if (clock->src_mask == 0)

drivers/clk/renesas/clk-div6.c

175

hw_index = field_get(clock->src_mask, readl(clock->reg));

drivers/clk/renesas/clk-div6.c

177

if (clock->parents[i] == hw_index)

drivers/clk/renesas/clk-div6.c

188

struct div6_clock *clock = to_div6_clock(hw);

drivers/clk/renesas/clk-div6.c

194

src = field_prep(clock->src_mask, clock->parents[index]);

drivers/clk/renesas/clk-div6.c

195

writel((readl(clock->reg) & ~clock->src_mask) | src, clock->reg);

drivers/clk/renesas/clk-div6.c

213

struct div6_clock *clock = container_of(nb, struct div6_clock, nb);

drivers/clk/renesas/clk-div6.c

224

if (__clk_get_enable_count(clock->hw.clk))

drivers/clk/renesas/clk-div6.c

225

cpg_div6_clock_enable(&clock->hw);

drivers/clk/renesas/clk-div6.c

227

cpg_div6_clock_disable(&clock->hw);

drivers/clk/renesas/clk-div6.c

250

struct div6_clock *clock;

drivers/clk/renesas/clk-div6.c

254

clock = kzalloc_flex(*clock, parents, num_parents);

drivers/clk/renesas/clk-div6.c

255

if (!clock)

drivers/clk/renesas/clk-div6.c

258

clock->reg = reg;

drivers/clk/renesas/clk-div6.c

264

clock->div = (readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1;

drivers/clk/renesas/clk-div6.c

269

clock->src_mask = 0;

drivers/clk/renesas/clk-div6.c

273

clock->src_mask = GENMASK(7, 6);

drivers/clk/renesas/clk-div6.c

277

clock->src_mask = GENMASK(14, 12);

drivers/clk/renesas/clk-div6.c

290

clock->parents[valid_parents] = i;

drivers/clk/renesas/clk-div6.c

301

clock->hw.init = &init;

drivers/clk/renesas/clk-div6.c

303

clk = clk_register(NULL, &clock->hw);

drivers/clk/renesas/clk-div6.c

308

clock->nb.notifier_call = cpg_div6_clock_notifier_call;

drivers/clk/renesas/clk-div6.c

309

raw_notifier_chain_register(notifiers, &clock->nb);

drivers/clk/renesas/clk-div6.c

315

kfree(clock);

drivers/clk/renesas/clk-div6.c

49

struct div6_clock *clock = to_div6_clock(hw);

drivers/clk/renesas/clk-div6.c

52

val = (readl(clock->reg) & ~(CPG_DIV6_DIV_MASK | CPG_DIV6_CKSTP))

drivers/clk/renesas/clk-div6.c

53

| CPG_DIV6_DIV(clock->div - 1);

drivers/clk/renesas/clk-div6.c

54

writel(val, clock->reg);

drivers/clk/renesas/clk-div6.c

61

struct div6_clock *clock = to_div6_clock(hw);

drivers/clk/renesas/clk-div6.c

64

val = readl(clock->reg);

drivers/clk/renesas/clk-div6.c

74

writel(val, clock->reg);

drivers/clk/renesas/clk-div6.c

79

struct div6_clock *clock = to_div6_clock(hw);

drivers/clk/renesas/clk-div6.c

81

return !(readl(clock->reg) & CPG_DIV6_CKSTP);

drivers/clk/renesas/clk-div6.c

87

struct div6_clock *clock = to_div6_clock(hw);

drivers/clk/renesas/clk-div6.c

89

return parent_rate / clock->div;

drivers/clk/renesas/clk-mstp.c

110

group->smstpcr, clock->bit_index);

drivers/clk/renesas/clk-mstp.c

127

struct mstp_clock *clock = to_mstp_clock(hw);

drivers/clk/renesas/clk-mstp.c

128

struct mstp_clock_group *group = clock->group;

drivers/clk/renesas/clk-mstp.c

136

return !(value & BIT(clock->bit_index));

drivers/clk/renesas/clk-mstp.c

150

struct mstp_clock *clock;

drivers/clk/renesas/clk-mstp.c

153

clock = kzalloc_obj(*clock);

drivers/clk/renesas/clk-mstp.c

154

if (!clock)

drivers/clk/renesas/clk-mstp.c

168

clock->bit_index = index;

drivers/clk/renesas/clk-mstp.c

169

clock->group = group;

drivers/clk/renesas/clk-mstp.c

170

clock->hw.init = &init;

drivers/clk/renesas/clk-mstp.c

172

clk = clk_register(NULL, &clock->hw);

drivers/clk/renesas/clk-mstp.c

175

kfree(clock);

drivers/clk/renesas/clk-mstp.c

78

struct mstp_clock *clock = to_mstp_clock(hw);

drivers/clk/renesas/clk-mstp.c

79

struct mstp_clock_group *group = clock->group;

drivers/clk/renesas/clk-mstp.c

80

u32 bitmask = BIT(clock->bit_index);

drivers/clk/renesas/renesas-cpg-mssr.c

258

struct mstp_clock *clock = to_mstp_clock(hw);

drivers/clk/renesas/renesas-cpg-mssr.c

259

struct cpg_mssr_priv *priv = clock->priv;

drivers/clk/renesas/renesas-cpg-mssr.c

260

unsigned int reg = clock->index / 32;

drivers/clk/renesas/renesas-cpg-mssr.c

261

unsigned int bit = clock->index % 32;

drivers/clk/renesas/renesas-cpg-mssr.c

340

struct mstp_clock *clock = to_mstp_clock(hw);

drivers/clk/renesas/renesas-cpg-mssr.c

341

struct cpg_mssr_priv *priv = clock->priv;

drivers/clk/renesas/renesas-cpg-mssr.c

342

unsigned int reg = clock->index / 32;

drivers/clk/renesas/renesas-cpg-mssr.c

352

return !(value & BIT(clock->index % 32));

drivers/clk/renesas/renesas-cpg-mssr.c

491

struct mstp_clock *clock = NULL;

drivers/clk/renesas/renesas-cpg-mssr.c

515

clock = kzalloc_obj(*clock);

drivers/clk/renesas/renesas-cpg-mssr.c

516

if (!clock) {

drivers/clk/renesas/renesas-cpg-mssr.c

528

clock->index = id - priv->num_core_clks;

drivers/clk/renesas/renesas-cpg-mssr.c

529

clock->priv = priv;

drivers/clk/renesas/renesas-cpg-mssr.c

530

clock->hw.init = &init;

drivers/clk/renesas/renesas-cpg-mssr.c

534

cpg_mstp_clock_is_enabled(&clock->hw)) {

drivers/clk/renesas/renesas-cpg-mssr.c

554

clk = clk_register(NULL, &clock->hw);

drivers/clk/renesas/renesas-cpg-mssr.c

560

priv->smstpcr_saved[clock->index / 32].mask |= BIT(clock->index % 32);

drivers/clk/renesas/renesas-cpg-mssr.c

566

kfree(clock);

drivers/clk/renesas/rzg2l-cpg.c

1350

static void rzg2l_mod_clock_module_set_state(struct mod_clock *clock,

drivers/clk/renesas/rzg2l-cpg.c

1353

struct rzg2l_cpg_priv *priv = clock->priv;

drivers/clk/renesas/rzg2l-cpg.c

1354

struct mstop *mstop = clock->mstop;

drivers/clk/renesas/rzg2l-cpg.c

1366

for (unsigned int i = 0; i < clock->num_shared_mstop_clks; i++) {

drivers/clk/renesas/rzg2l-cpg.c

1367

struct mod_clock *clk = clock->shared_mstop_clks[i];

drivers/clk/renesas/rzg2l-cpg.c

1373

if (!clock->num_shared_mstop_clks &&

drivers/clk/renesas/rzg2l-cpg.c

1374

clk_hw_get_flags(&clock->hw) & CLK_IS_CRITICAL)

drivers/clk/renesas/rzg2l-cpg.c

1444

struct mod_clock *clock = to_mod_clock(hw);

drivers/clk/renesas/rzg2l-cpg.c

1445

struct rzg2l_cpg_priv *priv = clock->priv;

drivers/clk/renesas/rzg2l-cpg.c

1446

unsigned int reg = clock->off;

drivers/clk/renesas/rzg2l-cpg.c

1448

u32 bitmask = BIT(clock->bit);

drivers/clk/renesas/rzg2l-cpg.c

1452

if (!clock->off) {

drivers/clk/renesas/rzg2l-cpg.c

1467

rzg2l_mod_clock_module_set_state(clock, false);

drivers/clk/renesas/rzg2l-cpg.c

1469

rzg2l_mod_clock_module_set_state(clock, true);

drivers/clk/renesas/rzg2l-cpg.c

1491

struct mod_clock *clock = to_mod_clock(hw);

drivers/clk/renesas/rzg2l-cpg.c

1493

if (clock->sibling) {

drivers/clk/renesas/rzg2l-cpg.c

1494

struct rzg2l_cpg_priv *priv = clock->priv;

drivers/clk/renesas/rzg2l-cpg.c

1499

enabled = clock->sibling->enabled;

drivers/clk/renesas/rzg2l-cpg.c

1500

clock->enabled = true;

drivers/clk/renesas/rzg2l-cpg.c

1511

struct mod_clock *clock = to_mod_clock(hw);

drivers/clk/renesas/rzg2l-cpg.c

1513

if (clock->sibling) {

drivers/clk/renesas/rzg2l-cpg.c

1514

struct rzg2l_cpg_priv *priv = clock->priv;

drivers/clk/renesas/rzg2l-cpg.c

1519

enabled = clock->sibling->enabled;

drivers/clk/renesas/rzg2l-cpg.c

1520

clock->enabled = false;

drivers/clk/renesas/rzg2l-cpg.c

1531

struct mod_clock *clock = to_mod_clock(hw);

drivers/clk/renesas/rzg2l-cpg.c

1532

struct rzg2l_cpg_priv *priv = clock->priv;

drivers/clk/renesas/rzg2l-cpg.c

1533

u32 bitmask = BIT(clock->bit);

drivers/clk/renesas/rzg2l-cpg.c

1536

if (!clock->off) {

drivers/clk/renesas/rzg2l-cpg.c

1541

if (clock->sibling)

drivers/clk/renesas/rzg2l-cpg.c

1542

return clock->enabled;

drivers/clk/renesas/rzg2l-cpg.c

1545

value = readl(priv->base + CLK_MON_R(clock->off));

drivers/clk/renesas/rzg2l-cpg.c

1547

value = readl(priv->base + clock->off);

drivers/clk/renesas/rzg2l-cpg.c

1559

*rzg2l_mod_clock_get_sibling(struct mod_clock *clock,

drivers/clk/renesas/rzg2l-cpg.c

1566

if (clock->off == clk->off && clock->bit == clk->bit)

drivers/clk/renesas/rzg2l-cpg.c

1611

struct mod_clock *clock)

drivers/clk/renesas/rzg2l-cpg.c

1616

if (!clock->mstop)

drivers/clk/renesas/rzg2l-cpg.c

1623

if (clk->mstop != clock->mstop)

drivers/clk/renesas/rzg2l-cpg.c

1638

new_clks[num_shared_mstop_clks++] = clock;

drivers/clk/renesas/rzg2l-cpg.c

1655

struct mod_clock *clock = NULL;

drivers/clk/renesas/rzg2l-cpg.c

1675

clock = devm_kzalloc(dev, sizeof(*clock), GFP_KERNEL);

drivers/clk/renesas/rzg2l-cpg.c

1676

if (!clock) {

drivers/clk/renesas/rzg2l-cpg.c

1696

clock->off = mod->off;

drivers/clk/renesas/rzg2l-cpg.c

1697

clock->bit = mod->bit;

drivers/clk/renesas/rzg2l-cpg.c

1698

clock->priv = priv;

drivers/clk/renesas/rzg2l-cpg.c

1699

clock->hw.init = &init;

drivers/clk/renesas/rzg2l-cpg.c

1713

clock->mstop = mstop;

drivers/clk/renesas/rzg2l-cpg.c

1716

ret = devm_clk_hw_register(dev, &clock->hw);

drivers/clk/renesas/rzg2l-cpg.c

1725

clock->enabled = rzg2l_mod_clock_is_enabled(&clock->hw);

drivers/clk/renesas/rzg2l-cpg.c

1726

sibling = rzg2l_mod_clock_get_sibling(clock, priv);

drivers/clk/renesas/rzg2l-cpg.c

1728

clock->sibling = sibling;

drivers/clk/renesas/rzg2l-cpg.c

1729

sibling->sibling = clock;

drivers/clk/renesas/rzg2l-cpg.c

1734

ret = rzg2l_mod_clock_update_shared_mstop_clks(priv, clock);

drivers/clk/renesas/rzg2l-cpg.c

1740

clk = clock->hw.clk;

drivers/clk/renesas/rzv2h-cpg.c

1166

struct mod_clock *clock = to_mod_clock(hw);

drivers/clk/renesas/rzv2h-cpg.c

1167

struct rzv2h_cpg_priv *priv = clock->priv;

drivers/clk/renesas/rzv2h-cpg.c

1168

int mon_index = clock->mon_index;

drivers/clk/renesas/rzv2h-cpg.c

1172

if (clock->ext_clk_mux_index >= 0 &&

drivers/clk/renesas/rzv2h-cpg.c

1173

rzv2h_parent_clk_mux_to_index(hw) == clock->ext_clk_mux_index)

drivers/clk/renesas/rzv2h-cpg.c

1178

bitmask = BIT(clock->mon_bit);

drivers/clk/renesas/rzv2h-cpg.c

1184

offset = GET_CLK_ON_OFFSET(clock->on_index);

drivers/clk/renesas/rzv2h-cpg.c

1185

bitmask = BIT(clock->on_bit);

drivers/clk/renesas/rzv2h-cpg.c

1193

struct mod_clock *clock = to_mod_clock(hw);

drivers/clk/renesas/rzv2h-cpg.c

1194

unsigned int reg = GET_CLK_ON_OFFSET(clock->on_index);

drivers/clk/renesas/rzv2h-cpg.c

1195

struct rzv2h_cpg_priv *priv = clock->priv;

drivers/clk/renesas/rzv2h-cpg.c

1196

u32 bitmask = BIT(clock->on_bit);

drivers/clk/renesas/rzv2h-cpg.c

1211

if (clock->mstop_data != BUS_MSTOP_NONE)

drivers/clk/renesas/rzv2h-cpg.c

1212

rzv2h_mod_clock_mstop_enable(priv, clock->mstop_data);

drivers/clk/renesas/rzv2h-cpg.c

1214

if (clock->mstop_data != BUS_MSTOP_NONE)

drivers/clk/renesas/rzv2h-cpg.c

1215

rzv2h_mod_clock_mstop_disable(priv, clock->mstop_data);

drivers/clk/renesas/rzv2h-cpg.c

1219

if (!enable || clock->mon_index < 0)

drivers/clk/renesas/rzv2h-cpg.c

1222

reg = GET_CLK_MON_OFFSET(clock->mon_index);

drivers/clk/renesas/rzv2h-cpg.c

1223

bitmask = BIT(clock->mon_bit);

drivers/clk/renesas/rzv2h-cpg.c

1228

GET_CLK_ON_OFFSET(clock->on_index), hw->clk);

drivers/clk/renesas/rzv2h-cpg.c

1253

struct mod_clock *clock = NULL;

drivers/clk/renesas/rzv2h-cpg.c

1272

clock = devm_kzalloc(dev, sizeof(*clock), GFP_KERNEL);

drivers/clk/renesas/rzv2h-cpg.c

1273

if (!clock) {

drivers/clk/renesas/rzv2h-cpg.c

1288

clock->on_index = mod->on_index;

drivers/clk/renesas/rzv2h-cpg.c

1289

clock->on_bit = mod->on_bit;

drivers/clk/renesas/rzv2h-cpg.c

1290

clock->mon_index = mod->mon_index;

drivers/clk/renesas/rzv2h-cpg.c

1291

clock->mon_bit = mod->mon_bit;

drivers/clk/renesas/rzv2h-cpg.c

1292

clock->no_pm = mod->no_pm;

drivers/clk/renesas/rzv2h-cpg.c

1293

clock->ext_clk_mux_index = mod->ext_clk_mux_index;

drivers/clk/renesas/rzv2h-cpg.c

1294

clock->priv = priv;

drivers/clk/renesas/rzv2h-cpg.c

1295

clock->hw.init = &init;

drivers/clk/renesas/rzv2h-cpg.c

1296

clock->mstop_data = mod->mstop_data;

drivers/clk/renesas/rzv2h-cpg.c

1298

ret = devm_clk_hw_register(dev, &clock->hw);

drivers/clk/renesas/rzv2h-cpg.c

1304

priv->clks[id] = clock->hw.clk;

drivers/clk/renesas/rzv2h-cpg.c

1311

if (clock->mstop_data != BUS_MSTOP_NONE &&

drivers/clk/renesas/rzv2h-cpg.c

1312

!mod->critical && rzv2h_mod_clock_is_enabled(&clock->hw)) {

drivers/clk/renesas/rzv2h-cpg.c

1313

rzv2h_mod_clock_mstop_enable(priv, clock->mstop_data);

drivers/clk/renesas/rzv2h-cpg.c

1314

} else if (clock->mstop_data != BUS_MSTOP_NONE && mod->critical) {

drivers/clk/renesas/rzv2h-cpg.c

1315

unsigned long mstop_mask = FIELD_GET(BUS_MSTOP_BITS_MASK, clock->mstop_data);

drivers/clk/renesas/rzv2h-cpg.c

1316

u16 mstop_index = FIELD_GET(BUS_MSTOP_IDX_MASK, clock->mstop_data);

drivers/clk/renesas/rzv2h-cpg.c

1469

struct mod_clock *clock;

drivers/clk/renesas/rzv2h-cpg.c

1477

clock = to_mod_clock(__clk_get_hw(priv->clks[priv->num_core_clks + id]));

drivers/clk/renesas/rzv2h-cpg.c

1479

return !clock->no_pm;

drivers/clk/ti/adpll.c

199

static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock,

drivers/clk/ti/adpll.c

207

d->clocks[index].clk = clock;

drivers/clk/ti/adpll.c

217

cl = clkdev_create(clock, con_id, NULL);

drivers/clk/ti/adpll.c

228

d->outputs.clks[output_index] = clock;

drivers/clk/ti/adpll.c

244

struct clk *clock;

drivers/clk/ti/adpll.c

251

clock = clk_register_divider(d->dev, child_name, parent_name, 0,

drivers/clk/ti/adpll.c

254

if (IS_ERR(clock)) {

drivers/clk/ti/adpll.c

256

name, PTR_ERR(clock));

drivers/clk/ti/adpll.c

257

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

260

return ti_adpll_setup_clock(d, clock, index, output_index, child_name,

drivers/clk/ti/adpll.c

273

struct clk *clock;

drivers/clk/ti/adpll.c

280

clock = clk_register_mux(d->dev, child_name, parents, 2, 0,

drivers/clk/ti/adpll.c

282

if (IS_ERR(clock)) {

drivers/clk/ti/adpll.c

284

name, PTR_ERR(clock));

drivers/clk/ti/adpll.c

285

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

288

return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name,

drivers/clk/ti/adpll.c

302

struct clk *clock;

drivers/clk/ti/adpll.c

309

clock = clk_register_gate(d->dev, child_name, parent_name, 0,

drivers/clk/ti/adpll.c

312

if (IS_ERR(clock)) {

drivers/clk/ti/adpll.c

314

name, PTR_ERR(clock));

drivers/clk/ti/adpll.c

315

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

318

return ti_adpll_setup_clock(d, clock, index, output_index, child_name,

drivers/clk/ti/adpll.c

331

struct clk *clock;

drivers/clk/ti/adpll.c

338

clock = clk_register_fixed_factor(d->dev, child_name, parent_name,

drivers/clk/ti/adpll.c

340

if (IS_ERR(clock))

drivers/clk/ti/adpll.c

341

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

343

return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name,

drivers/clk/ti/adpll.c

487

struct clk *clock;

drivers/clk/ti/adpll.c

526

clock = devm_clk_register(d->dev, &d->dco.hw);

drivers/clk/ti/adpll.c

527

if (IS_ERR(clock))

drivers/clk/ti/adpll.c

528

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

530

return ti_adpll_setup_clock(d, clock, TI_ADPLL_DCO, d->c->output_index,

drivers/clk/ti/adpll.c

583

struct clk *clock;

drivers/clk/ti/adpll.c

622

clock = devm_clk_register(d->dev, &co->hw);

drivers/clk/ti/adpll.c

623

if (IS_ERR(clock)) {

drivers/clk/ti/adpll.c

625

name, PTR_ERR(clock));

drivers/clk/ti/adpll.c

626

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

629

return ti_adpll_setup_clock(d, clock, index, output_index, child_name,

drivers/clk/ti/adpll.c

804

struct clk *clock;

drivers/clk/ti/adpll.c

814

clock = devm_clk_get(d->dev, d->parent_names[0]);

drivers/clk/ti/adpll.c

815

if (IS_ERR(clock)) {

drivers/clk/ti/adpll.c

817

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

819

d->parent_clocks[TI_ADPLL_CLKINP] = clock;

drivers/clk/ti/adpll.c

821

clock = devm_clk_get(d->dev, d->parent_names[1]);

drivers/clk/ti/adpll.c

822

if (IS_ERR(clock)) {

drivers/clk/ti/adpll.c

824

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

826

d->parent_clocks[TI_ADPLL_CLKINPULOW] = clock;

drivers/clk/ti/adpll.c

829

clock = devm_clk_get(d->dev, d->parent_names[2]);

drivers/clk/ti/adpll.c

830

if (IS_ERR(clock)) {

drivers/clk/ti/adpll.c

832

return PTR_ERR(clock);

drivers/clk/ti/adpll.c

834

d->parent_clocks[TI_ADPLL_CLKINPHIF] = clock;

drivers/clk/ti/clk-814x.c

93

struct clk *clock;

drivers/clk/ti/clk-814x.c

95

clock = clk_get(NULL, init_clocks[i]);

drivers/clk/ti/clk-814x.c

96

if (WARN(IS_ERR(clock), "could not find init clock %s\n",

drivers/clk/ti/clk-814x.c

99

err = clk_prepare_enable(clock);

drivers/clk/zynqmp/clkc.c

136

static struct zynqmp_clock *clock;

drivers/clk/zynqmp/clkc.c

151

return clock[clk_id].valid;

drivers/clk/zynqmp/clkc.c

167

strscpy(clk_name, clock[clk_id].clk_name, MAX_NAME_LEN);

drivers/clk/zynqmp/clkc.c

187

*type = clock[clk_id].type;

drivers/clk/zynqmp/clkc.c

454

ret = zynqmp_pm_clock_get_topology(clock[clk_id].clk_id, j,

drivers/clk/zynqmp/clkc.c

521

ret = zynqmp_pm_clock_get_parents(clock[clk_id].clk_id, j,

drivers/clk/zynqmp/clkc.c

549

u32 total_parents = clock[clk_id].num_parents;

drivers/clk/zynqmp/clkc.c

553

clk_nodes = clock[clk_id].node;

drivers/clk/zynqmp/clkc.c

554

parents = clock[clk_id].parent;

drivers/clk/zynqmp/clkc.c

596

nodes = clock[clk_id].node;

drivers/clk/zynqmp/clkc.c

597

num_nodes = clock[clk_id].num_nodes;

drivers/clk/zynqmp/clkc.c

598

clk_dev_id = clock[clk_id].clk_id;

drivers/clk/zynqmp/clkc.c

663

clock[i].clk_name);

drivers/clk/zynqmp/clkc.c

676

clock[i].clk_name, PTR_ERR(zynqmp_data->hws[i]));

drivers/clk/zynqmp/clkc.c

699

clock[i].valid = FIELD_GET(CLK_ATTR_VALID, attr.attr[0]);

drivers/clk/zynqmp/clkc.c

705

clock[i].type = FIELD_GET(CLK_ATTR_TYPE, attr.attr[0]) ?

drivers/clk/zynqmp/clkc.c

712

clock[i].clk_id = FIELD_PREP(CLK_ATTR_NODE_CLASS, class) |

drivers/clk/zynqmp/clkc.c

717

zynqmp_pm_clock_get_name(clock[i].clk_id, &name);

drivers/clk/zynqmp/clkc.c

727

strscpy(clock[i].clk_name, name.name, MAX_NAME_LEN);

drivers/clk/zynqmp/clkc.c

736

ret = zynqmp_clock_get_topology(i, clock[i].node,

drivers/clk/zynqmp/clkc.c

737

&clock[i].num_nodes);

drivers/clk/zynqmp/clkc.c

741

ret = zynqmp_clock_get_parents(i, clock[i].parent,

drivers/clk/zynqmp/clkc.c

742

&clock[i].num_parents);

drivers/clk/zynqmp/clkc.c

766

clock = kzalloc_objs(*clock, clock_max_idx);

drivers/clk/zynqmp/clkc.c

767

if (!clock) {

drivers/clocksource/clps711x-timer.c

30

static void __init clps711x_clksrc_init(struct clk *clock, void __iomem *base)

drivers/clocksource/clps711x-timer.c

32

unsigned long rate = clk_get_rate(clock);

drivers/clocksource/clps711x-timer.c

51

static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base,

drivers/clocksource/clps711x-timer.c

61

rate = clk_get_rate(clock);

drivers/clocksource/clps711x-timer.c

79

struct clk *clock = of_clk_get(np, 0);

drivers/clocksource/clps711x-timer.c

89

if (IS_ERR(clock)) {

drivers/clocksource/clps711x-timer.c

90

ret = PTR_ERR(clock);

drivers/clocksource/clps711x-timer.c

96

clps711x_clksrc_init(clock, base);

drivers/clocksource/clps711x-timer.c

99

ret = _clps711x_clkevt_init(clock, base, irq);

drivers/clocksource/timer-ti-32k.c

83

struct clk *clock;

drivers/clocksource/timer-ti-32k.c

86

clock = of_clk_get_by_name(np->parent, name);

drivers/clocksource/timer-ti-32k.c

87

if (IS_ERR(clock)) {

drivers/clocksource/timer-ti-32k.c

89

if (PTR_ERR(clock) == -EINVAL && !strncmp("ick", name, 3))

drivers/clocksource/timer-ti-32k.c

93

__func__, name, PTR_ERR(clock));

drivers/clocksource/timer-ti-32k.c

97

error = clk_prepare_enable(clock);

drivers/clocksource/timer-ti-dm-systimer.c

328

struct clk *clock;

drivers/clocksource/timer-ti-dm-systimer.c

335

clock = of_clk_get_by_name(np, name);

drivers/clocksource/timer-ti-dm-systimer.c

336

if ((PTR_ERR(clock) == -EINVAL) && is_ick)

drivers/clocksource/timer-ti-dm-systimer.c

338

else if (IS_ERR(clock))

drivers/clocksource/timer-ti-dm-systimer.c

339

return PTR_ERR(clock);

drivers/clocksource/timer-ti-dm-systimer.c

341

error = clk_prepare_enable(clock);

drivers/clocksource/timer-ti-dm-systimer.c

345

r = clk_get_rate(clock);

drivers/clocksource/timer-ti-dm-systimer.c

347

clk_disable_unprepare(clock);

drivers/clocksource/timer-ti-dm-systimer.c

352

t->ick = clock;

drivers/clocksource/timer-ti-dm-systimer.c

354

t->fck = clock;

drivers/comedi/drivers/amplc_dio200_common.c

766

unsigned int clock;

drivers/comedi/drivers/amplc_dio200_common.c

768

clock = dio200_read32(dev, DIO200_TS_CONFIG) & TS_CONFIG_CLK_SRC_MASK;

drivers/comedi/drivers/amplc_dio200_common.c

769

dio200_write32(dev, DIO200_TS_CONFIG, clock | TS_CONFIG_RESET);

drivers/comedi/drivers/amplc_dio200_common.c

770

dio200_write32(dev, DIO200_TS_CONFIG, clock);

drivers/comedi/drivers/ni_at_a2150.c

110

.clock = {31250, 22676, 20833, 19531},

drivers/comedi/drivers/ni_at_a2150.c

116

.clock = {62500, 50000, 41667, 0},

drivers/comedi/drivers/ni_at_a2150.c

255

lub = board->clock[lub_index] * (1 << lub_divisor_shift);

drivers/comedi/drivers/ni_at_a2150.c

258

glb = board->clock[glb_index] * (1 << glb_divisor_shift);

drivers/comedi/drivers/ni_at_a2150.c

271

temp = board->clock[j] * (1 << i);

drivers/comedi/drivers/ni_at_a2150.c

93

int clock[4]; /* master clock periods, in nanoseconds */

drivers/cpufreq/elanfreq.c

34

int clock; /* frequency in kHz */

drivers/devfreq/tegra30-devfreq.c

183

struct clk *clock;

drivers/devfreq/tegra30-devfreq.c

791

clk_disable_unprepare(tegra->clock);

drivers/devfreq/tegra30-devfreq.c

799

err = clk_prepare_enable(tegra->clock);

drivers/devfreq/tegra30-devfreq.c

861

tegra->clock = devm_clk_get(&pdev->dev, "actmon");

drivers/devfreq/tegra30-devfreq.c

862

if (IS_ERR(tegra->clock)) {

drivers/devfreq/tegra30-devfreq.c

864

return PTR_ERR(tegra->clock);

drivers/firmware/arm_scmi/clock.c

1116

DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(clock, scmi_clock)

drivers/firmware/arm_scmi/protocols.h

374

DECLARE_SCMI_REGISTER_UNREGISTER(clock);

drivers/fpga/dfl-fme-perf.c

562

FME_EVENT_BASIC(clock, BASIC_EVNT_CLK);

drivers/gpu/drm/amd/amdgpu/amdgpu.h

1582

u32 clock;

drivers/gpu/drm/amd/amdgpu/amdgpu.h

1595

struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock);

drivers/gpu/drm/amd/amdgpu/amdgpu.h

948

struct amdgpu_clock clock;

drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c

100

amdgpu_afmt_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);

drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c

101

amdgpu_afmt_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);

drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c

102

amdgpu_afmt_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);

drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c

103

res.clock = clock;

drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c

51

static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq)

drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c

58

cts = clock * 1000;

drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c

88

struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock)

drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c

95

if (amdgpu_afmt_predefined_acr[i].clock == clock)

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1017

u32 clock,

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1038

args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1058

args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1080

args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1093

args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1115

u32 clock,

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1134

args.ulClock = cpu_to_le32(clock); /* 10 khz */

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

589

struct amdgpu_pll *ppll = &adev->clock.ppll[0];

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

590

struct amdgpu_pll *spll = &adev->clock.spll;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

591

struct amdgpu_pll *mpll = &adev->clock.mpll;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

633

adev->clock.ppll[i] = *ppll;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

681

adev->clock.default_sclk =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

683

adev->clock.default_mclk =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

695

adev->clock.default_dispclk =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

698

if (adev->clock.default_dispclk < 53900) {

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

700

adev->clock.default_dispclk / 100);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

701

adev->clock.default_dispclk = 60000;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

702

} else if (adev->clock.default_dispclk <= 60000) {

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

704

adev->clock.default_dispclk / 100);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

705

adev->clock.default_dispclk = 62500;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

707

adev->clock.dp_extclk =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

710

adev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

711

if (adev->clock.max_pixel_clock == 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

712

adev->clock.max_pixel_clock = 40000;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

721

adev->pm.current_sclk = adev->clock.default_sclk;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

722

adev->pm.current_mclk = adev->clock.default_mclk;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

901

int id, u32 clock)

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

935

(clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) {

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

953

(clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) {

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

975

(clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) {

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h

153

int id, u32 clock);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h

157

u32 clock,

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h

163

u32 clock,

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h

205

u32 clock,

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

797

struct amdgpu_pll *spll = &adev->clock.spll;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

798

struct amdgpu_pll *mpll = &adev->clock.mpll;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

811

adev->clock.default_sclk =

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

813

adev->clock.default_mclk =

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

816

adev->pm.current_sclk = adev->clock.default_sclk;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

817

adev->pm.current_mclk = adev->clock.default_mclk;

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

1251

if (mode->clock > max_digital_pixel_clock_khz)

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

1256

if ((mode->clock / 10) > adev->clock.max_pixel_clock)

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

1388

if ((adev->clock.default_dispclk >= 53900) &&

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

1537

if (mode->clock > 340000)

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

1540

if (mode->clock > 165000)

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

351

amdgpu_encoder->native_mode.clock = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

365

native_mode->clock != 0) {

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

589

(amdgpu_encoder->native_mode.clock == 0))

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

618

if (!native_mode->clock) {

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

630

if (!native_mode->clock) {

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

844

if ((mode->clock / 10) > adev->clock.max_pixel_clock)

drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c

176

adjusted_mode->clock = native_mode->clock;

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

129

static void amdgpu_i2c_set_clock(void *i2c_priv, int clock)

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

138

val |= clock ? 0 : rec->en_clk_mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

966

adev->clock.default_sclk * 10;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

969

adev->clock.default_mclk * 10;

drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c

351

if ((crtc->mode.clock == test_crtc->mode.clock) &&

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

313

u32 adjusted_clock = mode->clock;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

315

u32 dp_clock = mode->clock;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

316

u32 clock = mode->clock;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

318

bool is_duallink = amdgpu_dig_monitor_is_duallink(encoder, mode->clock);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

349

adjusted_clock = mode->clock * 2;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

363

clock = (clock * 5) / 4;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

366

clock = (clock * 3) / 2;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

369

clock = clock * 2;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

390

args.v1.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

402

args.v3.sInput.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

580

u32 clock,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

605

if (clock == ATOM_DISABLE)

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

607

args.v1.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

617

args.v2.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

627

args.v3.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

644

args.v5.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

674

args.v6.ulDispEngClkFreq = cpu_to_le32(crtc_id << 24 | clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

706

args.v7.ulPixelClock = cpu_to_le32(clock * 10); /* 100 hz units */

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

709

(clock > 165000))

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

771

amdgpu_connector->pixelclock_for_modeset = mode->clock;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

789

mode->clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

796

mode->clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

803

mode->clock / 10);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

823

u32 pll_clock = mode->clock;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

824

u32 clock = mode->clock;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

832

clock = amdgpu_crtc->adjusted_clock;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

836

pll = &adev->clock.ppll[0];

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

839

pll = &adev->clock.ppll[1];

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

844

pll = &adev->clock.ppll[2];

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

860

encoder_mode, amdgpu_encoder->encoder_id, clock,

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

47

u32 clock,

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

422

mode->clock,

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

445

mode->clock, &dp_lanes, &dp_clock);

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

1063

if (is_dp && adev->clock.dp_extclk)

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

1988

lvds->native_mode.clock =

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

936

if (is_dp && adev->clock.dp_extclk)

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

996

if (adev->clock.dp_extclk)

drivers/gpu/drm/amd/amdgpu/cik.c

1451

static int cik_set_uvd_clock(struct amdgpu_device *adev, u32 clock,

drivers/gpu/drm/amd/amdgpu/cik.c

1460

clock, false, &dividers);

drivers/gpu/drm/amd/amdgpu/cik.c

919

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1039

(u32)mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1041

(u32)mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1055

wm_high.disp_clk = mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1094

wm_low.disp_clk = mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1476

static void dce_v10_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1480

struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1531

static void dce_v10_0_audio_set_dto(struct drm_encoder *encoder, u32 clock)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1539

u32 dto_modulo = clock;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1592

dce_v10_0_audio_set_dto(encoder, mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1675

dce_v10_0_afmt_update_ACR(encoder, mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2241

if (adev->clock.dp_extclk)

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2884

amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3348

amdgpu_encoder->pixel_clock = adjusted_mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1478

uint32_t clock, int bpc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1482

struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1558

static void dce_v6_0_audio_set_dto(struct drm_encoder *encoder, u32 clock)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1585

WREG32(mmDCCG_AUDIO_DTO0_MODULE, clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1588

WREG32(mmDCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1764

dce_v6_0_audio_set_dto(encoder, mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1766

dce_v6_0_audio_set_acr(encoder, mode->clock, bpc);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1768

dce_v6_0_audio_set_dto(encoder, adev->clock.default_dispclk * 10);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2220

if (adev->clock.dp_extclk)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2830

amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3239

amdgpu_encoder->pixel_clock = adjusted_mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

897

(u32)mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

899

(u32)mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

917

wm_high.disp_clk = mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

944

wm_low.disp_clk = mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

985

b.full = dfixed_const(mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

997

b.full = dfixed_const(mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1008

wm_high.disp_clk = mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1047

wm_low.disp_clk = mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1457

static void dce_v8_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1461

struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1500

static void dce_v8_0_audio_set_dto(struct drm_encoder *encoder, u32 clock)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1508

u32 dto_modulo = clock;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1559

dce_v8_0_audio_set_dto(encoder, mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1629

dce_v8_0_afmt_update_ACR(encoder, mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2149

if (adev->clock.dp_extclk)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2801

amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3256

amdgpu_encoder->pixel_clock = adjusted_mode->clock;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

992

(u32)mode->clock);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

994

(u32)mode->clock);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7692

uint64_t clock, clock_lo, clock_hi, hi_check;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7709

clock = clock_lo | (clock_hi << 32ULL);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7726

clock = clock_lo | (clock_hi << 32ULL);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7741

clock = clock_lo | (clock_hi << 32ULL);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7756

clock = clock_lo | (clock_hi << 32ULL);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7759

return clock;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5175

uint64_t clock;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5197

clock = clock_counter_lo | (clock_counter_hi_after << 32ULL);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5199

return clock;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3830

uint64_t clock = 0;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3834

clock = adev->smuio.funcs->get_gpu_clock_counter(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3838

return clock;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2856

uint64_t clock = 0;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2860

clock = adev->smuio.funcs->get_gpu_clock_counter(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2864

return clock;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2923

uint64_t clock;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2927

clock = (uint64_t)RREG32(mmRLC_GPU_CLOCK_COUNT_LSB) |

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2930

return clock;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3944

uint64_t clock;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3948

clock = (uint64_t)RREG32(mmRLC_GPU_CLOCK_COUNT_LSB) |

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3951

return clock;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5106

uint64_t clock;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5110

clock = (uint64_t)RREG32(mmRLC_GPU_CLOCK_COUNT_LSB) |

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5113

return clock;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4275

uint64_t clock, clock_lo, clock_hi, hi_check;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4291

clock = clock_lo | (clock_hi << 32ULL);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4299

clock = gfx_v9_0_kiq_read_clock(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4302

clock = (uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_LSB) |

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4309

return clock;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

511

uint64_t clock;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

515

clock = (uint64_t)RREG32_SOC15(GC, GET_INST(GC, 0), regRLC_GPU_CLOCK_COUNT_LSB) |

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

519

return clock;

drivers/gpu/drm/amd/amdgpu/nv.c

313

return adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/si.c

1477

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/si.c

1731

unsigned vco_freq, ref_freq = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c

41

u64 clock;

drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c

53

clock = clock_counter_lo | (clock_counter_hi_after << 32ULL);

drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c

55

return clock;

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_0.c

31

u64 clock;

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_0.c

43

clock = clock_counter_lo | (clock_counter_hi_after << 32ULL);

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_0.c

45

return clock;

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

49

u64 clock;

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

61

clock = clock_counter_lo | (clock_counter_hi_after << 32ULL);

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

63

return clock;

drivers/gpu/drm/amd/amdgpu/soc15.c

347

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/soc21.c

259

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/soc24.c

98

return adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

113

return adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/vi.c

541

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/vi.c

980

static int vi_set_uvd_clock(struct amdgpu_device *adev, u32 clock,

drivers/gpu/drm/amd/amdgpu/vi.c

989

clock, false, &dividers);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11381

if (old_mode->clock == new_mode->clock &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11406

num = (unsigned long long)new_crtc_state->mode.clock * 1000 * 1000000;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6780

timing_out->pix_clk_100hz = mode_in->clock * 10;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6881

native_mode->clock == drm_mode->clock &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7019

if (aconnector->freesync_vid_base.clock != 0)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7074

if (high_mode->clock == 0 || high_mode->clock != mode->clock ||

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8132

drm_mode->clock,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8429

int clock, bpp = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8473

clock = adjusted_mode->clock;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8474

dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp << 4);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8621

amdgpu_encoder->native_mode.clock = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8850

num = (unsigned long long)m->clock * 1000 * 1000;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

234

DRM_INFO("DM_PPLIB:\t %d\n", pp_clks->clock[i]);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

235

dc_clks->clocks_in_khz[i] = pp_clks->clock[i];

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

531

static void pp_rv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int clock)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

536

amdgpu_dpm_set_min_deep_sleep_dcefclk(adev, clock);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

539

static void pp_rv_set_hard_min_dcefclk_by_freq(struct pp_smu *pp, int clock)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

544

amdgpu_dpm_set_hard_min_dcefclk_by_freq(adev, clock);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

540

int clock = 0;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

548

clock = clocks[i];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

552

ASSERT(clock);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

553

return clock;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

466

int clock = 0;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

474

clock = clocks[i];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

478

ASSERT(clock);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

479

return clock;

drivers/gpu/drm/amd/include/dm_pp_interface.h

165

uint32_t clock[MAX_NUM_CLOCKS];

drivers/gpu/drm/amd/include/kgd_pp_interface.h

493

struct pp_display_clock_request *clock);

drivers/gpu/drm/amd/include/kgd_pp_interface.h

499

int (*set_hard_min_dcefclk_by_freq)(void *handle, uint32_t clock);

drivers/gpu/drm/amd/include/kgd_pp_interface.h

500

int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock);

drivers/gpu/drm/amd/include/kgd_pp_interface.h

501

int (*set_min_deep_sleep_dcefclk)(void *handle, uint32_t clock);

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

1845

struct pp_display_clock_request *clock)

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

1855

clock);

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

1908

uint32_t clock)

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

1918

clock);

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

1925

uint32_t clock)

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

1934

clock);

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

1939

uint32_t clock)

drivers/gpu/drm/amd/pm/amdgpu_dpm.c

1948

clock);

drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c

55

if (amdgpu_crtc->hw_mode.clock) {

drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c

65

vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock;

drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c

93

cfg->display_clk = adev->clock.default_dispclk;

drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h

584

struct pp_display_clock_request *clock);

drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h

591

uint32_t clock);

drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h

593

uint32_t clock);

drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h

595

uint32_t clock);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

3001

adev->pm.default_sclk = adev->clock.default_sclk;

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

3002

adev->pm.default_mclk = adev->clock.default_mclk;

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

3003

adev->pm.current_sclk = adev->clock.default_sclk;

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

3004

adev->pm.current_mclk = adev->clock.default_mclk;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3264

u32 i, clock = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3267

*max_clock = clock;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3272

if (clock < table->entries[i].clk)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3273

clock = table->entries[i].clk;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3275

*max_clock = clock;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3279

u32 clock, u16 max_voltage, u16 *voltage)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3287

if (clock <= table->entries[i].clk) {

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5335

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5457

u32 reference_clock = adev->clock.mpll.reference_freq;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7291

pl->mclk = adev->clock.default_mclk;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7292

pl->sclk = adev->clock.default_sclk;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7788

adev->pm.default_sclk = adev->clock.default_sclk;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7789

adev->pm.default_mclk = adev->clock.default_mclk;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7790

adev->pm.current_sclk = adev->clock.default_sclk;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7791

adev->pm.current_mclk = adev->clock.default_mclk;

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1133

struct pp_display_clock_request *clock)

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1137

if (!hwmgr || !hwmgr->pm_en || !clock)

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1140

return phm_display_clock_voltage_request(hwmgr, clock);

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1291

static int pp_set_min_deep_sleep_dcefclk(void *handle, uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1303

hwmgr->hwmgr_func->set_min_deep_sleep_dcefclk(hwmgr, clock);

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1308

static int pp_set_hard_min_dcefclk_by_freq(void *handle, uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1320

hwmgr->hwmgr_func->set_hard_min_dcefclk_by_freq(hwmgr, clock);

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1325

static int pp_set_hard_min_fclk_by_freq(void *handle, uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

1337

hwmgr->hwmgr_func->set_hard_min_fclk_by_freq(hwmgr, clock);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c

469

struct pp_display_clock_request *clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c

476

return hwmgr->hwmgr_func->display_clock_voltage_request(hwmgr, clock);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

533

uint32_t clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

541

clock = 2700;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

543

clock = (uint32_t)(le16_to_cpu(fw_info->usReferenceClock));

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

545

return clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

780

uint32_t clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

790

clock = 2700;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

796

clock = (uint32_t)(le16_to_cpu(fwInfo_2_1->usMemoryReferenceClock));

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

800

clock = (uint32_t)(le16_to_cpu(fwInfo_0_0->usReferenceClock));

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

804

return clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1165

uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1167

if (clock >= MEM_FREQ_LOW_LATENCY &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1168

clock < MEM_FREQ_HIGH_LATENCY)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1170

else if (clock >= MEM_FREQ_HIGH_LATENCY)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

203

static int smu10_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

207

if (clock && smu10_data->deep_sleep_dcefclk != clock) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

208

smu10_data->deep_sleep_dcefclk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

217

static int smu10_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

221

if (clock && smu10_data->dcf_actual_hard_min_freq != clock) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

222

smu10_data->dcf_actual_hard_min_freq = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

231

static int smu10_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

235

if (clock && smu10_data->f_actual_hard_min_freq != clock) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

236

smu10_data->f_actual_hard_min_freq = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

245

static int smu10_set_hard_min_gfxclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

249

if (clock && smu10_data->gfx_actual_soft_min_freq != clock) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

250

smu10_data->gfx_actual_soft_min_freq = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

253

clock,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

259

static int smu10_set_soft_max_gfxclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

263

if (clock && smu10_data->gfx_max_freq_limit != (clock * 100)) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

264

smu10_data->gfx_max_freq_limit = clock * 100;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

267

clock,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1020

if (odn_table->odn_core_clock_dpm_levels.entries[i].clock !=

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1028

if (odn_table->odn_memory_clock_dpm_levels.entries[i].clock !=

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4265

dpm_table->sclk_table.dpm_levels[count].value = odn_sclk_table->entries[count].clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4272

dpm_table->mclk_table.dpm_levels[count].value = odn_mclk_table->entries[count].clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4976

uint32_t i, now, clock, pcie_speed;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4980

ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_API_GetSclkFrequency, &clock);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4984

if (clock > sclk_table->dpm_levels[i].value)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4997

ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_API_GetMclkFrequency, &clock);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5001

if (clock > mclk_table->dpm_levels[i].value)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5040

odn_sclk_table->entries[i].clock / 100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5050

odn_mclk_table->entries[i].clock / 100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5210

clocks->clock[i] = dep_sclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5215

clocks->clock[i] = sclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5247

clocks->clock[i] = dep_mclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5255

clocks->clock[i] = mclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5568

podn_dpm_table_in_backend->entries[input_level].clock = input_clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5829

uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5836

PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5838

temp = clock >> i;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

954

entries[i].clock = data->golden_dpm_table.sclk_table.dpm_levels[i].value;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

966

entries[i].clock = data->golden_dpm_table.mclk_table.dpm_levels[i].value;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h

385

uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

100

uint32_t clock, uint32_t msg)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

110

if (clock <= table->entries[i].clk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

118

if (clock >= table->entries[i].clk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1187

unsigned long clock = 0, level;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1198

clock = table->entries[level].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1200

clock = table->entries[table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1202

data->sclk_dpm.soft_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1203

data->sclk_dpm.hard_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

130

uint32_t clock, uint32_t msg)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

140

if (clock <= ptable->entries[i].vclk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

148

if (clock >= ptable->entries[i].vclk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1674

clocks->clock[i] = data->sys_info.display_clock[i] * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1679

clocks->clock[i] = table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1684

clocks->clock[i] = data->sys_info.nbp_memory_clock[clocks->count - 1 - i] * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

558

unsigned long clock = 0, level;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

569

clock = table->entries[level].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

571

clock = table->entries[table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

573

data->sclk_dpm.soft_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

574

data->sclk_dpm.hard_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

584

unsigned long clock = 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

599

clock = table->entries[level].vclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

601

clock = table->entries[table->count - 1].vclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

603

data->uvd_dpm.soft_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

604

data->uvd_dpm.hard_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

614

unsigned long clock = 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

629

clock = table->entries[level].ecclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

631

clock = table->entries[table->count - 1].ecclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

633

data->vce_dpm.soft_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

634

data->vce_dpm.hard_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

644

unsigned long clock = 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

659

clock = table->entries[level].acpclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

661

clock = table->entries[table->count - 1].acpclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

663

data->acp_dpm.soft_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

664

data->acp_dpm.hard_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

69

uint32_t clock, uint32_t msg)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

697

unsigned long clock = 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

710

clock = hwmgr->display_config->min_core_set_clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

711

if (clock == 0)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

714

if (data->sclk_dpm.hard_min_clk != clock) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

715

data->sclk_dpm.hard_min_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

725

clock = data->sclk_dpm.soft_min_clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

735

if (clock < stable_pstate_sclk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

736

clock = stable_pstate_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

739

if (data->sclk_dpm.soft_min_clk != clock) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

740

data->sclk_dpm.soft_min_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

751

data->sclk_dpm.soft_max_clk != clock) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

752

data->sclk_dpm.soft_max_clk = clock;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

79

if (clock <= ptable->entries[i].ecclk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

87

if (clock >= ptable->entries[i].ecclk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1002

&(clock->ACMax)) == 0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1009

&(clock->ACMin)) == 0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1016

&(clock->DCMax)) == 0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1841

uint32_t *clock,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1848

*clock = data->clk_range[clock_select].ACMax;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1850

*clock = data->clk_range[clock_select].ACMin;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1883

uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

595

PPCLK_e clkID, uint32_t index, uint32_t *clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

60

uint32_t *clock,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

603

clock) == 0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

997

PPCLK_e clkid, struct vega12_clock_range *clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

1588

PP_Clock *clock, PPCLK_e clock_select)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

1595

clock)) == 0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

1600

if (*clock == 0) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

1604

clock)) == 0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

2038

uint32_t *clock,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

2043

*clock = 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

2048

clock)) == 0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

2055

clock)) == 0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

2838

uint32_t clock)

drivers/gpu/drm/amd/pm/powerplay/inc/hardwaremanager.h

373

uint32_t clock[MAX_NUM_CLOCKS];

drivers/gpu/drm/amd/pm/powerplay/inc/hardwaremanager.h

384

uint32_t clock;

drivers/gpu/drm/amd/pm/powerplay/inc/hardwaremanager.h

457

struct pp_display_clock_request *clock);

drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h

310

struct pp_display_clock_request *clock);

drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h

326

int (*set_min_deep_sleep_dcefclk)(struct pp_hwmgr *hwmgr, uint32_t clock);

drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h

349

int (*set_hard_min_dcefclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);

drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h

350

int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);

drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h

351

int (*set_hard_min_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);

drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h

352

int (*set_soft_max_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

279

uint32_t clock, uint32_t *vol)

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

287

if (allowed_clock_voltage_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

298

uint32_t clock, struct SMU7_Discrete_GraphicsLevel *sclk)

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

313

result = atomctrl_get_engine_pll_dividers_vi(hwmgr, clock, &dividers);

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

343

uint32_t vco_freq = clock * dividers.uc_pll_post_div;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

361

sclk->SclkFrequency = clock;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

388

static uint8_t ci_get_sleep_divider_id_from_clock(uint32_t clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

395

if (clock < min) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

400

temp = clock >> i;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

409

uint32_t clock, struct SMU7_Discrete_GraphicsLevel *level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

415

result = ci_calculate_sclk_params(hwmgr, clock, level);

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

419

hwmgr->dyn_state.vddc_dependency_on_sclk, clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

426

level->SclkFrequency = clock;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

432

clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

450

ci_get_sleep_divider_id_from_clock(clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1143

uint32_t clock, struct SMU73_Discrete_MemoryLevel *mclk)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1148

result = atomctrl_get_memory_pll_dividers_vi(hwmgr, clock, &mem_param);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1154

mclk->MclkFrequency = clock;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1156

mclk->FreqRange = fiji_get_mclk_frequency_ratio(clock);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1162

uint32_t clock, struct SMU73_Discrete_MemoryLevel *mem_level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1178

vdd_dep_table, clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1203

(clock <= mclk_stutter_mode_threshold) &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1209

result = fiji_calculate_mclk_params(hwmgr, clock, mem_level);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

354

uint32_t clock, uint32_t *voltage, uint32_t *mvdd)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

368

if (dep_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

856

uint32_t clock, struct SMU73_Discrete_GraphicsLevel *sclk)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

871

result = atomctrl_get_engine_pll_dividers_vi(hwmgr, clock, &dividers);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

902

uint32_t vco_freq = clock * dividers.uc_pll_post_div;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

926

sclk->SclkFrequency = clock;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

937

uint32_t clock, struct SMU73_Discrete_GraphicsLevel *level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

947

result = fiji_calculate_sclk_params(hwmgr, clock, level);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

956

vdd_dep_table, clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

963

level->SclkFrequency = clock;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

977

level->DeepSleepDivId = smu7_get_sleep_divider_id_from_clock(clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

508

uint32_t clock, uint32_t *vol)

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

518

if (allowed_clock_voltage_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1154

uint32_t clock, struct SMU74_Discrete_MemoryLevel *mem_level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1171

vdd_dep_table, clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1178

mem_level->MclkFrequency = clock;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1192

(clock <= mclk_stutter_mode_threshold) &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

355

uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

369

if (dep_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

891

uint32_t clock, SMU_SclkSetting *sclk_setting)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

902

sclk_setting->SclkFrequency = clock;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

904

result = atomctrl_get_engine_pll_dividers_ai(hwmgr, clock, &dividers);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

923

if (clock > smu_data->range_table[i].trans_lower_frequency

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

924

&& clock <= smu_data->range_table[i].trans_upper_frequency) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

930

sclk_setting->Fcw_int = (uint16_t)((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

931

temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

937

pcc_target_freq = clock - (clock * pcc_target_percent / 100);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

944

ss_target_freq = clock - (clock * ss_target_percent / 100);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

956

uint32_t clock, struct SMU74_Discrete_GraphicsLevel *level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

967

result = polaris10_calculate_sclk_params(hwmgr, clock, &curr_sclk_setting);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

976

vdd_dep_table, clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

996

level->DeepSleepDivId = smu7_get_sleep_divider_id_from_clock(clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

248

uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd)

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

261

if (allowed_clock_voltage_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1000

result = vegam_calculate_mclk_params(hwmgr, clock, mem_level);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1017

(clock <= mclk_stutter_mode_threshold) &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

602

uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd)

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

616

if (dep_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

720

uint32_t clock, SMU_SclkSetting *sclk_setting)

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

731

sclk_setting->SclkFrequency = clock;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

733

result = atomctrl_get_engine_pll_dividers_ai(hwmgr, clock, &dividers);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

752

if (clock > smu_data->range_table[i].trans_lower_frequency

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

753

&& clock <= smu_data->range_table[i].trans_upper_frequency) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

760

((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) /

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

762

temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

768

pcc_target_freq = clock - (clock * pcc_target_percent / 100);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

777

ss_target_freq = clock - (clock * ss_target_percent / 100);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

790

static uint8_t vegam_get_sleep_divider_id_from_clock(uint32_t clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

797

PP_ASSERT_WITH_CODE((clock >= min),

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

801

temp = clock / (i + 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

810

uint32_t clock, struct SMU75_Discrete_GraphicsLevel *level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

820

result = vegam_calculate_sclk_params(hwmgr, clock, &curr_sclk_setting);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

824

table_info->vdd_dep_on_sclk, clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

842

level->DeepSleepDivId = vegam_get_sleep_divider_id_from_clock(clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

964

uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

969

clock, &mpll_param),

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

982

uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level)

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

993

table_info->vdd_dep_on_mclk, clock,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

793

smu_v11_0_get_max_sustainable_clock(struct smu_context *smu, uint32_t *clock,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

810

clk_id << 16, clock);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

816

if (*clock != 0)

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

821

clk_id << 16, clock);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

827

smu_v13_0_get_max_sustainable_clock(struct smu_context *smu, uint32_t *clock,

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

844

clk_id << 16, clock);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

850

if (*clock != 0)

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

855

clk_id << 16, clock);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

441

min_pxlclk = m->clock * 1000;

drivers/gpu/drm/arm/hdlcd_crtc.c

202

long rate, clk_rate = mode->clock * 1000;

drivers/gpu/drm/ast/ast_mode.c

192

ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000);

drivers/gpu/drm/bridge/adv7511/adv7511_drv.c

757

adv7511->f_tmds = adj_mode->clock;

drivers/gpu/drm/bridge/adv7511/adv7533.c

107

if (mode->clock * bpp > adv->info->max_lane_freq_khz * adv->num_dsi_lanes)

drivers/gpu/drm/bridge/analogix/analogix-anx6345.c

563

if (mode->clock > 154000)

drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c

934

if (mode->clock > 154000)

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1510

dp->clock = devm_clk_get(&pdev->dev, "dp");

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1511

if (IS_ERR(dp->clock)) {

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1513

return ERR_CAST(dp->clock);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1585

clk_disable_unprepare(dp->clock);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

1595

ret = clk_prepare_enable(dp->clock);

drivers/gpu/drm/bridge/analogix/analogix_dp_core.h

160

struct clk *clock;

drivers/gpu/drm/bridge/analogix/anx7625.c

2190

if (mode->clock > SUPPORT_PIXEL_CLOCK) {

drivers/gpu/drm/bridge/analogix/anx7625.c

2210

ctx->dt.pixelclock.min = mode->clock;

drivers/gpu/drm/bridge/analogix/anx7625.c

2270

hsync, hfp, hbp, adj->clock);

drivers/gpu/drm/bridge/analogix/anx7625.c

2308

vref = adj->clock * 1000 / (adj->htotal * adj->vtotal);

drivers/gpu/drm/bridge/analogix/anx7625.c

2312

adj->clock += DIV_ROUND_UP(adj_clock, 1000);

drivers/gpu/drm/bridge/analogix/anx7625.c

2316

adj->clock -= DIV_ROUND_UP(adj_clock, 1000);

drivers/gpu/drm/bridge/analogix/anx7625.c

2352

adj_hsync, adj_hfp, adj_hbp, adj->clock);

drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c

965

pclk = cdns_dsi_round_pclk(dsi, adjusted_mode->clock * 1000);

drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c

969

adjusted_mode->clock = pclk / 1000;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

1537

req_bw = mode->clock * bpp / 8;

drivers/gpu/drm/bridge/chipone-icn6211.c

254

unsigned int mode_clock = mode->clock * 1000;

drivers/gpu/drm/bridge/chrontel-ch7033.c

325

if (mode->clock > 165000)

drivers/gpu/drm/bridge/chrontel-ch7033.c

406

regmap_update_bits(priv->regmap, 0x19, 0x1, mode->clock >> 16);

drivers/gpu/drm/bridge/chrontel-ch7033.c

410

mode->clock >> 16);

drivers/gpu/drm/bridge/chrontel-ch7033.c

411

regmap_write(priv->regmap, 0x1a, mode->clock >> 8);

drivers/gpu/drm/bridge/chrontel-ch7033.c

412

regmap_write(priv->regmap, 0x1b, mode->clock);

drivers/gpu/drm/bridge/chrontel-ch7033.c

462

if (mode->clock <= 40000) {

drivers/gpu/drm/bridge/chrontel-ch7033.c

468

} else if (mode->clock < 80000) {

drivers/gpu/drm/bridge/chrontel-ch7033.c

512

regmap_write(priv->regmap, 0x10, mode->clock >> 16);

drivers/gpu/drm/bridge/chrontel-ch7033.c

513

regmap_write(priv->regmap, 0x11, mode->clock >> 8);

drivers/gpu/drm/bridge/chrontel-ch7033.c

514

regmap_write(priv->regmap, 0x12, mode->clock);

drivers/gpu/drm/bridge/cros-ec-anx7688.c

81

requiredbw = mode->clock * 8 * 3;

drivers/gpu/drm/bridge/fsl-ldb.c

107

static unsigned long fsl_ldb_link_frequency(struct fsl_ldb *fsl_ldb, int clock)

drivers/gpu/drm/bridge/fsl-ldb.c

110

return clock * 3500;

drivers/gpu/drm/bridge/fsl-ldb.c

112

return clock * 7000;

drivers/gpu/drm/bridge/fsl-ldb.c

179

requested_link_freq = fsl_ldb_link_frequency(fsl_ldb, mode->clock);

drivers/gpu/drm/bridge/fsl-ldb.c

275

if (mode->clock > (fsl_ldb_is_dual(fsl_ldb) ? 160000 : 80000))

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c

30

if (mode->clock < 13500)

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c

33

if (mode->clock > 297000)

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c

36

round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000);

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c

43

if (abs(round_rate - mode->clock * 1000) > mode->clock * 5)

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

136

unsigned long di_clk = adjusted_mode->clock * 1000;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

380

if (mode->clock > 300000)

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

383

if (mode->clock > 150000 && is_single)

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

89

unsigned long di_clk = adj->clock * 1000;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

106

unsigned long di_clk = adj->clock * 1000;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

148

unsigned long di_clk = adjusted_mode->clock * 1000;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

394

if (mode->clock > 170000)

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

397

if (mode->clock > 150000 && is_single)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

482

ret = phy_mipi_dphy_get_default_config(mode->clock * MSEC_PER_SEC, bpp,

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

501

unsigned long pixel_clock_rate = mode->clock * 1000;

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

575

pixel_clock_rate = mode->clock * 1000;

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

579

adjusted_mode->clock = rounded_rate / 1000;

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

582

adjusted_mode->clock, DRM_MODE_ARG(mode));

drivers/gpu/drm/bridge/inno-hdmi.c

821

mpixelclk = mode->clock * 1000;

drivers/gpu/drm/bridge/ite-it6263.c

617

pclk_high = mode->clock > HIGH_PIXEL_CLOCK_KHZ;

drivers/gpu/drm/bridge/ite-it6263.c

753

if (mode->clock > MAX_PIXEL_CLOCK_KHZ)

drivers/gpu/drm/bridge/ite-it6505.c

1435

int clock = mode->clock;

drivers/gpu/drm/bridge/ite-it6505.c

1438

clock < ADJUST_PHASE_THRESHOLD ? PIXEL_CLK_DELAY : 0);

drivers/gpu/drm/bridge/ite-it6505.c

3113

if (mode->clock > it6505->max_dpi_pixel_clock)

drivers/gpu/drm/bridge/ite-it6505.c

3116

it6505->video_info.clock = mode->clock;

drivers/gpu/drm/bridge/ite-it6505.c

3411

vid->clock / 1000, vid->clock % 1000);

drivers/gpu/drm/bridge/ite-it6505.c

760

it6505->video_info.clock = pclk;

drivers/gpu/drm/bridge/ite-it66121.c

390

if (mode->clock > IT66121_AFE_CLK_HIGH) {

drivers/gpu/drm/bridge/ite-it66121.c

837

if (mode->clock > max_clock)

drivers/gpu/drm/bridge/ite-it66121.c

840

if (mode->clock < 25000)

drivers/gpu/drm/bridge/lontium-lt8912b.c

596

if (mode->clock > 150000)

drivers/gpu/drm/bridge/lontium-lt9211.c

335

if (mode->clock < 44000) {

drivers/gpu/drm/bridge/lontium-lt9211.c

337

} else if (mode->clock < 88000) {

drivers/gpu/drm/bridge/lontium-lt9211.c

339

} else if (mode->clock < 176000) {

drivers/gpu/drm/bridge/lontium-lt9211.c

344

mode->clock);

drivers/gpu/drm/bridge/lontium-lt9211.c

580

if (mode->clock < 25000)

drivers/gpu/drm/bridge/lontium-lt9211.c

582

if (mode->clock > 176000)

drivers/gpu/drm/bridge/lontium-lt9611.c

176

unsigned int pcr_m = mode->clock * 5 * postdiv / 27000;

drivers/gpu/drm/bridge/lontium-lt9611.c

226

unsigned int pclk = mode->clock;

drivers/gpu/drm/bridge/nwl-dsi.c

192

return DIV64_U64_ROUND_UP(ps * dsi->mode.clock * bpp,

drivers/gpu/drm/bridge/nwl-dsi.c

280

DRM_DEV_DEBUG_DRIVER(dsi->dev, "clock = %d kHz\n", dsi->mode.clock);

drivers/gpu/drm/bridge/nwl-dsi.c

788

ret = phy_mipi_dphy_get_default_config(mode->clock * 1000,

drivers/gpu/drm/bridge/nwl-dsi.c

809

if (mode->clock * bpp > 15000000 * dsi->lanes)

drivers/gpu/drm/bridge/nwl-dsi.c

812

if (mode->clock * bpp < 80000 * dsi->lanes)

drivers/gpu/drm/bridge/samsung-dsim.c

1172

u64 pix_clk = m->clock * 1000;

drivers/gpu/drm/bridge/samsung-dsim.c

881

pix_clk = m->clock * 1000;

drivers/gpu/drm/bridge/sii902x.c

369

u16 pixel_clock_10kHz = adj->clock / 10;

drivers/gpu/drm/bridge/sii902x.c

513

if (crtc_state->mode.clock < SII902X_MIN_PIXEL_CLOCK_KHZ ||

drivers/gpu/drm/bridge/sii902x.c

514

crtc_state->mode.clock > SII902X_MAX_PIXEL_CLOCK_KHZ)

drivers/gpu/drm/bridge/sii902x.c

531

if (mode->clock < SII902X_MIN_PIXEL_CLOCK_KHZ)

drivers/gpu/drm/bridge/sii902x.c

534

if (mode->clock > SII902X_MAX_PIXEL_CLOCK_KHZ)

drivers/gpu/drm/bridge/sii9234.c

874

if (mode->clock > MHL1_MAX_CLK)

drivers/gpu/drm/bridge/sil-sii8620.c

1189

int clk = mode->clock * (ctx->use_packed_pixel ? 2 : 3);

drivers/gpu/drm/bridge/sil-sii8620.c

2239

if (mode->clock < max_pclk)

drivers/gpu/drm/bridge/sil-sii8620.c

2241

else if (mode->clock < max_pclk_pp_mode)

drivers/gpu/drm/bridge/ssd2825.c

452

pll_config = construct_pll_config(priv, pclk_mult * mode->clock,

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1305

peak_stream_bandwidth = mode->clock * bpp / 8;

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1364

t2 = (link->rate / 4) * 1000 / (mode->clock / 2);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1366

t2 = (link->rate / 4) * 1000 / mode->clock;

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1384

hblank_interval = hblank * (link->rate / 4) / mode->clock;

drivers/gpu/drm/bridge/synopsys/dw-dp.c

472

req_bw = mode->clock * bpp / 8;

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

2004

vmode->mpixelclock = mode->clock * 1000;

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c

794

lbcc = div_u64((u64)hcomponent * mode->clock * bpp, dsi->lanes * 8);

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c

797

frac = lbcc % mode->clock;

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c

798

lbcc = lbcc / mode->clock;

drivers/gpu/drm/bridge/tc358767.c

1008

in_bw = mode->clock * bits_per_pixel / 8;

drivers/gpu/drm/bridge/tc358767.c

1456

1000 * tc->mode.clock);

drivers/gpu/drm/bridge/tc358767.c

1500

1000 * tc->mode.clock);

drivers/gpu/drm/bridge/tc358767.c

1636

crtc_state->mode.clock * 1000,

drivers/gpu/drm/bridge/tc358767.c

1641

crtc_state->adjusted_mode.clock = adjusted_clock / 1000;

drivers/gpu/drm/bridge/tc358767.c

1644

if (crtc_state->adjusted_mode.clock > 100000)

drivers/gpu/drm/bridge/tc358767.c

1660

crtc_state->mode.clock * 1000,

drivers/gpu/drm/bridge/tc358767.c

1665

crtc_state->adjusted_mode.clock = adjusted_clock / 1000;

drivers/gpu/drm/bridge/tc358767.c

1668

if (crtc_state->adjusted_mode.clock > 154000)

drivers/gpu/drm/bridge/tc358767.c

1680

if (mode->clock > 100000)

drivers/gpu/drm/bridge/tc358767.c

1696

if (mode->clock > 154000)

drivers/gpu/drm/bridge/tc358767.c

1699

req = mode->clock * bits_per_pixel / 8;

drivers/gpu/drm/bridge/tc358768.c

338

target_pll = tc358768_pclk_to_pll(priv, mode->clock * 1000);

drivers/gpu/drm/bridge/tc358768.c

403

priv->pclk = mode->clock * 1000;

drivers/gpu/drm/bridge/tc358768.c

637

mode->clock * 1000);

drivers/gpu/drm/bridge/tc358775.c

508

if ((mode->clock > 135000 && tc->lvds_link == SINGLE_LINK) ||

drivers/gpu/drm/bridge/tc358775.c

509

(mode->clock > 270000 && tc->lvds_link == DUAL_LINK))

drivers/gpu/drm/bridge/tda998x_drv.c

1396

if (mode->clock > ((priv->rev == TDA19988) ? 165000 : 150000))

drivers/gpu/drm/bridge/tda998x_drv.c

1532

tmds_clock = mode->clock * (1 + rep);

drivers/gpu/drm/bridge/thc63lvd1024.c

75

if (mode->clock < min_freq)

drivers/gpu/drm/bridge/thc63lvd1024.c

78

if (mode->clock > max_freq)

drivers/gpu/drm/bridge/ti-sn65dsi83.c

329

int mode_clock = mode->clock;

drivers/gpu/drm/bridge/ti-sn65dsi83.c

354

return clamp((unsigned int)mode->clock *

drivers/gpu/drm/bridge/ti-sn65dsi83.c

750

if (mode->clock < 25000)

drivers/gpu/drm/bridge/ti-sn65dsi83.c

752

if (mode->clock > 154000)

drivers/gpu/drm/bridge/ti-sn65dsi86.c

300

bit_rate_khz = mode->clock *

drivers/gpu/drm/bridge/ti-sn65dsi86.c

799

if (mode->clock > 594000)

drivers/gpu/drm/bridge/ti-sn65dsi86.c

846

bit_rate_mhz = (mode->clock / 1000) *

drivers/gpu/drm/bridge/ti-sn65dsi86.c

883

bit_rate_khz = mode->clock * bpp;

drivers/gpu/drm/bridge/ti-tfp410.c

195

if (mode->clock < 25000)

drivers/gpu/drm/bridge/ti-tfp410.c

198

if (mode->clock > 165000)

drivers/gpu/drm/display/drm_dp_mst_topology.c

4786

int drm_dp_calc_pbn_mode(int clock, int bpp)

drivers/gpu/drm/display/drm_dp_mst_topology.c

4809

return DIV64_U64_ROUND_UP(mul_u32_u32(clock * bpp, 64 * overhead >> 4),

drivers/gpu/drm/display/drm_hdmi_helper.c

215

unsigned long long clock = mode->clock * 1000ULL;

drivers/gpu/drm/display/drm_hdmi_helper.c

252

clock = clock / 2;

drivers/gpu/drm/display/drm_hdmi_helper.c

255

clock = clock * 2;

drivers/gpu/drm/display/drm_hdmi_helper.c

257

return DIV_ROUND_CLOSEST_ULL(clock * bpc, 8);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

533

unsigned long long clock)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

538

if (info->max_tmds_clock && clock > info->max_tmds_clock * 1000)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

544

status = funcs->tmds_char_rate_valid(connector, mode, clock);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

559

unsigned long long clock;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

561

clock = drm_hdmi_compute_mode_clock(mode, bpc, fmt);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

562

if (!clock)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

565

status = hdmi_clock_valid(connector, mode, clock);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

569

conn_state->hdmi.tmds_char_rate = clock;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

890

unsigned long long clock;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

892

clock = drm_hdmi_compute_mode_clock(mode, 8, HDMI_COLORSPACE_RGB);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

893

if (!clock)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

896

return hdmi_clock_valid(connector, mode, clock);

drivers/gpu/drm/drm_edid.c

3321

return DIV_ROUND_CLOSEST(mode->clock, mode->htotal);

drivers/gpu/drm/drm_edid.c

3548

mode->clock = 1088 * 10;

drivers/gpu/drm/drm_edid.c

3550

mode->clock = le16_to_cpu(timing->pixel_clock) * 10;

drivers/gpu/drm/drm_edid.c

3672

if (mode->clock > max_clock)

drivers/gpu/drm/drm_edid.c

4270

unsigned int clock = cea_mode->clock;

drivers/gpu/drm/drm_edid.c

4273

return clock;

drivers/gpu/drm/drm_edid.c

4281

clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);

drivers/gpu/drm/drm_edid.c

4283

clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);

drivers/gpu/drm/drm_edid.c

4285

return clock;

drivers/gpu/drm/drm_edid.c

4329

if (!to_match->clock)

drivers/gpu/drm/drm_edid.c

4342

clock1 = cea_mode.clock;

drivers/gpu/drm/drm_edid.c

4345

if (abs(to_match->clock - clock1) > clock_tolerance &&

drivers/gpu/drm/drm_edid.c

4346

abs(to_match->clock - clock2) > clock_tolerance)

drivers/gpu/drm/drm_edid.c

4370

if (!to_match->clock)

drivers/gpu/drm/drm_edid.c

4383

clock1 = cea_mode.clock;

drivers/gpu/drm/drm_edid.c

4386

if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) &&

drivers/gpu/drm/drm_edid.c

4387

KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2))

drivers/gpu/drm/drm_edid.c

4436

if (!to_match->clock)

drivers/gpu/drm/drm_edid.c

4447

clock1 = hdmi_mode->clock;

drivers/gpu/drm/drm_edid.c

4450

if (abs(to_match->clock - clock1) > clock_tolerance &&

drivers/gpu/drm/drm_edid.c

4451

abs(to_match->clock - clock2) > clock_tolerance)

drivers/gpu/drm/drm_edid.c

4474

if (!to_match->clock)

drivers/gpu/drm/drm_edid.c

4485

clock1 = hdmi_mode->clock;

drivers/gpu/drm/drm_edid.c

4488

if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||

drivers/gpu/drm/drm_edid.c

4489

KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&

drivers/gpu/drm/drm_edid.c

4537

clock1 = cea_mode->clock;

drivers/gpu/drm/drm_edid.c

4542

if (mode->clock != clock1 && mode->clock != clock2)

drivers/gpu/drm/drm_edid.c

4556

if (mode->clock != clock1)

drivers/gpu/drm/drm_edid.c

4557

newmode->clock = clock1;

drivers/gpu/drm/drm_edid.c

4559

newmode->clock = clock2;

drivers/gpu/drm/drm_edid.c

5356

int clock1, clock2, clock;

drivers/gpu/drm/drm_edid.c

5368

clock1 = cea_mode->clock;

drivers/gpu/drm/drm_edid.c

5375

clock1 = cea_mode->clock;

drivers/gpu/drm/drm_edid.c

5383

if (abs(mode->clock - clock1) < abs(mode->clock - clock2))

drivers/gpu/drm/drm_edid.c

5384

clock = clock1;

drivers/gpu/drm/drm_edid.c

5386

clock = clock2;

drivers/gpu/drm/drm_edid.c

5388

if (mode->clock == clock)

drivers/gpu/drm/drm_edid.c

5394

type, vic, mode->clock, clock);

drivers/gpu/drm/drm_edid.c

5395

mode->clock = clock;

drivers/gpu/drm/drm_edid.c

6812

mode->clock = type_7 ? pixel_clock : pixel_clock * 10;

drivers/gpu/drm/drm_modes.c

1002

drm_mode->clock = pixel_freq;

drivers/gpu/drm/drm_modes.c

1084

dmode->clock = vm->pixelclock / 1000;

drivers/gpu/drm/drm_modes.c

1125

vm->pixelclock = dmode->clock * 1000;

drivers/gpu/drm/drm_modes.c

1301

if (check_mul_overflow(mode->clock, num, &num))

drivers/gpu/drm/drm_modes.c

1353

p->crtc_clock = p->clock;

drivers/gpu/drm/drm_modes.c

1494

if (mode1->clock && mode2->clock)

drivers/gpu/drm/drm_modes.c

1495

return KHZ2PICOS(mode1->clock) == KHZ2PICOS(mode2->clock);

drivers/gpu/drm/drm_modes.c

1497

return mode1->clock == mode2->clock;

drivers/gpu/drm/drm_modes.c

1640

if (mode->clock == 0)

drivers/gpu/drm/drm_modes.c

1860

diff = b->clock - a->clock;

drivers/gpu/drm/drm_modes.c

2585

out->clock = in->clock;

drivers/gpu/drm/drm_modes.c

2641

if (in->clock > INT_MAX || in->vrefresh > INT_MAX)

drivers/gpu/drm/drm_modes.c

2644

out->clock = in->clock;

drivers/gpu/drm/drm_modes.c

455

mode->clock = pixel_clock_hz / 1000;

drivers/gpu/drm/drm_modes.c

806

tmp -= drm_mode->clock % CVT_CLOCK_STEP;

drivers/gpu/drm/drm_modes.c

807

drm_mode->clock = tmp;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

502

static void etnaviv_gpu_load_clock(struct etnaviv_gpu *gpu, u32 clock)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

504

gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock |

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

506

gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

519

u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

521

clock &= ~VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__MASK;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

522

clock |= VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(fscale);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

523

etnaviv_gpu_load_clock(gpu, clock);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

49

static inline void pipe_select(struct etnaviv_gpu *gpu, u32 clock, unsigned pipe)

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

51

clock &= ~(VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__MASK);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

52

clock |= VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE(pipe);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

54

gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

61

u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

68

pipe_select(gpu, clock, i);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

73

pipe_select(gpu, clock, 0);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

82

u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

89

pipe_select(gpu, clock, i);

drivers/gpu/drm/etnaviv/etnaviv_perfmon.c

94

pipe_select(gpu, clock, 0);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

195

unsigned long ideal_clk = mode->clock * 1000;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

424

if (mode->clock == 0) {

drivers/gpu/drm/exynos/exynos_drm_fimd.c

429

ideal_clk = mode->clock * 1000;

drivers/gpu/drm/exynos/exynos_drm_rotator.c

309

rot->clock = devm_clk_get(dev, "rotator");

drivers/gpu/drm/exynos/exynos_drm_rotator.c

310

if (IS_ERR(rot->clock)) {

drivers/gpu/drm/exynos/exynos_drm_rotator.c

312

return PTR_ERR(rot->clock);

drivers/gpu/drm/exynos/exynos_drm_rotator.c

345

clk_disable_unprepare(rot->clock);

drivers/gpu/drm/exynos/exynos_drm_rotator.c

353

return clk_prepare_enable(rot->clock);

drivers/gpu/drm/exynos/exynos_drm_rotator.c

62

struct clk *clock;

drivers/gpu/drm/exynos/exynos_drm_scaler.c

46

struct clk *clock[SCALER_MAX_CLK];

drivers/gpu/drm/exynos/exynos_drm_scaler.c

517

scaler->clock[i] = devm_clk_get(dev,

drivers/gpu/drm/exynos/exynos_drm_scaler.c

519

if (IS_ERR(scaler->clock[i])) {

drivers/gpu/drm/exynos/exynos_drm_scaler.c

521

return PTR_ERR(scaler->clock[i]);

drivers/gpu/drm/exynos/exynos_drm_scaler.c

565

clk_fun(scaler->clock[i]);

drivers/gpu/drm/exynos/exynos_hdmi.c

1446

ret = hdmi_find_phy_conf(hdata, m->clock * 1000);

drivers/gpu/drm/exynos/exynos_hdmi.c

944

false, mode->clock * 1000);

drivers/gpu/drm/exynos/exynos_hdmi.c

946

ret = hdmi_find_phy_conf(hdata, mode->clock * 1000);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

91

clk_set_rate(fsl_dev->pix_clk, mode->clock * 1000);

drivers/gpu/drm/gma500/cdv_intel_crt.c

78

if (mode->clock < 20000)

drivers/gpu/drm/gma500/cdv_intel_crt.c

82

if (mode->clock > 355000)

drivers/gpu/drm/gma500/cdv_intel_display.c

215

struct gma_clock_t *clock, bool is_lvds, u32 ddi_select)

drivers/gpu/drm/gma500/cdv_intel_display.c

273

m |= ((clock->m2) << SB_M_DIVIDER_SHIFT);

drivers/gpu/drm/gma500/cdv_intel_display.c

289

n_vco |= ((clock->n) << SB_N_DIVIDER_SHIFT);

drivers/gpu/drm/gma500/cdv_intel_display.c

291

if (clock->vco < 2250000) {

drivers/gpu/drm/gma500/cdv_intel_display.c

294

} else if (clock->vco < 2750000) {

drivers/gpu/drm/gma500/cdv_intel_display.c

297

} else if (clock->vco < 3300000) {

drivers/gpu/drm/gma500/cdv_intel_display.c

313

p |= SET_FIELD(clock->p1, SB_P1_DIVIDER);

drivers/gpu/drm/gma500/cdv_intel_display.c

314

switch (clock->p2) {

drivers/gpu/drm/gma500/cdv_intel_display.c

328

DRM_ERROR("Bad P2 clock: %d\n", clock->p2);

drivers/gpu/drm/gma500/cdv_intel_display.c

394

static void cdv_intel_clock(int refclk, struct gma_clock_t *clock)

drivers/gpu/drm/gma500/cdv_intel_display.c

396

clock->m = clock->m2 + 2;

drivers/gpu/drm/gma500/cdv_intel_display.c

397

clock->p = clock->p1 * clock->p2;

drivers/gpu/drm/gma500/cdv_intel_display.c

398

clock->vco = (refclk * clock->m) / clock->n;

drivers/gpu/drm/gma500/cdv_intel_display.c

399

clock->dot = clock->vco / clock->p;

drivers/gpu/drm/gma500/cdv_intel_display.c

408

struct gma_clock_t clock;

drivers/gpu/drm/gma500/cdv_intel_display.c

410

memset(&clock, 0, sizeof(clock));

drivers/gpu/drm/gma500/cdv_intel_display.c

415

clock.p1 = 2;

drivers/gpu/drm/gma500/cdv_intel_display.c

416

clock.p2 = 10;

drivers/gpu/drm/gma500/cdv_intel_display.c

417

clock.n = 1;

drivers/gpu/drm/gma500/cdv_intel_display.c

418

clock.m1 = 0;

drivers/gpu/drm/gma500/cdv_intel_display.c

419

clock.m2 = 118;

drivers/gpu/drm/gma500/cdv_intel_display.c

421

clock.p1 = 1;

drivers/gpu/drm/gma500/cdv_intel_display.c

422

clock.p2 = 10;

drivers/gpu/drm/gma500/cdv_intel_display.c

423

clock.n = 1;

drivers/gpu/drm/gma500/cdv_intel_display.c

424

clock.m1 = 0;

drivers/gpu/drm/gma500/cdv_intel_display.c

425

clock.m2 = 98;

drivers/gpu/drm/gma500/cdv_intel_display.c

431

clock.p1 = 2;

drivers/gpu/drm/gma500/cdv_intel_display.c

432

clock.p2 = 10;

drivers/gpu/drm/gma500/cdv_intel_display.c

433

clock.n = 5;

drivers/gpu/drm/gma500/cdv_intel_display.c

434

clock.m1 = 0;

drivers/gpu/drm/gma500/cdv_intel_display.c

435

clock.m2 = 160;

drivers/gpu/drm/gma500/cdv_intel_display.c

437

clock.p1 = 1;

drivers/gpu/drm/gma500/cdv_intel_display.c

438

clock.p2 = 10;

drivers/gpu/drm/gma500/cdv_intel_display.c

439

clock.n = 5;

drivers/gpu/drm/gma500/cdv_intel_display.c

440

clock.m1 = 0;

drivers/gpu/drm/gma500/cdv_intel_display.c

441

clock.m2 = 133;

drivers/gpu/drm/gma500/cdv_intel_display.c

449

gma_crtc->clock_funcs->clock(refclk, &clock);

drivers/gpu/drm/gma500/cdv_intel_display.c

450

memcpy(best_clock, &clock, sizeof(struct gma_clock_t));

drivers/gpu/drm/gma500/cdv_intel_display.c

584

struct gma_clock_t clock;

drivers/gpu/drm/gma500/cdv_intel_display.c

658

ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,

drivers/gpu/drm/gma500/cdv_intel_display.c

659

&clock);

drivers/gpu/drm/gma500/cdv_intel_display.c

662

adjusted_mode->clock, clock.dot);

drivers/gpu/drm/gma500/cdv_intel_display.c

726

cdv_dpll_set_clock_cdv(dev, crtc, &clock, is_lvds, ddi_select);

drivers/gpu/drm/gma500/cdv_intel_display.c

745

if (clock.p2 == 7)

drivers/gpu/drm/gma500/cdv_intel_display.c

780

int sdvo_pixel_multiply = adjusted_mode->clock / mode->clock;

drivers/gpu/drm/gma500/cdv_intel_display.c

827

static void i8xx_clock(int refclk, struct gma_clock_t *clock)

drivers/gpu/drm/gma500/cdv_intel_display.c

829

clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);

drivers/gpu/drm/gma500/cdv_intel_display.c

830

clock->p = clock->p1 * clock->p2;

drivers/gpu/drm/gma500/cdv_intel_display.c

831

clock->vco = refclk * clock->m / (clock->n + 2);

drivers/gpu/drm/gma500/cdv_intel_display.c

832

clock->dot = clock->vco / clock->p;

drivers/gpu/drm/gma500/cdv_intel_display.c

845

struct gma_clock_t clock;

drivers/gpu/drm/gma500/cdv_intel_display.c

868

clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;

drivers/gpu/drm/gma500/cdv_intel_display.c

869

clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;

drivers/gpu/drm/gma500/cdv_intel_display.c

870

clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;

drivers/gpu/drm/gma500/cdv_intel_display.c

873

clock.p1 =

drivers/gpu/drm/gma500/cdv_intel_display.c

877

if (clock.p1 == 0) {

drivers/gpu/drm/gma500/cdv_intel_display.c

878

clock.p1 = 4;

drivers/gpu/drm/gma500/cdv_intel_display.c

881

clock.p2 = 14;

drivers/gpu/drm/gma500/cdv_intel_display.c

886

i8xx_clock(66000, &clock);

drivers/gpu/drm/gma500/cdv_intel_display.c

888

i8xx_clock(48000, &clock);

drivers/gpu/drm/gma500/cdv_intel_display.c

891

clock.p1 = 2;

drivers/gpu/drm/gma500/cdv_intel_display.c

893

clock.p1 =

drivers/gpu/drm/gma500/cdv_intel_display.c

899

clock.p2 = 4;

drivers/gpu/drm/gma500/cdv_intel_display.c

901

clock.p2 = 2;

drivers/gpu/drm/gma500/cdv_intel_display.c

903

i8xx_clock(48000, &clock);

drivers/gpu/drm/gma500/cdv_intel_display.c

911

return clock.dot;

drivers/gpu/drm/gma500/cdv_intel_display.c

946

mode->clock = cdv_intel_crtc_clock_get(dev, crtc);

drivers/gpu/drm/gma500/cdv_intel_display.c

972

.clock = cdv_intel_clock,

drivers/gpu/drm/gma500/cdv_intel_dp.c

1022

mode->clock, adjusted_mode->clock, &m_n);

drivers/gpu/drm/gma500/cdv_intel_dp.c

527

(cdv_intel_dp_link_required(mode->clock, dev_priv->edp.bpp)

drivers/gpu/drm/gma500/cdv_intel_dp.c

532

if (cdv_intel_dp_link_required(mode->clock, 24)

drivers/gpu/drm/gma500/cdv_intel_dp.c

537

if (mode->clock < 10000)

drivers/gpu/drm/gma500/cdv_intel_dp.c

885

adjusted_mode->clock = fixed_mode->clock;

drivers/gpu/drm/gma500/cdv_intel_dp.c

897

int lane_count, clock;

drivers/gpu/drm/gma500/cdv_intel_dp.c

901

int refclock = mode->clock;

drivers/gpu/drm/gma500/cdv_intel_dp.c

906

refclock = intel_dp->panel_fixed_mode->clock;

drivers/gpu/drm/gma500/cdv_intel_dp.c

911

for (clock = max_clock; clock >= 0; clock--) {

drivers/gpu/drm/gma500/cdv_intel_dp.c

912

int link_avail = cdv_intel_dp_max_data_rate(cdv_intel_dp_link_clock(bws[clock]), lane_count);

drivers/gpu/drm/gma500/cdv_intel_dp.c

915

intel_dp->link_bw = bws[clock];

drivers/gpu/drm/gma500/cdv_intel_dp.c

917

adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw);

drivers/gpu/drm/gma500/cdv_intel_dp.c

921

adjusted_mode->clock);

drivers/gpu/drm/gma500/cdv_intel_dp.c

930

adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw);

drivers/gpu/drm/gma500/cdv_intel_dp.c

934

adjusted_mode->clock);

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

228

if (mode->clock > 165000)

drivers/gpu/drm/gma500/cdv_intel_hdmi.c

230

if (mode->clock < 20000)

drivers/gpu/drm/gma500/cdv_intel_lvds.c

216

adjusted_mode->clock = panel_fixed_mode->clock;

drivers/gpu/drm/gma500/gma_device.c

13

uint32_t clock;

drivers/gpu/drm/gma500/gma_device.c

24

pci_read_config_dword(pci_root, 0xD4, &clock);

drivers/gpu/drm/gma500/gma_device.c

27

switch (clock & 0x07) {

drivers/gpu/drm/gma500/gma_display.c

721

struct gma_clock_t *clock)

drivers/gpu/drm/gma500/gma_display.c

723

if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)

drivers/gpu/drm/gma500/gma_display.c

725

if (clock->p < limit->p.min || limit->p.max < clock->p)

drivers/gpu/drm/gma500/gma_display.c

727

if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)

drivers/gpu/drm/gma500/gma_display.c

729

if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)

drivers/gpu/drm/gma500/gma_display.c

732

if (clock->m1 <= clock->m2 && clock->m1 != 0)

drivers/gpu/drm/gma500/gma_display.c

734

if (clock->m < limit->m.min || limit->m.max < clock->m)

drivers/gpu/drm/gma500/gma_display.c

736

if (clock->n < limit->n.min || limit->n.max < clock->n)

drivers/gpu/drm/gma500/gma_display.c

738

if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)

drivers/gpu/drm/gma500/gma_display.c

744

if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)

drivers/gpu/drm/gma500/gma_display.c

757

struct gma_clock_t clock;

drivers/gpu/drm/gma500/gma_display.c

770

clock.p2 = limit->p2.p2_fast;

drivers/gpu/drm/gma500/gma_display.c

772

clock.p2 = limit->p2.p2_slow;

drivers/gpu/drm/gma500/gma_display.c

775

clock.p2 = limit->p2.p2_slow;

drivers/gpu/drm/gma500/gma_display.c

777

clock.p2 = limit->p2.p2_fast;

drivers/gpu/drm/gma500/gma_display.c

783

for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {

drivers/gpu/drm/gma500/gma_display.c

784

for (clock.m2 = limit->m2.min;

drivers/gpu/drm/gma500/gma_display.c

785

(clock.m2 < clock.m1 || clock.m1 == 0) &&

drivers/gpu/drm/gma500/gma_display.c

786

clock.m2 <= limit->m2.max; clock.m2++) {

drivers/gpu/drm/gma500/gma_display.c

787

for (clock.n = limit->n.min;

drivers/gpu/drm/gma500/gma_display.c

788

clock.n <= limit->n.max; clock.n++) {

drivers/gpu/drm/gma500/gma_display.c

789

for (clock.p1 = limit->p1.min;

drivers/gpu/drm/gma500/gma_display.c

790

clock.p1 <= limit->p1.max;

drivers/gpu/drm/gma500/gma_display.c

791

clock.p1++) {

drivers/gpu/drm/gma500/gma_display.c

794

clock_funcs->clock(refclk, &clock);

drivers/gpu/drm/gma500/gma_display.c

797

limit, &clock))

drivers/gpu/drm/gma500/gma_display.c

800

this_err = abs(clock.dot - target);

drivers/gpu/drm/gma500/gma_display.c

802

*best_clock = clock;

drivers/gpu/drm/gma500/gma_display.h

49

void (*clock)(int refclk, struct gma_clock_t *clock);

drivers/gpu/drm/gma500/gma_display.h

53

struct gma_clock_t *clock);

drivers/gpu/drm/gma500/gma_display.h

86

struct gma_clock_t *clock);

drivers/gpu/drm/gma500/intel_bios.c

168

panel_fixed_mode->clock = dvo_timing->clock * 10;

drivers/gpu/drm/gma500/intel_bios.h

292

u16 clock; /**< In 10khz */

drivers/gpu/drm/gma500/oaktrail_crtc.c

115

static void mrst_lvds_clock(int refclk, struct gma_clock_t *clock)

drivers/gpu/drm/gma500/oaktrail_crtc.c

117

clock->dot = (refclk * clock->m) / (14 * clock->p1);

drivers/gpu/drm/gma500/oaktrail_crtc.c

120

static void mrst_print_pll(struct gma_clock_t *clock)

drivers/gpu/drm/gma500/oaktrail_crtc.c

123

clock->dot, clock->m, clock->m1, clock->m2, clock->n,

drivers/gpu/drm/gma500/oaktrail_crtc.c

124

clock->p1, clock->p2);

drivers/gpu/drm/gma500/oaktrail_crtc.c

131

struct gma_clock_t clock;

drivers/gpu/drm/gma500/oaktrail_crtc.c

136

memset(&clock, 0, sizeof(clock));

drivers/gpu/drm/gma500/oaktrail_crtc.c

138

for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) {

drivers/gpu/drm/gma500/oaktrail_crtc.c

139

for (clock.n = limit->n.min; clock.n <= limit->n.max;

drivers/gpu/drm/gma500/oaktrail_crtc.c

140

clock.n++) {

drivers/gpu/drm/gma500/oaktrail_crtc.c

141

for (clock.p1 = limit->p1.min;

drivers/gpu/drm/gma500/oaktrail_crtc.c

142

clock.p1 <= limit->p1.max; clock.p1++) {

drivers/gpu/drm/gma500/oaktrail_crtc.c

144

clock.p = clock.p1 * limit->p2.p2_slow;

drivers/gpu/drm/gma500/oaktrail_crtc.c

145

target_vco = target * clock.p;

drivers/gpu/drm/gma500/oaktrail_crtc.c

154

actual_freq = (refclk * clock.m) /

drivers/gpu/drm/gma500/oaktrail_crtc.c

155

(clock.n * clock.p);

drivers/gpu/drm/gma500/oaktrail_crtc.c

170

*best_clock = clock;

drivers/gpu/drm/gma500/oaktrail_crtc.c

189

struct gma_clock_t clock;

drivers/gpu/drm/gma500/oaktrail_crtc.c

193

memset(&clock, 0, sizeof(clock));

drivers/gpu/drm/gma500/oaktrail_crtc.c

195

for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) {

drivers/gpu/drm/gma500/oaktrail_crtc.c

196

for (clock.p1 = limit->p1.min; clock.p1 <= limit->p1.max;

drivers/gpu/drm/gma500/oaktrail_crtc.c

197

clock.p1++) {

drivers/gpu/drm/gma500/oaktrail_crtc.c

200

mrst_lvds_clock(refclk, &clock);

drivers/gpu/drm/gma500/oaktrail_crtc.c

202

this_err = abs(clock.dot - target);

drivers/gpu/drm/gma500/oaktrail_crtc.c

204

*best_clock = clock;

drivers/gpu/drm/gma500/oaktrail_crtc.c

372

struct gma_clock_t clock;

drivers/gpu/drm/gma500/oaktrail_crtc.c

508

ok = limit->find_pll(limit, crtc, adjusted_mode->clock,

drivers/gpu/drm/gma500/oaktrail_crtc.c

509

refclk, &clock);

drivers/gpu/drm/gma500/oaktrail_crtc.c

513

clock.p1 = (1L << (clock.p1 - 1));

drivers/gpu/drm/gma500/oaktrail_crtc.c

514

clock.m -= 2;

drivers/gpu/drm/gma500/oaktrail_crtc.c

515

clock.n = (1L << (clock.n - 1));

drivers/gpu/drm/gma500/oaktrail_crtc.c

521

mrst_print_pll(&clock);

drivers/gpu/drm/gma500/oaktrail_crtc.c

524

fp = clock.n << 16 | clock.m;

drivers/gpu/drm/gma500/oaktrail_crtc.c

526

fp = oaktrail_m_converts[(clock.m - MRST_M_MIN)] << 8;

drivers/gpu/drm/gma500/oaktrail_crtc.c

540

adjusted_mode->clock / mode->clock;

drivers/gpu/drm/gma500/oaktrail_crtc.c

551

dpll |= clock.p1 << 16; // dpll |= (1 << (clock.p1 - 1)) << 16;

drivers/gpu/drm/gma500/oaktrail_crtc.c

553

dpll |= (1 << (clock.p1 - 2)) << 17;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

173

new_crtc_htotal = (mode->crtc_htotal - 1) * 200 * 1000 / mode->clock;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

285

struct oaktrail_hdmi_clock clock;

drivers/gpu/drm/gma500/oaktrail_hdmi.c

309

oaktrail_hdmi_find_dpll(crtc, adjusted_mode->clock, refclk, &clock);

drivers/gpu/drm/gma500/oaktrail_hdmi.c

316

REG_WRITE(DPLL_DIV_CTRL, ((clock.nf << 6) | clock.nr));

drivers/gpu/drm/gma500/oaktrail_hdmi.c

317

REG_WRITE(DPLL_ADJUST, ((clock.nf >> 14) - 1));

drivers/gpu/drm/gma500/oaktrail_hdmi.c

318

REG_WRITE(DPLL_CTRL, (dpll | (clock.np << DPLL_PDIV_SHIFT) | DPLL_ENSTAT | DPLL_DITHEN));

drivers/gpu/drm/gma500/oaktrail_hdmi.c

520

if (mode->clock > 165000)

drivers/gpu/drm/gma500/oaktrail_hdmi.c

522

if (mode->clock < 20000)

drivers/gpu/drm/gma500/oaktrail_lvds.c

248

mode->clock = ti->pixel_clock * 10;

drivers/gpu/drm/gma500/oaktrail_lvds.c

258

pr_info("clock is %d\n", mode->clock);

drivers/gpu/drm/gma500/psb_intel_display.c

107

struct gma_clock_t clock;

drivers/gpu/drm/gma500/psb_intel_display.c

149

ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,

drivers/gpu/drm/gma500/psb_intel_display.c

150

&clock);

drivers/gpu/drm/gma500/psb_intel_display.c

153

adjusted_mode->clock, clock.dot);

drivers/gpu/drm/gma500/psb_intel_display.c

157

fp = clock.n << 16 | clock.m1 << 8 | clock.m2;

drivers/gpu/drm/gma500/psb_intel_display.c

167

adjusted_mode->clock / mode->clock;

drivers/gpu/drm/gma500/psb_intel_display.c

174

dpll |= (1 << (clock.p1 - 1)) << 16;

drivers/gpu/drm/gma500/psb_intel_display.c

175

switch (clock.p2) {

drivers/gpu/drm/gma500/psb_intel_display.c

243

if (clock.p2 == 7)

drivers/gpu/drm/gma500/psb_intel_display.c

313

struct gma_clock_t clock;

drivers/gpu/drm/gma500/psb_intel_display.c

337

clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;

drivers/gpu/drm/gma500/psb_intel_display.c

338

clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;

drivers/gpu/drm/gma500/psb_intel_display.c

339

clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;

drivers/gpu/drm/gma500/psb_intel_display.c

342

clock.p1 =

drivers/gpu/drm/gma500/psb_intel_display.c

346

clock.p2 = 14;

drivers/gpu/drm/gma500/psb_intel_display.c

351

psb_intel_clock(66000, &clock);

drivers/gpu/drm/gma500/psb_intel_display.c

353

psb_intel_clock(48000, &clock);

drivers/gpu/drm/gma500/psb_intel_display.c

356

clock.p1 = 2;

drivers/gpu/drm/gma500/psb_intel_display.c

358

clock.p1 =

drivers/gpu/drm/gma500/psb_intel_display.c

364

clock.p2 = 4;

drivers/gpu/drm/gma500/psb_intel_display.c

366

clock.p2 = 2;

drivers/gpu/drm/gma500/psb_intel_display.c

368

psb_intel_clock(48000, &clock);

drivers/gpu/drm/gma500/psb_intel_display.c

376

return clock.dot;

drivers/gpu/drm/gma500/psb_intel_display.c

411

mode->clock = psb_intel_crtc_clock_get(dev, crtc);

drivers/gpu/drm/gma500/psb_intel_display.c

437

.clock = psb_intel_clock,

drivers/gpu/drm/gma500/psb_intel_display.c

69

static void psb_intel_clock(int refclk, struct gma_clock_t *clock)

drivers/gpu/drm/gma500/psb_intel_display.c

71

clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);

drivers/gpu/drm/gma500/psb_intel_display.c

72

clock->p = clock->p1 * clock->p2;

drivers/gpu/drm/gma500/psb_intel_display.c

73

clock->vco = refclk * clock->m / (clock->n + 2);

drivers/gpu/drm/gma500/psb_intel_display.c

74

clock->dot = clock->vco / clock->p;

drivers/gpu/drm/gma500/psb_intel_lvds.c

411

adjusted_mode->clock = panel_fixed_mode->clock;

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1170

if (psb_intel_sdvo->pixel_clock_min > mode->clock)

drivers/gpu/drm/gma500/psb_intel_sdvo.c

1173

if (psb_intel_sdvo->pixel_clock_max < mode->clock)

drivers/gpu/drm/gma500/psb_intel_sdvo.c

572

if (mode->clock >= 100000)

drivers/gpu/drm/gma500/psb_intel_sdvo.c

574

else if (mode->clock >= 50000)

drivers/gpu/drm/gma500/psb_intel_sdvo.c

715

uint16_t clock,

drivers/gpu/drm/gma500/psb_intel_sdvo.c

722

args.clock = clock;

drivers/gpu/drm/gma500/psb_intel_sdvo.c

773

dtd->part1.clock = mode->clock / 10;

drivers/gpu/drm/gma500/psb_intel_sdvo.c

826

mode->clock = dtd->part1.clock * 10;

drivers/gpu/drm/gma500/psb_intel_sdvo.c

936

mode->clock / 10,

drivers/gpu/drm/gma500/psb_intel_sdvo.c

984

adjusted_mode->clock *= psb_intel_sdvo->pixel_multiplier;

drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h

100

u16 clock;

drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h

67

u16 clock; /**< pixel clock, in 10kHz units */

drivers/gpu/drm/gud/gud_internal.h

137

dst->clock = cpu_to_le32(src->clock);

drivers/gpu/drm/gud/gud_internal.h

155

dst->clock = le32_to_cpu(src->clock);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

29

value = (mode->clock * bpp * 5) / (61 * lane_num * rate_ks);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

62

htotal_size = htotal_int * fclk / (HIBMC_DP_SYMBOL_PER_FCLK * (mode->clock / 1000));

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

66

(mode->clock * 10 * HIBMC_DP_SYMBOL_PER_FCLK);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c

70

drm_dbg_dp(dp->dev, "flink_clock %u pixel_clock %d", fclk, mode->clock / 1000);

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c

94

cur_val = (u64)mode->clock * HIBMC_DP_BPP;

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

475

pixel_clk_kHz = mode->clock;

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

549

dphy_req_kHz = mode->clock * bpp / dsi->lanes;

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

568

dsi->lanes, mode->clock, phy->lane_byte_clk_kHz);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

619

req_kHz = mode->clock * bpp / dsi->lanes;

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

625

drm_mode_vrefresh(mode), mode->clock);

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

631

if (mode->clock/dsi->lanes == lane_byte_clk_kHz/3) {

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

149

adjusted_mode->clock =

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

150

clk_round_rate(ctx->ade_pix_clk, mode->clock * 1000) / 1000;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

159

u32 clk_Hz = mode->clock * 1000;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

169

adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000;

drivers/gpu/drm/i915/display/dvo_ch7017.c

254

if (mode->clock > 160000)

drivers/gpu/drm/i915/display/dvo_ch7017.c

274

if (mode->clock < 100000) {

drivers/gpu/drm/i915/display/dvo_ch7xxx.c

283

if (mode->clock > 165000)

drivers/gpu/drm/i915/display/dvo_ch7xxx.c

295

if (mode->clock <= 65000) {

drivers/gpu/drm/i915/display/dvo_ivch.c

321

if (mode->clock > 112000)

drivers/gpu/drm/i915/display/dvo_ns2501.c

540

if ((mode->hdisplay == 640 && mode->vdisplay == 480 && mode->clock == 25175) ||

drivers/gpu/drm/i915/display/dvo_ns2501.c

541

(mode->hdisplay == 800 && mode->vdisplay == 600 && mode->clock == 40000) ||

drivers/gpu/drm/i915/display/dvo_ns2501.c

542

(mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 65000)) {

drivers/gpu/drm/i915/display/intel_audio.c

207

if (adjusted_mode->crtc_clock == hdmi_audio_clock[i].clock)

drivers/gpu/drm/i915/display/intel_audio.c

223

hdmi_audio_clock[i].clock,

drivers/gpu/drm/i915/display/intel_audio.c

248

crtc_state->port_clock == hdmi_ncts_table[i].clock) {

drivers/gpu/drm/i915/display/intel_audio.c

506

pixel_clk = crtc_state->hw.adjusted_mode.clock;

drivers/gpu/drm/i915/display/intel_audio.c

82

int clock;

drivers/gpu/drm/i915/display/intel_audio.c

88

int clock;

drivers/gpu/drm/i915/display/intel_backlight.c

1072

u32 mul, clock;

drivers/gpu/drm/i915/display/intel_backlight.c

1080

clock = MHz(135); /* LPT:H */

drivers/gpu/drm/i915/display/intel_backlight.c

1082

clock = MHz(24); /* LPT:LP */

drivers/gpu/drm/i915/display/intel_backlight.c

1084

return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);

drivers/gpu/drm/i915/display/intel_backlight.c

1110

int clock;

drivers/gpu/drm/i915/display/intel_backlight.c

1113

clock = KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq);

drivers/gpu/drm/i915/display/intel_backlight.c

1115

clock = KHz(display->cdclk.hw.cdclk);

drivers/gpu/drm/i915/display/intel_backlight.c

1117

return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);

drivers/gpu/drm/i915/display/intel_backlight.c

1128

int clock;

drivers/gpu/drm/i915/display/intel_backlight.c

1131

clock = KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq);

drivers/gpu/drm/i915/display/intel_backlight.c

1133

clock = KHz(display->cdclk.hw.cdclk);

drivers/gpu/drm/i915/display/intel_backlight.c

1135

return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);

drivers/gpu/drm/i915/display/intel_backlight.c

1146

int mul, clock;

drivers/gpu/drm/i915/display/intel_backlight.c

1150

clock = KHz(19200);

drivers/gpu/drm/i915/display/intel_backlight.c

1152

clock = MHz(25);

drivers/gpu/drm/i915/display/intel_backlight.c

1155

clock = KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq);

drivers/gpu/drm/i915/display/intel_backlight.c

1159

return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);

drivers/gpu/drm/i915/display/intel_bios.c

555

panel_fixed_mode->clock = dvo_timing->clock * 10;

drivers/gpu/drm/i915/display/intel_bios.c

990

panel_fixed_mode->clock = dtd->pixel_clock;

drivers/gpu/drm/i915/display/intel_cdclk.c

4216

int clock, int min_cdclk)

drivers/gpu/drm/i915/display/intel_cdclk.c

4222

return min(0x10000, DIV_ROUND_UP_ULL((u64)clock << 16, ppc * cdclk));

drivers/gpu/drm/i915/display/intel_cdclk.c

4233

int clock = crtc_state->hw.pipe_mode.crtc_clock;

drivers/gpu/drm/i915/display/intel_cdclk.c

4247

min_cdclk = _intel_pixel_rate_to_cdclk(crtc_state, clock);

drivers/gpu/drm/i915/display/intel_cdclk.c

4249

return _intel_cdclk_prefill_adj(crtc_state, clock, min_cdclk);

drivers/gpu/drm/i915/display/intel_crt.c

365

if (mode->clock < 25000)

drivers/gpu/drm/i915/display/intel_crt.c

380

if (mode->clock > max_clock)

drivers/gpu/drm/i915/display/intel_crt.c

383

if (mode->clock > max_dotclk)

drivers/gpu/drm/i915/display/intel_crt.c

388

ilk_get_lanes_required(mode->clock, 270000, 24) > 2)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1020

.clock = 243000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1045

.clock = 324000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1070

.clock = 432000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1095

.clock = 675000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1133

.clock = 1350000, /* 13.5 Gbps */

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1188

.clock = 25200,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1214

.clock = 27000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1240

.clock = 74250,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1266

.clock = 148500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1292

.clock = 594000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1319

.clock = 27027,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1329

.clock = 28320,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1339

.clock = 30240,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1349

.clock = 31500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1359

.clock = 36000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1369

.clock = 40000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1379

.clock = 49500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1389

.clock = 50000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1399

.clock = 57284,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1409

.clock = 58000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1419

.clock = 65000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1429

.clock = 71000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1439

.clock = 74176,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1449

.clock = 75000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1459

.clock = 78750,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1469

.clock = 85500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1479

.clock = 88750,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1489

.clock = 106500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1499

.clock = 108000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1509

.clock = 115500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1519

.clock = 119000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1529

.clock = 135000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1539

.clock = 138500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1549

.clock = 147160,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1559

.clock = 148352,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1569

.clock = 154000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1579

.clock = 162000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1589

.clock = 167000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1599

.clock = 197802,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1609

.clock = 198000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1619

.clock = 209800,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1629

.clock = 241500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1639

.clock = 262750,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1649

.clock = 268500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1659

.clock = 296703,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1669

.clock = 297000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1679

.clock = 319750,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1689

.clock = 497750,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1699

.clock = 592000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1709

.clock = 593407,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1768

.clock = 25175,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1793

.clock = 27000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1818

.clock = 74250,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1843

.clock = 148500,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1868

.clock = 594000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1893

.clock = 3000000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1918

.clock = 6000000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1943

.clock = 8000000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1968

.clock = 10000000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

1993

.clock = 12000000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2119

if (port_clock == tables[i]->clock) {

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2278

pll_state->clock = intel_c10pll_calc_port_clock(encoder, pll_state);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2325

hw_state->clock, str_yes_no(fracen));

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2430

pll_state->clock = crtc_state->port_clock;

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2489

static u8 intel_c20_get_dp_rate(u32 clock)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2491

switch (clock) {

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2519

MISSING_CASE(clock);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2524

static u8 intel_c20_get_hdmi_rate(u32 clock)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2526

if (clock >= 25175 && clock <= 600000)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2529

switch (clock) {

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2539

MISSING_CASE(clock);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2544

static bool is_dp2(u32 clock)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2547

if (clock == 1000000 || clock == 1350000 || clock == 2000000)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2553

static int intel_get_c20_custom_width(u32 clock, bool dp)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2555

if (dp && is_dp2(clock))

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2557

else if (intel_hdmi_is_frl(clock))

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2640

if (crtc_state->port_clock == tables[i]->clock)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2826

pll_state->clock = intel_c20pll_calc_port_clock(encoder, pll_state);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2838

drm_printf(p, "c20pll_hw_state: clock: %d\n", hw_state->clock);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3226

int port_clock = pll_state->use_c10 ? pll_state->c10.clock : pll_state->c20.clock;

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3347

u32 clock, val;

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3351

clock = XELPDP_DDI_CLOCK_SELECT_GET(display, val);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3357

switch (clock) {

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3371

MISSING_CASE(clock);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3377

int clock)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3379

switch (clock) {

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3401

MISSING_CASE(clock);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3645

u32 val, clock;

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3652

clock = XELPDP_DDI_CLOCK_SELECT_GET(display, val);

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3654

if (clock == XELPDP_DDI_CLOCK_SELECT_MAXPCLK ||

drivers/gpu/drm/i915/display/intel_cx0_phy.c

3655

clock == XELPDP_DDI_CLOCK_SELECT_DIV18CLK)

drivers/gpu/drm/i915/display/intel_cx0_phy.c

550

.clock = 162000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

576

.clock = 216000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

602

.clock = 243000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

628

.clock = 270000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

654

.clock = 324000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

680

.clock = 432000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

706

.clock = 540000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

732

.clock = 675000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

758

.clock = 810000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

806

.clock = 162000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

831

.clock = 270000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

856

.clock = 540000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

881

.clock = 810000,

drivers/gpu/drm/i915/display/intel_cx0_phy.c

907

.clock = 1000000, /* 10 Gbps */

drivers/gpu/drm/i915/display/intel_cx0_phy.c

931

.clock = 1350000, /* 13.5 Gbps */

drivers/gpu/drm/i915/display/intel_cx0_phy.c

956

.clock = 2000000, /* 20 Gbps */

drivers/gpu/drm/i915/display/intel_cx0_phy.c

995

.clock = 216000,

drivers/gpu/drm/i915/display/intel_cx0_phy.h

62

int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock);

drivers/gpu/drm/i915/display/intel_cx0_phy.h

64

bool intel_cx0_is_hdmi_frl(u32 clock);

drivers/gpu/drm/i915/display/intel_ddi.c

271

int clock = crtc_state->port_clock;

drivers/gpu/drm/i915/display/intel_ddi.c

283

switch (clock) {

drivers/gpu/drm/i915/display/intel_ddi.c

293

MISSING_CASE(clock);

drivers/gpu/drm/i915/display/intel_ddi.c

4543

mode1->clock == mode2->clock; /* we want an exact match */

drivers/gpu/drm/i915/display/intel_display.c

2226

mode->clock = timings->crtc_clock;

drivers/gpu/drm/i915/display/intel_display.c

8061

if (mode->clock > max_dotclock(display))

drivers/gpu/drm/i915/display/intel_display.c

8105

if (DIV_ROUND_UP(mode->htotal * 1000, mode->clock) > 64)

drivers/gpu/drm/i915/display/intel_display.c

8327

struct dpll clock = {

drivers/gpu/drm/i915/display/intel_display.c

8338

i9xx_calc_dpll_params(48000, &clock) != 25154);

drivers/gpu/drm/i915/display/intel_display.c

8342

pipe_name(pipe), clock.vco, clock.dot);

drivers/gpu/drm/i915/display/intel_display.c

8344

fp = i9xx_dpll_compute_fp(&clock);

drivers/gpu/drm/i915/display/intel_display.c

8347

((clock.p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT) |

drivers/gpu/drm/i915/display/intel_dp.c

1261

int clock, int bpc,

drivers/gpu/drm/i915/display/intel_dp.c

1270

tmds_clock = intel_hdmi_tmds_clock(clock, bpc, sink_format);

drivers/gpu/drm/i915/display/intel_dp.c

1341

int hdisplay, int clock,

drivers/gpu/drm/i915/display/intel_dp.c

1354

return clock > num_joined_pipes * display->cdclk.max_dotclk_freq ||

drivers/gpu/drm/i915/display/intel_dp.c

1360

int hdisplay, int clock)

drivers/gpu/drm/i915/display/intel_dp.c

1368

intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 4))

drivers/gpu/drm/i915/display/intel_dp.c

1372

intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 2))

drivers/gpu/drm/i915/display/intel_dp.c

1407

int target_clock = mode->clock;

drivers/gpu/drm/i915/display/intel_dp.c

1424

if (mode->clock < 10000)

drivers/gpu/drm/i915/display/intel_dp.c

1433

target_clock = fixed_mode->clock;

drivers/gpu/drm/i915/display/intel_dp.c

1663

int clock = crtc_state->hw.adjusted_mode.crtc_clock;

drivers/gpu/drm/i915/display/intel_dp.c

1683

intel_dp_tmds_clock_valid(intel_dp, clock, bpc, crtc_state->sink_format,

drivers/gpu/drm/i915/display/intel_dp.c

1751

return intel_panel_highest_mode(connector, adjusted_mode)->clock;

drivers/gpu/drm/i915/display/intel_dp.c

1763

int bpp, i, lane_count, clock = intel_dp_mode_clock(pipe_config, conn_state);

drivers/gpu/drm/i915/display/intel_dp.c

1785

clock, adjusted_mode->hdisplay,

drivers/gpu/drm/i915/display/intel_dp.c

3159

pixel_clock = downclock_mode->clock;

drivers/gpu/drm/i915/display/intel_dp.c

4430

mode->clock *= n;

drivers/gpu/drm/i915/display/intel_dp.h

158

int hdisplay, int clock);

drivers/gpu/drm/i915/display/intel_dp_aux.c

253

int try, clock = 0;

drivers/gpu/drm/i915/display/intel_dp_aux.c

343

while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1199

fixed_mode->clock, fixed_mode->hdisplay,

drivers/gpu/drm/i915/display/intel_dp_mst.c

1429

int target_clock = mode->clock;

drivers/gpu/drm/i915/display/intel_dp_mst.c

1446

if (mode->clock < 10000) {

drivers/gpu/drm/i915/display/intel_dp_mst.c

1457

mode->clock, mode->hdisplay,

drivers/gpu/drm/i915/display/intel_dp_mst.c

1481

if (mode_rate > max_rate || mode->clock > max_dotclk ||

drivers/gpu/drm/i915/display/intel_dp_mst.c

1482

drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) {

drivers/gpu/drm/i915/display/intel_dp_mst.c

233

adjusted_mode->clock,

drivers/gpu/drm/i915/display/intel_dpll.c

1004

const struct dpll *clock,

drivers/gpu/drm/i915/display/intel_dpll.c

1032

dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

1035

dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW;

drivers/gpu/drm/i915/display/intel_dpll.c

1036

WARN_ON(reduced_clock->p1 != clock->p1);

drivers/gpu/drm/i915/display/intel_dpll.c

1038

dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

1039

WARN_ON(reduced_clock->p1 != clock->p1);

drivers/gpu/drm/i915/display/intel_dpll.c

1042

switch (clock->p2) {

drivers/gpu/drm/i915/display/intel_dpll.c

1056

WARN_ON(reduced_clock->p2 != clock->p2);

drivers/gpu/drm/i915/display/intel_dpll.c

1073

const struct dpll *clock,

drivers/gpu/drm/i915/display/intel_dpll.c

1080

hw_state->fp0 = pnv_dpll_compute_fp(clock);

drivers/gpu/drm/i915/display/intel_dpll.c

1083

hw_state->fp0 = i9xx_dpll_compute_fp(clock);

drivers/gpu/drm/i915/display/intel_dpll.c

1087

hw_state->dpll = i9xx_dpll(crtc_state, clock, reduced_clock);

drivers/gpu/drm/i915/display/intel_dpll.c

1094

const struct dpll *clock,

drivers/gpu/drm/i915/display/intel_dpll.c

1103

dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

1105

if (clock->p1 == 2)

drivers/gpu/drm/i915/display/intel_dpll.c

1108

dpll |= (clock->p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

1109

if (clock->p2 == 4)

drivers/gpu/drm/i915/display/intel_dpll.c

1112

WARN_ON(reduced_clock->p1 != clock->p1);

drivers/gpu/drm/i915/display/intel_dpll.c

1113

WARN_ON(reduced_clock->p2 != clock->p2);

drivers/gpu/drm/i915/display/intel_dpll.c

1141

const struct dpll *clock,

drivers/gpu/drm/i915/display/intel_dpll.c

1146

hw_state->fp0 = i9xx_dpll_compute_fp(clock);

drivers/gpu/drm/i915/display/intel_dpll.c

1149

hw_state->dpll = i8xx_dpll(crtc_state, clock, reduced_clock);

drivers/gpu/drm/i915/display/intel_dpll.c

1257

static u32 ilk_dpll_compute_fp(const struct dpll *clock, int factor)

drivers/gpu/drm/i915/display/intel_dpll.c

1261

fp = i9xx_dpll_compute_fp(clock);

drivers/gpu/drm/i915/display/intel_dpll.c

1262

if (ilk_needs_fb_cb_tune(clock, factor))

drivers/gpu/drm/i915/display/intel_dpll.c

1269

const struct dpll *clock,

drivers/gpu/drm/i915/display/intel_dpll.c

1311

dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

1315

switch (clock->p2) {

drivers/gpu/drm/i915/display/intel_dpll.c

1329

WARN_ON(reduced_clock->p2 != clock->p2);

drivers/gpu/drm/i915/display/intel_dpll.c

1341

const struct dpll *clock,

drivers/gpu/drm/i915/display/intel_dpll.c

1347

hw_state->fp0 = ilk_dpll_compute_fp(clock, factor);

drivers/gpu/drm/i915/display/intel_dpll.c

1350

hw_state->dpll = ilk_dpll(crtc_state, clock, reduced_clock);

drivers/gpu/drm/i915/display/intel_dpll.c

1914

const struct dpll *clock = &crtc_state->dpll;

drivers/gpu/drm/i915/display/intel_dpll.c

1940

tmp = DPIO_M1_DIV(clock->m1) |

drivers/gpu/drm/i915/display/intel_dpll.c

1941

DPIO_M2_DIV(clock->m2) |

drivers/gpu/drm/i915/display/intel_dpll.c

1942

DPIO_P1_DIV(clock->p1) |

drivers/gpu/drm/i915/display/intel_dpll.c

1943

DPIO_P2_DIV(clock->p2) |

drivers/gpu/drm/i915/display/intel_dpll.c

1944

DPIO_N_DIV(clock->n) |

drivers/gpu/drm/i915/display/intel_dpll.c

2035

const struct dpll *clock = &crtc_state->dpll;

drivers/gpu/drm/i915/display/intel_dpll.c

2041

m2_frac = clock->m2 & 0x3fffff;

drivers/gpu/drm/i915/display/intel_dpll.c

2048

DPIO_CHV_P1_DIV(clock->p1) |

drivers/gpu/drm/i915/display/intel_dpll.c

2049

DPIO_CHV_P2_DIV(clock->p2) |

drivers/gpu/drm/i915/display/intel_dpll.c

2054

DPIO_CHV_M2_DIV(clock->m2 >> 22));

drivers/gpu/drm/i915/display/intel_dpll.c

2083

if (clock->vco == 5400000) {

drivers/gpu/drm/i915/display/intel_dpll.c

2088

} else if (clock->vco <= 6200000) {

drivers/gpu/drm/i915/display/intel_dpll.c

2093

} else if (clock->vco <= 6480000) {

drivers/gpu/drm/i915/display/intel_dpll.c

319

static int pnv_calc_dpll_params(int refclk, struct dpll *clock)

drivers/gpu/drm/i915/display/intel_dpll.c

321

clock->m = clock->m2 + 2;

drivers/gpu/drm/i915/display/intel_dpll.c

322

clock->p = clock->p1 * clock->p2;

drivers/gpu/drm/i915/display/intel_dpll.c

324

clock->vco = clock->n == 0 ? 0 :

drivers/gpu/drm/i915/display/intel_dpll.c

325

DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);

drivers/gpu/drm/i915/display/intel_dpll.c

326

clock->dot = clock->p == 0 ? 0 :

drivers/gpu/drm/i915/display/intel_dpll.c

327

DIV_ROUND_CLOSEST(clock->vco, clock->p);

drivers/gpu/drm/i915/display/intel_dpll.c

329

return clock->dot;

drivers/gpu/drm/i915/display/intel_dpll.c

337

int i9xx_calc_dpll_params(int refclk, struct dpll *clock)

drivers/gpu/drm/i915/display/intel_dpll.c

339

clock->m = i9xx_dpll_compute_m(clock);

drivers/gpu/drm/i915/display/intel_dpll.c

340

clock->p = clock->p1 * clock->p2;

drivers/gpu/drm/i915/display/intel_dpll.c

342

clock->vco = clock->n + 2 == 0 ? 0 :

drivers/gpu/drm/i915/display/intel_dpll.c

343

DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2);

drivers/gpu/drm/i915/display/intel_dpll.c

344

clock->dot = clock->p == 0 ? 0 :

drivers/gpu/drm/i915/display/intel_dpll.c

345

DIV_ROUND_CLOSEST(clock->vco, clock->p);

drivers/gpu/drm/i915/display/intel_dpll.c

347

return clock->dot;

drivers/gpu/drm/i915/display/intel_dpll.c

350

static int vlv_calc_dpll_params(int refclk, struct dpll *clock)

drivers/gpu/drm/i915/display/intel_dpll.c

352

clock->m = clock->m1 * clock->m2;

drivers/gpu/drm/i915/display/intel_dpll.c

353

clock->p = clock->p1 * clock->p2 * 5;

drivers/gpu/drm/i915/display/intel_dpll.c

355

clock->vco = clock->n == 0 ? 0 :

drivers/gpu/drm/i915/display/intel_dpll.c

356

DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);

drivers/gpu/drm/i915/display/intel_dpll.c

357

clock->dot = clock->p == 0 ? 0 :

drivers/gpu/drm/i915/display/intel_dpll.c

358

DIV_ROUND_CLOSEST(clock->vco, clock->p);

drivers/gpu/drm/i915/display/intel_dpll.c

360

return clock->dot;

drivers/gpu/drm/i915/display/intel_dpll.c

363

int chv_calc_dpll_params(int refclk, struct dpll *clock)

drivers/gpu/drm/i915/display/intel_dpll.c

365

clock->m = clock->m1 * clock->m2;

drivers/gpu/drm/i915/display/intel_dpll.c

366

clock->p = clock->p1 * clock->p2 * 5;

drivers/gpu/drm/i915/display/intel_dpll.c

368

clock->vco = clock->n == 0 ? 0 :

drivers/gpu/drm/i915/display/intel_dpll.c

369

DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m), clock->n << 22);

drivers/gpu/drm/i915/display/intel_dpll.c

370

clock->dot = clock->p == 0 ? 0 :

drivers/gpu/drm/i915/display/intel_dpll.c

371

DIV_ROUND_CLOSEST(clock->vco, clock->p);

drivers/gpu/drm/i915/display/intel_dpll.c

373

return clock->dot;

drivers/gpu/drm/i915/display/intel_dpll.c

431

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll.c

440

clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

442

clock.n = ffs((fp & FP_N_PINEVIEW_DIV_MASK) >> FP_N_DIV_SHIFT) - 1;

drivers/gpu/drm/i915/display/intel_dpll.c

443

clock.m2 = (fp & FP_M2_PINEVIEW_DIV_MASK) >> FP_M2_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

445

clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

446

clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;

drivers/gpu/drm/i915/display/intel_dpll.c

451

clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW) >>

drivers/gpu/drm/i915/display/intel_dpll.c

454

clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>

drivers/gpu/drm/i915/display/intel_dpll.c

459

clock.p2 = dpll & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ?

drivers/gpu/drm/i915/display/intel_dpll.c

463

clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ?

drivers/gpu/drm/i915/display/intel_dpll.c

474

port_clock = pnv_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

476

port_clock = i9xx_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

485

clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >>

drivers/gpu/drm/i915/display/intel_dpll.c

489

clock.p2 = 7;

drivers/gpu/drm/i915/display/intel_dpll.c

491

clock.p2 = 14;

drivers/gpu/drm/i915/display/intel_dpll.c

494

clock.p1 = 2;

drivers/gpu/drm/i915/display/intel_dpll.c

496

clock.p1 = ((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830) >>

drivers/gpu/drm/i915/display/intel_dpll.c

500

clock.p2 = 4;

drivers/gpu/drm/i915/display/intel_dpll.c

502

clock.p2 = 2;

drivers/gpu/drm/i915/display/intel_dpll.c

505

port_clock = i9xx_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

524

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll.c

535

clock.m1 = REG_FIELD_GET(DPIO_M1_DIV_MASK, tmp);

drivers/gpu/drm/i915/display/intel_dpll.c

536

clock.m2 = REG_FIELD_GET(DPIO_M2_DIV_MASK, tmp);

drivers/gpu/drm/i915/display/intel_dpll.c

537

clock.n = REG_FIELD_GET(DPIO_N_DIV_MASK, tmp);

drivers/gpu/drm/i915/display/intel_dpll.c

538

clock.p1 = REG_FIELD_GET(DPIO_P1_DIV_MASK, tmp);

drivers/gpu/drm/i915/display/intel_dpll.c

539

clock.p2 = REG_FIELD_GET(DPIO_P2_DIV_MASK, tmp);

drivers/gpu/drm/i915/display/intel_dpll.c

541

crtc_state->port_clock = vlv_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

551

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll.c

567

clock.m1 = REG_FIELD_GET(DPIO_CHV_M1_DIV_MASK, pll_dw1) == DPIO_CHV_M1_DIV_BY_2 ? 2 : 0;

drivers/gpu/drm/i915/display/intel_dpll.c

568

clock.m2 = REG_FIELD_GET(DPIO_CHV_M2_DIV_MASK, pll_dw0) << 22;

drivers/gpu/drm/i915/display/intel_dpll.c

570

clock.m2 |= REG_FIELD_GET(DPIO_CHV_M2_FRAC_DIV_MASK, pll_dw2);

drivers/gpu/drm/i915/display/intel_dpll.c

571

clock.n = REG_FIELD_GET(DPIO_CHV_N_DIV_MASK, pll_dw1);

drivers/gpu/drm/i915/display/intel_dpll.c

572

clock.p1 = REG_FIELD_GET(DPIO_CHV_P1_DIV_MASK, cmn_dw13);

drivers/gpu/drm/i915/display/intel_dpll.c

573

clock.p2 = REG_FIELD_GET(DPIO_CHV_P2_DIV_MASK, cmn_dw13);

drivers/gpu/drm/i915/display/intel_dpll.c

575

crtc_state->port_clock = chv_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

584

const struct dpll *clock)

drivers/gpu/drm/i915/display/intel_dpll.c

586

if (clock->n < limit->n.min || limit->n.max < clock->n)

drivers/gpu/drm/i915/display/intel_dpll.c

588

if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)

drivers/gpu/drm/i915/display/intel_dpll.c

590

if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)

drivers/gpu/drm/i915/display/intel_dpll.c

592

if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)

drivers/gpu/drm/i915/display/intel_dpll.c

598

if (clock->m1 <= clock->m2)

drivers/gpu/drm/i915/display/intel_dpll.c

603

if (clock->p < limit->p.min || limit->p.max < clock->p)

drivers/gpu/drm/i915/display/intel_dpll.c

605

if (clock->m < limit->m.min || limit->m.max < clock->m)

drivers/gpu/drm/i915/display/intel_dpll.c

609

if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)

drivers/gpu/drm/i915/display/intel_dpll.c

614

if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)

drivers/gpu/drm/i915/display/intel_dpll.c

662

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll.c

667

clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);

drivers/gpu/drm/i915/display/intel_dpll.c

669

for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;

drivers/gpu/drm/i915/display/intel_dpll.c

670

clock.m1++) {

drivers/gpu/drm/i915/display/intel_dpll.c

671

for (clock.m2 = limit->m2.min;

drivers/gpu/drm/i915/display/intel_dpll.c

672

clock.m2 <= limit->m2.max; clock.m2++) {

drivers/gpu/drm/i915/display/intel_dpll.c

673

if (clock.m2 >= clock.m1)

drivers/gpu/drm/i915/display/intel_dpll.c

675

for (clock.n = limit->n.min;

drivers/gpu/drm/i915/display/intel_dpll.c

676

clock.n <= limit->n.max; clock.n++) {

drivers/gpu/drm/i915/display/intel_dpll.c

677

for (clock.p1 = limit->p1.min;

drivers/gpu/drm/i915/display/intel_dpll.c

678

clock.p1 <= limit->p1.max; clock.p1++) {

drivers/gpu/drm/i915/display/intel_dpll.c

681

i9xx_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

684

&clock))

drivers/gpu/drm/i915/display/intel_dpll.c

687

clock.p != match_clock->p)

drivers/gpu/drm/i915/display/intel_dpll.c

690

this_err = abs(clock.dot - target);

drivers/gpu/drm/i915/display/intel_dpll.c

692

*best_clock = clock;

drivers/gpu/drm/i915/display/intel_dpll.c

720

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll.c

725

clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);

drivers/gpu/drm/i915/display/intel_dpll.c

727

for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;

drivers/gpu/drm/i915/display/intel_dpll.c

728

clock.m1++) {

drivers/gpu/drm/i915/display/intel_dpll.c

729

for (clock.m2 = limit->m2.min;

drivers/gpu/drm/i915/display/intel_dpll.c

730

clock.m2 <= limit->m2.max; clock.m2++) {

drivers/gpu/drm/i915/display/intel_dpll.c

731

for (clock.n = limit->n.min;

drivers/gpu/drm/i915/display/intel_dpll.c

732

clock.n <= limit->n.max; clock.n++) {

drivers/gpu/drm/i915/display/intel_dpll.c

733

for (clock.p1 = limit->p1.min;

drivers/gpu/drm/i915/display/intel_dpll.c

734

clock.p1 <= limit->p1.max; clock.p1++) {

drivers/gpu/drm/i915/display/intel_dpll.c

737

pnv_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

740

&clock))

drivers/gpu/drm/i915/display/intel_dpll.c

743

clock.p != match_clock->p)

drivers/gpu/drm/i915/display/intel_dpll.c

746

this_err = abs(clock.dot - target);

drivers/gpu/drm/i915/display/intel_dpll.c

748

*best_clock = clock;

drivers/gpu/drm/i915/display/intel_dpll.c

776

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll.c

784

clock.p2 = i9xx_select_p2_div(limit, crtc_state, target);

drivers/gpu/drm/i915/display/intel_dpll.c

788

for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {

drivers/gpu/drm/i915/display/intel_dpll.c

790

for (clock.m1 = limit->m1.max;

drivers/gpu/drm/i915/display/intel_dpll.c

791

clock.m1 >= limit->m1.min; clock.m1--) {

drivers/gpu/drm/i915/display/intel_dpll.c

792

for (clock.m2 = limit->m2.max;

drivers/gpu/drm/i915/display/intel_dpll.c

793

clock.m2 >= limit->m2.min; clock.m2--) {

drivers/gpu/drm/i915/display/intel_dpll.c

794

for (clock.p1 = limit->p1.max;

drivers/gpu/drm/i915/display/intel_dpll.c

795

clock.p1 >= limit->p1.min; clock.p1--) {

drivers/gpu/drm/i915/display/intel_dpll.c

798

i9xx_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

801

&clock))

drivers/gpu/drm/i915/display/intel_dpll.c

804

this_err = abs(clock.dot - target);

drivers/gpu/drm/i915/display/intel_dpll.c

806

*best_clock = clock;

drivers/gpu/drm/i915/display/intel_dpll.c

808

max_n = clock.n;

drivers/gpu/drm/i915/display/intel_dpll.c

870

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll.c

879

for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {

drivers/gpu/drm/i915/display/intel_dpll.c

880

for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {

drivers/gpu/drm/i915/display/intel_dpll.c

881

for (clock.p2 = limit->p2.p2_fast; clock.p2 >= limit->p2.p2_slow;

drivers/gpu/drm/i915/display/intel_dpll.c

882

clock.p2 -= clock.p2 > 10 ? 2 : 1) {

drivers/gpu/drm/i915/display/intel_dpll.c

883

clock.p = clock.p1 * clock.p2 * 5;

drivers/gpu/drm/i915/display/intel_dpll.c

885

for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {

drivers/gpu/drm/i915/display/intel_dpll.c

888

clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n,

drivers/gpu/drm/i915/display/intel_dpll.c

889

refclk * clock.m1);

drivers/gpu/drm/i915/display/intel_dpll.c

891

vlv_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

895

&clock))

drivers/gpu/drm/i915/display/intel_dpll.c

899

&clock,

drivers/gpu/drm/i915/display/intel_dpll.c

904

*best_clock = clock;

drivers/gpu/drm/i915/display/intel_dpll.c

928

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll.c

940

clock.n = 1;

drivers/gpu/drm/i915/display/intel_dpll.c

941

clock.m1 = 2;

drivers/gpu/drm/i915/display/intel_dpll.c

943

for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {

drivers/gpu/drm/i915/display/intel_dpll.c

944

for (clock.p2 = limit->p2.p2_fast;

drivers/gpu/drm/i915/display/intel_dpll.c

945

clock.p2 >= limit->p2.p2_slow;

drivers/gpu/drm/i915/display/intel_dpll.c

946

clock.p2 -= clock.p2 > 10 ? 2 : 1) {

drivers/gpu/drm/i915/display/intel_dpll.c

949

clock.p = clock.p1 * clock.p2 * 5;

drivers/gpu/drm/i915/display/intel_dpll.c

951

m2 = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(target, clock.p * clock.n) << 22,

drivers/gpu/drm/i915/display/intel_dpll.c

952

refclk * clock.m1);

drivers/gpu/drm/i915/display/intel_dpll.c

954

if (m2 > INT_MAX/clock.m1)

drivers/gpu/drm/i915/display/intel_dpll.c

957

clock.m2 = m2;

drivers/gpu/drm/i915/display/intel_dpll.c

959

chv_calc_dpll_params(refclk, &clock);

drivers/gpu/drm/i915/display/intel_dpll.c

961

if (!intel_pll_is_valid(display, limit, &clock))

drivers/gpu/drm/i915/display/intel_dpll.c

964

if (!vlv_PLL_is_optimal(display, target, &clock, best_clock,

drivers/gpu/drm/i915/display/intel_dpll.c

968

*best_clock = clock;

drivers/gpu/drm/i915/display/intel_dpll.h

24

int i9xx_calc_dpll_params(int refclk, struct dpll *clock);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1095

int clock = crtc_state->port_clock;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1097

switch (clock / 2) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1104

clock);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1115

int clock = crtc_state->port_clock;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1117

switch (clock / 2) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1128

MISSING_CASE(clock / 2);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1683

skl_ddi_calculate_wrpll(int clock,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1708

u64 afe_clock = (u64)clock * 1000 * 5; /* AFE Clock is 5x Pixel clock, in Hz */

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2322

int clock = crtc_state->port_clock;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2348

if (clock > 270000)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2350

else if (clock > 135000)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2352

else if (clock > 67000)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2354

else if (clock > 33000)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2390

struct dpll clock;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2392

clock.m1 = 2;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2393

clock.m2 = REG_FIELD_GET(PORT_PLL_M2_INT_MASK, hw_state->pll0) << 22;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2395

clock.m2 |= REG_FIELD_GET(PORT_PLL_M2_FRAC_MASK,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2397

clock.n = REG_FIELD_GET(PORT_PLL_N_MASK, hw_state->pll1);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2398

clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK, hw_state->ebb0);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2399

clock.p2 = REG_FIELD_GET(PORT_PLL_P2_MASK, hw_state->ebb0);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2401

return chv_calc_dpll_params(display->dpll.ref_clks.nssc, &clock);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2637

int clock;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2730

int clock = crtc_state->port_clock;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2734

if (clock == params[i].clock) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2740

MISSING_CASE(clock);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3026

int clock = crtc_state->port_clock;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3038

ret = icl_mg_pll_find_divisors(clock, is_dp, use_ssc, &dco_khz,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

825

static unsigned hsw_wrpll_get_budget_for_freq(int clock)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

827

switch (clock) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

950

hsw_ddi_calculate_wrpll(int clock /* in Hz */,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

958

freq2k = clock / 100;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

960

budget = hsw_wrpll_get_budget_for_freq(clock);

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

232

u32 clock; /* in KHz */

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

244

u32 clock; /* in KHz */

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

251

u32 clock; /* in kHz */

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

277

u32 clock; /* in kHz */

drivers/gpu/drm/i915/display/intel_dsi.c

77

if (fixed_mode->clock > max_dotclk)

drivers/gpu/drm/i915/display/intel_dsi_vbt.c

795

intel_dsi->pclk = mode->clock;

drivers/gpu/drm/i915/display/intel_dvo.c

229

int target_clock = mode->clock;

drivers/gpu/drm/i915/display/intel_dvo.c

245

target_clock = fixed_mode->clock;

drivers/gpu/drm/i915/display/intel_hdmi.c

1889

int clock, bool respect_downstream_limits,

drivers/gpu/drm/i915/display/intel_hdmi.c

1895

if (clock < 25000)

drivers/gpu/drm/i915/display/intel_hdmi.c

1897

if (clock > hdmi_port_clock_limit(hdmi, respect_downstream_limits,

drivers/gpu/drm/i915/display/intel_hdmi.c

1902

if (display->platform.geminilake && clock > 446666 && clock < 480000)

drivers/gpu/drm/i915/display/intel_hdmi.c

1907

clock > 223333 && clock < 240000)

drivers/gpu/drm/i915/display/intel_hdmi.c

1911

if (display->platform.cherryview && clock > 216000 && clock < 240000)

drivers/gpu/drm/i915/display/intel_hdmi.c

1915

if (intel_encoder_is_combo(encoder) && clock > 500000 && clock < 533200)

drivers/gpu/drm/i915/display/intel_hdmi.c

1919

if (intel_encoder_is_tc(encoder) && clock > 500000 && clock < 532800)

drivers/gpu/drm/i915/display/intel_hdmi.c

1925

int intel_hdmi_tmds_clock(int clock, int bpc,

drivers/gpu/drm/i915/display/intel_hdmi.c

1930

clock /= 2;

drivers/gpu/drm/i915/display/intel_hdmi.c

1937

return DIV_ROUND_CLOSEST(clock * bpc, 8);

drivers/gpu/drm/i915/display/intel_hdmi.c

1989

intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,

drivers/gpu/drm/i915/display/intel_hdmi.c

2005

int tmds_clock = intel_hdmi_tmds_clock(clock, bpc, sink_format);

drivers/gpu/drm/i915/display/intel_hdmi.c

2033

int clock = mode->clock;

drivers/gpu/drm/i915/display/intel_hdmi.c

2044

clock *= 2;

drivers/gpu/drm/i915/display/intel_hdmi.c

2046

if (clock > max_dotclk)

drivers/gpu/drm/i915/display/intel_hdmi.c

2052

clock *= 2;

drivers/gpu/drm/i915/display/intel_hdmi.c

2061

if (clock > 600000)

drivers/gpu/drm/i915/display/intel_hdmi.c

2075

status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);

drivers/gpu/drm/i915/display/intel_hdmi.c

2083

status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,

drivers/gpu/drm/i915/display/intel_hdmi.c

2133

int clock, bool respect_downstream_limits)

drivers/gpu/drm/i915/display/intel_hdmi.c

2153

int tmds_clock = intel_hdmi_tmds_clock(clock, bpc,

drivers/gpu/drm/i915/display/intel_hdmi.c

2173

int bpc, clock = adjusted_mode->crtc_clock;

drivers/gpu/drm/i915/display/intel_hdmi.c

2176

clock *= 2;

drivers/gpu/drm/i915/display/intel_hdmi.c

2178

bpc = intel_hdmi_compute_bpc(encoder, crtc_state, clock,

drivers/gpu/drm/i915/display/intel_hdmi.c

2184

intel_hdmi_tmds_clock(clock, bpc, crtc_state->sink_format);

drivers/gpu/drm/i915/display/intel_hdmi.c

71

bool intel_hdmi_is_frl(u32 clock)

drivers/gpu/drm/i915/display/intel_hdmi.c

73

switch (clock) {

drivers/gpu/drm/i915/display/intel_hdmi.h

55

int intel_hdmi_tmds_clock(int clock, int bpc, enum intel_output_format sink_format);

drivers/gpu/drm/i915/display/intel_hdmi.h

63

bool intel_hdmi_is_frl(u32 clock);

drivers/gpu/drm/i915/display/intel_lt_phy.c

117

.clock = 270000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

1308

u32 clock;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1320

clock = intel_lt_phy_get_dp_clock(rate);

drivers/gpu/drm/i915/display/intel_lt_phy.c

1321

if (crtc_state->port_clock == 1620000 && crtc_state->port_clock == clock)

drivers/gpu/drm/i915/display/intel_lt_phy.c

171

.clock = 540000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

1740

return xe3plpd_lt_hdmi_252.clock;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1777

clk = xe3plpd_lt_hdmi_252.clock;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1795

if (crtc_state->port_clock == tables[i]->clock) {

drivers/gpu/drm/i915/display/intel_lt_phy.c

225

.clock = 810000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

2257

pll_state->clock =

drivers/gpu/drm/i915/display/intel_lt_phy.c

279

.clock = 1000000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

333

.clock = 1350000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

387

.clock = 2000000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

452

.clock = 216000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

506

.clock = 243000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

560

.clock = 324000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

614

.clock = 432000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

63

.clock = 162000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

668

.clock = 675000,

drivers/gpu/drm/i915/display/intel_lt_phy.c

735

.clock = 25200,

drivers/gpu/drm/i915/display/intel_lt_phy.c

789

.clock = 27200,

drivers/gpu/drm/i915/display/intel_lt_phy.c

843

.clock = 74250,

drivers/gpu/drm/i915/display/intel_lt_phy.c

897

.clock = 148500,

drivers/gpu/drm/i915/display/intel_lt_phy.c

951

.clock = 594000,

drivers/gpu/drm/i915/display/intel_lvds.c

411

if (fixed_mode->clock > max_pixclk)

drivers/gpu/drm/i915/display/intel_lvds.c

808

if (fixed_mode->clock > 112999)

drivers/gpu/drm/i915/display/intel_panel.c

110

mode->clock != preferred_mode->clock;

drivers/gpu/drm/i915/display/intel_panel.c

154

if (fixed_mode->clock > best_mode->clock)

drivers/gpu/drm/i915/display/intel_panel.c

242

DIV_ROUND_CLOSEST(adjusted_mode->clock * 1000,

drivers/gpu/drm/i915/display/intel_pch_refclk.c

149

static void lpt_compute_iclkip(struct iclkip_params *p, int clock)

drivers/gpu/drm/i915/display/intel_pch_refclk.c

161

clock << p->auxdiv);

drivers/gpu/drm/i915/display/intel_pch_refclk.c

187

int clock = crtc_state->hw.adjusted_mode.crtc_clock;

drivers/gpu/drm/i915/display/intel_pch_refclk.c

193

lpt_compute_iclkip(&p, clock);

drivers/gpu/drm/i915/display/intel_pch_refclk.c

194

drm_WARN_ON(display->drm, lpt_iclkip_freq(&p) != clock);

drivers/gpu/drm/i915/display/intel_pch_refclk.c

204

clock, p.auxdiv, p.divsel, p.phasedir, p.phaseinc);

drivers/gpu/drm/i915/display/intel_sdvo.c

1286

struct dpll *clock = &pipe_config->dpll;

drivers/gpu/drm/i915/display/intel_sdvo.c

1293

clock->p1 = 2;

drivers/gpu/drm/i915/display/intel_sdvo.c

1294

clock->p2 = 10;

drivers/gpu/drm/i915/display/intel_sdvo.c

1295

clock->n = 3;

drivers/gpu/drm/i915/display/intel_sdvo.c

1296

clock->m1 = 16;

drivers/gpu/drm/i915/display/intel_sdvo.c

1297

clock->m2 = 8;

drivers/gpu/drm/i915/display/intel_sdvo.c

1299

clock->p1 = 1;

drivers/gpu/drm/i915/display/intel_sdvo.c

1300

clock->p2 = 10;

drivers/gpu/drm/i915/display/intel_sdvo.c

1301

clock->n = 6;

drivers/gpu/drm/i915/display/intel_sdvo.c

1302

clock->m1 = 12;

drivers/gpu/drm/i915/display/intel_sdvo.c

1303

clock->m2 = 8;

drivers/gpu/drm/i915/display/intel_sdvo.c

1947

int clock = mode->clock;

drivers/gpu/drm/i915/display/intel_sdvo.c

1953

if (clock > max_dotclk)

drivers/gpu/drm/i915/display/intel_sdvo.c

1959

clock *= 2;

drivers/gpu/drm/i915/display/intel_sdvo.c

1962

if (intel_sdvo->pixel_clock_min > clock)

drivers/gpu/drm/i915/display/intel_sdvo.c

1965

if (intel_sdvo->pixel_clock_max < clock)

drivers/gpu/drm/i915/display/intel_sdvo.c

793

args.clock = mode->clock / 10;

drivers/gpu/drm/i915/display/intel_sdvo.c

851

mode_clock = mode->clock;

drivers/gpu/drm/i915/display/intel_sdvo.c

853

dtd->part1.clock = mode_clock;

drivers/gpu/drm/i915/display/intel_sdvo.c

909

mode.clock = dtd->part1.clock * 10;

drivers/gpu/drm/i915/display/intel_sdvo_regs.h

111

u16 clock;

drivers/gpu/drm/i915/display/intel_sdvo_regs.h

78

u16 clock; /* pixel clock, in 10kHz units */

drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c

262

pll_state->clock = pixel_clock;

drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c

335

pll_state->clock = pixel_clock;

drivers/gpu/drm/i915/display/intel_snps_phy.c

1009

.clock = 85500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1039

.clock = 88750,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1069

.clock = 106500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1099

.clock = 108000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1129

.clock = 115500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1159

.clock = 119000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1189

.clock = 135000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1219

.clock = 138500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

123

.clock = 270000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1249

.clock = 147160,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1279

.clock = 148352,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1309

.clock = 154000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1339

.clock = 162000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1369

.clock = 209800,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1399

.clock = 262750,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1429

.clock = 267300,

drivers/gpu/drm/i915/display/intel_snps_phy.c

145

.clock = 540000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1459

.clock = 268500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1489

.clock = 296703,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1519

.clock = 241500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1549

.clock = 319890,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1579

.clock = 497750,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1609

.clock = 592000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1639

.clock = 593407,

drivers/gpu/drm/i915/display/intel_snps_phy.c

166

.clock = 810000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1669

.clock = 297000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1699

.clock = 594000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

1802

if (crtc_state->port_clock == tables[i]->clock) {

drivers/gpu/drm/i915/display/intel_snps_phy.c

186

.clock = 1000000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

221

.clock = 1350000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

269

.clock = 216000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

300

.clock = 243000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

331

.clock = 324000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

363

.clock = 432000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

410

.clock = 25175,

drivers/gpu/drm/i915/display/intel_snps_phy.c

439

.clock = 27000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

468

.clock = 74250,

drivers/gpu/drm/i915/display/intel_snps_phy.c

498

.clock = 148500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

529

.clock = 25200,

drivers/gpu/drm/i915/display/intel_snps_phy.c

559

.clock = 27027,

drivers/gpu/drm/i915/display/intel_snps_phy.c

589

.clock = 28320,

drivers/gpu/drm/i915/display/intel_snps_phy.c

619

.clock = 30240,

drivers/gpu/drm/i915/display/intel_snps_phy.c

649

.clock = 31500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

679

.clock = 36000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

709

.clock = 40000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

739

.clock = 49500,

drivers/gpu/drm/i915/display/intel_snps_phy.c

769

.clock = 50000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

799

.clock = 57284,

drivers/gpu/drm/i915/display/intel_snps_phy.c

829

.clock = 58000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

859

.clock = 65000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

889

.clock = 71000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

919

.clock = 74176,

drivers/gpu/drm/i915/display/intel_snps_phy.c

949

.clock = 75000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

96

.clock = 162000,

drivers/gpu/drm/i915/display/intel_snps_phy.c

979

.clock = 78750,

drivers/gpu/drm/i915/display/intel_tv.c

1065

mode->clock = mode->clock * new_htotal / mode->htotal;

drivers/gpu/drm/i915/display/intel_tv.c

1082

mode->clock = mode->clock * new_vtotal / mode->vtotal;

drivers/gpu/drm/i915/display/intel_tv.c

1126

tv_mode.clock = pipe_config->port_clock;

drivers/gpu/drm/i915/display/intel_tv.c

1163

adjusted_mode->crtc_clock = mode.clock;

drivers/gpu/drm/i915/display/intel_tv.c

1219

pipe_config->port_clock = tv_mode->clock;

drivers/gpu/drm/i915/display/intel_tv.c

1260

adjusted_mode->clock /= 2;

drivers/gpu/drm/i915/display/intel_tv.c

1821

intel_tv_mode_to_mode(mode, tv_mode, tv_mode->clock);

drivers/gpu/drm/i915/display/intel_tv.c

319

u32 clock;

drivers/gpu/drm/i915/display/intel_tv.c

390

.clock = 108000,

drivers/gpu/drm/i915/display/intel_tv.c

433

.clock = 108000,

drivers/gpu/drm/i915/display/intel_tv.c

475

.clock = 108000,

drivers/gpu/drm/i915/display/intel_tv.c

518

.clock = 108000,

drivers/gpu/drm/i915/display/intel_tv.c

562

.clock = 108000,

drivers/gpu/drm/i915/display/intel_tv.c

607

.clock = 108000,

drivers/gpu/drm/i915/display/intel_tv.c

649

.clock = 108000,

drivers/gpu/drm/i915/display/intel_tv.c

673

.clock = 108000,

drivers/gpu/drm/i915/display/intel_tv.c

697

.clock = 148500,

drivers/gpu/drm/i915/display/intel_tv.c

721

.clock = 148500,

drivers/gpu/drm/i915/display/intel_tv.c

745

.clock = 148500,

drivers/gpu/drm/i915/display/intel_tv.c

771

.clock = 148500,

drivers/gpu/drm/i915/display/intel_tv.c

798

.clock = 148500,

drivers/gpu/drm/i915/display/intel_tv.c

824

.clock = 148500,

drivers/gpu/drm/i915/display/intel_tv.c

850

.clock = 148500,

drivers/gpu/drm/i915/display/intel_tv.c

971

if (mode->clock > max_dotclk)

drivers/gpu/drm/i915/display/intel_tv.c

993

int clock)

drivers/gpu/drm/i915/display/intel_tv.c

995

mode->clock = clock / (tv_mode->oversample >> !tv_mode->progressive);

drivers/gpu/drm/i915/display/intel_vblank.c

144

u32 clock = mode->crtc_clock;

drivers/gpu/drm/i915/display/intel_vblank.c

173

clock), 1000 * htotal);

drivers/gpu/drm/i915/display/intel_vbt_defs.h

56

u16 clock; /**< In 10khz */

drivers/gpu/drm/i915/display/intel_vdsc.c

1120

int pixel_clock = intel_dp_mode_to_fec_clock(crtc_state->hw.adjusted_mode.clock);

drivers/gpu/drm/i915/display/vlv_dsi.c

2003

intel_dsi->pclk, current_mode->clock);

drivers/gpu/drm/i915/display/vlv_dsi.c

2005

current_mode->clock)) {

drivers/gpu/drm/i915/display/vlv_dsi.c

2007

intel_dsi->pclk = current_mode->clock;

drivers/gpu/drm/i915/gvt/handlers.c

561

struct dpll clock = {};

drivers/gpu/drm/i915/gvt/handlers.c

590

clock.m1 = 2;

drivers/gpu/drm/i915/gvt/handlers.c

591

clock.m2 = REG_FIELD_GET(PORT_PLL_M2_INT_MASK,

drivers/gpu/drm/i915/gvt/handlers.c

594

clock.m2 |= REG_FIELD_GET(PORT_PLL_M2_FRAC_MASK,

drivers/gpu/drm/i915/gvt/handlers.c

596

clock.n = REG_FIELD_GET(PORT_PLL_N_MASK,

drivers/gpu/drm/i915/gvt/handlers.c

598

clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK,

drivers/gpu/drm/i915/gvt/handlers.c

600

clock.p2 = REG_FIELD_GET(PORT_PLL_P2_MASK,

drivers/gpu/drm/i915/gvt/handlers.c

602

clock.m = clock.m1 * clock.m2;

drivers/gpu/drm/i915/gvt/handlers.c

603

clock.p = clock.p1 * clock.p2 * 5;

drivers/gpu/drm/i915/gvt/handlers.c

605

if (clock.n == 0 || clock.p == 0) {

drivers/gpu/drm/i915/gvt/handlers.c

610

clock.vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock.m), clock.n << 22);

drivers/gpu/drm/i915/gvt/handlers.c

611

clock.dot = DIV_ROUND_CLOSEST(clock.vco, clock.p);

drivers/gpu/drm/i915/gvt/handlers.c

613

dp_br = clock.dot;

drivers/gpu/drm/imx/dc/dc-crtc.c

140

status = dc_crtc_check_clock(dc_crtc, mode->clock);

drivers/gpu/drm/imx/dc/dc-crtc.c

159

status = dc_crtc_check_clock(dc_crtc, adj->clock);

drivers/gpu/drm/imx/dc/dc-fg.c

184

ret = clk_set_rate(fg->clk_disp, m->clock * HZ_PER_KHZ);

drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c

143

if (mode->clock < 13500)

drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c

146

if (mode->clock > 216000)

drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c

157

if (mode->clock < 13500)

drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c

160

if (mode->clock > 216000)

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

210

unsigned long di_clk = mode->clock * 1000;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

219

if (mode->clock > 170000) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

223

if (mode->clock > 85000 && !dual) {

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

234

serial_clk = 3500UL * mode->clock;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

238

serial_clk = 7000UL * mode->clock;

drivers/gpu/drm/imx/ipuv3/imx-tve.c

226

rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;

drivers/gpu/drm/imx/ipuv3/imx-tve.c

227

if (rate == mode->clock)

drivers/gpu/drm/imx/ipuv3/imx-tve.c

231

rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;

drivers/gpu/drm/imx/ipuv3/imx-tve.c

232

if (rate == mode->clock)

drivers/gpu/drm/imx/ipuv3/imx-tve.c

256

rate = 2000UL * mode->clock;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

209

mode->clock * 1000);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

399

rate = clk_round_rate(priv->pix_clk, mode->clock * 1000);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

830

mode->crtc_clock = mode->clock * 3;

drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c

51

if (mode->clock < 13500)

drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c

54

if (mode->clock > 216000)

drivers/gpu/drm/loongson/lsdc_crtc.c

589

seq_printf(m, "Pixel clock required: %d kHz\n", mode->clock);

drivers/gpu/drm/loongson/lsdc_crtc.c

591

seq_printf(m, "Diff: %d kHz\n", out_khz - mode->clock);

drivers/gpu/drm/loongson/lsdc_crtc.c

757

if (mode->clock > descp->max_pixel_clk) {

drivers/gpu/drm/loongson/lsdc_crtc.c

759

mode->hdisplay, mode->vdisplay, mode->clock);

drivers/gpu/drm/loongson/lsdc_crtc.c

782

unsigned int clock = state->mode.clock;

drivers/gpu/drm/loongson/lsdc_crtc.c

785

ret = pfuncs->compute(pixpll, clock, &priv_state->pparms);

drivers/gpu/drm/loongson/lsdc_crtc.c

788

clock);

drivers/gpu/drm/loongson/lsdc_output_7a2000.c

491

ls7a2000_hdmi_phy_pll_config(ldev, mode->clock, index);

drivers/gpu/drm/loongson/lsdc_pixpll.c

151

unsigned int clock,

drivers/gpu/drm/loongson/lsdc_pixpll.c

161

if (clock == pt->clock) {

drivers/gpu/drm/loongson/lsdc_pixpll.c

170

drm_dbg_kms(this->ddev, "pixel clock %u: miss\n", clock);

drivers/gpu/drm/loongson/lsdc_pixpll.c

194

unsigned int clock,

drivers/gpu/drm/loongson/lsdc_pixpll.c

204

if (!lsdc_pixpll_find(this, clock, pout))

drivers/gpu/drm/loongson/lsdc_pixpll.c

219

if (clock >= computed)

drivers/gpu/drm/loongson/lsdc_pixpll.c

220

diff = clock - computed;

drivers/gpu/drm/loongson/lsdc_pixpll.c

222

diff = computed - clock;

drivers/gpu/drm/loongson/lsdc_pixpll.c

245

drm_dbg(this->ddev, "can't find suitable params for %u khz\n", clock);

drivers/gpu/drm/loongson/lsdc_pixpll.c

46

unsigned int clock; /* kHz */

drivers/gpu/drm/loongson/lsdc_pixpll.h

55

unsigned int clock,

drivers/gpu/drm/mcde/mcde_display.c

1230

lcd_freq = clk_round_rate(mcde->fifoa_clk, mode->clock * 1000);

drivers/gpu/drm/mcde/mcde_dsi.c

580

pclk = DIV_ROUND_UP_ULL(1000000000000, (mode->clock * 1000));

drivers/gpu/drm/mcde/mcde_dsi.c

972

mode->hdisplay, mode->vdisplay, mode->clock * 1000,

drivers/gpu/drm/mediatek/mtk_disp_merge.c

236

if (rate && mode->clock > rate) {

drivers/gpu/drm/mediatek/mtk_disp_merge.c

237

dev_dbg(dev, "invalid clock: %d (>%lu)\n", mode->clock, rate);

drivers/gpu/drm/mediatek/mtk_disp_merge.c

279

rate = mode->clock / (mode->vtotal - mode->vsync_end);

drivers/gpu/drm/mediatek/mtk_dp.c

1445

if (mode.clock > 0)

drivers/gpu/drm/mediatek/mtk_dp.c

1448

(mode.clock * 4);

drivers/gpu/drm/mediatek/mtk_dp.c

1481

mode.clock / 2000 : mode.clock / 1000;

drivers/gpu/drm/mediatek/mtk_dp.c

2470

if ((rate * 97 / 100) < (mode->clock * bpp / 8))

drivers/gpu/drm/mediatek/mtk_dp.c

2522

if (((rate * 97 / 100) < (mode->clock * 24 / 8)) &&

drivers/gpu/drm/mediatek/mtk_dp.c

2523

((rate * 97 / 100) > (mode->clock * 16 / 8)) &&

drivers/gpu/drm/mediatek/mtk_dpi.c

123

u32 clock;

drivers/gpu/drm/mediatek/mtk_dpi.c

559

if (mode_clk <= dpi_factor[i].clock)

drivers/gpu/drm/mediatek/mtk_dpi.c

616

mtk_dpi_set_pixel_clk(dpi, &vm, mode->clock);

drivers/gpu/drm/mediatek/mtk_dpi.c

882

if (mode->clock > dpi->conf->max_clock_khz)

drivers/gpu/drm/mediatek/mtk_dsi.c

880

if (mode->clock * bpp / dsi->lanes > 1500000)

drivers/gpu/drm/mediatek/mtk_hdmi.c

232

mode->clock == 74250 &&

drivers/gpu/drm/mediatek/mtk_hdmi.c

493

unsigned int clock)

drivers/gpu/drm/mediatek/mtk_hdmi.c

497

mtk_hdmi_get_ncts(sample_rate, clock, &n, &cts);

drivers/gpu/drm/mediatek/mtk_hdmi.c

500

__func__, sample_rate, clock, n, cts);

drivers/gpu/drm/mediatek/mtk_hdmi.c

576

static int mtk_hdmi_video_change_vpll(struct mtk_hdmi *hdmi, u32 clock)

drivers/gpu/drm/mediatek/mtk_hdmi.c

582

ret = clk_set_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL], clock);

drivers/gpu/drm/mediatek/mtk_hdmi.c

584

dev_err(hdmi->dev, "Failed to set PLL to %u Hz: %d\n", clock,

drivers/gpu/drm/mediatek/mtk_hdmi.c

591

if (DIV_ROUND_CLOSEST(rate, 1000) != DIV_ROUND_CLOSEST(clock, 1000))

drivers/gpu/drm/mediatek/mtk_hdmi.c

592

dev_warn(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock,

drivers/gpu/drm/mediatek/mtk_hdmi.c

595

dev_dbg(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock, rate);

drivers/gpu/drm/mediatek/mtk_hdmi.c

680

mtk_hdmi_hw_aud_set_ncts(hdmi, sample_rate, display_mode->clock);

drivers/gpu/drm/mediatek/mtk_hdmi.c

833

mode->clock * 1000);

drivers/gpu/drm/mediatek/mtk_hdmi.c

909

!!(mode->flags & DRM_MODE_FLAG_INTERLACE), mode->clock * 1000);

drivers/gpu/drm/mediatek/mtk_hdmi.c

916

mode->clock > hdmi->conf->max_mode_clock)

drivers/gpu/drm/mediatek/mtk_hdmi.c

920

if (mode->clock < 27000)

drivers/gpu/drm/mediatek/mtk_hdmi.c

922

if (mode->clock > 297000)

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

100

*cts = hdmi_expected_cts(sample_rate, clock, *n);

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

22

unsigned int clock;

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

42

static unsigned int hdmi_recommended_n(unsigned int freq, unsigned int clock)

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

48

if (clock == hdmi_rec_n_table[i].clock)

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

73

static unsigned int hdmi_mode_clock_to_hz(unsigned int clock)

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

75

switch (clock) {

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

85

return clock * 1000;

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

96

void mtk_hdmi_get_ncts(unsigned int sample_rate, unsigned int clock,

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

99

*n = hdmi_recommended_n(sample_rate, clock);

drivers/gpu/drm/mediatek/mtk_hdmi_common.h

188

void mtk_hdmi_get_ncts(unsigned int sample_rate, unsigned int clock,

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1018

.dp = { .link_rate = hdmi->mode.clock * KILO }

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1148

if (mode->clock < MTK_HDMI_V2_CLOCK_MIN)

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1150

else if (mode->clock > MTK_HDMI_V2_CLOCK_MAX)

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

322

unsigned int clock)

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

326

mtk_hdmi_get_ncts(sample_rate, clock, &n, &cts);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

690

display_mode->clock);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

746

mtk_hdmi_v2_enable_scrambling(hdmi, hdmi->mode.clock >= 340 * KILO);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

777

.dp = { .link_rate = hdmi->mode.clock * KILO }

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

783

dev_err(hdmi->dev, "Setting clock=%d failed: %d", mode->clock, ret);

drivers/gpu/drm/meson/meson_dw_hdmi.c

283

unsigned int pixel_clock = mode->clock;

drivers/gpu/drm/meson/meson_dw_hdmi.c

370

mode->clock > 340000 ? 40 : 10);

drivers/gpu/drm/meson/meson_dw_hdmi.c

378

if (mode->clock > 340000 && !mode_is_420) {

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

103

mipi_dsi->mode->clock * 1000, ret);

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

169

phy_mipi_dphy_get_default_config(mode->clock * 1000,

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

99

ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);

drivers/gpu/drm/meson/meson_encoder_hdmi.c

126

unsigned long long clock = mode->clock * 1000ULL;

drivers/gpu/drm/meson/meson_encoder_hdmi.c

138

mode->clock > display_info->max_tmds_clock &&

drivers/gpu/drm/meson/meson_encoder_hdmi.c

149

return meson_vclk_dmt_supported_freq(priv, clock);

drivers/gpu/drm/meson/meson_encoder_hdmi.c

154

vclk_freq = clock;

drivers/gpu/drm/meson/meson_encoder_hdmi.c

78

vclk_freq = mode->clock * 1000ULL;

drivers/gpu/drm/mgag200/mgag200_ddc.c

149

ddc->clock = BIT(info->i2c.clock_bit);

drivers/gpu/drm/mgag200/mgag200_ddc.c

42

int clock;

drivers/gpu/drm/mgag200/mgag200_ddc.c

84

mga_i2c_set(ddc->mdev, ddc->clock, state);

drivers/gpu/drm/mgag200/mgag200_ddc.c

98

return (mga_i2c_read_gpio(ddc->mdev) & ddc->clock) ? 1 : 0;

drivers/gpu/drm/mgag200/mgag200_g200.c

103

delta = clock;

drivers/gpu/drm/mgag200/mgag200_g200.c

130

clock, f_vco, m, n, p, s);

drivers/gpu/drm/mgag200/mgag200_g200.c

77

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200.c

88

if (clock > p_clk_max) {

drivers/gpu/drm/mgag200/mgag200_g200.c

89

drm_err(dev, "Pixel Clock %ld too high\n", clock);

drivers/gpu/drm/mgag200/mgag200_g200.c

93

if (clock < p_clk_min >> 3)

drivers/gpu/drm/mgag200/mgag200_g200.c

94

clock = p_clk_min >> 3;

drivers/gpu/drm/mgag200/mgag200_g200.c

96

f_vco = clock;

drivers/gpu/drm/mgag200/mgag200_g200eh.c

52

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200eh.c

63

if (clock * testp > vcomax)

drivers/gpu/drm/mgag200/mgag200_g200eh.c

65

if (clock * testp < vcomin)

drivers/gpu/drm/mgag200/mgag200_g200eh.c

71

if (computed > clock)

drivers/gpu/drm/mgag200/mgag200_g200eh.c

72

tmpdelta = computed - clock;

drivers/gpu/drm/mgag200/mgag200_g200eh.c

74

tmpdelta = clock - computed;

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

27

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

39

if (clock * testm > vcomax)

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

41

if (clock * testm < vcomin)

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

45

if (computed > clock)

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

46

tmpdelta = computed - clock;

drivers/gpu/drm/mgag200/mgag200_g200eh3.c

48

tmpdelta = clock - computed;

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

29

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200eh5.c

49

fo_hz = (u64)clock * HZ_PER_KHZ;

drivers/gpu/drm/mgag200/mgag200_g200er.c

100

tmpdelta = clock - computed;

drivers/gpu/drm/mgag200/mgag200_g200er.c

70

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200er.c

97

if (computed > clock)

drivers/gpu/drm/mgag200/mgag200_g200er.c

98

tmpdelta = computed - clock;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

58

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

69

if (clock * testp > vcomax)

drivers/gpu/drm/mgag200/mgag200_g200ev.c

71

if (clock * testp < vcomin)

drivers/gpu/drm/mgag200/mgag200_g200ev.c

78

if (computed > clock)

drivers/gpu/drm/mgag200/mgag200_g200ev.c

79

tmpdelta = computed - clock;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

81

tmpdelta = clock - computed;

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

34

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

48

if ((clock * testp * testp2) > vcomax)

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

50

if ((clock * testp * testp2) < vcomin)

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

55

if (computed > clock)

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

56

tmpdelta = computed - clock;

drivers/gpu/drm/mgag200/mgag200_g200ew3.c

58

tmpdelta = clock - computed;

drivers/gpu/drm/mgag200/mgag200_g200se.c

124

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200se.c

133

permitteddelta = clock * 5 / 1000;

drivers/gpu/drm/mgag200/mgag200_g200se.c

136

if (clock * testp > vcomax)

drivers/gpu/drm/mgag200/mgag200_g200se.c

138

if (clock * testp < vcomin)

drivers/gpu/drm/mgag200/mgag200_g200se.c

144

if (computed > clock)

drivers/gpu/drm/mgag200/mgag200_g200se.c

145

tmpdelta = computed - clock;

drivers/gpu/drm/mgag200/mgag200_g200se.c

147

tmpdelta = clock - computed;

drivers/gpu/drm/mgag200/mgag200_g200se.c

208

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200se.c

220

if (clock < 25000)

drivers/gpu/drm/mgag200/mgag200_g200se.c

221

clock = 25000;

drivers/gpu/drm/mgag200/mgag200_g200se.c

222

clock = clock * 2;

drivers/gpu/drm/mgag200/mgag200_g200se.c

225

permitteddelta = clock * 5 / 1000;

drivers/gpu/drm/mgag200/mgag200_g200se.c

230

if ((clock * testp) > vcomax)

drivers/gpu/drm/mgag200/mgag200_g200se.c

232

if ((clock * testp) < vcomin)

drivers/gpu/drm/mgag200/mgag200_g200se.c

238

if (computed > clock)

drivers/gpu/drm/mgag200/mgag200_g200se.c

239

tmpdelta = computed - clock;

drivers/gpu/drm/mgag200/mgag200_g200se.c

241

tmpdelta = clock - computed;

drivers/gpu/drm/mgag200/mgag200_g200se.c

86

mb = (mode->clock * bpp) / 1000;

drivers/gpu/drm/mgag200/mgag200_g200wb.c

50

long clock = new_crtc_state->mode.clock;

drivers/gpu/drm/mgag200/mgag200_g200wb.c

61

if (clock * testp > vcomax)

drivers/gpu/drm/mgag200/mgag200_g200wb.c

63

if (clock * testp < vcomin)

drivers/gpu/drm/mgag200/mgag200_g200wb.c

69

if (computed > clock)

drivers/gpu/drm/mgag200/mgag200_g200wb.c

70

tmpdelta = computed - clock;

drivers/gpu/drm/mgag200/mgag200_g200wb.c

72

tmpdelta = clock - computed;

drivers/gpu/drm/mgag200/mgag200_mode.c

770

if (!mode->htotal || !mode->vtotal || !mode->clock)

drivers/gpu/drm/mgag200/mgag200_mode.c

776

pixels_per_second = active_area * mode->clock * 1000;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

1602

adjusted_mode_clk = dpu_core_perf_adjusted_mode_clk(mode->clock,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1886

pclk_rate = mode->clock; /* pixel clock in kHz */

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

42

mdp4_dtv_encoder->pixclock = mode->clock * 1000;

drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c

215

mdp4_lcdc_encoder->pixclock = mode->clock * 1000;

drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c

344

requested = 1000 * mode->clock;

drivers/gpu/drm/msm/dp/dp_ctrl.c

1248

in.pclk_khz = drm_mode->clock;

drivers/gpu/drm/msm/dp/dp_ctrl.c

2186

pixel_rate = ctrl->panel->msm_dp_mode.drm_mode.clock;

drivers/gpu/drm/msm/dp/dp_ctrl.c

2292

pixel_rate = ctrl->panel->msm_dp_mode.drm_mode.clock;

drivers/gpu/drm/msm/dp/dp_ctrl.c

2488

pixel_rate = pixel_rate_orig = ctrl->panel->msm_dp_mode.drm_mode.clock;

drivers/gpu/drm/msm/dp/dp_debug.c

66

drm_mode->clock);

drivers/gpu/drm/msm/dp/dp_display.c

1603

if (!msm_dp_display->msm_dp_mode.drm_mode.clock) {

drivers/gpu/drm/msm/dp/dp_display.c

940

int mode_pclk_khz = mode->clock;

drivers/gpu/drm/msm/dp/dp_drm.c

255

int mode_pclk_khz = mode->clock;

drivers/gpu/drm/msm/dp/dp_panel.c

709

drm_mode->clock);

drivers/gpu/drm/msm/dp/dp_panel.c

713

msm_dp_panel->msm_dp_mode.drm_mode.clock);

drivers/gpu/drm/msm/dsi/dsi_host.c

612

return mult_frac(mode->clock * 1000u, new_htotal, mode->htotal);

drivers/gpu/drm/msm/dsi/dsi_host.c

620

pclk_rate = mode->clock * 1000u;

drivers/gpu/drm/msm/msm_gpu.c

782

u64 elapsed, clock = 0, cycles;

drivers/gpu/drm/msm/msm_gpu.c

794

clock = cycles * 1000;

drivers/gpu/drm/msm/msm_gpu.c

795

do_div(clock, elapsed);

drivers/gpu/drm/msm/msm_gpu.c

801

trace_msm_gpu_submit_retired(submit, elapsed, clock,

drivers/gpu/drm/msm/msm_gpu_trace.h

57

TP_PROTO(struct msm_gem_submit *submit, u64 elapsed, u64 clock,

drivers/gpu/drm/msm/msm_gpu_trace.h

59

TP_ARGS(submit, elapsed, clock, start, end),

drivers/gpu/drm/msm/msm_gpu_trace.h

66

__field(u64, clock)

drivers/gpu/drm/msm/msm_gpu_trace.h

76

__entry->clock = clock;

drivers/gpu/drm/msm/msm_gpu_trace.h

82

__entry->elapsed, __entry->clock,

drivers/gpu/drm/mxsfb/lcdif_kms.c

411

m->clock, (int)(clk_get_rate(lcdif->clk) / 1000));

drivers/gpu/drm/mxsfb/lcdif_kms.c

541

clk_set_rate(lcdif->clk, m->clock * 1000);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

667

nv_crtc_calc_state_ext(crtc, mode, adjusted_mode->clock);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

893

nouveau_calc_arb(dev, crtc->mode.clock, drm_fb->format->cpp[0] * 8,

drivers/gpu/drm/nouveau/dispnv04/dfp.c

198

adjusted_mode->clock = nv_connector->native_mode->clock;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

343

output_mode->clock > 165000)

drivers/gpu/drm/nouveau/dispnv04/dfp.c

351

nouveau_bios_parse_lvds_table(dev, output_mode->clock,

drivers/gpu/drm/nouveau/dispnv04/dfp.c

358

if (output_mode->clock > 165000)

drivers/gpu/drm/nouveau/dispnv04/dfp.c

458

run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

460

call_lvds_script(dev, dcbe, head, LVDS_RESET, nv_encoder->mode.clock);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

542

LVDS_PANEL_ON, nv_encoder->mode.clock);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

602

connector->native_mode->clock);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

605

int clock = nouveau_hw_pllvals_to_clk

drivers/gpu/drm/nouveau/dispnv04/dfp.c

608

run_tmds_table(dev, nv_encoder->dcb, head, clock);

drivers/gpu/drm/nouveau/dispnv04/hw.c

237

uint32_t clock;

drivers/gpu/drm/nouveau/dispnv04/hw.c

240

0x4c, &clock);

drivers/gpu/drm/nouveau/dispnv04/hw.c

241

return clock / 1000;

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_drv.c

234

for (mode = ch7006_modes; mode->mode.clock; mode++) {

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_mode.c

111

.clock = f, \

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_mode.c

179

for (mode = ch7006_modes; mode->mode.clock; mode++) {

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_mode.c

188

mode->mode.clock != drm_mode->clock)

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_mode.c

268

if (abs(freq - mode->mode.clock) <

drivers/gpu/drm/nouveau/dispnv04/i2c/ch7006_mode.c

269

abs(best_freq - mode->mode.clock)) {

drivers/gpu/drm/nouveau/dispnv04/i2c/sil164_drv.c

223

bool duallink = (on && encoder->crtc->mode.clock > 165000);

drivers/gpu/drm/nouveau/dispnv04/i2c/sil164_drv.c

263

if (mode->clock < 32000)

drivers/gpu/drm/nouveau/dispnv04/i2c/sil164_drv.c

266

if (mode->clock > 330000 ||

drivers/gpu/drm/nouveau/dispnv04/i2c/sil164_drv.c

267

(mode->clock > 165000 && !priv->duallink_slave))

drivers/gpu/drm/nouveau/dispnv04/i2c/sil164_drv.c

279

bool duallink = adjusted_mode->clock > 165000;

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

215

mode->clock = tv_norm->tv_enc_mode.vrefresh *

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

220

mode->clock *= 2;

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

319

if (mode->clock > 400000)

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

336

if (mode->clock > 70000)

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

361

adjusted_mode->clock = tv_norm->ctv_enc_mode.mode.clock;

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

363

adjusted_mode->clock = 90000;

drivers/gpu/drm/nouveau/dispnv50/atom.h

37

u32 clock;

drivers/gpu/drm/nouveau/dispnv50/disp.c

1628

u64 pixelClockHz = asyh->mode.clock * 1000;

drivers/gpu/drm/nouveau/dispnv50/disp.c

1791

if (mode->clock >= 165000 &&

drivers/gpu/drm/nouveau/dispnv50/disp.c

1810

if (mode->clock >= bios->fp.duallink_transition_clk) {

drivers/gpu/drm/nouveau/dispnv50/disp.c

1829

nouveau_dp_train(nv_encoder, false, mode->clock, asyh->or.bpc);

drivers/gpu/drm/nouveau/dispnv50/disp.c

1965

crtc_state->adjusted_mode.clock *= 2;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2014

nouveau_dp_train(nv_encoder, false, asyh->state.adjusted_mode.clock, 6);

drivers/gpu/drm/nouveau/dispnv50/disp.c

394

mode_rate = DIV_ROUND_UP(mode->clock * asyh->or.bpc * 3, 8);

drivers/gpu/drm/nouveau/dispnv50/disp.c

798

const bool high_tmds_clock_ratio = mode->clock > 340000;

drivers/gpu/drm/nouveau/dispnv50/disp.c

820

mode->clock, hdmi->scdc.supported, hdmi->scdc.scrambling.supported,

drivers/gpu/drm/nouveau/dispnv50/disp.c

990

const int clock = crtc_state->adjusted_mode.clock;

drivers/gpu/drm/nouveau/dispnv50/disp.c

993

asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3 << 4);

drivers/gpu/drm/nouveau/dispnv50/head.c

324

m->clock = mode->crtc_clock;

drivers/gpu/drm/nouveau/dispnv50/head507d.c

357

NVVAL(NV507D, HEAD_SET_PIXEL_CLOCK, FREQUENCY, m->clock) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

364

NVVAL(NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000) |

drivers/gpu/drm/nouveau/dispnv50/head907d.c

373

NVVAL(NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000) |

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

241

NVVAL(NVC37D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

244

NVVAL(NVC37D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

233

NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headc57d.c

236

NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

249

NVVAL(NVCA7D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/dispnv50/headca7d.c

252

NVVAL(NVCA7D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));

drivers/gpu/drm/nouveau/nouveau_bios.c

464

mode->clock = ROM16(mode_entry[7]) * 10;

drivers/gpu/drm/nouveau/nouveau_connector.c

1083

unsigned int min_clock = 25000, max_clock = min_clock, clock = mode->clock;

drivers/gpu/drm/nouveau/nouveau_connector.c

1113

clock *= 2;

drivers/gpu/drm/nouveau/nouveau_connector.c

1115

if (clock < min_clock)

drivers/gpu/drm/nouveau/nouveau_connector.c

1117

if (clock > max_clock)

drivers/gpu/drm/nouveau/nouveau_connector.c

920

duallink = mode->clock >= bios->fp.duallink_transition_clk;

drivers/gpu/drm/nouveau/nouveau_connector.h

227

unsigned *clock);

drivers/gpu/drm/nouveau/nouveau_dp.c

532

unsigned int max_rate, mode_rate, ds_max_dotclock, clock = mode->clock;

drivers/gpu/drm/nouveau/nouveau_dp.c

543

clock *= 2;

drivers/gpu/drm/nouveau/nouveau_dp.c

546

mode_rate = DIV_ROUND_UP(clock * bpp, 8);

drivers/gpu/drm/nouveau/nouveau_dp.c

551

if (ds_max_dotclock && clock > ds_max_dotclock)

drivers/gpu/drm/nouveau/nouveau_dp.c

554

if (clock < min_clock)

drivers/gpu/drm/nouveau/nouveau_dp.c

558

*out_clock = clock;

drivers/gpu/drm/nouveau/nouveau_encoder.h

165

unsigned *clock);

drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c

126

.clock = nv50_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c

295

.clock = nv50_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c

108

.clock = ga102_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

330

.clock = gf119_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

382

.clock = gf119_dac_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c

117

.clock = gf119_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c

72

.clock = gf119_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

149

.clock = gf119_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c

39

.clock = gf119_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c

226

.clock = nv50_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c

214

.clock = gf119_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h

62

void (*clock)(struct nvkm_ior *);

drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c

33

.clock = nv50_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c

46

.clock = nv50_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

1302

ior->func->clock(ior);

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

142

.clock = nv50_pior_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

255

.clock = nv50_sor_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

352

.clock = nv50_dac_clock,

drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c

91

.clock = gf119_sor_clock,

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1566

u16 mdata, clock;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1580

clock = nvbios_rd16(bios, mdata + 4) * 10;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1581

init_prog_pll(init, 0x680500, clock);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1584

clock = nvbios_rd16(bios, mdata + 2) * 10;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1586

clock *= 2;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1587

init_prog_pll(init, 0x680504, clock);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

348

const struct nvkm_domain *clock = clk->domains - 1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

358

while ((++clock)->name != nv_clk_src_max) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

359

u32 lo = pstate->base.domain[clock->name];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

364

nvkm_debug(subdev, "%02x: %10d KHz\n", clock->name, lo);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

366

u32 freq = cstate->domain[clock->name];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

372

if (clock->mname && ++i < ARRAY_SIZE(info)) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

373

lo /= clock->mdiv;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

374

hi /= clock->mdiv;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

377

clock->mname, lo);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

380

"%s %d-%d MHz", clock->mname, lo, hi);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

593

const struct nvkm_domain *clock = clk->domains;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

600

while (clock->name != nv_clk_src_max) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

601

ret = nvkm_clk_read(clk, clock->name);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

603

nvkm_error(subdev, "%02x freq unknown\n", clock->name);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

606

clk->bstate.base.domain[clock->name] = ret;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

607

clock++;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

163

u32 clock, int *N, int *M, int *P)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

178

return nv04_pll_calc(subdev, &pll, clock, N, M, NULL, NULL, P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

207

u32 out = 0, clock = 0;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

216

clock = calc_pll(clk, 0x4028, (core << 1), &N, &M, &P1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

218

if (abs(core - out) <= abs(core - (clock >> 1))) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

242

clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

247

abs(shader - clock) &&

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

260

clock = calc_P(500000, vdec, &P1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

261

if(abs(vdec - out) <= abs(vdec - clock)) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

56

u32 clock = 0;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

73

clock = ref * N1 / M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

74

clock = clock / post_div;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

77

return clock;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

32

nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

36

int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/omapdrm/dss/dpi.c

356

static int dpi_clock_update(struct dpi_data *dpi, unsigned long *clock)

drivers/gpu/drm/omapdrm/dss/dpi.c

363

if (!dpi_pll_clk_calc(dpi, *clock, &ctx))

drivers/gpu/drm/omapdrm/dss/dpi.c

368

if (!dpi_dss_clk_calc(dpi, *clock, &ctx))

drivers/gpu/drm/omapdrm/dss/dpi.c

377

*clock = fck / lck_div / pck_div;

drivers/gpu/drm/omapdrm/dss/dpi.c

443

unsigned long clock = mode->clock * 1000;

drivers/gpu/drm/omapdrm/dss/dpi.c

449

if (mode->clock == 0)

drivers/gpu/drm/omapdrm/dss/dpi.c

452

ret = dpi_clock_update(dpi, &clock);

drivers/gpu/drm/omapdrm/dss/dpi.c

464

unsigned long clock = mode->clock * 1000;

drivers/gpu/drm/omapdrm/dss/dpi.c

467

ret = dpi_clock_update(dpi, &clock);

drivers/gpu/drm/omapdrm/dss/dpi.c

471

adjusted_mode->clock = clock / 1000;

drivers/gpu/drm/omapdrm/dss/dpi.c

482

dpi->pixelclock = adjusted_mode->clock * 1000;

drivers/gpu/drm/omapdrm/dss/hdmi4.c

339

dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);

drivers/gpu/drm/omapdrm/dss/hdmi5.c

337

dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);

drivers/gpu/drm/omapdrm/dss/sdi.c

149

unsigned long pixelclock = mode->clock * 1000;

drivers/gpu/drm/omapdrm/dss/sdi.c

169

unsigned long pixelclock = mode->clock * 1000;

drivers/gpu/drm/omapdrm/dss/sdi.c

186

adjusted_mode->clock = pck / 1000;

drivers/gpu/drm/omapdrm/dss/sdi.c

197

sdi->pixelclock = adjusted_mode->clock * 1000;

drivers/gpu/drm/omapdrm/dss/venc.c

226

.clock = 13500,

drivers/gpu/drm/omapdrm/dss/venc.c

241

.clock = 13500,

drivers/gpu/drm/omapdrm/dss/venc.c

446

if (mode->clock == omap_dss_pal_mode.clock &&

drivers/gpu/drm/omapdrm/dss/venc.c

451

if (mode->clock == omap_dss_ntsc_mode.clock &&

drivers/gpu/drm/omapdrm/omap_crtc.c

536

uint64_t bandwidth = mode->clock * 1000;

drivers/gpu/drm/panel/panel-abt-y030xx067a.c

330

.clock = 14400,

drivers/gpu/drm/panel/panel-abt-y030xx067a.c

342

.clock = 12000,

drivers/gpu/drm/panel/panel-arm-versatile.c

137

.clock = 10000,

drivers/gpu/drm/panel/panel-arm-versatile.c

160

.clock = 25000,

drivers/gpu/drm/panel/panel-arm-versatile.c

182

.clock = 62500,

drivers/gpu/drm/panel/panel-arm-versatile.c

205

.clock = 5400,

drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c

130

.clock = (1080 + 100 + 8 + 16) * (1920 + 4 + 2 + 4) * 60 / 1000,

drivers/gpu/drm/panel/panel-auo-a030jtn01.c

247

.clock = 14400,

drivers/gpu/drm/panel/panel-auo-a030jtn01.c

259

.clock = 12000,

drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c

171

.clock = 165268,

drivers/gpu/drm/panel/panel-boe-himax8279d.c

224

.clock = 159420,

drivers/gpu/drm/panel/panel-boe-td4320.c

142

.clock = (1080 + 86 + 2 + 100) * (2340 + 4 + 4 + 60) * 60 / 1000,

drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c

256

.clock = 73500,

drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c

281

.clock = (800 + 25 + 25 + 25) * (1280 + 20 + 4 + 12) * 60 / 1000,

drivers/gpu/drm/panel/panel-boe-tv101wum-ll2.c

136

.clock = (1200 + 27 + 8 + 12) * (1920 + 155 + 8 + 32) * 60 / 1000,

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1424

.clock = 166594,

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1453

.clock = 168432,

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1482

.clock = 159425,

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1509

.clock = 157000,

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1536

.clock = 159916,

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1563

.clock = 159667,

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1591

.clock = 159916,

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1619

.clock = 165731,

drivers/gpu/drm/panel/panel-dsi-cm.c

440

ddata->mode.clock);

drivers/gpu/drm/panel/panel-dsi-cm.c

478

mode->clock = ddata->panel_data->xres * ddata->panel_data->yres *

drivers/gpu/drm/panel/panel-ebbg-ft8719.c

122

.clock = (1080 + 28 + 4 + 16) * (2246 + 120 + 4 + 12) * 60 / 1000,

drivers/gpu/drm/panel/panel-edp.c

1015

.clock = 70589,

drivers/gpu/drm/panel/panel-edp.c

1028

.clock = 69300,

drivers/gpu/drm/panel/panel-edp.c

1056

.clock = 150660,

drivers/gpu/drm/panel/panel-edp.c

1083

.clock = 69500,

drivers/gpu/drm/panel/panel-edp.c

1106

.clock = 71900,

drivers/gpu/drm/panel/panel-edp.c

1117

.clock = 57500,

drivers/gpu/drm/panel/panel-edp.c

1147

.clock = 207800,

drivers/gpu/drm/panel/panel-edp.c

1159

.clock = 138500,

drivers/gpu/drm/panel/panel-edp.c

1190

.clock = 147840,

drivers/gpu/drm/panel/panel-edp.c

1231

.clock = 148500,

drivers/gpu/drm/panel/panel-edp.c

1260

.clock = 76420,

drivers/gpu/drm/panel/panel-edp.c

1322

.clock = 162000,

drivers/gpu/drm/panel/panel-edp.c

1344

.clock = 206016,

drivers/gpu/drm/panel/panel-edp.c

1371

.clock = 81000,

drivers/gpu/drm/panel/panel-edp.c

1397

.clock = 200000,

drivers/gpu/drm/panel/panel-edp.c

1419

.clock = 205210,

drivers/gpu/drm/panel/panel-edp.c

1440

.clock = 162300,

drivers/gpu/drm/panel/panel-edp.c

1462

.clock = 285250,

drivers/gpu/drm/panel/panel-edp.c

1485

.clock = 138500,

drivers/gpu/drm/panel/panel-edp.c

1496

.clock = 110920,

drivers/gpu/drm/panel/panel-edp.c

1525

.clock = 271560,

drivers/gpu/drm/panel/panel-edp.c

1546

.clock = 76300,

drivers/gpu/drm/panel/panel-edp.c

1568

.clock = 168480,

drivers/gpu/drm/panel/panel-elida-kd35t133.c

160

.clock = 17000,

drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c

390

.clock = 70000,

drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c

142

.clock = 55000,

drivers/gpu/drm/panel/panel-himax-hx8279.c

1103

.clock = 159420,

drivers/gpu/drm/panel/panel-himax-hx8279.c

1124

.clock = 156458,

drivers/gpu/drm/panel/panel-himax-hx83102.c

705

.clock = 162680,

drivers/gpu/drm/panel/panel-himax-hx83102.c

727

.clock = 167700,

drivers/gpu/drm/panel/panel-himax-hx83102.c

749

.clock = 177958,

drivers/gpu/drm/panel/panel-himax-hx83102.c

771

.clock = 167700,

drivers/gpu/drm/panel/panel-himax-hx83102.c

793

.clock = 182750,

drivers/gpu/drm/panel/panel-himax-hx83102.c

815

.clock = 192050,

drivers/gpu/drm/panel/panel-himax-hx83112a.c

239

.clock = (1080 + 28 + 8 + 8) * (2340 + 27 + 5 + 5) * 60 / 1000,

drivers/gpu/drm/panel/panel-himax-hx83112b.c

289

.clock = (1080 + 40 + 4 + 12) * (2160 + 32 + 2 + 2) * 60 / 1000,

drivers/gpu/drm/panel/panel-himax-hx8394.c

190

.clock = 74250,

drivers/gpu/drm/panel/panel-himax-hx8394.c

319

.clock = 63290,

drivers/gpu/drm/panel/panel-himax-hx8394.c

466

.clock = 60226,

drivers/gpu/drm/panel/panel-himax-hx8394.c

607

.clock = 134920,

drivers/gpu/drm/panel/panel-hydis-hv101hd1.c

78

.clock = (1366 + 74 + 36 + 24) * (768 + 21 + 7 + 4) * 60 / 1000,

drivers/gpu/drm/panel/panel-ilitek-ili9322.c

537

.clock = 24535,

drivers/gpu/drm/panel/panel-ilitek-ili9322.c

550

.clock = 27000,

drivers/gpu/drm/panel/panel-ilitek-ili9322.c

564

.clock = 64000,

drivers/gpu/drm/panel/panel-ilitek-ili9322.c

578

.clock = 24540,

drivers/gpu/drm/panel/panel-ilitek-ili9322.c

591

.clock = 27000,

drivers/gpu/drm/panel/panel-ilitek-ili9322.c

605

.clock = 24540,

drivers/gpu/drm/panel/panel-ilitek-ili9322.c

619

.clock = 27000,

drivers/gpu/drm/panel/panel-ilitek-ili9341.c

191

.clock = 6100,

drivers/gpu/drm/panel/panel-ilitek-ili9805.c

246

.clock = 26227,

drivers/gpu/drm/panel/panel-ilitek-ili9805.c

260

.clock = 26227,

drivers/gpu/drm/panel/panel-ilitek-ili9806e.c

359

.clock = 22400,

drivers/gpu/drm/panel/panel-ilitek-ili9806e.c

517

.clock = 22000,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2094

.clock = 62000,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2111

.clock = 69700,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2128

.clock = 62000,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2145

.clock = 59400,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2162

.clock = 65000,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2179

.clock = 64000,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2196

.clock = 67911,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2213

.clock = 83333,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2230

.clock = 83330,

drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

2247

.clock = 70000,

drivers/gpu/drm/panel/panel-ilitek-ili9882t.c

673

.clock = 165280,

drivers/gpu/drm/panel/panel-ilitek-ili9882t.c

686

.clock = 543850,

drivers/gpu/drm/panel/panel-innolux-ej030na.c

256

.clock = 14400,

drivers/gpu/drm/panel/panel-innolux-ej030na.c

268

.clock = 12000,

drivers/gpu/drm/panel/panel-innolux-p079zca.c

143

.clock = 56900,

drivers/gpu/drm/panel/panel-innolux-p079zca.c

176

.clock = 229000,

drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c

1089

.clock = (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,

drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c

1345

.clock = (640 + 260 + 220 + 260) * (480 + 10 + 2 + 16) * 60 / 1000,

drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c

373

.clock = 70000,

drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c

605

.clock = 70000,

drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c

838

.clock = (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,

drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c

134

.clock = (1080 + 120 + 16 + 40) * (1920 + 4 + 2 + 4) * 60 / 1000,

drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c

275

.clock = (2560 + 80 + 80 + 80) * (1800 + 4 + 4 + 4) * 60 / 1000,

drivers/gpu/drm/panel/panel-jdi-lt070me05000.c

263

.clock = 155493,

drivers/gpu/drm/panel/panel-khadas-ts050.c

752

.clock = 160000,

drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c

275

.clock = 229000,

drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c

308

.clock = 59756,

drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c

389

.clock = 64018,

drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c

448

.clock = 65595,

drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c

226

.clock = 67330,

drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c

471

.clock = 69217,

drivers/gpu/drm/panel/panel-lg-lb035q02.c

128

.clock = 6500,

drivers/gpu/drm/panel/panel-lg-ld070wx3.c

94

.clock = (800 + 32 + 48 + 8) * (1280 + 5 + 3 + 1) * 60 / 1000,

drivers/gpu/drm/panel/panel-lg-lg4573.c

200

.clock = 28341,

drivers/gpu/drm/panel/panel-lg-sw43408.c

163

.clock = (1080 + 20 + 32 + 20) * (2160 + 20 + 4 + 20) * 60 / 1000,

drivers/gpu/drm/panel/panel-lincolntech-lcd197.c

153

.clock = 154002,

drivers/gpu/drm/panel/panel-magnachip-d53e6ea8966.c

458

.clock = 33500,

drivers/gpu/drm/panel/panel-magnachip-d53e6ea8966.c

471

.clock = 27800,

drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c

171

.clock = 85298,

drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c

186

.clock = 85298,

drivers/gpu/drm/panel/panel-nec-nl8048hl11.c

110

.clock = 23800,

drivers/gpu/drm/panel/panel-newvision-nv3051d.c

445

.clock = 48300,

drivers/gpu/drm/panel/panel-newvision-nv3051d.c

457

.clock = 40250,

drivers/gpu/drm/panel/panel-newvision-nv3051d.c

469

.clock = 24150,

drivers/gpu/drm/panel/panel-newvision-nv3051d.c

484

.clock = 24150,

drivers/gpu/drm/panel/panel-newvision-nv3052c.c

567

.clock = 24000,

drivers/gpu/drm/panel/panel-newvision-nv3052c.c

579

.clock = 18000,

drivers/gpu/drm/panel/panel-newvision-nv3052c.c

594

.clock = 21000,

drivers/gpu/drm/panel/panel-newvision-nv3052c.c

609

.clock = 24000,

drivers/gpu/drm/panel/panel-novatek-nt35510.c

1238

.clock = 20000,

drivers/gpu/drm/panel/panel-novatek-nt35510.c

1312

.clock = 23000,

drivers/gpu/drm/panel/panel-novatek-nt35560.c

103

.clock = 27234,

drivers/gpu/drm/panel/panel-novatek-nt35560.c

122

.clock = 35478,

drivers/gpu/drm/panel/panel-novatek-nt35560.c

61

.clock = 27234,

drivers/gpu/drm/panel/panel-novatek-nt35560.c

80

.clock = 35478,

drivers/gpu/drm/panel/panel-novatek-nt35950.c

556

.clock = 214537,

drivers/gpu/drm/panel/panel-novatek-nt36523.c

891

.clock = (1600 + 60 + 8 + 60) * (2560 + 26 + 4 + 168) * 120 / 1000,

drivers/gpu/drm/panel/panel-novatek-nt36523.c

905

.clock = (1600 + 200 + 40 + 52) * (2560 + 26 + 4 + 168) * 120 / 1000,

drivers/gpu/drm/panel/panel-novatek-nt36523.c

919

.clock = (1200 + 58 + 2 + 60) * (2000 + 26 + 2 + 93) * 60 / 1000,

drivers/gpu/drm/panel/panel-novatek-nt36672a.c

556

.clock = 161331,

drivers/gpu/drm/panel/panel-novatek-nt36672e.c

471

.clock = 181690,

drivers/gpu/drm/panel/panel-novatek-nt37801.c

191

.clock = (1440 + 20 + 4 + 20) * (3200 + 20 + 2 + 18) * 120 / 1000,

drivers/gpu/drm/panel/panel-novatek-nt39016.c

304

.clock = 6000,

drivers/gpu/drm/panel/panel-novatek-nt39016.c

316

.clock = 5400,

drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c

124

mode->clock = lcd_mode->pixelclock;

drivers/gpu/drm/panel/panel-orisetech-ota5601a.c

299

.clock = 27000,

drivers/gpu/drm/panel/panel-orisetech-ota5601a.c

312

.clock = 24000,

drivers/gpu/drm/panel/panel-orisetech-otm8009a.c

78

.clock = 29700,

drivers/gpu/drm/panel/panel-orisetech-otm8009a.c

92

.clock = 33000,

drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c

71

.clock = 164400,

drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c

111

.clock = 164402,

drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c

202

.clock = 25979400 / 1000,

drivers/gpu/drm/panel/panel-raydium-rm67191.c

211

.clock = 132000,

drivers/gpu/drm/panel/panel-raydium-rm67200.c

456

.clock = 132000,

drivers/gpu/drm/panel/panel-raydium-rm68200.c

83

.clock = 54000,

drivers/gpu/drm/panel/panel-raydium-rm692e5.c

186

.clock = (1224 + 32 + 8 + 8) * (2700 + 8 + 2 + 8) * 90 / 1000,

drivers/gpu/drm/panel/panel-raydium-rm69380.c

124

.clock = (2560 + 32 + 12 + 38) * (1600 + 20 + 4 + 8) * 90 / 1000,

drivers/gpu/drm/panel/panel-renesas-r61307.c

194

.clock = (768 + 116 + 81 + 5) * (1024 + 24 + 8 + 2) * 60 / 1000,

drivers/gpu/drm/panel/panel-renesas-r69328.c

159

.clock = (720 + 92 + 62 + 4) * (1280 + 6 + 3 + 1) * 60 / 1000,

drivers/gpu/drm/panel/panel-ronbo-rb070d30.c

91

.clock = 51206,

drivers/gpu/drm/panel/panel-samsung-ams581vf01.c

147

.clock = (1080 + 32 + 73 + 98) * (2340 + 8 + 1 + 8) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-ams639rq08.c

175

.clock = (1080 + 64 + 20 + 64) * (2340 + 64 + 20 + 64) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-db7430.c

70

.clock = 32258,

drivers/gpu/drm/panel/panel-samsung-ltl106hl02.c

84

.clock = (1920 + 32 + 32 + 64) * (1080 + 6 + 3 + 22) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6d16d0.c

30

.clock = 420160,

drivers/gpu/drm/panel/panel-samsung-s6d27a1.c

55

.clock = 24960,

drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c

229

.clock = (800 + 16 + 4 + 140) * (1280 + 8 + 4 + 4) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c

304

.clock = (768 + 18 + 16 + 126) * (1024 + 8 + 2 + 6) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c

332

.clock = (768 + 96 + 16 + 184) * (1024 + 8 + 2 + 6) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6e3fa7.c

98

.clock = (1080 + 32 + 32 + 78) * (2220 + 32 + 4 + 78) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6e3fc2x01.c

240

.clock = (1080 + 72 + 16 + 36) * (2340 + 32 + 4 + 18) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c

610

.clock = 222372,

drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c

628

.clock = 247856,

drivers/gpu/drm/panel/panel-samsung-s6e3ha8.c

223

.clock = (1440 + 116 + 44 + 120) * (2960 + 120 + 80 + 124) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c

46

.clock = 4649,

drivers/gpu/drm/panel/panel-samsung-s6e63m0.c

286

.clock = 25628,

drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams427ap24.c

633

.clock = (540 + 94 + 4 + 18) * (960 + 12 + 1 + 3) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c

124

.clock = (540 + 88 + 4 + 20) * (960 + 14 + 2 + 8) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-s6e8aa5x01-ams561ra01.c

868

.clock = (720 + 62 + 2 + 26) * (1480 + 12 + 2 + 10) * 60 / 1000,

drivers/gpu/drm/panel/panel-samsung-sofef00.c

144

.clock = (1080 + 112 + 16 + 36) * (2280 + 36 + 8 + 12) * 60 / 1000,

drivers/gpu/drm/panel/panel-sharp-lq079l1sx01.c

108

.clock = (1536 + 136 + 28 + 28) * (2048 + 14 + 8 + 2) * 60 / 1000,

drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c

226

.clock = 278000,

drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c

87

.clock = 19200,

drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c

144

.clock = (540 + 48 + 32 + 80) * (960 + 3 + 10 + 15) * 60 / 1000,

drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c

152

.clock = (1080 + 96 + 16 + 64) * (1920 + 4 + 1 + 16) * 60 / 1000,

drivers/gpu/drm/panel/panel-simple.c

1006

.clock = 70589,

drivers/gpu/drm/panel/panel-simple.c

1091

.clock = 40000,

drivers/gpu/drm/panel/panel-simple.c

1115

.clock = 40000,

drivers/gpu/drm/panel/panel-simple.c

1224

.clock = 76000,

drivers/gpu/drm/panel/panel-simple.c

1361

.clock = 148800,

drivers/gpu/drm/panel/panel-simple.c

1389

.clock = 51200,

drivers/gpu/drm/panel/panel-simple.c

1416

.clock = 30000,

drivers/gpu/drm/panel/panel-simple.c

1496

.clock = 78945,

drivers/gpu/drm/panel/panel-simple.c

1573

.clock = 42105,

drivers/gpu/drm/panel/panel-simple.c

1624

.clock = 9000,

drivers/gpu/drm/panel/panel-simple.c

1649

.clock = 51200,

drivers/gpu/drm/panel/panel-simple.c

1676

.clock = 33300,

drivers/gpu/drm/panel/panel-simple.c

1702

.clock = 35000,

drivers/gpu/drm/panel/panel-simple.c

1755

.clock = 66770,

drivers/gpu/drm/panel/panel-simple.c

1781

.clock = 72070,

drivers/gpu/drm/panel/panel-simple.c

1806

.clock = 69300,

drivers/gpu/drm/panel/panel-simple.c

1880

.clock = 33260,

drivers/gpu/drm/panel/panel-simple.c

1967

.clock = 6500,

drivers/gpu/drm/panel/panel-simple.c

1992

.clock = 6520,

drivers/gpu/drm/panel/panel-simple.c

2018

.clock = 10870,

drivers/gpu/drm/panel/panel-simple.c

2048

.clock = 9000,

drivers/gpu/drm/panel/panel-simple.c

2074

.clock = 25175,

drivers/gpu/drm/panel/panel-simple.c

2100

.clock = 33260,

drivers/gpu/drm/panel/panel-simple.c

2192

.clock = 25175,

drivers/gpu/drm/panel/panel-simple.c

2300

.clock = 32260,

drivers/gpu/drm/panel/panel-simple.c

2324

.clock = 6000,

drivers/gpu/drm/panel/panel-simple.c

2336

.clock = 5400,

drivers/gpu/drm/panel/panel-simple.c

2363

.clock = 67185,

drivers/gpu/drm/panel/panel-simple.c

2385

.clock = 9000,

drivers/gpu/drm/panel/panel-simple.c

2538

.clock = 33333,

drivers/gpu/drm/panel/panel-simple.c

2564

.clock = 9000,

drivers/gpu/drm/panel/panel-simple.c

2590

.clock = 33333,

drivers/gpu/drm/panel/panel-simple.c

2708

.clock = 33333,

drivers/gpu/drm/panel/panel-simple.c

2897

.clock = 69300,

drivers/gpu/drm/panel/panel-simple.c

2922

.clock = 51501,

drivers/gpu/drm/panel/panel-simple.c

3081

.clock = 7000,

drivers/gpu/drm/panel/panel-simple.c

3128

.clock = 155127,

drivers/gpu/drm/panel/panel-simple.c

3215

.clock = 33000,

drivers/gpu/drm/panel/panel-simple.c

3247

.clock = 33000,

drivers/gpu/drm/panel/panel-simple.c

3279

.clock = 9107,

drivers/gpu/drm/panel/panel-simple.c

3313

.clock = 150275,

drivers/gpu/drm/panel/panel-simple.c

3342

.clock = 93301,

drivers/gpu/drm/panel/panel-simple.c

3371

.clock = 30400,

drivers/gpu/drm/panel/panel-simple.c

3403

.clock = 56234,

drivers/gpu/drm/panel/panel-simple.c

3602

.clock = 10870,

drivers/gpu/drm/panel/panel-simple.c

3627

.clock = 66000,

drivers/gpu/drm/panel/panel-simple.c

3649

.clock = 9000,

drivers/gpu/drm/panel/panel-simple.c

3676

.clock = 75400,

drivers/gpu/drm/panel/panel-simple.c

3727

.clock = 29500,

drivers/gpu/drm/panel/panel-simple.c

3781

.clock = 9000,

drivers/gpu/drm/panel/panel-simple.c

3803

.clock = 33300,

drivers/gpu/drm/panel/panel-simple.c

3864

.clock = 29500,

drivers/gpu/drm/panel/panel-simple.c

3892

.clock = 22230,

drivers/gpu/drm/panel/panel-simple.c

3918

.clock = 25000,

drivers/gpu/drm/panel/panel-simple.c

3943

.clock = 33000,

drivers/gpu/drm/panel/panel-simple.c

3970

.clock = 33300,

drivers/gpu/drm/panel/panel-simple.c

3992

.clock = 71150,

drivers/gpu/drm/panel/panel-simple.c

4018

.clock = 66500,

drivers/gpu/drm/panel/panel-simple.c

4044

.clock = 24750,

drivers/gpu/drm/panel/panel-simple.c

4072

.clock = 32000,

drivers/gpu/drm/panel/panel-simple.c

4098

.clock = 9000,

drivers/gpu/drm/panel/panel-simple.c

4122

.clock = 10800,

drivers/gpu/drm/panel/panel-simple.c

4134

.clock = 10800,

drivers/gpu/drm/panel/panel-simple.c

4242

.clock = 71100,

drivers/gpu/drm/panel/panel-simple.c

4333

.clock = 54030,

drivers/gpu/drm/panel/panel-simple.c

4382

.clock = 33260,

drivers/gpu/drm/panel/panel-simple.c

4408

.clock = 5500,

drivers/gpu/drm/panel/panel-simple.c

4457

.clock = 3000,

drivers/gpu/drm/panel/panel-simple.c

4469

.clock = 3000,

drivers/gpu/drm/panel/panel-simple.c

4497

.clock = 33300,

drivers/gpu/drm/panel/panel-simple.c

4519

.clock = 33000,

drivers/gpu/drm/panel/panel-simple.c

4606

.clock = 30000,

drivers/gpu/drm/panel/panel-simple.c

4762

.clock = 10000,

drivers/gpu/drm/panel/panel-simple.c

4789

.clock = 10000,

drivers/gpu/drm/panel/panel-simple.c

4848

.clock = 79500,

drivers/gpu/drm/panel/panel-simple.c

4872

.clock = 33260,

drivers/gpu/drm/panel/panel-simple.c

4894

.clock = 45000,

drivers/gpu/drm/panel/panel-simple.c

4952

.clock = 60000,

drivers/gpu/drm/panel/panel-simple.c

4977

.clock = 33333,

drivers/gpu/drm/panel/panel-simple.c

5002

.clock = 6410,

drivers/gpu/drm/panel/panel-simple.c

5026

.clock = 51200,

drivers/gpu/drm/panel/panel-simple.c

5052

.clock = 25000,

drivers/gpu/drm/panel/panel-simple.c

5078

.clock = 65000,

drivers/gpu/drm/panel/panel-simple.c

5664

.clock = 154500,

drivers/gpu/drm/panel/panel-simple.c

5692

.clock = 160000,

drivers/gpu/drm/panel/panel-simple.c

5722

.clock = 67000,

drivers/gpu/drm/panel/panel-simple.c

5750

.clock = 157200,

drivers/gpu/drm/panel/panel-simple.c

5779

.clock = 150000,

drivers/gpu/drm/panel/panel-simple.c

5807

.clock = 154500,

drivers/gpu/drm/panel/panel-simple.c

798

.clock = 71100,

drivers/gpu/drm/panel/panel-simple.c

824

.clock = 9000,

drivers/gpu/drm/panel/panel-simple.c

848

.clock = 33333,

drivers/gpu/drm/panel/panel-simple.c

958

.clock = 51450,

drivers/gpu/drm/panel/panel-simple.c

983

.clock = 72000,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

1061

.clock = 22325,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

1161

.clock = 18306,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

663

.clock = 27500,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

762

.clock = 22325,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

863

.clock = 27500,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

962

.clock = 25600,

drivers/gpu/drm/panel/panel-sitronix-st7703.c

143

.clock = 75276,

drivers/gpu/drm/panel/panel-sitronix-st7703.c

322

.clock = 69000,

drivers/gpu/drm/panel/panel-sitronix-st7703.c

409

.clock = 24150,

drivers/gpu/drm/panel/panel-sitronix-st7703.c

493

.clock = 36570,

drivers/gpu/drm/panel/panel-sitronix-st7703.c

579

.clock = 63800,

drivers/gpu/drm/panel/panel-sitronix-st7703.c

661

.clock = 23546,

drivers/gpu/drm/panel/panel-sitronix-st7789v.c

238

.clock = 7000,

drivers/gpu/drm/panel/panel-sitronix-st7789v.c

258

.clock = 6008,

drivers/gpu/drm/panel/panel-sitronix-st7789v.c

273

.clock = 3000,

drivers/gpu/drm/panel/panel-sitronix-st7789v.c

288

.clock = 6000,

drivers/gpu/drm/panel/panel-sony-acx565akm.c

497

.clock = 24000,

drivers/gpu/drm/panel/panel-sony-td4353-jdi.c

129

.clock = (1080 + 4 + 8 + 8) * (2160 + 259 + 8 + 8) * 60 / 1000,

drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c

345

.clock = (720 + 232 + 20 + 112) * (1280 + 18 + 1 + 18) * 60 / 1000,

drivers/gpu/drm/panel/panel-startek-kd070fhfid015.c

160

.clock = 163204,

drivers/gpu/drm/panel/panel-summit.c

46

.clock = ((60 + 8 + 80 + 40) * (2008 + 1 + 15 + 6) * 60) / 1000,

drivers/gpu/drm/panel/panel-synaptics-r63353.c

185

.clock = 70000,

drivers/gpu/drm/panel/panel-tdo-tl070wsh30.c

100

.clock = 47250,

drivers/gpu/drm/panel/panel-tpo-td028ttec1.c

266

.clock = 22153,

drivers/gpu/drm/panel/panel-tpo-td043mtea1.c

333

.clock = 36000,

drivers/gpu/drm/panel/panel-tpo-tpg110.c

105

.clock = 33200,

drivers/gpu/drm/panel/panel-tpo-tpg110.c

121

.clock = 25200,

drivers/gpu/drm/panel/panel-tpo-tpg110.c

137

.clock = 9000,

drivers/gpu/drm/panel/panel-tpo-tpg110.c

153

.clock = 20500,

drivers/gpu/drm/panel/panel-tpo-tpg110.c

169

.clock = 8300,

drivers/gpu/drm/panel/panel-truly-nt35597.c

488

.clock = 268316,

drivers/gpu/drm/panel/panel-visionox-g2647fb105.c

131

.clock = (1080 + 28 + 4 + 36) * (2340 + 8 + 4 + 4) * 60 / 1000,

drivers/gpu/drm/panel/panel-visionox-r66451.c

157

.clock = 345830,

drivers/gpu/drm/panel/panel-visionox-rm69299.c

240

.clock = 158695,

drivers/gpu/drm/panel/panel-visionox-rm69299.c

253

.clock = (2160 + 8 + 4 + 4) * (1080 + 26 + 2 + 36) * 60 / 1000,

drivers/gpu/drm/panel/panel-visionox-rm692e5.c

242

.clock = (1080 + 26 + 39 + 36) * (2400 + 16 + 21 + 16) * 120 / 1000,

drivers/gpu/drm/panel/panel-visionox-rm692e5.c

256

.clock = (1080 + 26 + 39 + 36) * (2400 + 16 + 21 + 16) * 90 / 1000,

drivers/gpu/drm/panel/panel-visionox-rm692e5.c

270

.clock = (1080 + 26 + 39 + 36) * (2400 + 16 + 21 + 16) * 60 / 1000,

drivers/gpu/drm/panel/panel-visionox-vtdr6130.c

181

.clock = (1080 + 20 + 2 + 20) * (2400 + 20 + 2 + 18) * 144 / 1000,

drivers/gpu/drm/panel/panel-widechips-ws2401.c

85

.clock = 24960,

drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c

203

.clock = 64000,

drivers/gpu/drm/panfrost/panfrost_devfreq.c

166

cur_freq = clk_get_rate(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_devfreq.c

64

status->current_frequency = clk_get_rate(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

428

ret = clk_enable(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

43

pfdev->clock = devm_clk_get(pfdev->base.dev, NULL);

drivers/gpu/drm/panfrost/panfrost_device.c

44

if (IS_ERR(pfdev->clock)) {

drivers/gpu/drm/panfrost/panfrost_device.c

446

clk_disable(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

45

dev_err(pfdev->base.dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));

drivers/gpu/drm/panfrost/panfrost_device.c

46

return PTR_ERR(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

470

clk_disable(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

49

rate = clk_get_rate(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

494

ret = clk_enable(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

516

clk_disable(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

52

err = clk_prepare_enable(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

536

clk_disable(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

76

clk_disable_unprepare(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.c

84

clk_disable_unprepare(pfdev->clock);

drivers/gpu/drm/panfrost/panfrost_device.h

137

struct clk *clock;

drivers/gpu/drm/pl111/pl111_display.c

139

ret = clk_set_rate(priv->clk, mode->clock * 1000);

drivers/gpu/drm/pl111/pl111_display.c

143

mode->clock * 1000, ret);

drivers/gpu/drm/pl111/pl111_display.c

64

bw = mode->clock * 1000ULL; /* In Hz */

drivers/gpu/drm/pl111/pl111_display.c

75

mode->clock * 1000, cpp, bw);

drivers/gpu/drm/pl111/pl111_display.c

81

mode->clock * 1000, cpp, bw);

drivers/gpu/drm/radeon/atombios_crtc.c

1019

mode->clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

1032

mode->clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

1040

mode->clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

1060

u32 pll_clock = mode->clock;

drivers/gpu/drm/radeon/atombios_crtc.c

1061

u32 clock = mode->clock;

drivers/gpu/drm/radeon/atombios_crtc.c

1070

clock = radeon_crtc->adjusted_clock;

drivers/gpu/drm/radeon/atombios_crtc.c

1074

pll = &rdev->clock.p1pll;

drivers/gpu/drm/radeon/atombios_crtc.c

1077

pll = &rdev->clock.p2pll;

drivers/gpu/drm/radeon/atombios_crtc.c

1082

pll = &rdev->clock.dcpll;

drivers/gpu/drm/radeon/atombios_crtc.c

1106

encoder_mode, radeon_encoder->encoder_id, clock,

drivers/gpu/drm/radeon/atombios_crtc.c

1780

if ((crtc->mode.clock == test_crtc->mode.clock) &&

drivers/gpu/drm/radeon/atombios_crtc.c

1839

if (rdev->clock.dp_extclk)

drivers/gpu/drm/radeon/atombios_crtc.c

1887

if (rdev->clock.dp_extclk)

drivers/gpu/drm/radeon/atombios_crtc.c

1913

if (rdev->clock.dp_extclk)

drivers/gpu/drm/radeon/atombios_crtc.c

1936

if (rdev->clock.dp_extclk)

drivers/gpu/drm/radeon/atombios_crtc.c

1989

atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk);

drivers/gpu/drm/radeon/atombios_crtc.c

1994

rdev->clock.default_dispclk);

drivers/gpu/drm/radeon/atombios_crtc.c

1998

atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk);

drivers/gpu/drm/radeon/atombios_crtc.c

566

u32 adjusted_clock = mode->clock;

drivers/gpu/drm/radeon/atombios_crtc.c

568

u32 dp_clock = mode->clock;

drivers/gpu/drm/radeon/atombios_crtc.c

569

u32 clock = mode->clock;

drivers/gpu/drm/radeon/atombios_crtc.c

571

bool is_duallink = radeon_dig_monitor_is_duallink(encoder, mode->clock);

drivers/gpu/drm/radeon/atombios_crtc.c

583

if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */

drivers/gpu/drm/radeon/atombios_crtc.c

597

if (ASIC_IS_DCE32(rdev) && mode->clock > 165000)

drivers/gpu/drm/radeon/atombios_crtc.c

602

if (mode->clock > 200000) /* range limits??? */

drivers/gpu/drm/radeon/atombios_crtc.c

636

adjusted_clock = mode->clock * 2;

drivers/gpu/drm/radeon/atombios_crtc.c

655

clock = (clock * 5) / 4;

drivers/gpu/drm/radeon/atombios_crtc.c

658

clock = (clock * 3) / 2;

drivers/gpu/drm/radeon/atombios_crtc.c

661

clock = clock * 2;

drivers/gpu/drm/radeon/atombios_crtc.c

687

args.v1.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

699

args.v3.sInput.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

820

u32 clock,

drivers/gpu/drm/radeon/atombios_crtc.c

845

if (clock == ATOM_DISABLE)

drivers/gpu/drm/radeon/atombios_crtc.c

847

args.v1.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

857

args.v2.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

867

args.v3.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

884

args.v5.usPixelClock = cpu_to_le16(clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

913

args.v6.ulDispEngClkFreq = cpu_to_le32(crtc_id << 24 | clock / 10);

drivers/gpu/drm/radeon/atombios_crtc.c

979

radeon_connector->pixelclock_for_modeset = mode->clock;

drivers/gpu/drm/radeon/atombios_dp.c

459

mode->clock,

drivers/gpu/drm/radeon/atombios_dp.c

477

if ((mode->clock > 340000) &&

drivers/gpu/drm/radeon/atombios_dp.c

486

mode->clock,

drivers/gpu/drm/radeon/atombios_encoders.c

1209

if (is_dp && rdev->clock.dp_extclk)

drivers/gpu/drm/radeon/atombios_encoders.c

1269

if (rdev->clock.dp_extclk)

drivers/gpu/drm/radeon/atombios_encoders.c

1336

if (is_dp && rdev->clock.dp_extclk)

drivers/gpu/drm/radeon/atombios_encoders.c

2218

radeon_encoder->pixel_clock = adjusted_mode->clock;

drivers/gpu/drm/radeon/btc_dpm.c

1147

u32 i, clock = 0;

drivers/gpu/drm/radeon/btc_dpm.c

1150

*max_clock = clock;

drivers/gpu/drm/radeon/btc_dpm.c

1155

if (clock < table->entries[i].clk)

drivers/gpu/drm/radeon/btc_dpm.c

1156

clock = table->entries[i].clk;

drivers/gpu/drm/radeon/btc_dpm.c

1158

*max_clock = clock;

drivers/gpu/drm/radeon/btc_dpm.c

1162

u32 clock, u16 max_voltage, u16 *voltage)

drivers/gpu/drm/radeon/btc_dpm.c

1170

if (clock <= table->entries[i].clk) {

drivers/gpu/drm/radeon/btc_dpm.c

2186

rdev->clock.current_dispclk, max_limits->vddc, &ps->low.vddc);

drivers/gpu/drm/radeon/btc_dpm.c

2195

rdev->clock.current_dispclk, max_limits->vddc, &ps->medium.vddc);

drivers/gpu/drm/radeon/btc_dpm.c

2204

rdev->clock.current_dispclk, max_limits->vddc, &ps->high.vddc);

drivers/gpu/drm/radeon/btc_dpm.h

51

u32 clock, u16 max_voltage, u16 *voltage);

drivers/gpu/drm/radeon/ci_dpm.c

1948

u32 ref_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/ci_dpm.c

2389

u32 clock, u32 *voltage)

drivers/gpu/drm/radeon/ci_dpm.c

2397

if (allowed_clock_voltage_table->entries[i].clk >= clock) {

drivers/gpu/drm/radeon/ci_dpm.c

2787

u32 reference_clock = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/ci_dpm.c

2966

table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/ci_dpm.c

3125

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/ci_dpm.c

3748

if (rdev->clock.current_dispclk == disp_voltage_table->entries[i].clk)

drivers/gpu/drm/radeon/cik.c

1707

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/cik.c

9260

(u32)mode->clock);

drivers/gpu/drm/radeon/cik.c

9262

(u32)mode->clock);

drivers/gpu/drm/radeon/cik.c

9277

wm_high.disp_clk = mode->clock;

drivers/gpu/drm/radeon/cik.c

9317

wm_low.disp_clk = mode->clock;

drivers/gpu/drm/radeon/cik.c

9415

uint64_t clock;

drivers/gpu/drm/radeon/cik.c

9419

clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |

drivers/gpu/drm/radeon/cik.c

9422

return clock;

drivers/gpu/drm/radeon/cik.c

9425

static int cik_set_uvd_clock(struct radeon_device *rdev, u32 clock,

drivers/gpu/drm/radeon/cik.c

9433

clock, false, &dividers);

drivers/gpu/drm/radeon/cypress_dpm.c

442

u32 ref_clk = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/cypress_dpm.c

558

u32 reference_clock = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/dce3_1_afmt.c

118

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/dce3_1_afmt.c

122

unsigned int max_ratio = clock / 24000;

drivers/gpu/drm/radeon/dce3_1_afmt.c

159

WREG32(DCCG_AUDIO_DTO0_MODULE, clock);

drivers/gpu/drm/radeon/dce3_1_afmt.c

166

WREG32(DCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/radeon/dce6_afmt.c

271

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/dce6_afmt.c

286

WREG32(DCCG_AUDIO_DTO0_MODULE, clock);

drivers/gpu/drm/radeon/dce6_afmt.c

290

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/dce6_afmt.c

312

clock = clock * 100 / div;

drivers/gpu/drm/radeon/dce6_afmt.c

315

WREG32(DCE8_DCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/radeon/dce6_afmt.c

318

WREG32(DCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/radeon/dce6_afmt.h

48

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/dce6_afmt.h

50

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/evergreen.c

1142

static int sumo_set_uvd_clock(struct radeon_device *rdev, u32 clock,

drivers/gpu/drm/radeon/evergreen.c

1149

clock, false, &dividers);

drivers/gpu/drm/radeon/evergreen.c

2176

(u32)mode->clock);

drivers/gpu/drm/radeon/evergreen.c

2178

(u32)mode->clock);

drivers/gpu/drm/radeon/evergreen.c

2195

wm_high.disp_clk = mode->clock;

drivers/gpu/drm/radeon/evergreen.c

2222

wm_low.disp_clk = mode->clock;

drivers/gpu/drm/radeon/evergreen.c

2261

b.full = dfixed_const(mode->clock);

drivers/gpu/drm/radeon/evergreen.c

2273

b.full = dfixed_const(mode->clock);

drivers/gpu/drm/radeon/evergreen_hdmi.c

230

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/evergreen_hdmi.c

232

unsigned int max_ratio = clock / 24000;

drivers/gpu/drm/radeon/evergreen_hdmi.c

269

WREG32(DCCG_AUDIO_DTO0_MODULE, clock);

drivers/gpu/drm/radeon/evergreen_hdmi.c

273

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/evergreen_hdmi.c

301

clock = 100 * clock / div;

drivers/gpu/drm/radeon/evergreen_hdmi.c

305

WREG32(DCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/radeon/evergreen_hdmi.h

60

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/evergreen_hdmi.h

62

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/ni_dpm.c

2012

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/ni_dpm.c

2242

u32 reference_clock = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/ni_dpm.c

3970

pl->mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/ni_dpm.c

3971

pl->sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/ni_dpm.c

883

rdev->clock.current_dispclk,

drivers/gpu/drm/radeon/r100.c

3292

pix_clk.full = dfixed_const(mode1->clock); /* convert to fixed point */

drivers/gpu/drm/radeon/r100.c

3299

pix_clk2.full = dfixed_const(mode2->clock); /* convert to fixed point */

drivers/gpu/drm/radeon/r600.c

200

return rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/r600.c

227

if (rdev->clock.spll.reference_freq == 10000)

drivers/gpu/drm/radeon/r600.c

4609

uint64_t clock;

drivers/gpu/drm/radeon/r600.c

4613

clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |

drivers/gpu/drm/radeon/r600.c

4616

return clock;

drivers/gpu/drm/radeon/r600.h

47

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/r600_dpm.c

165

if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {

drivers/gpu/drm/radeon/r600_dpm.c

172

vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock;

drivers/gpu/drm/radeon/r600_dpm.c

191

if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {

drivers/gpu/drm/radeon/r600_hdmi.c

294

struct radeon_crtc *crtc, unsigned int clock)

drivers/gpu/drm/radeon/r600_hdmi.c

310

WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100);

drivers/gpu/drm/radeon/r600_hdmi.c

314

WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100);

drivers/gpu/drm/radeon/radeon.h

2358

struct radeon_clock clock;

drivers/gpu/drm/radeon/radeon.h

2902

u32 clock;

drivers/gpu/drm/radeon/radeon.h

296

u32 clock,

drivers/gpu/drm/radeon/radeon.h

300

u32 clock,

drivers/gpu/drm/radeon/radeon_asic.h

400

void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock);

drivers/gpu/drm/radeon/radeon_asic.h

403

void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock);

drivers/gpu/drm/radeon/radeon_atombios.c

1120

rdev->clock.vco_freq =

drivers/gpu/drm/radeon/radeon_atombios.c

1132

struct radeon_pll *p1pll = &rdev->clock.p1pll;

drivers/gpu/drm/radeon/radeon_atombios.c

1133

struct radeon_pll *p2pll = &rdev->clock.p2pll;

drivers/gpu/drm/radeon/radeon_atombios.c

1134

struct radeon_pll *dcpll = &rdev->clock.dcpll;

drivers/gpu/drm/radeon/radeon_atombios.c

1135

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_atombios.c

1136

struct radeon_pll *mpll = &rdev->clock.mpll;

drivers/gpu/drm/radeon/radeon_atombios.c

1240

rdev->clock.default_sclk =

drivers/gpu/drm/radeon/radeon_atombios.c

1242

rdev->clock.default_mclk =

drivers/gpu/drm/radeon/radeon_atombios.c

1246

rdev->clock.default_dispclk =

drivers/gpu/drm/radeon/radeon_atombios.c

1248

if (rdev->clock.default_dispclk == 0) {

drivers/gpu/drm/radeon/radeon_atombios.c

1250

rdev->clock.default_dispclk = 60000; /* 600 Mhz */

drivers/gpu/drm/radeon/radeon_atombios.c

1252

rdev->clock.default_dispclk = 54000; /* 540 Mhz */

drivers/gpu/drm/radeon/radeon_atombios.c

1254

rdev->clock.default_dispclk = 60000; /* 600 Mhz */

drivers/gpu/drm/radeon/radeon_atombios.c

1257

if (ASIC_IS_DCE6(rdev) && (rdev->clock.default_dispclk < 53900)) {

drivers/gpu/drm/radeon/radeon_atombios.c

1259

rdev->clock.default_dispclk / 100);

drivers/gpu/drm/radeon/radeon_atombios.c

1260

rdev->clock.default_dispclk = 60000;

drivers/gpu/drm/radeon/radeon_atombios.c

1262

rdev->clock.dp_extclk =

drivers/gpu/drm/radeon/radeon_atombios.c

1264

rdev->clock.current_dispclk = rdev->clock.default_dispclk;

drivers/gpu/drm/radeon/radeon_atombios.c

1268

rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock);

drivers/gpu/drm/radeon/radeon_atombios.c

1269

if (rdev->clock.max_pixel_clock == 0)

drivers/gpu/drm/radeon/radeon_atombios.c

1270

rdev->clock.max_pixel_clock = 40000;

drivers/gpu/drm/radeon/radeon_atombios.c

1277

rdev->clock.vco_freq =

drivers/gpu/drm/radeon/radeon_atombios.c

1280

rdev->clock.vco_freq = rdev->clock.current_dispclk;

drivers/gpu/drm/radeon/radeon_atombios.c

1284

rdev->clock.vco_freq = rdev->clock.current_dispclk;

drivers/gpu/drm/radeon/radeon_atombios.c

1286

if (rdev->clock.vco_freq == 0)

drivers/gpu/drm/radeon/radeon_atombios.c

1287

rdev->clock.vco_freq = 360000; /* 3.6 GHz */

drivers/gpu/drm/radeon/radeon_atombios.c

1507

int id, u32 clock)

drivers/gpu/drm/radeon/radeon_atombios.c

1541

(clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) {

drivers/gpu/drm/radeon/radeon_atombios.c

1559

(clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) {

drivers/gpu/drm/radeon/radeon_atombios.c

1581

(clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) {

drivers/gpu/drm/radeon/radeon_atombios.c

1640

lvds->native_mode.clock =

drivers/gpu/drm/radeon/radeon_atombios.c

1835

mode->crtc_clock = mode->clock =

drivers/gpu/drm/radeon/radeon_atombios.c

1879

mode->crtc_clock = mode->clock =

drivers/gpu/drm/radeon/radeon_atombios.c

2459

rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_atombios.c

2461

rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_atombios.c

2628

rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_atombios.c

2630

rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_atombios.c

2721

rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_atombios.c

2723

rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_atombios.c

2791

rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_atombios.c

2792

rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_atombios.c

2827

u32 clock,

drivers/gpu/drm/radeon/radeon_atombios.c

2845

args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */

drivers/gpu/drm/radeon/radeon_atombios.c

2859

args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */

drivers/gpu/drm/radeon/radeon_atombios.c

2874

args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock);

drivers/gpu/drm/radeon/radeon_atombios.c

2892

args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock);

drivers/gpu/drm/radeon/radeon_atombios.c

2913

args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */

drivers/gpu/drm/radeon/radeon_atombios.c

2924

args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */

drivers/gpu/drm/radeon/radeon_atombios.c

2943

u32 clock,

drivers/gpu/drm/radeon/radeon_atombios.c

2962

args.ulClock = cpu_to_le32(clock); /* 10 khz */

drivers/gpu/drm/radeon/radeon_audio.c

440

static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)

drivers/gpu/drm/radeon/radeon_audio.c

447

radeon_encoder->audio->set_dto(rdev, crtc, clock);

drivers/gpu/drm/radeon/radeon_audio.c

494

static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)

drivers/gpu/drm/radeon/radeon_audio.c

501

cts = clock * 1000;

drivers/gpu/drm/radeon/radeon_audio.c

531

static const struct radeon_hdmi_acr *radeon_audio_acr(unsigned int clock)

drivers/gpu/drm/radeon/radeon_audio.c

553

if (hdmi_predefined_acr[i].clock == clock)

drivers/gpu/drm/radeon/radeon_audio.c

557

radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);

drivers/gpu/drm/radeon/radeon_audio.c

558

radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);

drivers/gpu/drm/radeon/radeon_audio.c

559

radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);

drivers/gpu/drm/radeon/radeon_audio.c

567

static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)

drivers/gpu/drm/radeon/radeon_audio.c

569

const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);

drivers/gpu/drm/radeon/radeon_audio.c

656

radeon_audio_set_dto(encoder, mode->clock);

drivers/gpu/drm/radeon/radeon_audio.c

659

radeon_audio_update_acr(encoder, mode->clock);

drivers/gpu/drm/radeon/radeon_audio.c

694

radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10);

drivers/gpu/drm/radeon/radeon_audio.h

55

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/radeon_audio.h

91

struct radeon_crtc *crtc, unsigned int clock);

drivers/gpu/drm/radeon/radeon_clocks.c

109

struct radeon_pll *p1pll = &rdev->clock.p1pll;

drivers/gpu/drm/radeon/radeon_clocks.c

110

struct radeon_pll *p2pll = &rdev->clock.p2pll;

drivers/gpu/drm/radeon/radeon_clocks.c

111

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_clocks.c

112

struct radeon_pll *mpll = &rdev->clock.mpll;

drivers/gpu/drm/radeon/radeon_clocks.c

148

rdev->clock.max_pixel_clock = 35000;

drivers/gpu/drm/radeon/radeon_clocks.c

157

rdev->clock.default_sclk = (*val) / 10;

drivers/gpu/drm/radeon/radeon_clocks.c

159

rdev->clock.default_sclk =

drivers/gpu/drm/radeon/radeon_clocks.c

164

rdev->clock.default_mclk = (*val) / 10;

drivers/gpu/drm/radeon/radeon_clocks.c

166

rdev->clock.default_mclk =

drivers/gpu/drm/radeon/radeon_clocks.c

183

struct radeon_pll *p1pll = &rdev->clock.p1pll;

drivers/gpu/drm/radeon/radeon_clocks.c

184

struct radeon_pll *p2pll = &rdev->clock.p2pll;

drivers/gpu/drm/radeon/radeon_clocks.c

185

struct radeon_pll *dcpll = &rdev->clock.dcpll;

drivers/gpu/drm/radeon/radeon_clocks.c

186

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_clocks.c

187

struct radeon_pll *mpll = &rdev->clock.mpll;

drivers/gpu/drm/radeon/radeon_clocks.c

228

rdev->clock.max_pixel_clock = 35000;

drivers/gpu/drm/radeon/radeon_clocks.c

271

rdev->clock.default_sclk =

drivers/gpu/drm/radeon/radeon_clocks.c

273

rdev->clock.default_mclk =

drivers/gpu/drm/radeon/radeon_clocks.c

340

if (!rdev->clock.default_sclk)

drivers/gpu/drm/radeon/radeon_clocks.c

341

rdev->clock.default_sclk = radeon_get_engine_clock(rdev);

drivers/gpu/drm/radeon/radeon_clocks.c

342

if ((!rdev->clock.default_mclk) && rdev->asic->pm.get_memory_clock)

drivers/gpu/drm/radeon/radeon_clocks.c

343

rdev->clock.default_mclk = radeon_get_memory_clock(rdev);

drivers/gpu/drm/radeon/radeon_clocks.c

345

rdev->pm.current_sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_clocks.c

346

rdev->pm.current_mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_clocks.c

355

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_clocks.c

42

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_clocks.c

72

struct radeon_pll *mpll = &rdev->clock.mpll;

drivers/gpu/drm/radeon/radeon_combios.c

1260

lvds->native_mode.clock = RBIOS16(tmp + 9) * 10;

drivers/gpu/drm/radeon/radeon_combios.c

2791

rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_combios.c

2792

rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_combios.c

718

struct radeon_pll *p1pll = &rdev->clock.p1pll;

drivers/gpu/drm/radeon/radeon_combios.c

719

struct radeon_pll *p2pll = &rdev->clock.p2pll;

drivers/gpu/drm/radeon/radeon_combios.c

720

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_combios.c

721

struct radeon_pll *mpll = &rdev->clock.mpll;

drivers/gpu/drm/radeon/radeon_combios.c

784

rdev->clock.default_sclk = sclk;

drivers/gpu/drm/radeon/radeon_combios.c

785

rdev->clock.default_mclk = mclk;

drivers/gpu/drm/radeon/radeon_combios.c

788

rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16);

drivers/gpu/drm/radeon/radeon_combios.c

790

rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */

drivers/gpu/drm/radeon/radeon_connectors.c

1453

(mode->clock > 135000))

drivers/gpu/drm/radeon/radeon_connectors.c

1456

if (radeon_connector->use_digital && (mode->clock > 165000)) {

drivers/gpu/drm/radeon/radeon_connectors.c

1463

if (mode->clock > 340000)

drivers/gpu/drm/radeon/radeon_connectors.c

1473

if ((mode->clock / 10) > rdev->clock.max_pixel_clock)

drivers/gpu/drm/radeon/radeon_connectors.c

1606

(rdev->clock.default_dispclk >= 53900) &&

drivers/gpu/drm/radeon/radeon_connectors.c

1757

if (mode->clock > 340000)

drivers/gpu/drm/radeon/radeon_connectors.c

1760

if (mode->clock > 165000)

drivers/gpu/drm/radeon/radeon_connectors.c

367

radeon_encoder->native_mode.clock = 0;

drivers/gpu/drm/radeon/radeon_connectors.c

435

native_mode->clock != 0) {

drivers/gpu/drm/radeon/radeon_connectors.c

698

(radeon_encoder->native_mode.clock == 0))

drivers/gpu/drm/radeon/radeon_connectors.c

753

if (!native_mode->clock) {

drivers/gpu/drm/radeon/radeon_connectors.c

765

if (!native_mode->clock) {

drivers/gpu/drm/radeon/radeon_connectors.c

976

if ((mode->clock / 10) > rdev->clock.max_pixel_clock)

drivers/gpu/drm/radeon/radeon_encoders.c

334

adjusted_mode->clock = native_mode->clock;

drivers/gpu/drm/radeon/radeon_i2c.c

203

static void set_clock(void *i2c_priv, int clock)

drivers/gpu/drm/radeon/radeon_i2c.c

212

val |= clock ? 0 : rec->en_clk_mask;

drivers/gpu/drm/radeon/radeon_kms.c

346

*value = rdev->clock.spll.reference_freq * 10;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

764

pll = &rdev->clock.p2pll;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

766

pll = &rdev->clock.p1pll;

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

770

if (mode->clock > 200000) /* range limits??? */

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

808

radeon_compute_pll_legacy(pll, mode->clock,

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

206

radeon_encoder->pixel_clock = adjusted_mode->clock;

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

801

if ((uint32_t)(mode->clock / 10) < tmds->tmds_pll[i].freq) {

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

952

radeon_encoder->pixel_clock = adjusted_mode->clock;

drivers/gpu/drm/radeon/radeon_legacy_tv.c

248

pll = &rdev->clock.p2pll;

drivers/gpu/drm/radeon/radeon_legacy_tv.c

250

pll = &rdev->clock.p1pll;

drivers/gpu/drm/radeon/radeon_mode.h

770

int id, u32 clock);

drivers/gpu/drm/radeon/radeon_pm.c

1361

rdev->pm.default_sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_pm.c

1362

rdev->pm.default_mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_pm.c

1363

rdev->pm.current_sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_pm.c

1364

rdev->pm.current_mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_pm.c

1424

rdev->pm.default_sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_pm.c

1425

rdev->pm.default_mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_pm.c

1426

rdev->pm.current_sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_pm.c

1427

rdev->pm.current_mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/radeon_uvd.c

958

unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rs690.c

100

else if (rdev->clock.default_mclk)

drivers/gpu/drm/radeon/rs690.c

101

rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk);

drivers/gpu/drm/radeon/rs690.c

327

a.full = dfixed_const(mode->clock);

drivers/gpu/drm/radeon/rs690.c

86

else if (rdev->clock.default_mclk) {

drivers/gpu/drm/radeon/rs690.c

87

rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk);

drivers/gpu/drm/radeon/rs780_dpm.c

1012

u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) /

drivers/gpu/drm/radeon/rs780_dpm.c

782

ps->sclk_low = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/rs780_dpm.c

783

ps->sclk_high = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/rs780_dpm.c

990

u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) /

drivers/gpu/drm/radeon/rv515.c

975

a.full = dfixed_const(mode->clock);

drivers/gpu/drm/radeon/rv6xx_dpm.c

139

u32 clock, struct rv6xx_sclk_stepping *step)

drivers/gpu/drm/radeon/rv6xx_dpm.c

145

clock, false, &dividers);

drivers/gpu/drm/radeon/rv6xx_dpm.c

154

step->vco_frequency = clock * step->post_divider;

drivers/gpu/drm/radeon/rv6xx_dpm.c

163

u32 ref_clk = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv6xx_dpm.c

1866

pl->mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/rv6xx_dpm.c

1867

pl->sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/rv6xx_dpm.c

297

u32 clock, u32 index)

drivers/gpu/drm/radeon/rv6xx_dpm.c

301

rv6xx_convert_clock_to_stepping(rdev, clock, &step);

drivers/gpu/drm/radeon/rv6xx_dpm.c

428

u32 ref_clk = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv6xx_dpm.c

549

u32 clock, enum r600_power_level level)

drivers/gpu/drm/radeon/rv6xx_dpm.c

551

u32 ref_clk = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv6xx_dpm.c

559

if (clock && pi->sclk_ss) {

drivers/gpu/drm/radeon/rv6xx_dpm.c

560

if (radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, clock, false, &dividers) == 0) {

drivers/gpu/drm/radeon/rv6xx_dpm.c

598

u32 entry, u32 clock)

drivers/gpu/drm/radeon/rv6xx_dpm.c

602

if (radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, clock, false, &dividers))

drivers/gpu/drm/radeon/rv6xx_dpm.c

655

u32 ref_clk = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/rv6xx_dpm.c

840

u32 ref_clk = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv730_dpm.c

169

u32 reference_clock = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/rv730_dpm.c

49

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv740_dpm.c

130

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv740_dpm.c

250

u32 reference_clock = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/rv770.c

788

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv770_dpm.c

2253

pl->mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/rv770_dpm.c

2254

pl->sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/rv770_dpm.c

405

u32 reference_clock = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/rv770_dpm.c

502

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/si.c

1320

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/si.c

2292

(u32)mode->clock);

drivers/gpu/drm/radeon/si.c

2294

(u32)mode->clock);

drivers/gpu/drm/radeon/si.c

2315

wm_high.disp_clk = mode->clock;

drivers/gpu/drm/radeon/si.c

2342

wm_low.disp_clk = mode->clock;

drivers/gpu/drm/radeon/si.c

2383

b.full = dfixed_const(mode->clock);

drivers/gpu/drm/radeon/si.c

2395

b.full = dfixed_const(mode->clock);

drivers/gpu/drm/radeon/si.c

6965

uint64_t clock;

drivers/gpu/drm/radeon/si.c

6969

clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) |

drivers/gpu/drm/radeon/si.c

6972

return clock;

drivers/gpu/drm/radeon/si_dpm.c

3108

rdev->clock.current_dispclk,

drivers/gpu/drm/radeon/si_dpm.c

4740

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/si_dpm.c

4862

u32 reference_clock = rdev->clock.mpll.reference_freq;

drivers/gpu/drm/radeon/si_dpm.c

5105

if (rdev->clock.current_dispclk <=

drivers/gpu/drm/radeon/si_dpm.c

6735

pl->mclk = rdev->clock.default_mclk;

drivers/gpu/drm/radeon/si_dpm.c

6736

pl->sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/trinity_dpm.c

1590

u64 disp_clk = rdev->clock.default_dispclk / 100;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1255

rcrtc->clock = devm_clk_get(rcdu->dev, name);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1256

if (IS_ERR(rcrtc->clock)) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1258

return PTR_ERR(rcrtc->clock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

211

unsigned long mode_clock = mode->clock * 1000;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

257

rcar_du_escr_divider(rcrtc->clock, mode_clock,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

264

mode_clock, params.clk == rcrtc->clock ? "cpg" : "ext",

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

561

ret = clk_prepare_enable(rcrtc->clock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

581

clk_disable_unprepare(rcrtc->clock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

590

clk_disable_unprepare(rcrtc->clock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

745

rcar_lvds_pclk_enable(bridge, mode->clock * 1000, dot_clk_only);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h

51

struct clk *clock;

drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c

315

ret = clk_prepare_enable(crtc->clock);

drivers/gpu/drm/renesas/rcar-du/rcar_du_group.c

321

clk_disable_unprepare(crtc->clock);

drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c

49

if (mode->clock > 297000)

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

434

lvds->info->pll_setup(lvds, mode->clock * 1000);

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

631

adjusted_mode->clock = clamp(adjusted_mode->clock, min_freq, 148500);

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

540

mode->clock * 1000, &setup_info);

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

900

if (mode->clock > 297000)

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c

67

unsigned long mode_clock = mode->clock * 1000;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.c

54

if (renc->output == RZG2L_DU_OUTPUT_DPAD0 && mode->clock > 83500)

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1088

if (mode->clock > dsi->info->max_dclk)

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1091

if (mode->clock < dsi->info->min_dclk)

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1097

status = dsi->info->dphy_mode_clk_check(dsi, mode->clock);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

758

ret = dsi->info->dphy_conf_clks(dsi, mode->clock, &hsfreq_millihz);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

889

if (mode->clock > 74250) {

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

136

if (sdev->clock)

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

137

clk_disable_unprepare(sdev->clock);

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

147

if (sdev->clock) {

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

148

ret = clk_prepare_enable(sdev->clock);

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

69

sdev->clock = clk;

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.h

34

struct clk *clock;

drivers/gpu/drm/rockchip/cdn-dp-core.c

288

requested = mode->clock * bpc * 3 / 1000;

drivers/gpu/drm/rockchip/cdn-dp-core.c

306

requested, actual, mode->clock);

drivers/gpu/drm/rockchip/cdn-dp-core.c

930

if (mode->clock &&

drivers/gpu/drm/rockchip/cdn-dp-reg.c

663

symbol = (u64)tu_size_reg * mode->clock * bit_per_pix;

drivers/gpu/drm/rockchip/cdn-dp-reg.c

670

mode->clock, dp->max_lanes, link_rate);

drivers/gpu/drm/rockchip/cdn-dp-reg.c

683

val = div_u64(mode->clock * (symbol + 1), 1000) + link_rate;

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

585

mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC);

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

598

phy_mipi_dphy_get_default_config(mode->clock * 1000 * 10 / 8,

drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c

143

lane_rate_kbps = mode->clock * bpp / lanes;

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

239

int pclk = mode->clock * 1000;

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

242

mode->clock > hdmi->chip_data->max_tmds_clock)

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

280

clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000);

drivers/gpu/drm/rockchip/rk3066_hdmi.c

349

hdmi->tmdsclk = mode->clock * 1000;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1243

rate = clk_round_rate(vop->dclk, adjusted_mode->clock * 1000);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1244

if (rate / 1000 != adjusted_mode->clock)

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1246

adjusted_mode->clock * 1000 + 999);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1247

adjusted_mode->clock = DIV_ROUND_UP(rate, 1000);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1477

clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1605

return us * mode->clock / mode->htotal / 1000;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1618

unsigned long clock = mode->crtc_clock * 1000;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1675

clock = vop2->ops->setup_intf_mux(vp, rkencoder->crtc_endpoint_id, polflags);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1678

if (!clock) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1735

clock *= 2;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1747

if (clock <= max_dclk) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1784

clk_set_rate(vp->dclk, clock);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1990

mode->clock, mode->crtc_clock, mode->type, mode->flags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1693

unsigned long clock;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1696

clock = rk3588_calc_cru_cfg(vp, id, &dclk_core_div, &dclk_out_div,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1698

if (!clock)

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1797

return clock;

drivers/gpu/drm/sitronix/st7920.c

708

mode->clock = 30;

drivers/gpu/drm/solomon/ssd130x.c

1868

mode->clock = 1;

drivers/gpu/drm/sti/sti_crtc.c

55

int rate = mode->clock * 1000;

drivers/gpu/drm/sti/sti_dvo.c

286

int rate = mode->clock * 1000;

drivers/gpu/drm/sti/sti_dvo.c

354

int target = mode->clock * 1000;

drivers/gpu/drm/sti/sti_gdp.c

671

if (mode->clock && gdp->clk_pix) {

drivers/gpu/drm/sti/sti_gdp.c

673

int rate = mode->clock * 1000;

drivers/gpu/drm/sti/sti_hda.c

543

hddac_rate = mode->clock * 1000 * 2;

drivers/gpu/drm/sti/sti_hda.c

547

hddac_rate = mode->clock * 1000 * 4;

drivers/gpu/drm/sti/sti_hda.c

561

ret = clk_set_rate(hda->clk_pix, mode->clock * 1000);

drivers/gpu/drm/sti/sti_hda.c

564

mode->clock * 1000);

drivers/gpu/drm/sti/sti_hda.c

614

int target = mode->clock * 1000;

drivers/gpu/drm/sti/sti_hdmi.c

1021

int target = mode->clock * 1000;

drivers/gpu/drm/sti/sti_hdmi.c

856

params->sample_rate, hdmi->mode.clock * 1000, n);

drivers/gpu/drm/sti/sti_hdmi.c

953

ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);

drivers/gpu/drm/sti/sti_hdmi.c

956

mode->clock * 1000);

drivers/gpu/drm/sti/sti_hdmi.c

959

ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);

drivers/gpu/drm/sti/sti_hdmi.c

962

mode->clock * 1000);

drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c

78

u32 ckpxpll = hdmi->mode.clock * 1000;

drivers/gpu/drm/sti/sti_hqvdp.c

1055

if (mode->clock && !sti_hqvdp_check_hw_scaling(hqvdp, mode,

drivers/gpu/drm/sti/sti_hqvdp.c

744

lfw /= max(src_w, dst_w) * mode->clock / 1000;

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

433

pll_out_khz = mode->clock * bpp / lanes;

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

505

pll_out_khz = mode->clock * bpp / lanes;

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

538

target_px_clock_hz = mode->clock * 1000;

drivers/gpu/drm/stm/ltdc.c

837

int target = mode->clock * 1000;

drivers/gpu/drm/stm/ltdc.c

882

int rate = mode->clock * 1000;

drivers/gpu/drm/stm/ltdc.c

889

adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000;

drivers/gpu/drm/stm/ltdc.c

892

mode->clock, adjusted_mode->clock);

drivers/gpu/drm/stm/lvds.c

713

lvds_pll_get_params(lvds, pll_in_khz, mode->clock * 7 / multiplier, &bdiv, &mdiv, &ndiv);

drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c

183

unsigned long long clock)

drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c

186

unsigned long diff = div_u64(clock, 200); /* +-0.5% allowed by HDMI spec */

drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c

193

if (clock > 165000000)

drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c

196

rounded_rate = clk_round_rate(hdmi->tmds_clk, clock);

drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c

198

max_t(unsigned long, rounded_rate, clock) -

drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c

199

min_t(unsigned long, rounded_rate, clock) < diff)

drivers/gpu/drm/sun4i/sun4i_rgb.c

69

unsigned long long rate = mode->clock * 1000;

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c

317

bool clock, u8 data,

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c

325

(clock ? SUN6I_DSI_INST_FUNC_LANE_CEN : 0) |

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c

462

delay = (hsync_porch / ((mode->clock / 1000) * 8));

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c

764

phy_mipi_dphy_get_default_config(mode->clock * 1000,

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c

37

if (mode->clock > 297000)

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c

52

if (mode->clock > 594000)

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

140

fps = (mode->clock * 1000) / (mode->vtotal * mode->htotal);

drivers/gpu/drm/sysfb/simpledrm.c

275

struct clk *clock;

drivers/gpu/drm/sysfb/simpledrm.c

292

clock = of_clk_get(of_node, i);

drivers/gpu/drm/sysfb/simpledrm.c

293

if (IS_ERR(clock)) {

drivers/gpu/drm/sysfb/simpledrm.c

294

ret = PTR_ERR(clock);

drivers/gpu/drm/sysfb/simpledrm.c

300

ret = clk_prepare_enable(clock);

drivers/gpu/drm/sysfb/simpledrm.c

304

clk_put(clock);

drivers/gpu/drm/sysfb/simpledrm.c

307

sdev->clks[i] = clock;

drivers/gpu/drm/tegra/dp.c

333

requirement = mode->clock * info->bpc * 3;

drivers/gpu/drm/tegra/dsi.c

966

state->pclk = crtc_state->mode.clock * 1000;

drivers/gpu/drm/tegra/hdmi.c

1145

unsigned long pclk = mode->clock * 1000;

drivers/gpu/drm/tegra/hdmi.c

1236

hdmi->pixel_clock = mode->clock * 1000;

drivers/gpu/drm/tegra/hdmi.c

1444

unsigned long pclk = crtc_state->mode.clock * 1000;

drivers/gpu/drm/tegra/plane.c

276

peak_bandwidth = DIV_ROUND_UP(crtc_state->adjusted_mode.clock * bpp, 8);

drivers/gpu/drm/tegra/rgb.c

154

unsigned long pclk = crtc_state->mode.clock * 1000;

drivers/gpu/drm/tegra/sor.c

1160

const u64 pclk = (u64)mode->clock * 1000;

drivers/gpu/drm/tegra/sor.c

1811

unsigned long pclk = crtc_state->mode.clock * 1000;

drivers/gpu/drm/tegra/sor.c

2199

if (mode->clock >= 340000 && scdc->supported) {

drivers/gpu/drm/tegra/sor.c

2263

pclk = mode->clock * 1000;

drivers/gpu/drm/tegra/sor.c

2343

if (mode->clock < 340000) {

drivers/gpu/drm/tegra/sor.c

2426

if (mode->clock >= 340000)

drivers/gpu/drm/tegra/sor.c

2437

if (mode->clock < 75000)

drivers/gpu/drm/tegra/sor.c

2487

settings = tegra_sor_hdmi_find_settings(sor, mode->clock * 1000);

drivers/gpu/drm/tegra/sor.c

2490

mode->clock * 1000);

drivers/gpu/drm/tests/drm_connector_test.c

1545

KUNIT_EXPECT_EQ(test, mode->clock * 1000ULL, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1566

KUNIT_EXPECT_EQ(test, mode->clock * 1250, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1605

KUNIT_EXPECT_EQ(test, mode->clock * 1500, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1644

KUNIT_EXPECT_EQ(test, (mode->clock * 1000ULL) * 2, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1667

KUNIT_EXPECT_EQ(test, (mode->clock * 1000ULL) / 2, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1705

KUNIT_EXPECT_EQ(test, mode->clock * 625, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1730

KUNIT_EXPECT_EQ(test, mode->clock * 750, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1752

KUNIT_EXPECT_EQ(test, mode->clock * 1000, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1774

KUNIT_EXPECT_EQ(test, mode->clock * 1000, rate);

drivers/gpu/drm/tests/drm_connector_test.c

1796

KUNIT_EXPECT_EQ(test, mode->clock * 1000, rate);

drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

16

const int clock;

drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

24

.clock = 154000,

drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

30

.clock = 234000,

drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

36

.clock = 297000,

drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

42

.clock = 332880,

drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

48

.clock = 324540,

drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

59

KUNIT_EXPECT_EQ(test, drm_dp_calc_pbn_mode(params->clock, params->bpp << 4),

drivers/gpu/drm/tests/drm_dp_mst_helper_test.c

65

sprintf(desc, "Clock %d BPP %d DSC %s", t->clock, t->bpp, t->dsc ? "enabled" : "disabled");

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1214

KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, preferred->clock * 1000);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1269

KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, preferred->clock * 1250);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1324

KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, preferred->clock * 1500);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1461

KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, preferred->clock * 1250);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1535

KUNIT_EXPECT_EQ(test, conn_state->hdmi.tmds_char_rate, yuv420_only_mode->clock * 625);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1827

rate = mode->clock * 1500;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2420

KUNIT_EXPECT_EQ(test, preferred->clock, 148500);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2448

KUNIT_EXPECT_EQ(test, preferred->clock, 25200);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

2509

KUNIT_EXPECT_EQ(test, preferred->clock, 25200);

drivers/gpu/drm/tidss/tidss_crtc.c

106

__func__, mode->hdisplay, mode->vdisplay, mode->clock);

drivers/gpu/drm/tidss/tidss_dispc.c

1305

unsigned long clock)

drivers/gpu/drm/tidss/tidss_dispc.c

1316

round_clock = clk_round_rate(dispc->vp_clk[hw_videoport], clock);

drivers/gpu/drm/tidss/tidss_dispc.c

1321

if (dispc_pclk_diff(clock, round_clock) > 5)

drivers/gpu/drm/tidss/tidss_dispc.c

1345

if (check_pixel_clock(dispc, hw_videoport, mode->clock * 1000))

drivers/gpu/drm/tidss/tidss_dispc.c

1384

bandwidth = 1000 * mode->clock;

drivers/gpu/drm/tidss/tidss_oldi.c

254

tidss_oldi_set_serial_clk(oldi, mode->clock * 7 * 1000);

drivers/gpu/drm/tidss/tidss_oldi.c

320

round_clock = clk_round_rate(oldi->serial, mode->clock * 7 * 1000);

drivers/gpu/drm/tidss/tidss_oldi.c

325

if (dispc_pclk_diff(mode->clock * 7 * 1000, round_clock) > 5)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

214

pclk_rate = crtc->mode.clock * 1000;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

255

tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

270

mode->clock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

787

drm_mode_vrefresh(mode), mode->clock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

830

if (mode->clock > priv->max_pixelclock) {

drivers/gpu/drm/tiny/arcpgu.c

146

long rate, clk_rate = mode->clock * 1000;

drivers/gpu/drm/tiny/panel-mipi-dbi.c

308

if (!mode->clock)

drivers/gpu/drm/tiny/panel-mipi-dbi.c

309

mode->clock = mode->htotal * mode->vtotal * 60 / 1000;

drivers/gpu/drm/tiny/pixpaper.c

931

.clock = PIXPAPER_PIXEL_CLOCK,

drivers/gpu/drm/udl/udl_modeset.c

163

u16 reg1b = mode->clock / 5;

drivers/gpu/drm/vboxvideo/vbox_mode.c

688

int clock = (width + 6) * (height + 6) * 60 / 10000;

drivers/gpu/drm/vboxvideo/vbox_mode.c

695

edid[54] = clock & 0xff;

drivers/gpu/drm/vboxvideo/vbox_mode.c

696

edid[55] = clock >> 8;

drivers/gpu/drm/vc4/vc4_crtc.c

763

vc4_state->hvs_load = max(mode->clock * mode->hdisplay / mode->htotal + 8000,

drivers/gpu/drm/vc4/vc4_crtc.c

764

mode->clock * 9 / 10) * 1000;

drivers/gpu/drm/vc4/vc4_crtc.c

766

vc4_state->hvs_load = mode->clock * 1000;

drivers/gpu/drm/vc4/vc4_dpi.c

238

ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);

drivers/gpu/drm/vc4/vc4_dsi.c

845

unsigned long pixel_clock_hz = mode->clock * 1000;

drivers/gpu/drm/vc4/vc4_dsi.c

863

adjusted_mode->clock = pixel_clock_hz / 1000;

drivers/gpu/drm/vc4/vc4_dsi.c

866

adjusted_mode->htotal = adjusted_mode->clock * mode->htotal /

drivers/gpu/drm/vc4/vc4_dsi.c

867

mode->clock;

drivers/gpu/drm/vc4/vc4_dsi.c

915

pixel_clock_hz = mode->clock * 1000;

drivers/gpu/drm/vc4/vc4_hdmi.c

138

unsigned long long clock = drm_hdmi_compute_mode_clock(mode, bpc, fmt);

drivers/gpu/drm/vc4/vc4_hdmi.c

140

return clock > HDMI_14_MAX_TMDS_CLK;

drivers/gpu/drm/vc4/vc4_hdmi.c

1722

unsigned long long clock)

drivers/gpu/drm/vc4/vc4_hdmi.c

1727

if (clock > vc4_hdmi->variant->max_pixel_clock)

drivers/gpu/drm/vc4/vc4_hdmi.c

1730

if (!vc4->hvs->vc5_hdmi_enable_hdmi_20 && clock > HDMI_14_MAX_TMDS_CLK)

drivers/gpu/drm/vc4/vc4_hdmi.c

1775

unsigned long long tmds_char_rate = mode->clock * 1000;

drivers/gpu/drm/vc4/vc4_hdmi.c

1808

mode->clock = 238560;

drivers/gpu/drm/vc4/vc4_hdmi.c

1809

tmds_char_rate = mode->clock * 1000;

drivers/gpu/drm/vc4/vc4_hdmi.c

1935

tmp = (u64)(mode->clock * 1000) * n;

drivers/gpu/drm/vc4/vc4_hdmi_phy.c

221

phy_get_vco_freq(unsigned long long clock, u8 *vco_sel, u8 *vco_div)

drivers/gpu/drm/vc4/vc4_hdmi_phy.c

223

unsigned long long vco_freq = clock;

drivers/gpu/drm/vc4/vc4_hdmi_phy.c

229

vco_freq = clock * _vco_div * 10;

drivers/gpu/drm/vc4/vc4_hdmi_phy.c

297

struct phy_lane_settings clock;

drivers/gpu/drm/vc4/vc4_hdmi_phy.c

392

return &settings->clock;

drivers/gpu/drm/vc4/vc4_hdmi_phy.c

654

struct vc6_phy_lane_settings clock;

drivers/gpu/drm/vc4/vc4_hdmi_phy.c

939

return &settings->clock;

drivers/gpu/drm/vc4/vc4_vec.c

204

struct clk *clock;

drivers/gpu/drm/vc4/vc4_vec.c

557

clk_disable_unprepare(vec->clock);

drivers/gpu/drm/vc4/vc4_vec.c

598

ret = clk_set_rate(vec->clock, 108000000);

drivers/gpu/drm/vc4/vc4_vec.c

604

ret = clk_prepare_enable(vec->clock);

drivers/gpu/drm/vc4/vc4_vec.c

798

vec->clock = devm_clk_get(dev, NULL);

drivers/gpu/drm/vc4/vc4_vec.c

799

if (IS_ERR(vec->clock)) {

drivers/gpu/drm/vc4/vc4_vec.c

800

ret = PTR_ERR(vec->clock);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1378

mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

165

new_state->adjusted_mode.crtc_clock = new_state->mode.clock;

drivers/gpu/drm/xlnx/zynqmp_dp.c

1313

vid_kbytes = mode->clock * (dp->config.bpp / 8);

drivers/gpu/drm/xlnx/zynqmp_dp.c

1368

zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_M_VID, mode->clock);

drivers/gpu/drm/xlnx/zynqmp_dp.c

1529

if (mode->clock > ZYNQMP_MAX_FREQ) {

drivers/gpu/drm/xlnx/zynqmp_dp.c

1541

if (mode->clock > rate) {

drivers/gpu/drm/xlnx/zynqmp_dp.c

1587

if (mode->clock > rate) {

drivers/gpu/drm/xlnx/zynqmp_dp.c

1594

ret = zynqmp_dp_mode_configure(dp, adjusted_mode->clock, 0);

drivers/gpu/drm/xlnx/zynqmp_dp.c

1666

int vrefresh = (adjusted_mode->clock * 1000) /

drivers/gpu/drm/xlnx/zynqmp_dp.c

1673

adjusted_mode->clock = adjusted_mode->vtotal *

drivers/gpu/drm/xlnx/zynqmp_kms.c

204

zynqmp_disp_setup_clock(dpsub->disp, adjusted_mode->clock * 1000);

drivers/gpu/drm/xlnx/zynqmp_kms.c

216

vrefresh = (adjusted_mode->clock * 1000) /

drivers/hid/hid-ft260.c

170

__le16 clock; /* I2C bus clock in range 60-3400 KHz */

drivers/hid/hid-ft260.c

203

__le16 clock; /* I2C bus clock in range 60-3400 KHz */

drivers/hid/hid-ft260.c

246

u16 clock;

drivers/hid/hid-ft260.c

333

dev->clock = le16_to_cpu(report.clock);

drivers/hid/hid-ft260.c

335

dev->clock);

drivers/hid/hid-ft260.c

387

usec = len * 9000 / dev->clock;

drivers/hid/hid-ft260.c

926

FT260_I2CST_ATTR_SHOW(clock);

drivers/hid/hid-ft260.c

927

FT260_WORD_ATTR_STORE(clock, ft260_set_i2c_speed_report,

drivers/hid/hid-ft260.c

929

static DEVICE_ATTR_RW(clock);

drivers/hwmon/f71805f.c

249

unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;

drivers/hwmon/f71805f.c

254

return clock / (reg << 8);

drivers/hwmon/max6650.c

279

ktach = ((clock * kscale) / (256 * rpm / 60)) - 1;

drivers/hwmon/max6650.c

41

static int clock = 254000;

drivers/hwmon/max6650.c

45

module_param(clock, int, 0444);

drivers/hwmon/max6650.c

575

*val = 60 * DIV_FROM_REG(data->config) * clock /

drivers/hwmon/w83627hf.c

308

unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;

drivers/hwmon/w83627hf.c

314

return clock / (reg << 8);

drivers/i2c/algos/i2c-algo-pca.c

399

int clock;

drivers/i2c/algos/i2c-algo-pca.c

440

clock = pca_clock(pca_data);

drivers/i2c/algos/i2c-algo-pca.c

442

adap->name, freqs[clock]);

drivers/i2c/algos/i2c-algo-pca.c

445

pca_data->bus_settings.clock_freq = clock;

drivers/i2c/algos/i2c-algo-pca.c

449

int clock;

drivers/i2c/algos/i2c-algo-pca.c

476

clock = pca_clock(pca_data) / 100;

drivers/i2c/algos/i2c-algo-pca.c

504

if (clock < 648) {

drivers/i2c/algos/i2c-algo-pca.c

506

thi = 1000000 - clock * raise_fall_time;

drivers/i2c/algos/i2c-algo-pca.c

507

thi /= (I2C_PCA_OSC_PER * clock) - tlow;

drivers/i2c/algos/i2c-algo-pca.c

509

tlow = (1000000 - clock * raise_fall_time) * min_tlow;

drivers/i2c/algos/i2c-algo-pca.c

510

tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);

drivers/i2c/algos/i2c-algo-pca.c

522

"%s: Clock frequency is %dHz\n", adap->name, clock * 100);

drivers/i2c/busses/i2c-elektor.c

231

clock = I2C_PCF_CLK | I2C_PCF_TRNS90;

drivers/i2c/busses/i2c-elektor.c

318

module_param(clock, int, 0);

drivers/i2c/busses/i2c-elektor.c

41

static int clock = 0x1c;

drivers/i2c/busses/i2c-elektor.c

92

return (clock);

drivers/i2c/busses/i2c-mpc.c

109

void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock);

drivers/i2c/busses/i2c-mpc.c

237

static int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,

drivers/i2c/busses/i2c-mpc.c

246

if (clock == MPC_I2C_CLOCK_LEGACY) {

drivers/i2c/busses/i2c-mpc.c

253

divider = mpc5xxx_fwnode_get_bus_frequency(fwnode) / clock;

drivers/i2c/busses/i2c-mpc.c

274

u32 clock)

drivers/i2c/busses/i2c-mpc.c

278

if (clock == MPC_I2C_CLOCK_PRESERVE) {

drivers/i2c/busses/i2c-mpc.c

284

ret = mpc_i2c_get_fdr_52xx(node, clock, &i2c->real_clk);

drivers/i2c/busses/i2c-mpc.c

296

u32 clock)

drivers/i2c/busses/i2c-mpc.c

304

u32 clock)

drivers/i2c/busses/i2c-mpc.c

325

mpc_i2c_setup_52xx(node, i2c, clock);

drivers/i2c/busses/i2c-mpc.c

330

u32 clock)

drivers/i2c/busses/i2c-mpc.c

422

static int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,

drivers/i2c/busses/i2c-mpc.c

430

if (clock == MPC_I2C_CLOCK_LEGACY) {

drivers/i2c/busses/i2c-mpc.c

436

divider = fsl_get_sys_freq() / clock / prescaler;

drivers/i2c/busses/i2c-mpc.c

439

fsl_get_sys_freq(), clock, divider);

drivers/i2c/busses/i2c-mpc.c

457

u32 clock)

drivers/i2c/busses/i2c-mpc.c

461

if (clock == MPC_I2C_CLOCK_PRESERVE) {

drivers/i2c/busses/i2c-mpc.c

468

ret = mpc_i2c_get_fdr_8xxx(node, clock, &i2c->real_clk);

drivers/i2c/busses/i2c-mpc.c

482

u32 clock)

drivers/i2c/busses/i2c-mpc.c

780

u32 clock;

drivers/i2c/busses/i2c-mpc.c

817

clock = MPC_I2C_CLOCK_PRESERVE;

drivers/i2c/busses/i2c-mpc.c

820

"clock-frequency", &clock);

drivers/i2c/busses/i2c-mpc.c

822

clock = MPC_I2C_CLOCK_LEGACY;

drivers/i2c/busses/i2c-mpc.c

827

data->setup(op->dev.of_node, i2c, clock);

drivers/i2c/busses/i2c-mpc.c

831

mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock);

drivers/i2c/busses/i2c-mv64xxx.c

114

u8 clock;

drivers/i2c/busses/i2c-mv64xxx.c

160

.clock = 0x0c,

drivers/i2c/busses/i2c-mv64xxx.c

170

.clock = 0x14,

drivers/i2c/busses/i2c-mv64xxx.c

216

drv_data->reg_base + drv_data->reg_offsets.clock);

drivers/i2c/busses/i2c-pca-isa.c

147

pca_isa_data.i2c_clock = clock;

drivers/i2c/busses/i2c-pca-isa.c

193

module_param(clock, int, 0);

drivers/i2c/busses/i2c-pca-isa.c

194

MODULE_PARM_DESC(clock, "Clock rate in hertz.\n\t\t"

drivers/i2c/busses/i2c-pca-isa.c

32

static int clock = 59000;

drivers/iio/adc/ad7173.c

1015

.clock = 2 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1034

.clock = 8 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1053

.clock = 4 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1070

.clock = 2 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1086

.clock = 2 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1103

.clock = 2 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1120

.clock = 16 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1138

.clock = 16 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1152

.clock = 16 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1169

.clock = 16 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

1612

return st->info->clock / HZ_PER_KHZ;

drivers/iio/adc/ad7173.c

180

unsigned int clock;

drivers/iio/adc/ad7173.c

956

.clock = 2 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

977

.clock = 2 * HZ_PER_MHZ,

drivers/iio/adc/ad7173.c

996

.clock = 2 * HZ_PER_MHZ,

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

318

bool cycle, int clock, int temp_dis)

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

322

if (clock < 0)

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

323

clock = st->chip_config.clk;

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

327

val = clock & INV_MPU6050_BIT_CLK_MASK;

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

340

unsigned int clock)

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

349

ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, clock, -1);

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

352

st->chip_config.clk = clock;

drivers/input/keyboard/lm8323.c

325

int clock = (CLK_SLOWCLKEN | CLK_RCPWM_EXTERNAL);

drivers/input/keyboard/lm8323.c

337

lm8323_write(lm, 2, LM8323_CMD_WRITE_CLOCK, clock);

drivers/isdn/hardware/mISDN/hfcmulti.c

211

static int clock;

drivers/isdn/hardware/mISDN/hfcmulti.c

229

module_param(clock, int, S_IRUGO | S_IWUSR);

drivers/isdn/hardware/mISDN/hfcmulti.c

5209

if (clock == HFC_cnt + 1)

drivers/isdn/hardware/mISDN/hfcmulti.c

5495

if (!clock)

drivers/isdn/hardware/mISDN/hfcmulti.c

5496

clock = 1;

drivers/md/dm-vdo/indexer/volume.c

1504

atomic64_set(&cache->clock, 1);

drivers/md/dm-vdo/indexer/volume.c

218

if (atomic64_read(&cache->clock) != READ_ONCE(page->last_used))

drivers/md/dm-vdo/indexer/volume.c

219

WRITE_ONCE(page->last_used, atomic64_inc_return(&cache->clock));

drivers/md/dm-vdo/indexer/volume.h

96

atomic64_t clock;

drivers/md/dm-vdo/time-utils.h

18

static inline ktime_t current_time_ns(clockid_t clock)

drivers/md/dm-vdo/time-utils.h

20

return clock == CLOCK_MONOTONIC ? ktime_get_ns() : ktime_get_real_ns();

drivers/media/dvb-frontends/af9013.c

128

if (coeff_lut[i].clock == state->clk &&

drivers/media/dvb-frontends/af9013_priv.h

31

u32 clock;

drivers/media/dvb-frontends/af9033.c

1087

if (dev->cfg.clock != 12000000) {

drivers/media/dvb-frontends/af9033.c

109

utmp = div_u64((u64)dev->cfg.clock * 0x80000, 1000000);

drivers/media/dvb-frontends/af9033.c

1091

dev->cfg.clock);

drivers/media/dvb-frontends/af9033.c

118

dev_dbg(&client->dev, "clk=%u clk_cw=%08x\n", dev->cfg.clock, utmp);

drivers/media/dvb-frontends/af9033.c

122

if (clock_adc_lut[i].clock == dev->cfg.clock)

drivers/media/dvb-frontends/af9033.c

127

dev->cfg.clock);

drivers/media/dvb-frontends/af9033.c

392

if (coeff_lut[i].clock == dev->cfg.clock &&

drivers/media/dvb-frontends/af9033.c

400

dev->cfg.clock);

drivers/media/dvb-frontends/af9033.c

414

if (clock_adc_lut[i].clock == dev->cfg.clock)

drivers/media/dvb-frontends/af9033.c

420

dev->cfg.clock);

drivers/media/dvb-frontends/af9033.h

21

u32 clock;

drivers/media/dvb-frontends/af9033_priv.h

31

u32 clock;

drivers/media/dvb-frontends/af9033_priv.h

37

u32 clock;

drivers/media/dvb-frontends/drxd.h

23

u32 clock;

drivers/media/dvb-frontends/drxd_hard.c

2441

u32 ulClock = state->config.clock;

drivers/media/dvb-frontends/m88ds3103.c

1680

pdata.clk = cfg->clock;

drivers/media/dvb-frontends/m88ds3103.c

1785

dev->config.clock = pdata->clk;

drivers/media/dvb-frontends/m88ds3103.h

114

u32 clock;

drivers/media/dvb-frontends/mxl5xx.c

49

u32 clock;

drivers/media/dvb-frontends/stv0367.c

892

enum stv0367_clk_pol clock)

drivers/media/dvb-frontends/stv0367.c

900

switch (clock) {

drivers/media/i2c/hi846.c

1157

struct clk *clock;

drivers/media/i2c/hi846.c

1639

ret = clk_prepare_enable(hi846->clock);

drivers/media/i2c/hi846.c

1668

clk_disable_unprepare(hi846->clock);

drivers/media/i2c/hi846.c

2055

hi846->clock = devm_v4l2_sensor_clk_get(&client->dev, NULL);

drivers/media/i2c/hi846.c

2056

if (IS_ERR(hi846->clock))

drivers/media/i2c/hi846.c

2057

return dev_err_probe(&client->dev, PTR_ERR(hi846->clock),

drivers/media/i2c/hi846.c

2059

hi846->clock);

drivers/media/i2c/hi846.c

2061

mclk_freq = clk_get_rate(hi846->clock);

drivers/media/i2c/s5c73m3/s5c73m3-core.c

1371

ret = clk_prepare_enable(state->clock);

drivers/media/i2c/s5c73m3/s5c73m3-core.c

1376

clk_get_rate(state->clock));

drivers/media/i2c/s5c73m3/s5c73m3-core.c

1398

clk_prepare_enable(state->clock);

drivers/media/i2c/s5c73m3/s5c73m3-core.c

1410

clk_disable_unprepare(state->clock);

drivers/media/i2c/s5c73m3/s5c73m3-core.c

1555

state->clock = devm_v4l2_sensor_clk_get_legacy(dev, S5C73M3_CLK_NAME,

drivers/media/i2c/s5c73m3/s5c73m3-core.c

1558

if (IS_ERR(state->clock))

drivers/media/i2c/s5c73m3/s5c73m3-core.c

1559

return dev_err_probe(dev, PTR_ERR(state->clock),

drivers/media/i2c/s5c73m3/s5c73m3.h

383

struct clk *clock;

drivers/media/i2c/s5k5baf.c

1957

state->clock = devm_v4l2_sensor_clk_get_legacy(state->sd.dev,

drivers/media/i2c/s5k5baf.c

1960

if (IS_ERR(state->clock)) {

drivers/media/i2c/s5k5baf.c

1961

ret = PTR_ERR(state->clock);

drivers/media/i2c/s5k5baf.c

286

struct clk *clock;

drivers/media/i2c/s5k5baf.c

578

unsigned long mclk = clk_get_rate(state->clock) / 1000;

drivers/media/i2c/s5k5baf.c

948

ret = clk_prepare_enable(state->clock);

drivers/media/i2c/s5k5baf.c

953

clk_get_rate(state->clock));

drivers/media/i2c/s5k5baf.c

978

if (!IS_ERR(state->clock))

drivers/media/i2c/s5k5baf.c

979

clk_disable_unprepare(state->clock);

drivers/media/i2c/s5k6a3.c

201

ret = clk_prepare_enable(sensor->clock);

drivers/media/i2c/s5k6a3.c

222

clk_disable_unprepare(sensor->clock);

drivers/media/i2c/s5k6a3.c

240

clk_disable_unprepare(sensor->clock);

drivers/media/i2c/s5k6a3.c

289

sensor->clock = devm_v4l2_sensor_clk_get_legacy(sensor->dev,

drivers/media/i2c/s5k6a3.c

292

if (IS_ERR(sensor->clock))

drivers/media/i2c/s5k6a3.c

293

return dev_err_probe(sensor->dev, PTR_ERR(sensor->clock),

drivers/media/i2c/s5k6a3.c

64

struct clk *clock;

drivers/media/pci/cx23885/cx23885-dvb.c

886

.clock = 27000000,

drivers/media/pci/cx23885/cx23885-dvb.c

899

.clock = 27000000,

drivers/media/pci/cx23885/cx23885-dvb.c

912

.clock = 27000000,

drivers/media/pci/ngene/ngene-cards.c

1124

.clock = 20000,

drivers/media/pci/ngene/ngene-cards.c

1135

.clock = 20000,

drivers/media/pci/ngene/ngene-dvb.c

160

void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags)

drivers/media/pci/ngene/ngene-dvb.c

253

void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags)

drivers/media/pci/ngene/ngene.h

836

void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags);

drivers/media/pci/ngene/ngene.h

837

void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags);

drivers/media/pci/pt1/pt1.c

1036

int clock, int data, int next_addr)

drivers/media/pci/pt1/pt1.c

1039

!clock << 11 | !data << 10 | next_addr);

drivers/media/pci/saa7134/saa7134-tvaudio.c

970

int clock = saa7134_boards[dev->board].audio_clock;

drivers/media/pci/saa7134/saa7134-tvaudio.c

973

clock = audio_clock_override;

drivers/media/pci/saa7134/saa7134-tvaudio.c

984

saa_writeb(SAA7134_AUDIO_CLOCK0, clock & 0xff);

drivers/media/pci/saa7134/saa7134-tvaudio.c

985

saa_writeb(SAA7134_AUDIO_CLOCK1, (clock >> 8) & 0xff);

drivers/media/pci/saa7134/saa7134-tvaudio.c

986

saa_writeb(SAA7134_AUDIO_CLOCK2, (clock >> 16) & 0xff);

drivers/media/pci/saa7134/saa7134-tvaudio.c

994

saa_writel(0x598 >> 2, clock);

drivers/media/pci/smipcie/smipcie-main.c

514

.clock = 27000000,

drivers/media/pci/smipcie/smipcie-main.c

570

.clock = 27000000,

drivers/media/platform/broadcom/bcm2835-unicam.c

190

struct clk *clock;

drivers/media/platform/broadcom/bcm2835-unicam.c

2391

ret = clk_set_rate(unicam->clock, 100 * 1000 * 1000);

drivers/media/platform/broadcom/bcm2835-unicam.c

2397

ret = clk_prepare_enable(unicam->clock);

drivers/media/platform/broadcom/bcm2835-unicam.c

2418

clk_disable_unprepare(unicam->clock);

drivers/media/platform/broadcom/bcm2835-unicam.c

2667

unicam->clock = devm_clk_get(&pdev->dev, "lp");

drivers/media/platform/broadcom/bcm2835-unicam.c

2668

if (IS_ERR(unicam->clock)) {

drivers/media/platform/broadcom/bcm2835-unicam.c

2670

ret = PTR_ERR(unicam->clock);

drivers/media/platform/qcom/camss/camss-csid.c

1151

while (res->clock[csid->nclocks])

drivers/media/platform/qcom/camss/camss-csid.c

1154

csid->clock = devm_kcalloc(dev, csid->nclocks, sizeof(*csid->clock),

drivers/media/platform/qcom/camss/camss-csid.c

1156

if (!csid->clock)

drivers/media/platform/qcom/camss/camss-csid.c

1160

struct camss_clock *clock = &csid->clock[i];

drivers/media/platform/qcom/camss/camss-csid.c

1162

clock->clk = devm_clk_get(dev, res->clock[i]);

drivers/media/platform/qcom/camss/camss-csid.c

1163

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-csid.c

1164

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-csid.c

1166

clock->name = res->clock[i];

drivers/media/platform/qcom/camss/camss-csid.c

1168

clock->nfreqs = 0;

drivers/media/platform/qcom/camss/camss-csid.c

1169

while (res->clock_rate[i][clock->nfreqs])

drivers/media/platform/qcom/camss/camss-csid.c

1170

clock->nfreqs++;

drivers/media/platform/qcom/camss/camss-csid.c

1172

if (!clock->nfreqs) {

drivers/media/platform/qcom/camss/camss-csid.c

1173

clock->freq = NULL;

drivers/media/platform/qcom/camss/camss-csid.c

1177

clock->freq = devm_kcalloc(dev,

drivers/media/platform/qcom/camss/camss-csid.c

1178

clock->nfreqs,

drivers/media/platform/qcom/camss/camss-csid.c

1179

sizeof(*clock->freq),

drivers/media/platform/qcom/camss/camss-csid.c

1181

if (!clock->freq)

drivers/media/platform/qcom/camss/camss-csid.c

1184

for (j = 0; j < clock->nfreqs; j++)

drivers/media/platform/qcom/camss/camss-csid.c

1185

clock->freq[j] = res->clock_rate[i][j];

drivers/media/platform/qcom/camss/camss-csid.c

553

struct camss_clock *clock = &csid->clock[i];

drivers/media/platform/qcom/camss/camss-csid.c

555

if (!strcmp(clock->name, "csi0") ||

drivers/media/platform/qcom/camss/camss-csid.c

556

!strcmp(clock->name, "csi1") ||

drivers/media/platform/qcom/camss/camss-csid.c

557

!strcmp(clock->name, "csi2") ||

drivers/media/platform/qcom/camss/camss-csid.c

558

!strcmp(clock->name, "csi3")) {

drivers/media/platform/qcom/camss/camss-csid.c

564

for (j = 0; j < clock->nfreqs; j++)

drivers/media/platform/qcom/camss/camss-csid.c

565

if (min_rate < clock->freq[j])

drivers/media/platform/qcom/camss/camss-csid.c

568

if (j == clock->nfreqs) {

drivers/media/platform/qcom/camss/camss-csid.c

577

j = clock->nfreqs - 1;

drivers/media/platform/qcom/camss/camss-csid.c

579

rate = clk_round_rate(clock->clk, clock->freq[j]);

drivers/media/platform/qcom/camss/camss-csid.c

586

ret = clk_set_rate(clock->clk, rate);

drivers/media/platform/qcom/camss/camss-csid.c

591

} else if (clock->nfreqs) {

drivers/media/platform/qcom/camss/camss-csid.c

592

clk_set_rate(clock->clk, clock->freq[0]);

drivers/media/platform/qcom/camss/camss-csid.c

714

ret = camss_enable_clocks(csid->nclocks, csid->clock, dev);

drivers/media/platform/qcom/camss/camss-csid.c

729

camss_disable_clocks(csid->nclocks, csid->clock);

drivers/media/platform/qcom/camss/camss-csid.c

739

camss_disable_clocks(csid->nclocks, csid->clock);

drivers/media/platform/qcom/camss/camss-csid.h

158

struct camss_clock *clock;

drivers/media/platform/qcom/camss/camss-csiphy.c

153

struct camss_clock *clock = &csiphy->clock[i];

drivers/media/platform/qcom/camss/camss-csiphy.c

161

for (j = 0; j < clock->nfreqs; j++)

drivers/media/platform/qcom/camss/camss-csiphy.c

162

if (min_rate < clock->freq[j])

drivers/media/platform/qcom/camss/camss-csiphy.c

165

if (j == clock->nfreqs) {

drivers/media/platform/qcom/camss/camss-csiphy.c

174

j = clock->nfreqs - 1;

drivers/media/platform/qcom/camss/camss-csiphy.c

176

round_rate = clk_round_rate(clock->clk, clock->freq[j]);

drivers/media/platform/qcom/camss/camss-csiphy.c

185

ret = clk_set_rate(clock->clk, csiphy->timer_clk_rate);

drivers/media/platform/qcom/camss/camss-csiphy.c

230

ret = camss_enable_clocks(csiphy->nclocks, csiphy->clock, dev);

drivers/media/platform/qcom/camss/camss-csiphy.c

246

camss_disable_clocks(csiphy->nclocks, csiphy->clock);

drivers/media/platform/qcom/camss/camss-csiphy.c

635

while (res->clock[csiphy->nclocks])

drivers/media/platform/qcom/camss/camss-csiphy.c

638

csiphy->clock = devm_kcalloc(dev,

drivers/media/platform/qcom/camss/camss-csiphy.c

639

csiphy->nclocks, sizeof(*csiphy->clock),

drivers/media/platform/qcom/camss/camss-csiphy.c

641

if (!csiphy->clock)

drivers/media/platform/qcom/camss/camss-csiphy.c

652

struct camss_clock *clock = &csiphy->clock[i];

drivers/media/platform/qcom/camss/camss-csiphy.c

654

clock->clk = devm_clk_get(dev, res->clock[i]);

drivers/media/platform/qcom/camss/camss-csiphy.c

655

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-csiphy.c

656

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-csiphy.c

658

clock->name = res->clock[i];

drivers/media/platform/qcom/camss/camss-csiphy.c

660

clock->nfreqs = 0;

drivers/media/platform/qcom/camss/camss-csiphy.c

661

while (res->clock_rate[i][clock->nfreqs])

drivers/media/platform/qcom/camss/camss-csiphy.c

662

clock->nfreqs++;

drivers/media/platform/qcom/camss/camss-csiphy.c

664

if (!clock->nfreqs) {

drivers/media/platform/qcom/camss/camss-csiphy.c

665

clock->freq = NULL;

drivers/media/platform/qcom/camss/camss-csiphy.c

669

clock->freq = devm_kcalloc(dev,

drivers/media/platform/qcom/camss/camss-csiphy.c

670

clock->nfreqs,

drivers/media/platform/qcom/camss/camss-csiphy.c

671

sizeof(*clock->freq),

drivers/media/platform/qcom/camss/camss-csiphy.c

673

if (!clock->freq)

drivers/media/platform/qcom/camss/camss-csiphy.c

676

for (j = 0; j < clock->nfreqs; j++)

drivers/media/platform/qcom/camss/camss-csiphy.c

677

clock->freq[j] = res->clock_rate[i][j];

drivers/media/platform/qcom/camss/camss-csiphy.c

679

csiphy->rate_set[i] = csiphy_match_clock_name(clock->name,

drivers/media/platform/qcom/camss/camss-csiphy.c

686

csiphy->rate_set[i] = csiphy_match_clock_name(clock->name,

drivers/media/platform/qcom/camss/camss-csiphy.c

693

csiphy->rate_set[i] = csiphy_match_clock_name(clock->name, "csiphy%d", csiphy->id);

drivers/media/platform/qcom/camss/camss-csiphy.h

105

struct camss_clock *clock;

drivers/media/platform/qcom/camss/camss-ispif.c

1188

while (res->clock[ispif->nclocks])

drivers/media/platform/qcom/camss/camss-ispif.c

1191

ispif->clock = devm_kcalloc(dev,

drivers/media/platform/qcom/camss/camss-ispif.c

1192

ispif->nclocks, sizeof(*ispif->clock),

drivers/media/platform/qcom/camss/camss-ispif.c

1194

if (!ispif->clock)

drivers/media/platform/qcom/camss/camss-ispif.c

1198

struct camss_clock *clock = &ispif->clock[i];

drivers/media/platform/qcom/camss/camss-ispif.c

1200

clock->clk = devm_clk_get(dev, res->clock[i]);

drivers/media/platform/qcom/camss/camss-ispif.c

1201

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-ispif.c

1202

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-ispif.c

1204

clock->freq = NULL;

drivers/media/platform/qcom/camss/camss-ispif.c

1205

clock->nfreqs = 0;

drivers/media/platform/qcom/camss/camss-ispif.c

1220

struct camss_clock *clock = &ispif->clock_for_reset[i];

drivers/media/platform/qcom/camss/camss-ispif.c

1222

clock->clk = devm_clk_get(dev, res->clock_for_reset[i]);

drivers/media/platform/qcom/camss/camss-ispif.c

1223

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-ispif.c

1224

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-ispif.c

1226

clock->freq = NULL;

drivers/media/platform/qcom/camss/camss-ispif.c

1227

clock->nfreqs = 0;

drivers/media/platform/qcom/camss/camss-ispif.c

379

ret = camss_enable_clocks(ispif->nclocks, ispif->clock, dev);

drivers/media/platform/qcom/camss/camss-ispif.c

388

camss_disable_clocks(ispif->nclocks, ispif->clock);

drivers/media/platform/qcom/camss/camss-ispif.c

401

camss_disable_clocks(ispif->nclocks, ispif->clock);

drivers/media/platform/qcom/camss/camss-ispif.h

55

struct camss_clock *clock;

drivers/media/platform/qcom/camss/camss-vfe.c

1001

j = clock->nfreqs - 1;

drivers/media/platform/qcom/camss/camss-vfe.c

1003

rate = clk_round_rate(clock->clk, clock->freq[j]);

drivers/media/platform/qcom/camss/camss-vfe.c

1010

ret = clk_set_rate(clock->clk, rate);

drivers/media/platform/qcom/camss/camss-vfe.c

1042

struct camss_clock *clock = &vfe->clock[i];

drivers/media/platform/qcom/camss/camss-vfe.c

1044

if (vfe_match_clock_names(vfe, clock) && vfe_check_clock_levels(clock)) {

drivers/media/platform/qcom/camss/camss-vfe.c

1069

rate = clk_get_rate(clock->clk);

drivers/media/platform/qcom/camss/camss-vfe.c

1103

ret = camss_enable_clocks(vfe->nclocks, vfe->clock,

drivers/media/platform/qcom/camss/camss-vfe.c

1129

camss_disable_clocks(vfe->nclocks, vfe->clock);

drivers/media/platform/qcom/camss/camss-vfe.c

1158

camss_disable_clocks(vfe->nclocks, vfe->clock);

drivers/media/platform/qcom/camss/camss-vfe.c

1862

while (res->clock[vfe->nclocks])

drivers/media/platform/qcom/camss/camss-vfe.c

1865

vfe->clock = devm_kcalloc(dev, vfe->nclocks, sizeof(*vfe->clock),

drivers/media/platform/qcom/camss/camss-vfe.c

1867

if (!vfe->clock)

drivers/media/platform/qcom/camss/camss-vfe.c

1871

struct camss_clock *clock = &vfe->clock[i];

drivers/media/platform/qcom/camss/camss-vfe.c

1873

clock->clk = devm_clk_get(dev, res->clock[i]);

drivers/media/platform/qcom/camss/camss-vfe.c

1874

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-vfe.c

1875

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-vfe.c

1877

clock->name = res->clock[i];

drivers/media/platform/qcom/camss/camss-vfe.c

1879

clock->nfreqs = 0;

drivers/media/platform/qcom/camss/camss-vfe.c

1880

while (res->clock_rate[i][clock->nfreqs])

drivers/media/platform/qcom/camss/camss-vfe.c

1881

clock->nfreqs++;

drivers/media/platform/qcom/camss/camss-vfe.c

1883

if (!clock->nfreqs) {

drivers/media/platform/qcom/camss/camss-vfe.c

1884

clock->freq = NULL;

drivers/media/platform/qcom/camss/camss-vfe.c

1888

clock->freq = devm_kcalloc(dev,

drivers/media/platform/qcom/camss/camss-vfe.c

1889

clock->nfreqs,

drivers/media/platform/qcom/camss/camss-vfe.c

1890

sizeof(*clock->freq),

drivers/media/platform/qcom/camss/camss-vfe.c

1892

if (!clock->freq)

drivers/media/platform/qcom/camss/camss-vfe.c

1895

for (j = 0; j < clock->nfreqs; j++)

drivers/media/platform/qcom/camss/camss-vfe.c

1896

clock->freq[j] = res->clock_rate[i][j];

drivers/media/platform/qcom/camss/camss-vfe.c

909

struct camss_clock *clock)

drivers/media/platform/qcom/camss/camss-vfe.c

917

return (!strcmp(clock->name, vfe_name) ||

drivers/media/platform/qcom/camss/camss-vfe.c

918

!strcmp(clock->name, vfe_lite_name) ||

drivers/media/platform/qcom/camss/camss-vfe.c

919

!strcmp(clock->name, "vfe_lite") ||

drivers/media/platform/qcom/camss/camss-vfe.c

920

!strcmp(clock->name, "camnoc_axi") ||

drivers/media/platform/qcom/camss/camss-vfe.c

921

!strcmp(clock->name, "camnoc_rt_axi"));

drivers/media/platform/qcom/camss/camss-vfe.c

930

static bool vfe_check_clock_levels(struct camss_clock *clock)

drivers/media/platform/qcom/camss/camss-vfe.c

934

for (i = 0; i < clock->nfreqs; i++)

drivers/media/platform/qcom/camss/camss-vfe.c

935

if (clock->freq[i])

drivers/media/platform/qcom/camss/camss-vfe.c

961

struct camss_clock *clock = &vfe->clock[i];

drivers/media/platform/qcom/camss/camss-vfe.c

963

if (vfe_match_clock_names(vfe, clock) && vfe_check_clock_levels(clock)) {

drivers/media/platform/qcom/camss/camss-vfe.c

988

for (j = 0; j < clock->nfreqs; j++)

drivers/media/platform/qcom/camss/camss-vfe.c

989

if (min_rate < clock->freq[j])

drivers/media/platform/qcom/camss/camss-vfe.c

992

if (j == clock->nfreqs) {

drivers/media/platform/qcom/camss/camss-vfe.h

153

struct camss_clock *clock;

drivers/media/platform/qcom/camss/camss.c

1012

.clock = { "throttle_axi", "top_ahb", "ahb", "vfe0",

drivers/media/platform/qcom/camss/camss.c

103

.clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

1040

.clock = { "throttle_axi", "top_ahb", "ahb", "vfe1",

drivers/media/platform/qcom/camss/camss.c

1073

.clock = { "soc_ahb", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

1094

.clock = { "soc_ahb", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

1115

.clock = { "soc_ahb", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

1135

.clock = { "cpas_ahb", "soc_ahb", "vfe0",

drivers/media/platform/qcom/camss/camss.c

1154

.clock = { "cpas_ahb", "soc_ahb", "vfe1",

drivers/media/platform/qcom/camss/camss.c

1173

.clock = { "cpas_ahb", "soc_ahb", "vfe_lite",

drivers/media/platform/qcom/camss/camss.c

1195

.clock = { "camnoc_axi", "cpas_ahb", "soc_ahb",

drivers/media/platform/qcom/camss/camss.c

1217

.clock = { "camnoc_axi", "cpas_ahb", "soc_ahb",

drivers/media/platform/qcom/camss/camss.c

1239

.clock = { "camnoc_axi", "cpas_ahb", "soc_ahb",

drivers/media/platform/qcom/camss/camss.c

125

.clock = { "top_ahb", "ahb", "ispif_ahb",

drivers/media/platform/qcom/camss/camss.c

1261

.clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1284

.clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1307

.clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1330

.clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1358

.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

137

.clock = { "top_ahb", "vfe0", "csi_vfe0",

drivers/media/platform/qcom/camss/camss.c

1386

.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1414

.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1442

.clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1470

.clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1498

.clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src",

drivers/media/platform/qcom/camss/camss.c

1529

.clock = { "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

1546

.clock = { "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

1563

.clock = { "csiphy2", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

1580

.clock = { "vfe0_cphy_rx", "vfe0_csid" },

drivers/media/platform/qcom/camss/camss.c

1595

.clock = { "vfe1_cphy_rx", "vfe1_csid" },

drivers/media/platform/qcom/camss/camss.c

1610

.clock = { "vfe_lite_cphy_rx", "vfe_lite_csid" },

drivers/media/platform/qcom/camss/camss.c

1628

.clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",

drivers/media/platform/qcom/camss/camss.c

1651

.clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",

drivers/media/platform/qcom/camss/camss.c

167

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

1674

.clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "soc_ahb",

drivers/media/platform/qcom/camss/camss.c

1713

.clock = { "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

1730

.clock = { "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

1747

.clock = { "csiphy2", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

1764

.clock = { "csiphy3", "csiphy3_timer" },

drivers/media/platform/qcom/camss/camss.c

1781

.clock = { "csiphy4", "csiphy4_timer" },

drivers/media/platform/qcom/camss/camss.c

1798

.clock = { "csiphy5", "csiphy5_timer" },

drivers/media/platform/qcom/camss/camss.c

1815

.clock = { "vfe0_csid", "vfe0_cphy_rx", "vfe0", "vfe0_areg", "vfe0_ahb" },

drivers/media/platform/qcom/camss/camss.c

1832

.clock = { "vfe1_csid", "vfe1_cphy_rx", "vfe1", "vfe1_areg", "vfe1_ahb" },

drivers/media/platform/qcom/camss/camss.c

1849

.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx", "vfe_lite", "vfe_lite_ahb" },

drivers/media/platform/qcom/camss/camss.c

186

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

1866

.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx", "vfe_lite", "vfe_lite_ahb" },

drivers/media/platform/qcom/camss/camss.c

1886

.clock = { "camnoc_axi_src", "slow_ahb_src", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

1912

.clock = { "camnoc_axi_src", "slow_ahb_src", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

1938

.clock = { "camnoc_axi_src", "slow_ahb_src", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

1962

.clock = { "camnoc_axi_src", "slow_ahb_src", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

2016

.clock = { "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

2034

.clock = { "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

205

.clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

2052

.clock = { "csiphy2", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

2070

.clock = { "csiphy3", "csiphy3_timer" },

drivers/media/platform/qcom/camss/camss.c

2088

.clock = { "csiphy4", "csiphy4_timer" },

drivers/media/platform/qcom/camss/camss.c

2106

.clock = { "vfe0_csid", "vfe0_cphy_rx", "vfe0" },

drivers/media/platform/qcom/camss/camss.c

2125

.clock = { "vfe1_csid", "vfe1_cphy_rx", "vfe1" },

drivers/media/platform/qcom/camss/camss.c

2144

.clock = { "vfe2_csid", "vfe2_cphy_rx", "vfe2" },

drivers/media/platform/qcom/camss/camss.c

2163

.clock = { "vfe_lite0_csid", "vfe_lite0_cphy_rx", "vfe_lite0" },

drivers/media/platform/qcom/camss/camss.c

2182

.clock = { "vfe_lite1_csid", "vfe_lite1_cphy_rx", "vfe_lite1" },

drivers/media/platform/qcom/camss/camss.c

2204

.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb", "vfe0",

drivers/media/platform/qcom/camss/camss.c

2230

.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb", "vfe1",

drivers/media/platform/qcom/camss/camss.c

2256

.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb", "vfe2",

drivers/media/platform/qcom/camss/camss.c

227

.clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

2280

.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb",

drivers/media/platform/qcom/camss/camss.c

2302

.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb",

drivers/media/platform/qcom/camss/camss.c

2341

.clock = { "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

2355

.clock = { "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

2369

.clock = { "csiphy2", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

2383

.clock = { "csiphy3", "csiphy3_timer" },

drivers/media/platform/qcom/camss/camss.c

2403

.clock = { "vfe0_csid", "vfe0_cphy_rx", "vfe0", "vfe0_axi" },

drivers/media/platform/qcom/camss/camss.c

2422

.clock = { "vfe1_csid", "vfe1_cphy_rx", "vfe1", "vfe1_axi" },

drivers/media/platform/qcom/camss/camss.c

2441

.clock = { "vfe2_csid", "vfe2_cphy_rx", "vfe2", "vfe2_axi" },

drivers/media/platform/qcom/camss/camss.c

2460

.clock = { "vfe3_csid", "vfe3_cphy_rx", "vfe3", "vfe3_axi" },

drivers/media/platform/qcom/camss/camss.c

2479

.clock = { "vfe_lite0_csid", "vfe_lite0_cphy_rx", "vfe_lite0" },

drivers/media/platform/qcom/camss/camss.c

249

.clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

2498

.clock = { "vfe_lite1_csid", "vfe_lite1_cphy_rx", "vfe_lite1" },

drivers/media/platform/qcom/camss/camss.c

2517

.clock = { "vfe_lite2_csid", "vfe_lite2_cphy_rx", "vfe_lite2" },

drivers/media/platform/qcom/camss/camss.c

2536

.clock = { "vfe_lite3_csid", "vfe_lite3_cphy_rx", "vfe_lite3" },

drivers/media/platform/qcom/camss/camss.c

2555

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe0", "vfe0_axi" },

drivers/media/platform/qcom/camss/camss.c

2575

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe1", "vfe1_axi" },

drivers/media/platform/qcom/camss/camss.c

2595

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe2", "vfe2_axi" },

drivers/media/platform/qcom/camss/camss.c

2615

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe3", "vfe3_axi" },

drivers/media/platform/qcom/camss/camss.c

2635

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe_lite0" },

drivers/media/platform/qcom/camss/camss.c

2654

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe_lite1" },

drivers/media/platform/qcom/camss/camss.c

2673

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe_lite2" },

drivers/media/platform/qcom/camss/camss.c

2692

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe_lite3" },

drivers/media/platform/qcom/camss/camss.c

271

.clock = { "top_ahb", "ispif_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

2740

.clock = { "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

2757

.clock = { "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

2774

.clock = { "csiphy2", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

2791

.clock = { "csiphy3", "csiphy3_timer" },

drivers/media/platform/qcom/camss/camss.c

2808

.clock = { "csiphy4", "csiphy4_timer" },

drivers/media/platform/qcom/camss/camss.c

2825

.clock = { "csiphy5", "csiphy5_timer" },

drivers/media/platform/qcom/camss/camss.c

284

.clock = { "top_ahb", "ispif_ahb", "vfe0", "csi_vfe0",

drivers/media/platform/qcom/camss/camss.c

2842

.clock = { "csiphy6", "csiphy6_timer" },

drivers/media/platform/qcom/camss/camss.c

2859

.clock = { "csiphy7", "csiphy7_timer" },

drivers/media/platform/qcom/camss/camss.c

2880

.clock = { "csid", "csiphy_rx" },

drivers/media/platform/qcom/camss/camss.c

2895

.clock = { "csid", "csiphy_rx" },

drivers/media/platform/qcom/camss/camss.c

2910

.clock = { "csid", "csiphy_rx" },

drivers/media/platform/qcom/camss/camss.c

2925

.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },

drivers/media/platform/qcom/camss/camss.c

2940

.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },

drivers/media/platform/qcom/camss/camss.c

2958

.clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb_clk", "vfe0_fast_ahb",

drivers/media/platform/qcom/camss/camss.c

2982

.clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb_clk", "vfe1_fast_ahb",

drivers/media/platform/qcom/camss/camss.c

3006

.clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb_clk", "vfe2_fast_ahb",

drivers/media/platform/qcom/camss/camss.c

3030

.clock = { "gcc_axi_hf", "cpas_ahb", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3051

.clock = { "gcc_axi_hf", "cpas_ahb", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3091

.clock = { "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

3108

.clock = { "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

3125

.clock = { "csiphy2", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

314

.clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

3142

.clock = { "csiphy3", "csiphy3_timer" },

drivers/media/platform/qcom/camss/camss.c

3159

.clock = { "csiphy4", "csiphy4_timer" },

drivers/media/platform/qcom/camss/camss.c

3176

.clock = { "csiphy5", "csiphy5_timer" },

drivers/media/platform/qcom/camss/camss.c

3193

.clock = { "csid", "csiphy_rx" },

drivers/media/platform/qcom/camss/camss.c

3207

.clock = { "csid", "csiphy_rx" },

drivers/media/platform/qcom/camss/camss.c

3221

.clock = { "csid", "csiphy_rx" },

drivers/media/platform/qcom/camss/camss.c

3235

.clock = { "vfe_lite_ahb", "vfe_lite_csid", "vfe_lite_cphy_rx" },

drivers/media/platform/qcom/camss/camss.c

3251

.clock = { "vfe_lite_ahb", "vfe_lite_csid", "vfe_lite_cphy_rx" },

drivers/media/platform/qcom/camss/camss.c

3270

.clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb",

drivers/media/platform/qcom/camss/camss.c

3297

.clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb",

drivers/media/platform/qcom/camss/camss.c

3324

.clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb",

drivers/media/platform/qcom/camss/camss.c

3351

.clock = { "gcc_axi_hf", "cpas_ahb", "camnoc_axi",

drivers/media/platform/qcom/camss/camss.c

3376

.clock = { "gcc_axi_hf", "cpas_ahb", "camnoc_axi",

drivers/media/platform/qcom/camss/camss.c

339

.clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

3421

.clock = { "csiphy_rx", "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

3442

.clock = { "csiphy_rx", "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

3463

.clock = { "csiphy_rx", "csiphy2", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

3486

.clock = { "csiphy_rx", "csiphy0", "csiphy0_timer"},

drivers/media/platform/qcom/camss/camss.c

3506

.clock = { "csiphy_rx", "csiphy1", "csiphy1_timer"},

drivers/media/platform/qcom/camss/camss.c

3526

.clock = { "csiphy_rx", "csiphy2", "csiphy2_timer"},

drivers/media/platform/qcom/camss/camss.c

3546

.clock = { "csiphy_rx", "csiphy3", "csiphy3_timer"},

drivers/media/platform/qcom/camss/camss.c

3566

.clock = { "csid", "csiphy_rx"},

drivers/media/platform/qcom/camss/camss.c

3583

.clock = { "csid", "csiphy_rx"},

drivers/media/platform/qcom/camss/camss.c

3601

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3620

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3639

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

364

.clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

3658

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3677

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3699

.clock = { "cpas_vfe0", "vfe0", "vfe0_fast_ahb",

drivers/media/platform/qcom/camss/camss.c

3727

.clock = { "cpas_vfe1", "vfe1", "vfe1_fast_ahb",

drivers/media/platform/qcom/camss/camss.c

3755

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3778

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3801

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3824

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

3847

.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

drivers/media/platform/qcom/camss/camss.c

387

.clock = { "top_ahb", "ahb", "ispif_ahb",

drivers/media/platform/qcom/camss/camss.c

3902

.clock = { "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

3919

.clock = { "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

3936

.clock = { "csiphy2", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

3953

.clock = { "csiphy4", "csiphy4_timer" },

drivers/media/platform/qcom/camss/camss.c

3970

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

3990

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

400

.clock = { "top_ahb", "ahb", "ispif_ahb",

drivers/media/platform/qcom/camss/camss.c

4010

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

4030

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

4051

.clock = { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

4076

.clock = {"camnoc_rt_axi", "camnoc_nrt_axi", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

41

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

4100

.clock = { "camnoc_rt_axi", "camnoc_nrt_axi", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

4124

.clock = { "camnoc_rt_axi", "camnoc_nrt_axi", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

4147

.clock = { "camnoc_rt_axi", "camnoc_nrt_axi", "cpas_ahb",

drivers/media/platform/qcom/camss/camss.c

4217

int camss_enable_clocks(int nclocks, struct camss_clock *clock,

drivers/media/platform/qcom/camss/camss.c

4224

ret = clk_prepare_enable(clock[i].clk);

drivers/media/platform/qcom/camss/camss.c

4235

clk_disable_unprepare(clock[i].clk);

drivers/media/platform/qcom/camss/camss.c

4245

void camss_disable_clocks(int nclocks, struct camss_clock *clock)

drivers/media/platform/qcom/camss/camss.c

4250

clk_disable_unprepare(clock[i].clk);

drivers/media/platform/qcom/camss/camss.c

426

.clock = { "top_ahb", "ahb", "ispif_ahb",

drivers/media/platform/qcom/camss/camss.c

472

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

489

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

506

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy2_timer" },

drivers/media/platform/qcom/camss/camss.c

527

.clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

551

.clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

575

.clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

58

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

599

.clock = { "top_ahb", "ispif_ahb", "csi3_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

621

.clock = { "top_ahb", "ahb", "ispif_ahb",

drivers/media/platform/qcom/camss/camss.c

635

.clock = { "top_ahb", "ahb", "vfe0", "csi_vfe0", "vfe_ahb",

drivers/media/platform/qcom/camss/camss.c

660

.clock = { "top_ahb", "ahb", "vfe1", "csi_vfe1", "vfe_ahb",

drivers/media/platform/qcom/camss/camss.c

690

.clock = { "top_ahb", "ahb", "csiphy0", "csiphy0_timer" },

drivers/media/platform/qcom/camss/camss.c

710

.clock = { "top_ahb", "ahb", "csiphy1", "csiphy1_timer" },

drivers/media/platform/qcom/camss/camss.c

729

.clock = { "top_ahb", "ahb", "csi0", "vfe0_cphy_rx", "vfe0" },

drivers/media/platform/qcom/camss/camss.c

747

.clock = { "top_ahb", "ahb", "csi1", "vfe1_cphy_rx", "vfe1" },

drivers/media/platform/qcom/camss/camss.c

767

.clock = { "top_ahb", "ahb", "axi", "vfe0", "camnoc_rt_axi", "camnoc_nrt_axi" },

drivers/media/platform/qcom/camss/camss.c

787

.clock = { "top_ahb", "ahb", "axi", "vfe1", "camnoc_rt_axi", "camnoc_nrt_axi" },

drivers/media/platform/qcom/camss/camss.c

79

.clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

827

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer",

drivers/media/platform/qcom/camss/camss.c

846

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer",

drivers/media/platform/qcom/camss/camss.c

865

.clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy2_timer",

drivers/media/platform/qcom/camss/camss.c

889

.clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

917

.clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

945

.clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

973

.clock = { "top_ahb", "ispif_ahb", "csi3_ahb", "ahb",

drivers/media/platform/qcom/camss/camss.c

998

.clock = { "top_ahb", "ahb", "ispif_ahb",

drivers/media/platform/qcom/camss/camss.h

161

int camss_enable_clocks(int nclocks, struct camss_clock *clock,

drivers/media/platform/qcom/camss/camss.h

163

void camss_disable_clocks(int nclocks, struct camss_clock *clock);

drivers/media/platform/qcom/camss/camss.h

48

char *clock[CAMSS_RES_MAX];

drivers/media/platform/qcom/iris/iris_resources.c

123

struct clk *clock;

drivers/media/platform/qcom/iris/iris_resources.c

125

clock = iris_get_clk_by_type(core, clk_type);

drivers/media/platform/qcom/iris/iris_resources.c

126

if (!clock)

drivers/media/platform/qcom/iris/iris_resources.c

129

return clk_prepare_enable(clock);

drivers/media/platform/qcom/iris/iris_resources.c

134

struct clk *clock;

drivers/media/platform/qcom/iris/iris_resources.c

136

clock = iris_get_clk_by_type(core, clk_type);

drivers/media/platform/qcom/iris/iris_resources.c

137

if (!clock)

drivers/media/platform/qcom/iris/iris_resources.c

140

clk_disable_unprepare(clock);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1147

gsc->clock[i] = devm_clk_get(dev, drv_data->clk_names[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1148

if (IS_ERR(gsc->clock[i])) {

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1151

return PTR_ERR(gsc->clock[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1156

ret = clk_prepare_enable(gsc->clock[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1161

clk_disable_unprepare(gsc->clock[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1199

clk_disable_unprepare(gsc->clock[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1217

clk_disable_unprepare(gsc->clock[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1271

ret = clk_prepare_enable(gsc->clock[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1274

clk_disable_unprepare(gsc->clock[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

1297

clk_disable_unprepare(gsc->clock[i]);

drivers/media/platform/samsung/exynos-gsc/gsc-core.h

334

struct clk *clock[GSC_MAX_CLOCKS];

drivers/media/platform/samsung/exynos4-is/fimc-core.c

1001

ret = clk_enable(fimc->clock[CLK_GATE]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

1014

clk_disable(fimc->clock[CLK_BUS]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

1027

clk_enable(fimc->clock[CLK_GATE]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

1047

clk_disable(fimc->clock[CLK_GATE]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

1099

clk_disable(fimc->clock[CLK_GATE]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

1105

clk_disable(fimc->clock[CLK_BUS]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

785

if (IS_ERR(fimc->clock[i]))

drivers/media/platform/samsung/exynos4-is/fimc-core.c

787

clk_unprepare(fimc->clock[i]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

788

clk_put(fimc->clock[i]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

789

fimc->clock[i] = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

798

fimc->clock[i] = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

801

fimc->clock[i] = clk_get(&fimc->pdev->dev, fimc_clocks[i]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

802

if (IS_ERR(fimc->clock[i])) {

drivers/media/platform/samsung/exynos4-is/fimc-core.c

803

ret = PTR_ERR(fimc->clock[i]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

806

ret = clk_prepare(fimc->clock[i]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

808

clk_put(fimc->clock[i]);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

809

fimc->clock[i] = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

978

ret = clk_set_rate(fimc->clock[CLK_BUS], lclk_freq);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

982

ret = clk_enable(fimc->clock[CLK_BUS]);

drivers/media/platform/samsung/exynos4-is/fimc-core.h

424

struct clk *clock[MAX_FIMC_CLOCKS];

drivers/media/platform/samsung/exynos4-is/fimc-is-i2c.c

105

return clk_prepare_enable(isp_i2c->clock);

drivers/media/platform/samsung/exynos4-is/fimc-is-i2c.c

20

struct clk *clock;

drivers/media/platform/samsung/exynos4-is/fimc-is-i2c.c

48

isp_i2c->clock = devm_clk_get(&pdev->dev, "i2c_isp");

drivers/media/platform/samsung/exynos4-is/fimc-is-i2c.c

49

if (IS_ERR(isp_i2c->clock)) {

drivers/media/platform/samsung/exynos4-is/fimc-is-i2c.c

51

return PTR_ERR(isp_i2c->clock);

drivers/media/platform/samsung/exynos4-is/fimc-is-i2c.c

97

clk_disable_unprepare(isp_i2c->clock);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1428

if (IS_ERR(fimc->clock))

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1431

clk_put(fimc->clock);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1432

fimc->clock = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1437

fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1438

return PTR_ERR_OR_ZERO(fimc->clock);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1505

ret = clk_prepare_enable(fimc->clock);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1530

clk_prepare_enable(fimc->clock);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1538

clk_disable_unprepare(fimc->clock);

drivers/media/platform/samsung/exynos4-is/fimc-lite.c

1601

clk_disable_unprepare(fimc->clock);

drivers/media/platform/samsung/exynos4-is/fimc-lite.h

157

struct clk *clock;

drivers/media/platform/samsung/exynos4-is/media-dev.c

1056

if (IS_ERR(fmd->camclk[i].clock))

drivers/media/platform/samsung/exynos4-is/media-dev.c

1058

clk_put(fmd->camclk[i].clock);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1059

fmd->camclk[i].clock = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1075

struct clk *clock;

drivers/media/platform/samsung/exynos4-is/media-dev.c

1079

fmd->camclk[i].clock = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1083

clock = clk_get(dev, clk_name);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1085

if (IS_ERR(clock)) {

drivers/media/platform/samsung/exynos4-is/media-dev.c

1087

ret = PTR_ERR(clock);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1090

fmd->camclk[i].clock = clock;

drivers/media/platform/samsung/exynos4-is/media-dev.c

1105

clock = clk_get(dev, clk_name);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1106

if (IS_ERR(clock)) {

drivers/media/platform/samsung/exynos4-is/media-dev.c

1109

ret = PTR_ERR(clock);

drivers/media/platform/samsung/exynos4-is/media-dev.c

1112

fmd->wbclk[i] = clock;

drivers/media/platform/samsung/exynos4-is/media-dev.c

1324

p_name = __clk_get_name(fmd->camclk[i].clock);

drivers/media/platform/samsung/exynos4-is/media-dev.h

69

struct clk *clock;

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

209

struct clk *clock[NUM_CSIS_CLOCKS];

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

387

if (IS_ERR(state->clock[i]))

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

389

clk_unprepare(state->clock[i]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

390

clk_put(state->clock[i]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

391

state->clock[i] = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

401

state->clock[i] = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

404

state->clock[i] = clk_get(dev, csi_clock_name[i]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

405

if (IS_ERR(state->clock[i])) {

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

406

ret = PTR_ERR(state->clock[i]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

409

ret = clk_prepare(state->clock[i]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

411

clk_put(state->clock[i]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

412

state->clock[i] = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

823

ret = clk_set_rate(state->clock[CSIS_CLK_MUX],

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

830

ret = clk_enable(state->clock[CSIS_CLK_MUX]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

882

clk_disable(state->clock[CSIS_CLK_MUX]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

907

clk_disable(state->clock[CSIS_CLK_GATE]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

943

ret = clk_enable(state->clock[CSIS_CLK_GATE]);

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

991

clk_disable(state->clock[CSIS_CLK_MUX]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

332

if (IS_ERR(camif->clock[i]))

drivers/media/platform/samsung/s3c-camif/camif-core.c

334

clk_unprepare(camif->clock[i]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

335

clk_put(camif->clock[i]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

336

camif->clock[i] = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/s3c-camif/camif-core.c

345

camif->clock[i] = ERR_PTR(-EINVAL);

drivers/media/platform/samsung/s3c-camif/camif-core.c

348

camif->clock[i] = clk_get(camif->dev, camif_clocks[i]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

349

if (IS_ERR(camif->clock[i])) {

drivers/media/platform/samsung/s3c-camif/camif-core.c

350

ret = PTR_ERR(camif->clock[i]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

353

ret = clk_prepare(camif->clock[i]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

355

clk_put(camif->clock[i]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

356

camif->clock[i] = NULL;

drivers/media/platform/samsung/s3c-camif/camif-core.c

445

clk_set_rate(camif->clock[CLK_CAM],

drivers/media/platform/samsung/s3c-camif/camif-core.c

449

clk_get_rate(camif->clock[CLK_CAM]));

drivers/media/platform/samsung/s3c-camif/camif-core.c

532

ret = clk_enable(camif->clock[CLK_GATE]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

537

ret = clk_enable(camif->clock[CLK_CAM]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

539

clk_disable(camif->clock[CLK_GATE]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

551

clk_disable(camif->clock[CLK_CAM]);

drivers/media/platform/samsung/s3c-camif/camif-core.c

553

clk_disable(camif->clock[CLK_GATE]);

drivers/media/platform/samsung/s3c-camif/camif-core.h

303

struct clk *clock[CLK_MAX_NUM];

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1207

int ret = clk_enable(bdisp->clock);

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1221

clk_disable(bdisp->clock);

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1274

if (!IS_ERR(bdisp->clock))

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1275

clk_unprepare(bdisp->clock);

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1323

bdisp->clock = devm_clk_get(dev, BDISP_NAME);

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1324

if (IS_ERR(bdisp->clock)) {

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1326

ret = PTR_ERR(bdisp->clock);

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1330

ret = clk_prepare(bdisp->clock);

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1333

bdisp->clock = ERR_PTR(-EINVAL);

drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c

1397

clk_unprepare(bdisp->clock);

drivers/media/platform/st/sti/bdisp/bdisp.h

195

struct clk *clock;

drivers/media/platform/ti/omap3isp/isp.c

1322

r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);

drivers/media/platform/ti/omap3isp/isp.c

1327

r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);

drivers/media/platform/ti/omap3isp/isp.c

1332

r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);

drivers/media/platform/ti/omap3isp/isp.c

1337

rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);

drivers/media/platform/ti/omap3isp/isp.c

1342

r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);

drivers/media/platform/ti/omap3isp/isp.c

1350

clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);

drivers/media/platform/ti/omap3isp/isp.c

1352

clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);

drivers/media/platform/ti/omap3isp/isp.c

1363

clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);

drivers/media/platform/ti/omap3isp/isp.c

1364

clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);

drivers/media/platform/ti/omap3isp/isp.c

1365

clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);

drivers/media/platform/ti/omap3isp/isp.c

1387

isp->clock[i] = clk;

drivers/media/platform/ti/omap3isp/isp.c

2305

ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);

drivers/media/platform/ti/omap3isp/isp.c

2313

clk_disable(isp->clock[ISP_CLK_CAM_ICK]);

drivers/media/platform/ti/omap3isp/isp.h

202

struct clk *clock[4];

drivers/media/platform/ti/omap3isp/ispresizer.c

505

unsigned long clock;

drivers/media/platform/ti/omap3isp/ispresizer.c

507

clock = div_u64((u64)limit * res->crop.active.height, ofmt->height);

drivers/media/platform/ti/omap3isp/ispresizer.c

508

clock = min(clock, limit / 2);

drivers/media/platform/ti/omap3isp/ispresizer.c

509

*max_rate = div_u64((u64)clock * res->crop.active.width, ofmt->width);

drivers/media/platform/ti/omap3isp/ispvideo.c

1173

pipe->l3_ick = clk_get_rate(video->isp->clock[ISP_CLK_L3_ICK]);

drivers/media/rc/ir-hix5hd2.c

112

ret = clk_prepare_enable(dev->clock);

drivers/media/rc/ir-hix5hd2.c

114

clk_disable_unprepare(dev->clock);

drivers/media/rc/ir-hix5hd2.c

288

priv->clock = devm_clk_get(dev, NULL);

drivers/media/rc/ir-hix5hd2.c

289

if (IS_ERR(priv->clock)) {

drivers/media/rc/ir-hix5hd2.c

291

ret = PTR_ERR(priv->clock);

drivers/media/rc/ir-hix5hd2.c

294

ret = clk_prepare_enable(priv->clock);

drivers/media/rc/ir-hix5hd2.c

297

priv->rate = clk_get_rate(priv->clock);

drivers/media/rc/ir-hix5hd2.c

336

clk_disable_unprepare(priv->clock);

drivers/media/rc/ir-hix5hd2.c

347

clk_disable_unprepare(priv->clock);

drivers/media/rc/ir-hix5hd2.c

356

clk_disable_unprepare(priv->clock);

drivers/media/rc/ir-hix5hd2.c

371

ret = clk_prepare_enable(priv->clock);

drivers/media/rc/ir-hix5hd2.c

89

struct clk *clock;

drivers/media/rc/ir-mce_kbd-decoder.c

384

.clock = MCIR2_UNIT,

drivers/media/rc/ir-rc5-decoder.c

174

.clock = RC5_UNIT,

drivers/media/rc/ir-rc5-decoder.c

181

.clock = RC5_UNIT,

drivers/media/rc/ir-rc5-decoder.c

185

.clock = RC5_UNIT,

drivers/media/rc/ir-rc5-decoder.c

192

.clock = RC5_UNIT,

drivers/media/rc/ir-rc6-decoder.c

282

.clock = RC6_UNIT,

drivers/media/rc/ir-rc6-decoder.c

286

.clock = RC6_UNIT * 2,

drivers/media/rc/ir-rc6-decoder.c

290

.clock = RC6_UNIT,

drivers/media/rc/meson-ir-tx.c

286

struct clk *clock;

drivers/media/rc/meson-ir-tx.c

291

clock = devm_clk_get(ir->dev, "xtal");

drivers/media/rc/meson-ir-tx.c

292

if (IS_ERR(clock) || clk_prepare_enable(clock))

drivers/media/rc/meson-ir-tx.c

296

ir->clk_rate = clk_get_rate(clock) / 3;

drivers/media/rc/rc-core-priv.h

224

unsigned int clock;

drivers/media/rc/rc-ir-raw.c

347

(*ev)->duration += timings->clock;

drivers/media/rc/rc-ir-raw.c

352

timings->clock);

drivers/media/rc/rc-ir-raw.c

358

timings->clock);

drivers/media/tuners/e4000.c

630

dev->clk = cfg->clock;

drivers/media/tuners/e4000.h

26

u32 clock;

drivers/media/usb/dvb-usb-v2/af9035.c

994

state->af9033_config[i].clock = clock_lut_it9135[tmp];

drivers/media/usb/dvb-usb-v2/af9035.c

996

state->af9033_config[i].clock = clock_lut_af9035[tmp];

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

1235

.clock = 28800000,

drivers/media/usb/dvb-usb/m920x.c

490

static const u8 clock[] = { CLOCK_CTL, 0x30 };

drivers/media/usb/dvb-usb/m920x.c

502

if ((ret = mt352_write(fe, clock, ARRAY_SIZE(clock))) != 0)

drivers/media/usb/em28xx/em28xx-dvb.c

394

.clock = 12000,

drivers/media/usb/gspca/ov519.c

3167

u8 clock;

drivers/media/usb/gspca/ov519.c

3204

clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];

drivers/media/usb/gspca/ov519.c

3206

clock |= 0x80; /* enable double clock */

drivers/media/usb/gspca/ov519.c

3207

ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);

drivers/media/usb/uvc/uvc_driver.c

2477

module_param_call(clock, uvc_clock_param_set, uvc_clock_param_get,

drivers/media/usb/uvc/uvc_driver.c

2479

MODULE_PARM_DESC(clock, "Video buffers timestamp clock");

drivers/media/usb/uvc/uvc_video.c

1447

!memcmp(scr, stream->clock.last_scr, 6)))

drivers/media/usb/uvc/uvc_video.c

1465

memcpy(stream->clock.last_scr, scr, 6);

drivers/media/usb/uvc/uvc_video.c

2149

uvc_video_clock_reset(&stream->clock);

drivers/media/usb/uvc/uvc_video.c

2298

ret = uvc_video_clock_init(&stream->clock);

drivers/media/usb/uvc/uvc_video.c

2316

uvc_video_clock_cleanup(&stream->clock);

drivers/media/usb/uvc/uvc_video.c

2344

uvc_video_clock_cleanup(&stream->clock);

drivers/media/usb/uvc/uvc_video.c

505

static void uvc_video_clock_add_sample(struct uvc_clock *clock,

drivers/media/usb/uvc/uvc_video.c

515

if (clock->head == clock->last_sof_overflow)

drivers/media/usb/uvc/uvc_video.c

516

clock->last_sof_overflow = -1;

drivers/media/usb/uvc/uvc_video.c

518

spin_lock_irqsave(&clock->lock, flags);

drivers/media/usb/uvc/uvc_video.c

520

if (clock->count > 0 && clock->last_sof > sample->dev_sof) {

drivers/media/usb/uvc/uvc_video.c

526

if (clock->last_sof_overflow != -1)

drivers/media/usb/uvc/uvc_video.c

527

clock->count = (clock->head - clock->last_sof_overflow

drivers/media/usb/uvc/uvc_video.c

528

+ clock->size) % clock->size;

drivers/media/usb/uvc/uvc_video.c

529

clock->last_sof_overflow = clock->head;

drivers/media/usb/uvc/uvc_video.c

533

clock->samples[clock->head] = *sample;

drivers/media/usb/uvc/uvc_video.c

534

clock->head = (clock->head + 1) % clock->size;

drivers/media/usb/uvc/uvc_video.c

535

clock->count = min(clock->count + 1, clock->size);

drivers/media/usb/uvc/uvc_video.c

537

spin_unlock_irqrestore(&clock->lock, flags);

drivers/media/usb/uvc/uvc_video.c

593

if (sample.dev_sof == stream->clock.last_sof)

drivers/media/usb/uvc/uvc_video.c

658

if (stream->clock.sof_offset == (u16)-1) {

drivers/media/usb/uvc/uvc_video.c

661

stream->clock.sof_offset = delta_sof;

drivers/media/usb/uvc/uvc_video.c

663

stream->clock.sof_offset = 0;

drivers/media/usb/uvc/uvc_video.c

666

sample.dev_sof = (sample.dev_sof + stream->clock.sof_offset) & 2047;

drivers/media/usb/uvc/uvc_video.c

667

uvc_video_clock_add_sample(&stream->clock, &sample);

drivers/media/usb/uvc/uvc_video.c

668

stream->clock.last_sof = sample.dev_sof;

drivers/media/usb/uvc/uvc_video.c

671

static void uvc_video_clock_reset(struct uvc_clock *clock)

drivers/media/usb/uvc/uvc_video.c

673

clock->head = 0;

drivers/media/usb/uvc/uvc_video.c

674

clock->count = 0;

drivers/media/usb/uvc/uvc_video.c

675

clock->last_sof = -1;

drivers/media/usb/uvc/uvc_video.c

676

clock->last_sof_overflow = -1;

drivers/media/usb/uvc/uvc_video.c

677

clock->sof_offset = -1;

drivers/media/usb/uvc/uvc_video.c

680

static int uvc_video_clock_init(struct uvc_clock *clock)

drivers/media/usb/uvc/uvc_video.c

682

spin_lock_init(&clock->lock);

drivers/media/usb/uvc/uvc_video.c

683

clock->size = 32;

drivers/media/usb/uvc/uvc_video.c

685

clock->samples = kmalloc_objs(*clock->samples, clock->size);

drivers/media/usb/uvc/uvc_video.c

686

if (clock->samples == NULL)

drivers/media/usb/uvc/uvc_video.c

689

uvc_video_clock_reset(clock);

drivers/media/usb/uvc/uvc_video.c

694

static void uvc_video_clock_cleanup(struct uvc_clock *clock)

drivers/media/usb/uvc/uvc_video.c

696

kfree(clock->samples);

drivers/media/usb/uvc/uvc_video.c

697

clock->samples = NULL;

drivers/media/usb/uvc/uvc_video.c

792

struct uvc_clock *clock = &stream->clock;

drivers/media/usb/uvc/uvc_video.c

812

if (!clock->samples)

drivers/media/usb/uvc/uvc_video.c

815

spin_lock_irqsave(&clock->lock, flags);

drivers/media/usb/uvc/uvc_video.c

817

if (clock->count < 2)

drivers/media/usb/uvc/uvc_video.c

820

first = &clock->samples[(clock->head - clock->count + clock->size) % clock->size];

drivers/media/usb/uvc/uvc_video.c

821

last = &clock->samples[(clock->head - 1 + clock->size) % clock->size];

drivers/media/usb/uvc/uvc_video.c

858

x1, x2, y1, y2, clock->sof_offset);

drivers/media/usb/uvc/uvc_video.c

901

spin_unlock_irqrestore(&clock->lock, flags);

drivers/media/usb/uvc/uvcvideo.h

529

} clock;

drivers/memstick/host/rtsx_usb_ms.c

35

unsigned int clock;

drivers/memstick/host/rtsx_usb_ms.c

559

unsigned int clock = 0;

drivers/memstick/host/rtsx_usb_ms.c

595

clock = 19000000;

drivers/memstick/host/rtsx_usb_ms.c

602

clock = 39000000;

drivers/memstick/host/rtsx_usb_ms.c

615

err = rtsx_usb_switch_clock(ucr, clock,

drivers/memstick/host/rtsx_usb_ms.c

623

host->clock = clock;

drivers/mfd/db8500-prcmu.c

1033

static int request_pll(u8 clock, bool enable)

drivers/mfd/db8500-prcmu.c

1037

if (clock == PRCMU_PLLSOC0)

drivers/mfd/db8500-prcmu.c

1038

clock = (enable ? PLL_SOC0_ON : PLL_SOC0_OFF);

drivers/mfd/db8500-prcmu.c

1039

else if (clock == PRCMU_PLLSOC1)

drivers/mfd/db8500-prcmu.c

1040

clock = (enable ? PLL_SOC1_ON : PLL_SOC1_OFF);

drivers/mfd/db8500-prcmu.c

1050

writeb(clock, (tcdm_base + PRCM_REQ_MB1_PLL_ON_OFF));

drivers/mfd/db8500-prcmu.c

1245

static int request_clock(u8 clock, bool enable)

drivers/mfd/db8500-prcmu.c

1256

val = readl(prcmu_base + clk_mgt[clock].offset);

drivers/mfd/db8500-prcmu.c

1258

val |= (PRCM_CLK_MGT_CLKEN | clk_mgt[clock].pllsw);

drivers/mfd/db8500-prcmu.c

1260

clk_mgt[clock].pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK);

drivers/mfd/db8500-prcmu.c

1263

writel(val, prcmu_base + clk_mgt[clock].offset);

drivers/mfd/db8500-prcmu.c

1273

static int request_sga_clock(u8 clock, bool enable)

drivers/mfd/db8500-prcmu.c

1283

ret = request_clock(clock, enable);

drivers/mfd/db8500-prcmu.c

1373

int db8500_prcmu_request_clock(u8 clock, bool enable)

drivers/mfd/db8500-prcmu.c

1375

if (clock == PRCMU_SGACLK)

drivers/mfd/db8500-prcmu.c

1376

return request_sga_clock(clock, enable);

drivers/mfd/db8500-prcmu.c

1377

else if (clock < PRCMU_NUM_REG_CLOCKS)

drivers/mfd/db8500-prcmu.c

1378

return request_clock(clock, enable);

drivers/mfd/db8500-prcmu.c

1379

else if (clock == PRCMU_TIMCLK)

drivers/mfd/db8500-prcmu.c

1381

else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))

drivers/mfd/db8500-prcmu.c

1382

return request_dsiclk((clock - PRCMU_DSI0CLK), enable);

drivers/mfd/db8500-prcmu.c

1383

else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK))

drivers/mfd/db8500-prcmu.c

1384

return request_dsiescclk((clock - PRCMU_DSI0ESCCLK), enable);

drivers/mfd/db8500-prcmu.c

1385

else if (clock == PRCMU_PLLDSI)

drivers/mfd/db8500-prcmu.c

1387

else if (clock == PRCMU_SYSCLK)

drivers/mfd/db8500-prcmu.c

1389

else if ((clock == PRCMU_PLLSOC0) || (clock == PRCMU_PLLSOC1))

drivers/mfd/db8500-prcmu.c

1390

return request_pll(clock, enable);

drivers/mfd/db8500-prcmu.c

1433

static unsigned long clock_rate(u8 clock)

drivers/mfd/db8500-prcmu.c

1439

val = readl(prcmu_base + clk_mgt[clock].offset);

drivers/mfd/db8500-prcmu.c

1442

if (clk_mgt[clock].clk38div && (val & PRCM_CLK_MGT_CLK38DIV))

drivers/mfd/db8500-prcmu.c

1447

val |= clk_mgt[clock].pllsw;

drivers/mfd/db8500-prcmu.c

1451

rate = pll_rate(PRCM_PLLSOC0_FREQ, rate, clk_mgt[clock].branch);

drivers/mfd/db8500-prcmu.c

1453

rate = pll_rate(PRCM_PLLSOC1_FREQ, rate, clk_mgt[clock].branch);

drivers/mfd/db8500-prcmu.c

1455

rate = pll_rate(PRCM_PLLDDR_FREQ, rate, clk_mgt[clock].branch);

drivers/mfd/db8500-prcmu.c

1459

if ((clock == PRCMU_SGACLK) &&

drivers/mfd/db8500-prcmu.c

1538

unsigned long prcmu_clock_rate(u8 clock)

drivers/mfd/db8500-prcmu.c

1540

if (clock < PRCMU_NUM_REG_CLOCKS)

drivers/mfd/db8500-prcmu.c

1541

return clock_rate(clock);

drivers/mfd/db8500-prcmu.c

1542

else if (clock == PRCMU_TIMCLK)

drivers/mfd/db8500-prcmu.c

1545

else if (clock == PRCMU_SYSCLK)

drivers/mfd/db8500-prcmu.c

1547

else if (clock == PRCMU_PLLSOC0)

drivers/mfd/db8500-prcmu.c

1549

else if (clock == PRCMU_PLLSOC1)

drivers/mfd/db8500-prcmu.c

1551

else if (clock == PRCMU_ARMSS)

drivers/mfd/db8500-prcmu.c

1553

else if (clock == PRCMU_PLLDDR)

drivers/mfd/db8500-prcmu.c

1555

else if (clock == PRCMU_PLLDSI)

drivers/mfd/db8500-prcmu.c

1558

else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))

drivers/mfd/db8500-prcmu.c

1559

return dsiclk_rate(clock - PRCMU_DSI0CLK);

drivers/mfd/db8500-prcmu.c

1560

else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK))

drivers/mfd/db8500-prcmu.c

1561

return dsiescclk_rate(clock - PRCMU_DSI0ESCCLK);

drivers/mfd/db8500-prcmu.c

1593

static long round_clock_rate(u8 clock, unsigned long rate)

drivers/mfd/db8500-prcmu.c

1600

val = readl(prcmu_base + clk_mgt[clock].offset);

drivers/mfd/db8500-prcmu.c

1601

src_rate = clock_source_rate((val | clk_mgt[clock].pllsw),

drivers/mfd/db8500-prcmu.c

1602

clk_mgt[clock].branch);

drivers/mfd/db8500-prcmu.c

1605

if (clk_mgt[clock].clk38div) {

drivers/mfd/db8500-prcmu.c

1611

} else if ((clock == PRCMU_SGACLK) && (div == 3)) {

drivers/mfd/db8500-prcmu.c

1731

long prcmu_round_clock_rate(u8 clock, unsigned long rate)

drivers/mfd/db8500-prcmu.c

1733

if (clock < PRCMU_NUM_REG_CLOCKS)

drivers/mfd/db8500-prcmu.c

1734

return round_clock_rate(clock, rate);

drivers/mfd/db8500-prcmu.c

1735

else if (clock == PRCMU_ARMSS)

drivers/mfd/db8500-prcmu.c

1737

else if (clock == PRCMU_PLLDSI)

drivers/mfd/db8500-prcmu.c

1739

else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))

drivers/mfd/db8500-prcmu.c

1741

else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK))

drivers/mfd/db8500-prcmu.c

1744

return (long)prcmu_clock_rate(clock);

drivers/mfd/db8500-prcmu.c

1747

static void set_clock_rate(u8 clock, unsigned long rate)

drivers/mfd/db8500-prcmu.c

1760

val = readl(prcmu_base + clk_mgt[clock].offset);

drivers/mfd/db8500-prcmu.c

1761

src_rate = clock_source_rate((val | clk_mgt[clock].pllsw),

drivers/mfd/db8500-prcmu.c

1762

clk_mgt[clock].branch);

drivers/mfd/db8500-prcmu.c

1765

if (clk_mgt[clock].clk38div) {

drivers/mfd/db8500-prcmu.c

1771

} else if (clock == PRCMU_SGACLK) {

drivers/mfd/db8500-prcmu.c

1788

writel(val, prcmu_base + clk_mgt[clock].offset);

drivers/mfd/db8500-prcmu.c

1903

int prcmu_set_clock_rate(u8 clock, unsigned long rate)

drivers/mfd/db8500-prcmu.c

1905

if (clock < PRCMU_NUM_REG_CLOCKS)

drivers/mfd/db8500-prcmu.c

1906

set_clock_rate(clock, rate);

drivers/mfd/db8500-prcmu.c

1907

else if (clock == PRCMU_ARMSS)

drivers/mfd/db8500-prcmu.c

1909

else if (clock == PRCMU_PLLDSI)

drivers/mfd/db8500-prcmu.c

1911

else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))

drivers/mfd/db8500-prcmu.c

1912

set_dsiclk_rate((clock - PRCMU_DSI0CLK), rate);

drivers/mfd/db8500-prcmu.c

1913

else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK))

drivers/mfd/db8500-prcmu.c

1914

set_dsiescclk_rate((clock - PRCMU_DSI0ESCCLK), rate);

drivers/mfd/intel-lpss.c

367

lpss->clock = clkdev_create(clk, lpss->info->clk_con_id, "%s", devname);

drivers/mfd/intel-lpss.c

368

if (!lpss->clock)

drivers/mfd/intel-lpss.c

386

clkdev_drop(lpss->clock);

drivers/mfd/intel-lpss.c

84

struct clk_lookup *clock;

drivers/mfd/sm501.c

320

unsigned long clock;

drivers/mfd/sm501.c

326

clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK);

drivers/mfd/sm501.c

359

smc501_writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK);

drivers/mfd/sm501.c

365

smc501_writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK);

drivers/mfd/sm501.c

378

gate, clock, mode);

drivers/mfd/sm501.c

405

struct sm501_clock *clock,

drivers/mfd/sm501.c

430

clock->mclk = mclk;

drivers/mfd/sm501.c

431

clock->divider = divider;

drivers/mfd/sm501.c

432

clock->shift = shift;

drivers/mfd/sm501.c

449

struct sm501_clock *clock,

drivers/mfd/sm501.c

465

if (sm501_calc_clock(freq, clock, max_div,

drivers/mfd/sm501.c

467

clock->m = m;

drivers/mfd/sm501.c

468

clock->n = n;

drivers/mfd/sm501.c

469

clock->k = k;

drivers/mfd/sm501.c

476

return clock->mclk / (clock->divider << clock->shift);

drivers/mfd/sm501.c

487

struct sm501_clock *clock,

drivers/mfd/sm501.c

495

sm501_calc_clock(freq, clock, max_div, mclk, &best_diff);

drivers/mfd/sm501.c

499

return clock->mclk / (clock->divider << clock->shift);

drivers/mfd/sm501.c

515

unsigned long clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK);

drivers/mfd/sm501.c

588

clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK);

drivers/mfd/sm501.c

590

clock = clock & ~(0xFF << clksrc);

drivers/mfd/sm501.c

591

clock |= reg<<clksrc;

drivers/mfd/sm501.c

598

smc501_writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK);

drivers/mfd/sm501.c

604

smc501_writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK);

drivers/mfd/sm501.c

622

gate, clock, mode);

drivers/misc/ntsync.c

831

clockid_t clock = CLOCK_MONOTONIC;

drivers/misc/ntsync.c

838

clock = CLOCK_REALTIME;

drivers/misc/ntsync.c

851

ret = schedule_hrtimeout_range_clock(timeout_ptr, 0, HRTIMER_MODE_ABS, clock);

drivers/mmc/core/block.c

1021

if (host->ios.clock)

drivers/mmc/core/block.c

1022

return host->ios.clock / 2000;

drivers/mmc/core/core.c

1189

u32 clock;

drivers/mmc/core/core.c

1195

clock = host->ios.clock;

drivers/mmc/core/core.c

1196

host->ios.clock = 0;

drivers/mmc/core/core.c

1204

host->ios.clock = clock;

drivers/mmc/core/core.c

1359

host->ios.clock = host->f_init;

drivers/mmc/core/core.c

1378

host->ios.clock = 0;

drivers/mmc/core/core.c

1556

(card->host->ios.clock / 1000);

drivers/mmc/core/core.c

694

if (card->host->ios.clock)

drivers/mmc/core/core.c

696

(card->host->ios.clock / 1000);

drivers/mmc/core/core.c

899

mmc_hostname(host), ios->clock, ios->bus_mode,

drivers/mmc/core/core.c

926

host->ios.clock = hz;

drivers/mmc/core/debugfs.c

206

*val = host->ios.clock;

drivers/mmc/core/debugfs.c

62

seq_printf(s, "clock:\t\t%u Hz\n", ios->clock);

drivers/mmc/core/mmc.c

1508

old_clock = host->ios.clock;

drivers/mmc/core/mmc.c

903

if (host->ios.clock <= MMC_HIGH_26_MAX_DTR)

drivers/mmc/core/mmc.c

905

else if (host->ios.clock <= MMC_HIGH_52_MAX_DTR)

drivers/mmc/core/mmc.c

909

else if (host->ios.clock <= MMC_HS200_MAX_DTR)

drivers/mmc/core/mmc.c

921

if (host->ios.clock <= MMC_HIGH_26_MAX_DTR)

drivers/mmc/core/mmc.c

923

else if (host->ios.clock <= MMC_HIGH_52_MAX_DTR)

drivers/mmc/core/mmc.c

927

else if (host->ios.clock <= MMC_HS200_MAX_DTR)

drivers/mmc/core/sd_uhs2.c

55

host->ios.clock = host->f_init;

drivers/mmc/core/sd_uhs2.c

70

host->ios.clock = 0;

drivers/mmc/host/alcor.c

653

static void alcor_set_clock(struct alcor_sdmmc_host *host, unsigned int clock)

drivers/mmc/host/alcor.c

660

if (clock == 0) {

drivers/mmc/host/alcor.c

669

tmp_div = DIV_ROUND_UP(cfg->clk_src_freq, clock);

drivers/mmc/host/alcor.c

674

tmp_diff = abs(clock - tmp_clock);

drivers/mmc/host/alcor.c

687

clock, tmp_clock, clk_div, clk_src);

drivers/mmc/host/alcor.c

853

alcor_set_clock(host, ios->clock);

drivers/mmc/host/alcor.c

881

alcor_set_clock(host, ios->clock);

drivers/mmc/host/alcor.c

888

alcor_set_clock(host, ios->clock);

drivers/mmc/host/alcor.c

922

alcor_set_clock(host, ios->clock);

drivers/mmc/host/atmel-mci.c

1426

if (ios->clock) {

drivers/mmc/host/atmel-mci.c

1442

slot->clock = ios->clock;

drivers/mmc/host/atmel-mci.c

1444

if (host->slot[i] && host->slot[i]->clock

drivers/mmc/host/atmel-mci.c

1445

&& host->slot[i]->clock < clock_min)

drivers/mmc/host/atmel-mci.c

1446

clock_min = host->slot[i]->clock;

drivers/mmc/host/atmel-mci.c

1505

slot->clock = 0;

drivers/mmc/host/atmel-mci.c

1507

if (host->slot[i] && host->slot[i]->clock) {

drivers/mmc/host/atmel-mci.c

411

unsigned int clock;

drivers/mmc/host/au1xmmc.c

752

if (ios->clock && ios->clock != host->clock) {

drivers/mmc/host/au1xmmc.c

753

au1xmmc_set_clock(host, ios->clock);

drivers/mmc/host/au1xmmc.c

754

host->clock = ios->clock;

drivers/mmc/host/au1xmmc.c

95

u32 clock;

drivers/mmc/host/bcm2835.c

1094

static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)

drivers/mmc/host/bcm2835.c

1120

if (clock < 100000) {

drivers/mmc/host/bcm2835.c

1129

div = host->max_clk / clock;

drivers/mmc/host/bcm2835.c

1132

if ((host->max_clk / div) > clock)

drivers/mmc/host/bcm2835.c

1139

clock = host->max_clk / (div + 2);

drivers/mmc/host/bcm2835.c

1140

mmc->actual_clock = clock;

drivers/mmc/host/bcm2835.c

1144

host->ns_per_fifo_word = (1000000000 / clock) *

drivers/mmc/host/bcm2835.c

1233

if (!ios->clock || ios->clock != host->clock) {

drivers/mmc/host/bcm2835.c

1234

bcm2835_set_clock(host, ios->clock);

drivers/mmc/host/bcm2835.c

1235

host->clock = ios->clock;

drivers/mmc/host/bcm2835.c

155

unsigned int clock; /* Current clock speed */

drivers/mmc/host/bcm2835.c

268

host->clock = 0;

drivers/mmc/host/cavium.c

1055

slot->clock = mmc->f_min;

drivers/mmc/host/cavium.c

240

if (!slot->clock)

drivers/mmc/host/cavium.c

244

timeout = (slot->clock * ns) / NSEC_PER_SEC;

drivers/mmc/host/cavium.c

246

timeout = (slot->clock * 850ull) / 1000ull;

drivers/mmc/host/cavium.c

827

u64 clock, emm_switch;

drivers/mmc/host/cavium.c

871

clock = ios->clock;

drivers/mmc/host/cavium.c

872

if (clock > 52000000)

drivers/mmc/host/cavium.c

873

clock = 52000000;

drivers/mmc/host/cavium.c

874

slot->clock = clock;

drivers/mmc/host/cavium.c

876

if (clock)

drivers/mmc/host/cavium.c

877

clk_period = (host->sys_freq + clock - 1) / (2 * clock);

drivers/mmc/host/cavium.c

904

static void cvm_mmc_set_clock(struct cvm_mmc_slot *slot, unsigned int clock)

drivers/mmc/host/cavium.c

908

clock = min(clock, mmc->f_max);

drivers/mmc/host/cavium.c

909

clock = max(clock, mmc->f_min);

drivers/mmc/host/cavium.c

910

slot->clock = clock;

drivers/mmc/host/cavium.c

927

(host->sys_freq / slot->clock) / 2);

drivers/mmc/host/cavium.c

929

(host->sys_freq / slot->clock) / 2);

drivers/mmc/host/cavium.h

98

u64 clock;

drivers/mmc/host/cb710-mmc.c

567

cb710_mmc_select_clock_divider(mmc, ios->clock);

drivers/mmc/host/davinci_mmc.c

656

mmc_push_pull_freq = calculate_freq_for_card(host, ios->clock);

drivers/mmc/host/davinci_mmc.c

684

ios->clock, ios->bus_mode, ios->power_mode,

drivers/mmc/host/dw_mmc-exynos.c

334

unsigned int wanted = ios->clock;

drivers/mmc/host/dw_mmc-exynos.c

572

dw_mci_exynos_adjust_clock(host, (ios->clock) << 1);

drivers/mmc/host/dw_mmc-hi3798mv200.c

57

if (clk_set_rate(host->ciu_clk, ios->clock))

drivers/mmc/host/dw_mmc-hi3798mv200.c

58

dev_warn(host->dev, "Failed to set rate to %u\n", ios->clock);

drivers/mmc/host/dw_mmc-k3.c

106

ret = clk_set_rate(host->ciu_clk, ios->clock);

drivers/mmc/host/dw_mmc-k3.c

108

dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);

drivers/mmc/host/dw_mmc-k3.c

191

unsigned int clock;

drivers/mmc/host/dw_mmc-k3.c

193

clock = (ios->clock <= 25000000) ? 25000000 : ios->clock;

drivers/mmc/host/dw_mmc-k3.c

195

ret = clk_set_rate(host->biu_clk, clock);

drivers/mmc/host/dw_mmc-k3.c

197

dev_warn(host->dev, "failed to set rate %uHz\n", clock);

drivers/mmc/host/dw_mmc-k3.c

304

if (!ios->clock || ios->clock == priv->cur_speed)

drivers/mmc/host/dw_mmc-k3.c

307

wanted = ios->clock * (GENCLK_DIV + 1);

drivers/mmc/host/dw_mmc-rockchip.c

171

struct clk *clock = sample ? priv->sample_clk : priv->drv_clk;

drivers/mmc/host/dw_mmc-rockchip.c

176

return clk_set_phase(clock, degrees);

drivers/mmc/host/dw_mmc-rockchip.c

186

if (ios->clock == 0)

drivers/mmc/host/dw_mmc-rockchip.c

200

cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV;

drivers/mmc/host/dw_mmc-rockchip.c

202

cclkin = ios->clock * RK3288_CLKGEN_DIV;

drivers/mmc/host/dw_mmc-rockchip.c

82

struct clk *clock = sample ? priv->sample_clk : priv->drv_clk;

drivers/mmc/host/dw_mmc-rockchip.c

87

return clk_get_phase(clock);

drivers/mmc/host/dw_mmc-starfive.c

29

unsigned int clock;

drivers/mmc/host/dw_mmc-starfive.c

32

clock = (ios->clock > 50000000 && ios->clock <= 52000000) ? 100000000 : ios->clock;

drivers/mmc/host/dw_mmc-starfive.c

33

ret = clk_set_rate(host->ciu_clk, clock);

drivers/mmc/host/dw_mmc-starfive.c

35

dev_dbg(host->dev, "Use an external frequency divider %uHz\n", ios->clock);

drivers/mmc/host/dw_mmc.c

1206

unsigned int clock = slot->clock;

drivers/mmc/host/dw_mmc.c

1217

if (!clock) {

drivers/mmc/host/dw_mmc.c

1220

} else if (clock != host->current_speed || force_clkinit) {

drivers/mmc/host/dw_mmc.c

1221

div = host->bus_hz / clock;

drivers/mmc/host/dw_mmc.c

1222

if (host->bus_hz % clock && host->bus_hz > clock)

drivers/mmc/host/dw_mmc.c

1229

div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0;

drivers/mmc/host/dw_mmc.c

1231

if ((clock != slot->__clk_old &&

drivers/mmc/host/dw_mmc.c

1238

slot->id, host->bus_hz, clock,

drivers/mmc/host/dw_mmc.c

1247

slot->mmc->f_min == clock)

drivers/mmc/host/dw_mmc.c

1274

slot->__clk_old = clock;

drivers/mmc/host/dw_mmc.c

1279

host->current_speed = clock;

drivers/mmc/host/dw_mmc.c

1477

slot->clock = ios->clock;

drivers/mmc/host/dw_mmc.c

1542

if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0)

drivers/mmc/host/dw_mmc.h

574

unsigned int clock;

drivers/mmc/host/jz4740_mmc.c

945

if (ios->clock)

drivers/mmc/host/jz4740_mmc.c

946

jz4740_mmc_set_clock_rate(host, ios->clock);

drivers/mmc/host/litex_mmc.c

460

if (ios->clock != host->sd_clk)

drivers/mmc/host/litex_mmc.c

461

litex_mmc_setclk(host, ios->clock);

drivers/mmc/host/loongson2-mmc.c

522

pre = DIV_ROUND_UP(host->current_clk, ios->clock);

drivers/mmc/host/meson-gx-mmc.c

578

return meson_mmc_clk_set(host, ios->clock, ddr);

drivers/mmc/host/meson-mx-sdhc-mmc.c

275

if (ios->clock) {

drivers/mmc/host/meson-mx-sdhc-mmc.c

276

ret = clk_set_rate(host->sd_clk, ios->clock);

drivers/mmc/host/meson-mx-sdhc-mmc.c

280

ios->clock, host->error);

drivers/mmc/host/meson-mx-sdio.c

247

unsigned long clk_rate = ios->clock;

drivers/mmc/host/meson-mx-sdio.c

268

host->error = clk_set_rate(host->cfg_div_clk, ios->clock);

drivers/mmc/host/mmc_spi.c

1110

if (host->spi->max_speed_hz != ios->clock && ios->clock != 0) {

drivers/mmc/host/mmc_spi.c

1113

host->spi->max_speed_hz = ios->clock;

drivers/mmc/host/mmci.c

2005

if (!ios->clock && variant->pwrreg_clkgate)

drivers/mmc/host/mmci.c

2009

ios->clock != host->clock_cache) {

drivers/mmc/host/mmci.c

2010

ret = clk_set_rate(host->clk, ios->clock);

drivers/mmc/host/mmci.c

2017

host->clock_cache = ios->clock;

drivers/mmc/host/mmci.c

2022

host->ops->set_clkreg(host, ios->clock);

drivers/mmc/host/mmci.c

2024

mmci_set_clkreg(host, ios->clock);

drivers/mmc/host/moxart-mmc.c

497

if (ios->clock) {

drivers/mmc/host/moxart-mmc.c

499

if (ios->clock >= host->sysclk / (2 * (div + 1)))

drivers/mmc/host/mtk-sd.c

2161

if (host->mclk != ios->clock || host->timing != ios->timing)

drivers/mmc/host/mtk-sd.c

2162

msdc_set_mclk(host, ios->timing, ios->clock);

drivers/mmc/host/mvsdio.c

45

unsigned int clock;

drivers/mmc/host/mvsdio.c

607

if (ios->clock == 0) {

drivers/mmc/host/mvsdio.c

610

host->clock = 0;

drivers/mmc/host/mvsdio.c

612

} else if (ios->clock != host->clock) {

drivers/mmc/host/mvsdio.c

613

u32 m = DIV_ROUND_UP(host->base_clock, ios->clock) - 1;

drivers/mmc/host/mvsdio.c

617

host->clock = ios->clock;

drivers/mmc/host/mvsdio.c

620

ios->clock, host->base_clock / (m+1), m);

drivers/mmc/host/mxcmmc.c

145

int clock;

drivers/mmc/host/mxcmmc.c

527

mxcmci_set_clk_rate(host, host->clock);

drivers/mmc/host/mxcmmc.c

874

if (ios->clock) {

drivers/mmc/host/mxcmmc.c

875

mxcmci_set_clk_rate(host, ios->clock);

drivers/mmc/host/mxcmmc.c

881

host->clock = ios->clock;

drivers/mmc/host/mxs-mmc.c

505

if (ios->clock)

drivers/mmc/host/mxs-mmc.c

506

mxs_ssp_set_clk_rate(&host->ssp, ios->clock);

drivers/mmc/host/omap.c

1162

if (ios->clock == 0)

drivers/mmc/host/omap.c

1165

dsor = func_clk_rate / ios->clock;

drivers/mmc/host/omap.c

1169

if (func_clk_rate / dsor > ios->clock)

drivers/mmc/host/omap_hsmmc.c

524

if (ios->clock) {

drivers/mmc/host/omap_hsmmc.c

525

dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock);

drivers/mmc/host/omap_hsmmc.c

540

dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock);

drivers/mmc/host/owl-mmc.c

106

u32 clock;

drivers/mmc/host/owl-mmc.c

429

if (!ios->clock)

drivers/mmc/host/owl-mmc.c

432

owl_host->clock = ios->clock;

drivers/mmc/host/owl-mmc.c

433

owl_mmc_set_clk_rate(owl_host, ios->clock);

drivers/mmc/host/owl-mmc.c

518

if (ios->clock != owl_host->clock)

drivers/mmc/host/pxamci.c

444

if (ios->clock) {

drivers/mmc/host/pxamci.c

446

unsigned int clk = rate / ios->clock;

drivers/mmc/host/pxamci.c

451

if (ios->clock == 26000000) {

drivers/mmc/host/pxamci.c

464

if (rate / clk > ios->clock)

drivers/mmc/host/renesas_sdhi_core.c

196

u32 clk = 0, clock;

drivers/mmc/host/renesas_sdhi_core.c

207

clock = host->mmc->actual_clock / 512;

drivers/mmc/host/renesas_sdhi_core.c

215

for (clk = 0x80000080; new_clock + clk_margin >= (clock << 1); clk >>= 1)

drivers/mmc/host/renesas_sdhi_core.c

216

clock <<= 1;

drivers/mmc/host/renesas_sdhi_core.c

226

clock = clk & CLK_CTL_DIV_MASK;

drivers/mmc/host/renesas_sdhi_core.c

227

if (clock != CLK_CTL_DIV_MASK)

drivers/mmc/host/renesas_sdhi_core.c

228

host->mmc->actual_clock /= (1 << (ffs(clock) + 1));

drivers/mmc/host/renesas_sdhi_core.c

230

sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clock);

drivers/mmc/host/rtsx_pci_sdmmc.c

1125

host->initial_mode = (ios->clock <= 1000000) ? true : false;

drivers/mmc/host/rtsx_pci_sdmmc.c

1127

host->clock = ios->clock;

drivers/mmc/host/rtsx_pci_sdmmc.c

1128

rtsx_pci_switch_clock(pcr, ios->clock, host->ssc_depth,

drivers/mmc/host/rtsx_pci_sdmmc.c

37

unsigned int clock;

drivers/mmc/host/rtsx_pci_sdmmc.c

824

rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth,

drivers/mmc/host/rtsx_usb_sdmmc.c

1172

host->initial_mode = (ios->clock <= 1000000) ? true : false;

drivers/mmc/host/rtsx_usb_sdmmc.c

1173

host->clock = ios->clock;

drivers/mmc/host/rtsx_usb_sdmmc.c

1175

rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,

drivers/mmc/host/rtsx_usb_sdmmc.c

42

unsigned int clock;

drivers/mmc/host/sdhci-brcmstb.c

225

static void sdhci_brcmstb_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-brcmstb.c

231

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-brcmstb.c

234

if (clock == 0)

drivers/mmc/host/sdhci-esdhc-imx.c

1004

clock = min(clock, max_clock);

drivers/mmc/host/sdhci-esdhc-imx.c

1007

while (host_clock / (16 * pre_div * ddr_pre_div) > clock &&

drivers/mmc/host/sdhci-esdhc-imx.c

1011

while (host_clock / (div * pre_div * ddr_pre_div) > clock && div < 16)

drivers/mmc/host/sdhci-esdhc-imx.c

1016

clock, host->mmc->actual_clock);

drivers/mmc/host/sdhci-esdhc-imx.c

1432

host->ops->set_clock(host, host->clock);

drivers/mmc/host/sdhci-esdhc-imx.c

1880

pltfm_host->clock = clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-esdhc-imx.c

1881

if (!pltfm_host->clock) {

drivers/mmc/host/sdhci-esdhc-imx.c

2154

clk_set_rate(imx_data->clk_per, pltfm_host->clock);

drivers/mmc/host/sdhci-esdhc-imx.c

945

return pltfm_host->clock;

drivers/mmc/host/sdhci-esdhc-imx.c

952

return pltfm_host->clock / 256 / 16;

drivers/mmc/host/sdhci-esdhc-imx.c

956

unsigned int clock)

drivers/mmc/host/sdhci-esdhc-imx.c

960

unsigned int host_clock = pltfm_host->clock;

drivers/mmc/host/sdhci-esdhc-imx.c

974

if (clock == 0) {

drivers/mmc/host/sdhci-esdhc-mcf.c

209

return pltfm_host->clock;

drivers/mmc/host/sdhci-esdhc-mcf.c

216

return pltfm_host->clock / 256 / 16;

drivers/mmc/host/sdhci-esdhc-mcf.c

220

unsigned int clock)

drivers/mmc/host/sdhci-esdhc-mcf.c

226

int delta, old_delta = clock;

drivers/mmc/host/sdhci-esdhc-mcf.c

229

if (clock == 0) {

drivers/mmc/host/sdhci-esdhc-mcf.c

249

fsys = pltfm_host->clock;

drivers/mmc/host/sdhci-esdhc-mcf.c

259

delta = abs(clock - finale);

drivers/mmc/host/sdhci-esdhc-mcf.c

276

host->mmc->actual_clock = clock;

drivers/mmc/host/sdhci-esdhc-mcf.c

441

pltfm_host->clock = clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-iproc.c

164

return pltfm_host->clock;

drivers/mmc/host/sdhci-iproc.c

78

if (host->clock <= 400000) {

drivers/mmc/host/sdhci-iproc.c

80

if (host->clock)

drivers/mmc/host/sdhci-iproc.c

81

udelay((4 * 1000000 + host->clock - 1) / host->clock);

drivers/mmc/host/sdhci-msm.c

1147

if (host->clock <= CORE_FREQ_100MHZ ||

drivers/mmc/host/sdhci-msm.c

1244

msm_set_clock_rate_for_bus_mode(host, ios.clock, ios.timing);

drivers/mmc/host/sdhci-msm.c

1330

if (host->clock > CORE_FREQ_100MHZ &&

drivers/mmc/host/sdhci-msm.c

1383

if (host->clock <= CORE_FREQ_100MHZ) {

drivers/mmc/host/sdhci-msm.c

1412

mmc_hostname(host->mmc), host->clock, uhs, ctrl_2);

drivers/mmc/host/sdhci-msm.c

1846

static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-msm.c

1852

if (clock == 0)

drivers/mmc/host/sdhci-msm.c

1865

static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-msm.c

1871

if (!clock) {

drivers/mmc/host/sdhci-msm.c

1878

msm_set_clock_rate_for_bus_mode(host, ios.clock, ios.timing);

drivers/mmc/host/sdhci-msm.c

1880

__sdhci_msm_set_clock(host, clock);

drivers/mmc/host/sdhci-msm.c

2115

if (cmd && cmd->data && host->clock > 400000 &&

drivers/mmc/host/sdhci-msm.c

2116

host->clock <= 50000000 &&

drivers/mmc/host/sdhci-msm.c

2117

((1 << (count + start)) > (10 * host->clock)))

drivers/mmc/host/sdhci-msm.c

348

unsigned int clock,

drivers/mmc/host/sdhci-msm.c

360

clock == MMC_HS200_MAX_DTR) ||

drivers/mmc/host/sdhci-msm.c

367

unsigned int clock,

drivers/mmc/host/sdhci-msm.c

378

mult = msm_get_clock_mult_for_bus_mode(host, clock, timing);

drivers/mmc/host/sdhci-msm.c

379

desired_rate = clock * mult;

drivers/mmc/host/sdhci-msm.c

612

if (host->clock <= 112000000)

drivers/mmc/host/sdhci-msm.c

614

else if (host->clock <= 125000000)

drivers/mmc/host/sdhci-msm.c

616

else if (host->clock <= 137000000)

drivers/mmc/host/sdhci-msm.c

618

else if (host->clock <= 150000000)

drivers/mmc/host/sdhci-msm.c

620

else if (host->clock <= 162000000)

drivers/mmc/host/sdhci-msm.c

622

else if (host->clock <= 175000000)

drivers/mmc/host/sdhci-msm.c

624

else if (host->clock <= 187000000)

drivers/mmc/host/sdhci-msm.c

626

else if (host->clock <= 200000000)

drivers/mmc/host/sdhci-msm.c

702

mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock * 8),

drivers/mmc/host/sdhci-msm.c

705

mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock * 4),

drivers/mmc/host/sdhci-of-arasan.c

1933

if (pltfm_host->clock &&

drivers/mmc/host/sdhci-of-arasan.c

1934

pltfm_host->clock != clk_get_rate(clk_xin)) {

drivers/mmc/host/sdhci-of-arasan.c

1935

ret = clk_set_rate(clk_xin, pltfm_host->clock);

drivers/mmc/host/sdhci-of-arasan.c

281

static void sdhci_arasan_phy_dll_set_freq(struct sdhci_host *host, int clock)

drivers/mmc/host/sdhci-of-arasan.c

285

freq = DIV_ROUND_CLOSEST(clock, 1000000);

drivers/mmc/host/sdhci-of-arasan.c

355

static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-of-arasan.c

363

if (!sdhci_arasan->is_phy_on && clock <= PHY_CLK_TOO_SLOW_HZ) {

drivers/mmc/host/sdhci-of-arasan.c

391

} else if (clock > PHY_CLK_TOO_SLOW_HZ) {

drivers/mmc/host/sdhci-of-arasan.c

412

if (clock == DEFAULT_SPEED_MAX_DTR)

drivers/mmc/host/sdhci-of-arasan.c

413

clock = (DEFAULT_SPEED_MAX_DTR * 19) / 25;

drivers/mmc/host/sdhci-of-arasan.c

417

if (clk_data->set_clk_delays && clock > PHY_CLK_TOO_SLOW_HZ)

drivers/mmc/host/sdhci-of-arasan.c

420

if (sdhci_arasan->internal_phy_reg && clock >= MIN_PHY_CLK_HZ) {

drivers/mmc/host/sdhci-of-arasan.c

424

sdhci_arasan_phy_dll_set_freq(host, clock);

drivers/mmc/host/sdhci-of-arasan.c

430

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-of-arasan.c

432

if (sdhci_arasan->internal_phy_reg && clock >= MIN_PHY_CLK_HZ)

drivers/mmc/host/sdhci-of-aspeed.c

236

static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-of-aspeed.c

251

if (clock == 0)

drivers/mmc/host/sdhci-of-aspeed.c

254

if (WARN_ON(clock > host->max_clk))

drivers/mmc/host/sdhci-of-aspeed.c

255

clock = host->max_clk;

drivers/mmc/host/sdhci-of-aspeed.c

275

if (bus <= clock)

drivers/mmc/host/sdhci-of-at91.c

62

static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-of-at91.c

80

if (clock == 0)

drivers/mmc/host/sdhci-of-at91.c

83

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-of-dwcmshc.c

1248

static void sdhci_eic7700_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-of-dwcmshc.c

1253

host->mmc->actual_clock = clock;

drivers/mmc/host/sdhci-of-dwcmshc.c

1255

if (clock == 0) {

drivers/mmc/host/sdhci-of-dwcmshc.c

1256

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-of-dwcmshc.c

1260

clk_set_rate(pltfm_host->clk, clock);

drivers/mmc/host/sdhci-of-dwcmshc.c

1545

if (timing == MMC_TIMING_MMC_HS400 && host->clock == 200000000) {

drivers/mmc/host/sdhci-of-dwcmshc.c

375

return pltfm_host->clock;

drivers/mmc/host/sdhci-of-dwcmshc.c

707

static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-of-dwcmshc.c

718

if (clock == 0) {

drivers/mmc/host/sdhci-of-dwcmshc.c

720

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-of-dwcmshc.c

725

if (clock <= 400000)

drivers/mmc/host/sdhci-of-dwcmshc.c

726

clock = 375000;

drivers/mmc/host/sdhci-of-dwcmshc.c

728

err = clk_set_rate(pltfm_host->clk, clock);

drivers/mmc/host/sdhci-of-dwcmshc.c

730

dev_err(mmc_dev(host->mmc), "fail to set clock %d", clock);

drivers/mmc/host/sdhci-of-dwcmshc.c

732

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-of-dwcmshc.c

741

if (clock <= 52000000) {

drivers/mmc/host/sdhci-of-esdhc.c

1077

if (host->clock > clk)

drivers/mmc/host/sdhci-of-esdhc.c

1098

esdhc_of_set_clock(host, host->clock);

drivers/mmc/host/sdhci-of-esdhc.c

562

return pltfm_host->clock;

drivers/mmc/host/sdhci-of-esdhc.c

569

unsigned int clock;

drivers/mmc/host/sdhci-of-esdhc.c

572

clock = esdhc->peripheral_clock;

drivers/mmc/host/sdhci-of-esdhc.c

574

clock = pltfm_host->clock;

drivers/mmc/host/sdhci-of-esdhc.c

575

return clock / 256 / 16;

drivers/mmc/host/sdhci-of-esdhc.c

649

static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-of-esdhc.c

658

if (clock == 0) {

drivers/mmc/host/sdhci-of-esdhc.c

675

if (clock_fixup == 0 || clock < clock_fixup)

drivers/mmc/host/sdhci-of-esdhc.c

676

clock_fixup = clock;

drivers/mmc/host/sdhci-of-esdhc.c

689

clock == MMC_HS200_MAX_DTR &&

drivers/mmc/host/sdhci-of-esdhc.c

711

clock, host->mmc->actual_clock);

drivers/mmc/host/sdhci-of-esdhc.c

745

clock == MMC_HS200_MAX_DTR) {

drivers/mmc/host/sdhci-of-k1.c

119

static void spacemit_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-of-k1.c

128

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-of-ma35d1.c

100

if (clock > MMC_HIGH_52_MAX_DTR)

drivers/mmc/host/sdhci-of-ma35d1.c

106

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-of-ma35d1.c

91

static void ma35_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-omap.c

336

if (ios->clock <= 52000000)

drivers/mmc/host/sdhci-omap.c

668

unsigned int clock)

drivers/mmc/host/sdhci-omap.c

672

dsor = DIV_ROUND_UP(clk_get_rate(host->clk), clock);

drivers/mmc/host/sdhci-omap.c

697

static void sdhci_omap_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-omap.c

705

if (!clock)

drivers/mmc/host/sdhci-omap.c

708

clkdiv = sdhci_omap_calc_divisor(pltfm_host, clock);

drivers/mmc/host/sdhci-pci-arasan.c

250

if (arasan_host->chg_clk == host->mmc->ios.clock)

drivers/mmc/host/sdhci-pci-arasan.c

253

arasan_host->chg_clk = host->mmc->ios.clock;

drivers/mmc/host/sdhci-pci-arasan.c

254

if (host->mmc->ios.clock == 200000000)

drivers/mmc/host/sdhci-pci-arasan.c

256

else if (host->mmc->ios.clock == 100000000)

drivers/mmc/host/sdhci-pci-arasan.c

258

else if (host->mmc->ios.clock == 50000000)

drivers/mmc/host/sdhci-pci-arasan.c

311

static void arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-pci-arasan.c

313

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-pci-core.c

682

static void sdhci_intel_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-pci-core.c

690

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-pci-dwc-mshc.c

31

static void sdhci_snps_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-pci-dwc-mshc.c

43

if (clock <= 52000000) {

drivers/mmc/host/sdhci-pci-dwc-mshc.c

44

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-pci-dwc-mshc.c

52

if (clock == 100000000) {

drivers/mmc/host/sdhci-pci-gli.c

1059

host->clock = 0;

drivers/mmc/host/sdhci-pci-gli.c

1252

static void sdhci_gl9767_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-pci-gli.c

1266

if (clock == 0) {

drivers/mmc/host/sdhci-pci-gli.c

1271

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-pci-gli.c

1272

if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {

drivers/mmc/host/sdhci-pci-gli.c

1874

u16 clock;

drivers/mmc/host/sdhci-pci-gli.c

1879

clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-gli.c

1880

clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);

drivers/mmc/host/sdhci-pci-gli.c

1881

sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-gli.c

1890

u16 clock;

drivers/mmc/host/sdhci-pci-gli.c

1895

clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-gli.c

1897

clock |= SDHCI_CLOCK_PLL_EN;

drivers/mmc/host/sdhci-pci-gli.c

1898

clock &= ~SDHCI_CLOCK_INT_STABLE;

drivers/mmc/host/sdhci-pci-gli.c

1899

sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-gli.c

1902

if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE),

drivers/mmc/host/sdhci-pci-gli.c

1909

clock |= SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-pci-gli.c

1910

sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-gli.c

605

static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-pci-gli.c

615

if (clock == 0)

drivers/mmc/host/sdhci-pci-gli.c

618

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-pci-gli.c

619

if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {

drivers/mmc/host/sdhci-pci-gli.c

622

} else if (clock == 100000000) {

drivers/mmc/host/sdhci-pci-gli.c

624

} else if (clock == 50000000) {

drivers/mmc/host/sdhci-pci-gli.c

796

static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-pci-gli.c

809

if (clock == 0)

drivers/mmc/host/sdhci-pci-gli.c

812

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-pci-gli.c

813

if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {

drivers/mmc/host/sdhci-pci-gli.c

816

} else if (clock == 100000000) {

drivers/mmc/host/sdhci-pci-gli.c

818

} else if (clock == 50000000) {

drivers/mmc/host/sdhci-pci-o2micro.c

578

static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-pci-o2micro.c

591

if (clock == 0)

drivers/mmc/host/sdhci-pci-o2micro.c

610

if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) {

drivers/mmc/host/sdhci-pci-o2micro.c

631

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-pltfm.c

97

device_property_read_u32(dev, "clock-frequency", &pltfm_host->clock);

drivers/mmc/host/sdhci-pltfm.h

25

unsigned int clock;

drivers/mmc/host/sdhci-pxav3.c

321

static void pxav3_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-pxav3.c

325

struct pinctrl_state *pins = clock < 100 * HZ_PER_MHZ ? pxa->pins_default : pxa->pins_uhs;

drivers/mmc/host/sdhci-pxav3.c

330

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-s3c.c

225

static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-s3c.c

237

if (clock == 0) {

drivers/mmc/host/sdhci-s3c.c

238

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-s3c.c

243

delta = sdhci_s3c_consider_clock(ourhost, src, clock);

drivers/mmc/host/sdhci-s3c.c

252

best_src, clock, best);

drivers/mmc/host/sdhci-s3c.c

289

if (clock < 25 * 1000000)

drivers/mmc/host/sdhci-s3c.c

293

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-s3c.c

367

static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-s3c.c

378

if (clock == 0) {

drivers/mmc/host/sdhci-s3c.c

383

sdhci_s3c_set_clock(host, clock);

drivers/mmc/host/sdhci-s3c.c

390

ret = clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);

drivers/mmc/host/sdhci-s3c.c

393

mmc_hostname(host->mmc), clock);

drivers/mmc/host/sdhci-sprd.c

290

static void sdhci_sprd_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-sprd.c

294

if (clock == 0) {

drivers/mmc/host/sdhci-sprd.c

296

} else if (clock != host->clock) {

drivers/mmc/host/sdhci-sprd.c

298

_sdhci_sprd_set_clock(host, clock);

drivers/mmc/host/sdhci-sprd.c

300

if (clock <= 400000)

drivers/mmc/host/sdhci-sprd.c

306

_sdhci_sprd_set_clock(host, clock);

drivers/mmc/host/sdhci-sprd.c

315

if (clk_changed && clock > SDHCI_SPRD_PHY_DLL_CLK)

drivers/mmc/host/sdhci-st.c

248

if (host->clock > CLK_TO_CHECK_DLL_LOCK) {

drivers/mmc/host/sdhci-tegra.c

748

static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci-tegra.c

756

if (!clock)

drivers/mmc/host/sdhci-tegra.c

757

return sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-tegra.c

771

host_clk = tegra_host->ddr_signaling ? clock * 2 : clock;

drivers/mmc/host/sdhci-tegra.c

784

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci-uhs2.c

298

host->ops->set_clock(host, ios->clock);

drivers/mmc/host/sdhci-uhs2.c

299

host->clock = ios->clock;

drivers/mmc/host/sdhci-uhs2.c

307

mmc_hostname(mmc), ios->clock, ios->power_mode, ios->vdd, ios->timing);

drivers/mmc/host/sdhci-uhs2.c

97

host->clock = 0;

drivers/mmc/host/sdhci-xenon-phy.c

246

u32 wait, clock;

drivers/mmc/host/sdhci-xenon-phy.c

276

clock = host->clock;

drivers/mmc/host/sdhci-xenon-phy.c

277

if (!clock)

drivers/mmc/host/sdhci-xenon-phy.c

279

clock = XENON_LOWEST_SDCLK_FREQ;

drivers/mmc/host/sdhci-xenon-phy.c

281

wait /= clock;

drivers/mmc/host/sdhci-xenon-phy.c

358

if (WARN_ON(host->clock <= MMC_HIGH_52_MAX_DTR))

drivers/mmc/host/sdhci-xenon-phy.c

414

if (host->clock <= MMC_HIGH_52_MAX_DTR)

drivers/mmc/host/sdhci-xenon-phy.c

476

if (host->clock <= MMC_HIGH_52_MAX_DTR)

drivers/mmc/host/sdhci-xenon-phy.c

529

if (host->clock > MMC_HIGH_52_MAX_DTR)

drivers/mmc/host/sdhci-xenon-phy.c

773

if (WARN_ON(host->clock <= XENON_DEFAULT_SDCLK_FREQ))

drivers/mmc/host/sdhci-xenon-phy.c

816

if (!host->clock) {

drivers/mmc/host/sdhci-xenon-phy.c

817

priv->clock = 0;

drivers/mmc/host/sdhci-xenon-phy.c

826

if ((host->clock == priv->clock) &&

drivers/mmc/host/sdhci-xenon-phy.c

837

priv->clock = host->clock;

drivers/mmc/host/sdhci-xenon-phy.c

843

if (host->clock > XENON_DEFAULT_SDCLK_FREQ)

drivers/mmc/host/sdhci-xenon.c

255

return pltfm_host->clock;

drivers/mmc/host/sdhci-xenon.c

309

if (host->clock > XENON_DEFAULT_SDCLK_FREQ)

drivers/mmc/host/sdhci-xenon.c

655

priv->clock = 0;

drivers/mmc/host/sdhci-xenon.h

90

unsigned int clock;

drivers/mmc/host/sdhci.c

1916

u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,

drivers/mmc/host/sdhci.c

1949

<= clock)

drivers/mmc/host/sdhci.c

1952

if ((host->max_clk * host->clk_mul / div) <= clock) {

drivers/mmc/host/sdhci.c

1972

if (host->max_clk <= clock)

drivers/mmc/host/sdhci.c

1977

if ((host->max_clk / div) <= clock)

drivers/mmc/host/sdhci.c

1990

if ((host->max_clk / div) <= clock)

drivers/mmc/host/sdhci.c

2062

void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci.c

2070

if (clock == 0)

drivers/mmc/host/sdhci.c

2073

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci.c

211

host->clock = 0;

drivers/mmc/host/sdhci.c

2392

turning_on_clk = ios->clock != host->clock && ios->clock && !host->clock;

drivers/mmc/host/sdhci.c

2396

if (!ios->clock || ios->clock != host->clock) {

drivers/mmc/host/sdhci.c

2397

host->ops->set_clock(host, ios->clock);

drivers/mmc/host/sdhci.c

2398

host->clock = ios->clock;

drivers/mmc/host/sdhci.c

2401

host->clock) {

drivers/mmc/host/sdhci.c

2404

host->clock / 1000;

drivers/mmc/host/sdhci.c

2507

host->ops->set_clock(host, host->clock);

drivers/mmc/host/sdhci.c

3187

host->ops->set_clock(host, host->clock);

drivers/mmc/host/sdhci.c

383

host->clock = 0;

drivers/mmc/host/sdhci.c

3837

host->clock = 0;

drivers/mmc/host/sdhci.c

3898

host->clock = 0;

drivers/mmc/host/sdhci.c

918

if (host->clock && data->timeout_clks) {

drivers/mmc/host/sdhci.c

927

if (do_div(val, host->clock))

drivers/mmc/host/sdhci.c

953

freq = mmc->actual_clock ? : host->clock;

drivers/mmc/host/sdhci.h

583

unsigned int clock; /* Current clock (MHz) */

drivers/mmc/host/sdhci.h

691

void (*set_clock)(struct sdhci_host *host, unsigned int clock);

drivers/mmc/host/sdhci.h

842

u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,

drivers/mmc/host/sdhci.h

844

void sdhci_set_clock(struct sdhci_host *host, unsigned int clock);

drivers/mmc/host/sdhci_am654.c

178

static void sdhci_am654_setup_dll(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci_am654.c

191

switch (clock) {

drivers/mmc/host/sdhci_am654.c

211

switch (clock) {

drivers/mmc/host/sdhci_am654.c

274

static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)

drivers/mmc/host/sdhci_am654.c

284

sdhci_set_clock(host, clock);

drivers/mmc/host/sdhci_am654.c

305

if (timing > MMC_TIMING_UHS_SDR25 && clock >= CLOCK_TOO_SLOW_HZ) {

drivers/mmc/host/sdhci_am654.c

306

sdhci_am654_setup_dll(host, clock);

drivers/mmc/host/sdhci_am654.c

326

unsigned int clock)

drivers/mmc/host/sdhci_am654.c

358

sdhci_set_clock(host, clock);

drivers/mmc/host/sh_mmcif.c

1106

sh_mmcif_clock_control(host, ios->clock);

drivers/mmc/host/sunplus-mmc.c

776

spmmc_set_bus_clk(host, ios->clock);

drivers/mmc/host/sunxi-mmc.c

765

u32 rval, clock = ios->clock, div = 1;

drivers/mmc/host/sunxi-mmc.c

775

if (!ios->clock)

drivers/mmc/host/sunxi-mmc.c

791

clock <<= 1;

drivers/mmc/host/sunxi-mmc.c

803

rate = clk_round_rate(host->clk_mmc, clock);

drivers/mmc/host/sunxi-mmc.c

806

clock, rate);

drivers/mmc/host/sunxi-mmc.c

810

clock, rate);

drivers/mmc/host/tifm_sd.c

800

ios->clock, ios->vdd, ios->bus_mode, ios->chip_select,

drivers/mmc/host/tifm_sd.c

812

if (ios->clock) {

drivers/mmc/host/tifm_sd.c

813

clk_div1 = 20000000 / ios->clock;

drivers/mmc/host/tifm_sd.c

817

clk_div2 = 24000000 / ios->clock;

drivers/mmc/host/tifm_sd.c

821

if ((20000000 / clk_div1) > ios->clock)

drivers/mmc/host/tifm_sd.c

823

if ((24000000 / clk_div2) > ios->clock)

drivers/mmc/host/tmio_mmc.h

186

void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock);

drivers/mmc/host/tmio_mmc_core.c

1019

host->set_clock(host, ios->clock);

drivers/mmc/host/tmio_mmc_core.c

1023

host->set_clock(host, ios->clock);

drivers/mmc/host/tmio_mmc_core.c

1037

ios->clock, ios->power_mode);

drivers/mmc/host/tmio_mmc_core.c

1041

host->clk_cache = ios->clock;

drivers/mmc/host/tmio_mmc_core.c

988

ios->clock, ios->power_mode);

drivers/mmc/host/toshsd.c

82

if (ios->clock) {

drivers/mmc/host/toshsd.c

86

while (ios->clock < HCLK / div)

drivers/mmc/host/uniphier-sd.c

469

unsigned int clock)

drivers/mmc/host/uniphier-sd.c

483

if (clock == 0)

drivers/mmc/host/uniphier-sd.c

490

divisor = priv->clk_rate / clock;

drivers/mmc/host/usdhi6rol0.c

729

unsigned long rate = ios->clock;

drivers/mmc/host/usdhi6rol0.c

825

ios->clock, ios->vdd, ios->power_mode, ios->bus_width, ios->timing);

drivers/mmc/host/usdhi6rol0.c

867

if (host->rate != ios->clock)

drivers/mmc/host/ushc.c

377

ushc_set_bus_freq(ushc, ios->clock, ios->timing == MMC_TIMING_SD_HS);

drivers/mmc/host/via-sdmmc.c

726

u8 clock;

drivers/mmc/host/via-sdmmc.c

754

if (ios->clock >= 48000000)

drivers/mmc/host/via-sdmmc.c

755

clock = PCI_CLK_48M;

drivers/mmc/host/via-sdmmc.c

756

else if (ios->clock >= 33000000)

drivers/mmc/host/via-sdmmc.c

757

clock = PCI_CLK_33M;

drivers/mmc/host/via-sdmmc.c

758

else if (ios->clock >= 24000000)

drivers/mmc/host/via-sdmmc.c

759

clock = PCI_CLK_24M;

drivers/mmc/host/via-sdmmc.c

760

else if (ios->clock >= 16000000)

drivers/mmc/host/via-sdmmc.c

761

clock = PCI_CLK_16M;

drivers/mmc/host/via-sdmmc.c

762

else if (ios->clock >= 12000000)

drivers/mmc/host/via-sdmmc.c

763

clock = PCI_CLK_12M;

drivers/mmc/host/via-sdmmc.c

764

else if (ios->clock >= 8000000)

drivers/mmc/host/via-sdmmc.c

765

clock = PCI_CLK_8M;

drivers/mmc/host/via-sdmmc.c

767

clock = PCI_CLK_375K;

drivers/mmc/host/via-sdmmc.c

770

if (readb(addrbase + VIA_CRDR_PCISDCCLK) != clock)

drivers/mmc/host/via-sdmmc.c

771

writeb(clock, addrbase + VIA_CRDR_PCISDCCLK);

drivers/mmc/host/vub300.c

1969

if (ios->clock >= 48000000)

drivers/mmc/host/vub300.c

1971

else if (ios->clock >= 24000000)

drivers/mmc/host/vub300.c

1973

else if (ios->clock >= 20000000)

drivers/mmc/host/vub300.c

1975

else if (ios->clock >= 15000000)

drivers/mmc/host/vub300.c

1977

else if (ios->clock >= 200000)

drivers/mmc/host/wbsd.c

851

if (ios->clock >= 24000000)

drivers/mmc/host/wbsd.c

853

else if (ios->clock >= 16000000)

drivers/mmc/host/wbsd.c

855

else if (ios->clock >= 12000000)

drivers/mmc/host/wmt-sdmmc.c

684

if (ios->clock != 0)

drivers/mmc/host/wmt-sdmmc.c

685

clk_set_rate(priv->clk_sdmmc, ios->clock);

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

378

u16 clock;

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

38

static inline u8 bcm47xxnflash_ops_bcm4706_ns_to_cycle(u16 ns, u16 clock)

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

40

return ((ns * 1000 * clock) / 1000000) + 1;

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

414

clock = freq / 1000000;

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

415

w0 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(15, clock);

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

416

w1 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(20, clock);

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

417

w2 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(10, clock);

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

418

w3 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(10, clock);

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c

419

w4 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(100, clock);

drivers/mtd/nand/raw/cadence-nand-controller.c

2367

static int calc_cycl(u32 timing, u32 clock)

drivers/mtd/nand/raw/cadence-nand-controller.c

2369

if (timing == 0 || clock == 0)

drivers/mtd/nand/raw/cadence-nand-controller.c

2372

if ((timing % clock) > 0)

drivers/mtd/nand/raw/cadence-nand-controller.c

2373

return timing / clock;

drivers/mtd/nand/raw/cadence-nand-controller.c

2375

return timing / clock - 1;

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

128

clk = this->resources.clock[i];

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

1280

r->clock[i] = clk;

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

144

clk_disable_unprepare(this->resources.clock[i - 1]);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

875

clk_rate = clk_round_rate(r->clock[0], hw->clk_rate);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

940

clk_disable_unprepare(r->clock[0]);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

942

ret = clk_set_rate(r->clock[0], hw->clk_rate);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

949

ret = clk_prepare_enable(r->clock[0]);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h

22

struct clk *clock[GPMI_CLK_MAX];

drivers/net/can/at91_can.c

1111

priv->can.clock.freq = clk_get_rate(clk);

drivers/net/can/bxcan.c

1000

priv->can.clock.freq = clk_get_rate(clk);

drivers/net/can/bxcan.c

1023

dev_info(dev, "clk: %d Hz, IRQs: %d, %d, %d\n", priv->can.clock.freq,

drivers/net/can/c_can/c_can_pci.c

171

priv->can.clock.freq = c_can_pci_data->freq;

drivers/net/can/c_can/c_can_platform.c

358

priv->can.clock.freq = clk_get_rate(clk);

drivers/net/can/cc770/cc770_isa.c

226

priv->can.clock.freq = clktmp;

drivers/net/can/cc770/cc770_isa.c

244

priv->can.clock.freq /= 2;

drivers/net/can/cc770/cc770_platform.c

139

priv->can.clock.freq = pdata->osc_freq;

drivers/net/can/cc770/cc770_platform.c

141

priv->can.clock.freq /= 2;

drivers/net/can/cc770/cc770_platform.c

198

priv->reg_base, dev->irq, priv->can.clock.freq,

drivers/net/can/cc770/cc770_platform.c

77

priv->can.clock.freq = clkext;

drivers/net/can/cc770/cc770_platform.c

80

if (priv->can.clock.freq > 10000000) {

drivers/net/can/cc770/cc770_platform.c

82

priv->can.clock.freq /= 2;

drivers/net/can/cc770/cc770_platform.c

86

if (priv->can.clock.freq > 8000000)

drivers/net/can/ctucanfd/ctucanfd_base.c

1427

priv->can.clock.freq = can_clk_rate;

drivers/net/can/ctucanfd/ctucanfd_base.c

1440

priv->mem_base, ndev->irq, priv->can.clock.freq, priv->ntxbufs);

drivers/net/can/ctucanfd/ctucanfd_base.c

305

ssp_offset = (priv->can.clock.freq / 1000) * dbt->sample_point / dbt->bitrate;

drivers/net/can/dev/bittiming.c

106

bt->bitrate = priv->clock.freq / (bt->brp * can_bit_time(bt));

drivers/net/can/dev/bittiming.c

109

priv->clock.freq);

drivers/net/can/dev/bittiming.c

163

u32 pwms_ns = can_tqmin_to_ns(pwm->pwms, priv->clock.freq);

drivers/net/can/dev/bittiming.c

164

u32 pwml_ns = can_tqmin_to_ns(pwm->pwml, priv->clock.freq);

drivers/net/can/dev/bittiming.c

86

brp64 = (u64)priv->clock.freq * (u64)bt->tq;

drivers/net/can/dev/calc_bittiming.c

123

brp = priv->clock.freq / (tsegall * bt->bitrate) + tseg % 2;

drivers/net/can/dev/calc_bittiming.c

130

bitrate = priv->clock.freq / (brp * tsegall);

drivers/net/can/dev/calc_bittiming.c

180

do_div(v64, priv->clock.freq);

drivers/net/can/dev/calc_bittiming.c

195

bt->bitrate = priv->clock.freq /

drivers/net/can/dev/calc_bittiming.c

235

u32 xl_ns = can_tqmin_to_ns(xl_tqmin, priv->clock.freq);

drivers/net/can/dev/netlink.c

1004

nla_put(skb, IFLA_CAN_CLOCK, sizeof(priv->clock), &priv->clock) ||

drivers/net/can/dummy_can.c

144

netdev_dbg(dev, "Clock frequency: %u\n", can_priv->clock.freq);

drivers/net/can/dummy_can.c

248

priv->can.clock.freq = 160 * MEGA /* Hz */;

drivers/net/can/esd/esd_402_pci-core.c

372

priv->can.clock.freq = card->ov.core_frequency;

drivers/net/can/flexcan/flexcan-core.c

2200

priv->can.clock.freq = clock_freq;

drivers/net/can/grcan.c

1598

priv->can.clock.freq = ambafreq;

drivers/net/can/grcan.c

1623

priv->regs, dev->irq, priv->can.clock.freq);

drivers/net/can/ifi_canfd/ifi_canfd.c

1000

priv->can.clock.freq = readl(addr + IFI_CANFD_CANCLOCK);

drivers/net/can/ifi_canfd/ifi_canfd.c

1027

priv->base, ndev->irq, priv->can.clock.freq);

drivers/net/can/janz-ican3.c

1936

mod->can.clock.freq = ICAN3_CAN_CLOCK;

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

981

can->can.clock.freq = pcie->freq;

drivers/net/can/m_can/m_can.c

1448

tdco = (cdev->can.clock.freq / 1000) *

drivers/net/can/m_can/m_can_pci.c

129

mcan_class->can.clock.freq = id->driver_data;

drivers/net/can/m_can/m_can_platform.c

143

mcan_class->can.clock.freq = clk_get_rate(mcan_class->cclk);

drivers/net/can/m_can/tcan4x5x-core.c

457

mcan_class->can.clock.freq = freq;

drivers/net/can/mscan/mpc5xxx_can.c

323

priv->can.clock.freq = data->get_clock(ofdev, clock_name,

drivers/net/can/mscan/mpc5xxx_can.c

325

if (!priv->can.clock.freq) {

drivers/net/can/mscan/mpc5xxx_can.c

338

priv->reg_base, dev->irq, priv->can.clock.freq);

drivers/net/can/peak_canfd/peak_pciefd_main.c

641

priv->ucan.can.clock.freq = 20 * 1000 * 1000;

drivers/net/can/peak_canfd/peak_pciefd_main.c

644

priv->ucan.can.clock.freq = 24 * 1000 * 1000;

drivers/net/can/peak_canfd/peak_pciefd_main.c

647

priv->ucan.can.clock.freq = 30 * 1000 * 1000;

drivers/net/can/peak_canfd/peak_pciefd_main.c

650

priv->ucan.can.clock.freq = 40 * 1000 * 1000;

drivers/net/can/peak_canfd/peak_pciefd_main.c

653

priv->ucan.can.clock.freq = 60 * 1000 * 1000;

drivers/net/can/peak_canfd/peak_pciefd_main.c

661

priv->ucan.can.clock.freq = 80 * 1000 * 1000;

drivers/net/can/rcar/rcar_can.c

800

priv->can.clock.freq = clk_get_rate(priv->can_clk);

drivers/net/can/rcar/rcar_canfd.c

1889

priv->can.clock.freq = fcan_freq;

drivers/net/can/rcar/rcar_canfd.c

1890

dev_info(dev, "can_clk rate is %u\n", priv->can.clock.freq);

drivers/net/can/rockchip/rockchip_canfd-core.c

151

tdco = (priv->can.clock.freq / dbt->bitrate) * 2 / 3;

drivers/net/can/rockchip/rockchip_canfd-core.c

796

priv->can.clock.freq < RKCANFD_ERRATUM_5_SYSCLOCK_HZ_MIN)

drivers/net/can/rockchip/rockchip_canfd-core.c

799

priv->can.clock.freq / MEGA,

drivers/net/can/rockchip/rockchip_canfd-core.c

899

priv->can.clock.freq = clk_get_rate(priv->clks[0].clk);

drivers/net/can/rockchip/rockchip_canfd-timestamp.c

57

div = min(DIV_ROUND_UP(priv->can.clock.freq, bitrate * 2),

drivers/net/can/rockchip/rockchip_canfd-timestamp.c

68

rate = priv->can.clock.freq / div;

drivers/net/can/rockchip/rockchip_canfd-timestamp.c

79

priv->can.clock.freq / MEGA,

drivers/net/can/rockchip/rockchip_canfd-timestamp.c

80

priv->can.clock.freq % MEGA / KILO / 10,

drivers/net/can/sja1000/ems_pci.c

372

priv->can.clock.freq = EMS_PCI_CAN_CLOCK;

drivers/net/can/sja1000/ems_pcmcia.c

216

priv->can.clock.freq = EMS_PCMCIA_CAN_CLOCK;

drivers/net/can/sja1000/f81601.c

165

priv->can.clock.freq = 24000000 / 2;

drivers/net/can/sja1000/f81601.c

167

priv->can.clock.freq = external_clk / 2;

drivers/net/can/sja1000/kvaser_pci.c

246

priv->can.clock.freq = KVASER_PCI_CAN_CLOCK;

drivers/net/can/sja1000/peak_pci.c

647

priv->can.clock.freq = PEAK_PCI_CAN_CLOCK;

drivers/net/can/sja1000/peak_pcmcia.c

559

priv->can.clock.freq = PCC_CAN_CLOCK;

drivers/net/can/sja1000/plx_pci.c

689

priv->can.clock.freq = ci->can_clock;

drivers/net/can/sja1000/sja1000_isa.c

177

priv->can.clock.freq = clk[idx] / 2;

drivers/net/can/sja1000/sja1000_isa.c

179

priv->can.clock.freq = clk[0] / 2;

drivers/net/can/sja1000/sja1000_isa.c

181

priv->can.clock.freq = CLK_DEFAULT / 2;

drivers/net/can/sja1000/sja1000_platform.c

116

priv->can.clock.freq = pdata->osc_freq / 2;

drivers/net/can/sja1000/sja1000_platform.c

161

if (!priv->can.clock.freq) {

drivers/net/can/sja1000/sja1000_platform.c

164

priv->can.clock.freq = prop / 2;

drivers/net/can/sja1000/sja1000_platform.c

166

priv->can.clock.freq = SP_CAN_CLOCK; /* default */

drivers/net/can/sja1000/sja1000_platform.c

183

u32 divider = priv->can.clock.freq * 2 / prop;

drivers/net/can/sja1000/sja1000_platform.c

278

priv->can.clock.freq = clk_get_rate(clk) / 2;

drivers/net/can/sja1000/sja1000_platform.c

279

if (!priv->can.clock.freq) {

drivers/net/can/sja1000/tscan1.c

126

priv->can.clock.freq = TSCAN1_SJA1000_XTAL / 2;

drivers/net/can/softing/softing_main.c

649

priv->can.clock.freq = 8000000;

drivers/net/can/spi/hi311x.c

871

priv->can.clock.freq = freq / 2;

drivers/net/can/spi/mcp251x.c

1369

priv->can.clock.freq = freq / 2;

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2032

priv->can.clock.freq / 1000000,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2033

priv->can.clock.freq % 1000000 / 1000 / 10,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2253

priv->can.clock.freq = freq;

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2255

priv->can.clock.freq *= MCP251XFD_OSC_PLL_MULTIPLIER;

drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c

49

cc->mult = clocksource_hz2mult(priv->can.clock.freq, cc->shift);

drivers/net/can/sun4i_can.c

880

priv->can.clock.freq = clk_get_rate(clk);

drivers/net/can/ti_hecc.c

924

priv->can.clock.freq = clk_get_rate(priv->clk);

drivers/net/can/usb/ems_usb.c

1009

dev->can.clock.freq = EMS_USB_ARM7_CLOCK;

drivers/net/can/usb/esd_usb.c

1240

priv->can.clock.freq = ESD_USB_3_CAN_CLOCK;

drivers/net/can/usb/esd_usb.c

1249

priv->can.clock.freq = ESD_USB_M_CAN_CLOCK;

drivers/net/can/usb/esd_usb.c

1256

priv->can.clock.freq = ESD_USB_2_CAN_CLOCK;

drivers/net/can/usb/etas_es58x/es581_4.c

474

.clock = {.freq = 50 * MEGA /* Hz */},

drivers/net/can/usb/etas_es58x/es58x_core.c

2073

can->clock = param->clock;

drivers/net/can/usb/etas_es58x/es58x_core.h

318

struct can_clock clock;

drivers/net/can/usb/etas_es58x/es58x_fd.c

527

.clock = {.freq = 80 * MEGA /* Hz */},

drivers/net/can/usb/f81604.c

1187

port_priv->can.clock.freq = F81604_CAN_CLOCK;

drivers/net/can/usb/gs_usb.c

1383

dev->can.clock.freq = le32_to_cpu(bt_const.fclk_can);

drivers/net/can/usb/kvaser_usb/kvaser_usb.h

222

const struct can_clock clock;

drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c

872

priv->can.clock.freq = dev->cfg->clock.freq;

drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c

2223

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c

2232

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c

2240

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c

508

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c

516

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c

524

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c

532

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c

540

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c

548

.clock = {

drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c

556

.clock = {

drivers/net/can/usb/nct6694_canfd.c

764

priv->can.clock.freq = can_clk;

drivers/net/can/usb/peak_usb/pcan_usb.c

1021

.clock = {

drivers/net/can/usb/peak_usb/pcan_usb_core.c

950

dev->can.clock = peak_usb_adapter->clock;

drivers/net/can/usb/peak_usb/pcan_usb_core.h

44

struct can_clock clock;

drivers/net/can/usb/peak_usb/pcan_usb_fd.c

1034

if (dev->adapter->clock.freq == pcan_usb_fd_clk_freq[i])

drivers/net/can/usb/peak_usb/pcan_usb_fd.c

1166

.clock = {

drivers/net/can/usb/peak_usb/pcan_usb_fd.c

1242

.clock = {

drivers/net/can/usb/peak_usb/pcan_usb_fd.c

1318

.clock = {

drivers/net/can/usb/peak_usb/pcan_usb_fd.c

1394

.clock = {

drivers/net/can/usb/peak_usb/pcan_usb_pro.c

1065

.clock = {

drivers/net/can/usb/ucan.c

453

up->can.clock.freq = le32_to_cpu(device_info->freq);

drivers/net/can/usb/usb_8dev.c

930

priv->can.clock.freq = USB_8DEV_ABP_CLOCK;

drivers/net/can/xilinx_can.c

2045

priv->can.clock.freq = clk_get_rate(priv->can_clk);

drivers/net/can/xilinx_can.c

2064

priv->reg_base, ndev->irq, priv->can.clock.freq,

drivers/net/dsa/microchip/ksz_ptp.c

196

pin = ptp_find_pin(ptp_data->clock, PTP_PF_PEROUT, request->index);

drivers/net/dsa/microchip/ksz_ptp.c

280

ptp_schedule_worker(ptp_data->clock, 0);

drivers/net/dsa/microchip/ksz_ptp.c

282

ptp_cancel_worker_sync(ptp_data->clock);

drivers/net/dsa/microchip/ksz_ptp.c

301

if (!ptp_data->clock)

drivers/net/dsa/microchip/ksz_ptp.c

318

ts->phc_index = ptp_clock_index(ptp_data->clock);

drivers/net/dsa/microchip/ksz_ptp.c

952

ptp_data->clock = ptp_clock_register(&ptp_data->caps, dev->dev);

drivers/net/dsa/microchip/ksz_ptp.c

953

if (IS_ERR_OR_NULL(ptp_data->clock))

drivers/net/dsa/microchip/ksz_ptp.c

954

return PTR_ERR(ptp_data->clock);

drivers/net/dsa/microchip/ksz_ptp.c

966

if (ptp_data->clock)

drivers/net/dsa/microchip/ksz_ptp.c

967

ptp_clock_unregister(ptp_data->clock);

drivers/net/dsa/microchip/ksz_ptp.h

24

struct ptp_clock *clock;

drivers/net/dsa/sja1105/sja1105_ptp.c

124

if (!ptp_data->clock)

drivers/net/dsa/sja1105/sja1105_ptp.c

134

info->phc_index = ptp_clock_index(ptp_data->clock);

drivers/net/dsa/sja1105/sja1105_ptp.c

334

ptp_clock_event(ptp_data->clock, &event);

drivers/net/dsa/sja1105/sja1105_ptp.c

391

ptp_schedule_worker(ptp_data->clock, 0);

drivers/net/dsa/sja1105/sja1105_ptp.c

685

ptp_schedule_worker(ptp_data->clock, 0);

drivers/net/dsa/sja1105/sja1105_ptp.c

908

ptp_data->clock = ptp_clock_register(&ptp_data->caps, ds->dev);

drivers/net/dsa/sja1105/sja1105_ptp.c

909

if (IS_ERR_OR_NULL(ptp_data->clock))

drivers/net/dsa/sja1105/sja1105_ptp.c

910

return PTR_ERR(ptp_data->clock);

drivers/net/dsa/sja1105/sja1105_ptp.c

925

if (IS_ERR_OR_NULL(ptp_data->clock))

drivers/net/dsa/sja1105/sja1105_ptp.c

929

ptp_cancel_worker_sync(ptp_data->clock);

drivers/net/dsa/sja1105/sja1105_ptp.c

932

ptp_clock_unregister(ptp_data->clock);

drivers/net/dsa/sja1105/sja1105_ptp.c

933

ptp_data->clock = NULL;

drivers/net/dsa/sja1105/sja1105_ptp.h

85

struct ptp_clock *clock;

drivers/net/ethernet/amazon/ena/ena_phc.c

127

phc_info->clock = ptp_clock_register(clock_info, &pdev->dev);

drivers/net/ethernet/amazon/ena/ena_phc.c

128

if (IS_ERR(phc_info->clock)) {

drivers/net/ethernet/amazon/ena/ena_phc.c

129

rc = PTR_ERR(phc_info->clock);

drivers/net/ethernet/amazon/ena/ena_phc.c

132

phc_info->clock = NULL;

drivers/net/ethernet/amazon/ena/ena_phc.c

147

ptp_clock_unregister(phc_info->clock);

drivers/net/ethernet/amazon/ena/ena_phc.c

148

phc_info->clock = NULL;

drivers/net/ethernet/amazon/ena/ena_phc.c

230

return ptp_clock_index(adapter->phc_info->clock);

drivers/net/ethernet/amazon/ena/ena_phc.c

99

return (phc_info && phc_info->clock);

drivers/net/ethernet/amazon/ena/ena_phc.h

16

struct ptp_clock *clock;

drivers/net/ethernet/amd/xgbe/xgbe-ptp.c

137

struct ptp_clock *clock;

drivers/net/ethernet/amd/xgbe/xgbe-ptp.c

151

clock = ptp_clock_register(info, pdata->dev);

drivers/net/ethernet/amd/xgbe/xgbe-ptp.c

152

if (IS_ERR(clock)) {

drivers/net/ethernet/amd/xgbe/xgbe-ptp.c

157

pdata->ptp_clock = clock;

drivers/net/ethernet/aquantia/atlantic/aq_ptp.c

1157

struct ptp_clock *clock;

drivers/net/ethernet/aquantia/atlantic/aq_ptp.c

1199

clock = ptp_clock_register(&aq_ptp->ptp_info, &aq_nic->ndev->dev);

drivers/net/ethernet/aquantia/atlantic/aq_ptp.c

1200

if (IS_ERR(clock)) {

drivers/net/ethernet/aquantia/atlantic/aq_ptp.c

1202

err = PTR_ERR(clock);

drivers/net/ethernet/aquantia/atlantic/aq_ptp.c

1205

aq_ptp->ptp_clock = clock;

drivers/net/ethernet/cavium/common/cavium_ptp.c

122

comp = ((u64)1000000000ull << 32) / clock->clock_rate;

drivers/net/ethernet/cavium/common/cavium_ptp.c

128

spin_lock_irqsave(&clock->spin_lock, flags);

drivers/net/ethernet/cavium/common/cavium_ptp.c

129

writeq(comp, clock->reg_base + PTP_CLOCK_COMP);

drivers/net/ethernet/cavium/common/cavium_ptp.c

130

spin_unlock_irqrestore(&clock->spin_lock, flags);

drivers/net/ethernet/cavium/common/cavium_ptp.c

142

struct cavium_ptp *clock =

drivers/net/ethernet/cavium/common/cavium_ptp.c

146

spin_lock_irqsave(&clock->spin_lock, flags);

drivers/net/ethernet/cavium/common/cavium_ptp.c

147

timecounter_adjtime(&clock->time_counter, delta);

drivers/net/ethernet/cavium/common/cavium_ptp.c

148

spin_unlock_irqrestore(&clock->spin_lock, flags);

drivers/net/ethernet/cavium/common/cavium_ptp.c

164

struct cavium_ptp *clock =

drivers/net/ethernet/cavium/common/cavium_ptp.c

169

spin_lock_irqsave(&clock->spin_lock, flags);

drivers/net/ethernet/cavium/common/cavium_ptp.c

170

nsec = timecounter_read(&clock->time_counter);

drivers/net/ethernet/cavium/common/cavium_ptp.c

171

spin_unlock_irqrestore(&clock->spin_lock, flags);

drivers/net/ethernet/cavium/common/cavium_ptp.c

186

struct cavium_ptp *clock =

drivers/net/ethernet/cavium/common/cavium_ptp.c

193

spin_lock_irqsave(&clock->spin_lock, flags);

drivers/net/ethernet/cavium/common/cavium_ptp.c

194

timecounter_init(&clock->time_counter, &clock->cycle_counter, nsec);

drivers/net/ethernet/cavium/common/cavium_ptp.c

195

spin_unlock_irqrestore(&clock->spin_lock, flags);

drivers/net/ethernet/cavium/common/cavium_ptp.c

214

struct cavium_ptp *clock =

drivers/net/ethernet/cavium/common/cavium_ptp.c

217

return readq(clock->reg_base + PTP_CLOCK_HI);

drivers/net/ethernet/cavium/common/cavium_ptp.c

224

struct cavium_ptp *clock;

drivers/net/ethernet/cavium/common/cavium_ptp.c

230

clock = devm_kzalloc(dev, sizeof(*clock), GFP_KERNEL);

drivers/net/ethernet/cavium/common/cavium_ptp.c

231

if (!clock) {

drivers/net/ethernet/cavium/common/cavium_ptp.c

236

clock->pdev = pdev;

drivers/net/ethernet/cavium/common/cavium_ptp.c

242

clock->reg_base = pcim_iomap_region(pdev, PCI_PTP_BAR_NO, pci_name(pdev));

drivers/net/ethernet/cavium/common/cavium_ptp.c

243

err = PTR_ERR_OR_ZERO(clock->reg_base);

drivers/net/ethernet/cavium/common/cavium_ptp.c

247

spin_lock_init(&clock->spin_lock);

drivers/net/ethernet/cavium/common/cavium_ptp.c

249

cc = &clock->cycle_counter;

drivers/net/ethernet/cavium/common/cavium_ptp.c

255

timecounter_init(&clock->time_counter, &clock->cycle_counter,

drivers/net/ethernet/cavium/common/cavium_ptp.c

258

clock->clock_rate = ptp_cavium_clock_get();

drivers/net/ethernet/cavium/common/cavium_ptp.c

260

clock->ptp_info = (struct ptp_clock_info) {

drivers/net/ethernet/cavium/common/cavium_ptp.c

274

clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

276

writeq(clock_cfg, clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

278

clock_comp = ((u64)1000000000ull << 32) / clock->clock_rate;

drivers/net/ethernet/cavium/common/cavium_ptp.c

279

writeq(clock_comp, clock->reg_base + PTP_CLOCK_COMP);

drivers/net/ethernet/cavium/common/cavium_ptp.c

281

clock->ptp_clock = ptp_clock_register(&clock->ptp_info, dev);

drivers/net/ethernet/cavium/common/cavium_ptp.c

282

if (IS_ERR(clock->ptp_clock)) {

drivers/net/ethernet/cavium/common/cavium_ptp.c

283

err = PTR_ERR(clock->ptp_clock);

drivers/net/ethernet/cavium/common/cavium_ptp.c

287

pci_set_drvdata(pdev, clock);

drivers/net/ethernet/cavium/common/cavium_ptp.c

291

clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

293

writeq(clock_cfg, clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

297

devm_kfree(dev, clock);

drivers/net/ethernet/cavium/common/cavium_ptp.c

312

struct cavium_ptp *clock = pci_get_drvdata(pdev);

drivers/net/ethernet/cavium/common/cavium_ptp.c

315

if (IS_ERR_OR_NULL(clock))

drivers/net/ethernet/cavium/common/cavium_ptp.c

318

ptp_clock_unregister(clock->ptp_clock);

drivers/net/ethernet/cavium/common/cavium_ptp.c

320

clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

322

writeq(clock_cfg, clock->reg_base + PTP_CLOCK_CFG);

drivers/net/ethernet/cavium/common/cavium_ptp.c

95

struct cavium_ptp *clock =

drivers/net/ethernet/cavium/common/cavium_ptp.h

44

static inline int cavium_ptp_clock_index(struct cavium_ptp *clock)

drivers/net/ethernet/cavium/common/cavium_ptp.h

46

return ptp_clock_index(clock->ptp_clock);

drivers/net/ethernet/cavium/common/cavium_ptp.h

63

static inline int cavium_ptp_clock_index(struct cavium_ptp *clock)

drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c

109

ptp_clock_event(ptp_qoriq->clock, &event);

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

103

int ret = -ENOMEM, clock, speed;

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

133

clock = get_bus_freq(&ofdev->dev);

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

134

if (!clock) {

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

137

clock = 0x3F * 5000000;

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

140

clock = ppc_proc_freq;

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

146

speed = (clock + 4999999) / 5000000;

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

151

clock / speed);

drivers/net/ethernet/google/gve/gve.h

793

struct ptp_clock *clock;

drivers/net/ethernet/google/gve/gve_ethtool.c

976

info->phc_index = ptp_clock_index(priv->ptp->clock);

drivers/net/ethernet/google/gve/gve_ptp.c

103

if (ptp->clock)

drivers/net/ethernet/google/gve/gve_ptp.c

104

ptp_clock_unregister(ptp->clock);

drivers/net/ethernet/google/gve/gve_ptp.c

133

ptp_schedule_worker(priv->ptp->clock,

drivers/net/ethernet/google/gve/gve_ptp.c

79

ptp->clock = ptp_clock_register(&ptp->info, &priv->pdev->dev);

drivers/net/ethernet/google/gve/gve_ptp.c

81

if (IS_ERR(ptp->clock)) {

drivers/net/ethernet/google/gve/gve_ptp.c

83

err = PTR_ERR(ptp->clock);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

404

if (hdev->ptp->clock)

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

405

info->phc_index = ptp_clock_index(hdev->ptp->clock);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

454

ptp->clock = ptp_clock_register(&ptp->info, &hdev->pdev->dev);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

455

if (IS_ERR(ptp->clock)) {

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

458

ptp->info.n_alarm, PTR_ERR(ptp->clock));

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

460

} else if (!ptp->clock) {

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

470

ptp_clock_unregister(hdev->ptp->clock);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

471

hdev->ptp->clock = NULL;

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h

60

struct ptp_clock *clock;

drivers/net/ethernet/intel/iavf/iavf_ptp.c

181

if (!adapter->ptp.clock)

drivers/net/ethernet/intel/iavf/iavf_ptp.c

249

if (!adapter->ptp.clock)

drivers/net/ethernet/intel/iavf/iavf_ptp.c

323

struct ptp_clock *clock;

drivers/net/ethernet/intel/iavf/iavf_ptp.c

332

clock = ptp_clock_register(ptp_info, dev);

drivers/net/ethernet/intel/iavf/iavf_ptp.c

333

if (IS_ERR(clock))

drivers/net/ethernet/intel/iavf/iavf_ptp.c

334

return PTR_ERR(clock);

drivers/net/ethernet/intel/iavf/iavf_ptp.c

336

adapter->ptp.clock = clock;

drivers/net/ethernet/intel/iavf/iavf_ptp.c

375

ptp_schedule_worker(adapter->ptp.clock, 0);

drivers/net/ethernet/intel/iavf/iavf_ptp.c

388

if (!adapter->ptp.clock)

drivers/net/ethernet/intel/iavf/iavf_ptp.c

393

ptp_clock_unregister(adapter->ptp.clock);

drivers/net/ethernet/intel/iavf/iavf_ptp.c

394

adapter->ptp.clock = NULL;

drivers/net/ethernet/intel/iavf/iavf_ptp.c

424

if (adapter->ptp.clock && !phc)

drivers/net/ethernet/intel/iavf/iavf_ptp.c

426

else if (!adapter->ptp.clock && phc)

drivers/net/ethernet/intel/iavf/iavf_types.h

24

struct ptp_clock *clock;

drivers/net/ethernet/intel/iavf/iavf_virtchnl.c

1531

if (!adapter->ptp.clock) {

drivers/net/ethernet/intel/ice/ice_main.c

3971

if (pf->ptp.clock)

drivers/net/ethernet/intel/ice/ice_main.c

3972

ptp_clock_unregister(pf->ptp.clock);

drivers/net/ethernet/intel/ice/ice_ptp.c

1508

ptp_clock_event(pf->ptp.clock, &event);

drivers/net/ethernet/intel/ice/ice_ptp.c

2590

if (pf->ptp.clock)

drivers/net/ethernet/intel/ice/ice_ptp.c

2599

pf->ptp.clock = ptp_clock_register(info, dev);

drivers/net/ethernet/intel/ice/ice_ptp.c

2600

if (IS_ERR(pf->ptp.clock)) {

drivers/net/ethernet/intel/ice/ice_ptp.c

2602

return PTR_ERR(pf->ptp.clock);

drivers/net/ethernet/intel/ice/ice_ptp.c

3117

struct ptp_clock *clock;

drivers/net/ethernet/intel/ice/ice_ptp.c

3121

clock = ctrl_ptp->clock;

drivers/net/ethernet/intel/ice/ice_ptp.c

3123

return clock ? ptp_clock_index(clock) : -1;

drivers/net/ethernet/intel/ice/ice_ptp.c

3186

pf->ptp.clock = NULL;

drivers/net/ethernet/intel/ice/ice_ptp.c

3349

if (pf->ptp.clock) {

drivers/net/ethernet/intel/ice/ice_ptp.c

3350

ptp_clock_unregister(ptp->clock);

drivers/net/ethernet/intel/ice/ice_ptp.c

3351

pf->ptp.clock = NULL;

drivers/net/ethernet/intel/ice/ice_ptp.c

3375

if (pf->ptp.clock) {

drivers/net/ethernet/intel/ice/ice_ptp.c

3376

ptp_clock_unregister(pf->ptp.clock);

drivers/net/ethernet/intel/ice/ice_ptp.c

3377

pf->ptp.clock = NULL;

drivers/net/ethernet/intel/ice/ice_ptp.c

3402

if (!pf->ptp.clock)

drivers/net/ethernet/intel/ice/ice_ptp.c

3408

ptp_clock_unregister(pf->ptp.clock);

drivers/net/ethernet/intel/ice/ice_ptp.c

3409

pf->ptp.clock = NULL;

drivers/net/ethernet/intel/ice/ice_ptp.h

262

struct ptp_clock *clock;

drivers/net/ethernet/intel/idpf/idpf_ethtool.c

1730

vport->adapter->ptp->clock) {

drivers/net/ethernet/intel/idpf/idpf_ethtool.c

1731

info->phc_index = ptp_clock_index(vport->adapter->ptp->clock);

drivers/net/ethernet/intel/idpf/idpf_ptp.c

1015

if (ptp->clock) {

drivers/net/ethernet/intel/idpf/idpf_ptp.c

1017

ptp_cancel_worker_sync(adapter->ptp->clock);

drivers/net/ethernet/intel/idpf/idpf_ptp.c

1019

ptp_clock_unregister(ptp->clock);

drivers/net/ethernet/intel/idpf/idpf_ptp.c

820

struct ptp_clock *clock;

drivers/net/ethernet/intel/idpf/idpf_ptp.c

825

clock = ptp_clock_register(&adapter->ptp->info,

drivers/net/ethernet/intel/idpf/idpf_ptp.c

827

if (IS_ERR(clock)) {

drivers/net/ethernet/intel/idpf/idpf_ptp.c

829

clock);

drivers/net/ethernet/intel/idpf/idpf_ptp.c

830

return PTR_ERR(clock);

drivers/net/ethernet/intel/idpf/idpf_ptp.c

833

adapter->ptp->clock = clock;

drivers/net/ethernet/intel/idpf/idpf_ptp.c

960

ptp_schedule_worker(adapter->ptp->clock, 0);

drivers/net/ethernet/intel/idpf/idpf_ptp.c

988

ptp_cancel_worker_sync(adapter->ptp->clock);

drivers/net/ethernet/intel/idpf/idpf_ptp.c

990

ptp_clock_unregister(adapter->ptp->clock);

drivers/net/ethernet/intel/idpf/idpf_ptp.c

991

adapter->ptp->clock = NULL;

drivers/net/ethernet/intel/idpf/idpf_ptp.h

182

struct ptp_clock *clock;

drivers/net/ethernet/mellanox/mlx4/en_clock.c

112

timecounter_read(&mdev->clock);

drivers/net/ethernet/mellanox/mlx4/en_clock.c

138

timecounter_read(&mdev->clock);

drivers/net/ethernet/mellanox/mlx4/en_clock.c

159

timecounter_adjtime(&mdev->clock, delta);

drivers/net/ethernet/mellanox/mlx4/en_clock.c

182

ns = timecounter_read(&mdev->clock);

drivers/net/ethernet/mellanox/mlx4/en_clock.c

208

timecounter_init(&mdev->clock, &mdev->cycles, ns);

drivers/net/ethernet/mellanox/mlx4/en_clock.c

284

timecounter_init(&mdev->clock, &mdev->cycles,

drivers/net/ethernet/mellanox/mlx4/en_clock.c

68

nsec = timecounter_cyc2time(&mdev->clock, timestamp);

drivers/net/ethernet/mellanox/mlx4/mlx4_en.h

425

struct timecounter clock;

drivers/net/ethernet/mellanox/mlx5/core/en.h

452

struct mlx5_clock *clock;

drivers/net/ethernet/mellanox/mlx5/core/en.h

706

struct mlx5_clock *clock;

drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c

219

hwtstamp = mlx5e_cqe_ts_to_ns(sq->ptp_cyc2time, sq->clock, get_cqe_ts(cqe));

drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c

339

sq->clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c

710

rq->clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/en/trap.c

49

rq->clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h

59

ktime_t mlx5e_cqe_ts_to_ns(cqe_ts_to_ns func, struct mlx5_clock *clock, u64 cqe_ts)

drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h

62

clock, cqe_ts);

drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c

186

_ctx->rq->clock, get_cqe_ts(_ctx->cqe));

drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c

292

return mlx5_real_time_cyc2time(priv->cq->mdev->clock, ts);

drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c

294

return mlx5_timecounter_cyc2time(priv->cq->mdev->clock, ts);

drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c

75

rq->clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

1657

sq->clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

670

rq->clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/en_rx.c

1439

rq->clock, get_cqe_ts(cqe));

drivers/net/ethernet/mellanox/mlx5/core/en_rx.c

2526

rq->clock, get_cqe_ts(cqe));

drivers/net/ethernet/mellanox/mlx5/core/en_tx.c

724

hwts.hwtstamp = mlx5e_cqe_ts_to_ns(sq->ptp_cyc2time, sq->clock, ts);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1008

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

101

static void mlx5_clock_lockdep_assert(struct mlx5_clock *clock)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1015

return !(clock->pps_info.pin_caps[pin] &

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1018

return !(clock->pps_info.pin_caps[pin] &

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

103

if (!clock->shared)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

106

lockdep_assert(lockdep_is_held(&clock_priv(clock)->lock));

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1078

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1081

if (!clock->ptp_info.n_pins)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1084

clock->ptp_info.pin_config =

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1085

kzalloc_objs(*clock->ptp_info.pin_config,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1086

clock->ptp_info.n_pins);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1087

if (!clock->ptp_info.pin_config)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1089

clock->ptp_info.enable = mlx5_ptp_enable;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

109

static struct mlx5_core_dev *mlx5_clock_mdev_get(struct mlx5_clock *clock)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1090

clock->ptp_info.verify = mlx5_ptp_verify;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1091

clock->ptp_info.pps = 1;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1093

clock->ptp_info.supported_extts_flags = PTP_RISING_EDGE |

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1098

clock->ptp_info.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1100

for (i = 0; i < clock->ptp_info.n_pins; i++) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1101

snprintf(clock->ptp_info.pin_config[i].name,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1102

sizeof(clock->ptp_info.pin_config[i].name),

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1104

clock->ptp_info.pin_config[i].index = i;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1105

clock->ptp_info.pin_config[i].func = mlx5_get_pps_pin_mode(mdev, i);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1106

clock->ptp_info.pin_config[i].chan = 0;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

111

mlx5_clock_lockdep_assert(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1113

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1117

clock->ptp_info.n_pins = MLX5_GET(mtpps_reg, out,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1119

clock->ptp_info.n_ext_ts = MLX5_GET(mtpps_reg, out,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1121

clock->ptp_info.n_per_out = MLX5_GET(mtpps_reg, out,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1125

clock->pps_info.min_npps_period = 1 << MLX5_GET(mtpps_reg, out,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1128

clock->pps_info.min_out_pulse_duration_ns = 1 << MLX5_GET(mtpps_reg, out,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

113

return clock_priv(clock)->mdev;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1131

clock->pps_info.pin_caps[0] = MLX5_GET(mtpps_reg, out, cap_pin_0_mode);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1132

clock->pps_info.pin_caps[1] = MLX5_GET(mtpps_reg, out, cap_pin_1_mode);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1133

clock->pps_info.pin_caps[2] = MLX5_GET(mtpps_reg, out, cap_pin_2_mode);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1134

clock->pps_info.pin_caps[3] = MLX5_GET(mtpps_reg, out, cap_pin_3_mode);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1135

clock->pps_info.pin_caps[4] = MLX5_GET(mtpps_reg, out, cap_pin_4_mode);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1136

clock->pps_info.pin_caps[5] = MLX5_GET(mtpps_reg, out, cap_pin_5_mode);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1137

clock->pps_info.pin_caps[6] = MLX5_GET(mtpps_reg, out, cap_pin_6_mode);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1138

clock->pps_info.pin_caps[7] = MLX5_GET(mtpps_reg, out, cap_pin_7_mode);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1148

struct mlx5_clock *clock)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1153

mlx5_ptp_gettimex(&clock->ptp_info, &ts, NULL);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

116

static void mlx5_clock_lock(struct mlx5_clock *clock)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1166

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1173

switch (clock->ptp_info.pin_config[pin].func) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1177

mlx5_real_time_cyc2time(clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1179

mlx5_timecounter_cyc2time(clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

118

if (!clock->shared)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1181

if (clock->pps_info.enabled) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1189

ptp_clock_event(clock->ptp, &ptp_event);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1192

if (clock->shared) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1196

ns = perout_conf_next_event_timer(mdev, clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1197

write_seqlock_irqsave(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1198

clock->pps_info.start[pin] = ns;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1199

write_sequnlock_irqrestore(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1204

clock->ptp_info.pin_config[pin].func);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

121

mutex_lock(&clock_priv(clock)->lock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1212

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1213

struct mlx5_timer *timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1231

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1232

struct mlx5_timer *timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

124

static void mlx5_clock_unlock(struct mlx5_clock *clock)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

126

if (!clock->shared)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1264

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1275

timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1287

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

129

mutex_unlock(&clock_priv(clock)->lock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1300

clock->ptp_info.max_adj =

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1306

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1310

clock->ptp_info = mlx5_ptp_clock_info;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1321

clock->ptp_info.getcrosststamp = mlx5_ptp_getcrosststamp;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1323

clock->ptp_info.getcrosscycles =

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1329

clock->ptp_info.getcyclesx64 = mlx5_ptp_getcyclesx;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1339

mlx5_clock_settime(mdev, clock, &ts);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1354

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1356

seqlock_init(&clock->lock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1364

clock->ptp = ptp_clock_register(&clock->ptp_info,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1365

clock->shared ? NULL : &mdev->pdev->dev);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1366

if (IS_ERR(clock->ptp)) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1368

clock->shared ? "shared clock " : "",

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1369

clock->ptp);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1370

clock->ptp = NULL;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1373

if (clock->ptp)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1374

ptp_schedule_worker(clock->ptp, 0);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1379

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1381

if (clock->ptp) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1382

ptp_clock_unregister(clock->ptp);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1383

clock->ptp = NULL;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1391

kfree(clock->ptp_info.pin_config);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1396

struct mlx5_clock_priv *cpriv = clock_priv(mdev->clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1401

mdev->clock = NULL;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1407

struct mlx5_clock *clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1415

clock = &cpriv->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1416

clock->shared = shared;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1417

mdev->clock = clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1418

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1420

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1422

if (!clock->shared)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1425

if (!clock->ptp) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1455

if (peer_dev->clock) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1462

mdev->clock = next->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1470

if (!mdev->clock) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1479

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1484

if (peer_dev->clock && peer_dev != mdev) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1491

struct mlx5_clock_priv *cpriv = clock_priv(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1493

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1496

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1501

mdev->clock = NULL;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1508

static void mlx5_clock_arm_pps_in_event(struct mlx5_clock *clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1512

struct ptp_clock_info *ptp_info = &clock->ptp_info;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1513

struct mlx5_clock_priv *cpriv = clock_priv(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1518

!clock->pps_info.pin_armed[i])

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1535

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1545

if (!clock->shared) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1546

mlx5_clock_arm_pps_in_event(clock, mdev, NULL);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1550

cpriv = clock_priv(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1552

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1554

mlx5_clock_arm_pps_in_event(clock, mdev, cpriv->event_mdev);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1555

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1562

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1568

if (!clock->shared) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1569

mlx5_clock_arm_pps_in_event(clock, NULL, mdev);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1575

if (peer_dev->clock && peer_dev != mdev) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1581

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1582

if (mdev == clock_priv(clock)->event_mdev)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1583

mlx5_clock_arm_pps_in_event(clock, next, mdev);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1584

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1601

mdev->clock = &null_clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1619

if (!mdev->clock) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1636

if (mdev->clock->shared)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

199

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

203

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

204

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

206

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

304

*device_time = mlx5_timecounter_cyc2time(mdev->clock, device);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

329

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

334

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

335

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

347

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

354

struct mlx5_clock *clock =

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

360

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

361

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

373

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

407

struct mlx5_clock *clock = container_of(timer, struct mlx5_clock, timer);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

408

struct mlx5_core_dev *mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

416

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

427

timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

442

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

447

for (i = 0; i < clock->ptp_info.n_pins; i++) {

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

450

write_seqlock_irqsave(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

451

tstart = clock->pps_info.start[i];

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

452

clock->pps_info.start[i] = 0;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

453

write_sequnlock_irqrestore(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

468

struct mlx5_clock *clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

471

clock = container_of(ptp_info, struct mlx5_clock, ptp_info);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

472

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

473

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

474

timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

479

write_seqlock_irqsave(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

482

write_sequnlock_irqrestore(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

485

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

505

static int mlx5_clock_settime(struct mlx5_core_dev *mdev, struct mlx5_clock *clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

508

struct mlx5_timer *timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

518

write_seqlock_irqsave(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

521

write_sequnlock_irqrestore(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

528

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

532

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

533

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

534

err = mlx5_clock_settime(mdev, clock, ts);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

535

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

555

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

559

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

560

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

567

ns = mlx5_timecounter_cyc2time(clock, cycles);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

570

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

578

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

583

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

584

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

588

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

615

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

616

struct mlx5_timer *timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

621

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

622

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

631

write_seqlock_irqsave(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

634

write_sequnlock_irqrestore(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

637

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

643

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

647

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

648

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

650

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

677

struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

678

struct mlx5_timer *timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

684

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

685

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

696

write_seqlock_irqsave(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

700

write_sequnlock_irqrestore(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

701

ptp_schedule_worker(clock->ptp, timer->overflow_period);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

704

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

712

struct mlx5_clock *clock =

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

728

if (rq->extts.index >= clock->ptp_info.n_pins)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

731

pin = ptp_find_pin(clock->ptp, PTP_PF_EXTTS, rq->extts.index);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

745

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

746

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

767

clock->pps_info.pin_armed[pin] = on;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

768

clock_priv(clock)->event_mdev = mdev;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

771

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

777

struct mlx5_clock *clock = mdev->clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

783

timer = &clock->timer;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

786

write_seqlock_irqsave(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

791

write_sequnlock_irqrestore(&clock->lock, flags);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

836

struct mlx5_pps *pps_info = &mdev->clock->pps_info;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

869

struct mlx5_pps *pps_info = &mdev->clock->pps_info;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

896

struct mlx5_clock *clock =

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

90

struct mlx5_clock clock;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

910

if (rq->perout.index >= clock->ptp_info.n_pins)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

914

pin = ptp_find_pin(clock->ptp, PTP_PF_PEROUT, rq->perout.index);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

918

mlx5_clock_lock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

919

mdev = mlx5_clock_mdev_get(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

96

static struct mlx5_clock_priv *clock_priv(struct mlx5_clock *clock)

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

968

mlx5_clock_unlock(clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

976

struct mlx5_clock *clock =

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

979

clock->pps_info.enabled = !!on;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

98

return container_of(clock, struct mlx5_clock_priv, clock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h

103

seq = read_seqbegin(&clock->lock);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h

105

} while (read_seqretry(&clock->lock, seq));

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h

112

static inline ktime_t mlx5_real_time_cyc2time(struct mlx5_clock *clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h

129

static inline ktime_t mlx5_timecounter_cyc2time(struct mlx5_clock *clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h

135

static inline ktime_t mlx5_real_time_cyc2time(struct mlx5_clock *clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h

92

return mdev->clock->ptp ? ptp_clock_index(mdev->clock->ptp) : -1;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h

95

static inline ktime_t mlx5_timecounter_cyc2time(struct mlx5_clock *clock,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h

98

struct mlx5_timer *timer = &clock->timer;

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3123

mlxsw_sp->clock =

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3126

if (IS_ERR(mlxsw_sp->clock)) {

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3127

err = PTR_ERR(mlxsw_sp->clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3133

if (mlxsw_sp->clock) {

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3191

if (mlxsw_sp->clock)

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3194

if (mlxsw_sp->clock)

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3195

mlxsw_sp->ptp_ops->clock_fini(mlxsw_sp->clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3379

if (mlxsw_sp->clock) {

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

3381

mlxsw_sp->ptp_ops->clock_fini(mlxsw_sp->clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum.h

180

struct mlxsw_sp_ptp_clock *clock;

drivers/net/ethernet/mellanox/mlxsw/spectrum.h

218

void (*clock_fini)(struct mlxsw_sp_ptp_clock *clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

112

static u64 __mlxsw_sp1_ptp_read_frc(struct mlxsw_sp1_ptp_clock *clock,

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

115

struct mlxsw_core *mlxsw_core = clock->common.core;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

1283

info->phc_index = ptp_clock_index(mlxsw_sp->clock->ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

136

struct mlxsw_sp1_ptp_clock *clock =

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

139

return __mlxsw_sp1_ptp_read_frc(clock, NULL) & cc->mask;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

143

mlxsw_sp_ptp_phc_adjfreq(struct mlxsw_sp_ptp_clock *clock, int freq_adj)

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

145

struct mlxsw_core *mlxsw_core = clock->core;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

164

mlxsw_sp1_ptp_phc_settime(struct mlxsw_sp1_ptp_clock *clock, u64 nsec)

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

166

struct mlxsw_core *mlxsw_core = clock->common.core;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

1673

info->phc_index = ptp_clock_index(mlxsw_sp->clock->ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

175

spin_lock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

176

cycles = mlxsw_sp1_ptp_ns2cycles(&clock->tc, next_sec_in_nsec);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

177

spin_unlock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

192

struct mlxsw_sp1_ptp_clock *clock = mlxsw_sp1_ptp_clock(ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

197

spin_lock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

198

timecounter_read(&clock->tc);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

199

clock->cycles.mult = adjust_by_scaled_ppm(clock->nominal_c_mult,

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

201

spin_unlock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

203

return mlxsw_sp_ptp_phc_adjfreq(&clock->common, ppb);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

208

struct mlxsw_sp1_ptp_clock *clock = mlxsw_sp1_ptp_clock(ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

211

spin_lock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

212

timecounter_adjtime(&clock->tc, delta);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

213

nsec = timecounter_read(&clock->tc);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

214

spin_unlock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

216

return mlxsw_sp1_ptp_phc_settime(clock, nsec);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

223

struct mlxsw_sp1_ptp_clock *clock = mlxsw_sp1_ptp_clock(ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

226

spin_lock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

227

cycles = __mlxsw_sp1_ptp_read_frc(clock, sts);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

228

nsec = timecounter_cyc2time(&clock->tc, cycles);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

229

spin_unlock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

239

struct mlxsw_sp1_ptp_clock *clock = mlxsw_sp1_ptp_clock(ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

242

spin_lock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

243

timecounter_init(&clock->tc, &clock->cycles, nsec);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

244

nsec = timecounter_read(&clock->tc);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

245

spin_unlock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

247

return mlxsw_sp1_ptp_phc_settime(clock, nsec);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

263

struct mlxsw_sp1_ptp_clock *clock;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

265

clock = container_of(dwork, struct mlxsw_sp1_ptp_clock, overflow_work);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

267

spin_lock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

268

timecounter_read(&clock->tc);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

269

spin_unlock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

270

mlxsw_core_schedule_dw(&clock->overflow_work, clock->overflow_period);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

277

struct mlxsw_sp1_ptp_clock *clock;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

280

clock = kzalloc_obj(*clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

281

if (!clock)

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

284

spin_lock_init(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

285

clock->cycles.read = mlxsw_sp1_ptp_read_frc;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

286

clock->cycles.shift = MLXSW_SP1_PTP_CLOCK_CYCLES_SHIFT;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

287

clock->cycles.mult = clocksource_khz2mult(MLXSW_SP1_PTP_CLOCK_FREQ_KHZ,

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

288

clock->cycles.shift);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

289

clock->nominal_c_mult = clock->cycles.mult;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

290

clock->cycles.mask = CLOCKSOURCE_MASK(MLXSW_SP1_PTP_CLOCK_MASK);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

291

clock->common.core = mlxsw_sp->core;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

293

timecounter_init(&clock->tc, &clock->cycles, 0);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

302

overflow_cycles = div64_u64(~0ULL >> 1, clock->cycles.mult);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

303

overflow_cycles = min(overflow_cycles, div_u64(clock->cycles.mask, 3));

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

305

nsec = cyclecounter_cyc2ns(&clock->cycles, overflow_cycles, 0, &frac);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

306

clock->overflow_period = nsecs_to_jiffies(nsec);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

308

INIT_DELAYED_WORK(&clock->overflow_work, mlxsw_sp1_ptp_clock_overflow);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

309

mlxsw_core_schedule_dw(&clock->overflow_work, 0);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

311

clock->common.ptp_info = mlxsw_sp1_ptp_clock_info;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

312

clock->common.ptp = ptp_clock_register(&clock->common.ptp_info, dev);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

313

if (IS_ERR(clock->common.ptp)) {

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

314

err = PTR_ERR(clock->common.ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

319

return &clock->common;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

322

cancel_delayed_work_sync(&clock->overflow_work);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

323

kfree(clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

329

struct mlxsw_sp1_ptp_clock *clock =

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

333

cancel_delayed_work_sync(&clock->overflow_work);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

334

kfree(clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

337

static u64 mlxsw_sp2_ptp_read_utc(struct mlxsw_sp_ptp_clock *clock,

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

340

struct mlxsw_core *mlxsw_core = clock->core;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

360

mlxsw_sp2_ptp_phc_settime(struct mlxsw_sp_ptp_clock *clock, u64 nsec)

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

362

struct mlxsw_core *mlxsw_core = clock->core;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

375

struct mlxsw_sp_ptp_clock *clock =

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

383

return mlxsw_sp_ptp_phc_adjfreq(clock, -ppb);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

388

struct mlxsw_sp_ptp_clock *clock =

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

390

struct mlxsw_core *mlxsw_core = clock->core;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

397

nsec = mlxsw_sp2_ptp_read_utc(clock, NULL);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

400

return mlxsw_sp2_ptp_phc_settime(clock, nsec);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

413

struct mlxsw_sp_ptp_clock *clock =

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

417

nsec = mlxsw_sp2_ptp_read_utc(clock, sts);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

426

struct mlxsw_sp_ptp_clock *clock =

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

430

return mlxsw_sp2_ptp_phc_settime(clock, nsec);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

446

struct mlxsw_sp_ptp_clock *clock;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

449

clock = kzalloc_obj(*clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

450

if (!clock)

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

453

clock->core = mlxsw_sp->core;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

455

clock->ptp_info = mlxsw_sp2_ptp_clock_info;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

457

err = mlxsw_sp2_ptp_phc_settime(clock, 0);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

463

clock->ptp = ptp_clock_register(&clock->ptp_info, dev);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

464

if (IS_ERR(clock->ptp)) {

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

465

err = PTR_ERR(clock->ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

470

return clock;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

474

kfree(clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

478

void mlxsw_sp2_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock)

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

480

ptp_clock_unregister(clock->ptp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

481

kfree(clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

616

struct mlxsw_sp_ptp_clock *clock_common = mlxsw_sp->clock;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

617

struct mlxsw_sp1_ptp_clock *clock =

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

623

spin_lock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

624

nsec = timecounter_cyc2time(&clock->tc, timestamp);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

625

spin_unlock_bh(&clock->lock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h

159

static inline void mlxsw_sp2_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock)

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h

19

void mlxsw_sp1_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h

56

void mlxsw_sp2_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h

86

static inline void mlxsw_sp1_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock)

drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c

552

if (phc->clock) {

drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c

553

info->phc_index = ptp_clock_index(phc->clock);

drivers/net/ethernet/microchip/lan966x/lan966x_main.h

251

struct ptp_clock *clock;

drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c

1021

phc->clock = ptp_clock_register(&phc->info, lan966x->dev);

drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c

1022

if (IS_ERR(phc->clock))

drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c

1023

return PTR_ERR(phc->clock);

drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c

1100

ptp_clock_unregister(lan966x->phc[i].clock);

drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c

583

pin = ptp_find_pin_unlocked(phc->clock, PTP_PF_EXTTS, 0);

drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c

616

ptp_clock_event(phc->clock, &ptp_event);

drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c

844

pin = ptp_find_pin(phc->clock, PTP_PF_PEROUT, rq->perout.index);

drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c

942

pin = ptp_find_pin(phc->clock, PTP_PF_EXTTS, rq->extts.index);

drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c

1197

if (phc->clock) {

drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c

1198

info->phc_index = ptp_clock_index(phc->clock);

drivers/net/ethernet/microchip/sparx5/sparx5_main.h

250

struct ptp_clock *clock;

drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c

593

phc->clock = ptp_clock_register(&phc->info, sparx5->dev);

drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c

594

if (IS_ERR(phc->clock))

drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c

595

return PTR_ERR(phc->clock);

drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c

672

ptp_clock_unregister(sparx5->phc[i].clock);

drivers/net/ethernet/qlogic/qede/qede_ptp.c

15

struct ptp_clock *clock;

drivers/net/ethernet/qlogic/qede/qede_ptp.c

357

if (ptp->clock)

drivers/net/ethernet/qlogic/qede/qede_ptp.c

358

info->phc_index = ptp_clock_index(ptp->clock);

drivers/net/ethernet/qlogic/qede/qede_ptp.c

387

if (ptp->clock) {

drivers/net/ethernet/qlogic/qede/qede_ptp.c

388

ptp_clock_unregister(ptp->clock);

drivers/net/ethernet/qlogic/qede/qede_ptp.c

389

ptp->clock = NULL;

drivers/net/ethernet/qlogic/qede/qede_ptp.c

485

ptp->clock = ptp_clock_register(&ptp->clock_info, &edev->pdev->dev);

drivers/net/ethernet/qlogic/qede/qede_ptp.c

486

if (IS_ERR(ptp->clock)) {

drivers/net/ethernet/renesas/ravb.h

1029

struct ptp_clock *clock;

drivers/net/ethernet/renesas/ravb_main.c

1770

info->phc_index = ptp_clock_index(priv->ptp.clock);

drivers/net/ethernet/renesas/ravb_ptp.c

301

ptp_clock_event(priv->ptp.clock, &event);

drivers/net/ethernet/renesas/ravb_ptp.c

330

priv->ptp.clock = ptp_clock_register(&priv->ptp.info, &pdev->dev);

drivers/net/ethernet/renesas/ravb_ptp.c

340

ptp_clock_unregister(priv->ptp.clock);

drivers/net/ethernet/renesas/rcar_gen4_ptp.c

162

ptp_priv->clock = ptp_clock_register(&ptp_priv->info, NULL);

drivers/net/ethernet/renesas/rcar_gen4_ptp.c

163

if (IS_ERR(ptp_priv->clock))

drivers/net/ethernet/renesas/rcar_gen4_ptp.c

164

return PTR_ERR(ptp_priv->clock);

drivers/net/ethernet/renesas/rcar_gen4_ptp.c

177

return ptp_clock_unregister(ptp_priv->clock);

drivers/net/ethernet/renesas/rcar_gen4_ptp.c

203

return ptp_clock_index(priv->clock);

drivers/net/ethernet/renesas/rcar_gen4_ptp.c

29

struct ptp_clock *clock;

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1048

.clock.rmii_clk_sel_mask = BIT_U16(7),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1049

.clock.mac_speed_mask = BIT_U16(2),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

119

struct rk_clock_fields clock;

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1329

bsp_priv->clock = ops->clock;

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1343

if (bsp_priv->clock.io_clksel_cru_mask &&

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1344

bsp_priv->clock.io_clksel_io_mask)

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1408

if (bsp_priv->clock.rmii_mode_mask) {

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1410

bsp_priv->clock.rmii_mode_mask);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1506

bsp_priv->clock.gmii_clk_sel_mask) {

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1511

val = rk_encode_wm16(ret, bsp_priv->clock.gmii_clk_sel_mask);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1515

(bsp_priv->clock.rmii_clk_sel_mask ||

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1516

bsp_priv->clock.mac_speed_mask)) {

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1518

val = rk_encode_wm16(is_100m, bsp_priv->clock.mac_speed_mask) |

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1520

bsp_priv->clock.rmii_clk_sel_mask);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

186

if (!bsp_priv->clock.rmii_gate_en_mask)

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

189

val = rk_encode_wm16(state, bsp_priv->clock.rmii_gate_en_mask);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

209

if (!bsp_priv->clock.io_clksel_io_mask &&

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

210

!bsp_priv->clock.io_clksel_cru_mask)

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

224

val = rk_encode_wm16(io, bsp_priv->clock.io_clksel_io_mask) |

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

225

rk_encode_wm16(cru, bsp_priv->clock.io_clksel_cru_mask);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

334

.clock.mac_speed_mask = BIT_U16(2),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

371

.clock.gmii_clk_sel_mask = GENMASK_U16(13, 12),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

372

.clock.rmii_clk_sel_mask = BIT_U16(11),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

373

.clock.mac_speed_mask = BIT_U16(10),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

434

.clock.gmii_clk_sel_mask = GENMASK_U16(9, 8),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

435

.clock.rmii_clk_sel_mask = BIT_U16(7),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

436

.clock.mac_speed_mask = BIT_U16(2),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

471

.clock.gmii_clk_sel_mask = GENMASK_U16(13, 12),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

472

.clock.rmii_clk_sel_mask = BIT_U16(11),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

473

.clock.mac_speed_mask = BIT_U16(10),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

489

.clock.mac_speed_mask = BIT_U16(0),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

518

bsp_priv->clock.gmii_clk_sel_mask = GENMASK_U16(12, 11);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

561

.clock.rmii_clk_sel_mask = BIT_U16(7),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

562

.clock.mac_speed_mask = BIT_U16(2),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

60

struct rk_clock_fields clock;

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

606

.clock.gmii_clk_sel_mask = GENMASK_U16(5, 4),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

607

.clock.rmii_clk_sel_mask = BIT_U16(3),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

608

.clock.mac_speed_mask = BIT_U16(7),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

645

.clock.gmii_clk_sel_mask = GENMASK_U16(5, 4),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

646

.clock.rmii_clk_sel_mask = BIT_U16(3),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

647

.clock.mac_speed_mask = BIT_U16(7),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

684

.clock.gmii_clk_sel_mask = GENMASK_U16(5, 4),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

685

.clock.rmii_clk_sel_mask = BIT_U16(3),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

686

.clock.mac_speed_mask = BIT_U16(7),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

715

.clock.io_clksel_io_mask = BIT_U16(5),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

716

.clock.rmii_clk_sel_mask = BIT_U16(3),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

717

.clock.rmii_gate_en_mask = BIT_U16(2),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

718

.clock.rmii_mode_mask = BIT_U16(1),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

749

bsp_priv->clock.rmii_clk_sel_mask = BIT_U16(3);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

750

bsp_priv->clock.rmii_gate_en_mask = BIT_U16(2);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

751

bsp_priv->clock.rmii_mode_mask = BIT_U16(1);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

757

bsp_priv->clock.io_clksel_io_mask = BIT_U16(12);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

758

bsp_priv->clock.gmii_clk_sel_mask = GENMASK_U16(11, 10);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

759

bsp_priv->clock.rmii_clk_sel_mask = BIT_U16(10);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

760

bsp_priv->clock.rmii_gate_en_mask = BIT_U16(9);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

761

bsp_priv->clock.rmii_mode_mask = BIT_U16(8);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

940

.clock.io_clksel_io_mask = BIT_U16(7),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

941

.clock.gmii_clk_sel_mask = GENMASK_U16(6, 5),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

942

.clock.rmii_clk_sel_mask = BIT_U16(5),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

943

.clock.rmii_gate_en_mask = BIT_U16(4),

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

978

bsp_priv->clock.io_clksel_cru_mask = BIT_U16(4);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

979

bsp_priv->clock.gmii_clk_sel_mask = GENMASK_U16(3, 2);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

980

bsp_priv->clock.rmii_clk_sel_mask = BIT_U16(2);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

981

bsp_priv->clock.rmii_gate_en_mask = BIT_U16(1);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

982

bsp_priv->clock.rmii_mode_mask = BIT_U16(0);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

987

bsp_priv->clock.io_clksel_cru_mask = BIT_U16(9);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

988

bsp_priv->clock.gmii_clk_sel_mask = GENMASK_U16(8, 7);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

989

bsp_priv->clock.rmii_clk_sel_mask = BIT_U16(7);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

990

bsp_priv->clock.rmii_gate_en_mask = BIT_U16(6);

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

991

bsp_priv->clock.rmii_mode_mask = BIT_U16(5);

drivers/net/ethernet/ti/cpts.c

160

ptp_clock_event(cpts->clock, &pevent);

drivers/net/ethernet/ti/cpts.c

173

ptp_schedule_worker(cpts->clock, 0);

drivers/net/ethernet/ti/cpts.c

545

ptp_schedule_worker(cpts->clock, 0);

drivers/net/ethernet/ti/cpts.c

568

cpts->clock = ptp_clock_register(&cpts->info, cpts->dev);

drivers/net/ethernet/ti/cpts.c

569

if (IS_ERR(cpts->clock)) {

drivers/net/ethernet/ti/cpts.c

570

err = PTR_ERR(cpts->clock);

drivers/net/ethernet/ti/cpts.c

571

cpts->clock = NULL;

drivers/net/ethernet/ti/cpts.c

574

cpts->phc_index = ptp_clock_index(cpts->clock);

drivers/net/ethernet/ti/cpts.c

576

ptp_schedule_worker(cpts->clock, cpts->ov_check_period);

drivers/net/ethernet/ti/cpts.c

587

if (WARN_ON(!cpts->clock))

drivers/net/ethernet/ti/cpts.c

590

ptp_clock_unregister(cpts->clock);

drivers/net/ethernet/ti/cpts.c

591

cpts->clock = NULL;

drivers/net/ethernet/ti/cpts.h

106

struct ptp_clock *clock;

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

424

struct clk_lookup *clock;

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

435

clock = clkdev_create(clk, NULL, "%s", clk_name);

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

436

if (!clock) {

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

442

txgbe->clock = clock;

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

639

clkdev_drop(txgbe->clock);

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

671

clkdev_drop(txgbe->clock);

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

463

struct clk_lookup *clock;

drivers/net/hamradio/scc.c

1759

if (hwcfg.clock == 0)

drivers/net/hamradio/scc.c

1760

hwcfg.clock = SCC_DEFAULT_CLOCK;

drivers/net/hamradio/scc.c

1802

SCC_Info[2*Nchips+chan].clock = hwcfg.clock;

drivers/net/hamradio/scc.c

2041

scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand,

drivers/net/hamradio/scc.c

735

set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2);

drivers/net/hamradio/scc.c

911

time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2;

drivers/net/phy/bcm-phy-ptp.c

923

struct ptp_clock *clock;

drivers/net/phy/bcm-phy-ptp.c

941

clock = ptp_clock_register(&priv->ptp_info, &phydev->mdio.dev);

drivers/net/phy/bcm-phy-ptp.c

942

if (IS_ERR(clock))

drivers/net/phy/bcm-phy-ptp.c

943

return ERR_CAST(clock);

drivers/net/phy/bcm-phy-ptp.c

944

priv->ptp_clock = clock;

drivers/net/phy/dp83640.c

1002

static struct dp83640_clock *dp83640_clock_get(struct dp83640_clock *clock)

drivers/net/phy/dp83640.c

1004

if (clock)

drivers/net/phy/dp83640.c

1005

mutex_lock(&clock->clock_lock);

drivers/net/phy/dp83640.c

1006

return clock;

drivers/net/phy/dp83640.c

1015

struct dp83640_clock *clock = NULL, *tmp;

drivers/net/phy/dp83640.c

1023

clock = tmp;

drivers/net/phy/dp83640.c

1027

if (clock)

drivers/net/phy/dp83640.c

1030

clock = kzalloc_obj(struct dp83640_clock);

drivers/net/phy/dp83640.c

1031

if (!clock)

drivers/net/phy/dp83640.c

1034

clock->caps.pin_config = kzalloc_objs(struct ptp_pin_desc,

drivers/net/phy/dp83640.c

1036

if (!clock->caps.pin_config) {

drivers/net/phy/dp83640.c

1037

kfree(clock);

drivers/net/phy/dp83640.c

1038

clock = NULL;

drivers/net/phy/dp83640.c

1041

dp83640_clock_init(clock, bus);

drivers/net/phy/dp83640.c

1042

list_add_tail(&clock->list, &phyter_clocks);

drivers/net/phy/dp83640.c

1046

return dp83640_clock_get(clock);

drivers/net/phy/dp83640.c

1049

static void dp83640_clock_put(struct dp83640_clock *clock)

drivers/net/phy/dp83640.c

1051

mutex_unlock(&clock->clock_lock);

drivers/net/phy/dp83640.c

107

struct dp83640_clock *clock;

drivers/net/phy/dp83640.c

1074

struct dp83640_clock *clock = dp83640->clock;

drivers/net/phy/dp83640.c

1076

if (clock->chosen && !list_empty(&clock->phylist))

drivers/net/phy/dp83640.c

1077

recalibrate(clock);

drivers/net/phy/dp83640.c

1079

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

1080

enable_broadcast(phydev, clock->page, 1);

drivers/net/phy/dp83640.c

1081

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

1086

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

1088

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

1266

mutex_lock(&dp83640->clock->extreg_lock);

drivers/net/phy/dp83640.c

1271

mutex_unlock(&dp83640->clock->extreg_lock);

drivers/net/phy/dp83640.c

1387

info->phc_index = ptp_clock_index(dp83640->clock->ptp_clock);

drivers/net/phy/dp83640.c

1403

struct dp83640_clock *clock;

drivers/net/phy/dp83640.c

1410

clock = dp83640_clock_get_bus(phydev->mdio.bus);

drivers/net/phy/dp83640.c

1411

if (!clock)

drivers/net/phy/dp83640.c

1440

dp83640->clock = clock;

drivers/net/phy/dp83640.c

1442

if (choose_this_phy(clock, phydev)) {

drivers/net/phy/dp83640.c

1443

clock->chosen = dp83640;

drivers/net/phy/dp83640.c

1444

clock->ptp_clock = ptp_clock_register(&clock->caps,

drivers/net/phy/dp83640.c

1446

if (IS_ERR(clock->ptp_clock)) {

drivers/net/phy/dp83640.c

1447

err = PTR_ERR(clock->ptp_clock);

drivers/net/phy/dp83640.c

1451

list_add_tail(&dp83640->list, &clock->phylist);

drivers/net/phy/dp83640.c

1453

dp83640_clock_put(clock);

drivers/net/phy/dp83640.c

1457

clock->chosen = NULL;

drivers/net/phy/dp83640.c

1460

dp83640_clock_put(clock);

drivers/net/phy/dp83640.c

1467

struct dp83640_clock *clock;

drivers/net/phy/dp83640.c

1483

clock = dp83640_clock_get(dp83640->clock);

drivers/net/phy/dp83640.c

1485

if (dp83640 == clock->chosen) {

drivers/net/phy/dp83640.c

1486

ptp_clock_unregister(clock->ptp_clock);

drivers/net/phy/dp83640.c

1487

clock->chosen = NULL;

drivers/net/phy/dp83640.c

1489

list_for_each_safe(this, next, &clock->phylist) {

drivers/net/phy/dp83640.c

1498

if (!clock->chosen && list_empty(&clock->phylist))

drivers/net/phy/dp83640.c

1501

dp83640_clock_put(clock);

drivers/net/phy/dp83640.c

1506

list_del(&clock->list);

drivers/net/phy/dp83640.c

1509

mutex_destroy(&clock->extreg_lock);

drivers/net/phy/dp83640.c

1510

mutex_destroy(&clock->clock_lock);

drivers/net/phy/dp83640.c

1511

put_device(&clock->bus->dev);

drivers/net/phy/dp83640.c

1512

kfree(clock->caps.pin_config);

drivers/net/phy/dp83640.c

1513

kfree(clock);

drivers/net/phy/dp83640.c

231

if (dp83640->clock->page != page) {

drivers/net/phy/dp83640.c

233

dp83640->clock->page = page;

drivers/net/phy/dp83640.c

246

if (dp83640->clock->page != page) {

drivers/net/phy/dp83640.c

248

dp83640->clock->page = page;

drivers/net/phy/dp83640.c

303

static int periodic_output(struct dp83640_clock *clock,

drivers/net/phy/dp83640.c

307

struct dp83640_private *dp83640 = clock->chosen;

drivers/net/phy/dp83640.c

313

gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT,

drivers/net/phy/dp83640.c

331

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

334

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

344

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

368

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

376

struct dp83640_clock *clock =

drivers/net/phy/dp83640.c

378

struct phy_device *phydev = clock->chosen->phydev;

drivers/net/phy/dp83640.c

397

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

402

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

409

struct dp83640_clock *clock =

drivers/net/phy/dp83640.c

411

struct phy_device *phydev = clock->chosen->phydev;

drivers/net/phy/dp83640.c

419

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

423

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

431

struct dp83640_clock *clock =

drivers/net/phy/dp83640.c

433

struct phy_device *phydev = clock->chosen->phydev;

drivers/net/phy/dp83640.c

436

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

445

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

456

struct dp83640_clock *clock =

drivers/net/phy/dp83640.c

458

struct phy_device *phydev = clock->chosen->phydev;

drivers/net/phy/dp83640.c

461

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

465

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

473

struct dp83640_clock *clock =

drivers/net/phy/dp83640.c

475

struct phy_device *phydev = clock->chosen->phydev;

drivers/net/phy/dp83640.c

493

gpio_num = 1 + ptp_find_pin(clock->ptp_clock,

drivers/net/phy/dp83640.c

503

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

505

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

511

return periodic_output(clock, rq, on, rq->perout.index);

drivers/net/phy/dp83640.c

523

struct dp83640_clock *clock =

drivers/net/phy/dp83640.c

526

if (clock->caps.pin_config[pin].func == PTP_PF_PHYSYNC &&

drivers/net/phy/dp83640.c

527

!list_empty(&clock->phylist))

drivers/net/phy/dp83640.c

542

struct dp83640_clock *clock = dp83640->clock;

drivers/net/phy/dp83640.c

550

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

555

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

619

static void recalibrate(struct dp83640_clock *clock)

drivers/net/phy/dp83640.c

625

struct phy_device *master = clock->chosen->phydev;

drivers/net/phy/dp83640.c

629

cal_gpio = 1 + ptp_find_pin_unlocked(clock->ptp_clock, PTP_PF_PHYSYNC, 0);

drivers/net/phy/dp83640.c

635

mutex_lock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

640

list_for_each_entry(tmp, &clock->phylist, list) {

drivers/net/phy/dp83640.c

641

enable_broadcast(tmp->phydev, clock->page, 1);

drivers/net/phy/dp83640.c

646

enable_broadcast(master, clock->page, 1);

drivers/net/phy/dp83640.c

658

list_for_each_entry(tmp, &clock->phylist, list)

drivers/net/phy/dp83640.c

698

list_for_each_entry(tmp, &clock->phylist, list) {

drivers/net/phy/dp83640.c

718

list_for_each_entry(tmp, &clock->phylist, list)

drivers/net/phy/dp83640.c

722

mutex_unlock(&clock->extreg_lock);

drivers/net/phy/dp83640.c

786

ptp_clock_event(dp83640->clock->ptp_clock, &event);

drivers/net/phy/dp83640.c

956

static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus)

drivers/net/phy/dp83640.c

958

INIT_LIST_HEAD(&clock->list);

drivers/net/phy/dp83640.c

959

clock->bus = bus;

drivers/net/phy/dp83640.c

960

mutex_init(&clock->extreg_lock);

drivers/net/phy/dp83640.c

961

mutex_init(&clock->clock_lock);

drivers/net/phy/dp83640.c

962

INIT_LIST_HEAD(&clock->phylist);

drivers/net/phy/dp83640.c

963

clock->caps.owner = THIS_MODULE;

drivers/net/phy/dp83640.c

964

sprintf(clock->caps.name, "dp83640 timer");

drivers/net/phy/dp83640.c

965

clock->caps.max_adj = 1953124;

drivers/net/phy/dp83640.c

966

clock->caps.n_alarm = 0;

drivers/net/phy/dp83640.c

967

clock->caps.n_ext_ts = N_EXT_TS;

drivers/net/phy/dp83640.c

968

clock->caps.n_per_out = N_PER_OUT;

drivers/net/phy/dp83640.c

969

clock->caps.n_pins = DP83640_N_PINS;

drivers/net/phy/dp83640.c

970

clock->caps.pps = 0;

drivers/net/phy/dp83640.c

971

clock->caps.supported_extts_flags = PTP_RISING_EDGE |

drivers/net/phy/dp83640.c

974

clock->caps.adjfine = ptp_dp83640_adjfine;

drivers/net/phy/dp83640.c

975

clock->caps.adjtime = ptp_dp83640_adjtime;

drivers/net/phy/dp83640.c

976

clock->caps.gettime64 = ptp_dp83640_gettime;

drivers/net/phy/dp83640.c

977

clock->caps.settime64 = ptp_dp83640_settime;

drivers/net/phy/dp83640.c

978

clock->caps.enable = ptp_dp83640_enable;

drivers/net/phy/dp83640.c

979

clock->caps.verify = ptp_dp83640_verify;

drivers/net/phy/dp83640.c

983

dp83640_gpio_defaults(clock->caps.pin_config);

drivers/net/phy/dp83640.c

990

static int choose_this_phy(struct dp83640_clock *clock,

drivers/net/phy/dp83640.c

993

if (chosen_phy == -1 && !clock->chosen)

drivers/net/phy/microchip_rds_ptp.c

1014

static void mchp_rds_ptp_process_rx_ts(struct mchp_rds_ptp_clock *clock)

drivers/net/phy/microchip_rds_ptp.c

1021

rx_ts = mchp_rds_ptp_get_rx_ts(clock);

drivers/net/phy/microchip_rds_ptp.c

1023

mchp_rds_ptp_match_rx_ts(clock, rx_ts);

drivers/net/phy/microchip_rds_ptp.c

1025

caps = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_CAP_INFO,

drivers/net/phy/microchip_rds_ptp.c

1032

static bool mchp_rds_ptp_get_tx_ts(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

1037

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_EGRESS_NS_HI,

drivers/net/phy/microchip_rds_ptp.c

1045

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_EGRESS_NS_LO,

drivers/net/phy/microchip_rds_ptp.c

105

static int mchp_general_event_config(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

1051

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_EGRESS_SEC_HI,

drivers/net/phy/microchip_rds_ptp.c

1057

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_EGRESS_SEC_LO,

drivers/net/phy/microchip_rds_ptp.c

1063

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_MSG_HDR2,

drivers/net/phy/microchip_rds_ptp.c

1073

static void mchp_rds_ptp_process_tx_ts(struct mchp_rds_ptp_clock *clock)

drivers/net/phy/microchip_rds_ptp.c

1081

if (mchp_rds_ptp_get_tx_ts(clock, &sec, &nsec, &seq))

drivers/net/phy/microchip_rds_ptp.c

1082

mchp_rds_ptp_match_tx_skb(clock, sec, nsec, seq);

drivers/net/phy/microchip_rds_ptp.c

1084

caps = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_CAP_INFO,

drivers/net/phy/microchip_rds_ptp.c

1091

int mchp_rds_ptp_top_config_intr(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

1095

return phy_clear_bits_mmd(clock->phydev, PTP_MMD(clock), reg,

drivers/net/phy/microchip_rds_ptp.c

1098

return phy_set_bits_mmd(clock->phydev, PTP_MMD(clock), reg,

drivers/net/phy/microchip_rds_ptp.c

110

general_config = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_GEN_CFG,

drivers/net/phy/microchip_rds_ptp.c

1103

irqreturn_t mchp_rds_ptp_handle_interrupt(struct mchp_rds_ptp_clock *clock)

drivers/net/phy/microchip_rds_ptp.c

1108

if (!clock)

drivers/net/phy/microchip_rds_ptp.c

1112

irq_sts = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_INT_STS,

drivers/net/phy/microchip_rds_ptp.c

1118

mchp_rds_ptp_process_rx_ts(clock);

drivers/net/phy/microchip_rds_ptp.c

1121

mchp_rds_ptp_process_tx_ts(clock);

drivers/net/phy/microchip_rds_ptp.c

1124

mchp_rds_ptp_flush_fifo(clock,

drivers/net/phy/microchip_rds_ptp.c

1128

mchp_rds_ptp_flush_fifo(clock,

drivers/net/phy/microchip_rds_ptp.c

1139

static int mchp_rds_ptp_init(struct mchp_rds_ptp_clock *clock)

drivers/net/phy/microchip_rds_ptp.c

1144

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CMD_CTL,

drivers/net/phy/microchip_rds_ptp.c

1151

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TSU_GEN_CONFIG,

drivers/net/phy/microchip_rds_ptp.c

1157

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TSU_HARD_RESET,

drivers/net/phy/microchip_rds_ptp.c

1164

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LATENCY_CORRECTION_CTL,

drivers/net/phy/microchip_rds_ptp.c

1171

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_OP_MODE,

drivers/net/phy/microchip_rds_ptp.c

1178

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_REF_CLK_CFG,

drivers/net/phy/microchip_rds_ptp.c

1185

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_PARSE_CONFIG,

drivers/net/phy/microchip_rds_ptp.c

1190

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_PARSE_CONFIG,

drivers/net/phy/microchip_rds_ptp.c

1195

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_PARSE_L2_ADDR_EN,

drivers/net/phy/microchip_rds_ptp.c

12

addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) :

drivers/net/phy/microchip_rds_ptp.c

120

return mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_GEN_CFG,

drivers/net/phy/microchip_rds_ptp.c

1200

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_PARSE_L2_ADDR_EN,

drivers/net/phy/microchip_rds_ptp.c

1205

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_PARSE_IPV4_ADDR_EN,

drivers/net/phy/microchip_rds_ptp.c

1210

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_PARSE_IPV4_ADDR_EN,

drivers/net/phy/microchip_rds_ptp.c

1215

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_VERSION,

drivers/net/phy/microchip_rds_ptp.c

1222

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_VERSION,

drivers/net/phy/microchip_rds_ptp.c

1230

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TSU_GEN_CONFIG,

drivers/net/phy/microchip_rds_ptp.c

1237

return mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CMD_CTL,

drivers/net/phy/microchip_rds_ptp.c

124

static int mchp_set_clock_reload(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

1246

struct mchp_rds_ptp_clock *clock;

drivers/net/phy/microchip_rds_ptp.c

1249

clock = devm_kzalloc(&phydev->mdio.dev, sizeof(*clock), GFP_KERNEL);

drivers/net/phy/microchip_rds_ptp.c

1250

if (!clock)

drivers/net/phy/microchip_rds_ptp.c

1253

clock->port_base_addr = port_base_addr;

drivers/net/phy/microchip_rds_ptp.c

1254

clock->clk_base_addr = clk_base_addr;

drivers/net/phy/microchip_rds_ptp.c

1255

clock->mmd = mmd;

drivers/net/phy/microchip_rds_ptp.c

1257

mutex_init(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

1258

clock->pin_config = devm_kmalloc_array(&phydev->mdio.dev,

drivers/net/phy/microchip_rds_ptp.c

1260

sizeof(*clock->pin_config),

drivers/net/phy/microchip_rds_ptp.c

1262

if (!clock->pin_config)

drivers/net/phy/microchip_rds_ptp.c

1266

struct ptp_pin_desc *p = &clock->pin_config[i];

drivers/net/phy/microchip_rds_ptp.c

1274

clock->caps.owner = THIS_MODULE;

drivers/net/phy/microchip_rds_ptp.c

1275

snprintf(clock->caps.name, 30, "%s", phydev->drv->name);

drivers/net/phy/microchip_rds_ptp.c

1276

clock->caps.max_adj = MCHP_RDS_PTP_MAX_ADJ;

drivers/net/phy/microchip_rds_ptp.c

1277

clock->caps.n_ext_ts = 0;

drivers/net/phy/microchip_rds_ptp.c

1278

clock->caps.pps = 0;

drivers/net/phy/microchip_rds_ptp.c

1279

clock->caps.n_pins = MCHP_RDS_PTP_N_PIN;

drivers/net/phy/microchip_rds_ptp.c

1280

clock->caps.n_per_out = MCHP_RDS_PTP_N_PEROUT;

drivers/net/phy/microchip_rds_ptp.c

1281

clock->caps.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE;

drivers/net/phy/microchip_rds_ptp.c

1282

clock->caps.pin_config = clock->pin_config;

drivers/net/phy/microchip_rds_ptp.c

1283

clock->caps.adjfine = mchp_rds_ptp_ltc_adjfine;

drivers/net/phy/microchip_rds_ptp.c

1284

clock->caps.adjtime = mchp_rds_ptp_ltc_adjtime;

drivers/net/phy/microchip_rds_ptp.c

1285

clock->caps.gettime64 = mchp_rds_ptp_ltc_gettime64;

drivers/net/phy/microchip_rds_ptp.c

1286

clock->caps.settime64 = mchp_rds_ptp_ltc_settime64;

drivers/net/phy/microchip_rds_ptp.c

1287

clock->caps.enable = mchp_rds_ptpci_enable;

drivers/net/phy/microchip_rds_ptp.c

1288

clock->caps.verify = mchp_rds_ptpci_verify;

drivers/net/phy/microchip_rds_ptp.c

1289

clock->caps.getcrosststamp = NULL;

drivers/net/phy/microchip_rds_ptp.c

129

rc = mchp_rds_phy_write_mmd(clock,

drivers/net/phy/microchip_rds_ptp.c

1290

clock->ptp_clock = ptp_clock_register(&clock->caps,

drivers/net/phy/microchip_rds_ptp.c

1292

if (IS_ERR(clock->ptp_clock))

drivers/net/phy/microchip_rds_ptp.c

1296

if (!clock->ptp_clock)

drivers/net/phy/microchip_rds_ptp.c

13

BASE_CLK(clock)));

drivers/net/phy/microchip_rds_ptp.c

1300

skb_queue_head_init(&clock->tx_queue);

drivers/net/phy/microchip_rds_ptp.c

1301

skb_queue_head_init(&clock->rx_queue);

drivers/net/phy/microchip_rds_ptp.c

1302

INIT_LIST_HEAD(&clock->rx_ts_list);

drivers/net/phy/microchip_rds_ptp.c

1303

spin_lock_init(&clock->rx_ts_lock);

drivers/net/phy/microchip_rds_ptp.c

1305

clock->mii_ts.rxtstamp = mchp_rds_ptp_rxtstamp;

drivers/net/phy/microchip_rds_ptp.c

1306

clock->mii_ts.txtstamp = mchp_rds_ptp_txtstamp;

drivers/net/phy/microchip_rds_ptp.c

1307

clock->mii_ts.hwtstamp_set = mchp_rds_ptp_hwtstamp_set;

drivers/net/phy/microchip_rds_ptp.c

1308

clock->mii_ts.hwtstamp_get = mchp_rds_ptp_hwtstamp_get;

drivers/net/phy/microchip_rds_ptp.c

1309

clock->mii_ts.ts_info = mchp_rds_ptp_ts_info;

drivers/net/phy/microchip_rds_ptp.c

1311

phydev->mii_ts = &clock->mii_ts;

drivers/net/phy/microchip_rds_ptp.c

1313

clock->mchp_rds_ptp_event = -1;

drivers/net/phy/microchip_rds_ptp.c

1318

clock->phydev = phydev;

drivers/net/phy/microchip_rds_ptp.c

1320

rc = mchp_rds_ptp_init(clock);

drivers/net/phy/microchip_rds_ptp.c

1324

return clock;

drivers/net/phy/microchip_rds_ptp.c

136

rc = mchp_rds_phy_write_mmd(clock,

drivers/net/phy/microchip_rds_ptp.c

143

rc = mchp_rds_phy_write_mmd(clock,

drivers/net/phy/microchip_rds_ptp.c

15

return phy_read_mmd(phydev, PTP_MMD(clock), addr);

drivers/net/phy/microchip_rds_ptp.c

150

return mchp_rds_phy_write_mmd(clock,

drivers/net/phy/microchip_rds_ptp.c

156

static int mchp_set_clock_target(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

162

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CLK_TRGT_SEC_LO,

drivers/net/phy/microchip_rds_ptp.c

168

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CLK_TRGT_SEC_HI,

drivers/net/phy/microchip_rds_ptp.c

174

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CLK_TRGT_NS_LO,

drivers/net/phy/microchip_rds_ptp.c

18

static int mchp_rds_phy_write_mmd(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

180

return mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CLK_TRGT_NS_HI,

drivers/net/phy/microchip_rds_ptp.c

185

static int mchp_rds_ptp_perout_off(struct mchp_rds_ptp_clock *clock)

drivers/net/phy/microchip_rds_ptp.c

191

rc = mchp_set_clock_target(clock, 0xFFFFFFFF, 0);

drivers/net/phy/microchip_rds_ptp.c

195

general_config = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_GEN_CFG,

drivers/net/phy/microchip_rds_ptp.c

198

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_GEN_CFG,

drivers/net/phy/microchip_rds_ptp.c

203

clock->mchp_rds_ptp_event = -1;

drivers/net/phy/microchip_rds_ptp.c

208

static bool mchp_get_event(struct mchp_rds_ptp_clock *clock, int pin)

drivers/net/phy/microchip_rds_ptp.c

210

if (clock->mchp_rds_ptp_event < 0 && pin == clock->event_pin) {

drivers/net/phy/microchip_rds_ptp.c

211

clock->mchp_rds_ptp_event = pin;

drivers/net/phy/microchip_rds_ptp.c

22

struct phy_device *phydev = clock->phydev;

drivers/net/phy/microchip_rds_ptp.c

221

struct mchp_rds_ptp_clock *clock = container_of(ptpci,

drivers/net/phy/microchip_rds_ptp.c

224

struct phy_device *phydev = clock->phydev;

drivers/net/phy/microchip_rds_ptp.c

227

event_pin = ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT,

drivers/net/phy/microchip_rds_ptp.c

229

if (event_pin != clock->event_pin)

drivers/net/phy/microchip_rds_ptp.c

233

ret = mchp_rds_ptp_perout_off(clock);

drivers/net/phy/microchip_rds_ptp.c

237

if (!mchp_get_event(clock, event_pin))

drivers/net/phy/microchip_rds_ptp.c

245

ret = mchp_general_event_config(clock, pulsewidth);

drivers/net/phy/microchip_rds_ptp.c

249

ret = mchp_set_clock_target(clock, perout->start.sec,

drivers/net/phy/microchip_rds_ptp.c

25

addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) :

drivers/net/phy/microchip_rds_ptp.c

254

return mchp_set_clock_reload(clock, perout->period.sec,

drivers/net/phy/microchip_rds_ptp.c

26

BASE_CLK(clock)));

drivers/net/phy/microchip_rds_ptp.c

272

struct mchp_rds_ptp_clock *clock = container_of(ptpci,

drivers/net/phy/microchip_rds_ptp.c

276

if (!(pin == clock->event_pin && chan == 0))

drivers/net/phy/microchip_rds_ptp.c

28

return phy_write_mmd(phydev, PTP_MMD(clock), addr, val);

drivers/net/phy/microchip_rds_ptp.c

290

static int mchp_rds_ptp_flush_fifo(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

296

skb_queue_purge(&clock->tx_queue);

drivers/net/phy/microchip_rds_ptp.c

298

skb_queue_purge(&clock->rx_queue);

drivers/net/phy/microchip_rds_ptp.c

301

rc = mchp_rds_phy_read_mmd(clock,

drivers/net/phy/microchip_rds_ptp.c

309

return mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_INT_STS,

drivers/net/phy/microchip_rds_ptp.c

31

static int mchp_rds_phy_modify_mmd(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

313

static int mchp_rds_ptp_config_intr(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

317

return mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_INT_EN,

drivers/net/phy/microchip_rds_ptp.c

325

struct mchp_rds_ptp_clock *clock = container_of(mii_ts,

drivers/net/phy/microchip_rds_ptp.c

329

switch (clock->hwts_tx_type) {

drivers/net/phy/microchip_rds_ptp.c

338

skb_queue_tail(&clock->tx_queue, skb);

drivers/net/phy/microchip_rds_ptp.c

35

struct phy_device *phydev = clock->phydev;

drivers/net/phy/microchip_rds_ptp.c

368

static bool mchp_rds_ptp_match_skb(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

377

spin_lock_irqsave(&clock->rx_queue.lock, flags);

drivers/net/phy/microchip_rds_ptp.c

378

skb_queue_walk_safe(&clock->rx_queue, skb, skb_tmp) {

drivers/net/phy/microchip_rds_ptp.c

38

addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) :

drivers/net/phy/microchip_rds_ptp.c

385

__skb_unlink(skb, &clock->rx_queue);

drivers/net/phy/microchip_rds_ptp.c

39

BASE_CLK(clock)));

drivers/net/phy/microchip_rds_ptp.c

390

spin_unlock_irqrestore(&clock->rx_queue.lock, flags);

drivers/net/phy/microchip_rds_ptp.c

401

static void mchp_rds_ptp_match_rx_ts(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

409

if (!mchp_rds_ptp_match_skb(clock, rx_ts)) {

drivers/net/phy/microchip_rds_ptp.c

41

return phy_modify_mmd(phydev, PTP_MMD(clock), addr, mask, val);

drivers/net/phy/microchip_rds_ptp.c

410

spin_lock_irqsave(&clock->rx_ts_lock, flags);

drivers/net/phy/microchip_rds_ptp.c

411

list_add(&rx_ts->list, &clock->rx_ts_list);

drivers/net/phy/microchip_rds_ptp.c

412

spin_unlock_irqrestore(&clock->rx_ts_lock, flags);

drivers/net/phy/microchip_rds_ptp.c

418

static void mchp_rds_ptp_match_rx_skb(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

430

spin_lock_irqsave(&clock->rx_ts_lock, flags);

drivers/net/phy/microchip_rds_ptp.c

431

list_for_each_entry_safe(rx_ts, tmp, &clock->rx_ts_list, list) {

drivers/net/phy/microchip_rds_ptp.c

44

static int mchp_rds_phy_set_bits_mmd(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

444

spin_unlock_irqrestore(&clock->rx_ts_lock, flags);

drivers/net/phy/microchip_rds_ptp.c

450

skb_queue_tail(&clock->rx_queue, skb);

drivers/net/phy/microchip_rds_ptp.c

457

struct mchp_rds_ptp_clock *clock = container_of(mii_ts,

drivers/net/phy/microchip_rds_ptp.c

461

if (clock->rx_filter == HWTSTAMP_FILTER_NONE ||

drivers/net/phy/microchip_rds_ptp.c

465

if ((type & clock->version) == 0 || (type & clock->layer) == 0)

drivers/net/phy/microchip_rds_ptp.c

474

mchp_rds_ptp_match_rx_skb(clock, skb);

drivers/net/phy/microchip_rds_ptp.c

48

struct phy_device *phydev = clock->phydev;

drivers/net/phy/microchip_rds_ptp.c

482

struct mchp_rds_ptp_clock *clock =

drivers/net/phy/microchip_rds_ptp.c

485

config->tx_type = clock->hwts_tx_type;

drivers/net/phy/microchip_rds_ptp.c

486

config->rx_filter = clock->rx_filter;

drivers/net/phy/microchip_rds_ptp.c

495

struct mchp_rds_ptp_clock *clock =

drivers/net/phy/microchip_rds_ptp.c

505

clock->layer = 0;

drivers/net/phy/microchip_rds_ptp.c

506

clock->version = 0;

drivers/net/phy/microchip_rds_ptp.c

51

addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) :

drivers/net/phy/microchip_rds_ptp.c

511

clock->layer = PTP_CLASS_L4;

drivers/net/phy/microchip_rds_ptp.c

512

clock->version = PTP_CLASS_V2;

drivers/net/phy/microchip_rds_ptp.c

517

clock->layer = PTP_CLASS_L2;

drivers/net/phy/microchip_rds_ptp.c

518

clock->version = PTP_CLASS_V2;

drivers/net/phy/microchip_rds_ptp.c

52

BASE_CLK(clock)));

drivers/net/phy/microchip_rds_ptp.c

523

clock->layer = PTP_CLASS_L4 | PTP_CLASS_L2;

drivers/net/phy/microchip_rds_ptp.c

524

clock->version = PTP_CLASS_V2;

drivers/net/phy/microchip_rds_ptp.c

54

return phy_set_bits_mmd(phydev, PTP_MMD(clock), addr, val);

drivers/net/phy/microchip_rds_ptp.c

542

if (clock->layer & PTP_CLASS_L2) {

drivers/net/phy/microchip_rds_ptp.c

546

if (clock->layer & PTP_CLASS_L4) {

drivers/net/phy/microchip_rds_ptp.c

552

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_PARSE_CONFIG,

drivers/net/phy/microchip_rds_ptp.c

557

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_PARSE_CONFIG,

drivers/net/phy/microchip_rds_ptp.c

562

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_TIMESTAMP_EN,

drivers/net/phy/microchip_rds_ptp.c

568

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_TIMESTAMP_EN,

drivers/net/phy/microchip_rds_ptp.c

576

rc = mchp_rds_phy_modify_mmd(clock, MCHP_RDS_PTP_TX_MOD,

drivers/net/phy/microchip_rds_ptp.c

581

rc = mchp_rds_phy_modify_mmd(clock, MCHP_RDS_PTP_TX_MOD,

drivers/net/phy/microchip_rds_ptp.c

590

spin_lock_irqsave(&clock->rx_ts_lock, flags);

drivers/net/phy/microchip_rds_ptp.c

591

list_for_each_entry_safe(rx_ts, tmp, &clock->rx_ts_list, list) {

drivers/net/phy/microchip_rds_ptp.c

595

spin_unlock_irqrestore(&clock->rx_ts_lock, flags);

drivers/net/phy/microchip_rds_ptp.c

597

rc = mchp_rds_ptp_flush_fifo(clock, MCHP_RDS_PTP_INGRESS_FIFO);

drivers/net/phy/microchip_rds_ptp.c

6

static int mchp_rds_phy_read_mmd(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

601

rc = mchp_rds_ptp_flush_fifo(clock, MCHP_RDS_PTP_EGRESS_FIFO);

drivers/net/phy/microchip_rds_ptp.c

606

rc = mchp_rds_ptp_config_intr(clock,

drivers/net/phy/microchip_rds_ptp.c

611

clock->hwts_tx_type = config->tx_type;

drivers/net/phy/microchip_rds_ptp.c

612

clock->rx_filter = config->rx_filter;

drivers/net/phy/microchip_rds_ptp.c

620

struct mchp_rds_ptp_clock *clock = container_of(mii_ts,

drivers/net/phy/microchip_rds_ptp.c

624

info->phc_index = ptp_clock_index(clock->ptp_clock);

drivers/net/phy/microchip_rds_ptp.c

643

struct mchp_rds_ptp_clock *clock = container_of(info,

drivers/net/phy/microchip_rds_ptp.c

695

mutex_lock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

699

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_STEP_ADJ_LO,

drivers/net/phy/microchip_rds_ptp.c

704

rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_STEP_ADJ_HI,

drivers/net/phy/microchip_rds_ptp.c

713

rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_CMD_CTL,

drivers/net/phy/microchip_rds_ptp.c

721

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_STEP_ADJ_LO,

drivers/net/phy/microchip_rds_ptp.c

727

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_STEP_ADJ_HI,

drivers/net/phy/microchip_rds_ptp.c

733

rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_CMD_CTL,

drivers/net/phy/microchip_rds_ptp.c

738

mutex_unlock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

740

mutex_lock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

745

if (clock->mchp_rds_ptp_event >= 0)

drivers/net/phy/microchip_rds_ptp.c

746

mchp_set_clock_target(clock,

drivers/net/phy/microchip_rds_ptp.c

749

mutex_unlock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

757

struct mchp_rds_ptp_clock *clock = container_of(info,

drivers/net/phy/microchip_rds_ptp.c

782

mutex_lock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

783

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_RATE_ADJ_HI,

drivers/net/phy/microchip_rds_ptp.c

788

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_RATE_ADJ_LO,

drivers/net/phy/microchip_rds_ptp.c

793

mutex_unlock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

801

struct mchp_rds_ptp_clock *clock = container_of(info,

drivers/net/phy/microchip_rds_ptp.c

808

mutex_lock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

812

rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_CMD_CTL,

drivers/net/phy/microchip_rds_ptp.c

819

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_SEC_HI,

drivers/net/phy/microchip_rds_ptp.c

825

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_SEC_MID,

drivers/net/phy/microchip_rds_ptp.c

832

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_SEC_LO,

drivers/net/phy/microchip_rds_ptp.c

838

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_NS_HI,

drivers/net/phy/microchip_rds_ptp.c

845

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_NS_LO,

drivers/net/phy/microchip_rds_ptp.c

856

mutex_unlock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

864

struct mchp_rds_ptp_clock *clock = container_of(info,

drivers/net/phy/microchip_rds_ptp.c

869

mutex_lock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

870

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_SEC_LO,

drivers/net/phy/microchip_rds_ptp.c

876

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_SEC_MID,

drivers/net/phy/microchip_rds_ptp.c

882

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_SEC_HI,

drivers/net/phy/microchip_rds_ptp.c

888

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_NS_LO,

drivers/net/phy/microchip_rds_ptp.c

894

rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_NS_HI,

drivers/net/phy/microchip_rds_ptp.c

9

struct phy_device *phydev = clock->phydev;

drivers/net/phy/microchip_rds_ptp.c

903

rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_CMD_CTL,

drivers/net/phy/microchip_rds_ptp.c

909

mutex_unlock(&clock->ptp_lock);

drivers/net/phy/microchip_rds_ptp.c

932

static void mchp_rds_ptp_match_tx_skb(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.c

941

spin_lock_irqsave(&clock->tx_queue.lock, flags);

drivers/net/phy/microchip_rds_ptp.c

942

skb_queue_walk_safe(&clock->tx_queue, skb, skb_tmp) {

drivers/net/phy/microchip_rds_ptp.c

949

__skb_unlink(skb, &clock->tx_queue);

drivers/net/phy/microchip_rds_ptp.c

953

spin_unlock_irqrestore(&clock->tx_queue.lock, flags);

drivers/net/phy/microchip_rds_ptp.c

962

*mchp_rds_ptp_get_rx_ts(struct mchp_rds_ptp_clock *clock)

drivers/net/phy/microchip_rds_ptp.c

964

struct phy_device *phydev = clock->phydev;

drivers/net/phy/microchip_rds_ptp.c

969

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_INGRESS_NS_HI,

drivers/net/phy/microchip_rds_ptp.c

979

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_INGRESS_NS_LO,

drivers/net/phy/microchip_rds_ptp.c

985

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_INGRESS_SEC_HI,

drivers/net/phy/microchip_rds_ptp.c

991

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_INGRESS_SEC_LO,

drivers/net/phy/microchip_rds_ptp.c

997

rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_MSG_HDR2,

drivers/net/phy/microchip_rds_ptp.h

217

int mchp_rds_ptp_top_config_intr(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.h

220

irqreturn_t mchp_rds_ptp_handle_interrupt(struct mchp_rds_ptp_clock *clock);

drivers/net/phy/microchip_rds_ptp.h

232

static inline int mchp_rds_ptp_top_config_intr(struct mchp_rds_ptp_clock *clock,

drivers/net/phy/microchip_rds_ptp.h

240

* clock)

drivers/net/phy/microchip_t1.c

1286

priv->clock = mchp_rds_ptp_probe(phydev, MDIO_MMD_VEND1,

drivers/net/phy/microchip_t1.c

1289

if (IS_ERR(priv->clock))

drivers/net/phy/microchip_t1.c

1290

return PTR_ERR(priv->clock);

drivers/net/phy/microchip_t1.c

1299

priv->clock->event_pin = 3;

drivers/net/phy/microchip_t1.c

1576

return mchp_rds_ptp_top_config_intr(priv->clock,

drivers/net/phy/microchip_t1.c

1604

rc = mchp_rds_ptp_handle_interrupt(priv->clock);

drivers/net/phy/microchip_t1.c

330

struct mchp_rds_ptp_clock *clock;

drivers/net/wireless/ath/ath5k/ath5k.h

1500

unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock);

drivers/net/wireless/ath/ath5k/phy.c

1262

u32 data0, data1, clock;

drivers/net/wireless/ath/ath5k/phy.c

1284

clock = 1;

drivers/net/wireless/ath/ath5k/phy.c

1286

(clock << 1) | (1 << 10) | 1;

drivers/net/wireless/ath/ath5k/phy.c

1288

clock = 0;

drivers/net/wireless/ath/ath5k/phy.c

1290

<< 2) | (clock << 1) | (1 << 10) | 1;

drivers/net/wireless/ath/ath5k/phy.c

291

ds_coef_exp, ds_coef_man, clock;

drivers/net/wireless/ath/ath5k/phy.c

302

clock = 40 * 2;

drivers/net/wireless/ath/ath5k/phy.c

305

clock = 40 / 2;

drivers/net/wireless/ath/ath5k/phy.c

308

clock = 40 / 4;

drivers/net/wireless/ath/ath5k/phy.c

311

clock = 40;

drivers/net/wireless/ath/ath5k/phy.c

314

coef_scaled = ((5 * (clock << 24)) / 2) / channel->center_freq;

drivers/net/wireless/ath/ath5k/reset.c

118

ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock)

drivers/net/wireless/ath/ath5k/reset.c

121

return clock / common->clockrate;

drivers/net/wireless/ath/ath5k/reset.c

136

u32 usec_reg, txlat, rxlat, usec, clock, sclock, txf2txs;

drivers/net/wireless/ath/ath5k/reset.c

143

clock = 40;

drivers/net/wireless/ath/ath5k/reset.c

146

clock = 22;

drivers/net/wireless/ath/ath5k/reset.c

150

clock = 44;

drivers/net/wireless/ath/ath5k/reset.c

158

clock *= 2;

drivers/net/wireless/ath/ath5k/reset.c

161

clock /= 2;

drivers/net/wireless/ath/ath5k/reset.c

164

clock /= 4;

drivers/net/wireless/ath/ath5k/reset.c

170

common->clockrate = clock;

drivers/net/wireless/ath/ath5k/reset.c

176

usec = clock - 1;

drivers/net/wireless/ath/ath5k/reset.c

183

clock);

drivers/net/wireless/ath/ath5k/reset.c

672

u32 turbo, mode, clock, bus_flags;

drivers/net/wireless/ath/ath5k/reset.c

677

clock = 0;

drivers/net/wireless/ath/ath5k/reset.c

749

clock = AR5K_PHY_PLL_RF5112;

drivers/net/wireless/ath/ath5k/reset.c

752

clock = AR5K_PHY_PLL_RF5111; /*Zero*/

drivers/net/wireless/ath/ath5k/reset.c

757

clock |= AR5K_PHY_PLL_44MHZ;

drivers/net/wireless/ath/ath5k/reset.c

780

clock = AR5K_PHY_PLL_40MHZ_5413;

drivers/net/wireless/ath/ath5k/reset.c

782

clock |= AR5K_PHY_PLL_40MHZ;

drivers/net/wireless/ath/ath5k/reset.c

801

clock |= (ah->ah_bwmode == AR5K_BWMODE_10MHZ) ?

drivers/net/wireless/ath/ath5k/reset.c

818

if (ath5k_hw_reg_read(ah, AR5K_PHY_PLL) != clock) {

drivers/net/wireless/ath/ath5k/reset.c

819

ath5k_hw_reg_write(ah, clock, AR5K_PHY_PLL);

drivers/net/wireless/rsi/rsi_91x_sdio.c

168

u32 clock, resp, i;

drivers/net/wireless/rsi/rsi_91x_sdio.c

199

host->ios.clock = host->f_min;

drivers/net/wireless/rsi/rsi_91x_sdio.c

304

clock = 50000000;

drivers/net/wireless/rsi/rsi_91x_sdio.c

306

clock = card->cis.max_dtr;

drivers/net/wireless/rsi/rsi_91x_sdio.c

308

if (clock > host->f_max)

drivers/net/wireless/rsi/rsi_91x_sdio.c

309

clock = host->f_max;

drivers/net/wireless/rsi/rsi_91x_sdio.c

311

host->ios.clock = clock;

drivers/net/wireless/rsi/rsi_91x_sdio.c

341

u32 clock;

drivers/net/wireless/rsi/rsi_91x_sdio.c

343

clock = freq * 1000;

drivers/net/wireless/rsi/rsi_91x_sdio.c

344

if (clock > host->f_max)

drivers/net/wireless/rsi/rsi_91x_sdio.c

345

clock = host->f_max;

drivers/net/wireless/rsi/rsi_91x_sdio.c

346

host->ios.clock = clock;

drivers/nvmem/jz4780-efuse.c

134

static void clk_disable_unprepare_helper(void *clock)

drivers/nvmem/jz4780-efuse.c

136

clk_disable_unprepare(clock);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

673

static int dw_pcie_ptm_local_clock_read(void *drvdata, u64 *clock)

drivers/pci/controller/dwc/pcie-designware-debugfs.c

683

*clock = ((u64) msb) << 32 | lsb;

drivers/pci/controller/dwc/pcie-designware-debugfs.c

688

static int dw_pcie_ptm_master_clock_read(void *drvdata, u64 *clock)

drivers/pci/controller/dwc/pcie-designware-debugfs.c

698

*clock = ((u64) msb) << 32 | lsb;

drivers/pci/controller/dwc/pcie-designware-debugfs.c

703

static int dw_pcie_ptm_t1_read(void *drvdata, u64 *clock)

drivers/pci/controller/dwc/pcie-designware-debugfs.c

713

*clock = ((u64) msb) << 32 | lsb;

drivers/pci/controller/dwc/pcie-designware-debugfs.c

718

static int dw_pcie_ptm_t2_read(void *drvdata, u64 *clock)

drivers/pci/controller/dwc/pcie-designware-debugfs.c

728

*clock = ((u64) msb) << 32 | lsb;

drivers/pci/controller/dwc/pcie-designware-debugfs.c

733

static int dw_pcie_ptm_t3_read(void *drvdata, u64 *clock)

drivers/pci/controller/dwc/pcie-designware-debugfs.c

743

*clock = ((u64) msb) << 32 | lsb;

drivers/pci/controller/dwc/pcie-designware-debugfs.c

748

static int dw_pcie_ptm_t4_read(void *drvdata, u64 *clock)

drivers/pci/controller/dwc/pcie-designware-debugfs.c

758

*clock = ((u64) msb) << 32 | lsb;

drivers/pci/pcie/ptm.c

387

u64 clock;

drivers/pci/pcie/ptm.c

393

ret = ptm_debugfs->ops->local_clock_read(ptm_debugfs->pdata, &clock);

drivers/pci/pcie/ptm.c

397

*val = clock;

drivers/pci/pcie/ptm.c

407

u64 clock;

drivers/pci/pcie/ptm.c

413

ret = ptm_debugfs->ops->master_clock_read(ptm_debugfs->pdata, &clock);

drivers/pci/pcie/ptm.c

417

*val = clock;

drivers/pci/pcie/ptm.c

427

u64 clock;

drivers/pci/pcie/ptm.c

433

ret = ptm_debugfs->ops->t1_read(ptm_debugfs->pdata, &clock);

drivers/pci/pcie/ptm.c

437

*val = clock;

drivers/pci/pcie/ptm.c

447

u64 clock;

drivers/pci/pcie/ptm.c

453

ret = ptm_debugfs->ops->t2_read(ptm_debugfs->pdata, &clock);

drivers/pci/pcie/ptm.c

457

*val = clock;

drivers/pci/pcie/ptm.c

467

u64 clock;

drivers/pci/pcie/ptm.c

473

ret = ptm_debugfs->ops->t3_read(ptm_debugfs->pdata, &clock);

drivers/pci/pcie/ptm.c

477

*val = clock;

drivers/pci/pcie/ptm.c

487

u64 clock;

drivers/pci/pcie/ptm.c

493

ret = ptm_debugfs->ops->t4_read(ptm_debugfs->pdata, &clock);

drivers/pci/pcie/ptm.c

497

*val = clock;

drivers/pcmcia/pxa2xx_base.c

115

static uint32_t pxa2xx_pcmcia_mcmem(int sock, int speed, int clock)

drivers/pcmcia/pxa2xx_base.c

119

val = ((pxa2xx_mcxx_setup(speed, clock)

drivers/pcmcia/pxa2xx_base.c

121

| ((pxa2xx_mcxx_asst(speed, clock)

drivers/pcmcia/pxa2xx_base.c

123

| ((pxa2xx_mcxx_hold(speed, clock)

drivers/pcmcia/pxa2xx_base.c

129

static int pxa2xx_pcmcia_mcio(int sock, int speed, int clock)

drivers/pcmcia/pxa2xx_base.c

133

val = ((pxa2xx_mcxx_setup(speed, clock)

drivers/pcmcia/pxa2xx_base.c

135

| ((pxa2xx_mcxx_asst(speed, clock)

drivers/pcmcia/pxa2xx_base.c

137

| ((pxa2xx_mcxx_hold(speed, clock)

drivers/pcmcia/pxa2xx_base.c

144

static int pxa2xx_pcmcia_mcatt(int sock, int speed, int clock)

drivers/pcmcia/pxa2xx_base.c

148

val = ((pxa2xx_mcxx_setup(speed, clock)

drivers/pcmcia/pxa2xx_base.c

150

| ((pxa2xx_mcxx_asst(speed, clock)

drivers/pcmcia/pxa2xx_base.c

152

| ((pxa2xx_mcxx_hold(speed, clock)

drivers/pcmcia/sa11xx_base.c

147

unsigned int clock = clk_get_rate(skt->clk) / 1000;

drivers/pcmcia/sa11xx_base.c

154

sa1100_pcmcia_cmd_time(clock, MECR_BSIO_GET(mecr, skt->nr)));

drivers/pcmcia/sa11xx_base.c

157

sa1100_pcmcia_cmd_time(clock, MECR_BSA_GET(mecr, skt->nr)));

drivers/pcmcia/sa11xx_base.c

160

sa1100_pcmcia_cmd_time(clock, MECR_BSM_GET(mecr, skt->nr)));

drivers/phy/microchip/sparx5_serdes.c

2657

unsigned long clock;

drivers/phy/microchip/sparx5_serdes.c

2684

clock = clk_get_rate(clk);

drivers/phy/microchip/sparx5_serdes.c

2685

if (clock == 0) {

drivers/phy/microchip/sparx5_serdes.c

2686

dev_err(priv->dev, "Invalid coreclock %lu\n", clock);

drivers/phy/microchip/sparx5_serdes.c

2689

priv->coreclock = clock;

drivers/pinctrl/pinctrl-at91.c

1669

clk_disable_unprepare(at91_chip->clock);

drivers/pinctrl/pinctrl-at91.c

1683

clk_prepare_enable(at91_chip->clock);

drivers/pinctrl/pinctrl-at91.c

1854

at91_chip->clock = devm_clk_get_enabled(dev, NULL);

drivers/pinctrl/pinctrl-at91.c

1855

if (IS_ERR(at91_chip->clock))

drivers/pinctrl/pinctrl-at91.c

1856

return dev_err_probe(dev, PTR_ERR(at91_chip->clock), "failed to get clock, ignoring.\n");

drivers/pinctrl/pinctrl-at91.c

58

struct clk *clock;

drivers/pinctrl/pinctrl-microchip-sgpio.c

122

u32 clock;

drivers/pinctrl/pinctrl-microchip-sgpio.c

935

if (device_property_read_u32(dev, "bus-frequency", &priv->clock))

drivers/pinctrl/pinctrl-microchip-sgpio.c

936

priv->clock = 12500000;

drivers/pinctrl/pinctrl-microchip-sgpio.c

937

if (priv->clock == 0 || priv->clock > (div_clock / 2)) {

drivers/pinctrl/pinctrl-microchip-sgpio.c

938

dev_err(dev, "Invalid frequency %d\n", priv->clock);

drivers/pinctrl/pinctrl-microchip-sgpio.c

976

val = max(2U, div_clock / priv->clock);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1484

unsigned long clock = clk_get_rate(clk);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1488

best_diff = abs(freq - clock);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1492

int cur_diff = abs(freq - (clock >> i));

drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c

1710

component->clock[idx].type = MMAL_PORT_TYPE_CLOCK;

drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c

1711

component->clock[idx].index = idx;

drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c

1712

component->clock[idx].component = component;

drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c

1713

spin_lock_init(&component->clock[idx].slock);

drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c

1714

INIT_LIST_HEAD(&component->clock[idx].buffers);

drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.c

1715

ret = port_info_get(instance, &component->clock[idx]);

drivers/platform/raspberrypi/vchiq-mmal/mmal-vchiq.h

94

struct vchiq_mmal_port clock[MAX_PORT_COUNT]; /* clock ports */

drivers/platform/x86/intel/int3472/clk_and_regulator.c

132

int3472->clock.frequency = skl_int3472_get_clk_frequency(int3472);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

133

int3472->clock.clk_hw.init = &init;

drivers/platform/x86/intel/int3472/clk_and_regulator.c

134

int3472->clock.clk = clk_register(&adev->dev, &int3472->clock.clk_hw);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

135

if (IS_ERR(int3472->clock.clk)) {

drivers/platform/x86/intel/int3472/clk_and_regulator.c

136

ret = PTR_ERR(int3472->clock.clk);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

140

int3472->clock.cl = clkdev_create(int3472->clock.clk, NULL, int3472->sensor_name);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

141

if (!int3472->clock.cl) {

drivers/platform/x86/intel/int3472/clk_and_regulator.c

150

clk_unregister(int3472->clock.clk);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

158

if (int3472->clock.cl)

drivers/platform/x86/intel/int3472/clk_and_regulator.c

170

if (int3472->clock.cl)

drivers/platform/x86/intel/int3472/clk_and_regulator.c

173

int3472->clock.ena_gpio = gpio;

drivers/platform/x86/intel/int3472/clk_and_regulator.c

180

if (!int3472->clock.cl)

drivers/platform/x86/intel/int3472/clk_and_regulator.c

183

clkdev_drop(int3472->clock.cl);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

184

clk_unregister(int3472->clock.clk);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

185

gpiod_put(int3472->clock.ena_gpio);

drivers/platform/x86/intel/int3472/discrete.c

479

int3472->clock.imgclk_index = cldb.clock_source;

drivers/ptp/ptp_chardev.c

135

struct ptp_clock *ptp = container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_chardev.c

170

container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_chardev.c

503

struct ptp_clock *ptp = container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_chardev.c

583

container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_chardev.c

600

struct ptp_clock *ptp = container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_clock.c

112

struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock);

drivers/ptp/ptp_clock.c

124

struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock);

drivers/ptp/ptp_clock.c

342

ptp->clock.ops = ptp_clock_ops;

drivers/ptp/ptp_clock.c

440

err = posix_clock_register(&ptp->clock, &ptp->dev);

drivers/ptp/ptp_clock.c

513

posix_clock_unregister(&ptp->clock);

drivers/ptp/ptp_clock.c

97

struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock);

drivers/ptp/ptp_ines.c

148

struct ines_clock *clock;

drivers/ptp/ptp_ines.c

180

static void ines_clock_cleanup(struct ines_clock *clock)

drivers/ptp/ptp_ines.c

186

port = &clock->port[i];

drivers/ptp/ptp_ines.c

191

static int ines_clock_init(struct ines_clock *clock, struct device *device,

drivers/ptp/ptp_ines.c

199

INIT_LIST_HEAD(&clock->list);

drivers/ptp/ptp_ines.c

200

clock->node = node;

drivers/ptp/ptp_ines.c

201

clock->dev = device;

drivers/ptp/ptp_ines.c

202

clock->base = addr;

drivers/ptp/ptp_ines.c

203

clock->regs = clock->base;

drivers/ptp/ptp_ines.c

206

port = &clock->port[i];

drivers/ptp/ptp_ines.c

207

port_addr = (unsigned long) clock->base +

drivers/ptp/ptp_ines.c

210

port->clock = clock;

drivers/ptp/ptp_ines.c

220

ines_write32(clock, 0xBEEF, test);

drivers/ptp/ptp_ines.c

221

ines_write32(clock, 0xBEEF, test2);

drivers/ptp/ptp_ines.c

223

dev_dbg(device, "ID 0x%x\n", ines_read32(clock, id));

drivers/ptp/ptp_ines.c

224

dev_dbg(device, "TEST 0x%x\n", ines_read32(clock, test));

drivers/ptp/ptp_ines.c

225

dev_dbg(device, "VERSION 0x%x\n", ines_read32(clock, version));

drivers/ptp/ptp_ines.c

226

dev_dbg(device, "TEST2 0x%x\n", ines_read32(clock, test2));

drivers/ptp/ptp_ines.c

229

port = &clock->port[i];

drivers/ptp/ptp_ines.c

239

struct ines_clock *clock;

drivers/ptp/ptp_ines.c

244

clock = list_entry(this, struct ines_clock, list);

drivers/ptp/ptp_ines.c

245

if (clock->node == node) {

drivers/ptp/ptp_ines.c

246

port = &clock->port[index];

drivers/ptp/ptp_ines.c

273

if (ines_match(skb, type, ts, port->clock->dev)) {

drivers/ptp/ptp_ines.c

299

buf_stat = ines_read32(port->clock, buf_stat);

drivers/ptp/ptp_ines.c

301

dev_dbg(port->clock->dev,

drivers/ptp/ptp_ines.c

309

dev_err(port->clock->dev,

drivers/ptp/ptp_ines.c

321

if (ines_match(skb, class, &ts, port->clock->dev)) {

drivers/ptp/ptp_ines.c

437

dev_err(port->clock->dev, "bad speed: %d\n", phydev->speed);

drivers/ptp/ptp_ines.c

526

dev_err(port->clock->dev, "event pool is empty\n");

drivers/ptp/ptp_ines.c

529

buf_stat = ines_read32(port->clock, buf_stat);

drivers/ptp/ptp_ines.c

537

dev_err(port->clock->dev, "unexpected Rx read pos %u\n",

drivers/ptp/ptp_ines.c

754

struct ines_clock *clock;

drivers/ptp/ptp_ines.c

763

clock = kzalloc_obj(*clock);

drivers/ptp/ptp_ines.c

764

if (!clock) {

drivers/ptp/ptp_ines.c

768

if (ines_clock_init(clock, &pld->dev, addr)) {

drivers/ptp/ptp_ines.c

769

kfree(clock);

drivers/ptp/ptp_ines.c

775

kfree(clock);

drivers/ptp/ptp_ines.c

779

list_add_tail(&ines_clocks, &clock->list);

drivers/ptp/ptp_ines.c

782

dev_set_drvdata(&pld->dev, clock);

drivers/ptp/ptp_ines.c

789

struct ines_clock *clock = dev_get_drvdata(&pld->dev);

drivers/ptp/ptp_ines.c

793

list_del(&clock->list);

drivers/ptp/ptp_ines.c

795

ines_clock_cleanup(clock);

drivers/ptp/ptp_ines.c

796

kfree(clock);

drivers/ptp/ptp_mock.c

114

return ptp_clock_index(phc->clock);

drivers/ptp/ptp_mock.c

150

phc->clock = ptp_clock_register(&phc->info, dev);

drivers/ptp/ptp_mock.c

151

if (IS_ERR(phc->clock)) {

drivers/ptp/ptp_mock.c

152

err = PTR_ERR(phc->clock);

drivers/ptp/ptp_mock.c

156

ptp_schedule_worker(phc->clock, MOCK_PHC_REFRESH_INTERVAL);

drivers/ptp/ptp_mock.c

169

ptp_clock_unregister(phc->clock);

drivers/ptp/ptp_mock.c

38

struct ptp_clock *clock;

drivers/ptp/ptp_netc.c

1001

priv->clock = ptp_clock_register(&priv->caps, dev);

drivers/ptp/ptp_netc.c

1002

if (IS_ERR(priv->clock)) {

drivers/ptp/ptp_netc.c

1003

err = PTR_ERR(priv->clock);

drivers/ptp/ptp_netc.c

1023

ptp_clock_unregister(priv->clock);

drivers/ptp/ptp_netc.c

110

struct ptp_clock *clock;

drivers/ptp/ptp_netc.c

516

ptp_clock_event(priv->clock, &event);

drivers/ptp/ptp_netc.c

911

ptp_clock_event(priv->clock, &event);

drivers/ptp/ptp_private.h

45

struct posix_clock clock;

drivers/ptp/ptp_private.h

80

struct ptp_clock *clock;

drivers/ptp/ptp_qoriq.c

143

ptp_clock_event(ptp_qoriq->clock, &event);

drivers/ptp/ptp_qoriq.c

187

ptp_clock_event(ptp_qoriq->clock, &event);

drivers/ptp/ptp_qoriq.c

587

ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev);

drivers/ptp/ptp_qoriq.c

588

if (IS_ERR(ptp_qoriq->clock))

drivers/ptp/ptp_qoriq.c

589

return PTR_ERR(ptp_qoriq->clock);

drivers/ptp/ptp_qoriq.c

591

ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock);

drivers/ptp/ptp_qoriq.c

604

ptp_clock_unregister(ptp_qoriq->clock);

drivers/ptp/ptp_sysfs.c

175

vclock->clock->index);

drivers/ptp/ptp_sysfs.c

231

vclock->clock->index;

drivers/ptp/ptp_sysfs.c

234

vclock->clock->index);

drivers/ptp/ptp_vclock.c

159

lockdep_set_subclass(&ptp->clock.rwsem, PTP_LOCK_VIRTUAL);

drivers/ptp/ptp_vclock.c

215

vclock->clock = ptp_clock_register(&vclock->info, &pclock->dev);

drivers/ptp/ptp_vclock.c

216

if (IS_ERR_OR_NULL(vclock->clock)) {

drivers/ptp/ptp_vclock.c

221

ptp_vclock_set_subclass(vclock->clock);

drivers/ptp/ptp_vclock.c

224

ptp_schedule_worker(vclock->clock, PTP_VCLOCK_REFRESH_INTERVAL);

drivers/ptp/ptp_vclock.c

235

ptp_clock_unregister(vclock->clock);

drivers/ptp/ptp_vclock.c

27

&vclock_hash[vclock->clock->index % HASH_SIZE(vclock_hash)]);

drivers/ptp/ptp_vclock.c

287

if (vclock->clock->index != vclock_index)

drivers/sbus/char/bbc_i2c.c

291

writeb(bp->clock, bp->i2c_control_regs + 0x1);

drivers/sbus/char/bbc_i2c.c

343

bp->clock = readb(bp->i2c_control_regs + 0x01);

drivers/sbus/char/bbc_i2c.c

346

bp->index, bp->i2c_control_regs, entry, bp->own, bp->clock);

drivers/sbus/char/bbc_i2c.h

59

unsigned char own, clock;

drivers/scsi/53c700.c

720

if(hostdata->clock > 75) {

drivers/scsi/53c700.c

721

printk(KERN_ERR "53c700: Clock speed %dMHz is too high: 75Mhz is the maximum this chip can be driven at\n", hostdata->clock);

drivers/scsi/53c700.c

727

hostdata->sync_clock = hostdata->clock/2;

drivers/scsi/53c700.c

728

} else if(hostdata->clock > 50 && hostdata->clock <= 75) {

drivers/scsi/53c700.c

733

hostdata->sync_clock = hostdata->clock*2;

drivers/scsi/53c700.c

736

} else if(hostdata->clock > 37 && hostdata->clock <= 50) {

drivers/scsi/53c700.c

741

hostdata->sync_clock = hostdata->clock;

drivers/scsi/53c700.c

742

} else if(hostdata->clock > 25 && hostdata->clock <=37) {

drivers/scsi/53c700.c

747

hostdata->sync_clock = hostdata->clock;

drivers/scsi/53c700.c

753

hostdata->sync_clock = hostdata->clock;

drivers/scsi/53c700.h

197

int clock; /* board clock speed in MHz */

drivers/scsi/a4000t.c

60

hostdata->clock = 50;

drivers/scsi/aacraid/aacraid.h

1351

__le32 clock;

drivers/scsi/arm/fas216.c

2642

unsigned int clock = ((info->ifcfg.clockrate - 1) / 5 + 1) & 7;

drivers/scsi/arm/fas216.c

2643

fas216_writeb(info, REG_CLKF, clock);

drivers/scsi/bvme6000_scsi.c

56

hostdata->clock = 40; /* XXX - depends on the CPU clock! */

drivers/scsi/lasi700.c

103

hostdata->clock = LASI700_CLOCK;

drivers/scsi/lasi700.c

106

hostdata->clock = LASI710_CLOCK;

drivers/scsi/mvme16x_scsi.c

61

hostdata->clock = 50; /* XXX - depends on the CPU clock! */

drivers/scsi/nsp32.c

1090

nsp32_index_write1(base, CLOCK_DIV, data->clock);

drivers/scsi/nsp32.c

2594

data->clock = CLOCK_4;

drivers/scsi/nsp32.c

2599

switch (data->clock) {

drivers/scsi/nsp32.c

2619

data->clock = CLOCK_4;

drivers/scsi/nsp32.h

593

int clock; /* clock dividing flag */

drivers/scsi/qlogicpti.c

622

param[1] = qpti->clock;

drivers/scsi/qlogicpti.c

809

qpti->clock = (cfreq + 500000)/1000000;

drivers/scsi/qlogicpti.c

810

if (qpti->clock == 0) /* bullshit */

drivers/scsi/qlogicpti.c

811

qpti->clock = 40;

drivers/scsi/qlogicpti.h

368

char differential, ultra, clock;

drivers/scsi/sim710.c

110

hostdata->clock = clock;

drivers/scsi/sim710.c

85

int irq, int clock, int differential,

drivers/scsi/sim710.c

94

irq, clock, base_addr, scsi_id);

drivers/scsi/sni_53c710.c

76

hostdata->clock = SNIRM710_CLOCK;

drivers/scsi/zalon.c

66

int clock, status;

drivers/scsi/zalon.c

70

clock = (int) pdc_result[16];

drivers/scsi/zalon.c

73

clock = defaultclock;

drivers/scsi/zalon.c

76

printk(KERN_DEBUG "%s: SCSI clock %d\n", __func__, clock);

drivers/scsi/zalon.c

77

return clock;

drivers/scsi/zorro7xx.c

110

hostdata->clock = 50;

drivers/soc/fsl/qe/ucc.c

119

int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,

drivers/soc/fsl/qe/ucc.c

139

switch (clock) {

drivers/soc/fsl/qe/ucc.c

154

switch (clock) {

drivers/soc/fsl/qe/ucc.c

169

switch (clock) {

drivers/soc/fsl/qe/ucc.c

185

switch (clock) {

drivers/soc/fsl/qe/ucc.c

216

static int ucc_get_tdm_common_clk(u32 tdm_num, enum qe_clock clock)

drivers/soc/fsl/qe/ucc.c

231

switch (clock) {

drivers/soc/fsl/qe/ucc.c

252

switch (clock) {

drivers/soc/fsl/qe/ucc.c

276

static int ucc_get_tdm_rx_clk(u32 tdm_num, enum qe_clock clock)

drivers/soc/fsl/qe/ucc.c

282

switch (clock) {

drivers/soc/fsl/qe/ucc.c

294

switch (clock) {

drivers/soc/fsl/qe/ucc.c

306

switch (clock) {

drivers/soc/fsl/qe/ucc.c

318

switch (clock) {

drivers/soc/fsl/qe/ucc.c

330

switch (clock) {

drivers/soc/fsl/qe/ucc.c

342

switch (clock) {

drivers/soc/fsl/qe/ucc.c

354

switch (clock) {

drivers/soc/fsl/qe/ucc.c

366

switch (clock) {

drivers/soc/fsl/qe/ucc.c

382

static int ucc_get_tdm_tx_clk(u32 tdm_num, enum qe_clock clock)

drivers/soc/fsl/qe/ucc.c

388

switch (clock) {

drivers/soc/fsl/qe/ucc.c

400

switch (clock) {

drivers/soc/fsl/qe/ucc.c

412

switch (clock) {

drivers/soc/fsl/qe/ucc.c

424

switch (clock) {

drivers/soc/fsl/qe/ucc.c

436

switch (clock) {

drivers/soc/fsl/qe/ucc.c

448

switch (clock) {

drivers/soc/fsl/qe/ucc.c

460

switch (clock) {

drivers/soc/fsl/qe/ucc.c

472

switch (clock) {

drivers/soc/fsl/qe/ucc.c

490

enum qe_clock clock)

drivers/soc/fsl/qe/ucc.c

494

clock_bits = ucc_get_tdm_common_clk(tdm_num, clock);

drivers/soc/fsl/qe/ucc.c

498

clock_bits = ucc_get_tdm_rx_clk(tdm_num, clock);

drivers/soc/fsl/qe/ucc.c

500

clock_bits = ucc_get_tdm_tx_clk(tdm_num, clock);

drivers/soc/fsl/qe/ucc.c

517

int ucc_set_tdm_rxtx_clk(u32 tdm_num, enum qe_clock clock,

drivers/soc/fsl/qe/ucc.c

534

clock_bits = ucc_get_tdm_rxtx_clk(mode, tdm_num, clock);

drivers/soc/fsl/qe/ucc.c

549

static int ucc_get_tdm_sync_source(u32 tdm_num, enum qe_clock clock,

drivers/soc/fsl/qe/ucc.c

554

if (mode == COMM_DIR_RX && clock == QE_RSYNC_PIN) {

drivers/soc/fsl/qe/ucc.c

558

if (mode == COMM_DIR_TX && clock == QE_TSYNC_PIN) {

drivers/soc/fsl/qe/ucc.c

566

switch (clock) {

drivers/soc/fsl/qe/ucc.c

579

switch (clock) {

drivers/soc/fsl/qe/ucc.c

592

switch (clock) {

drivers/soc/fsl/qe/ucc.c

605

switch (clock) {

drivers/soc/fsl/qe/ucc.c

631

int ucc_set_tdm_rxtx_sync(u32 tdm_num, enum qe_clock clock,

drivers/soc/fsl/qe/ucc.c

647

source = ucc_get_tdm_sync_source(tdm_num, clock, mode);

drivers/ssb/main.c

848

u32 n1, n2, clock, m1, m2, m3, mc;

drivers/ssb/main.c

880

clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;

drivers/ssb/main.c

883

clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;

drivers/ssb/main.c

885

if (!clock)

drivers/ssb/main.c

908

return clock;

drivers/ssb/main.c

910

return (clock / m1);

drivers/ssb/main.c

912

return (clock / (m1 * m2));

drivers/ssb/main.c

914

return (clock / (m1 * m2 * m3));

drivers/ssb/main.c

916

return (clock / (m1 * m3));

drivers/ssb/main.c

928

clock /= m1;

drivers/ssb/main.c

930

clock /= m2;

drivers/ssb/main.c

932

clock /= m3;

drivers/ssb/main.c

933

return clock;

drivers/staging/greybus/sdio.c

601

request.clock = cpu_to_le32(ios->clock);

drivers/staging/sm750fb/ddk750_mode.c

206

int ddk750_set_mode_timing(struct mode_parameter *parm, enum clock_type clock)

drivers/staging/sm750fb/ddk750_mode.c

211

pll.clock_type = clock;

drivers/staging/sm750fb/ddk750_mode.h

36

int ddk750_set_mode_timing(struct mode_parameter *parm, enum clock_type clock);

drivers/staging/sm750fb/sm750_hw.c

255

enum clock_type clock;

drivers/staging/sm750fb/sm750_hw.c

301

clock = PRIMARY_PLL;

drivers/staging/sm750fb/sm750_hw.c

303

clock = SECONDARY_PLL;

drivers/staging/sm750fb/sm750_hw.c

306

ret = ddk750_set_mode_timing(&modparm, clock);

drivers/tty/moxa.c

1780

unsigned int clock, val;

drivers/tty/moxa.c

1788

clock = 921600;

drivers/tty/moxa.c

1789

val = clock / baud;

drivers/tty/moxa.c

1791

baud = clock / val;

drivers/tty/serial/8250/8250_pci.c

1460

unsigned long clock;

drivers/tty/serial/8250/8250_pci.c

1470

clock = 1843200;

drivers/tty/serial/8250/8250_pci.c

1476

clock = 1843200;

drivers/tty/serial/8250/8250_pci.c

1481

clock = 3685400;

drivers/tty/serial/8250/8250_pci.c

1484

clock = 7372800;

drivers/tty/serial/8250/8250_pci.c

1487

clock = 14745600;

drivers/tty/serial/8250/8250_pci.c

1490

clock = 1843200;

drivers/tty/serial/8250/8250_pci.c

1498

return clock;

drivers/tty/serial/mpc52xx_uart.c

1018

.clock = mpc512x_psc_endis_clock,

drivers/tty/serial/mpc52xx_uart.c

107

int (*clock)(struct uart_port *port, int enable);

drivers/tty/serial/mpc52xx_uart.c

1114

if (psc_ops->clock) {

drivers/tty/serial/mpc52xx_uart.c

1115

ret = psc_ops->clock(port, 1);

drivers/tty/serial/mpc52xx_uart.c

1158

if (psc_ops->clock)

drivers/tty/serial/mpc52xx_uart.c

1159

psc_ops->clock(port, 0);

drivers/tty/serial/mpc52xx_uart.c

983

.clock = mpc512x_psc_endis_clock,

drivers/usb/dwc2/hcd.c

330

int clock = 60; /* default value */

drivers/usb/dwc2/hcd.c

337

clock = 60;

drivers/usb/dwc2/hcd.c

340

clock = 48;

drivers/usb/dwc2/hcd.c

343

clock = 30;

drivers/usb/dwc2/hcd.c

346

clock = 60;

drivers/usb/dwc2/hcd.c

349

clock = 48;

drivers/usb/dwc2/hcd.c

352

clock = 48;

drivers/usb/dwc2/hcd.c

355

clock = 48;

drivers/usb/dwc2/hcd.c

359

return 125 * clock - 1;

drivers/usb/dwc2/hcd.c

362

return 1000 * clock - 1;

drivers/usb/gadget/udc/m66592-udc.c

614

unsigned int clock, vif, irq_sense;

drivers/usb/gadget/udc/m66592-udc.c

628

clock = M66592_XTAL12;

drivers/usb/gadget/udc/m66592-udc.c

631

clock = M66592_XTAL24;

drivers/usb/gadget/udc/m66592-udc.c

634

clock = M66592_XTAL48;

drivers/usb/gadget/udc/m66592-udc.c

638

clock = 0;

drivers/usb/gadget/udc/m66592-udc.c

657

m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL,

drivers/usb/gadget/udc/r8a66597-udc.h

237

u16 clock = 0;

drivers/usb/gadget/udc/r8a66597-udc.h

241

clock = XTAL12;

drivers/usb/gadget/udc/r8a66597-udc.h

244

clock = XTAL24;

drivers/usb/gadget/udc/r8a66597-udc.h

247

clock = XTAL48;

drivers/usb/gadget/udc/r8a66597-udc.h

254

return clock;

drivers/usb/host/oxu210hp-hcd.c

2650

unsigned frame, clock, now_uframe, mod;

drivers/usb/host/oxu210hp-hcd.c

2662

clock = readl(&oxu->regs->frame_index);

drivers/usb/host/oxu210hp-hcd.c

2664

clock = now_uframe + mod - 1;

drivers/usb/host/oxu210hp-hcd.c

2665

clock %= mod;

drivers/usb/host/oxu210hp-hcd.c

2673

if (frame != (clock >> 3)) {

drivers/usb/host/oxu210hp-hcd.c

2722

if (now_uframe == clock) {

drivers/usb/host/oxu210hp-hcd.c

2733

clock = now;

drivers/usb/host/r8a66597.h

300

u16 clock = 0;

drivers/usb/host/r8a66597.h

304

clock = XTAL12;

drivers/usb/host/r8a66597.h

307

clock = XTAL24;

drivers/usb/host/r8a66597.h

310

clock = XTAL48;

drivers/usb/host/r8a66597.h

317

return clock;

drivers/video/fbdev/acornfb.h

92

u_int clock;

drivers/video/fbdev/aty/mach64_ct.c

381

u8 tmp, clock;

drivers/video/fbdev/aty/mach64_ct.c

383

clock = aty_ld_8(CLOCK_CNTL, par) & 0x03U;

drivers/video/fbdev/aty/mach64_ct.c

384

tmp = clock << 1;

drivers/video/fbdev/aty/mach64_ct.c

388

pll->ct.vclk_fb_div = aty_ld_pll_ct(VCLK0_FB_DIV + clock, par) & 0xFFU;

drivers/video/fbdev/aty/radeon_base.c

1695

pixClock = 100000000 / rinfo->panel_info.clock;

drivers/video/fbdev/aty/radeon_monitor.c

225

rinfo->panel_info.clock = BIOS_IN16(tmp0+9);

drivers/video/fbdev/aty/radeon_monitor.c

241

pr_debug(" clock: %d\n", rinfo->panel_info.clock);

drivers/video/fbdev/aty/radeon_monitor.c

690

rinfo->panel_info.clock = 100000000 / var->pixclock;

drivers/video/fbdev/aty/radeon_monitor.c

807

var->pixclock = 100000000 / rinfo->panel_info.clock;

drivers/video/fbdev/aty/radeonfb.h

258

int clock;

drivers/video/fbdev/matrox/i2c-matroxfb.c

103

unsigned int data, unsigned int clock, const char *name)

drivers/video/fbdev/matrox/i2c-matroxfb.c

109

b->mask.clock = clock;

drivers/video/fbdev/matrox/i2c-matroxfb.c

79

matroxfb_i2c_set(b->minfo, b->mask.clock, state);

drivers/video/fbdev/matrox/i2c-matroxfb.c

89

return (matroxfb_read_gpio(b->minfo) & b->mask.clock) ? 1 : 0;

drivers/video/fbdev/matrox/matroxfb_maven.h

17

unsigned int clock;

drivers/video/fbdev/savage/savagefb.h

209

int clock[4];

drivers/video/fbdev/savage/savagefb_driver.c

1516

par->dacSpeedBpp = par->clock[3];

drivers/video/fbdev/savage/savagefb_driver.c

1518

par->dacSpeedBpp = par->clock[2];

drivers/video/fbdev/savage/savagefb_driver.c

1520

par->dacSpeedBpp = par->clock[1];

drivers/video/fbdev/savage/savagefb_driver.c

1522

par->dacSpeedBpp = par->clock[0];

drivers/video/fbdev/savage/savagefb_driver.c

1919

par->clock[0] = 250000;

drivers/video/fbdev/savage/savagefb_driver.c

1920

par->clock[1] = 250000;

drivers/video/fbdev/savage/savagefb_driver.c

1921

par->clock[2] = 220000;

drivers/video/fbdev/savage/savagefb_driver.c

1922

par->clock[3] = 220000;

drivers/video/fbdev/simplefb.c

242

struct clk *clock;

drivers/video/fbdev/simplefb.c

257

clock = of_clk_get(np, i);

drivers/video/fbdev/simplefb.c

258

if (IS_ERR(clock)) {

drivers/video/fbdev/simplefb.c

259

if (PTR_ERR(clock) == -EPROBE_DEFER) {

drivers/video/fbdev/simplefb.c

267

__func__, i, PTR_ERR(clock));

drivers/video/fbdev/simplefb.c

270

par->clks[i] = clock;

drivers/video/fbdev/sstfb.c

1012

__func__, clock);

drivers/video/fbdev/sstfb.c

1024

const struct pll_timing *t, const int clock)

drivers/video/fbdev/sstfb.c

1031

switch(clock) {

drivers/video/fbdev/sstfb.c

1054

__func__, clock);

drivers/video/fbdev/sstfb.c

970

const struct pll_timing *t, const int clock)

drivers/video/fbdev/sstfb.c

997

switch (clock) {

drivers/video/fbdev/via/hw.c

1447

clock.set_primary_pll(config);

drivers/video/fbdev/via/hw.c

1449

clock.set_secondary_pll(config);

drivers/video/fbdev/via/hw.c

1497

via_clock_init(&clock, chip_type);

drivers/video/fbdev/via/hw.c

1966

clock.set_engine_pll_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1967

clock.set_primary_clock_source(VIA_CLKSRC_X1, true);

drivers/video/fbdev/via/hw.c

1968

clock.set_secondary_clock_source(VIA_CLKSRC_X1, true);

drivers/video/fbdev/via/hw.c

1971

clock.set_primary_pll_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1972

clock.set_primary_clock_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1973

clock.set_secondary_pll_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1974

clock.set_secondary_clock_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1977

clock.set_primary_pll_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1978

clock.set_primary_clock_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1980

clock.set_primary_pll_state(VIA_STATE_OFF);

drivers/video/fbdev/via/hw.c

1981

clock.set_primary_clock_state(VIA_STATE_OFF);

drivers/video/fbdev/via/hw.c

1985

clock.set_secondary_pll_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1986

clock.set_secondary_clock_state(VIA_STATE_ON);

drivers/video/fbdev/via/hw.c

1988

clock.set_secondary_pll_state(VIA_STATE_OFF);

drivers/video/fbdev/via/hw.c

1989

clock.set_secondary_clock_state(VIA_STATE_OFF);

drivers/video/fbdev/via/hw.c

450

static struct via_clock clock;

drivers/video/fbdev/via/lcd.c

537

u32 clock;

drivers/video/fbdev/via/lcd.c

549

clock = PICOS2KHZ(panel_crt_table->pixclock) * 1000;

drivers/video/fbdev/via/lcd.c

550

plvds_setting_info->vclk = clock;

drivers/video/fbdev/via/lcd.c

577

viafb_set_vclock(clock, set_iga);

drivers/video/fbdev/via/via_clock.c

282

void via_clock_init(struct via_clock *clock, int gfx_chip)

drivers/video/fbdev/via/via_clock.c

287

clock->set_primary_clock_state = dummy_set_clock_state;

drivers/video/fbdev/via/via_clock.c

288

clock->set_primary_clock_source = dummy_set_clock_source;

drivers/video/fbdev/via/via_clock.c

289

clock->set_primary_pll_state = dummy_set_pll_state;

drivers/video/fbdev/via/via_clock.c

290

clock->set_primary_pll = cle266_set_primary_pll;

drivers/video/fbdev/via/via_clock.c

292

clock->set_secondary_clock_state = dummy_set_clock_state;

drivers/video/fbdev/via/via_clock.c

293

clock->set_secondary_clock_source = dummy_set_clock_source;

drivers/video/fbdev/via/via_clock.c

294

clock->set_secondary_pll_state = dummy_set_pll_state;

drivers/video/fbdev/via/via_clock.c

295

clock->set_secondary_pll = cle266_set_secondary_pll;

drivers/video/fbdev/via/via_clock.c

297

clock->set_engine_pll_state = dummy_set_pll_state;

drivers/video/fbdev/via/via_clock.c

298

clock->set_engine_pll = dummy_set_pll;

drivers/video/fbdev/via/via_clock.c

309

clock->set_primary_clock_state = set_primary_clock_state;

drivers/video/fbdev/via/via_clock.c

310

clock->set_primary_clock_source = set_primary_clock_source;

drivers/video/fbdev/via/via_clock.c

311

clock->set_primary_pll_state = set_primary_pll_state;

drivers/video/fbdev/via/via_clock.c

312

clock->set_primary_pll = k800_set_primary_pll;

drivers/video/fbdev/via/via_clock.c

314

clock->set_secondary_clock_state = set_secondary_clock_state;

drivers/video/fbdev/via/via_clock.c

315

clock->set_secondary_clock_source = set_secondary_clock_source;

drivers/video/fbdev/via/via_clock.c

316

clock->set_secondary_pll_state = set_secondary_pll_state;

drivers/video/fbdev/via/via_clock.c

317

clock->set_secondary_pll = k800_set_secondary_pll;

drivers/video/fbdev/via/via_clock.c

319

clock->set_engine_pll_state = set_engine_pll_state;

drivers/video/fbdev/via/via_clock.c

320

clock->set_engine_pll = k800_set_engine_pll;

drivers/video/fbdev/via/via_clock.c

324

clock->set_primary_clock_state = set_primary_clock_state;

drivers/video/fbdev/via/via_clock.c

325

clock->set_primary_clock_source = set_primary_clock_source;

drivers/video/fbdev/via/via_clock.c

326

clock->set_primary_pll_state = set_primary_pll_state;

drivers/video/fbdev/via/via_clock.c

327

clock->set_primary_pll = vx855_set_primary_pll;

drivers/video/fbdev/via/via_clock.c

329

clock->set_secondary_clock_state = set_secondary_clock_state;

drivers/video/fbdev/via/via_clock.c

330

clock->set_secondary_clock_source = set_secondary_clock_source;

drivers/video/fbdev/via/via_clock.c

331

clock->set_secondary_pll_state = set_secondary_pll_state;

drivers/video/fbdev/via/via_clock.c

332

clock->set_secondary_pll = vx855_set_secondary_pll;

drivers/video/fbdev/via/via_clock.c

334

clock->set_engine_pll_state = set_engine_pll_state;

drivers/video/fbdev/via/via_clock.c

335

clock->set_engine_pll = vx855_set_engine_pll;

drivers/video/fbdev/via/via_clock.c

350

clock->set_primary_clock_state = noop_set_clock_state;

drivers/video/fbdev/via/via_clock.c

351

clock->set_secondary_clock_state = noop_set_clock_state;

drivers/video/fbdev/via/via_clock.h

59

void via_clock_init(struct via_clock *clock, int gfx_chip);

drivers/watchdog/ie6xx_wdt.c

102

clock = 33000000;

drivers/watchdog/ie6xx_wdt.c

104

preload = (t * clock) >> 15;

drivers/watchdog/ie6xx_wdt.c

98

u64 clock;

fs/proc/base.c

1659

char clock[10];

fs/proc/base.c

1671

err = sscanf(pos, "%9s %lld %lu", clock,

fs/proc/base.c

1676

clock[sizeof(clock) - 1] = 0;

fs/proc/base.c

1677

if (strcmp(clock, "monotonic") == 0 ||

fs/proc/base.c

1678

strcmp(clock, __stringify(CLOCK_MONOTONIC)) == 0)

fs/proc/base.c

1680

else if (strcmp(clock, "boottime") == 0 ||

fs/proc/base.c

1681

strcmp(clock, __stringify(CLOCK_BOOTTIME)) == 0)

include/drm/display/drm_dp_mst_helper.h

879

int drm_dp_calc_pbn_mode(int clock, int bpp);

include/drm/drm_modes.h

135

.name = nm, .status = 0, .type = (t), .clock = (c), \

include/drm/drm_modes.h

150

.type = DRM_MODE_TYPE_DRIVER, .clock = (pix), \

include/drm/drm_modes.h

258

int clock; /* in kHz */

include/drm/drm_modes.h

432

(m)->name, drm_mode_vrefresh(m), (m)->clock, \

include/drm/gud.h

82

__le32 clock;

include/linux/can/dev.h

54

struct can_clock clock;

include/linux/clocksource.h

277

extern int timekeeping_notify(struct clocksource *clock);

include/linux/fsl/ptp_qoriq.h

145

struct ptp_clock *clock;

include/linux/greybus/greybus_protocols.h

1434

__le32 clock;

include/linux/mfd/db8500-prcmu.h

504

int prcmu_set_clock_divider(u8 clock, u8 divider);

include/linux/mfd/db8500-prcmu.h

527

int db8500_prcmu_request_clock(u8 clock, bool enable);

include/linux/mfd/db8500-prcmu.h

613

static inline int prcmu_set_clock_divider(u8 clock, u8 divider)

include/linux/mfd/db8500-prcmu.h

677

static inline int db8500_prcmu_request_clock(u8 clock, bool enable)

include/linux/mfd/dbx500-prcmu.h

264

static inline int prcmu_request_clock(u8 clock, bool enable)

include/linux/mfd/dbx500-prcmu.h

266

return db8500_prcmu_request_clock(clock, enable);

include/linux/mfd/dbx500-prcmu.h

269

unsigned long prcmu_clock_rate(u8 clock);

include/linux/mfd/dbx500-prcmu.h

270

long prcmu_round_clock_rate(u8 clock, unsigned long rate);

include/linux/mfd/dbx500-prcmu.h

271

int prcmu_set_clock_rate(u8 clock, unsigned long rate);

include/linux/mfd/dbx500-prcmu.h

429

static inline int prcmu_request_clock(u8 clock, bool enable)

include/linux/mfd/dbx500-prcmu.h

434

static inline long prcmu_round_clock_rate(u8 clock, unsigned long rate)

include/linux/mfd/dbx500-prcmu.h

439

static inline int prcmu_set_clock_rate(u8 clock, unsigned long rate)

include/linux/mfd/dbx500-prcmu.h

444

static inline unsigned long prcmu_clock_rate(u8 clock)

include/linux/mlx5/driver.h

781

struct mlx5_clock *clock;

include/linux/mmc/host.h

23

unsigned int clock; /* clock rate */

include/linux/pci.h

1953

int (*local_clock_read)(void *drvdata, u64 *clock);

include/linux/pci.h

1954

int (*master_clock_read)(void *drvdata, u64 *clock);

include/linux/pci.h

1955

int (*t1_read)(void *drvdata, u64 *clock);

include/linux/pci.h

1956

int (*t2_read)(void *drvdata, u64 *clock);

include/linux/pci.h

1957

int (*t3_read)(void *drvdata, u64 *clock);

include/linux/pci.h

1958

int (*t4_read)(void *drvdata, u64 *clock);

include/linux/perf_event.h

903

u64 (*clock)(void);

include/linux/platform_data/x86/int3472.h

123

} clock;

include/linux/platform_data/x86/int3472.h

70

container_of(clk, struct int3472_discrete_device, clock)

include/linux/posix-timers.h

20

const clockid_t clock)

include/linux/posix-timers.h

22

return ((~pid) << 3) | clock;

include/linux/posix-timers.h

25

const clockid_t clock)

include/linux/posix-timers.h

27

return make_process_cpuclock(tid, clock | CPUCLOCK_PERTHREAD_MASK);

include/linux/posix-timers_types.h

20

#define CPUCLOCK_PID(clock) ((pid_t) ~((clock) >> 3))

include/linux/posix-timers_types.h

21

#define CPUCLOCK_PERTHREAD(clock) \

include/linux/posix-timers_types.h

22

(((clock) & (clockid_t) CPUCLOCK_PERTHREAD_MASK) != 0)

include/linux/posix-timers_types.h

25

#define CPUCLOCK_WHICH(clock) ((clock) & (clockid_t) CPUCLOCK_CLOCK_MASK)

include/linux/ring_buffer.h

214

u64 (*clock)(void));

include/linux/scc.h

56

long clock; /* used clock */

include/linux/timekeeper_internal.h

51

struct clocksource *clock;

include/linux/usb/musb.h

85

const char *clock;

include/net/bluetooth/hci.h

1605

__le32 clock;

include/net/bluetooth/hci_core.h

439

__u32 clock;

include/net/bluetooth/hci_core.h

749

__u32 clock;

include/soc/fsl/qe/ucc.h

38

int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,

include/soc/fsl/qe/ucc.h

40

int ucc_set_tdm_rxtx_clk(unsigned int tdm_num, enum qe_clock clock,

include/soc/fsl/qe/ucc.h

42

int ucc_set_tdm_rxtx_sync(unsigned int tdm_num, enum qe_clock clock,

include/sound/ac97_codec.h

209

unsigned int clock; /* AC'97 base clock (usually 48000Hz) */

include/sound/i2c.h

26

void (*direction)(struct snd_i2c_bus *bus, int clock, int data); /* set line direction (0 = write, 1 = read) */

include/sound/i2c.h

27

void (*setlines)(struct snd_i2c_bus *bus, int clock, int data);

include/sound/sdca_function.h

953

struct sdca_entity *clock;

include/uapi/drm/drm_mode.h

243

__u32 clock;

include/uapi/linux/kvm.h

1083

__u64 clock;

include/uapi/linux/scc.h

154

long clock; /* clock */

include/vdso/gettime.h

13

int __vdso_clock_getres(clockid_t clock, struct old_timespec32 *res);

include/vdso/gettime.h

14

int __vdso_clock_gettime(clockid_t clock, struct old_timespec32 *ts);

include/vdso/gettime.h

16

int __vdso_clock_getres(clockid_t clock, struct __kernel_timespec *res);

include/vdso/gettime.h

17

int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts);

include/vdso/gettime.h

22

int __vdso_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts);

include/vdso/gettime.h

23

int __vdso_clock_getres_time64(clockid_t clock, struct __kernel_timespec *ts);

include/video/sstfb.h

327

int (*set_pll) (struct fb_info *info, const struct pll_timing *t, const int clock);

kernel/events/core.c

13350

event->clock = &local_clock;

kernel/events/core.c

13352

event->clock = parent_event->clock;

kernel/events/core.c

13670

if (output_event->clock != event->clock)

kernel/events/core.c

13734

event->clock = &ktime_get_mono_fast_ns;

kernel/events/core.c

13739

event->clock = &ktime_get_raw_fast_ns;

kernel/events/core.c

13744

event->clock = &ktime_get_real_ns;

kernel/events/core.c

13748

event->clock = &ktime_get_boottime_ns;

kernel/events/core.c

13752

event->clock = &ktime_get_clocktai_ns;

kernel/events/core.c

14011

if (group_leader->clock != event->clock)

kernel/events/core.c

707

return event->clock();

kernel/sched/clock.c

164

scd->clock = scd->tick_gtod + __gtod_offset;

kernel/sched/clock.c

271

u64 now, clock, old_clock, min_clock, max_clock, gtod;

kernel/sched/clock.c

280

old_clock = scd->clock;

kernel/sched/clock.c

289

clock = gtod + delta;

kernel/sched/clock.c

293

clock = wrap_max(clock, min_clock);

kernel/sched/clock.c

294

clock = wrap_min(clock, max_clock);

kernel/sched/clock.c

296

if (!raw_try_cmpxchg64(&scd->clock, &old_clock, clock))

kernel/sched/clock.c

299

return clock;

kernel/sched/clock.c

304

u64 clock;

kernel/sched/clock.c

312

clock = sched_clock_local(this_scd());

kernel/sched/clock.c

314

return clock;

kernel/sched/clock.c

352

remote_clock = cmpxchg64(&scd->clock, 0, 0);

kernel/sched/clock.c

360

this_clock = my_scd->clock;

kernel/sched/clock.c

361

remote_clock = scd->clock;

kernel/sched/clock.c

371

ptr = &scd->clock;

kernel/sched/clock.c

378

ptr = &my_scd->clock;

kernel/sched/clock.c

397

u64 clock;

kernel/sched/clock.c

409

clock = sched_clock_remote(scd);

kernel/sched/clock.c

411

clock = sched_clock_local(scd);

kernel/sched/clock.c

414

return clock;

kernel/sched/clock.c

94

u64 clock;

kernel/sched/core.c

848

u64 clock;

kernel/sched/core.c

859

clock = sched_clock_cpu(cpu_of(rq));

kernel/sched/core.c

860

scx_rq_clock_update(rq, clock);

kernel/sched/core.c

862

delta = clock - rq->clock;

kernel/sched/core.c

865

rq->clock += delta;

kernel/sched/cputime.c

652

unsigned long long clock;

kernel/sched/cputime.c

654

clock = sched_clock();

kernel/sched/cputime.c

655

if (clock < vtime->starttime)

kernel/sched/cputime.c

658

return clock - vtime->starttime;

kernel/sched/debug.c

1060

PN(clock);

kernel/sched/ext.c

7346

u64 clock;

kernel/sched/ext.c

7360

clock = READ_ONCE(rq->scx.clock);

kernel/sched/ext.c

7369

clock = sched_clock_cpu(cpu_of(rq));

kernel/sched/ext.c

7374

return clock;

kernel/sched/pelt.c

454

ret = ___update_load_sum(rq->clock - running, &rq->avg_irq,

kernel/sched/pelt.c

458

ret += ___update_load_sum(rq->clock, &rq->avg_irq,

kernel/sched/sched.h

1215

u64 clock;

kernel/sched/sched.h

1765

return rq->clock;

kernel/sched/sched.h

1836

static inline void scx_rq_clock_update(struct rq *rq, u64 clock)

kernel/sched/sched.h

1840

WRITE_ONCE(rq->scx.clock, clock);

kernel/sched/sched.h

1855

static inline void scx_rq_clock_update(struct rq *rq, u64 clock) {}

kernel/sched/sched.h

803

u64 clock; /* current per-rq clock -- see scx_bpf_now() */

kernel/time/namespace.c

352

char *clock;

kernel/time/namespace.c

356

clock = "boottime";

kernel/time/namespace.c

359

clock = "monotonic";

kernel/time/namespace.c

362

clock = "unknown";

kernel/time/namespace.c

365

seq_printf(m, "%-10s %10lld %9ld\n", clock, ts->tv_sec, ts->tv_nsec);

kernel/time/posix-cpu-timers.c

102

ret = pid_for_clock(clock, false) ? 0 : -EINVAL;

kernel/time/posix-cpu-timers.c

108

static inline enum pid_type clock_pid_type(const clockid_t clock)

kernel/time/posix-cpu-timers.c

110

return CPUCLOCK_PERTHREAD(clock) ? PIDTYPE_PID : PIDTYPE_TGID;

kernel/time/posix-cpu-timers.c

180

posix_cpu_clock_set(const clockid_t clock, const struct timespec64 *tp)

kernel/time/posix-cpu-timers.c

182

int error = validate_clock_permissions(clock);

kernel/time/posix-cpu-timers.c

358

static int posix_cpu_clock_get(const clockid_t clock, struct timespec64 *tp)

kernel/time/posix-cpu-timers.c

360

const clockid_t clkid = CPUCLOCK_WHICH(clock);

kernel/time/posix-cpu-timers.c

365

tsk = pid_task(pid_for_clock(clock, true), clock_pid_type(clock));

kernel/time/posix-cpu-timers.c

371

if (CPUCLOCK_PERTHREAD(clock))

kernel/time/posix-cpu-timers.c

57

static struct pid *pid_for_clock(const clockid_t clock, bool gettime)

kernel/time/posix-cpu-timers.c

59

const bool thread = !!CPUCLOCK_PERTHREAD(clock);

kernel/time/posix-cpu-timers.c

60

const pid_t upid = CPUCLOCK_PID(clock);

kernel/time/posix-cpu-timers.c

63

if (CPUCLOCK_WHICH(clock) >= CPUCLOCK_MAX)

kernel/time/posix-cpu-timers.c

97

static inline int validate_clock_permissions(const clockid_t clock)

kernel/time/timekeeping.c

1062

systime_snapshot->cs_id = tk->tkr_mono.clock->id;

kernel/time/timekeeping.c

1205

struct clocksource *cs = tk_core.timekeeper.tkr_mono.clock;

kernel/time/timekeeping.c

1233

struct clocksource *cs = tk_core.timekeeper.tkr_mono.clock;

kernel/time/timekeeping.c

132

.clock = &dummy_clock, \

kernel/time/timekeeping.c

1422

struct clocksource_base *base = READ_ONCE(tk_core.timekeeper.tkr_mono.clock->base);

kernel/time/timekeeping.c

1605

old = tks->tkr_mono.clock;

kernel/time/timekeeping.c

1628

int timekeeping_notify(struct clocksource *clock)

kernel/time/timekeeping.c

1632

if (tk->tkr_mono.clock == clock)

kernel/time/timekeeping.c

1634

stop_machine(change_clocksource, clock, NULL);

kernel/time/timekeeping.c

1636

return tk->tkr_mono.clock == clock ? 0 : -1;

kernel/time/timekeeping.c

1709

ret = tk->tkr_mono.clock->flags & CLOCK_SOURCE_VALID_FOR_HRES;

kernel/time/timekeeping.c

1728

ret = tk->tkr_mono.clock->max_idle_ns;

kernel/time/timekeeping.c

1805

struct clocksource *clock;

kernel/time/timekeeping.c

1832

clock = clocksource_default_clock();

kernel/time/timekeeping.c

1833

if (clock->enable)

kernel/time/timekeeping.c

1834

clock->enable(clock);

kernel/time/timekeeping.c

1835

tk_setup_internals(tks, clock);

kernel/time/timekeeping.c

1940

struct clocksource *clock = tks->tkr_mono.clock;

kernel/time/timekeeping.c

1966

nsec = clocksource_stop_suspend_timing(clock, cycle_now);

kernel/time/timekeeping.c

2032

curr_clock = tks->tkr_mono.clock;

kernel/time/timekeeping.c

2200

if (unlikely(tk->tkr_mono.clock->maxadj &&

kernel/time/timekeeping.c

2201

(abs(tk->tkr_mono.mult - tk->tkr_mono.clock->mult)

kernel/time/timekeeping.c

2202

> tk->tkr_mono.clock->maxadj))) {

kernel/time/timekeeping.c

2205

tk->tkr_mono.clock->name, (long)tk->tkr_mono.mult,

kernel/time/timekeeping.c

2206

(long)tk->tkr_mono.clock->mult + tk->tkr_mono.clock->maxadj);

kernel/time/timekeeping.c

2335

tk->tkr_mono.clock->max_raw_delta);

kernel/time/timekeeping.c

2680

struct clocksource *clock = READ_ONCE(tkr->clock);

kernel/time/timekeeping.c

2682

if (unlikely(timekeeping_suspended || !clock))

kernel/time/timekeeping.c

2684

return clock->read(clock);

kernel/time/timekeeping.c

2837

tk_setup_internals(tks, tk_core.timekeeper.tkr_mono.clock);

kernel/time/timekeeping.c

293

struct clocksource *clock = READ_ONCE(tkr->clock);

kernel/time/timekeeping.c

295

return clock->read(clock);

kernel/time/timekeeping.c

3011

tk_setup_internals(aux_tks, tkr_raw->clock);

kernel/time/timekeeping.c

309

static void tk_setup_internals(struct timekeeper *tk, struct clocksource *clock)

kernel/time/timekeeping.c

316

old_clock = tk->tkr_mono.clock;

kernel/time/timekeeping.c

317

tk->tkr_mono.clock = clock;

kernel/time/timekeeping.c

318

tk->tkr_mono.mask = clock->mask;

kernel/time/timekeeping.c

321

tk->tkr_raw.clock = clock;

kernel/time/timekeeping.c

322

tk->tkr_raw.mask = clock->mask;

kernel/time/timekeeping.c

327

tmp <<= clock->shift;

kernel/time/timekeeping.c

329

tmp += clock->mult/2;

kernel/time/timekeeping.c

330

do_div(tmp, clock->mult);

kernel/time/timekeeping.c

338

tk->xtime_interval = interval * clock->mult;

kernel/time/timekeeping.c

340

tk->raw_interval = interval * clock->mult;

kernel/time/timekeeping.c

344

int shift_change = clock->shift - old_clock->shift;

kernel/time/timekeeping.c

354

tk->tkr_mono.shift = clock->shift;

kernel/time/timekeeping.c

355

tk->tkr_raw.shift = clock->shift;

kernel/time/timekeeping.c

358

tk->ntp_error_shift = NTP_SCALE_SHIFT - clock->shift;

kernel/time/timekeeping.c

366

tk->tkr_mono.mult = clock->mult;

kernel/time/timekeeping.c

367

tk->tkr_raw.mult = clock->mult;

kernel/time/timekeeping.c

387

if (unlikely(delta > tkr->clock->max_cycles)) {

kernel/time/timekeeping.c

597

tkr_dummy.clock = &dummy_clock;

kernel/time/timekeeping.c

603

tkr_dummy.clock = &dummy_clock;

kernel/time/timekeeping.c

771

tk->tkr_mono.clock->max_raw_delta);

kernel/time/timekeeping.c

776

u64 max = tk->tkr_mono.clock->max_cycles;

kernel/time/vsyscall.c

150

clock_mode = tk->tkr_mono.clock->vdso_clock_mode;

kernel/time/vsyscall.c

22

vc->max_cycles = base->clock->max_cycles;

kernel/time/vsyscall.c

88

clock_mode = tk->tkr_mono.clock->vdso_clock_mode;

kernel/trace/ring_buffer.c

1131

if (IS_ENABLED(CONFIG_MITIGATION_RETPOLINE) && likely(buffer->clock == trace_clock_local))

kernel/trace/ring_buffer.c

1134

ts = buffer->clock();

kernel/trace/ring_buffer.c

2504

buffer->clock = trace_clock_local;

kernel/trace/ring_buffer.c

2695

u64 (*clock)(void))

kernel/trace/ring_buffer.c

2697

buffer->clock = clock;

kernel/trace/ring_buffer.c

585

u64 (*clock)(void);

kernel/trace/trace_clock.c

34

u64 clock;

kernel/trace/trace_clock.c

42

clock = sched_clock();

kernel/trace/trace_clock.c

45

return clock;

kernel/trace/trace_events_hist.c

1450

kfree(attrs->clock);

kernel/trace/trace_events_hist.c

1511

attrs->clock = kstrdup(str, GFP_KERNEL);

kernel/trace/trace_events_hist.c

1512

if (!attrs->clock) {

kernel/trace/trace_events_hist.c

1591

if (!attrs->clock) {

kernel/trace/trace_events_hist.c

1592

attrs->clock = kstrdup("global", GFP_KERNEL);

kernel/trace/trace_events_hist.c

1593

if (!attrs->clock) {

kernel/trace/trace_events_hist.c

530

char *clock;

kernel/trace/trace_events_hist.c

6279

seq_printf(m, ":clock=%s", hist_data->attrs->clock);

kernel/trace/trace_events_hist.c

6622

char *clock = hist_data->attrs->clock;

kernel/trace/trace_events_hist.c

6624

ret = tracing_set_clock(file->tr, hist_data->attrs->clock);

kernel/trace/trace_events_hist.c

6626

hist_err(tr, HIST_ERR_SET_CLOCK_FAIL, errpos(clock));

lib/vdso/gettimeofday.c

246

bool do_aux(const struct vdso_time_data *vd, clockid_t clock, struct __kernel_timespec *ts)

lib/vdso/gettimeofday.c

255

idx = clock - CLOCK_AUX;

lib/vdso/gettimeofday.c

288

__cvdso_clock_gettime_common(const struct vdso_time_data *vd, clockid_t clock,

lib/vdso/gettimeofday.c

294

if (!vdso_clockid_valid(clock))

lib/vdso/gettimeofday.c

301

msk = 1U << clock;

lib/vdso/gettimeofday.c

305

return do_coarse(vd, &vc[CS_HRES_COARSE], clock, ts);

lib/vdso/gettimeofday.c

309

return do_aux(vd, clock, ts);

lib/vdso/gettimeofday.c

313

return do_hres(vd, vc, clock, ts);

lib/vdso/gettimeofday.c

317

__cvdso_clock_gettime_data(const struct vdso_time_data *vd, clockid_t clock,

lib/vdso/gettimeofday.c

322

ok = __cvdso_clock_gettime_common(vd, clock, ts);

lib/vdso/gettimeofday.c

325

return clock_gettime_fallback(clock, ts);

lib/vdso/gettimeofday.c

330

__cvdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts)

lib/vdso/gettimeofday.c

332

return __cvdso_clock_gettime_data(__arch_get_vdso_u_time_data(), clock, ts);

lib/vdso/gettimeofday.c

337

__cvdso_clock_gettime32_data(const struct vdso_time_data *vd, clockid_t clock,

lib/vdso/gettimeofday.c

343

ok = __cvdso_clock_gettime_common(vd, clock, &ts);

lib/vdso/gettimeofday.c

346

return clock_gettime32_fallback(clock, res);

lib/vdso/gettimeofday.c

356

__cvdso_clock_gettime32(clockid_t clock, struct old_timespec32 *res)

lib/vdso/gettimeofday.c

358

return __cvdso_clock_gettime32_data(__arch_get_vdso_u_time_data(), clock, res);

lib/vdso/gettimeofday.c

425

bool __cvdso_clock_getres_common(const struct vdso_time_data *vd, clockid_t clock,

lib/vdso/gettimeofday.c

432

if (!vdso_clockid_valid(clock))

lib/vdso/gettimeofday.c

443

msk = 1U << clock;

lib/vdso/gettimeofday.c

468

int __cvdso_clock_getres_data(const struct vdso_time_data *vd, clockid_t clock,

lib/vdso/gettimeofday.c

473

ok = __cvdso_clock_getres_common(vd, clock, res);

lib/vdso/gettimeofday.c

476

return clock_getres_fallback(clock, res);

lib/vdso/gettimeofday.c

481

int __cvdso_clock_getres(clockid_t clock, struct __kernel_timespec *res)

lib/vdso/gettimeofday.c

483

return __cvdso_clock_getres_data(__arch_get_vdso_u_time_data(), clock, res);

lib/vdso/gettimeofday.c

488

__cvdso_clock_getres_time32_data(const struct vdso_time_data *vd, clockid_t clock,

lib/vdso/gettimeofday.c

494

ok = __cvdso_clock_getres_common(vd, clock, &ts);

lib/vdso/gettimeofday.c

497

return clock_getres32_fallback(clock, res);

lib/vdso/gettimeofday.c

507

__cvdso_clock_getres_time32(clockid_t clock, struct old_timespec32 *res)

lib/vdso/gettimeofday.c

510

clock, res);

lib/vdso/gettimeofday.c

75

static __always_inline bool vdso_clockid_valid(clockid_t clock)

lib/vdso/gettimeofday.c

78

return likely((u32) clock <= CLOCK_AUX_LAST);

lib/vsprintf.c

2583

return clock(buf, end, ptr, spec, fmt);

net/bluetooth/hci_event.c

1093

hdev->clock = le32_to_cpu(rp->clock);

net/bluetooth/hci_event.c

1099

conn->clock = le32_to_cpu(rp->clock);

net/bluetooth/mgmt.c

7544

rp.local_clock = cpu_to_le32(hdev->clock);

net/bluetooth/mgmt.c

7547

rp.piconet_clock = cpu_to_le32(conn->clock);

net/core/rtnetlink.c

1044

unsigned long clock;

net/core/rtnetlink.c

1046

clock = jiffies_to_clock_t(abs(expires));

net/core/rtnetlink.c

1047

clock = min_t(unsigned long, clock, INT_MAX);

net/core/rtnetlink.c

1048

ci.rta_expires = (expires > 0) ? clock : -clock;

sound/aoa/codecs/tas.c

681

static int tas_switch_clock(struct codec_info_item *cii, enum clock_switch clock)

sound/aoa/codecs/tas.c

685

switch(clock) {

sound/aoa/soundbus/soundbus.h

84

enum clock_switch clock);

sound/arm/aaci.c

816

ac97_bus->clock = 48000;

sound/drivers/vx/vx_uer.c

193

int clock;

sound/drivers/vx/vx_uer.c

196

clock = vx_calc_clock_from_freq(chip, freq);

sound/drivers/vx/vx_uer.c

198

"set internal clock to 0x%x from freq %d\n", clock, freq);

sound/drivers/vx/vx_uer.c

201

vx_outb(chip, HIFREQ, (clock >> 8) & 0x0f);

sound/drivers/vx/vx_uer.c

202

vx_outb(chip, LOFREQ, clock & 0xff);

sound/drivers/vx/vx_uer.c

204

vx_outl(chip, HIFREQ, (clock >> 8) & 0x0f);

sound/drivers/vx/vx_uer.c

205

vx_outl(chip, LOFREQ, clock & 0xff);

sound/firewire/bebob/bebob.c

341

.clock = NULL,

sound/firewire/bebob/bebob.h

73

const struct snd_bebob_clock_spec *clock;

sound/firewire/bebob/bebob_focusrite.c

188

if (bebob->spec->clock->types == saffirepro_10_clk_src_types)

sound/firewire/bebob/bebob_focusrite.c

276

.clock = &saffirepro_26_clk_spec,

sound/firewire/bebob/bebob_focusrite.c

287

.clock = &saffirepro_10_clk_spec,

sound/firewire/bebob/bebob_focusrite.c

308

.clock = &saffire_both_clk_spec,

sound/firewire/bebob/bebob_focusrite.c

319

.clock = &saffire_both_clk_spec,

sound/firewire/bebob/bebob_maudio.c

718

.clock = &special_clk_spec,

sound/firewire/bebob/bebob_maudio.c

734

.clock = NULL,

sound/firewire/bebob/bebob_maudio.c

746

.clock = NULL,

sound/firewire/bebob/bebob_maudio.c

758

.clock = NULL,

sound/firewire/bebob/bebob_maudio.c

770

.clock = NULL,

sound/firewire/bebob/bebob_maudio.c

782

.clock = NULL,

sound/firewire/bebob/bebob_proc.c

141

const struct snd_bebob_clock_spec *clk_spec = bebob->spec->clock;

sound/firewire/bebob/bebob_stream.c

122

const struct snd_bebob_clock_spec *clk_spec = bebob->spec->clock;

sound/firewire/bebob/bebob_stream.c

910

const struct snd_bebob_clock_spec *clk_spec = bebob->spec->clock;

sound/firewire/bebob/bebob_terratec.c

50

.clock = &phase88_rack_clk,

sound/firewire/bebob/bebob_yamaha_terratec.c

61

.clock = &clock_spec,

sound/firewire/digi00x/digi00x-pcm.c

104

enum snd_dg00x_clock clock;

sound/firewire/digi00x/digi00x-pcm.c

117

err = snd_dg00x_stream_get_clock(dg00x, &clock);

sound/firewire/digi00x/digi00x-pcm.c

120

if (clock != SND_DG00X_CLOCK_INTERNAL) {

sound/firewire/digi00x/digi00x-pcm.c

134

if ((clock != SND_DG00X_CLOCK_INTERNAL) ||

sound/firewire/digi00x/digi00x-proc.c

41

enum snd_dg00x_clock clock;

sound/firewire/digi00x/digi00x-proc.c

48

if (snd_dg00x_stream_get_clock(dg00x, &clock) < 0)

sound/firewire/digi00x/digi00x-proc.c

53

snd_iprintf(buf, "Clock Source: %s\n", source_name[clock]);

sound/firewire/digi00x/digi00x-proc.c

55

if (clock == SND_DG00X_CLOCK_INTERNAL)

sound/firewire/digi00x/digi00x-stream.c

70

enum snd_dg00x_clock *clock)

sound/firewire/digi00x/digi00x-stream.c

81

*clock = be32_to_cpu(reg) & 0x0f;

sound/firewire/digi00x/digi00x-stream.c

82

if (*clock >= SND_DG00X_CLOCK_COUNT)

sound/firewire/digi00x/digi00x.h

137

enum snd_dg00x_clock *clock);

sound/firewire/fireworks/fireworks_command.c

274

command_get_clock(struct snd_efw *efw, struct efc_clock *clock)

sound/firewire/fireworks/fireworks_command.c

281

(__be32 *)clock, sizeof(struct efc_clock));

sound/firewire/fireworks/fireworks_command.c

283

be32_to_cpus(&clock->source);

sound/firewire/fireworks/fireworks_command.c

284

be32_to_cpus(&clock->sampling_rate);

sound/firewire/fireworks/fireworks_command.c

285

be32_to_cpus(&clock->index);

sound/firewire/fireworks/fireworks_command.c

296

struct efc_clock clock = {0};

sound/firewire/fireworks/fireworks_command.c

306

err = command_get_clock(efw, &clock);

sound/firewire/fireworks/fireworks_command.c

311

if ((clock.source == source) && (clock.sampling_rate == rate))

sound/firewire/fireworks/fireworks_command.c

315

if ((source != UINT_MAX) && (clock.source != source))

sound/firewire/fireworks/fireworks_command.c

316

clock.source = source;

sound/firewire/fireworks/fireworks_command.c

317

if ((rate != UINT_MAX) && (clock.sampling_rate != rate))

sound/firewire/fireworks/fireworks_command.c

318

clock.sampling_rate = rate;

sound/firewire/fireworks/fireworks_command.c

319

clock.index = 0;

sound/firewire/fireworks/fireworks_command.c

321

cpu_to_be32s(&clock.source);

sound/firewire/fireworks/fireworks_command.c

322

cpu_to_be32s(&clock.sampling_rate);

sound/firewire/fireworks/fireworks_command.c

323

cpu_to_be32s(&clock.index);

sound/firewire/fireworks/fireworks_command.c

327

(__be32 *)&clock, sizeof(struct efc_clock),

sound/firewire/fireworks/fireworks_command.c

346

struct efc_clock clock = {0};

sound/firewire/fireworks/fireworks_command.c

348

err = command_get_clock(efw, &clock);

sound/firewire/fireworks/fireworks_command.c

350

*source = clock.source;

sound/firewire/fireworks/fireworks_command.c

358

struct efc_clock clock = {0};

sound/firewire/fireworks/fireworks_command.c

360

err = command_get_clock(efw, &clock);

sound/firewire/fireworks/fireworks_command.c

362

*rate = clock.sampling_rate;

sound/firewire/tascam/tascam-pcm.c

47

enum snd_tscm_clock clock;

sound/firewire/tascam/tascam-pcm.c

58

err = snd_tscm_stream_get_clock(tscm, &clock);

sound/firewire/tascam/tascam-pcm.c

66

if (clock != SND_TSCM_CLOCK_INTERNAL || tscm->substreams_counter > 0) {

sound/firewire/tascam/tascam-stream.c

125

int snd_tscm_stream_get_clock(struct snd_tscm *tscm, enum snd_tscm_clock *clock)

sound/firewire/tascam/tascam-stream.c

134

*clock = ((data & 0x00ff0000) >> 16) - 1;

sound/firewire/tascam/tascam-stream.c

135

if (*clock < 0 || *clock > SND_TSCM_CLOCK_ADAT)

sound/firewire/tascam/tascam-stream.c

45

enum snd_tscm_clock clock)

sound/firewire/tascam/tascam-stream.c

74

if (clock != INT_MAX) {

sound/firewire/tascam/tascam-stream.c

76

data |= clock + 1;

sound/firewire/tascam/tascam.h

166

enum snd_tscm_clock *clock);

sound/i2c/i2c.c

169

static void snd_i2c_bit_direction(struct snd_i2c_bus *bus, int clock, int data)

sound/i2c/i2c.c

172

bus->hw_ops.bit->direction(bus, clock, data);

sound/i2c/i2c.c

175

static void snd_i2c_bit_set(struct snd_i2c_bus *bus, int clock, int data)

sound/i2c/i2c.c

177

bus->hw_ops.bit->setlines(bus, clock, data);

sound/isa/gus/gus_pcm.c

511

static const struct snd_ratnum clock = {

sound/isa/gus/gus_pcm.c

520

.rats = &clock,

sound/isa/sb/sb8_main.c

35

static const struct snd_ratnum clock = {

sound/isa/sb/sb8_main.c

44

.rats = &clock,

sound/pci/ac97/ac97_codec.c

1732

tmp = ((unsigned int)rate * ac97->bus->clock) / 48000;

sound/pci/ac97/ac97_codec.c

1967

bus->clock = 48000;

sound/pci/ac97/ac97_pcm.c

284

tmp = (rate * ac97->bus->clock) / 48000;

sound/pci/atiixp.c

1384

static int snd_atiixp_mixer_new(struct atiixp *chip, int clock,

sound/pci/atiixp.c

1407

pbus->clock = clock;

sound/pci/atiixp_modem.c

1029

static int snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock)

sound/pci/atiixp_modem.c

1051

pbus->clock = clock;

sound/pci/echoaudio/darla24_dsp.c

102

clock = GD24_32000;

sound/pci/echoaudio/darla24_dsp.c

105

clock = GD24_22050;

sound/pci/echoaudio/darla24_dsp.c

108

clock = GD24_16000;

sound/pci/echoaudio/darla24_dsp.c

111

clock = GD24_11025;

sound/pci/echoaudio/darla24_dsp.c

114

clock = GD24_8000;

sound/pci/echoaudio/darla24_dsp.c

127

"set_sample_rate: %d clock %d\n", rate, clock);

sound/pci/echoaudio/darla24_dsp.c

132

clock = GD24_EXT_SYNC;

sound/pci/echoaudio/darla24_dsp.c

135

chip->comm_page->gd_clock_state = clock;

sound/pci/echoaudio/darla24_dsp.c

142

static int set_input_clock(struct echoaudio *chip, u16 clock)

sound/pci/echoaudio/darla24_dsp.c

144

if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&

sound/pci/echoaudio/darla24_dsp.c

145

clock != ECHO_CLOCK_ESYNC))

sound/pci/echoaudio/darla24_dsp.c

147

chip->input_clock = clock;

sound/pci/echoaudio/darla24_dsp.c

86

u8 clock;

sound/pci/echoaudio/darla24_dsp.c

90

clock = GD24_96000;

sound/pci/echoaudio/darla24_dsp.c

93

clock = GD24_88200;

sound/pci/echoaudio/darla24_dsp.c

96

clock = GD24_48000;

sound/pci/echoaudio/darla24_dsp.c

99

clock = GD24_44100;

sound/pci/echoaudio/echo3g_dsp.c

21

static int set_input_clock(struct echoaudio *chip, u16 clock);

sound/pci/echoaudio/echoaudio.c

1529

int i, clock;

sound/pci/echoaudio/echoaudio.c

1532

clock = chip->input_clock;

sound/pci/echoaudio/echoaudio.c

1535

if (clock == chip->clock_source_list[i])

sound/pci/echoaudio/echoaudio_3g.c

244

u32 control_reg, clock, base_rate, frq_reg;

sound/pci/echoaudio/echoaudio_3g.c

266

clock = E3G_96KHZ;

sound/pci/echoaudio/echoaudio_3g.c

269

clock = E3G_88KHZ;

sound/pci/echoaudio/echoaudio_3g.c

272

clock = E3G_48KHZ;

sound/pci/echoaudio/echoaudio_3g.c

275

clock = E3G_44KHZ;

sound/pci/echoaudio/echoaudio_3g.c

278

clock = E3G_32KHZ;

sound/pci/echoaudio/echoaudio_3g.c

281

clock = E3G_CONTINUOUS_CLOCK;

sound/pci/echoaudio/echoaudio_3g.c

283

clock |= E3G_DOUBLE_SPEED_MODE;

sound/pci/echoaudio/echoaudio_3g.c

287

control_reg |= clock;

sound/pci/echoaudio/echoaudio_3g.c

312

static int set_input_clock(struct echoaudio *chip, u16 clock)

sound/pci/echoaudio/echoaudio_3g.c

322

switch (clock) {

sound/pci/echoaudio/echoaudio_3g.c

350

"Input clock 0x%x not supported for Echo3G\n", clock);

sound/pci/echoaudio/echoaudio_3g.c

354

chip->input_clock = clock;

sound/pci/echoaudio/gina20_dsp.c

136

static int set_input_clock(struct echoaudio *chip, u16 clock)

sound/pci/echoaudio/gina20_dsp.c

139

switch (clock) {

sound/pci/echoaudio/gina20_dsp.c

145

chip->input_clock = clock;

sound/pci/echoaudio/gina20_dsp.c

153

chip->input_clock = clock;

sound/pci/echoaudio/gina24_dsp.c

151

u32 control_reg, clock;

sound/pci/echoaudio/gina24_dsp.c

167

clock = 0;

sound/pci/echoaudio/gina24_dsp.c

174

clock = GML_96KHZ;

sound/pci/echoaudio/gina24_dsp.c

177

clock = GML_88KHZ;

sound/pci/echoaudio/gina24_dsp.c

18

static int set_input_clock(struct echoaudio *chip, u16 clock);

sound/pci/echoaudio/gina24_dsp.c

180

clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;

sound/pci/echoaudio/gina24_dsp.c

183

clock = GML_44KHZ;

sound/pci/echoaudio/gina24_dsp.c

186

clock |= GML_SPDIF_SAMPLE_RATE0;

sound/pci/echoaudio/gina24_dsp.c

189

clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |

sound/pci/echoaudio/gina24_dsp.c

193

clock = GML_22KHZ;

sound/pci/echoaudio/gina24_dsp.c

196

clock = GML_16KHZ;

sound/pci/echoaudio/gina24_dsp.c

199

clock = GML_11KHZ;

sound/pci/echoaudio/gina24_dsp.c

202

clock = GML_8KHZ;

sound/pci/echoaudio/gina24_dsp.c

210

control_reg |= clock;

sound/pci/echoaudio/gina24_dsp.c

214

dev_dbg(chip->card->dev, "set_sample_rate: %d clock %d\n", rate, clock);

sound/pci/echoaudio/gina24_dsp.c

221

static int set_input_clock(struct echoaudio *chip, u16 clock)

sound/pci/echoaudio/gina24_dsp.c

231

switch (clock) {

sound/pci/echoaudio/gina24_dsp.c

259

"Input clock 0x%x not supported for Gina24\n", clock);

sound/pci/echoaudio/gina24_dsp.c

263

chip->input_clock = clock;

sound/pci/echoaudio/indigo_express_dsp.c

16

u32 clock, control_reg, old_control_reg;

sound/pci/echoaudio/indigo_express_dsp.c

26

clock = INDIGO_EXPRESS_32000;

sound/pci/echoaudio/indigo_express_dsp.c

29

clock = INDIGO_EXPRESS_44100;

sound/pci/echoaudio/indigo_express_dsp.c

32

clock = INDIGO_EXPRESS_48000;

sound/pci/echoaudio/indigo_express_dsp.c

35

clock = INDIGO_EXPRESS_32000|INDIGO_EXPRESS_DOUBLE_SPEED;

sound/pci/echoaudio/indigo_express_dsp.c

38

clock = INDIGO_EXPRESS_44100|INDIGO_EXPRESS_DOUBLE_SPEED;

sound/pci/echoaudio/indigo_express_dsp.c

41

clock = INDIGO_EXPRESS_48000|INDIGO_EXPRESS_DOUBLE_SPEED;

sound/pci/echoaudio/indigo_express_dsp.c

47

control_reg |= clock;

sound/pci/echoaudio/indigo_express_dsp.c

50

"set_sample_rate: %d clock %d\n", rate, clock);

sound/pci/echoaudio/layla20_dsp.c

175

u16 clock;

sound/pci/echoaudio/layla20_dsp.c

182

clock = LAYLA20_CLOCK_INTERNAL;

sound/pci/echoaudio/layla20_dsp.c

185

clock = LAYLA20_CLOCK_SPDIF;

sound/pci/echoaudio/layla20_dsp.c

188

clock = LAYLA20_CLOCK_WORD;

sound/pci/echoaudio/layla20_dsp.c

191

clock = LAYLA20_CLOCK_SUPER;

sound/pci/echoaudio/layla20_dsp.c

201

chip->comm_page->input_clock = cpu_to_le16(clock);

sound/pci/echoaudio/layla20_dsp.c

213

static int set_output_clock(struct echoaudio *chip, u16 clock)

sound/pci/echoaudio/layla20_dsp.c

215

switch (clock) {

sound/pci/echoaudio/layla20_dsp.c

217

clock = LAYLA20_OUTPUT_CLOCK_SUPER;

sound/pci/echoaudio/layla20_dsp.c

220

clock = LAYLA20_OUTPUT_CLOCK_WORD;

sound/pci/echoaudio/layla20_dsp.c

230

chip->comm_page->output_clock = cpu_to_le16(clock);

sound/pci/echoaudio/layla20_dsp.c

231

chip->output_clock = clock;

sound/pci/echoaudio/layla24_dsp.c

148

u32 control_reg, clock, base_rate;

sound/pci/echoaudio/layla24_dsp.c

168

clock = 0;

sound/pci/echoaudio/layla24_dsp.c

172

clock = GML_96KHZ;

sound/pci/echoaudio/layla24_dsp.c

175

clock = GML_88KHZ;

sound/pci/echoaudio/layla24_dsp.c

178

clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;

sound/pci/echoaudio/layla24_dsp.c

18

static int set_input_clock(struct echoaudio *chip, u16 clock);

sound/pci/echoaudio/layla24_dsp.c

181

clock = GML_44KHZ;

sound/pci/echoaudio/layla24_dsp.c

184

clock |= GML_SPDIF_SAMPLE_RATE0;

sound/pci/echoaudio/layla24_dsp.c

187

clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |

sound/pci/echoaudio/layla24_dsp.c

191

clock = GML_22KHZ;

sound/pci/echoaudio/layla24_dsp.c

194

clock = GML_16KHZ;

sound/pci/echoaudio/layla24_dsp.c

197

clock = GML_11KHZ;

sound/pci/echoaudio/layla24_dsp.c

200

clock = GML_8KHZ;

sound/pci/echoaudio/layla24_dsp.c

205

clock = LAYLA24_CONTINUOUS_CLOCK;

sound/pci/echoaudio/layla24_dsp.c

226

control_reg |= clock;

sound/pci/echoaudio/layla24_dsp.c

238

static int set_input_clock(struct echoaudio *chip, u16 clock)

sound/pci/echoaudio/layla24_dsp.c

248

switch (clock) {

sound/pci/echoaudio/layla24_dsp.c

274

"Input clock 0x%x not supported for Layla24\n", clock);

sound/pci/echoaudio/layla24_dsp.c

278

chip->input_clock = clock;

sound/pci/echoaudio/mia_dsp.c

141

static int set_input_clock(struct echoaudio *chip, u16 clock)

sound/pci/echoaudio/mia_dsp.c

143

dev_dbg(chip->card->dev, "set_input_clock(%d)\n", clock);

sound/pci/echoaudio/mia_dsp.c

144

if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&

sound/pci/echoaudio/mia_dsp.c

145

clock != ECHO_CLOCK_SPDIF))

sound/pci/echoaudio/mia_dsp.c

148

chip->input_clock = clock;

sound/pci/echoaudio/mia_dsp.c

17

static int set_input_clock(struct echoaudio *chip, u16 clock);

sound/pci/echoaudio/mona_dsp.c

18

static int set_input_clock(struct echoaudio *chip, u16 clock);

sound/pci/echoaudio/mona_dsp.c

185

u32 control_reg, clock;

sound/pci/echoaudio/mona_dsp.c

230

clock = 0;

sound/pci/echoaudio/mona_dsp.c

237

clock = GML_96KHZ;

sound/pci/echoaudio/mona_dsp.c

240

clock = GML_88KHZ;

sound/pci/echoaudio/mona_dsp.c

243

clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;

sound/pci/echoaudio/mona_dsp.c

246

clock = GML_44KHZ;

sound/pci/echoaudio/mona_dsp.c

249

clock |= GML_SPDIF_SAMPLE_RATE0;

sound/pci/echoaudio/mona_dsp.c

252

clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |

sound/pci/echoaudio/mona_dsp.c

256

clock = GML_22KHZ;

sound/pci/echoaudio/mona_dsp.c

259

clock = GML_16KHZ;

sound/pci/echoaudio/mona_dsp.c

262

clock = GML_11KHZ;

sound/pci/echoaudio/mona_dsp.c

265

clock = GML_8KHZ;

sound/pci/echoaudio/mona_dsp.c

273

control_reg |= clock;

sound/pci/echoaudio/mona_dsp.c

278

"set_sample_rate: %d clock %d\n", rate, clock);

sound/pci/echoaudio/mona_dsp.c

285

static int set_input_clock(struct echoaudio *chip, u16 clock)

sound/pci/echoaudio/mona_dsp.c

295

switch (clock) {

sound/pci/echoaudio/mona_dsp.c

336

"Input clock 0x%x not supported for Mona\n", clock);

sound/pci/echoaudio/mona_dsp.c

340

chip->input_clock = clock;

sound/pci/emu10k1/io.c

367

int clock;

sound/pci/emu10k1/io.c

372

clock = 44100;

sound/pci/emu10k1/io.c

376

clock = 48000;

sound/pci/emu10k1/io.c

380

clock = snd_emu1010_get_raw_rate(

sound/pci/emu10k1/io.c

386

if (clock < 46000) {

sound/pci/emu10k1/io.c

387

clock = 44100;

sound/pci/emu10k1/io.c

390

clock = 48000;

sound/pci/emu10k1/io.c

395

emu->emu1010.word_clock = clock;

sound/pci/es1968.c

121

static int clock[SNDRV_CARDS];

sound/pci/es1968.c

141

module_param_array(clock, int, NULL, 0444);

sound/pci/es1968.c

142

MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard. (0 = auto-detect)");

sound/pci/es1968.c

1645

if (chip->clock == 0)

sound/pci/es1968.c

1646

chip->clock = 48000; /* default clock value */

sound/pci/es1968.c

1658

chip->clock);

sound/pci/es1968.c

1688

snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */

sound/pci/es1968.c

1721

chip->clock = (chip->clock * offset) / 48000;

sound/pci/es1968.c

1723

dev_info(chip->card->dev, "clocking to %d\n", chip->clock);

sound/pci/es1968.c

2774

chip->clock = clock[dev];

sound/pci/es1968.c

2775

if (! chip->clock)

sound/pci/es1968.c

485

unsigned int clock; /* clock */

sound/pci/es1968.c

857

u32 rate = (freq << 16) / chip->clock;

sound/pci/ice1712/ews.c

102

static void ewx_i2c_direction(struct snd_i2c_bus *bus, int clock, int data)

sound/pci/ice1712/ews.c

107

if (clock)

sound/pci/ice1712/revo.c

93

static void revo_i2c_direction(struct snd_i2c_bus *bus, int clock, int data)

sound/pci/ice1712/revo.c

99

if (clock)

sound/pci/intel8x0.c

2194

pbus->clock = ac97_clock;

sound/pci/intel8x0.c

2636

if (chip->ac97_bus->clock != 48000)

sound/pci/intel8x0.c

2656

chip->ac97_bus->clock);

sound/pci/intel8x0.c

2737

chip->ac97_bus->clock = 41000;

sound/pci/intel8x0.c

2740

chip->ac97_bus->clock = 44100;

sound/pci/intel8x0.c

2743

chip->ac97_bus->clock = (chip->ac97_bus->clock * 48000) / pos;

sound/pci/intel8x0.c

2745

dev_info(chip->card->dev, "clocking to %d\n", chip->ac97_bus->clock);

sound/pci/intel8x0.c

2769

chip->ac97_bus->clock = wl->value;

sound/pci/intel8x0m.c

802

pbus->clock = ac97_clock;

sound/pci/lola/lola.c

419

lola_set_clock_index(chip, chip->clock.cur_index);

sound/pci/lola/lola.h

347

struct lola_clock_widget clock;

sound/pci/lola/lola_clock.c

127

chip->clock.nid = nid;

sound/pci/lola/lola_clock.c

128

chip->clock.items = val & 0xff;

sound/pci/lola/lola_clock.c

130

chip->clock.items);

sound/pci/lola/lola_clock.c

131

if (chip->clock.items > MAX_SAMPLE_CLOCK_COUNT) {

sound/pci/lola/lola_clock.c

133

chip->clock.items);

sound/pci/lola/lola_clock.c

137

nitems = chip->clock.items;

sound/pci/lola/lola_clock.c

167

chip->clock.cur_index = idx_list;

sound/pci/lola/lola_clock.c

168

chip->clock.cur_freq = 48000;

sound/pci/lola/lola_clock.c

169

chip->clock.cur_valid = true;

sound/pci/lola/lola_clock.c

183

sc = &chip->clock.sample_clock[idx_list];

sound/pci/lola/lola_clock.c

188

chip->clock.idx_lookup[idx_list] = idx;

sound/pci/lola/lola_clock.c

191

chip->clock.items--;

sound/pci/lola/lola_clock.c

206

err = lola_codec_read(chip, chip->clock.nid,

sound/pci/lola/lola_clock.c

225

err = lola_codec_read(chip, chip->clock.nid,

sound/pci/lola/lola_clock.c

227

chip->clock.idx_lookup[idx],

sound/pci/lola/lola_clock.c

252

if (chip->clock.sample_clock[chip->clock.cur_index].type !=

sound/pci/lola/lola_clock.c

254

chip->clock.cur_freq = lola_sample_rate_convert(val & 0x7f);

sound/pci/lola/lola_clock.c

255

chip->clock.cur_valid = (val & 0x100) != 0;

sound/pci/lola/lola_clock.c

265

if (idx == chip->clock.cur_index) {

sound/pci/lola/lola_clock.c

267

freq = chip->clock.cur_freq;

sound/pci/lola/lola_clock.c

268

valid = chip->clock.cur_valid;

sound/pci/lola/lola_clock.c

269

} else if (chip->clock.sample_clock[idx].type ==

sound/pci/lola/lola_clock.c

272

freq = chip->clock.sample_clock[idx].freq;

sound/pci/lola/lola_clock.c

282

if (idx != chip->clock.cur_index) {

sound/pci/lola/lola_clock.c

287

chip->clock.cur_index = idx;

sound/pci/lola/lola_clock.c

288

chip->clock.cur_freq = freq;

sound/pci/lola/lola_clock.c

289

chip->clock.cur_valid = true;

sound/pci/lola/lola_clock.c

298

if (chip->clock.cur_freq == rate && chip->clock.cur_valid)

sound/pci/lola/lola_clock.c

301

for (i = 0; i < chip->clock.items; i++) {

sound/pci/lola/lola_clock.c

302

if (chip->clock.sample_clock[i].type == LOLA_CLOCK_TYPE_INTERNAL &&

sound/pci/lola/lola_clock.c

303

chip->clock.sample_clock[i].freq == rate)

sound/pci/lola/lola_clock.c

306

if (i >= chip->clock.items)

sound/pci/lola/lola_clock.c

89

chip->clock.cur_freq))

sound/pci/mixart/mixart_core.h

102

u32 clock;

sound/pci/sonicvibes.c

514

unsigned char clock;

sound/pci/sonicvibes.c

520

clock = 0x10;

sound/pci/sonicvibes.c

522

clock = 0x00;

sound/pci/sonicvibes.c

527

snd_sonicvibes_out1(sonic, SV_IREG_ADC_CLOCK, clock);

sound/pci/via82xx.c

1878

chip->ac97_bus->clock = chip->ac97_clock;

sound/pci/via82xx_modem.c

884

chip->ac97_bus->clock = chip->ac97_clock;

sound/soc/codecs/max98925.c

258

int rate, int clock, int *value, int *n, int *m)

sound/soc/codecs/max98925.c

266

*n = rate_table[i].divisors[clock][0];

sound/soc/codecs/max98925.c

267

*m = rate_table[i].divisors[clock][1];

sound/soc/codecs/max98925.c

349

unsigned int dai_sr = 0, clock, mdll, n, m;

sound/soc/codecs/max98925.c

377

clock = 0;

sound/soc/codecs/max98925.c

381

clock = 1;

sound/soc/codecs/max98925.c

385

clock = 0;

sound/soc/codecs/max98925.c

389

clock = 2;

sound/soc/codecs/max98925.c

398

if (max98925_rate_value(component, rate, clock, &dai_sr, &n, &m))

sound/soc/codecs/wm8753.c

1192

u16 clock;

sound/soc/codecs/wm8753.c

1195

clock = snd_soc_component_read(component, WM8753_CLOCK) & 0xfffb;

sound/soc/codecs/wm8753.c

1196

snd_soc_component_write(component, WM8753_CLOCK, clock);

sound/soc/codecs/wm8753.c

1210

u16 clock;

sound/soc/codecs/wm8753.c

1213

clock = snd_soc_component_read(component, WM8753_CLOCK) & 0xfffb;

sound/soc/codecs/wm8753.c

1214

snd_soc_component_write(component, WM8753_CLOCK, clock);

sound/soc/codecs/wm8753.c

1222

u16 clock;

sound/soc/codecs/wm8753.c

1225

clock = snd_soc_component_read(component, WM8753_CLOCK) & 0xfffb;

sound/soc/codecs/wm8753.c

1226

snd_soc_component_write(component, WM8753_CLOCK, clock | 0x4);

sound/soc/generic/test-component.c

100

if (clock == SND_SOC_DAIFMT_CONT)

sound/soc/generic/test-component.c

67

unsigned int clock = fmt & SND_SOC_DAIFMT_CLOCK_MASK;

sound/soc/renesas/fsi.c

254

struct fsi_clk clock;

sound/soc/renesas/fsi.c

720

struct fsi_clk *clock = &fsi->clock;

sound/soc/renesas/fsi.c

723

clock->xck = NULL;

sound/soc/renesas/fsi.c

724

clock->ick = NULL;

sound/soc/renesas/fsi.c

725

clock->div = NULL;

sound/soc/renesas/fsi.c

726

clock->rate = 0;

sound/soc/renesas/fsi.c

727

clock->count = 0;

sound/soc/renesas/fsi.c

728

clock->set_rate = set_rate;

sound/soc/renesas/fsi.c

730

clock->own = devm_clk_get(dev, NULL);

sound/soc/renesas/fsi.c

731

if (IS_ERR(clock->own))

sound/soc/renesas/fsi.c

736

clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");

sound/soc/renesas/fsi.c

737

if (IS_ERR(clock->xck)) {

sound/soc/renesas/fsi.c

741

if (clock->xck == clock->own) {

sound/soc/renesas/fsi.c

749

clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb");

sound/soc/renesas/fsi.c

750

if (IS_ERR(clock->ick)) {

sound/soc/renesas/fsi.c

754

if (clock->ick == clock->own) {

sound/soc/renesas/fsi.c

762

clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb");

sound/soc/renesas/fsi.c

763

if (IS_ERR(clock->div)) {

sound/soc/renesas/fsi.c

767

if (clock->div == clock->own) {

sound/soc/renesas/fsi.c

779

fsi->clock.rate = rate;

sound/soc/renesas/fsi.c

784

return fsi->clock.set_rate &&

sound/soc/renesas/fsi.c

785

fsi->clock.rate;

sound/soc/renesas/fsi.c

791

struct fsi_clk *clock = &fsi->clock;

sound/soc/renesas/fsi.c

797

if (0 == clock->count) {

sound/soc/renesas/fsi.c

798

ret = clock->set_rate(dev, fsi);

sound/soc/renesas/fsi.c

804

ret = clk_enable(clock->xck);

sound/soc/renesas/fsi.c

807

ret = clk_enable(clock->ick);

sound/soc/renesas/fsi.c

810

ret = clk_enable(clock->div);

sound/soc/renesas/fsi.c

814

clock->count++;

sound/soc/renesas/fsi.c

820

clk_disable(clock->ick);

sound/soc/renesas/fsi.c

822

clk_disable(clock->xck);

sound/soc/renesas/fsi.c

830

struct fsi_clk *clock = &fsi->clock;

sound/soc/renesas/fsi.c

835

if (1 == clock->count--) {

sound/soc/renesas/fsi.c

836

clk_disable(clock->xck);

sound/soc/renesas/fsi.c

837

clk_disable(clock->ick);

sound/soc/renesas/fsi.c

838

clk_disable(clock->div);

sound/soc/renesas/fsi.c

914

struct clk *xck = fsi->clock.xck;

sound/soc/renesas/fsi.c

915

struct clk *ick = fsi->clock.ick;

sound/soc/renesas/fsi.c

916

unsigned long rate = fsi->clock.rate;

sound/soc/renesas/fsi.c

946

struct clk *ick = fsi->clock.ick;

sound/soc/renesas/fsi.c

947

struct clk *div = fsi->clock.div;

sound/soc/renesas/fsi.c

948

unsigned long rate = fsi->clock.rate;

sound/soc/sdca/sdca_asoc.c

1118

if (entity->iot.clock) {

sound/soc/sdca/sdca_asoc.c

1119

range = sdca_selector_find_range(dev, entity->iot.clock,

sound/soc/sdca/sdca_asoc.c

1630

if (entity->iot.clock) {

sound/soc/sdca/sdca_asoc.c

1631

ret = set_clock(dev, regmap, function, entity->iot.clock, rate);

sound/soc/sdca/sdca_asoc.c

286

if (entity->iot.clock)

sound/soc/sdca/sdca_asoc.c

287

add_route(route, entity->label, NULL, entity->iot.clock->label);

sound/soc/sdca/sdca_asoc.c

318

if (entity->iot.clock)

sound/soc/sdca/sdca_asoc.c

319

add_route(route, entity->label, NULL, entity->iot.clock->label);

sound/soc/sdca/sdca_asoc.c

91

*num_routes += !!entity->iot.clock;

sound/soc/sdca/sdca_functions.c

1190

struct sdca_entity_cs *clock = &entity->cs;

sound/soc/sdca/sdca_functions.c

1200

clock->type = tmp;

sound/soc/sdca/sdca_functions.c

1205

clock->max_delay = tmp;

sound/soc/sdca/sdca_functions.c

1208

clock->type, clock->max_delay);

sound/soc/sdca/sdca_functions.c

1672

terminal->clock = clock_entity;

sound/usb/card.h

39

unsigned char clock; /* associated clock */

sound/usb/clock.c

204

(fmt->clock & 0xff) == cs_desc->v2.bClockID &&

sound/usb/clock.c

457

return __uac_clock_find_source(chip, fmt, fmt->clock, visited,

sound/usb/clock.c

523

int altsetting, int clock)

sound/usb/clock.c

534

snd_usb_ctrl_intf(ctrl_intf) | (clock << 8),

sound/usb/clock.c

556

int clock, int rate)

sound/usb/clock.c

566

cs_desc = snd_usb_find_clock_source(chip, clock, fmt);

sound/usb/clock.c

585

snd_usb_ctrl_intf(ctrl_intf) | (clock << 8),

sound/usb/clock.c

590

return get_sample_rate_v2v3(chip, fmt->iface, fmt->altsetting, clock);

sound/usb/clock.c

597

int clock;

sound/usb/clock.c

603

clock = snd_usb_clock_find_source(chip, fmt, true);

sound/usb/clock.c

604

if (clock < 0) {

sound/usb/clock.c

611

clock = snd_usb_clock_find_source(chip, fmt, false);

sound/usb/clock.c

617

if (clock < 0)

sound/usb/clock.c

618

return clock;

sound/usb/clock.c

621

prev_rate = get_sample_rate_v2v3(chip, fmt->iface, fmt->altsetting, clock);

sound/usb/clock.c

625

cur_rate = snd_usb_set_sample_rate_v2v3(chip, fmt, clock, rate);

sound/usb/clock.c

656

if (!uac_clock_source_is_valid(chip, fmt, clock))

sound/usb/clock.c

665

fmt->iface, fmt->altsetting, rate, fmt->clock);

sound/usb/clock.h

13

int clock, int rate);

sound/usb/endpoint.c

1319

struct snd_usb_clock_ref *clock = ep->clock_ref;

sound/usb/endpoint.c

1322

if (!clock || clock->rate == rate)

sound/usb/endpoint.c

1324

if (clock->rate) {

sound/usb/endpoint.c

1325

if (atomic_read(&clock->locked))

sound/usb/endpoint.c

1326

return clock->rate;

sound/usb/endpoint.c

1327

if (clock->rate != rate) {

sound/usb/endpoint.c

1329

clock->rate, rate, ep->ep_num);

sound/usb/endpoint.c

1330

return clock->rate;

sound/usb/endpoint.c

1333

clock->rate = rate;

sound/usb/endpoint.c

1334

clock->need_setup = true;

sound/usb/endpoint.c

1423

struct snd_usb_clock_ref *clock = ep->clock_ref;

sound/usb/endpoint.c

1429

if (clock && !clock->need_setup)

sound/usb/endpoint.c

1435

if (clock)

sound/usb/endpoint.c

1436

clock->rate = 0; /* reset rate */

sound/usb/endpoint.c

1441

if (clock)

sound/usb/endpoint.c

1442

clock->need_setup = false;

sound/usb/endpoint.c

1526

int snd_usb_endpoint_get_clock_rate(struct snd_usb_audio *chip, int clock)

sound/usb/endpoint.c

1531

if (!clock)

sound/usb/endpoint.c

1535

if (ref->clock == clock) {

sound/usb/endpoint.c

41

unsigned char clock;

sound/usb/endpoint.c

635

clock_ref_find(struct snd_usb_audio *chip, int clock)

sound/usb/endpoint.c

640

if (ref->clock == clock)

sound/usb/endpoint.c

646

ref->clock = clock;

sound/usb/endpoint.c

826

ep->clock_ref = clock_ref_find(chip, fp->clock);

sound/usb/endpoint.h

25

int snd_usb_endpoint_get_clock_rate(struct snd_usb_audio *chip, int clock);

sound/usb/format.c

543

int clock)

sound/usb/format.c

586

err = snd_usb_set_sample_rate_v2v3(chip, fp, clock,

sound/usb/format.c

623

int clock = snd_usb_clock_find_source(chip, fp, false);

sound/usb/format.c

627

if (clock < 0) {

sound/usb/format.c

630

__func__, clock);

sound/usb/format.c

638

snd_usb_ctrl_intf(ctrl_intf) | (clock << 8),

sound/usb/format.c

648

__func__, clock);

sound/usb/format.c

654

__func__, clock);

sound/usb/format.c

673

snd_usb_ctrl_intf(ctrl_intf) | (clock << 8),

sound/usb/format.c

679

__func__, clock);

sound/usb/format.c

707

ret = validate_sample_rate_table_v2v3(chip, fp, clock);

sound/usb/pcm.c

884

r = snd_usb_endpoint_get_clock_rate(chip, fp->clock);

sound/usb/quirks-table.h

1599

.clock = 0x80,

sound/usb/quirks-table.h

1623

.clock = 0x80,

sound/usb/quirks-table.h

1659

.clock = 0x80,

sound/usb/quirks-table.h

1683

.clock = 0x80,

sound/usb/quirks-table.h

3571

.clock = 0x29

sound/usb/quirks-table.h

3592

.clock = 0x29

sound/usb/quirks-table.h

3626

.clock = 0x29

sound/usb/quirks-table.h

3647

.clock = 0x29

sound/usb/quirks-table.h

3682

.clock = 0x29

sound/usb/quirks-table.h

3704

.clock = 0x29

sound/usb/stream.c

1043

clock = input_term->bCSourceID;

sound/usb/stream.c

1051

clock = output_term->bCSourceID;

sound/usb/stream.c

1062

altset_idx, altno, num_channels, clock);

sound/usb/stream.c

691

int altno, int num_channels, int clock)

sound/usb/stream.c

709

fp->clock = clock;

sound/usb/stream.c

726

int clock = 0;

sound/usb/stream.c

794

clock = input_term->bCSourceID;

sound/usb/stream.c

804

clock = output_term->bCSourceID;

sound/usb/stream.c

845

altset_idx, altno, num_channels, clock);

sound/usb/stream.c

892

int clock = 0;

sound/usb/stream.c

942

clock = UAC3_BADD_CS_ID9;

tools/include/asm/timex.h

11

return clock();

tools/include/uapi/linux/kvm.h

1083

__u64 clock;

tools/perf/builtin-record.c

2270

env->clock.clockid_res_ns = rec->opts.clockid_res_ns;

tools/perf/builtin-record.c

2272

env->clock.clockid = rec->opts.clockid;

tools/perf/builtin-record.c

2287

env->clock.tod_ns = ref;

tools/perf/builtin-record.c

2292

env->clock.clockid_ns = ref;

tools/perf/builtin-script.c

709

if (tod && !perf_session__env(session)->clock.enabled) {

tools/perf/builtin-script.c

758

if (!env->clock.enabled) {

tools/perf/builtin-script.c

763

clockid_ns = env->clock.clockid_ns;

tools/perf/builtin-script.c

764

tod_ns = env->clock.tod_ns;

tools/perf/util/data-convert-bt.c

1458

struct bt_ctf_clock *clock = cw->clock;

tools/perf/util/data-convert-bt.c

1465

if (!env->clock.enabled) {

tools/perf/util/data-convert-bt.c

1471

desc = clockid_name(env->clock.clockid);

tools/perf/util/data-convert-bt.c

1472

offset = env->clock.tod_ns - env->clock.clockid_ns;

tools/perf/util/data-convert-bt.c

1477

if (bt_ctf_clock_set_##__n(clock, __v)) \

tools/perf/util/data-convert-bt.c

1560

bt_ctf_clock_put(cw->clock);

tools/perf/util/data-convert-bt.c

1574

struct bt_ctf_clock *clock;

tools/perf/util/data-convert-bt.c

1586

clock = bt_ctf_clock_create("perf_clock");

tools/perf/util/data-convert-bt.c

1587

if (!clock) {

tools/perf/util/data-convert-bt.c

1592

cw->clock = clock;

tools/perf/util/data-convert-bt.c

1609

if (bt_ctf_stream_class_set_clock(stream_class, clock)) {

tools/perf/util/data-convert-bt.c

1628

if (bt_ctf_writer_add_clock(writer, clock)) {

tools/perf/util/data-convert-bt.c

70

struct bt_ctf_clock *clock;

tools/perf/util/data-convert-bt.c

840

bt_ctf_clock_set_time(cw->clock, sample->time);

tools/perf/util/data-convert-bt.c

907

bt_ctf_clock_set_time(cw->clock, sample->time); \

tools/perf/util/data-convert-json.c

310

if (env->clock.enabled) {

tools/perf/util/data-convert-json.c

312

"%u", env->clock.clockid);

tools/perf/util/data-convert-json.c

314

"%" PRIu64, env->clock.clockid_ns);

tools/perf/util/data-convert-json.c

316

"%" PRIu64, env->clock.tod_ns);

tools/perf/util/env.h

159

} clock;

tools/perf/util/header.c

1914

ff->ph->env.clock.clockid_res_ns * 1000);

tools/perf/util/header.c

1926

if (!ff->ph->env.clock.enabled) {

tools/perf/util/header.c

1932

ref = ff->ph->env.clock.tod_ns;

tools/perf/util/header.c

1938

ref = ff->ph->env.clock.clockid_ns;

tools/perf/util/header.c

1943

clockid = ff->ph->env.clock.clockid;

tools/perf/util/header.c

3236

if (do_read_u64(ff, &env->clock.clockid_res_ns))

tools/perf/util/header.c

3260

env->clock.clockid = data32;

tools/perf/util/header.c

3266

env->clock.tod_ns = data64;

tools/perf/util/header.c

3272

env->clock.clockid_ns = data64;

tools/perf/util/header.c

3273

env->clock.enabled = true;

tools/perf/util/header.c

942

return do_write(ff, &ff->ph->env.clock.clockid_res_ns,

tools/perf/util/header.c

943

sizeof(ff->ph->env.clock.clockid_res_ns));

tools/perf/util/header.c

961

data32 = ff->ph->env.clock.clockid;

tools/perf/util/header.c

968

data64 = &ff->ph->env.clock.tod_ns;

tools/perf/util/header.c

975

data64 = &ff->ph->env.clock.clockid_ns;

tools/testing/selftests/damon/access_memory.c

46

start_clock = clock();

tools/testing/selftests/damon/access_memory.c

47

while ((clock() - start_clock) * 1000 / CLOCKS_PER_SEC

tools/testing/selftests/kvm/x86/hyperv_clock.c

255

struct kvm_clock_data clock = {0};

tools/testing/selftests/kvm/x86/hyperv_clock.c

257

vm_ioctl(vm, KVM_SET_CLOCK, &clock);

tools/testing/selftests/kvm/x86/kvm_clock_test.c

58

exp_lo = start->clock;

tools/testing/selftests/kvm/x86/kvm_clock_test.c

59

exp_hi = end->clock;

tools/testing/selftests/kvm/x86/kvm_clock_test.c

83

data.clock = test_case->kvmclock_base;

tools/testing/selftests/kvm/x86/xen_shinfo_test.c

1012

kcdata.clock / NSEC_PER_SEC, kcdata.clock % NSEC_PER_SEC);

tools/testing/selftests/kvm/x86/xen_shinfo_test.c

1017

delta = (wc->sec * NSEC_PER_SEC + wc->nsec) - (kcdata.realtime - kcdata.clock);

tools/testing/selftests/kvm/x86/xen_shinfo_test.c

1027

wc->sec, wc->nsec, (kcdata.realtime - kcdata.clock) / NSEC_PER_SEC,

tools/testing/selftests/kvm/x86/xen_shinfo_test.c

1028

(kcdata.realtime - kcdata.clock) % NSEC_PER_SEC);

tools/testing/selftests/mqueue/mq_perf_tests.c

352

clock_gettime(clock, &start); \

tools/testing/selftests/mqueue/mq_perf_tests.c

355

clock_gettime(clock, &middle); \

tools/testing/selftests/mqueue/mq_perf_tests.c

358

clock_gettime(clock, &end); \

tools/testing/selftests/mqueue/mq_perf_tests.c

432

clockid_t clock;

tools/testing/selftests/mqueue/mq_perf_tests.c

444

if (pthread_getcpuclockid(cpu_threads[0], &clock) != 0)

tools/testing/selftests/mqueue/mq_perf_tests.c

447

if (clock_getres(clock, &res))

tools/testing/selftests/mqueue/mq_perf_tests.c

487

clock_gettime(clock, &start);

tools/testing/selftests/mqueue/mq_perf_tests.c

492

clock_gettime(clock, &end);

tools/testing/selftests/mqueue/mq_perf_tests.c

516

clock_gettime(clock, &start);

tools/testing/selftests/mqueue/mq_perf_tests.c

518

clock_gettime(clock, &end);

tools/testing/selftests/net/bind_bhash.c

122

begin = clock();

tools/testing/selftests/net/bind_bhash.c

129

end = clock();

tools/testing/selftests/net/so_txtime.c

63

static uint64_t gettime_ns(clockid_t clock)

tools/testing/selftests/net/so_txtime.c

67

if (clock_gettime(clock, &ts))

tools/testing/selftests/seccomp/seccomp_bpf.c

735

clock_t clock = times(&timebuf);

tools/testing/selftests/seccomp/seccomp_bpf.c

744

EXPECT_LE(clock, syscall(__NR_times, &timebuf));

tools/testing/selftests/timens/timens.c

36

#define ct(clock, off_id) { clock, #clock, off_id }

tools/testing/selftests/vDSO/vdso_test_correctness.c

264

static void test_one_clock_gettime(int clock, const char *name)

tools/testing/selftests/vDSO/vdso_test_correctness.c

269

printf("[RUN]\tTesting clock_gettime for clock %s (%d)...\n", name, clock);

tools/testing/selftests/vDSO/vdso_test_correctness.c

271

if (sys_clock_gettime(clock, &start) < 0) {

tools/testing/selftests/vDSO/vdso_test_correctness.c

273

vdso_ret = VDSO_CALL(vdso_clock_gettime, 2, clock, &vdso);

tools/testing/selftests/vDSO/vdso_test_correctness.c

281

printf("[WARN]\t clock_gettime(%d) syscall returned error %d\n", clock, errno);

tools/testing/selftests/vDSO/vdso_test_correctness.c

286

vdso_ret = VDSO_CALL(vdso_clock_gettime, 2, clock, &vdso);

tools/testing/selftests/vDSO/vdso_test_correctness.c

287

end_ret = sys_clock_gettime(clock, &end);

tools/testing/selftests/vDSO/vdso_test_correctness.c

317

for (int clock = 0; clock < ARRAY_SIZE(clocknames); clock++)

tools/testing/selftests/vDSO/vdso_test_correctness.c

318

test_one_clock_gettime(clock, clocknames[clock]);

tools/testing/selftests/vDSO/vdso_test_correctness.c

326

static void test_one_clock_gettime64(int clock, const char *name)

tools/testing/selftests/vDSO/vdso_test_correctness.c

331

printf("[RUN]\tTesting clock_gettime64 for clock %s (%d)...\n", name, clock);

tools/testing/selftests/vDSO/vdso_test_correctness.c

333

if (sys_clock_gettime64(clock, &start) < 0) {

tools/testing/selftests/vDSO/vdso_test_correctness.c

335

vdso_ret = VDSO_CALL(vdso_clock_gettime64, 2, clock, &vdso);

tools/testing/selftests/vDSO/vdso_test_correctness.c

343

printf("[WARN]\t clock_gettime64(%d) syscall returned error %d\n", clock, errno);

tools/testing/selftests/vDSO/vdso_test_correctness.c

348

vdso_ret = VDSO_CALL(vdso_clock_gettime64, 2, clock, &vdso);

tools/testing/selftests/vDSO/vdso_test_correctness.c

349

end_ret = sys_clock_gettime64(clock, &end);

tools/testing/selftests/vDSO/vdso_test_correctness.c

379

for (int clock = 0; clock < ARRAY_SIZE(clocknames); clock++)

tools/testing/selftests/vDSO/vdso_test_correctness.c

380

test_one_clock_gettime64(clock, clocknames[clock]);