arch/riscv/include/asm/insn.h

264

__RISCV_INSN_FUNCS(fence, RVG_MASK_FENCE, RVG_MATCH_FENCE);

arch/riscv/kernel/probes/decode-insn.c

25

RISCV_INSN_REJECTED(fence, insn);

drivers/accel/amdxdna/aie2_ctx.c

101

out_fence = dma_fence_get(dma_fence_chain_contained(fence));

drivers/accel/amdxdna/aie2_ctx.c

104

dma_fence_put(fence);

drivers/accel/amdxdna/aie2_ctx.c

110

struct dma_fence *fence;

drivers/accel/amdxdna/aie2_ctx.c

112

fence = aie2_cmd_get_out_fence(hwctx, hwctx->priv->seq - 1);

drivers/accel/amdxdna/aie2_ctx.c

113

if (!fence)

drivers/accel/amdxdna/aie2_ctx.c

117

dma_fence_wait_timeout(fence, false, msecs_to_jiffies(2000));

drivers/accel/amdxdna/aie2_ctx.c

118

dma_fence_put(fence);

drivers/accel/amdxdna/aie2_ctx.c

164

struct dma_fence *fence = job->fence;

drivers/accel/amdxdna/aie2_ctx.c

169

dma_fence_signal(fence);

drivers/accel/amdxdna/aie2_ctx.c

289

struct dma_fence *fence;

drivers/accel/amdxdna/aie2_ctx.c

299

fence = dma_fence_get(job->fence);

drivers/accel/amdxdna/aie2_ctx.c

327

dma_fence_put(job->fence);

drivers/accel/amdxdna/aie2_ctx.c

330

fence = ERR_PTR(ret);

drivers/accel/amdxdna/aie2_ctx.c

334

return fence;

drivers/accel/amdxdna/aie2_ctx.c

90

struct dma_fence *fence, *out_fence = NULL;

drivers/accel/amdxdna/aie2_ctx.c

93

fence = drm_syncobj_fence_get(hwctx->priv->syncobj);

drivers/accel/amdxdna/aie2_ctx.c

94

if (!fence)

drivers/accel/amdxdna/aie2_ctx.c

97

ret = dma_fence_chain_find_seqno(&fence, seq);

drivers/accel/amdxdna/amdxdna_ctx.c

31

static const char *amdxdna_fence_get_driver_name(struct dma_fence *fence)

drivers/accel/amdxdna/amdxdna_ctx.c

36

static const char *amdxdna_fence_get_timeline_name(struct dma_fence *fence)

drivers/accel/amdxdna/amdxdna_ctx.c

40

xdna_fence = container_of(fence, struct amdxdna_fence, base);

drivers/accel/amdxdna/amdxdna_ctx.c

452

dma_fence_put(job->fence);

drivers/accel/amdxdna/amdxdna_ctx.c

506

job->fence = amdxdna_fence_create(hwctx);

drivers/accel/amdxdna/amdxdna_ctx.c

507

if (!job->fence) {

drivers/accel/amdxdna/amdxdna_ctx.c

52

struct amdxdna_fence *fence;

drivers/accel/amdxdna/amdxdna_ctx.c

530

dma_fence_put(job->fence);

drivers/accel/amdxdna/amdxdna_ctx.c

54

fence = kzalloc_obj(*fence);

drivers/accel/amdxdna/amdxdna_ctx.c

55

if (!fence)

drivers/accel/amdxdna/amdxdna_ctx.c

58

fence->hwctx = hwctx;

drivers/accel/amdxdna/amdxdna_ctx.c

59

spin_lock_init(&fence->lock);

drivers/accel/amdxdna/amdxdna_ctx.c

60

dma_fence_init(&fence->base, &fence_ops, &fence->lock, hwctx->id, 0);

drivers/accel/amdxdna/amdxdna_ctx.c

61

return &fence->base;

drivers/accel/amdxdna/amdxdna_ctx.h

131

struct dma_fence *fence;

drivers/accel/ethosu/ethosu_job.c

108

struct dma_fence *fence = job->inference_done_fence;

drivers/accel/ethosu/ethosu_job.c

114

dma_resv_add_fence(bos[i]->resv, fence, DMA_RESV_USAGE_WRITE);

drivers/accel/ethosu/ethosu_job.c

188

struct dma_fence *fence = job->done_fence;

drivers/accel/ethosu/ethosu_job.c

193

dma_fence_init(fence, &ethosu_fence_ops, &dev->fence_lock,

drivers/accel/ethosu/ethosu_job.c

195

dma_fence_get(fence);

drivers/accel/ethosu/ethosu_job.c

202

return fence;

drivers/accel/ethosu/ethosu_job.c

30

static const char *ethosu_fence_get_driver_name(struct dma_fence *fence)

drivers/accel/ethosu/ethosu_job.c

35

static const char *ethosu_fence_get_timeline_name(struct dma_fence *fence)

drivers/accel/habanalabs/common/command_submission.c

1104

pend->fence.error = -EIO;

drivers/accel/habanalabs/common/command_submission.c

1105

complete_all(&pend->fence.completion);

drivers/accel/habanalabs/common/command_submission.c

1153

cs->fence->error = -EIO;

drivers/accel/habanalabs/common/command_submission.c

1154

complete_all(&cs->fence->completion);

drivers/accel/habanalabs/common/command_submission.c

1653

cs->fence->stream_master_qid_map = stream_master_qid_map;

drivers/accel/habanalabs/common/command_submission.c

211

struct hl_fence *fence =

drivers/accel/habanalabs/common/command_submission.c

214

container_of(fence, struct hl_cs_compl, base_fence);

drivers/accel/habanalabs/common/command_submission.c

219

void hl_fence_put(struct hl_fence *fence)

drivers/accel/habanalabs/common/command_submission.c

221

if (IS_ERR_OR_NULL(fence))

drivers/accel/habanalabs/common/command_submission.c

223

kref_put(&fence->refcount, hl_fence_release);

drivers/accel/habanalabs/common/command_submission.c

226

void hl_fences_put(struct hl_fence **fence, int len)

drivers/accel/habanalabs/common/command_submission.c

230

for (i = 0; i < len; i++, fence++)

drivers/accel/habanalabs/common/command_submission.c

231

hl_fence_put(*fence);

drivers/accel/habanalabs/common/command_submission.c

234

void hl_fence_get(struct hl_fence *fence)

drivers/accel/habanalabs/common/command_submission.c

236

if (fence)

drivers/accel/habanalabs/common/command_submission.c

237

kref_get(&fence->refcount);

drivers/accel/habanalabs/common/command_submission.c

240

static void hl_fence_init(struct hl_fence *fence, u64 sequence)

drivers/accel/habanalabs/common/command_submission.c

242

kref_init(&fence->refcount);

drivers/accel/habanalabs/common/command_submission.c

243

fence->cs_sequence = sequence;

drivers/accel/habanalabs/common/command_submission.c

244

fence->error = 0;

drivers/accel/habanalabs/common/command_submission.c

245

fence->timestamp = ktime_set(0, 0);

drivers/accel/habanalabs/common/command_submission.c

246

fence->mcs_handling_done = false;

drivers/accel/habanalabs/common/command_submission.c

247

init_completion(&fence->completion);

drivers/accel/habanalabs/common/command_submission.c

2656

static int hl_wait_for_fence(struct hl_ctx *ctx, u64 seq, struct hl_fence *fence,

drivers/accel/habanalabs/common/command_submission.c

2664

if (IS_ERR(fence)) {

drivers/accel/habanalabs/common/command_submission.c

2665

rc = PTR_ERR(fence);

drivers/accel/habanalabs/common/command_submission.c

2673

if (!fence) {

drivers/accel/habanalabs/common/command_submission.c

2687

completion_rc = completion_done(&fence->completion);

drivers/accel/habanalabs/common/command_submission.c

2695

&fence->completion, timeout);

drivers/accel/habanalabs/common/command_submission.c

2698

error = fence->error;

drivers/accel/habanalabs/common/command_submission.c

2699

timestamp_kt = fence->timestamp;

drivers/accel/habanalabs/common/command_submission.c

2766

struct hl_fence *fence = *fence_ptr;

drivers/accel/habanalabs/common/command_submission.c

2780

if (fence)

drivers/accel/habanalabs/common/command_submission.c

2781

mcs_compl->stream_master_qid_map |= fence->stream_master_qid_map;

drivers/accel/habanalabs/common/command_submission.c

2787

rc = hl_wait_for_fence(mcs_data->ctx, seq_arr[i], fence, &status, 0, NULL);

drivers/accel/habanalabs/common/command_submission.c

2808

if (fence && !fence->mcs_handling_done) {

drivers/accel/habanalabs/common/command_submission.c

2825

if (fence && mcs_data->update_ts &&

drivers/accel/habanalabs/common/command_submission.c

2826

(ktime_compare(fence->timestamp, first_cs_time) < 0))

drivers/accel/habanalabs/common/command_submission.c

2827

first_cs_time = fence->timestamp;

drivers/accel/habanalabs/common/command_submission.c

2860

struct hl_fence *fence;

drivers/accel/habanalabs/common/command_submission.c

2868

fence = hl_ctx_get_fence(ctx, seq);

drivers/accel/habanalabs/common/command_submission.c

2870

rc = hl_wait_for_fence(ctx, seq, fence, status, timeout_us, timestamp);

drivers/accel/habanalabs/common/command_submission.c

2871

hl_fence_put(fence);

drivers/accel/habanalabs/common/command_submission.c

3419

hl_fence_init(&pend->fence, ULONG_MAX);

drivers/accel/habanalabs/common/command_submission.c

3436

pend->fence.timestamp = ktime_get();

drivers/accel/habanalabs/common/command_submission.c

3450

completion_rc = wait_for_completion_interruptible_timeout(&pend->fence.completion,

drivers/accel/habanalabs/common/command_submission.c

3453

if (pend->fence.error == -EIO) {

drivers/accel/habanalabs/common/command_submission.c

3456

pend->fence.error);

drivers/accel/habanalabs/common/command_submission.c

3491

*timestamp = ktime_to_ns(pend->fence.timestamp);

drivers/accel/habanalabs/common/command_submission.c

3528

hl_fence_init(&pend->fence, ULONG_MAX);

drivers/accel/habanalabs/common/command_submission.c

3549

pend->fence.timestamp = ktime_get();

drivers/accel/habanalabs/common/command_submission.c

3559

completion_rc = wait_for_completion_interruptible_timeout(&pend->fence.completion,

drivers/accel/habanalabs/common/command_submission.c

3572

reinit_completion(&pend->fence.completion);

drivers/accel/habanalabs/common/command_submission.c

3584

} else if (pend->fence.error) {

drivers/accel/habanalabs/common/command_submission.c

3587

pend->fence.error);

drivers/accel/habanalabs/common/command_submission.c

3614

*timestamp = ktime_to_ns(pend->fence.timestamp);

drivers/accel/habanalabs/common/command_submission.c

608

struct hl_fence *fence = cs->fence;

drivers/accel/habanalabs/common/command_submission.c

631

(fence->stream_master_qid_map &

drivers/accel/habanalabs/common/command_submission.c

635

mcs_compl->timestamp = ktime_to_ns(fence->timestamp);

drivers/accel/habanalabs/common/command_submission.c

646

fence->mcs_handling_done = true;

drivers/accel/habanalabs/common/command_submission.c

652

fence->mcs_handling_done = true;

drivers/accel/habanalabs/common/command_submission.c

700

container_of(cs->fence, struct hl_cs_compl, base_fence);

drivers/accel/habanalabs/common/command_submission.c

784

cs->fence->error = -ETIMEDOUT;

drivers/accel/habanalabs/common/command_submission.c

786

cs->fence->error = -EIO;

drivers/accel/habanalabs/common/command_submission.c

788

cs->fence->error = -EBUSY;

drivers/accel/habanalabs/common/command_submission.c

798

cs->fence->timestamp = cs->completion_timestamp;

drivers/accel/habanalabs/common/command_submission.c

800

cs->fence->timestamp, cs->fence->error);

drivers/accel/habanalabs/common/command_submission.c

805

complete_all(&cs->fence->completion);

drivers/accel/habanalabs/common/command_submission.c

810

hl_fence_put(cs->fence);

drivers/accel/habanalabs/common/command_submission.c

966

cs->fence = &cs_cmpl->base_fence;

drivers/accel/habanalabs/common/context.c

346

struct hl_fence *fence;

drivers/accel/habanalabs/common/context.c

354

fence = ctx->cs_pending[seq & (asic_prop->max_pending_cs - 1)];

drivers/accel/habanalabs/common/context.c

355

hl_fence_get(fence);

drivers/accel/habanalabs/common/context.c

356

return fence;

drivers/accel/habanalabs/common/context.c

361

struct hl_fence *fence;

drivers/accel/habanalabs/common/context.c

365

fence = hl_ctx_get_fence_locked(ctx, seq);

drivers/accel/habanalabs/common/context.c

369

return fence;

drivers/accel/habanalabs/common/context.c

383

struct hl_fence **fence, u32 arr_len)

drivers/accel/habanalabs/common/context.c

385

struct hl_fence **fence_arr_base = fence;

drivers/accel/habanalabs/common/context.c

390

for (i = 0; i < arr_len; i++, fence++) {

drivers/accel/habanalabs/common/context.c

393

*fence = hl_ctx_get_fence_locked(ctx, seq);

drivers/accel/habanalabs/common/context.c

395

if (IS_ERR(*fence)) {

drivers/accel/habanalabs/common/context.c

399

rc = PTR_ERR(*fence);

drivers/accel/habanalabs/common/firmware_if.c

435

pkt->fence = cpu_to_le32(UINT_MAX);

drivers/accel/habanalabs/common/firmware_if.c

453

rc = hl_poll_timeout_memory(hdev, &pkt->fence, tmp,

drivers/accel/habanalabs/common/habanalabs.h

1241

struct hl_fence fence;

drivers/accel/habanalabs/common/habanalabs.h

2054

struct hl_fence *fence;

drivers/accel/habanalabs/common/habanalabs.h

3836

struct hl_fence **fence, u32 arr_len);

drivers/accel/habanalabs/common/habanalabs.h

3881

void hl_fence_put(struct hl_fence *fence);

drivers/accel/habanalabs/common/habanalabs.h

3882

void hl_fences_put(struct hl_fence **fence, int len);

drivers/accel/habanalabs/common/habanalabs.h

3883

void hl_fence_get(struct hl_fence *fence);

drivers/accel/habanalabs/common/hw_queue.c

564

container_of(cs->fence, struct hl_cs_compl, base_fence);

drivers/accel/habanalabs/common/hw_queue.c

583

container_of(cs->fence,

drivers/accel/habanalabs/common/hw_queue.c

754

staged_cs->fence->stream_master_qid_map |=

drivers/accel/habanalabs/common/hw_queue.c

755

cs->fence->stream_master_qid_map;

drivers/accel/habanalabs/common/irq.c

389

pend->fence.timestamp = intr->timestamp;

drivers/accel/habanalabs/common/irq.c

390

complete_all(&pend->fence.completion);

drivers/accel/habanalabs/gaudi/gaudi.c

1312

container_of(cs->fence, struct hl_cs_compl, base_fence);

drivers/accel/ivpu/ivpu_job.c

468

static inline struct ivpu_fence *to_vpu_fence(struct dma_fence *fence)

drivers/accel/ivpu/ivpu_job.c

470

return container_of(fence, struct ivpu_fence, base);

drivers/accel/ivpu/ivpu_job.c

473

static const char *ivpu_fence_get_driver_name(struct dma_fence *fence)

drivers/accel/ivpu/ivpu_job.c

478

static const char *ivpu_fence_get_timeline_name(struct dma_fence *fence)

drivers/accel/ivpu/ivpu_job.c

480

struct ivpu_fence *ivpu_fence = to_vpu_fence(fence);

drivers/accel/ivpu/ivpu_job.c

492

struct ivpu_fence *fence;

drivers/accel/ivpu/ivpu_job.c

494

fence = kzalloc_obj(*fence);

drivers/accel/ivpu/ivpu_job.c

495

if (!fence)

drivers/accel/ivpu/ivpu_job.c

498

fence->vdev = vdev;

drivers/accel/ivpu/ivpu_job.c

499

spin_lock_init(&fence->lock);

drivers/accel/ivpu/ivpu_job.c

500

dma_fence_init(&fence->base, &ivpu_fence_ops, &fence->lock, dma_fence_context_alloc(1), 1);

drivers/accel/ivpu/ivpu_job.c

502

return &fence->base;

drivers/accel/ivpu/vpu_jsm_api.h

298

} fence;

drivers/accel/rocket/rocket_job.c

178

struct dma_fence *fence)

drivers/accel/rocket/rocket_job.c

183

dma_resv_add_fence(bos[i]->resv, fence, DMA_RESV_USAGE_WRITE);

drivers/accel/rocket/rocket_job.c

29

static const char *rocket_fence_get_driver_name(struct dma_fence *fence)

drivers/accel/rocket/rocket_job.c

292

struct dma_fence *fence = NULL;

drivers/accel/rocket/rocket_job.c

305

fence = rocket_fence_create(core);

drivers/accel/rocket/rocket_job.c

306

if (IS_ERR(fence))

drivers/accel/rocket/rocket_job.c

307

return fence;

drivers/accel/rocket/rocket_job.c

311

job->done_fence = dma_fence_get(fence);

drivers/accel/rocket/rocket_job.c

315

return fence;

drivers/accel/rocket/rocket_job.c

319

return fence;

drivers/accel/rocket/rocket_job.c

326

return fence;

drivers/accel/rocket/rocket_job.c

34

static const char *rocket_fence_get_timeline_name(struct dma_fence *fence)

drivers/accel/rocket/rocket_job.c

46

struct dma_fence *fence;

drivers/accel/rocket/rocket_job.c

48

fence = kzalloc_obj(*fence);

drivers/accel/rocket/rocket_job.c

49

if (!fence)

drivers/accel/rocket/rocket_job.c

52

dma_fence_init(fence, &rocket_fence_ops, &core->fence_lock,

drivers/accel/rocket/rocket_job.c

55

return fence;

drivers/dma-buf/dma-buf.c

303

static void dma_buf_poll_cb(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/dma-buf/dma-buf.c

313

dma_fence_put(fence);

drivers/dma-buf/dma-buf.c

322

struct dma_fence *fence;

drivers/dma-buf/dma-buf.c

326

fence) {

drivers/dma-buf/dma-buf.c

327

dma_fence_get(fence);

drivers/dma-buf/dma-buf.c

328

r = dma_fence_add_callback(fence, &dcb->cb, dma_buf_poll_cb);

drivers/dma-buf/dma-buf.c

331

dma_fence_put(fence);

drivers/dma-buf/dma-buf.c

441

struct dma_fence *fence = NULL;

drivers/dma-buf/dma-buf.c

459

ret = dma_resv_get_singleton(dmabuf->resv, usage, &fence);

drivers/dma-buf/dma-buf.c

463

if (!fence)

drivers/dma-buf/dma-buf.c

464

fence = dma_fence_get_stub();

drivers/dma-buf/dma-buf.c

466

sync_file = sync_file_create(fence);

drivers/dma-buf/dma-buf.c

468

dma_fence_put(fence);

drivers/dma-buf/dma-buf.c

496

struct dma_fence *fence, *f;

drivers/dma-buf/dma-buf.c

511

fence = sync_file_get_fence(arg.fd);

drivers/dma-buf/dma-buf.c

512

if (!fence)

drivers/dma-buf/dma-buf.c

519

dma_fence_unwrap_for_each(f, &iter, fence)

drivers/dma-buf/dma-buf.c

527

dma_fence_unwrap_for_each(f, &iter, fence)

drivers/dma-buf/dma-buf.c

534

dma_fence_put(fence);

drivers/dma-buf/dma-fence-array.c

103

static bool dma_fence_array_signaled(struct dma_fence *fence)

drivers/dma-buf/dma-fence-array.c

105

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/dma-buf/dma-fence-array.c

140

static void dma_fence_array_release(struct dma_fence *fence)

drivers/dma-buf/dma-fence-array.c

142

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/dma-buf/dma-fence-array.c

149

dma_fence_free(fence);

drivers/dma-buf/dma-fence-array.c

152

static void dma_fence_array_set_deadline(struct dma_fence *fence,

drivers/dma-buf/dma-fence-array.c

155

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/dma-buf/dma-fence-array.c

18

static const char *dma_fence_array_get_driver_name(struct dma_fence *fence)

drivers/dma-buf/dma-fence-array.c

23

static const char *dma_fence_array_get_timeline_name(struct dma_fence *fence)

drivers/dma-buf/dma-fence-array.c

279

bool dma_fence_match_context(struct dma_fence *fence, u64 context)

drivers/dma-buf/dma-fence-array.c

281

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/dma-buf/dma-fence-array.c

284

if (!dma_fence_is_array(fence))

drivers/dma-buf/dma-fence-array.c

285

return fence->context == context;

drivers/dma-buf/dma-fence-array.c

70

static bool dma_fence_array_enable_signaling(struct dma_fence *fence)

drivers/dma-buf/dma-fence-array.c

72

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/dma-buf/dma-fence-chain.c

112

static const char *dma_fence_chain_get_driver_name(struct dma_fence *fence)

drivers/dma-buf/dma-fence-chain.c

117

static const char *dma_fence_chain_get_timeline_name(struct dma_fence *fence)

drivers/dma-buf/dma-fence-chain.c

12

static bool dma_fence_chain_enable_signaling(struct dma_fence *fence);

drivers/dma-buf/dma-fence-chain.c

145

static bool dma_fence_chain_enable_signaling(struct dma_fence *fence)

drivers/dma-buf/dma-fence-chain.c

147

struct dma_fence_chain *head = to_dma_fence_chain(fence);

drivers/dma-buf/dma-fence-chain.c

150

dma_fence_chain_for_each(fence, &head->base) {

drivers/dma-buf/dma-fence-chain.c

151

struct dma_fence *f = dma_fence_chain_contained(fence);

drivers/dma-buf/dma-fence-chain.c

155

dma_fence_put(fence);

drivers/dma-buf/dma-fence-chain.c

164

static bool dma_fence_chain_signaled(struct dma_fence *fence)

drivers/dma-buf/dma-fence-chain.c

166

dma_fence_chain_for_each(fence, fence) {

drivers/dma-buf/dma-fence-chain.c

167

struct dma_fence *f = dma_fence_chain_contained(fence);

drivers/dma-buf/dma-fence-chain.c

170

dma_fence_put(fence);

drivers/dma-buf/dma-fence-chain.c

178

static void dma_fence_chain_release(struct dma_fence *fence)

drivers/dma-buf/dma-fence-chain.c

180

struct dma_fence_chain *chain = to_dma_fence_chain(fence);

drivers/dma-buf/dma-fence-chain.c

205

dma_fence_put(chain->fence);

drivers/dma-buf/dma-fence-chain.c

206

dma_fence_free(fence);

drivers/dma-buf/dma-fence-chain.c

210

static void dma_fence_chain_set_deadline(struct dma_fence *fence,

drivers/dma-buf/dma-fence-chain.c

213

dma_fence_chain_for_each(fence, fence) {

drivers/dma-buf/dma-fence-chain.c

214

struct dma_fence *f = dma_fence_chain_contained(fence);

drivers/dma-buf/dma-fence-chain.c

242

struct dma_fence *fence,

drivers/dma-buf/dma-fence-chain.c

250

chain->fence = fence;

drivers/dma-buf/dma-fence-chain.c

274

WARN_ON(dma_fence_is_chain(fence));

drivers/dma-buf/dma-fence-chain.c

39

struct dma_fence *dma_fence_chain_walk(struct dma_fence *fence)

drivers/dma-buf/dma-fence-chain.c

44

chain = to_dma_fence_chain(fence);

drivers/dma-buf/dma-fence-chain.c

46

dma_fence_put(fence);

drivers/dma-buf/dma-fence-chain.c

54

if (!dma_fence_is_signaled(prev_chain->fence))

drivers/dma-buf/dma-fence-chain.c

74

dma_fence_put(fence);

drivers/dma-buf/dma-fence.c

1008

void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)

drivers/dma-buf/dma-fence.c

1010

if (fence->ops->set_deadline && !dma_fence_is_signaled(fence))

drivers/dma-buf/dma-fence.c

1011

fence->ops->set_deadline(fence, deadline);

drivers/dma-buf/dma-fence.c

1022

void dma_fence_describe(struct dma_fence *fence, struct seq_file *seq)

drivers/dma-buf/dma-fence.c

1030

if (!dma_fence_is_signaled(fence)) {

drivers/dma-buf/dma-fence.c

1031

timeline = dma_fence_timeline_name(fence);

drivers/dma-buf/dma-fence.c

1032

driver = dma_fence_driver_name(fence);

drivers/dma-buf/dma-fence.c

1037

fence->context, fence->seqno, timeline, driver,

drivers/dma-buf/dma-fence.c

1045

__dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,

drivers/dma-buf/dma-fence.c

1051

kref_init(&fence->refcount);

drivers/dma-buf/dma-fence.c

1052

fence->ops = ops;

drivers/dma-buf/dma-fence.c

1053

INIT_LIST_HEAD(&fence->cb_list);

drivers/dma-buf/dma-fence.c

1054

fence->lock = lock;

drivers/dma-buf/dma-fence.c

1055

fence->context = context;

drivers/dma-buf/dma-fence.c

1056

fence->seqno = seqno;

drivers/dma-buf/dma-fence.c

1057

fence->flags = flags;

drivers/dma-buf/dma-fence.c

1058

fence->error = 0;

drivers/dma-buf/dma-fence.c

1060

trace_dma_fence_init(fence);

drivers/dma-buf/dma-fence.c

1079

dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,

drivers/dma-buf/dma-fence.c

1082

__dma_fence_init(fence, ops, lock, context, seqno, 0UL);

drivers/dma-buf/dma-fence.c

1102

dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops,

drivers/dma-buf/dma-fence.c

1105

__dma_fence_init(fence, ops, lock, context, seqno,

drivers/dma-buf/dma-fence.c

1130

const char __rcu *dma_fence_driver_name(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

1135

if (!dma_fence_test_signaled_flag(fence))

drivers/dma-buf/dma-fence.c

1136

return fence->ops->get_driver_name(fence);

drivers/dma-buf/dma-fence.c

114

static const char *dma_fence_stub_get_name(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

1162

const char __rcu *dma_fence_timeline_name(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

1167

if (!dma_fence_test_signaled_flag(fence))

drivers/dma-buf/dma-fence.c

1168

return fence->ops->get_timeline_name(fence);

drivers/dma-buf/dma-fence.c

157

struct dma_fence *fence;

drivers/dma-buf/dma-fence.c

159

fence = kzalloc_obj(*fence);

drivers/dma-buf/dma-fence.c

160

if (fence == NULL)

drivers/dma-buf/dma-fence.c

163

dma_fence_init(fence,

drivers/dma-buf/dma-fence.c

169

&fence->flags);

drivers/dma-buf/dma-fence.c

171

dma_fence_signal_timestamp(fence, timestamp);

drivers/dma-buf/dma-fence.c

173

return fence;

drivers/dma-buf/dma-fence.c

362

void dma_fence_signal_timestamp_locked(struct dma_fence *fence,

drivers/dma-buf/dma-fence.c

368

lockdep_assert_held(fence->lock);

drivers/dma-buf/dma-fence.c

371

&fence->flags)))

drivers/dma-buf/dma-fence.c

375

list_replace(&fence->cb_list, &cb_list);

drivers/dma-buf/dma-fence.c

377

fence->timestamp = timestamp;

drivers/dma-buf/dma-fence.c

378

set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);

drivers/dma-buf/dma-fence.c

379

trace_dma_fence_signaled(fence);

drivers/dma-buf/dma-fence.c

383

cur->func(fence, cur);

drivers/dma-buf/dma-fence.c

400

void dma_fence_signal_timestamp(struct dma_fence *fence, ktime_t timestamp)

drivers/dma-buf/dma-fence.c

404

if (WARN_ON(!fence))

drivers/dma-buf/dma-fence.c

407

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

408

dma_fence_signal_timestamp_locked(fence, timestamp);

drivers/dma-buf/dma-fence.c

409

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

426

void dma_fence_signal_locked(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

428

dma_fence_signal_timestamp_locked(fence, ktime_get());

drivers/dma-buf/dma-fence.c

443

bool dma_fence_check_and_signal_locked(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

447

ret = dma_fence_test_signaled_flag(fence);

drivers/dma-buf/dma-fence.c

448

dma_fence_signal_locked(fence);

drivers/dma-buf/dma-fence.c

463

bool dma_fence_check_and_signal(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

468

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

469

ret = dma_fence_check_and_signal_locked(fence);

drivers/dma-buf/dma-fence.c

470

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

486

void dma_fence_signal(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

491

if (WARN_ON(!fence))

drivers/dma-buf/dma-fence.c

496

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

497

dma_fence_signal_timestamp_locked(fence, ktime_get());

drivers/dma-buf/dma-fence.c

498

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

523

dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout)

drivers/dma-buf/dma-fence.c

534

dma_fence_enable_sw_signaling(fence);

drivers/dma-buf/dma-fence.c

538

trace_dma_fence_wait_start(fence);

drivers/dma-buf/dma-fence.c

541

if (fence->ops->wait)

drivers/dma-buf/dma-fence.c

542

ret = fence->ops->wait(fence, intr, timeout);

drivers/dma-buf/dma-fence.c

544

ret = dma_fence_default_wait(fence, intr, timeout);

drivers/dma-buf/dma-fence.c

547

trace_dma_fence_wait_end(fence);

drivers/dma-buf/dma-fence.c

563

struct dma_fence *fence =

drivers/dma-buf/dma-fence.c

567

trace_dma_fence_destroy(fence);

drivers/dma-buf/dma-fence.c

569

if (!list_empty(&fence->cb_list) &&

drivers/dma-buf/dma-fence.c

570

!dma_fence_test_signaled_flag(fence)) {

drivers/dma-buf/dma-fence.c

575

driver = dma_fence_driver_name(fence);

drivers/dma-buf/dma-fence.c

576

timeline = dma_fence_timeline_name(fence);

drivers/dma-buf/dma-fence.c

581

fence->context, fence->seqno);

drivers/dma-buf/dma-fence.c

590

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

591

fence->error = -EDEADLK;

drivers/dma-buf/dma-fence.c

592

dma_fence_signal_locked(fence);

drivers/dma-buf/dma-fence.c

593

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

598

if (fence->ops->release)

drivers/dma-buf/dma-fence.c

599

fence->ops->release(fence);

drivers/dma-buf/dma-fence.c

601

dma_fence_free(fence);

drivers/dma-buf/dma-fence.c

612

void dma_fence_free(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

614

kfree_rcu(fence, rcu);

drivers/dma-buf/dma-fence.c

618

static bool __dma_fence_enable_signaling(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

622

lockdep_assert_held(fence->lock);

drivers/dma-buf/dma-fence.c

625

&fence->flags);

drivers/dma-buf/dma-fence.c

627

if (dma_fence_test_signaled_flag(fence))

drivers/dma-buf/dma-fence.c

630

if (!was_set && fence->ops->enable_signaling) {

drivers/dma-buf/dma-fence.c

631

trace_dma_fence_enable_signal(fence);

drivers/dma-buf/dma-fence.c

633

if (!fence->ops->enable_signaling(fence)) {

drivers/dma-buf/dma-fence.c

634

dma_fence_signal_locked(fence);

drivers/dma-buf/dma-fence.c

650

void dma_fence_enable_sw_signaling(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

654

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

655

__dma_fence_enable_signaling(fence);

drivers/dma-buf/dma-fence.c

656

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

682

int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb,

drivers/dma-buf/dma-fence.c

688

if (WARN_ON(!fence || !func))

drivers/dma-buf/dma-fence.c

691

if (dma_fence_test_signaled_flag(fence)) {

drivers/dma-buf/dma-fence.c

696

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

698

if (__dma_fence_enable_signaling(fence)) {

drivers/dma-buf/dma-fence.c

700

list_add_tail(&cb->node, &fence->cb_list);

drivers/dma-buf/dma-fence.c

706

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

724

int dma_fence_get_status(struct dma_fence *fence)

drivers/dma-buf/dma-fence.c

729

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

730

status = dma_fence_get_status_locked(fence);

drivers/dma-buf/dma-fence.c

731

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

756

dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/dma-buf/dma-fence.c

761

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

767

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

779

dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/dma-buf/dma-fence.c

800

dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout)

drivers/dma-buf/dma-fence.c

806

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

808

if (dma_fence_test_signaled_flag(fence))

drivers/dma-buf/dma-fence.c

823

list_add(&cb.base.node, &fence->cb_list);

drivers/dma-buf/dma-fence.c

825

while (!dma_fence_test_signaled_flag(fence) && ret > 0) {

drivers/dma-buf/dma-fence.c

830

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

834

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/dma-fence.c

844

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/dma-fence.c

856

struct dma_fence *fence = fences[i];

drivers/dma-buf/dma-fence.c

857

if (dma_fence_test_signaled_flag(fence)) {

drivers/dma-buf/dma-fence.c

915

struct dma_fence *fence = fences[i];

drivers/dma-buf/dma-fence.c

918

if (dma_fence_add_callback(fence, &cb[i].base,

drivers/dma-buf/dma-resv.c

126

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

128

dma_resv_list_entry(list, i, NULL, &fence, NULL);

drivers/dma-buf/dma-resv.c

129

dma_fence_put(fence);

drivers/dma-buf/dma-resv.c

217

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

219

dma_resv_list_entry(old, i, obj, &fence, &usage);

drivers/dma-buf/dma-resv.c

220

if (dma_fence_is_signaled(fence))

drivers/dma-buf/dma-resv.c

221

RCU_INIT_POINTER(new->table[--k], fence);

drivers/dma-buf/dma-resv.c

223

dma_resv_list_set(new, j++, fence, usage);

drivers/dma-buf/dma-resv.c

242

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

244

fence = rcu_dereference_protected(new->table[i],

drivers/dma-buf/dma-resv.c

246

dma_fence_put(fence);

drivers/dma-buf/dma-resv.c

287

void dma_resv_add_fence(struct dma_resv *obj, struct dma_fence *fence,

drivers/dma-buf/dma-resv.c

294

dma_fence_get(fence);

drivers/dma-buf/dma-resv.c

301

WARN_ON(dma_fence_is_container(fence));

drivers/dma-buf/dma-resv.c

310

if ((old->context == fence->context && old_usage >= usage &&

drivers/dma-buf/dma-resv.c

311

dma_fence_is_later_or_same(fence, old)) ||

drivers/dma-buf/dma-resv.c

313

dma_resv_list_set(fobj, i, fence, usage);

drivers/dma-buf/dma-resv.c

322

dma_resv_list_set(fobj, i, fence, usage);

drivers/dma-buf/dma-resv.c

385

dma_fence_put(cursor->fence);

drivers/dma-buf/dma-resv.c

388

cursor->fence = NULL;

drivers/dma-buf/dma-resv.c

394

cursor->obj, &cursor->fence,

drivers/dma-buf/dma-resv.c

396

cursor->fence = dma_fence_get_rcu(cursor->fence);

drivers/dma-buf/dma-resv.c

397

if (!cursor->fence) {

drivers/dma-buf/dma-resv.c

402

if (!dma_fence_is_signaled(cursor->fence) &&

drivers/dma-buf/dma-resv.c

429

return cursor->fence;

drivers/dma-buf/dma-resv.c

458

return cursor->fence;

drivers/dma-buf/dma-resv.c

473

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

480

fence = dma_resv_iter_next(cursor);

drivers/dma-buf/dma-resv.c

482

return fence;

drivers/dma-buf/dma-resv.c

495

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

507

cursor->obj, &fence, &cursor->fence_usage);

drivers/dma-buf/dma-resv.c

510

return fence;

drivers/dma-buf/dma-resv.c

573

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

579

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/dma-buf/dma-resv.c

604

(*fences)[(*num_fences)++] = dma_fence_get(fence);

drivers/dma-buf/dma-resv.c

628

struct dma_fence **fence)

drivers/dma-buf/dma-resv.c

640

*fence = NULL;

drivers/dma-buf/dma-resv.c

645

*fence = fences[0];

drivers/dma-buf/dma-resv.c

660

*fence = &array->base;

drivers/dma-buf/dma-resv.c

683

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

686

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/dma-buf/dma-resv.c

688

ret = dma_fence_wait_timeout(fence, intr, timeout);

drivers/dma-buf/dma-resv.c

71

struct dma_resv *resv, struct dma_fence **fence,

drivers/dma-buf/dma-resv.c

715

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

718

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/dma-buf/dma-resv.c

719

dma_fence_set_deadline(fence, deadline);

drivers/dma-buf/dma-resv.c

741

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

744

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/dma-buf/dma-resv.c

765

struct dma_fence *fence;

drivers/dma-buf/dma-resv.c

767

dma_resv_for_each_fence(&cursor, obj, DMA_RESV_USAGE_READ, fence) {

drivers/dma-buf/dma-resv.c

770

dma_fence_describe(fence, seq);

drivers/dma-buf/dma-resv.c

78

*fence = (struct dma_fence *)(tmp & ~DMA_RESV_LIST_MASK);

drivers/dma-buf/dma-resv.c

86

struct dma_fence *fence,

drivers/dma-buf/dma-resv.c

89

long tmp = ((long)fence) | usage;

drivers/dma-buf/st-dma-fence-chain.c

182

struct dma_fence *fence;

drivers/dma-buf/st-dma-fence-chain.c

190

fence = dma_fence_get(fc.tail);

drivers/dma-buf/st-dma-fence-chain.c

191

err = dma_fence_chain_find_seqno(&fence, 0);

drivers/dma-buf/st-dma-fence-chain.c

192

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

199

fence = dma_fence_get(fc.tail);

drivers/dma-buf/st-dma-fence-chain.c

200

err = dma_fence_chain_find_seqno(&fence, i + 1);

drivers/dma-buf/st-dma-fence-chain.c

201

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

207

if (fence != fc.chains[i]) {

drivers/dma-buf/st-dma-fence-chain.c

214

dma_fence_get(fence);

drivers/dma-buf/st-dma-fence-chain.c

215

err = dma_fence_chain_find_seqno(&fence, i + 1);

drivers/dma-buf/st-dma-fence-chain.c

216

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

221

if (fence != fc.chains[i]) {

drivers/dma-buf/st-dma-fence-chain.c

227

dma_fence_get(fence);

drivers/dma-buf/st-dma-fence-chain.c

228

err = dma_fence_chain_find_seqno(&fence, i + 2);

drivers/dma-buf/st-dma-fence-chain.c

229

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

237

dma_fence_get(fence);

drivers/dma-buf/st-dma-fence-chain.c

238

err = dma_fence_chain_find_seqno(&fence, i);

drivers/dma-buf/st-dma-fence-chain.c

239

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

244

if (i > 0 && fence != fc.chains[i - 1]) {

drivers/dma-buf/st-dma-fence-chain.c

260

struct dma_fence *fence;

drivers/dma-buf/st-dma-fence-chain.c

269

fence = dma_fence_get(fc.tail);

drivers/dma-buf/st-dma-fence-chain.c

270

err = dma_fence_chain_find_seqno(&fence, 1);

drivers/dma-buf/st-dma-fence-chain.c

271

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

277

if (fence && fence != fc.chains[0]) {

drivers/dma-buf/st-dma-fence-chain.c

279

fence->seqno);

drivers/dma-buf/st-dma-fence-chain.c

281

dma_fence_get(fence);

drivers/dma-buf/st-dma-fence-chain.c

282

err = dma_fence_chain_find_seqno(&fence, 1);

drivers/dma-buf/st-dma-fence-chain.c

283

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

298

struct dma_fence *fence;

drivers/dma-buf/st-dma-fence-chain.c

307

fence = dma_fence_get(fc.tail);

drivers/dma-buf/st-dma-fence-chain.c

308

err = dma_fence_chain_find_seqno(&fence, 2);

drivers/dma-buf/st-dma-fence-chain.c

309

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

322

if (fence != fc.chains[0]) {

drivers/dma-buf/st-dma-fence-chain.c

324

fence ? fence->seqno : 0);

drivers/dma-buf/st-dma-fence-chain.c

342

struct dma_fence *fence;

drivers/dma-buf/st-dma-fence-chain.c

351

fence = dma_fence_get(fc.tail);

drivers/dma-buf/st-dma-fence-chain.c

352

err = dma_fence_chain_find_seqno(&fence, 2 * i + 1);

drivers/dma-buf/st-dma-fence-chain.c

353

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

359

if (fence != fc.chains[i]) {

drivers/dma-buf/st-dma-fence-chain.c

361

fence->seqno,

drivers/dma-buf/st-dma-fence-chain.c

368

dma_fence_get(fence);

drivers/dma-buf/st-dma-fence-chain.c

369

err = dma_fence_chain_find_seqno(&fence, 2 * i + 2);

drivers/dma-buf/st-dma-fence-chain.c

370

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

375

if (fence != fc.chains[i]) {

drivers/dma-buf/st-dma-fence-chain.c

398

struct dma_fence *fence = dma_fence_get(data->fc.tail);

drivers/dma-buf/st-dma-fence-chain.c

403

err = dma_fence_chain_find_seqno(&fence, seqno);

drivers/dma-buf/st-dma-fence-chain.c

407

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

410

if (!fence)

drivers/dma-buf/st-dma-fence-chain.c

417

if (fence->seqno == seqno) {

drivers/dma-buf/st-dma-fence-chain.c

418

err = dma_fence_chain_find_seqno(&fence, seqno);

drivers/dma-buf/st-dma-fence-chain.c

422

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

427

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-chain.c

62

struct dma_fence *fence,

drivers/dma-buf/st-dma-fence-chain.c

71

dma_fence_chain_init(f, dma_fence_get(prev), dma_fence_get(fence),

drivers/dma-buf/st-dma-fence-unwrap.c

125

struct dma_fence *fence, *f1, *f2, *array;

drivers/dma-buf/st-dma-fence-unwrap.c

147

dma_fence_unwrap_for_each(fence, &iter, array) {

drivers/dma-buf/st-dma-fence-unwrap.c

148

if (fence == f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

150

} else if (fence == f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

169

struct dma_fence *fence, *f1, *f2, *chain;

drivers/dma-buf/st-dma-fence-unwrap.c

191

dma_fence_unwrap_for_each(fence, &iter, chain) {

drivers/dma-buf/st-dma-fence-unwrap.c

192

if (fence == f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

194

} else if (fence == f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

213

struct dma_fence *fence, *f1, *f2, *array, *chain;

drivers/dma-buf/st-dma-fence-unwrap.c

239

dma_fence_unwrap_for_each(fence, &iter, chain) {

drivers/dma-buf/st-dma-fence-unwrap.c

240

if (fence == f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

242

} else if (fence == f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

261

struct dma_fence *fence, *f1, *f2, *f3;

drivers/dma-buf/st-dma-fence-unwrap.c

285

dma_fence_unwrap_for_each(fence, &iter, f3) {

drivers/dma-buf/st-dma-fence-unwrap.c

286

if (fence == f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

289

} else if (fence == f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

313

struct dma_fence *fence, *f1, *f2;

drivers/dma-buf/st-dma-fence-unwrap.c

329

dma_fence_unwrap_for_each(fence, &iter, f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

330

if (fence == f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

352

struct dma_fence *fence, *f1, *f2, *f3, *f4;

drivers/dma-buf/st-dma-fence-unwrap.c

388

dma_fence_unwrap_for_each(fence, &iter, f4) {

drivers/dma-buf/st-dma-fence-unwrap.c

389

if (fence == f3 && f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

392

} else if (fence == f2 && !f3) {

drivers/dma-buf/st-dma-fence-unwrap.c

418

struct dma_fence *fence, *f1, *f2, *a1, *a2, *c1, *c2;

drivers/dma-buf/st-dma-fence-unwrap.c

454

dma_fence_unwrap_for_each(fence, &iter, a2) {

drivers/dma-buf/st-dma-fence-unwrap.c

455

if (fence == f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

459

} else if (fence == f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

484

struct dma_fence *fence, *f1, *f2, *f3, *f4, *f5;

drivers/dma-buf/st-dma-fence-unwrap.c

515

dma_fence_unwrap_for_each(fence, &iter, f5) {

drivers/dma-buf/st-dma-fence-unwrap.c

516

if (fence == f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

519

} else if (fence == f2) {

drivers/dma-buf/st-dma-fence-unwrap.c

547

struct dma_fence *fence, *f1, *f2, *f3, *f4, *f5, *f6, *f7;

drivers/dma-buf/st-dma-fence-unwrap.c

592

dma_fence_unwrap_for_each(fence, &iter, f7) {

drivers/dma-buf/st-dma-fence-unwrap.c

593

if (fence == f1 && f4) {

drivers/dma-buf/st-dma-fence-unwrap.c

596

} else if (fence == f4 && !f1) {

drivers/dma-buf/st-dma-fence-unwrap.c

85

struct dma_fence *fence)

drivers/dma-buf/st-dma-fence-unwrap.c

92

dma_fence_put(fence);

drivers/dma-buf/st-dma-fence-unwrap.c

96

dma_fence_chain_init(f, prev, fence, 1);

drivers/dma-buf/st-dma-resv.c

113

struct dma_fence *f, *fence;

drivers/dma-buf/st-dma-resv.c

139

dma_resv_for_each_fence(&cursor, &resv, usage, fence) {

drivers/dma-buf/st-dma-resv.c

145

if (f != fence) {

drivers/dma-buf/st-dma-resv.c

174

struct dma_fence *f, *fence;

drivers/dma-buf/st-dma-resv.c

203

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/dma-buf/st-dma-resv.c

213

if (f != fence) {

drivers/dma-buf/sw_sync.c

141

static const char *timeline_fence_get_driver_name(struct dma_fence *fence)

drivers/dma-buf/sw_sync.c

146

static const char *timeline_fence_get_timeline_name(struct dma_fence *fence)

drivers/dma-buf/sw_sync.c

148

struct sync_timeline *parent = dma_fence_parent(fence);

drivers/dma-buf/sw_sync.c

153

static void timeline_fence_release(struct dma_fence *fence)

drivers/dma-buf/sw_sync.c

155

struct sync_pt *pt = dma_fence_to_sync_pt(fence);

drivers/dma-buf/sw_sync.c

156

struct sync_timeline *parent = dma_fence_parent(fence);

drivers/dma-buf/sw_sync.c

159

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/sw_sync.c

164

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/sw_sync.c

167

dma_fence_free(fence);

drivers/dma-buf/sw_sync.c

170

static bool timeline_fence_signaled(struct dma_fence *fence)

drivers/dma-buf/sw_sync.c

172

struct sync_timeline *parent = dma_fence_parent(fence);

drivers/dma-buf/sw_sync.c

174

return !__dma_fence_is_later(fence, fence->seqno, parent->value);

drivers/dma-buf/sw_sync.c

177

static void timeline_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)

drivers/dma-buf/sw_sync.c

179

struct sync_pt *pt = dma_fence_to_sync_pt(fence);

drivers/dma-buf/sw_sync.c

182

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/sw_sync.c

183

if (test_bit(SW_SYNC_HAS_DEADLINE_BIT, &fence->flags)) {

drivers/dma-buf/sw_sync.c

188

__set_bit(SW_SYNC_HAS_DEADLINE_BIT, &fence->flags);

drivers/dma-buf/sw_sync.c

190

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/sw_sync.c

377

data.fence = fd;

drivers/dma-buf/sw_sync.c

413

struct dma_fence *fence;

drivers/dma-buf/sw_sync.c

424

fence = sync_file_get_fence(data.fence_fd);

drivers/dma-buf/sw_sync.c

425

if (!fence)

drivers/dma-buf/sw_sync.c

428

pt = dma_fence_to_sync_pt(fence);

drivers/dma-buf/sw_sync.c

434

spin_lock_irqsave(fence->lock, flags);

drivers/dma-buf/sw_sync.c

435

if (!test_bit(SW_SYNC_HAS_DEADLINE_BIT, &fence->flags)) {

drivers/dma-buf/sw_sync.c

440

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/sw_sync.c

442

dma_fence_put(fence);

drivers/dma-buf/sw_sync.c

453

spin_unlock_irqrestore(fence->lock, flags);

drivers/dma-buf/sw_sync.c

455

dma_fence_put(fence);

drivers/dma-buf/sw_sync.c

53

__s32 fence; /* fd of new fence */

drivers/dma-buf/sw_sync.c

86

static inline struct sync_pt *dma_fence_to_sync_pt(struct dma_fence *fence)

drivers/dma-buf/sw_sync.c

88

if (fence->ops != &timeline_fence_ops)

drivers/dma-buf/sw_sync.c

90

return container_of(fence, struct sync_pt, base);

drivers/dma-buf/sync_debug.c

46

struct dma_fence *fence, bool show)

drivers/dma-buf/sync_debug.c

48

struct sync_timeline *parent = dma_fence_parent(fence);

drivers/dma-buf/sync_debug.c

51

status = dma_fence_get_status_locked(fence);

drivers/dma-buf/sync_debug.c

58

if (test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags)) {

drivers/dma-buf/sync_debug.c

60

ktime_to_timespec64(fence->timestamp);

drivers/dma-buf/sync_debug.c

65

seq_printf(s, ": %lld", fence->seqno);

drivers/dma-buf/sync_debug.h

48

static inline struct sync_timeline *dma_fence_parent(struct dma_fence *fence)

drivers/dma-buf/sync_debug.h

50

return container_of(fence->lock, struct sync_timeline, lock);

drivers/dma-buf/sync_file.c

106

struct dma_fence *fence;

drivers/dma-buf/sync_file.c

112

fence = dma_fence_get(sync_file->fence);

drivers/dma-buf/sync_file.c

115

return fence;

drivers/dma-buf/sync_file.c

137

struct dma_fence *fence = sync_file->fence;

drivers/dma-buf/sync_file.c

142

driver = dma_fence_driver_name(fence);

drivers/dma-buf/sync_file.c

143

timeline = dma_fence_timeline_name(fence);

drivers/dma-buf/sync_file.c

147

fence->context,

drivers/dma-buf/sync_file.c

148

fence->seqno);

drivers/dma-buf/sync_file.c

169

struct dma_fence *fence;

drivers/dma-buf/sync_file.c

175

fence = dma_fence_unwrap_merge(a->fence, b->fence);

drivers/dma-buf/sync_file.c

176

if (!fence) {

drivers/dma-buf/sync_file.c

180

sync_file->fence = fence;

drivers/dma-buf/sync_file.c

190

dma_fence_remove_callback(sync_file->fence, &sync_file->cb);

drivers/dma-buf/sync_file.c

191

dma_fence_put(sync_file->fence);

drivers/dma-buf/sync_file.c

205

if (dma_fence_add_callback(sync_file->fence, &sync_file->cb,

drivers/dma-buf/sync_file.c

210

return dma_fence_is_signaled(sync_file->fence) ? EPOLLIN : 0;

drivers/dma-buf/sync_file.c

247

data.fence = fd;

drivers/dma-buf/sync_file.c

268

static int sync_fill_fence_info(struct dma_fence *fence,

drivers/dma-buf/sync_file.c

276

driver = dma_fence_driver_name(fence);

drivers/dma-buf/sync_file.c

277

timeline = dma_fence_timeline_name(fence);

drivers/dma-buf/sync_file.c

284

info->status = dma_fence_get_status(fence);

drivers/dma-buf/sync_file.c

286

dma_fence_is_signaled(fence) ?

drivers/dma-buf/sync_file.c

287

ktime_to_ns(dma_fence_timestamp(fence)) :

drivers/dma-buf/sync_file.c

302

struct dma_fence *fence;

drivers/dma-buf/sync_file.c

313

dma_fence_unwrap_for_each(fence, &iter, sync_file->fence)

drivers/dma-buf/sync_file.c

323

info.status = dma_fence_get_status(sync_file->fence);

drivers/dma-buf/sync_file.c

338

dma_fence_unwrap_for_each(fence, &iter, sync_file->fence) {

drivers/dma-buf/sync_file.c

341

status = sync_fill_fence_info(fence, &fence_info[num_fences++]);

drivers/dma-buf/sync_file.c

377

dma_fence_set_deadline(sync_file->fence, ns_to_ktime(ts.deadline_ns));

drivers/dma-buf/sync_file.c

65

struct sync_file *sync_file_create(struct dma_fence *fence)

drivers/dma-buf/sync_file.c

73

sync_file->fence = dma_fence_get(fence);

drivers/dma/ioat/hw.h

111

unsigned int fence:1;

drivers/dma/ioat/hw.h

158

unsigned int fence:1;

drivers/dma/ioat/hw.h

207

unsigned int fence:1;

drivers/dma/ioat/hw.h

77

unsigned int fence:1;

drivers/dma/ioat/prep.c

142

hw->ctl_f.fence = !!(flags & DMA_PREP_FENCE);

drivers/dma/ioat/prep.c

227

xor->ctl_f.fence = !!(flags & DMA_PREP_FENCE);

drivers/dma/ioat/prep.c

437

pq->ctl_f.fence = !!(flags & DMA_PREP_FENCE);

drivers/dma/ioat/prep.c

551

pq->ctl_f.fence = !!(flags & DMA_PREP_FENCE);

drivers/dma/ioat/prep.c

723

hw->ctl_f.fence = !!(flags & DMA_PREP_FENCE);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

210

struct dma_fence *fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

238

struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

415

u16 context_id, struct dma_fence *fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

108

struct amdgpu_amdkfd_fence *fence = to_amdgpu_amdkfd_fence(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

110

return fence ? fence->timeline_name : NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

123

struct amdgpu_amdkfd_fence *fence = to_amdgpu_amdkfd_fence(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

125

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

135

if (!fence->svm_bo) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

136

if (!kgd2kfd_schedule_evict_and_restore_process(fence->mm, fence->context_id, f))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

139

if (!svm_range_schedule_evict_svm_bo(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

155

struct amdgpu_amdkfd_fence *fence = to_amdgpu_amdkfd_fence(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

160

if (WARN_ON(!fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

163

mmdrop(fence->mm);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

179

struct amdgpu_amdkfd_fence *fence = to_amdgpu_amdkfd_fence(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

181

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

183

else if (fence->mm == mm && !fence->svm_bo)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

68

struct amdgpu_amdkfd_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

70

fence = kzalloc_obj(*fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

71

if (fence == NULL)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

76

fence->mm = mm;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

77

get_task_comm(fence->timeline_name, current);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

78

spin_lock_init(&fence->lock);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

79

fence->svm_bo = svm_bo;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

80

fence->context_id = context_id;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

81

dma_fence_init(&fence->base, &amdkfd_fence_ops, &fence->lock,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

84

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

89

struct amdgpu_amdkfd_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

94

fence = container_of(f, struct amdgpu_amdkfd_fence, base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c

96

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

2970

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

2986

DMA_RESV_USAGE_KERNEL, fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

2987

ret = amdgpu_sync_fence(&sync_obj, fence, GFP_KERNEL);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

401

struct dma_fence *fence, *stub;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

407

dma_resv_for_each_fence(&cursor, resv, DMA_RESV_USAGE_BOOKKEEP, fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

408

if (!to_amdgpu_amdkfd_fence(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

411

dma_resv_replace_fences(resv, fence->context, stub,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

445

struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

460

dma_resv_add_fence(bo->tbo.base.resv, fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c

35

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c

41

saddr, daddr, size, NULL, &fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c

45

r = dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c

46

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1210

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1243

while ((fence = amdgpu_sync_get_fence(&p->sync))) {

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1244

struct drm_sched_fence *s_fence = to_drm_sched_fence(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1253

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1257

r = amdgpu_sync_fence(&p->gang_leader->explicit_sync, fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1259

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1274

p->fence, p->post_deps[i].point);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1278

p->fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1299

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1304

fence = &p->jobs[i]->base.s_fence->scheduled;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1305

dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1306

r = drm_sched_job_add_dependency(&leader->base, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1308

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1339

p->fence = dma_fence_get(&leader->base.s_fence->finished);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1355

dma_resv_add_fence(gobj->resv, p->fence, DMA_RESV_USAGE_WRITE);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1359

p->fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1400

dma_fence_put(parser->fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1497

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1511

fence = amdgpu_ctx_get_fence(ctx, entity, wait->in.handle);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1512

if (IS_ERR(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1513

r = PTR_ERR(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1514

else if (fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1515

r = dma_fence_wait_timeout(fence, true, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1516

if (r > 0 && fence->error)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1517

r = fence->error;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1518

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1545

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1559

fence = amdgpu_ctx_get_fence(ctx, entity, user->seq_no);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1562

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1570

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1575

fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1576

if (IS_ERR(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1577

return PTR_ERR(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1579

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1580

fence = dma_fence_get_stub();

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1584

r = drm_syncobj_create(&syncobj, 0, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1585

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1593

r = drm_syncobj_create(&syncobj, 0, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1594

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1604

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1608

sync_file = sync_file_create(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1609

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1620

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1643

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1646

fence = amdgpu_cs_get_fence(adev, filp, &fences[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1647

if (IS_ERR(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1648

return PTR_ERR(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1649

else if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1652

r = dma_fence_wait_timeout(fence, true, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1653

if (r > 0 && fence->error)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1654

r = fence->error;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1656

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1697

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1699

fence = amdgpu_cs_get_fence(adev, filp, &fences[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1700

if (IS_ERR(fence)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1701

r = PTR_ERR(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1703

} else if (fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1704

array[i] = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

416

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

430

fence = amdgpu_ctx_get_fence(ctx, entity, deps[i].handle);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

433

if (IS_ERR(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

434

return PTR_ERR(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

435

else if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

440

struct dma_fence *old = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

442

s_fence = to_drm_sched_fence(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

443

fence = dma_fence_get(&s_fence->scheduled);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

447

r = amdgpu_sync_fence(&p->sync, fence, GFP_KERNEL);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

448

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

459

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

462

r = drm_syncobj_find_fence(p->filp, handle, point, flags, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

469

r = amdgpu_sync_fence(&p->sync, fence, GFP_KERNEL);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

470

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.h

69

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

170

static ktime_t amdgpu_ctx_fence_time(struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

174

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

178

s_fence = to_drm_sched_fence(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

761

struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

772

dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

775

centity->fences[idx] = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

791

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

809

fence = dma_fence_get(centity->fences[seq & (amdgpu_sched_jobs - 1)]);

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

812

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h

80

struct dma_fence *fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1803

struct dma_fence *fence, **ptr;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1809

fence = rcu_dereference_protected(*ptr, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1812

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1815

fences[last_seq] = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1824

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1827

fence = fences[i];

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1828

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1830

dma_fence_signal(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1831

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1838

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1842

fence = sched->ops->run_job(s_job);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1843

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1853

struct dma_fence *fence, **ptr;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1869

fence = rcu_dereference_protected(*ptr, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1881

if (preempted && (&job->hw_fence->base) == fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

7441

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

7444

fence = dma_fence_get_rcu_safe(&adev->gang_submit);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

7446

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

104

struct dma_fence *fence = *f;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

106

if (fence == NULL)

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

111

if (!dma_fence_add_callback(fence, &work->cb,

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

115

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c

32

amdgpu_eviction_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

116

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

121

fence = &af->base;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

125

dma_fence_init(fence, &amdgpu_fence_ops,

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

151

to_amdgpu_fence(fence)->start_timestamp = ktime_get();

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

156

rcu_assign_pointer(*ptr, dma_fence_get(fence));

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

243

struct dma_fence *fence, **ptr;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

251

fence = rcu_dereference_protected(*ptr, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

254

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

261

am_fence = container_of(fence, struct amdgpu_fence, base);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

263

dma_fence_signal(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

264

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

300

struct dma_fence *fence, **ptr;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

308

fence = rcu_dereference(*ptr);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

309

if (!fence || !dma_fence_get_rcu(fence)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

315

r = dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

316

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

373

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

383

fence = drv->fences[last_seq];

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

384

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

388

to_amdgpu_fence(fence)->start_timestamp);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

404

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

407

fence = drv->fences[seq];

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

408

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

411

to_amdgpu_fence(fence)->start_timestamp = timestamp;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

671

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

673

fence = rcu_dereference_protected(drv->fences[i],

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

675

if (fence && !dma_fence_is_signaled_locked(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

676

dma_fence_set_error(fence, error);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

720

struct amdgpu_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

740

fence = container_of(unprocessed, struct amdgpu_fence, base);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

742

if (fence->reemitted > 1)

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

744

else if (fence == af)

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

745

dma_fence_set_error(&fence->base, -ETIME);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

746

else if (fence->context == af->context)

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

747

dma_fence_set_error(&fence->base, -ECANCELED);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

782

struct amdgpu_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

800

fence = container_of(unprocessed, struct amdgpu_fence, base);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

805

if (!fence->reemitted &&

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

806

(!guilty_fence || (fence->context != guilty_fence->context))) {

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

808

fence->wptr);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

809

} else if (!fence->reemitted) {

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

812

fence->fence_wptr_start,

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

813

fence->fence_wptr_end);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

815

wptr = fence->wptr;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

816

fence->reemitted++;

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

826

static const char *amdgpu_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

321

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

351

r = amdgpu_vm_clear_freed(adev, vm, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

355

if (r || !fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

358

amdgpu_bo_fence(bo, fence, true);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

359

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

53

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

72

ret = drm_syncobj_find_fence(filp, syncobj_handles[i], 0, 0, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

744

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

748

fence = dma_fence_get(vm->last_update);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

751

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

76

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

760

r = amdgpu_vm_clear_freed(adev, vm, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

79

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

799

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

802

fence = dma_fence_get(vm->last_update);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

804

fence = dma_fence_get(bo_va->last_pt_update);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

817

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

838

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

980

fence = amdgpu_gem_va_update_vm(adev, &fpriv->vm, bo_va,

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

983

if (timeline_syncobj && fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

987

fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

992

fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

996

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

712

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

757

fence = amdgpu_job_submit(job);

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

760

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

761

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

104

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

120

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

123

r = dma_resv_get_singleton(resv, DMA_RESV_USAGE_BOOKKEEP, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

127

if (!fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

135

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

136

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

140

if (dma_fence_add_callback(fence, &cb->cb,

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

142

amdgpu_pasid_free_cb(fence, &cb->cb);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

209

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

217

*fence = dma_fence_get(ring->vmid_wait);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

227

*fence = amdgpu_sync_peek_fence(&(*idle)->active, r);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

228

if (!(*fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

238

ring->vmid_wait = dma_fence_get(*fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

241

dma_fence_get(*fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

260

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

293

*fence = dma_fence_get(tmp);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

385

struct amdgpu_job *job, struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

395

r = amdgpu_vmid_grab_idle(ring, &idle, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

400

r = amdgpu_vmid_grab_reserved(vm, ring, job, &id, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

97

static void amdgpu_pasid_free_cb(struct dma_fence *fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h

87

struct amdgpu_job *job, struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

326

struct dma_fence *fence = &leader->base.s_fence->scheduled;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

335

dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

336

job->gang_submit = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

374

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

379

r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

394

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

402

fence = amdgpu_device_switch_gang(ring->adev, job->gang_submit);

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

403

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

404

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

407

fence = amdgpu_device_enforce_isolation(ring->adev, ring, job);

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

408

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

409

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

412

r = amdgpu_vmid_grab(job->vm, ring, job, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

417

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

431

struct dma_fence *fence = NULL, *finished;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

450

&fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

460

fence = r ? ERR_PTR(r) : fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

461

return fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.h

130

struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

189

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

218

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

219

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

234

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

237

r = amdgpu_jpeg_dec_set_reg(ring, 1, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

241

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

265

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1294

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1329

&fence, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1334

dma_resv_add_fence(&bo->base._resv, fence, DMA_RESV_USAGE_KERNEL);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1335

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1400

void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1409

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

1413

dma_resv_add_fence(resv, fence, shared ? DMA_RESV_USAGE_READ :

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

718

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

720

r = amdgpu_ttm_clear_buffer(bo, bo->tbo.base.resv, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

724

dma_resv_add_fence(bo->tbo.base.resv, fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

726

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

301

void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

346

struct dma_fence *fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

471

struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

479

if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

482

spin_lock_irqsave(fence->lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

483

if (!dma_fence_is_signaled_locked(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

484

dma_fence_set_error(fence, -ENODATA);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

485

spin_unlock_irqrestore(fence->lock, flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

487

while (!dma_fence_is_signaled(fence) &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

491

ret = dma_fence_is_signaled(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

480

struct dma_fence *fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c

102

drm_suballoc_free(*sa_bo, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c

96

void amdgpu_sa_bo_free(struct drm_suballoc **sa_bo, struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

115

struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

117

if (*keep && dma_fence_is_later(*keep, fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

121

*keep = dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

138

if (dma_fence_is_signaled(e->fence)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

139

dma_fence_put(e->fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

140

e->fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

144

if (likely(e->fence->context == f->context)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

145

amdgpu_sync_keep_later(&e->fence, f);

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

177

e->fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

303

dma_fence_put(e->fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

324

struct dma_fence *f = e->fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

365

f = e->fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

395

f = e->fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

40

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

442

f = e->fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

465

r = dma_fence_wait(e->fence, intr);

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

173

__field(struct dma_fence *, fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

474

TP_PROTO(struct amdgpu_ring *ring, struct dma_fence *fence),

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

475

TP_ARGS(ring, fence),

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

483

__entry->seqno = fence->seqno;

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

546

TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence),

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

547

TP_ARGS(sched_job, fence),

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

550

__field(struct dma_fence *, fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

557

__entry->fence = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

558

__entry->ctx = fence->context;

drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

559

__entry->seqno = fence->seqno;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

1547

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

1584

fence = amdgpu_ttm_job_submit(adev, job, num_dw);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

1587

if (!dma_fence_wait_timeout(fence, false, adev->sdma_timeout))

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

1589

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2396

struct dma_fence **fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2433

*fence = amdgpu_ttm_job_submit(adev, job, num_dw);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2448

struct dma_fence **fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2476

*fence = amdgpu_ttm_job_submit(adev, job, num_dw);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2493

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2503

if (!fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2506

*fence = dma_fence_get_stub();

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2535

dma_fence_put(*fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2536

*fence = next;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2554

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2585

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2586

fence = next;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2593

*f = dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

2594

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

302

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

364

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

365

fence = next;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

372

*f = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

390

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

405

bo->base.resv, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

421

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

422

fence = wipe_fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

428

r = ttm_bo_move_accel_cleanup(bo, fence, true, false, new_mem);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

430

r = ttm_bo_move_accel_cleanup(bo, fence, evict, true, new_mem);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

431

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

435

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

436

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

437

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

181

struct dma_fence **fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

185

struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c

156

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c

163

fence = READ_ONCE(queue->hang_detect_fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c

165

if (!fence || dma_fence_is_signaled(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

157

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

169

fence = &userq_fence->base;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

171

if (rptr < fence->seqno)

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

174

dma_fence_signal(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

180

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

192

struct amdgpu_userq_fence *fence, *tmp;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

198

list_for_each_entry_safe(fence, tmp, &fence_drv->fences, link) {

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

199

f = &fence->base;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

206

list_del(&fence->link);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

243

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

252

fence = &userq_fence->base;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

255

dma_fence_init64(fence, &amdgpu_userq_fence_ops, &userq_fence->lock,

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

259

dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

291

if (!dma_fence_is_signaled(fence))

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

294

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

298

*f = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

310

struct amdgpu_userq_fence *fence = to_amdgpu_userq_fence(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

312

return fence->fence_drv->timeline_name;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

317

struct amdgpu_userq_fence *fence = to_amdgpu_userq_fence(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

318

struct amdgpu_userq_fence_driver *fence_drv = fence->fence_drv;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

322

wptr = fence->base.seqno;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

332

struct dma_fence *fence = container_of(rcu, struct dma_fence, rcu);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

333

struct amdgpu_userq_fence *userq_fence = to_amdgpu_userq_fence(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

421

static void amdgpu_userq_fence_cleanup(struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

423

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

427

amdgpu_userq_fence_driver_set_error(struct amdgpu_userq_fence *fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

430

struct amdgpu_userq_fence_driver *fence_drv = fence->fence_drv;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

436

f = rcu_dereference_protected(&fence->base,

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

449

struct amdgpu_userq_fence *fence = to_amdgpu_userq_fence(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

450

struct amdgpu_userq_fence_driver *fence_drv = fence->fence_drv;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

451

u64 wptr = fence->base.seqno;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

453

amdgpu_userq_fence_driver_set_error(fence, -ECANCELED);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

476

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

574

r = amdgpu_userq_fence_create(queue, userq_fence, wptr, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

582

queue->last_fence = dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

594

amdgpu_userq_fence_cleanup(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

601

amdgpu_userq_fence_cleanup(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

610

dma_resv_add_fence(gobj_read[i]->resv, fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

618

dma_resv_add_fence(gobj_write[i]->resv, fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

624

drm_syncobj_replace_fence(syncobj[i], fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

627

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

770

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

777

&fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

781

dma_fence_unwrap_for_each(f, &iter, fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

784

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

790

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

795

&fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

800

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

806

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

809

DMA_RESV_USAGE_READ, fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

815

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

818

DMA_RESV_USAGE_WRITE, fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

847

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

850

DMA_RESV_USAGE_READ, fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

856

fences[num_fences++] = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

857

dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

864

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

867

DMA_RESV_USAGE_WRITE, fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

873

fences[num_fences++] = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

874

dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

880

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

887

&fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

891

dma_fence_unwrap_for_each(f, &iter, fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

894

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

902

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

908

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

913

&fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

919

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

923

fences[num_fences++] = fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1127

bool direct, struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1187

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1188

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1203

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1226

return amdgpu_uvd_send_msg(ring, bo, true, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1231

bool direct, struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1255

r = amdgpu_uvd_send_msg(ring, bo, direct, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1331

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1334

r = amdgpu_uvd_get_create_msg(ring, 1, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1338

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1339

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1345

r = amdgpu_uvd_get_destroy_msg(ring, 1, true, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1349

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1355

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

530

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

533

&fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

539

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

540

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h

81

struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h

83

bool direct, struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

1190

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

1201

r = amdgpu_vce_get_destroy_msg(ring, 1, true, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

1205

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

1212

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

481

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

552

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

553

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

573

bool direct, struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

620

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

621

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

92

struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

94

bool direct, struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

1046

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

1047

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

1060

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

1075

r = amdgpu_vcn_enc_get_destroy_msg(ring, 1, &ib, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

1079

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

1086

amdgpu_ib_free(&ib, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

1087

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

464

unsigned int fences = 0, fence[AMDGPU_MAX_VCN_INSTANCES] = {0};

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

471

fence[i] += amdgpu_fence_count_emitted(&vcn_inst->ring_enc[j]);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

478

if (fence[i] ||

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

487

fence[i] += amdgpu_fence_count_emitted(&vcn_inst->ring_dec);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

488

fences += fence[i];

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

620

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

654

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

655

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

731

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

746

r = amdgpu_vcn_dec_send_msg(ring, &ib, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

750

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

756

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

793

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

847

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

848

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

862

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

877

r = amdgpu_vcn_dec_sw_send_msg(ring, &ib, &fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

881

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

887

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

925

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

979

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

980

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

992

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1031

static void amdgpu_vm_tlb_seq_cb(struct dma_fence *fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1052

struct dma_fence **fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1058

if (!fence || !*fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1063

if (!dma_fence_add_callback(*fence, &tlb_cb->cb,

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1066

vm->last_tlb_flush = dma_fence_get(*fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1076

amdgpu_vm_tlb_fence_create(params->adev, vm, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1079

dma_resv_add_fence(vm->root.bo->tbo.base.resv, *fence,

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1114

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1224

r = vm->update_funcs->commit(&params, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1229

amdgpu_vm_tlb_flush(&params, fence, tlb_cb);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1455

static void amdgpu_vm_prt_cb(struct dma_fence *fence, struct dma_fence_cb *_cb)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1470

struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1480

if (fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1481

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1486

if (!fence || dma_fence_add_callback(fence, &cb->cb,

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1488

amdgpu_vm_prt_cb(fence, &cb->cb);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1505

struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1508

amdgpu_vm_add_prt_cb(adev, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1524

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1526

dma_resv_for_each_fence(&cursor, resv, DMA_RESV_USAGE_BOOKKEEP, fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1529

amdgpu_vm_add_prt_cb(adev, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1550

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1583

if (fence && f) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1584

dma_fence_put(*fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

1585

*fence = f;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

785

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

851

fence = &job->hw_vm_fence->base;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

853

dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

859

id->last_flush = dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

869

id->pasid_mapping = dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

878

trace_amdgpu_cleaner_shader(ring, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

881

isolation->spearhead = dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

884

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

318

struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

523

struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

539

struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

686

struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c

109

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

107

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

135

if (fence && !p->immediate) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

142

swap(*fence, f);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

227

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

233

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

234

dma_fence_get(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

235

r = drm_sched_job_add_dependency(&p->job->base, fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

237

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c

110

*fence = &f->base;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c

41

static const char *amdgpu_tlb_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c

79

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c

89

if (*fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c

90

dma_fence_wait(*fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c

93

*fence = dma_fence_get_stub();

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c

98

f->dependency = *fence;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

641

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

666

wb_ib.gpu_addr, pattern, &fence);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

673

r = dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

691

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

210

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

252

if (fence)

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

253

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

275

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

317

if (fence)

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

318

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

336

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

344

r = uvd_v6_0_enc_get_destroy_msg(ring, 1, bo, &fence);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

348

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

355

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

218

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

260

if (fence)

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

261

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

282

struct dma_fence **fence)

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

324

if (fence)

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

325

*fence = dma_fence_get(f);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

343

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

351

r = uvd_v7_0_enc_get_destroy_msg(ring, 1, bo, &fence);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

355

r = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

362

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

117

unsigned int fences = 0, fence[AMDGPU_MAX_VCN_INSTANCES] = {0};

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

127

fence[i] += amdgpu_fence_count_emitted(&v->ring_enc[j]);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

134

if (fence[i] ||

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

143

fence[i] += amdgpu_fence_count_emitted(&v->ring_dec);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

144

fences += fence[i];

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1887

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1894

fence = amdgpu_ctx_get_fence(p->ctx, job->base.entity, ~0ull);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1895

if (fence) {

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1896

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1897

dma_fence_put(fence);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1804

struct dma_fence *fence;

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1811

fence = amdgpu_ctx_get_fence(p->ctx, job->base.entity, ~0ull);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1812

if (fence) {

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1813

dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1814

dma_fence_put(fence);

drivers/gpu/drm/amd/amdkfd/kfd_device.c

1232

u16 context_id, struct dma_fence *fence)

drivers/gpu/drm/amd/amdkfd/kfd_device.c

1238

if (!fence)

drivers/gpu/drm/amd/amdkfd/kfd_device.c

1241

if (dma_fence_is_signaled(fence))

drivers/gpu/drm/amd/amdkfd/kfd_device.c

1248

if (fence->seqno == p->last_eviction_seqno)

drivers/gpu/drm/amd/amdkfd/kfd_device.c

1251

p->last_eviction_seqno = fence->seqno;

drivers/gpu/drm/amd/amdkfd/kfd_migrate.c

56

struct dma_fence *fence;

drivers/gpu/drm/amd/amdkfd/kfd_migrate.c

96

fence = amdgpu_job_submit(job);

drivers/gpu/drm/amd/amdkfd/kfd_migrate.c

97

dma_fence_put(fence);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1355

struct dma_fence **fence)

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1368

fence);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1376

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1407

start, last, &fence);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1411

if (fence) {

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1412

r = dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1413

dma_fence_put(fence);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1414

fence = NULL;

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1428

struct dma_fence **fence, bool flush_tlb)

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1502

if (fence)

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1503

*fence = dma_fence_get(vm->last_update);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1517

struct dma_fence *fence = NULL;

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1545

bo_adev, wait ? &fence : NULL,

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1550

if (fence) {

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1551

r = dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1552

dma_fence_put(fence);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

1553

fence = NULL;

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

3614

int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

3623

if (svm_bo_ref_unless_zero(fence->svm_bo)) {

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

3624

WRITE_ONCE(fence->svm_bo->evicting, 1);

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

3625

schedule_work(&fence->svm_bo->eviction_work);

drivers/gpu/drm/amd/amdkfd/kfd_svm.h

178

int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence);

drivers/gpu/drm/amd/amdkfd/kfd_svm.h

233

struct amdgpu_amdkfd_fence *fence)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

238

__field(const struct dma_fence *, fence)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

267

__entry->fence = state->fence;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

300

__entry->fb_modifier, __entry->fence, __entry->crtc_x,

drivers/gpu/drm/drm_atomic_helper.c

1807

if (!new_plane_state->fence)

drivers/gpu/drm/drm_atomic_helper.c

1809

dma_fence_set_deadline(new_plane_state->fence, vbltime);

drivers/gpu/drm/drm_atomic_helper.c

1845

if (!new_plane_state->fence)

drivers/gpu/drm/drm_atomic_helper.c

1855

ret = dma_fence_wait(new_plane_state->fence, pre_swap);

drivers/gpu/drm/drm_atomic_helper.c

1859

dma_fence_put(new_plane_state->fence);

drivers/gpu/drm/drm_atomic_helper.c

1860

new_plane_state->fence = NULL;

drivers/gpu/drm/drm_atomic_helper.c

2150

if (new_plane_state->fence) {

drivers/gpu/drm/drm_atomic_state_helper.c

358

state->fence = NULL;

drivers/gpu/drm/drm_atomic_state_helper.c

401

if (state->fence)

drivers/gpu/drm/drm_atomic_state_helper.c

402

dma_fence_put(state->fence);

drivers/gpu/drm/drm_atomic_uapi.c

1356

struct dma_fence *fence)

drivers/gpu/drm/drm_atomic_uapi.c

1365

fence_state->sync_file = sync_file_create(fence);

drivers/gpu/drm/drm_atomic_uapi.c

1419

struct dma_fence *fence;

drivers/gpu/drm/drm_atomic_uapi.c

1432

fence = drm_crtc_create_fence(crtc);

drivers/gpu/drm/drm_atomic_uapi.c

1433

if (!fence)

drivers/gpu/drm/drm_atomic_uapi.c

1436

ret = setup_out_fence(&f[(*num_fences)++], fence);

drivers/gpu/drm/drm_atomic_uapi.c

1438

dma_fence_put(fence);

drivers/gpu/drm/drm_atomic_uapi.c

1442

crtc_state->event->base.fence = fence;

drivers/gpu/drm/drm_atomic_uapi.c

1451

struct dma_fence *fence;

drivers/gpu/drm/drm_atomic_uapi.c

1472

fence = drm_writeback_get_out_fence(wb_conn);

drivers/gpu/drm/drm_atomic_uapi.c

1473

if (!fence)

drivers/gpu/drm/drm_atomic_uapi.c

1476

ret = setup_out_fence(&f[(*num_fences)++], fence);

drivers/gpu/drm/drm_atomic_uapi.c

1478

dma_fence_put(fence);

drivers/gpu/drm/drm_atomic_uapi.c

1482

conn_state->writeback_job->out_fence = fence;

drivers/gpu/drm/drm_atomic_uapi.c

1523

if (event && (event->base.fence || event->base.file_priv)) {

drivers/gpu/drm/drm_atomic_uapi.c

540

if (state->fence)

drivers/gpu/drm/drm_atomic_uapi.c

546

state->fence = sync_file_get_fence(val);

drivers/gpu/drm/drm_atomic_uapi.c

547

if (!state->fence)

drivers/gpu/drm/drm_crtc.c

159

static struct drm_crtc *fence_to_crtc(struct dma_fence *fence)

drivers/gpu/drm/drm_crtc.c

161

BUG_ON(fence->ops != &drm_crtc_fence_ops);

drivers/gpu/drm/drm_crtc.c

162

return container_of(fence->lock, struct drm_crtc, fence_lock);

drivers/gpu/drm/drm_crtc.c

165

static const char *drm_crtc_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/drm_crtc.c

167

struct drm_crtc *crtc = fence_to_crtc(fence);

drivers/gpu/drm/drm_crtc.c

172

static const char *drm_crtc_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/drm_crtc.c

174

struct drm_crtc *crtc = fence_to_crtc(fence);

drivers/gpu/drm/drm_crtc.c

186

struct dma_fence *fence;

drivers/gpu/drm/drm_crtc.c

188

fence = kzalloc_obj(*fence);

drivers/gpu/drm/drm_crtc.c

189

if (!fence)

drivers/gpu/drm/drm_crtc.c

192

dma_fence_init(fence, &drm_crtc_fence_ops, &crtc->fence_lock,

drivers/gpu/drm/drm_crtc.c

195

return fence;

drivers/gpu/drm/drm_file.c

739

if (p->fence)

drivers/gpu/drm/drm_file.c

740

dma_fence_put(p->fence);

drivers/gpu/drm/drm_file.c

757

if (e->fence) {

drivers/gpu/drm/drm_file.c

759

dma_fence_signal_timestamp(e->fence, timestamp);

drivers/gpu/drm/drm_file.c

761

dma_fence_signal(e->fence);

drivers/gpu/drm/drm_file.c

762

dma_fence_put(e->fence);

drivers/gpu/drm/drm_gem_atomic_helper.c

139

struct dma_fence *fence = dma_fence_get(state->fence);

drivers/gpu/drm/drm_gem_atomic_helper.c

160

usage = fence ? DMA_RESV_USAGE_KERNEL : DMA_RESV_USAGE_WRITE;

drivers/gpu/drm/drm_gem_atomic_helper.c

175

if (new && fence) {

drivers/gpu/drm/drm_gem_atomic_helper.c

183

dma_fence_chain_init(chain, fence, new, 1);

drivers/gpu/drm/drm_gem_atomic_helper.c

184

fence = &chain->base;

drivers/gpu/drm/drm_gem_atomic_helper.c

187

fence = new;

drivers/gpu/drm/drm_gem_atomic_helper.c

191

dma_fence_put(state->fence);

drivers/gpu/drm/drm_gem_atomic_helper.c

192

state->fence = fence;

drivers/gpu/drm/drm_gem_atomic_helper.c

196

dma_fence_put(fence);

drivers/gpu/drm/drm_gpuvm.c

1548

struct dma_fence *fence,

drivers/gpu/drm/drm_gpuvm.c

1557

dma_resv_add_fence(obj->resv, fence,

drivers/gpu/drm/drm_suballoc.c

125

dma_fence_put(sa->fence);

drivers/gpu/drm/drm_suballoc.c

138

if (!sa->fence || !dma_fence_is_signaled(sa->fence))

drivers/gpu/drm/drm_suballoc.c

258

if (!dma_fence_is_signaled(sa->fence)) {

drivers/gpu/drm/drm_suballoc.c

259

fences[i] = sa->fence;

drivers/gpu/drm/drm_suballoc.c

336

sa->fence = NULL;

drivers/gpu/drm/drm_suballoc.c

401

struct dma_fence *fence)

drivers/gpu/drm/drm_suballoc.c

411

if (fence && !dma_fence_is_signaled(fence)) {

drivers/gpu/drm/drm_suballoc.c

414

suballoc->fence = dma_fence_get(fence);

drivers/gpu/drm/drm_suballoc.c

415

idx = fence->context & (DRM_SUBALLOC_MAX_QUEUES - 1);

drivers/gpu/drm/drm_suballoc.c

446

if (i->fence)

drivers/gpu/drm/drm_suballoc.c

448

(unsigned long long)i->fence->seqno,

drivers/gpu/drm/drm_suballoc.c

449

(unsigned long long)i->fence->context);

drivers/gpu/drm/drm_syncobj.c

1002

static void syncobj_wait_fence_func(struct dma_fence *fence,

drivers/gpu/drm/drm_syncobj.c

1014

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

1017

fence = rcu_dereference_protected(syncobj->fence,

drivers/gpu/drm/drm_syncobj.c

1019

dma_fence_get(fence);

drivers/gpu/drm/drm_syncobj.c

1020

if (!fence || dma_fence_chain_find_seqno(&fence, wait->point)) {

drivers/gpu/drm/drm_syncobj.c

1021

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

1023

} else if (!fence) {

drivers/gpu/drm/drm_syncobj.c

1024

wait->fence = dma_fence_get_stub();

drivers/gpu/drm/drm_syncobj.c

1026

wait->fence = fence;

drivers/gpu/drm/drm_syncobj.c

1042

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

1077

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

1081

fence = drm_syncobj_fence_get(syncobjs[i]);

drivers/gpu/drm/drm_syncobj.c

1082

if (!fence || dma_fence_chain_find_seqno(&fence, points[i])) {

drivers/gpu/drm/drm_syncobj.c

1083

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

1093

if (fence)

drivers/gpu/drm/drm_syncobj.c

1094

entries[i].fence = fence;

drivers/gpu/drm/drm_syncobj.c

1096

entries[i].fence = dma_fence_get_stub();

drivers/gpu/drm/drm_syncobj.c

1099

dma_fence_is_signaled(entries[i].fence)) {

drivers/gpu/drm/drm_syncobj.c

1126

fence = entries[i].fence;

drivers/gpu/drm/drm_syncobj.c

1127

if (!fence)

drivers/gpu/drm/drm_syncobj.c

1129

dma_fence_set_deadline(fence, *deadline);

drivers/gpu/drm/drm_syncobj.c

1138

fence = entries[i].fence;

drivers/gpu/drm/drm_syncobj.c

1139

if (!fence)

drivers/gpu/drm/drm_syncobj.c

1143

dma_fence_is_signaled(fence) ||

drivers/gpu/drm/drm_syncobj.c

1145

dma_fence_add_callback(fence,

drivers/gpu/drm/drm_syncobj.c

1182

dma_fence_remove_callback(entries[i].fence,

drivers/gpu/drm/drm_syncobj.c

1184

dma_fence_put(entries[i].fence);

drivers/gpu/drm/drm_syncobj.c

1407

static void syncobj_eventfd_entry_fence_func(struct dma_fence *fence,

drivers/gpu/drm/drm_syncobj.c

1422

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

1425

fence = dma_fence_get(rcu_dereference_protected(syncobj->fence, 1));

drivers/gpu/drm/drm_syncobj.c

1426

if (!fence)

drivers/gpu/drm/drm_syncobj.c

1429

ret = dma_fence_chain_find_seqno(&fence, entry->point);

drivers/gpu/drm/drm_syncobj.c

1432

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

1434

} else if (!fence) {

drivers/gpu/drm/drm_syncobj.c

1440

fence = dma_fence_get_stub();

drivers/gpu/drm/drm_syncobj.c

1444

entry->fence = fence;

drivers/gpu/drm/drm_syncobj.c

1450

ret = dma_fence_add_callback(fence, &entry->fence_cb,

drivers/gpu/drm/drm_syncobj.c

1636

struct dma_fence *fence = dma_fence_get_stub();

drivers/gpu/drm/drm_syncobj.c

1639

fence, points[i]);

drivers/gpu/drm/drm_syncobj.c

1640

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

1679

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

1682

fence = drm_syncobj_fence_get(syncobjs[i]);

drivers/gpu/drm/drm_syncobj.c

1683

chain = to_dma_fence_chain(fence);

drivers/gpu/drm/drm_syncobj.c

1686

dma_fence_get(fence);

drivers/gpu/drm/drm_syncobj.c

1690

point = fence->seqno;

drivers/gpu/drm/drm_syncobj.c

1692

dma_fence_chain_for_each(iter, fence) {

drivers/gpu/drm/drm_syncobj.c

1693

if (iter->context != fence->context) {

drivers/gpu/drm/drm_syncobj.c

1710

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

218

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

228

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

269

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

271

if (wait->fence)

drivers/gpu/drm/drm_syncobj.c

279

fence = dma_fence_get(rcu_dereference_protected(syncobj->fence, 1));

drivers/gpu/drm/drm_syncobj.c

280

if (!fence || dma_fence_chain_find_seqno(&fence, wait->point)) {

drivers/gpu/drm/drm_syncobj.c

281

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

283

} else if (!fence) {

drivers/gpu/drm/drm_syncobj.c

284

wait->fence = dma_fence_get_stub();

drivers/gpu/drm/drm_syncobj.c

286

wait->fence = fence;

drivers/gpu/drm/drm_syncobj.c

306

dma_fence_put(entry->fence);

drivers/gpu/drm/drm_syncobj.c

335

struct dma_fence *fence,

drivers/gpu/drm/drm_syncobj.c

342

dma_fence_get(fence);

drivers/gpu/drm/drm_syncobj.c

350

dma_fence_chain_init(chain, prev, fence, point);

drivers/gpu/drm/drm_syncobj.c

351

rcu_assign_pointer(syncobj->fence, &chain->base);

drivers/gpu/drm/drm_syncobj.c

360

dma_fence_chain_for_each(fence, prev);

drivers/gpu/drm/drm_syncobj.c

373

struct dma_fence *fence)

drivers/gpu/drm/drm_syncobj.c

379

if (fence)

drivers/gpu/drm/drm_syncobj.c

380

dma_fence_get(fence);

drivers/gpu/drm/drm_syncobj.c

384

old_fence = rcu_dereference_protected(syncobj->fence,

drivers/gpu/drm/drm_syncobj.c

386

rcu_assign_pointer(syncobj->fence, fence);

drivers/gpu/drm/drm_syncobj.c

388

if (fence != old_fence) {

drivers/gpu/drm/drm_syncobj.c

409

struct dma_fence *fence = dma_fence_allocate_private_stub(ktime_get());

drivers/gpu/drm/drm_syncobj.c

411

if (!fence)

drivers/gpu/drm/drm_syncobj.c

414

drm_syncobj_replace_fence(syncobj, fence);

drivers/gpu/drm/drm_syncobj.c

415

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

438

struct dma_fence **fence)

drivers/gpu/drm/drm_syncobj.c

460

*fence = drm_syncobj_fence_get(syncobj);

drivers/gpu/drm/drm_syncobj.c

462

if (*fence) {

drivers/gpu/drm/drm_syncobj.c

463

ret = dma_fence_chain_find_seqno(fence, point);

drivers/gpu/drm/drm_syncobj.c

470

if (!*fence)

drivers/gpu/drm/drm_syncobj.c

471

*fence = dma_fence_get_stub();

drivers/gpu/drm/drm_syncobj.c

475

dma_fence_put(*fence);

drivers/gpu/drm/drm_syncobj.c

490

if (wait.fence) {

drivers/gpu/drm/drm_syncobj.c

508

*fence = wait.fence;

drivers/gpu/drm/drm_syncobj.c

555

struct dma_fence *fence)

drivers/gpu/drm/drm_syncobj.c

577

if (fence)

drivers/gpu/drm/drm_syncobj.c

578

drm_syncobj_replace_fence(syncobj, fence);

drivers/gpu/drm/drm_syncobj.c

729

struct dma_fence *fence = sync_file_get_fence(fd);

drivers/gpu/drm/drm_syncobj.c

732

if (!fence)

drivers/gpu/drm/drm_syncobj.c

737

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

747

drm_syncobj_add_point(syncobj, chain, fence, point);

drivers/gpu/drm/drm_syncobj.c

749

drm_syncobj_replace_fence(syncobj, fence);

drivers/gpu/drm/drm_syncobj.c

752

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

761

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

768

ret = drm_syncobj_find_fence(file_private, handle, point, 0, &fence);

drivers/gpu/drm/drm_syncobj.c

772

sync_file = sync_file_create(fence);

drivers/gpu/drm/drm_syncobj.c

774

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

923

struct dma_fence *fence, *tmp;

drivers/gpu/drm/drm_syncobj.c

937

fence = dma_fence_unwrap_merge(tmp);

drivers/gpu/drm/drm_syncobj.c

939

if (!fence) {

drivers/gpu/drm/drm_syncobj.c

950

drm_syncobj_add_point(timeline_syncobj, chain, fence, args->dst_point);

drivers/gpu/drm/drm_syncobj.c

952

dma_fence_put(fence);

drivers/gpu/drm/drm_syncobj.c

964

struct dma_fence *fence;

drivers/gpu/drm/drm_syncobj.c

971

args->src_point, args->flags, &fence);

drivers/gpu/drm/drm_syncobj.c

974

drm_syncobj_replace_fence(binary_syncobj, fence);

drivers/gpu/drm/drm_syncobj.c

975

dma_fence_put(fence);

drivers/gpu/drm/drm_writeback.c

100

fence_to_wb_connector(fence);

drivers/gpu/drm/drm_writeback.c

577

struct dma_fence *fence;

drivers/gpu/drm/drm_writeback.c

583

fence = kzalloc_obj(*fence);

drivers/gpu/drm/drm_writeback.c

584

if (!fence)

drivers/gpu/drm/drm_writeback.c

587

dma_fence_init(fence, &drm_writeback_fence_ops,

drivers/gpu/drm/drm_writeback.c

591

return fence;

drivers/gpu/drm/drm_writeback.c

88

static const char *drm_writeback_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/drm_writeback.c

91

fence_to_wb_connector(fence);

drivers/gpu/drm/drm_writeback.c

97

drm_writeback_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/etnaviv/etnaviv_drv.c

380

return etnaviv_gpu_wait_fence_interruptible(gpu, args->fence,

drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c

615

args->fence = submit->out_fence_id;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1139

static inline struct etnaviv_fence *to_etnaviv_fence(struct dma_fence *fence)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1141

return container_of(fence, struct etnaviv_fence, base);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1144

static const char *etnaviv_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1149

static const char *etnaviv_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1151

struct etnaviv_fence *f = to_etnaviv_fence(fence);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1156

static bool etnaviv_fence_signaled(struct dma_fence *fence)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1158

struct etnaviv_fence *f = to_etnaviv_fence(fence);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1163

static void etnaviv_fence_release(struct dma_fence *fence)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1165

struct etnaviv_fence *f = to_etnaviv_fence(fence);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1281

struct dma_fence *fence;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1290

fence = xa_load(&gpu->user_fences, id);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1291

if (fence)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1292

fence = dma_fence_get_rcu(fence);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1295

if (!fence)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1300

ret = dma_fence_is_signaled(fence) ? 0 : -EBUSY;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1304

ret = dma_fence_wait_timeout(fence, true, remaining);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1312

dma_fence_put(fence);

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1454

gpu->event[event[0]].fence = gpu_fence;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1603

struct dma_fence *fence;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1616

fence = gpu->event[event].fence;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1617

if (!fence)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1620

gpu->event[event].fence = NULL;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1631

if (fence_after(fence->seqno, gpu->completed_fence))

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1632

gpu->completed_fence = fence->seqno;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

1633

dma_fence_signal_timestamp(fence, now);

drivers/gpu/drm/etnaviv/etnaviv_gpu.h

219

u32 fence, struct drm_etnaviv_timespec *timeout);

drivers/gpu/drm/etnaviv/etnaviv_gpu.h

87

struct dma_fence *fence;

drivers/gpu/drm/etnaviv/etnaviv_sched.c

24

struct dma_fence *fence = NULL;

drivers/gpu/drm/etnaviv/etnaviv_sched.c

27

fence = etnaviv_gpu_submit(submit);

drivers/gpu/drm/etnaviv/etnaviv_sched.c

31

return fence;

drivers/gpu/drm/i915/display/intel_display.c

7178

if (new_plane_state->fence) {

drivers/gpu/drm/i915/display/intel_display.c

7179

ret = dma_fence_wait_timeout(new_plane_state->fence, false,

drivers/gpu/drm/i915/display/intel_display.c

7184

dma_fence_put(new_plane_state->fence);

drivers/gpu/drm/i915/display/intel_display.c

7185

new_plane_state->fence = NULL;

drivers/gpu/drm/i915/display/intel_display_rps.c

22

struct dma_fence *fence;

drivers/gpu/drm/i915/display/intel_display_rps.c

36

intel_parent_rps_boost_if_not_started(display, wait->fence);

drivers/gpu/drm/i915/display/intel_display_rps.c

38

dma_fence_put(wait->fence);

drivers/gpu/drm/i915/display/intel_display_rps.c

48

struct dma_fence *fence)

drivers/gpu/drm/i915/display/intel_display_rps.c

68

wait->fence = dma_fence_get(fence);

drivers/gpu/drm/i915/display/intel_display_rps.h

17

struct dma_fence *fence);

drivers/gpu/drm/i915/display/intel_fb.c

2161

struct dma_fence *fence;

drivers/gpu/drm/i915/display/intel_fb.c

2172

&fence);

drivers/gpu/drm/i915/display/intel_fb.c

2173

if (ret || !fence)

drivers/gpu/drm/i915/display/intel_fb.c

2178

dma_fence_put(fence);

drivers/gpu/drm/i915/display/intel_fb.c

2187

ret = dma_fence_add_callback(fence, &cb->base,

drivers/gpu/drm/i915/display/intel_fb.c

2190

intel_user_framebuffer_fence_wake(fence, &cb->base);

drivers/gpu/drm/i915/display/intel_fb_pin.c

204

if (vma->fence)

drivers/gpu/drm/i915/display/intel_fbc_regs.h

121

#define SNB_DPFC_FENCENO(fence) REG_FIELD_PREP(SNB_DPFC_FENCENO_MASK, (fence))

drivers/gpu/drm/i915/display/intel_fbc_regs.h

75

#define DPFC_CTL_FENCENO(fence) REG_FIELD_PREP(DPFC_CTL_FENCENO_MASK, (fence))

drivers/gpu/drm/i915/display/intel_parent.c

101

void intel_parent_rps_boost_if_not_started(struct intel_display *display, struct dma_fence *fence)

drivers/gpu/drm/i915/display/intel_parent.c

104

display->parent->rps->boost_if_not_started(fence);

drivers/gpu/drm/i915/display/intel_parent.c

195

void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence)

drivers/gpu/drm/i915/display/intel_parent.c

198

display->parent->fence_priority_display(fence);

drivers/gpu/drm/i915/display/intel_parent.h

41

void intel_parent_rps_boost_if_not_started(struct intel_display *display, struct dma_fence *fence);

drivers/gpu/drm/i915/display/intel_parent.h

68

void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence);

drivers/gpu/drm/i915/display/intel_plane.c

1152

struct dma_fence *fence = dma_fence_get(new_plane_state->fence);

drivers/gpu/drm/i915/display/intel_plane.c

1160

if (new && fence) {

drivers/gpu/drm/i915/display/intel_plane.c

1168

dma_fence_chain_init(chain, fence, new, 1);

drivers/gpu/drm/i915/display/intel_plane.c

1169

fence = &chain->base;

drivers/gpu/drm/i915/display/intel_plane.c

1172

fence = new;

drivers/gpu/drm/i915/display/intel_plane.c

1175

dma_fence_put(new_plane_state->fence);

drivers/gpu/drm/i915/display/intel_plane.c

1176

new_plane_state->fence = fence;

drivers/gpu/drm/i915/display/intel_plane.c

1180

dma_fence_put(fence);

drivers/gpu/drm/i915/display/intel_plane.c

1247

if (new_plane_state->uapi.fence) {

drivers/gpu/drm/i915/display/intel_plane.c

1248

intel_parent_fence_priority_display(display, new_plane_state->uapi.fence);

drivers/gpu/drm/i915/display/intel_plane.c

1250

new_plane_state->uapi.fence);

drivers/gpu/drm/i915/gem/i915_gem_busy.c

103

busy_check_writer(struct dma_fence *fence)

drivers/gpu/drm/i915/gem/i915_gem_busy.c

105

if (!fence)

drivers/gpu/drm/i915/gem/i915_gem_busy.c

108

return __busy_set_if_active(fence, __busy_write_id);

drivers/gpu/drm/i915/gem/i915_gem_busy.c

118

struct dma_fence *fence;

drivers/gpu/drm/i915/gem/i915_gem_busy.c

146

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/gpu/drm/i915/gem/i915_gem_busy.c

152

args->busy |= busy_check_writer(fence);

drivers/gpu/drm/i915/gem/i915_gem_busy.c

155

args->busy |= busy_check_reader(fence);

drivers/gpu/drm/i915/gem/i915_gem_busy.c

40

__busy_set_if_active(struct dma_fence *fence, u32 (*flag)(u16 id))

drivers/gpu/drm/i915/gem/i915_gem_busy.c

60

if (dma_fence_is_array(fence)) {

drivers/gpu/drm/i915/gem/i915_gem_busy.c

61

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/gpu/drm/i915/gem/i915_gem_busy.c

83

if (!dma_fence_is_i915(fence))

drivers/gpu/drm/i915/gem/i915_gem_busy.c

86

rq = to_request(fence);

drivers/gpu/drm/i915/gem/i915_gem_busy.c

97

busy_check_reader(struct dma_fence *fence)

drivers/gpu/drm/i915/gem/i915_gem_busy.c

99

return __busy_set_if_active(fence, __busy_read_flag);

drivers/gpu/drm/i915/gem/i915_gem_context.c

1049

i915_sw_fence_fini(&engines->fence);

drivers/gpu/drm/i915/gem/i915_gem_context.c

1073

engines_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)

drivers/gpu/drm/i915/gem/i915_gem_context.c

1076

container_of(fence, typeof(*engines), fence);

drivers/gpu/drm/i915/gem/i915_gem_context.c

1110

i915_sw_fence_init(&e->fence, engines_notify);

drivers/gpu/drm/i915/gem/i915_gem_context.c

1438

if (!i915_sw_fence_await(&pos->fence)) {

drivers/gpu/drm/i915/gem/i915_gem_context.c

1449

GEM_BUG_ON(i915_sw_fence_signaled(&pos->fence));

drivers/gpu/drm/i915/gem/i915_gem_context.c

1453

i915_sw_fence_complete(&pos->fence);

drivers/gpu/drm/i915/gem/i915_gem_context.c

1477

err = i915_sw_fence_await_active(&engines->fence,

drivers/gpu/drm/i915/gem/i915_gem_context.c

1495

i915_sw_fence_commit(&engines->fence);

drivers/gpu/drm/i915/gem/i915_gem_context_types.h

45

struct i915_sw_fence fence;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2141

&eb->requests[j]->fence,

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2379

__set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2831

struct dma_fence *fence = NULL;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2852

fence = drm_syncobj_fence_get(syncobj);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2854

if (!fence && user_fence.flags &&

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2862

if (fence)

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2863

err = dma_fence_chain_find_seqno(&fence, point);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2869

dma_fence_put(fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2879

if (!fence && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2896

dma_fence_put(fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2904

dma_fence_put(fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2912

f->dma_fence = fence;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2956

struct dma_fence *fence = NULL;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2972

fence = drm_syncobj_fence_get(syncobj);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2973

if (!fence) {

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

2985

f->dma_fence = fence;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3021

struct dma_fence * const fence)

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3036

fence,

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3044

drm_syncobj_replace_fence(syncobj, fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3098

&rq->fence.flags);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3102

&rq->fence.flags);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3200

fences[i] = &eb->requests[i]->fence;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3202

&eb->requests[i]->fence.flags);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3240

struct dma_fence *fence;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3242

fence = drm_syncobj_fence_get(eb->gem_context->syncobj);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3243

err = i915_request_await_dma_fence(rq, fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3244

dma_fence_put(fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3269

out_fence = sync_file_create(&rq->fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3490

&eb.requests[0]->fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

3496

&eb.requests[0]->fence);

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

479

if (vma->fence)

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

686

if (vma->fence)

drivers/gpu/drm/i915/gem/i915_gem_object.c

941

struct dma_fence **fence)

drivers/gpu/drm/i915/gem/i915_gem_object.c

944

fence);

drivers/gpu/drm/i915/gem/i915_gem_object.h

762

struct dma_fence **fence);

drivers/gpu/drm/i915/gem/i915_gem_object.h

803

void i915_gem_fence_wait_priority(struct dma_fence *fence,

drivers/gpu/drm/i915/gem/i915_gem_object.h

805

void i915_gem_fence_wait_priority_display(struct dma_fence *fence);

drivers/gpu/drm/i915/gem/i915_gem_tiling.c

302

if (vma->fence)

drivers/gpu/drm/i915/gem/i915_gem_tiling.c

303

vma->fence->dirty = true;

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

249

return ret ? ERR_PTR(ret) : &rq->fence;

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

294

struct dma_fence fence;

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

385

dma_fence_signal(&copy_work->fence);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

389

dma_fence_put(&copy_work->fence);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

398

dma_fence_signal(&copy_work->fence);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

401

dma_fence_put(&copy_work->fence);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

404

static void __memcpy_cb(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

409

if (unlikely(fence->error || I915_SELFTEST_ONLY(fail_gpu_migration))) {

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

418

static const char *get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

423

static const char *get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

440

dma_fence_init(&work->fence, &dma_fence_memcpy_ops, &work->lock, 0, 0);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

441

dma_fence_get(&work->fence);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

451

return &work->fence;

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

479

struct dma_fence *fence = ERR_PTR(-EINVAL);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

482

fence = i915_ttm_accel_move(bo, clear, dst_mem, dst_ttm,

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

490

if (!IS_ERR(fence) && !i915_ttm_gtt_binds_lmem(dst_mem) &&

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

497

if (!IS_ERR(fence)) {

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

498

struct dma_fence *dep = fence;

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

512

fence = i915_ttm_memcpy_work_arm(copy_work, dep);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

515

fence = ERR_PTR(I915_SELFTEST_ONLY(fail_gpu_migration) ?

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

516

-EINVAL : fence->error);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

520

if (!IS_ERR(fence))

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

523

int err = PTR_ERR(fence);

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

526

return fence;

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

550

if (!fence && copy_work) {

drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

556

return fence;

drivers/gpu/drm/i915/gem/i915_gem_wait.c

100

rq = to_request(fence);

drivers/gpu/drm/i915/gem/i915_gem_wait.c

109

void i915_gem_fence_wait_priority(struct dma_fence *fence,

drivers/gpu/drm/i915/gem/i915_gem_wait.c

112

if (dma_fence_is_signaled(fence))

drivers/gpu/drm/i915/gem/i915_gem_wait.c

118

if (dma_fence_is_array(fence)) {

drivers/gpu/drm/i915/gem/i915_gem_wait.c

119

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/gpu/drm/i915/gem/i915_gem_wait.c

124

} else if (dma_fence_is_chain(fence)) {

drivers/gpu/drm/i915/gem/i915_gem_wait.c

128

dma_fence_chain_for_each(iter, fence) {

drivers/gpu/drm/i915/gem/i915_gem_wait.c

129

fence_set_priority(to_dma_fence_chain(iter)->fence,

drivers/gpu/drm/i915/gem/i915_gem_wait.c

135

fence_set_priority(fence, attr);

drivers/gpu/drm/i915/gem/i915_gem_wait.c

141

void i915_gem_fence_wait_priority_display(struct dma_fence *fence)

drivers/gpu/drm/i915/gem/i915_gem_wait.c

145

i915_gem_fence_wait_priority(fence, &attr);

drivers/gpu/drm/i915/gem/i915_gem_wait.c

154

struct dma_fence *fence;

drivers/gpu/drm/i915/gem/i915_gem_wait.c

158

dma_resv_for_each_fence_unlocked(&cursor, fence)

drivers/gpu/drm/i915/gem/i915_gem_wait.c

159

i915_gem_fence_wait_priority(fence, attr);

drivers/gpu/drm/i915/gem/i915_gem_wait.c

17

i915_gem_object_wait_fence(struct dma_fence *fence,

drivers/gpu/drm/i915/gem/i915_gem_wait.c

23

if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))

drivers/gpu/drm/i915/gem/i915_gem_wait.c

26

if (dma_fence_is_i915(fence))

drivers/gpu/drm/i915/gem/i915_gem_wait.c

27

return i915_request_wait_timeout(to_request(fence), flags, timeout);

drivers/gpu/drm/i915/gem/i915_gem_wait.c

29

return dma_fence_wait_timeout(fence,

drivers/gpu/drm/i915/gem/i915_gem_wait.c

38

struct dma_fence *fence;

drivers/gpu/drm/i915/gem/i915_gem_wait.c

58

dma_resv_for_each_fence_unlocked(&cursor, fence)

drivers/gpu/drm/i915/gem/i915_gem_wait.c

59

if (dma_fence_is_i915(fence) &&

drivers/gpu/drm/i915/gem/i915_gem_wait.c

60

!i915_request_started(to_request(fence)))

drivers/gpu/drm/i915/gem/i915_gem_wait.c

61

intel_rps_boost(to_request(fence));

drivers/gpu/drm/i915/gem/i915_gem_wait.c

71

struct dma_fence *fence;

drivers/gpu/drm/i915/gem/i915_gem_wait.c

78

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/gpu/drm/i915/gem/i915_gem_wait.c

79

ret = i915_gem_object_wait_fence(fence, flags, timeout);

drivers/gpu/drm/i915/gem/i915_gem_wait.c

91

static void fence_set_priority(struct dma_fence *fence,

drivers/gpu/drm/i915/gem/i915_gem_wait.c

97

if (dma_fence_is_signaled(fence) || !dma_fence_is_i915(fence))

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

127

i915_request_await_dma_fence(this, &rq->fence);

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

217

&prev->fence);

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

265

&prev->fence);

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

88

i915_request_await_dma_fence(this, &rq->fence);

drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c

228

dma_resv_add_fence(obj->base.resv, &rq->fence,

drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c

419

err = i915_deps_add_dependency(&deps, &rq->fence, &ctx);

drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c

420

spin_fence = dma_fence_get(&rq->fence);

drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c

1227

dma_resv_add_fence(obj->base.resv, &rq->fence,

drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c

169

vma->fence ? vma->fence->id : -1, tile->tiling, tile->stride,

drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c

265

vma->fence ? vma->fence->id : -1, tile->tiling, tile->stride,

drivers/gpu/drm/i915/gt/gen2_engine_cs.c

155

*cs++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/gen2_engine_cs.c

161

*cs++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

167

*cs++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

364

*cs++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

382

*cs++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

403

*cs++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

408

*cs++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/gen6_ppgtt.c

353

GEM_BUG_ON(ppgtt->vma->fence);

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

451

*cs++ = rq->fence.seqno - 1;

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

478

__set_bit(I915_FENCE_FLAG_INITIAL_BREADCRUMB, &rq->fence.flags);

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

661

return gen8_emit_ggtt_write(cs, rq->fence.seqno, hwsp_offset(rq), 0);

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

681

rq->fence.seqno,

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

702

rq->fence.seqno,

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

848

rq->fence.seqno,

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

119

i915_seqno_passed(rq->fence.seqno,

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

120

list_next_entry(rq, signal_link)->fence.seqno))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

124

i915_seqno_passed(list_prev_entry(rq, signal_link)->fence.seqno,

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

125

rq->fence.seqno))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

132

__dma_fence_signal(struct dma_fence *fence)

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

134

return !test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

138

__dma_fence_signal__timestamp(struct dma_fence *fence, ktime_t timestamp)

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

140

fence->timestamp = timestamp;

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

141

set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

142

trace_dma_fence_signaled(fence);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

146

__dma_fence_signal__notify(struct dma_fence *fence,

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

151

lockdep_assert_held(fence->lock);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

155

cur->func(fence, cur);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

223

&rq->fence.flags))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

241

if (__dma_fence_signal(&rq->fence))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

260

list_replace(&rq->fence.cb_list, &cb_list);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

261

__dma_fence_signal__timestamp(&rq->fence, timestamp);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

262

__dma_fence_signal__notify(&rq->fence, &cb_list);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

342

if (!__dma_fence_signal(&rq->fence))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

356

if (test_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

392

if (i915_seqno_passed(rq->fence.seqno, it->fence.seqno))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

400

GEM_BUG_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags));

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

401

set_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

417

if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

426

if (!test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

430

if (test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

444

if (!test_and_clear_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags)) {

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

476

&rq->fence.flags))

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

505

rq->fence.context, rq->fence.seqno,

drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c

113

rq->fence.context,

drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c

114

rq->fence.seqno,

drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c

292

__set_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_engine_pm.c

101

struct i915_request *rq = to_request(fence);

drivers/gpu/drm/i915/gt/intel_engine_pm.c

104

ktime_us_delta(rq->fence.timestamp,

drivers/gpu/drm/i915/gt/intel_engine_pm.c

232

dma_fence_add_callback(&rq->fence, &rq->duration.cb, duration);

drivers/gpu/drm/i915/gt/intel_engine_pm.c

99

static void duration(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1322

last->fence.context,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1323

last->fence.seqno,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1349

last->fence.context, last->fence.seqno,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1435

rq->fence.context,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1436

rq->fence.seqno,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1559

i915_seqno_passed(last->fence.seqno,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1560

rq->fence.seqno));

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1982

rq->fence.context,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

1983

lower_32_bits(rq->fence.seqno),

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2063

clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2167

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2554

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3302

clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3303

clear_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3306

set_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3348

rq->fence.context, rq->fence.seqno,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3349

inflight->fence.context, inflight->fence.seqno,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3800

rq->fence.context, rq->fence.seqno,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3897

rq->fence.context,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3898

rq->fence.seqno);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

400

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

450

rq->fence.context, rq->fence.seqno);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

468

return rq->fence.error && i915_request_started(rq);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

550

clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

743

rq->fence.context, rq->fence.seqno,

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

807

GEM_BUG_ON(!kref_read(&rq->fence.refcount));

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

838

!READ_ONCE(prev->fence.error)) {

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

961

return READ_ONCE(rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

989

GEM_BUG_ON(i915_seqno_passed(prev->fence.seqno, next->fence.seqno));

drivers/gpu/drm/i915/gt/intel_ggtt.c

423

if (rq->fence.error)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

115

static void i915_write_fence_reg(struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

120

if (fence->tiling) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

121

unsigned int stride = fence->stride;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

122

unsigned int tiling = fence->tiling;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

125

if (is_y_tiled && HAS_128_BYTE_Y_TILING(fence_to_i915(fence)))

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

131

val = fence->start;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

134

val |= I915_FENCE_SIZE_BITS(fence->size);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

141

struct intel_uncore *uncore = fence_to_uncore(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

142

i915_reg_t reg = FENCE_REG(fence->id);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

149

static void i830_write_fence_reg(struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

154

if (fence->tiling) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

155

unsigned int stride = fence->stride;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

157

val = fence->start;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

158

if (fence->tiling == I915_TILING_Y)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

160

val |= I830_FENCE_SIZE_BITS(fence->size);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

166

struct intel_uncore *uncore = fence_to_uncore(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

167

i915_reg_t reg = FENCE_REG(fence->id);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

174

static void fence_write(struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

176

struct drm_i915_private *i915 = fence_to_i915(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

185

i830_write_fence_reg(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

187

i915_write_fence_reg(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

189

i965_write_fence_reg(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

197

static bool gpu_uses_fence_registers(struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

199

return GRAPHICS_VER(fence_to_i915(fence)) < 4;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

202

static int fence_update(struct i915_fence_reg *fence,

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

205

struct i915_ggtt *ggtt = fence->ggtt;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

206

struct intel_uncore *uncore = fence_to_uncore(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

211

fence->tiling = 0;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

219

if (gpu_uses_fence_registers(fence)) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

227

fence->start = i915_ggtt_offset(vma);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

228

fence->size = vma->fence_size;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

229

fence->stride = i915_gem_object_get_stride(vma->obj);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

230

fence->tiling = i915_gem_object_get_tiling(vma->obj);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

232

WRITE_ONCE(fence->dirty, false);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

234

old = xchg(&fence->vma, NULL);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

237

ret = i915_active_wait(&fence->active);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

239

fence->vma = old;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

250

GEM_BUG_ON(old->fence != fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

252

old->fence = NULL;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

255

list_move(&fence->link, &ggtt->fence_list);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

274

WRITE_ONCE(fence->vma, vma);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

275

fence_write(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

278

vma->fence = fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

279

list_move_tail(&fence->link, &ggtt->fence_list);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

295

struct i915_fence_reg *fence = vma->fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

299

if (!fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

302

GEM_BUG_ON(fence->vma != vma);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

303

i915_active_wait(&fence->active);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

304

GEM_BUG_ON(!i915_active_is_idle(&fence->active));

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

305

GEM_BUG_ON(atomic_read(&fence->pin_count));

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

307

fence->tiling = 0;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

308

WRITE_ONCE(fence->vma, NULL);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

309

vma->fence = NULL;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

322

with_intel_runtime_pm_if_active(fence_to_uncore(fence)->rpm, wakeref)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

323

fence_write(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

326

static bool fence_is_active(const struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

328

return fence->vma && i915_vma_is_active(fence->vma);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

335

struct i915_fence_reg *fence, *fn;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

337

list_for_each_entry_safe(fence, fn, &ggtt->fence_list, link) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

338

GEM_BUG_ON(fence->vma && fence->vma->fence != fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

340

if (fence == active) /* now seen this fence twice */

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

344

if (active != ERR_PTR(-EAGAIN) && fence_is_active(fence)) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

346

active = fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

348

list_move_tail(&fence->link, &ggtt->fence_list);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

352

if (atomic_read(&fence->pin_count))

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

355

return fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

368

struct i915_fence_reg *fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

375

if (vma->fence) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

376

fence = vma->fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

377

GEM_BUG_ON(fence->vma != vma);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

378

atomic_inc(&fence->pin_count);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

379

if (!fence->dirty) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

380

list_move_tail(&fence->link, &ggtt->fence_list);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

384

fence = fence_find(ggtt);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

385

if (IS_ERR(fence))

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

386

return PTR_ERR(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

388

GEM_BUG_ON(atomic_read(&fence->pin_count));

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

389

atomic_inc(&fence->pin_count);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

394

err = fence_update(fence, set);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

398

GEM_BUG_ON(fence->vma != set);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

399

GEM_BUG_ON(vma->fence != (set ? fence : NULL));

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

405

atomic_dec(&fence->pin_count);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

430

if (!vma->fence && !i915_gem_object_is_tiled(vma->obj))

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

459

struct i915_fence_reg *fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

467

list_for_each_entry(fence, &ggtt->fence_list, link)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

468

count += !atomic_read(&fence->pin_count);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

472

fence = fence_find(ggtt);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

473

if (IS_ERR(fence))

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

474

return fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

476

if (fence->vma) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

478

ret = fence_update(fence, NULL);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

483

list_del(&fence->link);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

485

return fence;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

494

void i915_unreserve_fence(struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

496

struct i915_ggtt *ggtt = fence->ggtt;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

500

list_add(&fence->link, &ggtt->fence_list);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

51

static struct drm_i915_private *fence_to_i915(struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

53

return fence->ggtt->vm.i915;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

56

static struct intel_uncore *fence_to_uncore(struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

58

return fence->ggtt->vm.gt->uncore;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

61

static void i965_write_fence_reg(struct i915_fence_reg *fence)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

67

if (GRAPHICS_VER(fence_to_i915(fence)) >= 6) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

68

fence_reg_lo = FENCE_REG_GEN6_LO(fence->id);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

69

fence_reg_hi = FENCE_REG_GEN6_HI(fence->id);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

73

fence_reg_lo = FENCE_REG_965_LO(fence->id);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

74

fence_reg_hi = FENCE_REG_965_HI(fence->id);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

79

if (fence->tiling) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

80

unsigned int stride = fence->stride;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

84

val = fence->start + fence->size - I965_FENCE_PAGE;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

86

val |= fence->start;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

874

struct i915_fence_reg *fence = &ggtt->fence_regs[i];

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

876

i915_active_init(&fence->active, NULL, NULL, 0);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

877

fence->ggtt = ggtt;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

878

fence->id = i;

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

879

list_add_tail(&fence->link, &ggtt->fence_list);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

88

if (fence->tiling == I915_TILING_Y)

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

891

struct i915_fence_reg *fence = &ggtt->fence_regs[i];

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

893

i915_active_fini(&fence->active);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c

94

struct intel_uncore *uncore = fence_to_uncore(fence);

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h

45

void i915_unreserve_fence(struct i915_fence_reg *fence);

drivers/gpu/drm/i915/gt/intel_gt.c

588

if (rq->fence.error) {

drivers/gpu/drm/i915/gt/intel_gt_requests.c

155

struct dma_fence *fence;

drivers/gpu/drm/i915/gt/intel_gt_requests.c

157

fence = i915_active_fence_get(&tl->last_request);

drivers/gpu/drm/i915/gt/intel_gt_requests.c

158

if (fence) {

drivers/gpu/drm/i915/gt/intel_gt_requests.c

161

timeout = dma_fence_wait_timeout(fence,

drivers/gpu/drm/i915/gt/intel_gt_requests.c

164

dma_fence_put(fence);

drivers/gpu/drm/i915/gt/intel_gt_requests.c

252

struct dma_fence *f = &rq->fence;

drivers/gpu/drm/i915/gt/intel_reset.c

1080

struct dma_fence *fence;

drivers/gpu/drm/i915/gt/intel_reset.c

1082

fence = i915_active_fence_get(&tl->last_request);

drivers/gpu/drm/i915/gt/intel_reset.c

1083

if (!fence)

drivers/gpu/drm/i915/gt/intel_reset.c

1095

dma_fence_default_wait(fence, false, MAX_SCHEDULE_TIMEOUT);

drivers/gpu/drm/i915/gt/intel_reset.c

1096

dma_fence_put(fence);

drivers/gpu/drm/i915/gt/intel_reset.c

858

GEM_BUG_ON(vma->fence != &gt->ggtt->fence_regs[i]);

drivers/gpu/drm/i915/gt/intel_ring_submission.c

1148

set_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/intel_rps.c

1032

if (!test_and_set_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags)) {

drivers/gpu/drm/i915/gt/intel_rps.c

1052

rq->fence.context, rq->fence.seqno);

drivers/gpu/drm/i915/gt/intel_rps.c

1067

rq->fence.context, rq->fence.seqno);

drivers/gpu/drm/i915/gt/intel_rps.c

2918

static void boost_if_not_started(struct dma_fence *fence)

drivers/gpu/drm/i915/gt/intel_rps.c

2922

if (!dma_fence_is_i915(fence))

drivers/gpu/drm/i915/gt/intel_rps.c

2925

rq = to_request(fence);

drivers/gpu/drm/i915/gt/intel_timeline.c

426

struct dma_fence *fence;

drivers/gpu/drm/i915/gt/intel_timeline.c

458

fence = i915_active_fence_get(&tl->last_request);

drivers/gpu/drm/i915/gt/intel_timeline.c

459

if (fence) {

drivers/gpu/drm/i915/gt/intel_timeline.c

461

to_request(fence)->engine->name);

drivers/gpu/drm/i915/gt/intel_timeline.c

462

dma_fence_put(fence);

drivers/gpu/drm/i915/gt/intel_timeline.h

53

const struct dma_fence *fence)

drivers/gpu/drm/i915/gt/intel_timeline.h

55

return __intel_timeline_sync_set(tl, fence->context, fence->seqno);

drivers/gpu/drm/i915/gt/intel_timeline.h

65

const struct dma_fence *fence)

drivers/gpu/drm/i915/gt/intel_timeline.h

67

return __intel_timeline_sync_is_later(tl, fence->context, fence->seqno);

drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c

22

struct dma_fence *fence;

drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c

25

fence = i915_active_fence_get(&tl->last_request);

drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c

26

if (!fence)

drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c

29

timeout = dma_fence_wait_timeout(fence, true, HZ / 2);

drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c

30

dma_fence_put(fence);

drivers/gpu/drm/i915/gt/selftest_execlists.c

104

rq->fence.context,

drivers/gpu/drm/i915/gt/selftest_execlists.c

105

rq->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_execlists.c

1068

err = i915_request_await_dma_fence(rq, &wait->fence);

drivers/gpu/drm/i915/gt/selftest_execlists.c

1466

set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);

drivers/gpu/drm/i915/gt/selftest_execlists.c

1992

__set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq_a->fence.flags);

drivers/gpu/drm/i915/gt/selftest_execlists.c

2139

err = i915_request_await_dma_fence(rq[1], &rq[0]->fence);

drivers/gpu/drm/i915/gt/selftest_execlists.c

2154

if (rq[0]->fence.error != 0) {

drivers/gpu/drm/i915/gt/selftest_execlists.c

2160

if (rq[1]->fence.error != -EIO) {

drivers/gpu/drm/i915/gt/selftest_execlists.c

2208

err = i915_request_await_dma_fence(rq[1], &rq[0]->fence);

drivers/gpu/drm/i915/gt/selftest_execlists.c

2222

err = i915_request_await_dma_fence(rq[2], &rq[1]->fence);

drivers/gpu/drm/i915/gt/selftest_execlists.c

2236

if (rq[0]->fence.error != -EIO) {

drivers/gpu/drm/i915/gt/selftest_execlists.c

2248

rq[1]->fence.error != 0) {

drivers/gpu/drm/i915/gt/selftest_execlists.c

2254

if (rq[2]->fence.error != -EIO) {

drivers/gpu/drm/i915/gt/selftest_execlists.c

264

i915_request_await_dma_fence(rq[1], &rq[0]->fence);

drivers/gpu/drm/i915/gt/selftest_execlists.c

289

i915_request_await_dma_fence(rq[0], &rq[1]->fence);

drivers/gpu/drm/i915/gt/selftest_execlists.c

3792

request[nc]->fence.context,

drivers/gpu/drm/i915/gt/selftest_execlists.c

3793

request[nc]->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_execlists.c

3797

request[nc]->fence.context,

drivers/gpu/drm/i915/gt/selftest_execlists.c

3798

request[nc]->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_execlists.c

3959

request[n]->fence.context,

drivers/gpu/drm/i915/gt/selftest_execlists.c

3960

request[n]->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_execlists.c

3964

request[n]->fence.context,

drivers/gpu/drm/i915/gt/selftest_execlists.c

3965

request[n]->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_execlists.c

4395

GEM_BUG_ON(rq->fence.error != -EIO);

drivers/gpu/drm/i915/gt/selftest_execlists.c

641

GEM_BUG_ON(rq->fence.error != -EIO);

drivers/gpu/drm/i915/gt/selftest_execlists.c

789

if (client[i]->fence.error != p->error[i]) {

drivers/gpu/drm/i915/gt/selftest_execlists.c

794

client[i]->fence.error);

drivers/gpu/drm/i915/gt/selftest_execlists.c

87

if (READ_ONCE(rq->fence.error))

drivers/gpu/drm/i915/gt/selftest_execlists.c

91

if (rq->fence.error != -EIO) {

drivers/gpu/drm/i915/gt/selftest_execlists.c

94

rq->fence.context,

drivers/gpu/drm/i915/gt/selftest_execlists.c

95

rq->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

100

offset_in_page(sizeof(u32) * rq->fence.context);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1075

__func__, rq->fence.seqno, hws_seqno(&h, rq));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1101

engine->name, rq->fence.context,

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1102

rq->fence.seqno, rq->context->guc_id.id, err);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1108

if (rq->fence.error != -EIO) {

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1111

rq->fence.context,

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1112

rq->fence.seqno, rq->context->guc_id.id);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1128

rq->fence.context,

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1129

rq->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1335

__func__, rq->fence.seqno, hws_seqno(&h, rq));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1524

__func__, rq->fence.seqno, hws_seqno(&h, rq));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1544

if (wait_for(!list_empty(&rq->fence.cb_list), 10)) {

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1723

prev->fence.seqno, hws_seqno(&h, prev));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1738

if (prev->fence.error != -EIO) {

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1740

prev->fence.error);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1747

if (rq->fence.error) {

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1749

rq->fence.error);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

176

*batch++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1847

__func__, rq->fence.seqno, hws_seqno(&h, rq));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1863

if (rq->fence.error != -EIO) {

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

190

*batch++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

1941

rq->fence.seqno, hws_seqno(&h, rq));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

203

*batch++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

215

*batch++ = rq->fence.seqno;

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

255

return READ_ONCE(h->seqno[rq->fence.context % (PAGE_SIZE/sizeof(u32))]);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

277

rq->fence.seqno),

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

280

rq->fence.seqno),

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

757

__func__, rq->fence.seqno, hws_seqno(&h, rq));

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

781

engine->name, rq->fence.context,

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

782

rq->fence.seqno, rq->context->guc_id.id, err);

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

878

rq->fence.context,

drivers/gpu/drm/i915/gt/selftest_hangcheck.c

879

rq->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_lrc.c

112

struct dma_fence *fence;

drivers/gpu/drm/i915/gt/selftest_lrc.c

119

fence = i915_active_fence_get(&ce->timeline->last_request);

drivers/gpu/drm/i915/gt/selftest_lrc.c

120

if (fence) {

drivers/gpu/drm/i915/gt/selftest_lrc.c

121

i915_request_await_dma_fence(rq, fence);

drivers/gpu/drm/i915/gt/selftest_lrc.c

122

dma_fence_put(fence);

drivers/gpu/drm/i915/gt/selftest_lrc.c

1760

if (!rq->fence.error)

drivers/gpu/drm/i915/gt/selftest_lrc.c

1825

if (!hang->fence.error) {

drivers/gpu/drm/i915/gt/selftest_timeline.c

1071

&watcher[0].rq->fence, 0,

drivers/gpu/drm/i915/gt/selftest_timeline.c

1084

rq->fence.seqno, hwsp,

drivers/gpu/drm/i915/gt/selftest_timeline.c

1098

rq->fence.seqno, hwsp,

drivers/gpu/drm/i915/gt/selftest_timeline.c

1120

&rq->fence, 0,

drivers/gpu/drm/i915/gt/selftest_timeline.c

1214

lower_32_bits(this->fence.seqno));

drivers/gpu/drm/i915/gt/selftest_timeline.c

1223

GEM_BUG_ON(rq[2]->fence.seqno > rq[0]->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_timeline.c

1301

lower_32_bits(this->fence.seqno));

drivers/gpu/drm/i915/gt/selftest_timeline.c

1310

GEM_BUG_ON(rq[2]->fence.seqno > rq[0]->fence.seqno);

drivers/gpu/drm/i915/gt/selftest_timeline.c

956

u32 seqno = rq->fence.seqno;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1001

static bool ct_check_lost_and_found(struct intel_guc_ct *ct, u32 fence)

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1010

if (ct->requests.lost_and_found[n].fence != fence)

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1019

fence, ct->requests.lost_and_found[n].action, buf);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1024

fence, ct->requests.lost_and_found[n].action);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1031

static bool ct_check_lost_and_found(struct intel_guc_ct *ct, u32 fence)

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1040

u32 fence = FIELD_GET(GUC_CTB_MSG_0_FENCE, response->msg[0]);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1055

CT_DEBUG(ct, "response fence %u status %#x\n", fence, hxg[0]);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1059

if (unlikely(fence != req->fence)) {

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1061

req->fence);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1066

req->fence, datalen, req->response_len);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1088

len, hxg[0], fence, ct->requests.last_fence);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1089

if (!ct_check_lost_and_found(ct, fence)) {

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

1092

req->fence);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

405

static void ct_track_lost_and_found(struct intel_guc_ct *ct, u32 fence, u32 action)

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

407

unsigned int lost = fence % ARRAY_SIZE(ct->requests.lost_and_found);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

417

ct->requests.lost_and_found[lost].fence = fence;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

431

u32 fence, u32 flags)

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

470

FIELD_PREP(GUC_CTB_MSG_0_FENCE, fence);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

494

ct_track_lost_and_found(ct, fence,

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

686

u32 fence;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

695

fence = ct_get_next_fence(ct);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

696

ret = ct_write(ct, action, len, fence, flags);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

721

u32 fence;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

759

fence = ct_get_next_fence(ct);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

760

request.fence = fence;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

769

err = ct_write(ct, action, len, fence, 0);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

787

action[0], request.fence);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

790

action[0], request.fence);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

91

u32 fence;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h

88

u16 fence;

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

1851

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2208

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

3217

struct i915_sw_fence *fence;

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

3220

fence = guc_context_block(block_context);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

3221

i915_sw_fence_wait(fence);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

3767

clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

3770

set_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

5518

rq->fence.seqno);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

5773

return test_bit(I915_FENCE_FLAG_SKIP_PARALLEL, &rq->fence.flags);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

5802

rq->fence.seqno,

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

5878

rq->fence.seqno,

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

923

return test_bit(I915_FENCE_FLAG_SUBMIT_PARALLEL, &rq->fence.flags) ||

drivers/gpu/drm/i915/gt/uc/intel_huc.c

112

if (!i915_sw_fence_done(&huc->delayed_load.fence))

drivers/gpu/drm/i915/gt/uc/intel_huc.c

164

GEM_BUG_ON(!i915_sw_fence_done(&huc->delayed_load.fence));

drivers/gpu/drm/i915/gt/uc/intel_huc.c

165

i915_sw_fence_fini(&huc->delayed_load.fence);

drivers/gpu/drm/i915/gt/uc/intel_huc.c

166

i915_sw_fence_reinit(&huc->delayed_load.fence);

drivers/gpu/drm/i915/gt/uc/intel_huc.c

167

i915_sw_fence_await(&huc->delayed_load.fence);

drivers/gpu/drm/i915/gt/uc/intel_huc.c

168

i915_sw_fence_commit(&huc->delayed_load.fence);

drivers/gpu/drm/i915/gt/uc/intel_huc.c

230

i915_sw_fence_init(&huc->delayed_load.fence,

drivers/gpu/drm/i915/gt/uc/intel_huc.c

232

i915_sw_fence_commit(&huc->delayed_load.fence);

drivers/gpu/drm/i915/gt/uc/intel_huc.c

245

i915_sw_fence_fini(&huc->delayed_load.fence);

drivers/gpu/drm/i915/gt/uc/intel_huc.c

84

if (!i915_sw_fence_done(&huc->delayed_load.fence))

drivers/gpu/drm/i915/gt/uc/intel_huc.c

85

i915_sw_fence_complete(&huc->delayed_load.fence);

drivers/gpu/drm/i915/gt/uc/intel_huc.h

44

struct i915_sw_fence fence;

drivers/gpu/drm/i915/gt/uc/selftest_guc.c

35

&from->fence, 0,

drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c

99

&child_rq->fence.flags);

drivers/gpu/drm/i915/gvt/aperture_gm.c

134

u32 fence, u64 value)

drivers/gpu/drm/i915/gvt/aperture_gm.c

144

if (drm_WARN_ON(&i915->drm, fence >= vgpu_fence_sz(vgpu)))

drivers/gpu/drm/i915/gvt/aperture_gm.c

147

reg = vgpu->fence.regs[fence];

drivers/gpu/drm/i915/gvt/aperture_gm.c

186

reg = vgpu->fence.regs[i];

drivers/gpu/drm/i915/gvt/aperture_gm.c

188

vgpu->fence.regs[i] = NULL;

drivers/gpu/drm/i915/gvt/aperture_gm.c

213

vgpu->fence.regs[i] = reg;

drivers/gpu/drm/i915/gvt/aperture_gm.c

226

reg = vgpu->fence.regs[i];

drivers/gpu/drm/i915/gvt/aperture_gm.c

230

vgpu->fence.regs[i] = NULL;

drivers/gpu/drm/i915/gvt/aperture_gm.c

243

gvt->fence.vgpu_allocated_fence_num -= vgpu_fence_sz(vgpu);

drivers/gpu/drm/i915/gvt/aperture_gm.c

253

if (!conf->low_mm || !conf->high_mm || !conf->fence) {

drivers/gpu/drm/i915/gvt/aperture_gm.c

282

taken = gvt->fence.vgpu_allocated_fence_num;

drivers/gpu/drm/i915/gvt/aperture_gm.c

284

request = conf->fence;

drivers/gpu/drm/i915/gvt/aperture_gm.c

293

gvt->fence.vgpu_allocated_fence_num += conf->fence;

drivers/gpu/drm/i915/gvt/gvt.h

199

struct intel_vgpu_fence fence;

drivers/gpu/drm/i915/gvt/gvt.h

303

unsigned int fence;

drivers/gpu/drm/i915/gvt/gvt.h

334

struct intel_gvt_fence fence;

drivers/gpu/drm/i915/gvt/gvt.h

443

#define vgpu_fence_sz(vgpu) (vgpu->fence.size)

drivers/gpu/drm/i915/gvt/gvt.h

453

u32 fence, u64 value);

drivers/gpu/drm/i915/gvt/kvmgt.c

125

type->conf->fence, vgpu_edid_str(type->conf->edid),

drivers/gpu/drm/i915/gvt/kvmgt.c

1504

gvt->fence.vgpu_allocated_fence_num;

drivers/gpu/drm/i915/gvt/kvmgt.c

1509

fence_avail / type->conf->fence);

drivers/gpu/drm/i915/gvt/scheduler.c

1102

if (workload->req->fence.error == -EIO)

drivers/gpu/drm/i915/gvt/vgpu.c

140

conf->low_mm, conf->high_mm, conf->fence,

drivers/gpu/drm/i915/gvt/vgpu.c

323

conf->fence);

drivers/gpu/drm/i915/i915_active.c

1010

struct dma_fence *fence)

drivers/gpu/drm/i915/i915_active.c

1031

if (fence == prev)

drivers/gpu/drm/i915/i915_active.c

1032

return fence;

drivers/gpu/drm/i915/i915_active.c

1034

GEM_BUG_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags));

drivers/gpu/drm/i915/i915_active.c

1048

spin_lock_irqsave(fence->lock, flags);

drivers/gpu/drm/i915/i915_active.c

1062

while (cmpxchg(__active_fence_slot(active), prev, fence) != prev) {

drivers/gpu/drm/i915/i915_active.c

1067

spin_unlock_irqrestore(fence->lock, flags);

drivers/gpu/drm/i915/i915_active.c

1070

GEM_BUG_ON(prev == fence);

drivers/gpu/drm/i915/i915_active.c

1072

spin_lock_irqsave(fence->lock, flags);

drivers/gpu/drm/i915/i915_active.c

1093

list_add_tail(&active->cb.node, &fence->cb_list);

drivers/gpu/drm/i915/i915_active.c

1094

spin_unlock_irqrestore(fence->lock, flags);

drivers/gpu/drm/i915/i915_active.c

1102

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_active.c

1106

fence = __i915_active_fence_set(active, &rq->fence);

drivers/gpu/drm/i915/i915_active.c

1107

if (fence) {

drivers/gpu/drm/i915/i915_active.c

1108

err = i915_request_await_dma_fence(rq, fence);

drivers/gpu/drm/i915/i915_active.c

1109

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_active.c

1115

void i915_active_noop(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/i915/i915_active.c

1117

active_fence_cb(fence, cb);

drivers/gpu/drm/i915/i915_active.c

138

GEM_BUG_ON(rcu_access_pointer(ref->excl.fence));

drivers/gpu/drm/i915/i915_active.c

206

return (struct dma_fence ** __force)&active->fence;

drivers/gpu/drm/i915/i915_active.c

210

active_fence_cb(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/i915/i915_active.c

215

return try_cmpxchg(__active_fence_slot(active), &fence, NULL);

drivers/gpu/drm/i915/i915_active.c

219

node_retire(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/i915/i915_active.c

221

if (active_fence_cb(fence, cb))

drivers/gpu/drm/i915/i915_active.c

226

excl_retire(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/i915/i915_active.c

228

if (active_fence_cb(fence, cb))

drivers/gpu/drm/i915/i915_active.c

429

struct dma_fence *fence = &rq->fence;

drivers/gpu/drm/i915/i915_active.c

446

RCU_INIT_POINTER(active->fence, NULL);

drivers/gpu/drm/i915/i915_active.c

45

return IS_ERR(rcu_access_pointer(active->fence));

drivers/gpu/drm/i915/i915_active.c

451

fence = __i915_active_fence_set(active, fence);

drivers/gpu/drm/i915/i915_active.c

452

if (!fence)

drivers/gpu/drm/i915/i915_active.c

455

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_active.c

465

struct dma_fence *fence)

drivers/gpu/drm/i915/i915_active.c

470

RCU_INIT_POINTER(active->fence, fence);

drivers/gpu/drm/i915/i915_active.c

474

prev = __i915_active_fence_set(active, fence);

drivers/gpu/drm/i915/i915_active.c

537

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_active.c

542

fence = i915_active_fence_get(active);

drivers/gpu/drm/i915/i915_active.c

543

if (!fence)

drivers/gpu/drm/i915/i915_active.c

546

dma_fence_enable_sw_signaling(fence);

drivers/gpu/drm/i915/i915_active.c

547

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_active.c

609

int (*fn)(void *arg, struct dma_fence *fence),

drivers/gpu/drm/i915/i915_active.c

612

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_active.c

617

fence = i915_active_fence_get(active);

drivers/gpu/drm/i915/i915_active.c

618

if (fence) {

drivers/gpu/drm/i915/i915_active.c

621

err = fn(arg, fence);

drivers/gpu/drm/i915/i915_active.c

622

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_active.c

649

static int __await_barrier(struct i915_active *ref, struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_active.c

658

if (!i915_sw_fence_await(fence)) {

drivers/gpu/drm/i915/i915_active.c

665

wb->base.private = fence;

drivers/gpu/drm/i915/i915_active.c

674

int (*fn)(void *arg, struct dma_fence *fence),

drivers/gpu/drm/i915/i915_active.c

683

rcu_access_pointer(ref->excl.fence)) {

drivers/gpu/drm/i915/i915_active.c

714

static int rq_await_fence(void *arg, struct dma_fence *fence)

drivers/gpu/drm/i915/i915_active.c

716

return i915_request_await_dma_fence(arg, fence);

drivers/gpu/drm/i915/i915_active.c

726

static int sw_await_fence(void *arg, struct dma_fence *fence)

drivers/gpu/drm/i915/i915_active.c

728

return i915_sw_fence_await_dma_fence(arg, fence, 0,

drivers/gpu/drm/i915/i915_active.c

732

int i915_sw_fence_await_active(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_active.c

736

return await_active(ref, flags, sw_await_fence, fence, fence);

drivers/gpu/drm/i915/i915_active.c

871

RCU_INIT_POINTER(node->base.fence, NULL);

drivers/gpu/drm/i915/i915_active.c

887

RCU_INIT_POINTER(node->base.fence, ERR_PTR(-EAGAIN));

drivers/gpu/drm/i915/i915_active.c

891

GEM_BUG_ON(rcu_access_pointer(node->base.fence) != ERR_PTR(-EAGAIN));

drivers/gpu/drm/i915/i915_active.c

989

smp_store_mb(*ll_to_fence_slot(node), &rq->fence);

drivers/gpu/drm/i915/i915_active.c

990

list_add_tail((struct list_head *)node, &rq->fence.cb_list);

drivers/gpu/drm/i915/i915_active.h

103

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_active.h

106

fence = dma_fence_get_rcu_safe(&active->fence);

drivers/gpu/drm/i915/i915_active.h

109

return fence;

drivers/gpu/drm/i915/i915_active.h

123

return rcu_access_pointer(active->fence);

drivers/gpu/drm/i915/i915_active.h

178

int i915_sw_fence_await_active(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_active.h

222

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_active.h

225

fence = i915_active_fence_get(&active->excl);

drivers/gpu/drm/i915/i915_active.h

226

if (fence) {

drivers/gpu/drm/i915/i915_active.h

227

err = i915_request_await_dma_fence(rq, fence);

drivers/gpu/drm/i915/i915_active.h

228

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_active.h

48

void i915_active_noop(struct dma_fence *fence, struct dma_fence_cb *cb);

drivers/gpu/drm/i915/i915_active.h

64

void *fence,

drivers/gpu/drm/i915/i915_active.h

67

RCU_INIT_POINTER(active->fence, fence);

drivers/gpu/drm/i915/i915_active.h

76

struct dma_fence *fence);

drivers/gpu/drm/i915/i915_active_types.h

19

struct dma_fence __rcu *fence;

drivers/gpu/drm/i915/i915_debugfs.c

255

if (vma->fence)

drivers/gpu/drm/i915/i915_debugfs.c

256

seq_printf(m, " , fence: %d", vma->fence->id);

drivers/gpu/drm/i915/i915_deps.c

100

if (ctx->no_wait_gpu && !dma_fence_is_signaled(fence)) {

drivers/gpu/drm/i915/i915_deps.c

105

ret = dma_fence_wait(fence, ctx->interruptible);

drivers/gpu/drm/i915/i915_deps.c

109

ret = fence->error;

drivers/gpu/drm/i915/i915_deps.c

177

struct dma_fence *fence,

drivers/gpu/drm/i915/i915_deps.c

183

if (!fence)

drivers/gpu/drm/i915/i915_deps.c

186

if (dma_fence_is_signaled(fence)) {

drivers/gpu/drm/i915/i915_deps.c

187

ret = fence->error;

drivers/gpu/drm/i915/i915_deps.c

196

if (!entry->context || entry->context != fence->context)

drivers/gpu/drm/i915/i915_deps.c

199

if (dma_fence_is_later(fence, entry)) {

drivers/gpu/drm/i915/i915_deps.c

201

deps->fences[i] = dma_fence_get(fence);

drivers/gpu/drm/i915/i915_deps.c

207

return i915_deps_grow(deps, fence, ctx);

drivers/gpu/drm/i915/i915_deps.c

226

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_deps.c

229

dma_resv_for_each_fence(&iter, resv, dma_resv_usage_rw(true), fence) {

drivers/gpu/drm/i915/i915_deps.c

230

int ret = i915_deps_add_dependency(deps, fence, ctx);

drivers/gpu/drm/i915/i915_deps.c

75

static int i915_deps_grow(struct i915_deps *deps, struct dma_fence *fence,

drivers/gpu/drm/i915/i915_deps.c

96

deps->fences[deps->num_deps++] = dma_fence_get(fence);

drivers/gpu/drm/i915/i915_deps.h

37

struct dma_fence *fence,

drivers/gpu/drm/i915/i915_driver.c

741

static void fence_priority_display(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_driver.c

743

if (dma_fence_is_i915(fence))

drivers/gpu/drm/i915/i915_driver.c

744

i915_gem_fence_wait_priority_display(fence);

drivers/gpu/drm/i915/i915_gem.c

990

if (vma->fence && !i915_gem_object_is_tiled(obj)) {

drivers/gpu/drm/i915/i915_gpu_error.c

1271

gt->fence[i] =

drivers/gpu/drm/i915/i915_gpu_error.c

1276

gt->fence[i] =

drivers/gpu/drm/i915/i915_gpu_error.c

1281

gt->fence[i] =

drivers/gpu/drm/i915/i915_gpu_error.c

1419

erq->flags = request->fence.flags;

drivers/gpu/drm/i915/i915_gpu_error.c

1420

erq->context = request->fence.context;

drivers/gpu/drm/i915/i915_gpu_error.c

1421

erq->seqno = request->fence.seqno;

drivers/gpu/drm/i915/i915_gpu_error.c

1716

engine->name, rq->fence.context, rq->fence.seqno, ce->guc_id.id);

drivers/gpu/drm/i915/i915_gpu_error.c

1720

engine->name, rq->fence.context, rq->fence.seqno);

drivers/gpu/drm/i915/i915_gpu_error.c

863

err_printf(m, " fence[%d] = %08llx\n", i, gt->fence[i]);

drivers/gpu/drm/i915/i915_gpu_error.h

169

u64 fence[I915_MAX_NUM_FENCES];

drivers/gpu/drm/i915/i915_initial_plane.c

268

i915_vma_pin_fence(vma) == 0 && vma->fence)

drivers/gpu/drm/i915/i915_request.c

100

static signed long i915_fence_wait(struct dma_fence *fence,

drivers/gpu/drm/i915/i915_request.c

104

return i915_request_wait_timeout(to_request(fence),

drivers/gpu/drm/i915/i915_request.c

1063

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_request.c

1080

fence = NULL;

drivers/gpu/drm/i915/i915_request.c

1110

fence = &prev->fence;

drivers/gpu/drm/i915/i915_request.c

1113

if (!fence)

drivers/gpu/drm/i915/i915_request.c

1117

if (!intel_timeline_sync_is_later(i915_request_timeline(rq), fence))

drivers/gpu/drm/i915/i915_request.c

1119

fence, 0,

drivers/gpu/drm/i915/i915_request.c

1121

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_request.c

114

static void i915_fence_release(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

116

struct i915_request *rq = to_request(fence);

drivers/gpu/drm/i915/i915_request.c

1238

if (__emit_semaphore_wait(to, from, from->fence.seqno))

drivers/gpu/drm/i915/i915_request.c

1246

&from->fence, 0,

drivers/gpu/drm/i915/i915_request.c

1251

struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

1254

fence->context,

drivers/gpu/drm/i915/i915_request.c

1255

fence->seqno - 1);

drivers/gpu/drm/i915/i915_request.c

1259

const struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

1261

return __intel_timeline_sync_set(tl, fence->context, fence->seqno - 1);

drivers/gpu/drm/i915/i915_request.c

1279

&from->fence))

drivers/gpu/drm/i915/i915_request.c

1318

err = __emit_semaphore_wait(to, from, from->fence.seqno - 1);

drivers/gpu/drm/i915/i915_request.c

1333

&from->fence);

drivers/gpu/drm/i915/i915_request.c

1350

__i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

1353

return i915_sw_fence_await_dma_fence(&rq->submit, fence,

drivers/gpu/drm/i915/i915_request.c

1354

i915_fence_context_timeout(fence->context),

drivers/gpu/drm/i915/i915_request.c

1359

i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

1364

if (!to_dma_fence_chain(fence))

drivers/gpu/drm/i915/i915_request.c

1365

return __i915_request_await_external(rq, fence);

drivers/gpu/drm/i915/i915_request.c

1367

dma_fence_chain_for_each(iter, fence) {

drivers/gpu/drm/i915/i915_request.c

1370

if (!dma_fence_is_i915(chain->fence)) {

drivers/gpu/drm/i915/i915_request.c

1375

err = i915_request_await_dma_fence(rq, chain->fence);

drivers/gpu/drm/i915/i915_request.c

1405

struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

1407

struct dma_fence **child = &fence;

drivers/gpu/drm/i915/i915_request.c

1411

if (dma_fence_is_array(fence)) {

drivers/gpu/drm/i915/i915_request.c

1412

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/gpu/drm/i915/i915_request.c

1422

fence = *child++;

drivers/gpu/drm/i915/i915_request.c

1423

if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))

drivers/gpu/drm/i915/i915_request.c

1426

if (fence->context == rq->fence.context)

drivers/gpu/drm/i915/i915_request.c

1434

if (dma_fence_is_i915(fence)) {

drivers/gpu/drm/i915/i915_request.c

1435

if (is_same_parallel_context(rq, to_request(fence)))

drivers/gpu/drm/i915/i915_request.c

1438

to_request(fence));

drivers/gpu/drm/i915/i915_request.c

1440

ret = i915_request_await_external(rq, fence);

drivers/gpu/drm/i915/i915_request.c

1477

i915_sw_fence_set_error_once(&to->submit, from->fence.error);

drivers/gpu/drm/i915/i915_request.c

1501

i915_request_await_dma_fence(struct i915_request *rq, struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

1503

struct dma_fence **child = &fence;

drivers/gpu/drm/i915/i915_request.c

1515

if (dma_fence_is_array(fence)) {

drivers/gpu/drm/i915/i915_request.c

1516

struct dma_fence_array *array = to_dma_fence_array(fence);

drivers/gpu/drm/i915/i915_request.c

1524

fence = *child++;

drivers/gpu/drm/i915/i915_request.c

1525

if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))

drivers/gpu/drm/i915/i915_request.c

1533

if (fence->context == rq->fence.context)

drivers/gpu/drm/i915/i915_request.c

1537

if (fence->context &&

drivers/gpu/drm/i915/i915_request.c

1539

fence))

drivers/gpu/drm/i915/i915_request.c

1542

if (dma_fence_is_i915(fence)) {

drivers/gpu/drm/i915/i915_request.c

1543

if (is_same_parallel_context(rq, to_request(fence)))

drivers/gpu/drm/i915/i915_request.c

1545

ret = i915_request_await_request(rq, to_request(fence));

drivers/gpu/drm/i915/i915_request.c

1547

ret = i915_request_await_external(rq, fence);

drivers/gpu/drm/i915/i915_request.c

1553

if (fence->context)

drivers/gpu/drm/i915/i915_request.c

1555

fence);

drivers/gpu/drm/i915/i915_request.c

1608

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_request.c

1612

dma_resv_usage_rw(write), fence) {

drivers/gpu/drm/i915/i915_request.c

1613

ret = i915_request_await_dma_fence(to, fence);

drivers/gpu/drm/i915/i915_request.c

1631

&huc->delayed_load.fence,

drivers/gpu/drm/i915/i915_request.c

1667

&rq->fence));

drivers/gpu/drm/i915/i915_request.c

1679

&rq->fence));

drivers/gpu/drm/i915/i915_request.c

1694

i915_seqno_passed(prev->fence.seqno,

drivers/gpu/drm/i915/i915_request.c

1695

rq->fence.seqno));

drivers/gpu/drm/i915/i915_request.c

1703

&prev->fence,

drivers/gpu/drm/i915/i915_request.c

1777

GEM_BUG_ON(timeline->seqno != rq->fence.seqno);

drivers/gpu/drm/i915/i915_request.c

188

i915_sw_fence_complete(cb->fence);

drivers/gpu/drm/i915/i915_request.c

1935

if (dma_fence_is_signaled(&rq->fence))

drivers/gpu/drm/i915/i915_request.c

1955

static void request_wait_wake(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/i915/i915_request.c

1992

if (dma_fence_is_signaled(&rq->fence))

drivers/gpu/drm/i915/i915_request.c

2051

if (dma_fence_add_callback(&rq->fence, &wait.cb, request_wait_wake))

drivers/gpu/drm/i915/i915_request.c

2075

if (dma_fence_is_signaled(&rq->fence))

drivers/gpu/drm/i915/i915_request.c

2093

dma_fence_remove_callback(&rq->fence, &wait.cb);

drivers/gpu/drm/i915/i915_request.c

2174

if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags))

drivers/gpu/drm/i915/i915_request.c

2177

if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &rq->fence.flags))

drivers/gpu/drm/i915/i915_request.c

2225

timeline = dma_fence_timeline_name((struct dma_fence *)&rq->fence);

drivers/gpu/drm/i915/i915_request.c

2229

rq->fence.context, rq->fence.seqno,

drivers/gpu/drm/i915/i915_request.c

389

dma_fence_signal_locked(&rq->fence);

drivers/gpu/drm/i915/i915_request.c

393

if (test_and_set_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags))

drivers/gpu/drm/i915/i915_request.c

492

inflight = i915_seqno_passed(rq->fence.seqno,

drivers/gpu/drm/i915/i915_request.c

493

signal->fence.seqno);

drivers/gpu/drm/i915/i915_request.c

516

cb->fence = &rq->submit;

drivers/gpu/drm/i915/i915_request.c

517

i915_sw_fence_await(cb->fence);

drivers/gpu/drm/i915/i915_request.c

556

GEM_BUG_ON(!fatal_error(rq->fence.error));

drivers/gpu/drm/i915/i915_request.c

56

struct i915_sw_fence *fence;

drivers/gpu/drm/i915/i915_request.c

561

RQ_TRACE(rq, "error: %d\n", rq->fence.error);

drivers/gpu/drm/i915/i915_request.c

581

old = READ_ONCE(rq->fence.error);

drivers/gpu/drm/i915/i915_request.c

585

} while (!try_cmpxchg(&rq->fence.error, &old, error));

drivers/gpu/drm/i915/i915_request.c

62

static const char *i915_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

64

return dev_name(to_request(fence)->i915->drm.dev);

drivers/gpu/drm/i915/i915_request.c

640

if (unlikely(fatal_error(request->fence.error)))

drivers/gpu/drm/i915/i915_request.c

67

static const char *i915_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

674

GEM_BUG_ON(test_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags));

drivers/gpu/drm/i915/i915_request.c

677

clear_bit(I915_FENCE_FLAG_PQUEUE, &request->fence.flags);

drivers/gpu/drm/i915/i915_request.c

678

set_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags);

drivers/gpu/drm/i915/i915_request.c

693

if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &request->fence.flags))

drivers/gpu/drm/i915/i915_request.c

732

GEM_BUG_ON(!test_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags));

drivers/gpu/drm/i915/i915_request.c

733

clear_bit_unlock(I915_FENCE_FLAG_ACTIVE, &request->fence.flags);

drivers/gpu/drm/i915/i915_request.c

734

if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &request->fence.flags))

drivers/gpu/drm/i915/i915_request.c

768

set_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags);

drivers/gpu/drm/i915/i915_request.c

774

submit_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)

drivers/gpu/drm/i915/i915_request.c

777

container_of(fence, typeof(*request), submit);

drivers/gpu/drm/i915/i915_request.c

783

if (unlikely(fence->error))

drivers/gpu/drm/i915/i915_request.c

784

i915_request_set_error_once(request, fence->error);

drivers/gpu/drm/i915/i915_request.c

80

if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))

drivers/gpu/drm/i915/i915_request.c

810

semaphore_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)

drivers/gpu/drm/i915/i915_request.c

812

struct i915_request *rq = container_of(fence, typeof(*rq), semaphore);

drivers/gpu/drm/i915/i915_request.c

83

ctx = i915_request_gem_context(to_request(fence));

drivers/gpu/drm/i915/i915_request.c

90

static bool i915_fence_signaled(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

92

return i915_request_completed(to_request(fence));

drivers/gpu/drm/i915/i915_request.c

95

static bool i915_fence_enable_signaling(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.c

957

dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock,

drivers/gpu/drm/i915/i915_request.c

97

return i915_request_enable_breadcrumb(to_request(fence));

drivers/gpu/drm/i915/i915_request.h

197

struct dma_fence fence;

drivers/gpu/drm/i915/i915_request.h

367

static inline bool dma_fence_is_i915(const struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.h

369

return fence->ops == &i915_fence_ops;

drivers/gpu/drm/i915/i915_request.h

392

to_request(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_request.h

395

BUILD_BUG_ON(offsetof(struct i915_request, fence) != 0);

drivers/gpu/drm/i915/i915_request.h

396

GEM_BUG_ON(fence && !dma_fence_is_i915(fence));

drivers/gpu/drm/i915/i915_request.h

397

return container_of(fence, struct i915_request, fence);

drivers/gpu/drm/i915/i915_request.h

403

return to_request(dma_fence_get(&rq->fence));

drivers/gpu/drm/i915/i915_request.h

409

return to_request(dma_fence_get_rcu(&rq->fence));

drivers/gpu/drm/i915/i915_request.h

415

dma_fence_put(&rq->fence);

drivers/gpu/drm/i915/i915_request.h

422

struct dma_fence *fence);

drivers/gpu/drm/i915/i915_request.h

425

struct dma_fence *fence);

drivers/gpu/drm/i915/i915_request.h

458

return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags);

drivers/gpu/drm/i915/i915_request.h

463

return test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);

drivers/gpu/drm/i915/i915_request.h

468

return test_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

drivers/gpu/drm/i915/i915_request.h

474

return test_bit(I915_FENCE_FLAG_INITIAL_BREADCRUMB, &rq->fence.flags);

drivers/gpu/drm/i915/i915_request.h

518

return i915_seqno_passed(__hwsp_seqno(rq), rq->fence.seqno - 1);

drivers/gpu/drm/i915/i915_request.h

609

return i915_seqno_passed(__hwsp_seqno(rq), rq->fence.seqno);

drivers/gpu/drm/i915/i915_request.h

631

(u32 *)&rq->fence.seqno);

drivers/gpu/drm/i915/i915_request.h

636

return test_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags);

drivers/gpu/drm/i915/i915_request.h

642

return unlikely(test_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags));

drivers/gpu/drm/i915/i915_request.h

647

return unlikely(test_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags));

drivers/gpu/drm/i915/i915_request.h

652

return unlikely(test_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags));

drivers/gpu/drm/i915/i915_request.h

657

set_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);

drivers/gpu/drm/i915/i915_request.h

662

clear_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);

drivers/gpu/drm/i915/i915_request.h

68

rq__->fence.context, rq__->fence.seqno, \

drivers/gpu/drm/i915/i915_sw_fence.c

101

static inline void debug_fence_activate(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

105

static inline void debug_fence_set_state(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

110

static inline void debug_fence_deactivate(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

114

static inline void debug_fence_destroy(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

118

static inline __maybe_unused void debug_fence_free(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

122

static inline void debug_fence_assert(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

128

static int __i915_sw_fence_notify(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

131

return fence->fn(fence, state);

drivers/gpu/drm/i915/i915_sw_fence.c

135

void i915_sw_fence_fini(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

137

debug_fence_free(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

141

static void __i915_sw_fence_wake_up_all(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

144

wait_queue_head_t *x = &fence->wait;

drivers/gpu/drm/i915/i915_sw_fence.c

148

debug_fence_deactivate(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

149

atomic_set_release(&fence->pending, -1); /* 0 -> -1 [done] */

drivers/gpu/drm/i915/i915_sw_fence.c

175

wake_flags = fence->error;

drivers/gpu/drm/i915/i915_sw_fence.c

188

debug_fence_assert(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

191

static void __i915_sw_fence_complete(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

194

debug_fence_assert(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

196

if (!atomic_dec_and_test(&fence->pending))

drivers/gpu/drm/i915/i915_sw_fence.c

199

debug_fence_set_state(fence, DEBUG_FENCE_IDLE, DEBUG_FENCE_NOTIFY);

drivers/gpu/drm/i915/i915_sw_fence.c

201

if (__i915_sw_fence_notify(fence, FENCE_COMPLETE) != NOTIFY_DONE)

drivers/gpu/drm/i915/i915_sw_fence.c

204

debug_fence_set_state(fence, DEBUG_FENCE_NOTIFY, DEBUG_FENCE_IDLE);

drivers/gpu/drm/i915/i915_sw_fence.c

206

__i915_sw_fence_wake_up_all(fence, continuation);

drivers/gpu/drm/i915/i915_sw_fence.c

208

debug_fence_destroy(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

209

__i915_sw_fence_notify(fence, FENCE_FREE);

drivers/gpu/drm/i915/i915_sw_fence.c

212

void i915_sw_fence_complete(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

214

debug_fence_assert(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

216

if (WARN_ON(i915_sw_fence_done(fence)))

drivers/gpu/drm/i915/i915_sw_fence.c

219

__i915_sw_fence_complete(fence, NULL);

drivers/gpu/drm/i915/i915_sw_fence.c

222

bool i915_sw_fence_await(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

230

pending = atomic_read(&fence->pending);

drivers/gpu/drm/i915/i915_sw_fence.c

234

} while (!atomic_try_cmpxchg(&fence->pending, &pending, pending + 1));

drivers/gpu/drm/i915/i915_sw_fence.c

239

void __i915_sw_fence_init(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

244

__init_waitqueue_head(&fence->wait, name, key);

drivers/gpu/drm/i915/i915_sw_fence.c

245

fence->fn = fn;

drivers/gpu/drm/i915/i915_sw_fence.c

247

fence->flags = 0;

drivers/gpu/drm/i915/i915_sw_fence.c

250

i915_sw_fence_reinit(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

253

void i915_sw_fence_reinit(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

255

debug_fence_init(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

257

atomic_set(&fence->pending, 1);

drivers/gpu/drm/i915/i915_sw_fence.c

258

fence->error = 0;

drivers/gpu/drm/i915/i915_sw_fence.c

260

I915_SW_FENCE_BUG_ON(!list_empty(&fence->wait.head));

drivers/gpu/drm/i915/i915_sw_fence.c

263

void i915_sw_fence_commit(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

265

debug_fence_activate(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

266

i915_sw_fence_complete(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

282

static bool __i915_sw_fence_check_if_after(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

287

if (__test_and_set_bit(I915_SW_FENCE_CHECKED_BIT, &fence->flags))

drivers/gpu/drm/i915/i915_sw_fence.c

290

if (fence == signaler)

drivers/gpu/drm/i915/i915_sw_fence.c

293

list_for_each_entry(wq, &fence->wait.head, entry) {

drivers/gpu/drm/i915/i915_sw_fence.c

304

static void __i915_sw_fence_clear_checked_bit(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

308

if (!__test_and_clear_bit(I915_SW_FENCE_CHECKED_BIT, &fence->flags))

drivers/gpu/drm/i915/i915_sw_fence.c

311

list_for_each_entry(wq, &fence->wait.head, entry) {

drivers/gpu/drm/i915/i915_sw_fence.c

319

static bool i915_sw_fence_check_if_after(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

326

err = __i915_sw_fence_check_if_after(fence, signaler);

drivers/gpu/drm/i915/i915_sw_fence.c

327

__i915_sw_fence_clear_checked_bit(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

333

static bool i915_sw_fence_check_if_after(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

340

static int __i915_sw_fence_await_sw_fence(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

347

debug_fence_assert(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

351

i915_sw_fence_set_error_once(fence, signaler->error);

drivers/gpu/drm/i915/i915_sw_fence.c

358

if (unlikely(i915_sw_fence_check_if_after(fence, signaler)))

drivers/gpu/drm/i915/i915_sw_fence.c

369

i915_sw_fence_set_error_once(fence, signaler->error);

drivers/gpu/drm/i915/i915_sw_fence.c

379

wq->private = fence;

drivers/gpu/drm/i915/i915_sw_fence.c

381

i915_sw_fence_await(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

396

int i915_sw_fence_await_sw_fence(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

400

return __i915_sw_fence_await_sw_fence(fence, signaler, wq, 0);

drivers/gpu/drm/i915/i915_sw_fence.c

403

int i915_sw_fence_await_sw_fence_gfp(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

407

return __i915_sw_fence_await_sw_fence(fence, signaler, NULL, gfp);

drivers/gpu/drm/i915/i915_sw_fence.c

423

i915_sw_fence_set_error_once(cb->fence, dma->error);

drivers/gpu/drm/i915/i915_sw_fence.c

424

i915_sw_fence_complete(cb->fence);

drivers/gpu/drm/i915/i915_sw_fence.c

432

struct i915_sw_fence *fence;

drivers/gpu/drm/i915/i915_sw_fence.c

436

fence = xchg(&cb->base.fence, NULL);

drivers/gpu/drm/i915/i915_sw_fence.c

437

if (!fence)

drivers/gpu/drm/i915/i915_sw_fence.c

447

i915_sw_fence_debug_hint(fence));

drivers/gpu/drm/i915/i915_sw_fence.c

450

i915_sw_fence_set_error_once(fence, -ETIMEDOUT);

drivers/gpu/drm/i915/i915_sw_fence.c

451

i915_sw_fence_complete(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

459

struct i915_sw_fence *fence;

drivers/gpu/drm/i915/i915_sw_fence.c

461

fence = xchg(&cb->base.fence, NULL);

drivers/gpu/drm/i915/i915_sw_fence.c

462

if (fence) {

drivers/gpu/drm/i915/i915_sw_fence.c

463

i915_sw_fence_set_error_once(fence, dma->error);

drivers/gpu/drm/i915/i915_sw_fence.c

464

i915_sw_fence_complete(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

481

int i915_sw_fence_await_dma_fence(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

49

static inline void debug_fence_init(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

490

debug_fence_assert(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

494

i915_sw_fence_set_error_once(fence, dma->error);

drivers/gpu/drm/i915/i915_sw_fence.c

51

debug_object_init(fence, &i915_sw_fence_debug_descr);

drivers/gpu/drm/i915/i915_sw_fence.c

510

i915_sw_fence_set_error_once(fence, dma->error);

drivers/gpu/drm/i915/i915_sw_fence.c

514

cb->fence = fence;

drivers/gpu/drm/i915/i915_sw_fence.c

515

i915_sw_fence_await(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

54

static inline __maybe_unused void debug_fence_init_onstack(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

549

i915_sw_fence_set_error_once(cb->fence, dma->error);

drivers/gpu/drm/i915/i915_sw_fence.c

550

i915_sw_fence_complete(cb->fence);

drivers/gpu/drm/i915/i915_sw_fence.c

553

int __i915_sw_fence_await_dma_fence(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

559

debug_fence_assert(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

56

debug_object_init_on_stack(fence, &i915_sw_fence_debug_descr);

drivers/gpu/drm/i915/i915_sw_fence.c

562

i915_sw_fence_set_error_once(fence, dma->error);

drivers/gpu/drm/i915/i915_sw_fence.c

566

cb->fence = fence;

drivers/gpu/drm/i915/i915_sw_fence.c

567

i915_sw_fence_await(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

579

int i915_sw_fence_await_reservation(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

589

debug_fence_assert(fence);

drivers/gpu/drm/i915/i915_sw_fence.c

59

static inline void debug_fence_activate(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

594

pending = i915_sw_fence_await_dma_fence(fence, f, timeout,

drivers/gpu/drm/i915/i915_sw_fence.c

61

debug_object_activate(fence, &i915_sw_fence_debug_descr);

drivers/gpu/drm/i915/i915_sw_fence.c

64

static inline void debug_fence_set_state(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.c

67

debug_object_active_state(fence, &i915_sw_fence_debug_descr, old, new);

drivers/gpu/drm/i915/i915_sw_fence.c

70

static inline void debug_fence_deactivate(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

72

debug_object_deactivate(fence, &i915_sw_fence_debug_descr);

drivers/gpu/drm/i915/i915_sw_fence.c

75

static inline void debug_fence_destroy(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

77

debug_object_destroy(fence, &i915_sw_fence_debug_descr);

drivers/gpu/drm/i915/i915_sw_fence.c

80

static inline __maybe_unused void debug_fence_free(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

82

debug_object_free(fence, &i915_sw_fence_debug_descr);

drivers/gpu/drm/i915/i915_sw_fence.c

86

static inline void debug_fence_assert(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

88

debug_object_assert_init(fence, &i915_sw_fence_debug_descr);

drivers/gpu/drm/i915/i915_sw_fence.c

93

static inline void debug_fence_init(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.c

97

static inline __maybe_unused void debug_fence_init_onstack(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.h

101

static inline bool i915_sw_fence_signaled(const struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.h

103

return atomic_read(&fence->pending) <= 0;

drivers/gpu/drm/i915/i915_sw_fence.h

106

static inline bool i915_sw_fence_done(const struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.h

108

return atomic_read(&fence->pending) < 0;

drivers/gpu/drm/i915/i915_sw_fence.h

111

static inline void i915_sw_fence_wait(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence.h

113

wait_event(fence->wait, i915_sw_fence_done(fence));

drivers/gpu/drm/i915/i915_sw_fence.h

117

i915_sw_fence_set_error_once(struct i915_sw_fence *fence, int error)

drivers/gpu/drm/i915/i915_sw_fence.h

120

cmpxchg(&fence->error, 0, error);

drivers/gpu/drm/i915/i915_sw_fence.h

42

void __i915_sw_fence_init(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.h

47

#define i915_sw_fence_init(fence, fn) \

drivers/gpu/drm/i915/i915_sw_fence.h

52

__i915_sw_fence_init((fence), (fn), #fence, &__key); \

drivers/gpu/drm/i915/i915_sw_fence.h

55

#define i915_sw_fence_init(fence, fn) \

drivers/gpu/drm/i915/i915_sw_fence.h

58

__i915_sw_fence_init((fence), (fn), NULL, NULL); \

drivers/gpu/drm/i915/i915_sw_fence.h

62

void i915_sw_fence_reinit(struct i915_sw_fence *fence);

drivers/gpu/drm/i915/i915_sw_fence.h

65

void i915_sw_fence_fini(struct i915_sw_fence *fence);

drivers/gpu/drm/i915/i915_sw_fence.h

67

static inline void i915_sw_fence_fini(struct i915_sw_fence *fence) {}

drivers/gpu/drm/i915/i915_sw_fence.h

70

void i915_sw_fence_commit(struct i915_sw_fence *fence);

drivers/gpu/drm/i915/i915_sw_fence.h

72

int i915_sw_fence_await_sw_fence(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.h

75

int i915_sw_fence_await_sw_fence_gfp(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.h

81

struct i915_sw_fence *fence;

drivers/gpu/drm/i915/i915_sw_fence.h

84

int __i915_sw_fence_await_dma_fence(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.h

87

int i915_sw_fence_await_dma_fence(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.h

92

int i915_sw_fence_await_reservation(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_sw_fence.h

98

bool i915_sw_fence_await(struct i915_sw_fence *fence);

drivers/gpu/drm/i915/i915_sw_fence.h

99

void i915_sw_fence_complete(struct i915_sw_fence *fence);

drivers/gpu/drm/i915/i915_sw_fence_work.c

27

fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)

drivers/gpu/drm/i915/i915_sw_fence_work.c

29

struct dma_fence_work *f = container_of(fence, typeof(*f), chain);

drivers/gpu/drm/i915/i915_sw_fence_work.c

33

if (fence->error)

drivers/gpu/drm/i915/i915_sw_fence_work.c

34

dma_fence_set_error(&f->dma, fence->error);

drivers/gpu/drm/i915/i915_sw_fence_work.c

55

static const char *get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence_work.c

60

static const char *get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence_work.c

62

struct dma_fence_work *f = container_of(fence, typeof(*f), dma);

drivers/gpu/drm/i915/i915_sw_fence_work.c

67

static void fence_release(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_sw_fence_work.c

69

struct dma_fence_work *f = container_of(fence, typeof(*f), dma);

drivers/gpu/drm/i915/i915_trace.h

283

__entry->ctx = rq->fence.context;

drivers/gpu/drm/i915/i915_trace.h

284

__entry->seqno = rq->fence.seqno;

drivers/gpu/drm/i915/i915_trace.h

310

__entry->ctx = rq->fence.context;

drivers/gpu/drm/i915/i915_trace.h

311

__entry->seqno = rq->fence.seqno;

drivers/gpu/drm/i915/i915_trace.h

359

__entry->ctx = rq->fence.context;

drivers/gpu/drm/i915/i915_trace.h

360

__entry->seqno = rq->fence.seqno;

drivers/gpu/drm/i915/i915_trace.h

388

__entry->ctx = rq->fence.context;

drivers/gpu/drm/i915/i915_trace.h

389

__entry->seqno = rq->fence.seqno;

drivers/gpu/drm/i915/i915_trace.h

629

__entry->ctx = rq->fence.context;

drivers/gpu/drm/i915/i915_trace.h

630

__entry->seqno = rq->fence.seqno;

drivers/gpu/drm/i915/i915_vma.c

1972

struct dma_fence *fence,

drivers/gpu/drm/i915/i915_vma.c

1995

if (fence && !(flags & __EXEC_OBJECT_NO_RESERVE)) {

drivers/gpu/drm/i915/i915_vma.c

1999

dma_fence_array_for_each(curr, idx, fence)

drivers/gpu/drm/i915/i915_vma.c

2017

if (fence) {

drivers/gpu/drm/i915/i915_vma.c

2031

dma_fence_array_for_each(curr, idx, fence)

drivers/gpu/drm/i915/i915_vma.c

2035

if (flags & EXEC_OBJECT_NEEDS_FENCE && vma->fence)

drivers/gpu/drm/i915/i915_vma.c

2036

i915_active_add_request(&vma->fence->active, rq);

drivers/gpu/drm/i915/i915_vma.c

2080

GEM_BUG_ON(vma->fence);

drivers/gpu/drm/i915/i915_vma.c

2158

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_vma.c

2184

fence = __i915_vma_evict(vma, true);

drivers/gpu/drm/i915/i915_vma.c

2188

return fence;

drivers/gpu/drm/i915/i915_vma.c

2234

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_vma.c

2275

fence = __i915_vma_unbind_async(vma);

drivers/gpu/drm/i915/i915_vma.c

2277

if (IS_ERR_OR_NULL(fence)) {

drivers/gpu/drm/i915/i915_vma.c

2278

err = PTR_ERR_OR_ZERO(fence);

drivers/gpu/drm/i915/i915_vma.c

2282

dma_resv_add_fence(obj->base.resv, fence, DMA_RESV_USAGE_READ);

drivers/gpu/drm/i915/i915_vma.c

2283

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_vma.c

411

if (rcu_access_pointer(vma->active.excl.fence)) {

drivers/gpu/drm/i915/i915_vma.c

412

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_vma.c

415

fence = dma_fence_get_rcu_safe(&vma->active.excl.fence);

drivers/gpu/drm/i915/i915_vma.c

417

if (fence) {

drivers/gpu/drm/i915/i915_vma.c

418

err = dma_fence_wait(fence, true);

drivers/gpu/drm/i915/i915_vma.c

419

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_vma.c

429

struct dma_fence *fence = i915_active_fence_get(&vma->active.excl);

drivers/gpu/drm/i915/i915_vma.c

432

if (!fence)

drivers/gpu/drm/i915/i915_vma.c

435

if (dma_fence_is_signaled(fence))

drivers/gpu/drm/i915/i915_vma.c

436

err = fence->error;

drivers/gpu/drm/i915/i915_vma.c

440

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_vma.h

388

GEM_BUG_ON(atomic_read(&vma->fence->pin_count) <= 0);

drivers/gpu/drm/i915/i915_vma.h

389

atomic_dec(&vma->fence->pin_count);

drivers/gpu/drm/i915/i915_vma.h

403

if (vma->fence)

drivers/gpu/drm/i915/i915_vma.h

409

return vma->fence ? vma->fence->id : -1;

drivers/gpu/drm/i915/i915_vma.h

62

struct dma_fence *fence,

drivers/gpu/drm/i915/i915_vma.h

68

return _i915_vma_move_to_active(vma, rq, &rq->fence, flags);

drivers/gpu/drm/i915/i915_vma_resource.c

190

i915_vma_resource_fence_notify(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/i915_vma_resource.c

194

container_of(fence, typeof(*vma_res), chain);

drivers/gpu/drm/i915/i915_vma_resource.c

333

struct dma_fence *fence;

drivers/gpu/drm/i915/i915_vma_resource.c

336

fence = NULL;

drivers/gpu/drm/i915/i915_vma_resource.c

341

fence = dma_fence_get_rcu(&node->unbind_fence);

drivers/gpu/drm/i915/i915_vma_resource.c

344

if (fence) {

drivers/gpu/drm/i915/i915_vma_resource.c

349

dma_fence_wait(fence, false);

drivers/gpu/drm/i915/i915_vma_resource.c

350

dma_fence_put(fence);

drivers/gpu/drm/i915/i915_vma_resource.c

69

static const char *get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_vma_resource.c

74

static const char *get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_vma_resource.c

87

static void unbind_fence_release(struct dma_fence *fence)

drivers/gpu/drm/i915/i915_vma_resource.c

90

container_of(fence, typeof(*vma_res), unbind_fence);

drivers/gpu/drm/i915/i915_vma_resource.c

94

call_rcu(&fence->rcu, unbind_fence_free_rcu);

drivers/gpu/drm/i915/i915_vma_types.h

147

struct i915_fence_reg *fence;

drivers/gpu/drm/i915/selftests/i915_active.c

320

struct dma_fence *fence;

drivers/gpu/drm/i915/selftests/i915_active.c

322

fence = xchg(__active_fence_slot(active), NULL);

drivers/gpu/drm/i915/selftests/i915_active.c

323

if (!fence)

drivers/gpu/drm/i915/selftests/i915_active.c

326

spin_lock_irq(fence->lock);

drivers/gpu/drm/i915/selftests/i915_active.c

328

spin_unlock_irq(fence->lock); /* serialise with fence->cb_list */

drivers/gpu/drm/i915/selftests/i915_active.c

331

GEM_BUG_ON(!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags));

drivers/gpu/drm/i915/selftests/i915_gem_evict.c

450

struct i915_sw_fence fence;

drivers/gpu/drm/i915/selftests/i915_gem_evict.c

454

onstack_fence_init(&fence);

drivers/gpu/drm/i915/selftests/i915_gem_evict.c

482

&fence,

drivers/gpu/drm/i915/selftests/i915_gem_evict.c

494

onstack_fence_fini(&fence);

drivers/gpu/drm/i915/selftests/i915_mock_selftests.h

20

selftest(fence, i915_sw_fence_mock_selftests)

drivers/gpu/drm/i915/selftests/i915_request.c

1368

&prev->fence);

drivers/gpu/drm/i915/selftests/i915_request.c

167

if (dma_fence_wait_timeout(&request->fence, false, T) != -ETIME) {

drivers/gpu/drm/i915/selftests/i915_request.c

174

if (dma_fence_is_signaled(&request->fence)) {

drivers/gpu/drm/i915/selftests/i915_request.c

179

if (dma_fence_wait_timeout(&request->fence, false, T / 2) != -ETIME) {

drivers/gpu/drm/i915/selftests/i915_request.c

184

if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {

drivers/gpu/drm/i915/selftests/i915_request.c

189

if (!dma_fence_is_signaled(&request->fence)) {

drivers/gpu/drm/i915/selftests/i915_request.c

1891

struct dma_fence *fence;

drivers/gpu/drm/i915/selftests/i915_request.c

1897

fence = i915_active_fence_get(&ce->timeline->last_request);

drivers/gpu/drm/i915/selftests/i915_request.c

1898

if (fence) {

drivers/gpu/drm/i915/selftests/i915_request.c

1899

i915_request_await_dma_fence(rq, fence);

drivers/gpu/drm/i915/selftests/i915_request.c

1900

dma_fence_put(fence);

drivers/gpu/drm/i915/selftests/i915_request.c

194

if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {

drivers/gpu/drm/i915/selftests/i915_request.c

2358

struct i915_request *fence = NULL;

drivers/gpu/drm/i915/selftests/i915_request.c

2395

if (fence) {

drivers/gpu/drm/i915/selftests/i915_request.c

2397

&fence->fence);

drivers/gpu/drm/i915/selftests/i915_request.c

2416

i915_request_put(fence);

drivers/gpu/drm/i915/selftests/i915_request.c

2417

fence = i915_request_get(rq);

drivers/gpu/drm/i915/selftests/i915_request.c

2422

i915_request_put(fence);

drivers/gpu/drm/i915/selftests/i915_request.c

2441

i915_request_put(fence);

drivers/gpu/drm/i915/selftests/i915_request.c

2561

static void signal_cb(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/i915/selftests/i915_request.c

2611

dma_fence_add_callback(&rq->fence, &cb.base, signal_cb);

drivers/gpu/drm/i915/selftests/i915_request.c

390

&rq->fence,

drivers/gpu/drm/i915/selftests/i915_request.c

411

rq->fence.context, rq->fence.seqno,

drivers/gpu/drm/i915/selftests/i915_request.c

425

&rq->fence.flags)) {

drivers/gpu/drm/i915/selftests/i915_request.c

427

rq->fence.context, rq->fence.seqno);

drivers/gpu/drm/i915/selftests/i915_request.c

680

if (rq->fence.error != -EINTR) {

drivers/gpu/drm/i915/selftests/i915_request.c

682

engine->name, rq->fence.error);

drivers/gpu/drm/i915/selftests/i915_request.c

741

if (rq->fence.error != -EINTR) {

drivers/gpu/drm/i915/selftests/i915_request.c

743

engine->name, rq->fence.error);

drivers/gpu/drm/i915/selftests/i915_request.c

790

if (rq->fence.error) {

drivers/gpu/drm/i915/selftests/i915_request.c

792

engine->name, rq->fence.error);

drivers/gpu/drm/i915/selftests/i915_request.c

879

if (rq->fence.error != -EINTR) {

drivers/gpu/drm/i915/selftests/i915_request.c

881

engine->name, rq->fence.error);

drivers/gpu/drm/i915/selftests/i915_request.c

895

if (nop->fence.error != 0) {

drivers/gpu/drm/i915/selftests/i915_request.c

897

engine->name, nop->fence.error);

drivers/gpu/drm/i915/selftests/i915_selftest.c

180

wait_for(i915_sw_fence_done(&huc->delayed_load.fence), timeout_ms))

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

32

fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

48

struct i915_sw_fence *fence;

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

50

fence = kmalloc_obj(*fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

51

if (!fence)

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

54

i915_sw_fence_init(fence, fence_notify);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

55

return fence;

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

58

static void free_fence(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

586

if (!i915_sw_fence_done(&tf.fence)) {

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

596

if (i915_sw_fence_done(&tf.fence)) {

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

60

i915_sw_fence_fini(fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

602

i915_sw_fence_wait(&tf.fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

605

if (!i915_sw_fence_done(&tf.fence)) {

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

61

kfree(fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

626

static const char *mock_name(struct dma_fence *fence)

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

64

static int __test_self(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

652

struct i915_sw_fence *fence;

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

655

fence = alloc_fence();

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

656

if (!fence)

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

659

err = i915_sw_fence_await_dma_fence(fence, dma, delay, GFP_NOWAIT);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

66

if (i915_sw_fence_done(fence))

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

660

i915_sw_fence_commit(fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

662

free_fence(fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

666

return fence;

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

69

i915_sw_fence_commit(fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

70

if (!i915_sw_fence_done(fence))

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

73

i915_sw_fence_wait(fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

74

if (!i915_sw_fence_done(fence))

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

82

struct i915_sw_fence *fence;

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

86

fence = alloc_fence();

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

87

if (!fence)

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

90

ret = __test_self(fence);

drivers/gpu/drm/i915/selftests/i915_sw_fence.c

92

free_fence(fence);

drivers/gpu/drm/i915/selftests/igt_spinner.c

112

static unsigned int seqno_offset(u64 fence)

drivers/gpu/drm/i915/selftests/igt_spinner.c

114

return offset_in_page(sizeof(u32) * fence);

drivers/gpu/drm/i915/selftests/igt_spinner.c

120

return i915_vma_offset(hws) + seqno_offset(rq->fence.context);

drivers/gpu/drm/i915/selftests/igt_spinner.c

179

*batch++ = rq->fence.seqno;

drivers/gpu/drm/i915/selftests/igt_spinner.c

223

u32 *seqno = spin->seqno + seqno_offset(rq->fence.context);

drivers/gpu/drm/i915/selftests/igt_spinner.c

260

rq->fence.seqno),

drivers/gpu/drm/i915/selftests/igt_spinner.c

263

rq->fence.seqno),

drivers/gpu/drm/i915/selftests/intel_memory_region.c

1070

dma_resv_add_fence(obj->base.resv, &rq->fence,

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

102

heap_fence_put(&h->fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

116

i915_sw_fence_init(&h->fence, heap_fence_notify);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

119

return &h->fence;

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

126

i915_sw_fence_fini(&h->fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

131

void heap_fence_put(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

133

struct heap_fence *h = container_of(fence, typeof(*h), fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

30

nop_fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

35

void __onstack_fence_init(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

39

debug_fence_init_onstack(fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

41

__init_waitqueue_head(&fence->wait, name, key);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

42

atomic_set(&fence->pending, 1);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

43

fence->error = 0;

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

44

fence->fn = nop_fence_notify;

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

47

void onstack_fence_fini(struct i915_sw_fence *fence)

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

49

if (!fence->fn)

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

52

i915_sw_fence_commit(fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

53

i915_sw_fence_fini(fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

60

i915_sw_fence_commit(&tf->fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

65

onstack_fence_init(&tf->fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

72

i915_sw_fence_commit(&tf->fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

78

i915_sw_fence_commit(&tf->fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

81

i915_sw_fence_fini(&tf->fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

85

struct i915_sw_fence fence;

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

93

heap_fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)

drivers/gpu/drm/i915/selftests/lib_sw_fence.c

95

struct heap_fence *h = container_of(fence, typeof(*h), fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.h

16

#define onstack_fence_init(fence) \

drivers/gpu/drm/i915/selftests/lib_sw_fence.h

20

__onstack_fence_init((fence), #fence, &__key); \

drivers/gpu/drm/i915/selftests/lib_sw_fence.h

23

#define onstack_fence_init(fence) \

drivers/gpu/drm/i915/selftests/lib_sw_fence.h

24

__onstack_fence_init((fence), NULL, NULL)

drivers/gpu/drm/i915/selftests/lib_sw_fence.h

27

void __onstack_fence_init(struct i915_sw_fence *fence,

drivers/gpu/drm/i915/selftests/lib_sw_fence.h

30

void onstack_fence_fini(struct i915_sw_fence *fence);

drivers/gpu/drm/i915/selftests/lib_sw_fence.h

33

struct i915_sw_fence fence;

drivers/gpu/drm/i915/selftests/lib_sw_fence.h

41

void heap_fence_put(struct i915_sw_fence *fence);

drivers/gpu/drm/imagination/pvr_ccb.c

474

struct pvr_kccb_fence *fence, *tmp_fence;

drivers/gpu/drm/imagination/pvr_ccb.c

488

list_for_each_entry_safe(fence, tmp_fence, &pvr_dev->kccb.waiters, node) {

drivers/gpu/drm/imagination/pvr_ccb.c

492

list_del(&fence->node);

drivers/gpu/drm/imagination/pvr_ccb.c

495

dma_fence_signal(&fence->base);

drivers/gpu/drm/imagination/pvr_ccb.c

496

dma_fence_put(&fence->base);

drivers/gpu/drm/imagination/pvr_ccb.c

560

void pvr_kccb_fence_put(struct dma_fence *fence)

drivers/gpu/drm/imagination/pvr_ccb.c

562

if (!fence)

drivers/gpu/drm/imagination/pvr_ccb.c

565

if (!fence->ops) {

drivers/gpu/drm/imagination/pvr_ccb.c

566

dma_fence_free(fence);

drivers/gpu/drm/imagination/pvr_ccb.c

568

WARN_ON(fence->ops != &pvr_kccb_fence_ops);

drivers/gpu/drm/imagination/pvr_ccb.c

569

dma_fence_put(fence);

drivers/gpu/drm/imagination/pvr_ccb.c

591

struct pvr_kccb_fence *fence = container_of(f, struct pvr_kccb_fence, base);

drivers/gpu/drm/imagination/pvr_ccb.c

599

dma_fence_init(&fence->base, &pvr_kccb_fence_ops,

drivers/gpu/drm/imagination/pvr_ccb.c

603

out_fence = dma_fence_get(&fence->base);

drivers/gpu/drm/imagination/pvr_ccb.c

604

list_add_tail(&fence->node, &pvr_dev->kccb.waiters);

drivers/gpu/drm/imagination/pvr_ccb.h

54

void pvr_kccb_fence_put(struct dma_fence *fence);

drivers/gpu/drm/imagination/pvr_queue.c

114

struct pvr_queue_fence *fence = container_of(w, struct pvr_queue_fence, release_work);

drivers/gpu/drm/imagination/pvr_queue.c

116

pvr_context_put(fence->queue->ctx);

drivers/gpu/drm/imagination/pvr_queue.c

117

dma_fence_free(&fence->base);

drivers/gpu/drm/imagination/pvr_queue.c

122

struct pvr_queue_fence *fence = container_of(f, struct pvr_queue_fence, base);

drivers/gpu/drm/imagination/pvr_queue.c

123

struct pvr_device *pvr_dev = fence->queue->ctx->pvr_dev;

drivers/gpu/drm/imagination/pvr_queue.c

125

queue_work(pvr_dev->sched_wq, &fence->release_work);

drivers/gpu/drm/imagination/pvr_queue.c

131

struct pvr_queue_fence *fence = container_of(f, struct pvr_queue_fence, base);

drivers/gpu/drm/imagination/pvr_queue.c

133

switch (fence->queue->type) {

drivers/gpu/drm/imagination/pvr_queue.c

154

struct pvr_queue_fence *fence = container_of(f, struct pvr_queue_fence, base);

drivers/gpu/drm/imagination/pvr_queue.c

156

switch (fence->queue->type) {

drivers/gpu/drm/imagination/pvr_queue.c

250

struct pvr_queue_fence *fence;

drivers/gpu/drm/imagination/pvr_queue.c

252

fence = kzalloc_obj(*fence);

drivers/gpu/drm/imagination/pvr_queue.c

253

if (!fence)

drivers/gpu/drm/imagination/pvr_queue.c

256

return &fence->base;

drivers/gpu/drm/imagination/pvr_queue.c

275

struct pvr_queue_fence *fence = container_of(f, struct pvr_queue_fence, base);

drivers/gpu/drm/imagination/pvr_queue.c

278

fence->queue = queue;

drivers/gpu/drm/imagination/pvr_queue.c

279

INIT_WORK(&fence->release_work, pvr_queue_fence_release_work);

drivers/gpu/drm/imagination/pvr_queue.c

280

dma_fence_init(&fence->base, fence_ops,

drivers/gpu/drm/imagination/pvr_queue.c

296

pvr_queue_cccb_fence_init(struct dma_fence *fence, struct pvr_queue *queue)

drivers/gpu/drm/imagination/pvr_queue.c

298

pvr_queue_fence_init(fence, queue, &pvr_queue_cccb_fence_ops,

drivers/gpu/drm/imagination/pvr_queue.c

314

pvr_queue_job_fence_init(struct dma_fence *fence, struct pvr_queue *queue)

drivers/gpu/drm/imagination/pvr_queue.c

316

if (!fence->ops)

drivers/gpu/drm/imagination/pvr_queue.c

317

pvr_queue_fence_init(fence, queue, &pvr_queue_job_fence_ops,

drivers/gpu/drm/imagination/pvr_queue.c

368

struct dma_fence *fence = NULL;

drivers/gpu/drm/imagination/pvr_queue.c

371

xa_for_each(&job->base.dependencies, index, fence) {

drivers/gpu/drm/imagination/pvr_queue.c

374

jfence = to_pvr_queue_job_fence(fence);

drivers/gpu/drm/imagination/pvr_queue.c

617

struct dma_fence *fence;

drivers/gpu/drm/imagination/pvr_queue.c

628

xa_for_each(&job->base.dependencies, index, fence) {

drivers/gpu/drm/imagination/pvr_queue.c

629

jfence = to_pvr_queue_job_fence(fence);

drivers/gpu/drm/imagination/pvr_queue.c

635

&job->paired_job->base.s_fence->scheduled == fence)

drivers/gpu/drm/imagination/pvr_sync.c

177

old_fence = sig_sync->fence;

drivers/gpu/drm/imagination/pvr_sync.c

178

sig_sync->fence = dma_fence_get(done_fence);

drivers/gpu/drm/imagination/pvr_sync.c

181

if (WARN_ON(!sig_sync->fence))

drivers/gpu/drm/imagination/pvr_sync.c

197

sig_sync->fence, sig_sync->point);

drivers/gpu/drm/imagination/pvr_sync.c

200

drm_syncobj_replace_fence(sig_sync->syncobj, sig_sync->fence);

drivers/gpu/drm/imagination/pvr_sync.c

260

struct dma_fence *fence;

drivers/gpu/drm/imagination/pvr_sync.c

272

if (WARN_ON(!sig_sync->fence))

drivers/gpu/drm/imagination/pvr_sync.c

275

fence = dma_fence_get(sig_sync->fence);

drivers/gpu/drm/imagination/pvr_sync.c

278

sync_ops[i].value, 0, &fence);

drivers/gpu/drm/imagination/pvr_sync.c

283

err = pvr_sync_add_dep_to_job(job, fence);

drivers/gpu/drm/imagination/pvr_sync.c

43

dma_fence_put(sig_sync->fence);

drivers/gpu/drm/imagination/pvr_sync.c

93

sig_sync->fence = cur_fence;

drivers/gpu/drm/imagination/pvr_sync.h

57

struct dma_fence *fence;

drivers/gpu/drm/lima/lima_gem.c

304

struct dma_fence *fence;

drivers/gpu/drm/lima/lima_gem.c

361

fence = lima_sched_context_queue_task(submit->task);

drivers/gpu/drm/lima/lima_gem.c

364

dma_resv_add_fence(lima_bo_resv(bos[i]), fence,

drivers/gpu/drm/lima/lima_gem.c

376

drm_syncobj_replace_fence(out_sync, fence);

drivers/gpu/drm/lima/lima_gem.c

380

dma_fence_put(fence);

drivers/gpu/drm/lima/lima_sched.c

102

return fence;

drivers/gpu/drm/lima/lima_sched.c

177

struct dma_fence *fence = dma_fence_get(&task->base.s_fence->finished);

drivers/gpu/drm/lima/lima_sched.c

181

return fence;

drivers/gpu/drm/lima/lima_sched.c

211

struct lima_fence *fence;

drivers/gpu/drm/lima/lima_sched.c

218

fence = lima_fence_create(pipe);

drivers/gpu/drm/lima/lima_sched.c

219

if (!fence)

drivers/gpu/drm/lima/lima_sched.c

224

dma_fence_put(&fence->base);

drivers/gpu/drm/lima/lima_sched.c

228

task->fence = &fence->base;

drivers/gpu/drm/lima/lima_sched.c

233

dma_fence_get(task->fence);

drivers/gpu/drm/lima/lima_sched.c

270

return task->fence;

drivers/gpu/drm/lima/lima_sched.c

415

if (dma_fence_is_signaled(task->fence)) {

drivers/gpu/drm/lima/lima_sched.c

432

if (dma_fence_is_signaled(task->fence)) {

drivers/gpu/drm/lima/lima_sched.c

483

dma_fence_put(task->fence);

drivers/gpu/drm/lima/lima_sched.c

52

static inline struct lima_fence *to_lima_fence(struct dma_fence *fence)

drivers/gpu/drm/lima/lima_sched.c

54

return container_of(fence, struct lima_fence, base);

drivers/gpu/drm/lima/lima_sched.c

557

dma_fence_signal(task->fence);

drivers/gpu/drm/lima/lima_sched.c

57

static const char *lima_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/lima/lima_sched.c

62

static const char *lima_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/lima/lima_sched.c

64

struct lima_fence *f = to_lima_fence(fence);

drivers/gpu/drm/lima/lima_sched.c

72

struct lima_fence *fence = to_lima_fence(f);

drivers/gpu/drm/lima/lima_sched.c

74

kmem_cache_free(lima_fence_slab, fence);

drivers/gpu/drm/lima/lima_sched.c

77

static void lima_fence_release(struct dma_fence *fence)

drivers/gpu/drm/lima/lima_sched.c

79

struct lima_fence *f = to_lima_fence(fence);

drivers/gpu/drm/lima/lima_sched.c

92

struct lima_fence *fence;

drivers/gpu/drm/lima/lima_sched.c

94

fence = kmem_cache_zalloc(lima_fence_slab, GFP_KERNEL);

drivers/gpu/drm/lima/lima_sched.c

95

if (!fence)

drivers/gpu/drm/lima/lima_sched.c

98

fence->pipe = pipe;

drivers/gpu/drm/lima/lima_sched.c

99

dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock,

drivers/gpu/drm/lima/lima_sched.h

33

struct dma_fence *fence;

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

46

OUT_RING(ring, rbmemptr(ring, fence));

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

72

OUT_RING(ring, rbmemptr(ring, fence));

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

66

OUT_RING(ring, rbmemptr(ring, fence));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

123

ring->memptrs->fence = submit->seqno;

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

227

OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

228

OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

70

empty = ring->memptrs->fence == a5xx_gpu->last_seqno[i];

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

222

OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

223

OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

403

OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

404

OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

588

OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

589

OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

78

empty = ring->memptrs->fence == a6xx_gpu->last_seqno[i];

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1041

ring->memptrs->fence,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

676

if (fence_before(ring->fctx->last_fence, ring->memptrs->fence)) {

drivers/gpu/drm/msm/adreno/adreno_gpu.c

677

ring->memptrs->fence = ring->fctx->last_fence;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

766

state->ring[i].fence = gpu->rb[i]->memptrs->fence;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

986

drm_printf(p, " retired-fence: %u\n", state->ring[i].fence);

drivers/gpu/drm/msm/msm_drv.c

660

struct dma_fence *fence;

drivers/gpu/drm/msm/msm_drv.c

678

fence = idr_find(&queue->fence_idr, fence_id);

drivers/gpu/drm/msm/msm_drv.c

679

if (fence)

drivers/gpu/drm/msm/msm_drv.c

680

fence = dma_fence_get_rcu(fence);

drivers/gpu/drm/msm/msm_drv.c

683

if (!fence)

drivers/gpu/drm/msm/msm_drv.c

687

dma_fence_set_deadline(fence, ktime_get());

drivers/gpu/drm/msm/msm_drv.c

689

ret = dma_fence_wait_timeout(fence, true, timeout_to_jiffies(&timeout));

drivers/gpu/drm/msm/msm_drv.c

696

dma_fence_put(fence);

drivers/gpu/drm/msm/msm_drv.c

721

ret = wait_fence(queue, args->fence, to_ktime(args->timeout), args->flags);

drivers/gpu/drm/msm/msm_fence.c

110

static inline struct msm_fence *to_msm_fence(struct dma_fence *fence)

drivers/gpu/drm/msm/msm_fence.c

112

return container_of(fence, struct msm_fence, base);

drivers/gpu/drm/msm/msm_fence.c

115

static const char *msm_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/msm/msm_fence.c

120

static const char *msm_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/msm/msm_fence.c

122

struct msm_fence *f = to_msm_fence(fence);

drivers/gpu/drm/msm/msm_fence.c

126

static bool msm_fence_signaled(struct dma_fence *fence)

drivers/gpu/drm/msm/msm_fence.c

128

struct msm_fence *f = to_msm_fence(fence);

drivers/gpu/drm/msm/msm_fence.c

132

static void msm_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)

drivers/gpu/drm/msm/msm_fence.c

134

struct msm_fence *f = to_msm_fence(fence);

drivers/gpu/drm/msm/msm_fence.c

146

max(fctx->next_deadline_fence, (uint32_t)fence->seqno);

drivers/gpu/drm/msm/msm_fence.c

187

msm_fence_init(struct dma_fence *fence, struct msm_fence_context *fctx)

drivers/gpu/drm/msm/msm_fence.c

189

struct msm_fence *f = to_msm_fence(fence);

drivers/gpu/drm/msm/msm_fence.c

197

WARN_ON(kref_read(&fence->refcount));

drivers/gpu/drm/msm/msm_fence.c

82

bool msm_fence_completed(struct msm_fence_context *fctx, uint32_t fence)

drivers/gpu/drm/msm/msm_fence.c

88

return (int32_t)(fctx->completed_fence - fence) >= 0 ||

drivers/gpu/drm/msm/msm_fence.c

89

(int32_t)(*fctx->fenceptr - fence) >= 0;

drivers/gpu/drm/msm/msm_fence.c

93

void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence)

drivers/gpu/drm/msm/msm_fence.c

98

if (fence_after(fence, fctx->completed_fence))

drivers/gpu/drm/msm/msm_fence.c

99

fctx->completed_fence = fence;

drivers/gpu/drm/msm/msm_fence.h

83

bool msm_fence_completed(struct msm_fence_context *fctx, uint32_t fence);

drivers/gpu/drm/msm/msm_fence.h

84

void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence);

drivers/gpu/drm/msm/msm_fence.h

87

void msm_fence_init(struct dma_fence *fence, struct msm_fence_context *fctx);

drivers/gpu/drm/msm/msm_gem_submit.c

733

(!args->fence || idr_find(&queue->fence_idr, args->fence))) {

drivers/gpu/drm/msm/msm_gem_submit.c

750

submit->fence_id = args->fence;

drivers/gpu/drm/msm/msm_gem_submit.c

807

args->fence = submit->fence_id;

drivers/gpu/drm/msm/msm_gem_vma.c

114

struct dma_fence *fence;

drivers/gpu/drm/msm/msm_gem_vma.c

1414

dma_resv_add_fence(obj->resv, job->fence,

drivers/gpu/drm/msm/msm_gem_vma.c

1431

struct dma_fence *fence;

drivers/gpu/drm/msm/msm_gem_vma.c

1547

job->fence = dma_fence_get(&job->base.s_fence->finished);

drivers/gpu/drm/msm/msm_gem_vma.c

1550

sync_file = sync_file_create(job->fence);

drivers/gpu/drm/msm/msm_gem_vma.c

1564

fence = dma_fence_get(job->fence);

drivers/gpu/drm/msm/msm_gem_vma.c

1569

msm_syncobj_process_post_deps(post_deps, args->nr_out_syncobjs, fence);

drivers/gpu/drm/msm/msm_gem_vma.c

1571

dma_fence_put(fence);

drivers/gpu/drm/msm/msm_gem_vma.c

768

dma_fence_put(job->fence);

drivers/gpu/drm/msm/msm_gpu.c

420

find_submit(struct msm_ringbuffer *ring, uint32_t fence)

drivers/gpu/drm/msm/msm_gpu.c

427

if (submit->seqno == fence) {

drivers/gpu/drm/msm/msm_gpu.c

478

submit = find_submit(cur_ring, cur_ring->memptrs->fence + 1);

drivers/gpu/drm/msm/msm_gpu.c

537

uint32_t fence = ring->memptrs->fence;

drivers/gpu/drm/msm/msm_gpu.c

544

ring->memptrs->fence = ++fence;

drivers/gpu/drm/msm/msm_gpu.c

546

msm_update_fence(ring->fctx, fence);

drivers/gpu/drm/msm/msm_gpu.c

593

submit = find_submit(cur_ring, cur_ring->memptrs->fence + 1);

drivers/gpu/drm/msm/msm_gpu.c

646

uint32_t fence = ring->memptrs->fence;

drivers/gpu/drm/msm/msm_gpu.c

648

if (fence != ring->hangcheck_fence) {

drivers/gpu/drm/msm/msm_gpu.c

650

ring->hangcheck_fence = fence;

drivers/gpu/drm/msm/msm_gpu.c

652

} else if (fence_before(fence, ring->fctx->last_fence) &&

drivers/gpu/drm/msm/msm_gpu.c

655

ring->hangcheck_fence = fence;

drivers/gpu/drm/msm/msm_gpu.c

660

gpu->name, fence);

drivers/gpu/drm/msm/msm_gpu.c

872

msm_update_fence(gpu->rb[i]->fctx, gpu->rb[i]->memptrs->fence);

drivers/gpu/drm/msm/msm_gpu.h

316

if (fence_after(ring->fctx->last_fence, ring->memptrs->fence))

drivers/gpu/drm/msm/msm_gpu.h

569

u32 fence;

drivers/gpu/drm/msm/msm_ringbuffer.c

122

ring->fctx = msm_fence_context_alloc(gpu->dev, &ring->memptrs->fence, name);

drivers/gpu/drm/msm/msm_ringbuffer.h

32

volatile uint32_t fence;

drivers/gpu/drm/msm/msm_syncobj.c

157

uint32_t count, struct dma_fence *fence)

drivers/gpu/drm/msm/msm_syncobj.c

165

fence, post_deps[i].point);

drivers/gpu/drm/msm/msm_syncobj.c

169

fence);

drivers/gpu/drm/msm/msm_syncobj.h

35

uint32_t count, struct dma_fence *fence);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1042

struct nouveau_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1098

struct nouveau_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1149

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1217

ret = nv04_page_flip_emit(chan, old_bo, new_bo, s, &fence);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1225

nouveau_bo_fence(old_bo, fence, false);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

1229

nouveau_fence_unref(&fence);

drivers/gpu/drm/nouveau/gv100_fence.c

79

fctx = chan->fence;

drivers/gpu/drm/nouveau/gv100_fence.c

95

priv = drm->fence;

drivers/gpu/drm/nouveau/nouveau_bo.c

101

tile->fence = (struct nouveau_fence *)dma_fence_get(fence);

drivers/gpu/drm/nouveau/nouveau_bo.c

1130

struct dma_fence *fence;

drivers/gpu/drm/nouveau/nouveau_bo.c

1134

&fence);

drivers/gpu/drm/nouveau/nouveau_bo.c

1139

nv10_bo_put_tile_region(dev, *old_tile, fence);

drivers/gpu/drm/nouveau/nouveau_bo.c

1472

nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)

drivers/gpu/drm/nouveau/nouveau_bo.c

1476

if (!fence)

drivers/gpu/drm/nouveau/nouveau_bo.c

1479

dma_resv_add_fence(resv, &fence->base, exclusive ?

drivers/gpu/drm/nouveau/nouveau_bo.c

64

nouveau_fence_unref(&reg->fence);

drivers/gpu/drm/nouveau/nouveau_bo.c

84

(!tile->fence || nouveau_fence_done(tile->fence)))

drivers/gpu/drm/nouveau/nouveau_bo.c

943

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nouveau_bo.c

95

struct dma_fence *fence)

drivers/gpu/drm/nouveau/nouveau_bo.c

969

ret = nouveau_fence_new(&fence, chan);

drivers/gpu/drm/nouveau/nouveau_bo.c

981

nouveau_fence_wait(fence, false, false);

drivers/gpu/drm/nouveau/nouveau_bo.c

982

ret = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false,

drivers/gpu/drm/nouveau/nouveau_bo.c

984

nouveau_fence_unref(&fence);

drivers/gpu/drm/nouveau/nouveau_chan.c

47

if (chan->fence)

drivers/gpu/drm/nouveau/nouveau_chan.c

48

nouveau_fence_context_kill(chan->fence, -ENODEV);

drivers/gpu/drm/nouveau/nouveau_chan.c

68

if (likely(chan && chan->fence && !atomic_read(&chan->killed))) {

drivers/gpu/drm/nouveau/nouveau_chan.c

70

struct nouveau_fence *fence = NULL;

drivers/gpu/drm/nouveau/nouveau_chan.c

73

ret = nouveau_fence_new(&fence, chan);

drivers/gpu/drm/nouveau/nouveau_chan.c

75

ret = nouveau_fence_wait(fence, false, false);

drivers/gpu/drm/nouveau/nouveau_chan.c

76

nouveau_fence_unref(&fence);

drivers/gpu/drm/nouveau/nouveau_chan.c

93

if (chan->fence)

drivers/gpu/drm/nouveau/nouveau_chan.h

34

void *fence;

drivers/gpu/drm/nouveau/nouveau_dmem.c

142

static void nouveau_dmem_fence_done(struct nouveau_fence **fence)

drivers/gpu/drm/nouveau/nouveau_dmem.c

144

if (fence) {

drivers/gpu/drm/nouveau/nouveau_dmem.c

145

nouveau_fence_wait(*fence, true, false);

drivers/gpu/drm/nouveau/nouveau_dmem.c

146

nouveau_fence_unref(fence);

drivers/gpu/drm/nouveau/nouveau_dmem.c

187

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nouveau_dmem.c

267

nouveau_fence_new(&fence, dmem->migrate.chan);

drivers/gpu/drm/nouveau/nouveau_dmem.c

269

nouveau_dmem_fence_done(&fence);

drivers/gpu/drm/nouveau/nouveau_dmem.c

480

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nouveau_dmem.c

517

nouveau_fence_new(&fence, chunk->drm->dmem->migrate.chan);

drivers/gpu/drm/nouveau/nouveau_dmem.c

519

nouveau_dmem_fence_done(&fence);

drivers/gpu/drm/nouveau/nouveau_dmem.c

787

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nouveau_dmem.c

809

nouveau_fence_new(&fence, drm->dmem->migrate.chan);

drivers/gpu/drm/nouveau/nouveau_dmem.c

811

nouveau_dmem_fence_done(&fence);

drivers/gpu/drm/nouveau/nouveau_drm.c

1018

if (drm->fence && nouveau_fence(drm)->resume)

drivers/gpu/drm/nouveau/nouveau_drm.c

157

nouveau_cli_work_ready(struct dma_fence *fence)

drivers/gpu/drm/nouveau/nouveau_drm.c

161

spin_lock_irq(fence->lock);

drivers/gpu/drm/nouveau/nouveau_drm.c

162

if (!dma_fence_is_signaled_locked(fence))

drivers/gpu/drm/nouveau/nouveau_drm.c

164

spin_unlock_irq(fence->lock);

drivers/gpu/drm/nouveau/nouveau_drm.c

167

dma_fence_put(fence);

drivers/gpu/drm/nouveau/nouveau_drm.c

178

if (!work->fence || nouveau_cli_work_ready(work->fence)) {

drivers/gpu/drm/nouveau/nouveau_drm.c

187

nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/nouveau/nouveau_drm.c

194

nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,

drivers/gpu/drm/nouveau/nouveau_drm.c

197

work->fence = dma_fence_get(fence);

drivers/gpu/drm/nouveau/nouveau_drm.c

201

if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))

drivers/gpu/drm/nouveau/nouveau_drm.c

202

nouveau_cli_work_fence(fence, &work->cb);

drivers/gpu/drm/nouveau/nouveau_drm.c

456

if (drm->fence)

drivers/gpu/drm/nouveau/nouveau_drm.c

978

if (drm->fence && nouveau_fence(drm)->suspend) {

drivers/gpu/drm/nouveau/nouveau_drm.c

993

if (drm->fence && nouveau_fence(drm)->resume)

drivers/gpu/drm/nouveau/nouveau_drv.h

124

struct dma_fence *fence;

drivers/gpu/drm/nouveau/nouveau_drv.h

258

void *fence;

drivers/gpu/drm/nouveau/nouveau_drv.h

75

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nouveau_exec.c

133

struct nouveau_fence *fence = exec_job->fence;

drivers/gpu/drm/nouveau/nouveau_exec.c

151

ret = nouveau_fence_emit(fence);

drivers/gpu/drm/nouveau/nouveau_exec.c

153

nouveau_fence_unref(&exec_job->fence);

drivers/gpu/drm/nouveau/nouveau_exec.c

162

exec_job->fence = NULL;

drivers/gpu/drm/nouveau/nouveau_exec.c

164

return &fence->base;

drivers/gpu/drm/nouveau/nouveau_exec.c

175

kfree(exec_job->fence);

drivers/gpu/drm/nouveau/nouveau_exec.c

98

ret = nouveau_fence_create(&exec_job->fence, exec_job->chan);

drivers/gpu/drm/nouveau/nouveau_exec.h

32

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

125

struct nouveau_fence *fence, *tmp;

drivers/gpu/drm/nouveau/nouveau_fence.c

129

list_for_each_entry_safe(fence, tmp, &fctx->pending, head) {

drivers/gpu/drm/nouveau/nouveau_fence.c

130

if ((int)(seq - fence->base.seqno) < 0)

drivers/gpu/drm/nouveau/nouveau_fence.c

133

if (nouveau_fence_signal(fence))

drivers/gpu/drm/nouveau/nouveau_fence.c

147

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

151

fence = list_first_entry_or_null(&fctx->pending, typeof(*fence), head);

drivers/gpu/drm/nouveau/nouveau_fence.c

152

if (fence) {

drivers/gpu/drm/nouveau/nouveau_fence.c

153

chan = rcu_dereference_protected(fence->channel, lockdep_is_held(&fctx->lock));

drivers/gpu/drm/nouveau/nouveau_fence.c

172

struct nouveau_fence_priv *priv = (void*)drm->fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

207

nouveau_fence_emit(struct nouveau_fence *fence)

drivers/gpu/drm/nouveau/nouveau_fence.c

209

struct nouveau_channel *chan = unrcu_pointer(fence->channel);

drivers/gpu/drm/nouveau/nouveau_fence.c

210

struct nouveau_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

211

struct nouveau_fence_priv *priv = (void*)chan->cli->drm->fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

214

fence->timeout = jiffies + (15 * HZ);

drivers/gpu/drm/nouveau/nouveau_fence.c

217

dma_fence_init(&fence->base, &nouveau_fence_ops_uevent,

drivers/gpu/drm/nouveau/nouveau_fence.c

220

dma_fence_init(&fence->base, &nouveau_fence_ops_legacy,

drivers/gpu/drm/nouveau/nouveau_fence.c

224

ret = fctx->emit(fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

226

dma_fence_get(&fence->base);

drivers/gpu/drm/nouveau/nouveau_fence.c

231

dma_fence_put(&fence->base);

drivers/gpu/drm/nouveau/nouveau_fence.c

236

list_add_tail(&fence->head, &fctx->pending);

drivers/gpu/drm/nouveau/nouveau_fence.c

244

nouveau_fence_done(struct nouveau_fence *fence)

drivers/gpu/drm/nouveau/nouveau_fence.c

246

struct nouveau_fence_chan *fctx = nouveau_fctx(fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

250

if (dma_fence_is_signaled(&fence->base))

drivers/gpu/drm/nouveau/nouveau_fence.c

254

chan = rcu_dereference_protected(fence->channel, lockdep_is_held(&fctx->lock));

drivers/gpu/drm/nouveau/nouveau_fence.c

259

return dma_fence_is_signaled(&fence->base);

drivers/gpu/drm/nouveau/nouveau_fence.c

265

struct nouveau_fence *fence = to_nouveau_fence(f);

drivers/gpu/drm/nouveau/nouveau_fence.c

269

while (!nouveau_fence_done(fence)) {

drivers/gpu/drm/nouveau/nouveau_fence.c

298

nouveau_fence_wait_busy(struct nouveau_fence *fence, bool intr)

drivers/gpu/drm/nouveau/nouveau_fence.c

302

while (!nouveau_fence_done(fence)) {

drivers/gpu/drm/nouveau/nouveau_fence.c

303

if (time_after_eq(jiffies, fence->timeout)) {

drivers/gpu/drm/nouveau/nouveau_fence.c

323

nouveau_fence_wait(struct nouveau_fence *fence, bool lazy, bool intr)

drivers/gpu/drm/nouveau/nouveau_fence.c

328

return nouveau_fence_wait_busy(fence, intr);

drivers/gpu/drm/nouveau/nouveau_fence.c

330

ret = dma_fence_wait_timeout(&fence->base, intr, 15 * HZ);

drivers/gpu/drm/nouveau/nouveau_fence.c

343

struct nouveau_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

356

struct dma_fence *fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

360

fence) {

drivers/gpu/drm/nouveau/nouveau_fence.c

368

f = nouveau_local_fence(fence, chan->cli->drm);

drivers/gpu/drm/nouveau/nouveau_fence.c

385

ret = dma_fence_wait(fence, intr);

drivers/gpu/drm/nouveau/nouveau_fence.c

406

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

408

if (unlikely(!chan->fence))

drivers/gpu/drm/nouveau/nouveau_fence.c

411

fence = kzalloc_obj(*fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

412

if (!fence)

drivers/gpu/drm/nouveau/nouveau_fence.c

415

fence->channel = chan;

drivers/gpu/drm/nouveau/nouveau_fence.c

417

*pfence = fence;

drivers/gpu/drm/nouveau/nouveau_fence.c

42

nouveau_fctx(struct nouveau_fence *fence)

drivers/gpu/drm/nouveau/nouveau_fence.c

438

static const char *nouveau_fence_get_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/nouveau/nouveau_fence.c

44

return container_of(fence->base.lock, struct nouveau_fence_chan, lock);

drivers/gpu/drm/nouveau/nouveau_fence.c

445

struct nouveau_fence *fence = to_nouveau_fence(f);

drivers/gpu/drm/nouveau/nouveau_fence.c

446

struct nouveau_fence_chan *fctx = nouveau_fctx(fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

459

struct nouveau_fence *fence = to_nouveau_fence(f);

drivers/gpu/drm/nouveau/nouveau_fence.c

460

struct nouveau_fence_chan *fctx = nouveau_fctx(fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

465

chan = rcu_dereference(fence->channel);

drivers/gpu/drm/nouveau/nouveau_fence.c

467

ret = (int)(fctx->read(chan) - fence->base.seqno) >= 0;

drivers/gpu/drm/nouveau/nouveau_fence.c

475

struct nouveau_fence *fence = to_nouveau_fence(f);

drivers/gpu/drm/nouveau/nouveau_fence.c

48

nouveau_fence_signal(struct nouveau_fence *fence)

drivers/gpu/drm/nouveau/nouveau_fence.c

481

WARN_ON(kref_read(&fence->base.refcount) <= 1);

drivers/gpu/drm/nouveau/nouveau_fence.c

489

list_del(&fence->head);

drivers/gpu/drm/nouveau/nouveau_fence.c

491

dma_fence_put(&fence->base);

drivers/gpu/drm/nouveau/nouveau_fence.c

500

struct nouveau_fence *fence = to_nouveau_fence(f);

drivers/gpu/drm/nouveau/nouveau_fence.c

501

struct nouveau_fence_chan *fctx = nouveau_fctx(fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

504

dma_fence_free(&fence->base);

drivers/gpu/drm/nouveau/nouveau_fence.c

518

struct nouveau_fence *fence = to_nouveau_fence(f);

drivers/gpu/drm/nouveau/nouveau_fence.c

519

struct nouveau_fence_chan *fctx = nouveau_fctx(fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

52

dma_fence_signal_locked(&fence->base);

drivers/gpu/drm/nouveau/nouveau_fence.c

527

set_bit(DMA_FENCE_FLAG_USER_BITS, &fence->base.flags);

drivers/gpu/drm/nouveau/nouveau_fence.c

53

list_del(&fence->head);

drivers/gpu/drm/nouveau/nouveau_fence.c

54

rcu_assign_pointer(fence->channel, NULL);

drivers/gpu/drm/nouveau/nouveau_fence.c

56

if (test_bit(DMA_FENCE_FLAG_USER_BITS, &fence->base.flags)) {

drivers/gpu/drm/nouveau/nouveau_fence.c

57

struct nouveau_fence_chan *fctx = nouveau_fctx(fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

63

dma_fence_put(&fence->base);

drivers/gpu/drm/nouveau/nouveau_fence.c

68

nouveau_local_fence(struct dma_fence *fence, struct nouveau_drm *drm)

drivers/gpu/drm/nouveau/nouveau_fence.c

70

if (fence->ops != &nouveau_fence_ops_legacy &&

drivers/gpu/drm/nouveau/nouveau_fence.c

71

fence->ops != &nouveau_fence_ops_uevent)

drivers/gpu/drm/nouveau/nouveau_fence.c

74

return to_nouveau_fence(fence);

drivers/gpu/drm/nouveau/nouveau_fence.c

80

struct nouveau_fence *fence, *tmp;

drivers/gpu/drm/nouveau/nouveau_fence.c

84

list_for_each_entry_safe(fence, tmp, &fctx->pending, head) {

drivers/gpu/drm/nouveau/nouveau_fence.c

85

if (error && !dma_fence_is_signaled_locked(&fence->base))

drivers/gpu/drm/nouveau/nouveau_fence.c

86

dma_fence_set_error(&fence->base, error);

drivers/gpu/drm/nouveau/nouveau_fence.c

88

if (nouveau_fence_signal(fence))

drivers/gpu/drm/nouveau/nouveau_fence.h

21

to_nouveau_fence(struct dma_fence *fence)

drivers/gpu/drm/nouveau/nouveau_fence.h

23

return container_of(fence, struct nouveau_fence, base);

drivers/gpu/drm/nouveau/nouveau_fence.h

68

#define nouveau_fence(drm) ((struct nouveau_fence_priv *)(drm)->fence)

drivers/gpu/drm/nouveau/nouveau_gem.c

145

nouveau_fence_unref(&vma->fence);

drivers/gpu/drm/nouveau/nouveau_gem.c

161

struct dma_fence *fence = vma->fence ? &vma->fence->base : NULL;

drivers/gpu/drm/nouveau/nouveau_gem.c

166

if (!fence) {

drivers/gpu/drm/nouveau/nouveau_gem.c

172

WARN_ON(dma_fence_wait_timeout(fence, false, 2 * HZ) <= 0);

drivers/gpu/drm/nouveau/nouveau_gem.c

179

nouveau_cli_work_queue(vma->vmm->cli, fence, &work->work);

drivers/gpu/drm/nouveau/nouveau_gem.c

412

struct nouveau_fence *fence,

drivers/gpu/drm/nouveau/nouveau_gem.c

422

if (likely(fence)) {

drivers/gpu/drm/nouveau/nouveau_gem.c

423

nouveau_bo_fence(nvbo, fence, !!b->write_domains);

drivers/gpu/drm/nouveau/nouveau_gem.c

428

nouveau_fence_unref(&vma->fence);

drivers/gpu/drm/nouveau/nouveau_gem.c

429

dma_fence_get(&fence->base);

drivers/gpu/drm/nouveau/nouveau_gem.c

430

vma->fence = fence;

drivers/gpu/drm/nouveau/nouveau_gem.c

448

struct nouveau_fence *fence,

drivers/gpu/drm/nouveau/nouveau_gem.c

451

validate_fini_no_ticket(op, chan, fence, pbbo);

drivers/gpu/drm/nouveau/nouveau_gem.c

757

struct nouveau_fence *fence = NULL;

drivers/gpu/drm/nouveau/nouveau_gem.c

923

ret = nouveau_fence_new(&fence, chan);

drivers/gpu/drm/nouveau/nouveau_gem.c

931

if (!(ret = nouveau_fence_wait(fence, false, false))) {

drivers/gpu/drm/nouveau/nouveau_gem.c

932

if ((ret = dma_fence_get_status(&fence->base)) == 1)

drivers/gpu/drm/nouveau/nouveau_gem.c

938

validate_fini(&op, chan, fence, bo);

drivers/gpu/drm/nouveau/nouveau_gem.c

939

nouveau_fence_unref(&fence);

drivers/gpu/drm/nouveau/nouveau_sched.c

141

struct dma_fence **fence)

drivers/gpu/drm/nouveau/nouveau_sched.c

156

0 /* flags */, fence);

drivers/gpu/drm/nouveau/nouveau_sched.c

250

struct dma_fence *fence = job->done_fence;

drivers/gpu/drm/nouveau/nouveau_sched.c

260

drm_syncobj_add_point(*pobj, *pchain, fence,

drivers/gpu/drm/nouveau/nouveau_sched.c

263

drm_syncobj_replace_fence(*pobj, fence);

drivers/gpu/drm/nouveau/nouveau_sched.c

348

struct dma_fence *fence;

drivers/gpu/drm/nouveau/nouveau_sched.c

350

fence = job->ops->run(job);

drivers/gpu/drm/nouveau/nouveau_sched.c

351

if (IS_ERR(fence))

drivers/gpu/drm/nouveau/nouveau_sched.c

356

return fence;

drivers/gpu/drm/nouveau/nouveau_vmm.c

96

vma->fence = NULL;

drivers/gpu/drm/nouveau/nouveau_vmm.h

15

struct nouveau_fence *fence;

drivers/gpu/drm/nouveau/nv04_fence.c

104

priv = drm->fence = kzalloc_obj(*priv);

drivers/gpu/drm/nouveau/nv04_fence.c

40

nv04_fence_emit(struct nouveau_fence *fence)

drivers/gpu/drm/nouveau/nv04_fence.c

42

struct nvif_push *push = &unrcu_pointer(fence->channel)->chan.push;

drivers/gpu/drm/nouveau/nv04_fence.c

45

PUSH_NVSQ(push, NV_SW, 0x0150, fence->base.seqno);

drivers/gpu/drm/nouveau/nv04_fence.c

52

nv04_fence_sync(struct nouveau_fence *fence,

drivers/gpu/drm/nouveau/nv04_fence.c

70

struct nv04_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nv04_fence.c

72

chan->fence = NULL;

drivers/gpu/drm/nouveau/nv04_fence.c

85

chan->fence = fctx;

drivers/gpu/drm/nouveau/nv04_fence.c

94

struct nv04_fence_priv *priv = drm->fence;

drivers/gpu/drm/nouveau/nv04_fence.c

95

drm->fence = NULL;

drivers/gpu/drm/nouveau/nv10_fence.c

33

nv10_fence_emit(struct nouveau_fence *fence)

drivers/gpu/drm/nouveau/nv10_fence.c

35

struct nvif_push *push = &fence->channel->chan.push;

drivers/gpu/drm/nouveau/nv10_fence.c

38

PUSH_MTHD(push, NV06E, SET_REFERENCE, fence->base.seqno);

drivers/gpu/drm/nouveau/nv10_fence.c

46

nv10_fence_sync(struct nouveau_fence *fence,

drivers/gpu/drm/nouveau/nv10_fence.c

61

struct nv10_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nv10_fence.c

64

chan->fence = NULL;

drivers/gpu/drm/nouveau/nv10_fence.c

73

fctx = chan->fence = kzalloc_obj(*fctx);

drivers/gpu/drm/nouveau/nv10_fence.c

87

struct nv10_fence_priv *priv = drm->fence;

drivers/gpu/drm/nouveau/nv10_fence.c

90

drm->fence = NULL;

drivers/gpu/drm/nouveau/nv10_fence.c

99

priv = drm->fence = kzalloc_obj(*priv);

drivers/gpu/drm/nouveau/nv17_fence.c

112

struct nv10_fence_priv *priv = drm->fence;

drivers/gpu/drm/nouveau/nv17_fence.c

123

priv = drm->fence = kzalloc_obj(*priv);

drivers/gpu/drm/nouveau/nv17_fence.c

36

nv17_fence_sync(struct nouveau_fence *fence,

drivers/gpu/drm/nouveau/nv17_fence.c

40

struct nv10_fence_priv *priv = cli->drm->fence;

drivers/gpu/drm/nouveau/nv17_fence.c

41

struct nv10_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nv17_fence.c

79

struct nv10_fence_priv *priv = chan->cli->drm->fence;

drivers/gpu/drm/nouveau/nv17_fence.c

86

fctx = chan->fence = kzalloc_obj(*fctx);

drivers/gpu/drm/nouveau/nv50_fence.c

38

struct nv10_fence_priv *priv = chan->cli->drm->fence;

drivers/gpu/drm/nouveau/nv50_fence.c

45

fctx = chan->fence = kzalloc_obj(*fctx);

drivers/gpu/drm/nouveau/nv50_fence.c

74

priv = drm->fence = kzalloc_obj(*priv);

drivers/gpu/drm/nouveau/nv84_fence.c

102

return fctx->base.sync32(chan, addr, fence->base.seqno);

drivers/gpu/drm/nouveau/nv84_fence.c

108

struct nv84_fence_priv *priv = chan->cli->drm->fence;

drivers/gpu/drm/nouveau/nv84_fence.c

115

struct nv84_fence_priv *priv = chan->cli->drm->fence;

drivers/gpu/drm/nouveau/nv84_fence.c

116

struct nv84_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nv84_fence.c

123

chan->fence = NULL;

drivers/gpu/drm/nouveau/nv84_fence.c

130

struct nv84_fence_priv *priv = chan->cli->drm->fence;

drivers/gpu/drm/nouveau/nv84_fence.c

134

fctx = chan->fence = kzalloc_obj(*fctx);

drivers/gpu/drm/nouveau/nv84_fence.c

158

struct nv84_fence_priv *priv = drm->fence;

drivers/gpu/drm/nouveau/nv84_fence.c

173

struct nv84_fence_priv *priv = drm->fence;

drivers/gpu/drm/nouveau/nv84_fence.c

187

struct nv84_fence_priv *priv = drm->fence;

drivers/gpu/drm/nouveau/nv84_fence.c

190

drm->fence = NULL;

drivers/gpu/drm/nouveau/nv84_fence.c

201

priv = drm->fence = kzalloc_obj(*priv);

drivers/gpu/drm/nouveau/nv84_fence.c

86

nv84_fence_emit(struct nouveau_fence *fence)

drivers/gpu/drm/nouveau/nv84_fence.c

88

struct nouveau_channel *chan = fence->channel;

drivers/gpu/drm/nouveau/nv84_fence.c

89

struct nv84_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nv84_fence.c

92

return fctx->base.emit32(chan, addr, fence->base.seqno);

drivers/gpu/drm/nouveau/nv84_fence.c

96

nv84_fence_sync(struct nouveau_fence *fence,

drivers/gpu/drm/nouveau/nv84_fence.c

99

struct nv84_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nvc0_fence.c

82

struct nv84_fence_chan *fctx = chan->fence;

drivers/gpu/drm/nouveau/nvc0_fence.c

94

struct nv84_fence_priv *priv = drm->fence;

drivers/gpu/drm/panfrost/panfrost_job.c

102

fence->dev = &pfdev->base;

drivers/gpu/drm/panfrost/panfrost_job.c

103

fence->queue = js_num;

drivers/gpu/drm/panfrost/panfrost_job.c

104

fence->seqno = ++js->queue[js_num].emit_seqno;

drivers/gpu/drm/panfrost/panfrost_job.c

105

dma_fence_init(&fence->base, &panfrost_fence_ops, &js->job_lock,

drivers/gpu/drm/panfrost/panfrost_job.c

106

js->queue[js_num].fence_context, fence->seqno);

drivers/gpu/drm/panfrost/panfrost_job.c

108

return &fence->base;

drivers/gpu/drm/panfrost/panfrost_job.c

305

struct dma_fence *fence)

drivers/gpu/drm/panfrost/panfrost_job.c

310

dma_resv_add_fence(bos[i]->resv, fence, DMA_RESV_USAGE_WRITE);

drivers/gpu/drm/panfrost/panfrost_job.c

401

struct dma_fence *fence = NULL;

drivers/gpu/drm/panfrost/panfrost_job.c

416

fence = panfrost_fence_create(pfdev, slot);

drivers/gpu/drm/panfrost/panfrost_job.c

417

if (IS_ERR(fence))

drivers/gpu/drm/panfrost/panfrost_job.c

418

return fence;

drivers/gpu/drm/panfrost/panfrost_job.c

422

job->done_fence = dma_fence_get(fence);

drivers/gpu/drm/panfrost/panfrost_job.c

426

dma_fence_put(fence);

drivers/gpu/drm/panfrost/panfrost_job.c

430

return fence;

drivers/gpu/drm/panfrost/panfrost_job.c

62

to_panfrost_fence(struct dma_fence *fence)

drivers/gpu/drm/panfrost/panfrost_job.c

64

return (struct panfrost_fence *)fence;

drivers/gpu/drm/panfrost/panfrost_job.c

67

static const char *panfrost_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/panfrost/panfrost_job.c

72

static const char *panfrost_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/panfrost/panfrost_job.c

74

struct panfrost_fence *f = to_panfrost_fence(fence);

drivers/gpu/drm/panfrost/panfrost_job.c

95

struct panfrost_fence *fence;

drivers/gpu/drm/panfrost/panfrost_job.c

98

fence = kzalloc_obj(*fence);

drivers/gpu/drm/panfrost/panfrost_job.c

99

if (!fence)

drivers/gpu/drm/panthor/panthor_drv.c

265

struct dma_fence *fence;

drivers/gpu/drm/panthor/panthor_drv.c

366

dma_fence_put(sig_sync->fence);

drivers/gpu/drm/panthor/panthor_drv.c

411

sig_sync->fence = cur_fence;

drivers/gpu/drm/panthor/panthor_drv.c

521

old_fence = sig_sync->fence;

drivers/gpu/drm/panthor/panthor_drv.c

522

sig_sync->fence = dma_fence_get(done_fence);

drivers/gpu/drm/panthor/panthor_drv.c

525

if (drm_WARN_ON(&ptdev->base, !sig_sync->fence))

drivers/gpu/drm/panthor/panthor_drv.c

583

sig_sync->fence, sig_sync->point);

drivers/gpu/drm/panthor/panthor_drv.c

586

drm_syncobj_replace_fence(sig_sync->syncobj, sig_sync->fence);

drivers/gpu/drm/panthor/panthor_drv.c

613

struct dma_fence *fence;

drivers/gpu/drm/panthor/panthor_drv.c

625

if (drm_WARN_ON(&ptdev->base, !sig_sync->fence))

drivers/gpu/drm/panthor/panthor_drv.c

628

fence = dma_fence_get(sig_sync->fence);

drivers/gpu/drm/panthor/panthor_drv.c

632

0, &fence);

drivers/gpu/drm/panthor/panthor_drv.c

637

ret = drm_sched_job_add_dependency(job, fence);

drivers/gpu/drm/panthor/panthor_mmu.c

2685

struct dma_fence *fence,

drivers/gpu/drm/panthor/panthor_mmu.c

2689

drm_gpuvm_resv_add_fence(&vm->base, exec, fence, private_usage, extobj_usage);

drivers/gpu/drm/panthor/panthor_mmu.h

95

struct dma_fence *fence,

drivers/gpu/drm/panthor/panthor_sched.c

1907

static const char *fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/panthor/panthor_sched.c

1912

static const char *queue_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/qxl/qxl_debugfs.c

62

struct dma_fence *fence;

drivers/gpu/drm/qxl/qxl_debugfs.c

67

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/gpu/drm/qxl/qxl_release.c

49

static const char *qxl_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/qxl/qxl_release.c

54

static const char *qxl_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/qxl/qxl_release.c

59

static long qxl_fence_wait(struct dma_fence *fence, bool intr,

drivers/gpu/drm/qxl/qxl_release.c

65

qdev = container_of(fence->lock, struct qxl_device, release_lock);

drivers/gpu/drm/qxl/qxl_release.c

68

(dma_fence_is_signaled(fence) ||

drivers/gpu/drm/radeon/cik.c

3541

struct radeon_fence *fence)

drivers/gpu/drm/radeon/cik.c

3543

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/cik.c

3544

u64 addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/cik.c

3557

radeon_ring_write(ring, fence->seq - 1);

drivers/gpu/drm/radeon/cik.c

3568

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/cik.c

3582

struct radeon_fence *fence)

drivers/gpu/drm/radeon/cik.c

3584

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/cik.c

3585

u64 addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/cik.c

3596

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/cik.c

3650

struct radeon_fence *fence;

drivers/gpu/drm/radeon/cik.c

3691

r = radeon_fence_emit(rdev, &fence, ring->idx);

drivers/gpu/drm/radeon/cik.c

3699

radeon_sync_free(rdev, &sync, fence);

drivers/gpu/drm/radeon/cik.c

3701

return fence;

drivers/gpu/drm/radeon/cik.c

3800

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

drivers/gpu/drm/radeon/cik.c

3821

DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i);

drivers/gpu/drm/radeon/cik_sdma.c

200

struct radeon_fence *fence)

drivers/gpu/drm/radeon/cik_sdma.c

202

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/cik_sdma.c

203

u64 addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/cik_sdma.c

209

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/cik_sdma.c

213

cik_sdma_hdp_flush_ring_emit(rdev, fence->ring);

drivers/gpu/drm/radeon/cik_sdma.c

583

struct radeon_fence *fence;

drivers/gpu/drm/radeon/cik_sdma.c

621

r = radeon_fence_emit(rdev, &fence, ring->idx);

drivers/gpu/drm/radeon/cik_sdma.c

629

radeon_sync_free(rdev, &sync, fence);

drivers/gpu/drm/radeon/cik_sdma.c

631

return fence;

drivers/gpu/drm/radeon/cik_sdma.c

739

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

drivers/gpu/drm/radeon/cik_sdma.c

756

DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i);

drivers/gpu/drm/radeon/evergreen_dma.c

112

struct radeon_fence *fence;

drivers/gpu/drm/radeon/evergreen_dma.c

148

r = radeon_fence_emit(rdev, &fence, ring->idx);

drivers/gpu/drm/radeon/evergreen_dma.c

156

radeon_sync_free(rdev, &sync, fence);

drivers/gpu/drm/radeon/evergreen_dma.c

158

return fence;

drivers/gpu/drm/radeon/evergreen_dma.c

41

struct radeon_fence *fence)

drivers/gpu/drm/radeon/evergreen_dma.c

43

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/evergreen_dma.c

44

u64 addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/evergreen_dma.c

49

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/ni.c

1377

struct radeon_fence *fence)

drivers/gpu/drm/radeon/ni.c

1379

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/ni.c

1380

u64 addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/ni.c

1395

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/r100.c

3758

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

drivers/gpu/drm/radeon/r100.c

870

struct radeon_fence *fence)

drivers/gpu/drm/radeon/r100.c

872

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/r100.c

885

radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0));

drivers/gpu/drm/radeon/r100.c

886

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/r100.c

908

struct radeon_fence *fence;

drivers/gpu/drm/radeon/r100.c

969

r = radeon_fence_emit(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);

drivers/gpu/drm/radeon/r100.c

975

return fence;

drivers/gpu/drm/radeon/r200.c

122

r = radeon_fence_emit(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);

drivers/gpu/drm/radeon/r200.c

128

return fence;

drivers/gpu/drm/radeon/r200.c

90

struct radeon_fence *fence;

drivers/gpu/drm/radeon/r300.c

213

struct radeon_fence *fence)

drivers/gpu/drm/radeon/r300.c

215

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/r300.c

240

radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0));

drivers/gpu/drm/radeon/r300.c

241

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/r600.c

2868

struct radeon_fence *fence)

drivers/gpu/drm/radeon/r600.c

2870

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/r600.c

2878

u64 addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/r600.c

2890

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/r600.c

2907

radeon_ring_write(ring, ((rdev->fence_drv[fence->ring].scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));

drivers/gpu/drm/radeon/r600.c

2908

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/r600.c

2969

struct radeon_fence *fence;

drivers/gpu/drm/radeon/r600.c

3015

r = radeon_fence_emit(rdev, &fence, ring->idx);

drivers/gpu/drm/radeon/r600.c

3023

radeon_sync_free(rdev, &sync, fence);

drivers/gpu/drm/radeon/r600.c

3025

return fence;

drivers/gpu/drm/radeon/r600.c

3424

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

drivers/gpu/drm/radeon/r600.c

3442

DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i);

drivers/gpu/drm/radeon/r600_dma.c

287

struct radeon_fence *fence)

drivers/gpu/drm/radeon/r600_dma.c

289

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/r600_dma.c

290

u64 addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/r600_dma.c

296

radeon_ring_write(ring, lower_32_bits(fence->seq));

drivers/gpu/drm/radeon/r600_dma.c

370

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

drivers/gpu/drm/radeon/r600_dma.c

387

DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i);

drivers/gpu/drm/radeon/r600_dma.c

448

struct radeon_fence *fence;

drivers/gpu/drm/radeon/r600_dma.c

484

r = radeon_fence_emit(rdev, &fence, ring->idx);

drivers/gpu/drm/radeon/r600_dma.c

492

radeon_sync_free(rdev, &sync, fence);

drivers/gpu/drm/radeon/r600_dma.c

494

return fence;

drivers/gpu/drm/radeon/radeon.h

1680

uint32_t handle, struct radeon_fence **fence);

drivers/gpu/drm/radeon/radeon.h

1682

uint32_t handle, struct radeon_fence **fence);

drivers/gpu/drm/radeon/radeon.h

1723

uint32_t handle, struct radeon_fence **fence);

drivers/gpu/drm/radeon/radeon.h

1725

uint32_t handle, struct radeon_fence **fence);

drivers/gpu/drm/radeon/radeon.h

1736

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

1813

void (*emit_fence)(struct radeon_device *rdev, struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

2725

#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)]->emit_fence((rdev), (fence))

drivers/gpu/drm/radeon/radeon.h

2843

int ring, struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

2846

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

391

int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence **fence, int ring);

drivers/gpu/drm/radeon/radeon.h

393

bool radeon_fence_signaled(struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

394

long radeon_fence_wait_timeout(struct radeon_fence *fence, bool interruptible, long timeout);

drivers/gpu/drm/radeon/radeon.h

395

int radeon_fence_wait(struct radeon_fence *fence, bool interruptible);

drivers/gpu/drm/radeon/radeon.h

398

struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

399

void radeon_fence_unref(struct radeon_fence **fence);

drivers/gpu/drm/radeon/radeon.h

401

bool radeon_fence_need_sync(struct radeon_fence *fence, int ring);

drivers/gpu/drm/radeon/radeon.h

402

void radeon_fence_note_sync(struct radeon_fence *fence, int ring);

drivers/gpu/drm/radeon/radeon.h

564

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

577

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

586

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon.h

702

struct dma_fence *fence;

drivers/gpu/drm/radeon/radeon.h

785

struct radeon_fence *fence;

drivers/gpu/drm/radeon/radeon_asic.h

174

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

323

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

329

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

542

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

603

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

707

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

77

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

789

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

807

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

809

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

942

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_asic.h

953

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_benchmark.c

42

struct radeon_fence *fence = NULL;

drivers/gpu/drm/radeon/radeon_benchmark.c

49

fence = radeon_copy_dma(rdev, saddr, daddr,

drivers/gpu/drm/radeon/radeon_benchmark.c

54

fence = radeon_copy_blit(rdev, saddr, daddr,

drivers/gpu/drm/radeon/radeon_benchmark.c

62

if (IS_ERR(fence))

drivers/gpu/drm/radeon/radeon_benchmark.c

63

return PTR_ERR(fence);

drivers/gpu/drm/radeon/radeon_benchmark.c

65

r = radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_benchmark.c

66

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/radeon_cs.c

435

&parser->ib.fence->base,

drivers/gpu/drm/radeon/radeon_display.c

421

if (work->fence) {

drivers/gpu/drm/radeon/radeon_display.c

422

struct radeon_fence *fence;

drivers/gpu/drm/radeon/radeon_display.c

424

fence = to_radeon_fence(work->fence);

drivers/gpu/drm/radeon/radeon_display.c

425

if (fence && fence->rdev == rdev) {

drivers/gpu/drm/radeon/radeon_display.c

426

r = radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_display.c

435

r = dma_fence_wait(work->fence, false);

drivers/gpu/drm/radeon/radeon_display.c

445

dma_fence_put(work->fence);

drivers/gpu/drm/radeon/radeon_display.c

446

work->fence = NULL;

drivers/gpu/drm/radeon/radeon_display.c

538

&work->fence);

drivers/gpu/drm/radeon/radeon_display.c

616

dma_fence_put(work->fence);

drivers/gpu/drm/radeon/radeon_fence.c

1006

struct radeon_fence *fence = to_radeon_fence(f);

drivers/gpu/drm/radeon/radeon_fence.c

1007

struct radeon_device *rdev = fence->rdev;

drivers/gpu/drm/radeon/radeon_fence.c

1025

if (radeon_test_signaled(fence))

drivers/gpu/drm/radeon/radeon_fence.c

134

struct radeon_fence **fence,

drivers/gpu/drm/radeon/radeon_fence.c

140

*fence = kmalloc_obj(struct radeon_fence);

drivers/gpu/drm/radeon/radeon_fence.c

141

if ((*fence) == NULL)

drivers/gpu/drm/radeon/radeon_fence.c

144

(*fence)->rdev = rdev;

drivers/gpu/drm/radeon/radeon_fence.c

145

(*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring];

drivers/gpu/drm/radeon/radeon_fence.c

146

(*fence)->ring = ring;

drivers/gpu/drm/radeon/radeon_fence.c

147

(*fence)->is_vm_update = false;

drivers/gpu/drm/radeon/radeon_fence.c

148

dma_fence_init(&(*fence)->base, &radeon_fence_ops,

drivers/gpu/drm/radeon/radeon_fence.c

152

radeon_fence_ring_emit(rdev, ring, *fence);

drivers/gpu/drm/radeon/radeon_fence.c

153

trace_radeon_fence_emit(rdev_to_drm(rdev), ring, (*fence)->seq);

drivers/gpu/drm/radeon/radeon_fence.c

168

struct radeon_fence *fence;

drivers/gpu/drm/radeon/radeon_fence.c

171

fence = container_of(wait, struct radeon_fence, fence_wake);

drivers/gpu/drm/radeon/radeon_fence.c

177

seq = atomic64_read(&fence->rdev->fence_drv[fence->ring].last_seq);

drivers/gpu/drm/radeon/radeon_fence.c

178

if (seq >= fence->seq) {

drivers/gpu/drm/radeon/radeon_fence.c

179

dma_fence_signal_locked(&fence->base);

drivers/gpu/drm/radeon/radeon_fence.c

180

radeon_irq_kms_sw_irq_put(fence->rdev, fence->ring);

drivers/gpu/drm/radeon/radeon_fence.c

181

__remove_wait_queue(&fence->rdev->fence_queue, &fence->fence_wake);

drivers/gpu/drm/radeon/radeon_fence.c

182

dma_fence_put(&fence->base);

drivers/gpu/drm/radeon/radeon_fence.c

355

struct radeon_fence *fence = to_radeon_fence(f);

drivers/gpu/drm/radeon/radeon_fence.c

356

struct radeon_device *rdev = fence->rdev;

drivers/gpu/drm/radeon/radeon_fence.c

357

unsigned int ring = fence->ring;

drivers/gpu/drm/radeon/radeon_fence.c

358

u64 seq = fence->seq;

drivers/gpu/drm/radeon/radeon_fence.c

376

struct radeon_fence *fence = to_radeon_fence(f);

drivers/gpu/drm/radeon/radeon_fence.c

377

struct radeon_device *rdev = fence->rdev;

drivers/gpu/drm/radeon/radeon_fence.c

379

if (atomic64_read(&rdev->fence_drv[fence->ring].last_seq) >= fence->seq)

drivers/gpu/drm/radeon/radeon_fence.c

383

radeon_irq_kms_sw_irq_get(rdev, fence->ring);

drivers/gpu/drm/radeon/radeon_fence.c

385

if (radeon_fence_activity(rdev, fence->ring))

drivers/gpu/drm/radeon/radeon_fence.c

389

if (atomic64_read(&rdev->fence_drv[fence->ring].last_seq) >= fence->seq) {

drivers/gpu/drm/radeon/radeon_fence.c

390

radeon_irq_kms_sw_irq_put(rdev, fence->ring);

drivers/gpu/drm/radeon/radeon_fence.c

398

if (radeon_irq_kms_sw_irq_get_delayed(rdev, fence->ring))

drivers/gpu/drm/radeon/radeon_fence.c

399

rdev->fence_drv[fence->ring].delayed_irq = true;

drivers/gpu/drm/radeon/radeon_fence.c

400

radeon_fence_schedule_check(rdev, fence->ring);

drivers/gpu/drm/radeon/radeon_fence.c

403

fence->fence_wake.flags = 0;

drivers/gpu/drm/radeon/radeon_fence.c

404

fence->fence_wake.private = NULL;

drivers/gpu/drm/radeon/radeon_fence.c

405

fence->fence_wake.func = radeon_fence_check_signaled;

drivers/gpu/drm/radeon/radeon_fence.c

406

__add_wait_queue(&rdev->fence_queue, &fence->fence_wake);

drivers/gpu/drm/radeon/radeon_fence.c

419

bool radeon_fence_signaled(struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_fence.c

421

if (!fence)

drivers/gpu/drm/radeon/radeon_fence.c

424

if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {

drivers/gpu/drm/radeon/radeon_fence.c

425

dma_fence_signal(&fence->base);

drivers/gpu/drm/radeon/radeon_fence.c

526

long radeon_fence_wait_timeout(struct radeon_fence *fence, bool intr, long timeout)

drivers/gpu/drm/radeon/radeon_fence.c

537

if (WARN_ON_ONCE(!to_radeon_fence(&fence->base)))

drivers/gpu/drm/radeon/radeon_fence.c

538

return dma_fence_wait(&fence->base, intr);

drivers/gpu/drm/radeon/radeon_fence.c

540

seq[fence->ring] = fence->seq;

drivers/gpu/drm/radeon/radeon_fence.c

541

r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr, timeout);

drivers/gpu/drm/radeon/radeon_fence.c

545

dma_fence_signal(&fence->base);

drivers/gpu/drm/radeon/radeon_fence.c

560

int radeon_fence_wait(struct radeon_fence *fence, bool intr)

drivers/gpu/drm/radeon/radeon_fence.c

562

long r = radeon_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);

drivers/gpu/drm/radeon/radeon_fence.c

638

struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_fence.c

640

dma_fence_get(&fence->base);

drivers/gpu/drm/radeon/radeon_fence.c

641

return fence;

drivers/gpu/drm/radeon/radeon_fence.c

651

void radeon_fence_unref(struct radeon_fence **fence)

drivers/gpu/drm/radeon/radeon_fence.c

653

struct radeon_fence *tmp = *fence;

drivers/gpu/drm/radeon/radeon_fence.c

655

*fence = NULL;

drivers/gpu/drm/radeon/radeon_fence.c

698

bool radeon_fence_need_sync(struct radeon_fence *fence, int dst_ring)

drivers/gpu/drm/radeon/radeon_fence.c

702

if (!fence)

drivers/gpu/drm/radeon/radeon_fence.c

705

if (fence->ring == dst_ring)

drivers/gpu/drm/radeon/radeon_fence.c

709

fdrv = &fence->rdev->fence_drv[dst_ring];

drivers/gpu/drm/radeon/radeon_fence.c

710

if (fence->seq <= fdrv->sync_seq[fence->ring])

drivers/gpu/drm/radeon/radeon_fence.c

725

void radeon_fence_note_sync(struct radeon_fence *fence, int dst_ring)

drivers/gpu/drm/radeon/radeon_fence.c

730

if (!fence)

drivers/gpu/drm/radeon/radeon_fence.c

733

if (fence->ring == dst_ring)

drivers/gpu/drm/radeon/radeon_fence.c

737

src = &fence->rdev->fence_drv[fence->ring];

drivers/gpu/drm/radeon/radeon_fence.c

738

dst = &fence->rdev->fence_drv[dst_ring];

drivers/gpu/drm/radeon/radeon_fence.c

960

static const char *radeon_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/radeon/radeon_fence.c

967

struct radeon_fence *fence = to_radeon_fence(f);

drivers/gpu/drm/radeon/radeon_fence.c

969

switch (fence->ring) {

drivers/gpu/drm/radeon/radeon_fence.c

984

static inline bool radeon_test_signaled(struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_fence.c

986

return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->base.flags);

drivers/gpu/drm/radeon/radeon_fence.c

995

radeon_fence_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/radeon/radeon_ib.c

101

radeon_sync_free(rdev, &ib->sync, ib->fence);

drivers/gpu/drm/radeon/radeon_ib.c

102

radeon_sa_bo_free(&ib->sa_bo, ib->fence);

drivers/gpu/drm/radeon/radeon_ib.c

103

radeon_fence_unref(&ib->fence);

drivers/gpu/drm/radeon/radeon_ib.c

170

r = radeon_fence_emit(rdev, &ib->fence, ib->ring);

drivers/gpu/drm/radeon/radeon_ib.c

177

const_ib->fence = radeon_fence_ref(ib->fence);

drivers/gpu/drm/radeon/radeon_ib.c

181

radeon_vm_fence(rdev, ib->vm, ib->fence);

drivers/gpu/drm/radeon/radeon_ib.c

75

ib->fence = NULL;

drivers/gpu/drm/radeon/radeon_object.c

779

void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,

drivers/gpu/drm/radeon/radeon_object.c

788

dma_fence_wait(&fence->base, false);

drivers/gpu/drm/radeon/radeon_object.c

792

dma_resv_add_fence(resv, &fence->base, shared ?

drivers/gpu/drm/radeon/radeon_object.h

166

extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,

drivers/gpu/drm/radeon/radeon_object.h

204

struct radeon_fence *fence);

drivers/gpu/drm/radeon/radeon_sa.c

138

struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_sa.c

144

if (fence)

drivers/gpu/drm/radeon/radeon_sa.c

145

drm_suballoc_free(*sa_bo, &fence->base);

drivers/gpu/drm/radeon/radeon_semaphore.c

103

radeon_sa_bo_free(&(*semaphore)->sa_bo, fence);

drivers/gpu/drm/radeon/radeon_semaphore.c

94

struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_sync.c

100

fence = to_radeon_fence(f);

drivers/gpu/drm/radeon/radeon_sync.c

101

if (fence && fence->rdev == rdev)

drivers/gpu/drm/radeon/radeon_sync.c

102

radeon_sync_fence(sync, fence);

drivers/gpu/drm/radeon/radeon_sync.c

129

struct radeon_fence *fence = sync->sync_to[i];

drivers/gpu/drm/radeon/radeon_sync.c

133

if (!radeon_fence_need_sync(fence, ring))

drivers/gpu/drm/radeon/radeon_sync.c

144

r = radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_sync.c

164

r = radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_sync.c

174

r = radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_sync.c

181

radeon_fence_note_sync(fence, ring);

drivers/gpu/drm/radeon/radeon_sync.c

198

struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_sync.c

203

radeon_semaphore_free(rdev, &sync->semaphores[i], fence);

drivers/gpu/drm/radeon/radeon_sync.c

63

struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_sync.c

67

if (!fence)

drivers/gpu/drm/radeon/radeon_sync.c

70

other = sync->sync_to[fence->ring];

drivers/gpu/drm/radeon/radeon_sync.c

71

sync->sync_to[fence->ring] = radeon_fence_later(fence, other);

drivers/gpu/drm/radeon/radeon_sync.c

73

if (fence->is_vm_update) {

drivers/gpu/drm/radeon/radeon_sync.c

75

sync->last_vm_update = radeon_fence_later(fence, other);

drivers/gpu/drm/radeon/radeon_sync.c

95

struct radeon_fence *fence;

drivers/gpu/drm/radeon/radeon_test.c

121

fence = radeon_copy_dma(rdev, gtt_addr, vram_addr,

drivers/gpu/drm/radeon/radeon_test.c

125

fence = radeon_copy_blit(rdev, gtt_addr, vram_addr,

drivers/gpu/drm/radeon/radeon_test.c

128

if (IS_ERR(fence)) {

drivers/gpu/drm/radeon/radeon_test.c

130

r = PTR_ERR(fence);

drivers/gpu/drm/radeon/radeon_test.c

134

r = radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_test.c

140

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/radeon_test.c

172

fence = radeon_copy_dma(rdev, vram_addr, gtt_addr,

drivers/gpu/drm/radeon/radeon_test.c

176

fence = radeon_copy_blit(rdev, vram_addr, gtt_addr,

drivers/gpu/drm/radeon/radeon_test.c

179

if (IS_ERR(fence)) {

drivers/gpu/drm/radeon/radeon_test.c

181

r = PTR_ERR(fence);

drivers/gpu/drm/radeon/radeon_test.c

185

r = radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_test.c

191

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/radeon_test.c

237

if (fence && !IS_ERR(fence))

drivers/gpu/drm/radeon/radeon_test.c

238

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/radeon_test.c

264

struct radeon_fence **fence)

drivers/gpu/drm/radeon/radeon_test.c

276

r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence);

drivers/gpu/drm/radeon/radeon_test.c

290

r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence);

drivers/gpu/drm/radeon/radeon_test.c

302

r = radeon_fence_emit(rdev, fence, ring->idx);

drivers/gpu/drm/radeon/radeon_test.c

88

struct radeon_fence *fence = NULL;

drivers/gpu/drm/radeon/radeon_ttm.c

140

struct radeon_fence *fence;

drivers/gpu/drm/radeon/radeon_ttm.c

179

fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);

drivers/gpu/drm/radeon/radeon_ttm.c

180

if (IS_ERR(fence))

drivers/gpu/drm/radeon/radeon_ttm.c

181

return PTR_ERR(fence);

drivers/gpu/drm/radeon/radeon_ttm.c

183

r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);

drivers/gpu/drm/radeon/radeon_ttm.c

184

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/radeon_uvd.c

261

struct radeon_fence *fence;

drivers/gpu/drm/radeon/radeon_uvd.c

266

R600_RING_TYPE_UVD_INDEX, handle, &fence);

drivers/gpu/drm/radeon/radeon_uvd.c

272

radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_uvd.c

273

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/radeon_uvd.c

335

struct radeon_fence *fence;

drivers/gpu/drm/radeon/radeon_uvd.c

340

R600_RING_TYPE_UVD_INDEX, handle, &fence);

drivers/gpu/drm/radeon/radeon_uvd.c

346

radeon_fence_wait(fence, false);

drivers/gpu/drm/radeon/radeon_uvd.c

347

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/radeon_uvd.c

731

struct radeon_fence **fence)

drivers/gpu/drm/radeon/radeon_uvd.c

754

if (fence)

drivers/gpu/drm/radeon/radeon_uvd.c

755

*fence = radeon_fence_ref(ib.fence);

drivers/gpu/drm/radeon/radeon_uvd.c

767

uint32_t handle, struct radeon_fence **fence)

drivers/gpu/drm/radeon/radeon_uvd.c

797

r = radeon_uvd_send_msg(rdev, ring, addr, fence);

drivers/gpu/drm/radeon/radeon_uvd.c

803

uint32_t handle, struct radeon_fence **fence)

drivers/gpu/drm/radeon/radeon_uvd.c

826

r = radeon_uvd_send_msg(rdev, ring, addr, fence);

drivers/gpu/drm/radeon/radeon_vce.c

347

uint32_t handle, struct radeon_fence **fence)

drivers/gpu/drm/radeon/radeon_vce.c

395

if (fence)

drivers/gpu/drm/radeon/radeon_vce.c

396

*fence = radeon_fence_ref(ib.fence);

drivers/gpu/drm/radeon/radeon_vce.c

414

uint32_t handle, struct radeon_fence **fence)

drivers/gpu/drm/radeon/radeon_vce.c

452

if (fence)

drivers/gpu/drm/radeon/radeon_vce.c

453

*fence = radeon_fence_ref(ib.fence);

drivers/gpu/drm/radeon/radeon_vce.c

736

struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_vce.c

738

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/radeon_vce.c

739

uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/radeon_vce.c

744

radeon_ring_write(ring, cpu_to_le32(fence->seq));

drivers/gpu/drm/radeon/radeon_vce.c

798

struct radeon_fence *fence = NULL;

drivers/gpu/drm/radeon/radeon_vce.c

807

r = radeon_vce_get_destroy_msg(rdev, ring->idx, 1, &fence);

drivers/gpu/drm/radeon/radeon_vce.c

813

r = radeon_fence_wait_timeout(fence, false, usecs_to_jiffies(

drivers/gpu/drm/radeon/radeon_vce.c

825

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/radeon_vm.c

1024

ib.fence->is_vm_update = true;

drivers/gpu/drm/radeon/radeon_vm.c

1025

radeon_vm_fence_pts(vm, bo_va->it.start, bo_va->it.last + 1, ib.fence);

drivers/gpu/drm/radeon/radeon_vm.c

1027

bo_va->last_pt_update = radeon_fence_ref(ib.fence);

drivers/gpu/drm/radeon/radeon_vm.c

194

struct radeon_fence *fence = rdev->vm_manager.active[i];

drivers/gpu/drm/radeon/radeon_vm.c

196

if (fence == NULL) {

drivers/gpu/drm/radeon/radeon_vm.c

203

if (radeon_fence_is_earlier(fence, best[fence->ring])) {

drivers/gpu/drm/radeon/radeon_vm.c

204

best[fence->ring] = fence;

drivers/gpu/drm/radeon/radeon_vm.c

205

choices[fence->ring == ring ? 0 : 1] = i;

drivers/gpu/drm/radeon/radeon_vm.c

268

struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_vm.c

270

unsigned vm_id = vm->ids[fence->ring].id;

drivers/gpu/drm/radeon/radeon_vm.c

273

rdev->vm_manager.active[vm_id] = radeon_fence_ref(fence);

drivers/gpu/drm/radeon/radeon_vm.c

275

radeon_fence_unref(&vm->ids[fence->ring].last_id_use);

drivers/gpu/drm/radeon/radeon_vm.c

276

vm->ids[fence->ring].last_id_use = radeon_fence_ref(fence);

drivers/gpu/drm/radeon/radeon_vm.c

419

ib.fence->is_vm_update = true;

drivers/gpu/drm/radeon/radeon_vm.c

420

radeon_bo_fence(bo, ib.fence, false);

drivers/gpu/drm/radeon/radeon_vm.c

708

ib.fence->is_vm_update = true;

drivers/gpu/drm/radeon/radeon_vm.c

709

radeon_bo_fence(pd, ib.fence, false);

drivers/gpu/drm/radeon/radeon_vm.c

885

struct radeon_fence *fence)

drivers/gpu/drm/radeon/radeon_vm.c

893

radeon_bo_fence(vm->page_tables[i].bo, fence, true);

drivers/gpu/drm/radeon/rv770_dma.c

47

struct radeon_fence *fence;

drivers/gpu/drm/radeon/rv770_dma.c

83

r = radeon_fence_emit(rdev, &fence, ring->idx);

drivers/gpu/drm/radeon/rv770_dma.c

91

radeon_sync_free(rdev, &sync, fence);

drivers/gpu/drm/radeon/rv770_dma.c

93

return fence;

drivers/gpu/drm/radeon/si.c

3351

struct radeon_fence *fence)

drivers/gpu/drm/radeon/si.c

3353

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/si.c

3354

u64 addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/si.c

3373

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/si_dma.c

235

struct radeon_fence *fence;

drivers/gpu/drm/radeon/si_dma.c

271

r = radeon_fence_emit(rdev, &fence, ring->idx);

drivers/gpu/drm/radeon/si_dma.c

279

radeon_sync_free(rdev, &sync, fence);

drivers/gpu/drm/radeon/si_dma.c

281

return fence;

drivers/gpu/drm/radeon/uvd_v1_0.c

502

struct radeon_fence *fence = NULL;

drivers/gpu/drm/radeon/uvd_v1_0.c

520

r = radeon_uvd_get_destroy_msg(rdev, ring->idx, 1, &fence);

drivers/gpu/drm/radeon/uvd_v1_0.c

526

r = radeon_fence_wait_timeout(fence, false, usecs_to_jiffies(

drivers/gpu/drm/radeon/uvd_v1_0.c

539

radeon_fence_unref(&fence);

drivers/gpu/drm/radeon/uvd_v1_0.c

82

struct radeon_fence *fence)

drivers/gpu/drm/radeon/uvd_v1_0.c

84

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/uvd_v1_0.c

85

uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/uvd_v1_0.c

90

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/radeon/uvd_v2_2.c

40

struct radeon_fence *fence)

drivers/gpu/drm/radeon/uvd_v2_2.c

42

struct radeon_ring *ring = &rdev->ring[fence->ring];

drivers/gpu/drm/radeon/uvd_v2_2.c

43

uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;

drivers/gpu/drm/radeon/uvd_v2_2.c

46

radeon_ring_write(ring, fence->seq);

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

105

__entry->fence_context = fence->finished.context;

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

106

__entry->fence_seqno = fence->finished.seqno;

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

113

TP_PROTO(struct drm_sched_job *sched_job, struct dma_fence *fence),

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

114

TP_ARGS(sched_job, fence),

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

125

__entry->ctx = fence->context;

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

126

__entry->seqno = fence->seqno;

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

134

TP_PROTO(struct drm_sched_job *sched_job, struct dma_fence *fence),

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

135

TP_ARGS(sched_job, fence),

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

146

__entry->ctx = fence->context;

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

147

__entry->seqno = fence->seqno;

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

97

TP_PROTO(struct drm_sched_fence *fence),

drivers/gpu/drm/scheduler/gpu_scheduler_trace.h

98

TP_ARGS(fence),

drivers/gpu/drm/scheduler/sched_entity.c

164

struct dma_fence *fence;

drivers/gpu/drm/scheduler/sched_entity.c

168

fence = rcu_dereference(entity->last_scheduled);

drivers/gpu/drm/scheduler/sched_entity.c

169

r = fence ? fence->error : 0;

drivers/gpu/drm/scheduler/sched_entity.c

403

struct dma_fence *fence = entity->dependency;

drivers/gpu/drm/scheduler/sched_entity.c

406

if (fence->context == entity->fence_context ||

drivers/gpu/drm/scheduler/sched_entity.c

407

fence->context == entity->fence_context + 1) {

drivers/gpu/drm/scheduler/sched_entity.c

417

s_fence = to_drm_sched_fence(fence);

drivers/gpu/drm/scheduler/sched_entity.c

418

if (!fence->error && s_fence && s_fence->sched == sched &&

drivers/gpu/drm/scheduler/sched_entity.c

419

!test_bit(DRM_SCHED_FENCE_DONT_PIPELINE, &fence->flags)) {

drivers/gpu/drm/scheduler/sched_entity.c

425

fence = dma_fence_get(&s_fence->scheduled);

drivers/gpu/drm/scheduler/sched_entity.c

427

entity->dependency = fence;

drivers/gpu/drm/scheduler/sched_entity.c

527

struct dma_fence *fence;

drivers/gpu/drm/scheduler/sched_entity.c

547

fence = rcu_dereference_check(entity->last_scheduled, true);

drivers/gpu/drm/scheduler/sched_entity.c

550

if (fence && !dma_fence_is_signaled(fence))

drivers/gpu/drm/scheduler/sched_fence.c

101

struct drm_sched_fence *fence = to_drm_sched_fence(f);

drivers/gpu/drm/scheduler/sched_fence.c

103

if (!WARN_ON_ONCE(!fence))

drivers/gpu/drm/scheduler/sched_fence.c

104

kmem_cache_free(sched_fence_slab, fence);

drivers/gpu/drm/scheduler/sched_fence.c

115

void drm_sched_fence_free(struct drm_sched_fence *fence)

drivers/gpu/drm/scheduler/sched_fence.c

118

if (!WARN_ON_ONCE(fence->sched))

drivers/gpu/drm/scheduler/sched_fence.c

119

kmem_cache_free(sched_fence_slab, fence);

drivers/gpu/drm/scheduler/sched_fence.c

132

struct drm_sched_fence *fence = to_drm_sched_fence(f);

drivers/gpu/drm/scheduler/sched_fence.c

134

dma_fence_put(fence->parent);

drivers/gpu/drm/scheduler/sched_fence.c

135

call_rcu(&fence->finished.rcu, drm_sched_fence_free_rcu);

drivers/gpu/drm/scheduler/sched_fence.c

147

struct drm_sched_fence *fence = to_drm_sched_fence(f);

drivers/gpu/drm/scheduler/sched_fence.c

149

dma_fence_put(&fence->scheduled);

drivers/gpu/drm/scheduler/sched_fence.c

155

struct drm_sched_fence *fence = to_drm_sched_fence(f);

drivers/gpu/drm/scheduler/sched_fence.c

159

spin_lock_irqsave(&fence->lock, flags);

drivers/gpu/drm/scheduler/sched_fence.c

163

ktime_before(fence->deadline, deadline)) {

drivers/gpu/drm/scheduler/sched_fence.c

164

spin_unlock_irqrestore(&fence->lock, flags);

drivers/gpu/drm/scheduler/sched_fence.c

168

fence->deadline = deadline;

drivers/gpu/drm/scheduler/sched_fence.c

171

spin_unlock_irqrestore(&fence->lock, flags);

drivers/gpu/drm/scheduler/sched_fence.c

178

parent = smp_load_acquire(&fence->parent);

drivers/gpu/drm/scheduler/sched_fence.c

212

struct drm_sched_fence *fence = NULL;

drivers/gpu/drm/scheduler/sched_fence.c

214

fence = kmem_cache_zalloc(sched_fence_slab, GFP_KERNEL);

drivers/gpu/drm/scheduler/sched_fence.c

215

if (fence == NULL)

drivers/gpu/drm/scheduler/sched_fence.c

218

fence->owner = owner;

drivers/gpu/drm/scheduler/sched_fence.c

219

fence->drm_client_id = drm_client_id;

drivers/gpu/drm/scheduler/sched_fence.c

220

spin_lock_init(&fence->lock);

drivers/gpu/drm/scheduler/sched_fence.c

222

return fence;

drivers/gpu/drm/scheduler/sched_fence.c

225

void drm_sched_fence_init(struct drm_sched_fence *fence,

drivers/gpu/drm/scheduler/sched_fence.c

230

fence->sched = entity->rq->sched;

drivers/gpu/drm/scheduler/sched_fence.c

232

dma_fence_init(&fence->scheduled, &drm_sched_fence_ops_scheduled,

drivers/gpu/drm/scheduler/sched_fence.c

233

&fence->lock, entity->fence_context, seq);

drivers/gpu/drm/scheduler/sched_fence.c

234

dma_fence_init(&fence->finished, &drm_sched_fence_ops_finished,

drivers/gpu/drm/scheduler/sched_fence.c

235

&fence->lock, entity->fence_context + 1, seq);

drivers/gpu/drm/scheduler/sched_fence.c

52

struct dma_fence *fence)

drivers/gpu/drm/scheduler/sched_fence.c

59

smp_store_release(&s_fence->parent, dma_fence_get(fence));

drivers/gpu/drm/scheduler/sched_fence.c

62

dma_fence_set_deadline(fence, s_fence->deadline);

drivers/gpu/drm/scheduler/sched_fence.c

65

void drm_sched_fence_scheduled(struct drm_sched_fence *fence,

drivers/gpu/drm/scheduler/sched_fence.c

75

drm_sched_fence_set_parent(fence, parent);

drivers/gpu/drm/scheduler/sched_fence.c

77

dma_fence_signal(&fence->scheduled);

drivers/gpu/drm/scheduler/sched_fence.c

80

void drm_sched_fence_finished(struct drm_sched_fence *fence, int result)

drivers/gpu/drm/scheduler/sched_fence.c

83

dma_fence_set_error(&fence->finished, result);

drivers/gpu/drm/scheduler/sched_fence.c

84

dma_fence_signal(&fence->finished);

drivers/gpu/drm/scheduler/sched_fence.c

87

static const char *drm_sched_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/scheduler/sched_fence.c

94

struct drm_sched_fence *fence = to_drm_sched_fence(f);

drivers/gpu/drm/scheduler/sched_fence.c

95

return (const char *)fence->sched->name;

drivers/gpu/drm/scheduler/sched_internal.h

28

void drm_sched_fence_init(struct drm_sched_fence *fence,

drivers/gpu/drm/scheduler/sched_internal.h

30

void drm_sched_fence_free(struct drm_sched_fence *fence);

drivers/gpu/drm/scheduler/sched_internal.h

32

void drm_sched_fence_scheduled(struct drm_sched_fence *fence,

drivers/gpu/drm/scheduler/sched_internal.h

34

void drm_sched_fence_finished(struct drm_sched_fence *fence, int result);

drivers/gpu/drm/scheduler/sched_main.c

1017

struct dma_fence *fence)

drivers/gpu/drm/scheduler/sched_main.c

1023

if (f == fence)

drivers/gpu/drm/scheduler/sched_main.c

1049

struct dma_fence *fence;

drivers/gpu/drm/scheduler/sched_main.c

1067

xa_for_each(&job->dependencies, index, fence) {

drivers/gpu/drm/scheduler/sched_main.c

1068

dma_fence_put(fence);

drivers/gpu/drm/scheduler/sched_main.c

1236

struct dma_fence *fence;

drivers/gpu/drm/scheduler/sched_main.c

1268

fence = sched->ops->run_job(sched_job);

drivers/gpu/drm/scheduler/sched_main.c

1270

drm_sched_fence_scheduled(s_fence, fence);

drivers/gpu/drm/scheduler/sched_main.c

1272

if (!IS_ERR_OR_NULL(fence)) {

drivers/gpu/drm/scheduler/sched_main.c

1273

r = dma_fence_add_callback(fence, &sched_job->cb,

drivers/gpu/drm/scheduler/sched_main.c

1276

drm_sched_job_done(sched_job, fence->error);

drivers/gpu/drm/scheduler/sched_main.c

1280

dma_fence_put(fence);

drivers/gpu/drm/scheduler/sched_main.c

1282

drm_sched_job_done(sched_job, IS_ERR(fence) ?

drivers/gpu/drm/scheduler/sched_main.c

1283

PTR_ERR(fence) : 0);

drivers/gpu/drm/scheduler/sched_main.c

699

struct dma_fence *fence = s_job->s_fence->parent;

drivers/gpu/drm/scheduler/sched_main.c

703

if (!fence) {

drivers/gpu/drm/scheduler/sched_main.c

708

if (dma_fence_add_callback(fence, &s_job->cb,

drivers/gpu/drm/scheduler/sched_main.c

710

drm_sched_job_done(s_job, fence->error ?: errno);

drivers/gpu/drm/scheduler/sched_main.c

742

struct dma_fence *fence;

drivers/gpu/drm/scheduler/sched_main.c

755

fence = sched->ops->run_job(s_job);

drivers/gpu/drm/scheduler/sched_main.c

757

if (IS_ERR_OR_NULL(fence)) {

drivers/gpu/drm/scheduler/sched_main.c

758

if (IS_ERR(fence))

drivers/gpu/drm/scheduler/sched_main.c

759

dma_fence_set_error(&s_fence->finished, PTR_ERR(fence));

drivers/gpu/drm/scheduler/sched_main.c

764

s_job->s_fence->parent = dma_fence_get(fence);

drivers/gpu/drm/scheduler/sched_main.c

767

dma_fence_put(fence);

drivers/gpu/drm/scheduler/sched_main.c

885

struct dma_fence *fence)

drivers/gpu/drm/scheduler/sched_main.c

892

if (!fence)

drivers/gpu/drm/scheduler/sched_main.c

900

if (entry->context != fence->context)

drivers/gpu/drm/scheduler/sched_main.c

903

if (dma_fence_is_later(fence, entry)) {

drivers/gpu/drm/scheduler/sched_main.c

905

xa_store(&job->dependencies, index, fence, GFP_KERNEL);

drivers/gpu/drm/scheduler/sched_main.c

907

dma_fence_put(fence);

drivers/gpu/drm/scheduler/sched_main.c

912

ret = xa_alloc(&job->dependencies, &id, fence, xa_limit_32b, GFP_KERNEL);

drivers/gpu/drm/scheduler/sched_main.c

914

dma_fence_put(fence);

drivers/gpu/drm/scheduler/sched_main.c

937

struct dma_fence *fence;

drivers/gpu/drm/scheduler/sched_main.c

940

ret = drm_syncobj_find_fence(file, handle, point, 0, &fence);

drivers/gpu/drm/scheduler/sched_main.c

944

return drm_sched_job_add_dependency(job, fence);

drivers/gpu/drm/scheduler/sched_main.c

965

struct dma_fence *fence;

drivers/gpu/drm/scheduler/sched_main.c

970

dma_resv_for_each_fence(&cursor, resv, usage, fence) {

drivers/gpu/drm/scheduler/sched_main.c

976

ret = drm_sched_job_add_dependency(job, dma_fence_get(fence));

drivers/gpu/drm/scheduler/tests/mock_scheduler.c

134

static const char *drm_mock_sched_hw_fence_driver_name(struct dma_fence *fence)

drivers/gpu/drm/scheduler/tests/mock_scheduler.c

140

drm_mock_sched_hw_fence_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/scheduler/tests/mock_scheduler.c

143

container_of(fence, typeof(*job), hw_fence);

drivers/gpu/drm/scheduler/tests/mock_scheduler.c

148

static void drm_mock_sched_hw_fence_release(struct dma_fence *fence)

drivers/gpu/drm/scheduler/tests/mock_scheduler.c

151

container_of(fence, typeof(*job), hw_fence);

drivers/gpu/drm/tegra/drm.c

335

args->fence = job->syncpt_end;

drivers/gpu/drm/tegra/submit.c

533

struct dma_fence *fence;

drivers/gpu/drm/tegra/submit.c

535

err = drm_syncobj_find_fence(file, args->syncobj_in, 0, 0, &fence);

drivers/gpu/drm/tegra/submit.c

541

err = dma_fence_wait_timeout(fence, true, msecs_to_jiffies(10000));

drivers/gpu/drm/tegra/submit.c

542

dma_fence_put(fence);

drivers/gpu/drm/tegra/submit.c

649

struct dma_fence *fence = host1x_fence_create(job->syncpt, job->syncpt_end, true);

drivers/gpu/drm/tegra/submit.c

650

if (IS_ERR(fence)) {

drivers/gpu/drm/tegra/submit.c

651

err = PTR_ERR(fence);

drivers/gpu/drm/tegra/submit.c

655

drm_syncobj_replace_fence(syncobj, fence);

drivers/gpu/drm/ttm/tests/ttm_bo_test.c

431

struct dma_fence *fence;

drivers/gpu/drm/ttm/tests/ttm_bo_test.c

449

fence = kunit_kzalloc(test, sizeof(*fence), GFP_KERNEL);

drivers/gpu/drm/ttm/tests/ttm_bo_test.c

450

KUNIT_ASSERT_NOT_NULL(test, fence);

drivers/gpu/drm/ttm/tests/ttm_bo_test.c

453

dma_fence_init(fence, &mock_fence_ops, &fence_lock, 0, 0);

drivers/gpu/drm/ttm/tests/ttm_bo_test.c

457

dma_resv_add_fence(external_resv, fence, DMA_RESV_USAGE_BOOKKEEP);

drivers/gpu/drm/ttm/tests/ttm_bo_test.c

460

dma_fence_signal(fence);

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

55

struct dma_fence *fence;

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

57

fence = kunit_kzalloc(test, sizeof(*fence), GFP_KERNEL);

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

578

struct dma_fence *fence;

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

58

KUNIT_ASSERT_NOT_NULL(test, fence);

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

581

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

582

dma_fence_signal(fence);

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

60

dma_fence_init(fence, &fence_ops, &fence_lock, 0, 0);

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

62

return fence;

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

69

struct dma_fence *fence;

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

691

struct dma_fence *fence = arg;

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

695

return dma_fence_check_and_signal(fence) ? -EINVAL : 0;

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

71

fence = alloc_mock_fence(test);

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

72

dma_fence_enable_sw_signaling(fence);

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

76

dma_resv_add_fence(resv, fence, usage);

drivers/gpu/drm/ttm/ttm_bo.c

222

struct dma_fence *fence;

drivers/gpu/drm/ttm/ttm_bo.c

225

dma_resv_for_each_fence_unlocked(&cursor, fence) {

drivers/gpu/drm/ttm/ttm_bo.c

226

if (!fence->ops->signaled)

drivers/gpu/drm/ttm/ttm_bo.c

227

dma_fence_enable_sw_signaling(fence);

drivers/gpu/drm/ttm/ttm_bo.c

668

struct dma_fence *fence;

drivers/gpu/drm/ttm/ttm_bo.c

673

fence = man->eviction_fences[i];

drivers/gpu/drm/ttm/ttm_bo.c

674

if (!fence)

drivers/gpu/drm/ttm/ttm_bo.c

678

if (!dma_fence_is_signaled(fence)) {

drivers/gpu/drm/ttm/ttm_bo.c

683

dma_resv_add_fence(bo->base.resv, fence, DMA_RESV_USAGE_KERNEL);

drivers/gpu/drm/ttm/ttm_bo_util.c

602

struct dma_fence *fence,

drivers/gpu/drm/ttm/ttm_bo_util.c

620

dma_resv_add_fence(&ghost_obj->base._resv, fence,

drivers/gpu/drm/ttm/ttm_bo_util.c

640

struct dma_fence *fence)

drivers/gpu/drm/ttm/ttm_bo_util.c

661

if (fence->context != tmp->context)

drivers/gpu/drm/ttm/ttm_bo_util.c

663

if (dma_fence_is_later(fence, tmp)) {

drivers/gpu/drm/ttm/ttm_bo_util.c

670

from->eviction_fences[i] = dma_fence_get(fence);

drivers/gpu/drm/ttm/ttm_bo_util.c

674

dma_fence_wait(fence, false);

drivers/gpu/drm/ttm/ttm_bo_util.c

701

struct dma_fence *fence,

drivers/gpu/drm/ttm/ttm_bo_util.c

711

dma_resv_add_fence(bo->base.resv, fence, DMA_RESV_USAGE_KERNEL);

drivers/gpu/drm/ttm/ttm_bo_util.c

713

ret = ttm_bo_move_to_ghost(bo, fence, man->use_tt);

drivers/gpu/drm/ttm/ttm_bo_util.c

715

ttm_bo_move_pipeline_evict(bo, fence);

drivers/gpu/drm/ttm/ttm_execbuf_util.c

145

struct dma_fence *fence)

drivers/gpu/drm/ttm/ttm_execbuf_util.c

155

dma_resv_add_fence(bo->base.resv, fence, entry->num_shared ?

drivers/gpu/drm/ttm/ttm_resource.c

549

struct dma_fence *fence;

drivers/gpu/drm/ttm/ttm_resource.c

564

fence = man->eviction_fences[i];

drivers/gpu/drm/ttm/ttm_resource.c

565

if (fence && !dma_fence_is_signaled(fence)) {

drivers/gpu/drm/ttm/ttm_resource.c

566

dma_fence_get(fence);

drivers/gpu/drm/ttm/ttm_resource.c

568

ret = dma_fence_wait(fence, false);

drivers/gpu/drm/ttm/ttm_resource.c

569

dma_fence_put(fence);

drivers/gpu/drm/v3d/v3d_drv.h

268

to_v3d_fence(struct dma_fence *fence)

drivers/gpu/drm/v3d/v3d_drv.h

270

return (struct v3d_fence *)fence;

drivers/gpu/drm/v3d/v3d_fence.c

11

fence = kzalloc_obj(*fence);

drivers/gpu/drm/v3d/v3d_fence.c

12

if (!fence)

drivers/gpu/drm/v3d/v3d_fence.c

15

fence->dev = &v3d->drm;

drivers/gpu/drm/v3d/v3d_fence.c

16

fence->queue = q;

drivers/gpu/drm/v3d/v3d_fence.c

17

fence->seqno = ++queue->emit_seqno;

drivers/gpu/drm/v3d/v3d_fence.c

18

dma_fence_init(&fence->base, &v3d_fence_ops, &queue->fence_lock,

drivers/gpu/drm/v3d/v3d_fence.c

19

queue->fence_context, fence->seqno);

drivers/gpu/drm/v3d/v3d_fence.c

21

return &fence->base;

drivers/gpu/drm/v3d/v3d_fence.c

24

static const char *v3d_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/v3d/v3d_fence.c

29

static const char *v3d_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/v3d/v3d_fence.c

31

struct v3d_fence *f = to_v3d_fence(fence);

drivers/gpu/drm/v3d/v3d_fence.c

9

struct v3d_fence *fence;

drivers/gpu/drm/v3d/v3d_irq.c

93

struct v3d_fence *fence = to_v3d_fence(queue->active_job->irq_fence);

drivers/gpu/drm/v3d/v3d_irq.c

96

trace_irq(&v3d->drm, fence->seqno);

drivers/gpu/drm/v3d/v3d_irq.c

99

dma_fence_signal(&fence->base);

drivers/gpu/drm/v3d/v3d_sched.c

232

struct dma_fence *fence;

drivers/gpu/drm/v3d/v3d_sched.c

255

fence = v3d_fence_create(v3d, V3D_BIN);

drivers/gpu/drm/v3d/v3d_sched.c

256

if (IS_ERR(fence))

drivers/gpu/drm/v3d/v3d_sched.c

261

job->base.irq_fence = dma_fence_get(fence);

drivers/gpu/drm/v3d/v3d_sched.c

263

trace_v3d_submit_cl(dev, false, to_v3d_fence(fence)->seqno,

drivers/gpu/drm/v3d/v3d_sched.c

284

return fence;

drivers/gpu/drm/v3d/v3d_sched.c

292

struct dma_fence *fence;

drivers/gpu/drm/v3d/v3d_sched.c

309

fence = v3d_fence_create(v3d, V3D_RENDER);

drivers/gpu/drm/v3d/v3d_sched.c

310

if (IS_ERR(fence))

drivers/gpu/drm/v3d/v3d_sched.c

315

job->base.irq_fence = dma_fence_get(fence);

drivers/gpu/drm/v3d/v3d_sched.c

317

trace_v3d_submit_cl(dev, true, to_v3d_fence(fence)->seqno,

drivers/gpu/drm/v3d/v3d_sched.c

331

return fence;

drivers/gpu/drm/v3d/v3d_sched.c

340

struct dma_fence *fence;

drivers/gpu/drm/v3d/v3d_sched.c

349

fence = v3d_fence_create(v3d, V3D_TFU);

drivers/gpu/drm/v3d/v3d_sched.c

350

if (IS_ERR(fence))

drivers/gpu/drm/v3d/v3d_sched.c

355

job->base.irq_fence = dma_fence_get(fence);

drivers/gpu/drm/v3d/v3d_sched.c

357

trace_v3d_submit_tfu(dev, to_v3d_fence(fence)->seqno);

drivers/gpu/drm/v3d/v3d_sched.c

378

return fence;

drivers/gpu/drm/v3d/v3d_sched.c

387

struct dma_fence *fence;

drivers/gpu/drm/v3d/v3d_sched.c

399

fence = v3d_fence_create(v3d, V3D_CSD);

drivers/gpu/drm/v3d/v3d_sched.c

400

if (IS_ERR(fence))

drivers/gpu/drm/v3d/v3d_sched.c

405

job->base.irq_fence = dma_fence_get(fence);

drivers/gpu/drm/v3d/v3d_sched.c

407

trace_v3d_submit_csd(dev, to_v3d_fence(fence)->seqno);

drivers/gpu/drm/v3d/v3d_sched.c

427

return fence;

drivers/gpu/drm/v3d/v3d_sched.c

542

struct dma_fence *fence;

drivers/gpu/drm/v3d/v3d_sched.c

554

fence = drm_syncobj_fence_get(queries[i].syncobj);

drivers/gpu/drm/v3d/v3d_sched.c

555

available = fence ? dma_fence_is_signaled(fence) : false;

drivers/gpu/drm/v3d/v3d_sched.c

568

dma_fence_put(fence);

drivers/gpu/drm/v3d/v3d_sched.c

649

struct dma_fence *fence;

drivers/gpu/drm/v3d/v3d_sched.c

658

fence = drm_syncobj_fence_get(performance_query->queries[i].syncobj);

drivers/gpu/drm/v3d/v3d_sched.c

659

available = fence ? dma_fence_is_signaled(fence) : false;

drivers/gpu/drm/v3d/v3d_sched.c

671

dma_fence_put(fence);

drivers/gpu/drm/vc4/vc4_crtc.c

918

static void vc4_async_page_flip_complete_with_cleanup(struct dma_fence *fence,

drivers/gpu/drm/vc4/vc4_crtc.c

932

dma_fence_put(fence);

drivers/gpu/drm/vc4/vc4_crtc.c

947

static void vc4_async_page_flip_fence_complete(struct dma_fence *fence,

drivers/gpu/drm/vc4/vc4_crtc.c

954

dma_fence_put(fence);

drivers/gpu/drm/vc4/vc4_crtc.c

964

struct dma_fence *fence;

drivers/gpu/drm/vc4/vc4_crtc.c

972

ret = dma_resv_get_singleton(dma_bo->base.resv, DMA_RESV_USAGE_READ, &fence);

drivers/gpu/drm/vc4/vc4_crtc.c

977

if (!fence) {

drivers/gpu/drm/vc4/vc4_crtc.c

978

async_page_flip_complete_function(fence, &flip_state->cb);

drivers/gpu/drm/vc4/vc4_crtc.c

983

if (dma_fence_add_callback(fence, &flip_state->cb,

drivers/gpu/drm/vc4/vc4_crtc.c

985

async_page_flip_complete_function(fence, &flip_state->cb);

drivers/gpu/drm/vc4/vc4_drv.h

677

struct dma_fence *fence;

drivers/gpu/drm/vc4/vc4_fence.c

26

static const char *vc4_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/vc4/vc4_fence.c

31

static const char *vc4_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/vc4/vc4_fence.c

36

static bool vc4_fence_signaled(struct dma_fence *fence)

drivers/gpu/drm/vc4/vc4_fence.c

38

struct vc4_fence *f = to_vc4_fence(fence);

drivers/gpu/drm/vc4/vc4_gem.c

564

dma_resv_add_fence(bo->base.base.resv, exec->fence,

drivers/gpu/drm/vc4/vc4_gem.c

570

dma_resv_add_fence(bo->base.base.resv, exec->fence,

drivers/gpu/drm/vc4/vc4_gem.c

623

struct vc4_fence *fence;

drivers/gpu/drm/vc4/vc4_gem.c

625

fence = kzalloc_obj(*fence);

drivers/gpu/drm/vc4/vc4_gem.c

626

if (!fence)

drivers/gpu/drm/vc4/vc4_gem.c

628

fence->dev = dev;

drivers/gpu/drm/vc4/vc4_gem.c

635

dma_fence_init(&fence->base, &vc4_fence_ops, &vc4->job_lock,

drivers/gpu/drm/vc4/vc4_gem.c

637

fence->seqno = exec->seqno;

drivers/gpu/drm/vc4/vc4_gem.c

638

exec->fence = &fence->base;

drivers/gpu/drm/vc4/vc4_gem.c

641

drm_syncobj_replace_fence(out_sync, exec->fence);

drivers/gpu/drm/vc4/vc4_gem.c

856

if (exec->fence) {

drivers/gpu/drm/vc4/vc4_gem.c

857

dma_fence_signal(exec->fence);

drivers/gpu/drm/vc4/vc4_gem.c

858

dma_fence_put(exec->fence);

drivers/gpu/drm/vc4/vc4_irq.c

193

if (exec->fence) {

drivers/gpu/drm/vc4/vc4_irq.c

194

dma_fence_signal_locked(exec->fence);

drivers/gpu/drm/vc4/vc4_irq.c

195

dma_fence_put(exec->fence);

drivers/gpu/drm/vc4/vc4_irq.c

196

exec->fence = NULL;

drivers/gpu/drm/vgem/vgem_fence.c

119

struct dma_fence *fence;

drivers/gpu/drm/vgem/vgem_fence.c

132

fence = vgem_fence_create(vfile, arg->flags);

drivers/gpu/drm/vgem/vgem_fence.c

133

if (!fence) {

drivers/gpu/drm/vgem/vgem_fence.c

150

dma_resv_add_fence(resv, fence, arg->flags & VGEM_FENCE_WRITE ?

drivers/gpu/drm/vgem/vgem_fence.c

157

ret = idr_alloc(&vfile->fence_idr, fence, 1, 0, GFP_KERNEL);

drivers/gpu/drm/vgem/vgem_fence.c

166

dma_fence_signal(fence);

drivers/gpu/drm/vgem/vgem_fence.c

167

dma_fence_put(fence);

drivers/gpu/drm/vgem/vgem_fence.c

196

struct dma_fence *fence;

drivers/gpu/drm/vgem/vgem_fence.c

203

fence = idr_replace(&vfile->fence_idr, NULL, arg->fence);

drivers/gpu/drm/vgem/vgem_fence.c

205

if (!fence)

drivers/gpu/drm/vgem/vgem_fence.c

207

if (IS_ERR(fence))

drivers/gpu/drm/vgem/vgem_fence.c

208

return PTR_ERR(fence);

drivers/gpu/drm/vgem/vgem_fence.c

210

if (dma_fence_is_signaled(fence))

drivers/gpu/drm/vgem/vgem_fence.c

213

dma_fence_signal(fence);

drivers/gpu/drm/vgem/vgem_fence.c

214

dma_fence_put(fence);

drivers/gpu/drm/vgem/vgem_fence.c

38

static const char *vgem_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/vgem/vgem_fence.c

43

static const char *vgem_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/vgem/vgem_fence.c

50

struct vgem_fence *fence = container_of(base, typeof(*fence), base);

drivers/gpu/drm/vgem/vgem_fence.c

52

timer_delete_sync(&fence->timer);

drivers/gpu/drm/vgem/vgem_fence.c

53

dma_fence_free(&fence->base);

drivers/gpu/drm/vgem/vgem_fence.c

64

struct vgem_fence *fence = timer_container_of(fence, t, timer);

drivers/gpu/drm/vgem/vgem_fence.c

66

dma_fence_signal(&fence->base);

drivers/gpu/drm/vgem/vgem_fence.c

72

struct vgem_fence *fence;

drivers/gpu/drm/vgem/vgem_fence.c

74

fence = kzalloc_obj(*fence);

drivers/gpu/drm/vgem/vgem_fence.c

75

if (!fence)

drivers/gpu/drm/vgem/vgem_fence.c

78

spin_lock_init(&fence->lock);

drivers/gpu/drm/vgem/vgem_fence.c

79

dma_fence_init(&fence->base, &vgem_fence_ops, &fence->lock,

drivers/gpu/drm/vgem/vgem_fence.c

82

timer_setup(&fence->timer, vgem_fence_timeout, TIMER_IRQSAFE);

drivers/gpu/drm/vgem/vgem_fence.c

85

mod_timer(&fence->timer, jiffies + VGEM_FENCE_TIMEOUT);

drivers/gpu/drm/vgem/vgem_fence.c

87

return &fence->base;

drivers/gpu/drm/virtio/virtgpu_drv.h

193

struct virtio_gpu_fence *fence;

drivers/gpu/drm/virtio/virtgpu_drv.h

200

struct virtio_gpu_fence *fence;

drivers/gpu/drm/virtio/virtgpu_drv.h

322

struct dma_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

335

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

348

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

358

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

369

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

394

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

402

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

410

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

416

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

464

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_drv.h

475

struct virtio_gpu_fence *fence);

drivers/gpu/drm/virtio/virtgpu_fence.c

100

cmd_hdr->fence_id = cpu_to_le64(fence->fence_id);

drivers/gpu/drm/virtio/virtgpu_fence.c

103

if (fence->emit_fence_info) {

drivers/gpu/drm/virtio/virtgpu_fence.c

106

cmd_hdr->ring_idx = (u8)fence->ring_idx;

drivers/gpu/drm/virtio/virtgpu_fence.c

64

struct virtio_gpu_fence *fence = kzalloc_obj(struct virtio_gpu_fence);

drivers/gpu/drm/virtio/virtgpu_fence.c

66

if (!fence)

drivers/gpu/drm/virtio/virtgpu_fence.c

67

return fence;

drivers/gpu/drm/virtio/virtgpu_fence.c

69

fence->drv = drv;

drivers/gpu/drm/virtio/virtgpu_fence.c

70

fence->ring_idx = ring_idx;

drivers/gpu/drm/virtio/virtgpu_fence.c

71

fence->emit_fence_info = !(base_fence_ctx == drv->context);

drivers/gpu/drm/virtio/virtgpu_fence.c

78

dma_fence_init(&fence->f, &virtio_gpu_fence_ops, &drv->lock,

drivers/gpu/drm/virtio/virtgpu_fence.c

81

return fence;

drivers/gpu/drm/virtio/virtgpu_fence.c

86

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_fence.c

92

fence->fence_id = fence->f.seqno = ++drv->current_fence_id;

drivers/gpu/drm/virtio/virtgpu_fence.c

93

dma_fence_get(&fence->f);

drivers/gpu/drm/virtio/virtgpu_fence.c

94

list_add_tail(&fence->node, &drv->fences);

drivers/gpu/drm/virtio/virtgpu_fence.c

97

trace_dma_fence_emit(&fence->f);

drivers/gpu/drm/virtio/virtgpu_gem.c

252

struct dma_fence *fence)

drivers/gpu/drm/virtio/virtgpu_gem.c

257

dma_resv_add_fence(objs->objs[i]->resv, fence,

drivers/gpu/drm/virtio/virtgpu_ioctl.c

134

struct virtio_gpu_fence *fence;

drivers/gpu/drm/virtio/virtgpu_ioctl.c

172

fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0);

drivers/gpu/drm/virtio/virtgpu_ioctl.c

173

if (!fence)

drivers/gpu/drm/virtio/virtgpu_ioctl.c

175

ret = virtio_gpu_object_create(vgdev, &params, &qobj, fence);

drivers/gpu/drm/virtio/virtgpu_ioctl.c

176

dma_fence_put(&fence->f);

drivers/gpu/drm/virtio/virtgpu_ioctl.c

232

struct virtio_gpu_fence *fence;

drivers/gpu/drm/virtio/virtgpu_ioctl.c

259

fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0);

drivers/gpu/drm/virtio/virtgpu_ioctl.c

260

if (!fence) {

drivers/gpu/drm/virtio/virtgpu_ioctl.c

267

args->layer_stride, &args->box, objs, fence);

drivers/gpu/drm/virtio/virtgpu_ioctl.c

268

dma_fence_put(&fence->f);

drivers/gpu/drm/virtio/virtgpu_ioctl.c

287

struct virtio_gpu_fence *fence;

drivers/gpu/drm/virtio/virtgpu_ioctl.c

319

fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context,

drivers/gpu/drm/virtio/virtgpu_ioctl.c

321

if (!fence)

drivers/gpu/drm/virtio/virtgpu_ioctl.c

328

fence);

drivers/gpu/drm/virtio/virtgpu_ioctl.c

329

dma_fence_put(&fence->f);

drivers/gpu/drm/virtio/virtgpu_object.c

108

struct virtio_gpu_fence *fence;

drivers/gpu/drm/virtio/virtgpu_object.c

113

fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0);

drivers/gpu/drm/virtio/virtgpu_object.c

114

if (!fence)

drivers/gpu/drm/virtio/virtgpu_object.c

117

virtio_gpu_object_detach(vgdev, bo, fence);

drivers/gpu/drm/virtio/virtgpu_object.c

120

dma_fence_wait(&fence->f, false);

drivers/gpu/drm/virtio/virtgpu_object.c

121

dma_fence_put(&fence->f);

drivers/gpu/drm/virtio/virtgpu_object.c

206

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_object.c

233

if (fence) {

drivers/gpu/drm/virtio/virtgpu_object.c

253

objs, fence);

drivers/gpu/drm/virtio/virtgpu_object.c

257

objs, fence);

drivers/gpu/drm/virtio/virtgpu_plane.c

211

if (vgplane_st->fence) {

drivers/gpu/drm/virtio/virtgpu_plane.c

221

vgplane_st->fence);

drivers/gpu/drm/virtio/virtgpu_plane.c

223

dma_fence_wait_timeout(&vgplane_st->fence->f, true,

drivers/gpu/drm/virtio/virtgpu_plane.c

371

vgplane_st->fence = virtio_gpu_fence_alloc(vgdev,

drivers/gpu/drm/virtio/virtgpu_plane.c

374

if (!vgplane_st->fence)

drivers/gpu/drm/virtio/virtgpu_plane.c

387

if (vgplane_st->fence) {

drivers/gpu/drm/virtio/virtgpu_plane.c

388

dma_fence_put(&vgplane_st->fence->f);

drivers/gpu/drm/virtio/virtgpu_plane.c

389

vgplane_st->fence = NULL;

drivers/gpu/drm/virtio/virtgpu_plane.c

415

if (vgplane_st->fence) {

drivers/gpu/drm/virtio/virtgpu_plane.c

416

dma_fence_put(&vgplane_st->fence->f);

drivers/gpu/drm/virtio/virtgpu_plane.c

417

vgplane_st->fence = NULL;

drivers/gpu/drm/virtio/virtgpu_plane.c

467

0, 0, objs, vgplane_st->fence);

drivers/gpu/drm/virtio/virtgpu_plane.c

469

dma_fence_wait(&vgplane_st->fence->f, true);

drivers/gpu/drm/virtio/virtgpu_submit.c

113

struct dma_fence *fence;

drivers/gpu/drm/virtio/virtgpu_submit.c

130

syncobj_desc.point, 0, &fence);

drivers/gpu/drm/virtio/virtgpu_submit.c

134

ret = virtio_gpu_dma_fence_wait(submit, fence);

drivers/gpu/drm/virtio/virtgpu_submit.c

136

dma_fence_put(fence);

drivers/gpu/drm/virtio/virtgpu_submit.c

255

struct dma_fence *fence = &submit->out_fence->f;

drivers/gpu/drm/virtio/virtgpu_submit.c

262

fence, post_deps[i].point);

drivers/gpu/drm/virtio/virtgpu_submit.c

266

fence);

drivers/gpu/drm/virtio/virtgpu_submit.c

274

struct virtio_gpu_fence *fence,

drivers/gpu/drm/virtio/virtgpu_submit.c

293

fence->e = e;

drivers/gpu/drm/virtio/virtgpu_submit.c

60

struct dma_fence *fence)

drivers/gpu/drm/virtio/virtgpu_submit.c

66

dma_fence_unwrap_for_each(f, &itr, fence) {

drivers/gpu/drm/virtio/virtgpu_vq.c

1153

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

1176

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

1188

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

1213

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

1223

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

1243

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

1250

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

1266

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

1285

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

1291

fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

374

struct virtio_gpu_fence *fence,

drivers/gpu/drm/virtio/virtgpu_vq.c

384

if (fence && vbuf->objs)

drivers/gpu/drm/virtio/virtgpu_vq.c

406

if (fence) {

drivers/gpu/drm/virtio/virtgpu_vq.c

408

fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

410

virtio_gpu_array_add_fence(vbuf->objs, &fence->f);

drivers/gpu/drm/virtio/virtgpu_vq.c

457

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

477

if (fence && vbuf->objs)

drivers/gpu/drm/virtio/virtgpu_vq.c

500

ret = virtio_gpu_queue_ctrl_sgs(vgdev, vbuf, fence, elemcnt, sgs, outcnt,

drivers/gpu/drm/virtio/virtgpu_vq.c

598

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

613

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

698

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

714

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

753

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

776

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

784

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

799

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/virtio/virtgpu_vq.c

805

struct virtio_gpu_fence *fence)

drivers/gpu/drm/virtio/virtgpu_vq.c

816

virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

drivers/gpu/drm/vmwgfx/device_include/svga_reg.h

783

uint32 fence;

drivers/gpu/drm/vmwgfx/vmwgfx_bo.c

672

struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_bo.c

678

if (fence == NULL)

drivers/gpu/drm/vmwgfx/vmwgfx_bo.c

679

vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_bo.c

681

dma_fence_get(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_bo.c

685

dma_resv_add_fence(bo->base.resv, &fence->base,

drivers/gpu/drm/vmwgfx/vmwgfx_bo.c

689

dma_fence_wait(&fence->base, false);

drivers/gpu/drm/vmwgfx/vmwgfx_bo.c

690

dma_fence_put(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_bo.h

134

struct vmw_fence_obj *fence);

drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c

545

cmd_fence->fence = *seqno;

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

374

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

424

&fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

426

vmw_bo_fence_single(bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

428

if (likely(fence != NULL))

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

429

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

583

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

640

&fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

642

vmw_bo_fence_single(bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

644

if (likely(fence != NULL))

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

645

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

328

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

340

(void) vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

341

vmw_bo_fence_single(bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

342

if (likely(fence != NULL))

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

343

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

365

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

380

(void) vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

381

vmw_bo_fence_single(&res->guest_memory_bo->tbo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

382

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

230

struct vmw_fence_obj *fence = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

271

ret = vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

277

dma_fence_wait(&fence->base, false);

drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c

278

dma_fence_put(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

1008

struct vmw_fence_obj *fence,

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

1470

u32 fence;

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

1472

fence = vmw_read(dev_priv, SVGA_REG_FENCE);

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

1474

fence = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE);

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

1475

return fence;

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

1479

u32 fence)

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

1482

vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

996

struct vmw_fence_obj *fence);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

3876

struct vmw_fence_obj *fence, uint32_t fence_handle,

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

3889

BUG_ON(fence == NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

3892

fence_rep.seqno = fence->base.seqno;

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

3911

(void) vmw_fence_obj_wait(fence, false, false,

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4091

struct vmw_fence_obj *fence = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4214

ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4228

vmw_validation_bo_fence(sw_context->ctx, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4231

__vmw_execbuf_release_pinned_bo(dev_priv, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4240

sync_file = sync_file_create(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4246

(void) vmw_fence_obj_wait(fence, false, false,

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4252

user_fence_rep, fence, handle, out_fence_fd);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4267

*out_fence = fence;

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4268

fence = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4269

} else if (likely(fence != NULL)) {

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4270

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4362

struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4390

BUG_ON(fence != NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4402

if (fence == NULL) {

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4405

fence = lfence;

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

4407

vmw_validation_bo_fence(&val_ctx, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

100

struct vmw_fence_obj *fence =

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

103

struct vmw_fence_manager *fman = fman_from_fence(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

107

if (seqno - fence->base.seqno < VMW_FENCE_WRAP) {

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

108

if (fence->waiter_added) {

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

110

fence->waiter_added = false;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

113

} else if (!fence->waiter_added) {

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

114

fence->waiter_added = true;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

159

struct vmw_fence_obj *fence, u32 seqno,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

160

void (*destroy) (struct vmw_fence_obj *fence))

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

164

dma_fence_init(&fence->base, &vmw_fence_ops, &fman->lock,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

166

fence->destroy = destroy;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

178

list_add_tail(&fence->head, &fman->fence_list);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

188

struct vmw_fence_obj *fence, *next_fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

192

list_for_each_entry_safe(fence, next_fence, &fman->fence_list, head) {

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

193

if (seqno - fence->base.seqno < VMW_FENCE_WRAP) {

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

194

list_del_init(&fence->head);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

195

if (fence->waiter_added) {

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

197

fence->waiter_added = false;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

199

dma_fence_signal_locked(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

217

bool vmw_fence_obj_signaled(struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

219

struct vmw_fence_manager *fman = fman_from_fence(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

221

if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->base.flags))

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

226

return dma_fence_is_signaled(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

229

int vmw_fence_obj_wait(struct vmw_fence_obj *fence, bool lazy,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

23

struct vmw_fence_obj fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

232

long ret = dma_fence_wait_timeout(&fence->base, interruptible, timeout);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

242

static void vmw_fence_destroy(struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

244

dma_fence_free(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

251

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

254

fence = kzalloc_obj(*fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

255

if (unlikely(!fence))

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

258

ret = vmw_fence_obj_init(fman, fence, seqno, vmw_fence_destroy);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

262

*p_fence = fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

266

kfree(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

271

static void vmw_user_fence_destroy(struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

274

container_of(fence, struct vmw_user_fence, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

284

struct vmw_fence_obj *fence = &ufence->fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

287

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

307

ret = vmw_fence_obj_init(fman, &ufence->fence, seqno,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

318

tmp = vmw_fence_obj_reference(&ufence->fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

333

*p_fence = &ufence->fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

338

tmp = &ufence->fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

360

struct vmw_fence_obj *fence =

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

363

dma_fence_get(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

366

ret = vmw_fence_obj_wait(fence, false, false,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

370

list_del_init(&fence->head);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

371

dma_fence_signal(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

374

BUG_ON(!list_empty(&fence->head));

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

375

dma_fence_put(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

431

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

453

fence = &(container_of(base, struct vmw_user_fence, base)->fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

457

ret = ((vmw_fence_obj_signaled(fence)) ?

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

464

ret = vmw_fence_obj_wait(fence, arg->lazy, true, timeout);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

48

fman_from_fence(struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

484

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

492

fence = &(container_of(base, struct vmw_user_fence, base)->fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

494

arg->signaled = vmw_fence_obj_signaled(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

50

return container_of(fence->base.lock, struct vmw_fence_manager, lock);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

55

struct vmw_fence_obj *fence =

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

57

struct vmw_fence_manager *fman = fman_from_fence(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

574

struct vmw_fence_obj *fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

581

struct vmw_fence_manager *fman = fman_from_fence(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

59

if (!list_empty(&fence->head)) {

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

592

vmw_fence_obj_reference(fence); // Dropped in CB

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

593

if (dma_fence_add_callback(&fence->base, &eaction->base,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

595

vmw_event_fence_action_seq_passed(&fence->base, &eaction->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

605

struct vmw_fence_obj *fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

611

struct vmw_fence_manager *fman = fman_from_fence(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

635

ret = vmw_event_fence_action_queue(file_priv, fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

641

ret = vmw_event_fence_action_queue(file_priv, fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

663

struct vmw_fence_obj *fence = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

684

fence = &(container_of(base, struct vmw_user_fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

685

base)->fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

686

(void) vmw_fence_obj_reference(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

704

if (!fence) {

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

706

&fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

715

BUG_ON(fence == NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

717

ret = vmw_event_fence_action_create(file_priv, fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

72

list_del_init(&fence->head);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

727

vmw_execbuf_copy_fence_user(dev_priv, vmw_fp, 0, user_fence_rep, fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

729

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

73

if (fence->waiter_added)

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

735

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c

77

fence->destroy(fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

105

struct vmw_fence_obj *fence,

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

46

void (*destroy)(struct vmw_fence_obj *fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

57

struct vmw_fence_obj *fence = *fence_p;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

60

if (fence)

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

61

dma_fence_put(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

65

vmw_fence_obj_reference(struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

67

if (fence)

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

68

dma_fence_get(&fence->base);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

69

return fence;

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

74

extern bool vmw_fence_obj_signaled(struct vmw_fence_obj *fence);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.h

76

extern int vmw_fence_obj_wait(struct vmw_fence_obj *fence,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1628

struct vmw_fence_obj *fence = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1634

ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1636

vmw_validation_done(ctx, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1639

ret, user_fence_rep, fence,

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1642

*out_fence = fence;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1644

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_reg.h

43

u32 fence;

drivers/gpu/drm/vmwgfx/vmwgfx_resource.c

852

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_resource.c

864

(void) vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_resource.c

865

vmw_bo_fence_single(bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_resource.c

867

if (fence != NULL)

drivers/gpu/drm/vmwgfx/vmwgfx_resource.c

868

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

727

struct vmw_fence_obj *fence = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

738

old_state, vfb, &fence);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

742

&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

750

if (fence)

drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c

751

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

281

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

301

&fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

303

vmw_bo_fence_single(val_buf->bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

305

if (likely(fence != NULL))

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

306

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

511

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

524

&fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

525

vmw_bo_fence_single(val_buf->bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

527

if (likely(fence != NULL))

drivers/gpu/drm/vmwgfx/vmwgfx_shader.c

528

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1409

struct vmw_fence_obj *fence = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1430

old_state, vfb, &fence);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1434

&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1457

if (fence)

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c

1458

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c

197

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c

210

(void) vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c

211

vmw_bo_fence_single(val_buf->bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c

213

if (fence != NULL)

drivers/gpu/drm/vmwgfx/vmwgfx_streamoutput.c

214

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

1307

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

1358

&fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

1360

vmw_bo_fence_single(val_buf->bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

1362

if (likely(fence != NULL))

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

1363

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

462

struct vmw_fence_obj *fence;

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

484

&fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

486

vmw_bo_fence_single(val_buf->bo, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

488

if (likely(fence != NULL))

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

489

vmw_fence_obj_unreference(&fence);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

765

struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_validation.c

767

vmw_validation_bo_fence(ctx, fence);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

136

struct vmw_fence_obj *fence)

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

139

(void *) fence);

drivers/gpu/drm/vmwgfx/vmwgfx_validation.h

179

struct vmw_fence_obj *fence);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

52

struct vmw_fence_obj *fence = NULL;

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

63

ret = vmw_execbuf_fence_commands(NULL, vmw, &fence, NULL);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

70

dma_fence_wait(&fence->base, false);

drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c

71

dma_fence_put(&fence->base);

drivers/gpu/drm/xe/tests/xe_bo.c

29

struct dma_fence *fence;

drivers/gpu/drm/xe/tests/xe_bo.c

47

fence = xe_migrate_clear(tile->migrate, bo, bo->ttm.resource,

drivers/gpu/drm/xe/tests/xe_bo.c

49

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/tests/xe_bo.c

51

return PTR_ERR(fence);

drivers/gpu/drm/xe/tests/xe_bo.c

54

if (dma_fence_wait_timeout(fence, false, 5 * HZ) <= 0) {

drivers/gpu/drm/xe/tests/xe_bo.c

55

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_bo.c

60

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

110

fence = xe_migrate_clear(m, remote, remote->ttm.resource,

drivers/gpu/drm/xe/tests/xe_migrate.c

112

if (!sanity_fence_failed(xe, fence, big ? "Clearing remote big bo" :

drivers/gpu/drm/xe/tests/xe_migrate.c

121

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

128

fence = xe_migrate_copy(m, remote, bo, remote->ttm.resource,

drivers/gpu/drm/xe/tests/xe_migrate.c

130

if (!sanity_fence_failed(xe, fence, big ? "Copying big bo remote -> vram" :

drivers/gpu/drm/xe/tests/xe_migrate.c

139

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

145

fence = xe_migrate_copy(m, bo, remote, bo->ttm.resource,

drivers/gpu/drm/xe/tests/xe_migrate.c

147

if (!sanity_fence_failed(xe, fence, big ? "Copying big bo vram -> remote" :

drivers/gpu/drm/xe/tests/xe_migrate.c

15

static bool sanity_fence_failed(struct xe_device *xe, struct dma_fence *fence,

drivers/gpu/drm/xe/tests/xe_migrate.c

156

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

192

struct dma_fence *fence;

drivers/gpu/drm/xe/tests/xe_migrate.c

20

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/tests/xe_migrate.c

22

PTR_ERR(fence));

drivers/gpu/drm/xe/tests/xe_migrate.c

25

if (!fence)

drivers/gpu/drm/xe/tests/xe_migrate.c

28

ret = dma_fence_wait_timeout(fence, false, 5 * HZ);

drivers/gpu/drm/xe/tests/xe_migrate.c

286

fence = xe_migrate_clear(m, tiny, tiny->ttm.resource,

drivers/gpu/drm/xe/tests/xe_migrate.c

288

if (sanity_fence_failed(xe, fence, "Clearing small bo", test))

drivers/gpu/drm/xe/tests/xe_migrate.c

291

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

308

fence = xe_migrate_clear(m, big, big->ttm.resource,

drivers/gpu/drm/xe/tests/xe_migrate.c

310

if (sanity_fence_failed(xe, fence, "Clearing big bo", test))

drivers/gpu/drm/xe/tests/xe_migrate.c

313

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

375

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/tests/xe_migrate.c

45

struct dma_fence *fence;

drivers/gpu/drm/xe/tests/xe_migrate.c

467

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

468

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/tests/xe_migrate.c

471

dma_fence_put(m->fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

472

m->fence = dma_fence_get(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

476

xe_bb_free(bb, fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

484

if (fence) {

drivers/gpu/drm/xe/tests/xe_migrate.c

485

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/tests/xe_migrate.c

486

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

491

return fence;

drivers/gpu/drm/xe/tests/xe_migrate.c

498

struct dma_fence *fence;

drivers/gpu/drm/xe/tests/xe_migrate.c

506

fence = blt_copy(tile, sys_bo, vram_bo, false, "Blit copy from sysmem to vram", test);

drivers/gpu/drm/xe/tests/xe_migrate.c

507

if (!sanity_fence_failed(xe, fence, "Blit copy from sysmem to vram", test)) {

drivers/gpu/drm/xe/tests/xe_migrate.c

512

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

532

fence = blt_copy(tile, vram_bo, ccs_bo,

drivers/gpu/drm/xe/tests/xe_migrate.c

534

if (!sanity_fence_failed(xe, fence, "Clear ccs buffer data", test)) {

drivers/gpu/drm/xe/tests/xe_migrate.c

54

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/tests/xe_migrate.c

541

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

57

if (sanity_fence_failed(xe, fence, str, test))

drivers/gpu/drm/xe/tests/xe_migrate.c

571

fence = blt_copy(tile, vram_bo, ccs_bo,

drivers/gpu/drm/xe/tests/xe_migrate.c

573

if (!sanity_fence_failed(xe, fence, "Clear ccs buffer data", test)) {

drivers/gpu/drm/xe/tests/xe_migrate.c

579

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

585

struct dma_fence *fence;

drivers/gpu/drm/xe/tests/xe_migrate.c

591

fence = blt_copy(tile, sys_bo, vram_bo, false, "Blit copy from sysmem to vram", test);

drivers/gpu/drm/xe/tests/xe_migrate.c

592

if (!sanity_fence_failed(xe, fence, "Blit copy from sysmem to vram", test)) {

drivers/gpu/drm/xe/tests/xe_migrate.c

597

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

599

fence = blt_copy(tile, vram_bo, sys_bo, false, "Blit copy from vram to sysmem", test);

drivers/gpu/drm/xe/tests/xe_migrate.c

60

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

600

if (!sanity_fence_failed(xe, fence, "Blit copy from vram to sysmem", test)) {

drivers/gpu/drm/xe/tests/xe_migrate.c

606

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

610

fence = xe_migrate_clear(tile->migrate, vram_bo, vram_bo->ttm.resource,

drivers/gpu/drm/xe/tests/xe_migrate.c

612

if (sanity_fence_failed(xe, fence, "Clear vram_bo", test))

drivers/gpu/drm/xe/tests/xe_migrate.c

614

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

616

fence = blt_copy(tile, vram_bo, sys_bo,

drivers/gpu/drm/xe/tests/xe_migrate.c

618

if (!sanity_fence_failed(xe, fence, "Clear main buffer data", test)) {

drivers/gpu/drm/xe/tests/xe_migrate.c

624

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

626

fence = blt_copy(tile, vram_bo, sys_bo,

drivers/gpu/drm/xe/tests/xe_migrate.c

628

if (!sanity_fence_failed(xe, fence, "Clear ccs buffer data", test)) {

drivers/gpu/drm/xe/tests/xe_migrate.c

634

dma_fence_put(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

78

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_bb.c

140

void xe_bb_free(struct xe_bb *bb, struct dma_fence *fence)

drivers/gpu/drm/xe/xe_bb.c

145

xe_sa_bo_free(bb->bo, fence);

drivers/gpu/drm/xe/xe_bb.h

26

void xe_bb_free(struct xe_bb *bb, struct dma_fence *fence);

drivers/gpu/drm/xe/xe_bo.c

1001

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_bo.c

1011

dma_resv_add_fence(ttm_bo->base.resv, fence,

drivers/gpu/drm/xe/xe_bo.c

1016

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_bo.c

1269

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_bo.c

1281

fence = xe_migrate_copy(migrate, bo, backup, bo->ttm.resource,

drivers/gpu/drm/xe/xe_bo.c

1283

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_bo.c

1284

ret = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_bo.c

1288

dma_resv_add_fence(bo->ttm.base.resv, fence,

drivers/gpu/drm/xe/xe_bo.c

1290

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_bo.c

1419

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_bo.c

1430

fence = xe_migrate_copy(migrate, backup, bo,

drivers/gpu/drm/xe/xe_bo.c

1433

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_bo.c

1434

ret = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_bo.c

1438

dma_resv_add_fence(bo->ttm.base.resv, fence,

drivers/gpu/drm/xe/xe_bo.c

1440

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_bo.c

1544

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_bo.c

1564

DMA_RESV_USAGE_BOOKKEEP, fence) {

drivers/gpu/drm/xe/xe_bo.c

1565

if (xe_fence_is_xe_preempt(fence) &&

drivers/gpu/drm/xe/xe_bo.c

1566

!dma_fence_is_signaled(fence)) {

drivers/gpu/drm/xe/xe_bo.c

1571

fence->context,

drivers/gpu/drm/xe/xe_bo.c

670

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_bo.c

681

dma_resv_for_each_fence_unlocked(&cursor, fence)

drivers/gpu/drm/xe/xe_bo.c

682

dma_fence_enable_sw_signaling(fence);

drivers/gpu/drm/xe/xe_bo.c

849

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_bo.c

987

fence = xe_migrate_clear(migrate, bo, new_mem, flags);

drivers/gpu/drm/xe/xe_bo.c

989

fence = xe_migrate_copy(migrate, bo, bo, old_mem, new_mem,

drivers/gpu/drm/xe/xe_bo.c

992

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_bo.c

993

ret = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_bo.c

998

ret = ttm_bo_move_accel_cleanup(ttm_bo, fence, evict, true,

drivers/gpu/drm/xe/xe_exec.c

241

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_exec.c

243

fence = xe_sync_in_fence_get(syncs, num_syncs, q, vm);

drivers/gpu/drm/xe/xe_exec.c

244

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_exec.c

245

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_exec.c

250

xe_sync_entry_signal(&syncs[i], fence);

drivers/gpu/drm/xe/xe_exec.c

251

xe_exec_queue_last_fence_set(q, vm, fence);

drivers/gpu/drm/xe/xe_exec.c

252

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_exec_queue.c

1490

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_exec_queue.c

1498

fence = q->last_fence ? q->last_fence : dma_fence_get_stub();

drivers/gpu/drm/xe/xe_exec_queue.c

1499

dma_fence_get(fence);

drivers/gpu/drm/xe/xe_exec_queue.c

1500

return fence;

drivers/gpu/drm/xe/xe_exec_queue.c

1517

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_exec_queue.c

1525

fence = q->last_fence ? q->last_fence : dma_fence_get_stub();

drivers/gpu/drm/xe/xe_exec_queue.c

1526

dma_fence_get(fence);

drivers/gpu/drm/xe/xe_exec_queue.c

1527

return fence;

drivers/gpu/drm/xe/xe_exec_queue.c

1540

struct dma_fence *fence)

drivers/gpu/drm/xe/xe_exec_queue.c

1543

xe_assert(vm->xe, !dma_fence_is_container(fence));

drivers/gpu/drm/xe/xe_exec_queue.c

1546

q->last_fence = dma_fence_get(fence);

drivers/gpu/drm/xe/xe_exec_queue.c

1598

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_exec_queue.c

1611

fence = q->tlb_inval[type].last_fence ?: dma_fence_get_stub();

drivers/gpu/drm/xe/xe_exec_queue.c

1612

dma_fence_get(fence);

drivers/gpu/drm/xe/xe_exec_queue.c

1613

return fence;

drivers/gpu/drm/xe/xe_exec_queue.c

1629

struct dma_fence *fence,

drivers/gpu/drm/xe/xe_exec_queue.c

1637

xe_assert(vm->xe, !dma_fence_is_container(fence));

drivers/gpu/drm/xe/xe_exec_queue.c

1640

q->tlb_inval[type].last_fence = dma_fence_get(fence);

drivers/gpu/drm/xe/xe_exec_queue.h

140

struct dma_fence *fence);

drivers/gpu/drm/xe/xe_exec_queue.h

155

struct dma_fence *fence,

drivers/gpu/drm/xe/xe_execlist.c

319

return job->fence;

drivers/gpu/drm/xe/xe_gsc.c

100

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_gsc.c

76

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_gsc.c

96

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_gsc.c

99

timeout = dma_fence_wait_timeout(fence, false, HZ);

drivers/gpu/drm/xe/xe_gsc_submit.c

177

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_gsc_submit.c

206

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_gsc_submit.c

209

timeout = dma_fence_wait_timeout(fence, false, HZ);

drivers/gpu/drm/xe/xe_gsc_submit.c

210

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_gt.c

177

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_gt.c

185

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_gt.c

188

timeout = dma_fence_wait_timeout(fence, false, timeout_jiffies);

drivers/gpu/drm/xe/xe_gt.c

189

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

2586

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

2593

fence = xe_migrate_clear(m, bo, bo->ttm.resource, XE_MIGRATE_CLEAR_FLAG_FULL);

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

2594

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

2595

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

2596

} else if (!fence) {

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

2599

long ret = dma_fence_wait_timeout(fence, false, timeout);

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

2602

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

559

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

572

fence = __pf_save_restore_vram(gt, vfid,

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

575

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

576

ret = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

580

ret = dma_fence_wait_timeout(fence, false, PF_VRAM_SAVE_RESTORE_TIMEOUT);

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

581

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

642

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

660

fence = __pf_save_restore_vram(gt, vfid, vram, data->hdr.offset,

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

662

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

663

ret = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

667

ret = dma_fence_wait_timeout(fence, false, PF_VRAM_SAVE_RESTORE_TIMEOUT);

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

668

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_guc_ct.c

113

static void fast_req_dump(struct xe_guc_ct *ct, u16 fence, unsigned int slot)

drivers/gpu/drm/xe/xe_guc_ct.c

121

fence, ct->fast_req[slot].action, buf);

drivers/gpu/drm/xe/xe_guc_ct.c

124

fence, ct->fast_req[slot].action);

drivers/gpu/drm/xe/xe_guc_ct.c

127

fence, ct->fast_req[slot].action);

drivers/gpu/drm/xe/xe_guc_ct.c

131

static void fast_req_report(struct xe_guc_ct *ct, u16 fence)

drivers/gpu/drm/xe/xe_guc_ct.c

140

if (ct->fast_req[n].fence < fence_min)

drivers/gpu/drm/xe/xe_guc_ct.c

141

fence_min = ct->fast_req[n].fence;

drivers/gpu/drm/xe/xe_guc_ct.c

142

if (ct->fast_req[n].fence > fence_max)

drivers/gpu/drm/xe/xe_guc_ct.c

143

fence_max = ct->fast_req[n].fence;

drivers/gpu/drm/xe/xe_guc_ct.c

145

if (ct->fast_req[n].fence != fence)

drivers/gpu/drm/xe/xe_guc_ct.c

1450

u32 fence = FIELD_GET(GUC_CTB_MSG_0_FENCE, msg[0]);

drivers/gpu/drm/xe/xe_guc_ct.c

1464

if (fence & CT_SEQNO_UNTRACKED) {

drivers/gpu/drm/xe/xe_guc_ct.c

1467

fence,

drivers/gpu/drm/xe/xe_guc_ct.c

1472

type, fence);

drivers/gpu/drm/xe/xe_guc_ct.c

1474

fast_req_report(ct, fence);

drivers/gpu/drm/xe/xe_guc_ct.c

148

return fast_req_dump(ct, fence, n);

drivers/gpu/drm/xe/xe_guc_ct.c

1485

g2h_fence = xa_erase(&ct->fence_lookup, fence);

drivers/gpu/drm/xe/xe_guc_ct.c

1489

xe_gt_warn(gt, "G2H fence (%u) not found!\n", fence);

drivers/gpu/drm/xe/xe_guc_ct.c

1494

xe_gt_assert(gt, fence == g2h_fence->seqno);

drivers/gpu/drm/xe/xe_guc_ct.c

152

fence, fence_min, fence_max, ct->fence_seqno);

drivers/gpu/drm/xe/xe_guc_ct.c

155

static void fast_req_track(struct xe_guc_ct *ct, u16 fence, u16 action)

drivers/gpu/drm/xe/xe_guc_ct.c

157

unsigned int slot = fence % ARRAY_SIZE(ct->fast_req);

drivers/gpu/drm/xe/xe_guc_ct.c

160

ct->fast_req[slot].fence = fence;

drivers/gpu/drm/xe/xe_guc_ct.c

171

static void fast_req_report(struct xe_guc_ct *ct, u16 fence) { }

drivers/gpu/drm/xe/xe_guc_ct.c

172

static void fast_req_track(struct xe_guc_ct *ct, u16 fence, u16 action) { }

drivers/gpu/drm/xe/xe_guc_ct_types.h

112

u16 fence;

drivers/gpu/drm/xe/xe_guc_submit.c

1194

return job->fence;

drivers/gpu/drm/xe/xe_guc_submit.c

1462

if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags) ||

drivers/gpu/drm/xe/xe_hw_engine_group.c

265

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_hw_engine_group.c

275

fence = xe_exec_queue_last_fence_get_for_resume(q, q->vm);

drivers/gpu/drm/xe/xe_hw_engine_group.c

276

timeout = dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_hw_engine_group.c

277

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_hw_fence.c

123

static struct xe_hw_fence *to_xe_hw_fence(struct dma_fence *fence);

drivers/gpu/drm/xe/xe_hw_fence.c

125

static struct xe_hw_fence_irq *xe_hw_fence_irq(struct xe_hw_fence *fence)

drivers/gpu/drm/xe/xe_hw_fence.c

127

return container_of(fence->dma.lock, struct xe_hw_fence_irq, lock);

drivers/gpu/drm/xe/xe_hw_fence.c

132

struct xe_hw_fence *fence = to_xe_hw_fence(dma_fence);

drivers/gpu/drm/xe/xe_hw_fence.c

134

return dev_name(fence->xe->drm.dev);

drivers/gpu/drm/xe/xe_hw_fence.c

139

struct xe_hw_fence *fence = to_xe_hw_fence(dma_fence);

drivers/gpu/drm/xe/xe_hw_fence.c

141

return fence->name;

drivers/gpu/drm/xe/xe_hw_fence.c

146

struct xe_hw_fence *fence = to_xe_hw_fence(dma_fence);

drivers/gpu/drm/xe/xe_hw_fence.c

147

struct xe_device *xe = fence->xe;

drivers/gpu/drm/xe/xe_hw_fence.c

148

u32 seqno = xe_map_rd(xe, &fence->seqno_map, 0, u32);

drivers/gpu/drm/xe/xe_hw_fence.c

156

struct xe_hw_fence *fence = to_xe_hw_fence(dma_fence);

drivers/gpu/drm/xe/xe_hw_fence.c

157

struct xe_hw_fence_irq *irq = xe_hw_fence_irq(fence);

drivers/gpu/drm/xe/xe_hw_fence.c

160

list_add_tail(&fence->irq_link, &irq->pending);

drivers/gpu/drm/xe/xe_hw_fence.c

171

struct xe_hw_fence *fence = to_xe_hw_fence(dma_fence);

drivers/gpu/drm/xe/xe_hw_fence.c

173

XE_WARN_ON(!list_empty(&fence->irq_link));

drivers/gpu/drm/xe/xe_hw_fence.c

185

static struct xe_hw_fence *to_xe_hw_fence(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_hw_fence.c

187

if (XE_WARN_ON(fence->ops != &xe_hw_fence_ops))

drivers/gpu/drm/xe/xe_hw_fence.c

190

return container_of(fence, struct xe_hw_fence, dma);

drivers/gpu/drm/xe/xe_hw_fence.c

218

void xe_hw_fence_free(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_hw_fence.c

220

fence_free(&fence->rcu);

drivers/gpu/drm/xe/xe_hw_fence.c

233

void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx,

drivers/gpu/drm/xe/xe_hw_fence.c

237

container_of(fence, typeof(*hw_fence), dma);

drivers/gpu/drm/xe/xe_hw_fence.c

244

dma_fence_init(fence, &xe_hw_fence_ops, &ctx->irq->lock,

drivers/gpu/drm/xe/xe_hw_fence.c

43

struct xe_hw_fence *fence =

drivers/gpu/drm/xe/xe_hw_fence.c

46

if (!WARN_ON_ONCE(!fence))

drivers/gpu/drm/xe/xe_hw_fence.c

47

kmem_cache_free(xe_hw_fence_slab, fence);

drivers/gpu/drm/xe/xe_hw_fence.c

53

struct xe_hw_fence *fence, *next;

drivers/gpu/drm/xe/xe_hw_fence.c

59

list_for_each_entry_safe(fence, next, &irq->pending, irq_link) {

drivers/gpu/drm/xe/xe_hw_fence.c

60

struct dma_fence *dma_fence = &fence->dma;

drivers/gpu/drm/xe/xe_hw_fence.c

62

trace_xe_hw_fence_try_signal(fence);

drivers/gpu/drm/xe/xe_hw_fence.c

64

trace_xe_hw_fence_signal(fence);

drivers/gpu/drm/xe/xe_hw_fence.c

65

list_del_init(&fence->irq_link);

drivers/gpu/drm/xe/xe_hw_fence.c

84

struct xe_hw_fence *fence, *next;

drivers/gpu/drm/xe/xe_hw_fence.c

91

list_for_each_entry_safe(fence, next, &irq->pending, irq_link) {

drivers/gpu/drm/xe/xe_hw_fence.c

92

list_del_init(&fence->irq_link);

drivers/gpu/drm/xe/xe_hw_fence.c

93

XE_WARN_ON(dma_fence_check_and_signal_locked(&fence->dma));

drivers/gpu/drm/xe/xe_hw_fence.c

94

dma_fence_put(&fence->dma);

drivers/gpu/drm/xe/xe_hw_fence.h

27

void xe_hw_fence_free(struct dma_fence *fence);

drivers/gpu/drm/xe/xe_hw_fence.h

29

void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx,

drivers/gpu/drm/xe/xe_lmtt.c

241

struct xe_tlb_inval_fence *fence = fences;

drivers/gpu/drm/xe/xe_lmtt.c

249

xe_tlb_inval_fence_init(&gt->tlb_inval, fence, true);

drivers/gpu/drm/xe/xe_lmtt.c

250

err = xe_tlb_inval_all(&gt->tlb_inval, fence);

drivers/gpu/drm/xe/xe_lmtt.c

252

fence++;

drivers/gpu/drm/xe/xe_lmtt.c

255

lmtt_debug(lmtt, "num_fences=%d err=%d\n", (int)(fence - fences), result);

drivers/gpu/drm/xe/xe_lmtt.c

262

fence = fences;

drivers/gpu/drm/xe/xe_lmtt.c

264

xe_tlb_inval_fence_wait(fence++);

drivers/gpu/drm/xe/xe_lrc.c

1781

void xe_lrc_free_seqno_fence(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_lrc.c

1783

xe_hw_fence_free(fence);

drivers/gpu/drm/xe/xe_lrc.c

1795

void xe_lrc_init_seqno_fence(struct xe_lrc *lrc, struct dma_fence *fence)

drivers/gpu/drm/xe/xe_lrc.c

1797

xe_hw_fence_init(fence, &lrc->fence_ctx, __xe_lrc_seqno_map(lrc));

drivers/gpu/drm/xe/xe_lrc.h

121

void xe_lrc_free_seqno_fence(struct dma_fence *fence);

drivers/gpu/drm/xe/xe_lrc.h

122

void xe_lrc_init_seqno_fence(struct xe_lrc *lrc, struct dma_fence *fence);

drivers/gpu/drm/xe/xe_migrate.c

1001

if (!fence) {

drivers/gpu/drm/xe/xe_migrate.c

1013

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_migrate.c

1014

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_migrate.c

1017

dma_fence_put(m->fence);

drivers/gpu/drm/xe/xe_migrate.c

1018

m->fence = dma_fence_get(fence);

drivers/gpu/drm/xe/xe_migrate.c

1022

xe_bb_free(bb, fence);

drivers/gpu/drm/xe/xe_migrate.c

1033

if (fence) {

drivers/gpu/drm/xe/xe_migrate.c

1034

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_migrate.c

1035

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_migrate.c

1041

return fence;

drivers/gpu/drm/xe/xe_migrate.c

109

dma_fence_put(m->fence);

drivers/gpu/drm/xe/xe_migrate.c

1292

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_migrate.c

1374

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_migrate.c

1375

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_migrate.c

1378

dma_fence_put(m->fence);

drivers/gpu/drm/xe/xe_migrate.c

1379

m->fence = dma_fence_get(fence);

drivers/gpu/drm/xe/xe_migrate.c

1382

xe_bb_free(bb, fence);

drivers/gpu/drm/xe/xe_migrate.c

1386

return fence;

drivers/gpu/drm/xe/xe_migrate.c

1512

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_migrate.c

1597

if (!fence) {

drivers/gpu/drm/xe/xe_migrate.c

1612

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_migrate.c

1613

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_migrate.c

1616

dma_fence_put(m->fence);

drivers/gpu/drm/xe/xe_migrate.c

1617

m->fence = dma_fence_get(fence);

drivers/gpu/drm/xe/xe_migrate.c

1621

xe_bb_free(bb, fence);

drivers/gpu/drm/xe/xe_migrate.c

1630

if (fence) {

drivers/gpu/drm/xe/xe_migrate.c

1631

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_migrate.c

1632

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_migrate.c

1641

return fence;

drivers/gpu/drm/xe/xe_migrate.c

1768

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_migrate.c

1932

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_migrate.c

1938

xe_bb_free(bb, fence);

drivers/gpu/drm/xe/xe_migrate.c

1939

drm_suballoc_free(sa_bo, fence);

drivers/gpu/drm/xe/xe_migrate.c

1941

return fence;

drivers/gpu/drm/xe/xe_migrate.c

1975

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_migrate.c

1977

fence = xe_migrate_update_pgtables_cpu(m, pt_update);

drivers/gpu/drm/xe/xe_migrate.c

1980

if (!IS_ERR(fence) || PTR_ERR(fence) != -ETIME)

drivers/gpu/drm/xe/xe_migrate.c

1981

return fence;

drivers/gpu/drm/xe/xe_migrate.c

1996

if (m->fence)

drivers/gpu/drm/xe/xe_migrate.c

1997

dma_fence_wait(m->fence, false);

drivers/gpu/drm/xe/xe_migrate.c

2125

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_migrate.c

2218

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_migrate.c

2221

dma_fence_put(m->fence);

drivers/gpu/drm/xe/xe_migrate.c

2222

m->fence = dma_fence_get(fence);

drivers/gpu/drm/xe/xe_migrate.c

2225

xe_bb_free(bb, fence);

drivers/gpu/drm/xe/xe_migrate.c

2227

return fence;

drivers/gpu/drm/xe/xe_migrate.c

2363

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_migrate.c

2460

if (fence) {

drivers/gpu/drm/xe/xe_migrate.c

2461

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_migrate.c

2462

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_migrate.c

2464

fence = __fence;

drivers/gpu/drm/xe/xe_migrate.c

2468

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_migrate.c

2469

fence = __fence;

drivers/gpu/drm/xe/xe_migrate.c

2479

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_migrate.c

2480

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_migrate.c

2484

return IS_ERR(fence) ? PTR_ERR(fence) : 0;

drivers/gpu/drm/xe/xe_migrate.c

74

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_migrate.c

867

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_oa.c

1012

fence = xe_oa_submit_bb(stream, XE_OA_SUBMIT_ADD_DEPS, oa_bo->bb);

drivers/gpu/drm/xe/xe_oa.c

1013

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_oa.c

1014

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_oa.c

1033

xe_oa_update_last_fence(stream, fence);

drivers/gpu/drm/xe/xe_oa.c

1036

err = dma_fence_add_callback(fence, &ofence->cb, xe_oa_config_cb);

drivers/gpu/drm/xe/xe_oa.c

1039

xe_oa_config_cb(fence, &ofence->cb);

drivers/gpu/drm/xe/xe_oa.c

634

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_oa.c

656

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_oa.c

661

return fence;

drivers/gpu/drm/xe/xe_oa.c

716

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_oa.c

728

fence = xe_oa_submit_bb(stream, XE_OA_SUBMIT_NO_DEPS, bb);

drivers/gpu/drm/xe/xe_oa.c

729

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_oa.c

730

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_oa.c

733

xe_bb_free(bb, fence);

drivers/gpu/drm/xe/xe_oa.c

734

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_oa.c

948

static void xe_oa_update_last_fence(struct xe_oa_stream *stream, struct dma_fence *fence)

drivers/gpu/drm/xe/xe_oa.c

951

stream->last_fence = dma_fence_get(fence);

drivers/gpu/drm/xe/xe_oa.c

963

static void xe_oa_config_cb(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/xe/xe_oa.c

973

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_oa.c

976

static const char *xe_oa_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_oa.c

981

static const char *xe_oa_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_oa.c

997

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_page_reclaim.c

61

struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_page_reclaim.c

80

xe_sa_bo_free(prl_sa, &fence->base);

drivers/gpu/drm/xe/xe_page_reclaim.h

77

struct xe_tlb_inval_fence *fence);

drivers/gpu/drm/xe/xe_pagefault.c

116

fence = xe_vma_rebind(vm, vma, BIT(tile->id));

drivers/gpu/drm/xe/xe_pagefault.c

118

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_pagefault.c

119

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_pagefault.c

125

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_pagefault.c

126

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_pagefault.c

73

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_preempt_fence.c

181

bool xe_fence_is_xe_preempt(const struct dma_fence *fence)

drivers/gpu/drm/xe/xe_preempt_fence.c

183

return fence->ops == &preempt_fence_ops;

drivers/gpu/drm/xe/xe_preempt_fence.c

59

preempt_fence_get_driver_name(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_preempt_fence.c

65

preempt_fence_get_timeline_name(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_preempt_fence.c

70

static bool preempt_fence_enable_signaling(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_preempt_fence.c

73

container_of(fence, typeof(*pfence), base);

drivers/gpu/drm/xe/xe_preempt_fence.h

26

to_preempt_fence(struct dma_fence *fence)

drivers/gpu/drm/xe/xe_preempt_fence.h

28

return container_of(fence, struct xe_preempt_fence, base);

drivers/gpu/drm/xe/xe_preempt_fence.h

60

bool xe_fence_is_xe_preempt(const struct dma_fence *fence);

drivers/gpu/drm/xe/xe_pt.c

1207

struct dma_fence *fence = syncs[i].fence;

drivers/gpu/drm/xe/xe_pt.c

1209

if (fence && !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,

drivers/gpu/drm/xe/xe_pt.c

1210

&fence->flags))

drivers/gpu/drm/xe/xe_pt.c

1290

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_pt.c

1314

fence = rtfence->fence;

drivers/gpu/drm/xe/xe_pt.c

1316

if (!dma_fence_is_signaled(fence)) {

drivers/gpu/drm/xe/xe_pt.c

1324

dma_fence_get(fence);

drivers/gpu/drm/xe/xe_pt.c

1325

err = drm_sched_job_add_dependency(&job->drm, fence);

drivers/gpu/drm/xe/xe_pt.c

2322

struct xe_vma *vma, struct dma_fence *fence,

drivers/gpu/drm/xe/xe_pt.c

2328

dma_resv_add_fence(xe_vma_bo(vma)->ttm.base.resv, fence,

drivers/gpu/drm/xe/xe_pt.c

2364

struct xe_vma *vma, struct dma_fence *fence,

drivers/gpu/drm/xe/xe_pt.c

2370

dma_resv_add_fence(xe_vma_bo(vma)->ttm.base.resv, fence,

drivers/gpu/drm/xe/xe_pt.c

2408

struct xe_vma_op *op, struct dma_fence *fence,

drivers/gpu/drm/xe/xe_pt.c

2419

bind_op_commit(vm, tile, pt_update_ops, op->map.vma, fence,

drivers/gpu/drm/xe/xe_pt.c

2429

unbind_op_commit(vm, tile, pt_update_ops, old, fence, fence2);

drivers/gpu/drm/xe/xe_pt.c

2433

fence, fence2, false);

drivers/gpu/drm/xe/xe_pt.c

2436

fence, fence2, false);

drivers/gpu/drm/xe/xe_pt.c

2444

unbind_op_commit(vm, tile, pt_update_ops, vma, fence,

drivers/gpu/drm/xe/xe_pt.c

2459

bind_op_commit(vm, tile, pt_update_ops, vma, fence,

drivers/gpu/drm/xe/xe_pt.c

2524

struct dma_fence *fence, *ifence = NULL, *mfence = NULL;

drivers/gpu/drm/xe/xe_pt.c

2601

fence = xe_migrate_update_pgtables(tile->migrate, &update);

drivers/gpu/drm/xe/xe_pt.c

2602

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_pt.c

2603

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_pt.c

2619

pt_update_ops->last, fence))

drivers/gpu/drm/xe/xe_pt.c

2620

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_pt.c

2623

ifence = xe_tlb_inval_job_push(ijob, tile->migrate, fence);

drivers/gpu/drm/xe/xe_pt.c

2625

mfence = xe_tlb_inval_job_push(mjob, tile->migrate, fence);

drivers/gpu/drm/xe/xe_pt.c

2628

dma_resv_add_fence(xe_vm_resv(vm), fence,

drivers/gpu/drm/xe/xe_pt.c

2634

op_commit(vops->vm, tile, pt_update_ops, op, fence, NULL);

drivers/gpu/drm/xe/xe_pt.c

2667

xe_exec_queue_last_fence_set(q, vm, fence);

drivers/gpu/drm/xe/xe_pt.c

2674

return fence;

drivers/gpu/drm/xe/xe_pxp_submit.c

133

fence = xe_vm_bind_kernel_bo(vm, bo, NULL, 0, XE_CACHE_WB);

drivers/gpu/drm/xe/xe_pxp_submit.c

134

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_pxp_submit.c

135

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_pxp_submit.c

139

timeout = dma_fence_wait_timeout(fence, false, HZ);

drivers/gpu/drm/xe/xe_pxp_submit.c

140

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_pxp_submit.c

305

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_pxp_submit.c

319

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_pxp_submit.c

322

timeout = dma_fence_wait_timeout(fence, false, HZ);

drivers/gpu/drm/xe/xe_pxp_submit.c

324

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_pxp_submit.c

372

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_pxp_submit.c

382

fence = dma_fence_get(&job->drm.s_fence->finished);

drivers/gpu/drm/xe/xe_pxp_submit.c

385

timeout = dma_fence_wait_timeout(fence, false, HZ);

drivers/gpu/drm/xe/xe_pxp_submit.c

386

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_pxp_submit.c

97

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_range_fence.c

21

xe_range_fence_signal_notify(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/xe/xe_range_fence.c

36

dma_fence_put(rfence->fence);

drivers/gpu/drm/xe/xe_range_fence.c

57

u64 start, u64 last, struct dma_fence *fence)

drivers/gpu/drm/xe/xe_range_fence.c

63

if (dma_fence_is_signaled(fence))

drivers/gpu/drm/xe/xe_range_fence.c

70

rfence->fence = dma_fence_get(fence);

drivers/gpu/drm/xe/xe_range_fence.c

71

err = dma_fence_add_callback(fence, &rfence->cb,

drivers/gpu/drm/xe/xe_range_fence.c

74

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_range_fence.c

97

if (dma_fence_remove_callback(rfence->fence, &rfence->cb))

drivers/gpu/drm/xe/xe_range_fence.h

35

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_range_fence.h

73

struct dma_fence *fence);

drivers/gpu/drm/xe/xe_sa.c

213

struct dma_fence *fence)

drivers/gpu/drm/xe/xe_sa.c

215

drm_suballoc_free(sa_bo, fence);

drivers/gpu/drm/xe/xe_sa.h

43

void xe_sa_bo_free(struct drm_suballoc *sa_bo, struct dma_fence *fence);

drivers/gpu/drm/xe/xe_sched_job.c

123

struct dma_fence *fence = xe_lrc_alloc_seqno_fence();

drivers/gpu/drm/xe/xe_sched_job.c

126

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_sched_job.c

127

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_sched_job.c

130

job->ptrs[i].lrc_fence = fence;

drivers/gpu/drm/xe/xe_sched_job.c

179

dma_fence_put(job->fence);

drivers/gpu/drm/xe/xe_sched_job.c

188

static bool xe_fence_set_error(struct dma_fence *fence, int error)

drivers/gpu/drm/xe/xe_sched_job.c

193

spin_lock_irqsave(fence->lock, irq_flags);

drivers/gpu/drm/xe/xe_sched_job.c

194

signaled = test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags);

drivers/gpu/drm/xe/xe_sched_job.c

196

dma_fence_set_error(fence, error);

drivers/gpu/drm/xe/xe_sched_job.c

197

spin_unlock_irqrestore(fence->lock, irq_flags);

drivers/gpu/drm/xe/xe_sched_job.c

204

if (xe_fence_set_error(job->fence, error))

drivers/gpu/drm/xe/xe_sched_job.c

207

if (dma_fence_is_chain(job->fence)) {

drivers/gpu/drm/xe/xe_sched_job.c

210

dma_fence_chain_for_each(iter, job->fence)

drivers/gpu/drm/xe/xe_sched_job.c

217

dma_fence_enable_sw_signaling(job->fence);

drivers/gpu/drm/xe/xe_sched_job.c

223

struct dma_fence *fence = dma_fence_chain_contained(job->fence);

drivers/gpu/drm/xe/xe_sched_job.c

226

return !__dma_fence_is_later(fence,

drivers/gpu/drm/xe/xe_sched_job.c

233

struct dma_fence *fence = dma_fence_chain_contained(job->fence);

drivers/gpu/drm/xe/xe_sched_job.c

241

return !__dma_fence_is_later(fence,

drivers/gpu/drm/xe/xe_sched_job.c

249

struct dma_fence *fence, *prev;

drivers/gpu/drm/xe/xe_sched_job.c

270

for (i = 0; i < q->width; prev = fence, ++i) {

drivers/gpu/drm/xe/xe_sched_job.c

273

fence = job->ptrs[i].lrc_fence;

drivers/gpu/drm/xe/xe_sched_job.c

274

xe_lrc_init_seqno_fence(q->lrc[i], fence);

drivers/gpu/drm/xe/xe_sched_job.c

277

job->lrc_seqno = fence->seqno;

drivers/gpu/drm/xe/xe_sched_job.c

280

xe_assert(gt_to_xe(q->gt), job->lrc_seqno == fence->seqno);

drivers/gpu/drm/xe/xe_sched_job.c

284

dma_fence_chain_init(chain, prev, fence, seqno++);

drivers/gpu/drm/xe/xe_sched_job.c

286

fence = &chain->base;

drivers/gpu/drm/xe/xe_sched_job.c

289

job->fence = dma_fence_get(fence); /* Pairs with put in scheduler */

drivers/gpu/drm/xe/xe_sched_job.h

52

return job->fence->error < 0;

drivers/gpu/drm/xe/xe_sched_job.h

72

return job->fence ? job->fence->seqno : 0;

drivers/gpu/drm/xe/xe_sched_job_types.h

48

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_svm.c

1202

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_svm.c

1314

fence = xe_vm_range_rebind(vm, vma, range, BIT(tile->id));

drivers/gpu/drm/xe/xe_svm.c

1316

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_svm.c

1318

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_svm.c

1327

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_svm.c

1328

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_svm.c

298

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_svm.c

303

fence = xe_vm_range_unbind(vm, range);

drivers/gpu/drm/xe/xe_svm.c

305

if (IS_ERR(fence))

drivers/gpu/drm/xe/xe_svm.c

306

return PTR_ERR(fence);

drivers/gpu/drm/xe/xe_svm.c

307

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_svm.c

542

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_svm.c

644

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_svm.c

645

fence = __fence;

drivers/gpu/drm/xe/xe_svm.c

682

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_svm.c

683

fence = __fence;

drivers/gpu/drm/xe/xe_svm.c

690

if (fence) {

drivers/gpu/drm/xe/xe_svm.c

691

dma_fence_wait(fence, false);

drivers/gpu/drm/xe/xe_svm.c

692

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_sync.c

103

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_sync.c

106

static void user_fence_cb(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/drm/xe/xe_sync.c

110

kick_ufence(ufence, fence);

drivers/gpu/drm/xe/xe_sync.c

148

sync->fence = drm_syncobj_fence_get(sync->syncobj);

drivers/gpu/drm/xe/xe_sync.c

149

if (XE_IOCTL_DBG(xe, !sync->fence)) {

drivers/gpu/drm/xe/xe_sync.c

177

sync->fence = drm_syncobj_fence_get(sync->syncobj);

drivers/gpu/drm/xe/xe_sync.c

178

if (XE_IOCTL_DBG(xe, !sync->fence)) {

drivers/gpu/drm/xe/xe_sync.c

183

err = dma_fence_chain_find_seqno(&sync->fence,

drivers/gpu/drm/xe/xe_sync.c

236

if (sync->fence)

drivers/gpu/drm/xe/xe_sync.c

238

dma_fence_get(sync->fence));

drivers/gpu/drm/xe/xe_sync.c

254

dma_fence_wait(sync->fence, true) : 0;

drivers/gpu/drm/xe/xe_sync.c

265

return sync->fence &&

drivers/gpu/drm/xe/xe_sync.c

266

!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &sync->fence->flags);

drivers/gpu/drm/xe/xe_sync.c

269

void xe_sync_entry_signal(struct xe_sync_entry *sync, struct dma_fence *fence)

drivers/gpu/drm/xe/xe_sync.c

276

fence, sync->timeline_value);

drivers/gpu/drm/xe/xe_sync.c

283

drm_syncobj_replace_fence(sync->syncobj, fence);

drivers/gpu/drm/xe/xe_sync.c

289

fence, sync->ufence_timeline_value);

drivers/gpu/drm/xe/xe_sync.c

292

fence = drm_syncobj_fence_get(sync->ufence_syncobj);

drivers/gpu/drm/xe/xe_sync.c

294

err = dma_fence_add_callback(fence, &sync->ufence->cb,

drivers/gpu/drm/xe/xe_sync.c

297

kick_ufence(sync->ufence, fence);

drivers/gpu/drm/xe/xe_sync.c

301

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_sync.c

310

dma_fence_put(sync->fence);

drivers/gpu/drm/xe/xe_sync.c

337

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_sync.c

344

if (sync[i].fence)

drivers/gpu/drm/xe/xe_sync.c

386

fence = xe_exec_queue_last_fence_get(q, vm);

drivers/gpu/drm/xe/xe_sync.c

387

return fence;

drivers/gpu/drm/xe/xe_sync.c

99

static void kick_ufence(struct xe_user_fence *ufence, struct dma_fence *fence)

drivers/gpu/drm/xe/xe_sync.h

31

struct dma_fence *fence);

drivers/gpu/drm/xe/xe_sync_types.h

19

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_tlb_inval.c

164

struct xe_tlb_inval_fence *fence, *next;

drivers/gpu/drm/xe/xe_tlb_inval.c

196

list_for_each_entry_safe(fence, next,

drivers/gpu/drm/xe/xe_tlb_inval.c

198

xe_tlb_inval_fence_signal(fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

232

static void xe_tlb_inval_fence_prep(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

234

struct xe_tlb_inval *tlb_inval = fence->tlb_inval;

drivers/gpu/drm/xe/xe_tlb_inval.c

236

fence->seqno = tlb_inval->seqno;

drivers/gpu/drm/xe/xe_tlb_inval.c

237

trace_xe_tlb_inval_fence_send(tlb_inval->xe, fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

240

fence->inval_time = ktime_get();

drivers/gpu/drm/xe/xe_tlb_inval.c

241

list_add_tail(&fence->link, &tlb_inval->pending_fences);

drivers/gpu/drm/xe/xe_tlb_inval.c

283

struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

285

return xe_tlb_inval_issue(tlb_inval, fence, tlb_inval->ops->all);

drivers/gpu/drm/xe/xe_tlb_inval.c

299

struct xe_tlb_inval_fence fence, *fence_ptr = &fence;

drivers/gpu/drm/xe/xe_tlb_inval.c

32

static void xe_tlb_inval_fence_fini(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

326

struct xe_tlb_inval_fence *fence, u64 start, u64 end,

drivers/gpu/drm/xe/xe_tlb_inval.c

329

return xe_tlb_inval_issue(tlb_inval, fence, tlb_inval->ops->ppgtt,

drivers/gpu/drm/xe/xe_tlb_inval.c

34

if (WARN_ON_ONCE(!fence->tlb_inval))

drivers/gpu/drm/xe/xe_tlb_inval.c

342

struct xe_tlb_inval_fence fence;

drivers/gpu/drm/xe/xe_tlb_inval.c

345

xe_tlb_inval_fence_init(tlb_inval, &fence, true);

drivers/gpu/drm/xe/xe_tlb_inval.c

346

xe_tlb_inval_range(tlb_inval, &fence, 0, range, vm->usm.asid, NULL);

drivers/gpu/drm/xe/xe_tlb_inval.c

347

xe_tlb_inval_fence_wait(&fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

360

struct xe_tlb_inval_fence *fence, *next;

drivers/gpu/drm/xe/xe_tlb_inval.c

37

xe_pm_runtime_put(fence->tlb_inval->xe);

drivers/gpu/drm/xe/xe_tlb_inval.c

38

fence->tlb_inval = NULL; /* fini() should be called once */

drivers/gpu/drm/xe/xe_tlb_inval.c

392

list_for_each_entry_safe(fence, next,

drivers/gpu/drm/xe/xe_tlb_inval.c

394

trace_xe_tlb_inval_fence_recv(xe, fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

396

if (!xe_tlb_inval_seqno_past(tlb_inval, fence->seqno))

drivers/gpu/drm/xe/xe_tlb_inval.c

399

xe_tlb_inval_fence_signal(fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

42

xe_tlb_inval_fence_signal(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

44

bool stack = test_bit(FENCE_STACK_BIT, &fence->base.flags);

drivers/gpu/drm/xe/xe_tlb_inval.c

440

struct xe_tlb_inval_fence *fence,

drivers/gpu/drm/xe/xe_tlb_inval.c

446

dma_fence_init(&fence->base, &inval_fence_ops, &tlb_inval->lock,

drivers/gpu/drm/xe/xe_tlb_inval.c

449

INIT_LIST_HEAD(&fence->link);

drivers/gpu/drm/xe/xe_tlb_inval.c

451

set_bit(FENCE_STACK_BIT, &fence->base.flags);

drivers/gpu/drm/xe/xe_tlb_inval.c

453

dma_fence_get(&fence->base);

drivers/gpu/drm/xe/xe_tlb_inval.c

454

fence->tlb_inval = tlb_inval;

drivers/gpu/drm/xe/xe_tlb_inval.c

46

lockdep_assert_held(&fence->tlb_inval->pending_lock);

drivers/gpu/drm/xe/xe_tlb_inval.c

48

list_del(&fence->link);

drivers/gpu/drm/xe/xe_tlb_inval.c

49

trace_xe_tlb_inval_fence_signal(fence->tlb_inval->xe, fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

50

xe_tlb_inval_fence_fini(fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

51

dma_fence_signal(&fence->base);

drivers/gpu/drm/xe/xe_tlb_inval.c

53

dma_fence_put(&fence->base);

drivers/gpu/drm/xe/xe_tlb_inval.c

57

xe_tlb_inval_fence_signal_unlocked(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

59

struct xe_tlb_inval *tlb_inval = fence->tlb_inval;

drivers/gpu/drm/xe/xe_tlb_inval.c

62

xe_tlb_inval_fence_signal(fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

71

struct xe_tlb_inval_fence *fence, *next;

drivers/gpu/drm/xe/xe_tlb_inval.c

77

list_for_each_entry_safe(fence, next,

drivers/gpu/drm/xe/xe_tlb_inval.c

80

fence->inval_time);

drivers/gpu/drm/xe/xe_tlb_inval.c

85

trace_xe_tlb_inval_fence_timeout(xe, fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

88

fence->seqno, tlb_inval->seqno_recv);

drivers/gpu/drm/xe/xe_tlb_inval.c

90

fence->base.error = -ETIME;

drivers/gpu/drm/xe/xe_tlb_inval.c

91

xe_tlb_inval_fence_signal(fence);

drivers/gpu/drm/xe/xe_tlb_inval.h

21

struct xe_tlb_inval_fence *fence);

drivers/gpu/drm/xe/xe_tlb_inval.h

25

struct xe_tlb_inval_fence *fence,

drivers/gpu/drm/xe/xe_tlb_inval.h

29

struct xe_tlb_inval_fence *fence,

drivers/gpu/drm/xe/xe_tlb_inval.h

39

xe_tlb_inval_fence_wait(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.h

41

dma_fence_wait(&fence->base, false);

drivers/gpu/drm/xe/xe_tlb_inval_job.c

133

job->fence = &ifence->base;

drivers/gpu/drm/xe/xe_tlb_inval_job.c

179

container_of(job->fence, typeof(*ifence), base);

drivers/gpu/drm/xe/xe_tlb_inval_job.c

191

dma_fence_put(job->fence);

drivers/gpu/drm/xe/xe_tlb_inval_job.c

235

struct dma_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval_job.c

238

container_of(job->fence, typeof(*ifence), base);

drivers/gpu/drm/xe/xe_tlb_inval_job.c

240

if (!dma_fence_is_signaled(fence)) {

drivers/gpu/drm/xe/xe_tlb_inval_job.c

252

dma_fence_get(fence); /* ref released once dependency processed by scheduler */

drivers/gpu/drm/xe/xe_tlb_inval_job.c

253

ptr = xa_store(&job->dep.drm.dependencies, 0, fence,

drivers/gpu/drm/xe/xe_tlb_inval_job.c

270

dma_fence_get(job->fence); /* Pairs with put in DRM scheduler */

drivers/gpu/drm/xe/xe_tlb_inval_job.c

37

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_tlb_inval_job.c

53

container_of(job->fence, typeof(*ifence), base);

drivers/gpu/drm/xe/xe_tlb_inval_job.c

65

return job->fence;

drivers/gpu/drm/xe/xe_tlb_inval_job.h

32

struct dma_fence *fence);

drivers/gpu/drm/xe/xe_trace.h

244

__field(struct dma_fence *, fence)

drivers/gpu/drm/xe/xe_trace.h

257

__entry->error = job->fence ? job->fence->error : 0;

drivers/gpu/drm/xe/xe_trace.h

258

__entry->fence = job->fence;

drivers/gpu/drm/xe/xe_trace.h

263

__get_str(dev), __entry->fence, __entry->seqno,

drivers/gpu/drm/xe/xe_trace.h

30

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

31

TP_ARGS(xe, fence),

drivers/gpu/drm/xe/xe_trace.h

339

TP_PROTO(struct xe_hw_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

340

TP_ARGS(fence),

drivers/gpu/drm/xe/xe_trace.h

343

__string(dev, __dev_name_xe(fence->xe))

drivers/gpu/drm/xe/xe_trace.h

346

__field(struct xe_hw_fence *, fence)

drivers/gpu/drm/xe/xe_trace.h

35

__field(struct xe_tlb_inval_fence *, fence)

drivers/gpu/drm/xe/xe_trace.h

351

__entry->ctx = fence->dma.context;

drivers/gpu/drm/xe/xe_trace.h

352

__entry->seqno = fence->dma.seqno;

drivers/gpu/drm/xe/xe_trace.h

353

__entry->fence = fence;

drivers/gpu/drm/xe/xe_trace.h

357

__get_str(dev), __entry->ctx, __entry->fence, __entry->seqno)

drivers/gpu/drm/xe/xe_trace.h

361

TP_PROTO(struct xe_hw_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

362

TP_ARGS(fence)

drivers/gpu/drm/xe/xe_trace.h

366

TP_PROTO(struct xe_hw_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

367

TP_ARGS(fence)

drivers/gpu/drm/xe/xe_trace.h

371

TP_PROTO(struct xe_hw_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

372

TP_ARGS(fence)

drivers/gpu/drm/xe/xe_trace.h

41

__entry->fence = fence;

drivers/gpu/drm/xe/xe_trace.h

42

__entry->seqno = fence->seqno;

drivers/gpu/drm/xe/xe_trace.h

46

__get_str(dev), __entry->fence, __entry->seqno)

drivers/gpu/drm/xe/xe_trace.h

50

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

51

TP_ARGS(xe, fence)

drivers/gpu/drm/xe/xe_trace.h

55

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

56

TP_ARGS(xe, fence)

drivers/gpu/drm/xe/xe_trace.h

60

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

61

TP_ARGS(xe, fence)

drivers/gpu/drm/xe/xe_trace.h

65

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

66

TP_ARGS(xe, fence)

drivers/gpu/drm/xe/xe_userptr.c

108

dma_resv_for_each_fence_unlocked(&cursor, fence)

drivers/gpu/drm/xe/xe_userptr.c

109

dma_fence_enable_sw_signaling(fence);

drivers/gpu/drm/xe/xe_userptr.c

81

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_vm.c

1109

static void vma_destroy_cb(struct dma_fence *fence,

drivers/gpu/drm/xe/xe_vm.c

1118

static void xe_vma_destroy(struct xe_vma *vma, struct dma_fence *fence)

drivers/gpu/drm/xe/xe_vm.c

1135

if (fence) {

drivers/gpu/drm/xe/xe_vm.c

1136

int ret = dma_fence_add_callback(fence, &vma->destroy_cb,

drivers/gpu/drm/xe/xe_vm.c

161

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_vm.c

166

fence = xe_preempt_fence_arm(to_preempt_fence_from_link(link),

drivers/gpu/drm/xe/xe_vm.c

170

q->lr.pfence = fence;

drivers/gpu/drm/xe/xe_vm.c

3160

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_vm.c

3180

fence = ERR_PTR(-ENOMEM);

drivers/gpu/drm/xe/xe_vm.c

3186

fence = ERR_PTR(-ENOMEM);

drivers/gpu/drm/xe/xe_vm.c

3196

fence = ERR_PTR(err);

drivers/gpu/drm/xe/xe_vm.c

3206

fence = NULL;

drivers/gpu/drm/xe/xe_vm.c

3210

fence = xe_pt_update_ops_run(tile, vops);

drivers/gpu/drm/xe/xe_vm.c

3211

if (IS_ERR(fence))

drivers/gpu/drm/xe/xe_vm.c

3215

fences[current_fence++] = fence ?: dma_fence_get_stub();

drivers/gpu/drm/xe/xe_vm.c

3229

fence = &cf->base;

drivers/gpu/drm/xe/xe_vm.c

3238

return fence;

drivers/gpu/drm/xe/xe_vm.c

3254

return fence;

drivers/gpu/drm/xe/xe_vm.c

3289

struct dma_fence *fence)

drivers/gpu/drm/xe/xe_vm.c

3301

xe_vma_destroy(gpuva_to_vma(op->base.unmap.va), fence);

drivers/gpu/drm/xe/xe_vm.c

3304

fence);

drivers/gpu/drm/xe/xe_vm.c

3308

if (fence) {

drivers/gpu/drm/xe/xe_vm.c

3310

xe_sync_entry_signal(vops->syncs + i, fence);

drivers/gpu/drm/xe/xe_vm.c

3319

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_vm.c

3336

fence = ops_execute(vm, vops);

drivers/gpu/drm/xe/xe_vm.c

3338

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_vm.c

3339

if (PTR_ERR(fence) == -ENODATA)

drivers/gpu/drm/xe/xe_vm.c

3341

return fence;

drivers/gpu/drm/xe/xe_vm.c

3344

vm_bind_ioctl_ops_fini(vm, vops, fence);

drivers/gpu/drm/xe/xe_vm.c

3347

return err ? ERR_PTR(err) : fence;

drivers/gpu/drm/xe/xe_vm.c

3512

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_vm.c

3516

fence = xe_sync_in_fence_get(syncs, num_syncs,

drivers/gpu/drm/xe/xe_vm.c

3518

if (IS_ERR(fence))

drivers/gpu/drm/xe/xe_vm.c

3519

return PTR_ERR(fence);

drivers/gpu/drm/xe/xe_vm.c

3522

xe_sync_entry_signal(&syncs[i], fence);

drivers/gpu/drm/xe/xe_vm.c

3525

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_vm.c

3625

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_vm.c

3807

fence = vm_bind_ioctl_ops_execute(vm, &vops);

drivers/gpu/drm/xe/xe_vm.c

3808

if (IS_ERR(fence))

drivers/gpu/drm/xe/xe_vm.c

3809

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_vm.c

3811

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_vm.c

3867

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_vm.c

3897

fence = vm_bind_ioctl_ops_execute(vm, &vops);

drivers/gpu/drm/xe/xe_vm.c

3898

if (IS_ERR(fence))

drivers/gpu/drm/xe/xe_vm.c

3899

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_vm.c

3917

fence = ERR_PTR(err);

drivers/gpu/drm/xe/xe_vm.c

3919

return fence;

drivers/gpu/drm/xe/xe_vm.c

3970

fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];

drivers/gpu/drm/xe/xe_vm.c

3984

&fence[fence_id], true);

drivers/gpu/drm/xe/xe_vm.c

3987

&fence[fence_id], start, end,

drivers/gpu/drm/xe/xe_vm.c

3997

&fence[fence_id], true);

drivers/gpu/drm/xe/xe_vm.c

4000

&fence[fence_id], start, end,

drivers/gpu/drm/xe/xe_vm.c

4009

xe_tlb_inval_fence_wait(&fence[id]);

drivers/gpu/drm/xe/xe_vm.c

689

struct dma_fence *fence;

drivers/gpu/drm/xe/xe_vm.c

723

fence = ops_execute(vm, &vops);

drivers/gpu/drm/xe/xe_vm.c

724

if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_vm.c

725

err = PTR_ERR(fence);

drivers/gpu/drm/xe/xe_vm.c

727

dma_fence_put(fence);

drivers/gpu/drm/xe/xe_vm.c

744

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_vm.c

769

fence = ERR_PTR(err);

drivers/gpu/drm/xe/xe_vm.c

773

fence = ops_execute(vm, &vops);

drivers/gpu/drm/xe/xe_vm.c

782

return fence;

drivers/gpu/drm/xe/xe_vm.c

834

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_vm.c

860

fence = ERR_PTR(err);

drivers/gpu/drm/xe/xe_vm.c

864

fence = ops_execute(vm, &vops);

drivers/gpu/drm/xe/xe_vm.c

873

return fence;

drivers/gpu/drm/xe/xe_vm.c

916

struct dma_fence *fence = NULL;

drivers/gpu/drm/xe/xe_vm.c

943

fence = ERR_PTR(err);

drivers/gpu/drm/xe/xe_vm.c

947

fence = ops_execute(vm, &vops);

drivers/gpu/drm/xe/xe_vm.c

956

return fence;

drivers/gpu/host1x/cdma.c

142

WARN_ON(pb->pos == pb->fence);

drivers/gpu/host1x/cdma.c

158

pb->fence += slots * 8;

drivers/gpu/host1x/cdma.c

160

if (pb->fence >= pb->size)

drivers/gpu/host1x/cdma.c

161

pb->fence -= pb->size;

drivers/gpu/host1x/cdma.c

169

unsigned int fence = pb->fence;

drivers/gpu/host1x/cdma.c

171

if (pb->fence < pb->pos)

drivers/gpu/host1x/cdma.c

172

fence += pb->size;

drivers/gpu/host1x/cdma.c

174

return (fence - pb->pos) / 8;

drivers/gpu/host1x/cdma.c

85

pb->fence = pb->size - 8;

drivers/gpu/host1x/cdma.h

38

u32 fence; /* index we've written */

drivers/gpu/host1x/fence.c

128

struct host1x_syncpt_fence *fence;

drivers/gpu/host1x/fence.c

130

fence = kzalloc_obj(*fence);

drivers/gpu/host1x/fence.c

131

if (!fence)

drivers/gpu/host1x/fence.c

134

fence->sp = sp;

drivers/gpu/host1x/fence.c

135

fence->threshold = threshold;

drivers/gpu/host1x/fence.c

136

fence->timeout = timeout;

drivers/gpu/host1x/fence.c

138

dma_fence_init(&fence->base, &host1x_syncpt_fence_ops, &sp->fences.lock,

drivers/gpu/host1x/fence.c

141

INIT_DELAYED_WORK(&fence->timeout_work, do_fence_timeout);

drivers/gpu/host1x/fence.c

143

return &fence->base;

drivers/gpu/host1x/fence.h

28

void host1x_fence_signal(struct host1x_syncpt_fence *fence);

drivers/gpu/host1x/hw/channel_hw.c

216

u32 fence;

drivers/gpu/host1x/hw/channel_hw.c

253

fence = host1x_syncpt_incr_max(sp, 1);

drivers/gpu/host1x/hw/channel_hw.c

258

submit_wait(job, job->syncpt->id, fence);

drivers/gpu/host1x/hw/channel_hw.c

266

fence = host1x_syncpt_incr_max(sp, 1);

drivers/gpu/host1x/hw/channel_hw.c

271

submit_wait(job, job->syncpt->id, fence);

drivers/gpu/host1x/hw/channel_hw.c

305

static void job_complete_callback(struct dma_fence *fence, struct dma_fence_cb *cb)

drivers/gpu/host1x/hw/channel_hw.c

352

job->fence = host1x_fence_create(sp, syncval, true);

drivers/gpu/host1x/hw/channel_hw.c

353

if (WARN(IS_ERR(job->fence), "Failed to create submit complete fence")) {

drivers/gpu/host1x/hw/channel_hw.c

354

job->fence = NULL;

drivers/gpu/host1x/hw/channel_hw.c

356

err = dma_fence_add_callback(job->fence, &job->fence_cb,

drivers/gpu/host1x/intr.c

15

struct host1x_syncpt_fence *fence)

drivers/gpu/host1x/intr.c

20

if ((s32)(fence_in_list->threshold - fence->threshold) <= 0) {

drivers/gpu/host1x/intr.c

22

list_add(&fence->list, &fence_in_list->list);

drivers/gpu/host1x/intr.c

28

list_add(&fence->list, &list->list);

drivers/gpu/host1x/intr.c

33

struct host1x_syncpt_fence *fence;

drivers/gpu/host1x/intr.c

36

fence = list_first_entry(&sp->fences.list, struct host1x_syncpt_fence, list);

drivers/gpu/host1x/intr.c

38

host1x_hw_intr_set_syncpt_threshold(host, sp->id, fence->threshold);

drivers/gpu/host1x/intr.c

45

void host1x_intr_add_fence_locked(struct host1x *host, struct host1x_syncpt_fence *fence)

drivers/gpu/host1x/intr.c

47

struct host1x_fence_list *fence_list = &fence->sp->fences;

drivers/gpu/host1x/intr.c

49

INIT_LIST_HEAD(&fence->list);

drivers/gpu/host1x/intr.c

51

host1x_intr_add_fence_to_list(fence_list, fence);

drivers/gpu/host1x/intr.c

52

host1x_intr_update_hw_state(host, fence->sp);

drivers/gpu/host1x/intr.c

55

bool host1x_intr_remove_fence(struct host1x *host, struct host1x_syncpt_fence *fence)

drivers/gpu/host1x/intr.c

57

struct host1x_fence_list *fence_list = &fence->sp->fences;

drivers/gpu/host1x/intr.c

62

if (list_empty(&fence->list)) {

drivers/gpu/host1x/intr.c

67

list_del_init(&fence->list);

drivers/gpu/host1x/intr.c

68

host1x_intr_update_hw_state(host, fence->sp);

drivers/gpu/host1x/intr.c

78

struct host1x_syncpt_fence *fence, *tmp;

drivers/gpu/host1x/intr.c

85

list_for_each_entry_safe(fence, tmp, &sp->fences.list, list) {

drivers/gpu/host1x/intr.c

86

if (((value - fence->threshold) & 0x80000000U) != 0U) {

drivers/gpu/host1x/intr.c

91

list_del_init(&fence->list);

drivers/gpu/host1x/intr.c

92

host1x_fence_signal(fence);

drivers/gpu/host1x/intr.h

33

void host1x_intr_add_fence_locked(struct host1x *host, struct host1x_syncpt_fence *fence);

drivers/gpu/host1x/intr.h

35

bool host1x_intr_remove_fence(struct host1x *host, struct host1x_syncpt_fence *fence);

drivers/gpu/host1x/job.c

91

if (job->fence) {

drivers/gpu/host1x/job.c

97

dma_fence_remove_callback(job->fence, &job->fence_cb);

drivers/gpu/host1x/job.c

98

dma_fence_put(job->fence);

drivers/gpu/host1x/syncpt.c

223

struct dma_fence *fence;

drivers/gpu/host1x/syncpt.c

239

fence = host1x_fence_create(sp, thresh, false);

drivers/gpu/host1x/syncpt.c

240

if (IS_ERR(fence))

drivers/gpu/host1x/syncpt.c

241

return PTR_ERR(fence);

drivers/gpu/host1x/syncpt.c

243

wait_err = dma_fence_wait_timeout(fence, true, timeout);

drivers/gpu/host1x/syncpt.c

245

host1x_fence_cancel(fence);

drivers/gpu/host1x/syncpt.c

246

dma_fence_put(fence);

drivers/iio/buffer/industrialio-buffer-dma.c

239

iio_buffer_signal_dmabuf_done(block->fence, 0);

drivers/iio/buffer/industrialio-buffer-dma.c

272

iio_buffer_signal_dmabuf_done(block->fence,

drivers/iio/buffer/industrialio-buffer-dma.c

456

iio_buffer_signal_dmabuf_done(block->fence, ret);

drivers/iio/buffer/industrialio-buffer-dma.c

729

struct dma_fence *fence,

drivers/iio/buffer/industrialio-buffer-dma.c

748

block->fence = fence;

drivers/iio/industrialio-buffer.c

1803

iio_buffer_dma_fence_get_driver_name(struct dma_fence *fence)

drivers/iio/industrialio-buffer.c

1808

static void iio_buffer_dma_fence_release(struct dma_fence *fence)

drivers/iio/industrialio-buffer.c

1811

container_of(fence, struct iio_dma_fence, base);

drivers/iio/industrialio-buffer.c

1830

struct iio_dma_fence *fence;

drivers/iio/industrialio-buffer.c

1867

fence = kmalloc_obj(*fence);

drivers/iio/industrialio-buffer.c

1868

if (!fence) {

drivers/iio/industrialio-buffer.c

1873

fence->priv = priv;

drivers/iio/industrialio-buffer.c

1882

dma_fence_init(&fence->base, &iio_buffer_dma_fence_ops,

drivers/iio/industrialio-buffer.c

1910

dma_resv_add_fence(dmabuf->resv, &fence->base,

drivers/iio/industrialio-buffer.c

1916

ret = buffer->access->enqueue_dmabuf(buffer, priv->block, &fence->base,

drivers/iio/industrialio-buffer.c

1924

iio_buffer_signal_dmabuf_done(&fence->base, ret);

drivers/iio/industrialio-buffer.c

1941

dma_fence_put(&fence->base);

drivers/iio/industrialio-buffer.c

1952

struct iio_dma_fence *fence =

drivers/iio/industrialio-buffer.c

1954

struct iio_dmabuf_priv *priv = fence->priv;

drivers/iio/industrialio-buffer.c

1957

dma_fence_put(&fence->base);

drivers/iio/industrialio-buffer.c

1961

void iio_buffer_signal_dmabuf_done(struct dma_fence *fence, int ret)

drivers/iio/industrialio-buffer.c

1964

container_of(fence, struct iio_dma_fence, base);

drivers/iio/industrialio-buffer.c

1971

dma_fence_get(fence);

drivers/iio/industrialio-buffer.c

1973

fence->error = ret;

drivers/iio/industrialio-buffer.c

1974

dma_fence_signal(fence);

drivers/infiniband/hw/bnxt_re/ib_verbs.c

486

struct bnxt_re_fence_data *fence = &pd->fence;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

487

struct ib_mr *ib_mr = &fence->mr->ib_mr;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

488

struct bnxt_qplib_swqe *wqe = &fence->bind_wqe;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

501

wqe->bind.va = (u64)(unsigned long)fence->va;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

502

wqe->bind.length = fence->size;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

509

fence->bind_rkey = ib_inc_rkey(fence->mw->rkey);

drivers/infiniband/hw/bnxt_re/ib_verbs.c

518

struct bnxt_re_fence_data *fence = &pd->fence;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

519

struct bnxt_qplib_swqe *fence_wqe = &fence->bind_wqe;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

524

wqe.bind.r_key = fence->bind_rkey;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

525

fence->bind_rkey = ib_inc_rkey(fence->bind_rkey);

drivers/infiniband/hw/bnxt_re/ib_verbs.c

542

struct bnxt_re_fence_data *fence = &pd->fence;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

545

struct bnxt_re_mr *mr = fence->mr;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

550

if (fence->mw) {

drivers/infiniband/hw/bnxt_re/ib_verbs.c

551

bnxt_re_dealloc_mw(fence->mw);

drivers/infiniband/hw/bnxt_re/ib_verbs.c

552

fence->mw = NULL;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

561

fence->mr = NULL;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

563

if (fence->dma_addr) {

drivers/infiniband/hw/bnxt_re/ib_verbs.c

564

dma_unmap_single(dev, fence->dma_addr, BNXT_RE_FENCE_BYTES,

drivers/infiniband/hw/bnxt_re/ib_verbs.c

566

fence->dma_addr = 0;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

573

struct bnxt_re_fence_data *fence = &pd->fence;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

584

dma_addr = dma_map_single(dev, fence->va, BNXT_RE_FENCE_BYTES,

drivers/infiniband/hw/bnxt_re/ib_verbs.c

590

fence->dma_addr = 0;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

593

fence->dma_addr = dma_addr;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

601

fence->mr = mr;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

618

mr->qplib_mr.va = (u64)(unsigned long)fence->va;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

637

fence->mw = mw;

drivers/infiniband/hw/bnxt_re/ib_verbs.h

62

struct bnxt_re_fence_data fence;

drivers/infiniband/hw/mana/mana_ib.h

459

u32 fence : 1;

drivers/infiniband/hw/mana/wr.c

120

send_oob.fence = !!(wr->wr.send_flags & IB_SEND_FENCE);

drivers/infiniband/hw/mlx5/wr.c

1069

u8 fence;

drivers/infiniband/hw/mlx5/wr.c

1109

fence = dev->umr_fence;

drivers/infiniband/hw/mlx5/wr.c

1114

fence = MLX5_FENCE_MODE_SMALL_AND_FENCE;

drivers/infiniband/hw/mlx5/wr.c

1116

fence = MLX5_FENCE_MODE_FENCE;

drivers/infiniband/hw/mlx5/wr.c

1118

fence = qp->next_fence;

drivers/infiniband/hw/mlx5/wr.c

1130

&cur_edge, &idx, nreq, fence,

drivers/infiniband/hw/mlx5/wr.c

1186

nreq, fence, mlx5_ib_opcode[wr->opcode]);

drivers/infiniband/hw/mlx5/wr.c

760

u64 wr_id, int nreq, u8 fence, u32 mlx5_opcode)

drivers/infiniband/hw/mlx5/wr.c

767

ctrl->fm_ce_se |= fence;

drivers/infiniband/hw/mlx5/wr.c

848

unsigned int *idx, int nreq, u8 fence,

drivers/infiniband/hw/mlx5/wr.c

878

wr->wr_id, nreq, fence, MLX5_OPCODE_UMR);

drivers/infiniband/hw/mlx5/wr.c

910

nreq, fence, MLX5_OPCODE_UMR);

drivers/infiniband/hw/mlx5/wr.c

934

void **cur_edge, unsigned int *idx, int nreq, u8 fence,

drivers/infiniband/hw/mlx5/wr.c

967

cur_edge, idx, nreq, fence,

drivers/infiniband/hw/mlx5/wr.h

101

u64 wr_id, int nreq, u8 fence, u32 mlx5_opcode);

drivers/md/dm-vdo/indexer/radix-sort.c

272

sort_key_t *fence;

drivers/md/dm-vdo/indexer/radix-sort.c

299

for (fence = task.first_key; fence <= end; ) {

drivers/md/dm-vdo/indexer/radix-sort.c

301

sort_key_t key = *fence;

drivers/md/dm-vdo/indexer/radix-sort.c

307

while (--pile[bin = key[task.offset]] > fence)

drivers/md/dm-vdo/indexer/radix-sort.c

314

*fence = key;

drivers/md/dm-vdo/indexer/radix-sort.c

315

fence += bins->size[bin];

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c

551

bool fence)

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c

562

0, fence, TLS_OFFLOAD_CTX_DIR_TX);

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c

570

bool fence)

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c

578

mlx5e_ktls_build_progress_params(wqe, sq->pc, sq->sqn, priv_tx->tisn, fence, 0,

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c

119

u32 tis_tir_num, bool fence,

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c

134

cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c

78

bool fence, enum tls_offload_ctx_dir direction)

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c

91

cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h

83

bool fence, enum tls_offload_ctx_dir direction);

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h

87

u32 tis_tir_num, bool fence,

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c

1724

ste_attr.send_attr.fence = 1;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c

584

ste_attr.send_attr.fence = 0;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c

638

ste_attr.send_attr.fence = 0;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

1302

if (send_attr->fence)

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

159

flags |= attr->fence ? MLX5_WQE_CTRL_INITIATOR_SMALL_FENCE : 0;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

215

u8 fence = send_attr->fence;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

221

send_attr->fence = fence;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

236

send_attr->fence = fence && !ste_attr->rtc_1;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

249

send_attr->fence = fence;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

270

send_attr.fence = 0;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

37

ste_attr.send_attr.fence = 1;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

60

ste_attr.send_attr.fence = 0;

drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h

157

u8 fence;

drivers/scsi/smartpqi/smartpqi.h

286

u8 fence : 1;

drivers/scsi/smartpqi/smartpqi.h

311

u8 fence : 1;

drivers/scsi/smartpqi/smartpqi.h

342

u8 fence : 1;

drivers/scsi/smartpqi/smartpqi.h

375

u8 fence : 1;

drivers/scsi/smartpqi/smartpqi.h

480

u8 fence : 1;

drivers/usb/gadget/function/f_fs.c

1387

struct dma_fence *fence = &dma_fence->base;

drivers/usb/gadget/function/f_fs.c

1390

dma_fence_put(fence);

drivers/usb/gadget/function/f_fs.c

1396

struct dma_fence *fence = &dma_fence->base;

drivers/usb/gadget/function/f_fs.c

1399

dma_fence_get(fence);

drivers/usb/gadget/function/f_fs.c

1400

fence->error = ret;

drivers/usb/gadget/function/f_fs.c

1401

dma_fence_signal(fence);

drivers/usb/gadget/function/f_fs.c

1421

static const char *ffs_dmabuf_get_driver_name(struct dma_fence *fence)

drivers/usb/gadget/function/f_fs.c

1426

static const char *ffs_dmabuf_get_timeline_name(struct dma_fence *fence)

drivers/usb/gadget/function/f_fs.c

1431

static void ffs_dmabuf_fence_release(struct dma_fence *fence)

drivers/usb/gadget/function/f_fs.c

1434

container_of(fence, struct ffs_dma_fence, base);

drivers/usb/gadget/function/f_fs.c

1598

struct ffs_dma_fence *fence;

drivers/usb/gadget/function/f_fs.c

1655

fence = kmalloc_obj(*fence);

drivers/usb/gadget/function/f_fs.c

1656

if (!fence) {

drivers/usb/gadget/function/f_fs.c

1661

fence->priv = priv;

drivers/usb/gadget/function/f_fs.c

1684

dma_fence_init(&fence->base, &ffs_dmabuf_fence_ops,

drivers/usb/gadget/function/f_fs.c

1689

dma_resv_add_fence(dmabuf->resv, &fence->base, resv_dir);

drivers/usb/gadget/function/f_fs.c

1699

usb_req->context = fence;

drivers/usb/gadget/function/f_fs.c

1710

ffs_dmabuf_signal_done(fence, ret);

drivers/usb/gadget/function/f_fs.c

1721

dma_fence_put(&fence->base);

fs/nfsd/trace.h

2710

DEFINE_NFSD_PNFS_ERR_EVENT(fence);

fs/ocfs2/cluster/quorum.c

120

fence = 1;

fs/ocfs2/cluster/quorum.c

134

fence = 1;

fs/ocfs2/cluster/quorum.c

143

fence = 1;

fs/ocfs2/cluster/quorum.c

148

if (fence) {

fs/ocfs2/cluster/quorum.c

93

int lowest_hb, lowest_reachable = 0, fence = 0;

include/drm/drm_file.h

131

struct dma_fence *fence;

include/drm/drm_gpuvm.h

613

struct dma_fence *fence,

include/drm/drm_gpuvm.h

628

struct dma_fence *fence,

include/drm/drm_gpuvm.h

632

drm_gpuvm_resv_add_fence(vm_exec->vm, &vm_exec->exec, fence,

include/drm/drm_plane.h

85

struct dma_fence *fence;

include/drm/drm_suballoc.h

48

struct dma_fence *fence;

include/drm/drm_suballoc.h

60

void drm_suballoc_free(struct drm_suballoc *sa, struct dma_fence *fence);

include/drm/drm_syncobj.h

109

struct dma_fence *fence;

include/drm/drm_syncobj.h

112

fence = dma_fence_get_rcu_safe(&syncobj->fence);

include/drm/drm_syncobj.h

115

return fence;

include/drm/drm_syncobj.h

122

struct dma_fence *fence,

include/drm/drm_syncobj.h

125

struct dma_fence *fence);

include/drm/drm_syncobj.h

128

struct dma_fence **fence);

include/drm/drm_syncobj.h

131

struct dma_fence *fence);

include/drm/drm_syncobj.h

51

struct dma_fence __rcu *fence;

include/drm/gpu_scheduler.h

663

struct dma_fence *fence);

include/drm/gpu_scheduler.h

675

struct dma_fence *fence);

include/drm/intel/display_parent_interface.h

136

void (*fence_priority_display)(struct dma_fence *fence);

include/drm/intel/display_parent_interface.h

75

void (*boost_if_not_started)(struct dma_fence *fence);

include/drm/ttm/ttm_bo.h

458

struct dma_fence *fence, bool evict,

include/drm/ttm/ttm_execbuf_util.h

117

struct dma_fence *fence);

include/linux/dma-fence-array.h

59

to_dma_fence_array(struct dma_fence *fence)

include/linux/dma-fence-array.h

61

if (!fence || !dma_fence_is_array(fence))

include/linux/dma-fence-array.h

64

return container_of(fence, struct dma_fence_array, base);

include/linux/dma-fence-array.h

78

#define dma_fence_array_for_each(fence, index, head) \

include/linux/dma-fence-array.h

79

for (index = 0, fence = dma_fence_array_first(head); fence; \

include/linux/dma-fence-array.h

80

++(index), fence = dma_fence_array_next(head, index))

include/linux/dma-fence-array.h

93

bool dma_fence_match_context(struct dma_fence *fence, u64 context);

include/linux/dma-fence-chain.h

124

struct dma_fence *dma_fence_chain_walk(struct dma_fence *fence);

include/linux/dma-fence-chain.h

128

struct dma_fence *fence,

include/linux/dma-fence-chain.h

29

struct dma_fence *fence;

include/linux/dma-fence-chain.h

61

to_dma_fence_chain(struct dma_fence *fence)

include/linux/dma-fence-chain.h

63

if (!fence || !dma_fence_is_chain(fence))

include/linux/dma-fence-chain.h

66

return container_of(fence, struct dma_fence_chain, base);

include/linux/dma-fence-chain.h

77

dma_fence_chain_contained(struct dma_fence *fence)

include/linux/dma-fence-chain.h

79

struct dma_fence_chain *chain = to_dma_fence_chain(fence);

include/linux/dma-fence-chain.h

81

return chain ? chain->fence : fence;

include/linux/dma-fence-unwrap.h

47

#define dma_fence_unwrap_for_each(fence, cursor, head) \

include/linux/dma-fence-unwrap.h

48

for (fence = dma_fence_unwrap_first(head, cursor); fence; \

include/linux/dma-fence-unwrap.h

49

fence = dma_fence_unwrap_next(cursor))

include/linux/dma-fence.h

108

typedef void (*dma_fence_func_t)(struct dma_fence *fence,

include/linux/dma-fence.h

138

const char * (*get_driver_name)(struct dma_fence *fence);

include/linux/dma-fence.h

150

const char * (*get_timeline_name)(struct dma_fence *fence);

include/linux/dma-fence.h

187

bool (*enable_signaling)(struct dma_fence *fence);

include/linux/dma-fence.h

204

bool (*signaled)(struct dma_fence *fence);

include/linux/dma-fence.h

222

signed long (*wait)(struct dma_fence *fence,

include/linux/dma-fence.h

233

void (*release)(struct dma_fence *fence);

include/linux/dma-fence.h

253

void (*set_deadline)(struct dma_fence *fence, ktime_t deadline);

include/linux/dma-fence.h

256

void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,

include/linux/dma-fence.h

259

void dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops,

include/linux/dma-fence.h

263

void dma_fence_free(struct dma_fence *fence);

include/linux/dma-fence.h

264

void dma_fence_describe(struct dma_fence *fence, struct seq_file *seq);

include/linux/dma-fence.h

270

static inline void dma_fence_put(struct dma_fence *fence)

include/linux/dma-fence.h

272

if (fence)

include/linux/dma-fence.h

273

kref_put(&fence->refcount, dma_fence_release);

include/linux/dma-fence.h

282

static inline struct dma_fence *dma_fence_get(struct dma_fence *fence)

include/linux/dma-fence.h

284

if (fence)

include/linux/dma-fence.h

285

kref_get(&fence->refcount);

include/linux/dma-fence.h

286

return fence;

include/linux/dma-fence.h

296

static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence)

include/linux/dma-fence.h

298

if (kref_get_unless_zero(&fence->refcount))

include/linux/dma-fence.h

299

return fence;

include/linux/dma-fence.h

324

struct dma_fence *fence;

include/linux/dma-fence.h

326

fence = rcu_dereference(*fencep);

include/linux/dma-fence.h

327

if (!fence)

include/linux/dma-fence.h

330

if (!dma_fence_get_rcu(fence))

include/linux/dma-fence.h

347

if (fence == rcu_access_pointer(*fencep))

include/linux/dma-fence.h

348

return rcu_pointer_handoff(fence);

include/linux/dma-fence.h

350

dma_fence_put(fence);

include/linux/dma-fence.h

367

void dma_fence_signal(struct dma_fence *fence);

include/linux/dma-fence.h

368

bool dma_fence_check_and_signal(struct dma_fence *fence);

include/linux/dma-fence.h

369

bool dma_fence_check_and_signal_locked(struct dma_fence *fence);

include/linux/dma-fence.h

370

void dma_fence_signal_locked(struct dma_fence *fence);

include/linux/dma-fence.h

371

void dma_fence_signal_timestamp(struct dma_fence *fence, ktime_t timestamp);

include/linux/dma-fence.h

372

void dma_fence_signal_timestamp_locked(struct dma_fence *fence, ktime_t timestamp);

include/linux/dma-fence.h

373

signed long dma_fence_default_wait(struct dma_fence *fence,

include/linux/dma-fence.h

375

int dma_fence_add_callback(struct dma_fence *fence,

include/linux/dma-fence.h

378

bool dma_fence_remove_callback(struct dma_fence *fence,

include/linux/dma-fence.h

380

void dma_fence_enable_sw_signaling(struct dma_fence *fence);

include/linux/dma-fence.h

402

const char __rcu *dma_fence_driver_name(struct dma_fence *fence);

include/linux/dma-fence.h

403

const char __rcu *dma_fence_timeline_name(struct dma_fence *fence);

include/linux/dma-fence.h

420

dma_fence_test_signaled_flag(struct dma_fence *fence)

include/linux/dma-fence.h

422

return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags);

include/linux/dma-fence.h

440

dma_fence_is_signaled_locked(struct dma_fence *fence)

include/linux/dma-fence.h

442

if (dma_fence_test_signaled_flag(fence))

include/linux/dma-fence.h

445

if (fence->ops->signaled && fence->ops->signaled(fence)) {

include/linux/dma-fence.h

446

dma_fence_signal_locked(fence);

include/linux/dma-fence.h

470

dma_fence_is_signaled(struct dma_fence *fence)

include/linux/dma-fence.h

472

if (dma_fence_test_signaled_flag(fence))

include/linux/dma-fence.h

475

if (fence->ops->signaled && fence->ops->signaled(fence)) {

include/linux/dma-fence.h

476

dma_fence_signal(fence);

include/linux/dma-fence.h

492

static inline bool __dma_fence_is_later(struct dma_fence *fence, u64 f1, u64 f2)

include/linux/dma-fence.h

498

if (test_bit(DMA_FENCE_FLAG_SEQNO64_BIT, &fence->flags))

include/linux/dma-fence.h

576

static inline int dma_fence_get_status_locked(struct dma_fence *fence)

include/linux/dma-fence.h

578

if (dma_fence_is_signaled_locked(fence))

include/linux/dma-fence.h

579

return fence->error ?: 1;

include/linux/dma-fence.h

584

int dma_fence_get_status(struct dma_fence *fence);

include/linux/dma-fence.h

603

static inline void dma_fence_set_error(struct dma_fence *fence,

include/linux/dma-fence.h

606

WARN_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags));

include/linux/dma-fence.h

609

fence->error = error;

include/linux/dma-fence.h

620

static inline ktime_t dma_fence_timestamp(struct dma_fence *fence)

include/linux/dma-fence.h

622

if (WARN_ON(!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)))

include/linux/dma-fence.h

625

while (!test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags))

include/linux/dma-fence.h

628

return fence->timestamp;

include/linux/dma-fence.h

653

static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)

include/linux/dma-fence.h

661

ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);

include/linux/dma-fence.h

666

void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline);

include/linux/dma-fence.h

681

static inline bool dma_fence_is_array(struct dma_fence *fence)

include/linux/dma-fence.h

683

return fence->ops == &dma_fence_array_ops;

include/linux/dma-fence.h

692

static inline bool dma_fence_is_chain(struct dma_fence *fence)

include/linux/dma-fence.h

694

return fence->ops == &dma_fence_chain_ops;

include/linux/dma-fence.h

705

static inline bool dma_fence_is_container(struct dma_fence *fence)

include/linux/dma-fence.h

707

return dma_fence_is_array(fence) || dma_fence_is_chain(fence);

include/linux/dma-resv.h

201

struct dma_fence *fence;

include/linux/dma-resv.h

236

cursor->fence = NULL;

include/linux/dma-resv.h

248

dma_fence_put(cursor->fence);

include/linux/dma-resv.h

289

#define dma_resv_for_each_fence_unlocked(cursor, fence) \

include/linux/dma-resv.h

290

for (fence = dma_resv_iter_first_unlocked(cursor); \

include/linux/dma-resv.h

291

fence; fence = dma_resv_iter_next_unlocked(cursor))

include/linux/dma-resv.h

306

#define dma_resv_for_each_fence(cursor, obj, usage, fence) \

include/linux/dma-resv.h

308

fence = dma_resv_iter_first(cursor); fence; \

include/linux/dma-resv.h

309

fence = dma_resv_iter_next(cursor))

include/linux/dma-resv.h

470

void dma_resv_add_fence(struct dma_resv *obj, struct dma_fence *fence,

include/linux/dma-resv.h

473

struct dma_fence *fence,

include/linux/dma-resv.h

478

struct dma_fence **fence);

include/linux/habanalabs/cpucp_if.h

820

__le32 fence; /* Signal to host that message is completed */

include/linux/host1x.h

232

void host1x_fence_cancel(struct dma_fence *fence);

include/linux/host1x.h

300

struct dma_fence *fence;

include/linux/iio/buffer-dma.h

176

struct dma_fence *fence,

include/linux/iio/buffer-dma.h

79

struct dma_fence *fence;

include/linux/iio/buffer_impl.h

198

void iio_buffer_signal_dmabuf_done(struct dma_fence *fence, int ret);

include/linux/iio/buffer_impl.h

93

struct dma_fence *fence, struct sg_table *sgt,

include/linux/sync_file.h

52

struct dma_fence *fence;

include/linux/sync_file.h

58

struct sync_file *sync_file_create(struct dma_fence *fence);

include/trace/events/dma_fence.h

104

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

106

TP_ARGS(fence)

include/trace/events/dma_fence.h

111

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

113

TP_ARGS(fence)

include/trace/events/dma_fence.h

14

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

16

TP_ARGS(fence),

include/trace/events/dma_fence.h

19

__string(driver, dma_fence_driver_name(fence))

include/trace/events/dma_fence.h

20

__string(timeline, dma_fence_timeline_name(fence))

include/trace/events/dma_fence.h

28

__entry->context = fence->context;

include/trace/events/dma_fence.h

29

__entry->seqno = fence->seqno;

include/trace/events/dma_fence.h

44

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

46

TP_ARGS(fence),

include/trace/events/dma_fence.h

49

__string(driver, fence->ops->get_driver_name(fence))

include/trace/events/dma_fence.h

50

__string(timeline, fence->ops->get_timeline_name(fence))

include/trace/events/dma_fence.h

58

__entry->context = fence->context;

include/trace/events/dma_fence.h

59

__entry->seqno = fence->seqno;

include/trace/events/dma_fence.h

69

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

71

TP_ARGS(fence)

include/trace/events/dma_fence.h

76

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

78

TP_ARGS(fence)

include/trace/events/dma_fence.h

83

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

85

TP_ARGS(fence)

include/trace/events/dma_fence.h

90

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

92

TP_ARGS(fence)

include/trace/events/dma_fence.h

97

TP_PROTO(struct dma_fence *fence),

include/trace/events/dma_fence.h

99

TP_ARGS(fence)

include/uapi/drm/amdgpu_drm.h

1058

struct drm_amdgpu_fence fence;

include/uapi/drm/etnaviv_drm.h

198

__u32 fence; /* out */

include/uapi/drm/etnaviv_drm.h

224

__u32 fence; /* in */

include/uapi/drm/msm_drm.h

332

__u32 fence; /* out (or in with MSM_SUBMIT_FENCE_SN_IN flag) */

include/uapi/drm/msm_drm.h

428

__u32 fence; /* in */

include/uapi/drm/tegra_drm.h

497

__u32 fence;

include/uapi/drm/vgem_drm.h

54

__u32 fence;

include/uapi/linux/sync_file.h

33

__s32 fence;

tools/testing/selftests/sync/sync.c

208

return data.fence;

tools/testing/selftests/sync/sync.c

49

__s32 fence;

tools/testing/selftests/sync/sync.c

81

return data.fence;

tools/testing/selftests/sync/sync_alloc.c

46

int timeline, fence, valid;

tools/testing/selftests/sync/sync_alloc.c

52

fence = sw_sync_fence_create(timeline, "allocFence", 1);

tools/testing/selftests/sync/sync_alloc.c

53

valid = sw_sync_fence_is_valid(fence);

tools/testing/selftests/sync/sync_alloc.c

56

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_alloc.c

63

int fence, timeline;

tools/testing/selftests/sync/sync_alloc.c

68

fence = sw_sync_fence_create(-1, "fence", 1);

tools/testing/selftests/sync/sync_alloc.c

69

ASSERT(fence < 0, "Success allocating negative fence\n");

tools/testing/selftests/sync/sync_alloc.c

71

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_fence.c

34

int fence, valid, ret;

tools/testing/selftests/sync/sync_fence.c

40

fence = sw_sync_fence_create(timeline, "allocFence", 5);

tools/testing/selftests/sync/sync_fence.c

41

valid = sw_sync_fence_is_valid(fence);

tools/testing/selftests/sync/sync_fence.c

45

ret = sync_wait(fence, 0);

tools/testing/selftests/sync/sync_fence.c

53

ret = sync_wait(fence, 0);

tools/testing/selftests/sync/sync_fence.c

61

ret = sync_wait(fence, 0);

tools/testing/selftests/sync/sync_fence.c

67

ret = sync_wait(fence, 0);

tools/testing/selftests/sync/sync_fence.c

70

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_merge.c

34

int fence, valid, merged;

tools/testing/selftests/sync/sync_merge.c

40

fence = sw_sync_fence_create(timeline, "allocFence", 5);

tools/testing/selftests/sync/sync_merge.c

41

valid = sw_sync_fence_is_valid(fence);

tools/testing/selftests/sync/sync_merge.c

44

merged = sync_merge("mergeFence", fence, fence);

tools/testing/selftests/sync/sync_merge.c

45

valid = sw_sync_fence_is_valid(fence);

tools/testing/selftests/sync/sync_merge.c

56

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_stress_consumer.c

100

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_stress_consumer.c

108

int fence, merged, tmp, valid, it, i;

tools/testing/selftests/sync/sync_stress_consumer.c

115

fence = sw_sync_fence_create(producer_timelines[0], "name", it);

tools/testing/selftests/sync/sync_stress_consumer.c

119

merged = sync_merge("name", tmp, fence);

tools/testing/selftests/sync/sync_stress_consumer.c

121

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_stress_consumer.c

122

fence = merged;

tools/testing/selftests/sync/sync_stress_consumer.c

125

valid = sw_sync_fence_is_valid(fence);

tools/testing/selftests/sync/sync_stress_consumer.c

133

ASSERT(sync_wait(fence, -1) > 0,

tools/testing/selftests/sync/sync_stress_consumer.c

136

ASSERT(busy_wait_on_fence(fence) == 0,

tools/testing/selftests/sync/sync_stress_consumer.c

147

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_stress_consumer.c

40

static int busy_wait_on_fence(int fence)

tools/testing/selftests/sync/sync_stress_consumer.c

45

error = sync_fence_count_with_status(fence, FENCE_STATUS_ERROR);

tools/testing/selftests/sync/sync_stress_consumer.c

47

active = sync_fence_count_with_status(fence,

tools/testing/selftests/sync/sync_stress_consumer.c

66

int fence, valid, i;

tools/testing/selftests/sync/sync_stress_consumer.c

72

fence = sw_sync_fence_create(consumer_timeline, "fence", i);

tools/testing/selftests/sync/sync_stress_consumer.c

73

valid = sw_sync_fence_is_valid(fence);

tools/testing/selftests/sync/sync_stress_consumer.c

82

ASSERT(sync_wait(fence, -1) > 0,

tools/testing/selftests/sync/sync_stress_consumer.c

85

ASSERT(busy_wait_on_fence(fence) == 0,

tools/testing/selftests/sync/sync_stress_merge.c

106

ret = sync_wait(fence, 0);

tools/testing/selftests/sync/sync_stress_merge.c

109

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_stress_merge.c

43

int fence, tmpfence, merged, valid;

tools/testing/selftests/sync/sync_stress_merge.c

51

fence = sw_sync_fence_create(timelines[0], "fence", 0);

tools/testing/selftests/sync/sync_stress_merge.c

52

valid = sw_sync_fence_is_valid(fence);

tools/testing/selftests/sync/sync_stress_merge.c

76

merged = sync_merge("merge", tmpfence, fence);

tools/testing/selftests/sync/sync_stress_merge.c

78

sw_sync_fence_destroy(fence);

tools/testing/selftests/sync/sync_stress_merge.c

79

fence = merged;

tools/testing/selftests/sync/sync_stress_merge.c

91

ASSERT(sync_fence_size(fence) == size,

tools/testing/selftests/sync/sync_stress_merge.c

97

ret = sync_wait(fence, 0);

tools/testing/selftests/sync/sync_stress_parallelism.c

45

int fence, valid, ret, i;

tools/testing/selftests/sync/sync_stress_parallelism.c

48

fence = sw_sync_fence_create(timeline, "fence",

tools/testing/selftests/sync/sync_stress_parallelism.c

50

valid = sw_sync_fence_is_valid(fence);

tools/testing/selftests/sync/sync_stress_parallelism.c

54

ret = sync_wait(fence, -1);

tools/testing/selftests/sync/sync_stress_parallelism.c

69

sw_sync_fence_destroy(fence);

tools/testing/selftests/vfio/lib/drivers/ioat/hw.h

111

unsigned int fence:1;

tools/testing/selftests/vfio/lib/drivers/ioat/hw.h

158

unsigned int fence:1;

tools/testing/selftests/vfio/lib/drivers/ioat/hw.h

207

unsigned int fence:1;

tools/testing/selftests/vfio/lib/drivers/ioat/hw.h

77

unsigned int fence:1;