bin/cp/cp.c

266

mode_t mask, mode;

bin/cp/cp.c

272

mask = ~umask(0777);

bin/cp/cp.c

273

umask(~mask);

bin/cp/cp.c

372

((mode | S_IRWXU) & mask) != (mode & mask))

bin/cp/cp.c

373

if (chmod(to.p_path, mode & mask) != 0){

bin/sh/eval.c

711

mustexpandto(const char *argtext, const char *mask)

bin/sh/eval.c

722

if (*argtext != *mask)

bin/sh/eval.c

727

mask++;

bin/sh/jobs.c

1149

sigset_t mask, omask;

bin/sh/jobs.c

1166

sigfillset(&mask);

bin/sh/jobs.c

1167

sigprocmask(SIG_BLOCK, &mask, &omask);

bin/sh/miscbltin.c

357

int mask;

bin/sh/miscbltin.c

366

mask = umask(0);

bin/sh/miscbltin.c

367

umask(mask);

bin/sh/miscbltin.c

375

if ((mask & S_IRUSR) == 0)

bin/sh/miscbltin.c

377

if ((mask & S_IWUSR) == 0)

bin/sh/miscbltin.c

379

if ((mask & S_IXUSR) == 0)

bin/sh/miscbltin.c

384

if ((mask & S_IRGRP) == 0)

bin/sh/miscbltin.c

386

if ((mask & S_IWGRP) == 0)

bin/sh/miscbltin.c

388

if ((mask & S_IXGRP) == 0)

bin/sh/miscbltin.c

393

if ((mask & S_IROTH) == 0)

bin/sh/miscbltin.c

395

if ((mask & S_IWOTH) == 0)

bin/sh/miscbltin.c

397

if ((mask & S_IXOTH) == 0)

bin/sh/miscbltin.c

403

out1fmt("%.4o\n", mask);

bin/sh/miscbltin.c

407

mask = 0;

bin/sh/miscbltin.c

411

mask = (mask << 3) + (*ap - '0');

bin/sh/miscbltin.c

413

umask(mask);

bin/sh/miscbltin.c

420

mask = getmode (set, ~mask & 0777);

bin/sh/miscbltin.c

421

umask(~mask & 0777);

bin/varsym/varsym.c

142

error = varsym_get(mask, name, buf, sizeof(buf));

bin/varsym/varsym.c

44

int mask = VARSYM_ALL_MASK;

bin/varsym/varsym.c

61

mask = VARSYM_PROC_MASK;

bin/varsym/varsym.c

68

mask = VARSYM_SYS_MASK;

bin/varsym/varsym.c

72

mask = VARSYM_USER_MASK;

bin/varsym/varsym.c

76

mask = VARSYM_PROC_MASK;

crypto/libressl/apps/openssl/apps.c

1033

*flags &= ~ptbl->mask;

crypto/libressl/apps/openssl/apps.c

153

unsigned long mask;

crypto/libressl/crypto/asn1/a_bitstr.c

179

unsigned char mask = i < flags_len ? ~flags[i] : 0xff;

crypto/libressl/crypto/asn1/a_bitstr.c

181

ok = (a->data[i] & mask) == 0;

crypto/libressl/crypto/asn1/a_mbstr.c

109

if (!mask)

crypto/libressl/crypto/asn1/a_mbstr.c

110

mask = DIRSTRING_TYPE;

crypto/libressl/crypto/asn1/a_mbstr.c

162

if (traverse_string(in, len, inform, type_str, &mask) < 0) {

crypto/libressl/crypto/asn1/a_mbstr.c

170

if (mask & B_ASN1_PRINTABLESTRING)

crypto/libressl/crypto/asn1/a_mbstr.c

172

else if (mask & B_ASN1_IA5STRING)

crypto/libressl/crypto/asn1/a_mbstr.c

174

else if (mask & B_ASN1_T61STRING)

crypto/libressl/crypto/asn1/a_mbstr.c

176

else if (mask & B_ASN1_BMPSTRING) {

crypto/libressl/crypto/asn1/a_mbstr.c

179

} else if (mask & B_ASN1_UNIVERSALSTRING) {

crypto/libressl/crypto/asn1/a_mbstr.c

89

int inform, unsigned long mask)

crypto/libressl/crypto/asn1/a_mbstr.c

91

return ASN1_mbstring_ncopy(out, in, len, inform, mask, 0, 0);

crypto/libressl/crypto/asn1/a_mbstr.c

96

int inform, unsigned long mask, long minsize, long maxsize)

crypto/libressl/crypto/asn1/a_strnid.c

109

unsigned long mask;

crypto/libressl/crypto/asn1/a_strnid.c

118

mask = strtoul(p + 5, &end, 0);

crypto/libressl/crypto/asn1/a_strnid.c

119

if (errno == ERANGE && mask == ULONG_MAX)

crypto/libressl/crypto/asn1/a_strnid.c

125

mask = ~((unsigned long)(B_ASN1_BMPSTRING|B_ASN1_UTF8STRING));

crypto/libressl/crypto/asn1/a_strnid.c

127

mask = ~((unsigned long)B_ASN1_T61STRING);

crypto/libressl/crypto/asn1/a_strnid.c

129

mask = B_ASN1_UTF8STRING;

crypto/libressl/crypto/asn1/a_strnid.c

131

mask = 0xFFFFFFFFL;

crypto/libressl/crypto/asn1/a_strnid.c

134

ASN1_STRING_set_default_mask(mask);

crypto/libressl/crypto/asn1/a_strnid.c

150

unsigned long mask;

crypto/libressl/crypto/asn1/a_strnid.c

157

mask = tbl->mask;

crypto/libressl/crypto/asn1/a_strnid.c

159

mask &= global_mask;

crypto/libressl/crypto/asn1/a_strnid.c

160

ret = ASN1_mbstring_ncopy(out, in, inlen, inform, mask,

crypto/libressl/crypto/asn1/a_strnid.c

292

rv->mask = tmp->mask;

crypto/libressl/crypto/asn1/a_strnid.c

304

ASN1_STRING_TABLE_add(int nid, long minsize, long maxsize, unsigned long mask,

crypto/libressl/crypto/asn1/a_strnid.c

317

if (mask != 0)

crypto/libressl/crypto/asn1/a_strnid.c

318

tmp->mask = mask;

crypto/libressl/crypto/asn1/a_strnid.c

85

ASN1_STRING_set_default_mask(unsigned long mask)

crypto/libressl/crypto/asn1/a_strnid.c

87

global_mask = mask;

crypto/libressl/crypto/bio/bio_lib.c

689

int mt, mask;

crypto/libressl/crypto/bio/bio_lib.c

693

mask = type & 0xff;

crypto/libressl/crypto/bio/bio_lib.c

697

if (!mask) {

crypto/libressl/crypto/bn/bn_gf2m.c

1274

BN_ULONG mask;

crypto/libressl/crypto/bn/bn_gf2m.c

1283

mask = BN_TBIT;

crypto/libressl/crypto/bn/bn_gf2m.c

1285

if (a->d[i] & mask) {

crypto/libressl/crypto/bn/bn_gf2m.c

1290

mask >>= 1;

crypto/libressl/crypto/bn/bn_gf2m.c

729

BN_ULONG u0, u1, b0, b1, mask;

crypto/libressl/crypto/bn/bn_gf2m.c

733

mask = (BN_ULONG)0 - (b0 & 1);

crypto/libressl/crypto/bn/bn_gf2m.c

734

b0 ^= p->d[0] & mask;

crypto/libressl/crypto/bn/bn_gf2m.c

740

b1 = bdp[i + 1] ^ (p->d[i + 1] & mask);

crypto/libressl/crypto/bn/bn_lib.c

235

BN_ULONG x, mask;

crypto/libressl/crypto/bn/bn_lib.c

245

mask = ((~x & (x - 1)) >> (BN_BITS2 - 1)) - 1;

crypto/libressl/crypto/bn/bn_lib.c

246

bits += shift & mask;

crypto/libressl/crypto/bn/bn_lib.c

248

l ^= (x ^ l) & mask;

crypto/libressl/crypto/bn/bn_lib.c

620

size_t i, lasti, j, atop, mask;

crypto/libressl/crypto/bn/bn_lib.c

658

mask = 0 - ((j - atop) >> (8 * sizeof(i) - 1));

crypto/libressl/crypto/bn/bn_lib.c

659

val = (unsigned char)(l >> (8 * (i % BN_BYTES)) & mask);

crypto/libressl/crypto/bn/bn_nist.c

1001

mask = 0 - (uintptr_t)(*addsubf)(c_d, r_d, _nist_p_256[0], BN_NIST_256_TOP);

crypto/libressl/crypto/bn/bn_nist.c

1002

mask &= 0 - (uintptr_t)carry;

crypto/libressl/crypto/bn/bn_nist.c

1004

res = (BN_ULONG *)(((uintptr_t)res & ~mask) | ((uintptr_t)r_d & mask));

crypto/libressl/crypto/bn/bn_nist.c

1036

uintptr_t mask;

crypto/libressl/crypto/bn/bn_nist.c

1266

mask = 0 - (uintptr_t)(*addsubf)(c_d, r_d, _nist_p_384[0], BN_NIST_384_TOP);

crypto/libressl/crypto/bn/bn_nist.c

1267

mask &= 0 - (uintptr_t)carry;

crypto/libressl/crypto/bn/bn_nist.c

1269

res = (BN_ULONG *)(((uintptr_t)res & ~mask) | ((uintptr_t)r_d & mask));

crypto/libressl/crypto/bn/bn_nist.c

1288

uintptr_t mask;

crypto/libressl/crypto/bn/bn_nist.c

1326

mask = 0 - (uintptr_t)bn_sub_words(t_d, r_d, _nist_p_521,

crypto/libressl/crypto/bn/bn_nist.c

1329

res = (BN_ULONG *)(((uintptr_t)res & ~mask) | ((uintptr_t)r_d & mask));

crypto/libressl/crypto/bn/bn_nist.c

471

uintptr_t mask;

crypto/libressl/crypto/bn/bn_nist.c

586

mask = 0 - (uintptr_t)bn_sub_words(c_d, r_d, _nist_p_192[0],

crypto/libressl/crypto/bn/bn_nist.c

588

mask &= 0 - (uintptr_t)carry;

crypto/libressl/crypto/bn/bn_nist.c

590

res = (BN_ULONG *)(((uintptr_t)res & ~mask) | ((uintptr_t)r_d & mask));

crypto/libressl/crypto/bn/bn_nist.c

620

uintptr_t mask;

crypto/libressl/crypto/bn/bn_nist.c

773

mask = 0 - (uintptr_t)(*addsubf)(c_d, r_d, _nist_p_224[0], BN_NIST_224_TOP);

crypto/libressl/crypto/bn/bn_nist.c

774

mask &= 0 - (uintptr_t)carry;

crypto/libressl/crypto/bn/bn_nist.c

776

res = (BN_ULONG *)(((uintptr_t)res & ~mask) | ((uintptr_t)r_d & mask));

crypto/libressl/crypto/bn/bn_nist.c

804

uintptr_t mask;

crypto/libressl/crypto/bn/bn_rand.c

125

int ret = 0, bit, bytes, mask;

crypto/libressl/crypto/bn/bn_rand.c

144

mask = 0xff << (bit + 1);

crypto/libressl/crypto/bn/bn_rand.c

184

buf[0] &= ~mask;

crypto/libressl/crypto/constant_time_locl.h

119

static inline unsigned int constant_time_select(unsigned int mask,

crypto/libressl/crypto/constant_time_locl.h

123

static inline unsigned char constant_time_select_8(unsigned char mask,

crypto/libressl/crypto/constant_time_locl.h

127

static inline int constant_time_select_int(unsigned int mask, int a, int b);

crypto/libressl/crypto/constant_time_locl.h

184

static inline unsigned int constant_time_select(unsigned int mask,

crypto/libressl/crypto/constant_time_locl.h

188

return (mask & a) | (~mask & b);

crypto/libressl/crypto/constant_time_locl.h

191

static inline unsigned char constant_time_select_8(unsigned char mask,

crypto/libressl/crypto/constant_time_locl.h

195

return (unsigned char)(constant_time_select(mask, a, b));

crypto/libressl/crypto/constant_time_locl.h

198

static inline int constant_time_select_int(unsigned int mask, int a, int b)

crypto/libressl/crypto/constant_time_locl.h

200

return (int)(constant_time_select(mask, (unsigned)(a), (unsigned)(b)));

crypto/libressl/crypto/ec/ec2_mult.c

268

BN_ULONG mask, word;

crypto/libressl/crypto/ec/ec2_mult.c

315

mask = BN_TBIT;

crypto/libressl/crypto/ec/ec2_mult.c

317

while (!(word & mask))

crypto/libressl/crypto/ec/ec2_mult.c

318

mask >>= 1;

crypto/libressl/crypto/ec/ec2_mult.c

319

mask >>= 1;

crypto/libressl/crypto/ec/ec2_mult.c

321

if (!mask) {

crypto/libressl/crypto/ec/ec2_mult.c

323

mask = BN_TBIT;

crypto/libressl/crypto/ec/ec2_mult.c

327

while (mask) {

crypto/libressl/crypto/ec/ec2_mult.c

328

if (!BN_swap_ct(word & mask, x1, x2, group->field.top))

crypto/libressl/crypto/ec/ec2_mult.c

330

if (!BN_swap_ct(word & mask, z1, z2, group->field.top))

crypto/libressl/crypto/ec/ec2_mult.c

336

if (!BN_swap_ct(word & mask, x1, x2, group->field.top))

crypto/libressl/crypto/ec/ec2_mult.c

338

if (!BN_swap_ct(word & mask, z1, z2, group->field.top))

crypto/libressl/crypto/ec/ec2_mult.c

340

mask >>= 1;

crypto/libressl/crypto/ec/ec2_mult.c

342

mask = BN_TBIT;

crypto/libressl/crypto/ec/ec_mult.c

201

int bit, next_bit, mask;

crypto/libressl/crypto/ec/ec_mult.c

222

mask = next_bit - 1; /* at most 255 */

crypto/libressl/crypto/ec/ec_mult.c

240

window_val = scalar->d[0] & mask;

crypto/libressl/crypto/ec/ec_mult.c

263

digit = window_val & (mask >> 1); /* 0 < digit < 2^w */

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

258

size_t inp_len, mask, j, i;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

287

mask = (0 - ((inp_len - len) >>

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

289

inp_len &= mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

290

ret &= (int)mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

331

mask = (j - inp_len) >> (sizeof(j) * 8 - 8);

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

332

c &= mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

333

c |= 0x80 & ~mask &

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

341

mask = 0 - ((inp_len + 7 - j) >>

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

343

data->u[SHA_LBLOCK - 1] |= bitlen&mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

345

mask &= 0 - ((j - inp_len - 72) >>

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

347

pmac->u[0] |= key->md.h0 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

348

pmac->u[1] |= key->md.h1 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

349

pmac->u[2] |= key->md.h2 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

350

pmac->u[3] |= key->md.h3 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

351

pmac->u[4] |= key->md.h4 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

359

mask = 0 - ((inp_len + 8 - j) >>

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

361

data->u[SHA_LBLOCK - 1] |= bitlen & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

363

mask &= 0 - ((j - inp_len - 73) >>

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

365

pmac->u[0] |= key->md.h0 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

366

pmac->u[1] |= key->md.h1 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

367

pmac->u[2] |= key->md.h2 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

368

pmac->u[3] |= key->md.h3 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

369

pmac->u[4] |= key->md.h4 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

376

mask = 0 - ((j - inp_len - 73) >> (sizeof(j) * 8 - 1));

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

377

pmac->u[0] |= key->md.h0 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

378

pmac->u[1] |= key->md.h1 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

379

pmac->u[2] |= key->md.h2 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

380

pmac->u[3] |= key->md.h3 & mask;

crypto/libressl/crypto/evp/e_aes_cbc_hmac_sha1.c

381

pmac->u[4] |= key->md.h4 & mask;

crypto/libressl/crypto/gost/gost89_keywrap.c

67

int i, mask;

crypto/libressl/crypto/gost/gost89_keywrap.c

77

for (mask = 1; mask < 256; mask <<= 1) {

crypto/libressl/crypto/gost/gost89_keywrap.c

79

if (mask & ukm[i]) {

crypto/libressl/crypto/gost/gost89_keywrap.c

89

mask = 0;

crypto/libressl/crypto/gost/gost89_keywrap.c

91

&mask, 1);

crypto/libressl/crypto/poly1305/poly1305-donna.c

221

unsigned long mask;

crypto/libressl/crypto/poly1305/poly1305-donna.c

272

mask = (g4 >> ((sizeof(unsigned long) * 8) - 1)) - 1;

crypto/libressl/crypto/poly1305/poly1305-donna.c

273

g0 &= mask;

crypto/libressl/crypto/poly1305/poly1305-donna.c

274

g1 &= mask;

crypto/libressl/crypto/poly1305/poly1305-donna.c

275

g2 &= mask;

crypto/libressl/crypto/poly1305/poly1305-donna.c

276

g3 &= mask;

crypto/libressl/crypto/poly1305/poly1305-donna.c

277

g4 &= mask;

crypto/libressl/crypto/poly1305/poly1305-donna.c

278

mask = ~mask;

crypto/libressl/crypto/poly1305/poly1305-donna.c

279

h0 = (h0 & mask) | g0;

crypto/libressl/crypto/poly1305/poly1305-donna.c

280

h1 = (h1 & mask) | g1;

crypto/libressl/crypto/poly1305/poly1305-donna.c

281

h2 = (h2 & mask) | g2;

crypto/libressl/crypto/poly1305/poly1305-donna.c

282

h3 = (h3 & mask) | g3;

crypto/libressl/crypto/poly1305/poly1305-donna.c

283

h4 = (h4 & mask) | g4;

crypto/libressl/crypto/rsa/rsa_oaep.c

175

unsigned int good = 0, found_one_byte, mask;

crypto/libressl/crypto/rsa/rsa_oaep.c

222

mask = ~constant_time_is_zero(flen);

crypto/libressl/crypto/rsa/rsa_oaep.c

223

flen -= 1 & mask;

crypto/libressl/crypto/rsa/rsa_oaep.c

224

from -= 1 & mask;

crypto/libressl/crypto/rsa/rsa_oaep.c

225

*--em = *from & mask;

crypto/libressl/crypto/rsa/rsa_oaep.c

296

for (mask = good, i = 0; i < tlen; i++) {

crypto/libressl/crypto/rsa/rsa_oaep.c

300

mask &= ~equals; /* mask = 0 at EOF */

crypto/libressl/crypto/rsa/rsa_oaep.c

301

to[i] = constant_time_select_8(mask, db[msg_index++], to[i]);

crypto/libressl/crypto/rsa/rsa_oaep.c

320

PKCS1_MGF1(unsigned char *mask, long len, const unsigned char *seed,

crypto/libressl/crypto/rsa/rsa_oaep.c

344

if (!EVP_DigestFinal_ex(&c, mask + outlen, NULL))

crypto/libressl/crypto/rsa/rsa_oaep.c

350

memcpy(mask + outlen, md, len - outlen);

crypto/libressl/crypto/x509/x509_addr.c

542

uint8_t mask = (1 << unused_bits) - 1;

crypto/libressl/crypto/x509/x509_addr.c

547

addr[bs->length - 1] &= ~mask;

crypto/libressl/crypto/x509/x509_addr.c

549

addr[bs->length - 1] |= mask;

crypto/libressl/crypto/x509/x509_addr.c

807

unsigned char mask;

crypto/libressl/crypto/x509/x509_addr.c

818

mask = min[i] ^ max[i];

crypto/libressl/crypto/x509/x509_addr.c

819

switch (mask) {

crypto/libressl/crypto/x509/x509_addr.c

844

if ((min[i] & mask) != 0 || (max[i] & mask) != mask)

crypto/libressl/crypto/x509/x509_constraints.c

632

uint8_t *mask;

crypto/libressl/crypto/x509/x509_constraints.c

638

mask = constraint + alen;

crypto/libressl/crypto/x509/x509_constraints.c

640

if ((address[i] & mask[i]) != (constraint[i] & mask[i]))

crypto/libressl/include/openssl/asn1.h

218

unsigned long mask;

crypto/libressl/include/openssl/asn1.h

862

void ASN1_STRING_set_default_mask(unsigned long mask);

crypto/libressl/include/openssl/asn1.h

866

int inform, unsigned long mask);

crypto/libressl/include/openssl/asn1.h

868

int inform, unsigned long mask, long minsize, long maxsize);

crypto/libressl/include/openssl/asn1t.h

770

#define IMPLEMENT_ASN1_MSTRING(itname, mask) \

crypto/libressl/include/openssl/asn1t.h

772

ASN1_ITYPE_MSTRING, mask, NULL, 0, NULL, sizeof(ASN1_STRING), #itname \

crypto/libressl/include/openssl/rsa.h

333

int PKCS1_MGF1(unsigned char *mask, long len,

crypto/libressl/ssl/s3_cbc.c

151

unsigned char mask = constant_time_ge(padding_length, i);

crypto/libressl/ssl/s3_cbc.c

155

good &= ~(mask&(padding_length ^ b));

crypto/openssh/audit-bsm.c

239

struct au_mask mask;

crypto/openssh/audit-bsm.c

241

mask.am_success = mask.am_failure = 0;

crypto/openssh/audit-bsm.c

246

(void) getauditflagsbin(naflags, &mask);

crypto/openssh/audit-bsm.c

248

rc = au_user_mask(username, &mask);

crypto/openssh/audit-bsm.c

251

return(au_preselect(event, &mask, sorf, AU_PRS_REREAD));

crypto/openssh/audit-bsm.c

302

au_mask_t mask;

crypto/openssh/audit-bsm.c

314

mask.am_success = 0;

crypto/openssh/audit-bsm.c

315

mask.am_failure = 0;

crypto/openssh/audit-bsm.c

317

(void) au_user_mask(the_authctxt->user, &mask);

crypto/openssh/audit-bsm.c

319

info.ai_mask.am_success = mask.am_success;

crypto/openssh/audit-bsm.c

320

info.ai_mask.am_failure = mask.am_failure;

crypto/openssh/ed25519.c

262

crypto_uint32 mask = b;

crypto/openssh/ed25519.c

263

mask = -mask;

crypto/openssh/ed25519.c

264

for(i=0;i<32;i++) r->v[i] ^= mask & (x->v[i] ^ r->v[i]);

crypto/openssh/ed25519.c

535

crypto_uint32 mask;

crypto/openssh/ed25519.c

546

mask = b - 1;

crypto/openssh/ed25519.c

548

r->v[i] ^= mask & (r->v[i] ^ t[i]);

crypto/openssh/sandbox-seccomp-filter.c

472

sigset_t mask;

crypto/openssh/sandbox-seccomp-filter.c

476

sigemptyset(&mask);

crypto/openssh/sandbox-seccomp-filter.c

477

sigaddset(&mask, SIGSYS);

crypto/openssh/sandbox-seccomp-filter.c

483

if (sigprocmask(SIG_UNBLOCK, &mask, NULL) == -1)

crypto/openssh/scp.c

1669

mode_t mode, omode, mask;

crypto/openssh/scp.c

1686

mask = umask(0);

crypto/openssh/scp.c

1688

(void) umask(mask);

crypto/openssh/scp.c

1794

mode &= ~mask;

crypto/openssh/scp.c

1952

if (fchmod(ofd, omode & ~mask)) {

crypto/openssh/scp.c

1954

if (chmod(np, omode & ~mask)) {

crypto/openssh/session.c

902

u_long mask;

crypto/openssh/session.c

923

if (sscanf(var, "%5lo", &mask) == 1)

crypto/openssh/session.c

924

umask((mode_t)mask);

crypto/openssh/sftp-server.c

1910

long mask;

crypto/openssh/sftp-server.c

1977

mask = strtol(optarg, &cp, 8);

crypto/openssh/sftp-server.c

1978

if (mask < 0 || mask > 0777 || *cp != '\0' ||

crypto/openssh/sftp-server.c

1979

cp == optarg || (mask == 0 && errno != 0))

crypto/openssh/sftp-server.c

1981

(void)umask((mode_t)mask);

crypto/openssh/sntrup761.c

1243

int mask;

crypto/openssh/sntrup761.c

1248

mask = Ciphertexts_diff_mask(c,cnew);

crypto/openssh/sntrup761.c

1249

for (i = 0;i < Inputs_bytes;++i) r_enc[i] ^= mask&(r_enc[i]^rho[i]);

crypto/openssh/sntrup761.c

1250

HashSession(k,1+mask,r_enc,c);

crypto/openssh/sntrup761.c

129

uint32 mask;

crypto/openssh/sntrup761.c

161

mask = -(x>>31);

crypto/openssh/sntrup761.c

162

x += mask&(uint32)m; *q += mask;

crypto/openssh/sntrup761.c

183

uint32 mask;

crypto/openssh/sntrup761.c

188

mask = -(uint32)(ur>>15);

crypto/openssh/sntrup761.c

189

ur += mask&m; uq += mask;

crypto/openssh/sntrup761.c

768

int mask;

crypto/openssh/sntrup761.c

776

mask = Weightw_mask(ev); /* 0 if weight w, else -1 */

crypto/openssh/sntrup761.c

777

for (i = 0;i < w;++i) r[i] = ((ev[i]^1)&~mask)^1;

crypto/openssh/sntrup761.c

778

for (i = w;i < p;++i) r[i] = ev[i]&~mask;

games/atc/update.c

209

sigsetmask(mask);

games/atc/update.c

55

int i, dir_diff, mask, unclean;

games/atc/update.c

58

mask = sigblock(sigmask(SIGINT));

games/gomoku/bdinit.c

175

int mask, bmask, vertex, s;

games/gomoku/bdinit.c

197

mask = (i == 5) ? 0xC : 0xF;

games/gomoku/bdinit.c

211

str[n] |= (f == 5) ? mask & 0xA : mask;

games/gomoku/pickmove.c

1079

int i, n, mask, flags, verts, myindex, fcnt;

games/gomoku/pickmove.c

1106

mask = str[tcbp - frames];

games/gomoku/pickmove.c

1109

if (mask & (1 << n)) {

games/gomoku/pickmove.c

1115

if (tcbp->c_dir == fcbp->c_dir && (mask & (0x10 << n)))

games/gomoku/pickmove.c

1158

mask = str[cbp - frames];

games/gomoku/pickmove.c

1159

if (mask & (1 << n)) {

games/gomoku/pickmove.c

1165

if (cbp->c_dir == fcbp->c_dir && (mask & (0x10 << n)))

games/gomoku/pickmove.c

1464

int d, n, mask;

games/gomoku/pickmove.c

1472

mask = ~((IFLAG | CFLAG) << n);

games/gomoku/pickmove.c

1475

sp->s_flags &= mask;

games/grdc/grdc.c

159

mask = 0;

games/grdc/grdc.c

187

new[i] = (new[i] & ~mask) |

games/grdc/grdc.c

188

(new[i+1] & mask);

games/grdc/grdc.c

190

new[5] = (new[5] & ~mask) | (next[k] & mask);

games/grdc/grdc.c

192

new[k] = (new[k] & ~mask) | (next[k] & mask);

games/grdc/grdc.c

301

mask |= (next[i] ^ old[i]) & m;

games/grdc/grdc.c

303

if (mask & m)

games/grdc/grdc.c

304

mask |= m;

games/grdc/grdc.c

34

static long old[6], next[6], new[6], mask;

games/hack/hack.do_wear.c

188

long mask = 0;

games/hack/hack.do_wear.c

202

mask = W_ARMH;

games/hack/hack.do_wear.c

209

mask = W_ARMS;

games/hack/hack.do_wear.c

218

mask = W_ARMG;

games/hack/hack.do_wear.c

227

mask = W_ARM;

games/hack/hack.do_wear.c

235

setworn(otmp, mask);

games/hack/hack.do_wear.c

251

long mask = 0;

games/hack/hack.do_wear.c

274

mask = RIGHT_RING;

games/hack/hack.do_wear.c

276

mask = LEFT_RING;

games/hack/hack.do_wear.c

287

mask = LEFT_RING;

games/hack/hack.do_wear.c

291

mask = RIGHT_RING;

games/hack/hack.do_wear.c

294

} while (!mask);

games/hack/hack.do_wear.c

295

setworn(otmp, mask);

games/hack/hack.do_wear.c

299

u.uprops[PROP(otmp->otyp)].p_flgs |= mask;

games/hack/hack.do_wear.c

328

long mask;

games/hack/hack.do_wear.c

329

mask = obj->owornmask & W_RING;

games/hack/hack.do_wear.c

331

if (!(u.uprops[PROP(obj->otyp)].p_flgs & mask))

games/hack/hack.do_wear.c

333

u.uprops[PROP(obj->otyp)].p_flgs &= ~mask;

games/hack/hack.worn.c

107

setworn(struct obj *obj, long mask)

games/hack/hack.worn.c

113

if (wp->w_mask & mask) {

games/hunt/huntd/shots.c

456

int mask, count;

games/hunt/huntd/shots.c

479

mask = count = 0;

games/hunt/huntd/shots.c

481

mask |= WEST, count++;

games/hunt/huntd/shots.c

483

mask |= NORTH, count++;

games/hunt/huntd/shots.c

485

mask |= SOUTH, count++;

games/hunt/huntd/shots.c

487

mask |= EAST, count++;

games/hunt/huntd/shots.c

495

dir = mask;

games/hunt/huntd/shots.c

502

if (mask & EAST)

games/hunt/huntd/shots.c

503

mask &= ~EAST, count--;

games/hunt/huntd/shots.c

506

if (mask & WEST)

games/hunt/huntd/shots.c

507

mask &= ~WEST, count--;

games/hunt/huntd/shots.c

510

if (mask & SOUTH)

games/hunt/huntd/shots.c

511

mask &= ~SOUTH, count--;

games/hunt/huntd/shots.c

514

if (mask & NORTH)

games/hunt/huntd/shots.c

515

mask &= ~NORTH, count--;

games/hunt/huntd/shots.c

521

if (n >= 0 && mask & NORTH)

games/hunt/huntd/shots.c

523

if (n >= 0 && mask & SOUTH)

games/hunt/huntd/shots.c

525

if (n >= 0 && mask & EAST)

games/hunt/huntd/shots.c

527

if (n >= 0 && mask & WEST)

games/rogue/inventory.c

209

inventory(const object *pack, unsigned short mask)

games/rogue/inventory.c

223

if (obj->what_is & mask) {

games/rogue/level.c

621

mask_room(short rn, short *row, short *col, unsigned short mask)

games/rogue/level.c

627

if (dungeon[i][j] & mask) {

games/rogue/pack.c

275

pack_letter(const char *prompt, unsigned short mask)

games/rogue/pack.c

278

unsigned short tmask = mask;

games/rogue/pack.c

280

if (!mask_pack(&rogue.pack, mask)) {

games/rogue/pack.c

290

if (!is_pack_letter(&ch, &mask)) {

games/rogue/pack.c

299

mask = tmask;

games/rogue/pack.c

300

inventory(&rogue.pack, mask);

games/rogue/pack.c

304

mask = tmask;

games/rogue/pack.c

495

mask_pack(const object *pack, unsigned short mask)

games/rogue/pack.c

499

if (pack->what_is & mask) {

games/rogue/pack.c

507

is_pack_letter(short *c, unsigned short *mask)

games/rogue/pack.c

513

*mask = SCROL;

games/rogue/pack.c

516

*mask = POTION;

games/rogue/pack.c

519

*mask = FOOD;

games/rogue/pack.c

522

*mask = WEAPON;

games/rogue/pack.c

525

*mask = ARMOR;

games/rogue/pack.c

528

*mask = WAND;

games/rogue/pack.c

531

*mask = RING;

games/rogue/pack.c

534

*mask = AMULET;

games/rogue/room.c

175

unsigned short mask = dungeon[row][col];

games/rogue/room.c

177

if (mask & MONSTER) {

games/rogue/room.c

180

if (mask & OBJECT) {

games/rogue/room.c

186

if (mask & (TUNNEL | STAIRS | HORWALL | VERTWALL | FLOOR | DOOR)) {

games/rogue/room.c

187

if ((mask & (TUNNEL| STAIRS)) && (!(mask & HIDDEN))) {

games/rogue/room.c

188

return(((mask & STAIRS) ? '%' : '#'));

games/rogue/room.c

190

if (mask & HORWALL) {

games/rogue/room.c

193

if (mask & VERTWALL) {

games/rogue/room.c

196

if (mask & FLOOR) {

games/rogue/room.c

197

if (mask & TRAP) {

games/rogue/room.c

204

if (mask & DOOR) {

games/rogue/room.c

205

if (mask & HIDDEN) {

games/rogue/room.c

221

get_mask_char(unsigned short mask)

games/rogue/room.c

223

switch(mask) {

games/rogue/room.c

248

gr_row_col(short *row, short *col, unsigned short mask)

games/rogue/room.c

258

(!(dungeon[r][c] & mask)) ||

games/rogue/room.c

259

(dungeon[r][c] & (~mask)) ||

games/rogue/room.c

370

unsigned short mask = (HORWALL | VERTWALL | DOOR | TUNNEL | TRAP | STAIRS |

games/rogue/room.c

377

if (s & mask) {

include/arpa/nameser.h

119

struct _ns_flagdata { int mask, shift; };

include/resolv.h

159

u_int32_t mask;

include/xlocale/_locale.h

53

locale_t newlocale(int mask, const char *locale, locale_t base);

include/xlocale/_locale.h

54

const char *querylocale(int mask, locale_t loc);

lib/i18n_module/DECHanyu/citrus_dechanyu.c

325

wchar_t mask;

lib/i18n_module/DECHanyu/citrus_dechanyu.c

329

mask = 0x7F;

lib/i18n_module/DECHanyu/citrus_dechanyu.c

341

mask |= 0x7F00;

lib/i18n_module/DECHanyu/citrus_dechanyu.c

344

*idx = (_index_t)(wc & mask);

lib/i18n_module/EUC/citrus_euc.c

155

ei->mask = (int)_bcs_strtol(v, (char **)&e, 0);

lib/i18n_module/EUC/citrus_euc.c

257

wchar = (wchar & ~ei->mask) | ei->bits[cs];

lib/i18n_module/EUC/citrus_euc.c

285

m = wc & ei->mask;

lib/i18n_module/EUC/citrus_euc.c

330

m = wc & ei->mask;

lib/i18n_module/EUC/citrus_euc.c

345

if ((csid & ~ei->mask) != 0 || (idx & ei->mask) != 0)

lib/i18n_module/EUC/citrus_euc.c

93

wchar_t mask;

lib/i18n_module/ISO2022/citrus_iso2022.c

1018

unsigned char mask;

lib/i18n_module/ISO2022/citrus_iso2022.c

1128

mask = 0x00;

lib/i18n_module/ISO2022/citrus_iso2022.c

1130

mask = 0x80;

lib/i18n_module/ISO2022/citrus_iso2022.c

1132

mask = 0x00;

lib/i18n_module/ISO2022/citrus_iso2022.c

1134

mask = 0x80;

lib/i18n_module/ISO2022/citrus_iso2022.c

1150

*p++ = ((wc >> (i << 3)) & 0x7f) | mask;

lib/libalias/alias_db.c

2588

unsigned int mask /* Mask of which flags to affect (use 0 to do a

lib/libalias/alias_db.c

2593

if (flags & mask & PKT_ALIAS_LOG)

lib/libalias/alias_db.c

2598

if (~flags & mask & PKT_ALIAS_LOG) {

lib/libalias/alias_db.c

2604

if (flags & mask & PKT_ALIAS_PUNCH_FW) {

lib/libalias/alias_db.c

2608

if (~flags & mask & PKT_ALIAS_PUNCH_FW) {

lib/libalias/alias_db.c

2614

packetAliasMode = (flags & mask) | (packetAliasMode & ~mask);

lib/libalias/alias_proxy.c

148

IpMask(int nbits, struct in_addr *mask)

lib/libalias/alias_proxy.c

159

mask->s_addr = htonl(imask);

lib/libalias/alias_proxy.c

718

struct in_addr mask;

lib/libalias/alias_proxy.c

727

IpMask(32, &mask);

lib/libalias/alias_proxy.c

746

err = IpMask(nbits, &mask);

lib/libalias/alias_proxy.c

754

src_mask = mask;

lib/libalias/alias_proxy.c

759

dst_mask = mask;

lib/libc/compat-43/sigcompat.c

65

sigsetmask(int mask)

lib/libc/compat-43/sigcompat.c

71

set.__bits[0] = mask;

lib/libc/compat-43/sigcompat.c

79

sigblock(int mask)

lib/libc/compat-43/sigcompat.c

85

set.__bits[0] = mask;

lib/libc/compat-43/sigcompat.c

93

sigpause(int mask)

lib/libc/compat-43/sigcompat.c

98

set.__bits[0] = mask;

lib/libc/db/hash/hash_page.c

635

uint32_t i, mask;

lib/libc/db/hash/hash_page.c

637

mask = 0x1;

lib/libc/db/hash/hash_page.c

639

if (!(mask & map))

lib/libc/db/hash/hash_page.c

641

mask = mask << 1;

lib/libc/gen/setmode.c

173

mode_t mask;

lib/libc/gen/setmode.c

188

umask(mask = umask(0));

lib/libc/gen/setmode.c

189

mask = ~mask;

lib/libc/gen/setmode.c

210

ADDCMD('=', (STANDARD_BITS|S_ISTXT), perm, mask);

lib/libc/gen/setmode.c

283

ADDCMD(op, who, perm, mask);

lib/libc/gen/setmode.c

289

ADDCMD('X', who, permXbits, mask);

lib/libc/gen/setmode.c

292

ADDCMD(*p, who, op, mask);

lib/libc/gen/setmode.c

303

ADDCMD(op, who, perm, mask);

lib/libc/gen/setmode.c

307

ADDCMD('X', who, permXbits, mask);

lib/libc/gen/setmode.c

334

addcmd(BITCMD *set, int op, int who, int oparg, u_int mask)

lib/libc/gen/setmode.c

348

set->bits = (who ? who : mask) & oparg;

lib/libc/gen/setmode.c

362

set->bits = mask;

lib/libc/include/isc/eventlib.h

63

typedef struct { unsigned char mask[256/8]; } evByteMask;

lib/libc/include/isc/eventlib.h

67

((bm).mask[EV_BYTEMASK_BYTE(b)] |= EV_BYTEMASK_MASK(b))

lib/libc/include/isc/eventlib.h

69

((bm).mask[EV_BYTEMASK_BYTE(b)] &= ~EV_BYTEMASK_MASK(b))

lib/libc/include/isc/eventlib.h

71

((bm).mask[EV_BYTEMASK_BYTE(b)] & EV_BYTEMASK_MASK(b))

lib/libc/locale/utf8.c

119

int ch, i, mask, want;

lib/libc/locale/utf8.c

160

mask = 0x1f;

lib/libc/locale/utf8.c

164

mask = 0x0f;

lib/libc/locale/utf8.c

168

mask = 0x07;

lib/libc/locale/utf8.c

188

wch = (unsigned char)*s++ & mask;

lib/libc/locale/utf8.c

451

int ch, mask, want;

lib/libc/locale/utf8.c

467

mask = 0x1f;

lib/libc/locale/utf8.c

471

mask = 0x0f;

lib/libc/locale/utf8.c

475

mask = 0x07;

lib/libc/locale/utf8.c

480

mask = 0x03;

lib/libc/locale/utf8.c

485

mask = 0x01;

lib/libc/locale/utf8.c

509

wch = ch & mask;

lib/libc/locale/xlocale.c

238

locale_t newlocale(int mask, const char *locale, locale_t base)

lib/libc/locale/xlocale.c

299

if (mask & 1) {

lib/libc/locale/xlocale.c

323

mask >>= 1;

lib/libc/locale/xlocale.c

375

const char *querylocale(int mask, locale_t loc)

lib/libc/locale/xlocale.c

377

int type = ffs(mask) - 1;

lib/libc/nameser/ns_parse.c

71

return(((handle)._flags & _ns_flagdata[flag].mask) >> _ns_flagdata[flag].shift);

lib/libc/net/getaddrinfo.c

1943

(sin->sin_addr.s_addr & res->sort_list[j].mask))

lib/libc/net/gethostbydns.c

704

(((struct in_addr *)(*p))->s_addr & res->sort_list[j].mask))

lib/libc/net/name6.c

599

mp = (u_char *)&statp->_u._ext.ext->sort_list[j].mask;

lib/libc/net/name6.c

602

mp = (u_char *)&statp->sort_list[j].mask;

lib/libc/resolv/res_debug.c

134

u_long mask;

lib/libc/resolv/res_debug.c

137

for (mask = 1; mask != 0U; mask <<= 1)

lib/libc/resolv/res_debug.c

138

if (statp->options & mask)

lib/libc/resolv/res_debug.c

139

fprintf(file, " %s", p_option(mask));

lib/libc/resolv/res_init.c

429

statp->sort_list[nsort].mask = a.s_addr;

lib/libc/resolv/res_init.c

431

statp->sort_list[nsort].mask =

lib/libc/resolv/res_init.c

435

statp->sort_list[nsort].mask =

lib/libc/resolv/res_private.h

11

} addr, mask;

lib/libc/rpc/clnt_dg.c

151

sigset_t mask;

lib/libc/rpc/clnt_dg.c

157

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_dg.c

168

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_dg.c

179

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_dg.c

190

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_dg.c

304

sigset_t mask;

lib/libc/rpc/clnt_dg.c

313

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_dg.c

520

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

538

sigset_t mask;

lib/libc/rpc/clnt_dg.c

542

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_dg.c

549

thr_sigsetmask(SIG_SETMASK, &mask, NULL);

lib/libc/rpc/clnt_dg.c

565

sigset_t mask;

lib/libc/rpc/clnt_dg.c

570

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_dg.c

583

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

587

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

593

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

599

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

613

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

633

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

696

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

699

release_fd_lock(cu->cu_fd, mask);

lib/libc/rpc/clnt_dg.c

708

sigset_t mask;

lib/libc/rpc/clnt_dg.c

712

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_dg.c

728

thr_sigsetmask(SIG_SETMASK, &mask, NULL);

lib/libc/rpc/clnt_dg.c

736

sigset_t mask;

lib/libc/rpc/clnt_dg.c

742

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_dg.c

753

thr_sigsetmask(SIG_SETMASK, &mask, NULL);

lib/libc/rpc/clnt_dg.c

89

#define release_fd_lock(fd, mask) { \

lib/libc/rpc/clnt_dg.c

93

thr_sigsetmask(SIG_SETMASK, &(mask), NULL); \

lib/libc/rpc/clnt_vc.c

128

#define release_fd_lock(fd, mask) { \

lib/libc/rpc/clnt_vc.c

132

thr_sigsetmask(SIG_SETMASK, &(mask), NULL); \

lib/libc/rpc/clnt_vc.c

164

sigset_t mask;

lib/libc/rpc/clnt_vc.c

183

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_vc.c

193

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_vc.c

205

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_vc.c

225

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_vc.c

232

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_vc.c

237

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_vc.c

317

sigset_t mask, newmask;

lib/libc/rpc/clnt_vc.c

323

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_vc.c

355

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

359

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

363

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

370

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

384

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

391

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

422

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

444

sigset_t mask;

lib/libc/rpc/clnt_vc.c

453

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_vc.c

460

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_vc.c

477

sigset_t mask;

lib/libc/rpc/clnt_vc.c

486

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_vc.c

500

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

504

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

512

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

518

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

538

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

592

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

595

release_fd_lock(ct->ct_fd, mask);

lib/libc/rpc/clnt_vc.c

605

sigset_t mask;

lib/libc/rpc/clnt_vc.c

613

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_vc.c

626

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/clnt_vc.c

724

sigset_t mask, newmask;

lib/libc/rpc/clnt_vc.c

729

thr_sigsetmask(SIG_SETMASK, &newmask, &mask);

lib/libc/rpc/clnt_vc.c

740

thr_sigsetmask(SIG_SETMASK, &(mask), NULL);

lib/libc/rpc/svc.c

516

fd_mask mask, *maskp;

lib/libc/rpc/svc.c

523

for (mask = *maskp++; (bit = ffs(mask)) != 0;

lib/libc/rpc/svc.c

524

mask ^= (1 << (bit - 1))) {

lib/libc/secure/stack_protector.c

76

sigset_t mask;

lib/libc/secure/stack_protector.c

79

sigfillset(&mask);

lib/libc/secure/stack_protector.c

80

sigdelset(&mask, SIGABRT);

lib/libc/secure/stack_protector.c

81

_sigprocmask(SIG_BLOCK, &mask, NULL);

lib/libc/stdlib/dmalloc.c

1023

slab = (void *)((uintptr_t)ptr & region->mask);

lib/libc/stdlib/dmalloc.c

1424

if (Regions[ri].mask == region_mask) {

lib/libc/stdlib/dmalloc.c

1437

if (rx < 0 && Regions[ri].mask == 0)

lib/libc/stdlib/dmalloc.c

1439

if (Regions[ri].mask == region_mask) {

lib/libc/stdlib/dmalloc.c

1454

atomic_cmpset_ptr((void **)&Regions[rx].mask,

lib/libc/stdlib/dmalloc.c

1462

if (Regions[ri].mask == region_mask) {

lib/libc/stdlib/dmalloc.c

1471

if (Regions[ri+j].mask != 0)

lib/libc/stdlib/dmalloc.c

1491

if (!atomic_cmpset_ptr((void **)&Regions[rx+j].mask,

lib/libc/stdlib/dmalloc.c

1494

Regions[rx+j].mask = 0;

lib/libc/stdlib/dmalloc.c

180

uintptr_t mask;

lib/libc/stdlib/dmalloc.c

373

Regions[0].mask = -1; /* disallow activity in lowest region */

lib/libc/stdlib/dmalloc.c

970

slab = (void *)((uintptr_t)ptr & region->mask);

lib/libc/string/ffs.c

39

ffs(int mask)

lib/libc/string/ffs.c

43

if (mask == 0)

lib/libc/string/ffs.c

45

for (bit = 1; !(mask & 1); bit++)

lib/libc/string/ffs.c

46

mask = (unsigned int)mask >> 1;

lib/libc/string/ffsl.c

38

ffsl(long mask)

lib/libc/string/ffsl.c

42

if (mask == 0)

lib/libc/string/ffsl.c

44

for (bit = 1; !(mask & 1); bit++)

lib/libc/string/ffsl.c

45

mask = (unsigned long)mask >> 1;

lib/libc/string/ffsll.c

38

ffsll(long long mask)

lib/libc/string/ffsll.c

42

if (mask == 0)

lib/libc/string/ffsll.c

44

for (bit = 1; !(mask & 1); bit++)

lib/libc/string/ffsll.c

45

mask = (unsigned long long)mask >> 1;

lib/libc/string/fls.c

38

fls(int mask)

lib/libc/string/fls.c

42

if (mask == 0)

lib/libc/string/fls.c

44

for (bit = 1; mask != 1; bit++)

lib/libc/string/fls.c

45

mask = (unsigned int)mask >> 1;

lib/libc/string/flsl.c

38

flsl(long mask)

lib/libc/string/flsl.c

42

if (mask == 0)

lib/libc/string/flsl.c

44

for (bit = 1; mask != 1; bit++)

lib/libc/string/flsl.c

45

mask = (unsigned long)mask >> 1;

lib/libc/string/flsll.c

38

flsll(long long mask)

lib/libc/string/flsll.c

42

if (mask == 0)

lib/libc/string/flsll.c

44

for (bit = 1; mask != 1; bit++)

lib/libc/string/flsll.c

45

mask = (unsigned long long)mask >> 1;

lib/libc/sys/sched_getaffinity.c

40

sched_getaffinity(pid_t pid, size_t cpusetsize, cpu_set_t *mask)

lib/libc/sys/sched_getaffinity.c

50

memset(mask, 0, cpusetsize);

lib/libc/sys/sched_getaffinity.c

51

memcpy(mask, &mask1, sizeof(mask1));

lib/libc/sys/sched_getaffinity.c

53

memcpy(mask, &mask1, cpusetsize);

lib/libc/sys/sched_setaffinity.c

40

sched_setaffinity(pid_t pid, size_t cpusetsize, const cpu_set_t *mask)

lib/libc/sys/sched_setaffinity.c

48

memcpy(&mask1, mask, cplen);

lib/libcam/scsi_cmdparse.c

107

static u_char mask[] = {0, 0x01, 0x03, 0x07, 0x0f,

lib/libcam/scsi_cmdparse.c

189

mask[width];

lib/libcam/scsi_cmdparse.c

193

shift, bits, value, width, mask[width]);

lib/libipfw3/basic/ipfw3_basic.c

455

p->mask.s_addr = htonl(0);

lib/libipfw3/basic/ipfw3_basic.c

459

p->mask.s_addr = htonl(~0 << (32 - i));

lib/libipfw3/basic/ipfw3_basic.c

462

p->addr.s_addr &= p->mask.s_addr;

lib/libipfw3/basic/ipfw3_basic.c

465

p->mask.s_addr = htonl(~0);

lib/libipfw3/basic/ipfw3_basic.c

517

p->mask.s_addr = htonl(0);

lib/libipfw3/basic/ipfw3_basic.c

521

p->mask.s_addr = htonl(~0 << (32 - i));

lib/libipfw3/basic/ipfw3_basic.c

524

p->addr.s_addr &= p->mask.s_addr;

lib/libipfw3/basic/ipfw3_basic.c

527

p->mask.s_addr = htonl(~0);

lib/libipfw3/basic/ipfw3_basic.c

771

int mask;

lib/libipfw3/basic/ipfw3_basic.c

778

mask = contigmask((u_char *)&(p->mask.s_addr), 32);

lib/libipfw3/basic/ipfw3_basic.c

779

if (mask < 32)

lib/libipfw3/basic/ipfw3_basic.c

780

printf("/%d", mask);

lib/libipfw3/basic/ipfw3_basic.c

825

int mask;

lib/libipfw3/basic/ipfw3_basic.c

832

mask = contigmask((u_char *)&(p->mask.s_addr), 32);

lib/libipfw3/basic/ipfw3_basic.c

833

if (mask < 32)

lib/libipfw3/basic/ipfw3_basic.c

834

printf("/%d", mask);

lib/libipfw3/layer2/ipfw3_layer2.c

101

get_mac_addr_mask(char *p, u_char *addr, u_char *mask)

lib/libipfw3/layer2/ipfw3_layer2.c

106

addr[i] = mask[i] = 0;

lib/libipfw3/layer2/ipfw3_layer2.c

118

mask[i] = (l >=8) ? 0xff : (~0) << (8-l);

lib/libipfw3/layer2/ipfw3_layer2.c

121

mask[i] = strtol(p, &p, 16);

lib/libipfw3/layer2/ipfw3_layer2.c

127

mask[i] = 0xff;

lib/libipfw3/layer2/ipfw3_layer2.c

130

addr[i] &= mask[i];

lib/libipfw3/layer2/ipfw3_layer2.c

161

get_mac_addr_mask(**av, &(mac->addr[6]), &(mac->mask[6]));

lib/libipfw3/layer2/ipfw3_layer2.c

185

get_mac_addr_mask(**av, mac->addr, mac->mask);

lib/libipfw3/layer2/ipfw3_layer2.c

200

get_mac_addr_mask(**av, mac->addr, mac->mask); /* dst */

lib/libipfw3/layer2/ipfw3_layer2.c

202

get_mac_addr_mask(**av, &(mac->addr[6]), &(mac->mask[6])); /* src */

lib/libipfw3/layer2/ipfw3_layer2.c

220

print_mac( m->addr, m->mask);

lib/libipfw3/layer2/ipfw3_layer2.c

221

print_mac( m->addr + 6, m->mask + 6);

lib/libipfw3/layer2/ipfw3_layer2.c

232

print_mac( m->addr + 6, m->mask + 6);

lib/libipfw3/layer2/ipfw3_layer2.c

249

print_mac( m->addr, m->mask);

lib/libipfw3/layer2/ipfw3_layer2.c

81

print_mac(u_char *addr, u_char *mask)

lib/libipfw3/layer2/ipfw3_layer2.c

83

int l = contigmask(mask, 48);

lib/libipfw3/layer2/ipfw3_layer2.c

92

mask[0], mask[1], mask[2],

lib/libipfw3/layer2/ipfw3_layer2.c

93

mask[3], mask[4], mask[5]);

lib/libnvmm/libnvmm_x86.c

3267

val = __SHIFTOUT(val, instr->src.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3288

val = __SHIFTOUT(val, instr->dst.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3310

val = __SHIFTIN(val, instr->dst.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3311

state->gprs[instr->dst.u.reg->num] &= ~instr->dst.u.reg->mask;

lib/libnvmm/libnvmm_x86.c

3325

val = __SHIFTIN(val, instr->src.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3326

state->gprs[instr->src.u.reg->num] &= ~instr->src.u.reg->mask;

lib/libnvmm/libnvmm_x86.c

562

uint64_t mask, cnt;

lib/libnvmm/libnvmm_x86.c

564

mask = size_to_mask(adsize);

lib/libnvmm/libnvmm_x86.c

565

cnt = state->gprs[NVMM_X64_GPR_RCX] & mask;

lib/libnvmm/libnvmm_x86.c

573

uint64_t mask;

lib/libnvmm/libnvmm_x86.c

576

mask = size_to_mask(adsize);

lib/libnvmm/libnvmm_x86.c

577

state->gprs[NVMM_X64_GPR_RCX] &= ~mask;

lib/libnvmm/libnvmm_x86.c

977

uint64_t mask;

lib/libssh/openbsd-compat/openssl-compat.c

45

long mask, hfix, lfix;

lib/libssh/openbsd-compat/openssl-compat.c

53

mask = 0xfffff00fL; /* major,minor,fix,status */

lib/libssh/openbsd-compat/openssl-compat.c

54

return (headerver & mask) == (libver & mask);

lib/libssh/openbsd-compat/openssl-compat.c

61

mask = 0xfff0000fL; /* major,minor,status */

lib/libssh/openbsd-compat/openssl-compat.c

64

if ( (headerver & mask) == (libver & mask) && lfix >= hfix)

lib/libtelnet/auth.c

263

int i, mask = -1;

lib/libtelnet/auth.c

270

mask = 0;

lib/libtelnet/auth.c

272

if ((mask & (i = typemask(ap->type))) != 0)

lib/libtelnet/auth.c

274

mask |= i;

lib/libtelnet/auth.c

280

if (!getauthmask(type, &mask)) {

lib/libtelnet/auth.c

285

i_wont_support &= ~mask;

lib/libtelnet/auth.c

287

i_wont_support |= mask;

lib/libtelnet/auth.c

306

int i, mask;

lib/libtelnet/auth.c

313

mask = 0;

lib/libtelnet/auth.c

315

if ((mask & (i = typemask(ap->type))) != 0)

lib/libtelnet/auth.c

317

mask |= i;

lib/libthread_db/libthread_xu.c

351

td_thr_events_t mask;

lib/libthread_db/libthread_xu.c

355

ret = ps_pread(ta->ph, ta->thread_event_mask_addr, &mask,

lib/libthread_db/libthread_xu.c

356

sizeof(mask));

lib/libthread_db/libthread_xu.c

359

mask |= *events;

lib/libthread_db/libthread_xu.c

360

ret = ps_pwrite(ta->ph, ta->thread_event_mask_addr, &mask,

lib/libthread_db/libthread_xu.c

361

sizeof(mask));

lib/libthread_db/libthread_xu.c

368

td_thr_events_t mask;

lib/libthread_db/libthread_xu.c

372

ret = ps_pread(ta->ph, ta->thread_event_mask_addr, &mask,

lib/libthread_db/libthread_xu.c

373

sizeof(mask));

lib/libthread_db/libthread_xu.c

376

mask &= ~*events;

lib/libthread_db/libthread_xu.c

377

ret = ps_pwrite(ta->ph, ta->thread_event_mask_addr, &mask,

lib/libthread_db/libthread_xu.c

378

sizeof(mask));

lib/libthread_db/libthread_xu.c

594

td_thr_events_t mask;

lib/libthread_db/libthread_xu.c

599

&mask, sizeof(mask));

lib/libthread_db/libthread_xu.c

600

mask |= *setp;

lib/libthread_db/libthread_xu.c

602

&mask, sizeof(mask));

lib/libthread_db/libthread_xu.c

610

td_thr_events_t mask;

lib/libthread_db/libthread_xu.c

615

&mask, sizeof(mask));

lib/libthread_db/libthread_xu.c

616

mask &= ~*setp;

lib/libthread_db/libthread_xu.c

618

&mask, sizeof(mask));

lib/libthread_xu/thread/thr_affinity.c

42

cpu_set_t *mask)

lib/libthread_xu/thread/thr_affinity.c

69

memset(mask, 0, cpusetsize);

lib/libthread_xu/thread/thr_affinity.c

70

memcpy(mask, &mask1, sizeof(mask1));

lib/libthread_xu/thread/thr_affinity.c

72

memcpy(mask, &mask1, cpusetsize);

lib/libthread_xu/thread/thr_affinity.c

80

const cpu_set_t *mask)

lib/libthread_xu/thread/thr_affinity.c

90

memcpy(&mask1, mask, cplen);

lib/libthread_xu/thread/thr_attr.c

103

if (attr == NULL || *attr == NULL || mask == NULL)

lib/libthread_xu/thread/thr_attr.c

119

memset(mask, 0, cpusetsize);

lib/libthread_xu/thread/thr_attr.c

120

memcpy(mask, ret, sizeof(*ret));

lib/libthread_xu/thread/thr_attr.c

122

memcpy(mask, ret, cpusetsize);

lib/libthread_xu/thread/thr_attr.c

324

const cpu_set_t *mask)

lib/libthread_xu/thread/thr_attr.c

329

if (attr == NULL || *attr == NULL || mask == NULL)

lib/libthread_xu/thread/thr_attr.c

335

memcpy(&mask1, mask, cplen);

lib/libthread_xu/thread/thr_attr.c

98

cpu_set_t *mask)

lib/libthread_xu/thread/thr_syscalls.c

456

const sigset_t *mask)

lib/libthread_xu/thread/thr_syscalls.c

463

ret = __sys_ppoll(fds, nfds, ts, mask);

lib/libthread_xu/thread/thr_syscalls.c

473

const struct timespec *timo, const sigset_t *mask)

lib/libthread_xu/thread/thr_syscalls.c

480

ret = __sys_pselect(count, rfds, wfds, efds, timo, mask);

lib/libu4bhid/data.c

103

mask = (1 << hsize) - 1;

lib/libu4bhid/data.c

104

data &= mask;

lib/libu4bhid/data.c

106

mask = ~0;

lib/libu4bhid/data.c

109

mask <<= (hpos % 8);

lib/libu4bhid/data.c

110

mask = ~mask;

lib/libu4bhid/data.c

116

buf[offs + i] = (buf[offs + i] & (mask >> (i*8))) |

lib/libu4bhid/data.c

88

uint32_t mask;

lib/libu4bhid/parse.c

216

int32_t mask;

lib/libu4bhid/parse.c

286

mask = 0;

lib/libu4bhid/parse.c

290

mask = 0xFF;

lib/libu4bhid/parse.c

296

mask = 0xFFFF;

lib/libu4bhid/parse.c

303

mask = 0xFFFFFFFF;

lib/libu4bhid/parse.c

393

s->loc_size = dval & mask;

lib/libu4bhid/parse.c

396

hid_switch_rid(s, c, dval & mask);

lib/libu4bhid/parse.c

400

s->loc_count = dval & mask;

lib/libu4bhid/parse.c

432

dval = (dval & mask) | c->_usage_page;

lib/libu4bhid/parse.c

451

dval = (dval & mask) | c->_usage_page;

lib/libu4bhid/parse.c

459

dval = (dval & mask) | c->_usage_page;

lib/libvgl/bitmap.c

101

VGLPlane[i][planepos] |= dst->Bitmap[pos+planepos] & mask[end_offset];

lib/libvgl/bitmap.c

103

VGLPlane[i][0] |= dst->Bitmap[pos] & ~mask[start_offset];

lib/libvgl/bitmap.c

108

VGLPlane[i][planepos] |= dst->Bitmap[offset] & mask[end_offset];

lib/libvgl/bitmap.c

112

VGLPlane[i][0] |= dst->Bitmap[offset] & ~mask[start_offset];

lib/libvgl/bitmap.c

39

static byte mask[8] = {0xff, 0x7f, 0x3f, 0x1f, 0x0f, 0x07, 0x03, 0x01};

lib/libvgl/simple.c

114

mask = 0x80 >> (x%8);

lib/libvgl/simple.c

117

color |= (object->Bitmap[offset] & mask) ? (1 << i) : 0;

lib/libvgl/simple.c

89

byte mask;

libexec/bootpd/lookup.h

7

extern int lookup_netmask(u_int32 addr, u_int32 *mask);

libexec/telnetd/sys_term.c

1315

sigset_t mask;

libexec/telnetd/sys_term.c

1323

sigfillset(&mask);

libexec/telnetd/sys_term.c

1324

sigprocmask(SIG_SETMASK, &mask, NULL);

sbin/adjkerntz/adjkerntz.c

116

sigemptyset(&mask);

sbin/adjkerntz/adjkerntz.c

118

sigaddset(&mask, SIGTERM);

sbin/adjkerntz/adjkerntz.c

130

sigprocmask(SIG_BLOCK, &mask, NULL);

sbin/adjkerntz/adjkerntz.c

190

sigprocmask(SIG_UNBLOCK, &mask, NULL);

sbin/adjkerntz/adjkerntz.c

242

sigprocmask(SIG_UNBLOCK, &mask, NULL);

sbin/adjkerntz/adjkerntz.c

87

sigset_t mask, emask;

sbin/dhclient/dhclient.c

2055

in_addr_t addr, mask;

sbin/dhclient/dhclient.c

2088

mask = (in_addr_t)(~0) << (32 - width);

sbin/dhclient/dhclient.c

2090

mask = ntohl(mask);

sbin/dhclient/dhclient.c

2099

if ((addr & mask) != addr) {

sbin/dhclient/dhclient.c

2100

addr &= mask;

sbin/dhclient/inet.c

52

subnet_number(struct iaddr addr, struct iaddr mask)

sbin/dhclient/inet.c

60

if (addr.len != mask.len)

sbin/dhclient/inet.c

65

rv.iabuf[i] = addr.iabuf[i] & mask.iabuf[i];

sbin/dhclient/inet.c

75

broadcast_addr(struct iaddr subnet, struct iaddr mask)

sbin/dhclient/inet.c

80

if (subnet.len != mask.len) {

sbin/dhclient/inet.c

86

rv.iabuf[i] = subnet.iabuf[i] | (~mask.iabuf[i] & 255);

sbin/dump/cache.c

110

off_t mask;

sbin/dump/cache.c

128

mask = ~(off_t)(BlockSize - 1);

sbin/dump/cache.c

130

((offset ^ (offset + nbytes - 1)) & mask) != 0) {

sbin/dump/cache.c

143

if (((blk->b_Offset ^ offset) & mask) == 0)

sbin/dump/cache.c

151

blk->b_Offset = offset & mask;

sbin/growfs/growfs.c

1728

unsigned char mask;

sbin/growfs/growfs.c

1737

mask = 0x0f << ((h & 0x1) << 2);

sbin/growfs/growfs.c

1739

return ((cp[h >> 1] & mask) == mask);

sbin/growfs/growfs.c

1741

mask = 0x03 << ((h & 0x3) << 1);

sbin/growfs/growfs.c

1743

return ((cp[h >> 2] & mask) == mask);

sbin/growfs/growfs.c

1745

mask = 0x01 << (h & 0x7);

sbin/growfs/growfs.c

1747

return ((cp[h >> 3] & mask) == mask);

sbin/hammer/test_dupkey.c

24

uint32_t mask;

sbin/hammer/test_dupkey.c

34

mask = 1 << (key & 31);

sbin/hammer/test_dupkey.c

35

if (*ptr & mask)

sbin/hammer/test_dupkey.c

37

*ptr |= mask;

sbin/hammer2/cmd_debug.c

1269

hammer2_bitmap_t mask;

sbin/hammer2/cmd_debug.c

1271

mask = 0x03; /* 2 bits per 16KB */

sbin/hammer2/cmd_debug.c

1273

if ((bm & mask) == value16)

sbin/hammer2/cmd_debug.c

1279

mask = 0xFF; /* 8 bits per 64KB chunk */

sbin/hammer2/cmd_debug.c

1281

if ((bm & mask) == value64)

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

206

mask = used - 1; /* mask for comparing low */

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

258

if (len > root && (huff & mask) != low) {

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

283

low = huff & mask;

sbin/hammer2/zlib/hammer2_zlib_inftrees.c

50

unsigned mask; /* mask for low root bits */

sbin/init/init.c

1190

sigset_t mask;

sbin/init/init.c

1203

sigemptyset(&mask);

sbin/init/init.c

1204

sigprocmask(SIG_SETMASK, &mask, NULL);

sbin/init/init.c

1234

sigset_t mask;

sbin/init/init.c

1270

sigemptyset(&mask);

sbin/init/init.c

1271

sigprocmask(SIG_SETMASK, &mask, NULL);

sbin/init/init.c

223

sigset_t mask;

sbin/init/init.c

338

sigfillset(&mask);

sbin/init/init.c

339

delset(&mask, SIGABRT, SIGFPE, SIGILL, SIGSEGV, SIGBUS, SIGSYS,

sbin/init/init.c

342

sigprocmask(SIG_SETMASK, &mask, NULL);

sbin/init/init.c

641

sigset_t mask;

sbin/init/init.c

718

sigemptyset(&mask);

sbin/init/init.c

719

sigprocmask(SIG_SETMASK, &mask, NULL);

sbin/ip6fw/ip6fw.c

550

fill_ip6(struct in6_addr *ipno, struct in6_addr *mask, int *acp, char ***avp)

sbin/ip6fw/ip6fw.c

558

*ipno = *mask = in6addr_any; av++; ac--;

sbin/ip6fw/ip6fw.c

571

*mask = in6addr_any;

sbin/ip6fw/ip6fw.c

575

*mask = *(plen2mask(atoi(p)));

sbin/ip6fw/ip6fw.c

579

*mask = *(plen2mask(128));

sbin/ip6fw/ip6fw.c

583

ipno->s6_addr[i] &= mask->s6_addr[i];

sbin/ipfw/ipfw2.c

1017

print_mac( m->addr, m->mask);

sbin/ipfw/ipfw2.c

1018

print_mac( m->addr + 6, m->mask + 6);

sbin/ipfw/ipfw2.c

1889

cmd1->mask.s_addr = 0;

sbin/ipfw/ipfw2.c

1922

if (!inet_aton(p, &cmd->mask))

sbin/ipfw/ipfw2.c

1928

cmd->mask.s_addr = htonl(0);

sbin/ipfw/ipfw2.c

1932

cmd->mask.s_addr = htonl(~0U << (32 - i));

sbin/ipfw/ipfw2.c

1935

cmd->mask.s_addr = htonl(~0);

sbin/ipfw/ipfw2.c

1938

cmd->addr.s_addr &= cmd->mask.s_addr;

sbin/ipfw/ipfw2.c

1950

int ii = contigmask((u_char *)&(cmd->mask), 32);

sbin/ipfw/ipfw2.c

1959

d = (u_int32_t *)&cmd->mask;

sbin/ipfw/ipfw2.c

1988

if (cmd->mask.s_addr == 0) { /* any */

sbin/ipfw/ipfw2.c

1993

} else if (cmd->mask.s_addr == IP_MASK_ALL) /* one IP */

sbin/ipfw/ipfw2.c

2465

get_mac_addr_mask(char *p, u_char *addr, u_char *mask)

sbin/ipfw/ipfw2.c

2470

addr[i] = mask[i] = 0;

sbin/ipfw/ipfw2.c

2482

mask[i] = (l >=8) ? 0xff : (~0U) << (8-l);

sbin/ipfw/ipfw2.c

2485

mask[i] = strtol(p, &p, 16);

sbin/ipfw/ipfw2.c

2491

mask[i] = 0xff;

sbin/ipfw/ipfw2.c

2494

addr[i] &= mask[i];

sbin/ipfw/ipfw2.c

2538

get_mac_addr_mask(av[0], mac->addr, mac->mask); /* dst */

sbin/ipfw/ipfw2.c

2539

get_mac_addr_mask(av[1], &(mac->addr[6]), &(mac->mask[6])); /* src */

sbin/ipfw/ipfw2.c

3687

in_addr_t addr, mask = 0;

sbin/ipfw/ipfw2.c

3704

mask = 0xffffffff << (32 - bits);

sbin/ipfw/ipfw2.c

3706

mask = 0;

sbin/ipfw/ipfw2.c

3708

mask = IN_CLASSA_NET;

sbin/ipfw/ipfw2.c

3710

mask = IN_CLASSB_NET;

sbin/ipfw/ipfw2.c

3712

mask = IN_CLASSC_NET;

sbin/ipfw/ipfw2.c

3714

mask = IN_CLASSD_NET;

sbin/ipfw/ipfw2.c

3716

mask = 0xffffffff;

sbin/ipfw/ipfw2.c

3722

if (mask != 0xffffffff) {

sbin/ipfw/ipfw2.c

3723

in_mask->sin_addr.s_addr = htonl(mask);

sbin/ipfw/ipfw2.c

3895

struct sockaddr_in mask;

sbin/ipfw/ipfw2.c

3898

memset(&mask, 0, sizeof(mask));

sbin/ipfw/ipfw2.c

3899

memcpy(&mask, &te->netmask,

sbin/ipfw/ipfw2.c

685

d = (u_int32_t *)&(cmd->mask);

sbin/ipfw/ipfw2.c

697

mb = contigmask((u_char *)&(cmd->mask.s_addr), 32);

sbin/ipfw/ipfw2.c

708

printf(":%s", inet_ntoa(cmd->mask));

sbin/ipfw/ipfw2.c

718

print_mac(u_char *addr, u_char *mask)

sbin/ipfw/ipfw2.c

720

int l = contigmask(mask, 48);

sbin/ipfw/ipfw2.c

729

mask[0], mask[1], mask[2],

sbin/ipfw/ipfw2.c

730

mask[3], mask[4], mask[5]);

sbin/mount_msdos/mount_msdos.c

112

args.mask = a_mask(optarg);

sbin/mount_msdos/mount_msdos.c

148

args.dirmask = args.mask;

sbin/mount_msdos/mount_msdos.c

152

args.mask = args.dirmask;

sbin/mount_msdos/mount_msdos.c

197

args.mask = args.dirmask =

sbin/mountd/mountd.c

2627

u_char *mask;

sbin/mountd/mountd.c

2630

if ((mask = sa_rawaddr(sa, &len)) == NULL)

sbin/mountd/mountd.c

2634

if (mask[i] != 0xff)

sbin/mountd/mountd.c

2637

if (~mask[i] & (u_char)(~mask[i] + 1))

sbin/mountd/mountd.c

2642

if (mask[i] != 0)

sbin/mountd/mountd.c

2655

unsigned char *p1, *p2, *mask;

sbin/mountd/mountd.c

2677

(mask = sa_rawaddr(samask, NULL)) == NULL)

sbin/mountd/mountd.c

2681

if ((p1[i] & mask[i]) != (p2[i] & mask[i]))

sbin/newfs/mkfs.c

1324

unsigned char mask;

sbin/newfs/mkfs.c

1330

mask = 0x0f << ((h & 0x1) << 2);

sbin/newfs/mkfs.c

1331

return ((cp[h >> 1] & mask) == mask);

sbin/newfs/mkfs.c

1333

mask = 0x03 << ((h & 0x3) << 1);

sbin/newfs/mkfs.c

1334

return ((cp[h >> 2] & mask) == mask);

sbin/newfs/mkfs.c

1336

mask = 0x01 << (h & 0x7);

sbin/newfs/mkfs.c

1337

return ((cp[h >> 3] & mask) == mask);

sbin/rcorder/hash.c

116

t->mask = i - 1;

sbin/rcorder/hash.c

195

for (e = t->bucketPtr[h & t->mask]; e != NULL; e = e->next)

sbin/rcorder/hash.c

245

for (e = t->bucketPtr[h & t->mask]; e != NULL; e = e->next) {

sbin/rcorder/hash.c

261

hp = &t->bucketPtr[h & t->mask];

sbin/rcorder/hash.c

297

for (hp = &t->bucketPtr[e->namehash & t->mask];

sbin/rcorder/hash.c

414

int i, mask;

sbin/rcorder/hash.c

422

t->mask = mask = i - 1;

sbin/rcorder/hash.c

429

xp = &t->bucketPtr[e->namehash & mask];

sbin/rcorder/hash.h

71

int mask; /* Used to select bits for hashing. */

sbin/route/route.c

1614

struct sockaddr *dst = NULL, *gate = NULL, *mask = NULL;

sbin/route/route.c

1648

mask = sa;

sbin/route/route.c

1658

if (dst != NULL && mask != NULL)

sbin/route/route.c

1659

mask->sa_family = dst->sa_family; /* XXX */

sbin/route/route.c

1662

if (mask != NULL) {

sbin/route/route.c

1666

printf(" mask: %s\n", routename(mask));

sbin/route/route.c

474

u_long net, mask;

sbin/route/route.c

489

mask = IN_CLASSA_NET;

sbin/route/route.c

492

mask = IN_CLASSB_NET;

sbin/route/route.c

495

mask = IN_CLASSC_NET;

sbin/route/route.c

504

while (in.s_addr &~ mask)

sbin/route/route.c

505

mask |= mask >> subnetshift;

sbin/route/route.c

506

net = in.s_addr & mask;

sbin/route/route.c

507

while ((mask & 1) == 0)

sbin/route/route.c

508

mask >>= 1, net >>= 1;

sbin/route/route.c

909

u_long addr, mask = 0;

sbin/route/route.c

927

mask = 0xffffffff << (32 - bits);

sbin/route/route.c

929

mask = 0;

sbin/route/route.c

931

mask = IN_CLASSA_NET;

sbin/route/route.c

933

mask = IN_CLASSB_NET;

sbin/route/route.c

935

mask = IN_CLASSC_NET;

sbin/route/route.c

937

mask = IN_CLASSD_NET;

sbin/route/route.c

939

mask = 0xffffffff;

sbin/route/route.c

943

in->sin_addr.s_addr = htonl(mask);

sbin/routed/defs.h

402

naddr mask;

sbin/routed/defs.h

594

#define on_net(a,net,mask) (((ntohl(a) ^ (net)) & (mask)) == 0)

sbin/routed/if.c

296

naddr mask = 0;

sbin/routed/if.c

299

return mask;

sbin/routed/if.c

306

mask = ifp->int_ripv1_mask;

sbin/routed/if.c

317

&& ifp->int_ripv1_mask > mask

sbin/routed/if.c

319

mask = ifp->int_ripv1_mask;

sbin/routed/if.c

325

if (mask == 0) {

sbin/routed/if.c

328

&& r1p->r1net_mask > mask)

sbin/routed/if.c

329

mask = r1p->r1net_mask;

sbin/routed/if.c

334

if (mask == 0)

sbin/routed/if.c

335

mask = std_mask(addr);

sbin/routed/if.c

338

return mask;

sbin/routed/if.c

346

naddr mask = ripv1_mask_net(addr, ifp);

sbin/routed/if.c

352

if ((ntohl(addr) & ~mask) != 0)

sbin/routed/if.c

353

mask = HOST_MASK;

sbin/routed/if.c

354

return mask;

sbin/routed/if.c

382

naddr mask, /* mask, so host byte order */

sbin/routed/if.c

388

if (ifp->int_mask != mask)

sbin/routed/if.c

401

if (on_net(ifp->int_dstaddr, ntohl(dstaddr),mask))

sbin/routed/input.c

141

naddr gate, mask, v1_mask, dst, ddst_h = 0;

sbin/routed/input.c

373

|| 0 == (mask = ntohl(n->n_mask))

sbin/routed/input.c

374

|| 0 != (ntohl(dst) & ~mask))

sbin/routed/input.c

375

mask = ripv1_mask_host(dst, aifp);

sbin/routed/input.c

378

rt = rtget(dst, mask);

sbin/routed/input.c

383

v12buf.n->n_mask = mask;

sbin/routed/input.c

401

v12buf.n->n_mask = mask;

sbin/routed/input.c

635

|| 0 == (mask = ntohl(n->n_mask))) {

sbin/routed/input.c

636

mask = ripv1_mask_host(dst,aifp);

sbin/routed/input.c

637

} else if ((ntohl(dst) & ~mask) != 0) {

sbin/routed/input.c

642

(u_long)mask,

sbin/routed/input.c

656

if (tg && (tn = tg->tgate_nets)->mask != 0) {

sbin/routed/input.c

658

if (on_net(dst, tn->net, tn->mask)

sbin/routed/input.c

659

&& tn->mask <= mask)

sbin/routed/input.c

662

if (i >= MAX_TGATE_NETS || tn->mask == 0) {

sbin/routed/input.c

664

addrname(dst,mask,0));

sbin/routed/input.c

701

&& (((rt = rtget(dst,mask)) == NULL

sbin/routed/input.c

703

&& (v1_mask = ripv1_mask_net(dst,0)) > mask) {

sbin/routed/input.c

705

i = (v1_mask & ~mask)/ddst_h;

sbin/routed/input.c

713

addrname(dst,mask,0),

sbin/routed/input.c

718

mask = v1_mask;

sbin/routed/input.c

733

input_route(dst, mask, &new, n);

sbin/routed/input.c

749

naddr mask,

sbin/routed/input.c

773

rt = rtget(dst, mask);

sbin/routed/input.c

792

rtadd(dst, mask, 0, new);

sbin/routed/output.c

337

naddr mask, v1_mask, dst_h, ddst_h = 0;

sbin/routed/output.c

349

mask = ag->ag_mask;

sbin/routed/output.c

362

|| ((ag->ag_state & AGS_RIPV2) && v1_mask != mask)) {

sbin/routed/output.c

374

if (v1_mask > mask

sbin/routed/output.c

375

&& mask + (mask & -mask) == 0) {

sbin/routed/output.c

377

i = (v1_mask & ~mask)/ddst_h;

sbin/routed/output.c

386

addrname(htonl(dst_h), mask,

sbin/routed/output.c

394

mask = v1_mask;

sbin/routed/output.c

423

wb->n->n_mask = htonl(mask);

sbin/routed/parms.c

576

naddr addr, mask;

sbin/routed/parms.c

675

if (!getnet(val0, &addr, &mask)

sbin/routed/parms.c

679

parm.parm_mask = mask;

sbin/routed/parms.c

798

&tg->tgate_nets[i].mask)

sbin/routed/parms.c

800

|| tg->tgate_nets[i].mask == 0)

sbin/routed/parms.c

909

naddr mask; /* in host byte order */

sbin/routed/parms.c

948

mask = std_mask(htonl(in.s_addr));

sbin/routed/parms.c

949

if ((~mask & in.s_addr) != 0)

sbin/routed/parms.c

950

mask = HOST_MASK;

sbin/routed/parms.c

952

mask = (naddr)strtoul(mname, &p, 0);

sbin/routed/parms.c

953

if (*p != '\0' || mask > 32)

sbin/routed/parms.c

955

if (mask != 0)

sbin/routed/parms.c

956

mask = HOST_MASK << (32-mask);

sbin/routed/parms.c

960

if (mask != 0 && in.s_addr == RIP_DEFAULT)

sbin/routed/parms.c

963

if ((~mask & in.s_addr) != 0)

sbin/routed/parms.c

966

if ((mask & in.s_addr) == 0 && in.s_addr != RIP_DEFAULT)

sbin/routed/parms.c

974

*maskp = mask;

sbin/routed/rtquery/rtquery.c

575

u_int mask, dmask;

sbin/routed/rtquery/rtquery.c

624

mask = ntohl(n->n_mask);

sbin/routed/rtquery/rtquery.c

625

dmask = mask & -mask;

sbin/routed/rtquery/rtquery.c

626

if (mask != 0) {

sbin/routed/rtquery/rtquery.c

629

sprintf(sp," mask=%#x ? ",mask);

sbin/routed/rtquery/rtquery.c

630

mask = 0;

sbin/routed/rtquery/rtquery.c

631

} else if (mask + dmask == 0) {

sbin/routed/rtquery/rtquery.c

634

&& ((1<<i)&mask) == 0);

sbin/routed/rtquery/rtquery.c

639

sprintf(sp," (mask %#x)", mask);

sbin/routed/rtquery/rtquery.c

644

if (mask == 0) {

sbin/routed/rtquery/rtquery.c

645

mask = std_mask(in.s_addr);

sbin/routed/rtquery/rtquery.c

646

if ((ntohl(in.s_addr) & ~mask) != 0)

sbin/routed/rtquery/rtquery.c

647

mask = 0;

sbin/routed/rtquery/rtquery.c

657

if ((in.s_addr & ~mask) == 0) {

sbin/routed/rtquery/rtquery.c

666

&& ((in.s_addr & ~mask) != 0

sbin/routed/rtquery/rtquery.c

667

|| mask == 0xffffffff)) {

sbin/routed/rtquery/rtquery.c

774

u_int mask;

sbin/routed/rtquery/rtquery.c

802

mask = std_mask(in.s_addr);

sbin/routed/rtquery/rtquery.c

803

if ((~mask & in.s_addr) != 0)

sbin/routed/rtquery/rtquery.c

804

mask = 0xffffffff;

sbin/routed/rtquery/rtquery.c

806

mask = (u_int)strtoul(mname, &p, 0);

sbin/routed/rtquery/rtquery.c

807

if (*p != '\0' || mask > 32)

sbin/routed/rtquery/rtquery.c

809

mask = 0xffffffff << (32-mask);

sbin/routed/rtquery/rtquery.c

814

rt->n_mask = htonl(mask);

sbin/routed/table.c

1130

naddr mask, gate;

sbin/routed/table.c

1218

mask = ((INFO_MASK(&info) != 0)

sbin/routed/table.c

1225

addrname(S_ADDR(INFO_DST(&info)), mask, 0));

sbin/routed/table.c

1268

del_static(S_ADDR(INFO_DST(&info)), mask,

sbin/routed/table.c

1514

naddr mask,

sbin/routed/table.c

1528

k = kern_find(dst, mask, 0);

sbin/routed/table.c

1538

rt = rtget(dst, mask);

sbin/routed/table.c

1620

rtget(naddr dst, naddr mask)

sbin/routed/table.c

1625

mask_sock.sin_addr.s_addr = htonl(mask);

sbin/routed/table.c

1628

if (!rt || rt->rt_dst != dst || rt->rt_mask != mask)

sbin/routed/table.c

1649

naddr mask,

sbin/routed/table.c

1667

if (mask != HOST_MASK) {

sbin/routed/table.c

1669

if ((smask & ~mask) == 0 && mask > smask)

sbin/routed/table.c

1672

mask_sock.sin_addr.s_addr = htonl(mask);

sbin/routed/table.c

1674

rt->rt_mask = mask;

sbin/routed/table.c

1692

naddr_ntoa(dst), (u_long)mask);

sbin/routed/table.c

273

naddr mask,

sbin/routed/table.c

294

if ((mask & -mask) + mask != 0) {

sbin/routed/table.c

298

nc_ag.ag_mask = mask;

sbin/routed/table.c

315

if (ag->ag_mask >= mask)

sbin/routed/table.c

369

&& ag->ag_mask == mask

sbin/routed/table.c

370

&& ((ag->ag_dst_h ^ dst) & (mask<<1)) == 0) {

sbin/routed/table.c

532

mask <<= 1;

sbin/routed/table.c

533

dst &= mask;

sbin/routed/table.c

552

&& ag->ag_mask < mask) {

sbin/routed/table.c

559

if (ag != NULL && ag->ag_mask == mask) {

sbin/routed/table.c

583

nag->ag_mask = mask;

sbin/routed/table.c

669

naddr mask,

sbin/routed/table.c

681

# define ARGS rtm_type_name(action), rtname(dst,mask,gate), metric, flags

sbin/routed/table.c

701

if (mask == HOST_MASK) {

sbin/routed/table.c

706

w.w_mask.sin_addr.s_addr = htonl(mask);

sbin/routed/table.c

766

kern_find(naddr dst, naddr mask, struct khash ***ppk)

sbin/routed/table.c

770

for (pk = &KHASH(dst,mask); (k = *pk) != NULL; pk = &k->k_next) {

sbin/routed/table.c

771

if (k->k_dst == dst && k->k_mask == mask)

sbin/routed/table.c

781

kern_add(naddr dst, naddr mask)

sbin/routed/table.c

785

k = kern_find(dst, mask, &pk);

sbin/routed/table.c

793

k->k_mask = mask;

sbin/routed/table.c

871

naddr mask;

sbin/routed/table.c

875

mask = HOST_MASK;

sbin/routed/table.c

877

mask = ntohl(S_ADDR(INFO_MASK(info)));

sbin/routed/table.c

883

k = kern_add(S_ADDR(INFO_DST(info)), mask);

sbin/routed/table.c

959

addrname(S_ADDR(INFO_DST(info)), mask, 0),

sbin/routed/trace.c

414

naddr mask,

sbin/routed/trace.c

429

if (force == 1 || (force == 0 && mask != std_mask(addr))) {

sbin/routed/trace.c

432

dmask = mask & -mask;

sbin/routed/trace.c

433

if (mask + dmask == 0) {

sbin/routed/trace.c

434

for (i = 0; i != 32 && ((1<<i) & mask) == 0; i++)

sbin/routed/trace.c

439

sprintf(sp, " (mask %#x)", (u_int)mask);

sbin/routed/trace.c

562

naddr mask,

sbin/routed/trace.c

569

i = sprintf(buf, "%-16s-->", addrname(dst, mask, 0));

sbin/slattach/slattach.c

221

sigset_t mask;

sbin/slattach/slattach.c

222

sigemptyset(&mask);

sbin/slattach/slattach.c

223

sigsuspend(&mask);

stand/boot/efi/libefi/efinet.c

220

UINT32 mask = EFI_SIMPLE_NETWORK_RECEIVE_UNICAST |

stand/boot/efi/libefi/efinet.c

223

status = net->ReceiveFilters(net, mask, 0, FALSE, 0, 0);

stand/boot/efi/loader/arch/x86_64/framebuffer.c

49

uint32_t mask;

stand/boot/efi/loader/arch/x86_64/framebuffer.c

52

mask = efifb->fb_mask_red | efifb->fb_mask_green |

stand/boot/efi/loader/arch/x86_64/framebuffer.c

54

if (mask == 0)

stand/boot/efi/loader/arch/x86_64/framebuffer.c

56

for (depth = 1; mask != 1; depth++)

stand/boot/efi/loader/arch/x86_64/framebuffer.c

57

mask >>= 1;

stand/boot/efi/loader/bootinfo.c

77

howto |= howto_names[i].mask;

stand/boot/efi/loader/main.c

323

if (howto & howto_names[i].mask)

stand/boot/pc32/libi386/bootinfo.c

103

howto |= howto_names[i].mask;

sys/bus/cam/scsi/scsi_ses.c

903

#define gbit(lv, in, idx, shft, mask) lv = ((in[idx] >> shft) & mask)

sys/bus/isa/isa_common.c

237

find_first_bit(u_int32_t mask)

sys/bus/isa/isa_common.c

239

return ffs(mask) - 1;

sys/bus/isa/isa_common.c

246

find_next_bit(u_int32_t mask, int bit)

sys/bus/isa/isa_common.c

249

while (bit < 32 && !(mask & (1 << bit)))

sys/bus/isa/isa_common.c

280

u_int32_t mask = config->ic_irqmask[i];

sys/bus/isa/isa_common.c

282

for (irq = find_first_bit(mask);

sys/bus/isa/isa_common.c

284

irq = find_next_bit(mask, irq)) {

sys/bus/isa/isa_common.c

339

u_int32_t mask = config->ic_drqmask[i];

sys/bus/isa/isa_common.c

341

for (drq = find_first_bit(mask);

sys/bus/isa/isa_common.c

343

drq = find_next_bit(mask, drq)) {

sys/bus/ppbus/ppb_1284.c

56

do_1284_wait(device_t bus, char mask, char status)

sys/bus/ppbus/ppb_1284.c

58

return (ppb_poll_bus(bus, 4, mask, status, PPB_NOINTR | PPB_POLL));

sys/bus/ppbus/ppb_1284.c

62

do_peripheral_wait(device_t bus, char mask, char status)

sys/bus/ppbus/ppb_1284.c

64

return (ppb_poll_bus(bus, 100, mask, status, PPB_NOINTR | PPB_POLL));

sys/bus/ppbus/ppb_base.c

54

char mask, char status, int how)

sys/bus/ppbus/ppb_base.c

64

if ((r & mask) == status)

sys/bus/ppbus/ppb_base.c

71

if ((ppb_rstr(bus) & mask) == status)

sys/bus/ppbus/ppb_msq.h

114

#define MS_RFETCH(reg,mask,ptr) { MS_OP_RFETCH, {{ reg }, { mask }, { ptr }}}

sys/bus/ppbus/ppb_msq.h

121

#define MS_RFETCH_P(n,reg,mask) { MS_OP_RFETCH_P, {{ n }, { reg }, { mask }}}

sys/bus/ppbus/ppb_msq.h

131

#define MS_BRSET(mask,offset) { MS_OP_BRSET, {{ mask }, { offset }}}

sys/bus/ppbus/ppb_msq.h

133

#define MS_BRCLEAR(mask,offset) { MS_OP_BRCLEAR, {{ mask }, { offset }}}

sys/bus/u4b/audio/uaudio.c

2564

.mask = SND_CHN_T_MASK_FR | SND_CHN_T_MASK_FL,

sys/bus/u4b/audio/uaudio.c

5413

uint32_t mask;

sys/bus/u4b/audio/uaudio.c

5425

mask = 0;

sys/bus/u4b/audio/uaudio.c

5427

mask |= (1 << mc->slctrtype[i - 1]);

sys/bus/u4b/audio/uaudio.c

5430

temp = mask & src;

sys/bus/u4b/audio/uaudio.c

5438

src &= ~mask;

sys/bus/u4b/controller/xhci.c

2296

xhci_configure_mask(struct usb_device *udev, uint32_t mask, uint8_t drop)

sys/bus/u4b/controller/xhci.c

2312

mask &= XHCI_INCTX_NON_CTRL_MASK;

sys/bus/u4b/controller/xhci.c

2313

xhci_ctx_set_le32(sc, &pinp->ctx_input.dwInCtx0, mask);

sys/bus/u4b/controller/xhci.c

2321

mask & XHCI_INCTX_NON_CTRL_MASK);

sys/bus/u4b/controller/xhci.c

2324

xhci_ctx_set_le32(sc, &pinp->ctx_input.dwInCtx1, mask);

sys/bus/u4b/controller/xhci.c

2328

if (mask & (1 << x))

sys/bus/u4b/controller/xhci.c

3859

uint32_t mask;

sys/bus/u4b/controller/xhci.c

3935

mask = (1U << epno);

sys/bus/u4b/controller/xhci.c

3946

xhci_configure_mask(udev, mask, 1);

sys/bus/u4b/controller/xhci.c

3952

sc->sc_hw.devs[index].ep_configured &= ~mask;

sys/bus/u4b/controller/xhci.c

3960

xhci_configure_mask(udev, mask | 1U, 0);

sys/bus/u4b/controller/xhci.c

3967

if (!(sc->sc_hw.devs[index].ep_configured & mask)) {

sys/bus/u4b/controller/xhci.c

3970

sc->sc_hw.devs[index].ep_configured |= mask;

sys/bus/u4b/controller/xhci.c

4127

uint32_t mask;

sys/bus/u4b/controller/xhci.c

4145

mask = 1U << epno;

sys/bus/u4b/controller/xhci.c

4147

if (sc->sc_hw.devs[index].ep_configured & mask) {

sys/bus/u4b/controller/xhci.c

4149

xhci_configure_mask(udev, mask, 1);

sys/bus/u4b/controller/xhci.c

4159

sc->sc_hw.devs[index].ep_configured &= ~mask;

sys/bus/u4b/input/ukbd.c

281

uint32_t mask, key;

sys/bus/u4b/input/ukbd.c

536

if ((n_mod & ukbd_mods[i].mask) !=

sys/bus/u4b/input/ukbd.c

537

(o_mod & ukbd_mods[i].mask)) {

sys/bus/u4b/input/ukbd.c

539

((n_mod & ukbd_mods[i].mask) ?

sys/bus/u4b/input/ums.c

298

uint32_t mask;

sys/bus/u4b/input/ums.c

299

mask = 1UL << UMS_BUT(i);

sys/bus/u4b/input/ums.c

305

buttons |= mask;

sys/bus/u4b/input/ums.c

307

buttons_found |= mask;

sys/bus/u4b/net/if_axe.c

1477

int error, mask, reinit;

sys/bus/u4b/net/if_axe.c

1485

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/bus/u4b/net/if_axe.c

1486

if ((mask & IFCAP_TXCSUM) != 0 &&

sys/bus/u4b/net/if_axe.c

1495

if ((mask & IFCAP_RXCSUM) != 0 &&

sys/bus/u4b/net/if_axge.c

889

int error, mask, reinit;

sys/bus/u4b/net/if_axge.c

898

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/bus/u4b/net/if_axge.c

899

if ((mask & IFCAP_TXCSUM) != 0 &&

sys/bus/u4b/net/if_axge.c

908

if ((mask & IFCAP_RXCSUM) != 0 &&

sys/bus/u4b/serial/usb_serial.c

1366

uint8_t mask;

sys/bus/u4b/serial/usb_serial.c

1372

mask = 0;

sys/bus/u4b/serial/usb_serial.c

1375

mask |= UCOM_LS_DTR;

sys/bus/u4b/serial/usb_serial.c

1377

mask |= UCOM_LS_RTS;

sys/bus/u4b/serial/usb_serial.c

1379

mask |= UCOM_LS_BREAK;

sys/bus/u4b/serial/usb_serial.c

1381

mask |= UCOM_LS_RING;

sys/bus/u4b/serial/usb_serial.c

1384

notch_bits = (sc->sc_pls_set & sc->sc_pls_clr) & mask;

sys/bus/u4b/serial/usb_serial.c

1385

any_bits = (sc->sc_pls_set | sc->sc_pls_clr) & mask;

sys/bus/u4b/storage/ustorage_fs.c

1483

ustorage_fs_min_len(struct ustorage_fs_softc *sc, uint32_t len, uint32_t mask)

sys/bus/u4b/storage/ustorage_fs.c

1504

if (sc->sc_transfer.data_rem & ~mask) {

sys/bus/u4b/storage/ustorage_fs.c

1506

sc->sc_transfer.data_rem &= mask;

sys/bus/u4b/storage/ustorage_fs.c

1525

uint16_t mask, uint8_t needs_medium)

sys/bus/u4b/storage/ustorage_fs.c

1584

if (sc->sc_cbw->CBWCDB[i] && !(mask & (1UL << i))) {

sys/bus/u4b/storage/ustorage_fs.c

237

static uint8_t ustorage_fs_min_len(struct ustorage_fs_softc *sc, uint32_t len, uint32_t mask);

sys/bus/u4b/storage/ustorage_fs.c

240

static uint8_t ustorage_fs_check_cmd(struct ustorage_fs_softc *sc, uint8_t cmd_size, uint16_t mask, uint8_t needs_medium);

sys/bus/u4b/usb_device.c

1796

uint16_t mask;

sys/bus/u4b/usb_device.c

1801

mask = usb_lang_mask;

sys/bus/u4b/usb_device.c

1812

if ((langid & mask) == pref)

sys/bus/u4b/usb_hid.c

242

int32_t mask;

sys/bus/u4b/usb_hid.c

312

mask = 0;

sys/bus/u4b/usb_hid.c

316

mask = 0xFF;

sys/bus/u4b/usb_hid.c

322

mask = 0xFFFF;

sys/bus/u4b/usb_hid.c

329

mask = 0xFFFFFFFF;

sys/bus/u4b/usb_hid.c

421

s->loc_size = dval & mask;

sys/bus/u4b/usb_hid.c

424

hid_switch_rid(s, c, dval & mask);

sys/bus/u4b/usb_hid.c

428

s->loc_count = dval & mask;

sys/bus/u4b/usb_hid.c

471

dval = (dval & mask) | c->_usage_page;

sys/bus/u4b/usb_hid.c

491

dval = (dval & mask) | c->_usage_page;

sys/bus/u4b/usb_hid.c

499

dval = (dval & mask) | c->_usage_page;

sys/bus/u4b/usb_hid.c

710

uint64_t mask;

sys/bus/u4b/usb_hid.c

726

mask = ((1ULL << hsize) - 1ULL) << (hpos % 8);

sys/bus/u4b/usb_hid.c

731

buf[rpos] &= ~(mask >> (8 * n));

sys/bus/u4b/usb_hub.c

1797

uint8_t end, uint8_t mask)

sys/bus/u4b/usb_hub.c

1815

if (mask & (1U << (z - x)))

sys/bus/u4b/usb_hub.c

1826

if (mask & (1U << (end - 1 - x)))

sys/bus/u4b/usb_hub.c

1846

uint8_t slot, uint8_t mask)

sys/bus/u4b/usb_hub.c

1873

USB_FS_ISOC_UFRAME_MAX, 6, mask);

sys/bus/u4b/usb_hub.c

1876

if (mask & (1U << (x - slot))) {

sys/bus/u4b/usb_hub.c

1885

USB_HS_MICRO_FRAMES_MAX, mask);

sys/bus/u4b/usb_hub.c

1888

if (mask & (1U << (x - slot))) {

sys/bus/u4b/usb_hub.c

1907

uint8_t mask;

sys/bus/u4b/usb_hub.c

1925

mask = 0x01;

sys/bus/u4b/usb_hub.c

1927

xfer->max_frame_size, USB_HS_MICRO_FRAMES_MAX, mask);

sys/bus/u4b/usb_hub.c

1930

xfer->endpoint->usb_smask = mask << slot;

sys/bus/u4b/usb_hub.c

1943

mask = 0xFF;

sys/bus/u4b/usb_hub.c

1946

mask = 0x55;

sys/bus/u4b/usb_hub.c

1949

mask = 0x11;

sys/bus/u4b/usb_hub.c

1952

mask = 0x01;

sys/bus/u4b/usb_hub.c

1959

xfer->max_frame_size, USB_HS_MICRO_FRAMES_MAX, mask);

sys/bus/u4b/usb_hub.c

1963

xfer->endpoint->usb_smask = mask << slot;

sys/bus/u4b/usb_hub.c

1988

uint8_t mask;

sys/bus/u4b/usb_hub.c

2004

mask = xfer->endpoint->usb_smask;

sys/bus/u4b/usb_hub.c

2008

-xfer->max_frame_size, slot, mask >> slot);

sys/bus/u4b/usb_hub.c

2011

slot, mask >> slot);

sys/bus/u4b/wlan/if_rum.c

1854

rum_setbits(struct rum_softc *sc, uint16_t reg, uint32_t mask)

sys/bus/u4b/wlan/if_rum.c

1856

return (rum_write(sc, reg, rum_read(sc, reg) | mask));

sys/bus/u4b/wlan/if_rum.c

1860

rum_clrbits(struct rum_softc *sc, uint16_t reg, uint32_t mask)

sys/bus/u4b/wlan/if_rum.c

1862

return (rum_write(sc, reg, rum_read(sc, reg) & ~mask));

sys/bus/u4b/wlan/if_urtwn.c

2077

cmd.mask = htole32(mode << 28 | basicrates);

sys/bus/u4b/wlan/if_urtwn.c

2100

cmd.mask = htole32(mode << 28 | rates);

sys/bus/u4b/wlan/if_urtwn.c

4866

uint64_t mask = 0x00004d101df481b4;

sys/bus/u4b/wlan/if_urtwn.c

4873

pos ^= (mask >> (i * 8 + j - 1));

sys/bus/u4b/wlan/if_urtwnreg.h

966

uint32_t mask;

sys/cpu/x86_64/include/cpufunc.h

102

bsflong(u_long mask)

sys/cpu/x86_64/include/cpufunc.h

106

__asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask));

sys/cpu/x86_64/include/cpufunc.h

111

bsrl(u_int mask)

sys/cpu/x86_64/include/cpufunc.h

115

__asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));

sys/cpu/x86_64/include/cpufunc.h

120

bsrq(u_long mask)

sys/cpu/x86_64/include/cpufunc.h

124

__asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask));

sys/cpu/x86_64/include/cpufunc.h

269

ffs(int mask)

sys/cpu/x86_64/include/cpufunc.h

271

return (__builtin_ffs(mask));

sys/cpu/x86_64/include/cpufunc.h

277

ffsl(long mask)

sys/cpu/x86_64/include/cpufunc.h

279

return (__builtin_ffsl(mask));

sys/cpu/x86_64/include/cpufunc.h

285

fls(int mask)

sys/cpu/x86_64/include/cpufunc.h

287

return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1);

sys/cpu/x86_64/include/cpufunc.h

293

flsl(long mask)

sys/cpu/x86_64/include/cpufunc.h

295

return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1);

sys/cpu/x86_64/include/cpufunc.h

301

flsll(long long mask)

sys/cpu/x86_64/include/cpufunc.h

303

return (flsl((long)mask));

sys/cpu/x86_64/include/cpufunc.h

84

bsfl(u_int mask)

sys/cpu/x86_64/include/cpufunc.h

88

__asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));

sys/cpu/x86_64/include/cpufunc.h

93

bsfq(u_long mask)

sys/cpu/x86_64/include/cpufunc.h

937

u_int bsfl(u_int mask);

sys/cpu/x86_64/include/cpufunc.h

938

u_int bsrl(u_int mask);

sys/cpu/x86_64/include/cpufunc.h

97

__asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask));

sys/cpu/x86_64/include/cpumask.h

113

#define CPUMASK_ORBIT(mask, i) ((mask).ary[((i) >> 6) & 3] |= \

sys/cpu/x86_64/include/cpumask.h

116

#define CPUMASK_ANDBIT(mask, i) ((mask).ary[((i) >> 6) & 3] &= \

sys/cpu/x86_64/include/cpumask.h

119

#define CPUMASK_NANDBIT(mask, i) ((mask).ary[((i) >> 6) & 3] &= \

sys/cpu/x86_64/include/cpumask.h

122

#define CPUMASK_ASSZERO(mask) do { \

sys/cpu/x86_64/include/cpumask.h

123

(mask).ary[0] = 0; \

sys/cpu/x86_64/include/cpumask.h

124

(mask).ary[1] = 0; \

sys/cpu/x86_64/include/cpumask.h

125

(mask).ary[2] = 0; \

sys/cpu/x86_64/include/cpumask.h

126

(mask).ary[3] = 0; \

sys/cpu/x86_64/include/cpumask.h

129

#define CPUMASK_ASSALLONES(mask) do { \

sys/cpu/x86_64/include/cpumask.h

130

(mask).ary[0] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

131

(mask).ary[1] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

132

(mask).ary[2] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

133

(mask).ary[3] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

136

#define CPUMASK_ASSBIT(mask, i) do { \

sys/cpu/x86_64/include/cpumask.h

137

CPUMASK_ASSZERO(mask); \

sys/cpu/x86_64/include/cpumask.h

138

CPUMASK_ORBIT(mask, i); \

sys/cpu/x86_64/include/cpumask.h

141

#define CPUMASK_ASSBMASK(mask, i) do { \

sys/cpu/x86_64/include/cpumask.h

143

(mask).ary[0] = CPUMASK_SIMPLE(i) - 1; \

sys/cpu/x86_64/include/cpumask.h

144

(mask).ary[1] = 0; \

sys/cpu/x86_64/include/cpumask.h

145

(mask).ary[2] = 0; \

sys/cpu/x86_64/include/cpumask.h

146

(mask).ary[3] = 0; \

sys/cpu/x86_64/include/cpumask.h

148

(mask).ary[0] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

149

(mask).ary[1] = CPUMASK_SIMPLE((i) - 64) - 1; \

sys/cpu/x86_64/include/cpumask.h

150

(mask).ary[2] = 0; \

sys/cpu/x86_64/include/cpumask.h

151

(mask).ary[3] = 0; \

sys/cpu/x86_64/include/cpumask.h

153

(mask).ary[0] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

154

(mask).ary[1] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

155

(mask).ary[2] = CPUMASK_SIMPLE((i) - 128) - 1; \

sys/cpu/x86_64/include/cpumask.h

156

(mask).ary[3] = 0; \

sys/cpu/x86_64/include/cpumask.h

158

(mask).ary[0] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

159

(mask).ary[1] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

160

(mask).ary[2] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

161

(mask).ary[3] = CPUMASK_SIMPLE((i) - 192) - 1; \

sys/cpu/x86_64/include/cpumask.h

165

#define CPUMASK_ASSNBMASK(mask, i) do { \

sys/cpu/x86_64/include/cpumask.h

167

(mask).ary[0] = ~(CPUMASK_SIMPLE(i) - 1); \

sys/cpu/x86_64/include/cpumask.h

168

(mask).ary[1] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

169

(mask).ary[2] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

170

(mask).ary[3] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

172

(mask).ary[0] = 0; \

sys/cpu/x86_64/include/cpumask.h

173

(mask).ary[1] = ~(CPUMASK_SIMPLE((i) - 64) - 1);\

sys/cpu/x86_64/include/cpumask.h

174

(mask).ary[2] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

175

(mask).ary[3] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

177

(mask).ary[0] = 0; \

sys/cpu/x86_64/include/cpumask.h

178

(mask).ary[1] = 0; \

sys/cpu/x86_64/include/cpumask.h

179

(mask).ary[2] = ~(CPUMASK_SIMPLE((i) - 128) - 1);\

sys/cpu/x86_64/include/cpumask.h

180

(mask).ary[3] = (__uint64_t)-1; \

sys/cpu/x86_64/include/cpumask.h

182

(mask).ary[0] = 0; \

sys/cpu/x86_64/include/cpumask.h

183

(mask).ary[1] = 0; \

sys/cpu/x86_64/include/cpumask.h

184

(mask).ary[2] = 0; \

sys/cpu/x86_64/include/cpumask.h

185

(mask).ary[3] = ~(CPUMASK_SIMPLE((i) - 192) - 1);\

sys/cpu/x86_64/include/cpumask.h

189

#define CPUMASK_ANDMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

190

(mask).ary[0] &= (val).ary[0]; \

sys/cpu/x86_64/include/cpumask.h

191

(mask).ary[1] &= (val).ary[1]; \

sys/cpu/x86_64/include/cpumask.h

192

(mask).ary[2] &= (val).ary[2]; \

sys/cpu/x86_64/include/cpumask.h

193

(mask).ary[3] &= (val).ary[3]; \

sys/cpu/x86_64/include/cpumask.h

196

#define CPUMASK_NANDMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

197

(mask).ary[0] &= ~(val).ary[0]; \

sys/cpu/x86_64/include/cpumask.h

198

(mask).ary[1] &= ~(val).ary[1]; \

sys/cpu/x86_64/include/cpumask.h

199

(mask).ary[2] &= ~(val).ary[2]; \

sys/cpu/x86_64/include/cpumask.h

200

(mask).ary[3] &= ~(val).ary[3]; \

sys/cpu/x86_64/include/cpumask.h

203

#define CPUMASK_ORMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

204

(mask).ary[0] |= (val).ary[0]; \

sys/cpu/x86_64/include/cpumask.h

205

(mask).ary[1] |= (val).ary[1]; \

sys/cpu/x86_64/include/cpumask.h

206

(mask).ary[2] |= (val).ary[2]; \

sys/cpu/x86_64/include/cpumask.h

207

(mask).ary[3] |= (val).ary[3]; \

sys/cpu/x86_64/include/cpumask.h

210

#define CPUMASK_XORMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

211

(mask).ary[0] ^= (val).ary[0]; \

sys/cpu/x86_64/include/cpumask.h

212

(mask).ary[1] ^= (val).ary[1]; \

sys/cpu/x86_64/include/cpumask.h

213

(mask).ary[2] ^= (val).ary[2]; \

sys/cpu/x86_64/include/cpumask.h

214

(mask).ary[3] ^= (val).ary[3]; \

sys/cpu/x86_64/include/cpumask.h

217

#define CPUMASK_INVMASK(mask) do { \

sys/cpu/x86_64/include/cpumask.h

218

(mask).ary[0] ^= -1L; \

sys/cpu/x86_64/include/cpumask.h

219

(mask).ary[1] ^= -1L; \

sys/cpu/x86_64/include/cpumask.h

220

(mask).ary[2] ^= -1L; \

sys/cpu/x86_64/include/cpumask.h

221

(mask).ary[3] ^= -1L; \

sys/cpu/x86_64/include/cpumask.h

271

#define ATOMIC_CPUMASK_ORBIT(mask, i) \

sys/cpu/x86_64/include/cpumask.h

272

atomic_set_cpumask(&(mask).ary[((i) >> 6) & 3], \

sys/cpu/x86_64/include/cpumask.h

275

#define ATOMIC_CPUMASK_NANDBIT(mask, i) \

sys/cpu/x86_64/include/cpumask.h

276

atomic_clear_cpumask(&(mask).ary[((i) >> 6) & 3], \

sys/cpu/x86_64/include/cpumask.h

279

#define ATOMIC_CPUMASK_TESTANDSET(mask, i) \

sys/cpu/x86_64/include/cpumask.h

280

atomic_testandset_long(&(mask).ary[((i) >> 6) & 3], (i))

sys/cpu/x86_64/include/cpumask.h

282

#define ATOMIC_CPUMASK_TESTANDCLR(mask, i) \

sys/cpu/x86_64/include/cpumask.h

283

atomic_testandclear_long(&(mask).ary[((i) >> 6) & 3], (i))

sys/cpu/x86_64/include/cpumask.h

285

#define ATOMIC_CPUMASK_ORMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

286

atomic_set_cpumask(&(mask).ary[0], (val).ary[0]); \

sys/cpu/x86_64/include/cpumask.h

287

atomic_set_cpumask(&(mask).ary[1], (val).ary[1]); \

sys/cpu/x86_64/include/cpumask.h

288

atomic_set_cpumask(&(mask).ary[2], (val).ary[2]); \

sys/cpu/x86_64/include/cpumask.h

289

atomic_set_cpumask(&(mask).ary[3], (val).ary[3]); \

sys/cpu/x86_64/include/cpumask.h

292

#define ATOMIC_CPUMASK_NANDMASK(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

293

atomic_clear_cpumask(&(mask).ary[0], (val).ary[0]); \

sys/cpu/x86_64/include/cpumask.h

294

atomic_clear_cpumask(&(mask).ary[1], (val).ary[1]); \

sys/cpu/x86_64/include/cpumask.h

295

atomic_clear_cpumask(&(mask).ary[2], (val).ary[2]); \

sys/cpu/x86_64/include/cpumask.h

296

atomic_clear_cpumask(&(mask).ary[3], (val).ary[3]); \

sys/cpu/x86_64/include/cpumask.h

299

#define ATOMIC_CPUMASK_COPY(mask, val) do { \

sys/cpu/x86_64/include/cpumask.h

300

atomic_store_rel_cpumask(&(mask).ary[0], (val).ary[0]);\

sys/cpu/x86_64/include/cpumask.h

301

atomic_store_rel_cpumask(&(mask).ary[1], (val).ary[1]);\

sys/cpu/x86_64/include/cpumask.h

302

atomic_store_rel_cpumask(&(mask).ary[2], (val).ary[2]);\

sys/cpu/x86_64/include/cpumask.h

303

atomic_store_rel_cpumask(&(mask).ary[3], (val).ary[3]);\

sys/cpu/x86_64/include/cpumask.h

66

#define CPUMASK_ADDR(mask, cpu) (&(mask).ary[((cpu) >> 6) & 3])

sys/cpu/x86_64/include/npx.h

247

void fpusave (union savefpu *addr, uint64_t mask);

sys/cpu/x86_64/include/npx.h

248

void fpurstor (union savefpu *addr, uint64_t mask);

sys/crypto/poly1305/poly1305.c

201

unsigned long mask;

sys/crypto/poly1305/poly1305.c

252

mask = (g4 >> ((sizeof(unsigned long) * 8) - 1)) - 1;

sys/crypto/poly1305/poly1305.c

253

g0 &= mask;

sys/crypto/poly1305/poly1305.c

254

g1 &= mask;

sys/crypto/poly1305/poly1305.c

255

g2 &= mask;

sys/crypto/poly1305/poly1305.c

256

g3 &= mask;

sys/crypto/poly1305/poly1305.c

257

g4 &= mask;

sys/crypto/poly1305/poly1305.c

258

mask = ~mask;

sys/crypto/poly1305/poly1305.c

259

h0 = (h0 & mask) | g0;

sys/crypto/poly1305/poly1305.c

260

h1 = (h1 & mask) | g1;

sys/crypto/poly1305/poly1305.c

261

h2 = (h2 & mask) | g2;

sys/crypto/poly1305/poly1305.c

262

h3 = (h3 & mask) | g3;

sys/crypto/poly1305/poly1305.c

263

h4 = (h4 & mask) | g4;

sys/ddb/db_examine.c

274

db_expr_t mask;

sys/ddb/db_examine.c

312

if (!db_expression(&mask))

sys/ddb/db_examine.c

313

mask = 0xffffffffUL;

sys/ddb/db_examine.c

328

db_search(addr, size, value, mask, count);

sys/ddb/db_examine.c

332

db_search(db_addr_t addr, int size, db_expr_t value, db_expr_t mask,

sys/ddb/db_examine.c

337

if ((db_get_value(addr, size, FALSE) & mask) == value)

sys/dev/acpica/acpi_cpu_cstate.c

622

cpumask_t mask;

sys/dev/acpica/acpi_cpu_cstate.c

624

mask = get_cpumask_from_level(sc->cst_cpuid, CORE_LEVEL);

sys/dev/acpica/acpi_cpu_cstate.c

625

if (CPUMASK_TESTNZERO(mask)) {

sys/dev/acpica/acpi_cpu_cstate.c

635

if (!CPUMASK_TESTBIT(mask, sc1->cst_cpuid))

sys/dev/acpica/acpi_cpu_pstate.c

434

cpumask_t mask;

sys/dev/acpica/acpi_cpu_pstate.c

436

mask = get_cpumask_from_level(sc->pst_cpuid,

sys/dev/acpica/acpi_cpu_pstate.c

438

if (CPUMASK_TESTNZERO(mask)) {

sys/dev/acpica/acpi_cpu_pstate.c

444

if (CPUMASK_TESTBIT(mask,

sys/dev/acpica/acpi_cpu_pstate.c

760

cpumask_t mask;

sys/dev/acpica/acpi_cpu_pstate.c

762

mask = get_cpumask_from_level(sc->pst_cpuid, CHIP_LEVEL);

sys/dev/acpica/acpi_cpu_pstate.c

763

if (CPUMASK_TESTNZERO(mask)) {

sys/dev/acpica/acpi_cpu_pstate.c

770

if (CPUMASK_TESTBIT(mask,

sys/dev/crypto/tpm/tpm.c

539

tpm_waitfor_poll(struct tpm_softc *sc, u_int8_t mask, int tmo, void *c)

sys/dev/crypto/tpm/tpm.c

547

while (((sc->sc_stat = tpm_status(sc)) & mask) != mask && tmo--) {

sys/dev/crypto/tpm/tpm.c

562

tpm_waitfor_int(struct tpm_softc *sc, u_int8_t mask, int tmo, void *c,

sys/dev/crypto/tpm/tpm.c

569

if ((sc->sc_stat & mask) == mask)

sys/dev/crypto/tpm/tpm.c

589

if ((sc->sc_stat & mask) == mask) {

sys/dev/crypto/tpm/tpm.c

611

if ((sc->sc_stat & mask) == mask)

sys/dev/crypto/tpm/tpm_crb.c

246

tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, uint32_t mask, uint32_t val,

sys/dev/crypto/tpm/tpm_crb.c

251

if ((RD4(sc, off) & mask) == val)

sys/dev/crypto/tpm/tpm_crb.c

255

if ((RD4(sc, off) & mask) == val)

sys/dev/crypto/tpm/tpm_crb.c

267

uint32_t mask;

sys/dev/crypto/tpm/tpm_crb.c

273

mask = TPM_LOC_STATE_VALID | TPM_LOC_STATE_ASSIGNED;

sys/dev/crypto/tpm/tpm_crb.c

276

if (!tpm_wait_for_u32(sc, TPM_LOC_STATE, mask, mask, TPM_TIMEOUT_C))

sys/dev/crypto/tpm/tpm_crb.c

292

uint32_t mask = ~0;

sys/dev/crypto/tpm/tpm_crb.c

296

mask, ~mask, TPM_TIMEOUT_B)) {

sys/dev/crypto/tpm/tpm_crb.c

310

uint32_t mask, curr_cmd;

sys/dev/crypto/tpm/tpm_crb.c

340

mask = TPM_CRB_CTRL_STS_IDLE_BIT;

sys/dev/crypto/tpm/tpm_crb.c

342

mask, mask, TPM_TIMEOUT_C)) {

sys/dev/crypto/tpm/tpm_crb.c

351

mask = TPM_CRB_CTRL_REQ_GO_READY;

sys/dev/crypto/tpm/tpm_crb.c

353

mask, !mask, TPM_TIMEOUT_C)) {

sys/dev/crypto/tpm/tpm_crb.c

376

mask = ~0;

sys/dev/crypto/tpm/tpm_crb.c

377

if (!tpm_wait_for_u32(sc, TPM_CRB_CTRL_START, mask, ~mask, timeout)) {

sys/dev/crypto/tpm/tpm_crb.c

96

uint32_t mask, uint32_t val, int32_t timeout);

sys/dev/crypto/tpm/tpm_tis.c

249

tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, uint32_t mask, uint32_t val,

sys/dev/crypto/tpm/tpm_tis.c

254

if ((RD4(sc, off) & mask) == val)

sys/dev/crypto/tpm/tpm_tis.c

262

return ((RD4(sc, off) & mask) == val);

sys/dev/crypto/tpm/tpm_tis.c

267

if ((RD4(sc, off) & mask) == val)

sys/dev/crypto/tpm/tpm_tis.c

338

uint8_t mask;

sys/dev/crypto/tpm/tpm_tis.c

345

mask = TPM_ACCESS_LOC_ACTIVE | TPM_ACCESS_VALID;

sys/dev/crypto/tpm/tpm_tis.c

353

return ((RD1(sc, TPM_ACCESS) & mask) == mask);

sys/dev/crypto/tpm/tpm_tis.c

356

if ((RD1(sc, TPM_ACCESS) & mask) == mask)

sys/dev/crypto/tpm/tpm_tis.c

385

uint32_t mask;

sys/dev/crypto/tpm/tpm_tis.c

387

mask = TPM_STS_CMD_RDY;

sys/dev/crypto/tpm/tpm_tis.c

392

if (!tpm_wait_for_u32(sc, TPM_STS, mask, mask, TPM_TIMEOUT_B))

sys/dev/crypto/tpm/tpm_tis.c

402

uint32_t mask, curr_cmd;

sys/dev/crypto/tpm/tpm_tis.c

423

mask = TPM_STS_VALID;

sys/dev/crypto/tpm/tpm_tis.c

425

if (!tpm_wait_for_u32(sc, TPM_STS, mask, mask, TPM_TIMEOUT_C)) {

sys/dev/crypto/tpm/tpm_tis.c

447

mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID;

sys/dev/crypto/tpm/tpm_tis.c

449

if (!tpm_wait_for_u32(sc, TPM_STS, mask, mask, timeout)) {

sys/dev/crypto/tpm/tpm_tis.c

464

if (!tpm_wait_for_u32(sc, TPM_STS, mask, mask, TPM_TIMEOUT_C))

sys/dev/crypto/tpm/tpm_tis.c

94

uint32_t mask, uint32_t val, int32_t timeout);

sys/dev/disk/ahci/ahci.c

1052

u_int32_t mask;

sys/dev/disk/ahci/ahci.c

1054

mask = ahci_pread(ap, AHCI_PREG_CI);

sys/dev/disk/ahci/ahci.c

1056

mask |= ahci_pread(ap, AHCI_PREG_SACT);

sys/dev/disk/ahci/ahci.c

1057

return(mask);

sys/dev/disk/ahci/ahci.c

2195

u_int32_t mask;

sys/dev/disk/ahci/ahci.c

2198

mask = ap->ap_active | ap->ap_sactive;

sys/dev/disk/ahci/ahci.c

2199

while (mask) {

sys/dev/disk/ahci/ahci.c

2200

tag = ffs(mask) - 1;

sys/dev/disk/ahci/ahci.c

2201

mask &= ~(1 << tag);

sys/dev/disk/ahci/ahci.c

2293

u_int32_t mask;

sys/dev/disk/ahci/ahci.c

2371

mask = 0;

sys/dev/disk/ahci/ahci.c

2374

KKASSERT((mask & (1 << ccb->ccb_slot)) == 0);

sys/dev/disk/ahci/ahci.c

2375

mask |= 1 << ccb->ccb_slot;

sys/dev/disk/ahci/ahci.c

2384

ap->ap_sactive |= mask;

sys/dev/disk/ahci/ahci.c

2385

ahci_pwrite(ap, AHCI_PREG_SACT, mask);

sys/dev/disk/ahci/ahci.c

2395

ahci_pwrite(ap, AHCI_PREG_CI, mask);

sys/dev/disk/ahci/ahci.c

2396

mask = 0;

sys/dev/disk/ahci/ahci.c

2403

KKASSERT(((ap->ap_active | ap->ap_sactive) & mask) == 0);

sys/dev/disk/ahci/ahci.c

2405

if (mask) {

sys/dev/disk/ahci/ahci.c

2406

ap->ap_sactive |= mask;

sys/dev/disk/ahci/ahci.c

2407

ahci_pwrite(ap, AHCI_PREG_SACT, mask);

sys/dev/disk/ahci/ahci.c

2408

ahci_pwrite(ap, AHCI_PREG_CI, mask);

sys/dev/disk/ahci/ahci.c

2525

ahci_port_thread_core(struct ahci_port *ap, int mask)

sys/dev/disk/ahci/ahci.c

2531

if (mask & AP_SIGF_TIMEOUT) {

sys/dev/disk/ahci/ahci.c

2539

if (mask & AP_SIGF_PORTINT) {

sys/dev/disk/ahci/ahci.c

3126

u_int32_t mask;

sys/dev/disk/ahci/ahci.c

3127

if ((mask = ahci_pactive(ap)) != 0) {

sys/dev/disk/ahci/ahci.c

3130

PORTNAME(ap), mask);

sys/dev/disk/ahci/ahci.c

3133

if ((mask = ahci_pactive(ap)) != 0) {

sys/dev/disk/ahci/ahci.c

3136

PORTNAME(ap), mask);

sys/dev/disk/ahci/ahci.c

3613

bus_size_t r, u_int32_t mask, u_int32_t target)

sys/dev/disk/ahci/ahci.c

3621

if ((ahci_pread(ap, r) & mask) == target)

sys/dev/disk/ahci/ahci.c

3628

if ((ahci_pread(ap, r) & mask) == target)

sys/dev/disk/ahci/ahci.c

3635

ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,

sys/dev/disk/ahci/ahci.c

3644

if ((ahci_read(sc, r) & mask) != target)

sys/dev/disk/ahci/ahci.c

3655

if ((ahci_read(sc, r) & mask) != target)

sys/dev/disk/ahci/ahci.c

3817

u_int32_t mask;

sys/dev/disk/ahci/ahci.c

3943

if ((mask = ahci_pactive(ap)) != 0) {

sys/dev/disk/ahci/ahci.c

3946

PORTNAME(ap), mask);

sys/dev/disk/ahci/ahci.c

4001

u_int32_t mask;

sys/dev/disk/ahci/ahci.c

4019

if ((mask = ahci_pactive(ap)) != 0) {

sys/dev/disk/ahci/ahci.c

4022

PORTNAME(ap), mask);

sys/dev/disk/ahci/ahci.c

73

void ahci_issue_saved_commands(struct ahci_port *ap, u_int32_t mask);

sys/dev/disk/ahci/ahci.h

639

void ahci_port_thread_core(struct ahci_port *ap, int mask);

sys/dev/disk/ahci/ahci.h

646

void ahci_os_signal_port_thread(struct ahci_port *ap, int mask);

sys/dev/disk/ahci/ahci_cam.c

667

u_int16_t mask;

sys/dev/disk/ahci/ahci_cam.c

674

mask = le16toh(at->at_identify.ultradma);

sys/dev/disk/ahci/ahci_cam.c

675

if ((mask & 0xFF) == 0 || mask == 0xFFFF)

sys/dev/disk/ahci/ahci_cam.c

677

mask &= 0xFF;

sys/dev/disk/ahci/ahci_cam.c

679

while ((mask & 0x8000) == 0) {

sys/dev/disk/ahci/ahci_cam.c

680

mask <<= 1;

sys/dev/disk/ahci/ahci_dragonfly.c

306

ahci_os_signal_port_thread(struct ahci_port *ap, int mask)

sys/dev/disk/ahci/ahci_dragonfly.c

309

atomic_set_int(&ap->ap_signal, mask);

sys/dev/disk/ahci/ahci_dragonfly.c

355

int mask;

sys/dev/disk/ahci/ahci_dragonfly.c

394

mask = ap->ap_signal;

sys/dev/disk/ahci/ahci_dragonfly.c

395

while ((mask & AP_SIGF_STOP) == 0) {

sys/dev/disk/ahci/ahci_dragonfly.c

396

ahci_port_thread_core(ap, mask);

sys/dev/disk/ahci/ahci_dragonfly.c

402

mask = ap->ap_signal;

sys/dev/disk/ahci/ahci_dragonfly.c

403

atomic_clear_int(&ap->ap_signal, mask);

sys/dev/disk/isp/ispreg.h

807

#define ISPBSMX(c, byte, shift, mask) \

sys/dev/disk/isp/ispreg.h

808

(((c)[(byte)] >> (shift)) & (mask))

sys/dev/disk/mpt/mpt.c

1317

mpt_req_state_t state, mpt_req_state_t mask,

sys/dev/disk/mpt/mpt.c

1335

mask &= ~REQ_STATE_NEED_WAKEUP;

sys/dev/disk/mpt/mpt.c

1337

while ((req->state & mask) != state && mpt->reset_cnt == saved_cnt) {

sys/dev/disk/mpt/mpt.c

1942

uint32_t mask;

sys/dev/disk/mpt/mpt.c

1945

for (mask = 1; mask != 0; mask <<= 1) {

sys/dev/disk/mpt/mpt.c

1946

if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0) {

sys/dev/disk/mpt/mpt.c

1949

switch (mask) {

sys/dev/disk/mpt/mpt.h

1070

mpt_req_state_t state, mpt_req_state_t mask,

sys/dev/disk/mpt/mpt_debug.c

653

u_int mask;

sys/dev/disk/mpt/mpt_debug.c

685

if (((value & table[entry].mask)

sys/dev/disk/mpt/mpt_debug.c

687

|| ((printed_mask & table[entry].mask)

sys/dev/disk/mpt/mpt_debug.c

688

== table[entry].mask))

sys/dev/disk/mpt/mpt_debug.c

694

printed_mask |= table[entry].mask;

sys/dev/disk/mpt/mpt_raid.c

1139

u_int mask;

sys/dev/disk/mpt/mpt_raid.c

1141

mask = 0x1 << i;

sys/dev/disk/mpt/mpt_raid.c

1142

if ((vol_pg->VolumeSettings.HotSparePool & mask) == 0)

sys/dev/disk/mpt/mpt_raid.c

1235

u_int mask;

sys/dev/disk/mpt/mpt_raid.c

1237

mask = 0x1 << i;

sys/dev/disk/mpt/mpt_raid.c

1238

if ((disk_pg->PhysDiskSettings.HotSparePool & mask) == 0)

sys/dev/disk/nata/ata-lowlevel.c

457

int mask = 0, timeout;

sys/dev/disk/nata/ata-lowlevel.c

465

mask |= 0x01;

sys/dev/disk/nata/ata-lowlevel.c

475

mask |= 0x02;

sys/dev/disk/nata/ata-lowlevel.c

481

mask, ostat0, ostat1);

sys/dev/disk/nata/ata-lowlevel.c

486

if (!mask)

sys/dev/disk/nata/ata-lowlevel.c

500

if ((mask & 0x01) && (stat0 & ATA_S_BUSY)) {

sys/dev/disk/nata/ata-lowlevel.c

513

mask &= ~0x01;

sys/dev/disk/nata/ata-lowlevel.c

529

if ((mask & 0x02) && (stat1 & ATA_S_BUSY) &&

sys/dev/disk/nata/ata-lowlevel.c

530

!((mask & 0x01) && (stat0 & ATA_S_BUSY))) {

sys/dev/disk/nata/ata-lowlevel.c

543

mask &= ~0x02;

sys/dev/disk/nata/ata-lowlevel.c

559

if (mask == 0x00) /* nothing to wait for */

sys/dev/disk/nata/ata-lowlevel.c

561

if (mask == 0x01) /* wait for master only */

sys/dev/disk/nata/ata-lowlevel.c

564

if (mask == 0x02) /* wait for slave only */

sys/dev/disk/nata/ata-lowlevel.c

567

if (mask == 0x03) { /* wait for both master & slave */

sys/dev/disk/nata/ata-lowlevel.c

571

mask &= ~0x01;

sys/dev/disk/nata/ata-lowlevel.c

573

mask &= ~0x02;

sys/dev/disk/nata/ata-lowlevel.c

598

ata_wait(struct ata_channel *ch, struct ata_device *atadev, u_int8_t mask)

sys/dev/disk/nata/ata-lowlevel.c

632

if (!mask)

sys/dev/disk/nata/ata-lowlevel.c

641

if ((status & mask) == mask)

sys/dev/disk/nata/chipsets/ata-intel.c

226

int mask, timeout;

sys/dev/disk/nata/chipsets/ata-intel.c

230

mask = (0x0005 << ch->unit);

sys/dev/disk/nata/chipsets/ata-intel.c

235

mask = 0x0003;

sys/dev/disk/nata/chipsets/ata-intel.c

237

mask = (0x0001 << ch->unit);

sys/dev/disk/nata/chipsets/ata-intel.c

242

pci_write_config(parent, 0x92, pci_read_config(parent, 0x92, 2) & ~mask, 2);

sys/dev/disk/nata/chipsets/ata-intel.c

244

pci_write_config(parent, 0x92, pci_read_config(parent, 0x92, 2) | mask, 2);

sys/dev/disk/nata/chipsets/ata-intel.c

248

if (((pci_read_config(parent, 0x92, 2) & (mask << 4)) == (mask << 4)) &&

sys/dev/disk/nata/chipsets/ata-siliconimage.c

360

int mask = 0x03 << (atadev->unit << 2);

sys/dev/disk/nata/chipsets/ata-siliconimage.c

361

int mval = pci_read_config(gparent, mreg, 1) & ~mask;

sys/dev/disk/sdhci/sdhci.c

1106

uint32_t mask;

sys/dev/disk/sdhci/sdhci.c

1133

mask = SDHCI_CMD_INHIBIT;

sys/dev/disk/sdhci/sdhci.c

1136

mask |= SDHCI_DAT_INHIBIT;

sys/dev/disk/sdhci/sdhci.c

1139

mask &= ~SDHCI_DAT_INHIBIT;

sys/dev/disk/sdhci/sdhci.c

1151

while (mask & RD4(slot, SDHCI_PRESENT_STATE)) {

sys/dev/disk/sdhci/sdhci.c

173

sdhci_reset(struct sdhci_slot *slot, uint8_t mask)

sys/dev/disk/sdhci/sdhci.c

184

if ((mask & SDHCI_RESET_ALL) == 0 &&

sys/dev/disk/sdhci/sdhci.c

192

if (mask & SDHCI_RESET_ALL) {

sys/dev/disk/sdhci/sdhci.c

197

WR1(slot, SDHCI_SOFTWARE_RESET, mask);

sys/dev/disk/sdhci/sdhci.c

209

while ((RD1(slot, SDHCI_SOFTWARE_RESET) & mask) != mask) {

sys/dev/disk/sdhci/sdhci.c

220

while (RD1(slot, SDHCI_SOFTWARE_RESET) & mask) {

sys/dev/disk/sdhci/sdhci.c

223

mask);

sys/dev/disk/sili/sili.c

1371

u_int32_t mask;

sys/dev/disk/sili/sili.c

1374

mask = ap->ap_active;

sys/dev/disk/sili/sili.c

1375

while (mask) {

sys/dev/disk/sili/sili.c

1376

tag = ffs(mask) - 1;

sys/dev/disk/sili/sili.c

1377

mask &= ~(1 << tag);

sys/dev/disk/sili/sili.c

1596

sili_port_thread_core(struct sili_port *ap, int mask)

sys/dev/disk/sili/sili.c

1602

if (mask & AP_SIGF_TIMEOUT) {

sys/dev/disk/sili/sili.c

1610

if (mask & AP_SIGF_PORTINT) {

sys/dev/disk/sili/sili.c

2261

bus_size_t r, u_int32_t mask, u_int32_t target)

sys/dev/disk/sili/sili.c

2269

if ((sili_pread(ap, r) & mask) == target)

sys/dev/disk/sili/sili.c

2276

if ((sili_pread(ap, r) & mask) == target)

sys/dev/disk/sili/sili.c

2283

sili_wait_ne(struct sili_softc *sc, bus_size_t r, u_int32_t mask,

sys/dev/disk/sili/sili.c

2292

if ((sili_read(sc, r) & mask) != target)

sys/dev/disk/sili/sili.c

2303

if ((sili_read(sc, r) & mask) != target)

sys/dev/disk/sili/sili.h

918

void sili_port_thread_core(struct sili_port *ap, int mask);

sys/dev/disk/sili/sili.h

925

void sili_os_signal_port_thread(struct sili_port *ap, int mask);

sys/dev/disk/sili/sili_cam.c

626

u_int16_t mask;

sys/dev/disk/sili/sili_cam.c

633

mask = le16toh(at->at_identify.ultradma);

sys/dev/disk/sili/sili_cam.c

634

if ((mask & 0xFF) == 0 || mask == 0xFFFF)

sys/dev/disk/sili/sili_cam.c

636

mask &= 0xFF;

sys/dev/disk/sili/sili_cam.c

638

while ((mask & 0x8000) == 0) {

sys/dev/disk/sili/sili_cam.c

639

mask <<= 1;

sys/dev/disk/sili/sili_dragonfly.c

231

sili_os_signal_port_thread(struct sili_port *ap, int mask)

sys/dev/disk/sili/sili_dragonfly.c

234

atomic_set_int(&ap->ap_signal, mask);

sys/dev/disk/sili/sili_dragonfly.c

280

int mask;

sys/dev/disk/sili/sili_dragonfly.c

300

mask = ap->ap_signal;

sys/dev/disk/sili/sili_dragonfly.c

301

while ((mask & AP_SIGF_STOP) == 0) {

sys/dev/disk/sili/sili_dragonfly.c

302

atomic_clear_int(&ap->ap_signal, mask);

sys/dev/disk/sili/sili_dragonfly.c

303

sili_port_thread_core(ap, mask);

sys/dev/disk/sili/sili_dragonfly.c

310

mask = ap->ap_signal;

sys/dev/disk/sym/sym_hipd.c

2448

static void sym_print_targets_flag(hcb_p np, int mask, char *msg)

sys/dev/disk/sym/sym_hipd.c

2456

if (np->target[i].usrflags & mask) {

sys/dev/drm/amd/amdgpu/amdgpu.h

1122

#define WREG32_P(reg, val, mask) \

sys/dev/drm/amd/amdgpu/amdgpu.h

1125

tmp_ &= (mask); \

sys/dev/drm/amd/amdgpu/amdgpu.h

1126

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/amd/amdgpu/amdgpu.h

1131

#define WREG32_PLL_P(reg, val, mask) \

sys/dev/drm/amd/amdgpu/amdgpu.h

1134

tmp_ &= (mask); \

sys/dev/drm/amd/amdgpu/amdgpu.h

1135

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

138

static void amdgpu_atif_parse_notification(struct amdgpu_atif_notifications *n, u32 mask)

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

140

n->display_switch = mask & ATIF_DISPLAY_SWITCH_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

141

n->expansion_mode_change = mask & ATIF_EXPANSION_MODE_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

142

n->thermal_state = mask & ATIF_THERMAL_STATE_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

143

n->forced_power_state = mask & ATIF_FORCED_POWER_STATE_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

144

n->system_power_state = mask & ATIF_SYSTEM_POWER_SOURCE_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

145

n->display_conf_change = mask & ATIF_DISPLAY_CONF_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

146

n->px_gfx_switch = mask & ATIF_PX_GFX_SWITCH_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

147

n->brightness_change = mask & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

148

n->dgpu_display_event = mask & ATIF_DGPU_DISPLAY_EVENT_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

161

static void amdgpu_atif_parse_functions(struct amdgpu_atif_functions *f, u32 mask)

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

163

f->system_params = mask & ATIF_GET_SYSTEM_PARAMETERS_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

164

f->sbios_requests = mask & ATIF_GET_SYSTEM_BIOS_REQUESTS_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

165

f->select_active_disp = mask & ATIF_SELECT_ACTIVE_DISPLAYS_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

166

f->lid_state = mask & ATIF_GET_LID_STATE_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

167

f->get_tv_standard = mask & ATIF_GET_TV_STANDARD_FROM_CMOS_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

168

f->set_tv_standard = mask & ATIF_SET_TV_STANDARD_IN_CMOS_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

169

f->get_panel_expansion_mode = mask & ATIF_GET_PANEL_EXPANSION_MODE_FROM_CMOS_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

170

f->set_panel_expansion_mode = mask & ATIF_SET_PANEL_EXPANSION_MODE_IN_CMOS_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

171

f->temperature_change = mask & ATIF_TEMPERATURE_CHANGE_NOTIFICATION_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

172

f->graphics_device_types = mask & ATIF_GET_GRAPHICS_DEVICE_TYPES_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

500

static void amdgpu_atcs_parse_functions(struct amdgpu_atcs_functions *f, u32 mask)

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

502

f->get_ext_state = mask & ATCS_GET_EXTERNAL_STATE_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

503

f->pcie_perf_req = mask & ATCS_PCIE_PERFORMANCE_REQUEST_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

504

f->pcie_dev_rdy = mask & ATCS_PCIE_DEVICE_READY_NOTIFICATION_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

505

f->pcie_bus_width = mask & ATCS_SET_PCIE_BUS_WIDTH_SUPPORTED;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

186

gpio.mask = (1 << pin->ucGpioPinBitShift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

211

switch(gpio->mask) {

sys/dev/drm/amd/amdgpu/amdgpu_gfx.c

113

void amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se, unsigned max_sh)

sys/dev/drm/amd/amdgpu/amdgpu_gfx.c

118

memset(mask, 0, sizeof(*mask) * max_se * max_sh);

sys/dev/drm/amd/amdgpu/amdgpu_gfx.c

134

mask[se * max_sh + sh] |= 1u << cu;

sys/dev/drm/amd/amdgpu/amdgpu_gfx.h

334

void amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se,

sys/dev/drm/amd/amdgpu/amdgpu_mode.h

494

u32 mask;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

669

static ssize_t amdgpu_read_mask(const char *buf, size_t count, uint32_t *mask)

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

679

*mask = 0;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

691

*mask |= 1 << level;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

707

uint32_t mask = 0;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

709

ret = amdgpu_read_mask(buf, count, &mask);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

714

ret = amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

743

uint32_t mask = 0;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

745

ret = amdgpu_read_mask(buf, count, &mask);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

750

ret = amdgpu_dpm_force_clock_level(adev, PP_MCLK, mask);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

779

uint32_t mask = 0;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

781

ret = amdgpu_read_mask(buf, count, &mask);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

786

ret = amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask);

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

109

if ((val & mask) == reg_val)

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

97

uint32_t reg_val, uint32_t mask, bool check_changed)

sys/dev/drm/amd/amdgpu/amdgpu_psp.h

197

uint32_t field_val, uint32_t mask, bool check_changed);

sys/dev/drm/amd/amdgpu/amdgpu_ring.c

380

uint32_t ref, uint32_t mask)

sys/dev/drm/amd/amdgpu/amdgpu_ring.c

383

amdgpu_ring_emit_reg_wait(ring, reg1, mask, mask);

sys/dev/drm/amd/amdgpu/amdgpu_ring.h

163

uint32_t val, uint32_t mask);

sys/dev/drm/amd/amdgpu/amdgpu_ring.h

166

uint32_t ref, uint32_t mask);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1608

uint32_t mask = 0xffffffff << shift;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1611

mask &= 0xffffffff >> (bytes - len) * 8;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1618

if (!write || mask != 0xffffffff)

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1621

value &= ~mask;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1622

value |= (*(uint32_t *)buf << shift) & mask;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1627

value = (value & mask) >> shift;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1686

unsigned shift, parent_shift, mask;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1736

mask = amdgpu_vm_entries_mask(adev, cursor.level);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1737

pe_start = ((cursor.pfn >> shift) & mask) * 8;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1738

entry_end = (uint64_t)(mask + 1) << shift;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

487

unsigned mask, shift, idx;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

493

mask = amdgpu_vm_entries_mask(adev, cursor->level);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

497

idx = (cursor->pfn >> shift) & mask;

sys/dev/drm/amd/amdgpu/atom.c

763

uint32_t dst, mask, src, saved;

sys/dev/drm/amd/amdgpu/atom.c

767

mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);

sys/dev/drm/amd/amdgpu/atom.c

768

SDEBUG(" mask: 0x%08x", mask);

sys/dev/drm/amd/amdgpu/atom.c

771

dst &= mask;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6607

enum pp_clock_type type, uint32_t mask)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6615

if (mask == 0)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6623

pi->dpm_level_enable_mask.sclk_dpm_enable_mask & mask);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6630

pi->dpm_level_enable_mask.mclk_dpm_enable_mask & mask);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6635

uint32_t tmp = mask & pi->dpm_level_enable_mask.pcie_dpm_enable_mask;

sys/dev/drm/amd/amdgpu/ci_dpm.c

703

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/ci_dpm.c

717

data &= ~config_regs->mask;

sys/dev/drm/amd/amdgpu/ci_dpm.c

718

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/ci_dpm.h

170

u32 mask;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3244

uint32_t disp_int, mask;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3254

mask = interrupt_status_offsets[hpd].hpd;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3256

if (disp_int & mask) {

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3371

uint32_t disp_int, mask;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3381

mask = interrupt_status_offsets[hpd].hpd;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3383

if (disp_int & mask) {

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3130

uint32_t disp_int, mask, tmp;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3140

mask = interrupt_status_offsets[hpd].hpd;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3142

if (disp_int & mask) {

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1622

u32 data, mask;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1630

mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se /

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1633

return (~data) & mask;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3390

u32 mask;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3406

mask = RLC_SERDES_NONCU_MASTER_BUSY__SE_MASTER_BUSY_MASK |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3411

if ((RREG32(mmRLC_SERDES_NONCU_MASTER_BUSY) & mask) == 0)

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3452

u32 tmp, i, mask;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3457

mask = RLC_GPM_STAT__GFX_POWER_STATUS_MASK |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3460

if ((RREG32(mmRLC_GPM_STAT) & mask) == mask)

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3902

u32 data, mask;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3910

mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3912

return (~data) & mask;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5177

u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5194

mask = 1;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5205

if (bitmap & mask) {

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5207

ao_bitmap |= mask;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5210

mask <<= 1;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3552

u32 data, mask;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3559

mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se /

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3562

return (~data) & mask;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3915

u32 mask;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3939

mask = RLC_SERDES_NONCU_MASTER_BUSY__SE_MASTER_BUSY_MASK |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3944

if ((RREG32(mmRLC_SERDES_NONCU_MASTER_BUSY) & mask) == 0)

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7096

u32 data, mask;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7101

mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7103

return ~REG_GET_FIELD(data, CC_GC_SHADER_ARRAY_CONFIG, INACTIVE_CUS) & mask;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7109

u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7126

mask = 1;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7137

if (bitmap & mask) {

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7139

ao_bitmap |= mask;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7142

mask <<= 1;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1891

u32 data, mask;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1899

mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se /

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1902

return (~data) & mask;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2025

u32 mask;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2049

mask = RLC_SERDES_NONCU_MASTER_BUSY__SE_MASTER_BUSY_MASK |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2054

if ((RREG32_SOC15(GC, 0, mmRLC_SERDES_NONCU_MASTER_BUSY) & mask) == 0)

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

370

uint32_t addr1, uint32_t ref, uint32_t mask,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

386

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4490

uint32_t val, uint32_t mask)

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4492

gfx_v9_0_wait_reg_mem(ring, 0, 0, 0, reg, 0, val, mask, 0x20);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4497

uint32_t ref, uint32_t mask)

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4506

ref, mask, 0x20);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4509

ref, mask);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4964

u32 data, mask;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4972

mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4974

return (~data) & mask;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4981

u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4992

mask = 1;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

5003

if (bitmap & mask) {

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

5005

ao_bitmap |= mask;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

5008

mask <<= 1;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

927

uint32_t mask, cu_bitmap, counter;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

939

mask = 1;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

945

if (cu_info->bitmap[i][j] & mask) {

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

949

cu_bitmap |= mask;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

954

mask <<= 1;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

317

uint32_t ref, uint32_t mask)

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

329

ref, mask);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1500

u32 mask;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1509

mask = 1 << pi->uvd_boot_level;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1511

mask = 0x1f;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1524

mask);

sys/dev/drm/amd/amdgpu/kv_dpm.c

423

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/kv_dpm.c

437

data &= ~config_regs->mask;

sys/dev/drm/amd/amdgpu/kv_dpm.c

438

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/kv_dpm.h

72

u32 mask;

sys/dev/drm/amd/amdgpu/kv_smc.c

127

u32 data, original_data, addr, extra_shift, t_byte, count, mask;

sys/dev/drm/amd/amdgpu/kv_smc.c

146

mask = 0;

sys/dev/drm/amd/amdgpu/kv_smc.c

150

mask = (mask << 8) | 0xff;

sys/dev/drm/amd/amdgpu/kv_smc.c

155

mask <<= 8;

sys/dev/drm/amd/amdgpu/kv_smc.c

158

mask = (mask << 8) | 0xff;

sys/dev/drm/amd/amdgpu/kv_smc.c

163

data |= original_data & mask;

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

100

uint32_t mask, uint32_t data)

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

103

direct_rd_mod_wt->mask_value = mask;

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

112

uint32_t mask, uint32_t wait)

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

115

direct_poll->mask_value = mask;

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

120

#define MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) { \

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

123

(mask), (data)); \

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

136

#define MMSCH_V1_0_INSERT_DIRECT_POLL(reg, mask, wait) { \

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

139

(mask), (wait)); \

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

322

u32 mask = REG_FIELD_MASK(MAILBOX_CONTROL, RCV_MSG_VALID);

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

330

while (reg & mask) {

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

369

u32 mask = REG_FIELD_MASK(MAILBOX_CONTROL, RCV_MSG_VALID);

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

374

if (!(reg & mask))

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

391

u32 mask = REG_FIELD_MASK(MAILBOX_CONTROL, TRN_MSG_ACK);

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

395

while (!(reg & mask)) {

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1271

uint32_t val, uint32_t mask)

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1273

sdma_v4_0_wait_reg_mem(ring, 0, 0, reg, 0, val, mask, 10);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

468

uint32_t ref, uint32_t mask,

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

485

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/drm/amd/amdgpu/si_dpm.c

2856

data &= ~config_regs->mask;

sys/dev/drm/amd/amdgpu/si_dpm.c

2857

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/si_dpm.h

855

u32 mask;

sys/dev/drm/amd/amdgpu/soc15_common.h

50

#define SOC15_WAIT_ON_RREG(ip, inst, reg, expected_value, mask, ret) \

sys/dev/drm/amd/amdgpu/soc15_common.h

56

while ((tmp_ & (mask)) != (expected_value)) { \

sys/dev/drm/amd/amdgpu/soc15_common.h

66

inst, #reg, (unsigned)expected_value, (unsigned)(tmp_ & (mask))); \

sys/dev/drm/amd/amdgpu/soc15_common.h

73

#define RREG32_SOC15_DPG_MODE(ip, inst, reg, mask, sram_sel) \

sys/dev/drm/amd/amdgpu/soc15_common.h

74

({ WREG32_SOC15(ip, inst, mmUVD_DPG_LMA_MASK, mask); \

sys/dev/drm/amd/amdgpu/soc15_common.h

82

#define WREG32_SOC15_DPG_MODE(ip, inst, reg, value, mask, sram_sel) \

sys/dev/drm/amd/amdgpu/soc15_common.h

85

WREG32_SOC15(ip, inst, mmUVD_DPG_LMA_MASK, mask); \

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1358

uint32_t val, uint32_t mask)

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1370

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1380

uint32_t data0, data1, mask;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1387

mask = 0xffffffff;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1388

uvd_v7_0_ring_emit_reg_wait(ring, data0, data1, mask);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1411

uint32_t mask)

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1415

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

584

u32 mask = 0;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

586

mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

587

mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

589

return !(RREG32(mmSRBM_STATUS2) & mask);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

669

u32 mask = 0;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

671

mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

672

mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

674

return !(RREG32(mmSRBM_STATUS2) & mask);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

982

uint32_t val, uint32_t mask)

sys/dev/drm/amd/amdgpu/vce_v4_0.c

986

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1393

uint32_t mask)

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1405

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1415

uint32_t data0, data1, mask;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1422

mask = 0xffffffff;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1423

vcn_v1_0_dec_ring_emit_reg_wait(ring, data0, data1, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1540

uint32_t mask)

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1544

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1782

uint32_t mask)

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1807

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1814

uint32_t data0, data1, mask;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1821

mask = 0xffffffff;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1822

vcn_v1_0_jpeg_ring_emit_reg_wait(ring, data0, data1, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1877

uint32_t reg, reg_offset, val, mask, i;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1913

mask = 0x1;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1928

ring->ring[ptr++] = mask;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1825

info->mask = (uint32_t) (1 <<

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1827

info->mask_y = info->mask + 2;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1828

info->mask_en = info->mask + 1;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1829

info->mask_mask = info->mask - 1;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

870

uint32_t mask = get_support_mask_for_device_id(id);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

872

return (le16_to_cpu(bp->object_info_tbl.v1_1->usDeviceSupport) & mask) != 0;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

544

info->mask = (uint32_t) (1 <<

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

546

info->mask_y = info->mask + 2;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

547

info->mask_en = info->mask + 1;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

548

info->mask_mask = info->mask - 1;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

982

uint32_t mask = get_support_mask_for_device_id(id);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

985

mask) != 0;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

157

uint32_t mask = 1 << i;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

159

if (mantissa & mask)

sys/dev/drm/amd/display/dc/calcs/custom_float.c

160

value |= mask;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

166

uint32_t mask = 1 << j;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

168

if (exponenta & mask)

sys/dev/drm/amd/display/dc/calcs/custom_float.c

169

value |= mask << i;

sys/dev/drm/amd/display/dc/core/dc_link.c

118

pin_info.mask);

sys/dev/drm/amd/display/dc/dc_helper.c

255

uint32_t addr, uint32_t shift, uint32_t mask, uint32_t condition_value,

sys/dev/drm/amd/display/dc/dc_helper.c

276

field_value = get_reg_field_value_ex(reg_val, mask, shift);

sys/dev/drm/amd/display/dc/dc_helper.c

335

uint32_t shift, mask, field_value;

sys/dev/drm/amd/display/dc/dc_helper.c

346

mask = va_arg(ap, uint32_t);

sys/dev/drm/amd/display/dc/dc_helper.c

349

reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift);

sys/dev/drm/amd/display/dc/dc_helper.c

37

uint32_t shift, mask, field_value;

sys/dev/drm/amd/display/dc/dc_helper.c

47

mask = va_arg(ap, uint32_t);

sys/dev/drm/amd/display/dc/dc_helper.c

50

reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift);

sys/dev/drm/amd/display/dc/dc_helper.c

61

uint8_t shift, uint32_t mask, uint32_t *field_value);

sys/dev/drm/amd/display/dc/dc_helper.c

63

uint8_t shift, uint32_t mask, uint32_t *field_value)

sys/dev/drm/amd/display/dc/dc_helper.c

66

*field_value = get_reg_field_value_ex(reg_val, mask, shift);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h

52

unsigned int mask);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

487

void dcn10_get_hw_state(struct dc *dc, char *pBuf, unsigned int bufSize, unsigned int mask)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

508

if (mask == 0x0)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

509

mask = 0xFFFF; // Default, capture all, invariant only

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

511

if ((mask & DC_HW_STATE_MASK_HUBBUB) && remaining_buf_size > 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

517

if ((mask & DC_HW_STATE_MASK_HUBP) && remaining_buf_size > 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

518

chars_printed = dcn10_get_hubp_states(dc, pBuf, remaining_buf_size, mask & DC_HW_STATE_INVAR_ONLY);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

523

if ((mask & DC_HW_STATE_MASK_RQ) && remaining_buf_size > 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

529

if ((mask & DC_HW_STATE_MASK_DLG) && remaining_buf_size > 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

535

if ((mask & DC_HW_STATE_MASK_TTU) && remaining_buf_size > 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

541

if ((mask & DC_HW_STATE_MASK_CM) && remaining_buf_size > 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

547

if ((mask & DC_HW_STATE_MASK_MPCC) && remaining_buf_size > 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

553

if ((mask & DC_HW_STATE_MASK_OTG) && remaining_buf_size > 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

559

if ((mask & DC_HW_STATE_MASK_CLOCKS) && remaining_buf_size > 0)

sys/dev/drm/amd/display/dc/dm_services.h

114

uint32_t mask,

sys/dev/drm/amd/display/dc/dm_services.h

117

return (mask & reg_value) >> shift;

sys/dev/drm/amd/display/dc/dm_services.h

129

uint32_t mask,

sys/dev/drm/amd/display/dc/dm_services.h

132

ASSERT(mask != 0);

sys/dev/drm/amd/display/dc/dm_services.h

133

return (reg_value & ~mask) | (mask & (value << shift));

sys/dev/drm/amd/display/dc/dm_services.h

155

uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value,

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

106

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

121

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

190

info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

222

info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

257

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

260

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

263

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICC_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

266

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICD_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

269

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICE_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

272

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICF_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

275

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICG_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

286

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD1_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

289

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD2_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

292

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD3_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

295

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD4_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

298

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD5_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

301

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD6_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

312

info->mask = DC_GPIO_SYNCA_A__DC_GPIO_HSYNCA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

316

info->mask = DC_GPIO_SYNCA_A__DC_GPIO_VSYNCA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

329

info->mask = DC_GPIO_GENLK_A__DC_GPIO_GENLK_CLK_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

333

info->mask =

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

338

info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_A_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

342

info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_B_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

360

info->mask_y = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

361

info->mask_en = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

362

info->mask_mask = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

41

uint32_t mask,

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

49

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

79

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

101

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

128

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

143

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

212

info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

244

info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

279

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

282

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

285

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICC_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

288

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICD_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

291

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICE_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

294

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICF_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

297

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICG_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

308

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD1_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

311

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD2_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

314

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD3_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

317

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD4_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

320

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD5_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

323

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD6_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

334

info->mask = DC_GPIO_SYNCA_A__DC_GPIO_HSYNCA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

338

info->mask = DC_GPIO_SYNCA_A__DC_GPIO_VSYNCA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

351

info->mask = DC_GPIO_GENLK_A__DC_GPIO_GENLK_CLK_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

355

info->mask =

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

360

info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_A_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

364

info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_B_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

382

info->mask_y = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

383

info->mask_en = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

384

info->mask_mask = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

63

uint32_t mask,

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

71

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

103

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

130

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

145

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

166

*en = index_from_vector(mask);

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

219

info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

251

info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

286

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

289

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

292

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICC_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

295

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICD_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

298

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICE_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

301

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICF_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

304

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICG_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

315

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD1_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

318

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD2_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

321

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD3_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

324

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD4_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

327

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD5_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

330

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD6_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

341

info->mask = DC_GPIO_SYNCA_A__DC_GPIO_HSYNCA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

345

info->mask = DC_GPIO_SYNCA_A__DC_GPIO_VSYNCA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

358

info->mask = DC_GPIO_GENLK_A__DC_GPIO_GENLK_CLK_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

362

info->mask =

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

367

info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_A_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

371

info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_B_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

380

info->mask = (1 << en);

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

381

result = (info->mask <= GPIO_GPIO_PAD_MAX);

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

394

info->mask_y = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

395

info->mask_en = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

396

info->mask_mask = info->mask;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

48

uint32_t mask = 1;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

51

if (vector == mask)

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

55

mask <<= 1;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

56

} while (mask);

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

65

uint32_t mask,

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

73

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

101

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

128

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

143

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

212

info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

244

info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

279

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

282

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

285

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICC_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

288

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICD_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

291

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICE_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

294

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICF_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

297

info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICG_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

308

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD1_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

311

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD2_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

314

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD3_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

317

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD4_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

320

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD5_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

323

info->mask = DC_GPIO_HPD_A__DC_GPIO_HPD6_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

334

info->mask = DC_GPIO_SYNCA_A__DC_GPIO_HSYNCA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

338

info->mask = DC_GPIO_SYNCA_A__DC_GPIO_VSYNCA_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

351

info->mask = DC_GPIO_GENLK_A__DC_GPIO_GENLK_CLK_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

355

info->mask =

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

360

info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_A_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

364

info->mask = DC_GPIO_GENLK_A__DC_GPIO_SWAPLOCK_B_A_MASK;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

382

info->mask_y = info->mask;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

383

info->mask_en = info->mask;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

384

info->mask_mask = info->mask;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

63

uint32_t mask,

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

71

switch (mask) {

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

146

uint32_t mask)

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

151

if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

411

uint32_t mask,

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

418

if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en))

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

191

pin->store.mask = 0;

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

45

REG_GET(MASK_reg, MASK, &gpio->store.mask);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

54

REG_UPDATE(MASK_reg, MASK, gpio->store.mask);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.h

36

uint32_t mask;

sys/dev/drm/amd/display/dc/gpio/hw_gpio.h

98

uint32_t mask;

sys/dev/drm/amd/display/dc/gpio/hw_translate.h

32

uint32_t mask,

sys/dev/drm/amd/display/dc/inc/hw/gpio.h

76

uint32_t mask,

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

207

void (*get_hw_state)(struct dc *dc, char *pBuf, unsigned int bufSize, unsigned int mask);

sys/dev/drm/amd/display/dc/inc/reg_helper.h

398

uint8_t shift, uint32_t mask, uint32_t *field_value);

sys/dev/drm/amd/display/include/gpio_service_interface.h

52

uint32_t mask);

sys/dev/drm/amd/display/include/gpio_service_interface.h

57

uint32_t mask,

sys/dev/drm/amd/display/include/gpio_types.h

82

uint32_t mask;

sys/dev/drm/amd/include/kgd_pp_interface.h

222

int (*force_clock_level)(void *handle, enum pp_clock_type type, uint32_t mask);

sys/dev/drm/amd/include/linux/chash.h

257

unsigned long mask;

sys/dev/drm/amd/include/linux/chash.h

277

(iter).mask = 1UL << ((s) & (BITS_PER_LONG - 1)), \

sys/dev/drm/amd/include/linux/chash.h

286

(iter).mask = (iter).mask << 1 | \

sys/dev/drm/amd/include/linux/chash.h

287

(iter).mask >> (BITS_PER_LONG - 1); \

sys/dev/drm/amd/include/linux/chash.h

295

iter.mask);

sys/dev/drm/amd/include/linux/chash.h

301

iter.mask);

sys/dev/drm/amd/include/linux/chash.h

307

iter.table->valid_bitmap[iter.slot >> _CHASH_LONG_SHIFT] |= iter.mask;

sys/dev/drm/amd/include/linux/chash.h

308

iter.table->occup_bitmap[iter.slot >> _CHASH_LONG_SHIFT] |= iter.mask;

sys/dev/drm/amd/include/linux/chash.h

313

iter.table->valid_bitmap[iter.slot >> _CHASH_LONG_SHIFT] &= ~iter.mask;

sys/dev/drm/amd/include/linux/chash.h

318

iter.table->occup_bitmap[iter.slot >> _CHASH_LONG_SHIFT] &= ~iter.mask;

sys/dev/drm/amd/lib/chash.c

367

iter->mask = first_redundant.mask;

sys/dev/drm/amd/powerplay/amd_powerplay.c

714

enum pp_clock_type type, uint32_t mask)

sys/dev/drm/amd/powerplay/amd_powerplay.c

733

ret = hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1299

uint16_t end_index, uint32_t mask, uint32_t *efuse)

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1314

*efuse = result ? 0 : le32_to_cpu(efuse_param.ulEfuseValue) & mask;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

312

uint16_t end_index, uint32_t mask, uint32_t *efuse);

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

820

enum pp_clock_type type, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

827

low = mask ? (ffs(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

828

high = mask ? (fls(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

108

enum pp_clock_type type, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4362

enum pp_clock_type type, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4366

if (mask == 0)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4374

data->dpm_level_enable_mask.sclk_dpm_enable_mask & mask);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4380

data->dpm_level_enable_mask.mclk_dpm_enable_mask & mask);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4384

uint32_t tmp = mask & data->dpm_level_enable_mask.pcie_dpm_enable_mask;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.h

48

uint32_t mask;

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

906

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

926

data &= ~config_regs->mask;

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

927

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1499

enum pp_clock_type type, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1505

mask);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1508

mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

107

uint32_t value, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

119

if ((cur_value & mask) == (value & mask))

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

140

uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

148

return phm_wait_on_register(hwmgr, indirect_port + 1, mask, value);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

153

uint32_t value, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

164

if ((cur_value & mask) != (value & mask))

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

179

uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

186

value, mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

371

int32_t mask = 0;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

375

mask = mask << 1;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

377

mask |= 0x1;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

379

mask &= 0xFFFFFFFE;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

382

return mask;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

520

uint32_t phm_get_lowest_enabled_level(struct pp_hwmgr *hwmgr, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

524

while (0 == (mask & (1 << level)))

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

88

u32 mask = 0;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

93

mask = 0xFF << shift;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

95

mask = 0xFFFF << shift;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

97

original_data &= ~mask;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

100

uint32_t value, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

106

uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

163

#define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

164

phm_wait_on_indirect_register(hwmgr, mm##port##_INDEX, index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

167

#define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

168

PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

174

#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

176

mm##port##_INDEX, index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

178

#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

179

PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

188

port, index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

190

mm##port##_INDEX_11, index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

192

#define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

193

PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

202

port, index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

204

mm##port##_INDEX_11, index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

206

#define PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

207

PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

215

index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

217

index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

219

#define PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

221

mm##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

64

uint32_t value, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

68

uint32_t value, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

91

extern uint32_t phm_get_lowest_enabled_level(struct pp_hwmgr *hwmgr, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4004

enum pp_clock_type type, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4010

data->smc_state_table.gfx_boot_level = mask ? (ffs(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4011

data->smc_state_table.gfx_max_level = mask ? (fls(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4023

data->smc_state_table.mem_boot_level = mask ? (ffs(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4024

data->smc_state_table.mem_max_level = mask ? (fls(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

934

uint32_t mask = 0;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

945

mask |= (uint32_t)(i << (8 * j));

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

953

pp_table->LedPin0 = (uint8_t)(mask & 0xff);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

954

pp_table->LedPin1 = (uint8_t)((mask >> 8) & 0xff);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

955

pp_table->LedPin2 = (uint8_t)((mask >> 16) & 0xff);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

813

data &= ~config_regs->mask;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

814

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

819

data &= ~config_regs->mask;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

820

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

825

data &= ~config_regs->mask;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

826

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

845

data &= ~config_regs->mask;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

846

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.h

47

uint32_t mask;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.h

55

uint32_t mask;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1799

enum pp_clock_type type, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1807

soft_min_level = mask ? (ffs(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1808

soft_max_level = mask ? (fls(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1827

soft_min_level = mask ? (ffs(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1828

soft_max_level = mask ? (fls(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

51

enum pp_clock_type type, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2238

enum pp_clock_type type, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2246

soft_min_level = mask ? (ffs(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2247

soft_max_level = mask ? (fls(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2273

soft_min_level = mask ? (ffs(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2274

soft_max_level = mask ? (fls(mask) - 1) : 0;

sys/dev/drm/amd/powerplay/inc/hwmgr.h

302

int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1898

u32 mask = 0;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1909

mask |= (i << (8 * j));

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1916

if (mask)

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1919

mask);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

322

uint32_t mask = (1 << ((AVFS_EN_MSB - AVFS_EN_LSB) + 1)) - 1;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

328

mask, &efuse)) {

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1502

uint32_t mask = (1 << ((STRAP_ASIC_RO_MSB - STRAP_ASIC_RO_LSB) + 1)) - 1;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1507

mask, &efuse);

sys/dev/drm/drm_edid.c

3481

u16 mask;

sys/dev/drm/drm_edid.c

3544

mask = (db[10 + offset] << 8) | db[11 + offset];

sys/dev/drm/drm_edid.c

3546

mask = 0xffff;

sys/dev/drm/drm_edid.c

3549

if (mask & (1 << i))

sys/dev/drm/drm_fb_helper.c

1358

u32 mask = (1 << info->var.transp.length) - 1;

sys/dev/drm/drm_fb_helper.c

1360

mask <<= info->var.transp.offset;

sys/dev/drm/drm_fb_helper.c

1361

value |= mask;

sys/dev/drm/drm_fb_helper.c

2342

const u64 mask = BIT_ULL(fb_helper->connector_count) - 1;

sys/dev/drm/drm_fb_helper.c

2401

if ((conn_configured & mask) != mask) {

sys/dev/drm/drm_hashtab.c

145

unsigned long mask = (1UL << bits) - 1;

sys/dev/drm/drm_hashtab.c

154

unshifted_key = (unshifted_key + 1) & mask;

sys/dev/drm/i915/i915_cmd_parser.c

1001

mask = engine->get_cmd_length_mask(cmd_header);

sys/dev/drm/i915/i915_cmd_parser.c

1002

if (!mask)

sys/dev/drm/i915/i915_cmd_parser.c

1006

default_desc->cmd.mask = ~0u << MIN_OPCODE_SHIFT;

sys/dev/drm/i915/i915_cmd_parser.c

1007

default_desc->length.mask = mask;

sys/dev/drm/i915/i915_cmd_parser.c

1158

const u32 reg_addr = cmd[offset] & desc->reg.mask;

sys/dev/drm/i915/i915_cmd_parser.c

1172

if (reg->mask) {

sys/dev/drm/i915/i915_cmd_parser.c

1187

(cmd[offset + 1] & reg->mask) != reg->value)) {

sys/dev/drm/i915/i915_cmd_parser.c

1202

if (desc->bits[i].mask == 0)

sys/dev/drm/i915/i915_cmd_parser.c

1222

desc->bits[i].mask;

sys/dev/drm/i915/i915_cmd_parser.c

1227

desc->bits[i].mask,

sys/dev/drm/i915/i915_cmd_parser.c

123

u32 mask;

sys/dev/drm/i915/i915_cmd_parser.c

1315

length = ((*cmd & desc->length.mask) + LENGTH_BIAS);

sys/dev/drm/i915/i915_cmd_parser.c

135

u32 mask;

sys/dev/drm/i915/i915_cmd_parser.c

149

u32 mask;

sys/dev/drm/i915/i915_cmd_parser.c

167

u32 mask;

sys/dev/drm/i915/i915_cmd_parser.c

224

.reg = { .offset = 1, .mask = 0x007FFFFC, .step = 2 } ),

sys/dev/drm/i915/i915_cmd_parser.c

226

.reg = { .offset = 1, .mask = 0x007FFFFC },

sys/dev/drm/i915/i915_cmd_parser.c

229

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

233

.reg = { .offset = 1, .mask = 0x007FFFFC },

sys/dev/drm/i915/i915_cmd_parser.c

236

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

259

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

266

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

272

.mask = MI_REPORT_PERF_COUNT_GGTT,

sys/dev/drm/i915/i915_cmd_parser.c

278

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

286

.mask = MEDIA_VFE_STATE_MMIO_ACCESS_MASK,

sys/dev/drm/i915/i915_cmd_parser.c

295

.mask = (PIPE_CONTROL_MMIO_WRITE | PIPE_CONTROL_NOTIFY),

sys/dev/drm/i915/i915_cmd_parser.c

300

.mask = (PIPE_CONTROL_GLOBAL_GTT_IVB |

sys/dev/drm/i915/i915_cmd_parser.c

317

.reg = { .offset = 1, .mask = 0x007FFFFC, .step = 1 } ),

sys/dev/drm/i915/i915_cmd_parser.c

337

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

344

.mask = MI_FLUSH_DW_NOTIFY,

sys/dev/drm/i915/i915_cmd_parser.c

349

.mask = MI_FLUSH_DW_USE_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

356

.mask = MI_FLUSH_DW_STORE_INDEX,

sys/dev/drm/i915/i915_cmd_parser.c

364

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

381

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

388

.mask = MI_FLUSH_DW_NOTIFY,

sys/dev/drm/i915/i915_cmd_parser.c

393

.mask = MI_FLUSH_DW_USE_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

400

.mask = MI_FLUSH_DW_STORE_INDEX,

sys/dev/drm/i915/i915_cmd_parser.c

408

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

418

.mask = MI_GLOBAL_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

425

.mask = MI_FLUSH_DW_NOTIFY,

sys/dev/drm/i915/i915_cmd_parser.c

430

.mask = MI_FLUSH_DW_USE_GTT,

sys/dev/drm/i915/i915_cmd_parser.c

437

.mask = MI_FLUSH_DW_STORE_INDEX,

sys/dev/drm/i915/i915_cmd_parser.c

513

u32 mask;

sys/dev/drm/i915/i915_cmd_parser.c

598

.mask = ~HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE,

sys/dev/drm/i915/i915_cmd_parser.c

601

.mask = ~(HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE << 16 |

sys/dev/drm/i915/i915_cmd_parser.c

729

u32 curr = desc->cmd.value & desc->cmd.mask;

sys/dev/drm/i915/i915_cmd_parser.c

971

if (((cmd_header ^ desc->cmd.value) & desc->cmd.mask) == 0)

sys/dev/drm/i915/i915_cmd_parser.c

992

u32 mask;

sys/dev/drm/i915/i915_cmd_parser.c

994

if (((cmd_header ^ desc->cmd.value) & desc->cmd.mask) == 0)

sys/dev/drm/i915/i915_drv.c

2812

u32 mask, u32 val)

sys/dev/drm/i915/i915_drv.c

2821

return wait_for((I915_READ_NOTRACE(VLV_GTLC_PW_STATUS) & mask) == val,

sys/dev/drm/i915/i915_drv.c

2855

u32 mask;

sys/dev/drm/i915/i915_drv.c

2866

mask = VLV_GTLC_ALLOWWAKEACK;

sys/dev/drm/i915/i915_drv.c

2867

val = allow ? mask : 0;

sys/dev/drm/i915/i915_drv.c

2869

err = vlv_wait_for_pw_status(dev_priv, mask, val);

sys/dev/drm/i915/i915_drv.c

2879

u32 mask;

sys/dev/drm/i915/i915_drv.c

2882

mask = VLV_GTLC_PW_MEDIA_STATUS_MASK | VLV_GTLC_PW_RENDER_STATUS_MASK;

sys/dev/drm/i915/i915_drv.c

2883

val = wait_for_on ? mask : 0;

sys/dev/drm/i915/i915_drv.c

2892

if (vlv_wait_for_pw_status(dev_priv, mask, val))

sys/dev/drm/i915/i915_drv.c

2908

u32 mask;

sys/dev/drm/i915/i915_drv.c

2917

mask = VLV_GTLC_RENDER_CTX_EXISTS | VLV_GTLC_MEDIA_CTX_EXISTS;

sys/dev/drm/i915/i915_drv.c

2918

WARN_ON((I915_READ(VLV_GTLC_WAKE_CTRL) & mask) != mask);

sys/dev/drm/i915/i915_drv.h

1330

u32 mask;

sys/dev/drm/i915/i915_drv.h

2867

uint32_t mask,

sys/dev/drm/i915/i915_gem.c

5166

gfp_t mask;

sys/dev/drm/i915/i915_gem.c

5188

mask = GFP_HIGHUSER | __GFP_RECLAIMABLE;

sys/dev/drm/i915/i915_gem.c

5191

mask &= ~__GFP_HIGHMEM;

sys/dev/drm/i915/i915_gem.c

5192

mask |= __GFP_DMA32;

sys/dev/drm/i915/i915_gem.c

5197

mapping_set_gfp_mask(mapping, mask);

sys/dev/drm/i915/i915_gem_gtt.h

467

const u32 mask = NUM_PTE(pde_shift) - 1;

sys/dev/drm/i915/i915_gem_gtt.h

469

return (address >> PAGE_SHIFT) & mask;

sys/dev/drm/i915/i915_gem_gtt.h

478

const u64 mask = ~((1ULL << pde_shift) - 1);

sys/dev/drm/i915/i915_gem_gtt.h

486

if ((addr & mask) != (end & mask))

sys/dev/drm/i915/i915_irq.c

227

uint32_t mask,

sys/dev/drm/i915/i915_irq.c

2279

u32 mask = PORTA_HOTPLUG_STATUS_MASK |

sys/dev/drm/i915/i915_irq.c

2283

dig_hotplug_reg &= ~mask;

sys/dev/drm/i915/i915_irq.c

233

WARN_ON(bits & ~mask);

sys/dev/drm/i915/i915_irq.c

236

val &= ~mask;

sys/dev/drm/i915/i915_irq.c

254

uint32_t mask,

sys/dev/drm/i915/i915_irq.c

258

i915_hotplug_interrupt_update_locked(dev_priv, mask, bits);

sys/dev/drm/i915/i915_irq.c

349

void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask)

sys/dev/drm/i915/i915_irq.c

351

ilk_update_gt_irq(dev_priv, mask, mask);

sys/dev/drm/i915/i915_irq.c

355

void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask)

sys/dev/drm/i915/i915_irq.c

357

ilk_update_gt_irq(dev_priv, mask, 0);

sys/dev/drm/i915/i915_irq.c

3982

u32 mask;

sys/dev/drm/i915/i915_irq.c

3988

mask = SDE_GMBUS | SDE_AUX_MASK | SDE_POISON;

sys/dev/drm/i915/i915_irq.c

3990

mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT;

sys/dev/drm/i915/i915_irq.c

3992

mask = SDE_GMBUS_CPT;

sys/dev/drm/i915/i915_irq.c

3995

I915_WRITE(SDEIMR, ~mask);

sys/dev/drm/i915/i915_irq.c

414

void gen6_unmask_pm_irq(struct drm_i915_private *dev_priv, u32 mask)

sys/dev/drm/i915/i915_irq.c

419

snb_update_pm_irq(dev_priv, mask, mask);

sys/dev/drm/i915/i915_irq.c

422

static void __gen6_mask_pm_irq(struct drm_i915_private *dev_priv, u32 mask)

sys/dev/drm/i915/i915_irq.c

424

snb_update_pm_irq(dev_priv, mask, 0);

sys/dev/drm/i915/i915_irq.c

427

void gen6_mask_pm_irq(struct drm_i915_private *dev_priv, u32 mask)

sys/dev/drm/i915/i915_irq.c

4288

u32 mask = SDE_GMBUS_ICP;

sys/dev/drm/i915/i915_irq.c

4295

I915_WRITE(SDEIMR, ~mask);

sys/dev/drm/i915/i915_irq.c

432

__gen6_mask_pm_irq(dev_priv, mask);

sys/dev/drm/i915/i915_perf.c

658

u32 mask = (OA_BUFFER_SIZE - 1);

sys/dev/drm/i915/i915_perf.c

707

head = (head + report_size) & mask) {

sys/dev/drm/i915/i915_perf.c

947

u32 mask = (OA_BUFFER_SIZE - 1);

sys/dev/drm/i915/i915_perf.c

993

head = (head + report_size) & mask) {

sys/dev/drm/i915/i915_reg.h

175

#define __MASKED_FIELD(mask, value) ((mask) << 16 | (value))

sys/dev/drm/i915/i915_reg.h

176

#define _MASKED_FIELD(mask, value) ({ \

sys/dev/drm/i915/i915_reg.h

177

if (__builtin_constant_p(mask)) \

sys/dev/drm/i915/i915_reg.h

178

BUILD_BUG_ON_MSG(((mask) & 0xffff0000), "Incorrect mask"); \

sys/dev/drm/i915/i915_reg.h

181

if (__builtin_constant_p(mask) && __builtin_constant_p(value)) \

sys/dev/drm/i915/i915_reg.h

182

BUILD_BUG_ON_MSG((value) & ~(mask), \

sys/dev/drm/i915/i915_reg.h

184

__MASKED_FIELD(mask, value); })

sys/dev/drm/i915/i915_reg.h

3223

#define PHY_CH_POWER_DOWN_OVRD(mask, phy, ch) ((mask) << (8 * (phy) + 4 * (ch) + 11))

sys/dev/drm/i915/i915_request.h

726

#define for_each_active(mask, idx) \

sys/dev/drm/i915/i915_request.h

727

for (; mask ? idx = ffs(mask) - 1, 1 : 0; mask &= ~BIT(idx))

sys/dev/drm/i915/i915_sysfs.c

59

unsigned int mask;

sys/dev/drm/i915/i915_sysfs.c

61

mask = 0;

sys/dev/drm/i915/i915_sysfs.c

63

mask |= BIT(0);

sys/dev/drm/i915/i915_sysfs.c

65

mask |= BIT(1);

sys/dev/drm/i915/i915_sysfs.c

67

mask |= BIT(2);

sys/dev/drm/i915/i915_sysfs.c

69

return snprintf(buf, PAGE_SIZE, "%x\n", mask);

sys/dev/drm/i915/i915_utils.h

115

#define __mask_next_bit(mask) ({ \

sys/dev/drm/i915/i915_utils.h

116

int __idx = ffs(mask) - 1; \

sys/dev/drm/i915/i915_utils.h

117

mask &= ~BIT(__idx); \

sys/dev/drm/i915/intel_csr.c

220

uint32_t val, mask;

sys/dev/drm/i915/intel_csr.c

222

mask = DC_STATE_DEBUG_MASK_MEMORY_UP;

sys/dev/drm/i915/intel_csr.c

225

mask |= DC_STATE_DEBUG_MASK_CORES;

sys/dev/drm/i915/intel_csr.c

229

if ((val & mask) != mask) {

sys/dev/drm/i915/intel_csr.c

230

val |= mask;

sys/dev/drm/i915/intel_ddi.c

3289

uint8_t mask = pipe_config->lane_lat_optim_mask;

sys/dev/drm/i915/intel_ddi.c

3291

bxt_ddi_phy_set_lane_optim_mask(encoder, mask);

sys/dev/drm/i915/intel_display.c

11650

#define PIPE_CONF_CHECK_FLAGS(name, mask) do { \

sys/dev/drm/i915/intel_display.c

11651

if ((current_config->name ^ pipe_config->name) & (mask)) { \

sys/dev/drm/i915/intel_display.c

11654

(mask), \

sys/dev/drm/i915/intel_display.c

11655

current_config->name & (mask), \

sys/dev/drm/i915/intel_display.c

11656

pipe_config->name & (mask)); \

sys/dev/drm/i915/intel_display.c

5727

u32 mask = DPF_GATING_DIS | DPF_RAM_GATING_DIS | DPFR_GATING_DIS;

sys/dev/drm/i915/intel_display.c

5730

val |= mask;

sys/dev/drm/i915/intel_display.c

5732

val &= ~mask;

sys/dev/drm/i915/intel_display.c

6060

u64 mask;

sys/dev/drm/i915/intel_display.c

6066

mask = BIT_ULL(POWER_DOMAIN_PIPE(pipe));

sys/dev/drm/i915/intel_display.c

6067

mask |= BIT_ULL(POWER_DOMAIN_TRANSCODER(transcoder));

sys/dev/drm/i915/intel_display.c

6070

mask |= BIT_ULL(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe));

sys/dev/drm/i915/intel_display.c

6075

mask |= BIT_ULL(intel_encoder->power_domain);

sys/dev/drm/i915/intel_display.c

6079

mask |= BIT_ULL(POWER_DOMAIN_AUDIO);

sys/dev/drm/i915/intel_display.c

6082

mask |= BIT_ULL(POWER_DOMAIN_PLLS);

sys/dev/drm/i915/intel_display.c

6084

return mask;

sys/dev/drm/i915/intel_display.h

356

#define for_each_power_domain(domain, mask) \

sys/dev/drm/i915/intel_display.h

358

for_each_if(BIT_ULL(domain) & (mask))

sys/dev/drm/i915/intel_dp.c

2228

u32 mask,

sys/dev/drm/i915/intel_dp.c

2242

mask, value,

sys/dev/drm/i915/intel_dp.c

2247

pp_stat_reg, mask, value,

sys/dev/drm/i915/intel_dp.c

3738

uint32_t signal_levels, mask = 0;

sys/dev/drm/i915/intel_dp.c

3745

mask = DDI_BUF_EMP_MASK;

sys/dev/drm/i915/intel_dp.c

3752

mask = EDP_LINK_TRAIN_VOL_EMP_MASK_IVB;

sys/dev/drm/i915/intel_dp.c

3755

mask = EDP_LINK_TRAIN_VOL_EMP_MASK_SNB;

sys/dev/drm/i915/intel_dp.c

3758

mask = DP_VOLTAGE_MASK | DP_PRE_EMPHASIS_MASK;

sys/dev/drm/i915/intel_dp.c

3761

if (mask)

sys/dev/drm/i915/intel_dp.c

3770

intel_dp->DP = (intel_dp->DP & ~mask) | signal_levels;

sys/dev/drm/i915/intel_dpio_phy.c

489

i915_reg_t reg, u32 mask, u32 expected,

sys/dev/drm/i915/intel_dpio_phy.c

497

if ((val & mask) == expected)

sys/dev/drm/i915/intel_dpio_phy.c

506

phy, &vaf, reg.reg, val, (val & ~mask) | expected,

sys/dev/drm/i915/intel_dpio_phy.c

507

mask);

sys/dev/drm/i915/intel_dpio_phy.c

518

uint32_t mask;

sys/dev/drm/i915/intel_dpio_phy.c

523

#define _CHK(reg, mask, exp, fmt, ...) \

sys/dev/drm/i915/intel_dpio_phy.c

524

__phy_reg_verify_state(dev_priv, phy, reg, mask, exp, fmt, \

sys/dev/drm/i915/intel_dpio_phy.c

541

mask = OCL1_POWER_DOWN_EN | DW28_OLDO_DYN_PWR_DOWN_EN | SUS_CLK_CONFIG;

sys/dev/drm/i915/intel_dpio_phy.c

542

ok &= _CHK(BXT_PORT_CL1CM_DW28(phy), mask, mask,

sys/dev/drm/i915/intel_dpio_phy.c

556

mask = GRC_CODE_FAST_MASK | GRC_CODE_SLOW_MASK |

sys/dev/drm/i915/intel_dpio_phy.c

558

ok &= _CHK(BXT_PORT_REF_DW6(phy), mask, grc_code,

sys/dev/drm/i915/intel_dpio_phy.c

561

mask = GRC_DIS | GRC_RDY_OVRD;

sys/dev/drm/i915/intel_dpio_phy.c

562

ok &= _CHK(BXT_PORT_REF_DW8(phy), mask, mask,

sys/dev/drm/i915/intel_dpio_phy.c

621

uint8_t mask;

sys/dev/drm/i915/intel_dpio_phy.c

625

mask = 0;

sys/dev/drm/i915/intel_dpio_phy.c

630

mask |= BIT(lane);

sys/dev/drm/i915/intel_dpio_phy.c

633

return mask;

sys/dev/drm/i915/intel_drv.h

1384

void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);

sys/dev/drm/i915/intel_drv.h

1385

void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);

sys/dev/drm/i915/intel_drv.h

1386

void gen6_mask_pm_irq(struct drm_i915_private *dev_priv, u32 mask);

sys/dev/drm/i915/intel_drv.h

1387

void gen6_unmask_pm_irq(struct drm_i915_private *dev_priv, u32 mask);

sys/dev/drm/i915/intel_drv.h

1394

u32 mask)

sys/dev/drm/i915/intel_drv.h

1396

return mask & ~i915->gt_pm.rps.pm_intrmsk_mbz;

sys/dev/drm/i915/intel_drv.h

2079

bool override, unsigned int mask);

sys/dev/drm/i915/intel_engine_cs.c

332

unsigned int mask = 0;

sys/dev/drm/i915/intel_engine_cs.c

338

GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));

sys/dev/drm/i915/intel_engine_cs.c

348

mask |= ENGINE_MASK(i);

sys/dev/drm/i915/intel_engine_cs.c

356

if (WARN_ON(mask != ring_mask))

sys/dev/drm/i915/intel_engine_cs.c

357

device_info->ring_mask = mask;

sys/dev/drm/i915/intel_engine_cs.c

365

device_info->num_rings = hweight32(mask);

sys/dev/drm/i915/intel_guc.h

178

static inline void intel_guc_enable_msg(struct intel_guc *guc, u32 mask)

sys/dev/drm/i915/intel_guc.h

181

guc->msg_enabled_mask |= mask;

sys/dev/drm/i915/intel_guc.h

185

static inline void intel_guc_disable_msg(struct intel_guc *guc, u32 mask)

sys/dev/drm/i915/intel_guc.h

188

guc->msg_enabled_mask &= ~mask;

sys/dev/drm/i915/intel_lrc.c

2577

u32 mask, val = slices;

sys/dev/drm/i915/intel_lrc.c

2580

mask = GEN11_RPCS_S_CNT_MASK;

sys/dev/drm/i915/intel_lrc.c

2583

mask = GEN8_RPCS_S_CNT_MASK;

sys/dev/drm/i915/intel_lrc.c

2587

GEM_BUG_ON(val & ~mask);

sys/dev/drm/i915/intel_lrc.c

2588

val &= mask;

sys/dev/drm/i915/intel_panel.c

554

u32 tmp, mask;

sys/dev/drm/i915/intel_panel.c

567

mask = BACKLIGHT_DUTY_CYCLE_MASK;

sys/dev/drm/i915/intel_panel.c

570

mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;

sys/dev/drm/i915/intel_panel.c

573

tmp = I915_READ(BLC_PWM_CTL) & ~mask;

sys/dev/drm/i915/intel_pm.c

3942

u16 mask;

sys/dev/drm/i915/intel_pm.c

3945

mask = ICL_DDB_ENTRY_MASK;

sys/dev/drm/i915/intel_pm.c

3947

mask = SKL_DDB_ENTRY_MASK;

sys/dev/drm/i915/intel_pm.c

3948

entry->start = reg & mask;

sys/dev/drm/i915/intel_pm.c

3949

entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask;

sys/dev/drm/i915/intel_pm.c

6478

u32 mask = 0;

sys/dev/drm/i915/intel_pm.c

6482

mask |= GEN6_PM_RP_UP_EI_EXPIRED | GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT;

sys/dev/drm/i915/intel_pm.c

6484

mask |= GEN6_PM_RP_UP_EI_EXPIRED | GEN6_PM_RP_UP_THRESHOLD;

sys/dev/drm/i915/intel_pm.c

6486

mask &= dev_priv->pm_rps_events;

sys/dev/drm/i915/intel_pm.c

6488

return gen6_sanitize_rps_pm_mask(dev_priv, ~mask);

sys/dev/drm/i915/intel_psr.c

104

mask |= debug_mask;

sys/dev/drm/i915/intel_psr.c

106

I915_WRITE(EDP_PSR_IMR, ~mask);

sys/dev/drm/i915/intel_psr.c

788

u32 mask;

sys/dev/drm/i915/intel_psr.c

796

mask = EDP_PSR2_STATUS_STATE_MASK;

sys/dev/drm/i915/intel_psr.c

799

mask = EDP_PSR_STATUS_STATE_MASK;

sys/dev/drm/i915/intel_psr.c

804

err = intel_wait_for_register(dev_priv, reg, mask, 0, 50);

sys/dev/drm/i915/intel_psr.c

84

u32 debug_mask, mask;

sys/dev/drm/i915/intel_psr.c

86

mask = EDP_PSR_ERROR(TRANSCODER_EDP);

sys/dev/drm/i915/intel_psr.c

91

mask |= EDP_PSR_ERROR(TRANSCODER_A) |

sys/dev/drm/i915/intel_ringbuffer.c

432

u32 mask = ~0u;

sys/dev/drm/i915/intel_ringbuffer.c

439

mask &= ~BIT(0);

sys/dev/drm/i915/intel_ringbuffer.c

441

I915_WRITE(RING_HWSTAM(engine->mmio_base), mask);

sys/dev/drm/i915/intel_runtime_pm.c

1309

enum dpio_channel ch, bool override, unsigned int mask)

sys/dev/drm/i915/intel_runtime_pm.c

1338

if (!override || mask == 0xf) {

sys/dev/drm/i915/intel_runtime_pm.c

1351

} else if (mask != 0x0) {

sys/dev/drm/i915/intel_runtime_pm.c

1402

bool override, unsigned int mask)

sys/dev/drm/i915/intel_runtime_pm.c

1412

dev_priv->chv_phy_control |= PHY_CH_POWER_DOWN_OVRD(mask, phy, ch);

sys/dev/drm/i915/intel_runtime_pm.c

1422

phy, ch, mask, dev_priv->chv_phy_control);

sys/dev/drm/i915/intel_runtime_pm.c

1426

assert_chv_phy_powergate(dev_priv, phy, ch, override, mask);

sys/dev/drm/i915/intel_runtime_pm.c

2968

uint32_t mask;

sys/dev/drm/i915/intel_runtime_pm.c

2974

mask = 0;

sys/dev/drm/i915/intel_runtime_pm.c

2982

mask = DC_STATE_EN_DC9;

sys/dev/drm/i915/intel_runtime_pm.c

2985

mask = 0;

sys/dev/drm/i915/intel_runtime_pm.c

3005

mask |= DC_STATE_EN_UPTO_DC6;

sys/dev/drm/i915/intel_runtime_pm.c

3007

mask |= DC_STATE_EN_UPTO_DC5;

sys/dev/drm/i915/intel_runtime_pm.c

3009

DRM_DEBUG_KMS("Allowed DC state mask %02x\n", mask);

sys/dev/drm/i915/intel_runtime_pm.c

3011

return mask;

sys/dev/drm/i915/intel_runtime_pm.c

3635

unsigned int mask;

sys/dev/drm/i915/intel_runtime_pm.c

3637

mask = status & DPLL_PORTB_READY_MASK;

sys/dev/drm/i915/intel_runtime_pm.c

3638

if (mask == 0xf)

sys/dev/drm/i915/intel_runtime_pm.c

3639

mask = 0x0;

sys/dev/drm/i915/intel_runtime_pm.c

3645

PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0);

sys/dev/drm/i915/intel_runtime_pm.c

3647

mask = (status & DPLL_PORTC_READY_MASK) >> 4;

sys/dev/drm/i915/intel_runtime_pm.c

3648

if (mask == 0xf)

sys/dev/drm/i915/intel_runtime_pm.c

3649

mask = 0x0;

sys/dev/drm/i915/intel_runtime_pm.c

3655

PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH1);

sys/dev/drm/i915/intel_runtime_pm.c

3666

unsigned int mask;

sys/dev/drm/i915/intel_runtime_pm.c

3668

mask = status & DPLL_PORTD_READY_MASK;

sys/dev/drm/i915/intel_runtime_pm.c

3670

if (mask == 0xf)

sys/dev/drm/i915/intel_runtime_pm.c

3671

mask = 0x0;

sys/dev/drm/i915/intel_runtime_pm.c

3677

PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY1, DPIO_CH0);

sys/dev/drm/i915/intel_runtime_pm.c

469

u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx) |

sys/dev/drm/i915/intel_runtime_pm.c

472

return (I915_READ(regs->driver) & mask) == mask;

sys/dev/drm/i915/intel_runtime_pm.c

551

u32 mask;

sys/dev/drm/i915/intel_runtime_pm.c

553

mask = DC_STATE_EN_UPTO_DC5;

sys/dev/drm/i915/intel_runtime_pm.c

555

mask |= DC_STATE_EN_DC9;

sys/dev/drm/i915/intel_runtime_pm.c

557

mask |= DC_STATE_EN_UPTO_DC6;

sys/dev/drm/i915/intel_runtime_pm.c

559

return mask;

sys/dev/drm/i915/intel_runtime_pm.c

599

uint32_t mask;

sys/dev/drm/i915/intel_runtime_pm.c

605

mask = gen9_dc_mask(dev_priv);

sys/dev/drm/i915/intel_runtime_pm.c

607

val & mask, state);

sys/dev/drm/i915/intel_runtime_pm.c

610

if ((val & mask) != dev_priv->csr.dc_state)

sys/dev/drm/i915/intel_runtime_pm.c

612

dev_priv->csr.dc_state, val & mask);

sys/dev/drm/i915/intel_runtime_pm.c

614

val &= ~mask;

sys/dev/drm/i915/intel_runtime_pm.c

619

dev_priv->csr.dc_state = val & mask;

sys/dev/drm/i915/intel_runtime_pm.c

729

u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx);

sys/dev/drm/i915/intel_runtime_pm.c

733

if (bios_req & mask) {

sys/dev/drm/i915/intel_runtime_pm.c

736

if (!(drv_req & mask))

sys/dev/drm/i915/intel_runtime_pm.c

737

I915_WRITE(regs->driver, drv_req | mask);

sys/dev/drm/i915/intel_runtime_pm.c

738

I915_WRITE(regs->bios, bios_req & ~mask);

sys/dev/drm/i915/intel_runtime_pm.c

877

u32 mask;

sys/dev/drm/i915/intel_runtime_pm.c

881

mask = PUNIT_PWRGT_MASK(pw_idx);

sys/dev/drm/i915/intel_runtime_pm.c

888

((vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_STATUS) & mask) == state)

sys/dev/drm/i915/intel_runtime_pm.c

894

ctrl &= ~mask;

sys/dev/drm/i915/intel_runtime_pm.c

926

u32 mask;

sys/dev/drm/i915/intel_runtime_pm.c

930

mask = PUNIT_PWRGT_MASK(pw_idx);

sys/dev/drm/i915/intel_runtime_pm.c

935

state = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_STATUS) & mask;

sys/dev/drm/i915/intel_runtime_pm.c

949

ctrl = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL) & mask;

sys/dev/drm/i915/intel_sdvo.c

2287

uint16_t mask = 0;

sys/dev/drm/i915/intel_sdvo.c

2296

mask |= SDVO_OUTPUT_LVDS1;

sys/dev/drm/i915/intel_sdvo.c

2299

mask |= SDVO_OUTPUT_LVDS0;

sys/dev/drm/i915/intel_sdvo.c

2302

mask |= SDVO_OUTPUT_TMDS1;

sys/dev/drm/i915/intel_sdvo.c

2305

mask |= SDVO_OUTPUT_TMDS0;

sys/dev/drm/i915/intel_sdvo.c

2308

mask |= SDVO_OUTPUT_RGB1;

sys/dev/drm/i915/intel_sdvo.c

2311

mask |= SDVO_OUTPUT_RGB0;

sys/dev/drm/i915/intel_sdvo.c

2316

mask &= sdvo->caps.output_flags;

sys/dev/drm/i915/intel_sdvo.c

2317

num_bits = hweight16(mask);

sys/dev/drm/i915/intel_uncore.c

1369

d->mask = BIT(domain_id);

sys/dev/drm/i915/intel_uncore.c

2006

u32 mask,

sys/dev/drm/i915/intel_uncore.c

2013

#define done (((reg_value = I915_READ_FW(reg)) & mask) == value)

sys/dev/drm/i915/intel_uncore.c

2054

u32 mask,

sys/dev/drm/i915/intel_uncore.c

2071

reg, mask, value,

sys/dev/drm/i915/intel_uncore.c

2079

(reg_value & mask) == value,

sys/dev/drm/i915/intel_uncore.c

364

dev_priv->uncore.funcs.force_wake_put(dev_priv, domain->mask);

sys/dev/drm/i915/intel_uncore.c

403

active_domains |= domain->mask;

sys/dev/drm/i915/intel_uncore.c

611

fw_domains &= ~domain->mask;

sys/dev/drm/i915/intel_uncore.h

115

enum forcewake_domains mask;

sys/dev/drm/i915/intel_uncore.h

181

u32 mask,

sys/dev/drm/i915/intel_uncore.h

189

u32 mask,

sys/dev/drm/i915/intel_uncore.h

193

return __intel_wait_for_register(dev_priv, reg, mask, value, 2,

sys/dev/drm/i915/intel_uncore.h

198

u32 mask,

sys/dev/drm/i915/intel_uncore.h

206

u32 mask,

sys/dev/drm/i915/intel_uncore.h

210

return __intel_wait_for_register_fw(dev_priv, reg, mask, value,

sys/dev/drm/i915/intel_wopcm.c

220

i915_reg_t reg, u32 val, u32 mask,

sys/dev/drm/i915/intel_wopcm.c

225

GEM_BUG_ON(val & ~mask);

sys/dev/drm/i915/intel_wopcm.c

231

return (reg_val & mask) != (val | locked_bit) ? -EIO : 0;

sys/dev/drm/i915/intel_wopcm.c

248

u32 mask;

sys/dev/drm/i915/intel_wopcm.c

265

mask = GUC_WOPCM_OFFSET_MASK | GUC_WOPCM_OFFSET_VALID | huc_agent;

sys/dev/drm/i915/intel_wopcm.c

267

wopcm->guc.base | huc_agent, mask,

sys/dev/drm/i915/intel_workarounds.c

105

r->mask = mask;

sys/dev/drm/i915/intel_workarounds.c

116

#define WA_REG(addr, mask, val) wa_add(dev_priv, (addr), (mask), (val))

sys/dev/drm/i915/intel_workarounds.c

118

#define WA_SET_BIT_MASKED(addr, mask) \

sys/dev/drm/i915/intel_workarounds.c

119

WA_REG(addr, (mask), _MASKED_BIT_ENABLE(mask))

sys/dev/drm/i915/intel_workarounds.c

121

#define WA_CLR_BIT_MASKED(addr, mask) \

sys/dev/drm/i915/intel_workarounds.c

122

WA_REG(addr, (mask), _MASKED_BIT_DISABLE(mask))

sys/dev/drm/i915/intel_workarounds.c

124

#define WA_SET_FIELD_MASKED(addr, mask, value) \

sys/dev/drm/i915/intel_workarounds.c

125

WA_REG(addr, (mask), _MASKED_FIELD(mask, value))

sys/dev/drm/i915/intel_workarounds.c

628

.mask = val,

sys/dev/drm/i915/intel_workarounds.c

636

wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask,

sys/dev/drm/i915/intel_workarounds.c

641

.mask = mask,

sys/dev/drm/i915/intel_workarounds.c

66

i915_reg_t reg, const u32 mask, const u32 val)

sys/dev/drm/i915/intel_workarounds.c

83

if ((mask & ~r->mask) == 0) {

sys/dev/drm/i915/intel_workarounds.c

85

addr, r->mask, r->value);

sys/dev/drm/i915/intel_workarounds.c

87

r->value &= ~mask;

sys/dev/drm/i915/intel_workarounds.c

91

r->mask |= mask;

sys/dev/drm/i915/intel_workarounds.c

968

val &= ~wa->mask;

sys/dev/drm/i915/intel_workarounds.c

98

addr, mask, val);

sys/dev/drm/i915/intel_workarounds.h

14

u32 mask;

sys/dev/drm/i915/vlv_dsi.c

253

u32 mask;

sys/dev/drm/i915/vlv_dsi.c

270

mask = SPL_PKT_SENT_INTERRUPT;

sys/dev/drm/i915/vlv_dsi.c

272

MIPI_INTR_STAT(port), mask, mask,

sys/dev/drm/i915/vlv_dsi.c

77

u32 mask;

sys/dev/drm/i915/vlv_dsi.c

79

mask = LP_CTRL_FIFO_EMPTY | HS_CTRL_FIFO_EMPTY |

sys/dev/drm/i915/vlv_dsi.c

83

MIPI_GEN_FIFO_STAT(port), mask, mask,

sys/dev/drm/i915/vlv_dsi_pll.c

199

u32 mask;

sys/dev/drm/i915/vlv_dsi_pll.c

201

mask = BXT_DSI_PLL_DO_ENABLE | BXT_DSI_PLL_LOCKED;

sys/dev/drm/i915/vlv_dsi_pll.c

203

enabled = (val & mask) == mask;

sys/dev/drm/include/asm/atomic.h

36

#define atomic_or(mask, addr) \

sys/dev/drm/include/asm/atomic.h

40

: "r" (mask), "m" (*addr) \

sys/dev/drm/include/drm/ttm/ttm_bo_driver.h

532

ttm_flag_masked(uint32_t *old, uint32_t new, uint32_t mask)

sys/dev/drm/include/drm/ttm/ttm_bo_driver.h

534

*old ^= (*old ^ new) & mask;

sys/dev/drm/include/linux/atomic.h

145

#define atomic_clear_mask(mask, addr) \

sys/dev/drm/include/linux/atomic.h

149

: "r" (~mask), "m" (*addr) \

sys/dev/drm/include/linux/bitops.h

107

mask = (*addr) & BIT_MASK(size);

sys/dev/drm/include/linux/bitops.h

108

if (mask)

sys/dev/drm/include/linux/bitops.h

109

bit += __ffsl(mask);

sys/dev/drm/include/linux/bitops.h

119

long mask;

sys/dev/drm/include/linux/bitops.h

129

mask = ~(*addr) & BIT_MASK(size);

sys/dev/drm/include/linux/bitops.h

130

if (mask)

sys/dev/drm/include/linux/bitops.h

131

bit += __ffsl(mask);

sys/dev/drm/include/linux/bitops.h

141

long mask;

sys/dev/drm/include/linux/bitops.h

151

mask = (*addr) & BIT_MASK(offs);

sys/dev/drm/include/linux/bitops.h

152

if (mask)

sys/dev/drm/include/linux/bitops.h

153

return (bit + __flsl(mask));

sys/dev/drm/include/linux/bitops.h

159

return (bit + __flsl(mask));

sys/dev/drm/include/linux/bitops.h

167

long mask;

sys/dev/drm/include/linux/bitops.h

179

mask = (*addr) & ~BIT_MASK(offs);

sys/dev/drm/include/linux/bitops.h

180

if (mask)

sys/dev/drm/include/linux/bitops.h

181

return (bit + __ffsl(mask));

sys/dev/drm/include/linux/bitops.h

192

mask = (*addr) & BIT_MASK(size);

sys/dev/drm/include/linux/bitops.h

193

if (mask)

sys/dev/drm/include/linux/bitops.h

194

bit += __ffsl(mask);

sys/dev/drm/include/linux/bitops.h

205

long mask;

sys/dev/drm/include/linux/bitops.h

217

mask = ~(*addr) & ~BIT_MASK(offs);

sys/dev/drm/include/linux/bitops.h

218

if (mask)

sys/dev/drm/include/linux/bitops.h

219

return (bit + __ffsl(mask));

sys/dev/drm/include/linux/bitops.h

230

mask = ~(*addr) & BIT_MASK(size);

sys/dev/drm/include/linux/bitops.h

231

if (mask)

sys/dev/drm/include/linux/bitops.h

232

bit += __ffsl(mask);

sys/dev/drm/include/linux/bitops.h

264

long mask;

sys/dev/drm/include/linux/bitops.h

275

mask = BIT_MASK(tail);

sys/dev/drm/include/linux/bitops.h

276

if ((addr[i] & mask) != mask)

sys/dev/drm/include/linux/bitops.h

285

long mask;

sys/dev/drm/include/linux/bitops.h

296

mask = BIT_MASK(tail);

sys/dev/drm/include/linux/bitops.h

297

if ((addr[i] & mask) != 0)

sys/dev/drm/include/linux/bitops.h

335

const unsigned long mask = (1UL << (bit % units));

sys/dev/drm/include/linux/bitops.h

339

*p &= ~mask;

sys/dev/drm/include/linux/bitops.h

341

return ((v & mask) != 0);

sys/dev/drm/include/linux/bitops.h

423

unsigned long mask; /* bitmask for one long of region */

sys/dev/drm/include/linux/bitops.h

441

mask = (1UL << (nbitsinlong - 1));

sys/dev/drm/include/linux/bitops.h

442

mask += mask - 1;

sys/dev/drm/include/linux/bitops.h

443

mask <<= offset;

sys/dev/drm/include/linux/bitops.h

448

if (bitmap[index + i] & mask)

sys/dev/drm/include/linux/bitops.h

456

bitmap[index + i] |= mask;

sys/dev/drm/include/linux/bitops.h

461

bitmap[index + i] &= ~mask;

sys/dev/drm/include/linux/bitops.h

47

__ffs(int mask)

sys/dev/drm/include/linux/bitops.h

49

return (ffs(mask) - 1);

sys/dev/drm/include/linux/bitops.h

53

__fls(int mask)

sys/dev/drm/include/linux/bitops.h

55

return (fls(mask) - 1);

sys/dev/drm/include/linux/bitops.h

59

__ffsl(long mask)

sys/dev/drm/include/linux/bitops.h

61

return (ffsl(mask) - 1);

sys/dev/drm/include/linux/bitops.h

65

__flsl(long mask)

sys/dev/drm/include/linux/bitops.h

67

return (flsl(mask) - 1);

sys/dev/drm/include/linux/bitops.h

82

#define ffz(mask) __ffs(~(mask))

sys/dev/drm/include/linux/bitops.h

97

long mask;

sys/dev/drm/include/linux/kfifo.h

226

unsigned int mask;

sys/dev/drm/include/linux/pci.h

218

pci_set_dma_mask(struct pci_dev *dev, u64 mask)

sys/dev/drm/include/linux/pci.h

224

pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)

sys/dev/drm/include/linux/radix-tree.h

61

#define RADIX_TREE_INIT(mask) \

sys/dev/drm/include/linux/radix-tree.h

62

{ .rnode = NULL, .gfp_mask = mask, .height = 0 };

sys/dev/drm/include/linux/radix-tree.h

63

#define INIT_RADIX_TREE(root, mask) \

sys/dev/drm/include/linux/radix-tree.h

64

{ (root)->rnode = NULL; (root)->gfp_mask = mask; (root)->height = 0; }

sys/dev/drm/include/linux/radix-tree.h

65

#define RADIX_TREE(name, mask) \

sys/dev/drm/include/linux/radix-tree.h

66

struct radix_tree_root name = RADIX_TREE_INIT(mask)

sys/dev/drm/include/uapi/drm/radeon_drm.h

686

unsigned int __user *mask;

sys/dev/drm/linux_radix.c

103

if ((index & mask) == 0)

sys/dev/drm/linux_radix.c

91

unsigned long mask = RADIX_TREE_MAP_MASK << (RADIX_TREE_MAP_SHIFT * height);

sys/dev/drm/linux_rcu.c

146

nelms[n & nmask] = oelms[n & rcu->mask];

sys/dev/drm/linux_rcu.c

151

rcu->mask = nmask;

sys/dev/drm/linux_rcu.c

175

elm = &rcu->elms[rcu->e & rcu->mask];

sys/dev/drm/linux_rcu.c

200

elm = &rcu->elms[rcu->e & rcu->mask];

sys/dev/drm/linux_rcu.c

59

int mask;

sys/dev/drm/linux_rcu.c

80

elm = &rcu->elms[rcu->s & rcu->mask];

sys/dev/drm/radeon/atom.c

756

uint32_t dst, mask, src, saved;

sys/dev/drm/radeon/atom.c

760

mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);

sys/dev/drm/radeon/atom.c

761

ATOM_SDEBUG_PRINT(" mask: 0x%08x", mask);

sys/dev/drm/radeon/atom.c

764

dst &= mask;

sys/dev/drm/radeon/ci_dpm.c

572

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/ci_dpm.c

586

data &= ~config_regs->mask;

sys/dev/drm/radeon/ci_dpm.c

587

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/ci_dpm.h

169

u32 mask;

sys/dev/drm/radeon/cik.c

3077

u32 i, mask = 0;

sys/dev/drm/radeon/cik.c

3080

mask <<= 1;

sys/dev/drm/radeon/cik.c

3081

mask |= 1;

sys/dev/drm/radeon/cik.c

3083

return mask;

sys/dev/drm/radeon/cik.c

3101

u32 data, mask;

sys/dev/drm/radeon/cik.c

3112

mask = cik_create_bitmask(max_rb_num_per_se / sh_per_se);

sys/dev/drm/radeon/cik.c

3114

return data & mask;

sys/dev/drm/radeon/cik.c

3132

u32 data, mask;

sys/dev/drm/radeon/cik.c

3148

mask = 1;

sys/dev/drm/radeon/cik.c

3150

if (!(disabled_rbs & mask))

sys/dev/drm/radeon/cik.c

3151

enabled_rbs |= mask;

sys/dev/drm/radeon/cik.c

3152

mask <<= 1;

sys/dev/drm/radeon/cik.c

5811

u32 mask;

sys/dev/drm/radeon/cik.c

5825

mask = SE_MASTER_BUSY_MASK | GC_MASTER_BUSY | TC0_MASTER_BUSY | TC1_MASTER_BUSY;

sys/dev/drm/radeon/cik.c

5827

if ((RREG32(RLC_SERDES_NONCU_MASTER_BUSY) & mask) == 0)

sys/dev/drm/radeon/cik.c

5868

u32 tmp, i, mask;

sys/dev/drm/radeon/cik.c

5873

mask = GFX_POWER_STATUS | GFX_CLOCK_STATUS;

sys/dev/drm/radeon/cik.c

5875

if ((RREG32(RLC_GPM_STAT) & mask) == mask)

sys/dev/drm/radeon/cik.c

6553

u32 mask = 0, tmp, tmp1;

sys/dev/drm/radeon/cik.c

6567

mask <<= 1;

sys/dev/drm/radeon/cik.c

6568

mask |= 1;

sys/dev/drm/radeon/cik.c

6571

return (~tmp) & mask;

sys/dev/drm/radeon/cik.c

6577

u32 mask, counter, cu_bitmap;

sys/dev/drm/radeon/cik.c

6582

mask = 1;

sys/dev/drm/radeon/cik.c

6586

if (cik_get_cu_active_bitmap(rdev, i, j) & mask) {

sys/dev/drm/radeon/cik.c

6588

cu_bitmap |= mask;

sys/dev/drm/radeon/cik.c

6591

mask <<= 1;

sys/dev/drm/radeon/cik_reg.h

230

uint32_t mask:24;

sys/dev/drm/radeon/cik_sdma.c

776

u32 mask;

sys/dev/drm/radeon/cik_sdma.c

779

mask = RADEON_RESET_DMA;

sys/dev/drm/radeon/cik_sdma.c

781

mask = RADEON_RESET_DMA1;

sys/dev/drm/radeon/cik_sdma.c

783

if (!(reset_mask & mask)) {

sys/dev/drm/radeon/evergreen.c

4354

u32 mask = RLC_ENABLE;

sys/dev/drm/radeon/evergreen.c

4357

mask |= GFX_POWER_GATING_ENABLE | GFX_POWER_GATING_SRC;

sys/dev/drm/radeon/evergreen.c

4360

WREG32(RLC_CNTL, mask);

sys/dev/drm/radeon/evergreen.c

4688

u32 mask;

sys/dev/drm/radeon/evergreen.c

4735

mask = LB_D1_VBLANK_INTERRUPT;

sys/dev/drm/radeon/evergreen.c

4749

mask = LB_D1_VLINE_INTERRUPT;

sys/dev/drm/radeon/evergreen.c

4757

if (!(disp_int[crtc_idx] & mask)) {

sys/dev/drm/radeon/evergreen.c

4762

disp_int[crtc_idx] &= ~mask;

sys/dev/drm/radeon/evergreen.c

4779

mask = DC_HPD1_INTERRUPT;

sys/dev/drm/radeon/evergreen.c

4785

mask = DC_HPD1_RX_INTERRUPT;

sys/dev/drm/radeon/evergreen.c

4795

if (!(disp_int[hpd_idx] & mask))

sys/dev/drm/radeon/evergreen.c

4798

disp_int[hpd_idx] &= ~mask;

sys/dev/drm/radeon/kv_dpm.c

1426

u32 mask;

sys/dev/drm/radeon/kv_dpm.c

1435

mask = 1 << pi->uvd_boot_level;

sys/dev/drm/radeon/kv_dpm.c

1437

mask = 0x1f;

sys/dev/drm/radeon/kv_dpm.c

1450

mask);

sys/dev/drm/radeon/kv_dpm.c

291

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/kv_dpm.c

305

data &= ~config_regs->mask;

sys/dev/drm/radeon/kv_dpm.c

306

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/kv_dpm.h

46

u32 mask;

sys/dev/drm/radeon/kv_smc.c

123

u32 data, original_data, addr, extra_shift, t_byte, count, mask;

sys/dev/drm/radeon/kv_smc.c

142

mask = 0;

sys/dev/drm/radeon/kv_smc.c

146

mask = (mask << 8) | 0xff;

sys/dev/drm/radeon/kv_smc.c

151

mask <<= 8;

sys/dev/drm/radeon/kv_smc.c

154

mask = (mask << 8) | 0xff;

sys/dev/drm/radeon/kv_smc.c

159

data |= original_data & mask;

sys/dev/drm/radeon/ni_dma.c

288

u32 mask;

sys/dev/drm/radeon/ni_dma.c

291

mask = RADEON_RESET_DMA;

sys/dev/drm/radeon/ni_dma.c

293

mask = RADEON_RESET_DMA1;

sys/dev/drm/radeon/ni_dma.c

295

if (!(reset_mask & mask)) {

sys/dev/drm/radeon/r100.c

356

tmp |= voltage->gpio.mask;

sys/dev/drm/radeon/r100.c

358

tmp &= ~(voltage->gpio.mask);

sys/dev/drm/radeon/r100.c

365

tmp &= ~voltage->gpio.mask;

sys/dev/drm/radeon/r100.c

367

tmp |= voltage->gpio.mask;

sys/dev/drm/radeon/r300.c

494

uint32_t link_width_cntl, mask;

sys/dev/drm/radeon/r300.c

506

mask = RADEON_PCIE_LC_LINK_WIDTH_X0;

sys/dev/drm/radeon/r300.c

509

mask = RADEON_PCIE_LC_LINK_WIDTH_X1;

sys/dev/drm/radeon/r300.c

512

mask = RADEON_PCIE_LC_LINK_WIDTH_X2;

sys/dev/drm/radeon/r300.c

515

mask = RADEON_PCIE_LC_LINK_WIDTH_X4;

sys/dev/drm/radeon/r300.c

518

mask = RADEON_PCIE_LC_LINK_WIDTH_X8;

sys/dev/drm/radeon/r300.c

521

mask = RADEON_PCIE_LC_LINK_WIDTH_X12;

sys/dev/drm/radeon/r300.c

525

mask = RADEON_PCIE_LC_LINK_WIDTH_X16;

sys/dev/drm/radeon/r300.c

532

(mask << RADEON_PCIE_LC_LINK_WIDTH_RD_SHIFT))

sys/dev/drm/radeon/r300.c

539

link_width_cntl |= mask;

sys/dev/drm/radeon/r600.c

1933

u32 data = 0, mask = 1 << (max_rb_num - 1);

sys/dev/drm/radeon/r600.c

1958

if (!(mask & disabled_rb_mask)) {

sys/dev/drm/radeon/r600.c

1969

mask >>= 1;

sys/dev/drm/radeon/r600.c

4414

u32 link_width_cntl, mask;

sys/dev/drm/radeon/r600.c

4430

mask = RADEON_PCIE_LC_LINK_WIDTH_X0;

sys/dev/drm/radeon/r600.c

4433

mask = RADEON_PCIE_LC_LINK_WIDTH_X1;

sys/dev/drm/radeon/r600.c

4436

mask = RADEON_PCIE_LC_LINK_WIDTH_X2;

sys/dev/drm/radeon/r600.c

4439

mask = RADEON_PCIE_LC_LINK_WIDTH_X4;

sys/dev/drm/radeon/r600.c

4442

mask = RADEON_PCIE_LC_LINK_WIDTH_X8;

sys/dev/drm/radeon/r600.c

4446

mask = RADEON_PCIE_LC_LINK_WIDTH_X12;

sys/dev/drm/radeon/r600.c

4449

mask = RADEON_PCIE_LC_LINK_WIDTH_X16;

sys/dev/drm/radeon/r600.c

4458

link_width_cntl |= mask << RADEON_PCIE_LC_LINK_WIDTH_SHIFT;

sys/dev/drm/radeon/r600_dpm.c

523

u64 mask)

sys/dev/drm/radeon/r600_dpm.c

525

WREG32(LOWER_GPIO_ENABLE, mask & 0xffffffff);

sys/dev/drm/radeon/r600_dpm.c

526

WREG32(UPPER_GPIO_ENABLE, upper_32_bits(mask));

sys/dev/drm/radeon/r600_dpm.c

533

u32 tmp, mask;

sys/dev/drm/radeon/r600_dpm.c

538

mask = 7 << (3 * ix);

sys/dev/drm/radeon/r600_dpm.c

540

tmp = (tmp & ~mask) | ((pins >> (32 - (3 * ix))) & mask);

sys/dev/drm/radeon/r600_dpm.c

545

u64 mask)

sys/dev/drm/radeon/r600_dpm.c

550

gpio &= ~mask;

sys/dev/drm/radeon/r600_dpm.c

554

gpio &= ~mask;

sys/dev/drm/radeon/r600_dpm.c

558

gpio &= ~mask;

sys/dev/drm/radeon/r600_dpm.h

190

u64 mask);

sys/dev/drm/radeon/r600_dpm.h

194

u64 mask);

sys/dev/drm/radeon/radeon.h

2565

#define WREG32_P(reg, val, mask) \

sys/dev/drm/radeon/radeon.h

2568

tmp_ &= (mask); \

sys/dev/drm/radeon/radeon.h

2569

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/radeon/radeon.h

2574

#define WREG32_PLL_P(reg, val, mask) \

sys/dev/drm/radeon/radeon.h

2577

tmp_ &= (mask); \

sys/dev/drm/radeon/radeon.h

2578

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/radeon/radeon.h

2581

#define WREG32_SMC_P(reg, val, mask) \

sys/dev/drm/radeon/radeon.h

2584

tmp_ &= (mask); \

sys/dev/drm/radeon/radeon.h

2585

tmp_ |= ((val) & ~(mask)); \

sys/dev/drm/radeon/radeon.h

3007

u32 reg, u32 mask,

sys/dev/drm/radeon/radeon_acpi.c

150

static void radeon_atif_parse_notification(struct radeon_atif_notifications *n, u32 mask)

sys/dev/drm/radeon/radeon_acpi.c

152

n->display_switch = mask & ATIF_DISPLAY_SWITCH_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

153

n->expansion_mode_change = mask & ATIF_EXPANSION_MODE_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

154

n->thermal_state = mask & ATIF_THERMAL_STATE_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

155

n->forced_power_state = mask & ATIF_FORCED_POWER_STATE_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

156

n->system_power_state = mask & ATIF_SYSTEM_POWER_SOURCE_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

157

n->display_conf_change = mask & ATIF_DISPLAY_CONF_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

158

n->px_gfx_switch = mask & ATIF_PX_GFX_SWITCH_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

159

n->brightness_change = mask & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

160

n->dgpu_display_event = mask & ATIF_DGPU_DISPLAY_EVENT_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

173

static void radeon_atif_parse_functions(struct radeon_atif_functions *f, u32 mask)

sys/dev/drm/radeon/radeon_acpi.c

175

f->system_params = mask & ATIF_GET_SYSTEM_PARAMETERS_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

176

f->sbios_requests = mask & ATIF_GET_SYSTEM_BIOS_REQUESTS_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

177

f->select_active_disp = mask & ATIF_SELECT_ACTIVE_DISPLAYS_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

178

f->lid_state = mask & ATIF_GET_LID_STATE_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

179

f->get_tv_standard = mask & ATIF_GET_TV_STANDARD_FROM_CMOS_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

180

f->set_tv_standard = mask & ATIF_SET_TV_STANDARD_IN_CMOS_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

181

f->get_panel_expansion_mode = mask & ATIF_GET_PANEL_EXPANSION_MODE_FROM_CMOS_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

182

f->set_panel_expansion_mode = mask & ATIF_SET_PANEL_EXPANSION_MODE_IN_CMOS_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

183

f->temperature_change = mask & ATIF_TEMPERATURE_CHANGE_NOTIFICATION_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

184

f->graphics_device_types = mask & ATIF_GET_GRAPHICS_DEVICE_TYPES_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

461

static void radeon_atcs_parse_functions(struct radeon_atcs_functions *f, u32 mask)

sys/dev/drm/radeon/radeon_acpi.c

463

f->get_ext_state = mask & ATCS_GET_EXTERNAL_STATE_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

464

f->pcie_perf_req = mask & ATCS_PCIE_PERFORMANCE_REQUEST_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

465

f->pcie_dev_rdy = mask & ATCS_PCIE_DEVICE_READY_NOTIFICATION_SUPPORTED;

sys/dev/drm/radeon/radeon_acpi.c

466

f->pcie_bus_width = mask & ATCS_SET_PCIE_BUS_WIDTH_SUPPORTED;

sys/dev/drm/radeon/radeon_atombios.c

217

gpio.mask = (1 << pin->ucGpioPinBitShift);

sys/dev/drm/radeon/radeon_atombios.c

246

switch(gpio->mask) {

sys/dev/drm/radeon/radeon_combios.c

2752

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp);

sys/dev/drm/radeon/radeon_combios.c

2760

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp);

sys/dev/drm/radeon/radeon_irq_kms.c

571

u32 reg, u32 mask,

sys/dev/drm/radeon/radeon_irq_kms.c

577

if (!!(tmp & mask) == enable)

sys/dev/drm/radeon/radeon_irq_kms.c

582

WREG32(reg, tmp |= mask);

sys/dev/drm/radeon/radeon_irq_kms.c

585

WREG32(reg, tmp & ~mask);

sys/dev/drm/radeon/radeon_legacy_crtc.c

300

uint32_t mask;

sys/dev/drm/radeon/radeon_legacy_crtc.c

303

mask = (RADEON_CRTC2_DISP_DIS |

sys/dev/drm/radeon/radeon_legacy_crtc.c

308

mask = (RADEON_CRTC_DISPLAY_DIS |

sys/dev/drm/radeon/radeon_legacy_crtc.c

328

WREG32_P(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~(RADEON_CRTC2_EN | mask));

sys/dev/drm/radeon/radeon_legacy_crtc.c

332

WREG32_P(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl, ~(mask | crtc_ext_cntl));

sys/dev/drm/radeon/radeon_legacy_crtc.c

344

WREG32_P(RADEON_CRTC2_GEN_CNTL, mask, ~(RADEON_CRTC2_EN | mask));

sys/dev/drm/radeon/radeon_legacy_crtc.c

348

WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~(mask | crtc_ext_cntl));

sys/dev/drm/radeon/radeon_mode.h

502

u32 mask;

sys/dev/drm/radeon/radeon_uvd.c

1037

uint32_t mask = UPLL_CTLACK_MASK | UPLL_CTLACK2_MASK;

sys/dev/drm/radeon/radeon_uvd.c

1038

if ((RREG32(cg_upll_func_cntl) & mask) == mask)

sys/dev/drm/radeon/radeon_vm.c

820

uint64_t mask = RADEON_VM_PTE_COUNT - 1;

sys/dev/drm/radeon/radeon_vm.c

838

if ((addr & ~mask) == (end & ~mask))

sys/dev/drm/radeon/radeon_vm.c

841

nptes = RADEON_VM_PTE_COUNT - (addr & mask);

sys/dev/drm/radeon/radeon_vm.c

844

pte += (addr & mask) * 8;

sys/dev/drm/radeon/rs600.c

228

tmp |= voltage->gpio.mask;

sys/dev/drm/radeon/rs600.c

230

tmp &= ~(voltage->gpio.mask);

sys/dev/drm/radeon/rs600.c

237

tmp &= ~voltage->gpio.mask;

sys/dev/drm/radeon/rs600.c

239

tmp |= voltage->gpio.mask;

sys/dev/drm/radeon/rv6xx_dpm.c

705

u32 mask, set_pins;

sys/dev/drm/radeon/rv6xx_dpm.c

710

&set_pins, &mask);

sys/dev/drm/radeon/si.c

2955

u32 i, mask = 0;

sys/dev/drm/radeon/si.c

2958

mask <<= 1;

sys/dev/drm/radeon/si.c

2959

mask |= 1;

sys/dev/drm/radeon/si.c

2961

return mask;

sys/dev/drm/radeon/si.c

2966

u32 data, mask;

sys/dev/drm/radeon/si.c

2977

mask = si_create_bitmask(cu_per_sh);

sys/dev/drm/radeon/si.c

2979

return ~data & mask;

sys/dev/drm/radeon/si.c

2987

u32 data, mask, active_cu;

sys/dev/drm/radeon/si.c

2995

mask = 1;

sys/dev/drm/radeon/si.c

2997

mask <<= k;

sys/dev/drm/radeon/si.c

2998

if (active_cu & mask) {

sys/dev/drm/radeon/si.c

2999

data &= ~mask;

sys/dev/drm/radeon/si.c

3013

u32 data, mask;

sys/dev/drm/radeon/si.c

3024

mask = si_create_bitmask(max_rb_num_per_se / sh_per_se);

sys/dev/drm/radeon/si.c

3026

return data & mask;

sys/dev/drm/radeon/si.c

3034

u32 data, mask;

sys/dev/drm/radeon/si.c

3047

mask = 1;

sys/dev/drm/radeon/si.c

3049

if (!(disabled_rbs & mask))

sys/dev/drm/radeon/si.c

3050

enabled_rbs |= mask;

sys/dev/drm/radeon/si.c

3051

mask <<= 1;

sys/dev/drm/radeon/si.c

5135

u32 mask;

sys/dev/drm/radeon/si.c

5148

mask = RLC_BUSY_STATUS | GFX_POWER_STATUS | GFX_CLOCK_STATUS | GFX_LS_STATUS;

sys/dev/drm/radeon/si.c

5150

if ((RREG32(RLC_STAT) & mask) == (GFX_CLOCK_STATUS | GFX_POWER_STATUS))

sys/dev/drm/radeon/si.c

5287

u32 mask = 0, tmp, tmp1;

sys/dev/drm/radeon/si.c

5301

mask <<= 1;

sys/dev/drm/radeon/si.c

5302

mask |= 1;

sys/dev/drm/radeon/si.c

5305

return (~tmp) & mask;

sys/dev/drm/radeon/si.c

5311

u32 mask, counter, cu_bitmap;

sys/dev/drm/radeon/si.c

5316

mask = 1;

sys/dev/drm/radeon/si.c

5320

if (si_get_cu_active_bitmap(rdev, i, j) & mask) {

sys/dev/drm/radeon/si.c

5322

cu_bitmap |= mask;

sys/dev/drm/radeon/si.c

5325

mask <<= 1;

sys/dev/drm/radeon/si.c

6235

u32 mask;

sys/dev/drm/radeon/si.c

6282

mask = LB_D1_VBLANK_INTERRUPT;

sys/dev/drm/radeon/si.c

6296

mask = LB_D1_VLINE_INTERRUPT;

sys/dev/drm/radeon/si.c

6304

if (!(disp_int[crtc_idx] & mask)) {

sys/dev/drm/radeon/si.c

6309

disp_int[crtc_idx] &= ~mask;

sys/dev/drm/radeon/si.c

6326

mask = DC_HPD1_INTERRUPT;

sys/dev/drm/radeon/si.c

6332

mask = DC_HPD1_RX_INTERRUPT;

sys/dev/drm/radeon/si.c

6342

if (!(disp_int[hpd_idx] & mask))

sys/dev/drm/radeon/si.c

6345

disp_int[hpd_idx] &= ~mask;

sys/dev/drm/radeon/si.c

7470

uint32_t mask = UPLL_CTLACK_MASK | UPLL_CTLACK2_MASK;

sys/dev/drm/radeon/si.c

7471

if ((RREG32_SMC(CG_VCEPLL_FUNC_CNTL) & mask) == mask)

sys/dev/drm/radeon/si_dma.c

44

u32 mask;

sys/dev/drm/radeon/si_dma.c

47

mask = RADEON_RESET_DMA;

sys/dev/drm/radeon/si_dma.c

49

mask = RADEON_RESET_DMA1;

sys/dev/drm/radeon/si_dma.c

51

if (!(reset_mask & mask)) {

sys/dev/drm/radeon/si_dpm.c

2758

data &= ~config_regs->mask;

sys/dev/drm/radeon/si_dpm.c

2759

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/si_dpm.h

39

u32 mask;

sys/dev/drm/radeon/sumo_smc.c

170

u32 mask = 0xFFF;

sys/dev/drm/radeon/sumo_smc.c

203

sclk_dpm_tdp_limit &= ~(mask << shift);

sys/dev/misc/ecc/ecc_e5.c

325

uint32_t thr, mask;

sys/dev/misc/ecc/ecc_e5.c

330

mask = PCI_E5_IMC_ERROR_COR_ERR_TH_HI;

sys/dev/misc/ecc/ecc_e5.c

332

mask = PCI_E5_IMC_ERROR_COR_ERR_TH_LO;

sys/dev/misc/ecc/ecc_e5.c

336

__SHIFTOUT(thr, mask));

sys/dev/misc/ecc/ecc_e5.c

375

uint32_t err, mask;

sys/dev/misc/ecc/ecc_e5.c

380

mask = PCI_E5_IMC_ERROR_COR_ERR_CNT_HI;

sys/dev/misc/ecc/ecc_e5.c

382

mask = PCI_E5_IMC_ERROR_COR_ERR_CNT_LO;

sys/dev/misc/ecc/ecc_e5.c

385

ecc_cnt = __SHIFTOUT(err, mask);

sys/dev/misc/evdev/freebsd-bitstring.h

399

bitstr_t *_curbitstr, mask;

sys/dev/misc/evdev/freebsd-bitstring.h

413

mask = _bit_make_mask(_start, _bit_offset(curbitstr_len - 1));

sys/dev/misc/evdev/freebsd-bitstring.h

414

_value += __bitcountl(*_curbitstr & mask);

sys/dev/misc/evdev/freebsd-bitstring.h

426

mask = _bit_make_mask(0, _bit_offset(_nbits - 1));

sys/dev/misc/evdev/freebsd-bitstring.h

427

_value += __bitcountl(*_curbitstr & mask);

sys/dev/misc/gpio/gpio.c

100

int pin, u_int32_t mask)

sys/dev/misc/gpio/gpio.c

117

error = gcp->consumer_attach(gp, arg, pin, mask);

sys/dev/misc/gpio/gpio.c

183

gpio_map(struct gpio *gp, int *map, int offset, u_int32_t mask)

sys/dev/misc/gpio/gpio.c

189

npins = gpio_npins(mask);

sys/dev/misc/gpio/gpio.c

212

if (mask & (1 << i)) {

sys/dev/misc/gpio/gpio.c

263

gpio_npins(u_int32_t mask)

sys/dev/misc/gpio/gpio.c

268

if (mask & (1 << i))

sys/dev/misc/gpio/gpio.h

141

int pin, u_int32_t mask);

sys/dev/misc/gpio/gpio.h

143

struct gpio_mapping *gpio_map(struct gpio *gp, int *map, int offset, u_int32_t mask);

sys/dev/misc/gpio/gpio.h

146

int gpio_npins(u_int32_t mask);

sys/dev/misc/gpio/gpio_led.c

182

led_attach(struct gpio *gp, void *arg, int pin, u_int32_t mask)

sys/dev/misc/kbd/atkbdc.c

1159

kbdc_set_device_mask(KBDC p, int mask)

sys/dev/misc/kbd/atkbdc.c

1161

p->command_mask = mask &

sys/dev/misc/kbd/atkbdc.c

1180

set_controller_command_byte(KBDC p, int mask, int command)

sys/dev/misc/kbd/atkbdc.c

1185

command = (p->command_byte & ~mask) | (command & mask);

sys/dev/misc/kbd/atkbdcreg.h

305

void kbdc_set_device_mask(KBDC kbdc, int mask);

sys/dev/misc/kbd/atkbdcreg.h

308

int set_controller_command_byte(KBDC kbdc, int mask, int command);

sys/dev/misc/lpt/lpt.c

144

static int lpt_port_test(device_t dev, u_char data, u_char mask);

sys/dev/misc/lpt/lpt.c

234

lpt_port_test(device_t ppbus, u_char data, u_char mask)

sys/dev/misc/lpt/lpt.c

238

data = data & mask;

sys/dev/misc/lpt/lpt.c

243

temp = ppb_rdtr(ppbus) & mask;

sys/dev/misc/ppc/ppc.c

1342

char mask;

sys/dev/misc/ppc/ppc.c

1385

mask = (char)mi->arg[2].i;

sys/dev/misc/ppc/ppc.c

1391

*ptr++ = r_reg(reg, ppc) & mask;

sys/dev/misc/ppc/ppc.c

1395

*ptr++ = r_reg(reg, ppc) & mask;

sys/dev/misc/psm/psm.c

1396

kbdc_set_device_mask(sc->kbdc, mask); \

sys/dev/misc/psm/psm.c

1407

int mask;

sys/dev/misc/psm/psm.c

1459

mask = kbdc_get_device_mask(sc->kbdc) & ~KBD_AUX_CONTROL_BITS;

sys/dev/misc/psm/psm.c

1728

kbdc_set_device_mask(sc->kbdc, mask | KBD_AUX_CONTROL_BITS);

sys/dev/misc/psm/psm.c

3510

int mask = 0;

sys/dev/misc/psm/psm.c

3512

mask = (1 << maskedbits) - 1;

sys/dev/misc/psm/psm.c

3531

pb->ipacket[4] &= ~(mask);

sys/dev/misc/psm/psm.c

3532

pb->ipacket[5] &= ~(mask);

sys/dev/misc/psm/psm.c

427

int mask;

sys/dev/misc/psm/psm.c

4397

int pkt, id, scale, i, nfingers, mask, palm;

sys/dev/misc/psm/psm.c

4487

mask = (1 << nfingers) - 1; /* = 0x00 */

sys/dev/misc/psm/psm.c

4492

mask = (1 << 1) - 1; /* = 0x01 */

sys/dev/misc/psm/psm.c

4527

mask = (1 << nfingers) - 1;

sys/dev/misc/psm/psm.c

4556

mask = (1 << (id + 1)) - 1;

sys/dev/misc/psm/psm.c

4598

mask = pb->ipacket[1] & 0x1f;

sys/dev/misc/psm/psm.c

4599

nfingers = bitcount32(mask);

sys/dev/misc/psm/psm.c

4606

sc->elanaction.mask_v4wait = mask & ~sc->elanaction.mask;

sys/dev/misc/psm/psm.c

4610

sc->elanaction.mask = mask;

sys/dev/misc/psm/psm.c

4631

mask = sc->elanaction.mask;

sys/dev/misc/psm/psm.c

4632

nfingers = bitcount32(mask);

sys/dev/misc/psm/psm.c

4658

if (sc->elanaction.mask & (1 << id))

sys/dev/misc/psm/psm.c

4681

mask = sc->elanaction.mask;

sys/dev/misc/psm/psm.c

4682

nfingers = bitcount32(mask);

sys/dev/misc/psm/psm.c

4803

if (PSM_FINGER_IS_SET(f[id]) || !(mask & (1 << id)))

sys/dev/misc/psm/psm.c

4810

if ((sc->elanaction.mask & (1 << id)) && !(mask & (1 << id)))

sys/dev/misc/psm/psm.c

4813

sc->elanaction.mask = mask;

sys/dev/misc/puc/puc.c

371

u_int32_t mask;

sys/dev/misc/puc/puc.c

374

mask = 0;

sys/dev/misc/puc/puc.c

378

mask = (mask << 8) | (bus_space_read_1(sc->ilr_st,

sys/dev/misc/puc/puc.c

384

mask = 0xffffffff;

sys/dev/misc/puc/puc.c

387

return (mask);

sys/dev/misc/syscons/scterm-sc.c

763

int attr, mask = tcp->attr_mask;

sys/dev/misc/syscons/scterm-sc.c

765

if (mask & REVERSE_ATTR) {

sys/dev/misc/syscons/scterm-sc.c

766

attr = ((mask & FG_CHANGED) ?

sys/dev/misc/syscons/scterm-sc.c

768

(((mask & BG_CHANGED) ?

sys/dev/misc/syscons/scterm-sc.c

774

if (mask & (BOLD_ATTR | UNDERLINE_ATTR))

sys/dev/misc/syscons/scterm-sc.c

776

if (mask & BLINK_ATTR)

sys/dev/misc/syscons/syscons.c

229

static int update_kbd_state(scr_stat *scp, int state, int mask, int unlock);

sys/dev/misc/syscons/syscons.c

4128

update_kbd_state(scr_stat *scp, int new_bits, int mask, int unlock)

sys/dev/misc/syscons/syscons.c

4133

if (mask != LOCK_MASK) {

sys/dev/misc/syscons/syscons.c

4143

state &= ~mask;

sys/dev/misc/syscons/syscons.c

4144

state |= new_bits & mask;

sys/dev/netif/ae/if_ae.c

1204

int error = 0, mask;

sys/dev/netif/ae/if_ae.c

1239

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/ae/if_ae.c

1240

if (mask & IFCAP_VLAN_HWTAGGING) {

sys/dev/netif/age/if_age.c

1645

int error, mask;

sys/dev/netif/age/if_age.c

1692

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/age/if_age.c

1694

if ((mask & IFCAP_TXCSUM) != 0 &&

sys/dev/netif/age/if_age.c

1703

if ((mask & IFCAP_RXCSUM) != 0 &&

sys/dev/netif/age/if_age.c

1713

if ((mask & IFCAP_VLAN_HWTAGGING) != 0 &&

sys/dev/netif/alc/if_alc.c

2790

int error, mask;

sys/dev/netif/alc/if_alc.c

2840

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/alc/if_alc.c

2841

if ((mask & IFCAP_TXCSUM) != 0 &&

sys/dev/netif/alc/if_alc.c

2851

if ((mask & IFCAP_WOL_MCAST) != 0 &&

sys/dev/netif/alc/if_alc.c

2854

if ((mask & IFCAP_WOL_MAGIC) != 0 &&

sys/dev/netif/alc/if_alc.c

2858

if ((mask & IFCAP_VLAN_HWTAGGING) != 0 &&

sys/dev/netif/alc/if_alc.c

2863

if ((mask & IFCAP_VLAN_HWCSUM) != 0 &&

sys/dev/netif/ale/if_ale.c

1731

int error, mask;

sys/dev/netif/ale/if_ale.c

1782

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/ale/if_ale.c

1783

if ((mask & IFCAP_TXCSUM) != 0 &&

sys/dev/netif/ale/if_ale.c

1791

if ((mask & IFCAP_RXCSUM) != 0 &&

sys/dev/netif/ale/if_ale.c

1795

if ((mask & IFCAP_VLAN_HWTAGGING) != 0 &&

sys/dev/netif/ath/ath/if_ath.c

1471

uint8_t mask;

sys/dev/netif/ath/ath/if_ath.c

1476

mask = 0xff;

sys/dev/netif/ath/ath/if_ath.c

1479

mask &= ~((i<<2)|0x2);

sys/dev/netif/ath/ath/if_ath.c

1480

sc->sc_hwbssidmask[0] |= mask;

sys/dev/netif/ath/ath/if_ath.c

2436

ath_hal_gethangstate(struct ath_hal *ah, uint32_t mask, uint32_t *hangs)

sys/dev/netif/ath/ath/if_ath.c

2441

if (!ath_hal_getdiagstate(ah, HAL_DIAG_CHECK_HANGS, &mask, sizeof(mask), &sp, &rsize))

sys/dev/netif/ath/ath/if_ath_misc.h

66

extern int ath_hal_gethangstate(struct ath_hal *ah, uint32_t mask,

sys/dev/netif/ath/ath/if_ath_sysctl.c

726

uint32_t mask = 0xffffffff;

sys/dev/netif/ath/ath/if_ath_sysctl.c

743

&mask, sizeof(mask),

sys/dev/netif/ath/ath_hal/ah.c

228

ath_hal_wait(struct ath_hal *ah, u_int reg, uint32_t mask, uint32_t val)

sys/dev/netif/ath/ath_hal/ah.c

231

return ath_hal_waitfor(ah, reg, mask, val, AH_TIMEOUT);

sys/dev/netif/ath/ath_hal/ah.c

236

ath_hal_waitfor(struct ath_hal *ah, u_int reg, uint32_t mask, uint32_t val, uint32_t timeout)

sys/dev/netif/ath/ath_hal/ah.c

241

if ((OS_REG_READ(ah, reg) & mask) == val)

sys/dev/netif/ath/ath_hal/ah.c

247

__func__, reg, OS_REG_READ(ah, reg), mask, val);

sys/dev/netif/ath/ath_hal/ah_internal.h

610

uint32_t mask, uint32_t val);

sys/dev/netif/ath/ath_hal/ah_internal.h

612

uint32_t mask, uint32_t val, uint32_t timeout);

sys/dev/netif/ath/ath_hal/ah_internal.h

647

extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)

sys/dev/netif/ath/ath_hal/ah_osdep.c

103

extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)

sys/dev/netif/ath/ath_hal/ah_osdep.c

174

DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)

sys/dev/netif/ath/ath_hal/ah_osdep.c

176

if ((mask == HAL_DEBUG_UNMASKABLE) ||

sys/dev/netif/ath/ath_hal/ah_osdep.c

177

(ah != NULL && ah->ah_config.ah_debug & mask) ||

sys/dev/netif/ath/ath_hal/ah_osdep.c

178

(ath_hal_debug & mask)) {

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

108

mask = ints & (HAL_INT_COMMON - HAL_INT_BNR);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

110

mask |= AR_IMR_RXOK_INT | AR_IMR_RXERR_INT;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

113

mask |= AR_IMR_TXOK_INT;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

115

mask |= AR_IMR_TXERR_INT;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

117

mask |= AR_IMR_TXDESC_INT;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

119

mask |= AR_IMR_TXEOL_INT;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

123

HALDEBUG(ah, HAL_DEBUG_INTERRUPT, "%s: new IMR 0x%x\n", __func__, mask);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

124

OS_REG_WRITE(ah, AR_IMR, mask);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_interrupts.c

93

uint32_t mask;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

51

ar5210GetBssIdMask(struct ath_hal *ah, uint8_t *mask)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

55

OS_MEMCPY(mask, ones, IEEE80211_ADDR_LEN);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

59

ar5210SetBssIdMask(struct ath_hal *ah, const uint8_t *mask)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

589

uint32_t mask = resetMask ? resetMask : ~0;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

597

mask &= AR_RC_RPCU | AR_RC_RDMA | AR_RC_RPHY | AR_RC_RMAC;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

598

rt = ath_hal_wait(ah, AR_RC, mask, resetMask);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

604

mask = INIT_CONFIG_STATUS | AR_CFG_SWTD | AR_CFG_SWRD;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_reset.c

605

OS_REG_WRITE(ah, AR_CFG, mask);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

110

uint32_t mask;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

127

mask = ints & HAL_INT_COMMON;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

130

mask |= AR_IMR_TXOK;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

132

mask |= AR_IMR_TXERR;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

134

mask |= AR_IMR_TXDESC;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

136

mask |= AR_IMR_TXEOL;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

139

mask |= AR_IMR_RXOK | AR_IMR_RXERR | AR_IMR_RXDESC;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

145

mask |= AR_IMR_HIUERR;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

149

HALDEBUG(ah, HAL_DEBUG_INTERRUPT, "%s: new IMR 0x%x\n", __func__, mask);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_interrupts.c

150

OS_REG_WRITE(ah, AR_IMR, mask);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

51

ar5211GetBssIdMask(struct ath_hal *ah, uint8_t *mask)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

55

OS_MEMCPY(mask, ones, IEEE80211_ADDR_LEN);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

59

ar5211SetBssIdMask(struct ath_hal *ah, const uint8_t *mask)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1513

uint16_t mask = 0x3f;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1673

((paPreDEnable & 1)<< 30) | ((pRatesPower[3] & mask) << 24) |

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1674

((paPreDEnable & 1)<< 22) | ((pRatesPower[2] & mask) << 16) |

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1675

((paPreDEnable & 1)<< 14) | ((pRatesPower[1] & mask) << 8) |

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1676

((paPreDEnable & 1)<< 6 ) | (pRatesPower[0] & mask));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1678

((paPreDEnable & 1)<< 30) | ((pRatesPower[7] & mask) << 24) |

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1679

((paPreDEnable & 1)<< 22) | ((pRatesPower[6] & mask) << 16) |

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1680

((paPreDEnable & 1)<< 14) | ((pRatesPower[5] & mask) << 8) |

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1681

((paPreDEnable & 1)<< 6 ) | (pRatesPower[4] & mask));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

753

uint32_t mask = resetMask ? resetMask : ~0;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

763

mask &= AR_RC_MAC | AR_RC_BB;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

764

rt = ath_hal_wait(ah, AR_RC, mask, resetMask);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

770

mask = INIT_CONFIG_STATUS | AR_CFG_SWTD | AR_CFG_SWRD;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

771

OS_REG_WRITE(ah, AR_CFG, mask);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

142

uint32_t mask, mask2;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

153

mask = ints & HAL_INT_COMMON;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

157

mask |= AR_IMR_TXOK;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

159

mask |= AR_IMR_TXERR;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

161

mask |= AR_IMR_TXDESC;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

163

mask |= AR_IMR_TXEOL;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

166

mask |= AR_IMR_RXOK | AR_IMR_RXERR | AR_IMR_RXDESC;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

168

mask |= AR_IMR_BCNMISC;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

185

mask |= AR_IMR_HIUERR;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

189

HALDEBUG(ah, HAL_DEBUG_INTERRUPT, "%s: new IMR 0x%x\n", __func__, mask);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_interrupts.c

190

OS_REG_WRITE(ah, AR_IMR, mask);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

53

ar5212GetBssIdMask(struct ath_hal *ah, uint8_t *mask)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

57

OS_MEMCPY(mask, ahp->ah_bssidmask, IEEE80211_ADDR_LEN);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

61

ar5212SetBssIdMask(struct ath_hal *ah, const uint8_t *mask)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c

66

OS_MEMCPY(ahp->ah_bssidmask, mask, IEEE80211_ADDR_LEN);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1200

uint32_t mask = resetMask ? resetMask : ~0;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1276

mask &= (AR_RC_MAC | AR_RC_BB);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1278

rt = ath_hal_wait(ah, AR_RC, mask, resetMask);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1284

mask = INIT_CONFIG_STATUS | AR_CFG_SWRD;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1286

mask |= AR_CFG_SWTD;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

1288

OS_REG_WRITE(ah, AR_CFG, mask);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

2681

uint32_t tmp32, mask, arrayEntry, lastBit;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

2695

mask = (((1 << lastBit) - 1) ^ ((1 << bitPosition) - 1)) <<

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

2697

rfBuf[arrayEntry] &= ~mask;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

2699

(column * 8)) & mask;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_rfgain.c

109

mask = (((1 << lastBit) - 1) ^ ((1 << bitPosition) - 1)) <<

sys/dev/netif/ath/ath_hal/ar5212/ar5212_rfgain.c

111

reg32 |= (((rfBuf[arrayEntry] & mask) >> (column * 8)) >>

sys/dev/netif/ath/ath_hal/ar5212/ar5212_rfgain.c

94

uint32_t reg32 = 0, mask, arrayEntry, lastBit;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c

736

uint32_t mask = resetMask ? resetMask : ~0;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c

739

if ((rt = ar5312MacReset(ah, mask)) == AH_FALSE) {

sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c

748

mask = INIT_CONFIG_STATUS | AR_CFG_SWRD;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c

750

mask = INIT_CONFIG_STATUS |

sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c

753

OS_REG_WRITE(ah, AR_CFG, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

210

uint32_t val, mask;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

222

mask = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

225

AR_INTR_ASYNC_MASK_GPIO, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

233

mask = MS(OS_REG_READ(ah, AR_INTR_SYNC_MASK),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

236

AR_INTR_SYNC_MASK_GPIO, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

261

mask = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

264

AR_INTR_ASYNC_MASK_GPIO, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

272

mask = MS(OS_REG_READ(ah, AR_INTR_SYNC_MASK),

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

275

AR_INTR_SYNC_MASK_GPIO, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

277

AH5416(ah)->ah_gpioMask = mask; /* for ar5416SetInterrupts */

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

268

uint32_t mask, mask2;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

287

mask = ints & HAL_INT_COMMON;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

296

mask |= AR_IMR_RXERR | AR_IMR_RXMINTR | AR_IMR_RXINTM;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

299

mask |= AR_IMR_RXOK | AR_IMR_RXERR | AR_IMR_RXDESC;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

303

mask |= AR_IMR_TXOK;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

305

mask |= AR_IMR_TXERR;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

307

mask |= AR_IMR_TXDESC;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

309

mask |= AR_IMR_TXEOL;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

311

mask |= AR_IMR_TXURN;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

314

mask |= AR_IMR_BCNMISC;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

330

mask |= AR_IMR_BCNMISC;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

338

HALDEBUG(ah, HAL_DEBUG_INTERRUPT, "%s: new IMR 0x%x\n", __func__, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

339

OS_REG_WRITE(ah, AR_IMR, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

343

mask = OS_REG_READ(ah, AR_IMR_S2) & ~(AR_IMR_S2_TIM |

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

351

OS_REG_WRITE(ah, AR_IMR_S2, mask | mask2);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

361

mask = AR_INTR_MAC_IRQ;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

363

mask |= SM(AH5416(ah)->ah_gpioMask,

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

365

OS_REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

366

OS_REG_WRITE(ah, AR_INTR_ASYNC_MASK, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

368

mask = AR_INTR_SYNC_DEFAULT;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

370

mask |= SM(AH5416(ah)->ah_gpioMask,

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

372

OS_REG_WRITE(ah, AR_INTR_SYNC_ENABLE, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_interrupts.c

373

OS_REG_WRITE(ah, AR_INTR_SYNC_MASK, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

723

uint32_t mask;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c

741

if ((hang_sig & hang_list[i].mask) == hang_list[i].val) {

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1346

uint32_t tmpReg, mask;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1418

uint32_t mask;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1419

mask = OS_REG_READ(ah, AR_CFG);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1420

if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) {

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1422

"CFG Byte Swap Set 0x%x\n", mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1424

mask =

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1426

OS_REG_WRITE(ah, AR_CFG, mask);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1436

mask = INIT_CONFIG_STATUS | AR_CFG_SWRD;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1438

mask |= AR_CFG_SWTD;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c

1442

OS_REG_WRITE(ah, AR_CFG, mask);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

366

uint32_t pwrctrl, mask, clr;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

368

mask = (1<<0) | (1<<5) | (1<<10) | (1<<15) | (1<<20) | (1<<25);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

369

pwrctrl = mask * bb_desired_scale;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

370

clr = mask * 0x1f;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

375

mask = (1<<0) | (1<<5) | (1<<15);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

376

pwrctrl = mask * bb_desired_scale;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

377

clr = mask * 0x1f;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

380

mask = (1<<0) | (1<<5);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

381

pwrctrl = mask * bb_desired_scale;

sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c

382

clr = mask * 0x1f;

sys/dev/netif/ath/ath_rate/sample/sample.c

1101

uint64_t mask;

sys/dev/netif/ath/ath_rate/sample/sample.c

1110

for (mask = sn->ratemask, rix = 0; mask != 0; mask >>= 1, rix++) {

sys/dev/netif/ath/ath_rate/sample/sample.c

1111

if ((mask & 1) == 0)

sys/dev/netif/ath/ath_rate/sample/sample.c

1122

uint64_t mask;

sys/dev/netif/ath/ath_rate/sample/sample.c

1134

for (rix = 0, mask = sn->ratemask; mask != 0; rix++, mask >>= 1) {

sys/dev/netif/ath/ath_rate/sample/sample.c

1135

if ((mask & 1) == 0) /* not a valid rate */

sys/dev/netif/ath/ath_rate/sample/sample.c

1269

uint64_t mask;

sys/dev/netif/ath/ath_rate/sample/sample.c

1294

for (mask = sn->ratemask, rix = 0; mask != 0; mask >>= 1, rix++) {

sys/dev/netif/ath/ath_rate/sample/sample.c

1295

if ((mask & 1) == 0)

sys/dev/netif/ath/ath_rate/sample/sample.c

176

uint64_t mask;

sys/dev/netif/ath/ath_rate/sample/sample.c

182

for (mask = sn->ratemask, rix = 0; mask != 0; mask >>= 1, rix++) {

sys/dev/netif/ath/ath_rate/sample/sample.c

183

if ((mask & 1) == 0) /* not a supported rate */

sys/dev/netif/ath/ath_rate/sample/sample.c

263

uint64_t mask;

sys/dev/netif/ath/ath_rate/sample/sample.c

275

mask = sn->ratemask &~ ((uint64_t) 1<<current_rix);/* don't sample current rate */

sys/dev/netif/ath/ath_rate/sample/sample.c

276

while (mask != 0) {

sys/dev/netif/ath/ath_rate/sample/sample.c

277

if ((mask & ((uint64_t) 1<<rix)) == 0) { /* not a supported rate */

sys/dev/netif/ath/ath_rate/sample/sample.c

303

mask &= ~((uint64_t) 1<<rix);

sys/dev/netif/ath/ath_rate/sample/sample.c

310

mask &= ~((uint64_t) 1<<rix);

sys/dev/netif/ath/ath_rate/sample/sample.c

317

mask &= ~((uint64_t) 1<<rix);

sys/dev/netif/ath/ath_rate/sample/sample.c

328

mask &= ~((uint64_t) 1<<rix);

sys/dev/netif/ath/ath_rate/sample/sample.c

336

mask &= ~((uint64_t) 1<<rix);

sys/dev/netif/bce/if_bce.c

1626

uint32_t mask;

sys/dev/netif/bce/if_bce.c

1629

mask = FLASH_BACKUP_STRAP_MASK;

sys/dev/netif/bce/if_bce.c

1631

mask = FLASH_STRAP_MASK;

sys/dev/netif/bce/if_bce.c

1637

if ((val & mask) == (flash->strapping & mask)) {

sys/dev/netif/bce/if_bce.c

5042

int mask, error = 0;

sys/dev/netif/bce/if_bce.c

5068

mask = ifp->if_flags ^ sc->bce_if_flags;

sys/dev/netif/bce/if_bce.c

5070

if (mask & (IFF_PROMISC | IFF_ALLMULTI))

sys/dev/netif/bce/if_bce.c

5101

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/bce/if_bce.c

5102

if (mask & IFCAP_HWCSUM) {

sys/dev/netif/bce/if_bce.c

5103

ifp->if_capenable ^= (mask & IFCAP_HWCSUM);

sys/dev/netif/bce/if_bce.c

5109

if (mask & IFCAP_TSO) {

sys/dev/netif/bce/if_bce.c

5116

if (mask & IFCAP_RSS)

sys/dev/netif/bge/if_bge.c

4012

int mask, error = 0;

sys/dev/netif/bge/if_bge.c

4031

mask = ifp->if_flags ^ sc->bge_if_flags;

sys/dev/netif/bge/if_bge.c

4042

if (mask & IFF_PROMISC)

sys/dev/netif/bge/if_bge.c

4044

if (mask & IFF_ALLMULTI)

sys/dev/netif/bge/if_bge.c

4073

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/bge/if_bge.c

4074

if (mask & IFCAP_HWCSUM) {

sys/dev/netif/bge/if_bge.c

4075

ifp->if_capenable ^= (mask & IFCAP_HWCSUM);

sys/dev/netif/bge/if_bge.c

4081

if (mask & IFCAP_TSO) {

sys/dev/netif/bnx/if_bnx.c

3844

int mask, error = 0;

sys/dev/netif/bnx/if_bnx.c

3863

mask = ifp->if_flags ^ sc->bnx_if_flags;

sys/dev/netif/bnx/if_bnx.c

3874

if (mask & IFF_PROMISC)

sys/dev/netif/bnx/if_bnx.c

3876

if (mask & IFF_ALLMULTI)

sys/dev/netif/bnx/if_bnx.c

3905

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/bnx/if_bnx.c

3906

if (mask & IFCAP_HWCSUM) {

sys/dev/netif/bnx/if_bnx.c

3907

ifp->if_capenable ^= (mask & IFCAP_HWCSUM);

sys/dev/netif/bnx/if_bnx.c

3913

if (mask & IFCAP_TSO) {

sys/dev/netif/bnx/if_bnx.c

3914

ifp->if_capenable ^= (mask & IFCAP_TSO);

sys/dev/netif/bnx/if_bnx.c

3920

if (mask & IFCAP_RSS)

sys/dev/netif/bwn/bwn/if_bwn.c

3553

uint32_t mask = 0x1f, set = 0xf, value;

sys/dev/netif/bwn/bwn/if_bwn.c

3561

mask |= 0x0060;

sys/dev/netif/bwn/bwn/if_bwn.c

3567

mask |= 0x0200;

sys/dev/netif/bwn/bwn/if_bwn.c

3571

mask |= 0x0010;

sys/dev/netif/bwn/bwn/if_bwn.c

3576

siba_gpio_set(sc->sc_dev, (value & mask) | set);

sys/dev/netif/bwn/bwn/if_bwn.c

6517

uint8_t mask;

sys/dev/netif/bwn/bwn/if_bwn.c

6522

mask = siba_sprom_get_ant_bg(sc->sc_dev);

sys/dev/netif/bwn/bwn/if_bwn.c

6524

mask = siba_sprom_get_ant_a(sc->sc_dev);

sys/dev/netif/bwn/bwn/if_bwn.c

6525

if (!(mask & (1 << (n - 1))))

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

189

bwn_radio_wait_value(struct bwn_mac *mac, uint16_t offset, uint16_t mask,

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

197

if ((val & mask) == value)

sys/dev/netif/bwn/bwn/if_bwn_phy_common.h

37

uint16_t mask, uint16_t value, int delay, int timeout);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2026

uint16_t reg, mask;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2078

reg = bwn_lo_txctl_regtable(mac, &mask, NULL);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2079

mask = ~mask;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2080

BWN_RF_MASK(mac, reg, mask);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1280

uint16_t mask;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1326

BWN_PHY_SETMASK(mac, v2[i].offset, v2[i].mask, v2[i].set);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1357

BWN_PHY_SETMASK(mac, v3[i].offset, v3[i].mask, v3[i].set);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1476

BWN_PHY_SETMASK(mac, v1[i].offset, v1[i].mask, v1[i].set);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1505

BWN_PHY_SETMASK(mac, v2[i].offset, v2[i].mask,

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1512

BWN_PHY_SETMASK(mac, v3[i].offset, v3[i].mask,

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1517

BWN_PHY_SETMASK(mac, v4[i].offset, v4[i].mask,

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1521

BWN_PHY_SETMASK(mac, v5[i].offset, v5[i].mask,

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

503

bwn_phy_lp_maskset(struct bwn_mac *mac, uint16_t reg, uint16_t mask,

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

509

(BWN_READ_2(mac, BWN_PHYDATA) & mask) | set);

sys/dev/netif/bwn/bwn/if_bwnvar.h

110

#define BWN_PHY_SETMASK(mac, offset, mask, set) do { \

sys/dev/netif/bwn/bwn/if_bwnvar.h

115

mac->mac_phy.phy_maskset(mac, offset, mask, set); \

sys/dev/netif/bwn/bwn/if_bwnvar.h

118

(BWN_PHY_READ(mac, offset) & (mask)) | (set)); \

sys/dev/netif/bwn/bwn/if_bwnvar.h

120

#define BWN_PHY_MASK(mac, offset, mask) do { \

sys/dev/netif/bwn/bwn/if_bwnvar.h

125

mac->mac_phy.phy_maskset(mac, offset, mask, 0); \

sys/dev/netif/bwn/bwn/if_bwnvar.h

128

BWN_PHY_READ(mac, offset) & mask); \

sys/dev/netif/bwn/bwn/if_bwnvar.h

76

#define BWN_WRITE_SETMASK2(mac, offset, mask, set) \

sys/dev/netif/bwn/bwn/if_bwnvar.h

77

BWN_WRITE_2(mac, offset, (BWN_READ_2(mac, offset) & mask) | set)

sys/dev/netif/bwn/bwn/if_bwnvar.h

80

#define BWN_WRITE_SETMASK4(mac, offset, mask, set) \

sys/dev/netif/bwn/bwn/if_bwnvar.h

81

BWN_WRITE_4(mac, offset, (BWN_READ_4(mac, offset) & mask) | set)

sys/dev/netif/bwn/bwn/if_bwnvar.h

93

#define BWN_RF_SETMASK(mac, offset, mask, set) \

sys/dev/netif/bwn/bwn/if_bwnvar.h

94

BWN_RF_WRITE(mac, offset, (BWN_RF_READ(mac, offset) & mask) | set)

sys/dev/netif/bwn/siba/siba_core.c

1864

uint16_t mask, uint16_t shift)

sys/dev/netif/bwn/siba/siba_core.c

1870

gain = (v & mask) >> shift;

sys/dev/netif/bwn/siba/siba_core.c

2252

siba_cc_regctl_setmask(struct siba_cc *cc, uint32_t offset, uint32_t mask,

sys/dev/netif/bwn/siba/siba_core.c

2260

(SIBA_CC_READ32(cc, SIBA_CC_REGCTL_DATA) & mask) | set);

sys/dev/netif/bwn/siba/siba_core.c

2956

siba_cc_mask32(device_t dev, uint32_t reg, uint32_t mask)

sys/dev/netif/bwn/siba/siba_core.c

2969

SIBA_CC_MASK32(scc, reg, mask);

sys/dev/netif/bwn/siba/sibavar.h

173

#define SIBA_CC_MASK32(scc, offset, mask) \

sys/dev/netif/bwn/siba/sibavar.h

174

SIBA_CC_WRITE32(scc, offset, SIBA_CC_READ32(scc, offset) & (mask))

sys/dev/netif/bwn/siba/sibavar.h

177

#define SIBA_CC_MASKSET32(scc, offset, mask, set) \

sys/dev/netif/bwn/siba/sibavar.h

179

(SIBA_CC_READ32(scc, offset) & (mask)) | (set))

sys/dev/netif/de/if_de.c

3276

uint32_t mask;

sys/dev/netif/de/if_de.c

3281

for (sep = " ", mask = 1; mask <= csr; mask <<= 1, msgp++) {

sys/dev/netif/de/if_de.c

3282

if ((csr & mask) && *msgp != NULL) {

sys/dev/netif/de/if_de.c

3284

if (mask == TULIP_STS_TXUNDERFLOW && (sc->tulip_flags & TULIP_NEWTXTHRESH)) {

sys/dev/netif/em/if_em.c

1219

int max_frame_size, mask, reinit;

sys/dev/netif/em/if_em.c

1330

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/em/if_em.c

1331

if (mask & IFCAP_RXCSUM) {

sys/dev/netif/em/if_em.c

1335

if (mask & IFCAP_TXCSUM) {

sys/dev/netif/em/if_em.c

1342

if (mask & IFCAP_TSO) {

sys/dev/netif/em/if_em.c

1349

if (mask & IFCAP_VLAN_HWTAGGING) {

sys/dev/netif/emx/if_emx.c

1165

int max_frame_size, mask, reinit;

sys/dev/netif/emx/if_emx.c

1259

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/emx/if_emx.c

1260

if (mask & IFCAP_RXCSUM) {

sys/dev/netif/emx/if_emx.c

1264

if (mask & IFCAP_VLAN_HWTAGGING) {

sys/dev/netif/emx/if_emx.c

1268

if (mask & IFCAP_TXCSUM) {

sys/dev/netif/emx/if_emx.c

1275

if (mask & IFCAP_TSO) {

sys/dev/netif/emx/if_emx.c

1282

if (mask & IFCAP_RSS)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

297

u16 mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

301

mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

302

return e1000_acquire_swfw_sync_80003es2lan(hw, mask);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

313

u16 mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

317

mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

318

e1000_release_swfw_sync_80003es2lan(hw, mask);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

330

u16 mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

334

mask = E1000_SWFW_CSR_SM;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

336

return e1000_acquire_swfw_sync_80003es2lan(hw, mask);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

347

u16 mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

351

mask = E1000_SWFW_CSR_SM;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

353

e1000_release_swfw_sync_80003es2lan(hw, mask);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

402

static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

405

u32 swmask = mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

406

u32 fwmask = mask << 16;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

449

static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

459

swfw_sync &= ~mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

62

static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

634

u32 mask = E1000_NVM_CFG_DONE_PORT_0;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

639

mask = E1000_NVM_CFG_DONE_PORT_1;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

642

if (E1000_READ_REG(hw, E1000_EEMNGCTL) & mask)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

71

static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_82543.c

629

u32 ctrl, mask;

sys/dev/netif/ig_hal/e1000_82543.c

637

mask = 0x01;

sys/dev/netif/ig_hal/e1000_82543.c

638

mask <<= (count - 1);

sys/dev/netif/ig_hal/e1000_82543.c

645

while (mask) {

sys/dev/netif/ig_hal/e1000_82543.c

652

if (data & mask)

sys/dev/netif/ig_hal/e1000_82543.c

665

mask >>= 1;

sys/dev/netif/ig_hal/e1000_82575.c

1052

static s32 e1000_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_82575.c

1055

u32 swmask = mask;

sys/dev/netif/ig_hal/e1000_82575.c

1056

u32 fwmask = mask << 16;

sys/dev/netif/ig_hal/e1000_82575.c

1104

static void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_82575.c

1114

swfw_sync &= ~mask;

sys/dev/netif/ig_hal/e1000_82575.c

1133

u32 mask = E1000_NVM_CFG_DONE_PORT_0;

sys/dev/netif/ig_hal/e1000_82575.c

1138

mask = E1000_NVM_CFG_DONE_PORT_1;

sys/dev/netif/ig_hal/e1000_82575.c

1140

mask = E1000_NVM_CFG_DONE_PORT_2;

sys/dev/netif/ig_hal/e1000_82575.c

1142

mask = E1000_NVM_CFG_DONE_PORT_3;

sys/dev/netif/ig_hal/e1000_82575.c

1144

if (E1000_READ_REG(hw, E1000_EEMNGCTL) & mask)

sys/dev/netif/ig_hal/e1000_82575.c

551

u16 mask = E1000_SWFW_PHY0_SM;

sys/dev/netif/ig_hal/e1000_82575.c

556

mask = E1000_SWFW_PHY1_SM;

sys/dev/netif/ig_hal/e1000_82575.c

558

mask = E1000_SWFW_PHY2_SM;

sys/dev/netif/ig_hal/e1000_82575.c

560

mask = E1000_SWFW_PHY3_SM;

sys/dev/netif/ig_hal/e1000_82575.c

562

return hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/netif/ig_hal/e1000_82575.c

573

u16 mask = E1000_SWFW_PHY0_SM;

sys/dev/netif/ig_hal/e1000_82575.c

578

mask = E1000_SWFW_PHY1_SM;

sys/dev/netif/ig_hal/e1000_82575.c

580

mask = E1000_SWFW_PHY2_SM;

sys/dev/netif/ig_hal/e1000_82575.c

582

mask = E1000_SWFW_PHY3_SM;

sys/dev/netif/ig_hal/e1000_82575.c

584

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/netif/ig_hal/e1000_82575.c

82

static s32 e1000_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_82575.c

86

static void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_i210.c

1002

if (E1000_READ_REG(hw, E1000_EEMNGCTL_I210) & mask)

sys/dev/netif/ig_hal/e1000_i210.c

140

void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_i210.c

150

swfw_sync &= ~mask;

sys/dev/netif/ig_hal/e1000_i210.c

88

s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_i210.c

91

u32 swmask = mask;

sys/dev/netif/ig_hal/e1000_i210.c

92

u32 fwmask = mask << 16;

sys/dev/netif/ig_hal/e1000_i210.c

997

u32 mask = E1000_NVM_CFG_DONE_PORT_0;

sys/dev/netif/ig_hal/e1000_i210.h

48

s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_i210.h

49

void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_ich8lan.c

2737

u32 i, j, mask, crc;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2745

mask = (crc & 1) * (-1);

sys/dev/netif/ig_hal/e1000_ich8lan.c

2746

crc = (crc >> 1) ^ (poly & mask);

sys/dev/netif/ig_hal/e1000_mbx.c

340

static s32 e1000_check_for_bit_vf(struct e1000_hw *hw, u32 mask)

sys/dev/netif/ig_hal/e1000_mbx.c

345

if (v2p_mailbox & mask)

sys/dev/netif/ig_hal/e1000_mbx.c

348

hw->dev_spec.vf.v2p_mailbox &= ~mask;

sys/dev/netif/ig_hal/e1000_mbx.c

559

static s32 e1000_check_for_bit_pf(struct e1000_hw *hw, u32 mask)

sys/dev/netif/ig_hal/e1000_mbx.c

564

if (mbvficr & mask) {

sys/dev/netif/ig_hal/e1000_mbx.c

566

E1000_WRITE_REG(hw, E1000_MBVFICR, mask);

sys/dev/netif/ig_hal/e1000_nvm.c

158

u32 mask;

sys/dev/netif/ig_hal/e1000_nvm.c

162

mask = 0x01 << (count - 1);

sys/dev/netif/ig_hal/e1000_nvm.c

172

if (data & mask)

sys/dev/netif/ig_hal/e1000_nvm.c

183

mask >>= 1;

sys/dev/netif/ig_hal/e1000_nvm.c

184

} while (mask);

sys/dev/netif/ig_hal/e1000_phy.c

2170

u16 phy_data, offset, mask;

sys/dev/netif/ig_hal/e1000_phy.c

2181

mask = M88E1000_PSSR_DOWNSHIFT;

sys/dev/netif/ig_hal/e1000_phy.c

2187

mask = IGP01E1000_PLHR_SS_DOWNGRADE;

sys/dev/netif/ig_hal/e1000_phy.c

2198

phy->speed_downgraded = !!(phy_data & mask);

sys/dev/netif/ig_hal/e1000_phy.c

2242

u16 data, offset, mask;

sys/dev/netif/ig_hal/e1000_phy.c

2256

mask = IGP01E1000_PHY_POLARITY_MASK;

sys/dev/netif/ig_hal/e1000_phy.c

2262

mask = IGP01E1000_PSSR_POLARITY_REVERSED;

sys/dev/netif/ig_hal/e1000_phy.c

2268

phy->cable_polarity = ((data & mask)

sys/dev/netif/ig_hal/e1000_phy.c

2285

u16 phy_data, offset, mask;

sys/dev/netif/ig_hal/e1000_phy.c

2293

mask = IFE_PESC_POLARITY_REVERSED;

sys/dev/netif/ig_hal/e1000_phy.c

2296

mask = IFE_PSC_FORCE_POLARITY;

sys/dev/netif/ig_hal/e1000_phy.c

2302

phy->cable_polarity = ((phy_data & mask)

sys/dev/netif/igb/if_igb.c

854

int max_frame_size, mask, reinit;

sys/dev/netif/igb/if_igb.c

920

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/igb/if_igb.c

921

if (mask & IFCAP_RXCSUM) {

sys/dev/netif/igb/if_igb.c

925

if (mask & IFCAP_VLAN_HWTAGGING) {

sys/dev/netif/igb/if_igb.c

929

if (mask & IFCAP_TXCSUM) {

sys/dev/netif/igb/if_igb.c

936

if (mask & IFCAP_TSO) {

sys/dev/netif/igb/if_igb.c

943

if (mask & IFCAP_RSS)

sys/dev/netif/iwm/if_iwm.c

1314

uint32_t mask = 0;

sys/dev/netif/iwm/if_iwm.c

1344

mask |= IWM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(chnl);

sys/dev/netif/iwm/if_iwm.c

1348

if (!iwm_poll_bit(sc, IWM_FH_TSSR_TX_STATUS_REG, mask, mask,

sys/dev/netif/iwm/if_iwm_config.h

95

static inline uint8_t num_of_ant(uint8_t mask)

sys/dev/netif/iwm/if_iwm_config.h

97

return !!((mask) & IWM_ANT_A) +

sys/dev/netif/iwm/if_iwm_config.h

98

!!((mask) & IWM_ANT_B) +

sys/dev/netif/iwm/if_iwm_config.h

99

!!((mask) & IWM_ANT_C);

sys/dev/netif/iwm/if_iwm_pcie_trans.c

183

iwm_poll_prph(struct iwm_softc *sc, uint32_t addr, uint32_t bits, uint32_t mask,

sys/dev/netif/iwm/if_iwm_pcie_trans.c

187

if ((iwm_read_prph(sc, addr) & mask) == (bits & mask))

sys/dev/netif/iwm/if_iwm_pcie_trans.c

247

uint32_t bits, uint32_t mask, int timo)

sys/dev/netif/iwm/if_iwm_pcie_trans.c

250

if ((IWM_READ(sc, reg) & mask) == (bits & mask)) {

sys/dev/netif/iwm/if_iwm_pcie_trans.c

302

uint32_t reg, uint32_t bits, uint32_t mask)

sys/dev/netif/iwm/if_iwm_pcie_trans.c

308

val = iwm_read_prph(sc, reg) & mask;

sys/dev/netif/iwm/if_iwm_pcie_trans.h

111

uint32_t mask, int timeout);

sys/dev/netif/iwm/if_iwm_pcie_trans.h

117

uint32_t bits, uint32_t mask, int timo);

sys/dev/netif/iwm/if_iwm_pcie_trans.h

121

uint32_t reg, uint32_t bits, uint32_t mask);

sys/dev/netif/iwm/if_iwmreg.h

6963

#define IWM_SETBITS(sc, reg, mask) \

sys/dev/netif/iwm/if_iwmreg.h

6964

IWM_WRITE(sc, reg, IWM_READ(sc, reg) | (mask))

sys/dev/netif/iwm/if_iwmreg.h

6966

#define IWM_CLRBITS(sc, reg, mask) \

sys/dev/netif/iwm/if_iwmreg.h

6967

IWM_WRITE(sc, reg, IWM_READ(sc, reg) & ~(mask))

sys/dev/netif/iwn/if_iwn.c

1579

iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)

sys/dev/netif/iwn/if_iwn.c

1581

iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);

sys/dev/netif/iwn/if_iwn.c

1585

iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)

sys/dev/netif/iwn/if_iwn.c

1587

iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);

sys/dev/netif/iwn/if_iwn.c

5814

uint8_t mask, agc;

sys/dev/netif/iwn/if_iwn.c

5819

mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;

sys/dev/netif/iwn/if_iwn.c

5823

if (mask & IWN_ANT_A)

sys/dev/netif/iwn/if_iwn.c

5825

if (mask & IWN_ANT_B)

sys/dev/netif/iwn/if_iwn.c

5827

if (mask & IWN_ANT_C)

sys/dev/netif/iwn/if_iwn.c

5832

mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],

sys/dev/netif/iwn/if_iwnreg.h

2302

#define IWN_SETBITS(sc, reg, mask) \

sys/dev/netif/iwn/if_iwnreg.h

2303

IWN_WRITE(sc, reg, IWN_READ(sc, reg) | (mask))

sys/dev/netif/iwn/if_iwnreg.h

2305

#define IWN_CLRBITS(sc, reg, mask) \

sys/dev/netif/iwn/if_iwnreg.h

2306

IWN_WRITE(sc, reg, IWN_READ(sc, reg) & ~(mask))

sys/dev/netif/iwn/if_iwnreg.h

705

uint32_t mask;

sys/dev/netif/iwn/if_iwnreg.h

730

uint32_t mask;

sys/dev/netif/ix/if_ix.c

5386

uint32_t mask;

sys/dev/netif/ix/if_ix.c

5388

mask = intr ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) : IXGBE_ESDP_SDP1;

sys/dev/netif/ix/if_ix.c

5389

if (reg & mask) {

sys/dev/netif/ix/if_ix.c

819

int error = 0, mask, reinit;

sys/dev/netif/ix/if_ix.c

868

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/ix/if_ix.c

869

if (mask & IFCAP_RXCSUM) {

sys/dev/netif/ix/if_ix.c

873

if (mask & IFCAP_VLAN_HWTAGGING) {

sys/dev/netif/ix/if_ix.c

877

if (mask & IFCAP_TXCSUM) {

sys/dev/netif/ix/if_ix.c

884

if (mask & IFCAP_TSO) {

sys/dev/netif/ix/if_ix.c

891

if (mask & IFCAP_RSS)

sys/dev/netif/ix/ixgbe_82599.c

1672

u32 mask = IXGBE_NTOHS(input_mask->formatted.dst_port);

sys/dev/netif/ix/ixgbe_82599.c

1673

mask <<= IXGBE_FDIRTCPM_DPORTM_SHIFT;

sys/dev/netif/ix/ixgbe_82599.c

1674

mask |= IXGBE_NTOHS(input_mask->formatted.src_port);

sys/dev/netif/ix/ixgbe_82599.c

1675

mask = ((mask & 0x55555555) << 1) | ((mask & 0xAAAAAAAA) >> 1);

sys/dev/netif/ix/ixgbe_82599.c

1676

mask = ((mask & 0x33333333) << 2) | ((mask & 0xCCCCCCCC) >> 2);

sys/dev/netif/ix/ixgbe_82599.c

1677

mask = ((mask & 0x0F0F0F0F) << 4) | ((mask & 0xF0F0F0F0) >> 4);

sys/dev/netif/ix/ixgbe_82599.c

1678

return ((mask & 0x00FF00FF) << 8) | ((mask & 0xFF00FF00) >> 8);

sys/dev/netif/ix/ixgbe_api.c

1672

s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_api.c

1675

(hw, mask), IXGBE_NOT_IMPLEMENTED);

sys/dev/netif/ix/ixgbe_api.c

1686

void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_api.c

1689

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/netif/ix/ixgbe_api.h

167

union ixgbe_atr_input *mask,

sys/dev/netif/ix/ixgbe_api.h

172

union ixgbe_atr_input *mask);

sys/dev/netif/ix/ixgbe_api.h

193

s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);

sys/dev/netif/ix/ixgbe_api.h

194

void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);

sys/dev/netif/ix/ixgbe_common.c

2050

u32 mask;

sys/dev/netif/ix/ixgbe_common.c

2061

mask = 0x01 << (count - 1);

sys/dev/netif/ix/ixgbe_common.c

2071

if (data & mask)

sys/dev/netif/ix/ixgbe_common.c

2088

mask = mask >> 1;

sys/dev/netif/ix/ixgbe_common.c

3285

s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_common.c

3288

u32 swmask = mask;

sys/dev/netif/ix/ixgbe_common.c

3289

u32 fwmask = mask << 5;

sys/dev/netif/ix/ixgbe_common.c

3332

void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_common.c

3335

u32 swmask = mask;

sys/dev/netif/ix/ixgbe_common.c

4971

u32 mask;

sys/dev/netif/ix/ixgbe_common.c

4983

mask = BYPASS_AUX_ON_M | BYPASS_MAIN_ON_M |

sys/dev/netif/ix/ixgbe_common.c

4987

if ((out_reg & mask) != (in_reg & mask))

sys/dev/netif/ix/ixgbe_common.c

4999

mask = BYPASS_CTL1_VALID_M | BYPASS_CTL1_TIME_M;

sys/dev/netif/ix/ixgbe_common.c

5000

if ((out_reg & mask) != (in_reg & mask))

sys/dev/netif/ix/ixgbe_common.h

121

s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);

sys/dev/netif/ix/ixgbe_common.h

122

void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);

sys/dev/netif/ix/ixgbe_mbx.c

314

static s32 ixgbe_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_mbx.c

319

if (v2p_mailbox & mask)

sys/dev/netif/ix/ixgbe_mbx.c

322

hw->mbx.v2p_mailbox &= ~mask;

sys/dev/netif/ix/ixgbe_mbx.c

527

static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)

sys/dev/netif/ix/ixgbe_mbx.c

532

if (mbvficr & mask) {

sys/dev/netif/ix/ixgbe_mbx.c

534

IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask);

sys/dev/netif/ix/ixgbe_x540.c

766

s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_x540.c

768

u32 swmask = mask & IXGBE_GSSR_NVM_PHY_MASK;

sys/dev/netif/ix/ixgbe_x540.c

770

u32 swi2c_mask = mask & IXGBE_GSSR_I2C_MASK;

sys/dev/netif/ix/ixgbe_x540.c

782

if (mask & IXGBE_GSSR_SW_MNG_SM)

sys/dev/netif/ix/ixgbe_x540.c

863

void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_x540.c

865

u32 swmask = mask & (IXGBE_GSSR_NVM_PHY_MASK | IXGBE_GSSR_SW_MNG_SM);

sys/dev/netif/ix/ixgbe_x540.c

870

if (mask & IXGBE_GSSR_I2C_MASK)

sys/dev/netif/ix/ixgbe_x540.c

871

swmask |= mask & IXGBE_GSSR_I2C_MASK;

sys/dev/netif/ix/ixgbe_x540.h

61

s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);

sys/dev/netif/ix/ixgbe_x540.h

62

void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);

sys/dev/netif/ix/ixgbe_x550.c

3120

const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM;

sys/dev/netif/ix/ixgbe_x550.c

3137

status = hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/netif/ix/ixgbe_x550.c

3148

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/netif/ix/ixgbe_x550.c

3164

const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM;

sys/dev/netif/ix/ixgbe_x550.c

3174

status = hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/netif/ix/ixgbe_x550.c

3223

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/netif/ix/ixgbe_x550.c

4244

s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_x550.c

4250

status = ixgbe_acquire_swfw_sync_X540(hw, mask);

sys/dev/netif/ix/ixgbe_x550.c

4254

if (mask & IXGBE_GSSR_I2C_MASK)

sys/dev/netif/ix/ixgbe_x550.c

4267

void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_x550.c

4271

if (mask & IXGBE_GSSR_I2C_MASK)

sys/dev/netif/ix/ixgbe_x550.c

4274

ixgbe_release_swfw_sync_X540(hw, mask);

sys/dev/netif/ix/ixgbe_x550.c

4284

static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_x550.c

4286

u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM;

sys/dev/netif/ix/ixgbe_x550.c

43

static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *, u32 mask);

sys/dev/netif/ix/ixgbe_x550.c

4301

if (!(mask & IXGBE_GSSR_TOKEN_SM))

sys/dev/netif/ix/ixgbe_x550.c

4334

static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)

sys/dev/netif/ix/ixgbe_x550.c

4336

u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM;

sys/dev/netif/ix/ixgbe_x550.c

4340

if (mask & IXGBE_GSSR_TOKEN_SM)

sys/dev/netif/ix/ixgbe_x550.c

4362

u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;

sys/dev/netif/ix/ixgbe_x550.c

4366

if (hw->mac.ops.acquire_swfw_sync(hw, mask))

sys/dev/netif/ix/ixgbe_x550.c

4371

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/netif/ix/ixgbe_x550.c

4390

u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;

sys/dev/netif/ix/ixgbe_x550.c

4394

if (hw->mac.ops.acquire_swfw_sync(hw, mask) == IXGBE_SUCCESS) {

sys/dev/netif/ix/ixgbe_x550.c

4397

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/netif/ix/ixgbe_x550.c

44

static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *, u32 mask);

sys/dev/netif/ix/ixgbe_x550.h

96

s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);

sys/dev/netif/ix/ixgbe_x550.h

97

void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);

sys/dev/netif/jme/if_jme.c

1911

int error = 0, mask;

sys/dev/netif/jme/if_jme.c

1971

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/jme/if_jme.c

1973

if ((mask & IFCAP_TXCSUM) && ifp->if_mtu < JME_TX_FIFO_SIZE) {

sys/dev/netif/jme/if_jme.c

1980

if (mask & IFCAP_RXCSUM) {

sys/dev/netif/jme/if_jme.c

1991

if (mask & IFCAP_VLAN_HWTAGGING) {

sys/dev/netif/jme/if_jme.c

1996

if ((mask & IFCAP_TSO) && ifp->if_mtu < JME_TX_FIFO_SIZE) {

sys/dev/netif/jme/if_jme.c

2004

if (mask & IFCAP_RSS)

sys/dev/netif/msk/if_msk.c

861

int error, mask;

sys/dev/netif/msk/if_msk.c

917

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/msk/if_msk.c

918

if ((mask & IFCAP_TXCSUM) != 0) {

sys/dev/netif/msk/if_msk.c

927

if ((mask & IFCAP_VLAN_HWTAGGING) != 0) {

sys/dev/netif/mxge/if_mxge.c

1579

idx = (starting_slot + cnt) & tx->mask;

sys/dev/netif/mxge/if_mxge.c

1601

idx = tx->req & tx->mask;

sys/dev/netif/mxge/if_mxge.c

1609

if ((idx + cnt) < tx->mask) {

sys/dev/netif/mxge/if_mxge.c

1796

info_last = &tx->info[((cnt - 1) + tx->req) & tx->mask];

sys/dev/netif/mxge/if_mxge.c

1814

bus_dmamap_unload(tx->dmat, tx->info[tx->req & tx->mask].map);

sys/dev/netif/mxge/if_mxge.c

1839

idx = tx->req & tx->mask;

sys/dev/netif/mxge/if_mxge.c

1933

info_last = &tx->info[((cnt - 1) + tx->req) & tx->mask];

sys/dev/netif/mxge/if_mxge.c

1970

while (tx->mask - (tx->req - tx->done) > tx->max_desc) {

sys/dev/netif/mxge/if_mxge.c

2232

idx = rx->cnt & rx->mask;

sys/dev/netif/mxge/if_mxge.c

2289

idx = rx->cnt & rx->mask;

sys/dev/netif/mxge/if_mxge.c

2359

rx_done->idx &= rx_done->mask;

sys/dev/netif/mxge/if_mxge.c

2373

idx = tx->done & tx->mask;

sys/dev/netif/mxge/if_mxge.c

2394

if (tx->req - tx->done < (tx->mask + 1) / 2) {

sys/dev/netif/mxge/if_mxge.c

2872

for (i = 0; i <= ss->rx_data.rx_big.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

2881

for (i = 0; i <= ss->rx_data.rx_small.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

2894

for (i = 0; i <= ss->tx.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

2944

for (i = 0; i <= ss->tx.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

2956

for (i = 0; i <= ss->rx_data.rx_small.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

2970

for (i = 0; i <= ss->rx_data.rx_big.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

3007

ss->rx_data.rx_small.mask = ss->rx_data.rx_big.mask =

sys/dev/netif/mxge/if_mxge.c

3009

ss->rx_data.rx_done.mask = (2 * rx_ring_entries) - 1;

sys/dev/netif/mxge/if_mxge.c

3051

for (i = 0; i <= ss->rx_data.rx_small.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

3096

for (i = 0; i <= ss->rx_data.rx_big.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

3119

ss->tx.mask = tx_ring_entries - 1;

sys/dev/netif/mxge/if_mxge.c

3161

for (i = 0; i <= ss->tx.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

3294

for (i = 0; i <= ss->rx_data.rx_small.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

3299

ss->rx_data.rx_small.mask + 1);

sys/dev/netif/mxge/if_mxge.c

3307

for (i = 0; i <= ss->rx_data.rx_big.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

3314

for (i = 0; i <= ss->rx_data.rx_big.mask; i++) {

sys/dev/netif/mxge/if_mxge.c

3319

ss->rx_data.rx_big.mask + 1);

sys/dev/netif/mxge/if_mxge.c

3825

int err, mask;

sys/dev/netif/mxge/if_mxge.c

3863

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/mxge/if_mxge.c

3864

if (mask & IFCAP_TXCSUM) {

sys/dev/netif/mxge/if_mxge.c

3871

if (mask & IFCAP_TSO) {

sys/dev/netif/mxge/if_mxge.c

3878

if (mask & IFCAP_RXCSUM)

sys/dev/netif/mxge/if_mxge.c

3880

if (mask & IFCAP_VLAN_HWTAGGING)

sys/dev/netif/mxge/if_mxge_var.h

66

int16_t mask; /* number of rx slots -1 */

sys/dev/netif/mxge/if_mxge_var.h

72

int mask;

sys/dev/netif/mxge/if_mxge_var.h

87

int mask; /* number of transmit slots -1 */

sys/dev/netif/my/if_my.c

166

int mask, data;

sys/dev/netif/my/if_my.c

189

mask = 0x8000;

sys/dev/netif/my/if_my.c

190

while (mask) {

sys/dev/netif/my/if_my.c

193

if (mask & data)

sys/dev/netif/my/if_my.c

203

mask >>= 1;

sys/dev/netif/my/if_my.c

204

if (mask == 0x2 && opcode == MY_OP_READ)

sys/dev/netif/my/if_my.c

216

int mask, data;

sys/dev/netif/my/if_my.c

224

mask = 0x8000;

sys/dev/netif/my/if_my.c

226

while (mask) {

sys/dev/netif/my/if_my.c

234

data |= mask;

sys/dev/netif/my/if_my.c

242

mask >>= 1;

sys/dev/netif/my/if_my.c

258

int mask;

sys/dev/netif/my/if_my.c

266

mask = 0x8000;

sys/dev/netif/my/if_my.c

267

while (mask) {

sys/dev/netif/my/if_my.c

270

if (mask & data)

sys/dev/netif/my/if_my.c

281

mask >>= 1;

sys/dev/netif/nfe/if_nfe.c

1041

mask = (ifr->ifr_reqcap ^ ifp->if_capenable) & IFCAP_HWCSUM;

sys/dev/netif/nfe/if_nfe.c

1042

if (mask && (ifp->if_capabilities & IFCAP_HWCSUM)) {

sys/dev/netif/nfe/if_nfe.c

1043

ifp->if_capenable ^= mask;

sys/dev/netif/nfe/if_nfe.c

2100

uint8_t addr[ETHER_ADDR_LEN], mask[ETHER_ADDR_LEN];

sys/dev/netif/nfe/if_nfe.c

2106

bzero(mask, ETHER_ADDR_LEN);

sys/dev/netif/nfe/if_nfe.c

2111

bcopy(etherbroadcastaddr, mask, ETHER_ADDR_LEN);

sys/dev/netif/nfe/if_nfe.c

2122

mask[i] &= ~maddr[i];

sys/dev/netif/nfe/if_nfe.c

2127

mask[i] |= addr[i];

sys/dev/netif/nfe/if_nfe.c

2137

mask[3] << 24 | mask[2] << 16 | mask[1] << 8 | mask[0]);

sys/dev/netif/nfe/if_nfe.c

2139

mask[5] << 8 | mask[4]);

sys/dev/netif/nfe/if_nfe.c

989

int error = 0, mask, jumbo_cap;

sys/dev/netif/ral/rt2560.c

2396

uint32_t mask = 0;

sys/dev/netif/ral/rt2560.c

2406

mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,

sys/dev/netif/ral/rt2560.c

2410

RAL_WRITE(sc, RT2560_ARSP_PLCP_1, mask);

sys/dev/netif/ral/rt2560.c

2412

DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);

sys/dev/netif/ral/rt2661.c

1941

uint32_t mask = 0;

sys/dev/netif/ral/rt2661.c

1951

mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,

sys/dev/netif/ral/rt2661.c

1955

RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);

sys/dev/netif/ral/rt2661.c

1957

DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);

sys/dev/netif/ral/rt2860.c

2352

uint32_t mask = 0;

sys/dev/netif/ral/rt2860.c

2362

mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,

sys/dev/netif/ral/rt2860.c

2366

RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, mask);

sys/dev/netif/re/if_re.c

1889

int error = 0, mask;

sys/dev/netif/re/if_re.c

1935

mask = (ifr->ifr_reqcap ^ ifp->if_capenable) &

sys/dev/netif/re/if_re.c

1937

ifp->if_capenable ^= mask;

sys/dev/netif/re/if_re.c

1952

if (mask && (ifp->if_flags & IFF_RUNNING))

sys/dev/netif/re/re.c

31421

u_int32_t value1 = 0, value2 = 0, mask;

sys/dev/netif/re/re.c

31438

if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

31439

else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

31440

else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

31441

else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

31443

value1 = CSR_READ_4(sc, RE_OCPDR) & mask;

sys/dev/netif/re/re.c

31482

u_int32_t value1 = 0, mask;

sys/dev/netif/re/re.c

31491

if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

31492

else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

31493

else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

31494

else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

31496

value1 = OCP_read(sc, addr, 4) & ~mask;

sys/dev/netif/re/re.c

31810

u_int16_t x, mask;

sys/dev/netif/re/re.c

31812

mask = 0x01 << (count - 1);

sys/dev/netif/re/re.c

31819

if (data & mask)

sys/dev/netif/re/re.c

31826

mask = mask >> 1;

sys/dev/netif/re/re.c

31827

} while (mask);

sys/dev/netif/re/re.c

418

u_int16_t mask

sys/dev/netif/re/re.c

423

mask,

sys/dev/netif/re/re.c

432

u_int16_t mask

sys/dev/netif/re/re.c

438

mask

sys/dev/netif/re/re.c

462

u_int16_t mask

sys/dev/netif/re/re.c

467

mask,

sys/dev/netif/re/re.c

476

u_int16_t mask

sys/dev/netif/re/re.c

482

mask

sys/dev/netif/re/re.c

506

u_int16_t mask

sys/dev/netif/re/re.c

511

mask,

sys/dev/netif/re/re.c

520

u_int16_t mask

sys/dev/netif/re/re.c

526

mask

sys/dev/netif/re/re.c

5584

u_int16_t mask

sys/dev/netif/re/re.c

5589

mask,

sys/dev/netif/re/re.c

5598

u_int16_t mask

sys/dev/netif/re/re.c

5604

mask

sys/dev/netif/re/re.c

854

u_int32_t value1 = 0, value2 = 0, mask;

sys/dev/netif/re/re.c

879

if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

880

else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

881

else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

882

else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

884

value1 = CSR_READ_4(sc,RE_ERIDR) & mask;

sys/dev/netif/re/re.c

8860

int mask, reinit;

sys/dev/netif/re/re.c

8933

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/re/re.c

8936

if ((mask & IFCAP_TXCSUM) != 0 && (ifp->if_capabilities & IFCAP_TXCSUM) != 0) {

sys/dev/netif/re/re.c

8948

if ((mask & IFCAP_RXCSUM) != 0 &&

sys/dev/netif/re/re.c

8965

if ((mask & IFCAP_VLAN_HWTAGGING) != 0 &&

sys/dev/netif/re/re.c

8974

if ((mask & IFCAP_WOL) != 0 &&

sys/dev/netif/re/re.c

8976

if ((mask & IFCAP_WOL_UCAST) != 0)

sys/dev/netif/re/re.c

8978

if ((mask & IFCAP_WOL_MCAST) != 0)

sys/dev/netif/re/re.c

8980

if ((mask & IFCAP_WOL_MAGIC) != 0)

sys/dev/netif/re/re.c

908

u_int32_t value1 = 0, mask;

sys/dev/netif/re/re.c

918

if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

919

else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

920

else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

921

else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;

sys/dev/netif/re/re.c

923

value1 = re_eri_read_with_oob_base_address(sc, addr, 4, type, base_address) & ~mask;

sys/dev/netif/sn/if_sn.c

240

int mask;

sys/dev/netif/sn/if_sn.c

305

mask = IM_EPH_INT |

sys/dev/netif/sn/if_sn.c

310

outb(BASE + INTR_MASK_REG_B, mask);

sys/dev/netif/sn/if_sn.c

311

sc->intr_mask = mask;

sys/dev/netif/sn/if_sn.c

336

int mask;

sys/dev/netif/sn/if_sn.c

431

mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;

sys/dev/netif/sn/if_sn.c

432

outb(BASE + INTR_MASK_REG_B, mask);

sys/dev/netif/sn/if_sn.c

433

sc->intr_mask = mask;

sys/dev/netif/sn/if_sn.c

507

mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);

sys/dev/netif/sn/if_sn.c

508

outb(BASE + INTR_MASK_REG_B, mask);

sys/dev/netif/sn/if_sn.c

509

sc->intr_mask = mask;

sys/dev/netif/sn/if_sn.c

550

int mask;

sys/dev/netif/sn/if_sn.c

699

mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);

sys/dev/netif/sn/if_sn.c

700

outb(BASE + INTR_MASK_REG_B, mask);

sys/dev/netif/sn/if_sn.c

701

sc->intr_mask = mask;

sys/dev/netif/sn/if_sn.c

736

u_char mask;

sys/dev/netif/sn/if_sn.c

752

mask = inb(BASE + INTR_MASK_REG_B);

sys/dev/netif/sn/if_sn.c

760

status = interrupts & mask;

sys/dev/netif/sn/if_sn.c

809

mask &= ~IM_ALLOC_INT;

sys/dev/netif/sn/if_sn.c

896

mask &= ~IM_TX_EMPTY_INT;

sys/dev/netif/sn/if_sn.c

943

mask |= inb(BASE + INTR_MASK_REG_B);

sys/dev/netif/sn/if_sn.c

944

outb(BASE + INTR_MASK_REG_B, mask);

sys/dev/netif/sn/if_sn.c

945

sc->intr_mask = mask;

sys/dev/netif/stge/if_stge.c

1252

int error, mask;

sys/dev/netif/stge/if_stge.c

1295

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/stge/if_stge.c

1296

if ((mask & IFCAP_HWCSUM) != 0) {

sys/dev/netif/stge/if_stge.c

1304

if ((mask & IFCAP_VLAN_HWTAGGING) != 0) {

sys/dev/netif/ti/if_ti.c

2171

int error = 0, mask;

sys/dev/netif/ti/if_ti.c

2222

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/ti/if_ti.c

2223

if (mask & IFCAP_HWCSUM) {

sys/dev/netif/vge/if_vge.c

2044

uint32_t mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/netif/vge/if_vge.c

2046

if (mask & IFCAP_HWCSUM) {

sys/dev/netif/wpi/if_wpi.c

837

wpi_prph_setbits(struct wpi_softc *sc, uint32_t addr, uint32_t mask)

sys/dev/netif/wpi/if_wpi.c

839

wpi_prph_write(sc, addr, wpi_prph_read(sc, addr) | mask);

sys/dev/netif/wpi/if_wpi.c

843

wpi_prph_clrbits(struct wpi_softc *sc, uint32_t addr, uint32_t mask)

sys/dev/netif/wpi/if_wpi.c

845

wpi_prph_write(sc, addr, wpi_prph_read(sc, addr) & ~mask);

sys/dev/netif/wpi/if_wpireg.h

1026

#define WPI_SETBITS(sc, reg, mask) \

sys/dev/netif/wpi/if_wpireg.h

1027

WPI_WRITE(sc, reg, WPI_READ(sc, reg) | (mask))

sys/dev/netif/wpi/if_wpireg.h

1029

#define WPI_CLRBITS(sc, reg, mask) \

sys/dev/netif/wpi/if_wpireg.h

1030

WPI_WRITE(sc, reg, WPI_READ(sc, reg) & ~(mask))

sys/dev/netif/wpi/if_wpireg.h

476

uint32_t mask;

sys/dev/pccard/exca/excavar.h

142

exca_setb(struct exca_softc *sc, int reg, uint8_t mask)

sys/dev/pccard/exca/excavar.h

144

exca_putb(sc, reg, exca_getb(sc, reg) | mask);

sys/dev/pccard/exca/excavar.h

148

exca_clrb(struct exca_softc *sc, int reg, uint8_t mask)

sys/dev/pccard/exca/excavar.h

150

exca_putb(sc, reg, exca_getb(sc, reg) & ~mask);

sys/dev/pccard/pccbb/pccbb.c

733

uint32_t status, sock_ctrl, mask;

sys/dev/pccard/pccbb/pccbb.c

786

mask = cbb_get(sc, CBB_SOCKET_MASK);

sys/dev/pccard/pccbb/pccbb.c

787

mask |= CBB_SOCKET_MASK_POWER;

sys/dev/pccard/pccbb/pccbb.c

788

mask &= ~CBB_SOCKET_MASK_CD;

sys/dev/pccard/pccbb/pccbb.c

789

cbb_set(sc, CBB_SOCKET_MASK, mask);

sys/dev/powermng/amdtemp/amdtemp.c

1091

uint32_t mask;

sys/dev/powermng/amdtemp/amdtemp.c

1098

mask = scpu->regmask;

sys/dev/powermng/amdtemp/amdtemp.c

1100

for (j = 0; mask; ++j) {

sys/dev/powermng/amdtemp/amdtemp.c

1101

if ((mask & (1U << j)) == 0)

sys/dev/powermng/amdtemp/amdtemp.c

1105

mask &= ~(1U << j);

sys/dev/powermng/amdtemp/amdtemp.c

844

uint32_t mask, offset, temp;

sys/dev/powermng/amdtemp/amdtemp.c

871

mask = (sc->sc_flags & AMDTEMP_FLAG_CT_10BIT) != 0 ? 0x3ff : 0x3fc;

sys/dev/powermng/amdtemp/amdtemp.c

874

temp = ((temp >> 14) & mask) * 5 / 2;

sys/dev/powermng/clockmod/clockmod.c

181

cpumask_t mask, found_mask;

sys/dev/powermng/clockmod/clockmod.c

186

mask = get_cpumask_from_level(sc->sc_cpuid, CORE_LEVEL);

sys/dev/powermng/clockmod/clockmod.c

187

if (CPUMASK_TESTZERO(mask))

sys/dev/powermng/clockmod/clockmod.c

188

CPUMASK_ASSBIT(mask, sc->sc_cpuid);

sys/dev/powermng/clockmod/clockmod.c

192

dom = clockmod_dom_find(mask);

sys/dev/powermng/clockmod/clockmod.c

194

dom = clockmod_dom_create(mask);

sys/dev/powermng/clockmod/clockmod.c

245

clockmod_dom_find(cpumask_t mask)

sys/dev/powermng/clockmod/clockmod.c

250

if (CPUMASK_CMPMASKEQ(dom->dom_cpumask, mask))

sys/dev/powermng/clockmod/clockmod.c

257

clockmod_dom_create(cpumask_t mask)

sys/dev/powermng/clockmod/clockmod.c

266

dom->dom_cpumask = mask;

sys/dev/powermng/corecstat/corecstat.c

527

sens->mask = __BITS64(0, bits-1);

sys/dev/powermng/corecstat/corecstat.c

534

sens->cst_count = b & sens->mask;

sys/dev/powermng/corecstat/corecstat.c

552

b &= sens->mask;

sys/dev/powermng/corecstat/corecstat.c

560

cstdiff = b + ((~sens->cst_count) & sens->mask);

sys/dev/powermng/corecstat/corecstat.c

67

uint64_t mask;

sys/dev/raid/aac/aac.c

110

static void aac_sa_clear_istatus(struct aac_softc *sc, int mask);

sys/dev/raid/aac/aac.c

132

static void aac_rx_clear_istatus(struct aac_softc *sc, int mask);

sys/dev/raid/aac/aac.c

159

static void aac_rkt_clear_istatus(struct aac_softc *sc, int mask);

sys/dev/raid/aac/aac.c

2449

aac_sa_clear_istatus(struct aac_softc *sc, int mask)

sys/dev/raid/aac/aac.c

2453

AAC_MEM0_SETREG2(sc, AAC_SA_DOORBELL0_CLEAR, mask);

sys/dev/raid/aac/aac.c

2457

aac_rx_clear_istatus(struct aac_softc *sc, int mask)

sys/dev/raid/aac/aac.c

2461

AAC_MEM0_SETREG4(sc, AAC_RX_ODBR, mask);

sys/dev/raid/aac/aac.c

2465

aac_rkt_clear_istatus(struct aac_softc *sc, int mask)

sys/dev/raid/aac/aac.c

2469

AAC_MEM0_SETREG4(sc, AAC_RKT_ODBR, mask);

sys/dev/raid/aac/aacvar.h

241

void (*aif_clr_istatus)(struct aac_softc *sc, int mask);

sys/dev/raid/aac/aacvar.h

258

#define AAC_CLEAR_ISTATUS(sc, mask) ((sc)->aac_if->aif_clr_istatus((sc), \

sys/dev/raid/aac/aacvar.h

259

(mask)))

sys/dev/raid/arcmsr/arcmsr.c

321

u_int32_t mask;

sys/dev/raid/arcmsr/arcmsr.c

326

mask = ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);

sys/dev/raid/arcmsr/arcmsr.c

327

CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intmask, intmask_org & mask);

sys/dev/raid/arcmsr/arcmsr.c

328

acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;

sys/dev/raid/arcmsr/arcmsr.c

334

mask = (ARCMSR_IOP2DRV_DATA_WRITE_OK|ARCMSR_IOP2DRV_DATA_READ_OK|ARCMSR_IOP2DRV_CDB_DONE|ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);

sys/dev/raid/arcmsr/arcmsr.c

335

WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell_mask, intmask_org | mask); /*1=interrupt enable, 0=interrupt disable*/

sys/dev/raid/arcmsr/arcmsr.c

336

acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;

sys/dev/raid/arcmsr/arcmsr.c

341

mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);

sys/dev/raid/arcmsr/arcmsr.c

342

CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org & mask);

sys/dev/raid/arcmsr/arcmsr.c

343

acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;

sys/dev/raid/arcmsr/arcmsr.c

348

mask = ARCMSR_HBDMU_ALL_INT_ENABLE;

sys/dev/raid/arcmsr/arcmsr.c

349

CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | mask);

sys/dev/raid/arcmsr/arcmsr.c

351

acb->outbound_int_enable = mask;

sys/dev/raid/arcmsr/arcmsr.c

356

mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);

sys/dev/raid/arcmsr/arcmsr.c

357

CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_mask, intmask_org & mask);

sys/dev/raid/arcmsr/arcmsr.c

358

acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;

sys/dev/raid/hptmv/access601.h

39

void HPTLIBAPI set_fail_leds(MV_SATA_ADAPTER *pAdapter, UCHAR mask);

sys/dev/raid/hptmv/access601.h

42

#define set_fail_leds(pAdapter, mask)

sys/dev/raid/hptmv/access601.h

56

#define set_fail_leds(pAdapter, mask)

sys/dev/raid/iir/iir.h

366

#define GDT_DPRINTF(mask, args) if (gdt_debug & (mask)) ser_kprintf args

sys/dev/raid/iir/iir.h

368

#define GDT_DPRINTF(mask, args) if (gdt_debug & (mask)) kprintf args

sys/dev/raid/iir/iir.h

371

#define GDT_DPRINTF(mask, args)

sys/dev/raid/mly/mlyvar.h

259

#define MLY_IDBR_TRUE(sc, mask) \

sys/dev/raid/mly/mlyvar.h

260

((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask))

sys/dev/raid/mly/mlyvar.h

261

#define MLY_ODBR_TRUE(sc, mask) \

sys/dev/raid/mly/mlyvar.h

262

((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask))

sys/dev/raid/mpr/mpr.c

2460

if (isset(eh->mask, event)) {

sys/dev/raid/mpr/mpr.c

2499

mpr_register_events(struct mpr_softc *sc, uint8_t *mask,

sys/dev/raid/mpr/mpr.c

2514

if (mask != NULL)

sys/dev/raid/mpr/mpr.c

2515

error = mpr_update_events(sc, eh, mask);

sys/dev/raid/mpr/mpr.c

2523

uint8_t *mask)

sys/dev/raid/mpr/mpr.c

2533

if ((mask != NULL) && (handle != NULL))

sys/dev/raid/mpr/mpr.c

2534

bcopy(mask, &handle->mask[0], 16);

sys/dev/raid/mpr/mpr.c

2539

sc->event_mask[i] &= ~eh->mask[i];

sys/dev/raid/mpr/mpr.c

2593

sc->event_mask[i] &= ~eh->mask[i];

sys/dev/raid/mpr/mprvar.h

266

uint8_t mask[16];

sys/dev/raid/mpr/mprvar.h

733

uint32_t mask;

sys/dev/raid/mpr/mprvar.h

735

mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);

sys/dev/raid/mpr/mprvar.h

736

mask |= MPI2_HIM_REPLY_INT_MASK;

sys/dev/raid/mpr/mprvar.h

737

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);

sys/dev/raid/mpr/mprvar.h

743

uint32_t mask;

sys/dev/raid/mpr/mprvar.h

745

mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);

sys/dev/raid/mpr/mprvar.h

746

mask &= ~MPI2_HIM_REPLY_INT_MASK;

sys/dev/raid/mpr/mprvar.h

747

mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);

sys/dev/raid/mps/mps.c

1625

if (isset(eh->mask, event)) {

sys/dev/raid/mps/mps.c

1663

mps_register_events(struct mps_softc *sc, uint8_t *mask,

sys/dev/raid/mps/mps.c

1673

if (mask != NULL)

sys/dev/raid/mps/mps.c

1674

error = mps_update_events(sc, eh, mask);

sys/dev/raid/mps/mps.c

1682

uint8_t *mask)

sys/dev/raid/mps/mps.c

1692

if ((mask != NULL) && (handle != NULL))

sys/dev/raid/mps/mps.c

1693

bcopy(mask, &handle->mask[0], 16);

sys/dev/raid/mps/mps.c

1698

sc->event_mask[i] &= ~eh->mask[i];

sys/dev/raid/mps/mps.c

1747

sc->event_mask[i] &= ~eh->mask[i];

sys/dev/raid/mps/mpsvar.h

279

uint8_t mask[16];

sys/dev/raid/mps/mpsvar.h

663

uint32_t mask;

sys/dev/raid/mps/mpsvar.h

665

mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);

sys/dev/raid/mps/mpsvar.h

666

mask |= MPI2_HIM_REPLY_INT_MASK;

sys/dev/raid/mps/mpsvar.h

667

mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);

sys/dev/raid/mps/mpsvar.h

673

uint32_t mask;

sys/dev/raid/mps/mpsvar.h

675

mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);

sys/dev/raid/mps/mpsvar.h

676

mask &= ~MPI2_HIM_REPLY_INT_MASK;

sys/dev/raid/mps/mpsvar.h

677

mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);

sys/dev/raid/mrsas/mrsas.c

268

u_int32_t mask = 0xFFFFFFFF;

sys/dev/raid/mrsas/mrsas.c

271

mrsas_write_reg(sc, offsetof(mrsas_reg_set, outbound_intr_mask), mask);

sys/dev/raid/mrsas/mrsas.c

278

u_int32_t mask = MFI_FUSION_ENABLE_INTERRUPT_MASK;

sys/dev/raid/mrsas/mrsas.c

284

mrsas_write_reg(sc, offsetof(mrsas_reg_set, outbound_intr_mask), ~mask);

sys/dev/sound/pci/als4000.c

577

u_int32_t r, l, v, mask;

sys/dev/sound/pci/als4000.c

580

mask = ((1 << amt[dev].bits) - 1) << (8 - amt[dev].bits);

sys/dev/sound/pci/als4000.c

582

l = (left * mask / 100) & mask;

sys/dev/sound/pci/als4000.c

583

v = als_mix_rd(sc, amt[dev].lreg) & ~mask;

sys/dev/sound/pci/als4000.c

587

r = (right * mask / 100) & mask;

sys/dev/sound/pci/als4000.c

588

v = als_mix_rd(sc, amt[dev].rreg) & ~mask;

sys/dev/sound/pci/cmi.c

182

int reg, int shift, u_int32_t mask, u_int32_t val)

sys/dev/sound/pci/cmi.c

187

r &= ~(mask << shift);

sys/dev/sound/pci/cmi.c

193

cmi_clr4(struct sc_info *sc, int reg, u_int32_t mask)

sys/dev/sound/pci/cmi.c

198

r &= ~mask;

sys/dev/sound/pci/cmi.c

203

cmi_set4(struct sc_info *sc, int reg, u_int32_t mask)

sys/dev/sound/pci/cmi.c

208

r |= mask;

sys/dev/sound/pci/cs4281.c

160

cs4281_clr4(struct sc_info *sc, int regno, u_int32_t mask)

sys/dev/sound/pci/cs4281.c

164

cs4281_wr(sc, regno, r & ~mask);

sys/dev/sound/pci/cs4281.c

168

cs4281_set4(struct sc_info *sc, int regno, u_int32_t mask)

sys/dev/sound/pci/cs4281.c

172

cs4281_wr(sc, regno, v | mask);

sys/dev/sound/pci/cs4281.c

176

cs4281_waitset(struct sc_info *sc, int regno, u_int32_t mask, int tries)

sys/dev/sound/pci/cs4281.c

183

if ((v & mask) == mask) break;

sys/dev/sound/pci/cs4281.c

190

cs4281_waitclr(struct sc_info *sc, int regno, u_int32_t mask, int tries)

sys/dev/sound/pci/cs4281.c

197

if (v & mask) break;

sys/dev/sound/pci/emu10k1.c

333

u_int32_t ptr, val, mask, size, offset;

sys/dev/sound/pci/emu10k1.c

341

mask = ((1 << size) - 1) << offset;

sys/dev/sound/pci/emu10k1.c

342

val &= mask;

sys/dev/sound/pci/emu10k1.c

351

u_int32_t ptr, mask, size, offset;

sys/dev/sound/pci/emu10k1.c

358

mask = ((1 << size) - 1) << offset;

sys/dev/sound/pci/emu10k1.c

360

data &= mask;

sys/dev/sound/pci/emu10k1.c

361

data |= emu_rd(sc, EMU_DATA, 4) & ~mask;

sys/dev/sound/pci/emu10kx.c

652

uint32_t ptr, val, mask, size, offset;

sys/dev/sound/pci/emu10kx.c

669

mask = ((1 << size) - 1) << offset;

sys/dev/sound/pci/emu10kx.c

670

val &= mask;

sys/dev/sound/pci/emu10kx.c

679

uint32_t ptr, mask, size, offset;

sys/dev/sound/pci/emu10kx.c

693

mask = ((1 << size) - 1) << offset;

sys/dev/sound/pci/emu10kx.c

695

data &= mask;

sys/dev/sound/pci/emu10kx.c

696

data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;

sys/dev/sound/pci/envy24.c

1204

u_int32_t mask, intr;

sys/dev/sound/pci/envy24.c

1216

mask = ~ENVY24_MT_INT_PMASK;

sys/dev/sound/pci/envy24.c

1223

mask = ~ENVY24_MT_INT_RMASK;

sys/dev/sound/pci/envy24.c

1239

device_printf(sc->dev, "envy24_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, mask);

sys/dev/sound/pci/envy24.c

1241

envy24_wrmt(sc, ENVY24_MT_INT, intr & mask, 1);

sys/dev/sound/pci/envy24.c

1254

u_int32_t mask, intr;

sys/dev/sound/pci/envy24.c

1260

mask = ENVY24_MT_INT_PMASK;

sys/dev/sound/pci/envy24.c

1262

mask = ENVY24_MT_INT_RMASK;

sys/dev/sound/pci/envy24.c

1264

envy24_wrmt(sc, ENVY24_MT_INT, intr | mask, 1);

sys/dev/sound/pci/envy24.c

1273

u_int32_t mask, stat, intr, rtn;

sys/dev/sound/pci/envy24.c

1281

mask = ~ENVY24_MT_INT_RSTAT;

sys/dev/sound/pci/envy24.c

1283

envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1);

sys/dev/sound/pci/envy24.c

1288

mask = ~ENVY24_MT_INT_PSTAT;

sys/dev/sound/pci/envy24.c

1290

envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1);

sys/dev/sound/pci/envy24.c

1343

u_int32_t reg, mask;

sys/dev/sound/pci/envy24.c

1375

mask = ~(0x0303 << dac * 2);

sys/dev/sound/pci/envy24.c

1377

reg = (reg & mask) | ((class | class << 8) << dac * 2);

sys/dev/sound/pci/envy24.c

1382

mask = ~(0xff << dac * 8);

sys/dev/sound/pci/envy24.c

1384

reg = (reg & mask) |

sys/dev/sound/pci/envy24.c

773

envy24_gpiosetmask(struct sc_info *sc, u_int32_t mask)

sys/dev/sound/pci/envy24.c

775

envy24_wrci(sc, ENVY24_CCI_GPIOMASK, mask);

sys/dev/sound/pci/envy24.c

885

int mask;

sys/dev/sound/pci/envy24.c

889

for (mask = 0x80; mask != 0; mask >>= 1)

sys/dev/sound/pci/envy24.c

890

i2c_wrbit(ptr, ctrl, dev & mask);

sys/dev/sound/pci/envy24.c

894

for (mask = 0x80; mask != 0; mask >>= 1)

sys/dev/sound/pci/envy24.c

895

i2c_wrbit(ptr, ctrl, reg & mask);

sys/dev/sound/pci/envy24.c

899

for (mask = 0x80; mask != 0; mask >>= 1)

sys/dev/sound/pci/envy24.c

900

i2c_wrbit(ptr, ctrl, val & mask);

sys/dev/sound/pci/envy24ht.c

1158

u_int32_t mask, intr;

sys/dev/sound/pci/envy24ht.c

1170

mask = ~ENVY24HT_MT_INT_PMASK;

sys/dev/sound/pci/envy24ht.c

1177

mask = ~ENVY24HT_MT_INT_RMASK;

sys/dev/sound/pci/envy24ht.c

1193

device_printf(sc->dev, "envy24ht_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, mask);

sys/dev/sound/pci/envy24ht.c

1195

envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, intr & mask, 1);

sys/dev/sound/pci/envy24ht.c

1208

u_int32_t mask, intr;

sys/dev/sound/pci/envy24ht.c

1214

mask = ENVY24HT_MT_INT_PMASK;

sys/dev/sound/pci/envy24ht.c

1216

mask = ENVY24HT_MT_INT_RMASK;

sys/dev/sound/pci/envy24ht.c

1218

envy24ht_wrmt(sc, ENVY24HT_MT_INT, intr | mask, 1);

sys/dev/sound/pci/envy24ht.c

1227

u_int32_t mask, stat, intr, rtn;

sys/dev/sound/pci/envy24ht.c

1235

mask = ~ENVY24HT_MT_INT_RSTAT;

sys/dev/sound/pci/envy24ht.c

1237

envy24ht_wrmt(sc, ENVY24HT_MT_INT_STAT, (intr & mask) | ENVY24HT_MT_INT_PSTAT | 0x08, 1);

sys/dev/sound/pci/envy24ht.c

1244

mask = ~ENVY24HT_MT_INT_PSTAT;

sys/dev/sound/pci/envy24ht.c

1248

envy24ht_wrmt(sc, ENVY24HT_MT_INT_STAT, (intr & mask) | ENVY24HT_MT_INT_RSTAT, 1);

sys/dev/sound/pci/envy24ht.c

857

envy24ht_gpiosetmask(struct sc_info *sc, u_int32_t mask)

sys/dev/sound/pci/envy24ht.c

859

envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_LMASK, mask, 2);

sys/dev/sound/pci/envy24ht.c

861

envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_HMASK, mask >> 16, 1);

sys/dev/sound/pci/hda/hdaa.c

183

hdaa_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len)

sys/dev/sound/pci/hda/hdaa.c

189

if (mask & (1 << i)) {

sys/dev/sound/pci/hda/hdaa.c

2259

uint32_t mask, recmask;

sys/dev/sound/pci/hda/hdaa.c

2272

mask = pdevinfo->ossmask;

sys/dev/sound/pci/hda/hdaa.c

2283

mask |= SOUND_MASK_OGAIN;

sys/dev/sound/pci/hda/hdaa.c

2288

if ((mask & SOUND_MASK_PCM) == 0 ||

sys/dev/sound/pci/hda/hdaa.c

2292

mask |= SOUND_MASK_PCM;

sys/dev/sound/pci/hda/hdaa.c

2301

if ((mask & SOUND_MASK_VOLUME) == 0) {

sys/dev/sound/pci/hda/hdaa.c

2302

mask |= SOUND_MASK_VOLUME;

sys/dev/sound/pci/hda/hdaa.c

2339

mask &= (1 << SOUND_MIXER_NRDEVICES) - 1;

sys/dev/sound/pci/hda/hdaa.c

2340

pdevinfo->ossmask = mask;

sys/dev/sound/pci/hda/hdaa.c

2343

mix_setdevs(m, mask);

sys/dev/sound/pci/hda/hdaa.c

354

if ((matrixes[i].m.mask & ~channels) == 0) {

sys/dev/sound/pci/hda/hdaa.c

498

int i, mask, fullmask, prio, bestprio;

sys/dev/sound/pci/hda/hdaa.c

514

mask = fullmask = 0;

sys/dev/sound/pci/hda/hdaa.c

528

mask = 0;

sys/dev/sound/pci/hda/hdaa.c

531

mask |= (1 << w1->ossdev);

sys/dev/sound/pci/hda/hdaa.c

534

if (mask == 0)

sys/dev/sound/pci/hda/hdaa.c

537

if (w != NULL && (mask & (1 << w->ossdev)))

sys/dev/sound/pci/hda/hdaa.c

538

mask = (1 << w->ossdev);

sys/dev/sound/pci/hda/hdaa.c

540

if (mask & pdevinfo->recsrc)

sys/dev/sound/pci/hda/hdaa.c

541

mask &= pdevinfo->recsrc;

sys/dev/sound/pci/hda/hdaa.c

543

if (mask & SOUND_MASK_MIC)

sys/dev/sound/pci/hda/hdaa.c

544

mask = SOUND_MASK_MIC;

sys/dev/sound/pci/hda/hdaa.c

546

if (mask & SOUND_MASK_MONITOR)

sys/dev/sound/pci/hda/hdaa.c

547

mask = SOUND_MASK_MONITOR;

sys/dev/sound/pci/hda/hdaa.c

549

mask = (1 << (ffs(mask) - 1));

sys/dev/sound/pci/hda/hdaa.c

551

hdaa_audio_ctl_ossmixer_mask2allname(mask, buf, sizeof(buf));

sys/dev/sound/pci/hda/hdaa.c

556

mix_setrecsrc(pdevinfo->mixer, mask);

sys/dev/sound/pci/hda/hdac.c

228

uint8_t mask;

sys/dev/sound/pci/hdspe-pcm.c

117

int mask;

sys/dev/sound/pci/hdspe-pcm.c

122

mask = SOUND_MASK_PCM;

sys/dev/sound/pci/hdspe-pcm.c

125

mask |= SOUND_MASK_VOLUME;

sys/dev/sound/pci/hdspe-pcm.c

128

mask |= SOUND_MASK_RECLEV;

sys/dev/sound/pci/hdspe-pcm.c

132

mix_setdevs(m, mask);

sys/dev/sound/pci/spicds.c

109

for (mask = 0x10; mask != 0; mask >>= 1)

sys/dev/sound/pci/spicds.c

110

spicds_wrbit(codec, reg & mask);

sys/dev/sound/pci/spicds.c

112

for (mask = 0x80; mask != 0; mask >>= 1)

sys/dev/sound/pci/spicds.c

113

spicds_wrbit(codec, val & mask);

sys/dev/sound/pci/spicds.c

119

for (mask = 0x40; mask != 0; mask >>= 1)

sys/dev/sound/pci/spicds.c

120

spicds_wrbit(codec, reg & mask);

sys/dev/sound/pci/spicds.c

122

for (mask = 0x100; mask != 0; mask >>= 1)

sys/dev/sound/pci/spicds.c

123

spicds_wrbit(codec, val & mask);

sys/dev/sound/pci/spicds.c

78

int mask;

sys/dev/sound/pci/t4dwave.c

741

u_int32_t active, mask, bufhalf, chnum, intsrc;

sys/dev/sound/pci/t4dwave.c

748

mask = 0x00000001;

sys/dev/sound/pci/t4dwave.c

753

if (active & mask) {

sys/dev/sound/pci/t4dwave.c

754

tmp = (bufhalf & mask)? 1 : 0;

sys/dev/sound/pci/t4dwave.c

765

mask <<= 1;

sys/dev/sound/pci/vibes.c

548

sv_mix_setrecsrc(struct snd_mixer *m, u_int32_t mask)

sys/dev/sound/pci/vibes.c

555

if ((1 << i) & mask) {

sys/dev/sound/pci/vibes.c

559

DEB(kprintf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, v));

sys/dev/sound/pci/vibes.c

561

return mask;

sys/dev/sound/pcm/ac97.c

1011

mask = 0;

sys/dev/sound/pcm/ac97.c

1013

mask |= codec->mix[i].enable? 1 << i : 0;

sys/dev/sound/pcm/ac97.c

1014

mix_setdevs(m, mask);

sys/dev/sound/pcm/ac97.c

1016

mask = 0;

sys/dev/sound/pcm/ac97.c

1018

mask |= codec->mix[i].recidx? 1 << i : 0;

sys/dev/sound/pcm/ac97.c

1019

mix_setrecdevs(m, mask);

sys/dev/sound/pcm/ac97.c

442

int mask, max, val, reg;

sys/dev/sound/pcm/ac97.c

446

mask = (max << 8) | max; /* bits of interest */

sys/dev/sound/pcm/ac97.c

482

mask = (max << e->ofs);

sys/dev/sound/pcm/ac97.c

491

mask |= AC97_MUTE;

sys/dev/sound/pcm/ac97.c

500

if (e->mask) {

sys/dev/sound/pcm/ac97.c

502

val |= cur & ~(mask);

sys/dev/sound/pcm/ac97.c

51

unsigned mask:1; /* use only masked bits */

sys/dev/sound/pcm/ac97.c

929

u_int32_t i, mask;

sys/dev/sound/pcm/ac97.c

948

mask = 0;

sys/dev/sound/pcm/ac97.c

950

mask |= SOUND_MASK_OGAIN;

sys/dev/sound/pcm/ac97.c

952

mask |= SOUND_MASK_PHONEOUT;

sys/dev/sound/pcm/ac97.c

955

mask);

sys/dev/sound/pcm/ac97.c

958

mask);

sys/dev/sound/pcm/channel.c

1540

if (m->mask & SND_CHN_OSS_FRONT)

sys/dev/sound/pcm/channel.c

1542

if (m->mask & SND_CHN_OSS_SURR)

sys/dev/sound/pcm/channel.c

1544

if (m->mask & SND_CHN_OSS_CENTER_LFE)

sys/dev/sound/pcm/channel.c

1546

if (m->mask & SND_CHN_OSS_REAR)

sys/dev/sound/pcm/channel.h

44

uint32_t mask;

sys/dev/sound/pcm/dsp.c

109

static int dsp_oss_getchannelmask(struct pcm_channel *wrch, struct pcm_channel *rdch, int *mask);

sys/dev/sound/pcm/dsp.c

3274

int *mask)

sys/dev/sound/pcm/dsp.c

3291

*mask = chnmask;

sys/dev/sound/pcm/feeder_matrix.c

324

else if (m_out->mask & SND_CHN_T_MASK_FC)

sys/dev/sound/pcm/feeder_matrix.c

329

in_mask = m_in->mask;

sys/dev/sound/pcm/feeder_matrix.c

680

m_in->mask != m_out->mask)

sys/dev/sound/pcm/feeder_matrix.c

747

if (m == NULL || map == NULL || (m->mask & ~SND_CHN_OSS_VALIDMASK) ||

sys/dev/sound/pcm/feeder_matrix.c

778

if (m == NULL || map == NULL || (m->mask & ~SND_CHN_OSS_VALIDMASK) ||

sys/dev/sound/pcm/feeder_matrix.c

785

tmp.mask = 0;

sys/dev/sound/pcm/feeder_matrix.c

804

if (!(chmask & m->mask))

sys/dev/sound/pcm/feeder_matrix.c

807

if (chmask & tmp.mask)

sys/dev/sound/pcm/feeder_matrix.c

813

tmp.mask |= chmask;

sys/dev/sound/pcm/feeder_matrix.c

820

tmp.mask != m->mask ||

sys/dev/sound/pcm/matrix_map.h

118

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR, \

sys/dev/sound/pcm/matrix_map.h

154

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

192

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

235

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

279

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

328

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

378

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

431

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

486

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

542

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

604

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

664

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/matrix_map.h

86

.mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \

sys/dev/sound/pcm/mixer.c

549

u_int32_t mask = 0;

sys/dev/sound/pcm/mixer.c

558

mask |= 1 << i;

sys/dev/sound/pcm/mixer.c

565

mask &= ~(1 << parent);

sys/dev/sound/pcm/mixer.c

566

m->child[parent] = mask;

sys/dev/video/cxm/cxm.c

583

cxm_set_irq_mask(struct cxm_softc *sc, uint32_t mask)

sys/dev/video/cxm/cxm.c

587

CSR_WRITE_4(sc, CXM_REG_IRQ_MASK, mask);

sys/dev/video/cxm/cxm.c

597

sc->irq_mask = mask;

sys/dev/video/fb/bmp/splash_bmp.c

429

u_char val, mask;

sys/dev/video/fb/bmp/splash_bmp.c

456

mask = 0x80;

sys/dev/video/fb/bmp/splash_bmp.c

458

val = (*p & mask) ? 1 : 0;

sys/dev/video/fb/bmp/splash_bmp.c

459

mask >>= 1;

sys/dev/video/fb/bmp/splash_bmp.c

460

if (mask == 0) {

sys/dev/video/fb/bmp/splash_bmp.c

461

mask = 0x80;

sys/dev/virtual/nvmm/nvmm_os.h

366

cpumask_t mask;

sys/dev/virtual/nvmm/nvmm_os.h

370

CPUMASK_ASSBIT(mask, i);

sys/dev/virtual/nvmm/nvmm_os.h

371

lwkt_cpusync_simple(mask, func, arg);

sys/dev/virtual/nvmm/x86/nvmm_x86.h

325

uint32_t mask:1;

sys/dev/virtual/nvmm/x86/nvmm_x86.h

347

} mask;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1101

OS_ASSERT(cpuid->mask);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1104

cpudata->vmcb->state.rax &= ~cpuid->u.mask.del.eax;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1105

cpudata->gprs[NVMM_X64_GPR_RBX] &= ~cpuid->u.mask.del.ebx;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1106

cpudata->gprs[NVMM_X64_GPR_RCX] &= ~cpuid->u.mask.del.ecx;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1107

cpudata->gprs[NVMM_X64_GPR_RDX] &= ~cpuid->u.mask.del.edx;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1110

cpudata->vmcb->state.rax |= cpuid->u.mask.set.eax;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1111

cpudata->gprs[NVMM_X64_GPR_RBX] |= cpuid->u.mask.set.ebx;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1112

cpudata->gprs[NVMM_X64_GPR_RCX] |= cpuid->u.mask.set.ecx;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1113

cpudata->gprs[NVMM_X64_GPR_RDX] |= cpuid->u.mask.set.edx;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2454

if (__predict_false(cpuid->mask && cpuid->exit)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2457

if (__predict_false(cpuid->mask &&

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2458

((cpuid->u.mask.set.eax & cpuid->u.mask.del.eax) ||

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2459

(cpuid->u.mask.set.ebx & cpuid->u.mask.del.ebx) ||

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2460

(cpuid->u.mask.set.ecx & cpuid->u.mask.del.ecx) ||

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2461

(cpuid->u.mask.set.edx & cpuid->u.mask.del.edx)))) {

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2466

if (!cpuid->mask && !cpuid->exit) {

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1583

OS_ASSERT(cpuid->mask);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1586

cpudata->gprs[NVMM_X64_GPR_RAX] &= ~cpuid->u.mask.del.eax;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1587

cpudata->gprs[NVMM_X64_GPR_RBX] &= ~cpuid->u.mask.del.ebx;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1588

cpudata->gprs[NVMM_X64_GPR_RCX] &= ~cpuid->u.mask.del.ecx;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1589

cpudata->gprs[NVMM_X64_GPR_RDX] &= ~cpuid->u.mask.del.edx;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1592

cpudata->gprs[NVMM_X64_GPR_RAX] |= cpuid->u.mask.set.eax;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1593

cpudata->gprs[NVMM_X64_GPR_RBX] |= cpuid->u.mask.set.ebx;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1594

cpudata->gprs[NVMM_X64_GPR_RCX] |= cpuid->u.mask.set.ecx;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1595

cpudata->gprs[NVMM_X64_GPR_RDX] |= cpuid->u.mask.set.edx;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3142

if (__predict_false(cpuid->mask && cpuid->exit)) {

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3145

if (__predict_false(cpuid->mask &&

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3146

((cpuid->u.mask.set.eax & cpuid->u.mask.del.eax) ||

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3147

(cpuid->u.mask.set.ebx & cpuid->u.mask.del.ebx) ||

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3148

(cpuid->u.mask.set.ecx & cpuid->u.mask.del.ecx) ||

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3149

(cpuid->u.mask.set.edx & cpuid->u.mask.del.edx)))) {

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3154

if (!cpuid->mask && !cpuid->exit) {

sys/dev/virtual/virtio/net/if_vtnet.c

1043

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/virtual/virtio/net/if_vtnet.c

1046

if (mask & IFCAP_TXCSUM) {

sys/dev/virtual/virtio/net/if_vtnet.c

1054

if (mask & IFCAP_TSO4) {

sys/dev/virtual/virtio/net/if_vtnet.c

1062

if (mask & IFCAP_RXCSUM) {

sys/dev/virtual/virtio/net/if_vtnet.c

1068

if (mask & IFCAP_LRO) {

sys/dev/virtual/virtio/net/if_vtnet.c

1074

if (mask & IFCAP_VLAN_HWFILTER) {

sys/dev/virtual/virtio/net/if_vtnet.c

1079

if (mask & IFCAP_VLAN_HWTSO)

sys/dev/virtual/virtio/net/if_vtnet.c

1082

if (mask & IFCAP_VLAN_HWTAGGING)

sys/dev/virtual/virtio/net/if_vtnet.c

488

uint64_t mask, features;

sys/dev/virtual/virtio/net/if_vtnet.c

491

mask = 0;

sys/dev/virtual/virtio/net/if_vtnet.c

494

mask |= VIRTIO_NET_F_CSUM | VIRTIO_NET_F_GUEST_CSUM;

sys/dev/virtual/virtio/net/if_vtnet.c

502

mask |= VIRTIO_NET_F_GUEST_CSUM;

sys/dev/virtual/virtio/net/if_vtnet.c

509

mask |= VIRTIO_NET_F_HOST_TSO4 | VIRTIO_NET_F_HOST_TSO6 |

sys/dev/virtual/virtio/net/if_vtnet.c

513

mask |= VTNET_LRO_FEATURES;

sys/dev/virtual/virtio/net/if_vtnet.c

515

features = VTNET_FEATURES & ~mask;

sys/dev/virtual/virtio/net/if_vtnet.c

995

int reinit, mask, error;

sys/dev/virtual/virtio/virtio/virtqueue.c

134

uint64_t mask;

sys/dev/virtual/virtio/virtio/virtqueue.c

136

mask = (1 << VIRTIO_TRANSPORT_F_START) - 1;

sys/dev/virtual/virtio/virtio/virtqueue.c

137

mask |= VIRTIO_RING_F_INDIRECT_DESC;

sys/dev/virtual/virtio/virtio/virtqueue.c

138

mask |= VIRTIO_RING_F_EVENT_IDX;

sys/dev/virtual/virtio/virtio/virtqueue.c

140

return (features & mask);

sys/dev/virtual/vkernel/net/if_vke.c

340

in_addr_t addr, mask;

sys/dev/virtual/vkernel/net/if_vke.c

343

mask = sc->sc_mask;

sys/dev/virtual/vkernel/net/if_vke.c

353

vke_init_addr(ifp, addr, mask);

sys/dev/virtual/vkernel/net/if_vke.c

948

vke_init_addr(struct ifnet *ifp, in_addr_t addr, in_addr_t mask)

sys/dev/virtual/vkernel/net/if_vke.c

959

ntohl(addr), ntohl(mask));

sys/dev/virtual/vkernel/net/if_vke.c

971

if (mask != 0) {

sys/dev/virtual/vkernel/net/if_vke.c

974

sin->sin_addr.s_addr = mask;

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1043

uint32_t mask;

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1049

mask = MASK(s->cmp_num_entries_log2);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1052

e = ring + (s->cmp_cons_idx & mask);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1120

uint32_t mask;

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1126

mask = MASK(s->msg_num_entries_log2);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

1129

e = ring + (s->msg_cons_idx & mask);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

289

uint32_t mask;

sys/dev/virtual/vmware/pvscsi/pvscsi.c

291

mask = PVSCSI_INTR_CMPL_MASK;

sys/dev/virtual/vmware/pvscsi/pvscsi.c

293

mask |= PVSCSI_INTR_MSG_MASK;

sys/dev/virtual/vmware/pvscsi/pvscsi.c

296

pvscsi_reg_write(sc, PVSCSI_REG_OFFSET_INTR_MASK, mask);

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3295

int reinit, mask, error;

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3343

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3345

if (mask & IFCAP_TXCSUM)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3347

if (mask & IFCAP_TXCSUM_IPV6)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3350

if (mask & IFCAP_TSO4)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3352

if (mask & IFCAP_TSO6)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3356

if (mask & (IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | /* IFCAP_LRO | */

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3361

if (mask & IFCAP_RXCSUM)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3363

if (mask & IFCAP_RXCSUM_IPV6)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3366

if (mask & IFCAP_LRO)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3369

if (mask & IFCAP_VLAN_HWTAGGING)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3372

if (mask & IFCAP_VLAN_HWFILTER)

sys/dev/virtual/vmware/vmxnet3/if_vmx.c

3379

if (mask & IFCAP_VLAN_HWTSO)

sys/kern/kern_event.c

171

#define KN_HASH(val, mask) (((val) ^ (val >> 8)) & (mask))

sys/kern/kern_fork.c

220

cpumask_t *mask = NULL, mask0;

sys/kern/kern_fork.c

233

mask = &mask0;

sys/kern/kern_fork.c

238

lp = lwp_fork1(curthread->td_lwp, p, RFPROC | RFMEM, mask);

sys/kern/kern_fork.c

299

return (lwp_create1(uap->params, uap->mask));

sys/kern/kern_fork.c

741

const cpumask_t *mask)

sys/kern/kern_fork.c

751

if (mask != NULL)

sys/kern/kern_fork.c

752

lp2->lwp_cpumask = *mask;

sys/kern/kern_fork.c

86

const cpumask_t *mask);

sys/kern/kern_fork.c

90

const cpumask_t *mask);

sys/kern/kern_kmalloc.c

626

uint64_t mask;

sys/kern/kern_kmalloc.c

631

mask = (uint64_t)1U << (i & 63);

sys/kern/kern_kmalloc.c

632

KKASSERT(i < slab->ncount && (*ptr & mask) == 0);

sys/kern/kern_kmalloc.c

633

atomic_set_64(ptr, mask);

sys/kern/kern_kmalloc.c

640

uint64_t mask;

sys/kern/kern_kmalloc.c

645

mask = (uint64_t)1U << (i & 63);

sys/kern/kern_kmalloc.c

646

KKASSERT(i < slab->ncount && (*ptr & mask) != 0);

sys/kern/kern_kmalloc.c

647

atomic_clear_64(ptr, mask);

sys/kern/kern_ktrace.c

231

ktrpsig(struct lwp *lp, int sig, sig_t action, sigset_t *mask, int code)

sys/kern/kern_ktrace.c

241

kp.mask = *mask;

sys/kern/kern_sig.c

1974

sigset_t mask;

sys/kern/kern_sig.c

2003

mask = lwp_sigpend(lp);

sys/kern/kern_sig.c

2004

SIGSETNAND(mask, lp->lwp_sigmask);

sys/kern/kern_sig.c

2006

SIG_STOPSIGMASK(mask);

sys/kern/kern_sig.c

2007

SIG_CONDBLOCKALLSIGS(mask, lp);

sys/kern/kern_sig.c

2009

if (SIGISEMPTY(mask)) /* no signal to send */

sys/kern/kern_sig.c

2017

sig = sig_ffs(&mask);

sys/kern/kern_sig.c

2025

mask = lwp_sigpend(lp);

sys/kern/kern_sig.c

2026

SIGSETNAND(mask, lp->lwp_sigmask);

sys/kern/kern_sig.c

2028

SIG_STOPSIGMASK(mask);

sys/kern/kern_sig.c

2029

if (SIGISEMPTY(mask)) { /* no signal to send */

sys/kern/kern_sig.c

2034

sig = sig_ffs(&mask);

sys/kern/kern_sig.c

616

sigset_t mask;

sys/kern/kern_sig.c

619

error = copyin(uap->sigmask, &mask, sizeof(mask));

sys/kern/kern_sig.c

623

error = kern_sigsuspend(&mask);

sys/kern/kern_synch.c

1005

cpumask_t mask;

sys/kern/kern_synch.c

1105

mask = slpque_cpumasks[cid];

sys/kern/kern_synch.c

1106

CPUMASK_ANDMASK(mask, gd->gd_other_cpus);

sys/kern/kern_synch.c

1107

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/kern_synch.c

1108

n = BSRCPUMASK(mask);

sys/kern/kern_synch.c

1109

CPUMASK_NANDBIT(mask, n);

sys/kern/kern_synch.c

1133

if (CPUMASK_TESTNZERO(mask)) {

sys/kern/kern_synch.c

1134

lwkt_send_ipiq2_mask(mask, _wakeup, ident,

sys/kern/kern_sysctl.c

1096

uint32_t mask;

sys/kern/kern_sysctl.c

1101

mask = arg1 ? *(uint32_t *)arg1 : (uint32_t)arg2;

sys/kern/kern_sysctl.c

1102

v = (mask & (1U << bit)) ? 1 : 0;

sys/kern/kern_sysctl.c

1133

uint64_t mask;

sys/kern/kern_sysctl.c

1138

mask = arg1 ? *(uint64_t *)arg1 : (uint64_t)(uint32_t)arg2;

sys/kern/kern_sysctl.c

1139

v = (mask & (1LU << bit)) ? 1 : 0;

sys/kern/kern_usched.c

190

cpumask_t mask;

sys/kern/kern_usched.c

272

mask = lp->lwp_cpumask;

sys/kern/kern_usched.c

273

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/kern_usched.c

274

error = copyout(&mask, uap->data, sizeof(cpumask_t));

sys/kern/kern_usched.c

310

mask = lp->lwp_cpumask;

sys/kern/kern_usched.c

311

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/kern_usched.c

312

CPUMASK_NANDBIT(mask, cpuid);

sys/kern/kern_usched.c

313

if (CPUMASK_TESTZERO(mask)) {

sys/kern/kern_usched.c

319

mask = lp->lwp_cpumask;

sys/kern/kern_usched.c

320

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/kern_usched.c

321

cpuid = BSFCPUMASK(mask);

sys/kern/kern_usched.c

330

if (uap->bytes != sizeof(mask)) {

sys/kern/kern_usched.c

334

error = copyin(uap->data, &mask, sizeof(mask));

sys/kern/kern_usched.c

338

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/kern_usched.c

339

if (CPUMASK_TESTZERO(mask)) {

sys/kern/kern_usched.c

344

lp->lwp_cpumask = mask;

sys/kern/kern_usched.c

367

cpumask_t mask;

sys/kern/kern_usched.c

395

mask = lp->lwp_cpumask;

sys/kern/kern_usched.c

396

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/kern_usched.c

405

error = copyout(&mask, uap->mask, sizeof(cpumask_t));

sys/kern/kern_usched.c

415

cpumask_t mask;

sys/kern/kern_usched.c

429

error = copyin(uap->mask, &mask, sizeof(mask));

sys/kern/kern_usched.c

433

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/kern_usched.c

434

if (CPUMASK_TESTZERO(mask))

sys/kern/kern_usched.c

454

error = setaffinity_lp(lp, &mask);

sys/kern/kern_usched.c

459

error = setaffinity_lp(lp, &mask);

sys/kern/kern_usched.c

468

setaffinity_lp(struct lwp *lp, cpumask_t *mask)

sys/kern/kern_usched.c

475

lp->lwp_cpumask = *mask;

sys/kern/kern_usched.c

51

static int setaffinity_lp(struct lwp *lp, cpumask_t *mask);

sys/kern/kern_varsym.c

199

sym = varsymfind(uap->mask, wild, strlen(wild));

sys/kern/kern_varsym.c

377

varsymfind(int mask, const char *name, int namelen)

sys/kern/kern_varsym.c

390

if ((mask & (VARSYM_PROC_MASK|VARSYM_USER_MASK)) && lp != NULL) {

sys/kern/kern_varsym.c

391

if (mask & VARSYM_PROC_MASK) {

sys/kern/kern_varsym.c

395

if (ve == NULL && (mask & VARSYM_USER_MASK)) {

sys/kern/kern_varsym.c

400

if (ve == NULL && (mask & VARSYM_SYS_MASK)) {

sys/kern/lwkt_ipiq.c

104

KTR_INFO(KTR_IPIQ, ipiq, sync_start, 5, "cpumask=%08lx", unsigned long mask);

sys/kern/lwkt_ipiq.c

105

KTR_INFO(KTR_IPIQ, ipiq, sync_end, 6, "cpumask=%08lx", unsigned long mask);

sys/kern/lwkt_ipiq.c

108

KTR_INFO(KTR_IPIQ, ipiq, sync_quick, 9, "cpumask=%08lx", unsigned long mask);

sys/kern/lwkt_ipiq.c

413

lwkt_send_ipiq3_mask(cpumask_t mask, ipifunc3_t func, void *arg1, int arg2)

sys/kern/lwkt_ipiq.c

419

CPUMASK_NANDMASK(mask, stopped_cpus);

sys/kern/lwkt_ipiq.c

426

CPUMASK_ANDMASK(amask, mask);

sys/kern/lwkt_ipiq.c

438

CPUMASK_ANDMASK(amask, mask);

sys/kern/lwkt_ipiq.c

550

cpumask_t mask;

sys/kern/lwkt_ipiq.c

555

mask = gd->gd_ipimask;

sys/kern/lwkt_ipiq.c

557

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/lwkt_ipiq.c

558

n = BSFCPUMASK(mask);

sys/kern/lwkt_ipiq.c

576

CPUMASK_NANDBIT(mask, n);

sys/kern/lwkt_ipiq.c

602

cpumask_t mask;

sys/kern/lwkt_ipiq.c

607

mask = gd->gd_ipimask;

sys/kern/lwkt_ipiq.c

609

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/lwkt_ipiq.c

610

n = BSFCPUMASK(mask);

sys/kern/lwkt_ipiq.c

628

CPUMASK_NANDBIT(mask, n);

sys/kern/lwkt_ipiq.c

657

cpumask_t mask;

sys/kern/lwkt_ipiq.c

663

mask = gd->gd_ipimask;

sys/kern/lwkt_ipiq.c

665

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/lwkt_ipiq.c

666

n = BSFCPUMASK(mask);

sys/kern/lwkt_ipiq.c

683

CPUMASK_NANDBIT(mask, n);

sys/kern/lwkt_ipiq.c

833

lwkt_cpusync_simple(cpumask_t mask, cpusync_func_t func, void *arg)

sys/kern/lwkt_ipiq.c

837

lwkt_cpusync_init(&cs, mask, func, arg);

sys/kern/lwkt_ipiq.c

847

cpumask_t mask;

sys/kern/lwkt_ipiq.c

854

mask = cs->cs_mask;

sys/kern/lwkt_ipiq.c

855

CPUMASK_ANDMASK(mask, gd->gd_other_cpus);

sys/kern/lwkt_ipiq.c

856

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/lwkt_ipiq.c

860

if (CPUMASK_TESTNZERO(mask)) {

sys/kern/lwkt_ipiq.c

864

lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote1, cs);

sys/kern/lwkt_ipiq.c

865

logipiq2(sync_start, (long)CPUMASK_LOWMASK(mask));

sys/kern/lwkt_ipiq.c

866

while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {

sys/kern/lwkt_ipiq.c

887

cpumask_t mask;

sys/kern/lwkt_ipiq.c

898

mask = cs->cs_mack;

sys/kern/lwkt_ipiq.c

904

if (CPUMASK_TESTNZERO(mask)) {

sys/kern/lwkt_ipiq.c

906

while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {

sys/kern/lwkt_ipiq.c

921

logipiq2(sync_end, (long)CPUMASK_LOWMASK(mask));

sys/kern/lwkt_ipiq.c

938

cpumask_t mask;

sys/kern/lwkt_ipiq.c

943

mask = cs->cs_mask;

sys/kern/lwkt_ipiq.c

944

CPUMASK_ANDMASK(mask, gd->gd_other_cpus);

sys/kern/lwkt_ipiq.c

945

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/lwkt_ipiq.c

949

if (CPUMASK_TESTNZERO(mask)) {

sys/kern/lwkt_ipiq.c

953

lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote2, cs);

sys/kern/lwkt_ipiq.c

954

logipiq2(sync_quick, (long)CPUMASK_LOWMASK(mask));

sys/kern/lwkt_ipiq.c

955

while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {

sys/kern/subr_alist.c

308

alist_bmap_t mask;

sys/kern/subr_alist.c

322

mask = (scan->bm_bitmap >> (i * 2)) & 3;

sys/kern/subr_alist.c

323

if (mask == 0) {

sys/kern/subr_alist.c

329

if (mask == 1) {

sys/kern/subr_alist.c

335

if (mask == 2) {

sys/kern/subr_alist.c

366

mask = scan->bm_bitmap;

sys/kern/subr_alist.c

368

if ((mask & ((alist_bmap_t)1U << i)))

sys/kern/subr_alist.c

460

alist_bmap_t mask;

sys/kern/subr_alist.c

464

mask = (alist_bmap_t)-1 >> (ALIST_BMAP_RADIX/2);

sys/kern/subr_alist.c

467

if ((orig & mask) == 0) {

sys/kern/subr_alist.c

472

mask >>= j;

sys/kern/subr_alist.c

492

alist_bmap_t mask;

sys/kern/subr_alist.c

494

mask = (alist_bmap_t)-1 >> n;

sys/kern/subr_alist.c

497

if ((orig & mask) == mask) {

sys/kern/subr_alist.c

498

scan->bm_bitmap &= ~mask;

sys/kern/subr_alist.c

501

mask = mask << count;

sys/kern/subr_alist.c

525

alist_bmap_t mask;

sys/kern/subr_alist.c

556

mask = (alist_bmap_t)-1 >> (ALIST_BMAP_RADIX - n);

sys/kern/subr_alist.c

558

if ((scan->bm_bitmap & mask) == mask &&

sys/kern/subr_alist.c

560

scan->bm_bitmap &= ~mask;

sys/kern/subr_alist.c

563

mask <<= n;

sys/kern/subr_alist.c

573

mask = 0x00000003;

sys/kern/subr_alist.c

598

if ((scan->bm_bitmap & mask) == mask) {

sys/kern/subr_alist.c

603

if ((scan->bm_bitmap & mask) == 0) {

sys/kern/subr_alist.c

632

scan->bm_bitmap &= ~mask;

sys/kern/subr_alist.c

634

scan->bm_bitmap &= ~mask;

sys/kern/subr_alist.c

641

mask <<= 2;

sys/kern/subr_alist.c

669

alist_bmap_t mask;

sys/kern/subr_alist.c

671

mask = ((alist_bmap_t)-1 << n) &

sys/kern/subr_alist.c

674

if (scan->bm_bitmap & mask)

sys/kern/subr_alist.c

676

scan->bm_bitmap |= mask;

sys/kern/subr_alist.c

701

alist_bmap_t mask;

sys/kern/subr_alist.c

715

mask = 0x00000003 << (i * 2);

sys/kern/subr_alist.c

751

KKASSERT((scan->bm_bitmap & mask) == 0);

sys/kern/subr_alist.c

752

scan->bm_bitmap |= mask;

sys/kern/subr_alist.c

759

if ((scan->bm_bitmap & mask) == 0) {

sys/kern/subr_alist.c

775

scan->bm_bitmap |= mask;

sys/kern/subr_alist.c

778

scan->bm_bitmap &= ~mask;

sys/kern/subr_alist.c

787

mask <<= 2;

sys/kern/subr_alist.c

808

alist_bmap_t mask;

sys/kern/subr_alist.c

836

mask = 0x00000003;

sys/kern/subr_alist.c

878

mask <<= 2;

sys/kern/subr_alist.c

895

alist_bmap_t mask;

sys/kern/subr_alist.c

939

mask = 0x00000003;

sys/kern/subr_alist.c

959

if ((scan->bm_bitmap & mask) == mask) {

sys/kern/subr_alist.c

965

} else if ((scan->bm_bitmap & mask) == 0) {

sys/kern/subr_alist.c

982

mask <<= 2;

sys/kern/subr_blist.c

394

u_swblk_t mask;

sys/kern/subr_blist.c

398

mask = (u_swblk_t)-1 >> (BLIST_BMAP_RADIX/2);

sys/kern/subr_blist.c

401

if ((orig & mask) == 0) {

sys/kern/subr_blist.c

406

mask >>= j;

sys/kern/subr_blist.c

421

u_swblk_t mask;

sys/kern/subr_blist.c

423

mask = (u_swblk_t)-1 >> n;

sys/kern/subr_blist.c

426

if ((orig & mask) == mask) {

sys/kern/subr_blist.c

427

scan->u.bmu_bitmap &= ~mask;

sys/kern/subr_blist.c

430

mask = (mask << 1);

sys/kern/subr_blist.c

558

u_swblk_t mask;

sys/kern/subr_blist.c

560

mask = ((u_swblk_t)-1 << n) &

sys/kern/subr_blist.c

563

if (scan->u.bmu_bitmap & mask)

sys/kern/subr_blist.c

565

scan->u.bmu_bitmap |= mask;

sys/kern/subr_blist.c

700

u_swblk_t mask, bitmap;

sys/kern/subr_blist.c

702

mask = ((u_swblk_t)-1 << n) &

sys/kern/subr_blist.c

706

bitmap = scan->u.bmu_bitmap & mask;

sys/kern/subr_blist.c

710

scan->u.bmu_bitmap &= ~mask;

sys/kern/subr_cpu_topology.c

195

cpumask_t mask;

sys/kern/subr_cpu_topology.c

197

CPUMASK_ASSBIT(mask, i);

sys/kern/subr_cpu_topology.c

201

if (CPUMASK_TESTMASK(mask, smp_active_mask) == 0)

sys/kern/subr_cpu_topology.c

460

cpumask_t mask) {

sys/kern/subr_cpu_topology.c

465

if (CPUMASK_CMPMASKEQ(node->members, mask))

sys/kern/subr_cpu_topology.c

469

found = get_cpu_node_by_cpumask(node->child_node[i], mask);

sys/kern/subr_cpu_topology.c

479

cpumask_t mask;

sys/kern/subr_cpu_topology.c

481

CPUMASK_ASSBIT(mask, cpuid);

sys/kern/subr_cpu_topology.c

485

return get_cpu_node_by_cpumask(cpu_root_node, mask);

sys/kern/subr_cpu_topology.c

494

cpumask_t mask;

sys/kern/subr_cpu_topology.c

496

CPUMASK_ASSBIT(mask, cpuid);

sys/kern/subr_cpu_topology.c

500

node = get_cpu_node_by_cpumask(cpu_root_node, mask);

sys/kern/subr_cpu_topology.c

503

CPUMASK_ASSZERO(mask);

sys/kern/subr_cpu_topology.c

504

return mask;

sys/kern/subr_cpu_topology.c

513

CPUMASK_ASSZERO(mask);

sys/kern/subr_cpu_topology.c

515

return mask;

sys/kern/subr_cpu_topology.c

554

cpumask_t mask;

sys/kern/subr_cpu_topology.c

571

mask = get_cpumask_from_level(i, CHIP_LEVEL);

sys/kern/subr_cpu_topology.c

572

if (CPUMASK_TESTZERO(mask)) {

sys/kern/subr_cpu_topology.c

579

sbuf_print_cpuset(&sb, &mask);

sys/kern/subr_cpu_topology.c

591

mask = get_cpumask_from_level(i, CORE_LEVEL);

sys/kern/subr_cpu_topology.c

592

if (CPUMASK_TESTZERO(mask)) {

sys/kern/subr_cpu_topology.c

599

sbuf_print_cpuset(&sb, &mask);

sys/kern/subr_cpu_topology.c

71

static void sbuf_print_cpuset(struct sbuf *sb, cpumask_t *mask);

sys/kern/subr_cpu_topology.c

719

sbuf_print_cpuset(struct sbuf *sb, cpumask_t *mask)

sys/kern/subr_cpu_topology.c

727

CPUSET_FOREACH(i, *mask) {

sys/kern/subr_diskslice.c

105

int mask;

sys/kern/subr_diskslice.c

130

mask = (1 << shift) - 1;

sys/kern/subr_diskslice.c

131

if ((int)bp->b_bcount & mask)

sys/kern/subr_diskslice.c

133

if ((int)bio->bio_offset & mask)

sys/kern/subr_prf.c

1310

kprint_cpuset(cpumask_t *mask)

sys/kern/subr_prf.c

1318

CPUSET_FOREACH(i, *mask) {

sys/kern/sys_generic.c

590

maskcmd = com & map->mask;

sys/kern/usched_bsd4.c

1754

cpumask_t mask;

sys/kern/usched_bsd4.c

1761

mask = gd->gd_cpumask; /* doesn't change */

sys/kern/usched_bsd4.c

1781

ATOMIC_CPUMASK_ORMASK(bsd4_rdyprocmask, mask);

sys/kern/usched_bsd4.c

1786

if (CPUMASK_TESTMASK(bsd4_curprocmask, mask) == 0) {

sys/kern/usched_bsd4.c

1798

ATOMIC_CPUMASK_ORMASK(bsd4_curprocmask, mask);

sys/kern/usched_bsd4.c

1906

cpumask_t mask;

sys/kern/usched_bsd4.c

1908

CPUMASK_ASSBIT(mask, i);

sys/kern/usched_bsd4.c

1910

if (CPUMASK_TESTMASK(mask, smp_active_mask) == 0)

sys/kern/usched_bsd4.c

1978

ATOMIC_CPUMASK_NANDMASK(bsd4_curprocmask, mask);

sys/kern/usched_bsd4.c

1979

ATOMIC_CPUMASK_ORMASK(bsd4_rdyprocmask, mask);

sys/kern/usched_bsd4.c

236

pid_t pid, int cpuid, unsigned long mask);

sys/kern/usched_bsd4.c

240

pid_t pid, int cpuid, unsigned long mask);

sys/kern/usched_bsd4.c

245

pid_t pid, int cpuid, unsigned long mask, int curr);

sys/kern/usched_bsd4.c

249

pid_t pid, int cpuid, unsigned long mask, int curr);

sys/kern/usched_bsd4.c

253

pid_t pid, int cpuid, unsigned long mask, int curr);

sys/kern/usched_bsd4.c

257

pid_t pid, int cpuid, unsigned long mask, int found_cpuid, int curr);

sys/kern/usched_bsd4.c

265

pid_t pid, int cpuid, unsigned long mask, int found_cpuid, int curr);

sys/kern/usched_bsd4.c

579

cpumask_t mask;

sys/kern/usched_bsd4.c

584

mask = bsd4_curprocmask;

sys/kern/usched_bsd4.c

585

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/usched_bsd4.c

586

CPUMASK_ANDMASK(mask, usched_global_cpumask);

sys/kern/usched_bsd4.c

588

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/usched_bsd4.c

589

cpu = BSFCPUMASK(mask);

sys/kern/usched_bsd4.c

597

(unsigned long)CPUMASK_LOWMASK(mask));

sys/kern/usched_bsd4.c

601

CPUMASK_NANDBIT(mask, cpu);

sys/kern/usched_bsd4.c

608

(unsigned long)CPUMASK_LOWMASK(mask));

sys/kern/usched_bsd4.c

630

cpumask_t mask;

sys/kern/usched_bsd4.c

700

mask = bsd4_rdyprocmask;

sys/kern/usched_bsd4.c

701

CPUMASK_NANDMASK(mask, bsd4_curprocmask);

sys/kern/usched_bsd4.c

702

CPUMASK_ANDMASK(mask, lp->lwp_cpumask);

sys/kern/usched_bsd4.c

703

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/usched_bsd4.c

704

CPUMASK_ANDMASK(mask, usched_global_cpumask);

sys/kern/usched_bsd4.c

710

(unsigned long)CPUMASK_LOWMASK(mask),

sys/kern/usched_bsd4.c

713

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/usched_bsd4.c

715

if (CPUMASK_TESTMASK(tmpmask, mask)) {

sys/kern/usched_bsd4.c

716

CPUMASK_ANDMASK(tmpmask, mask);

sys/kern/usched_bsd4.c

719

cpuid = BSFCPUMASK(mask);

sys/kern/usched_bsd4.c

727

CPUMASK_ANDMASK(tmpmask, mask);

sys/kern/usched_bsd4.c

733

(unsigned long)CPUMASK_LOWMASK(mask),

sys/kern/usched_bsd4.c

752

CPUMASK_NANDBIT(mask, cpuid);

sys/kern/usched_bsd4.c

764

(unsigned long)CPUMASK_LOWMASK(mask),

sys/kern/usched_bsd4.c

773

mask = bsd4_rdyprocmask;

sys/kern/usched_bsd4.c

774

CPUMASK_NANDMASK(mask, bsd4_curprocmask);

sys/kern/usched_bsd4.c

775

CPUMASK_ANDMASK(mask, lp->lwp_cpumask);

sys/kern/usched_bsd4.c

776

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/usched_bsd4.c

777

CPUMASK_ANDMASK(mask, usched_global_cpumask);

sys/kern/usched_bsd4.c

783

(unsigned long)CPUMASK_LOWMASK(mask),

sys/kern/usched_bsd4.c

786

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/usched_bsd4.c

788

if (CPUMASK_TESTMASK(tmpmask, mask)) {

sys/kern/usched_bsd4.c

789

CPUMASK_ANDMASK(tmpmask, mask);

sys/kern/usched_bsd4.c

792

cpuid = BSFCPUMASK(mask);

sys/kern/usched_bsd4.c

803

(unsigned long)CPUMASK_LOWMASK(mask),

sys/kern/usched_bsd4.c

809

CPUMASK_NANDBIT(mask, cpuid);

sys/kern/usched_bsd4.c

816

mask = bsd4_curprocmask;

sys/kern/usched_bsd4.c

817

CPUMASK_ANDMASK(mask, bsd4_rdyprocmask);

sys/kern/usched_bsd4.c

818

CPUMASK_ANDMASK(mask, lp->lwp_cpumask);

sys/kern/usched_bsd4.c

819

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/usched_bsd4.c

820

CPUMASK_ANDMASK(mask, usched_global_cpumask);

sys/kern/usched_bsd4.c

826

(unsigned long)CPUMASK_LOWMASK(mask),

sys/kern/usched_bsd4.c

829

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/usched_bsd4.c

831

if (CPUMASK_TESTMASK(tmpmask, mask)) {

sys/kern/usched_bsd4.c

832

CPUMASK_ANDMASK(tmpmask, mask);

sys/kern/usched_bsd4.c

835

cpuid = BSFCPUMASK(mask);

sys/kern/usched_bsd4.c

845

(unsigned long)CPUMASK_LOWMASK(mask),

sys/kern/usched_bsd4.c

851

CPUMASK_NANDBIT(mask, cpuid);

sys/kern/usched_dfly.c

1597

cpumask_t mask;

sys/kern/usched_dfly.c

1670

mask = cpun->members;

sys/kern/usched_dfly.c

1671

CPUMASK_ANDMASK(mask, usched_global_cpumask);

sys/kern/usched_dfly.c

1672

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/usched_dfly.c

1673

CPUMASK_ANDMASK(mask, lp->lwp_cpumask);

sys/kern/usched_dfly.c

1674

if (CPUMASK_TESTZERO(mask))

sys/kern/usched_dfly.c

1682

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/usched_dfly.c

1683

cpuid = BSFCPUMASK(mask);

sys/kern/usched_dfly.c

1725

CPUMASK_NANDBIT(mask, cpuid);

sys/kern/usched_dfly.c

1893

cpumask_t mask;

sys/kern/usched_dfly.c

1951

mask = cpun->members;

sys/kern/usched_dfly.c

1952

CPUMASK_ANDMASK(mask, usched_global_cpumask);

sys/kern/usched_dfly.c

1953

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/usched_dfly.c

1954

if (CPUMASK_TESTZERO(mask))

sys/kern/usched_dfly.c

1961

while (CPUMASK_TESTNZERO(mask)) {

sys/kern/usched_dfly.c

1962

cpuid = BSFCPUMASK(mask);

sys/kern/usched_dfly.c

1982

CPUMASK_NANDBIT(mask, cpuid);

sys/kern/usched_dfly.c

2065

cpumask_t mask;

sys/kern/usched_dfly.c

2078

mask = dfly_rdyprocmask;

sys/kern/usched_dfly.c

2079

CPUMASK_NANDMASK(mask, dfly_curprocmask);

sys/kern/usched_dfly.c

2080

CPUMASK_ANDMASK(mask, lp->lwp_cpumask);

sys/kern/usched_dfly.c

2081

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/usched_dfly.c

2082

CPUMASK_ANDMASK(mask, usched_global_cpumask);

sys/kern/usched_dfly.c

2087

CPUMASK_ANDMASK(tmpmask, mask);

sys/kern/usched_dfly.c

2098

CPUMASK_ANDMASK(tmpmask, mask);

sys/kern/usched_dfly.c

2111

mask = dfly_rdyprocmask;

sys/kern/usched_dfly.c

2112

CPUMASK_ANDMASK(mask, dfly_curprocmask);

sys/kern/usched_dfly.c

2113

CPUMASK_ANDMASK(mask, lp->lwp_cpumask);

sys/kern/usched_dfly.c

2114

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/kern/usched_dfly.c

2115

CPUMASK_ANDMASK(mask, usched_global_cpumask);

sys/kern/usched_dfly.c

2119

CPUMASK_ANDMASK(tmpmask, mask);

sys/kern/usched_dfly.c

2130

CPUMASK_ANDMASK(tmpmask, mask);

sys/kern/usched_dfly.c

2349

cpumask_t mask;

sys/kern/usched_dfly.c

2355

mask = gd->gd_cpumask; /* doesn't change */

sys/kern/usched_dfly.c

2383

ATOMIC_CPUMASK_ORMASK(dfly_rdyprocmask, mask);

sys/kern/usched_dfly.c

2400

ATOMIC_CPUMASK_ORMASK(dfly_curprocmask, mask);

sys/kern/usched_dfly.c

2450

ATOMIC_CPUMASK_ORMASK(dfly_curprocmask, mask);

sys/kern/usched_dfly.c

2535

cpumask_t mask;

sys/kern/usched_dfly.c

2537

CPUMASK_ASSBIT(mask, i);

sys/kern/usched_dfly.c

2538

if (CPUMASK_TESTMASK(mask, smp_active_mask) == 0)

sys/kern/usched_dfly.c

2618

ATOMIC_CPUMASK_NANDMASK(dfly_curprocmask, mask);

sys/kern/usched_dfly.c

2622

ATOMIC_CPUMASK_ORMASK(dfly_rdyprocmask, mask);

sys/kern/usched_dummy.c

277

cpumask_t mask;

sys/kern/usched_dummy.c

306

mask = dummy_rdyprocmask;

sys/kern/usched_dummy.c

307

CPUMASK_NANDMASK(mask, dummy_curprocmask);

sys/kern/usched_dummy.c

308

CPUMASK_ANDMASK(mask, gd->gd_other_cpus);

sys/kern/usched_dummy.c

309

if (CPUMASK_TESTNZERO(mask)) {

sys/kern/usched_dummy.c

310

cpuid = BSFCPUMASK(mask);

sys/kern/usched_dummy.c

531

cpumask_t mask;

sys/kern/usched_dummy.c

533

CPUMASK_ASSBIT(mask, i);

sys/kern/usched_dummy.c

535

if (CPUMASK_TESTMASK(mask, smp_active_mask) == 0)

sys/kern/usched_dummy.c

549

ATOMIC_CPUMASK_NANDMASK(dummy_curprocmask, mask);

sys/kern/usched_dummy.c

550

ATOMIC_CPUMASK_ORMASK(dummy_rdyprocmask, mask);

sys/kern/vfs_bio.c

4199

int i, mask = 0;

sys/kern/vfs_bio.c

4208

mask = (1 << (bp->b_bufsize / DEV_BSIZE)) - 1;

sys/kern/vfs_bio.c

4209

if ((bp->b_xio.xio_pages[0]->valid & mask) == mask) {

sys/kern/vfs_bio.c

4213

if ((bp->b_xio.xio_pages[0]->valid & mask) == 0) {

sys/kern/vfs_bio.c

4215

bp->b_xio.xio_pages[0]->valid |= mask;

sys/kern/vfs_bio.c

4227

mask = ((1 << ((ea - sa) / DEV_BSIZE)) - 1) << j;

sys/kern/vfs_bio.c

4228

if ((bp->b_xio.xio_pages[i]->valid & mask) == mask)

sys/kern/vfs_bio.c

4230

if ((bp->b_xio.xio_pages[i]->valid & mask) == 0) {

sys/kern/vfs_bio.c

4240

bp->b_xio.xio_pages[i]->valid |= mask;

sys/kern/vfs_helper.c

123

mask = 0;

sys/kern/vfs_helper.c

128

mask |= S_IXUSR;

sys/kern/vfs_helper.c

130

mask |= S_IRUSR;

sys/kern/vfs_helper.c

132

mask |= S_IWUSR;

sys/kern/vfs_helper.c

133

return ((ino_mode & mask) == mask ? 0 : EACCES);

sys/kern/vfs_helper.c

143

mask |= S_IXGRP;

sys/kern/vfs_helper.c

145

mask |= S_IRGRP;

sys/kern/vfs_helper.c

147

mask |= S_IWGRP;

sys/kern/vfs_helper.c

148

return ((ino_mode & mask) == mask ? 0 : EACCES);

sys/kern/vfs_helper.c

153

mask |= S_IXGRP;

sys/kern/vfs_helper.c

155

mask |= S_IRGRP;

sys/kern/vfs_helper.c

157

mask |= S_IWGRP;

sys/kern/vfs_helper.c

158

return ((ino_mode & mask) == mask ? 0 : EACCES);

sys/kern/vfs_helper.c

163

mask |= S_IXOTH;

sys/kern/vfs_helper.c

165

mask |= S_IROTH;

sys/kern/vfs_helper.c

167

mask |= S_IWOTH;

sys/kern/vfs_helper.c

168

return ((ino_mode & mask) == mask ? 0 : EACCES);

sys/kern/vfs_helper.c

82

mode_t mask, mode = ap->a_mode;

sys/kern/vfs_jops.c

309

jo->fifo.mask = jo->fifo.size - 1;

sys/kern/vfs_journal.c

203

rawp = (void *)(jo->fifo.membase + (jo->fifo.rindex & jo->fifo.mask));

sys/kern/vfs_journal.c

235

avail = jo->fifo.size - (jo->fifo.rindex & jo->fifo.mask);

sys/kern/vfs_journal.c

264

((jo->fifo.rindex - bytes) & jo->fifo.mask),

sys/kern/vfs_journal.c

370

rawp = (void *)(jo->fifo.membase + (jo->fifo.xindex & jo->fifo.mask));

sys/kern/vfs_journal.c

527

availtoend = jo->fifo.size - (jo->fifo.windex & jo->fifo.mask);

sys/kern/vfs_journal.c

564

rawp = (void *)(jo->fifo.membase + (jo->fifo.windex & jo->fifo.mask));

sys/kern/vfs_journal.c

643

if ((jo->fifo.windex & jo->fifo.mask) == wbase + osize) {

sys/kern/vfs_journal.c

688

(jo->fifo.windex & jo->fifo.mask) ==

sys/kern/vfs_journal.c

749

} else if ((jo->fifo.windex & jo->fifo.mask) == (char *)rawp - jo->fifo.membase + osize) {

sys/kern/vfs_subr.c

1724

mode_t mask;

sys/kern/vfs_subr.c

1738

mask = 0;

sys/kern/vfs_subr.c

1743

mask |= S_IXUSR;

sys/kern/vfs_subr.c

1745

mask |= S_IRUSR;

sys/kern/vfs_subr.c

1747

mask |= S_IWUSR;

sys/kern/vfs_subr.c

1748

return ((file_mode & mask) == mask ? 0 : EACCES);

sys/kern/vfs_subr.c

1755

mask |= S_IXGRP;

sys/kern/vfs_subr.c

1757

mask |= S_IRGRP;

sys/kern/vfs_subr.c

1759

mask |= S_IWGRP;

sys/kern/vfs_subr.c

1760

return ((file_mode & mask) == mask ? 0 : EACCES);

sys/kern/vfs_subr.c

1765

mask |= S_IXOTH;

sys/kern/vfs_subr.c

1767

mask |= S_IROTH;

sys/kern/vfs_subr.c

1769

mask |= S_IWOTH;

sys/kern/vfs_subr.c

1770

return ((file_mode & mask) == mask ? 0 : EACCES);

sys/libkern/ffs.c

39

ffs(int mask)

sys/libkern/ffs.c

43

if (mask == 0)

sys/libkern/ffs.c

45

for (bit = 1; !(mask & 1); bit++)

sys/libkern/ffs.c

46

mask >>= 1;

sys/libkern/ffsl.c

38

ffsl(long mask)

sys/libkern/ffsl.c

42

if (mask == 0)

sys/libkern/ffsl.c

44

for (bit = 1; !(mask & 1); bit++)

sys/libkern/ffsl.c

45

mask = (unsigned long)mask >> 1;

sys/libkern/flsl.c

38

flsl(long mask)

sys/libkern/flsl.c

42

if (mask == 0)

sys/libkern/flsl.c

44

for (bit = 1; mask != 1; bit++)

sys/libkern/flsl.c

45

mask = (unsigned long)mask >> 1;

sys/libkern/flsll.c

38

flsll(long long mask)

sys/libkern/flsll.c

42

if (mask == 0)

sys/libkern/flsll.c

44

for (bit = 1; mask != 1; bit++)

sys/libkern/flsll.c

45

mask = (unsigned long long)mask >> 1;

sys/libkern/scanc.c

41

u_char mask;

sys/libkern/scanc.c

43

mask = mask0;

sys/libkern/scanc.c

45

if (table[*cp] & mask)

sys/libkern/skpc.c

40

u_char *cp, *end, mask;

sys/libkern/skpc.c

42

mask = mask0;

sys/libkern/skpc.c

44

for (end = &cp[size]; cp < end && *cp == mask; ++cp);

sys/net/if_loop.c

358

int error = 0, mask;

sys/net/if_loop.c

401

mask = ifr->ifr_reqcap ^ ifp->if_capenable;

sys/net/if_loop.c

402

if (mask & IFCAP_HWCSUM) {

sys/net/if_loop.c

403

ifp->if_capenable ^= (mask & IFCAP_HWCSUM);

sys/net/if_loop.c

409

if (mask & IFCAP_RSS)

sys/net/if_media.c

393

ifmedia_match(struct ifmedia *ifm, int target, int mask)

sys/net/if_media.c

398

mask = ~mask;

sys/net/if_media.c

401

if ((next->ifm_media & mask) == (target & mask)) {

sys/net/if_media.c

405

"0x%x/0x%x\n", target, mask);

sys/net/if_media.c

67

int flags, int mask);

sys/net/ipfw/ip_fw2.c

3088

cmd->mask.s_addr = INADDR_ANY;

sys/net/ipfw/ip_fw2.c

3090

cmd->mask = ((struct sockaddr_in *)

sys/net/ipfw/ip_fw2.c

3093

if (cmd->mask.s_addr == INADDR_ANY)

sys/net/ipfw/ip_fw2.c

3094

cmd->mask.s_addr = INADDR_BROADCAST;

sys/net/ipfw/ip_fw2.c

3098

cmd->addr.s_addr &= cmd->mask.s_addr;

sys/net/ipfw/ip_fw2.c

3106

return ((ip->s_addr & cmd->mask.s_addr) == cmd->addr.s_addr);

sys/net/ipfw/ip_fw2.c

3690

uint32_t *mask = (uint32_t *)

sys/net/ipfw/ip_fw2.c

3691

((ipfw_insn_mac *)cmd)->mask;

sys/net/ipfw/ip_fw2.c

3695

(want[0] == (hdr[0] & mask[0]) &&

sys/net/ipfw/ip_fw2.c

3696

want[1] == (hdr[1] & mask[1]) &&

sys/net/ipfw/ip_fw2.c

3697

want[2] == (hdr[2] & mask[2]));

sys/net/ipfw/ip_fw2.c

3761

((ipfw_insn_ip *)cmd)->mask.s_addr));

sys/net/ipfw/ip_fw2.c

3812

((ipfw_insn_ip *)cmd)->mask.s_addr));

sys/net/ipfw/ip_fw2.c

5448

if (((ipfw_insn_ip *)cmd)->mask.s_addr == 0) {

sys/net/ipfw/ip_fw2.h

207

struct in_addr mask;

sys/net/ipfw/ip_fw2.h

224

u_char mask[12]; /* dst[6] + src[6] */

sys/net/ipfw/ip_fw2.h

283

struct in_addr mask;

sys/net/ipfw3/ip_fw3.h

168

struct in_addr mask;

sys/net/ipfw3/ip_fw3.h

185

u_char mask[12]; /* dst[6] + src[6] */

sys/net/ipfw3_basic/ip_fw3_basic.c

367

((ipfw_insn_ip *)cmd)->mask.s_addr));

sys/net/ipfw3_basic/ip_fw3_basic.c

460

((ipfw_insn_ip *)cmd)->mask.s_addr));

sys/net/ipfw3_basic/ip_fw3_table.c

100

rn_inithead(&table_ctx->mask, NULL, 0);

sys/net/ipfw3_basic/ip_fw3_table.c

101

rn_inithead(&table_ctx->node, table_ctx->mask,

sys/net/ipfw3_basic/ip_fw3_table.c

104

rn_inithead(&table_ctx->mask, NULL, 0);

sys/net/ipfw3_basic/ip_fw3_table.c

105

rn_inithead(&table_ctx->node, table_ctx->mask,

sys/net/ipfw3_basic/ip_fw3_table.c

163

ent->mask.sin_len = sizeof(ent->mask);

sys/net/ipfw3_basic/ip_fw3_table.c

164

ent->mask.sin_addr.s_addr = htonl(~((1 << (32 - mlen)) - 1));

sys/net/ipfw3_basic/ip_fw3_table.c

166

ent->mask.sin_addr.s_addr;

sys/net/ipfw3_basic/ip_fw3_table.c

168

if (rnh->rnh_addaddr(&ent->addr, &ent->mask, rnh, ent->rn)

sys/net/ipfw3_basic/ip_fw3_table.c

199

struct sockaddr_in sa, mask;

sys/net/ipfw3_basic/ip_fw3_table.c

214

sa.sin_len = mask.sin_len = 8;

sys/net/ipfw3_basic/ip_fw3_table.c

215

mask.sin_addr.s_addr = htonl(mlen ? ~((1 << (32 - mlen)) - 1) : 0);

sys/net/ipfw3_basic/ip_fw3_table.c

216

sa.sin_addr.s_addr = addr & mask.sin_addr.s_addr;

sys/net/ipfw3_basic/ip_fw3_table.c

218

ent = (struct table_entry *)rnh->rnh_deladdr(&sa, &mask, rnh);

sys/net/ipfw3_basic/ip_fw3_table.c

337

struct sockaddr_in *addr, *mask;

sys/net/ipfw3_basic/ip_fw3_table.c

340

mask = &ent->mask;

sys/net/ipfw3_basic/ip_fw3_table.c

343

if (in_nullhost(mask->sin_addr))

sys/net/ipfw3_basic/ip_fw3_table.c

346

ioc_ent->masklen = 33 - ffs(ntohl(mask->sin_addr.s_addr));

sys/net/ipfw3_basic/ip_fw3_table.h

64

struct radix_node_head *mask;

sys/net/ipfw3_basic/ip_fw3_table.h

73

struct sockaddr_in mask;

sys/net/ipfw3_basic/ip_fw3_table.h

79

struct sockaddr mask;

sys/net/ipfw3_layer2/ip_fw3_layer2.c

101

(want[3] == (hdr[3] & mask[3]) &&

sys/net/ipfw3_layer2/ip_fw3_layer2.c

102

want[4] == (hdr[4] & mask[4]) &&

sys/net/ipfw3_layer2/ip_fw3_layer2.c

103

want[5] == (hdr[5] & mask[5]));

sys/net/ipfw3_layer2/ip_fw3_layer2.c

141

uint16_t *mask = (uint16_t *)((ipfw_insn_mac *)cmd)->mask;

sys/net/ipfw3_layer2/ip_fw3_layer2.c

144

(want[0] == (hdr[0] & mask[0]) &&

sys/net/ipfw3_layer2/ip_fw3_layer2.c

145

want[1] == (hdr[1] & mask[1]) &&

sys/net/ipfw3_layer2/ip_fw3_layer2.c

146

want[2] == (hdr[2] & mask[2]));

sys/net/ipfw3_layer2/ip_fw3_layer2.c

80

uint32_t *mask = (uint32_t *)((ipfw_insn_mac *)cmd)->mask;

sys/net/ipfw3_layer2/ip_fw3_layer2.c

83

(want[0] == (hdr[0] & mask[0]) &&

sys/net/ipfw3_layer2/ip_fw3_layer2.c

84

want[1] == (hdr[1] & mask[1]) &&

sys/net/ipfw3_layer2/ip_fw3_layer2.c

85

want[2] == (hdr[2] & mask[2]));

sys/net/ipfw3_layer2/ip_fw3_layer2.c

98

uint16_t *mask = (uint16_t *)((ipfw_insn_mac *)cmd)->mask;

sys/net/lagg/ieee8023ad_lacp.h

269

#define LACP_STATE_EQ(s1, s2, mask) \

sys/net/lagg/ieee8023ad_lacp.h

270

((((s1) ^ (s2)) & (mask)) == 0)

sys/net/netmap/netmap_mem2.c

282

uint32_t mask, j; /* slot counter */

sys/net/netmap/netmap_mem2.c

306

for (j = 0, mask = 1; (cur & mask) == 0; j++, mask <<= 1)

sys/net/netmap/netmap_mem2.c

309

p->bitmap[i] &= ~mask; /* mark object as in use */

sys/net/pf/pf.c

1865

if (PF_ANEQ(&aw1->v.a.mask, &aw2->v.a.mask, AF_INET6))

sys/net/pf/pf.c

2713

rmask = &cur->addr.v.a.mask;

sys/net/pf/pf.c

2769

rmask = &cur->addr.v.a.mask;

sys/net/pf/pf.c

2870

rmask = &cur->addr.v.a.mask;

sys/net/pf/pf.c

3252

&r->rpool.cur->addr.v.a.mask,

sys/net/pf/pf.c

3288

&r->src.addr.v.a.mask, daddr,

sys/net/pf/pf.c

3300

&r->rpool.cur->addr.v.a.mask, daddr,

sys/net/pf/pf_if.c

417

dyn->pfid_net = pfi_unmask(&aw->v.a.mask);

sys/net/pf/pf_ioctl.c

1652

&psk->psk_src.addr.v.a.mask,

sys/net/pf/pf_ioctl.c

1656

&psk->psk_dst.addr.v.a.mask,

sys/net/pf/pf_ioctl.c

2969

&psnk->psnk_src.addr.v.a.mask,

sys/net/pf/pf_ioctl.c

2973

&psnk->psnk_dst.addr.v.a.mask,

sys/net/pf/pf_ioctl.c

815

PF_MD5_UPD(pfr, addr.v.a.mask.addr32);

sys/net/pf/pf_table.c

1001

pfr_prepare_network(&mask, ke->pfrke_af, ke->pfrke_net);

sys/net/pf/pf_table.c

1002

rn = rn_delete(&ke->pfrke_sa, &mask, head);

sys/net/pf/pf_table.c

2123

union sockaddr_union mask;

sys/net/pf/pf_table.c

2194

pfr_prepare_network(&mask, AF_INET, ke2->pfrke_net);

sys/net/pf/pf_table.c

2195

PF_POOLMASK(addr, addr, SUNION2PF(&mask, af), &pfr_ffaddr, af);

sys/net/pf/pf_table.c

768

union sockaddr_union sa, mask;

sys/net/pf/pf_table.c

781

pfr_prepare_network(&mask, ad->pfra_af, ad->pfra_net);

sys/net/pf/pf_table.c

782

ke = (struct pfr_kentry *)rn_lookup(&sa, &mask, head);

sys/net/pf/pf_table.c

969

union sockaddr_union mask;

sys/net/pf/pf_table.c

980

pfr_prepare_network(&mask, ke->pfrke_af, ke->pfrke_net);

sys/net/pf/pf_table.c

981

rn = rn_addroute(&ke->pfrke_sa, &mask, head, ke->pfrke_node);

sys/net/pf/pf_table.c

991

union sockaddr_union mask;

sys/net/pf/pfvar.h

184

struct pf_addr mask;

sys/net/pf/pfvar.h

401

&(aw)->v.a.mask, (x), (af))) || \

sys/net/pf/pfvar.h

403

!PF_AZERO(&(aw)->v.a.mask, (af)) && \

sys/net/pf/pfvar.h

405

&(aw)->v.a.mask, (x), (af))))) != \

sys/net/radix.c

1080

const u_char *addr, *mask;

sys/net/radix.c

1085

mask = _mask;

sys/net/radix.c

1098

if (!(rn->rn_bmask & mask[rn->rn_offset])) {

sys/net/radix.c

1166

rn_walktree_at(struct radix_node_head *h, const void *addr, const void *mask,

sys/net/radix.c

1184

if (mask != NULL)

sys/net/radix.c

1185

rn = rn_search_m(addr, mask, rn);

sys/net/radix.c

179

const u_char *key, *mask;

sys/net/radix.c

182

mask = _mask;

sys/net/radix.c

185

if ((x->rn_bmask & mask[x->rn_offset]) &&

sys/net/radix.c

245

const u_char *key, *mask, *netmask;

sys/net/radix.c

248

mask = _mask;

sys/net/radix.c

251

if (mask != NULL) {

sys/net/radix.c

252

x = rn_addmask(mask, true, head->rnh_treetop->rn_offset,

sys/net/radix.c

551

const u_char *mask, *cp, *cplim;

sys/net/radix.c

556

mask = _mask;

sys/net/radix.c

557

if ((mlen = clen(mask)) > RN_MAXKEYLEN)

sys/net/radix.c

567

bcopy(mask + skip, addmask_key + skip, mlen - skip);

sys/net/radix.c

592

mask = p = (u_char *)(x + 2);

sys/net/radix.c

594

x = rn_insert(mask, maskhead, &maskduplicated, x);

sys/net/radix.c

611

cplim = mask + mlen;

sys/net/radix.c

612

for (cp = mask + skip; cp < cplim; cp++) {

sys/net/radix.c

627

bit += (cp - mask) << 3;

sys/net/radix.c

701

rn_addroute(const void *key, const void *mask,

sys/net/radix.c

721

if (mask != NULL) {

sys/net/radix.c

722

if ((x = rn_addmask(mask, false, top->rn_offset,

sys/net/radix.c

727

mask = x->rn_key;

sys/net/radix.c

750

if (tt->rn_mask == mask)

sys/net/radix.c

752

if (mask == NULL /* host route */ ||

sys/net/radix.c

755

|| rn_refines(mask, tt->rn_mask)

sys/net/radix.c

756

|| rn_lexobetter(mask, tt->rn_mask))))

sys/net/radix.c

793

if (mask != NULL) {

sys/net/radix.c

794

tt->rn_mask = mask;

sys/net/radix.c

830

if (mask == NULL || bit > t->rn_bit)

sys/net/radix.c

861

if (mmask == mask) {

sys/net/radix.c

866

if (rn_refines(mask, mmask) || rn_lexobetter(mask, mmask))

sys/net/radix.c

874

rn_delete(const void *key, const void *mask, struct radix_node_head *head)

sys/net/radix.c

895

if (mask != NULL) {

sys/net/radix.c

896

if ((x = rn_addmask(mask, true, head_off,

sys/net/radix.c

899

mask = x->rn_key;

sys/net/radix.c

900

while (tt->rn_mask != mask) {

sys/net/radix.h

124

(const void *key, const void *mask,

sys/net/radix.h

129

(const void *key, const void *mask,

sys/net/radix.h

138

(const void *key, const void *mask,

sys/net/radix.h

148

const void *mask, walktree_f_t *f, void *w);

sys/net/radix.h

173

(const void *v, const void *mask,

sys/net/radix.h

176

(const void *v, const void *mask,

sys/net/radix.h

182

const void *mask, walktree_f_t *f, void *w);

sys/net/radix.h

216

struct radix_node *rn_addmask(const void *mask, bool search, int skip,

sys/net/radix.h

218

struct radix_node *rn_addroute(const void *key, const void *mask,

sys/net/radix.h

221

struct radix_node *rn_delete(const void *key, const void *mask,

sys/net/radix.h

223

struct radix_node *rn_lookup(const void *key, const void *mask,

sys/net/route.c

1762

rtmask_add_global(struct sockaddr *mask, boolean_t req_prio)

sys/net/route.c

1771

msg.lmsg.u.ms_resultp = mask;

sys/net/route.c

1777

_rtmask_lookup(struct sockaddr *mask, boolean_t search)

sys/net/route.c

1782

n = rn_addmask(mask, search, true, rn_cpumaskhead(mycpuid));

sys/net/route.c

1784

mask->sa_len >= clen(n->rn_key) &&

sys/net/route.c

1785

bcmp((const u_char *)mask + 1,

sys/net/route.c

1797

struct sockaddr *mask = msg->lmsg.u.ms_resultp;

sys/net/route.c

1801

if (rtmask_lookup(mask) == NULL) {

sys/net/rtsock.c

1092

const struct sockaddr *mask, const struct sockaddr *dst)

sys/net/rtsock.c

1096

memcpy(sa, mask, mask->sa_len ? mask->sa_len : dst->sa_len);

sys/net/sppp/if_spppsubr.c

2574

u_long mask;

sys/net/sppp/if_spppsubr.c

2626

for (i = 0, mask = 1; i < IDX_COUNT; i++, mask <<= 1)

sys/net/sppp/if_spppsubr.c

2627

if ((sp->lcp.protos & mask) && ((cps[i])->flags & CP_LCP) == 0)

sys/net/sppp/if_spppsubr.c

2644

u_long mask;

sys/net/sppp/if_spppsubr.c

2658

for (i = 0, mask = 1; i < IDX_COUNT; i++, mask <<= 1)

sys/net/sppp/if_spppsubr.c

2659

if ((sp->lcp.protos & mask) && ((cps[i])->flags & CP_LCP) == 0) {

sys/net/sppp/if_spppsubr.c

2745

int i, mask;

sys/net/sppp/if_spppsubr.c

2747

for (i = 0, mask = 1; i < IDX_COUNT; i++, mask <<= 1)

sys/net/sppp/if_spppsubr.c

2748

if ((sp->lcp.protos & mask) && (cps[i])->flags & CP_NCP)

sys/net/sppp/if_spppsubr.c

5130

u_long mask;

sys/net/sppp/if_spppsubr.c

5144

for (i = 0, mask = 1; i < IDX_COUNT; i++, mask <<= 1)

sys/net/sppp/if_spppsubr.c

5145

if ((sp->lcp.protos & mask) && ((cps[i])->flags & CP_NCP))

sys/net/wg/if_wg.c

2684

int ret, mask;

sys/net/wg/if_wg.c

2724

mask = ifp->if_capenable ^ ifr->ifr_reqcap;

sys/net/wg/if_wg.c

2725

if (mask & IFCAP_RXCSUM)

sys/net/wg/selftest/allowedips.c

115

horrible_cidr_to_mask(uint8_t cidr, struct aip_addr *mask)

sys/net/wg/selftest/allowedips.c

119

memset(&mask->in6, 0x00, sizeof(mask->in6));

sys/net/wg/selftest/allowedips.c

120

memset(&mask->in6, 0xff, cidr / 8);

sys/net/wg/selftest/allowedips.c

122

mask->ip6[cidr / 32] =

sys/net/wg/selftest/allowedips.c

127

horrible_mask_to_cidr(const struct aip_addr *mask)

sys/net/wg/selftest/allowedips.c

129

return (bitcount32(mask->ip6[0]) +

sys/net/wg/selftest/allowedips.c

130

bitcount32(mask->ip6[1]) +

sys/net/wg/selftest/allowedips.c

131

bitcount32(mask->ip6[2]) +

sys/net/wg/selftest/allowedips.c

132

bitcount32(mask->ip6[3]));

sys/net/wg/selftest/allowedips.c

141

node->ip.ip &= node->mask.ip;

sys/net/wg/selftest/allowedips.c

143

node->ip.ip6[0] &= node->mask.ip6[0];

sys/net/wg/selftest/allowedips.c

144

node->ip.ip6[1] &= node->mask.ip6[1];

sys/net/wg/selftest/allowedips.c

145

node->ip.ip6[2] &= node->mask.ip6[2];

sys/net/wg/selftest/allowedips.c

146

node->ip.ip6[3] &= node->mask.ip6[3];

sys/net/wg/selftest/allowedips.c

154

return ((ip->s_addr & node->mask.ip) == node->ip.ip);

sys/net/wg/selftest/allowedips.c

162

((ip->__u6_addr.__u6_addr32[n] & node->mask.ip6[n]) \

sys/net/wg/selftest/allowedips.c

181

my_cidr = horrible_mask_to_cidr(&node->mask);

sys/net/wg/selftest/allowedips.c

184

if (!memcmp(&other->mask, &node->mask,

sys/net/wg/selftest/allowedips.c

195

if (horrible_mask_to_cidr(&other->mask) <= my_cidr)

sys/net/wg/selftest/allowedips.c

218

horrible_cidr_to_mask(cidr, &node->mask);

sys/net/wg/selftest/allowedips.c

239

horrible_cidr_to_mask(cidr, &node->mask);

sys/net/wg/selftest/allowedips.c

92

struct aip_addr mask;

sys/netbt/hci.h

2249

uint32_t mask[8]; /* 256 bits */

sys/netbt/hci.h

2258

filter->mask[off] |= (1 << ((bit - 1) & 0x1f));

sys/netbt/hci.h

2267

filter->mask[off] &= ~(1 << ((bit - 1) & 0x1f));

sys/netbt/hci.h

2276

return (filter->mask[off] & (1 << ((bit - 1) & 0x1f)));

sys/netbt/hci_socket.c

102

uint8_t mask; /* bit 0 - 7 */

sys/netbt/hci_socket.c

403

|| (unit->hci_cmds[hci_cmds[i].offs] & hci_cmds[i].mask))

sys/netbt/rfcomm_session.c

1215

uint16_t mask;

sys/netbt/rfcomm_session.c

1238

mask = 0;

sys/netbt/rfcomm_session.c

1241

mask |= RFCOMM_RPN_PM_RATE;

sys/netbt/rfcomm_session.c

1245

mask |= RFCOMM_RPN_PM_DATA;

sys/netbt/rfcomm_session.c

1249

mask |= RFCOMM_RPN_PM_STOP;

sys/netbt/rfcomm_session.c

1253

mask |= RFCOMM_RPN_PM_PARITY;

sys/netbt/rfcomm_session.c

1257

mask |= RFCOMM_RPN_PM_XON;

sys/netbt/rfcomm_session.c

1261

mask |= RFCOMM_RPN_PM_XOFF;

sys/netbt/rfcomm_session.c

1265

mask |= RFCOMM_RPN_PM_FLOW;

sys/netbt/rfcomm_session.c

1267

rpn.param_mask = htole16(mask);

sys/netgraph/bridge/ng_bridge.c

774

#define HASH(addr,mask) ( (((const u_int16_t *)(addr))[0] \

sys/netgraph/bridge/ng_bridge.c

776

^ ((const u_int16_t *)(addr))[2]) & (mask) )

sys/netgraph/fec/ng_fec.c

889

int port = 0, mask;

sys/netgraph/fec/ng_fec.c

896

mask = b->fec_ifcnt == 2 ? 0x1 : 0x3;

sys/netgraph/fec/ng_fec.c

926

eh->ether_shost[5]) & mask;

sys/netgraph/fec/ng_fec.c

931

ntohl(ip->ip_src.s_addr)) & mask;

sys/netgraph/fec/ng_fec.c

936

ip6->ip6_src.s6_addr[15]) & mask;

sys/netgraph/frame_relay/ng_frame_relay.c

104

u_char mask;

sys/netgraph/frame_relay/ng_frame_relay.c

118

(((byte) & (segment)->mask) >> (segment)->shift); \

sys/netgraph/frame_relay/ng_frame_relay.c

123

(byte) |= (((dlci) << (segment)->shift) & (segment)->mask); \

sys/netgraph7/bridge/ng_bridge.c

815

#define HASH(addr,mask) ( (((const u_int16_t *)(addr))[0] \

sys/netgraph7/bridge/ng_bridge.c

817

^ ((const u_int16_t *)(addr))[2]) & (mask) )

sys/netgraph7/frame_relay/ng_frame_relay.c

104

u_char mask;

sys/netgraph7/frame_relay/ng_frame_relay.c

118

(((byte) & (segment)->mask) >> (segment)->shift); \

sys/netgraph7/frame_relay/ng_frame_relay.c

123

(byte) |= (((dlci) << (segment)->shift) & (segment)->mask); \

sys/netgraph7/ng_fec.c

1010

int port = 0, mask;

sys/netgraph7/ng_fec.c

1017

mask = b->fec_ifcnt == 2 ? 0x1 : 0x3;

sys/netgraph7/ng_fec.c

1047

eh->ether_shost[5]) & mask;

sys/netgraph7/ng_fec.c

1052

ntohl(ip->ip_src.s_addr)) & mask;

sys/netgraph7/ng_fec.c

1057

ip6->ip6_dst.s6_addr[15]) & mask;

sys/netgraph7/ng_nat.c

367

ng_nat_translate_flags(mode->mask)) < 0) {

sys/netgraph7/ng_nat.h

39

uint32_t mask;

sys/netgraph7/ng_sppp.c

114

unsigned char mask;

sys/netgraph7/ng_sppp.c

136

mask = ng_sppp_units[index];

sys/netgraph7/ng_sppp.c

137

for (bit = 0; (mask & 1) != 0; bit++)

sys/netgraph7/ng_sppp.c

138

mask >>= 1;

sys/netinet/in.c

1116

struct in_addr prefix, mask;

sys/netinet/in.c

1136

mask = target->ia_sockmask.sin_addr;

sys/netinet/in.c

1141

prefix.s_addr &= mask.s_addr;

sys/netinet/in.c

1172

mask.s_addr != ia->ia_sockmask.sin_addr.s_addr)

sys/netinet/in.c

1200

struct in_addr prefix, mask;

sys/netinet/in.c

1251

mask = target->ia_sockmask.sin_addr;

sys/netinet/in.c

1256

prefix.s_addr &= mask.s_addr;

sys/netinet/in.c

161

in_mask2len(struct in_addr *mask)

sys/netinet/in.c

166

p = (u_char *)mask;

sys/netinet/in.c

167

for (x = 0; x < sizeof *mask; x++) {

sys/netinet/in.c

172

if (x < sizeof *mask) {

sys/netinet/in.c

182

in_len2mask(struct in_addr *mask, int len)

sys/netinet/in.c

187

p = (u_char *)mask;

sys/netinet/in.c

188

bzero(mask, sizeof *mask);

sys/netinet/in.c

875

struct in_addr mask, candidate, match;

sys/netinet/in.c

879

bzero(&mask, sizeof mask);

sys/netinet/in.c

882

in_len2mask(&mask, iflr->prefixlen);

sys/netinet/in.c

886

match.s_addr &= mask.s_addr;

sys/netinet/in.c

900

in_len2mask(&mask, 32);

sys/netinet/in.c

917

candidate.s_addr &= mask.s_addr;

sys/netinet/in_pcb.h

315

#define INP_PCBCONNHASH(faddr, fport, laddr, lport, mask) \

sys/netinet/in_pcb.h

316

(((faddr) ^ ((faddr) >> 16) ^ (laddr) ^ ntohs((lport) ^ (fport))) & (mask))

sys/netinet/in_pcb.h

320

#define INP_PCBWILDCARDHASH(lport, mask) (ntohs(lport) & (mask))

sys/netinet/in_pcb.h

322

#define INP_PCBLOCALGRPHASH(lport, mask) (ntohs(lport) & (mask))

sys/netinet/in_rmx.c

161

ret = rn_addroute(key, mask, head, nodes);

sys/netinet/in_rmx.c

180

ret = rn_addroute(key, mask, head, nodes);

sys/netinet/in_rmx.c

446

cpumask_t mask;

sys/netinet/in_rmx.c

449

CPUMASK_ASSBMASK(mask, netisr_ncpus);

sys/netinet/in_rmx.c

450

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/netinet/in_rmx.c

455

CPUMASK_NANDBIT(mask, cpu);

sys/netinet/in_rmx.c

461

if (!CPUMASK_TESTBIT(mask, cpu))

sys/netinet/in_rmx.c

466

CPUMASK_NANDBIT(mask, cpu);

sys/netinet/in_rmx.c

472

if (CPUMASK_TESTNZERO(mask))

sys/netinet/in_rmx.c

473

lwkt_send_ipiq_mask(mask, in_rtqdrain_ipi, NULL);

sys/netinet/in_rmx.c

92

in_addroute(const void *key, const void *mask, struct radix_node_head *head,

sys/netinet/ip_carp.c

2529

int mask;

sys/netinet/ip_carp.c

2531

mask = reqcap ^ ifp->if_capenable;

sys/netinet/ip_carp.c

2532

if (mask & IFCAP_TXCSUM) {

sys/netinet/ip_carp.c

2543

if (mask & IFCAP_TSO) {

sys/netinet/ip_input.c

1480

cpumask_t mask;

sys/netinet/ip_input.c

1483

CPUMASK_ASSBMASK(mask, netisr_ncpus);

sys/netinet/ip_input.c

1484

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/netinet/ip_input.c

1488

CPUMASK_NANDBIT(mask, mycpuid);

sys/netinet/ip_input.c

1494

if (!CPUMASK_TESTBIT(mask, cpu))

sys/netinet/ip_input.c

1499

CPUMASK_NANDBIT(mask, cpu);

sys/netinet/ip_input.c

1505

if (CPUMASK_TESTNZERO(mask))

sys/netinet/ip_input.c

1506

lwkt_send_ipiq_mask(mask, ipfrag_drain_ipi, NULL);

sys/netinet/tcp_subr.c

1150

cpumask_t mask;

sys/netinet/tcp_subr.c

1159

CPUMASK_ASSBMASK(mask, netisr_ncpus);

sys/netinet/tcp_subr.c

1160

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/netinet/tcp_subr.c

1165

CPUMASK_NANDBIT(mask, cpu);

sys/netinet/tcp_subr.c

1174

if (!CPUMASK_TESTBIT(mask, cpu))

sys/netinet/tcp_subr.c

1179

CPUMASK_NANDBIT(mask, cpu);

sys/netinet/tcp_subr.c

1185

if (CPUMASK_TESTNZERO(mask))

sys/netinet/tcp_subr.c

1186

lwkt_send_ipiq_mask(mask, tcp_drain_ipi, NULL);

sys/netinet/tcp_syncache.c

194

#define SYNCACHE_HASH(inc, mask) \

sys/netinet/tcp_syncache.c

198

(inc)->inc_fport ^ (inc)->inc_lport) & mask)

sys/netinet/tcp_syncache.c

200

#define SYNCACHE_HASH6(inc, mask) \

sys/netinet/tcp_syncache.c

204

(inc)->inc_fport ^ (inc)->inc_lport) & mask)

sys/netinet6/in6.c

1496

struct in6_addr mask, candidate, match;

sys/netinet6/in6.c

1500

bzero(&mask, sizeof(mask));

sys/netinet6/in6.c

1503

in6_prefixlen2mask(&mask, iflr->prefixlen);

sys/netinet6/in6.c

1507

match.s6_addr32[0] &= mask.s6_addr32[0];

sys/netinet6/in6.c

1508

match.s6_addr32[1] &= mask.s6_addr32[1];

sys/netinet6/in6.c

1509

match.s6_addr32[2] &= mask.s6_addr32[2];

sys/netinet6/in6.c

1510

match.s6_addr32[3] &= mask.s6_addr32[3];

sys/netinet6/in6.c

1523

in6_prefixlen2mask(&mask, 128);

sys/netinet6/in6.c

1547

candidate.s6_addr32[0] &= mask.s6_addr32[0];

sys/netinet6/in6.c

1548

candidate.s6_addr32[1] &= mask.s6_addr32[1];

sys/netinet6/in6.c

1549

candidate.s6_addr32[2] &= mask.s6_addr32[2];

sys/netinet6/in6.c

1550

candidate.s6_addr32[3] &= mask.s6_addr32[3];

sys/netinet6/in6.c

329

in6_mask2len(const struct in6_addr *mask, const u_char *lim0)

sys/netinet6/in6.c

335

lim0 - (const u_char *)mask > sizeof(*mask)) {

sys/netinet6/in6.c

337

lim = (const u_char *)mask + sizeof(*mask);

sys/netinet6/in6.c

339

for (p = (const u_char *)mask; p < lim; x++, p++) {

sys/netinet6/in6_rmx.c

125

in6_addroute(const void *key, const void *mask, struct radix_node_head *head,

sys/netinet6/in6_rmx.c

168

ret = rn_addroute(key, mask, head, nodes);

sys/netinet6/in6_rmx.c

187

ret = rn_addroute(key, mask, head, nodes);

sys/netinet6/nd6_rtr.c

1521

struct in6_addr mask;

sys/netinet6/nd6_rtr.c

1524

in6_prefixlen2mask(&mask, prefixlen);

sys/netinet6/nd6_rtr.c

1586

ifra.ifra_addr.sin6_addr.s6_addr32[0] &= mask.s6_addr32[0];

sys/netinet6/nd6_rtr.c

1587

ifra.ifra_addr.sin6_addr.s6_addr32[1] &= mask.s6_addr32[1];

sys/netinet6/nd6_rtr.c

1588

ifra.ifra_addr.sin6_addr.s6_addr32[2] &= mask.s6_addr32[2];

sys/netinet6/nd6_rtr.c

1589

ifra.ifra_addr.sin6_addr.s6_addr32[3] &= mask.s6_addr32[3];

sys/netinet6/nd6_rtr.c

1595

(ifid->s6_addr32[0] & ~mask.s6_addr32[0]);

sys/netinet6/nd6_rtr.c

1597

(ifid->s6_addr32[1] & ~mask.s6_addr32[1]);

sys/netinet6/nd6_rtr.c

1599

(ifid->s6_addr32[2] & ~mask.s6_addr32[2]);

sys/netinet6/nd6_rtr.c

1601

(ifid->s6_addr32[3] & ~mask.s6_addr32[3]);

sys/netinet6/nd6_rtr.c

1606

bcopy(&mask, &ifra.ifra_prefixmask.sin6_addr,

sys/netinet6/nd6_rtr.c

453

struct sockaddr_in6 def, mask, gate;

sys/netinet6/nd6_rtr.c

456

bzero(&mask, sizeof(mask));

sys/netinet6/nd6_rtr.c

459

def.sin6_len = mask.sin6_len = gate.sin6_len =

sys/netinet6/nd6_rtr.c

461

def.sin6_family = mask.sin6_family = gate.sin6_family = AF_INET6;

sys/netinet6/nd6_rtr.c

465

(struct sockaddr *)&gate, (struct sockaddr *)&mask, RTF_GATEWAY);

sys/netinet6/nd6_rtr.c

473

struct sockaddr_in6 def, mask;

sys/netinet6/nd6_rtr.c

478

bzero(&mask, sizeof(mask));

sys/netinet6/nd6_rtr.c

480

def.sin6_len = mask.sin6_len = sizeof(struct sockaddr_in6);

sys/netinet6/nd6_rtr.c

481

def.sin6_family = mask.sin6_family = AF_INET6;

sys/netinet6/nd6_rtr.c

497

ifa->ifa_addr, (struct sockaddr *)&mask, flags);

sys/netinet6/nd6_rtr.c

523

struct sockaddr_in6 def, mask, gate;

sys/netinet6/nd6_rtr.c

526

bzero(&mask, sizeof(mask));

sys/netinet6/nd6_rtr.c

529

def.sin6_len = mask.sin6_len = gate.sin6_len =

sys/netinet6/nd6_rtr.c

531

def.sin6_family = mask.sin6_family = gate.sin6_family = AF_INET6;

sys/netinet6/nd6_rtr.c

535

(struct sockaddr *)&gate, (struct sockaddr *)&mask, RTF_GATEWAY);

sys/netproto/802_11/wlan/ieee80211_ioctl.c

1289

int mask;

sys/netproto/802_11/wlan/ieee80211_ioctl.c

1316

IEEE80211_NOTE_MAC(vap, ops[op].mask, mac,

sys/netproto/802_11/wlan/ieee80211_ioctl.c

1319

IEEE80211_NOTE_MAC(vap, ops[op].mask, mac,

sys/platform/pc64/apic/ioapic_abi.c

1316

int i, msi_base = -1, intr_next = -1, mask;

sys/platform/pc64/apic/ioapic_abi.c

1323

mask = count - 1;

sys/platform/pc64/apic/ioapic_abi.c

1324

KASSERT((count & mask) == 0, ("count %d is not power of 2", count));

sys/platform/pc64/apic/ioapic_abi.c

1342

KASSERT((map->im_msi_base & mask) == 0,

sys/platform/pc64/icu/icu.c

161

uint8_t mask;

sys/platform/pc64/icu/icu.c

170

mask = ~(1 << irq);

sys/platform/pc64/icu/icu.c

180

outb(IO_ICU1 + 1, mask);

sys/platform/pc64/icu/icu_abi.c

519

int i, msi_base = -1, intr_next = -1, mask;

sys/platform/pc64/icu/icu_abi.c

526

mask = count - 1;

sys/platform/pc64/icu/icu_abi.c

527

KASSERT((count & mask) == 0, ("count %d is not power of 2", count));

sys/platform/pc64/icu/icu_abi.c

545

KASSERT((map->im_msi_base & mask) == 0,

sys/platform/pc64/include/pmap_inval.h

68

void smp_smurf_idleinvlclr(cpumask_t *mask);

sys/platform/pc64/x86_64/db_trace.c

485

unsigned int mask;

sys/platform/pc64/x86_64/db_trace.c

488

for (i = 0, mask = 0x3; i < 4; i++, mask <<= 2)

sys/platform/pc64/x86_64/db_trace.c

489

if ((d->dr[7] & mask) == 0)

sys/platform/pc64/x86_64/db_trace.c

513

mask = 0x00;

sys/platform/pc64/x86_64/db_trace.c

516

mask = 0x01 << 2;

sys/platform/pc64/x86_64/db_trace.c

519

mask = 0x03 << 2;

sys/platform/pc64/x86_64/db_trace.c

522

mask = 0x02 << 2;

sys/platform/pc64/x86_64/db_trace.c

528

mask |= access;

sys/platform/pc64/x86_64/db_trace.c

537

d->dr[7] |= (0x2 << (watchnum * 2)) | (mask << (watchnum * 4 + 16));

sys/platform/pc64/x86_64/machdep.c

2165

uint32_t mask;

sys/platform/pc64/x86_64/machdep.c

2168

mask = efifb->fb_mask_red | efifb->fb_mask_green |

sys/platform/pc64/x86_64/machdep.c

2170

if (mask == 0)

sys/platform/pc64/x86_64/machdep.c

2172

for (depth = 1; mask != 1; depth++)

sys/platform/pc64/x86_64/machdep.c

2173

mask >>= 1;

sys/platform/pc64/x86_64/machdep.c

744

sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)

sys/platform/pc64/x86_64/machdep.c

759

sf.sf_uc.uc_sigmask = *mask;

sys/platform/pc64/x86_64/mp_machdep.c

1016

CPUMASK_ASSZERO(mask);

sys/platform/pc64/x86_64/mp_machdep.c

1017

while (CPUMASK_CMPMASKNEQ(smp_invltlb_mask, mask)) {

sys/platform/pc64/x86_64/mp_machdep.c

1072

cpumask_t mask;

sys/platform/pc64/x86_64/mp_machdep.c

1084

mask = smp_active_mask;

sys/platform/pc64/x86_64/mp_machdep.c

1085

CPUMASK_ANDMASK(mask, *cmdmask);

sys/platform/pc64/x86_64/mp_machdep.c

1086

CPUMASK_ORMASK(mask, md->mi.gd_cpumask);

sys/platform/pc64/x86_64/mp_machdep.c

1095

smp_smurf_fetchset(&mask);

sys/platform/pc64/x86_64/mp_machdep.c

1105

CPUMASK_CMPMASKEQ(smp_startup_mask, mask))) {

sys/platform/pc64/x86_64/mp_machdep.c

1108

CPUMASK_NANDMASK(mask, md->mi.gd_cpumask);

sys/platform/pc64/x86_64/mp_machdep.c

1109

selected_apic_ipi(mask, XINVLTLB_OFFSET, APIC_DELMODE_FIXED);

sys/platform/pc64/x86_64/mp_machdep.c

1365

cpumask_t mask;

sys/platform/pc64/x86_64/mp_machdep.c

1373

mask = stopped_cpus;

sys/platform/pc64/x86_64/mp_machdep.c

1374

CPUMASK_ANDMASK(mask, map);

sys/platform/pc64/x86_64/mp_machdep.c

1376

} while (CPUMASK_CMPMASKNEQ(mask, map));

sys/platform/pc64/x86_64/mp_machdep.c

1398

cpumask_t mask;

sys/platform/pc64/x86_64/mp_machdep.c

1401

mask = map;

sys/platform/pc64/x86_64/mp_machdep.c

1402

CPUMASK_ANDMASK(mask, smp_active_mask);

sys/platform/pc64/x86_64/mp_machdep.c

1404

started_cpus = mask;

sys/platform/pc64/x86_64/mp_machdep.c

1929

cpumask_t mask;

sys/platform/pc64/x86_64/mp_machdep.c

1936

CPUMASK_ASSALLONES(mask);

sys/platform/pc64/x86_64/mp_machdep.c

1937

lwkt_cpusync_simple(mask, amd_get_compute_unit_id, NULL);

sys/platform/pc64/x86_64/mp_machdep.c

891

smp_smurf_fetchset(cpumask_t *mask)

sys/platform/pc64/x86_64/mp_machdep.c

902

nbits = obits | mask->ary[i];

sys/platform/pc64/x86_64/mp_machdep.c

908

CPUMASK_NANDMASK(*mask, omask);

sys/platform/pc64/x86_64/mp_machdep.c

922

smp_smurf_idleinvlclr(cpumask_t *mask)

sys/platform/pc64/x86_64/mp_machdep.c

925

ATOMIC_CPUMASK_ORMASK(smp_idleinvl_reqs, *mask);

sys/platform/pc64/x86_64/mp_machdep.c

927

CPUMASK_NANDMASK(*mask, smp_idleinvl_mask);

sys/platform/pc64/x86_64/mp_machdep.c

942

cpumask_t mask;

sys/platform/pc64/x86_64/mp_machdep.c

966

mask = smp_active_mask;

sys/platform/pc64/x86_64/mp_machdep.c

967

CPUMASK_NANDBIT(mask, md->mi.gd_cpuid);

sys/platform/pc64/x86_64/mp_machdep.c

968

smp_smurf_idleinvlclr(&mask);

sys/platform/pc64/x86_64/mp_machdep.c

972

ATOMIC_CPUMASK_ORMASK(smp_invltlb_mask, mask);

sys/platform/pc64/x86_64/mp_machdep.c

986

smp_smurf_fetchset(&mask);

sys/platform/pc64/x86_64/mp_machdep.c

992

CPUMASK_ORMASK(mask, md->mi.gd_cpumask);

sys/platform/pc64/x86_64/mp_machdep.c

995

CPUMASK_CMPMASKEQ(smp_startup_mask, mask))) {

sys/platform/pc64/x86_64/mp_machdep.c

998

CPUMASK_NANDMASK(mask, md->mi.gd_cpumask);

sys/platform/pc64/x86_64/mp_machdep.c

999

selected_apic_ipi(mask, XINVLTLB_OFFSET, APIC_DELMODE_FIXED);

sys/platform/pc64/x86_64/mptable.c

781

cpumask_t mask;

sys/platform/pc64/x86_64/mptable.c

783

CPUMASK_ASSZERO(mask);

sys/platform/pc64/x86_64/mptable.c

784

mask.ary[0] = arg1.ht_apicid_mask;

sys/platform/pc64/x86_64/mptable.c

785

logical_cpus = mptable_hyperthread_fixup(mask, arg1.cpu_count);

sys/platform/pc64/x86_64/npx.c

100

low = mask;

sys/platform/pc64/x86_64/npx.c

101

high = mask >> 32;

sys/platform/pc64/x86_64/npx.c

320

fpusave(union savefpu *addr, uint64_t mask)

sys/platform/pc64/x86_64/npx.c

324

xsave(addr, mask);

sys/platform/pc64/x86_64/npx.c

499

fpurstor(union savefpu *addr, uint64_t mask)

sys/platform/pc64/x86_64/npx.c

503

xrstor(addr, mask);

sys/platform/pc64/x86_64/npx.c

81

xrstor(const void *addr, uint64_t mask)

sys/platform/pc64/x86_64/npx.c

86

low = mask;

sys/platform/pc64/x86_64/npx.c

87

high = mask >> 32;

sys/platform/pc64/x86_64/npx.c

95

xsave(void *addr, uint64_t mask)

sys/platform/pc64/x86_64/pmap.c

800

uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT +

sys/platform/pc64/x86_64/pmap.c

803

return (PDmap + ((va >> PDRSHIFT) & mask));

sys/platform/pc64/x86_64/pmap.c

813

uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT +

sys/platform/pc64/x86_64/pmap.c

816

return (PTmap + ((va >> PAGE_SHIFT) & mask));

sys/platform/pc64/x86_64/pmap.c

826

uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT +

sys/platform/pc64/x86_64/pmap.c

835

pte = kreadmem64(PTmap + ((va >> PAGE_SHIFT) & mask));

sys/platform/pc64/x86_64/pmap_inval.c

208

info->mask.ary[0],

sys/platform/pc64/x86_64/pmap_inval.c

238

tmp = info->mask;

sys/platform/pc64/x86_64/pmap_inval.c

240

if (CPUMASK_CMPMASKNEQ(tmp, info->mask)) {

sys/platform/pc64/x86_64/pmap_inval.c

242

file, line, info->sigmask.ary[0], info->mask.ary[0]);

sys/platform/pc64/x86_64/pmap_inval.c

390

info->mask = tmpmask;

sys/platform/pc64/x86_64/pmap_inval.c

530

info->mask = tmpmask;

sys/platform/pc64/x86_64/pmap_inval.c

704

cpu, n, info->done.ary[0], info->mask.ary[0],

sys/platform/pc64/x86_64/pmap_inval.c

729

if (CPUMASK_TESTBIT(info->mask, cpu)) {

sys/platform/pc64/x86_64/pmap_inval.c

734

ATOMIC_CPUMASK_NANDBIT(info->mask, cpu);

sys/platform/pc64/x86_64/pmap_inval.c

737

CPUMASK_TESTBIT(info->mask, n)) {

sys/platform/pc64/x86_64/pmap_inval.c

768

} else if (CPUMASK_TESTBIT(info->mask, cpu)) {

sys/platform/pc64/x86_64/pmap_inval.c

772

if (CPUMASK_CMPMASKNEQ(info->mask, gd->gd_cpumask)) {

sys/platform/pc64/x86_64/pmap_inval.c

791

info->mask);

sys/platform/pc64/x86_64/pmap_inval.c

811

ATOMIC_CPUMASK_NANDBIT(info->mask, cpu);

sys/platform/pc64/x86_64/pmap_inval.c

821

ATOMIC_CPUMASK_NANDBIT(info->mask, cpu);

sys/platform/pc64/x86_64/pmap_inval.c

92

cpumask_t mask;

sys/platform/vkernel64/platform/init.c

1180

netif_init_tap(int tap_unit, in_addr_t *addr, in_addr_t *mask, int s)

sys/platform/vkernel64/platform/init.c

1187

*mask = 0;

sys/platform/vkernel64/platform/init.c

1282

*mask = netmask;

sys/platform/vkernel64/platform/init.c

971

netif_set_tapaddr(int tap_unit, in_addr_t addr, in_addr_t mask, int s)

sys/platform/vkernel64/platform/init.c

985

if (mask != 0) {

sys/platform/vkernel64/platform/init.c

989

in->sin_addr.s_addr = mask;

sys/platform/vkernel64/x86_64/cpu_regs.c

155

sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)

sys/platform/vkernel64/x86_64/cpu_regs.c

171

sf.sf_uc.uc_sigmask = *mask;

sys/platform/vkernel64/x86_64/db_trace.c

478

unsigned int mask;

sys/platform/vkernel64/x86_64/db_trace.c

481

for (i = 0, mask = 0x3; i < 4; i++, mask <<= 2)

sys/platform/vkernel64/x86_64/db_trace.c

482

if ((d->dr[7] & mask) == 0)

sys/platform/vkernel64/x86_64/db_trace.c

506

mask = 0x00;

sys/platform/vkernel64/x86_64/db_trace.c

509

mask = 0x01 << 2;

sys/platform/vkernel64/x86_64/db_trace.c

512

mask = 0x03 << 2;

sys/platform/vkernel64/x86_64/db_trace.c

515

mask = 0x02 << 2;

sys/platform/vkernel64/x86_64/db_trace.c

521

mask |= access;

sys/platform/vkernel64/x86_64/db_trace.c

530

d->dr[7] |= (0x2 << (watchnum * 2)) | (mask << (watchnum * 4 + 16));

sys/platform/vkernel64/x86_64/npx.c

261

fpusave(union savefpu *addr, uint64_t mask __unused)

sys/platform/vkernel64/x86_64/npx.c

387

fpurstor(union savefpu *addr, uint64_t mask __unused)

sys/sys/boot.h

39

int mask;

sys/sys/cpu_topology.h

63

#define CPUSET_FOREACH(cpu, mask) \

sys/sys/cpu_topology.h

65

if (CPUMASK_TESTBIT(mask, cpu))

sys/sys/device.h

315

u_int mask;

sys/sys/fbio.h

183

caddr_t mask; /* cursor mask bits */

sys/sys/jail.h

92

#define PRISON_CAP_ISSET(mask, bit) (mask & (1LU << bit))

sys/sys/kern_syscall.h

91

int kern_sigsuspend(sigset_t *mask);

sys/sys/ktrace.h

161

sigset_t mask;

sys/sys/mapped_ioctl.h

76

u_long mask;

sys/sys/mountctl.h

156

int mask; /* index mask (size - 1) */

sys/sys/signal2.h

108

tmp = *mask; /* check maskable signals */

sys/sys/signal2.h

123

if (trapsig && SIGISMEMBER(*mask, trapsig)) {

sys/sys/signal2.h

124

SIGSETAND(*mask, sigcantmask_mask);

sys/sys/signal2.h

125

SIGADDSET(*mask, trapsig);

sys/sys/signal2.h

127

SIGSETAND(*mask, sigcantmask_mask);

sys/sys/signal2.h

96

__sig_condblockallsigs(sigset_t *mask, struct lwp *lp)

sys/sys/sysproto.h

1402

const cpumask_t * mask; char mask_[PAD_(const cpumask_t *)];

sys/sys/sysproto.h

1407

cpumask_t * mask; char mask_[PAD_(cpumask_t *)];

sys/sys/sysproto.h

1411

const cpumask_t * mask; char mask_[PAD_(const cpumask_t *)];

sys/sys/sysproto.h

987

int mask; char mask_[PAD_(int)];

sys/sys/systm.h

234

void kprint_cpuset(cpumask_t *mask);

sys/sys/thread2.h

296

lwkt_cpusync_init(lwkt_cpusync_t cs, cpumask_t mask,

sys/sys/thread2.h

299

cs->cs_mask = mask;

sys/sys/thread2.h

325

lwkt_send_ipiq_mask(cpumask_t mask, ipifunc1_t func, void *arg)

sys/sys/thread2.h

327

return(lwkt_send_ipiq3_mask(mask, (ipifunc3_t)func, arg, 0));

sys/sys/thread2.h

331

lwkt_send_ipiq2_mask(cpumask_t mask, ipifunc2_t func, void *arg1, int arg2)

sys/sys/thread2.h

333

return(lwkt_send_ipiq3_mask(mask, (ipifunc3_t)func, arg1, arg2));

sys/sys/varsym.h

58

varsym_t varsymfind(int mask, const char *name, int namelen);

sys/vfs/ext2fs/ext2_vfsops.c

299

uint32_t i, mask;

sys/vfs/ext2fs/ext2_vfsops.c

307

mask = le32toh(es->e2fs_features_incompat) & ~(EXT2F_INCOMPAT_SUPP);

sys/vfs/ext2fs/ext2_vfsops.c

308

if (mask) {

sys/vfs/ext2fs/ext2_vfsops.c

314

if (mask & incompat[i].mask)

sys/vfs/ext2fs/ext2_vfsops.c

319

mask = le32toh(es->e2fs_features_rocompat) & ~EXT2F_ROCOMPAT_SUPP;

sys/vfs/ext2fs/ext2_vfsops.c

320

if (!ronly && mask) {

sys/vfs/ext2fs/ext2_vfsops.c

326

if (mask & ro_compat[i].mask)

sys/vfs/ext2fs/ext2fs.h

260

int mask;

sys/vfs/ext2fs/ext2fs.h

347

#define EXT2_HAS_COMPAT_FEATURE(sb,mask) \

sys/vfs/ext2fs/ext2fs.h

348

( le32toh(EXT2_SB(sb)->e2fs->e2fs_features_compat) & mask)

sys/vfs/ext2fs/ext2fs.h

349

#define EXT2_HAS_RO_COMPAT_FEATURE(sb,mask) \

sys/vfs/ext2fs/ext2fs.h

350

( le32toh(EXT2_SB(sb)->e2fs->e2fs_features_rocompat) & mask)

sys/vfs/ext2fs/ext2fs.h

351

#define EXT2_HAS_INCOMPAT_FEATURE(sb,mask) \

sys/vfs/ext2fs/ext2fs.h

352

( le32toh(EXT2_SB(sb)->e2fs->e2fs_features_incompat) & mask)

sys/vfs/fuse/fuse_abi.h

608

uint32_t mask;

sys/vfs/fuse/fuse_vnops.c

102

uint32_t mask;

sys/vfs/fuse/fuse_vnops.c

127

mask = F_OK;

sys/vfs/fuse/fuse_vnops.c

129

mask |= X_OK;

sys/vfs/fuse/fuse_vnops.c

131

mask |= W_OK;

sys/vfs/fuse/fuse_vnops.c

133

mask |= R_OK;

sys/vfs/fuse/fuse_vnops.c

137

fai->mask = mask;

sys/vfs/hammer2/hammer2.h

1299

uint64_t mask;

sys/vfs/hammer2/hammer2.h

1306

mask = (uint64_t)-1;

sys/vfs/hammer2/hammer2.h

1308

mask = ((uint64_t)1 << (bbeg + bits)) - 1;

sys/vfs/hammer2/hammer2.h

1310

mask &= ~(((uint64_t)1 << bbeg) - 1);

sys/vfs/hammer2/hammer2.h

1312

return mask;

sys/vfs/hammer2/hammer2.h

1760

void hammer2_xop_retire(hammer2_xop_head_t *xop, uint64_t mask);

sys/vfs/hammer2/hammer2_admin.c

1046

uint32_t mask;

sys/vfs/hammer2/hammer2_admin.c

1050

mask = 1U << (hv & 31);

sys/vfs/hammer2/hammer2_admin.c

1053

return ((int)(hash[hv & XOP_HASH_MASK] & mask));

sys/vfs/hammer2/hammer2_admin.c

1060

uint32_t mask;

sys/vfs/hammer2/hammer2_admin.c

1064

mask = 1U << (hv & 31);

sys/vfs/hammer2/hammer2_admin.c

1067

hash[hv & XOP_HASH_MASK] |= mask;

sys/vfs/hammer2/hammer2_admin.c

1152

uint64_t mask;

sys/vfs/hammer2/hammer2_admin.c

1156

mask = 1LLU << thr->clindex;

sys/vfs/hammer2/hammer2_admin.c

1224

hammer2_xop_retire(xop, mask);

sys/vfs/hammer2/hammer2_admin.c

1229

hammer2_xop_retire(xop, mask);

sys/vfs/hammer2/hammer2_admin.c

1256

hammer2_xop_retire(xop, mask);

sys/vfs/hammer2/hammer2_admin.c

596

hammer2_xop_retire(hammer2_xop_head_t *xop, uint64_t mask)

sys/vfs/hammer2/hammer2_admin.c

611

KKASSERT(xop->run_mask & mask);

sys/vfs/hammer2/hammer2_admin.c

613

-mask + HAMMER2_XOPMASK_FEED);

sys/vfs/hammer2/hammer2_admin.c

618

if ((nmask & HAMMER2_XOPMASK_ALLDONE) != mask) {

sys/vfs/hammer2/hammer2_admin.c

628

if (mask == HAMMER2_XOPMASK_VOP) {

sys/vfs/hammer2/hammer2_admin.c

636

nmask -= mask;

sys/vfs/hammer2/hammer2_admin.c

716

mask = xop->chk_mask;

sys/vfs/hammer2/hammer2_admin.c

717

for (i = 0; mask && i < HAMMER2_MAXCLUSTER; ++i) {

sys/vfs/hammer2/hammer2_admin.c

725

mask &= ~(1U << i);

sys/vfs/hammer2/hammer2_admin.c

797

uint64_t mask;

sys/vfs/hammer2/hammer2_admin.c

817

mask = xop->run_mask;

sys/vfs/hammer2/hammer2_admin.c

818

if ((mask & HAMMER2_XOPMASK_VOP) == 0) {

sys/vfs/hammer2/hammer2_admin.c

823

if (atomic_cmpset_64(&xop->run_mask, mask,

sys/vfs/hammer2/hammer2_admin.c

824

mask | HAMMER2_XOPMASK_FIFOW)) {

sys/vfs/hammer2/hammer2_admin.c

841

mask = atomic_fetchadd_64(&xop->run_mask, HAMMER2_XOPMASK_FEED);

sys/vfs/hammer2/hammer2_admin.c

842

if (mask & HAMMER2_XOPMASK_WAIT) {

sys/vfs/hammer2/hammer2_admin.c

893

uint64_t mask;

sys/vfs/hammer2/hammer2_admin.c

906

mask = xop->run_mask;

sys/vfs/hammer2/hammer2_admin.c

985

(mask & HAMMER2_XOPMASK_ALLDONE) != HAMMER2_XOPMASK_VOP) {

sys/vfs/hammer2/hammer2_admin.c

995

mask, mask | HAMMER2_XOPMASK_WAIT)) {

sys/vfs/hammer2/hammer2_bulkfree.c

1400

hammer2_bitmap_t mask; /* 64-bit mask to check */

sys/vfs/hammer2/hammer2_bulkfree.c

1410

mask = bmap->bitmapq[i];

sys/vfs/hammer2/hammer2_bulkfree.c

1427

if ((scan & mask) == 0) {

sys/vfs/hammer2/hammer2_io.c

690

uint64_t mask;

sys/vfs/hammer2/hammer2_io.c

699

mask = hammer2_dedup_mask(dio, bref->data_off, lsize);

sys/vfs/hammer2/hammer2_io.c

700

atomic_clear_64(&dio->dedup_valid, mask);

sys/vfs/hammer2/hammer2_io.c

701

atomic_set_64(&dio->dedup_alloc, mask);

sys/vfs/hammer2/hammer2_io.c

716

uint64_t mask;

sys/vfs/hammer2/hammer2_io.c

732

mask = hammer2_dedup_mask(dio, data_off, bytes);

sys/vfs/hammer2/hammer2_io.c

733

atomic_clear_64(&dio->dedup_alloc, mask);

sys/vfs/hammer2/hammer2_io.c

734

atomic_clear_64(&dio->dedup_valid, mask);

sys/vfs/hammer2/hammer2_strategy.c

1423

uint64_t mask;

sys/vfs/hammer2/hammer2_strategy.c

1516

mask = hammer2_dedup_mask(dio, chain->bref.data_off, chain->bytes);

sys/vfs/hammer2/hammer2_strategy.c

1517

atomic_set_64(&dio->dedup_valid, mask);

sys/vfs/hammer2/hammer2_strategy.c

1548

uint64_t mask;

sys/vfs/hammer2/hammer2_strategy.c

1583

mask = hammer2_dedup_mask(dio, off, pblksize);

sys/vfs/hammer2/hammer2_strategy.c

1584

if ((dio->dedup_alloc & mask) == mask &&

sys/vfs/hammer2/hammer2_strategy.c

1585

(dio->dedup_valid & mask) == mask &&

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

206

mask = used - 1; /* mask for comparing low */

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

258

if (len > root && (huff & mask) != low) {

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

283

low = huff & mask;

sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c

50

unsigned mask; /* mask for low root bits */

sys/vfs/hpfs/hpfs_subr.c

157

u_int32_t mask;

sys/vfs/hpfs/hpfs_subr.c

158

for (k=0, mask=1; k < 32; k++, mask<<=1)

sys/vfs/hpfs/hpfs_subr.c

159

if(((u_int32_t *)hpmp->hpm_bitmap)[i] & mask)

sys/vfs/hpfs/hpfs_subr.c

332

u_int32_t mask;

sys/vfs/hpfs/hpfs_subr.c

350

mask = 1 << k;

sys/vfs/hpfs/hpfs_subr.c

353

if (*bitmap & mask) {

sys/vfs/hpfs/hpfs_subr.c

356

for (; k < 32; k++, mask<<=1) {

sys/vfs/hpfs/hpfs_subr.c

357

if (*bitmap & mask)

sys/vfs/hpfs/hpfs_subr.c

373

for (k=0, mask=1; k < 32; k++, mask<<=1) {

sys/vfs/hpfs/hpfs_subr.c

374

if (*bitmap & mask)

sys/vfs/hpfs/hpfs_subr.c

407

for (k=0, mask=1; k < 32; k++, mask<<=1) {

sys/vfs/hpfs/hpfs_subr.c

408

if (*bitmap & mask) {

sys/vfs/msdosfs/msdosfs_vfsops.c

111

pmp->pm_mask = argp->mask & ALLPERMS;

sys/vfs/msdosfs/msdosfsmount.h

231

mode_t mask; /* file mask to be applied for msdosfs perms */

sys/vfs/nfs/nfs_vfsops.c

631

struct sockaddr_in mask, sin;

sys/vfs/nfs/nfs_vfsops.c

633

bzero((caddr_t)&mask, sizeof(mask));

sys/vfs/nfs/nfs_vfsops.c

634

sin = mask;

sys/vfs/nfs/nfs_vfsops.c

641

(struct sockaddr *)&mask,

sys/vfs/ntfs/ntfs_vnops.c

397

mode_t mask, mode = ap->a_mode;

sys/vfs/ntfs/ntfs_vnops.c

430

mask = 0;

sys/vfs/ntfs/ntfs_vnops.c

435

mask |= S_IXUSR;

sys/vfs/ntfs/ntfs_vnops.c

437

mask |= S_IRUSR;

sys/vfs/ntfs/ntfs_vnops.c

439

mask |= S_IWUSR;

sys/vfs/ntfs/ntfs_vnops.c

440

return ((ip->i_mp->ntm_mode & mask) == mask ? 0 : EACCES);

sys/vfs/ntfs/ntfs_vnops.c

447

mask |= S_IXGRP;

sys/vfs/ntfs/ntfs_vnops.c

449

mask |= S_IRGRP;

sys/vfs/ntfs/ntfs_vnops.c

451

mask |= S_IWGRP;

sys/vfs/ntfs/ntfs_vnops.c

452

return ((ip->i_mp->ntm_mode&mask) == mask ? 0 : EACCES);

sys/vfs/ntfs/ntfs_vnops.c

457

mask |= S_IXOTH;

sys/vfs/ntfs/ntfs_vnops.c

459

mask |= S_IROTH;

sys/vfs/ntfs/ntfs_vnops.c

461

mask |= S_IWOTH;

sys/vfs/ntfs/ntfs_vnops.c

462

return ((ip->i_mp->ntm_mode & mask) == mask ? 0 : EACCES);

sys/vfs/ufs/ffs_subr.c

223

unsigned char mask;

sys/vfs/ufs/ffs_subr.c

229

mask = 0x0f << ((h & 0x1) << 2);

sys/vfs/ufs/ffs_subr.c

230

return ((cp[h >> 1] & mask) == mask);

sys/vfs/ufs/ffs_subr.c

232

mask = 0x03 << ((h & 0x3) << 1);

sys/vfs/ufs/ffs_subr.c

233

return ((cp[h >> 2] & mask) == mask);

sys/vfs/ufs/ffs_subr.c

235

mask = 0x01 << (h & 0x7);

sys/vfs/ufs/ffs_subr.c

236

return ((cp[h >> 3] & mask) == mask);

sys/vm/vm_page.c

755

int mask;

sys/vm/vm_page.c

768

mask = PQ_L2_SIZE / ncpus_fit - 1;

sys/vm/vm_page.c

769

if (mask < 7) /* minimum is 8-way w/256 CPU threads */

sys/vm/vm_page.c

770

mask = 7;

sys/vm/vm_page.c

771

if (mask < 15)

sys/vm/vm_page.c

772

mask = 15;

sys/vm/vm_page.c

774

set_assoc_mask = mask;

test/interbench/interbench.c

1463

inline int bit_is_on(const unsigned int mask, int index)

test/interbench/interbench.c

1465

return (mask & (1 << index)) != 0;

test/interbench/interbench.c

1468

inline void set_bit_on(unsigned int *mask, int index)

test/interbench/interbench.c

1470

*mask |= (1 << index);

test/libpthread/mutex_d.c

1439

sigset_t mask;

test/libpthread/mutex_d.c

1450

sigfillset (&mask);

test/libpthread/mutex_d.c

1451

sigdelset (&mask, SIGINT);

test/libpthread/mutex_d.c

1452

sigprocmask (SIG_SETMASK, &mask, NULL);

test/libpthread/mutex_d.c

313

sigset_t mask;

test/libpthread/mutex_d.c

321

sigfillset (&mask);

test/libpthread/mutex_d.c

322

sigdelset (&mask, SIGINT);

test/libpthread/mutex_d.c

323

sigprocmask (SIG_BLOCK, &mask, NULL);

test/libpthread/mutex_d.c

477

sigset_t mask;

test/libpthread/mutex_d.c

482

sigfillset (&mask);

test/libpthread/mutex_d.c

483

sigdelset (&mask, SIGINT);

test/libpthread/mutex_d.c

484

sigprocmask (SIG_BLOCK, &mask, NULL);

test/libpthread/sigwait_d.c

53

sigset_t mask;

test/libpthread/sigwait_d.c

56

sigemptyset (&mask);

test/libpthread/sigwait_d.c

57

sigaddset (&mask, SIGHUP);

test/libpthread/sigwait_d.c

58

sigprocmask (SIG_BLOCK, &mask, NULL);

test/nvmm/demo/toyvirt/main.c

170

cpuid.mask = 1;

test/nvmm/demo/toyvirt/main.c

172

cpuid.u.mask.del.edx = CPUID_8_01_EDX_XD;

test/sysperf/cmp.c

17

int mask;

test/sysperf/cmp.c

29

foo.mask = SOME_MASK;

test/sysperf/cmp.c

48

if (foo.mask & SOME_MASK)

tools/regression/lib/libc-regex/testregex.c

1003

sigprocmask(op, &mask, NiL);

tools/regression/lib/libc-regex/testregex.c

994

sigset_t mask;

tools/regression/lib/libc-regex/testregex.c

996

sigemptyset(&mask);

tools/regression/lib/libc-regex/testregex.c

999

sigaddset(&mask, s);

tools/regression/lib/libm/test-rem.c

160

assert(q == (abs(expected_quo) & mask(q)));

tools/regression/lib/libm/test-rem.c

182

assert(q == (abs(expected_quo) & mask(q)));

tools/regression/lib/libm/test-rem.c

204

assert((q & mask(q)) == (abs(expected_quo) & mask(q)));

tools/tools/ath/athprom/athprom.c

469

uint32_t mask;

tools/tools/ath/athprom/athprom.c

473

mask = pExpnPower->xpdMask;

tools/tools/ath/athprom/athprom.c

475

mask = pRaw->xpd_mask;

tools/tools/ath/athprom/athprom.c

476

for (i = 0; mask != 0; mask >>= 1, i++)

tools/tools/ath/athprom/athprom.c

477

if ((mask & 1) && l-- == 0)

tools/tools/ath/athrd/athrd.c

1666

HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)

tools/tools/ath/athrd/athrd.c

1668

if (ath_hal_debug & mask) {

tools/tools/netrate/kq_sendrecv/kq_recvserv/kq_recvserv.c

251

cpuset_t mask;

tools/tools/netrate/kq_sendrecv/kq_recvserv/kq_recvserv.c

253

cpu_set_t mask;

tools/tools/netrate/kq_sendrecv/kq_recvserv/kq_recvserv.c

277

CPU_ZERO(&mask);

tools/tools/netrate/kq_sendrecv/kq_recvserv/kq_recvserv.c

278

CPU_SET(cpu, &mask);

tools/tools/netrate/kq_sendrecv/kq_recvserv/kq_recvserv.c

280

sizeof(mask), &mask);

tools/tools/netrate/kq_sendrecv/kq_sendcli/kq_sendcli.c

302

cpuset_t mask;

tools/tools/netrate/kq_sendrecv/kq_sendcli/kq_sendcli.c

304

cpu_set_t mask;

tools/tools/netrate/kq_sendrecv/kq_sendcli/kq_sendcli.c

307

CPU_ZERO(&mask);

tools/tools/netrate/kq_sendrecv/kq_sendcli/kq_sendcli.c

308

CPU_SET(i % ncpus, &mask);

tools/tools/netrate/kq_sendrecv/kq_sendcli/kq_sendcli.c

310

sizeof(mask), &mask);

tools/tools/toeplitz/toeplitz.c

109

printf("0x%08x, masked 0x%08x", res, res & mask);

tools/tools/toeplitz/toeplitz.c

41

uint32_t res, mask, divisor;

tools/tools/toeplitz/toeplitz.c

49

mask = 0xffffffff;

tools/tools/toeplitz/toeplitz.c

59

mask = strtoul(optarg, NULL, 16);

usr.bin/bc/bc.y

284

sigset_t mask;

usr.bin/bc/bc.y

289

sigprocmask(SIG_BLOCK, NULL, &mask);

usr.bin/bc/bc.y

290

sigsuspend(&mask);

usr.bin/dsynth/build.c

3060

int mask;

usr.bin/dsynth/build.c

3066

mask = sigsetmask(sigmask(SIGTERM)|sigmask(SIGINT)|sigmask(SIGHUP));

usr.bin/dsynth/build.c

3070

sigsetmask(mask);

usr.bin/dsynth/build.c

3077

mask = sigsetmask(sigmask(SIGTERM)|sigmask(SIGINT)|sigmask(SIGHUP));

usr.bin/dsynth/build.c

3081

sigsetmask(mask);

usr.bin/du/du.c

467

ignoreadd(const char *mask)

usr.bin/du/du.c

474

ign->mask = strdup(mask);

usr.bin/du/du.c

475

if (ign->mask == NULL)

usr.bin/du/du.c

488

free(ign->mask);

usr.bin/du/du.c

499

if (fnmatch(ign->mask, ent->fts_name, 0) != FNM_NOMATCH)

usr.bin/du/du.c

59

char *mask;

usr.bin/find/function.c

1509

mode_t mask;

usr.bin/find/function.c

1516

mask = S_IFBLK;

usr.bin/find/function.c

1519

mask = S_IFCHR;

usr.bin/find/function.c

1522

mask = S_IFDIR;

usr.bin/find/function.c

1525

mask = S_IFREG;

usr.bin/find/function.c

1528

mask = S_IFLNK;

usr.bin/find/function.c

1531

mask = S_IFIFO;

usr.bin/find/function.c

1534

mask = S_IFSOCK;

usr.bin/find/function.c

1538

mask = S_IFWHT;

usr.bin/find/function.c

1547

new->m_data = mask;

usr.bin/gzip/gzip.c

1039

mode_t mask = umask(022);

usr.bin/gzip/gzip.c

1041

(void)fchmod(fd, DEFFILEMODE & ~mask);

usr.bin/gzip/gzip.c

1042

(void)umask(mask);

usr.bin/jot/jot.c

128

mask |= 01;

usr.bin/jot/jot.c

135

mask |= 02;

usr.bin/jot/jot.c

144

mask |= 04;

usr.bin/jot/jot.c

155

mask |= 010;

usr.bin/jot/jot.c

165

while (mask) /* 4 bit mask has 1's where last 4 args were given */

usr.bin/jot/jot.c

166

switch (mask) { /* fill in the 0's by default or computation */

usr.bin/jot/jot.c

169

mask = 011;

usr.bin/jot/jot.c

173

mask = 012;

usr.bin/jot/jot.c

177

mask = 013;

usr.bin/jot/jot.c

181

mask = 014;

usr.bin/jot/jot.c

185

mask = 015;

usr.bin/jot/jot.c

189

mask = 016;

usr.bin/jot/jot.c

194

mask = 0;

usr.bin/jot/jot.c

199

mask = 0;

usr.bin/jot/jot.c

205

mask = 0;

usr.bin/jot/jot.c

209

mask = 014;

usr.bin/jot/jot.c

213

mask = 015;

usr.bin/jot/jot.c

217

mask = 013;

usr.bin/jot/jot.c

225

mask = 0;

usr.bin/jot/jot.c

229

mask = 015;

usr.bin/jot/jot.c

236

mask = 0;

usr.bin/jot/jot.c

247

mask = 0;

usr.bin/jot/jot.c

257

mask = 0;

usr.bin/jot/jot.c

82

unsigned int mask = 0;

usr.bin/kdump/kdump.c

935

(u_long)psig->action, psig->mask.__bits[0], psig->code);

usr.bin/login/login_fbtab.c

122

login_protect(const char *table, char *pattern, int mask, uid_t uid, gid_t gid)

usr.bin/login/login_fbtab.c

135

if (chmod(path, mask) && errno != ENOENT)

usr.bin/mail/popen.c

206

run_command(char *cmd, sigset_t *mask, int infd, int outfd, char *a0, char *a1,

usr.bin/mail/popen.c

211

if ((pid = start_command(cmd, mask, infd, outfd, a0, a1, a2)) < 0)

usr.bin/mail/popen.c

218

start_command(char *cmd, sigset_t *mask, int infd, int outfd, char *a0,

usr.bin/mail/popen.c

235

prepare_child(mask, infd, outfd);

usr.bin/netstat/route.c

116

static const char *fmt_sockaddr (struct sockaddr *sa, struct sockaddr *mask,

usr.bin/netstat/route.c

286

sa_u addr, mask;

usr.bin/netstat/route.c

302

bzero(&mask, sizeof(mask));

usr.bin/netstat/route.c

304

bcopy(sa, &mask, sa->sa_len);

usr.bin/netstat/route.c

305

bp = fmt_sockaddr(&addr.u_sa, &mask.u_sa, rt->rt_flags);

usr.bin/netstat/route.c

593

p_sockaddr(struct sockaddr *sa, struct sockaddr *mask, int flags, int width)

usr.bin/netstat/route.c

597

cp = fmt_sockaddr(sa, mask, flags);

usr.bin/netstat/route.c

610

fmt_sockaddr(struct sockaddr *sa, struct sockaddr *mask, int flags)

usr.bin/netstat/route.c

623

if ((sin->sin_addr.s_addr == INADDR_ANY) && mask &&

usr.bin/netstat/route.c

624

ntohl(((struct sockaddr_in *)mask)->sin_addr.s_addr) ==0L)

usr.bin/netstat/route.c

628

else if (mask)

usr.bin/netstat/route.c

630

ntohl(((struct sockaddr_in *)mask)

usr.bin/netstat/route.c

657

else if (mask)

usr.bin/netstat/route.c

659

&((struct sockaddr_in6 *)mask)->sin6_addr);

usr.bin/netstat/route.c

754

sa_u addr, mask;

usr.bin/netstat/route.c

769

bzero(&mask, sizeof(mask));

usr.bin/netstat/route.c

771

bcopy(sa, &mask, sa->sa_len);

usr.bin/netstat/route.c

772

p_sockaddr(&addr.u_sa, &mask.u_sa, rt->rt_flags, wid_dst);

usr.bin/netstat/route.c

876

domask(char *dst, u_long addr, u_long mask)

usr.bin/netstat/route.c

880

if (!mask || (forgemask(addr) == mask)) {

usr.bin/netstat/route.c

886

if (mask & (1 << b)) {

usr.bin/netstat/route.c

889

if (!(mask & (1 << bb))) {

usr.bin/netstat/route.c

896

sprintf(dst, "&0x%lx", mask);

usr.bin/netstat/route.c

906

netname(u_long in, u_long mask)

usr.bin/netstat/route.c

923

np = getnetbyaddr(i >> NSHIFT(mask), AF_INET);

usr.bin/netstat/route.c

924

if (np == NULL && mask == 0)

usr.bin/netstat/route.c

936

if (mask <= IN_CLASSA_NET &&

usr.bin/netstat/route.c

939

} else if (mask <= IN_CLASSB_NET &&

usr.bin/netstat/route.c

943

} else if (mask <= IN_CLASSC_NET &&

usr.bin/netstat/route.c

952

domask(line + strlen(line), i, mask);

usr.bin/netstat/route.c

958

netname6(struct sockaddr_in6 *sa6, struct in6_addr *mask)

usr.bin/netstat/route.c

961

u_char *p = (u_char *)mask;

usr.bin/netstat/route.c

965

if (mask) {

usr.bin/systat/keyboard.c

110

oldmask = sigblock(mask(SIGALRM));

usr.bin/systat/keyboard.c

62

oldmask = sigblock(mask(SIGALRM));

usr.bin/systat/keyboard.c

68

oldmask = sigblock(mask(SIGALRM));

usr.bin/timeout/timeout.c

253

sigset_t mask;

usr.bin/timeout/timeout.c

258

sigfillset(&mask);

usr.bin/timeout/timeout.c

259

sigdelset(&mask, signo);

usr.bin/timeout/timeout.c

260

sigprocmask(SIG_SETMASK, &mask, NULL);

usr.bin/top/top.c

247

int mask;

usr.bin/top/top.c

249

mask = sigblock(sigmask(SIGINT) | sigmask(SIGQUIT) |

usr.bin/top/top.c

252

mask = sigblock(sigmask(SIGINT) | sigmask(SIGQUIT) | sigmask(SIGTSTP));

usr.bin/top/top.c

253

return (void *)mask;

usr.bin/top/top.c

716

void *mask;

usr.bin/top/top.c

909

mask = hold_signals();

usr.bin/top/top.c

933

release_signals(mask);

usr.bin/top/top.c

938

release_signals(mask);

usr.sbin/arp/arp.c

696

u_int32_t ina, mask;

usr.sbin/arp/arp.c

743

mask = ((struct sockaddr_in *)

usr.sbin/arp/arp.c

745

if ((ipaddr & mask) != (ina & mask))

usr.sbin/authpf/authpf.c

789

memset(&psk.psk_src.addr.v.a.mask, 0xff,

usr.sbin/authpf/authpf.c

790

sizeof(psk.psk_src.addr.v.a.mask));

usr.sbin/authpf/authpf.c

798

memset(&psk.psk_dst.addr.v.a.mask, 0xff,

usr.sbin/authpf/authpf.c

799

sizeof(psk.psk_dst.addr.v.a.mask));

usr.sbin/cron/cron/cron.h

110

# define Debug(mask, message) \

usr.sbin/cron/cron/cron.h

111

if ( (DebugFlags & (mask) ) == (mask) ) \

usr.sbin/cron/cron/cron.h

114

# define Debug(mask, message) \

usr.sbin/cron/lib/misc.c

123

int mask;

usr.sbin/cron/lib/misc.c

127

for ( test = DebugFlagNames, mask = 1;

usr.sbin/cron/lib/misc.c

129

test++, mask <<= 1

usr.sbin/cron/lib/misc.c

140

DebugFlags |= mask;

usr.sbin/efibootmgr/efibootmgr.c

867

os_indications_set(uint64_t mask, uint64_t val)

usr.sbin/efibootmgr/efibootmgr.c

871

le64enc(&new, (os_indications() & ~mask) | (val & mask));

usr.sbin/ftp-proxy/filter.c

127

memset(&pfp.addr.addr.v.a.mask.addr8, 255, 4);

usr.sbin/ftp-proxy/filter.c

131

memset(&pfp.addr.addr.v.a.mask.addr8, 255, 16);

usr.sbin/ftp-proxy/filter.c

266

memset(&pfr.rule.src.addr.v.a.mask.addr8, 255, 4);

usr.sbin/ftp-proxy/filter.c

269

memset(&pfr.rule.dst.addr.v.a.mask.addr8, 255, 4);

usr.sbin/ftp-proxy/filter.c

273

memset(&pfr.rule.src.addr.v.a.mask.addr8, 255, 16);

usr.sbin/ftp-proxy/filter.c

276

memset(&pfr.rule.dst.addr.v.a.mask.addr8, 255, 16);

usr.sbin/ftp-proxy/filter.c

94

memset(&pfp.addr.addr.v.a.mask.addr8, 255, 4);

usr.sbin/ftp-proxy/filter.c

98

memset(&pfp.addr.addr.v.a.mask.addr8, 255, 16);

usr.sbin/inetd/inetd.c

1225

umask(mask);

usr.sbin/inetd/inetd.c

1234

umask(mask);

usr.sbin/inetd/inetd.c

247

mode_t mask;

usr.sbin/inetd/inetd.c

429

umask(mask = umask(0777));

usr.sbin/ip6addrctl/ip6addrctl.c

298

plen2mask(struct sockaddr_in6 *mask, int plen)

usr.sbin/ip6addrctl/ip6addrctl.c

300

u_char *cp = (unsigned char *)&mask->sin6_addr;

usr.sbin/ip6addrctl/ip6addrctl.c

302

memset(mask, 0, sizeof(*mask));

usr.sbin/ip6addrctl/ip6addrctl.c

303

mask->sin6_family = AF_INET6; /* just in case */

usr.sbin/ip6addrctl/ip6addrctl.c

304

mask->sin6_len = sizeof(*mask);

usr.sbin/ip6addrctl/ip6addrctl.c

331

mask2plen(struct sockaddr_in6 *mask)

usr.sbin/ip6addrctl/ip6addrctl.c

337

lim = (u_char *)(mask + 1);

usr.sbin/ip6addrctl/ip6addrctl.c

338

for (p = (u_char *)(&mask->sin6_addr); p < lim; p++) {

usr.sbin/makefs/ffs/ffs_alloc.c

535

scanc(u_int size, const u_char *cp, const u_char table[], int mask)

usr.sbin/makefs/ffs/ffs_alloc.c

539

while (cp < end && (table[*cp] & mask) == 0)

usr.sbin/makefs/ffs/ffs_subr.c

100

mask = 0x01 << (h & 0x7);

usr.sbin/makefs/ffs/ffs_subr.c

101

return ((cp[h >> 3] & mask) == mask);

usr.sbin/makefs/ffs/ffs_subr.c

88

u_char mask;

usr.sbin/makefs/ffs/ffs_subr.c

94

mask = 0x0f << ((h & 0x1) << 2);

usr.sbin/makefs/ffs/ffs_subr.c

95

return ((cp[h >> 1] & mask) == mask);

usr.sbin/makefs/ffs/ffs_subr.c

97

mask = 0x03 << ((h & 0x3) << 1);

usr.sbin/makefs/ffs/ffs_subr.c

98

return ((cp[h >> 2] & mask) == mask);

usr.sbin/makefs/hammer2/hammer2.h

1344

uint64_t mask;

usr.sbin/makefs/hammer2/hammer2.h

1351

mask = (uint64_t)-1;

usr.sbin/makefs/hammer2/hammer2.h

1353

mask = ((uint64_t)1 << (bbeg + bits)) - 1;

usr.sbin/makefs/hammer2/hammer2.h

1355

mask &= ~(((uint64_t)1 << bbeg) - 1);

usr.sbin/makefs/hammer2/hammer2.h

1357

return mask;

usr.sbin/makefs/hammer2/hammer2.h

1821

void hammer2_xop_retire(hammer2_xop_head_t *xop, uint64_t mask);

usr.sbin/makefs/hammer2/hammer2_admin.c

1041

(mask & HAMMER2_XOPMASK_ALLDONE) != HAMMER2_XOPMASK_VOP) {

usr.sbin/makefs/hammer2/hammer2_admin.c

1051

mask, mask | HAMMER2_XOPMASK_WAIT)) {

usr.sbin/makefs/hammer2/hammer2_admin.c

1102

uint32_t mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

1106

mask = 1U << (hv & 31);

usr.sbin/makefs/hammer2/hammer2_admin.c

1109

return ((int)(hash[hv & XOP_HASH_MASK] & mask));

usr.sbin/makefs/hammer2/hammer2_admin.c

1116

uint32_t mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

1120

mask = 1U << (hv & 31);

usr.sbin/makefs/hammer2/hammer2_admin.c

1123

hash[hv & XOP_HASH_MASK] |= mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

1208

uint64_t mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

1212

mask = 1LLU << thr->clindex;

usr.sbin/makefs/hammer2/hammer2_admin.c

1280

hammer2_xop_retire(xop, mask);

usr.sbin/makefs/hammer2/hammer2_admin.c

1285

hammer2_xop_retire(xop, mask);

usr.sbin/makefs/hammer2/hammer2_admin.c

1315

hammer2_xop_retire(xop, mask);

usr.sbin/makefs/hammer2/hammer2_admin.c

653

hammer2_xop_retire(hammer2_xop_head_t *xop, uint64_t mask)

usr.sbin/makefs/hammer2/hammer2_admin.c

668

KKASSERT(xop->run_mask & mask);

usr.sbin/makefs/hammer2/hammer2_admin.c

670

-mask + HAMMER2_XOPMASK_FEED);

usr.sbin/makefs/hammer2/hammer2_admin.c

675

if ((nmask & HAMMER2_XOPMASK_ALLDONE) != mask) {

usr.sbin/makefs/hammer2/hammer2_admin.c

685

if (mask == HAMMER2_XOPMASK_VOP) {

usr.sbin/makefs/hammer2/hammer2_admin.c

693

nmask -= mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

773

mask = xop->chk_mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

774

for (i = 0; mask && i < HAMMER2_MAXCLUSTER; ++i) {

usr.sbin/makefs/hammer2/hammer2_admin.c

782

mask &= ~(1U << i);

usr.sbin/makefs/hammer2/hammer2_admin.c

859

uint64_t mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

879

mask = xop->run_mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

880

if ((mask & HAMMER2_XOPMASK_VOP) == 0) {

usr.sbin/makefs/hammer2/hammer2_admin.c

897

mask = atomic_fetchadd_64(&xop->run_mask, HAMMER2_XOPMASK_FEED);

usr.sbin/makefs/hammer2/hammer2_admin.c

898

if (mask & HAMMER2_XOPMASK_WAIT) {

usr.sbin/makefs/hammer2/hammer2_admin.c

949

uint64_t mask;

usr.sbin/makefs/hammer2/hammer2_admin.c

962

mask = xop->run_mask;

usr.sbin/makefs/hammer2/hammer2_bulkfree.c

1411

hammer2_bitmap_t mask; /* 64-bit mask to check */

usr.sbin/makefs/hammer2/hammer2_bulkfree.c

1421

mask = bmap->bitmapq[i];

usr.sbin/makefs/hammer2/hammer2_bulkfree.c

1438

if ((scan & mask) == 0) {

usr.sbin/makefs/hammer2/hammer2_io.c

707

uint64_t mask;

usr.sbin/makefs/hammer2/hammer2_io.c

716

mask = hammer2_dedup_mask(dio, bref->data_off, lsize);

usr.sbin/makefs/hammer2/hammer2_io.c

717

atomic_clear_64(&dio->dedup_valid, mask);

usr.sbin/makefs/hammer2/hammer2_io.c

718

atomic_set_64(&dio->dedup_alloc, mask);

usr.sbin/makefs/hammer2/hammer2_io.c

733

uint64_t mask;

usr.sbin/makefs/hammer2/hammer2_io.c

749

mask = hammer2_dedup_mask(dio, data_off, bytes);

usr.sbin/makefs/hammer2/hammer2_io.c

750

atomic_clear_64(&dio->dedup_alloc, mask);

usr.sbin/makefs/hammer2/hammer2_io.c

751

atomic_clear_64(&dio->dedup_valid, mask);

usr.sbin/makefs/hammer2/hammer2_strategy.c

1447

uint64_t mask;

usr.sbin/makefs/hammer2/hammer2_strategy.c

1540

mask = hammer2_dedup_mask(dio, chain->bref.data_off, chain->bytes);

usr.sbin/makefs/hammer2/hammer2_strategy.c

1541

atomic_set_64(&dio->dedup_valid, mask);

usr.sbin/makefs/hammer2/hammer2_strategy.c

1572

uint64_t mask;

usr.sbin/makefs/hammer2/hammer2_strategy.c

1607

mask = hammer2_dedup_mask(dio, off, pblksize);

usr.sbin/makefs/hammer2/hammer2_strategy.c

1608

if ((dio->dedup_alloc & mask) == mask &&

usr.sbin/makefs/hammer2/hammer2_strategy.c

1609

(dio->dedup_valid & mask) == mask &&

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

206

mask = used - 1; /* mask for comparing low */

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

258

if (len > root && (huff & mask) != low) {

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

283

low = huff & mask;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c

50

unsigned mask; /* mask for low root bits */

usr.sbin/mfiutil/mfi_volume.c

169

uint8_t mask)

usr.sbin/mfiutil/mfi_volume.c

172

props->default_cache_policy &= ~mask;

usr.sbin/mixer/mixer.c

29

static int res_name(const char *name, int mask);

usr.sbin/mixer/mixer.c

67

res_name(const char *name, int mask)

usr.sbin/mixer/mixer.c

72

if ((1 << i) & mask && strcmp(names[i], name) == 0)

usr.sbin/moused/moused.c

2190

a2->button &= states[mouse_button_state].mask;

usr.sbin/moused/moused.c

2333

int mask;

usr.sbin/moused/moused.c

2336

mask = act->flags & MOUSE_BUTTONS;

usr.sbin/moused/moused.c

2337

if (mask == 0)

usr.sbin/moused/moused.c

2354

for (i = 0; (i < MOUSE_MAXBUTTON) && (mask != 0); ++i) {

usr.sbin/moused/moused.c

2355

if (mask & 1) {

usr.sbin/moused/moused.c

2384

mask >>= 1;

usr.sbin/moused/moused.c

2409

int mask;

usr.sbin/moused/moused.c

2412

mask = act->flags & MOUSE_BUTTONS;

usr.sbin/moused/moused.c

2413

if (mask == 0)

usr.sbin/moused/moused.c

2417

for (i = 0; (i < MOUSE_MAXBUTTON) && (mask != 0); ++i) {

usr.sbin/moused/moused.c

2418

if (mask & 1) {

usr.sbin/moused/moused.c

2434

mask >>= 1;

usr.sbin/moused/moused.c

445

int mask;

usr.sbin/mtree/compare.c

104

#define SETFLAGS(pflags, mask) \

usr.sbin/mtree/compare.c

106

flags = (s->st_flags & (mask)) | (pflags); \

usr.sbin/mtree/compare.c

114

#define CLEARFLAGS(pflags, mask) \

usr.sbin/mtree/compare.c

116

flags = (~(s->st_flags & (mask)) & CH_MASK) & (pflags); \

usr.sbin/pciconf/cap.c

624

uint32_t sta, mask;

usr.sbin/pciconf/cap.c

630

mask = read_config(fd, &p->pc_sel, ptr + PCIR_AER_UC_SEVERITY, 4);

usr.sbin/pciconf/cap.c

631

printf(" %d fatal", bitcount32(sta & mask));

usr.sbin/pciconf/cap.c

632

printf(" %d non-fatal", bitcount32(sta & ~mask));

usr.sbin/pciconf/err.c

112

print_bits(const char *header, struct bit_table *table, uint32_t mask)

usr.sbin/pciconf/err.c

118

if (mask & table->mask) {

usr.sbin/pciconf/err.c

125

mask &= ~table->mask;

usr.sbin/pciconf/err.c

127

if (mask != 0) {

usr.sbin/pciconf/err.c

132

printf("Unknown: 0x%08x\n", mask);

usr.sbin/pciconf/err.c

139

uint32_t mask, severity;

usr.sbin/pciconf/err.c

162

mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_STATUS, 4);

usr.sbin/pciconf/err.c

164

print_bits("Fatal", aer_uc, mask & severity);

usr.sbin/pciconf/err.c

165

print_bits("Non-fatal", aer_uc, mask & ~severity);

usr.sbin/pciconf/err.c

168

mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_COR_STATUS, 4);

usr.sbin/pciconf/err.c

169

print_bits("Corrected", aer_cor, mask);

usr.sbin/pciconf/err.c

41

uint32_t mask;

usr.sbin/pfctl/parse.y

2857

unmask(&b->addr.v.a.mask, b->af) !=

usr.sbin/pfctl/parse.y

2859

unmask(&e->addr.v.a.mask, e->af) !=

usr.sbin/pfctl/parse.y

2870

memcpy(&b->addr.v.a.mask, &e->addr.v.a.addr,

usr.sbin/pfctl/parse.y

2871

sizeof(b->addr.v.a.mask));

usr.sbin/pfctl/parse.y

4205

if (!PF_AZERO(&binat.src.addr.v.a.mask,

usr.sbin/pfctl/parse.y

4207

!PF_AEQ(&binat.src.addr.v.a.mask,

usr.sbin/pfctl/parse.y

4208

&$13->host->addr.v.a.mask, binat.af)) {

usr.sbin/pfctl/parse.y

4691

PF_AZERO(&h->addr.v.a.mask, af)))

usr.sbin/pfctl/parse.y

4701

bits = unmask(&h->addr.v.a.mask, af);

usr.sbin/pfctl/pf_print_state.c

128

PF_AZERO(&addr->v.a.mask, AF_INET6))) {

usr.sbin/pfctl/pf_print_state.c

129

int bits = unmask(&addr->v.a.mask, af);

usr.sbin/pfctl/pf_print_state.c

180

aw.v.a.mask.addr32[0] = 0xffffffff;

usr.sbin/pfctl/pf_print_state.c

182

memset(&aw.v.a.mask, 0xff, sizeof(aw.v.a.mask));

usr.sbin/pfctl/pf_print_state.c

91

if (inet_ntop(af, &addr->v.a.mask, buf, sizeof(buf)) == NULL)

usr.sbin/pfctl/pf_print_state.c

99

PF_AZERO(&addr->v.a.mask, AF_INET6))

usr.sbin/pfctl/pfctl.c

383

pfctl_addrprefix(char *addr, struct pf_addr *mask)

usr.sbin/pfctl/pfctl.c

416

bzero(&mask->v4, sizeof(mask->v4));

usr.sbin/pfctl/pfctl.c

417

mask->v4.s_addr = htonl((u_int32_t)

usr.sbin/pfctl/pfctl.c

421

bzero(&mask->v6, sizeof(mask->v6));

usr.sbin/pfctl/pfctl.c

423

memset((void *)&mask->v6, 0xff, q);

usr.sbin/pfctl/pfctl.c

425

*((u_char *)&mask->v6 + q) =

usr.sbin/pfctl/pfctl.c

444

memset(&psnk.psnk_src.addr.v.a.mask, 0xff,

usr.sbin/pfctl/pfctl.c

445

sizeof(psnk.psnk_src.addr.v.a.mask));

usr.sbin/pfctl/pfctl.c

449

pfctl_addrprefix(src_node_kill[0], &psnk.psnk_src.addr.v.a.mask);

usr.sbin/pfctl/pfctl.c

478

memset(&psnk.psnk_dst.addr.v.a.mask, 0xff,

usr.sbin/pfctl/pfctl.c

479

sizeof(psnk.psnk_dst.addr.v.a.mask));

usr.sbin/pfctl/pfctl.c

482

&psnk.psnk_dst.addr.v.a.mask);

usr.sbin/pfctl/pfctl.c

547

memset(&psk.psk_src.addr.v.a.mask, 0xff,

usr.sbin/pfctl/pfctl.c

548

sizeof(psk.psk_src.addr.v.a.mask));

usr.sbin/pfctl/pfctl.c

555

pfctl_addrprefix(state_kill[0], &psk.psk_src.addr.v.a.mask);

usr.sbin/pfctl/pfctl.c

584

memset(&psk.psk_dst.addr.v.a.mask, 0xff,

usr.sbin/pfctl/pfctl.c

585

sizeof(psk.psk_dst.addr.v.a.mask));

usr.sbin/pfctl/pfctl.c

588

&psk.psk_dst.addr.v.a.mask);

usr.sbin/pfctl/pfctl_optimize.c

1077

memcmp(&a->dst.addr.v.a.mask, &b->dst.addr.v.a.mask,

usr.sbin/pfctl/pfctl_optimize.c

1078

sizeof(a->dst.addr.v.a.mask)) ||

usr.sbin/pfctl/pfctl_optimize.c

1088

memcmp(&a->dst.addr.v.a.mask, &b->dst.addr.v.a.mask,

usr.sbin/pfctl/pfctl_optimize.c

1089

sizeof(a->dst.addr.v.a.mask)))

usr.sbin/pfctl/pfctl_optimize.c

1149

memcmp(&a->src.addr.v.a.mask, &b->src.addr.v.a.mask,

usr.sbin/pfctl/pfctl_optimize.c

1150

sizeof(a->src.addr.v.a.mask)) ||

usr.sbin/pfctl/pfctl_optimize.c

1160

memcmp(&a->src.addr.v.a.mask, &b->src.addr.v.a.mask,

usr.sbin/pfctl/pfctl_optimize.c

1161

sizeof(a->src.addr.v.a.mask)))

usr.sbin/pfctl/pfctl_optimize.c

1246

unmask(&node_host.addr.v.a.mask, af));

usr.sbin/pfctl/pfctl_optimize.c

1562

!sub->src.neg && super->src.addr.v.a.mask.addr32[0] == 0 &&

usr.sbin/pfctl/pfctl_optimize.c

1563

super->src.addr.v.a.mask.addr32[1] == 0 &&

usr.sbin/pfctl/pfctl_optimize.c

1564

super->src.addr.v.a.mask.addr32[2] == 0 &&

usr.sbin/pfctl/pfctl_optimize.c

1565

super->src.addr.v.a.mask.addr32[3] == 0)

usr.sbin/pfctl/pfctl_optimize.c

1571

unmask(&super->src.addr.v.a.mask, super->af) <

usr.sbin/pfctl/pfctl_optimize.c

1572

unmask(&sub->src.addr.v.a.mask, sub->af) &&

usr.sbin/pfctl/pfctl_optimize.c

1575

super->src.addr.v.a.mask.addr32[0]) &&

usr.sbin/pfctl/pfctl_optimize.c

1578

super->src.addr.v.a.mask.addr32[1]) &&

usr.sbin/pfctl/pfctl_optimize.c

1581

super->src.addr.v.a.mask.addr32[2]) &&

usr.sbin/pfctl/pfctl_optimize.c

1584

super->src.addr.v.a.mask.addr32[3])) {

usr.sbin/pfctl/pfctl_optimize.c

1590

!sub->dst.neg && super->dst.addr.v.a.mask.addr32[0] == 0 &&

usr.sbin/pfctl/pfctl_optimize.c

1591

super->dst.addr.v.a.mask.addr32[1] == 0 &&

usr.sbin/pfctl/pfctl_optimize.c

1592

super->dst.addr.v.a.mask.addr32[2] == 0 &&

usr.sbin/pfctl/pfctl_optimize.c

1593

super->dst.addr.v.a.mask.addr32[3] == 0)

usr.sbin/pfctl/pfctl_optimize.c

1599

unmask(&super->dst.addr.v.a.mask, super->af) <

usr.sbin/pfctl/pfctl_optimize.c

1600

unmask(&sub->dst.addr.v.a.mask, sub->af) &&

usr.sbin/pfctl/pfctl_optimize.c

1603

super->dst.addr.v.a.mask.addr32[0]) &&

usr.sbin/pfctl/pfctl_optimize.c

1606

super->dst.addr.v.a.mask.addr32[1]) &&

usr.sbin/pfctl/pfctl_optimize.c

1609

super->dst.addr.v.a.mask.addr32[2]) &&

usr.sbin/pfctl/pfctl_optimize.c

1612

super->dst.addr.v.a.mask.addr32[3])) {

usr.sbin/pfctl/pfctl_parser.c

1092

m = &h->addr.v.a.mask;

usr.sbin/pfctl/pfctl_parser.c

1120

m = &h->addr.v.a.mask;

usr.sbin/pfctl/pfctl_parser.c

1179

memcpy(&n->addr.v.a.mask, &((struct sockaddr_in *)

usr.sbin/pfctl/pfctl_parser.c

1194

memcpy(&n->addr.v.a.mask, &((struct sockaddr_in6 *)

usr.sbin/pfctl/pfctl_parser.c

1357

set_ipmask(n, unmask(&p->addr.v.a.mask, n->af));

usr.sbin/pfctl/pfctl_parser.c

1362

memcpy(&n->addr.v.a.mask,

usr.sbin/pfctl/pfctl_parser.c

1363

&p->addr.v.a.mask,

usr.sbin/pfctl/pfctl_parser.c

1410

int mask, v4mask, v6mask, cont = 1;

usr.sbin/pfctl/pfctl_parser.c

1414

mask = strtol(p+1, &q, 0);

usr.sbin/pfctl/pfctl_parser.c

1415

if (!q || *q || mask > 128 || q == (p+1)) {

usr.sbin/pfctl/pfctl_parser.c

1422

v4mask = v6mask = mask;

usr.sbin/pfctl/pfctl_parser.c

1428

mask = -1;

usr.sbin/pfctl/pfctl_parser.c

1432

if (cont && (h = host_if(ps, mask)) != NULL)

usr.sbin/pfctl/pfctl_parser.c

1456

host_if(const char *s, int mask)

usr.sbin/pfctl/pfctl_parser.c

1484

if ((flags & (PFI_AFLAG_NETWORK|PFI_AFLAG_BROADCAST)) && mask > -1) {

usr.sbin/pfctl/pfctl_parser.c

1493

for (n = h; n != NULL && mask > -1; n = n->next)

usr.sbin/pfctl/pfctl_parser.c

1494

set_ipmask(n, mask);

usr.sbin/pfctl/pfctl_parser.c

1531

host_v6(const char *s, int mask)

usr.sbin/pfctl/pfctl_parser.c

1551

set_ipmask(h, mask);

usr.sbin/pfctl/pfctl_parser.c

1678

addr.pfra_net = unmask(&n->addr.v.a.mask, n->af);

usr.sbin/pfctl/pfctl_parser.c

359

PF_AZERO(&src->addr.v.a.mask, AF_INET6) &&

usr.sbin/pfctl/pfctl_parser.c

361

PF_AZERO(&dst->addr.v.a.mask, AF_INET6) &&

usr.sbin/pfctl/pfctl_parser.c

607

aw.v.a.mask.addr32[0] = 0xffffffff;

usr.sbin/pfctl/pfctl_parser.c

609

memset(&aw.v.a.mask, 0xff, sizeof(aw.v.a.mask));

usr.sbin/ppp/auth.c

186

ipcp_Setup(&bundle->ncp.ipcp, bundle->radius.mask.s_addr);

usr.sbin/ppp/bundle.c

1084

if (server.cfg.mask != (mode_t)-1)

usr.sbin/ppp/bundle.c

1085

prompt_Printf(arg->prompt, ", mask 0%03o", (int)server.cfg.mask);

usr.sbin/ppp/bundle.c

977

bundle_Open(struct bundle *bundle, const char *name, int mask, int force)

usr.sbin/ppp/bundle.c

986

if ((mask & dl->physical->type) &&

usr.sbin/ppp/bundle.c

993

if (mask & PHYS_AUTO)

usr.sbin/ppp/command.c

1412

const char *port, *passwd, *mask;

usr.sbin/ppp/command.c

1419

mask = NULL;

usr.sbin/ppp/command.c

1422

mask = arg->argv[arg->argn+2];

usr.sbin/ppp/command.c

1423

mlen = strlen(mask);

usr.sbin/ppp/command.c

1424

if (mlen == 0 || mlen > 4 || strspn(mask, "01234567") != mlen ||

usr.sbin/ppp/command.c

1425

(mlen == 4 && *mask != '0')) {

usr.sbin/ppp/command.c

1427

arg->argv[arg->argn - 2], arg->argv[arg->argn - 1], mask);

usr.sbin/ppp/command.c

1467

if (mask == NULL)

usr.sbin/ppp/command.c

1469

else for (imask = mlen = 0; mask[mlen]; mlen++)

usr.sbin/ppp/command.c

1470

imask = (imask * 8) + mask[mlen] - '0';

usr.sbin/ppp/command.c

1482

if (mask != NULL)

usr.sbin/ppp/command.c

3058

struct in_addr mask;

usr.sbin/ppp/command.c

3078

if (!ncpaddr_getip4(&addr, &mask))

usr.sbin/ppp/command.c

3080

if (!ncprange_setip4mask(&ifa, mask))

usr.sbin/ppp/iface.c

649

struct in_addr mask;

usr.sbin/ppp/iface.c

651

mask.s_addr = 0; /* avoid gcc warnings */

usr.sbin/ppp/iface.c

683

ncprange_getip4mask(&iface->addr[f].ifa, &mask);

usr.sbin/ppp/iface.c

684

prompt_Printf(arg->prompt, " netmask 0x%08lx", (long)ntohl(mask.s_addr));

usr.sbin/ppp/ip.c

548

int cproto, mask, len, n, pri, logit, result, datalen, frag;

usr.sbin/ppp/ip.c

805

for (mask = TH_FIN; mask != 0x40; mask <<= 1) {

usr.sbin/ppp/ip.c

806

if (th->th_flags & mask) {

usr.sbin/ppp/ipcp.c

277

mode_t mask;

usr.sbin/ppp/ipcp.c

292

mask = umask(022);

usr.sbin/ppp/ipcp.c

294

umask(mask);

usr.sbin/ppp/ipcp.c

313

umask(mask);

usr.sbin/ppp/ipcp.c

508

ipcp_Setup(struct ipcp *ipcp, u_int32_t mask)

usr.sbin/ppp/ipcp.c

517

ipcp->ifmask.s_addr = mask == INADDR_NONE ? ipcp->cfg.netmask.s_addr : mask;

usr.sbin/ppp/ipcp.c

589

numaddresses(struct in_addr mask)

usr.sbin/ppp/ipcp.c

594

haddr = ntohl(mask.s_addr);

usr.sbin/ppp/ipcp.c

612

struct in_addr peer, mask, ip;

usr.sbin/ppp/ipcp.c

615

mask.s_addr = 0; /* avoid gcc warnings */

usr.sbin/ppp/ipcp.c

625

ncprange_getip4mask(&addr->ifa, &mask);

usr.sbin/ppp/ipcp.c

626

if ((n = numaddresses(mask)) > 256) {

usr.sbin/ppp/ipcp.c

631

ip.s_addr = peer.s_addr & mask.s_addr;

usr.sbin/ppp/ipcp.c

637

if (!((ip.s_addr ^ peer.s_addr) & mask.s_addr)) {

usr.sbin/ppp/ipcp.c

658

struct in_addr mask;

usr.sbin/ppp/ipcp.c

670

mask = addr2mask(myaddr);

usr.sbin/ppp/ipcp.c

673

(ipcp->ifmask.s_addr & mask.s_addr) == mask.s_addr)

usr.sbin/ppp/log.c

230

log_KeepLocal(int id, u_long *mask)

usr.sbin/ppp/log.c

234

*mask |= MSK(id);

usr.sbin/ppp/log.c

246

log_DiscardLocal(int id, u_long *mask)

usr.sbin/ppp/log.c

249

*mask &= ~MSK(id);

usr.sbin/ppp/log.c

261

log_DiscardAllLocal(u_long *mask)

usr.sbin/ppp/log.c

263

*mask = MSK(LogERROR) | MSK(LogALERT) | MSK(LogWARN);

usr.sbin/ppp/log.c

282

log_IsKeptLocal(int id, u_long mask)

usr.sbin/ppp/log.c

289

return ((mask & MSK(id)) ? LOG_KEPT_LOCAL : 0) |

usr.sbin/ppp/mp.c

1112

mode_t mask;

usr.sbin/ppp/mp.c

1144

mask = umask(0177);

usr.sbin/ppp/mp.c

1155

umask(mask);

usr.sbin/ppp/mp.c

1162

umask(mask);

usr.sbin/ppp/ncpaddr.c

102

mask42bits(struct in_addr mask)

usr.sbin/ppp/ncpaddr.c

104

u_int32_t msk = ntohl(mask.s_addr);

usr.sbin/ppp/ncpaddr.c

143

mask62bits(const struct in6_addr *mask)

usr.sbin/ppp/ncpaddr.c

149

p = (const u_char *)mask;

usr.sbin/ppp/ncpaddr.c

692

ncprange_setip4mask(struct ncprange *range, struct in_addr mask)

usr.sbin/ppp/ncpaddr.c

696

range->ncprange_ip4mask = mask;

usr.sbin/ppp/ncpaddr.c

697

range->ncprange_ip4width = mask42bits(mask);

usr.sbin/ppp/ncpaddr.c

703

const struct sockaddr *mask)

usr.sbin/ppp/ncpaddr.c

706

const struct sockaddr_in *mask4 = (const struct sockaddr_in *)mask;

usr.sbin/ppp/ncpaddr.c

709

const struct sockaddr_in6 *mask6 = (const struct sockaddr_in6 *)mask;

usr.sbin/ppp/ncpaddr.c

72

#define ncprange_ip4mask u.ip4.mask

usr.sbin/ppp/ncpaddr.c

746

struct sockaddr_storage *mask)

usr.sbin/ppp/ncpaddr.c

749

struct sockaddr_in *mask4 = (struct sockaddr_in *)mask;

usr.sbin/ppp/ncpaddr.c

752

struct sockaddr_in6 *mask6 = (struct sockaddr_in6 *)mask;

usr.sbin/ppp/ncpaddr.c

756

if (mask)

usr.sbin/ppp/ncpaddr.c

757

memset(mask, '\0', sizeof(*mask));

usr.sbin/ppp/ncpaddr.c

786

if (mask)

usr.sbin/ppp/ncpaddr.c

787

mask->ss_family = AF_UNSPEC;

usr.sbin/ppp/ncpaddr.c

822

ncprange_getip4mask(const struct ncprange *range, struct in_addr *mask)

usr.sbin/ppp/ncpaddr.c

826

*mask = range->ncprange_ip4mask;

usr.sbin/ppp/ncpaddr.h

38

struct in_addr mask;

usr.sbin/ppp/radius.c

1033

prompt_Printf(p, " Netmask: %s\n", inet_ntoa(r->mask));

usr.sbin/ppp/radius.c

289

r->ip.s_addr = r->mask.s_addr = INADDR_NONE;

usr.sbin/ppp/radius.c

316

r->mask = rad_cvt_addr(data);

usr.sbin/ppp/radius.c

317

log_Printf(LogPHASE, " Netmask %s\n", inet_ntoa(r->mask));

usr.sbin/ppp/radius.c

626

r->mask.s_addr = INADDR_NONE;

usr.sbin/ppp/radius.c

948

memcpy(&ac->mask, netmask, sizeof(ac->mask));

usr.sbin/ppp/radius.c

955

rad_put_addr(r->cx.rad, RAD_FRAMED_IP_NETMASK, ac->mask) != 0) {

usr.sbin/ppp/radius.h

47

struct in_addr mask; /* FRAMED Netmask */

usr.sbin/ppp/radius.h

75

struct in_addr mask;

usr.sbin/ppp/route.c

856

const struct sockaddr *gw, const struct sockaddr *mask)

usr.sbin/ppp/route.c

898

if (mask) {

usr.sbin/ppp/route.c

900

p += memcpy_roundup(p, mask, mask->sa_len);

usr.sbin/ppp/route.c

907

ncprange_setsa(&ncpdst, dst, mask);

usr.sbin/ppp/server.c

221

mode_t mask;

usr.sbin/ppp/server.c

226

mask = server.cfg.mask;

usr.sbin/ppp/server.c

231

ret = server_LocalOpen(bundle, name, mask);

usr.sbin/ppp/server.c

243

server_LocalOpen(struct bundle *bundle, const char *name, mode_t mask)

usr.sbin/ppp/server.c

269

if (mask != (mode_t)-1)

usr.sbin/ppp/server.c

270

oldmask = umask(mask);

usr.sbin/ppp/server.c

272

if (mask != (mode_t)-1)

usr.sbin/ppp/server.c

278

if (mask != (mode_t)-1)

usr.sbin/ppp/server.c

292

server.cfg.mask = mask;

usr.sbin/ppp/server.c

304

server.cfg.mask = mask;

usr.sbin/ppp/server.c

365

server.cfg.mask = 0;

usr.sbin/ppp/server.c

374

server.cfg.mask = 0;

usr.sbin/ppp/server.c

412

server.cfg.mask = 0;

usr.sbin/ppp/server.h

40

mode_t mask;

usr.sbin/ppp/timer.c

70

sigset_t mask, omask;

usr.sbin/ppp/timer.c

72

sigemptyset(&mask);

usr.sbin/ppp/timer.c

73

sigaddset(&mask, SIGALRM);

usr.sbin/ppp/timer.c

74

sigprocmask(SIG_BLOCK, &mask, &omask);

usr.sbin/ppp/timer.c

85

sigset_t mask, omask;

usr.sbin/ppp/timer.c

87

sigemptyset(&mask);

usr.sbin/ppp/timer.c

88

sigaddset(&mask, SIGALRM);

usr.sbin/ppp/timer.c

89

sigprocmask(SIG_BLOCK, &mask, &omask);

usr.sbin/route6d/route6d.c

1487

struct sockaddr_in6 mask;

usr.sbin/route6d/route6d.c

1628

mask.sin6_len = sizeof(mask);

usr.sbin/route6d/route6d.c

1629

memset(&mask.sin6_addr, 0xff,

usr.sbin/route6d/route6d.c

1630

sizeof(mask.sin6_addr));

usr.sbin/route6d/route6d.c

1631

rta[RTAX_NETMASK] = &mask;

usr.sbin/route6d/route6d.c

261

sigset_t mask, omask;

usr.sbin/route6d/route6d.c

416

sigemptyset(&mask);

usr.sbin/route6d/route6d.c

417

sigaddset(&mask, SIGALRM);

usr.sbin/route6d/route6d.c

450

sigprocmask(SIG_BLOCK, &mask, &omask);

usr.sbin/route6d/route6d.c

455

sigprocmask(SIG_BLOCK, &mask, &omask);

usr.sbin/rpcbind/util.c

82

bitmaskcmp(void *dst, void *src, void *mask, int bytelen)

usr.sbin/rpcbind/util.c

85

u_int8_t *p1 = dst, *p2 = src, *netmask = mask;

usr.sbin/sliplogin/sliplogin.c

142

static char mask[16];

usr.sbin/sliplogin/sliplogin.c

164

user, laddr, raddr, mask, slopt[0], slopt[1],

usr.sbin/syslogd/syslogd.c

221

struct sockaddr_storage mask;

usr.sbin/syslogd/syslogd.c

226

#define a_mask u.numeric.mask

usr.sbin/syslogd/syslogd.c

2470

sigset_t omask, mask;

usr.sbin/syslogd/syslogd.c

2480

sigemptyset(&mask);

usr.sbin/syslogd/syslogd.c

2481

sigaddset(&mask, SIGALRM);

usr.sbin/syslogd/syslogd.c

2482

sigaddset(&mask, SIGHUP);

usr.sbin/syslogd/syslogd.c

2483

sigprocmask(SIG_BLOCK, &mask, &omask);

usr.sbin/syslogd/syslogd.c

343

sigset_t mask;

usr.sbin/syslogd/syslogd.c

502

sigemptyset(&mask);

usr.sbin/syslogd/syslogd.c

503

sigaddset(&mask, SIGHUP);

usr.sbin/syslogd/syslogd.c

505

sact.sa_mask = mask;

usr.sbin/syslogd/syslogd.c

570

sigemptyset(&mask);

usr.sbin/syslogd/syslogd.c

571

sigaddset(&mask, SIGCHLD);

usr.sbin/syslogd/syslogd.c

573

sact.sa_mask = mask;

usr.sbin/vknetd/vknetd.c

140

u_int32_t mask;

usr.sbin/vknetd/vknetd.c

148

mask = (1 << (32 - masklen)) - 1;

usr.sbin/vknetd/vknetd.c

149

NetMask.s_addr = htonl(~mask);

usr.sbin/ypserv/yp_access.c

126

securenets->mask.s_addr = INADDR_ANY;

usr.sbin/ypserv/yp_access.c

157

if (!inet_aton((char *)&addr2, (struct in_addr *)&tmp->mask)) {

usr.sbin/ypserv/yp_access.c

272

if (((rqhost->sin_addr.s_addr & ~tmp->mask.s_addr)

usr.sbin/ypserv/yp_access.c

88

struct in_addr mask;