sys/arch/algor/algor/algor_intr.c

80

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/alpha/alpha/pmap.c

1415

MUTEX_SPIN, IPL_SCHED);

sys/arch/amiga/amiga/machdep.c

856

[IPL_SCHED] = PSL_IPL4|PSL_S,

sys/arch/amiga/amiga/machdep.c

859

[IPL_SCHED] = PSL_IPL6|PSL_S,

sys/arch/amiga/dev/aucc.c

300

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/amiga/dev/melody.c

116

mutex_init(&sc->sc_tav.sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/amiga/dev/repulse.c

302

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/amiga/dev/toccata.c

279

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/amiga/dev/zz9k_ax.c

234

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arc/arc/c_magnum.c

99

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/c_nec_eisa.c

120

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/c_nec_pci.c

125

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/p_dti_arcstation.c

112

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/p_dti_tyne.c

115

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/arc/p_sni_rm200pci.c

96

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/arc/isa/isabus.c

292

imask[IPL_SCHED] |= imask[IPL_VM];

sys/arch/arm/arm32/intr.c

66

spl_masks[IPL_SCHED] = irqmasks[IPL_SCHED];

sys/arch/arm/at91/at91aic.c

166

aic_imask[IPL_SCHED] |= aic_imask[IPL_VM];

sys/arch/arm/at91/at91aic.c

167

aic_imask[IPL_HIGH] |= aic_imask[IPL_SCHED];

sys/arch/arm/broadcom/bcm2835_dmac.c

144

mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/cortex/gic.c

726

intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_SHOOTDOWN, IPL_SCHED,

sys/arch/arm/cortex/gicv3.c

944

intr_establish_xname(IPI_SHOOTDOWN, IPL_SCHED, IST_MPSAFE | IST_EDGE, pic_ipi_shootdown, (void *)-1, "IPI shootdown");

sys/arch/arm/ep93xx/ep93xx_intr.c

161

vic1_imask[IPL_SCHED] |= vic1_imask[IPL_VM];

sys/arch/arm/ep93xx/ep93xx_intr.c

162

vic2_imask[IPL_SCHED] |= vic2_imask[IPL_VM];

sys/arch/arm/ep93xx/ep93xx_intr.c

167

vic1_imask[IPL_HIGH] |= vic1_imask[IPL_SCHED];

sys/arch/arm/ep93xx/ep93xx_intr.c

168

vic2_imask[IPL_HIGH] |= vic2_imask[IPL_SCHED];

sys/arch/arm/footbridge/footbridge_irqhandler.c

148

footbridge_imask[IPL_SCHED] |= footbridge_imask[IPL_VM];

sys/arch/arm/footbridge/footbridge_irqhandler.c

149

footbridge_imask[IPL_HIGH] |= footbridge_imask[IPL_SCHED];

sys/arch/arm/footbridge/isa/isa_machdep.c

206

imask[IPL_SCHED] |= imask[IPL_VM];

sys/arch/arm/footbridge/isa/isa_machdep.c

207

imask[IPL_HIGH] |= imask[IPL_SCHED];

sys/arch/arm/imx/imx23_apbdma.c

495

phandle, i, IPL_SCHED, FDT_INTR_MPSAFE, imx23_apbdma_intr,

sys/arch/arm/imx/imx23_digfilt.c

236

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/imx/imx23_digfilt.c

266

void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SCHED, IST_LEVEL,

sys/arch/arm/imx/imx23_mmc.c

200

mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/include/arm32/psl.h

62

#define splsched() raisespl(IPL_SCHED)

sys/arch/arm/ixp12x0/ixp12x0_intr.c

218

imask[IPL_SCHED] |= imask[IPL_VM];

sys/arch/arm/ixp12x0/ixp12x0_intr.c

219

pci_imask[IPL_SCHED] |= pci_imask[IPL_VM];

sys/arch/arm/ixp12x0/ixp12x0_intr.c

224

imask[IPL_HIGH] |= imask[IPL_SCHED];

sys/arch/arm/ixp12x0/ixp12x0_intr.c

225

pci_imask[IPL_HIGH] |= pci_imask[IPL_SCHED];

sys/arch/arm/pic/pic.c

587

pic_set_priority(ci, IPL_SCHED);

sys/arch/arm/rockchip/rk_i2s.c

587

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/sunxi/sun4i_dma.c

382

mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/sunxi/sun4i_dma.c

411

sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SCHED,

sys/arch/arm/sunxi/sun6i_dma.c

484

mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/sunxi/sun6i_dma.c

539

sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SCHED,

sys/arch/arm/sunxi/sunxi_codec.c

611

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/sunxi/sunxi_i2s.c

893

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/sunxi/sunxi_rsb.c

166

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/arm/xscale/becc_icu.c

200

becc_imask[IPL_SCHED] |= becc_imask[IPL_VM];

sys/arch/arm/xscale/becc_icu.c

201

becc_imask[IPL_HIGH] |= becc_imask[IPL_SCHED];

sys/arch/arm/xscale/ixp425_intr.c

239

ixp425_imask[IPL_SCHED] |= ixp425_imask[IPL_VM];

sys/arch/arm/xscale/ixp425_intr.c

240

ixp425_imask[IPL_HIGH] |= ixp425_imask[IPL_SCHED];

sys/arch/arm/xscale/pxa2x0_intr.c

242

pxa2x0_imask[IPL_SCHED] &= pxa2x0_imask[IPL_VM];

sys/arch/arm/xscale/pxa2x0_intr.c

243

pxa2x0_imask[IPL_HIGH] &= pxa2x0_imask[IPL_SCHED];

sys/arch/atari/atari/intr.c

323

[IPL_SCHED] = PSL_S | PSL_IPL6,

sys/arch/cobalt/cobalt/interrupt.c

150

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/dreamcast/dev/g2/aica.c

184

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/emips/emips/xilinx_ml40x.c

83

[IPL_SCHED] = NOINTS,

sys/arch/emips/emips/xs_bee3.c

81

[IPL_SCHED] = NOINTS,

sys/arch/evbarm/ifpga/ifpga_intr.c

176

ifpga_imask[IPL_SCHED] |= ifpga_imask[IPL_VM];

sys/arch/evbarm/ifpga/ifpga_intr.c

177

ifpga_imask[IPL_HIGH] |= ifpga_imask[IPL_SCHED];

sys/arch/evbarm/mini2440/audio_mini2440.c

161

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/evbmips/evbmips/interrupt.c

83

KASSERTMSG(ipl == IPL_SCHED,

sys/arch/evbmips/evbmips/interrupt.c

85

__func__, ipl, IPL_SCHED);

sys/arch/evbmips/gdium/gdium_intr.c

154

[IPL_SCHED] =

sys/arch/evbmips/ingenic/intr.c

76

[IPL_SCHED] =

sys/arch/evbmips/loongson/loongson_intr.c

84

[IPL_SCHED] =

sys/arch/evbmips/malta/malta_intr.c

74

[IPL_SCHED] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/evbmips/mipssim/mipssim_intr.c

55

[IPL_SCHED] = MIPS_SOFT_INT_MASK

sys/arch/evbmips/sbmips/sb1250_icu.c

238

sb1250_intr_establish(irq, IPL_SCHED,

sys/arch/evbmips/sbmips/sb1250_icu.c

68

[IPL_SCHED] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/evbppc/nintendo/dev/ahb.c

308

intr_establish_xname(irq, IST_LEVEL, IPL_SCHED, pic_handle_intr,

sys/arch/evbppc/nintendo/dev/bwdsp.c

387

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/ews4800mips/ews4800mips/tr2_intr.c

62

[IPL_SCHED] = MIPS_SOFT_INT_MASK

sys/arch/ews4800mips/ews4800mips/tr2a_intr.c

57

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/hpcmips/tx/tx39icu.c

93

[IPL_SCHED] = MIPS_SOFT_INT_MASK

sys/arch/hpcmips/vr/vr.c

140

[IPL_SCHED] = MIPS_SOFT_INT_MASK

sys/arch/ia64/include/intr.h

19

#define splsched() splraise(IPL_SCHED)

sys/arch/luna68k/dev/psgpam.c

230

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/m68k/m68k/m68k_intr.c

109

[IPL_SCHED] = PSL_S | MACHINE_PSL_IPL_SCHED,

sys/arch/mac68k/mac68k/intr.c

119

ipl2psl_table[IPL_SCHED] = (PSL_S | PSL_IPL6);

sys/arch/mac68k/mac68k/intr.c

125

ipl2psl_table[IPL_SCHED] = (PSL_S | PSL_IPL3);

sys/arch/mac68k/mac68k/intr.c

130

ipl2psl_table[IPL_SCHED] = (PSL_S | PSL_IPL4);

sys/arch/mac68k/mac68k/intr.c

159

if (ipl2psl_table[IPL_VM] > ipl2psl_table[IPL_SCHED])

sys/arch/mac68k/mac68k/intr.c

160

ipl2psl_table[IPL_SCHED] = ipl2psl_table[IPL_VM];

sys/arch/mac68k/mac68k/intr.c

162

if (ipl2psl_table[IPL_SCHED] > ipl2psl_table[IPL_HIGH])

sys/arch/mac68k/mac68k/intr.c

163

ipl2psl_table[IPL_HIGH] = ipl2psl_table[IPL_SCHED];

sys/arch/mips/adm5120/adm5120_intr.c

98

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/adm5120/dev/ahci.c

289

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED /* XXXNH */);

sys/arch/mips/alchemy/au_icu.c

107

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar5312.c

376

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar5315.c

360

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/atheros/ar7100.c

92

[IPL_SCHED] = MIPS_INT_MASK, /* EVERYTHING */

sys/arch/mips/atheros/ar9344.c

378

[IPL_SCHED] = MIPS_INT_MASK, /* EVERYTHING */

sys/arch/mips/cavium/dev/octeon_cib.c

164

ih = fdtbus_intr_establish(phandle, 0, IPL_SCHED, FDT_INTR_MPSAFE,

sys/arch/mips/cavium/octeon_intr.c

181

.ih_ipl = IPL_SCHED,

sys/arch/mips/cavium/octeon_intr.c

188

[IPI_SHOOTDOWN] = IPL_SCHED,

sys/arch/mips/cavium/octeon_intr.c

380

case IPL_SCHED:

sys/arch/mips/cavium/octeon_intr.c

443

case IPL_SCHED:

sys/arch/mips/cavium/octeon_intr.c

545

KASSERTMSG((mbox_mask & __BITS(31,16)) == 0 || ci->ci_cpl >= IPL_SCHED,

sys/arch/mips/cavium/octeon_intr.c

602

const u_int ipi_shift = ipi_prio[req] == IPL_SCHED ? 16 : 0;

sys/arch/mips/cavium/octeon_intr.c

84

[IPL_SCHED] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/mips/include/intr.h

50

#define IPL_DDB (IPL_SCHED+1)

sys/arch/mips/mips/locore.S

490

#if IPL_SCHED != IPL_HIGH

sys/arch/mips/mips/mips_machdep.c

2150

| (ipl_sr_map.sr_bits[IPL_SCHED] ^ MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2419

KASSERT((status ^ sr_map[IPL_SCHED]) == MIPS_INT_MASK);

sys/arch/mips/mips/mips_machdep.c

2420

KASSERT(ci->ci_cpl == IPL_SCHED);

sys/arch/mips/mips/mips_machdep.c

2427

KASSERT(s == IPL_SCHED);

sys/arch/mips/ralink/ralink_intr.c

62

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/mips/rmi/rmixl_intr.c

1053

IPL_SCHED, ipl_eimr_map[IPL_SCHED]);

sys/arch/mips/rmi/rmixl_intr.c

455

void *ih = rmixl_vec_establish(vec, 0, IPL_SCHED, NULL, NULL, false);

sys/arch/mips/rmi/rmixl_intr.c

473

void * const ih = rmixl_vec_establish(vec, -1, IPL_SCHED,

sys/arch/mips/rmi/rmixl_intr.c

983

KASSERT(ci->ci_cpl >= IPL_SCHED);

sys/arch/mipsco/mipsco/mips_3x30.c

77

[IPL_SCHED] = MIPS_INT_MASK_SPL2,

sys/arch/newsmips/newsmips/news3400.c

73

[IPL_SCHED] = MIPS_SOFT_INT_MASK

sys/arch/newsmips/newsmips/news4000.c

64

[IPL_SCHED] = MIPS_SOFT_INT_MASK

sys/arch/newsmips/newsmips/news5000.c

69

[IPL_SCHED] = MIPS_SOFT_INT_MASK

sys/arch/or1k/include/intr.h

115

return _splraise(IPL_SCHED);

sys/arch/pmax/pmax/dec_3100.c

116

[IPL_SCHED] = MIPS_SPLHIGH,

sys/arch/pmax/pmax/dec_3max.c

121

[IPL_SCHED] = MIPS_SPLHIGH,

sys/arch/pmax/pmax/dec_3maxplus.c

131

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/pmax/pmax/dec_3min.c

129

[IPL_SCHED] = MIPS_SPLHIGH,

sys/arch/pmax/pmax/dec_5100.c

76

[IPL_SCHED] = MIPS_SPLHIGH,

sys/arch/pmax/pmax/dec_maxine.c

127

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/powerpc/include/booke/intr.h

165

return splraise(IPL_SCHED);

sys/arch/powerpc/pic/intr.c

712

(u_int)imask[IPL_SCHED] & 0x7fffffff,

sys/arch/powerpc/powerpc/locore_subr.S

352

#if IPL_SCHED != IPL_HIGH

sys/arch/riscv/fdt/clint_fdt.c

233

ipl = IPL_SCHED;

sys/arch/riscv/fdt/intc_fdt.c

351

intc_intr_establish(sc, IRQ_SUPERVISOR_TIMER, IPL_SCHED, IST_MPSAFE,

sys/arch/riscv/include/intr.h

51

#define IPL_HIGH (IPL_SCHED + 1)

sys/arch/riscv/riscv/cpu_switch.S

139

#if IPL_SCHED != IPL_HIGH

sys/arch/sandpoint/sandpoint/nhpow.c

155

intr_establish_xname(I8259_ICU + 4, IST_EDGE_RISING, IPL_SCHED, hwintr,

sys/arch/sbmips/sbmips/sb1250_icu.c

238

sb1250_intr_establish(irq, IPL_SCHED,

sys/arch/sbmips/sbmips/sb1250_icu.c

68

[IPL_SCHED] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0

sys/arch/sgimips/mace/mavb.c

907

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/sgimips/sgimips/machdep.c

136

[IPL_SCHED] = MIPS_INT_MASK_4|MIPS_INT_MASK_2|

sys/arch/sgimips/sgimips/machdep.c

145

[IPL_SCHED] = MIPS_INT_MASK_4|MIPS_INT_MASK_3|MIPS_INT_MASK_2|

sys/arch/sgimips/sgimips/machdep.c

156

[IPL_SCHED] = MIPS_INT_MASK,

sys/arch/sgimips/sgimips/machdep.c

163

[IPL_SCHED] = MIPS_INT_MASK_5|MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,

sys/arch/sparc/include/intr.h

53

#define IPL_FD IPL_SCHED

sys/arch/sparc/include/intr.h

54

#define IPL_TS102 IPL_SCHED

sys/arch/sparc/include/psl.h

307

_SPLSET(spllowerschedclock, IPL_SCHED)

sys/arch/sparc/sparc/cpu.c

670

mutex_init(&xpmsg_mutex, MUTEX_SPIN, IPL_SCHED);

sys/arch/sparc/sparc/cpu.c

761

if (cold || pil <= IPL_SCHED)

sys/arch/sparc/sparc/machdep.c

335

mutex_init(&fpu_mtx, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/sparc/sparc/pmap.c

3069

mutex_init(&ctx_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/arch/sparc/sparc/timer.c

269

sched_cookie = sparc_softintr_establish(IPL_SCHED, schedintr, NULL);

sys/arch/sparc/sparc/timer_msiiep.c

181

sched_cookie = sparc_softintr_establish(IPL_SCHED, schedintr, NULL);

sys/arch/sparc/sparc/timer_msiiep.c

289

if (CLKF_LOPRI(frame, IPL_SCHED)) {

sys/arch/sparc/sparc/timer_sun4.c

138

if (CLKF_LOPRI(frame, IPL_SCHED)) {

sys/arch/sparc/sparc/timer_sun4m.c

216

if (CLKF_LOPRI(frame, IPL_SCHED)) {

sys/arch/sparc/sparc/timer_sun4m.c

225

raise_ipi(&cpuinfo, IPL_SCHED); /* sched_cookie->pil */

sys/arch/virt68k/dev/gfrtc_mainbus.c

147

NULL, ma->ma_irq, IPL_SCHED, 0);

sys/arch/virt68k/virt68k/intr.c

208

if (ipl < IPL_BIO || ipl > IPL_SCHED) {

sys/arch/virt68k/virt68k/machdep.c

293

[IPL_SCHED] = PSL_S | PSL_IPL6,

sys/arch/x68k/x68k/machdep.c

391

[IPL_SCHED] = PSL_S | PSL_IPL7,

sys/arch/x86/x86/fpu.c

434

KASSERTMSG(ci->ci_ilevel >= IPL_SCHED, "cpu%d ilevel=%d",

sys/arch/zaurus/dev/zaudio.c

126

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/dev/dtv/dtv_demux.c

304

mutex_init(&demux->dd_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/dev/dtv/dtv_device.c

107

mutex_init(&ds->ds_egress_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/dev/dtv/dtv_device.c

108

mutex_init(&ds->ds_ingress_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/dev/dtv/dtv_device.c

118

mutex_init(&sc->sc_demux_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/dev/dtv/dtv_scatter.c

55

"dtvscatter", NULL, IPL_SCHED,

sys/dev/ebus/cs4231_ebus.c

241

ad1848_init_locks(&sc->sc_ad1848, IPL_SCHED);

sys/dev/ebus/cs4231_ebus.c

246

ea->ea_intr[i], IPL_SCHED,

sys/dev/hdaudio/hdafg.c

3747

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/dev/ic/am7930.c

236

mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/dev/ic/ssdfb.c

401

ISSET(flags, SSDFB_ATTACH_FLAG_MPSAFE) ? IPL_SCHED : IPL_BIO);

sys/dev/sbus/cs4231_sbus.c

152

sbsc->sc_pint = sparc_softintr_establish(IPL_SCHED,

sys/dev/sbus/cs4231_sbus.c

154

sbsc->sc_rint = sparc_softintr_establish(IPL_SCHED,

sys/dev/sbus/cs4231_sbus.c

179

ad1848_init_locks(&sc->sc_ad1848, IPL_SCHED);

sys/dev/sbus/cs4231_sbus.c

183

sa->sa_pri, IPL_SCHED,

sys/dev/wscons/wsbell.c

245

mutex_init(&sc->sc_bellock, MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_event.c

1735

mutex_init(&kq->kq_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_proc.c

574

mutex_init(&p->p_sigacts->sa_mutex, MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_runq.c

147

spc->spc_lwplock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_runq.c

165

spc->spc_mutex = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_sig.c

274

mutex_init(&ps2->sa_mutex, MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_sig.c

297

mutex_init(&ps->sa_mutex, MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_sleepq.c

89

IPL_SCHED);

sys/kern/kern_time.c

132

mutex_init(&itimer_mutex, MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_timeout.c

301

cc->cc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_timeout.c

323

cc->cc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED);

sys/kern/kern_turnstile.c

104

mutex_init(&turnstile_locks[i].lock, MUTEX_DEFAULT, IPL_SCHED);

sys/kern/sys_select.c

1008

sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED);

sys/rump/librump/rumpkern/scheduler.c

175

mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED);

sys/rump/librump/rumpkern/scheduler.c

179

mutex_init(&unruntime_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/sys/intr.h

85

#define IPL_AUDIO IPL_SCHED

sys/sys/intr.h

86

#define IPL_CLOCK IPL_SCHED

sys/uvm/pmap/pmap_tlb.c

354

ti->ti_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SCHED);

sys/uvm/pmap/pmap_tlb.c

377

mutex_init(ti->ti_lock, MUTEX_DEFAULT, IPL_SCHED);

sys/uvm/pmap/pmap_tlb.c

558

KASSERTMSG(ci->ci_cpl >= IPL_SCHED, "%s: cpl (%d) < IPL_SCHED (%d)",

sys/uvm/pmap/pmap_tlb.c

559

__func__, ci->ci_cpl, IPL_SCHED);