arch/arm/include/asm/assembler.h

107

msr cpsr_c, #PSR_I_BIT | SVC_MODE

arch/arm/include/asm/assembler.h

111

msr cpsr_c, #SVC_MODE

arch/arm/include/asm/assembler.h

190

msr primask, \oldcpsr

arch/arm/include/asm/assembler.h

192

msr cpsr_c, \oldcpsr

arch/arm/include/asm/assembler.h

425

msr cpsr_c, \reg

arch/arm/include/asm/assembler.h

429

msr cpsr_c, #\mode

arch/arm/include/asm/assembler.h

451

msr spsr_cxsf, \reg

arch/arm/include/asm/assembler.h

454

1: msr cpsr_c, \reg

arch/arm64/hyperv/hv_core.c

107

void hv_get_vpreg_128(u32 msr, struct hv_get_vp_registers_output *result)

arch/arm64/hyperv/hv_core.c

117

args.a4 = msr;

arch/arm64/hyperv/hv_core.c

137

u64 hv_get_vpreg(u32 msr)

arch/arm64/hyperv/hv_core.c

141

hv_get_vpreg_128(msr, &output);

arch/arm64/hyperv/hv_core.c

76

void hv_set_vpreg(u32 msr, u64 value)

arch/arm64/hyperv/hv_core.c

85

msr,

arch/arm64/include/asm/asm-uaccess.h

20

msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1

arch/arm64/include/asm/asm-uaccess.h

22

msr ttbr1_el1, \tmp1 // set reserved ASID

arch/arm64/include/asm/asm-uaccess.h

32

msr ttbr1_el1, \tmp2 // set the active ASID

arch/arm64/include/asm/asm-uaccess.h

33

msr ttbr0_el1, \tmp1 // set the non-PAN TTBR0_EL1

arch/arm64/include/asm/asm_pointer_auth.h

71

msr sctlr_el1, \tmp2

arch/arm64/include/asm/assembler.h

226

msr tpidr_el1, \src

arch/arm64/include/asm/assembler.h

228

msr tpidr_el2, \src

arch/arm64/include/asm/assembler.h

38

msr daifset, #0xf

arch/arm64/include/asm/assembler.h

46

msr daifset, #0xf

arch/arm64/include/asm/assembler.h

467

msr ttbr1_el1, \tmp1

arch/arm64/include/asm/assembler.h

480

msr ttbr1_el1, \tmp

arch/arm64/include/asm/assembler.h

496

msr pmuserenr_el0, xzr // Disable PMU access from EL0

arch/arm64/include/asm/assembler.h

51

msr daifset, #3

arch/arm64/include/asm/assembler.h

55

msr daif, \flags

arch/arm64/include/asm/assembler.h

62

msr mdscr_el1, \tmp

arch/arm64/include/asm/assembler.h

72

msr mdscr_el1, \tmp

arch/arm64/include/asm/assembler.h

731

msr \sreg, \reg

arch/arm64/include/asm/el2_setup.h

126

msr cnthctl_el2, x0

arch/arm64/include/asm/el2_setup.h

127

msr cntvoff_el2, xzr // Clear virtual offset

arch/arm64/include/asm/el2_setup.h

177

msr mdcr_el2, x2 // Configure debug traps

arch/arm64/include/asm/el2_setup.h

191

msr vttbr_el2, xzr

arch/arm64/include/asm/el2_setup.h

255

msr hstr_el2, xzr // Disable CP15 traps to EL2

arch/arm64/include/asm/el2_setup.h

262

msr vpidr_el2, x0

arch/arm64/include/asm/el2_setup.h

263

msr vmpidr_el2, x1

arch/arm64/include/asm/el2_setup.h

270

msr cpacr_el1, x0

arch/arm64/include/asm/el2_setup.h

274

msr cptr_el2, x0 // Disable copro. traps to EL2

arch/arm64/include/asm/el2_setup.h

538

msr cpacr_el1, x0

arch/arm64/include/asm/el2_setup.h

544

msr cptr_el2, x0

arch/arm64/include/asm/el2_setup.h

55

msr far_el1, x1

arch/arm64/include/asm/el2_setup.h

559

msr cpacr_el1, x0

arch/arm64/include/asm/el2_setup.h

565

msr cptr_el2, x0

arch/arm64/include/asm/el2_setup.h

571

msr sctlr_el2, x1

arch/arm64/include/asm/el2_setup.h

58

msr far_el2, x1

arch/arm64/include/asm/el2_setup.h

73

msr sctlr_el2, x0

arch/arm64/include/asm/fpsimdmacros.h

332

msr fpsr, x\nxtmp

arch/arm64/include/asm/fpsimdmacros.h

334

msr fpcr, x\nxtmp

arch/arm64/include/asm/fpsimdmacros.h

42

msr fpcr, \state

arch/arm64/include/asm/fpsimdmacros.h

65

msr fpsr, x\tmpnr

arch/arm64/include/asm/kvm_asm.h

380

msr sp_el0, \tmp

arch/arm64/include/asm/sysreg.h

1117

msr hcr_el2, \reg

arch/arm64/include/asm/sysreg.h

1120

msr hcr_el2, \reg

arch/m68k/bvme6000/config.c

166

unsigned char msr;

arch/m68k/bvme6000/config.c

169

msr = rtc->msr & 0xc0;

arch/m68k/bvme6000/config.c

170

rtc->msr = msr | 0x20; /* Ack the interrupt */

arch/m68k/bvme6000/config.c

191

unsigned char msr = rtc->msr & 0xc0;

arch/m68k/bvme6000/config.c

193

rtc->msr = 0; /* Ensure timer registers accessible */

arch/m68k/bvme6000/config.c

203

rtc->msr = 0x40; /* Access int.cntrl, etc */

arch/m68k/bvme6000/config.c

208

rtc->msr = 0; /* Access timer 1 control */

arch/m68k/bvme6000/config.c

211

rtc->msr = msr;

arch/m68k/bvme6000/config.c

233

unsigned char msr, msb;

arch/m68k/bvme6000/config.c

239

msr = rtc->msr & 0xc0;

arch/m68k/bvme6000/config.c

240

rtc->msr = 0; /* Ensure timer registers accessible */

arch/m68k/bvme6000/config.c

244

t1int = rtc->msr & 0x20;

arch/m68k/bvme6000/config.c

249

} while (t1int != (rtc->msr & 0x20) ||

arch/m68k/bvme6000/config.c

259

rtc->msr = msr;

arch/m68k/bvme6000/config.c

286

unsigned char msr = rtc->msr & 0xc0;

arch/m68k/bvme6000/config.c

288

rtc->msr = 0x40; /* Ensure clock and real-time-mode-register

arch/m68k/bvme6000/config.c

319

rtc->msr = msr;

arch/m68k/bvme6000/rtc.c

108

msr = rtc->msr & 0xc0;

arch/m68k/bvme6000/rtc.c

109

rtc->msr = 0x40;

arch/m68k/bvme6000/rtc.c

123

rtc->msr = msr;

arch/m68k/bvme6000/rtc.c

42

unsigned char msr;

arch/m68k/bvme6000/rtc.c

52

msr = rtc->msr & 0xc0;

arch/m68k/bvme6000/rtc.c

53

rtc->msr = 0x40;

arch/m68k/bvme6000/rtc.c

66

rtc->msr = msr;

arch/m68k/include/asm/bvme6000hw.h

51

pad_a[3], msr,

arch/microblaze/include/asm/setup.h

20

unsigned int fdt, unsigned int msr, unsigned int tlb0,

arch/microblaze/include/asm/thread_info.h

53

__u32 msr;

arch/microblaze/include/uapi/asm/ptrace.h

51

microblaze_reg_t msr;

arch/microblaze/kernel/asm-offsets.c

118

DEFINE(CC_MSR, offsetof(struct cpu_context, msr));

arch/microblaze/kernel/asm-offsets.c

26

DEFINE(PT_MSR, offsetof(struct pt_regs, msr));

arch/microblaze/kernel/process.c

101

ti->cpu_context.msr = (childregs->msr|MSR_VM);

arch/microblaze/kernel/process.c

102

ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */

arch/microblaze/kernel/process.c

103

ti->cpu_context.msr &= ~MSR_IE;

arch/microblaze/kernel/process.c

128

regs->msr |= MSR_UMS;

arch/microblaze/kernel/process.c

129

regs->msr &= ~MSR_VM;

arch/microblaze/kernel/process.c

45

regs->msr, regs->ear, regs->esr, regs->fsr);

arch/microblaze/kernel/process.c

72

local_save_flags(childregs->msr);

arch/microblaze/kernel/process.c

73

ti->cpu_context.msr = childregs->msr & ~MSR_IE;

arch/microblaze/kernel/process.c

83

childregs->msr |= MSR_UMS;

arch/microblaze/kernel/process.c

95

childregs->msr &= ~MSR_EIP;

arch/microblaze/kernel/process.c

96

childregs->msr |= MSR_IE;

arch/microblaze/kernel/process.c

97

childregs->msr &= ~MSR_VM;

arch/microblaze/kernel/process.c

98

childregs->msr |= MSR_VMS;

arch/microblaze/kernel/process.c

99

childregs->msr |= MSR_EE; /* exceptions will be enabled*/

arch/microblaze/kernel/setup.c

150

if (msr) {

arch/microblaze/kernel/setup.c

152

pr_cont("CPU don't have it %x\n", msr);

arch/microblaze/kernel/setup.c

155

if (!msr) {

arch/microblaze/kernel/setup.c

157

pr_cont("CPU have it %x\n", msr);

arch/microblaze/kernel/setup.c

89

unsigned int fdt, unsigned int msr, unsigned int tlb0,

arch/microblaze/mm/fault.c

118

regs->r15, regs->msr);

arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536.h

14

extern void _rdmsr(u32 msr, u32 *hi, u32 *lo);

arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536.h

15

extern void _wrmsr(u32 msr, u32 hi, u32 lo);

arch/mips/pci/ops-loongson2.c

182

void _rdmsr(u32 msr, u32 *hi, u32 *lo)

arch/mips/pci/ops-loongson2.c

191

loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);

arch/mips/pci/ops-loongson2.c

198

void _wrmsr(u32 msr, u32 hi, u32 lo)

arch/mips/pci/ops-loongson2.c

207

loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);

arch/powerpc/include/asm/asm-prototypes.h

36

int64_t opcode, uint64_t msr);

arch/powerpc/include/asm/asm-prototypes.h

60

void kvmppc_save_tm_hv(struct kvm_vcpu *vcpu, u64 msr, bool preserve_nv);

arch/powerpc/include/asm/asm-prototypes.h

61

void kvmppc_restore_tm_hv(struct kvm_vcpu *vcpu, u64 msr, bool preserve_nv);

arch/powerpc/include/asm/asm-prototypes.h

63

static inline void kvmppc_save_tm_hv(struct kvm_vcpu *vcpu, u64 msr,

arch/powerpc/include/asm/asm-prototypes.h

65

static inline void kvmppc_restore_tm_hv(struct kvm_vcpu *vcpu, u64 msr,

arch/powerpc/include/asm/book3s/64/mmu-hash.h

473

int __hash_page(unsigned long trap, unsigned long ea, unsigned long dsisr, unsigned long msr);

arch/powerpc/include/asm/ftrace.h

43

return arch_ftrace_regs(fregs)->regs.msr ? &arch_ftrace_regs(fregs)->regs : NULL;

arch/powerpc/include/asm/ftrace.h

50

asm volatile("mfmsr %0" : "=r" ((_regs)->msr)); \

arch/powerpc/include/asm/hw_irq.h

471

return !(regs->msr & MSR_EE);

arch/powerpc/include/asm/hw_irq.h

493

static inline unsigned long mtmsr_isync_irqsafe(unsigned long msr)

arch/powerpc/include/asm/hw_irq.h

505

msr &= ~MSR_EE;

arch/powerpc/include/asm/hw_irq.h

506

mtmsr_isync(msr);

arch/powerpc/include/asm/hw_irq.h

511

mtmsr_isync(msr);

arch/powerpc/include/asm/hw_irq.h

513

return msr;

arch/powerpc/include/asm/interrupt.h

167

INT_SOFT_MASK_BUG_ON(regs, !(regs->msr & MSR_EE));

arch/powerpc/include/asm/interrupt.h

199

!(regs->msr & MSR_EE));

arch/powerpc/include/asm/interrupt.h

296

if (!(regs->msr & MSR_EE) || is_implicit_soft_masked(regs)) {

arch/powerpc/include/asm/kvm_book3s.h

235

extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);

arch/powerpc/include/asm/kvm_book3s.h

284

void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr);

arch/powerpc/include/asm/kvm_book3s_64.h

143

unsigned long kvmppc_msr_hard_disable_set_facilities(struct kvm_vcpu *vcpu, unsigned long msr);

arch/powerpc/include/asm/kvm_book3s_64.h

582

static inline u64 sanitize_msr(u64 msr)

arch/powerpc/include/asm/kvm_book3s_64.h

584

msr &= ~MSR_HV;

arch/powerpc/include/asm/kvm_book3s_64.h

585

msr |= MSR_ME;

arch/powerpc/include/asm/kvm_book3s_64.h

586

return msr;

arch/powerpc/include/asm/kvm_ppc.h

1029

KVMPPC_VCPU_SHARED_REGS_ACCESSOR_GET(msr, 64, KVMPPC_GSID_MSR)

arch/powerpc/include/asm/kvm_ppc.h

1033

vcpu->arch.shared->msr = cpu_to_be64(val);

arch/powerpc/include/asm/kvm_ppc.h

1035

vcpu->arch.shared->msr = cpu_to_le64(val);

arch/powerpc/include/asm/kvm_ppc.h

272

void (*set_msr)(struct kvm_vcpu *vcpu, u64 msr);

arch/powerpc/include/asm/kvm_ppc.h

310

void (*giveup_ext)(struct kvm_vcpu *vcpu, ulong msr);

arch/powerpc/include/asm/perf_event.h

39

asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \

arch/powerpc/include/asm/probes.h

73

regs_set_return_msr(regs, regs->msr | MSR_SINGLESTEP);

arch/powerpc/include/asm/probes.h

80

regs_set_return_msr(regs, regs->msr & ~MSR_CE);

arch/powerpc/include/asm/ptrace.h

194

static inline void regs_set_return_msr(struct pt_regs *regs, unsigned long msr)

arch/powerpc/include/asm/ptrace.h

196

regs->msr = msr;

arch/powerpc/include/asm/ptrace.h

226

#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)

arch/powerpc/include/asm/ptrace.h

318

return unlikely(cpu_has_msr_ri() && !(regs->msr & MSR_RI));

arch/powerpc/include/asm/ptrace.h

324

regs_set_return_msr(regs, regs->msr | MSR_RI);

arch/powerpc/include/asm/ptrace.h

330

regs_set_return_msr(regs, regs->msr & ~MSR_RI);

arch/powerpc/include/asm/ptrace.h

35

unsigned long msr;

arch/powerpc/include/asm/syscalls_32.h

18

unsigned int msr;

arch/powerpc/include/uapi/asm/kvm.h

28

__u64 msr;

arch/powerpc/include/uapi/asm/kvm_para.h

35

__u64 msr;

arch/powerpc/include/uapi/asm/ptrace.h

40

unsigned long msr;

arch/powerpc/kernel/align.c

314

if ((regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE)) {

arch/powerpc/kernel/asm-offsets.c

284

STACK_PT_REGS_OFFSET(_MSR, msr);

arch/powerpc/kernel/asm-offsets.c

373

OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);

arch/powerpc/kernel/asm-offsets.c

402

OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);

arch/powerpc/kernel/asm-offsets.c

629

OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);

arch/powerpc/kernel/cpu_setup_power.c

153

u64 msr;

arch/powerpc/kernel/cpu_setup_power.c

155

msr = mfmsr();

arch/powerpc/kernel/cpu_setup_power.c

156

if (!(msr & MSR_HV))

arch/powerpc/kernel/cpu_setup_power.c

185

u64 msr;

arch/powerpc/kernel/cpu_setup_power.c

19

u64 msr;

arch/powerpc/kernel/cpu_setup_power.c

191

msr = mfmsr();

arch/powerpc/kernel/cpu_setup_power.c

192

if (!(msr & MSR_HV))

arch/powerpc/kernel/cpu_setup_power.c

21

msr = mfmsr();

arch/powerpc/kernel/cpu_setup_power.c

22

if (msr & MSR_HV)

arch/powerpc/kernel/cpu_setup_power.c

225

u64 msr;

arch/powerpc/kernel/cpu_setup_power.c

230

msr = mfmsr();

arch/powerpc/kernel/cpu_setup_power.c

231

if (!(msr & MSR_HV))

arch/powerpc/kernel/cpu_setup_power.c

268

u64 msr;

arch/powerpc/kernel/cpu_setup_power.c

275

msr = mfmsr();

arch/powerpc/kernel/cpu_setup_power.c

276

if (!(msr & MSR_HV))

arch/powerpc/kernel/hw_breakpoint.c

244

regs_set_return_msr(regs, regs->msr & ~MSR_SE);

arch/powerpc/kernel/hw_breakpoint.c

298

regs_set_return_msr(regs, regs->msr | MSR_SE);

arch/powerpc/kernel/hw_breakpoint_constraints.c

147

if (!(regs->msr & MSR_64BIT))

arch/powerpc/kernel/interrupt.c

152

if (srr0 == regs->nip && srr1 == regs->msr)

arch/powerpc/kernel/interrupt.c

175

printk("%sSRR1 was: %lx should be: %lx\n", h, srr1, regs->msr);

arch/powerpc/kernel/interrupt.c

227

if ((regs->msr & mathflags) != mathflags)

arch/powerpc/kernel/interrupt.c

243

local_paca->tm_scratch = regs->msr;

arch/powerpc/kernel/interrupt.c

401

WARN_ON_ONCE(!(regs->msr & MSR_EE));

arch/powerpc/kernel/interrupt.c

458

local_paca->tm_scratch = regs->msr;

arch/powerpc/kernel/irq_64.c

121

regs.msr |= MSR_EE;

arch/powerpc/kernel/kgdb.c

224

PACK64(ptr, regs->msr);

arch/powerpc/kernel/kgdb.c

312

{ "msr", GDB_SIZEOF_REG, offsetof(struct pt_regs, msr) },

arch/powerpc/kernel/kgdb.c

402

regs_set_return_msr(linux_regs, linux_regs->msr | MSR_DE);

arch/powerpc/kernel/kgdb.c

404

regs_set_return_msr(linux_regs, linux_regs->msr | MSR_SE);

arch/powerpc/kernel/kprobes.c

226

kcb->kprobe_saved_msr = regs->msr;

arch/powerpc/kernel/kprobes.c

281

(!(regs->msr & MSR_IR) || !(regs->msr & MSR_DR)))

arch/powerpc/kernel/kprobes.c

325

(regs->msr & ~MSR_SINGLESTEP) |

arch/powerpc/kernel/kprobes.c

414

regs_set_return_msr(regs, regs->msr | kcb->kprobe_saved_msr);

arch/powerpc/kernel/kprobes.c

430

if (regs->msr & MSR_SINGLESTEP)

arch/powerpc/kernel/kprobes.c

456

(regs->msr & ~MSR_SINGLESTEP) |

arch/powerpc/kernel/kvm.c

427

kvm_patch_ins_ld(inst, magic_var(msr), inst_rt);

arch/powerpc/kernel/mce.c

111

mce->srr1 = regs->msr;

arch/powerpc/kernel/mce.c

117

if (handled && (regs->msr & MSR_RI))

arch/powerpc/kernel/mce_power.c

729

return mce_handle_error(regs, regs->msr,

arch/powerpc/kernel/mce_power.c

735

return mce_handle_error(regs, regs->msr,

arch/powerpc/kernel/mce_power.c

741

unsigned long srr1 = regs->msr;

arch/powerpc/kernel/mce_power.c

753

if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x02000000)

arch/powerpc/kernel/mce_power.c

775

unsigned long srr1 = regs->msr;

arch/powerpc/kernel/optprobes.c

74

regs.msr = MSR_KERNEL;

arch/powerpc/kernel/process.c

1006

thr->regs->ccr, thr->regs->msr,

arch/powerpc/kernel/process.c

1029

if (!(thread->regs->msr & MSR_TM))

arch/powerpc/kernel/process.c

1065

if (!MSR_TM_ACTIVE(new->thread.regs->msr)){

arch/powerpc/kernel/process.c

1071

new->pid, new->thread.regs->msr);

arch/powerpc/kernel/process.c

1080

new->thread.regs->msr &= ~(MSR_FP | MSR_VEC | MSR_VSX);

arch/powerpc/kernel/process.c

1097

if (!MSR_TM_ACTIVE(prev->thread.regs->msr) && prev->thread.load_tm == 0)

arch/powerpc/kernel/process.c

1098

prev->thread.regs->msr &= ~MSR_TM;

arch/powerpc/kernel/process.c

1130

if (!MSR_TM_ACTIVE(regs->msr))

arch/powerpc/kernel/process.c

1133

msr_diff = current->thread.ckpt_regs.msr & ~regs->msr;

arch/powerpc/kernel/process.c

1145

regs_set_return_msr(regs, regs->msr | msr_diff);

arch/powerpc/kernel/process.c

1200

usermsr = current->thread.regs->msr;

arch/powerpc/kernel/process.c

1213

current->thread.regs->msr &= ~MSR_TM;

arch/powerpc/kernel/process.c

1387

if (!IS_ENABLED(CONFIG_BOOKE) && !(regs->msr & MSR_IR)) {

arch/powerpc/kernel/process.c

153

unsigned long msr;

arch/powerpc/kernel/process.c

1540

printk("MSR: "REG" ", regs->msr);

arch/powerpc/kernel/process.c

1541

print_msr_bits(regs->msr);

arch/powerpc/kernel/process.c

1559

if (MSR_TM_ACTIVE(regs->msr))

arch/powerpc/kernel/process.c

156

msr = tsk->thread.regs->msr;

arch/powerpc/kernel/process.c

157

msr &= ~(MSR_FP|MSR_FE0|MSR_FE1);

arch/powerpc/kernel/process.c

159

msr &= ~MSR_VSX;

arch/powerpc/kernel/process.c

160

regs_set_return_msr(tsk->thread.regs, msr);

arch/powerpc/kernel/process.c

1809

childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX);

arch/powerpc/kernel/process.c

189

if (tsk->thread.regs->msr & MSR_FP) {

arch/powerpc/kernel/process.c

1904

regs->msr = MSR_USER;

arch/powerpc/kernel/process.c

2036

if (regs != NULL && (regs->msr & MSR_FP) != 0) {

arch/powerpc/kernel/process.c

2037

regs_set_return_msr(regs, (regs->msr & ~(MSR_FE0|MSR_FE1))

arch/powerpc/kernel/process.c

2085

regs_set_return_msr(regs, regs->msr & ~MSR_LE);

arch/powerpc/kernel/process.c

2087

regs_set_return_msr(regs, regs->msr | MSR_LE);

arch/powerpc/kernel/process.c

2106

if (regs->msr & MSR_LE) {

arch/powerpc/kernel/process.c

213

if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) {

arch/powerpc/kernel/process.c

223

MSR_TM_ACTIVE(current->thread.regs->msr))

arch/powerpc/kernel/process.c

2267

if (regs->msr || regs->trap)

arch/powerpc/kernel/process.c

236

unsigned long msr;

arch/powerpc/kernel/process.c

239

msr = tsk->thread.regs->msr;

arch/powerpc/kernel/process.c

240

msr &= ~MSR_VEC;

arch/powerpc/kernel/process.c

242

msr &= ~MSR_VSX;

arch/powerpc/kernel/process.c

243

regs_set_return_msr(tsk->thread.regs, msr);

arch/powerpc/kernel/process.c

264

if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) {

arch/powerpc/kernel/process.c

274

MSR_TM_ACTIVE(current->thread.regs->msr))

arch/powerpc/kernel/process.c

289

if (tsk->thread.regs->msr & MSR_VEC) {

arch/powerpc/kernel/process.c

302

unsigned long msr = tsk->thread.regs->msr;

arch/powerpc/kernel/process.c

308

WARN_ON((msr & MSR_VSX) && !((msr & MSR_FP) && (msr & MSR_VEC)));

arch/powerpc/kernel/process.c

311

if (msr & MSR_FP)

arch/powerpc/kernel/process.c

313

if (msr & MSR_VEC)

arch/powerpc/kernel/process.c

335

(current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) {

arch/powerpc/kernel/process.c

345

MSR_TM_ACTIVE(current->thread.regs->msr))

arch/powerpc/kernel/process.c

356

if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) {

arch/powerpc/kernel/process.c

383

if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) {

arch/powerpc/kernel/process.c

394

if (tsk->thread.regs->msr & MSR_SPE) {

arch/powerpc/kernel/process.c

430

usermsr = tsk->thread.regs->msr;

arch/powerpc/kernel/process.c

517

unsigned long msr;

arch/powerpc/kernel/process.c

520

msr = regs->msr;

arch/powerpc/kernel/process.c

527

if ((!(msr & MSR_FP)) && should_restore_fp())

arch/powerpc/kernel/process.c

530

if ((!(msr & MSR_VEC)) && should_restore_altivec())

arch/powerpc/kernel/process.c

533

if ((!(msr & MSR_VSX)) && should_restore_vsx()) {

arch/powerpc/kernel/process.c

534

if (((msr | new_msr) & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC))

arch/powerpc/kernel/process.c

558

regs_set_return_msr(regs, regs->msr | new_msr | fpexc_mode);

arch/powerpc/kernel/process.c

570

usermsr = tsk->thread.regs->msr;

arch/powerpc/kernel/process.c

597

if (tsk->thread.regs->msr & MSR_SPE)

arch/powerpc/kernel/process.c

92

MSR_TM_ACTIVE(tsk->thread.regs->msr) &&

arch/powerpc/kernel/process.c

928

return tsk && tsk->thread.regs && (tsk->thread.regs->msr & MSR_TM);

arch/powerpc/kernel/process.c

95

tsk->thread.regs->msr);

arch/powerpc/kernel/process.c

967

if ((thr->ckpt_regs.msr & MSR_FP) == 0)

arch/powerpc/kernel/process.c

970

if ((thr->ckpt_regs.msr & MSR_VEC) == 0)

arch/powerpc/kernel/process.c

998

if (!MSR_TM_ACTIVE(thr->regs->msr))

arch/powerpc/kernel/ptrace/ptrace-adv.c

116

regs_set_return_msr(regs, regs->msr & ~MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-adv.c

136

regs_set_return_msr(regs, regs->msr | MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-adv.c

15

regs_set_return_msr(regs, regs->msr | MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-adv.c

224

regs_set_return_msr(child->thread.regs, child->thread.regs->msr | MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-adv.c

27

regs_set_return_msr(regs, regs->msr | MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-adv.c

340

regs_set_return_msr(child->thread.regs, child->thread.regs->msr | MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-adv.c

434

regs_set_return_msr(child->thread.regs, child->thread.regs->msr | MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-adv.c

490

child->thread.regs->msr & ~MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-adv.c

53

regs_set_return_msr(regs, regs->msr & ~MSR_DE);

arch/powerpc/kernel/ptrace/ptrace-noadv.c

15

regs_set_return_msr(regs, (regs->msr & ~MSR_BE) | MSR_SE);

arch/powerpc/kernel/ptrace/ptrace-noadv.c

24

regs_set_return_msr(regs, (regs->msr & ~MSR_SE) | MSR_BE);

arch/powerpc/kernel/ptrace/ptrace-noadv.c

33

regs_set_return_msr(regs, regs->msr & ~(MSR_SE | MSR_BE));

arch/powerpc/kernel/ptrace/ptrace-tm.c

144

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

164

offsetof(struct pt_regs, msr) + sizeof(long));

arch/powerpc/kernel/ptrace/ptrace-tm.c

205

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

238

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

283

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

317

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

34

return task->thread.ckpt_regs.msr | task->thread.fpexc_mode;

arch/powerpc/kernel/ptrace/ptrace-tm.c

354

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

37

static int set_user_ckpt_msr(struct task_struct *task, unsigned long msr)

arch/powerpc/kernel/ptrace/ptrace-tm.c

39

task->thread.ckpt_regs.msr &= ~MSR_DEBUGCHANGE;

arch/powerpc/kernel/ptrace/ptrace-tm.c

40

task->thread.ckpt_regs.msr |= msr & MSR_DEBUGCHANGE;

arch/powerpc/kernel/ptrace/ptrace-tm.c

404

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

445

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

478

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

522

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

63

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

658

if (MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

670

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

685

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

698

if (MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

711

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

726

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

739

if (MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

751

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

766

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-tm.c

89

struct membuf to_msr = membuf_at(&to, offsetof(struct pt_regs, msr));

arch/powerpc/kernel/ptrace/ptrace-tm.c

97

if (!MSR_TM_ACTIVE(target->thread.regs->msr))

arch/powerpc/kernel/ptrace/ptrace-view.c

111

return task->thread.regs->msr | task->thread.fpexc_mode;

arch/powerpc/kernel/ptrace/ptrace-view.c

114

static __always_inline int set_user_msr(struct task_struct *task, unsigned long msr)

arch/powerpc/kernel/ptrace/ptrace-view.c

116

unsigned long newmsr = (task->thread.regs->msr & ~MSR_DEBUGCHANGE) |

arch/powerpc/kernel/ptrace/ptrace-view.c

117

(msr & MSR_DEBUGCHANGE);

arch/powerpc/kernel/ptrace/ptrace-view.c

221

struct membuf to_msr = membuf_at(&to, offsetof(struct pt_regs, msr));

arch/powerpc/kernel/ptrace/ptrace-view.c

261

offsetof(struct pt_regs, msr) + sizeof(long));

arch/powerpc/kernel/ptrace/ptrace-view.c

56

REG_OFFSET_NAME(msr),

arch/powerpc/kernel/ptrace/ptrace.c

348

BUILD_BUG_ON(offsetof(struct pt_regs, msr) !=

arch/powerpc/kernel/ptrace/ptrace.c

349

offsetof(struct user_pt_regs, msr));

arch/powerpc/kernel/ptrace/ptrace.c

420

CHECK_REG(PT_MSR, msr);

arch/powerpc/kernel/rtas.c

727

const unsigned long msr = mfmsr();

arch/powerpc/kernel/rtas.c

745

(msr & mask) == mask);

arch/powerpc/kernel/rtas.c

750

BUG_ON(!(msr & MSR_RI));

arch/powerpc/kernel/signal.c

341

if (MSR_TM_ACTIVE(regs->msr)) {

arch/powerpc/kernel/signal.c

344

if (MSR_TM_TRANSACTIONAL(regs->msr))

arch/powerpc/kernel/signal.c

354

regs_set_return_msr(regs, regs->msr & ~MSR_TS_MASK);

arch/powerpc/kernel/signal.c

368

printk_ratelimited(regs->msr & MSR_64BIT ? fm64 : fm32, tsk->comm,

arch/powerpc/kernel/signal_32.c

1160

regs_set_return_msr(regs, regs->msr & ~MSR_TS_MASK);

arch/powerpc/kernel/signal_32.c

1199

unsigned long new_msr = regs->msr;

arch/powerpc/kernel/signal_32.c

271

unsigned long msr = regs->msr;

arch/powerpc/kernel/signal_32.c

283

msr |= MSR_VEC;

arch/powerpc/kernel/signal_32.c

302

msr &= ~MSR_VSX;

arch/powerpc/kernel/signal_32.c

312

msr |= MSR_VSX;

arch/powerpc/kernel/signal_32.c

322

msr |= MSR_SPE;

arch/powerpc/kernel/signal_32.c

331

unsafe_put_user(msr, &frame->mc_gregs[PT_MSR], failed);

arch/powerpc/kernel/signal_32.c

370

struct mcontext __user *tm_frame, unsigned long msr)

arch/powerpc/kernel/signal_32.c

382

unsafe_put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR], failed);

arch/powerpc/kernel/signal_32.c

388

if (msr & MSR_VEC)

arch/powerpc/kernel/signal_32.c

400

msr |= MSR_VEC;

arch/powerpc/kernel/signal_32.c

410

if (msr & MSR_VEC)

arch/powerpc/kernel/signal_32.c

418

if (msr & MSR_FP)

arch/powerpc/kernel/signal_32.c

431

if (msr & MSR_VSX)

arch/powerpc/kernel/signal_32.c

436

msr |= MSR_VSX;

arch/powerpc/kernel/signal_32.c

439

unsafe_put_user(msr, &frame->mc_gregs[PT_MSR], failed);

arch/powerpc/kernel/signal_32.c

451

struct mcontext __user *tm_frame, unsigned long msr)

arch/powerpc/kernel/signal_32.c

457

#define unsafe_save_tm_user_regs(regs, frame, tm_frame, msr, label) do { \

arch/powerpc/kernel/signal_32.c

458

if (save_tm_user_regs_unsafe(regs, frame, tm_frame, msr)) \

arch/powerpc/kernel/signal_32.c

470

unsigned long msr;

arch/powerpc/kernel/signal_32.c

485

unsafe_get_user(msr, &sr->mc_gregs[PT_MSR], failed);

arch/powerpc/kernel/signal_32.c

491

regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (msr & MSR_LE));

arch/powerpc/kernel/signal_32.c

498

regs_set_return_msr(regs, regs->msr & ~MSR_VEC);

arch/powerpc/kernel/signal_32.c

499

if (msr & MSR_VEC) {

arch/powerpc/kernel/signal_32.c

520

regs_set_return_msr(regs, regs->msr & ~MSR_VSX);

arch/powerpc/kernel/signal_32.c

521

if (msr & MSR_VSX) {

arch/powerpc/kernel/signal_32.c

536

regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1));

arch/powerpc/kernel/signal_32.c

545

regs_set_return_msr(regs, regs->msr & ~MSR_SPE);

arch/powerpc/kernel/signal_32.c

546

if (msr & MSR_SPE) {

arch/powerpc/kernel/signal_32.c

576

unsigned long msr, msr_hi;

arch/powerpc/kernel/signal_32.c

593

unsafe_get_user(msr, &sr->mc_gregs[PT_MSR], failed);

arch/powerpc/kernel/signal_32.c

596

regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (msr & MSR_LE));

arch/powerpc/kernel/signal_32.c

598

regs_set_return_msr(regs, regs->msr & ~MSR_VEC);

arch/powerpc/kernel/signal_32.c

599

if (msr & MSR_VEC) {

arch/powerpc/kernel/signal_32.c

617

regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1));

arch/powerpc/kernel/signal_32.c

621

regs_set_return_msr(regs, regs->msr & ~MSR_VSX);

arch/powerpc/kernel/signal_32.c

622

if (msr & MSR_VSX) {

arch/powerpc/kernel/signal_32.c

643

if (msr & MSR_VEC)

arch/powerpc/kernel/signal_32.c

653

if (msr & MSR_VSX) {

arch/powerpc/kernel/signal_32.c

688

regs_set_return_msr(regs, (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK));

arch/powerpc/kernel/signal_32.c

700

msr_check_and_set(msr & (MSR_FP | MSR_VEC));

arch/powerpc/kernel/signal_32.c

701

if (msr & MSR_FP) {

arch/powerpc/kernel/signal_32.c

703

regs_set_return_msr(regs, regs->msr | (MSR_FP | current->thread.fpexc_mode));

arch/powerpc/kernel/signal_32.c

705

if (msr & MSR_VEC) {

arch/powerpc/kernel/signal_32.c

707

regs_set_return_msr(regs, regs->msr | MSR_VEC);

arch/powerpc/kernel/signal_32.c

746

unsigned long msr = regs->msr;

arch/powerpc/kernel/signal_32.c

754

if (MSR_TM_ACTIVE(msr))

arch/powerpc/kernel/signal_32.c

771

if (MSR_TM_ACTIVE(msr)) {

arch/powerpc/kernel/signal_32.c

778

unsafe_save_tm_user_regs(regs, mctx, tm_mctx, msr, failed);

arch/powerpc/kernel/signal_32.c

819

regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (MSR_KERNEL & MSR_LE));

arch/powerpc/kernel/signal_32.c

846

unsigned long msr = regs->msr;

arch/powerpc/kernel/signal_32.c

854

if (MSR_TM_ACTIVE(msr))

arch/powerpc/kernel/signal_32.c

876

if (MSR_TM_ACTIVE(msr))

arch/powerpc/kernel/signal_32.c

877

unsafe_save_tm_user_regs(regs, mctx, tm_mctx, msr, failed);

arch/powerpc/kernel/signal_32.c

907

regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (MSR_KERNEL & MSR_LE));

arch/powerpc/kernel/signal_64.c

130

unsigned long msr = regs->msr;

arch/powerpc/kernel/signal_64.c

147

msr |= MSR_VEC;

arch/powerpc/kernel/signal_64.c

163

msr &= ~MSR_VSX;

arch/powerpc/kernel/signal_64.c

176

msr |= MSR_VSX;

arch/powerpc/kernel/signal_64.c

181

unsafe_put_user(msr, &sc->gp_regs[PT_MSR], efault_out);

arch/powerpc/kernel/signal_64.c

210

unsigned long msr)

arch/powerpc/kernel/signal_64.c

229

BUG_ON(!MSR_TM_ACTIVE(msr));

arch/powerpc/kernel/signal_64.c

237

msr |= tsk->thread.ckpt_regs.msr & (MSR_FP | MSR_VEC | MSR_VSX);

arch/powerpc/kernel/signal_64.c

251

if (msr & MSR_VEC)

arch/powerpc/kernel/signal_64.c

263

msr |= MSR_VEC;

arch/powerpc/kernel/signal_64.c

271

if (msr & MSR_VEC)

arch/powerpc/kernel/signal_64.c

285

if (msr & MSR_FP)

arch/powerpc/kernel/signal_64.c

302

if (msr & MSR_VSX)

arch/powerpc/kernel/signal_64.c

310

msr |= MSR_VSX;

arch/powerpc/kernel/signal_64.c

319

err |= __put_user(msr, &tm_sc->gp_regs[PT_MSR]);

arch/powerpc/kernel/signal_64.c

320

err |= __put_user(msr, &sc->gp_regs[PT_MSR]);

arch/powerpc/kernel/signal_64.c

344

unsigned long msr;

arch/powerpc/kernel/signal_64.c

360

unsafe_get_user(msr, &sc->gp_regs[PT_MSR], efault_out);

arch/powerpc/kernel/signal_64.c

362

regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (msr & MSR_LE));

arch/powerpc/kernel/signal_64.c

387

regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX));

arch/powerpc/kernel/signal_64.c

394

if (v_regs != NULL && (msr & MSR_VEC) != 0) {

arch/powerpc/kernel/signal_64.c

418

if ((msr & MSR_VSX) != 0) {

arch/powerpc/kernel/signal_64.c

445

unsigned long msr;

arch/powerpc/kernel/signal_64.c

473

err |= __get_user(msr, &sc->gp_regs[PT_MSR]);

arch/powerpc/kernel/signal_64.c

475

if (MSR_TM_RESV(msr))

arch/powerpc/kernel/signal_64.c

479

regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (msr & MSR_LE));

arch/powerpc/kernel/signal_64.c

506

regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX));

arch/powerpc/kernel/signal_64.c

518

if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) {

arch/powerpc/kernel/signal_64.c

552

if (v_regs && ((msr & MSR_VSX) != 0)) {

arch/powerpc/kernel/signal_64.c

576

regs_set_return_msr(regs, regs->msr | (msr & MSR_TS_MASK));

arch/powerpc/kernel/signal_64.c

594

regs_set_return_msr(regs, regs->msr | MSR_TM);

arch/powerpc/kernel/signal_64.c

599

msr_check_and_set(msr & (MSR_FP | MSR_VEC));

arch/powerpc/kernel/signal_64.c

600

if (msr & MSR_FP) {

arch/powerpc/kernel/signal_64.c

602

regs_set_return_msr(regs, regs->msr | (MSR_FP | tsk->thread.fpexc_mode));

arch/powerpc/kernel/signal_64.c

604

if (msr & MSR_VEC) {

arch/powerpc/kernel/signal_64.c

606

regs_set_return_msr(regs, regs->msr | MSR_VEC);

arch/powerpc/kernel/signal_64.c

749

unsigned long msr;

arch/powerpc/kernel/signal_64.c

798

regs_set_return_msr(regs, regs->msr & ~MSR_TS_MASK);

arch/powerpc/kernel/signal_64.c

800

if (__get_user(msr, &uc->uc_mcontext.gp_regs[PT_MSR]))

arch/powerpc/kernel/signal_64.c

804

if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && MSR_TM_ACTIVE(msr)) {

arch/powerpc/kernel/signal_64.c

831

current->thread.regs->msr & ~MSR_TS_MASK);

arch/powerpc/kernel/signal_64.c

865

unsigned long msr = regs->msr;

arch/powerpc/kernel/signal_64.c

873

if (!MSR_TM_ACTIVE(msr))

arch/powerpc/kernel/signal_64.c

886

if (MSR_TM_ACTIVE(msr)) {

arch/powerpc/kernel/signal_64.c

899

msr);

arch/powerpc/kernel/signal_64.c

955

regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (MSR_KERNEL & MSR_LE));

arch/powerpc/kernel/syscall.c

87

unlikely(MSR_TM_TRANSACTIONAL(regs->msr)))

arch/powerpc/kernel/syscall.c

97

if (unlikely(MSR_TM_TRANSACTIONAL(regs->msr)) &&

arch/powerpc/kernel/syscalls.c

116

current->thread.regs->msr ^ MSR_LE);

arch/powerpc/kernel/traps.c

1094

regs->nip, regs->msr, regs->trap);

arch/powerpc/kernel/traps.c

1102

regs->nip, regs->msr, regs->trap);

arch/powerpc/kernel/traps.c

1110

regs->nip, regs->msr, regs->trap);

arch/powerpc/kernel/traps.c

1255

if ((regs->msr & MSR_64BIT) == 0)

arch/powerpc/kernel/traps.c

1333

if (MSR_TM_TRANSACTIONAL(regs->msr)) {

arch/powerpc/kernel/traps.c

1509

if (!is_kernel_addr(bugaddr) && !(regs->msr & MSR_IR))

arch/powerpc/kernel/traps.c

1547

regs->nip, regs->msr, get_paca()->tm_scratch);

arch/powerpc/kernel/traps.c

1636

regs_set_return_msr(regs, regs->msr | REASON_ILLEGAL);

arch/powerpc/kernel/traps.c

1729

regs_set_return_msr(regs, regs->msr | MSR_TM);

arch/powerpc/kernel/traps.c

1849

hv ? "Hypervisor " : "", facility, status, regs->nip, regs->msr);

arch/powerpc/kernel/traps.c

1863

regs->nip, regs->msr);

arch/powerpc/kernel/traps.c

1899

regs->nip, regs->msr);

arch/powerpc/kernel/traps.c

1917

regs->nip, regs->msr);

arch/powerpc/kernel/traps.c

2018

regs_set_return_msr(regs, regs->msr | MSR_DE);

arch/powerpc/kernel/traps.c

2039

regs_set_return_msr(regs, regs->msr & ~MSR_DE);

arch/powerpc/kernel/traps.c

2050

regs_set_return_msr(regs, regs->msr | MSR_DE);

arch/powerpc/kernel/traps.c

2064

regs_set_return_msr(regs, regs->msr & ~MSR_DE);

arch/powerpc/kernel/traps.c

2086

regs_set_return_msr(regs, regs->msr | MSR_DE);

arch/powerpc/kernel/traps.c

2204

if (regs->msr & MSR_SPE)

arch/powerpc/kernel/traps.c

2239

regs->trap, regs->nip, regs->msr);

arch/powerpc/kernel/traps.c

402

if (!(regs->msr & MSR_RI))

arch/powerpc/kernel/traps.c

404

if (!(regs->msr & MSR_HV))

arch/powerpc/kernel/traps.c

436

regs->msr &= ~MSR_RI;

arch/powerpc/kernel/traps.c

534

unsigned long msr = regs->msr;

arch/powerpc/kernel/traps.c

538

if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))

arch/powerpc/kernel/traps.c

587

#define get_reason(regs) ((regs)->msr)

arch/powerpc/kernel/traps.c

596

#define single_stepping(regs) ((regs)->msr & MSR_SE)

arch/powerpc/kernel/traps.c

597

#define clear_single_step(regs) (regs_set_return_msr((regs), (regs)->msr & ~MSR_SE))

arch/powerpc/kernel/traps.c

598

#define clear_br_trace(regs) (regs_set_return_msr((regs), (regs)->msr & ~MSR_BE))

arch/powerpc/kernel/traps.c

760

unsigned long reason = regs->msr;

arch/powerpc/kernel/traps.c

856

udbg_printf("SRR0=0x%016lx SRR1=0x%016lx\n", regs->nip, regs->msr);

arch/powerpc/kernel/traps.c

889

unsigned long ea, msr, msr_mask;

arch/powerpc/kernel/traps.c

910

msr = regs->msr; /* Grab msr before we flush the bits */

arch/powerpc/kernel/traps.c

918

swap = (msr & MSR_LE) != (MSR_KERNEL & MSR_LE);

arch/powerpc/kernel/traps.c

977

if (!(msr & msr_mask)) {

arch/powerpc/kernel/traps.c

981

regs->nip, instr, msr);

arch/powerpc/kvm/book3s.c

562

regs->msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s.c

590

kvmppc_set_msr(vcpu, regs->msr);

arch/powerpc/kvm/book3s.c

801

void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)

arch/powerpc/kvm/book3s.c

803

vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);

arch/powerpc/kvm/book3s.h

34

extern void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr);

arch/powerpc/kvm/book3s_32_mmu.c

354

u64 msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_32_mmu.c

356

if (msr & (MSR_DR|MSR_IR)) {

arch/powerpc/kvm/book3s_32_mmu.c

365

switch (msr & (MSR_DR|MSR_IR)) {

arch/powerpc/kvm/book3s_32_mmu.c

385

if (msr & MSR_PR)

arch/powerpc/kvm/book3s_64_mmu.c

580

u64 msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_64_mmu.c

582

if (msr & (MSR_DR|MSR_IR)) {

arch/powerpc/kvm/book3s_64_mmu.c

595

switch (msr & (MSR_DR|MSR_IR)) {

arch/powerpc/kvm/book3s_hv.c

1650

vcpu->arch.shregs.msr);

arch/powerpc/kvm/book3s_hv.c

4253

unsigned long msr, i;

arch/powerpc/kvm/book3s_hv.c

4264

msr = mfmsr();

arch/powerpc/kvm/book3s_hv.c

4265

kvmppc_msr_hard_disable_set_facilities(vcpu, msr);

arch/powerpc/kvm/book3s_hv.c

4313

unsigned long msr;

arch/powerpc/kvm/book3s_hv.c

4319

msr = mfmsr();

arch/powerpc/kvm/book3s_hv.c

4331

kvmppc_msr_hard_disable_set_facilities(vcpu, msr);

arch/powerpc/kvm/book3s_hv.c

4336

msr = mfmsr(); /* TM restore can update msr */

arch/powerpc/kvm/book3s_hv.c

4344

vcpu->arch.regs.msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv.c

4389

vcpu->arch.shregs.msr = vcpu->arch.regs.msr;

arch/powerpc/kvm/book3s_hv.c

492

vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap);

arch/powerpc/kvm/book3s_hv.c

5091

unsigned long msr;

arch/powerpc/kvm/book3s_hv.c

5112

(current->thread.regs->msr & MSR_TM)) {

arch/powerpc/kvm/book3s_hv.c

5113

if (MSR_TM_ACTIVE(current->thread.regs->msr)) {

arch/powerpc/kvm/book3s_hv.c

5137

msr = 0;

arch/powerpc/kvm/book3s_hv.c

5139

msr |= MSR_FP;

arch/powerpc/kvm/book3s_hv.c

5141

msr |= MSR_VEC;

arch/powerpc/kvm/book3s_hv.c

5143

msr |= MSR_VSX;

arch/powerpc/kvm/book3s_hv.c

5147

msr |= MSR_TM;

arch/powerpc/kvm/book3s_hv.c

5148

msr = msr_check_and_set(msr);

arch/powerpc/kvm/book3s_hv.c

813

dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);

arch/powerpc/kvm/book3s_hv.h

58

vcpu->arch.shregs.msr = val;

arch/powerpc/kvm/book3s_hv.h

65

return vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_builtin.c

507

void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)

arch/powerpc/kvm/book3s_hv_builtin.c

510

msr = (msr | MSR_ME) & ~MSR_HV;

arch/powerpc/kvm/book3s_hv_builtin.c

516

if ((msr & MSR_TS_MASK) == MSR_TS_MASK)

arch/powerpc/kvm/book3s_hv_builtin.c

517

msr &= ~MSR_TS_MASK;

arch/powerpc/kvm/book3s_hv_builtin.c

518

__kvmppc_set_msr_hv(vcpu, msr);

arch/powerpc/kvm/book3s_hv_builtin.c

525

unsigned long msr, pc, new_msr, new_pc;

arch/powerpc/kvm/book3s_hv_builtin.c

527

msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_hv_builtin.c

533

if (MSR_TM_TRANSACTIONAL(msr))

arch/powerpc/kvm/book3s_hv_builtin.c

536

new_msr |= msr & MSR_TS_MASK;

arch/powerpc/kvm/book3s_hv_builtin.c

548

(msr & (MSR_IR|MSR_DR)) == (MSR_IR|MSR_DR) ) {

arch/powerpc/kvm/book3s_hv_builtin.c

554

kvmppc_set_srr1(vcpu, (msr & SRR1_MSR_BITS) | srr1_flags);

arch/powerpc/kvm/book3s_hv_builtin.c

584

if (vcpu->arch.shregs.msr & MSR_EE) {

arch/powerpc/kvm/book3s_hv_nested.c

1452

vcpu->arch.shregs.msr &= SRR1_MSR_BITS;

arch/powerpc/kvm/book3s_hv_nested.c

1453

vcpu->arch.shregs.msr |= flags;

arch/powerpc/kvm/book3s_hv_nested.c

309

if (MSR_TM_TRANSACTIONAL(vcpu->arch.shregs.msr))

arch/powerpc/kvm/book3s_hv_nested.c

339

if (MSR_TM_SUSPENDED(vcpu->arch.shregs.msr)) {

arch/powerpc/kvm/book3s_hv_nested.c

340

if (!MSR_TM_ACTIVE(l2_regs.msr))

arch/powerpc/kvm/book3s_hv_nested.c

343

if (l2_regs.msr & MSR_TS_MASK)

arch/powerpc/kvm/book3s_hv_nested.c

345

if (WARN_ON_ONCE(vcpu->arch.shregs.msr & MSR_TS_MASK))

arch/powerpc/kvm/book3s_hv_nested.c

360

vcpu->arch.regs.msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_nested.c

376

vcpu->arch.shregs.msr = (vcpu->arch.regs.msr | MSR_ME) & ~MSR_HV;

arch/powerpc/kvm/book3s_hv_nested.c

389

l2_regs.msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_nested.c

399

vcpu->arch.shregs.msr = saved_l1_regs.msr & ~MSR_TS_MASK;

arch/powerpc/kvm/book3s_hv_nested.c

401

if (l2_regs.msr & MSR_TS_MASK)

arch/powerpc/kvm/book3s_hv_nested.c

402

vcpu->arch.shregs.msr |= MSR_TS_S;

arch/powerpc/kvm/book3s_hv_nestedv2.c

323

vcpu->arch.shregs.msr);

arch/powerpc/kvm/book3s_hv_nestedv2.c

571

vcpu->arch.shregs.msr = kvmppc_gse_get_u64(gse);

arch/powerpc/kvm/book3s_hv_p9_entry.c

129

unsigned long guest_msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_p9_entry.c

494

unsigned long kvmppc_msr_hard_disable_set_facilities(struct kvm_vcpu *vcpu, unsigned long msr)

arch/powerpc/kvm/book3s_hv_p9_entry.c

498

msr &= ~MSR_EE;

arch/powerpc/kvm/book3s_hv_p9_entry.c

520

if ((msr & msr_needed) != msr_needed) {

arch/powerpc/kvm/book3s_hv_p9_entry.c

521

msr |= msr_needed;

arch/powerpc/kvm/book3s_hv_p9_entry.c

522

__mtmsrd(msr, 0);

arch/powerpc/kvm/book3s_hv_p9_entry.c

528

return msr;

arch/powerpc/kvm/book3s_hv_p9_entry.c

542

unsigned long msr;

arch/powerpc/kvm/book3s_hv_p9_entry.c

558

WARN_ON_ONCE(vcpu->arch.shregs.msr & MSR_HV);

arch/powerpc/kvm/book3s_hv_p9_entry.c

559

WARN_ON_ONCE(!(vcpu->arch.shregs.msr & MSR_ME));

arch/powerpc/kvm/book3s_hv_p9_entry.c

564

msr = mfmsr() & ~MSR_EE;

arch/powerpc/kvm/book3s_hv_p9_entry.c

587

msr = kvmppc_msr_hard_disable_set_facilities(vcpu, msr);

arch/powerpc/kvm/book3s_hv_p9_entry.c

594

msr = mfmsr(); /* MSR may have been updated */

arch/powerpc/kvm/book3s_hv_p9_entry.c

645

mtspr(SPRN_HSRR1, (vcpu->arch.shregs.msr & ~MSR_HV) | MSR_ME);

arch/powerpc/kvm/book3s_hv_p9_entry.c

693

__mtmsrd(msr & ~(MSR_IR|MSR_DR|MSR_RI), 0);

arch/powerpc/kvm/book3s_hv_p9_entry.c

808

(vcpu->arch.shregs.msr & MSR_TS_S)) {

arch/powerpc/kvm/book3s_hv_p9_entry.c

815

mtspr(SPRN_HSRR1, vcpu->arch.shregs.msr);

arch/powerpc/kvm/book3s_hv_p9_entry.c

872

vcpu->arch.shregs.msr & MSR_TS_MASK)

arch/powerpc/kvm/book3s_hv_p9_entry.c

873

msr |= MSR_TS_S;

arch/powerpc/kvm/book3s_hv_p9_entry.c

874

__mtmsrd(msr, 0);

arch/powerpc/kvm/book3s_hv_p9_entry.c

94

unsigned long guest_msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_ras.c

71

unsigned long srr1 = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_rm_mmu.c

1241

key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS;

arch/powerpc/kvm/book3s_hv_rm_mmu.c

1258

if (data && (vcpu->arch.shregs.msr & MSR_DR)) {

arch/powerpc/kvm/book3s_hv_rm_mmu.c

1294

if (data && (vcpu->arch.shregs.msr & MSR_IR))

arch/powerpc/kvm/book3s_hv_tm.c

105

WARN_ON_ONCE(!(MSR_TM_SUSPENDED(msr) &&

arch/powerpc/kvm/book3s_hv_tm.c

111

msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;

arch/powerpc/kvm/book3s_hv_tm.c

112

vcpu->arch.shregs.msr = msr;

arch/powerpc/kvm/book3s_hv_tm.c

122

WARN_ON_ONCE(!(MSR_TM_SUSPENDED(msr) &&

arch/powerpc/kvm/book3s_hv_tm.c

126

newmsr = (newmsr & ~MSR_LE) | (msr & MSR_LE);

arch/powerpc/kvm/book3s_hv_tm.c

128

vcpu->arch.shregs.msr = newmsr;

arch/powerpc/kvm/book3s_hv_tm.c

135

if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206)) {

arch/powerpc/kvm/book3s_hv_tm.c

147

if (!(msr & MSR_TM)) {

arch/powerpc/kvm/book3s_hv_tm.c

157

(((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29);

arch/powerpc/kvm/book3s_hv_tm.c

160

if (MSR_TM_SUSPENDED(msr))

arch/powerpc/kvm/book3s_hv_tm.c

161

msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;

arch/powerpc/kvm/book3s_hv_tm.c

163

if (MSR_TM_TRANSACTIONAL(msr))

arch/powerpc/kvm/book3s_hv_tm.c

164

msr = (msr & ~MSR_TS_MASK) | MSR_TS_S;

arch/powerpc/kvm/book3s_hv_tm.c

166

vcpu->arch.shregs.msr = msr;

arch/powerpc/kvm/book3s_hv_tm.c

179

if (!(msr & MSR_TM)) {

arch/powerpc/kvm/book3s_hv_tm.c

188

if (!MSR_TM_ACTIVE(msr)) {

arch/powerpc/kvm/book3s_hv_tm.c

19

u64 msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_tm.c

204

(((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29);

arch/powerpc/kvm/book3s_hv_tm.c

205

vcpu->arch.shregs.msr &= ~MSR_TS_MASK;

arch/powerpc/kvm/book3s_hv_tm.c

219

if (!(msr & MSR_TM)) {

arch/powerpc/kvm/book3s_hv_tm.c

228

if (MSR_TM_ACTIVE(msr) || !(vcpu->arch.texasr & TEXASR_FS)) {

arch/powerpc/kvm/book3s_hv_tm.c

23

if (MSR_TM_SUSPENDED(vcpu->arch.shregs.msr))

arch/powerpc/kvm/book3s_hv_tm.c

237

(((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29);

arch/powerpc/kvm/book3s_hv_tm.c

238

vcpu->arch.shregs.msr = msr | MSR_TS_S;

arch/powerpc/kvm/book3s_hv_tm.c

25

if (msr & MSR_PR) {

arch/powerpc/kvm/book3s_hv_tm.c

45

u64 msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_tm.c

74

WARN_ON_ONCE(!(MSR_TM_SUSPENDED(msr) &&

arch/powerpc/kvm/book3s_hv_tm.c

78

vcpu->arch.shregs.msr = newmsr;

arch/powerpc/kvm/book3s_hv_tm.c

84

if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206)) {

arch/powerpc/kvm/book3s_hv_tm.c

96

if ((msr & MSR_PR) && !(vcpu->arch.fscr & FSCR_EBB)) {

arch/powerpc/kvm/book3s_hv_tm_builtin.c

115

vcpu->arch.shregs.msr &= ~MSR_TS_MASK; /* go to N state */

arch/powerpc/kvm/book3s_hv_tm_builtin.c

23

u64 newmsr, msr, bescr;

arch/powerpc/kvm/book3s_hv_tm_builtin.c

45

vcpu->arch.shregs.msr = newmsr;

arch/powerpc/kvm/book3s_hv_tm_builtin.c

52

msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_tm_builtin.c

53

if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206))

arch/powerpc/kvm/book3s_hv_tm_builtin.c

57

((msr & MSR_PR) && !(mfspr(SPRN_FSCR) & FSCR_EBB)))

arch/powerpc/kvm/book3s_hv_tm_builtin.c

67

msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;

arch/powerpc/kvm/book3s_hv_tm_builtin.c

68

vcpu->arch.shregs.msr = msr;

arch/powerpc/kvm/book3s_hv_tm_builtin.c

77

msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_tm_builtin.c

82

newmsr = (newmsr & ~MSR_LE) | (msr & MSR_LE);

arch/powerpc/kvm/book3s_hv_tm_builtin.c

84

vcpu->arch.shregs.msr = newmsr;

arch/powerpc/kvm/book3s_hv_tm_builtin.c

90

msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/book3s_hv_tm_builtin.c

92

if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206))

arch/powerpc/kvm/book3s_hv_tm_builtin.c

95

if (!(vcpu->arch.hfscr & HFSCR_TM) || !(msr & MSR_TM))

arch/powerpc/kvm/book3s_hv_tm_builtin.c

99

vcpu->arch.shregs.msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;

arch/powerpc/kvm/book3s_paired_singles.c

158

u64 msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_paired_singles.c

160

msr = kvmppc_set_field(msr, 33, 36, 0);

arch/powerpc/kvm/book3s_paired_singles.c

161

msr = kvmppc_set_field(msr, 42, 47, 0);

arch/powerpc/kvm/book3s_paired_singles.c

162

kvmppc_set_msr(vcpu, msr);

arch/powerpc/kvm/book3s_pr.c

1058

u64 msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_pr.c

1060

kvmppc_set_msr(vcpu, msr | MSR_SE);

arch/powerpc/kvm/book3s_pr.c

1067

u64 msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_pr.c

1069

kvmppc_set_msr(vcpu, msr & ~MSR_SE);

arch/powerpc/kvm/book3s_pr.c

109

unsigned long msr, pc, new_msr, new_pc;

arch/powerpc/kvm/book3s_pr.c

113

msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_pr.c

120

if (MSR_TM_TRANSACTIONAL(msr))

arch/powerpc/kvm/book3s_pr.c

123

new_msr |= msr & MSR_TS_MASK;

arch/powerpc/kvm/book3s_pr.c

127

kvmppc_set_srr1(vcpu, (msr & SRR1_MSR_BITS) | srr1_flags);

arch/powerpc/kvm/book3s_pr.c

466

static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)

arch/powerpc/kvm/book3s_pr.c

472

msr = (msr & ~MSR_HV) | MSR_ME;

arch/powerpc/kvm/book3s_pr.c

475

printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);

arch/powerpc/kvm/book3s_pr.c

483

if (!(msr & MSR_PR) && MSR_TM_TRANSACTIONAL(msr))

arch/powerpc/kvm/book3s_pr.c

489

msr &= to_book3s(vcpu)->msr_mask;

arch/powerpc/kvm/book3s_pr.c

490

kvmppc_set_msr_fast(vcpu, msr);

arch/powerpc/kvm/book3s_pr.c

493

if (msr & MSR_POW) {

arch/powerpc/kvm/book3s_pr.c

499

msr &= ~MSR_POW;

arch/powerpc/kvm/book3s_pr.c

500

kvmppc_set_msr_fast(vcpu, msr);

arch/powerpc/kvm/book3s_pr.c

515

if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {

arch/powerpc/kvm/book3s_pr.c

518

if (msr & MSR_DR)

arch/powerpc/kvm/book3s_pr.c

534

!(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {

arch/powerpc/kvm/book3s_pr.c

54

ulong msr);

arch/powerpc/kvm/book3s_pr.c

69

ulong msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_pr.c

70

return (msr & (MSR_IR|MSR_DR)) == MSR_DR;

arch/powerpc/kvm/book3s_pr.c

75

ulong msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/book3s_pr.c

79

if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)

arch/powerpc/kvm/book3s_pr.c

797

void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)

arch/powerpc/kvm/book3s_pr.c

805

if (msr & MSR_VSX)

arch/powerpc/kvm/book3s_pr.c

806

msr |= MSR_FP | MSR_VEC;

arch/powerpc/kvm/book3s_pr.c

808

msr &= vcpu->arch.guest_owned_ext;

arch/powerpc/kvm/book3s_pr.c

809

if (!msr)

arch/powerpc/kvm/book3s_pr.c

813

printk(KERN_INFO "Giving up ext 0x%lx\n", msr);

arch/powerpc/kvm/book3s_pr.c

816

if (msr & MSR_FP) {

arch/powerpc/kvm/book3s_pr.c

822

if (t->regs->msr & MSR_FP)

arch/powerpc/kvm/book3s_pr.c

828

if (msr & MSR_VEC) {

arch/powerpc/kvm/book3s_pr.c

829

if (current->thread.regs->msr & MSR_VEC)

arch/powerpc/kvm/book3s_pr.c

835

vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);

arch/powerpc/kvm/book3s_pr.c

860

ulong msr)

arch/powerpc/kvm/book3s_pr.c

868

if (!(kvmppc_get_msr(vcpu) & msr)) {

arch/powerpc/kvm/book3s_pr.c

873

if (msr == MSR_VSX) {

arch/powerpc/kvm/book3s_pr.c

887

msr = MSR_FP | MSR_VEC | MSR_VSX;

arch/powerpc/kvm/book3s_pr.c

891

msr &= ~vcpu->arch.guest_owned_ext;

arch/powerpc/kvm/book3s_pr.c

892

if (!msr)

arch/powerpc/kvm/book3s_pr.c

896

printk(KERN_INFO "Loading up ext 0x%lx\n", msr);

arch/powerpc/kvm/book3s_pr.c

899

if (msr & MSR_FP) {

arch/powerpc/kvm/book3s_pr.c

908

if (msr & MSR_VEC) {

arch/powerpc/kvm/book3s_pr.c

919

t->regs->msr |= msr;

arch/powerpc/kvm/book3s_pr.c

920

vcpu->arch.guest_owned_ext |= msr;

arch/powerpc/kvm/book3s_pr.c

934

lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;

arch/powerpc/kvm/book3s_pr.c

954

current->thread.regs->msr |= lost_ext;

arch/powerpc/kvm/booke.c

1151

if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {

arch/powerpc/kvm/booke.c

1177

if (vcpu->arch.shared->msr & MSR_SPE)

arch/powerpc/kvm/booke.c

1255

if (!(vcpu->arch.shared->msr & MSR_PR)) {

arch/powerpc/kvm/booke.c

1269

if (!(vcpu->arch.shared->msr & MSR_PR) &&

arch/powerpc/kvm/booke.c

1290

if (!(vcpu->arch.shared->msr & MSR_PR) &&

arch/powerpc/kvm/booke.c

135

if (vcpu->arch.shared->msr & MSR_SPE) {

arch/powerpc/kvm/booke.c

1458

regs->msr = vcpu->arch.shared->msr;

arch/powerpc/kvm/booke.c

1489

kvmppc_set_msr(vcpu, regs->msr);

arch/powerpc/kvm/booke.c

160

if (!(current->thread.regs->msr & MSR_FP)) {

arch/powerpc/kvm/booke.c

165

current->thread.regs->msr |= MSR_FP;

arch/powerpc/kvm/booke.c

177

if (current->thread.regs->msr & MSR_FP)

arch/powerpc/kvm/booke.c

189

vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;

arch/powerpc/kvm/booke.c

1987

if (!(vcpu->arch.shared->msr & MSR_PR) &&

arch/powerpc/kvm/booke.c

202

if (!(current->thread.regs->msr & MSR_VEC)) {

arch/powerpc/kvm/booke.c

207

current->thread.regs->msr |= MSR_VEC;

arch/powerpc/kvm/booke.c

2147

vcpu->arch.shared->msr = 0;

arch/powerpc/kvm/booke.c

221

if (current->thread.regs->msr & MSR_VEC)

arch/powerpc/kvm/booke.c

233

vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;

arch/powerpc/kvm/booke.c

243

vcpu->arch.shared->msr |= MSR_DE;

arch/powerpc/kvm/booke.c

246

vcpu->arch.shared->msr &= ~MSR_DE;

arch/powerpc/kvm/booke.c

257

u32 old_msr = vcpu->arch.shared->msr;

arch/powerpc/kvm/booke.c

263

vcpu->arch.shared->msr = new_msr;

arch/powerpc/kvm/booke.c

426

ulong new_msr = vcpu->arch.shared->msr;

arch/powerpc/kvm/booke.c

429

if (!(vcpu->arch.shared->msr & MSR_SF)) {

arch/powerpc/kvm/booke.c

437

crit = crit && !(vcpu->arch.shared->msr & MSR_PR);

arch/powerpc/kvm/booke.c

477

allowed = vcpu->arch.shared->msr & MSR_CE;

arch/powerpc/kvm/booke.c

483

allowed = vcpu->arch.shared->msr & MSR_ME;

arch/powerpc/kvm/booke.c

493

allowed = vcpu->arch.shared->msr & MSR_EE;

arch/powerpc/kvm/booke.c

499

allowed = vcpu->arch.shared->msr & MSR_DE;

arch/powerpc/kvm/booke.c

514

vcpu->arch.shared->msr);

arch/powerpc/kvm/booke.c

518

vcpu->arch.shared->msr);

arch/powerpc/kvm/booke.c

522

vcpu->arch.shared->msr);

arch/powerpc/kvm/booke.c

526

vcpu->arch.shared->msr);

arch/powerpc/kvm/booke.c

722

if (vcpu->arch.shared->msr & MSR_WE) {

arch/powerpc/kvm/booke.c

881

if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&

arch/powerpc/kvm/booke.c

886

if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))

arch/powerpc/kvm/booke.c

918

ulong r1, msr, lr;

arch/powerpc/kvm/booke.c

922

asm("mfmsr %0" : "=r"(msr));

arch/powerpc/kvm/booke.c

927

regs->msr = msr;

arch/powerpc/kvm/booke.c

95

vcpu->arch.shared->msr);

arch/powerpc/kvm/booke_emulate.c

80

kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr);

arch/powerpc/kvm/booke_emulate.c

90

vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE)

arch/powerpc/kvm/booke_emulate.c

96

vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE)

arch/powerpc/kvm/e500.h

213

return !!(vcpu->arch.shared->msr & (MSR_IS | MSR_DS));

arch/powerpc/kvm/e500.h

218

return !!(vcpu->arch.shared->msr & MSR_PR);

arch/powerpc/kvm/e500.h

261

if (get_tlb_ts(tlbe) != !!(vcpu->arch.shared->msr & MSR_IS))

arch/powerpc/kvm/e500_mmu.c

412

if (!(vcpu->arch.shared->msr & MSR_CM))

arch/powerpc/kvm/e500_mmu.c

497

unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);

arch/powerpc/kvm/e500_mmu.c

504

unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);

arch/powerpc/kvm/e500_mmu.c

511

unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);

arch/powerpc/kvm/e500_mmu.c

518

unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);

arch/powerpc/kvm/e500_mmu_host.c

308

u32 pr = vcpu->arch.shared->msr & MSR_PR;

arch/powerpc/kvm/e500_mmu_host.c

601

addr_space = (vcpu->arch.shared->msr & MSR_IS) >> MSR_IR_LG;

arch/powerpc/kvm/e500_mmu_host.c

631

pr = vcpu->arch.shared->msr & MSR_PR;

arch/powerpc/kvm/emulate_loadstore.c

95

vcpu->arch.regs.msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/powerpc.c

154

shared->msr = swab64(shared->msr);

arch/powerpc/kvm/trace_booke.h

45

__field( unsigned long, msr )

arch/powerpc/kvm/trace_booke.h

54

__entry->msr = vcpu->arch.shared->msr;

arch/powerpc/kvm/trace_booke.h

66

__entry->msr,

arch/powerpc/kvm/trace_hv.h

273

__field(unsigned long, msr)

arch/powerpc/kvm/trace_hv.h

282

__entry->msr = vcpu->arch.shregs.msr;

arch/powerpc/kvm/trace_hv.h

288

__entry->pc, __entry->msr, __entry->ceded

arch/powerpc/kvm/trace_pr.h

224

__field( unsigned long, msr )

arch/powerpc/kvm/trace_pr.h

234

__entry->msr = kvmppc_get_msr(vcpu);

arch/powerpc/kvm/trace_pr.h

248

__entry->msr,

arch/powerpc/lib/sstep.c

1021

if (regs->msr & MSR_FP) {

arch/powerpc/lib/sstep.c

1034

if (regs->msr & MSR_VEC) {

arch/powerpc/lib/sstep.c

1071

ea = truncate_if_32bit(regs->msr, ea);

arch/powerpc/lib/sstep.c

1143

if (!(regs->msr & MSR_64BIT))

arch/powerpc/lib/sstep.c

1175

val = truncate_if_32bit(regs->msr, val);

arch/powerpc/lib/sstep.c

1176

val1 = truncate_if_32bit(regs->msr, val1);

arch/powerpc/lib/sstep.c

1376

op->val = truncate_if_32bit(regs->msr, imm);

arch/powerpc/lib/sstep.c

1400

op->val = truncate_if_32bit(regs->msr, imm);

arch/powerpc/lib/sstep.c

1420

op->val = truncate_if_32bit(regs->msr, imm);

arch/powerpc/lib/sstep.c

3230

next_pc = truncate_if_32bit(regs->msr, regs->nip + GETLENGTH(op->type));

arch/powerpc/lib/sstep.c

3332

cross_endian = (regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE);

arch/powerpc/lib/sstep.c

3333

ea = truncate_if_32bit(regs->msr, op->ea);

arch/powerpc/lib/sstep.c

3436

if (!user_mode(regs) && !(regs->msr & MSR_FP))

arch/powerpc/lib/sstep.c

3443

if (!user_mode(regs) && !(regs->msr & MSR_VEC))

arch/powerpc/lib/sstep.c

3458

if (!user_mode(regs) && !(regs->msr & msrbit))

arch/powerpc/lib/sstep.c

3506

if (!user_mode(regs) && !(regs->msr & MSR_FP))

arch/powerpc/lib/sstep.c

3513

if (!user_mode(regs) && !(regs->msr & MSR_VEC))

arch/powerpc/lib/sstep.c

3528

if (!user_mode(regs) && !(regs->msr & msrbit))

arch/powerpc/lib/sstep.c

3603

ea = truncate_if_32bit(regs->msr, op.ea);

arch/powerpc/lib/sstep.c

3635

regs->gpr[op.reg] = regs->msr & MSR_MASK;

arch/powerpc/lib/sstep.c

3644

regs_set_return_msr(regs, (regs->msr & ~op.val) | (val & op.val));

arch/powerpc/lib/sstep.c

3668

truncate_if_32bit(regs->msr, regs->nip + GETLENGTH(op.type)));

arch/powerpc/lib/sstep.c

611

if (regs->msr & MSR_FP)

arch/powerpc/lib/sstep.c

618

if (regs->msr & MSR_FP)

arch/powerpc/lib/sstep.c

647

if (regs->msr & MSR_FP)

arch/powerpc/lib/sstep.c

659

if (regs->msr & MSR_FP)

arch/powerpc/lib/sstep.c

700

if (regs->msr & MSR_VEC)

arch/powerpc/lib/sstep.c

72

static nokprobe_inline unsigned long truncate_if_32bit(unsigned long msr,

arch/powerpc/lib/sstep.c

726

if (regs->msr & MSR_VEC)

arch/powerpc/lib/sstep.c

75

if ((msr & MSR_64BIT) == 0)

arch/powerpc/lib/sstep.c

975

if (regs->msr & MSR_FP) {

arch/powerpc/lib/sstep.c

988

if (regs->msr & MSR_VEC) {

arch/powerpc/lib/test_emulate_step.c

1685

exp.msr = MSR_KERNEL;

arch/powerpc/lib/test_emulate_step.c

1686

got.msr = MSR_KERNEL;

arch/powerpc/lib/test_emulate_step.c

58

static unsigned long msr;

arch/powerpc/lib/test_emulate_step.c

64

regs->msr = msr;

arch/powerpc/lib/test_emulate_step.c

68

asm volatile("mfmsr %0" : "=r"(regs->msr));

arch/powerpc/lib/test_emulate_step.c

70

regs->msr |= MSR_FP;

arch/powerpc/lib/test_emulate_step.c

71

regs->msr |= MSR_VEC;

arch/powerpc/lib/test_emulate_step.c

72

regs->msr |= MSR_VSX;

arch/powerpc/lib/test_emulate_step.c

74

msr = regs->msr;

arch/powerpc/mm/book3s64/hash_pgtable.c

437

unsigned long msr, tmp, flags;

arch/powerpc/mm/book3s64/hash_pgtable.c

469

[msr] "=&r" (msr), [tmp] "=&b" (tmp), "+m" (*p)

arch/powerpc/mm/book3s64/hash_utils.c

2171

MSR_TM_ACTIVE(current->thread.regs->msr)) {

arch/powerpc/mm/cacheflush.c

114

: "r" (nb), "r" (msr), "i" (bytes), "r" (msr0)

arch/powerpc/mm/cacheflush.c

89

unsigned long msr, msr0;

arch/powerpc/mm/cacheflush.c

93

msr = msr0 & ~MSR_DR;

arch/powerpc/perf/core-book3s.c

264

if ((regs->msr & MSR_HV) && freeze_events_kernel != MMCR0_FCHV)

arch/powerpc/perf/perf_regs.c

56

PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),

arch/powerpc/platforms/44x/uic.c

201

u32 msr;

arch/powerpc/platforms/44x/uic.c

211

msr = mfdcr(uic->dcrbase + UIC_MSR);

arch/powerpc/platforms/44x/uic.c

212

if (!msr) /* spurious interrupt */

arch/powerpc/platforms/44x/uic.c

215

src = 32 - ffs(msr);

arch/powerpc/platforms/44x/uic.c

323

u32 msr;

arch/powerpc/platforms/44x/uic.c

328

msr = mfdcr(primary_uic->dcrbase + UIC_MSR);

arch/powerpc/platforms/44x/uic.c

329

src = 32 - ffs(msr);

arch/powerpc/platforms/52xx/mpc52xx_pm.c

118

u32 msr, hid0;

arch/powerpc/platforms/52xx/mpc52xx_pm.c

149

msr = mfmsr();

arch/powerpc/platforms/52xx/mpc52xx_pm.c

150

mtmsr(msr & ~MSR_POW);

arch/powerpc/platforms/52xx/mpc52xx_pm.c

169

mtmsr(msr & ~MSR_POW);

arch/powerpc/platforms/52xx/mpc52xx_pm.c

171

mtmsr(msr);

arch/powerpc/platforms/83xx/misc.c

141

if (!(regs->msr & SRR1_MCE_MCP) || !(ipic_get_mcp_status() & mask))

arch/powerpc/platforms/8xx/machine_check.c

13

unsigned long reason = regs->msr;

arch/powerpc/platforms/pasemi/idle.c

39

if (regs->msr & SRR1_WAKEMASK)

arch/powerpc/platforms/pasemi/idle.c

42

switch (regs->msr & SRR1_WAKEMASK) {

arch/powerpc/platforms/pasemi/setup.c

321

srr1 = regs->msr;

arch/powerpc/platforms/powernv/opal-call.c

100

unsigned long msr = mfmsr();

arch/powerpc/platforms/powernv/opal-call.c

101

bool mmu = (msr & (MSR_IR|MSR_DR));

arch/powerpc/platforms/powernv/opal-call.c

107

msr &= ~MSR_EE;

arch/powerpc/platforms/powernv/opal-call.c

110

return __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr);

arch/powerpc/platforms/powernv/opal-call.c

116

ret = __opal_call_trace(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr);

arch/powerpc/platforms/powernv/opal-call.c

118

ret = __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr);

arch/powerpc/platforms/powernv/opal-call.c

71

unsigned long opcode, unsigned long msr)

arch/powerpc/platforms/powernv/opal-call.c

76

ret = __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr);

arch/powerpc/platforms/powernv/opal-call.c

88

unsigned long opcode, unsigned long msr)

arch/powerpc/platforms/powernv/opal-fadump.h

116

regs->msr = reg_val;

arch/powerpc/platforms/pseries/ras.c

495

if ((be64_to_cpu(regs->msr) &

arch/powerpc/platforms/pseries/rtas-fadump.c

317

regs->msr = (unsigned long)reg_val;

arch/powerpc/sysdev/fsl_pci.c

1072

if (regs->msr & MSR_GS)

arch/powerpc/xmon/xmon.c

1179

regs_set_return_msr(regs, regs->msr | MSR_DE);

arch/powerpc/xmon/xmon.c

1195

if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {

arch/powerpc/xmon/xmon.c

1212

regs_set_return_msr(regs, regs->msr | MSR_SE);

arch/powerpc/xmon/xmon.c

1841

printf(" msr: %lx\n", fp->msr);

arch/powerpc/xmon/xmon.c

1910

printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);

arch/powerpc/xmon/xmon.c

2031

unsigned long msr;

arch/powerpc/xmon/xmon.c

2042

msr = mfmsr();

arch/powerpc/xmon/xmon.c

2043

if (msr & MSR_TM) {

arch/powerpc/xmon/xmon.c

2063

if (!(msr & MSR_HV))

arch/powerpc/xmon/xmon.c

543

if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))

arch/powerpc/xmon/xmon.c

692

if (regs->msr & MSR_DE) {

arch/powerpc/xmon/xmon.c

700

if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {

arch/powerpc/xmon/xmon.c

753

if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))

arch/powerpc/xmon/xmon.c

786

if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))

arch/powerpc/xmon/xmon.c

801

if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))

arch/powerpc/xmon/xmon.c

826

if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {

arch/sh/include/asm/smc37c93x.h

78

volatile __u16 msr;

arch/x86/boot/compressed/sev.c

362

struct msr m;

arch/x86/boot/compressed/sev.c

446

struct msr m;

arch/x86/boot/compressed/sev.c

498

struct msr m;

arch/x86/boot/compressed/sev.h

21

struct msr m;

arch/x86/boot/compressed/sev.h

30

struct msr m;

arch/x86/boot/cpucheck.c

135

struct msr m;

arch/x86/boot/cpucheck.c

149

struct msr m;

arch/x86/boot/cpucheck.c

160

struct msr m, m_tmp;

arch/x86/boot/startup/sev-shared.c

662

u64 val, msr;

arch/x86/boot/startup/sev-shared.c

672

msr = sev_es_rd_ghcb_msr();

arch/x86/boot/startup/sev-shared.c

684

sev_es_wr_ghcb_msr(msr);

arch/x86/boot/startup/sme.c

495

u64 msr;

arch/x86/boot/startup/sme.c

528

sev_status = msr = native_rdmsrq(MSR_AMD64_SEV);

arch/x86/boot/startup/sme.c

529

feature_mask = (msr & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;

arch/x86/boot/startup/sme.c

535

if (snp_en ^ !!(msr & MSR_AMD64_SEV_SNP_ENABLED))

arch/x86/boot/startup/sme.c

559

msr = native_rdmsrq(MSR_AMD64_SYSCFG);

arch/x86/boot/startup/sme.c

560

if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT))

arch/x86/coco/sev/core.c

1007

u64 msr = APIC_BASE_MSR + (reg >> 4);

arch/x86/coco/sev/core.c

1009

.cx = msr,

arch/x86/coco/sev/core.c

1025

pr_err("Secure AVIC MSR (0x%llx) write returned error (%d)\n", msr, res);

arch/x86/coco/sev/core.c

981

u64 msr = APIC_BASE_MSR + (reg >> 4);

arch/x86/coco/sev/core.c

982

struct pt_regs regs = { .cx = msr };

arch/x86/coco/sev/core.c

995

pr_err("Secure AVIC MSR (0x%llx) read returned error (%d)\n", msr, res);

arch/x86/coco/sev/vc-shared.c

554

struct msr m;

arch/x86/events/amd/ibs.c

1059

#define ibs_fetch_msr_idx(msr) (msr - MSR_AMD64_IBSFETCHCTL)

arch/x86/events/amd/ibs.c

1060

#define ibs_op_msr_idx(msr) (msr - MSR_AMD64_IBSOPCTL)

arch/x86/events/amd/ibs.c

1236

unsigned int msr;

arch/x86/events/amd/ibs.c

1258

msr = hwc->config_base;

arch/x86/events/amd/ibs.c

1260

rdmsrq(msr, *buf);

arch/x86/events/amd/ibs.c

1278

rdmsrq(msr + offset, *buf++);

arch/x86/events/amd/ibs.c

369

hwc->config_base = perf_ibs->msr;

arch/x86/events/amd/ibs.c

797

.msr = MSR_AMD64_IBSFETCHCTL,

arch/x86/events/amd/ibs.c

822

.msr = MSR_AMD64_IBSOPCTL,

arch/x86/events/amd/ibs.c

85

unsigned int msr;

arch/x86/events/core.c

182

for (er = extra_regs; er->msr; er++) {

arch/x86/events/core.c

193

reg->reg = er->msr;

arch/x86/events/intel/core.c

2780

u32 msr;

arch/x86/events/intel/core.c

2783

msr = MSR_IA32_PMC_V6_GP0_CFG_C +

arch/x86/events/intel/core.c

2786

msr = MSR_IA32_PMC_V6_FX0_CFG_C +

arch/x86/events/intel/core.c

2791

wrmsrq(msr, ext);

arch/x86/events/intel/core.c

5012

.msr = MSR_CORE_PERF_GLOBAL_CTRL,

arch/x86/events/intel/core.c

5030

.msr = MSR_IA32_PEBS_ENABLE,

arch/x86/events/intel/core.c

5041

.msr = MSR_IA32_DS_AREA,

arch/x86/events/intel/core.c

5048

.msr = MSR_PEBS_DATA_CFG,

arch/x86/events/intel/core.c

5056

.msr = MSR_IA32_PEBS_ENABLE,

arch/x86/events/intel/core.c

5084

arr[idx].msr = x86_pmu_config_addr(idx);

arch/x86/events/intel/core.c

6489

static bool is_lbr_from(unsigned long msr)

arch/x86/events/intel/core.c

6493

return x86_pmu.lbr_from <= msr && msr < lbr_from_nr;

arch/x86/events/intel/core.c

6500

static bool check_msr(unsigned long msr, u64 mask)

arch/x86/events/intel/core.c

6516

if (rdmsrq_safe(msr, &val_old))

arch/x86/events/intel/core.c

6524

if (is_lbr_from(msr))

arch/x86/events/intel/core.c

6527

if (wrmsrq_safe(msr, val_tmp) ||

arch/x86/events/intel/core.c

6528

rdmsrq_safe(msr, &val_new))

arch/x86/events/intel/core.c

6538

if (is_lbr_from(msr))

arch/x86/events/intel/core.c

6544

wrmsrq(msr, val_old);

arch/x86/events/intel/core.c

7368

for (er = extra_regs; er->msr; er++) {

arch/x86/events/intel/core.c

7369

er->extra_msr_access = check_msr(er->msr, 0x11UL);

arch/x86/events/intel/cstate.c

299

event->hw.event_base = core_msr[cfg].msr;

arch/x86/events/intel/cstate.c

306

event->hw.event_base = pkg_msr[cfg].msr;

arch/x86/events/intel/cstate.c

313

event->hw.event_base = module_msr[cfg].msr;

arch/x86/events/intel/cstate.c

684

pkg_msr[PERF_CSTATE_PKG_C6_RES].msr = MSR_PKG_C7_RESIDENCY;

arch/x86/events/intel/cstate.c

688

pkg_msr[PERF_CSTATE_CORE_C6_RES].msr = MSR_KNL_CORE_C6_RESIDENCY;

arch/x86/events/intel/p4.c

1161

#define P4_ESCR_MSR_IDX(msr) (msr - P4_ESCR_MSR_BASE)

arch/x86/events/intel/p4.c

1162

#define P4_ESCR_MSR_TABLE_ENTRY(msr) [P4_ESCR_MSR_IDX(msr)] = msr

arch/x86/events/intel/uncore_nhmex.c

214

unsigned msr = uncore_msr_box_ctl(box);

arch/x86/events/intel/uncore_nhmex.c

217

if (msr) {

arch/x86/events/intel/uncore_nhmex.c

218

rdmsrq(msr, config);

arch/x86/events/intel/uncore_nhmex.c

223

wrmsrq(msr, config);

arch/x86/events/intel/uncore_nhmex.c

229

unsigned msr = uncore_msr_box_ctl(box);

arch/x86/events/intel/uncore_nhmex.c

232

if (msr) {

arch/x86/events/intel/uncore_nhmex.c

233

rdmsrq(msr, config);

arch/x86/events/intel/uncore_nhmex.c

238

wrmsrq(msr, config);

arch/x86/events/intel/uncore_nhmex.c

773

unsigned msr;

arch/x86/events/intel/uncore_nhmex.c

780

for (er = nhmex_uncore_mbox_extra_regs; er->msr; er++) {

arch/x86/events/intel/uncore_nhmex.c

786

msr = er->msr + type->msr_offset * box->pmu->pmu_idx;

arch/x86/events/intel/uncore_nhmex.c

787

if (WARN_ON_ONCE(msr >= 0xffff || er->idx >= 0xff))

arch/x86/events/intel/uncore_nhmex.c

799

reg1->reg |= msr << (reg_idx * 16);

arch/x86/events/intel/uncore_snbep.c

1008

for (er = snbep_uncore_cbox_extra_regs; er->msr; er++) {

arch/x86/events/intel/uncore_snbep.c

106

.msr = SNBEP_C0_MSR_PMON_BOX_FILTER, \

arch/x86/events/intel/uncore_snbep.c

1518

unsigned msr = uncore_msr_box_ctl(box);

arch/x86/events/intel/uncore_snbep.c

1519

if (msr)

arch/x86/events/intel/uncore_snbep.c

1520

wrmsrq(msr, IVBEP_PMON_BOX_CTL_INT);

arch/x86/events/intel/uncore_snbep.c

1749

for (er = ivbep_uncore_cbox_extra_regs; er->msr; er++) {

arch/x86/events/intel/uncore_snbep.c

2177

for (er = knl_uncore_cha_extra_regs; er->msr; er++) {

arch/x86/events/intel/uncore_snbep.c

2732

for (er = hswep_uncore_cbox_extra_regs; er->msr; er++) {

arch/x86/events/intel/uncore_snbep.c

2795

unsigned msr = uncore_msr_box_ctl(box);

arch/x86/events/intel/uncore_snbep.c

2797

if (msr) {

arch/x86/events/intel/uncore_snbep.c

2804

wrmsrq(msr, flags);

arch/x86/events/intel/uncore_snbep.c

3573

for (er = skx_uncore_cha_extra_regs; er->msr; er++) {

arch/x86/events/intel/uncore_snbep.c

641

unsigned msr;

arch/x86/events/intel/uncore_snbep.c

643

msr = uncore_msr_box_ctl(box);

arch/x86/events/intel/uncore_snbep.c

644

if (msr) {

arch/x86/events/intel/uncore_snbep.c

645

rdmsrq(msr, config);

arch/x86/events/intel/uncore_snbep.c

647

wrmsrq(msr, config);

arch/x86/events/intel/uncore_snbep.c

654

unsigned msr;

arch/x86/events/intel/uncore_snbep.c

656

msr = uncore_msr_box_ctl(box);

arch/x86/events/intel/uncore_snbep.c

657

if (msr) {

arch/x86/events/intel/uncore_snbep.c

658

rdmsrq(msr, config);

arch/x86/events/intel/uncore_snbep.c

660

wrmsrq(msr, config);

arch/x86/events/intel/uncore_snbep.c

685

unsigned msr = uncore_msr_box_ctl(box);

arch/x86/events/intel/uncore_snbep.c

687

if (msr)

arch/x86/events/intel/uncore_snbep.c

688

wrmsrq(msr, SNBEP_PMON_BOX_CTL_INT);

arch/x86/events/msr.c

158

static struct perf_msr msr[] = {

arch/x86/events/msr.c

226

event->hw.event_base = msr[cfg].msr;

arch/x86/events/msr.c

313

msr_mask = perf_msr_probe(msr, PERF_MSR_EVENT_MAX, true, NULL);

arch/x86/events/perf_event.h

616

unsigned int msr;

arch/x86/events/perf_event.h

625

.msr = (ms), \

arch/x86/events/perf_event.h

632

#define INTEL_EVENT_EXTRA_REG(event, msr, vm, idx) \

arch/x86/events/perf_event.h

633

EVENT_EXTRA_REG(event, msr, ARCH_PERFMON_EVENTSEL_EVENT, vm, idx)

arch/x86/events/perf_event.h

635

#define INTEL_UEVENT_EXTRA_REG(event, msr, vm, idx) \

arch/x86/events/perf_event.h

636

EVENT_EXTRA_REG(event, msr, ARCH_PERFMON_EVENTSEL_EVENT | \

arch/x86/events/probe.c

21

perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data)

arch/x86/events/probe.c

31

if (!msr[bit].no_check) {

arch/x86/events/probe.c

32

struct attribute_group *grp = msr[bit].grp;

arch/x86/events/probe.c

42

if (!msr[bit].msr)

arch/x86/events/probe.c

45

if (msr[bit].test && !msr[bit].test(bit, data))

arch/x86/events/probe.c

48

if (rdmsrq_safe(msr[bit].msr, &val))

arch/x86/events/probe.c

51

mask = msr[bit].mask;

arch/x86/events/probe.h

15

perf_msr_probe(struct perf_msr *msr, int cnt, bool no_zero, void *data);

arch/x86/events/probe.h

7

u64 msr;

arch/x86/events/rapl.c

399

event->hw.event_base = rapl_model->rapl_pkg_msrs[bit].msr;

arch/x86/events/rapl.c

406

event->hw.event_base = rapl_model->rapl_core_msrs[bit].msr;

arch/x86/hyperv/hv_crash.c

142

#define hv_wrmsr(msr, val) \

arch/x86/hyperv/hv_crash.c

143

asm volatile("wrmsr" :: "c"(msr), "a"((u32)val), "d"((u32)(val >> 32)) : "memory")

arch/x86/hyperv/hv_init.c

120

union hv_vp_assist_msr_contents msr = { 0 };

arch/x86/hyperv/hv_init.c

137

rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);

arch/x86/hyperv/hv_init.c

138

*hvp = memremap(msr.pfn << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT,

arch/x86/hyperv/hv_init.c

165

msr.pfn = vmalloc_to_pfn(*hvp);

arch/x86/hyperv/hv_init.c

169

msr.enable = 1;

arch/x86/hyperv/hv_init.c

170

wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);

arch/x86/hyperv/hv_init.c

290

union hv_vp_assist_msr_contents msr = { 0 };

arch/x86/hyperv/hv_init.c

300

rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);

arch/x86/hyperv/hv_init.c

301

msr.enable = 0;

arch/x86/hyperv/hv_init.c

303

wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);

arch/x86/hyperv/ivm.c

189

static void hv_ghcb_msr_write(u64 msr, u64 value)

arch/x86/hyperv/ivm.c

208

ghcb_set_rcx(&hv_ghcb->ghcb, msr);

arch/x86/hyperv/ivm.c

213

pr_warn("Fail to write msr via ghcb %llx.\n", msr);

arch/x86/hyperv/ivm.c

218

static void hv_ghcb_msr_read(u64 msr, u64 *value)

arch/x86/hyperv/ivm.c

240

ghcb_set_rcx(&hv_ghcb->ghcb, msr);

arch/x86/hyperv/ivm.c

242

pr_warn("Fail to read msr via ghcb %llx.\n", msr);

arch/x86/hyperv/ivm.c

403

static inline void hv_ghcb_msr_write(u64 msr, u64 value) {}

arch/x86/hyperv/ivm.c

404

static inline void hv_ghcb_msr_read(u64 msr, u64 *value) {}

arch/x86/hyperv/ivm.c

409

static void hv_tdx_msr_write(u64 msr, u64 val)

arch/x86/hyperv/ivm.c

414

.r12 = msr,

arch/x86/hyperv/ivm.c

423

static void hv_tdx_msr_read(u64 msr, u64 *val)

arch/x86/hyperv/ivm.c

428

.r12 = msr,

arch/x86/hyperv/ivm.c

453

static inline void hv_tdx_msr_write(u64 msr, u64 value) {}

arch/x86/hyperv/ivm.c

454

static inline void hv_tdx_msr_read(u64 msr, u64 *value) {}

arch/x86/hyperv/ivm.c

459

void hv_ivm_msr_write(u64 msr, u64 value)

arch/x86/hyperv/ivm.c

465

hv_tdx_msr_write(msr, value);

arch/x86/hyperv/ivm.c

467

hv_ghcb_msr_write(msr, value);

arch/x86/hyperv/ivm.c

470

void hv_ivm_msr_read(u64 msr, u64 *value)

arch/x86/hyperv/ivm.c

476

hv_tdx_msr_read(msr, value);

arch/x86/hyperv/ivm.c

478

hv_ghcb_msr_read(msr, value);

arch/x86/include/asm/apic.h

117

u64 msr;

arch/x86/include/asm/apic.h

119

if (rdmsrq_safe(MSR_IA32_APICBASE, &msr))

arch/x86/include/asm/apic.h

121

return msr & X2APIC_ENABLE;

arch/x86/include/asm/apic.h

218

u64 msr;

arch/x86/include/asm/apic.h

223

rdmsrq(APIC_BASE_MSR + (reg >> 4), msr);

arch/x86/include/asm/apic.h

224

return (u32)msr;

arch/x86/include/asm/kvm_host.h

1766

int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);

arch/x86/include/asm/kvm_host.h

1767

int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);

arch/x86/include/asm/kvm_host.h

1941

int (*get_feature_msr)(u32 msr, u64 *data);

arch/x86/include/asm/kvm_host.h

2208

int kvm_emulate_rdmsr_imm(struct kvm_vcpu *vcpu, u32 msr, int reg);

arch/x86/include/asm/kvm_host.h

2210

int kvm_emulate_wrmsr_imm(struct kvm_vcpu *vcpu, u32 msr, int reg);

arch/x86/include/asm/kvm_host.h

2245

int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);

arch/x86/include/asm/kvm_host.h

2246

int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);

arch/x86/include/asm/kvm_host.h

2351

static inline unsigned long read_msr(unsigned long msr)

arch/x86/include/asm/kvm_host.h

2355

rdmsrq(msr, value);

arch/x86/include/asm/kvm_host.h

2406

int kvm_add_user_return_msr(u32 msr);

arch/x86/include/asm/kvm_host.h

2407

int kvm_find_user_return_msr(u32 msr);

arch/x86/include/asm/kvm_host.h

2411

static inline bool kvm_is_supported_user_return_msr(u32 msr)

arch/x86/include/asm/kvm_host.h

2413

return kvm_find_user_return_msr(msr) >= 0;

arch/x86/include/asm/mshyperv.h

211

void hv_ivm_msr_write(u64 msr, u64 value);

arch/x86/include/asm/mshyperv.h

212

void hv_ivm_msr_read(u64 msr, u64 *value);

arch/x86/include/asm/mshyperv.h

215

static inline void hv_ivm_msr_write(u64 msr, u64 value) {}

arch/x86/include/asm/mshyperv.h

216

static inline void hv_ivm_msr_read(u64 msr, u64 *value) {}

arch/x86/include/asm/msr-trace.h

22

TP_PROTO(unsigned msr, u64 val, int failed),

arch/x86/include/asm/msr-trace.h

23

TP_ARGS(msr, val, failed),

arch/x86/include/asm/msr-trace.h

25

__field( unsigned, msr )

arch/x86/include/asm/msr-trace.h

3

#define TRACE_SYSTEM msr

arch/x86/include/asm/msr-trace.h

30

__entry->msr = msr;

arch/x86/include/asm/msr-trace.h

35

__entry->msr,

arch/x86/include/asm/msr-trace.h

41

TP_PROTO(unsigned msr, u64 val, int failed),

arch/x86/include/asm/msr-trace.h

42

TP_ARGS(msr, val, failed)

arch/x86/include/asm/msr-trace.h

46

TP_PROTO(unsigned msr, u64 val, int failed),

arch/x86/include/asm/msr-trace.h

47

TP_ARGS(msr, val, failed)

arch/x86/include/asm/msr-trace.h

51

TP_PROTO(unsigned msr, u64 val, int failed),

arch/x86/include/asm/msr-trace.h

52

TP_ARGS(msr, val, failed)

arch/x86/include/asm/msr-trace.h

6

#define TRACE_INCLUDE_FILE msr-trace

arch/x86/include/asm/msr.h

101

#define native_wrmsrq(msr, val) \

arch/x86/include/asm/msr.h

102

__wrmsrq((msr), (val))

arch/x86/include/asm/msr.h

104

static inline u64 native_read_msr(u32 msr)

arch/x86/include/asm/msr.h

108

val = __rdmsr(msr);

arch/x86/include/asm/msr.h

111

do_trace_read_msr(msr, val, 0);

arch/x86/include/asm/msr.h

116

static inline int native_read_msr_safe(u32 msr, u64 *p)

arch/x86/include/asm/msr.h

125

: "c" (msr));

arch/x86/include/asm/msr.h

127

do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), err);

arch/x86/include/asm/msr.h

135

static inline void notrace native_write_msr(u32 msr, u64 val)

arch/x86/include/asm/msr.h

137

native_wrmsrq(msr, val);

arch/x86/include/asm/msr.h

140

do_trace_write_msr(msr, val, 0);

arch/x86/include/asm/msr.h

144

static inline int notrace native_write_msr_safe(u32 msr, u64 val)

arch/x86/include/asm/msr.h

152

: "c" (msr), "0" ((u32)val), "d" ((u32)(val >> 32))

arch/x86/include/asm/msr.h

155

do_trace_write_msr(msr, val, err);

arch/x86/include/asm/msr.h

182

#define rdmsr(msr, low, high) \

arch/x86/include/asm/msr.h

184

u64 __val = native_read_msr((msr)); \

arch/x86/include/asm/msr.h

189

static inline void wrmsr(u32 msr, u32 low, u32 high)

arch/x86/include/asm/msr.h

191

native_write_msr(msr, (u64)high << 32 | low);

arch/x86/include/asm/msr.h

194

#define rdmsrq(msr, val) \

arch/x86/include/asm/msr.h

195

((val) = native_read_msr((msr)))

arch/x86/include/asm/msr.h

197

static inline void wrmsrq(u32 msr, u64 val)

arch/x86/include/asm/msr.h

199

native_write_msr(msr, val);

arch/x86/include/asm/msr.h

20

struct msr reg;

arch/x86/include/asm/msr.h

203

static inline int wrmsrq_safe(u32 msr, u64 val)

arch/x86/include/asm/msr.h

205

return native_write_msr_safe(msr, val);

arch/x86/include/asm/msr.h

209

#define rdmsr_safe(msr, low, high) \

arch/x86/include/asm/msr.h

21

struct msr __percpu *msrs;

arch/x86/include/asm/msr.h

212

int __err = native_read_msr_safe((msr), &__val); \

arch/x86/include/asm/msr.h

218

static inline int rdmsrq_safe(u32 msr, u64 *p)

arch/x86/include/asm/msr.h

220

return native_read_msr_safe(msr, p);

arch/x86/include/asm/msr.h

234

static __always_inline void wrmsrns(u32 msr, u64 val)

arch/x86/include/asm/msr.h

242

: : "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)));

arch/x86/include/asm/msr.h

248

static inline int wrmsr_safe(u32 msr, u32 low, u32 high)

arch/x86/include/asm/msr.h

250

return wrmsrq_safe(msr, (u64)high << 32 | low);

arch/x86/include/asm/msr.h

253

struct msr __percpu *msrs_alloc(void);

arch/x86/include/asm/msr.h

254

void msrs_free(struct msr __percpu *msrs);

arch/x86/include/asm/msr.h

255

int msr_set_bit(u32 msr, u8 bit);

arch/x86/include/asm/msr.h

256

int msr_clear_bit(u32 msr, u8 bit);

arch/x86/include/asm/msr.h

263

void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);

arch/x86/include/asm/msr.h

264

void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);

arch/x86/include/asm/msr.h

293

struct msr __percpu *msrs)

arch/x86/include/asm/msr.h

298

struct msr __percpu *msrs)

arch/x86/include/asm/msr.h

330

#define rdmsrl(msr, val) rdmsrq(msr, val)

arch/x86/include/asm/msr.h

331

#define wrmsrl(msr, val) wrmsrq(msr, val)

arch/x86/include/asm/msr.h

332

#define rdmsrl_on_cpu(cpu, msr, q) rdmsrq_on_cpu(cpu, msr, q)

arch/x86/include/asm/msr.h

50

extern void do_trace_write_msr(u32 msr, u64 val, int failed);

arch/x86/include/asm/msr.h

51

extern void do_trace_read_msr(u32 msr, u64 val, int failed);

arch/x86/include/asm/msr.h

52

extern void do_trace_rdpmc(u32 msr, u64 val, int failed);

arch/x86/include/asm/msr.h

54

static inline void do_trace_write_msr(u32 msr, u64 val, int failed) {}

arch/x86/include/asm/msr.h

55

static inline void do_trace_read_msr(u32 msr, u64 val, int failed) {}

arch/x86/include/asm/msr.h

56

static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}

arch/x86/include/asm/msr.h

66

static __always_inline u64 __rdmsr(u32 msr)

arch/x86/include/asm/msr.h

73

: EAX_EDX_RET(val, low, high) : "c" (msr));

arch/x86/include/asm/msr.h

78

static __always_inline void __wrmsrq(u32 msr, u64 val)

arch/x86/include/asm/msr.h

83

: : "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)) : "memory");

arch/x86/include/asm/msr.h

86

#define native_rdmsr(msr, val1, val2) \

arch/x86/include/asm/msr.h

88

u64 __val = __rdmsr((msr)); \

arch/x86/include/asm/msr.h

93

static __always_inline u64 native_rdmsrq(u32 msr)

arch/x86/include/asm/msr.h

95

return __rdmsr(msr);

arch/x86/include/asm/msr.h

98

#define native_wrmsr(msr, low, high) \

arch/x86/include/asm/msr.h

99

__wrmsrq((msr), (u64)(high) << 32 | (low))

arch/x86/include/asm/nospec-branch.h

526

void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)

arch/x86/include/asm/nospec-branch.h

529

: : "c" (msr),

arch/x86/include/asm/paravirt.h

144

static inline u64 paravirt_read_msr(u32 msr)

arch/x86/include/asm/paravirt.h

146

return PVOP_CALL1(u64, pv_ops, cpu.read_msr, msr);

arch/x86/include/asm/paravirt.h

149

static inline void paravirt_write_msr(u32 msr, u64 val)

arch/x86/include/asm/paravirt.h

151

PVOP_VCALL2(pv_ops, cpu.write_msr, msr, val);

arch/x86/include/asm/paravirt.h

154

static inline int paravirt_read_msr_safe(u32 msr, u64 *val)

arch/x86/include/asm/paravirt.h

156

return PVOP_CALL2(int, pv_ops, cpu.read_msr_safe, msr, val);

arch/x86/include/asm/paravirt.h

159

static inline int paravirt_write_msr_safe(u32 msr, u64 val)

arch/x86/include/asm/paravirt.h

161

return PVOP_CALL2(int, pv_ops, cpu.write_msr_safe, msr, val);

arch/x86/include/asm/paravirt.h

164

#define rdmsr(msr, val1, val2) \

arch/x86/include/asm/paravirt.h

166

u64 _l = paravirt_read_msr(msr); \

arch/x86/include/asm/paravirt.h

171

static __always_inline void wrmsr(u32 msr, u32 low, u32 high)

arch/x86/include/asm/paravirt.h

173

paravirt_write_msr(msr, (u64)high << 32 | low);

arch/x86/include/asm/paravirt.h

176

#define rdmsrq(msr, val) \

arch/x86/include/asm/paravirt.h

178

val = paravirt_read_msr(msr); \

arch/x86/include/asm/paravirt.h

181

static inline void wrmsrq(u32 msr, u64 val)

arch/x86/include/asm/paravirt.h

183

paravirt_write_msr(msr, val);

arch/x86/include/asm/paravirt.h

186

static inline int wrmsrq_safe(u32 msr, u64 val)

arch/x86/include/asm/paravirt.h

188

return paravirt_write_msr_safe(msr, val);

arch/x86/include/asm/paravirt.h

192

#define rdmsr_safe(msr, a, b) \

arch/x86/include/asm/paravirt.h

195

int _err = paravirt_read_msr_safe((msr), &_l); \

arch/x86/include/asm/paravirt.h

201

static __always_inline int rdmsrq_safe(u32 msr, u64 *p)

arch/x86/include/asm/paravirt.h

203

return paravirt_read_msr_safe(msr, p);

arch/x86/include/asm/paravirt_types.h

73

u64 (*read_msr)(u32 msr);

arch/x86/include/asm/paravirt_types.h

74

void (*write_msr)(u32 msr, u64 val);

arch/x86/include/asm/paravirt_types.h

80

int (*read_msr_safe)(u32 msr, u64 *val);

arch/x86/include/asm/paravirt_types.h

81

int (*write_msr_safe)(u32 msr, u64 val);

arch/x86/include/asm/perf_event.h

735

unsigned msr;

arch/x86/include/asm/sev-common.h

104

#define GHCB_MSR_PSC_REQ_TO_GFN(msr) (((msr) & GENMASK_ULL(51, 12)) >> 12)

arch/x86/include/asm/sev-common.h

105

#define GHCB_MSR_PSC_REQ_TO_OP(msr) (((msr) & GENMASK_ULL(55, 52)) >> 52)

arch/x86/include/asm/shared/msr.h

20

static inline void raw_rdmsr(unsigned int reg, struct msr *m)

arch/x86/include/asm/shared/msr.h

25

static inline void raw_wrmsr(unsigned int reg, const struct msr *m)

arch/x86/include/uapi/asm/kvm.h

605

__u32 msr;

arch/x86/kernel/amd_nb.c

144

u64 base, msr;

arch/x86/kernel/amd_nb.c

153

rdmsrq_safe(MSR_FAM10H_MMIO_CONF_BASE, &msr))

arch/x86/kernel/amd_nb.c

157

if (!(msr & FAM10H_MMIO_CONF_ENABLE))

arch/x86/kernel/amd_nb.c

160

base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);

arch/x86/kernel/amd_nb.c

162

segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &

arch/x86/kernel/apic/apic.c

1703

u64 msr;

arch/x86/kernel/apic/apic.c

1707

rdmsrq(MSR_IA32_XAPIC_DISABLE_STATUS, msr);

arch/x86/kernel/apic/apic.c

1708

return (msr & LEGACY_XAPIC_DISABLED);

arch/x86/kernel/apic/apic.c

1715

u64 msr;

arch/x86/kernel/apic/apic.c

1720

rdmsrq(MSR_IA32_APICBASE, msr);

arch/x86/kernel/apic/apic.c

1721

if (!(msr & X2APIC_ENABLE))

arch/x86/kernel/apic/apic.c

1724

wrmsrq(MSR_IA32_APICBASE, msr & ~(X2APIC_ENABLE | XAPIC_ENABLE));

arch/x86/kernel/apic/apic.c

1725

wrmsrq(MSR_IA32_APICBASE, msr & ~X2APIC_ENABLE);

arch/x86/kernel/apic/apic.c

1731

u64 msr;

arch/x86/kernel/apic/apic.c

1733

rdmsrq(MSR_IA32_APICBASE, msr);

arch/x86/kernel/apic/apic.c

1734

if (msr & X2APIC_ENABLE)

arch/x86/kernel/apic/apic.c

1736

wrmsrq(MSR_IA32_APICBASE, msr | X2APIC_ENABLE);

arch/x86/kernel/cpu/amd.c

36

static inline int rdmsrq_amd_safe(unsigned msr, u64 *p)

arch/x86/kernel/cpu/amd.c

44

gprs[1] = msr;

arch/x86/kernel/cpu/amd.c

54

static inline int wrmsrq_amd_safe(unsigned msr, u64 val)

arch/x86/kernel/cpu/amd.c

546

u64 msr;

arch/x86/kernel/cpu/amd.c

581

rdmsrq(MSR_AMD64_SYSCFG, msr);

arch/x86/kernel/cpu/amd.c

582

if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT))

arch/x86/kernel/cpu/amd.c

598

rdmsrq(MSR_K7_HWCR, msr);

arch/x86/kernel/cpu/amd.c

599

if (!(msr & MSR_K7_HWCR_SMMLOCK))

arch/x86/kernel/cpu/amd.c

62

gprs[1] = msr;

arch/x86/kernel/cpu/aperfmperf.c

154

u64 msr;

arch/x86/kernel/cpu/aperfmperf.c

162

err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT, &msr);

arch/x86/kernel/cpu/aperfmperf.c

166

fratio = (msr >> 8) & 0xFF;

arch/x86/kernel/cpu/aperfmperf.c

175

delta_fratio = (msr >> (i + 5)) & 0x7;

arch/x86/kernel/cpu/aperfmperf.c

221

u64 msr;

arch/x86/kernel/cpu/aperfmperf.c

228

err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT, &msr);

arch/x86/kernel/cpu/aperfmperf.c

233

*turbo_freq = (msr >> 24) & 0xFF; /* 4C turbo */

arch/x86/kernel/cpu/aperfmperf.c

237

*turbo_freq = msr & 0xFF; /* 1C turbo */

arch/x86/kernel/cpu/common.c

607

u64 msr = 0;

arch/x86/kernel/cpu/common.c

610

rdmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

612

wrmsrq(MSR_IA32_S_CET, msr & ~CET_ENDBR_EN);

arch/x86/kernel/cpu/common.c

615

return msr;

arch/x86/kernel/cpu/common.c

620

u64 msr;

arch/x86/kernel/cpu/common.c

623

rdmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

624

msr &= ~CET_ENDBR_EN;

arch/x86/kernel/cpu/common.c

625

msr |= (save & CET_ENDBR_EN);

arch/x86/kernel/cpu/common.c

626

wrmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/feat_ctl.c

120

u64 msr;

arch/x86/kernel/cpu/feat_ctl.c

122

if (rdmsrq_safe(MSR_IA32_FEAT_CTL, &msr)) {

arch/x86/kernel/cpu/feat_ctl.c

142

if (msr & FEAT_CTL_LOCKED)

arch/x86/kernel/cpu/feat_ctl.c

149

msr = FEAT_CTL_LOCKED;

arch/x86/kernel/cpu/feat_ctl.c

157

msr |= FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX;

arch/x86/kernel/cpu/feat_ctl.c

160

msr |= FEAT_CTL_VMX_ENABLED_INSIDE_SMX;

arch/x86/kernel/cpu/feat_ctl.c

164

msr |= FEAT_CTL_SGX_ENABLED;

arch/x86/kernel/cpu/feat_ctl.c

166

msr |= FEAT_CTL_SGX_LC_ENABLED;

arch/x86/kernel/cpu/feat_ctl.c

169

wrmsrq(MSR_IA32_FEAT_CTL, msr);

arch/x86/kernel/cpu/feat_ctl.c

177

if ( (tboot && !(msr & FEAT_CTL_VMX_ENABLED_INSIDE_SMX)) ||

arch/x86/kernel/cpu/feat_ctl.c

178

(!tboot && !(msr & FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX))) {

arch/x86/kernel/cpu/feat_ctl.c

190

if (!(msr & FEAT_CTL_SGX_ENABLED)) {

arch/x86/kernel/cpu/feat_ctl.c

206

if (!(msr & FEAT_CTL_SGX_LC_ENABLED) && enable_sgx_driver) {

arch/x86/kernel/cpu/intel.c

489

u64 msr;

arch/x86/kernel/cpu/intel.c

491

if (!rdmsrq_safe(MSR_PLATFORM_INFO, &msr)) {

arch/x86/kernel/cpu/intel.c

492

if (msr & MSR_PLATFORM_INFO_CPUID_FAULT)

arch/x86/kernel/cpu/intel.c

499

u64 msr;

arch/x86/kernel/cpu/intel.c

501

if (rdmsrq_safe(MSR_MISC_FEATURES_ENABLES, &msr))

arch/x86/kernel/cpu/intel.c

511

msr = this_cpu_read(msr_misc_features_shadow);

arch/x86/kernel/cpu/intel.c

512

wrmsrq(MSR_MISC_FEATURES_ENABLES, msr);

arch/x86/kernel/cpu/mce/amd.c

402

int msr = (hi & MASK_LVTOFF_HI) >> 20;

arch/x86/kernel/cpu/mce/amd.c

419

if (apic != msr) {

arch/x86/kernel/cpu/mce/core.c

355

static int msr_to_offset(u32 msr)

arch/x86/kernel/cpu/mce/core.c

359

if (msr == mca_cfg.rip_msr)

arch/x86/kernel/cpu/mce/core.c

361

if (msr == mca_msr_reg(bank, MCA_STATUS))

arch/x86/kernel/cpu/mce/core.c

363

if (msr == mca_msr_reg(bank, MCA_ADDR))

arch/x86/kernel/cpu/mce/core.c

365

if (msr == mca_msr_reg(bank, MCA_MISC))

arch/x86/kernel/cpu/mce/core.c

367

if (msr == MSR_IA32_MCG_STATUS)

arch/x86/kernel/cpu/mce/core.c

392

noinstr u64 mce_rdmsrq(u32 msr)

arch/x86/kernel/cpu/mce/core.c

402

offset = msr_to_offset(msr);

arch/x86/kernel/cpu/mce/core.c

421

: EAX_EDX_RET(val, low, high) : "c" (msr));

arch/x86/kernel/cpu/mce/core.c

427

noinstr void mce_wrmsrq(u32 msr, u64 v)

arch/x86/kernel/cpu/mce/core.c

436

offset = msr_to_offset(msr);

arch/x86/kernel/cpu/mce/core.c

452

: : "c" (msr), "a"(low), "d" (high) : "memory");

arch/x86/kernel/cpu/mce/internal.h

327

noinstr u64 mce_rdmsrq(u32 msr);

arch/x86/kernel/cpu/mce/internal.h

328

noinstr void mce_wrmsrq(u32 msr, u64 v);

arch/x86/kernel/cpu/mtrr/generic.c

751

void mtrr_wrmsr(unsigned msr, unsigned a, unsigned b)

arch/x86/kernel/cpu/mtrr/generic.c

753

if (wrmsr_safe(msr, a, b) < 0) {

arch/x86/kernel/cpu/mtrr/generic.c

755

smp_processor_id(), msr, a, b);

arch/x86/kernel/cpu/mtrr/generic.c

766

static void set_fixed_range(int msr, bool *changed, unsigned int *msrwords)

arch/x86/kernel/cpu/mtrr/generic.c

770

rdmsr(msr, lo, hi);

arch/x86/kernel/cpu/mtrr/generic.c

773

mtrr_wrmsr(msr, msrwords[0], msrwords[1]);

arch/x86/kernel/cpu/perfctr-watchdog.c

102

return msr - MSR_ARCH_PERFMON_EVENTSEL0;

arch/x86/kernel/cpu/perfctr-watchdog.c

108

int reserve_perfctr_nmi(unsigned int msr)

arch/x86/kernel/cpu/perfctr-watchdog.c

112

counter = nmi_perfctr_msr_to_bit(msr);

arch/x86/kernel/cpu/perfctr-watchdog.c

123

void release_perfctr_nmi(unsigned int msr)

arch/x86/kernel/cpu/perfctr-watchdog.c

127

counter = nmi_perfctr_msr_to_bit(msr);

arch/x86/kernel/cpu/perfctr-watchdog.c

136

int reserve_evntsel_nmi(unsigned int msr)

arch/x86/kernel/cpu/perfctr-watchdog.c

140

counter = nmi_evntsel_msr_to_bit(msr);

arch/x86/kernel/cpu/perfctr-watchdog.c

151

void release_evntsel_nmi(unsigned int msr)

arch/x86/kernel/cpu/perfctr-watchdog.c

155

counter = nmi_evntsel_msr_to_bit(msr);

arch/x86/kernel/cpu/perfctr-watchdog.c

45

static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr)

arch/x86/kernel/cpu/perfctr-watchdog.c

51

if (msr >= MSR_F15H_PERF_CTR)

arch/x86/kernel/cpu/perfctr-watchdog.c

52

return (msr - MSR_F15H_PERF_CTR) >> 1;

arch/x86/kernel/cpu/perfctr-watchdog.c

53

return msr - MSR_K7_PERFCTR0;

arch/x86/kernel/cpu/perfctr-watchdog.c

56

return msr - MSR_ARCH_PERFMON_PERFCTR0;

arch/x86/kernel/cpu/perfctr-watchdog.c

60

return msr - MSR_P6_PERFCTR0;

arch/x86/kernel/cpu/perfctr-watchdog.c

62

return msr - MSR_KNC_PERFCTR0;

arch/x86/kernel/cpu/perfctr-watchdog.c

64

return msr - MSR_P4_BPU_PERFCTR0;

arch/x86/kernel/cpu/perfctr-watchdog.c

69

return msr - MSR_ARCH_PERFMON_PERFCTR0;

arch/x86/kernel/cpu/perfctr-watchdog.c

78

static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr)

arch/x86/kernel/cpu/perfctr-watchdog.c

84

if (msr >= MSR_F15H_PERF_CTL)

arch/x86/kernel/cpu/perfctr-watchdog.c

85

return (msr - MSR_F15H_PERF_CTL) >> 1;

arch/x86/kernel/cpu/perfctr-watchdog.c

86

return msr - MSR_K7_EVNTSEL0;

arch/x86/kernel/cpu/perfctr-watchdog.c

89

return msr - MSR_ARCH_PERFMON_EVENTSEL0;

arch/x86/kernel/cpu/perfctr-watchdog.c

93

return msr - MSR_P6_EVNTSEL0;

arch/x86/kernel/cpu/perfctr-watchdog.c

95

return msr - MSR_KNC_EVNTSEL0;

arch/x86/kernel/cpu/perfctr-watchdog.c

97

return msr - MSR_P4_BSU_ESCR0;

arch/x86/kernel/cpu/topology.c

129

u64 msr;

arch/x86/kernel/cpu/topology.c

154

rdmsrq(MSR_IA32_APICBASE, msr);

arch/x86/kernel/cpu/topology.c

155

is_bsp = !!(msr & MSR_IA32_APICBASE_BSP);

arch/x86/kernel/cpu/topology_amd.c

136

u64 msr;

arch/x86/kernel/cpu/topology_amd.c

142

rdmsrq(MSR_FAM10H_NODE_ID, nid.msr);

arch/x86/kernel/cpu/tsx.c

121

u64 msr;

arch/x86/kernel/cpu/tsx.c

129

rdmsrq(MSR_TSX_FORCE_ABORT, msr);

arch/x86/kernel/cpu/tsx.c

130

msr |= MSR_TFA_TSX_CPUID_CLEAR;

arch/x86/kernel/cpu/tsx.c

131

wrmsrq(MSR_TSX_FORCE_ABORT, msr);

arch/x86/kernel/cpu/tsx.c

133

rdmsrq(MSR_IA32_TSX_CTRL, msr);

arch/x86/kernel/cpu/tsx.c

134

msr |= TSX_CTRL_CPUID_CLEAR;

arch/x86/kernel/cpu/tsx.c

135

wrmsrq(MSR_IA32_TSX_CTRL, msr);

arch/x86/kernel/process.c

579

u64 msr = x86_amd_ls_cfg_base;

arch/x86/kernel/process.c

582

msr |= ssbd_tif_to_amd_ls_cfg(tifn);

arch/x86/kernel/process.c

583

wrmsrq(MSR_AMD64_LS_CFG, msr);

arch/x86/kernel/process.c

595

msr |= x86_amd_ls_cfg_ssbd_mask;

arch/x86/kernel/process.c

600

wrmsrq(MSR_AMD64_LS_CFG, msr);

arch/x86/kernel/process.c

610

wrmsrq(MSR_AMD64_LS_CFG, msr);

arch/x86/kernel/process.c

617

u64 msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn);

arch/x86/kernel/process.c

619

wrmsrq(MSR_AMD64_LS_CFG, msr);

arch/x86/kernel/process.c

642

u64 msr = x86_spec_ctrl_base;

arch/x86/kernel/process.c

657

msr |= ssbd_tif_to_spec_ctrl(tifn);

arch/x86/kernel/process.c

664

msr |= stibp_tif_to_spec_ctrl(tifn);

arch/x86/kernel/process.c

668

update_spec_ctrl_cond(msr);

arch/x86/kvm/emulate.c

3583

u64 msr = 0;

arch/x86/kvm/emulate.c

3585

ctxt->ops->get_msr(ctxt, MSR_MISC_FEATURES_ENABLES, &msr);

arch/x86/kvm/emulate.c

3586

if (msr & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&

arch/x86/kvm/hyperv.c

1011

static bool kvm_hv_msr_partition_wide(u32 msr)

arch/x86/kvm/hyperv.c

1015

switch (msr) {

arch/x86/kvm/hyperv.c

1250

static bool hv_check_msr_access(struct kvm_vcpu_hv *hv_vcpu, u32 msr)

arch/x86/kvm/hyperv.c

1255

switch (msr) {

arch/x86/kvm/hyperv.c

1376

static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,

arch/x86/kvm/hyperv.c

1382

if (unlikely(!host && !hv_check_msr_access(to_hv_vcpu(vcpu), msr)))

arch/x86/kvm/hyperv.c

1385

switch (msr) {

arch/x86/kvm/hyperv.c

1447

msr - HV_X64_MSR_CRASH_P0,

arch/x86/kvm/hyperv.c

1501

return syndbg_set_msr(vcpu, msr, data, host);

arch/x86/kvm/hyperv.c

1503

kvm_pr_unimpl_wrmsr(vcpu, msr, data);

arch/x86/kvm/hyperv.c

1519

static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)

arch/x86/kvm/hyperv.c

1523

if (unlikely(!host && !hv_check_msr_access(hv_vcpu, msr)))

arch/x86/kvm/hyperv.c

1526

switch (msr) {

arch/x86/kvm/hyperv.c

1598

return synic_set_msr(to_hv_synic(vcpu), msr, data, host);

arch/x86/kvm/hyperv.c

1603

int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;

arch/x86/kvm/hyperv.c

1612

int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;

arch/x86/kvm/hyperv.c

1624

kvm_pr_unimpl_wrmsr(vcpu, msr, data);

arch/x86/kvm/hyperv.c

1631

static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,

arch/x86/kvm/hyperv.c

1638

if (unlikely(!host && !hv_check_msr_access(to_hv_vcpu(vcpu), msr)))

arch/x86/kvm/hyperv.c

1641

switch (msr) {

arch/x86/kvm/hyperv.c

1656

msr - HV_X64_MSR_CRASH_P0,

arch/x86/kvm/hyperv.c

1677

return syndbg_get_msr(vcpu, msr, pdata, host);

arch/x86/kvm/hyperv.c

1679

kvm_pr_unimpl_rdmsr(vcpu, msr);

arch/x86/kvm/hyperv.c

1687

static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,

arch/x86/kvm/hyperv.c

1693

if (unlikely(!host && !hv_check_msr_access(hv_vcpu, msr)))

arch/x86/kvm/hyperv.c

1696

switch (msr) {

arch/x86/kvm/hyperv.c

1718

return synic_get_msr(to_hv_synic(vcpu), msr, pdata, host);

arch/x86/kvm/hyperv.c

1723

int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;

arch/x86/kvm/hyperv.c

1732

int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;

arch/x86/kvm/hyperv.c

1745

kvm_pr_unimpl_rdmsr(vcpu, msr);

arch/x86/kvm/hyperv.c

1752

int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)

arch/x86/kvm/hyperv.c

1762

if (kvm_hv_msr_partition_wide(msr)) {

arch/x86/kvm/hyperv.c

1766

r = kvm_hv_set_msr_pw(vcpu, msr, data, host);

arch/x86/kvm/hyperv.c

1770

return kvm_hv_set_msr(vcpu, msr, data, host);

arch/x86/kvm/hyperv.c

1773

int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)

arch/x86/kvm/hyperv.c

1783

if (kvm_hv_msr_partition_wide(msr)) {

arch/x86/kvm/hyperv.c

1787

r = kvm_hv_get_msr_pw(vcpu, msr, pdata, host);

arch/x86/kvm/hyperv.c

1791

return kvm_hv_get_msr(vcpu, msr, pdata, host);

arch/x86/kvm/hyperv.c

245

static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)

arch/x86/kvm/hyperv.c

251

hv_vcpu->exit.u.synic.msr = msr;

arch/x86/kvm/hyperv.c

260

u32 msr, u64 data, bool host)

arch/x86/kvm/hyperv.c

268

trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host);

arch/x86/kvm/hyperv.c

271

switch (msr) {

arch/x86/kvm/hyperv.c

275

synic_exit(synic, msr);

arch/x86/kvm/hyperv.c

294

synic_exit(synic, msr);

arch/x86/kvm/hyperv.c

306

synic_exit(synic, msr);

arch/x86/kvm/hyperv.c

319

ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host);

arch/x86/kvm/hyperv.c

340

if (vcpu->run->hyperv.u.syndbg.msr == HV_X64_MSR_SYNDBG_CONTROL)

arch/x86/kvm/hyperv.c

346

static void syndbg_exit(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/hyperv.c

352

hv_vcpu->exit.u.syndbg.msr = msr;

arch/x86/kvm/hyperv.c

363

static int syndbg_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)

arch/x86/kvm/hyperv.c

371

to_hv_vcpu(vcpu)->vp_index, msr, data);

arch/x86/kvm/hyperv.c

372

switch (msr) {

arch/x86/kvm/hyperv.c

376

syndbg_exit(vcpu, msr);

arch/x86/kvm/hyperv.c

390

syndbg_exit(vcpu, msr);

arch/x86/kvm/hyperv.c

402

static int syndbg_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)

arch/x86/kvm/hyperv.c

409

switch (msr) {

arch/x86/kvm/hyperv.c

432

trace_kvm_hv_syndbg_get_msr(vcpu->vcpu_id, kvm_hv_get_vpindex(vcpu), msr, *pdata);

arch/x86/kvm/hyperv.c

437

static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata,

arch/x86/kvm/hyperv.c

446

switch (msr) {

arch/x86/kvm/hyperv.c

463

*pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);

arch/x86/kvm/hyperv.h

95

int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host);

arch/x86/kvm/hyperv.h

96

int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host);

arch/x86/kvm/lapic.c

3460

int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)

arch/x86/kvm/lapic.c

3463

u32 reg = (msr - APIC_BASE_MSR) << 4;

arch/x86/kvm/lapic.c

3471

int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)

arch/x86/kvm/lapic.c

3474

u32 reg = (msr - APIC_BASE_MSR) << 4;

arch/x86/kvm/lapic.h

150

int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);

arch/x86/kvm/lapic.h

151

int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);

arch/x86/kvm/lapic.h

153

int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);

arch/x86/kvm/lapic.h

154

int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);

arch/x86/kvm/mtrr.c

100

mtrr = find_mtrr(vcpu, msr);

arch/x86/kvm/mtrr.c

104

if (!kvm_mtrr_valid(vcpu, msr, data))

arch/x86/kvm/mtrr.c

111

int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)

arch/x86/kvm/mtrr.c

116

if (msr == MSR_MTRRcap) {

arch/x86/kvm/mtrr.c

127

mtrr = find_mtrr(vcpu, msr);

arch/x86/kvm/mtrr.c

24

static u64 *find_mtrr(struct kvm_vcpu *vcpu, unsigned int msr)

arch/x86/kvm/mtrr.c

28

switch (msr) {

arch/x86/kvm/mtrr.c

30

index = msr - MTRRphysBase_MSR(0);

arch/x86/kvm/mtrr.c

36

index = msr - MSR_MTRRfix16K_80000;

arch/x86/kvm/mtrr.c

46

index = msr - MSR_MTRRfix4K_C0000;

arch/x86/kvm/mtrr.c

61

static bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)

arch/x86/kvm/mtrr.c

66

if (msr == MSR_MTRRdefType) {

arch/x86/kvm/mtrr.c

70

} else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {

arch/x86/kvm/mtrr.c

78

if (WARN_ON_ONCE(!(msr >= MTRRphysBase_MSR(0) &&

arch/x86/kvm/mtrr.c

79

msr <= MTRRphysMask_MSR(KVM_NR_VAR_MTRR - 1))))

arch/x86/kvm/mtrr.c

83

if ((msr & 1) == 0) {

arch/x86/kvm/mtrr.c

96

int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)

arch/x86/kvm/pmu.c

797

bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/pmu.c

799

switch (msr) {

arch/x86/kvm/pmu.c

807

return kvm_pmu_call(msr_idx_to_pmc)(vcpu, msr) ||

arch/x86/kvm/pmu.c

808

kvm_pmu_call(is_valid_msr)(vcpu, msr);

arch/x86/kvm/pmu.c

811

static void kvm_pmu_mark_pmc_in_use(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/pmu.c

814

struct kvm_pmc *pmc = kvm_pmu_call(msr_idx_to_pmc)(vcpu, msr);

arch/x86/kvm/pmu.c

823

u32 msr = msr_info->index;

arch/x86/kvm/pmu.c

825

switch (msr) {

arch/x86/kvm/pmu.c

849

u32 msr = msr_info->index;

arch/x86/kvm/pmu.c

857

switch (msr) {

arch/x86/kvm/pmu.h

156

static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr,

arch/x86/kvm/pmu.h

159

if (msr >= base && msr < base + pmu->nr_arch_gp_counters) {

arch/x86/kvm/pmu.h

160

u32 index = array_index_nospec(msr - base,

arch/x86/kvm/pmu.h

170

static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr)

arch/x86/kvm/pmu.h

174

if (msr >= base && msr < base + pmu->nr_arch_fixed_counters) {

arch/x86/kvm/pmu.h

175

u32 index = array_index_nospec(msr - base,

arch/x86/kvm/pmu.h

251

bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr);

arch/x86/kvm/pmu.h

29

struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, u32 msr);

arch/x86/kvm/pmu.h

31

bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr);

arch/x86/kvm/svm/nested.c

1434

u32 msr;

arch/x86/kvm/svm/nested.c

1439

msr = svm->vcpu.arch.regs[VCPU_REGS_RCX];

arch/x86/kvm/svm/nested.c

1440

bit_nr = svm_msrpm_bit_nr(msr);

arch/x86/kvm/svm/pmu.c

104

static bool amd_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/svm/pmu.c

108

switch (msr) {

arch/x86/kvm/svm/pmu.c

119

if (msr > MSR_F15H_PERF_CTR5 &&

arch/x86/kvm/svm/pmu.c

120

msr < MSR_F15H_PERF_CTL0 + 2 * pmu->nr_arch_gp_counters)

arch/x86/kvm/svm/pmu.c

125

return amd_msr_idx_to_pmc(vcpu, msr);

arch/x86/kvm/svm/pmu.c

132

u32 msr = msr_info->index;

arch/x86/kvm/svm/pmu.c

135

pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER);

arch/x86/kvm/svm/pmu.c

141

pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL);

arch/x86/kvm/svm/pmu.c

154

u32 msr = msr_info->index;

arch/x86/kvm/svm/pmu.c

158

pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER);

arch/x86/kvm/svm/pmu.c

164

pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL);

arch/x86/kvm/svm/pmu.c

38

static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr,

arch/x86/kvm/svm/pmu.c

47

switch (msr) {

arch/x86/kvm/svm/pmu.c

55

idx = (unsigned int)((msr - MSR_F15H_PERF_CTL0) / 2);

arch/x86/kvm/svm/pmu.c

56

if (!(msr & 0x1) != (type == PMU_TYPE_EVNTSEL))

arch/x86/kvm/svm/pmu.c

62

idx = msr - MSR_K7_EVNTSEL0;

arch/x86/kvm/svm/pmu.c

67

idx = msr - MSR_K7_PERFCTR0;

arch/x86/kvm/svm/pmu.c

93

static struct kvm_pmc *amd_msr_idx_to_pmc(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/svm/pmu.c

98

pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER);

arch/x86/kvm/svm/pmu.c

99

pmc = pmc ? pmc : get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL);

arch/x86/kvm/svm/svm.c

2710

static int svm_get_feature_msr(u32 msr, u64 *data)

arch/x86/kvm/svm/svm.c

2714

switch (msr) {

arch/x86/kvm/svm/svm.c

2897

static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)

arch/x86/kvm/svm/svm.c

2902

u32 ecx = msr->index;

arch/x86/kvm/svm/svm.c

2903

u64 data = msr->data;

arch/x86/kvm/svm/svm.c

2905

if (sev_es_prevent_msr_access(vcpu, msr))

arch/x86/kvm/svm/svm.c

2913

if (!msr->host_initiated)

arch/x86/kvm/svm/svm.c

2939

ret = kvm_set_msr_common(vcpu, msr);

arch/x86/kvm/svm/svm.c

2949

if (!msr->host_initiated &&

arch/x86/kvm/svm/svm.c

2977

if (!msr->host_initiated &&

arch/x86/kvm/svm/svm.c

3093

if (!msr->host_initiated && !page_address_valid(vcpu, data))

arch/x86/kvm/svm/svm.c

3116

return kvm_set_msr_common(vcpu, msr);

arch/x86/kvm/svm/svm.c

5279

u64 msr, mask;

arch/x86/kvm/svm/svm.c

5286

rdmsrq(MSR_AMD64_SYSCFG, msr);

arch/x86/kvm/svm/svm.c

5287

if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT))

arch/x86/kvm/svm/svm.c

650

static bool msr_write_intercepted(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/svm/svm.c

664

return svm_test_msr_bitmap_write(msrpm, msr);

arch/x86/kvm/svm/svm.c

667

void svm_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type, bool set)

arch/x86/kvm/svm/svm.c

674

if (!set && kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_READ))

arch/x86/kvm/svm/svm.c

675

svm_clear_msr_bitmap_read(msrpm, msr);

arch/x86/kvm/svm/svm.c

677

svm_set_msr_bitmap_read(msrpm, msr);

arch/x86/kvm/svm/svm.c

681

if (!set && kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_WRITE))

arch/x86/kvm/svm/svm.c

682

svm_clear_msr_bitmap_write(msrpm, msr);

arch/x86/kvm/svm/svm.c

684

svm_set_msr_bitmap_write(msrpm, msr);

arch/x86/kvm/svm/svm.h

593

u32 msr = offset * 16;

arch/x86/kvm/svm/svm.h

595

return (msr >= APIC_BASE_MSR) &&

arch/x86/kvm/svm/svm.h

596

(msr < (APIC_BASE_MSR + 0x100));

arch/x86/kvm/svm/svm.h

661

static __always_inline int svm_msrpm_bit_nr(u32 msr)

arch/x86/kvm/svm/svm.h

665

switch (msr & ~SVM_MSRPM_OFFSET_MASK) {

arch/x86/kvm/svm/svm.h

680

(msr & SVM_MSRPM_OFFSET_MASK) * SVM_BITS_PER_MSR;

arch/x86/kvm/svm/svm.h

685

u32 msr) \

arch/x86/kvm/svm/svm.h

689

bit_nr = svm_msrpm_bit_nr(msr); \

arch/x86/kvm/svm/svm.h

730

void set_msr_interception(struct kvm_vcpu *vcpu, u32 *msrpm, u32 msr,

arch/x86/kvm/svm/svm.h

735

void svm_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type, bool set);

arch/x86/kvm/svm/svm.h

738

u32 msr, int type)

arch/x86/kvm/svm/svm.h

740

svm_set_intercept_for_msr(vcpu, msr, type, false);

arch/x86/kvm/svm/svm.h

744

u32 msr, int type)

arch/x86/kvm/svm/svm.h

746

svm_set_intercept_for_msr(vcpu, msr, type, true);

arch/x86/kvm/trace.h

1280

TP_PROTO(int vcpu_id, u32 msr, u64 data, bool host),

arch/x86/kvm/trace.h

1281

TP_ARGS(vcpu_id, msr, data, host),

arch/x86/kvm/trace.h

1285

__field(u32, msr)

arch/x86/kvm/trace.h

1292

__entry->msr = msr;

arch/x86/kvm/trace.h

1298

__entry->vcpu_id, __entry->msr, __entry->data, __entry->host)

arch/x86/kvm/trace.h

1793

TP_PROTO(int vcpu_id, u32 vp_index, u32 msr, u64 data),

arch/x86/kvm/trace.h

1794

TP_ARGS(vcpu_id, vp_index, msr, data),

arch/x86/kvm/trace.h

1799

__field(u32, msr)

arch/x86/kvm/trace.h

1806

__entry->msr = msr;

arch/x86/kvm/trace.h

1811

__entry->vcpu_id, __entry->vp_index, __entry->msr,

arch/x86/kvm/trace.h

1819

TP_PROTO(int vcpu_id, u32 vp_index, u32 msr, u64 data),

arch/x86/kvm/trace.h

1820

TP_ARGS(vcpu_id, vp_index, msr, data),

arch/x86/kvm/trace.h

1825

__field(u32, msr)

arch/x86/kvm/trace.h

1832

__entry->msr = msr;

arch/x86/kvm/trace.h

1837

__entry->vcpu_id, __entry->vp_index, __entry->msr,

arch/x86/kvm/vmx/nested.c

1460

const u64 *msr = vmx_get_fixed0_msr(&vmcs_config.nested, msr_index);

arch/x86/kvm/vmx/nested.c

1466

if (!is_bitwise_subset(data, *msr, -1ULL))

arch/x86/kvm/vmx/nested.c

575

u32 msr, int type)

arch/x86/kvm/vmx/nested.c

577

if (type & MSR_TYPE_R && !vmx_test_msr_bitmap_read(msr_bitmap_l1, msr))

arch/x86/kvm/vmx/nested.c

578

vmx_clear_msr_bitmap_read(msr_bitmap_l0, msr);

arch/x86/kvm/vmx/nested.c

580

if (type & MSR_TYPE_W && !vmx_test_msr_bitmap_write(msr_bitmap_l1, msr))

arch/x86/kvm/vmx/nested.c

581

vmx_clear_msr_bitmap_write(msr_bitmap_l0, msr);

arch/x86/kvm/vmx/nested.c

586

int msr;

arch/x86/kvm/vmx/nested.c

588

for (msr = 0x800; msr <= 0x8ff; msr += BITS_PER_LONG) {

arch/x86/kvm/vmx/nested.c

589

unsigned word = msr / BITS_PER_LONG;

arch/x86/kvm/vmx/nested.c

600

unsigned long *msr_bitmap_l0, u32 msr) \

arch/x86/kvm/vmx/nested.c

602

if (vmx_test_msr_bitmap_##rw(vmx->vmcs01.msr_bitmap, msr) || \

arch/x86/kvm/vmx/nested.c

603

vmx_test_msr_bitmap_##rw(msr_bitmap_l1, msr)) \

arch/x86/kvm/vmx/nested.c

604

vmx_set_msr_bitmap_##rw(msr_bitmap_l0, msr); \

arch/x86/kvm/vmx/nested.c

606

vmx_clear_msr_bitmap_##rw(msr_bitmap_l0, msr); \

arch/x86/kvm/vmx/nested.c

614

u32 msr, int types)

arch/x86/kvm/vmx/nested.c

618

msr_bitmap_l0, msr);

arch/x86/kvm/vmx/nested.c

621

msr_bitmap_l0, msr);

arch/x86/kvm/vmx/nested.c

624

#define nested_vmx_merge_msr_bitmaps(msr, type) \

arch/x86/kvm/vmx/nested.c

626

msr_bitmap_l0, msr, type)

arch/x86/kvm/vmx/nested.c

628

#define nested_vmx_merge_msr_bitmaps_read(msr) \

arch/x86/kvm/vmx/nested.c

629

nested_vmx_merge_msr_bitmaps(msr, MSR_TYPE_R)

arch/x86/kvm/vmx/nested.c

631

#define nested_vmx_merge_msr_bitmaps_write(msr) \

arch/x86/kvm/vmx/nested.c

632

nested_vmx_merge_msr_bitmaps(msr, MSR_TYPE_W)

arch/x86/kvm/vmx/nested.c

634

#define nested_vmx_merge_msr_bitmaps_rw(msr) \

arch/x86/kvm/vmx/nested.c

635

nested_vmx_merge_msr_bitmaps(msr, MSR_TYPE_RW)

arch/x86/kvm/vmx/nested.c

673

int msr;

arch/x86/kvm/vmx/nested.c

719

for (msr = 0x800; msr <= 0x8ff; msr += BITS_PER_LONG) {

arch/x86/kvm/vmx/nested.c

720

unsigned word = msr / BITS_PER_LONG;

arch/x86/kvm/vmx/pmu_intel.c

132

static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm_pmu *pmu, u32 msr)

arch/x86/kvm/vmx/pmu_intel.c

137

return get_gp_pmc(pmu, msr, MSR_IA32_PMC0);

arch/x86/kvm/vmx/pmu_intel.c

174

static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/vmx/pmu_intel.c

180

switch (msr) {

arch/x86/kvm/vmx/pmu_intel.c

195

ret = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0) ||

arch/x86/kvm/vmx/pmu_intel.c

196

get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0) ||

arch/x86/kvm/vmx/pmu_intel.c

197

get_fixed_pmc(pmu, msr) || get_fw_gp_pmc(pmu, msr) ||

arch/x86/kvm/vmx/pmu_intel.c

198

intel_pmu_is_valid_lbr_msr(vcpu, msr);

arch/x86/kvm/vmx/pmu_intel.c

205

static struct kvm_pmc *intel_msr_idx_to_pmc(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/vmx/pmu_intel.c

210

pmc = get_fixed_pmc(pmu, msr);

arch/x86/kvm/vmx/pmu_intel.c

211

pmc = pmc ? pmc : get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0);

arch/x86/kvm/vmx/pmu_intel.c

212

pmc = pmc ? pmc : get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0);

arch/x86/kvm/vmx/pmu_intel.c

332

u32 msr = msr_info->index;

arch/x86/kvm/vmx/pmu_intel.c

334

switch (msr) {

arch/x86/kvm/vmx/pmu_intel.c

348

if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||

arch/x86/kvm/vmx/pmu_intel.c

349

(pmc = get_gp_pmc(pmu, msr, MSR_IA32_PMC0))) {

arch/x86/kvm/vmx/pmu_intel.c

354

} else if ((pmc = get_fixed_pmc(pmu, msr))) {

arch/x86/kvm/vmx/pmu_intel.c

359

} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {

arch/x86/kvm/vmx/pmu_intel.c

375

u32 msr = msr_info->index;

arch/x86/kvm/vmx/pmu_intel.c

379

switch (msr) {

arch/x86/kvm/vmx/pmu_intel.c

410

if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||

arch/x86/kvm/vmx/pmu_intel.c

411

(pmc = get_gp_pmc(pmu, msr, MSR_IA32_PMC0))) {

arch/x86/kvm/vmx/pmu_intel.c

412

if ((msr & MSR_PMC_FULL_WIDTH_BIT) &&

arch/x86/kvm/vmx/pmu_intel.c

417

!(msr & MSR_PMC_FULL_WIDTH_BIT))

arch/x86/kvm/vmx/pmu_intel.c

421

} else if ((pmc = get_fixed_pmc(pmu, msr))) {

arch/x86/kvm/vmx/pmu_intel.c

424

} else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) {

arch/x86/kvm/vmx/tdx.c

2157

int tdx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)

arch/x86/kvm/vmx/tdx.c

2159

switch (msr->index) {

arch/x86/kvm/vmx/tdx.c

2165

msr->data = FEAT_CTL_LOCKED;

arch/x86/kvm/vmx/tdx.c

2167

msr->data |= FEAT_CTL_LMCE_ENABLED;

arch/x86/kvm/vmx/tdx.c

2170

if (!msr->host_initiated && !(vcpu->arch.mcg_cap & MCG_LMCE_P))

arch/x86/kvm/vmx/tdx.c

2172

msr->data = vcpu->arch.mcg_ext_ctl;

arch/x86/kvm/vmx/tdx.c

2175

if (!tdx_has_emulated_msr(msr->index))

arch/x86/kvm/vmx/tdx.c

2178

return kvm_get_msr_common(vcpu, msr);

arch/x86/kvm/vmx/tdx.c

2182

int tdx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)

arch/x86/kvm/vmx/tdx.c

2184

switch (msr->index) {

arch/x86/kvm/vmx/tdx.c

2186

if ((!msr->host_initiated && !(vcpu->arch.mcg_cap & MCG_LMCE_P)) ||

arch/x86/kvm/vmx/tdx.c

2187

(msr->data & ~MCG_EXT_CTL_LMCE_EN))

arch/x86/kvm/vmx/tdx.c

2189

vcpu->arch.mcg_ext_ctl = msr->data;

arch/x86/kvm/vmx/tdx.c

2192

if (tdx_is_read_only_msr(msr->index))

arch/x86/kvm/vmx/tdx.c

2195

if (!tdx_has_emulated_msr(msr->index))

arch/x86/kvm/vmx/tdx.c

2198

return kvm_set_msr_common(vcpu, msr);

arch/x86/kvm/vmx/tdx.c

3399

tdx_uret_msrs[i].slot = kvm_find_user_return_msr(tdx_uret_msrs[i].msr);

arch/x86/kvm/vmx/tdx.c

3403

tdx_uret_msrs[i].msr);

arch/x86/kvm/vmx/tdx.c

781

u32 msr;

arch/x86/kvm/vmx/tdx.c

787

{.msr = MSR_SYSCALL_MASK, .defval = 0x20200 },

arch/x86/kvm/vmx/tdx.c

788

{.msr = MSR_STAR,},

arch/x86/kvm/vmx/tdx.c

789

{.msr = MSR_LSTAR,},

arch/x86/kvm/vmx/tdx.c

790

{.msr = MSR_TSC_AUX,},

arch/x86/kvm/vmx/vmx.c

1000

return vmx_test_msr_bitmap_write(vmx->loaded_vmcs->msr_bitmap, msr);

arch/x86/kvm/vmx/vmx.c

1032

static int vmx_find_loadstore_msr_slot(struct vmx_msrs *m, u32 msr)

arch/x86/kvm/vmx/vmx.c

1037

if (m->val[i].index == msr)

arch/x86/kvm/vmx/vmx.c

1043

static void vmx_remove_auto_msr(struct vmx_msrs *m, u32 msr,

arch/x86/kvm/vmx/vmx.c

1048

i = vmx_find_loadstore_msr_slot(m, msr);

arch/x86/kvm/vmx/vmx.c

1057

static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)

arch/x86/kvm/vmx/vmx.c

1061

switch (msr) {

arch/x86/kvm/vmx/vmx.c

1080

vmx_remove_auto_msr(&m->guest, msr, VM_ENTRY_MSR_LOAD_COUNT);

arch/x86/kvm/vmx/vmx.c

1081

vmx_remove_auto_msr(&m->host, msr, VM_EXIT_MSR_LOAD_COUNT);

arch/x86/kvm/vmx/vmx.c

1096

static void vmx_add_auto_msr(struct vmx_msrs *m, u32 msr, u64 value,

arch/x86/kvm/vmx/vmx.c

1101

i = vmx_find_loadstore_msr_slot(m, msr);

arch/x86/kvm/vmx/vmx.c

1107

m->val[i].index = msr;

arch/x86/kvm/vmx/vmx.c

1113

static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,

arch/x86/kvm/vmx/vmx.c

1119

switch (msr) {

arch/x86/kvm/vmx/vmx.c

1151

vmx_add_auto_msr(&m->guest, msr, guest_val, VM_ENTRY_MSR_LOAD_COUNT, kvm);

arch/x86/kvm/vmx/vmx.c

1152

vmx_add_auto_msr(&m->host, msr, host_val, VM_EXIT_MSR_LOAD_COUNT, kvm);

arch/x86/kvm/vmx/vmx.c

1207

static void vmx_add_autostore_msr(struct vcpu_vmx *vmx, u32 msr)

arch/x86/kvm/vmx/vmx.c

1209

vmx_add_auto_msr(&vmx->msr_autostore, msr, 0, VM_EXIT_MSR_STORE_COUNT,

arch/x86/kvm/vmx/vmx.c

1213

static void vmx_remove_autostore_msr(struct vcpu_vmx *vmx, u32 msr)

arch/x86/kvm/vmx/vmx.c

1215

vmx_remove_auto_msr(&vmx->msr_autostore, msr, VM_EXIT_MSR_STORE_COUNT);

arch/x86/kvm/vmx/vmx.c

1462

static u64 vmx_read_guest_host_msr(struct vcpu_vmx *vmx, u32 msr, u64 *cache)

arch/x86/kvm/vmx/vmx.c

1466

*cache = read_msr(msr);

arch/x86/kvm/vmx/vmx.c

1471

static void vmx_write_guest_host_msr(struct vcpu_vmx *vmx, u32 msr, u64 data,

arch/x86/kvm/vmx/vmx.c

1476

wrmsrns(msr, data);

arch/x86/kvm/vmx/vmx.c

1983

static void vmx_setup_uret_msr(struct vcpu_vmx *vmx, unsigned int msr,

arch/x86/kvm/vmx/vmx.c

1988

uret_msr = vmx_find_uret_msr(vmx, msr);

arch/x86/kvm/vmx/vmx.c

2084

struct msr_data *msr)

arch/x86/kvm/vmx/vmx.c

2095

if (!msr->host_initiated &&

arch/x86/kvm/vmx/vmx.c

2099

if (msr->host_initiated)

arch/x86/kvm/vmx/vmx.c

2104

return !(msr->data & ~valid_bits);

arch/x86/kvm/vmx/vmx.c

2107

int vmx_get_feature_msr(u32 msr, u64 *data)

arch/x86/kvm/vmx/vmx.c

2109

switch (msr) {

arch/x86/kvm/vmx/vmx.c

2113

return vmx_get_vmx_msr(&vmcs_config.nested, msr, data);

arch/x86/kvm/vmx/vmx.c

2127

struct vmx_uret_msr *msr;

arch/x86/kvm/vmx/vmx.c

2273

msr = vmx_find_uret_msr(vmx, msr_info->index);

arch/x86/kvm/vmx/vmx.c

2274

if (msr) {

arch/x86/kvm/vmx/vmx.c

2275

msr_info->data = msr->data;

arch/x86/kvm/vmx/vmx.c

2333

struct vmx_uret_msr *msr;

arch/x86/kvm/vmx/vmx.c

2619

msr = vmx_find_uret_msr(vmx, msr_index);

arch/x86/kvm/vmx/vmx.c

2620

if (msr)

arch/x86/kvm/vmx/vmx.c

2621

ret = vmx_set_guest_uret_msr(vmx, msr, data);

arch/x86/kvm/vmx/vmx.c

2687

static int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt, u32 msr, u32 *result)

arch/x86/kvm/vmx/vmx.c

2692

rdmsr(msr, vmx_msr_low, vmx_msr_high);

arch/x86/kvm/vmx/vmx.c

2705

static u64 adjust_vmx_controls64(u64 ctl_opt, u32 msr)

arch/x86/kvm/vmx/vmx.c

2709

rdmsrq(msr, allowed);

arch/x86/kvm/vmx/vmx.c

2989

u64 msr;

arch/x86/kvm/vmx/vmx.c

3001

rdmsrq_safe(MSR_IA32_FEAT_CTL, &msr) ? 0xdeadbeef : msr);

arch/x86/kvm/vmx/vmx.c

4186

void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type, bool set)

arch/x86/kvm/vmx/vmx.c

4197

if (!set && kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_READ))

arch/x86/kvm/vmx/vmx.c

4198

vmx_clear_msr_bitmap_read(msr_bitmap, msr);

arch/x86/kvm/vmx/vmx.c

4200

vmx_set_msr_bitmap_read(msr_bitmap, msr);

arch/x86/kvm/vmx/vmx.c

4204

if (!set && kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_WRITE))

arch/x86/kvm/vmx/vmx.c

4205

vmx_clear_msr_bitmap_write(msr_bitmap, msr);

arch/x86/kvm/vmx/vmx.c

4207

vmx_set_msr_bitmap_write(msr_bitmap, msr);

arch/x86/kvm/vmx/vmx.c

475

u64 msr;

arch/x86/kvm/vmx/vmx.c

480

msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);

arch/x86/kvm/vmx/vmx.c

481

msr |= FB_CLEAR_DIS;

arch/x86/kvm/vmx/vmx.c

482

native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, msr);

arch/x86/kvm/vmx/vmx.c

484

vmx->msr_ia32_mcu_opt_ctrl = msr;

arch/x86/kvm/vmx/vmx.c

7436

clear_atomic_switch_msr(vmx, msrs[i].msr);

arch/x86/kvm/vmx/vmx.c

7438

add_atomic_switch_msr(vmx, msrs[i].msr, msrs[i].guest,

arch/x86/kvm/vmx/vmx.c

763

struct vmx_uret_msr *vmx_find_uret_msr(struct vcpu_vmx *vmx, u32 msr)

arch/x86/kvm/vmx/vmx.c

767

i = kvm_find_user_return_msr(msr);

arch/x86/kvm/vmx/vmx.c

774

struct vmx_uret_msr *msr, u64 data)

arch/x86/kvm/vmx/vmx.c

776

unsigned int slot = msr - vmx->guest_uret_msrs;

arch/x86/kvm/vmx/vmx.c

779

if (msr->load_into_hardware) {

arch/x86/kvm/vmx/vmx.c

781

ret = kvm_set_user_return_msr(slot, data, msr->mask);

arch/x86/kvm/vmx/vmx.c

785

msr->data = data;

arch/x86/kvm/vmx/vmx.c

8107

struct vmx_uret_msr *msr;

arch/x86/kvm/vmx/vmx.c

8108

msr = vmx_find_uret_msr(vmx, MSR_IA32_TSX_CTRL);

arch/x86/kvm/vmx/vmx.c

8109

if (msr) {

arch/x86/kvm/vmx/vmx.c

8111

vmx_set_guest_uret_msr(vmx, msr, enabled ? 0 : TSX_CTRL_RTM_DISABLE);

arch/x86/kvm/vmx/vmx.c

995

static bool msr_write_intercepted(struct vcpu_vmx *vmx, u32 msr)

arch/x86/kvm/vmx/vmx.h

371

struct vmx_uret_msr *vmx_find_uret_msr(struct vcpu_vmx *vmx, u32 msr);

arch/x86/kvm/vmx/vmx.h

380

void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type, bool set);

arch/x86/kvm/vmx/vmx.h

383

u32 msr, int type)

arch/x86/kvm/vmx/vmx.h

385

vmx_set_intercept_for_msr(vcpu, msr, type, false);

arch/x86/kvm/vmx/vmx.h

389

u32 msr, int type)

arch/x86/kvm/vmx/vmx.h

391

vmx_set_intercept_for_msr(vcpu, msr, type, true);

arch/x86/kvm/vmx/vmx.h

439

u32 msr) \

arch/x86/kvm/vmx/vmx.h

443

if (msr <= 0x1fff) \

arch/x86/kvm/vmx/vmx.h

444

return bitop##_bit(msr, bitmap + base / f); \

arch/x86/kvm/vmx/vmx.h

445

else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) \

arch/x86/kvm/vmx/vmx.h

446

return bitop##_bit(msr & 0x1fff, bitmap + (base + 0x400) / f); \

arch/x86/kvm/vmx/x86_ops.h

147

int tdx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);

arch/x86/kvm/vmx/x86_ops.h

148

int tdx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);

arch/x86/kvm/vmx/x86_ops.h

58

int vmx_get_feature_msr(u32 msr, u64 *data);

arch/x86/kvm/x86.c

1851

struct msr_data msr;

arch/x86/kvm/x86.c

1941

msr.data = data;

arch/x86/kvm/x86.c

1942

msr.index = index;

arch/x86/kvm/x86.c

1943

msr.host_initiated = host_initiated;

arch/x86/kvm/x86.c

1945

return kvm_x86_call(set_msr)(vcpu, &msr);

arch/x86/kvm/x86.c

1970

struct msr_data msr;

arch/x86/kvm/x86.c

1999

msr.index = index;

arch/x86/kvm/x86.c

2000

msr.host_initiated = host_initiated;

arch/x86/kvm/x86.c

2002

ret = kvm_x86_call(get_msr)(vcpu, &msr);

arch/x86/kvm/x86.c

2004

*data = msr.data;

arch/x86/kvm/x86.c

2058

if (!vcpu->run->msr.error) {

arch/x86/kvm/x86.c

2059

kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);

arch/x86/kvm/x86.c

2060

kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);

arch/x86/kvm/x86.c

2066

return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);

arch/x86/kvm/x86.c

2077

return kvm_x86_call(complete_emulated_msr)(vcpu, vcpu->run->msr.error);

arch/x86/kvm/x86.c

2088

if (!vcpu->run->msr.error)

arch/x86/kvm/x86.c

2090

vcpu->run->msr.data);

arch/x86/kvm/x86.c

2119

vcpu->run->msr.error = 0;

arch/x86/kvm/x86.c

2120

memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));

arch/x86/kvm/x86.c

2121

vcpu->run->msr.reason = msr_reason;

arch/x86/kvm/x86.c

2122

vcpu->run->msr.index = index;

arch/x86/kvm/x86.c

2123

vcpu->run->msr.data = data;

arch/x86/kvm/x86.c

2129

static int __kvm_emulate_rdmsr(struct kvm_vcpu *vcpu, u32 msr, int reg,

arch/x86/kvm/x86.c

2135

r = kvm_emulate_msr_read(vcpu, msr, &data);

arch/x86/kvm/x86.c

2138

trace_kvm_msr_read(msr, data);

arch/x86/kvm/x86.c

2148

if (kvm_msr_user_space(vcpu, msr, KVM_EXIT_X86_RDMSR, 0,

arch/x86/kvm/x86.c

2151

trace_kvm_msr_read_ex(msr);

arch/x86/kvm/x86.c

2164

int kvm_emulate_rdmsr_imm(struct kvm_vcpu *vcpu, u32 msr, int reg)

arch/x86/kvm/x86.c

2168

return __kvm_emulate_rdmsr(vcpu, msr, reg, complete_fast_rdmsr_imm);

arch/x86/kvm/x86.c

2172

static int __kvm_emulate_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64 data)

arch/x86/kvm/x86.c

2176

r = kvm_emulate_msr_write(vcpu, msr, data);

arch/x86/kvm/x86.c

2178

trace_kvm_msr_write(msr, data);

arch/x86/kvm/x86.c

2181

if (kvm_msr_user_space(vcpu, msr, KVM_EXIT_X86_WRMSR, data,

arch/x86/kvm/x86.c

2187

trace_kvm_msr_write_ex(msr, data);

arch/x86/kvm/x86.c

2200

int kvm_emulate_wrmsr_imm(struct kvm_vcpu *vcpu, u32 msr, int reg)

arch/x86/kvm/x86.c

2202

return __kvm_emulate_wrmsr(vcpu, msr, kvm_register_read(vcpu, reg));

arch/x86/kvm/x86.c

2277

static fastpath_t __handle_fastpath_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64 data)

arch/x86/kvm/x86.c

2282

switch (msr) {

arch/x86/kvm/x86.c

2295

trace_kvm_msr_write(msr, data);

arch/x86/kvm/x86.c

2310

fastpath_t handle_fastpath_wrmsr_imm(struct kvm_vcpu *vcpu, u32 msr, int reg)

arch/x86/kvm/x86.c

2312

return __handle_fastpath_wrmsr(vcpu, msr, kvm_register_read(vcpu, reg));

arch/x86/kvm/x86.c

3536

static bool is_mci_control_msr(u32 msr)

arch/x86/kvm/x86.c

3538

return (msr & 3) == 0;

arch/x86/kvm/x86.c

3540

static bool is_mci_status_msr(u32 msr)

arch/x86/kvm/x86.c

3542

return (msr & 3) == 1;

arch/x86/kvm/x86.c

3561

u32 msr = msr_info->index;

arch/x86/kvm/x86.c

3565

switch (msr) {

arch/x86/kvm/x86.c

3579

if (msr > last_msr)

arch/x86/kvm/x86.c

3587

offset = array_index_nospec(msr - MSR_IA32_MC0_CTL2,

arch/x86/kvm/x86.c

3593

if (msr > last_msr)

arch/x86/kvm/x86.c

3606

if (is_mci_control_msr(msr) &&

arch/x86/kvm/x86.c

3615

if (!msr_info->host_initiated && is_mci_status_msr(msr) &&

arch/x86/kvm/x86.c

3619

offset = array_index_nospec(msr - MSR_IA32_MC0_CTL,

arch/x86/kvm/x86.c

3850

static bool is_xstate_managed_msr(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/x86.c

3855

switch (msr) {

arch/x86/kvm/x86.c

3906

u32 msr = msr_info->index;

arch/x86/kvm/x86.c

3914

if (kvm_xen_is_hypercall_page_msr(vcpu->kvm, msr) &&

arch/x86/kvm/x86.c

3918

switch (msr) {

arch/x86/kvm/x86.c

4014

kvm_pr_unimpl_wrmsr(vcpu, msr, data);

arch/x86/kvm/x86.c

4021

kvm_pr_unimpl_wrmsr(vcpu, msr, data);

arch/x86/kvm/x86.c

4033

return kvm_mtrr_set_msr(vcpu, msr, data);

arch/x86/kvm/x86.c

4037

return kvm_x2apic_msr_write(vcpu, msr, data);

arch/x86/kvm/x86.c

4211

if (kvm_pmu_is_valid_msr(vcpu, msr))

arch/x86/kvm/x86.c

4215

kvm_pr_unimpl_wrmsr(vcpu, msr, data);

arch/x86/kvm/x86.c

4238

return kvm_hv_set_msr_common(vcpu, msr, data,

arch/x86/kvm/x86.c

4245

kvm_pr_unimpl_wrmsr(vcpu, msr, data);

arch/x86/kvm/x86.c

4296

if (kvm_pmu_is_valid_msr(vcpu, msr))

arch/x86/kvm/x86.c

4305

static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)

arch/x86/kvm/x86.c

4312

switch (msr) {

arch/x86/kvm/x86.c

4330

if (msr > last_msr)

arch/x86/kvm/x86.c

4335

offset = array_index_nospec(msr - MSR_IA32_MC0_CTL2,

arch/x86/kvm/x86.c

4341

if (msr > last_msr)

arch/x86/kvm/x86.c

4344

offset = array_index_nospec(msr - MSR_IA32_MC0_CTL,

arch/x86/kvm/x86.c

484

static bool kvm_is_immutable_feature_msr(u32 msr)

arch/x86/kvm/x86.c

488

if (msr >= KVM_FIRST_EMULATED_VMX_MSR && msr <= KVM_LAST_EMULATED_VMX_MSR)

arch/x86/kvm/x86.c

492

if (msr == msr_based_features_all_except_vmx[i])

arch/x86/kvm/x86.c

493

return msr != MSR_IA32_UCODE_REV;

arch/x86/kvm/x86.c

519

static __always_inline int kvm_do_msr_access(struct kvm_vcpu *vcpu, u32 msr,

arch/x86/kvm/x86.c

533

ret = msr_access_fn(vcpu, msr, data, host_initiated);

arch/x86/kvm/x86.c

546

if (host_initiated && !*data && kvm_is_advertised_msr(msr))

arch/x86/kvm/x86.c

551

op, msr, *data);

arch/x86/kvm/x86.c

556

kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n", op, msr, *data);

arch/x86/kvm/x86.c

6092

static int kvm_get_one_msr(struct kvm_vcpu *vcpu, u32 msr, u64 __user *user_val)

arch/x86/kvm/x86.c

6096

if (do_get_msr(vcpu, msr, &val))

arch/x86/kvm/x86.c

610

static int kvm_probe_user_return_msr(u32 msr)

arch/x86/kvm/x86.c

6105

static int kvm_set_one_msr(struct kvm_vcpu *vcpu, u32 msr, u64 __user *user_val)

arch/x86/kvm/x86.c

6112

if (do_set_msr(vcpu, msr, &val))

arch/x86/kvm/x86.c

616

ret = rdmsrq_safe(msr, &val);

arch/x86/kvm/x86.c

619

ret = wrmsrq_safe(msr, val);

arch/x86/kvm/x86.c

625

int kvm_add_user_return_msr(u32 msr)

arch/x86/kvm/x86.c

629

if (kvm_probe_user_return_msr(msr))

arch/x86/kvm/x86.c

632

kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;

arch/x86/kvm/x86.c

637

int kvm_find_user_return_msr(u32 msr)

arch/x86/kvm/x86.c

642

if (kvm_uret_msrs_list[i] == msr)

arch/x86/kvm/x86.h

468

int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);

arch/x86/kvm/x86.h

469

int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);

arch/x86/kvm/x86.h

476

fastpath_t handle_fastpath_wrmsr_imm(struct kvm_vcpu *vcpu, u32 msr, int reg);

arch/x86/kvm/x86.h

532

static inline void kvm_pr_unimpl_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64 data)

arch/x86/kvm/x86.h

535

vcpu_unimpl(vcpu, "Unhandled WRMSR(0x%x) = 0x%llx\n", msr, data);

arch/x86/kvm/x86.h

538

static inline void kvm_pr_unimpl_rdmsr(struct kvm_vcpu *vcpu, u32 msr)

arch/x86/kvm/x86.h

541

vcpu_unimpl(vcpu, "Unhandled RDMSR(0x%x)\n", msr);

arch/x86/kvm/xen.c

1387

if (xhc->msr &&

arch/x86/kvm/xen.c

1388

(xhc->msr < KVM_XEN_MSR_MIN_INDEX || xhc->msr > KVM_XEN_MSR_MAX_INDEX))

arch/x86/kvm/xen.c

1393

if (xhc->msr && !kvm->arch.xen.hvm_config.msr)

arch/x86/kvm/xen.c

1395

else if (!xhc->msr && kvm->arch.xen.hvm_config.msr)

arch/x86/kvm/xen.c

2346

if (kvm->arch.xen.hvm_config.msr)

arch/x86/kvm/xen.h

143

static inline bool kvm_xen_is_hypercall_page_msr(struct kvm *kvm, u32 msr)

arch/x86/kvm/xen.h

64

kvm->arch.xen.hvm_config.msr;

arch/x86/kvm/xen.h

67

static inline bool kvm_xen_is_hypercall_page_msr(struct kvm *kvm, u32 msr)

arch/x86/kvm/xen.h

72

return msr && msr == kvm->arch.xen.hvm_config.msr;

arch/x86/lib/msr-smp.c

11

struct msr *reg;

arch/x86/lib/msr-smp.c

125

void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs)

arch/x86/lib/msr-smp.c

139

void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs)

arch/x86/lib/msr-smp.c

146

struct msr_info msr;

arch/x86/lib/msr-smp.c

156

rv->msr.err = rdmsr_safe(rv->msr.msr_no, &rv->msr.reg.l, &rv->msr.reg.h);

arch/x86/lib/msr-smp.c

177

rv.msr.msr_no = msr_no;

arch/x86/lib/msr-smp.c

182

err = rv.msr.err;

arch/x86/lib/msr-smp.c

184

*l = rv.msr.reg.l;

arch/x86/lib/msr-smp.c

185

*h = rv.msr.reg.h;

arch/x86/lib/msr-smp.c

24

struct msr *reg;

arch/x86/lib/msr-smp.c

98

struct msr __percpu *msrs,

arch/x86/lib/msr.c

10

struct msr __percpu *msrs_alloc(void)

arch/x86/lib/msr.c

103

int msr_set_bit(u32 msr, u8 bit)

arch/x86/lib/msr.c

105

return __flip_bit(msr, bit, true);

arch/x86/lib/msr.c

119

int msr_clear_bit(u32 msr, u8 bit)

arch/x86/lib/msr.c

12

struct msr __percpu *msrs = NULL;

arch/x86/lib/msr.c

121

return __flip_bit(msr, bit, false);

arch/x86/lib/msr.c

126

void do_trace_write_msr(u32 msr, u64 val, int failed)

arch/x86/lib/msr.c

128

trace_write_msr(msr, val, failed);

arch/x86/lib/msr.c

133

void do_trace_read_msr(u32 msr, u64 val, int failed)

arch/x86/lib/msr.c

135

trace_read_msr(msr, val, failed);

arch/x86/lib/msr.c

14

msrs = alloc_percpu(struct msr);

arch/x86/lib/msr.c

140

void do_trace_rdpmc(u32 msr, u64 val, int failed)

arch/x86/lib/msr.c

142

trace_rdpmc(msr, val, failed);

arch/x86/lib/msr.c

24

void msrs_free(struct msr __percpu *msrs)

arch/x86/lib/msr.c

40

static int msr_read(u32 msr, struct msr *m)

arch/x86/lib/msr.c

45

err = rdmsrq_safe(msr, &val);

arch/x86/lib/msr.c

60

static int msr_write(u32 msr, struct msr *m)

arch/x86/lib/msr.c

62

return wrmsrq_safe(msr, m->q);

arch/x86/lib/msr.c

65

static inline int __flip_bit(u32 msr, u8 bit, bool set)

arch/x86/lib/msr.c

67

struct msr m, m1;

arch/x86/lib/msr.c

73

err = msr_read(msr, &m);

arch/x86/lib/msr.c

86

err = msr_write(msr, &m1);

arch/x86/pci/mmconfig-shared.c

193

u64 base, msr;

arch/x86/pci/mmconfig-shared.c

204

msr = high;

arch/x86/pci/mmconfig-shared.c

205

msr <<= 32;

arch/x86/pci/mmconfig-shared.c

206

msr |= low;

arch/x86/pci/mmconfig-shared.c

209

if (!(msr & FAM10H_MMIO_CONF_ENABLE))

arch/x86/pci/mmconfig-shared.c

212

base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);

arch/x86/pci/mmconfig-shared.c

214

busnbits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &

arch/x86/platform/pvh/enlighten.c

119

u32 msr = xen_cpuid_base();

arch/x86/platform/pvh/enlighten.c

120

bool xen_guest = !!msr;

arch/x86/power/cpu.c

43

struct saved_msr *msr = ctxt->saved_msrs.array;

arch/x86/power/cpu.c

44

struct saved_msr *end = msr + ctxt->saved_msrs.num;

arch/x86/power/cpu.c

46

while (msr < end) {

arch/x86/power/cpu.c

47

if (msr->valid)

arch/x86/power/cpu.c

48

rdmsrq(msr->info.msr_no, msr->info.reg.q);

arch/x86/power/cpu.c

49

msr++;

arch/x86/power/cpu.c

55

struct saved_msr *msr = ctxt->saved_msrs.array;

arch/x86/power/cpu.c

56

struct saved_msr *end = msr + ctxt->saved_msrs.num;

arch/x86/power/cpu.c

58

while (msr < end) {

arch/x86/power/cpu.c

59

if (msr->valid)

arch/x86/power/cpu.c

60

wrmsrq(msr->info.msr_no, msr->info.reg.q);

arch/x86/power/cpu.c

61

msr++;

arch/x86/xen/enlighten_pv.c

1088

static u64 xen_do_read_msr(u32 msr, int *err)

arch/x86/xen/enlighten_pv.c

1092

if (pmu_msr_chk_emulated(msr, &val, true))

arch/x86/xen/enlighten_pv.c

1096

*err = native_read_msr_safe(msr, &val);

arch/x86/xen/enlighten_pv.c

1098

val = native_read_msr(msr);

arch/x86/xen/enlighten_pv.c

1100

switch (msr) {

arch/x86/xen/enlighten_pv.c

1123

static void xen_do_write_msr(u32 msr, u64 val, int *err)

arch/x86/xen/enlighten_pv.c

1125

switch (msr) {

arch/x86/xen/enlighten_pv.c

1151

if (pmu_msr_chk_emulated(msr, &val, false))

arch/x86/xen/enlighten_pv.c

1155

*err = native_write_msr_safe(msr, val);

arch/x86/xen/enlighten_pv.c

1157

native_write_msr(msr, val);

arch/x86/xen/enlighten_pv.c

1161

static int xen_read_msr_safe(u32 msr, u64 *val)

arch/x86/xen/enlighten_pv.c

1165

*val = xen_do_read_msr(msr, &err);

arch/x86/xen/enlighten_pv.c

1169

static int xen_write_msr_safe(u32 msr, u64 val)

arch/x86/xen/enlighten_pv.c

1173

xen_do_write_msr(msr, val, &err);

arch/x86/xen/enlighten_pv.c

1178

static u64 xen_read_msr(u32 msr)

arch/x86/xen/enlighten_pv.c

1182

return xen_do_read_msr(msr, xen_msr_safe ? &err : NULL);

arch/x86/xen/enlighten_pv.c

1185

static void xen_write_msr(u32 msr, u64 val)

arch/x86/xen/enlighten_pv.c

1189

xen_do_write_msr(msr, val, xen_msr_safe ? &err : NULL);

arch/x86/xen/pmu.c

132

static bool is_amd_pmu_msr(u32 msr)

arch/x86/xen/pmu.c

138

if ((msr >= MSR_F15H_PERF_CTL &&

arch/x86/xen/pmu.c

139

msr < MSR_F15H_PERF_CTR + (amd_num_counters * 2)) ||

arch/x86/xen/pmu.c

140

(msr >= MSR_K7_EVNTSEL0 &&

arch/x86/xen/pmu.c

141

msr < MSR_K7_PERFCTR0 + amd_num_counters))

arch/x86/xen/pmu.c

198

static bool xen_intel_pmu_emulate(u32 msr, u64 *val, int type, int index, bool is_read)

arch/x86/xen/pmu.c

213

switch (msr) {

arch/x86/xen/pmu.c

251

if (msr == MSR_CORE_PERF_GLOBAL_OVF_CTRL)

arch/x86/xen/pmu.c

260

static bool xen_amd_pmu_emulate(u32 msr, u64 *val, bool is_read)

arch/x86/xen/pmu.c

273

((msr >= MSR_K7_EVNTSEL0) && (msr <= MSR_K7_PERFCTR3)))

arch/x86/xen/pmu.c

274

msr = get_fam15h_addr(msr);

arch/x86/xen/pmu.c

278

if (msr == amd_ctrls_base + off) {

arch/x86/xen/pmu.c

282

} else if (msr == amd_counters_base + off) {

arch/x86/xen/pmu.c

301

bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read)

arch/x86/xen/pmu.c

305

if (is_amd_pmu_msr(msr))

arch/x86/xen/pmu.c

306

return xen_amd_pmu_emulate(msr, val, is_read);

arch/x86/xen/pmu.c

308

if (is_intel_pmu_msr(msr, &type, &index))

arch/x86/xen/pmu.c

309

return xen_intel_pmu_emulate(msr, val, type, index, is_read);

arch/x86/xen/pmu.c

322

u32 msr;

arch/x86/xen/pmu.c

325

msr = amd_counters_base + (counter * amd_msr_step);

arch/x86/xen/pmu.c

326

native_read_msr_safe(msr, &val);

arch/x86/xen/pmu.c

344

u32 msr;

arch/x86/xen/pmu.c

348

msr = MSR_CORE_PERF_FIXED_CTR0 + (counter & 0xffff);

arch/x86/xen/pmu.c

350

msr = MSR_IA32_PERFCTR0 + counter;

arch/x86/xen/pmu.c

352

native_read_msr_safe(msr, &val);

arch/x86/xen/xen-ops.h

273

bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read);

drivers/acpi/processor_throttling.c

702

u64 msr = 0;

drivers/acpi/processor_throttling.c

713

msr = (msr_high << 32) | msr_low;

drivers/acpi/processor_throttling.c

714

*value = (u64) msr;

drivers/acpi/processor_throttling.c

723

u64 msr;

drivers/acpi/processor_throttling.c

729

msr = value;

drivers/acpi/processor_throttling.c

731

msr & 0xffffffff, msr >> 32);

drivers/ata/pata_cs5536.c

33

module_param_named(msr, use_msr, int, 0644);

drivers/ata/pata_cs5536.c

34

MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)");

drivers/bluetooth/dtl1_cs.c

293

unsigned char msr;

drivers/bluetooth/dtl1_cs.c

340

msr = inb(iobase + UART_MSR);

drivers/bluetooth/dtl1_cs.c

342

if (info->ri_latch ^ (msr & UART_MSR_RI)) {

drivers/bluetooth/dtl1_cs.c

343

info->ri_latch = msr & UART_MSR_RI;

drivers/clk/meson/a1-peripherals.c

1867

static A1_PCLK(msr, SYS_CLK_EN0, 10, CLK_IGNORE_UNUSED);

drivers/cpufreq/acpi-cpufreq.c

211

static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)

drivers/cpufreq/acpi-cpufreq.c

218

msr &= AMD_MSR_RANGE;

drivers/cpufreq/acpi-cpufreq.c

220

msr &= HYGON_MSR_RANGE;

drivers/cpufreq/acpi-cpufreq.c

222

msr &= INTEL_MSR_RANGE;

drivers/cpufreq/acpi-cpufreq.c

227

if (msr == perf->states[pos->driver_data].status)

drivers/cpufreq/acpi-cpufreq.c

76

u64 msr;

drivers/cpufreq/acpi-cpufreq.c

82

rdmsrq_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &msr);

drivers/cpufreq/acpi-cpufreq.c

83

return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);

drivers/cpufreq/acpi-cpufreq.c

86

rdmsrq_on_cpu(cpu, MSR_K7_HWCR, &msr);

drivers/cpufreq/acpi-cpufreq.c

87

return !(msr & MSR_K7_HWCR_CPB_DIS);

drivers/cpufreq/amd_freq_sensitivity.c

45

struct msr actual, reference;

drivers/cpufreq/speedstep-centrino.c

287

static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe)

drivers/cpufreq/speedstep-centrino.c

299

msr = (msr >> 8) & 0xff;

drivers/cpufreq/speedstep-centrino.c

300

return msr * 100000;

drivers/cpufreq/speedstep-centrino.c

307

msr &= 0xffff;

drivers/cpufreq/speedstep-centrino.c

312

if (msr == per_cpu(centrino_model, cpu)->op_points[i].driver_data)

drivers/cpufreq/speedstep-centrino.c

420

unsigned int msr, oldmsr = 0, h = 0, cpu = policy->cpu;

drivers/cpufreq/speedstep-centrino.c

459

msr = op_points->driver_data;

drivers/cpufreq/speedstep-centrino.c

463

if (msr == (oldmsr & 0xffff)) {

drivers/cpufreq/speedstep-centrino.c

473

msr &= 0xffff;

drivers/cpufreq/speedstep-centrino.c

474

oldmsr |= msr;

drivers/edac/amd64_edac.c

17

static struct msr __percpu *msrs;

drivers/edac/amd64_edac.c

3221

struct msr *reg = per_cpu_ptr(msrs, cpu);

drivers/edac/amd64_edac.c

3253

struct msr *reg = per_cpu_ptr(msrs, cpu);

drivers/hwtracing/coresight/coresight-tpdm.c

108

drvdata->cmb->msr[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.c

157

drvdata->dsb->msr[tpdm_attr->idx] = val;

drivers/hwtracing/coresight/coresight-tpdm.c

187

drvdata->cmb->msr[tpdm_attr->idx] = val;

drivers/hwtracing/coresight/coresight-tpdm.c

336

writel_relaxed(drvdata->dsb->msr[i],

drivers/hwtracing/coresight/coresight-tpdm.c

410

writel_relaxed(drvdata->cmb->msr[i],

drivers/hwtracing/coresight/coresight-tpdm.c

83

drvdata->dsb->msr[tpdm_attr->idx]);

drivers/hwtracing/coresight/coresight-tpdm.h

201

tpdm_simple_dataset_rw(msr##nr, \

drivers/hwtracing/coresight/coresight-tpdm.h

225

tpdm_simple_dataset_rw(msr##nr, \

drivers/hwtracing/coresight/coresight-tpdm.h

253

u32 msr[TPDM_DSB_MAX_MSR];

drivers/hwtracing/coresight/coresight-tpdm.h

281

u32 msr[TPDM_CMB_MAX_MSR];

drivers/i2c/busses/i2c-rcar.c

552

static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)

drivers/i2c/busses/i2c-rcar.c

558

if (WARN(!(msr & MDE), "spurious irq"))

drivers/i2c/busses/i2c-rcar.c

561

if (msr & MAT)

drivers/i2c/busses/i2c-rcar.c

601

static void rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)

drivers/i2c/busses/i2c-rcar.c

608

if (!(msr & MDR))

drivers/i2c/busses/i2c-rcar.c

611

if (msr & MAT) {

drivers/i2c/busses/i2c-rcar.c

732

static irqreturn_t rcar_i2c_irq(int irq, struct rcar_i2c_priv *priv, u32 msr)

drivers/i2c/busses/i2c-rcar.c

734

if (!msr) {

drivers/i2c/busses/i2c-rcar.c

742

if (msr & MAL) {

drivers/i2c/busses/i2c-rcar.c

748

if (msr & MNR) {

drivers/i2c/busses/i2c-rcar.c

757

if (msr & MST) {

drivers/i2c/busses/i2c-rcar.c

764

rcar_i2c_irq_recv(priv, msr);

drivers/i2c/busses/i2c-rcar.c

766

rcar_i2c_irq_send(priv, msr);

drivers/i2c/busses/i2c-rcar.c

782

u32 msr;

drivers/i2c/busses/i2c-rcar.c

789

msr = rcar_i2c_read(priv, ICMSR);

drivers/i2c/busses/i2c-rcar.c

791

msr &= rcar_i2c_read(priv, ICMIER);

drivers/i2c/busses/i2c-rcar.c

793

return rcar_i2c_irq(irq, priv, msr);

drivers/i2c/busses/i2c-rcar.c

799

u32 msr;

drivers/i2c/busses/i2c-rcar.c

802

msr = rcar_i2c_read(priv, ICMSR);

drivers/i2c/busses/i2c-rcar.c

804

msr &= rcar_i2c_read(priv, ICMIER);

drivers/i2c/busses/i2c-rcar.c

810

if (likely(!(priv->flags & ID_REP_AFTER_RD) && msr))

drivers/i2c/busses/i2c-rcar.c

813

return rcar_i2c_irq(irq, priv, msr);

drivers/i2c/busses/i2c-rcar.c

992

u32 msr = rcar_i2c_read(priv, ICMSR);

drivers/i2c/busses/i2c-rcar.c

994

msr &= (rcar_i2c_is_recv(priv) ? RCAR_IRQ_RECV : RCAR_IRQ_SEND) | RCAR_IRQ_STOP;

drivers/i2c/busses/i2c-rcar.c

996

if (msr) {

drivers/i2c/busses/i2c-sh7760.c

117

unsigned long msr, fsr, fier, len;

drivers/i2c/busses/i2c-sh7760.c

119

msr = IN32(id, I2CMSR);

drivers/i2c/busses/i2c-sh7760.c

123

if (msr & MSR_MAL) {

drivers/i2c/busses/i2c-sh7760.c

131

if (msr & MSR_MNR) {

drivers/i2c/busses/i2c-sh7760.c

146

msr &= ~MSR_MAT;

drivers/i2c/busses/i2c-sh7760.c

152

if (msr & MSR_MST) {

drivers/i2c/busses/i2c-sh7760.c

158

if (msr & MSR_MAT)

drivers/i2c/busses/i2c-sh7760.c

231

OUT32(id, I2CMSR, ~msr);

drivers/idle/intel_idle.c

1952

unsigned long long msr;

drivers/idle/intel_idle.c

1955

rdmsrq(MSR_PKGC6_IRTL, msr);

drivers/idle/intel_idle.c

1956

usec = irtl_2_usec(msr);

drivers/idle/intel_idle.c

1962

rdmsrq(MSR_PKGC7_IRTL, msr);

drivers/idle/intel_idle.c

1963

usec = irtl_2_usec(msr);

drivers/idle/intel_idle.c

1969

rdmsrq(MSR_PKGC8_IRTL, msr);

drivers/idle/intel_idle.c

1970

usec = irtl_2_usec(msr);

drivers/idle/intel_idle.c

1976

rdmsrq(MSR_PKGC9_IRTL, msr);

drivers/idle/intel_idle.c

1977

usec = irtl_2_usec(msr);

drivers/idle/intel_idle.c

1983

rdmsrq(MSR_PKGC10_IRTL, msr);

drivers/idle/intel_idle.c

1984

usec = irtl_2_usec(msr);

drivers/idle/intel_idle.c

1999

unsigned long long msr;

drivers/idle/intel_idle.c

2011

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr);

drivers/idle/intel_idle.c

2014

if ((msr & 0xF) != 8)

drivers/idle/intel_idle.c

2023

rdmsrq(MSR_IA32_FEAT_CTL, msr);

drivers/idle/intel_idle.c

2026

if (msr & (1 << 18))

drivers/idle/intel_idle.c

2040

unsigned long long msr;

drivers/idle/intel_idle.c

2042

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr);

drivers/idle/intel_idle.c

2051

if ((msr & 0x7) < 2) {

drivers/idle/intel_idle.c

2069

unsigned long long msr;

drivers/idle/intel_idle.c

2076

rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, msr);

drivers/idle/intel_idle.c

2079

if ((msr & 0x7) < 2) {

drivers/iio/adc/imx93_adc.c

107

u32 mcr, msr;

drivers/iio/adc/imx93_adc.c

114

ret = readl_poll_timeout(adc->regs + IMX93_ADC_MSR, msr,

drivers/iio/adc/imx93_adc.c

115

((msr & IMX93_ADC_MSR_ADCSTATUS_MASK) ==

drivers/iio/adc/imx93_adc.c

121

msr);

drivers/iio/adc/imx93_adc.c

151

u32 mcr, msr, calcfg;

drivers/iio/adc/imx93_adc.c

180

ret = readl_poll_timeout(adc->regs + IMX93_ADC_MSR, msr,

drivers/iio/adc/imx93_adc.c

181

!(msr & IMX93_ADC_MSR_CALBUSY_MASK), 1000, 2000000);

drivers/iio/adc/imx93_adc.c

189

msr = readl(adc->regs + IMX93_ADC_MSR);

drivers/iio/adc/imx93_adc.c

190

if (msr & IMX93_ADC_MSR_CALFAIL_MASK) {

drivers/iio/adc/nxp-sar-adc.c

250

u32 msr, ret;

drivers/iio/adc/nxp-sar-adc.c

252

ret = readl_poll_timeout(NXP_SAR_ADC_MSR(base), msr,

drivers/iio/adc/nxp-sar-adc.c

253

!FIELD_GET(NXP_SAR_ADC_MSR_CALBUSY, msr),

drivers/iio/adc/nxp-sar-adc.c

259

if (FIELD_GET(NXP_SAR_ADC_MSR_CALFAIL, msr)) {

drivers/iio/adc/nxp-sar-adc.c

264

FIELD_MODIFY(NXP_SAR_ADC_MSR_CALFAIL, &msr, 0x0);

drivers/iio/adc/nxp-sar-adc.c

265

writel(msr, NXP_SAR_ADC_MSR(base));

drivers/macintosh/via-pmu.c

2043

unsigned long msr;

drivers/macintosh/via-pmu.c

2076

msr = mfmsr() | MSR_POW;

drivers/macintosh/via-pmu.c

2079

mtmsr(msr);

drivers/mfd/ezx-pcap.c

145

pcap->msr |= 1 << irq_to_pcap(pcap, d->irq);

drivers/mfd/ezx-pcap.c

153

pcap->msr &= ~(1 << irq_to_pcap(pcap, d->irq));

drivers/mfd/ezx-pcap.c

168

ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr);

drivers/mfd/ezx-pcap.c

175

u32 msr, isr, int_sel, service;

drivers/mfd/ezx-pcap.c

179

ezx_pcap_read(pcap, PCAP_REG_MSR, &msr);

drivers/mfd/ezx-pcap.c

188

ezx_pcap_write(pcap, PCAP_REG_MSR, isr | msr);

drivers/mfd/ezx-pcap.c

191

service = isr & ~msr;

drivers/mfd/ezx-pcap.c

196

ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr);

drivers/mfd/ezx-pcap.c

37

u32 msr;

drivers/mfd/ezx-pcap.c

438

pcap->msr = PCAP_MASK_ALL_INTERRUPT;

drivers/misc/cs5535-mfgpt.c

48

uint32_t msr, mask, value, dummy;

drivers/misc/cs5535-mfgpt.c

67

msr = MSR_MFGPT_NR;

drivers/misc/cs5535-mfgpt.c

72

msr = MSR_MFGPT_NR;

drivers/misc/cs5535-mfgpt.c

77

msr = MSR_MFGPT_IRQ;

drivers/misc/cs5535-mfgpt.c

85

rdmsr(msr, value, dummy);

drivers/misc/cs5535-mfgpt.c

92

wrmsr(msr, value, dummy);

drivers/net/can/bxcan.c

153

u32 msr; /* 0x04 - primary status */

drivers/net/can/bxcan.c

306

return readx_poll_timeout(readl, &regs->msr, value,

drivers/net/can/bxcan.c

317

return readx_poll_timeout(readl, &regs->msr, value,

drivers/net/can/bxcan.c

328

return readx_poll_timeout(readl, &regs->msr, value,

drivers/net/can/bxcan.c

339

return readx_poll_timeout(readl, &regs->msr, value,

drivers/net/can/bxcan.c

350

return readx_poll_timeout(readl, &regs->msr, value,

drivers/net/can/bxcan.c

607

u32 msr, esr;

drivers/net/can/bxcan.c

609

msr = readl(&regs->msr);

drivers/net/can/bxcan.c

610

if (!(msr & BXCAN_MSR_ERRI))

drivers/net/can/bxcan.c

619

msr |= BXCAN_MSR_ERRI;

drivers/net/can/bxcan.c

620

writel(msr, &regs->msr);

drivers/net/ethernet/i825xx/82596.c

1155

unsigned char msr = rtc[3];

drivers/net/ethernet/i825xx/82596.c

1161

rtc[3] = msr;

drivers/net/hamradio/baycom_ser_fdx.c

252

unsigned char iir, msr;

drivers/net/hamradio/baycom_ser_fdx.c

262

msr = inb(MSR(dev->base_addr));

drivers/net/hamradio/baycom_ser_fdx.c

264

if ((msr & 8) && bc->opt_dcd)

drivers/net/hamradio/baycom_ser_fdx.c

265

hdlcdrv_setdcd(&bc->hdrv, !((msr ^ bc->opt_dcd) & 0x80));

drivers/net/hamradio/baycom_ser_fdx.c

296

msr = inb(MSR(dev->base_addr));

drivers/net/hamradio/baycom_ser_fdx.c

298

if ((msr & 8) && bc->opt_dcd)

drivers/net/hamradio/baycom_ser_fdx.c

299

hdlcdrv_setdcd(&bc->hdrv, !((msr ^ bc->opt_dcd) & 0x80));

drivers/net/hamradio/baycom_ser_fdx.c

304

ser12_rx(dev, bc, &ts, msr & 0x10); /* CTS */

drivers/net/hamradio/yam.c

745

unsigned char msr = inb(MSR(dev->base_addr));

drivers/net/hamradio/yam.c

754

yp->dcd = (msr & RX_DCD) ? 1 : 0;

drivers/net/hamradio/yam.c

761

if (msr & TX_RDY) {

drivers/net/hamradio/yam.c

768

if (msr & RX_FLAG)

drivers/net/usb/rtl8150.c

626

u8 cr, tcr, rcr, msr;

drivers/net/usb/rtl8150.c

640

get_registers(dev, MSR, 1, &msr);

drivers/net/wireless/realtek/rtl8xxxu/core.c

6609

u8 msr, bcn_ctrl, bcn_ctrl_1, atimwnd[2], atimwnd_1[2];

drivers/net/wireless/realtek/rtl8xxxu/core.c

6614

msr = rtl8xxxu_read8(priv, REG_MSR);

drivers/net/wireless/realtek/rtl8xxxu/core.c

6647

msr = (msr & 0xf0) | ((msr & 0x03) << 2) | ((msr & 0x0c) >> 2);

drivers/net/wireless/realtek/rtl8xxxu/core.c

6648

rtl8xxxu_write8(priv, REG_MSR, msr);

drivers/platform/x86/intel/speed_select_if/isst_if_common.c

474

static bool match_punit_msr_white_list(int msr)

drivers/platform/x86/intel/speed_select_if/isst_if_common.c

479

if (punit_msr_white_list[i] == msr)

drivers/platform/x86/intel/speed_select_if/isst_if_common.c

493

if (!match_punit_msr_white_list(msr_cmd->msr))

drivers/platform/x86/intel/speed_select_if/isst_if_common.c

504

msr_cmd->msr,

drivers/platform/x86/intel/speed_select_if/isst_if_common.c

508

ret = isst_store_cmd(0, msr_cmd->msr,

drivers/platform/x86/intel/speed_select_if/isst_if_common.c

515

msr_cmd->msr, &data);

drivers/powercap/intel_rapl_msr.c

121

rdmsrq(ra->reg.msr, ra->value);

drivers/powercap/intel_rapl_msr.c

125

if (rdmsrq_safe_on_cpu(cpu, ra->reg.msr, &ra->value)) {

drivers/powercap/intel_rapl_msr.c

126

pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg.msr, cpu);

drivers/powercap/intel_rapl_msr.c

140

ra->err = rdmsrq_safe(ra->reg.msr, &val);

drivers/powercap/intel_rapl_msr.c

147

ra->err = wrmsrq_safe(ra->reg.msr, val);

drivers/powercap/intel_rapl_msr.c

210

rapl_msr_priv->regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4].msr =

drivers/powercap/intel_rapl_msr.c

40

.reg_unit.msr = MSR_RAPL_POWER_UNIT,

drivers/powercap/intel_rapl_msr.c

41

.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PKG_POWER_LIMIT,

drivers/powercap/intel_rapl_msr.c

42

.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_STATUS].msr = MSR_PKG_ENERGY_STATUS,

drivers/powercap/intel_rapl_msr.c

43

.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PERF].msr = MSR_PKG_PERF_STATUS,

drivers/powercap/intel_rapl_msr.c

44

.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_INFO].msr = MSR_PKG_POWER_INFO,

drivers/powercap/intel_rapl_msr.c

45

.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PP0_POWER_LIMIT,

drivers/powercap/intel_rapl_msr.c

46

.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_STATUS].msr = MSR_PP0_ENERGY_STATUS,

drivers/powercap/intel_rapl_msr.c

47

.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_POLICY].msr = MSR_PP0_POLICY,

drivers/powercap/intel_rapl_msr.c

48

.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PP1_POWER_LIMIT,

drivers/powercap/intel_rapl_msr.c

49

.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_STATUS].msr = MSR_PP1_ENERGY_STATUS,

drivers/powercap/intel_rapl_msr.c

50

.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_POLICY].msr = MSR_PP1_POLICY,

drivers/powercap/intel_rapl_msr.c

51

.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_LIMIT].msr = MSR_DRAM_POWER_LIMIT,

drivers/powercap/intel_rapl_msr.c

52

.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_STATUS].msr = MSR_DRAM_ENERGY_STATUS,

drivers/powercap/intel_rapl_msr.c

53

.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_PERF].msr = MSR_DRAM_PERF_STATUS,

drivers/powercap/intel_rapl_msr.c

54

.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_INFO].msr = MSR_DRAM_POWER_INFO,

drivers/powercap/intel_rapl_msr.c

55

.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PLATFORM_POWER_LIMIT,

drivers/powercap/intel_rapl_msr.c

56

.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS].msr = MSR_PLATFORM_ENERGY_STATUS,

drivers/powercap/intel_rapl_msr.c

63

.reg_unit.msr = MSR_AMD_RAPL_POWER_UNIT,

drivers/powercap/intel_rapl_msr.c

64

.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_STATUS].msr = MSR_AMD_PKG_ENERGY_STATUS,

drivers/powercap/intel_rapl_msr.c

65

.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_STATUS].msr = MSR_AMD_CORE_ENERGY_STATUS,

drivers/regulator/bcm590xx-regulator.c

397

BCM59056_SR_DESC(MSR, msr, dcdc_iosr1_ranges),

drivers/ssb/driver_extif.c

43

u8 save_mcr, msr = 0;

drivers/ssb/driver_extif.c

48

msr = regs[UART_MSR] & (UART_MSR_DCD | UART_MSR_RI

drivers/ssb/driver_extif.c

52

return (msr == (UART_MSR_DCD | UART_MSR_CTS));

drivers/thermal/intel/intel_hfi.c

258

u64 new_timestamp, msr, hfi;

drivers/thermal/intel/intel_hfi.c

287

rdmsrq(MSR_IA32_PACKAGE_THERM_STATUS, msr);

drivers/thermal/intel/intel_hfi.c

288

hfi = msr & PACKAGE_THERM_STATUS_HFI_UPDATED;

drivers/thermal/intel/intel_tcc.c

281

u32 msr = pkg ? MSR_IA32_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STATUS;

drivers/thermal/intel/intel_tcc.c

290

err = rdmsr_safe(msr, &low, &high);

drivers/thermal/intel/intel_tcc.c

292

err = rdmsr_safe_on_cpu(cpu, msr, &low, &high);

drivers/thermal/intel/therm_throt.c

266

int msr;

drivers/thermal/intel/therm_throt.c

269

msr = MSR_IA32_THERM_STATUS;

drivers/thermal/intel/therm_throt.c

272

msr = MSR_IA32_PACKAGE_THERM_STATUS;

drivers/thermal/intel/therm_throt.c

277

wrmsrq(msr, msr_val);

drivers/thermal/intel/therm_throt.c

283

int msr;

drivers/thermal/intel/therm_throt.c

287

msr = MSR_IA32_THERM_STATUS;

drivers/thermal/intel/therm_throt.c

289

msr = MSR_IA32_PACKAGE_THERM_STATUS;

drivers/thermal/intel/therm_throt.c

291

rdmsrq(msr, msr_val);

drivers/thermal/mediatek/auxadc_thermal.c

317

const int *msr;

drivers/thermal/mediatek/auxadc_thermal.c

508

.msr = mt8173_msr,

drivers/thermal/mediatek/auxadc_thermal.c

539

.msr = mt2701_msr,

drivers/thermal/mediatek/auxadc_thermal.c

570

.msr = mt8365_msr,

drivers/thermal/mediatek/auxadc_thermal.c

604

.msr = mt2712_msr,

drivers/thermal/mediatek/auxadc_thermal.c

629

.msr = mt7622_msr,

drivers/thermal/mediatek/auxadc_thermal.c

665

.msr = mt8183_msr,

drivers/thermal/mediatek/auxadc_thermal.c

689

.msr = mt7986_msr,

drivers/thermal/mediatek/auxadc_thermal.c

824

raw = readl(mt->thermal_base + conf->msr[i]);

drivers/thermal/mediatek/lvts_thermal.c

167

void __iomem *msr;

drivers/thermal/mediatek/lvts_thermal.c

347

void __iomem *msr = lvts_sensor->msr;

drivers/thermal/mediatek/lvts_thermal.c

362

rc = readl_poll_timeout(msr, value, value & BIT(16),

drivers/thermal/mediatek/lvts_thermal.c

696

lvts_sensor[i].msr = imm_regs[i];

drivers/thermal/mediatek/lvts_thermal.c

699

lvts_sensor[i].msr = msr_regs[i];

drivers/thermal/mediatek/lvts_thermal.c

702

lvts_sensor[i].msr = atp_regs[i];

drivers/thermal/mediatek/lvts_thermal.c

705

lvts_sensor[i].msr = imm_regs[i];

drivers/tty/mxser.c

1073

u8 msr;

drivers/tty/mxser.c

1080

msr = mxser_check_modem_status(tty, info);

drivers/tty/mxser.c

1085

((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) |

drivers/tty/mxser.c

1086

((msr & UART_MSR_RI) ? TIOCM_RNG : 0) |

drivers/tty/mxser.c

1087

((msr & UART_MSR_DSR) ? TIOCM_DSR : 0) |

drivers/tty/mxser.c

1088

((msr & UART_MSR_CTS) ? TIOCM_CTS : 0);

drivers/tty/mxser.c

542

u8 msr)

drivers/tty/mxser.c

544

bool cts = msr & UART_MSR_CTS;

drivers/tty/mxser.c

681

u8 msr = inb(port->ioaddr + UART_MSR);

drivers/tty/mxser.c

683

if (!(msr & UART_MSR_ANY_DELTA))

drivers/tty/mxser.c

684

return msr;

drivers/tty/mxser.c

687

if (msr & UART_MSR_TERI)

drivers/tty/mxser.c

689

if (msr & UART_MSR_DDSR)

drivers/tty/mxser.c

691

if (msr & UART_MSR_DDCD)

drivers/tty/mxser.c

693

if (msr & UART_MSR_DCTS)

drivers/tty/mxser.c

697

if (tty_port_check_carrier(&port->port) && (msr & UART_MSR_DDCD)) {

drivers/tty/mxser.c

698

if (msr & UART_MSR_DCD)

drivers/tty/mxser.c

703

mxser_handle_cts(tty, port, msr);

drivers/tty/mxser.c

705

return msr;

drivers/tty/serial/8250/8250.h

269

static inline int serial8250_MSR_to_TIOCM(int msr)

drivers/tty/serial/8250/8250.h

273

if (msr & UART_MSR_DCD)

drivers/tty/serial/8250/8250.h

275

if (msr & UART_MSR_RI)

drivers/tty/serial/8250/8250.h

277

if (msr & UART_MSR_DSR)

drivers/tty/serial/8250/8250.h

279

if (msr & UART_MSR_CTS)

drivers/tty/serial/8250/8250_port.c

1993

unsigned int msr = serial_in(up, UART_MSR);

drivers/tty/serial/8250/8250_port.c

1994

up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;

drivers/tty/serial/8250/8250_port.c

1995

if (msr & UART_MSR_CTS)

drivers/tty/serial/jsm/jsm.h

261

u8 msr; /* WR MSR - Modem Status Reg */

drivers/tty/serial/jsm/jsm.h

316

u8 msr; /* WR MSR - Modem Status Reg */

drivers/tty/serial/jsm/jsm_cls.c

116

writeb(ch->ch_stopc, &ch->ch_cls_uart->msr);

drivers/tty/serial/jsm/jsm_cls.c

242

writeb(ch->ch_stopc, &ch->ch_cls_uart->msr);

drivers/tty/serial/jsm/jsm_cls.c

584

cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr));

drivers/tty/serial/jsm/jsm_cls.c

775

cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr));

drivers/tty/serial/jsm/jsm_cls.c

854

readb(&ch->ch_cls_uart->msr);

drivers/tty/serial/jsm/jsm_neo.c

1057

neo_parse_modem(ch, readb(&ch->ch_neo_uart->msr));

drivers/tty/serial/jsm/jsm_neo.c

1280

readb(&ch->ch_neo_uart->msr);

drivers/tty/serial/jsm/jsm_neo.c

808

neo_parse_modem(ch, readb(&ch->ch_neo_uart->msr));

drivers/tty/serial/ma35d1_serial.c

333

u32 mcr, msr, ier;

drivers/tty/serial/ma35d1_serial.c

355

msr = serial_in(up, MA35_MSR_REG);

drivers/tty/serial/ma35d1_serial.c

356

msr |= MA35_MSR_CTSACTLV;

drivers/tty/serial/ma35d1_serial.c

357

serial_out(up, MA35_MSR_REG, msr);

drivers/tty/serial/men_z135_uart.c

183

u8 msr;

drivers/tty/serial/men_z135_uart.c

185

msr = (uart->stat_reg >> 8) & 0xff;

drivers/tty/serial/men_z135_uart.c

187

if (msr & MEN_Z135_MSR_DDCD)

drivers/tty/serial/men_z135_uart.c

189

msr & MEN_Z135_MSR_DCD);

drivers/tty/serial/men_z135_uart.c

190

if (msr & MEN_Z135_MSR_DCTS)

drivers/tty/serial/men_z135_uart.c

192

msr & MEN_Z135_MSR_CTS);

drivers/tty/serial/men_z135_uart.c

514

u8 msr;

drivers/tty/serial/men_z135_uart.c

516

msr = ioread8(port->membase + MEN_Z135_STAT_REG + 1);

drivers/tty/serial/men_z135_uart.c

518

if (msr & MEN_Z135_MSR_CTS)

drivers/tty/serial/men_z135_uart.c

520

if (msr & MEN_Z135_MSR_DSR)

drivers/tty/serial/men_z135_uart.c

522

if (msr & MEN_Z135_MSR_RI)

drivers/tty/serial/men_z135_uart.c

524

if (msr & MEN_Z135_MSR_DCD)

drivers/tty/serial/omap-serial.c

1097

unsigned int msr = serial_in(up, UART_MSR);

drivers/tty/serial/omap-serial.c

1099

up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;

drivers/tty/serial/omap-serial.c

1100

if (msr & UART_MSR_CTS)

drivers/tty/serial/pch_uart.c

1010

u8 msr;

drivers/tty/serial/pch_uart.c

1055

msr = pch_uart_hal_get_modem(priv);

drivers/tty/serial/pch_uart.c

1058

if ((msr & UART_MSR_ANY_DELTA) == 0)

drivers/tty/serial/pch_uart.c

1450

unsigned int msr = ioread8(up->membase + UART_MSR);

drivers/tty/serial/pch_uart.c

1451

if (msr & UART_MSR_CTS)

drivers/tty/serial/pch_uart.c

544

unsigned int msr = ioread8(priv->membase + UART_MSR);

drivers/tty/serial/pch_uart.c

545

priv->dmsr = msr & PCH_UART_MSR_DELTA;

drivers/tty/serial/pch_uart.c

546

return (u8)msr;

drivers/tty/serial/sc16is7xx.c

698

u8 msr = sc16is7xx_port_read(port, SC16IS7XX_MSR_REG);

drivers/tty/serial/sc16is7xx.c

701

mctrl |= (msr & SC16IS7XX_MSR_CTS_BIT) ? TIOCM_CTS : 0;

drivers/tty/serial/sc16is7xx.c

702

mctrl |= (msr & SC16IS7XX_MSR_DSR_BIT) ? TIOCM_DSR : 0;

drivers/tty/serial/sc16is7xx.c

703

mctrl |= (msr & SC16IS7XX_MSR_CD_BIT) ? TIOCM_CAR : 0;

drivers/tty/serial/sc16is7xx.c

704

mctrl |= (msr & SC16IS7XX_MSR_RI_BIT) ? TIOCM_RNG : 0;

drivers/tty/serial/serial-tegra.c

817

unsigned long msr;

drivers/tty/serial/serial-tegra.c

819

msr = tegra_uart_read(tup, UART_MSR);

drivers/tty/serial/serial-tegra.c

820

if (!(msr & UART_MSR_ANY_DELTA))

drivers/tty/serial/serial-tegra.c

823

if (msr & UART_MSR_TERI)

drivers/tty/serial/serial-tegra.c

825

if (msr & UART_MSR_DDSR)

drivers/tty/serial/serial-tegra.c

828

if (msr & UART_MSR_DDCD)

drivers/tty/serial/serial-tegra.c

829

uart_handle_dcd_change(&tup->uport, msr & UART_MSR_DCD);

drivers/tty/serial/serial-tegra.c

831

if (msr & UART_MSR_DCTS)

drivers/tty/serial/serial-tegra.c

832

uart_handle_cts_change(&tup->uport, msr & UART_MSR_CTS);

drivers/tty/serial/serial-tegra.c

946

unsigned long msr;

drivers/tty/serial/serial-tegra.c

954

msr = tegra_uart_read(tup, UART_MSR);

drivers/tty/serial/serial-tegra.c

956

if ((mcr & TEGRA_UART_MCR_CTS_EN) && (msr & UART_MSR_CTS))

drivers/tty/serial/serial-tegra.c

966

msr = tegra_uart_read(tup, UART_MSR);

drivers/tty/serial/serial-tegra.c

969

(msr & UART_MSR_CTS))

drivers/usb/serial/ark3116.c

337

priv->msr = *buf;

drivers/usb/serial/ark3116.c

387

status = priv->msr;

drivers/usb/serial/ark3116.c

457

static void ark3116_update_msr(struct usb_serial_port *port, __u8 msr)

drivers/usb/serial/ark3116.c

463

priv->msr = msr;

drivers/usb/serial/ark3116.c

466

if (msr & UART_MSR_ANY_DELTA) {

drivers/usb/serial/ark3116.c

468

if (msr & UART_MSR_DCTS)

drivers/usb/serial/ark3116.c

470

if (msr & UART_MSR_DDSR)

drivers/usb/serial/ark3116.c

472

if (msr & UART_MSR_DDCD)

drivers/usb/serial/ark3116.c

474

if (msr & UART_MSR_TERI)

drivers/usb/serial/ark3116.c

73

__u32 msr; /* modem status register value */

drivers/usb/serial/ch341.c

102

u8 msr;

drivers/usb/serial/ch341.c

307

priv->msr = (~(*buffer)) & CH341_BITS_MODEM_STAT;

drivers/usb/serial/ch341.c

423

if (priv->msr & CH341_BIT_DCD)

drivers/usb/serial/ch341.c

745

delta = status ^ priv->msr;

drivers/usb/serial/ch341.c

746

priv->msr = status;

drivers/usb/serial/ch341.c

819

status = priv->msr;

drivers/usb/serial/f81232.c

671

u8 mcr, msr;

drivers/usb/serial/f81232.c

678

msr = port_priv->modem_status;

drivers/usb/serial/f81232.c

683

(msr & UART_MSR_CTS ? TIOCM_CTS : 0) |

drivers/usb/serial/f81232.c

684

(msr & UART_MSR_DCD ? TIOCM_CAR : 0) |

drivers/usb/serial/f81232.c

685

(msr & UART_MSR_RI ? TIOCM_RI : 0) |

drivers/usb/serial/f81232.c

686

(msr & UART_MSR_DSR ? TIOCM_DSR : 0);

drivers/usb/serial/f81232.c

780

u8 msr;

drivers/usb/serial/f81232.c

784

msr = priv->modem_status;

drivers/usb/serial/f81232.c

787

if (msr & UART_MSR_DCD)

drivers/usb/serial/f81534.c

1002

static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)

drivers/usb/serial/f81534.c

1009

if (!(msr & UART_MSR_ANY_DELTA))

drivers/usb/serial/f81534.c

1014

port_priv->shadow_msr = msr;

drivers/usb/serial/f81534.c

1018

msr);

drivers/usb/serial/f81534.c

1021

if (msr & UART_MSR_DCTS)

drivers/usb/serial/f81534.c

1023

if (msr & UART_MSR_DDSR)

drivers/usb/serial/f81534.c

1025

if (msr & UART_MSR_DDCD)

drivers/usb/serial/f81534.c

1027

if (msr & UART_MSR_TERI)

drivers/usb/serial/f81534.c

1032

if (!(msr & UART_MSR_DDCD))

drivers/usb/serial/f81534.c

1036

__func__, port_priv->phy_num, old_msr, msr);

drivers/usb/serial/f81534.c

1042

usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);

drivers/usb/serial/f81534.c

1051

u8 msr;

drivers/usb/serial/f81534.c

1054

status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);

drivers/usb/serial/f81534.c

1060

port_priv->shadow_msr = msr;

drivers/usb/serial/f81534.c

1431

u8 msr;

drivers/usb/serial/f81534.c

1435

status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);

drivers/usb/serial/f81534.c

1445

(msr & UART_MSR_CTS ? TIOCM_CTS : 0) |

drivers/usb/serial/f81534.c

1446

(msr & UART_MSR_DCD ? TIOCM_CAR : 0) |

drivers/usb/serial/f81534.c

1447

(msr & UART_MSR_RI ? TIOCM_RI : 0) |

drivers/usb/serial/f81534.c

1448

(msr & UART_MSR_DSR ? TIOCM_DSR : 0);

drivers/usb/serial/f81534.c

766

u8 msr;

drivers/usb/serial/f81534.c

773

F81534_MODEM_STATUS_REG, &msr);

drivers/usb/serial/f81534.c

777

if ((msr & msr_mask) != msr_mask)

drivers/usb/serial/io_edgeport.c

1528

unsigned int msr;

drivers/usb/serial/io_edgeport.c

1531

msr = edge_port->shadowMSR;

drivers/usb/serial/io_edgeport.c

1535

| ((msr & EDGEPORT_MSR_CTS) ? TIOCM_CTS: 0) /* 0x020 */

drivers/usb/serial/io_edgeport.c

1536

| ((msr & EDGEPORT_MSR_CD) ? TIOCM_CAR: 0) /* 0x040 */

drivers/usb/serial/io_edgeport.c

1537

| ((msr & EDGEPORT_MSR_RI) ? TIOCM_RI: 0) /* 0x080 */

drivers/usb/serial/io_edgeport.c

1538

| ((msr & EDGEPORT_MSR_DSR) ? TIOCM_DSR: 0); /* 0x100 */

drivers/usb/serial/io_ti.c

1550

static void handle_new_msr(struct edgeport_port *edge_port, u8 msr)

drivers/usb/serial/io_ti.c

1555

dev_dbg(&edge_port->port->dev, "%s - %02x\n", __func__, msr);

drivers/usb/serial/io_ti.c

1557

if (msr & (EDGEPORT_MSR_DELTA_CTS | EDGEPORT_MSR_DELTA_DSR |

drivers/usb/serial/io_ti.c

1562

if (msr & EDGEPORT_MSR_DELTA_CTS)

drivers/usb/serial/io_ti.c

1564

if (msr & EDGEPORT_MSR_DELTA_DSR)

drivers/usb/serial/io_ti.c

1566

if (msr & EDGEPORT_MSR_DELTA_CD)

drivers/usb/serial/io_ti.c

1568

if (msr & EDGEPORT_MSR_DELTA_RI)

drivers/usb/serial/io_ti.c

1574

edge_port->shadow_msr = msr & 0xf0;

drivers/usb/serial/io_ti.c

1579

if (msr & EDGEPORT_MSR_CTS)

drivers/usb/serial/io_ti.c

1631

u8 msr;

drivers/usb/serial/io_ti.c

1700

msr = data[1];

drivers/usb/serial/io_ti.c

1702

__func__, port_number, msr);

drivers/usb/serial/io_ti.c

1703

handle_new_msr(edge_port, msr);

drivers/usb/serial/io_ti.c

2401

unsigned int msr;

drivers/usb/serial/io_ti.c

2407

msr = edge_port->shadow_msr;

drivers/usb/serial/io_ti.c

2411

| ((msr & EDGEPORT_MSR_CTS) ? TIOCM_CTS: 0) /* 0x020 */

drivers/usb/serial/io_ti.c

2412

| ((msr & EDGEPORT_MSR_CD) ? TIOCM_CAR: 0) /* 0x040 */

drivers/usb/serial/io_ti.c

2413

| ((msr & EDGEPORT_MSR_RI) ? TIOCM_RI: 0) /* 0x080 */

drivers/usb/serial/io_ti.c

2414

| ((msr & EDGEPORT_MSR_DSR) ? TIOCM_DSR: 0); /* 0x100 */

drivers/usb/serial/keyspan_usa90msg.h

156

u8 msr, // reports the actual MSR register

drivers/usb/serial/mct_u232.c

306

unsigned char *msr)

drivers/usb/serial/mct_u232.c

313

*msr = 0;

drivers/usb/serial/mct_u232.c

327

*msr = 0;

drivers/usb/serial/mct_u232.c

329

*msr = buf[0];

drivers/usb/serial/mct_u232.c

331

dev_dbg(&port->dev, "get_modem_stat: 0x%x\n", *msr);

drivers/usb/serial/mct_u232.c

337

unsigned char msr)

drivers/usb/serial/mct_u232.c

340

if (msr & MCT_U232_MSR_DDSR)

drivers/usb/serial/mct_u232.c

342

if (msr & MCT_U232_MSR_DCTS)

drivers/usb/serial/mct_u232.c

344

if (msr & MCT_U232_MSR_DRI)

drivers/usb/serial/mct_u232.c

346

if (msr & MCT_U232_MSR_DCD)

drivers/usb/serial/mct_u232.c

351

unsigned int *control_state, unsigned char msr)

drivers/usb/serial/mct_u232.c

354

if (msr & MCT_U232_MSR_DSR)

drivers/usb/serial/mct_u232.c

358

if (msr & MCT_U232_MSR_CTS)

drivers/usb/serial/mct_u232.c

362

if (msr & MCT_U232_MSR_RI)

drivers/usb/serial/mct_u232.c

366

if (msr & MCT_U232_MSR_CD)

drivers/usb/serial/mct_u232.c

370

dev_dbg(&port->dev, "msr_to_state: msr=0x%x ==> state=0x%x\n", msr, *control_state);

drivers/usb/serial/mos7720.c

1563

unsigned int msr ;

drivers/usb/serial/mos7720.c

1566

msr = mos7720_port->shadowMSR;

drivers/usb/serial/mos7720.c

1570

| ((msr & UART_MSR_CTS) ? TIOCM_CTS : 0) /* 0x020 */

drivers/usb/serial/mos7720.c

1571

| ((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) /* 0x040 */

drivers/usb/serial/mos7720.c

1572

| ((msr & UART_MSR_RI) ? TIOCM_RI : 0) /* 0x080 */

drivers/usb/serial/mos7720.c

1573

| ((msr & UART_MSR_DSR) ? TIOCM_DSR : 0); /* 0x100 */

drivers/usb/serial/mos7840.c

981

__u16 msr;

drivers/usb/serial/mos7840.c

985

status = mos7840_get_uart_reg(port, MODEM_STATUS_REGISTER, &msr);

drivers/usb/serial/mos7840.c

994

| ((msr & MOS7840_MSR_CTS) ? TIOCM_CTS : 0)

drivers/usb/serial/mos7840.c

995

| ((msr & MOS7840_MSR_CD) ? TIOCM_CAR : 0)

drivers/usb/serial/mos7840.c

996

| ((msr & MOS7840_MSR_RI) ? TIOCM_RI : 0)

drivers/usb/serial/mos7840.c

997

| ((msr & MOS7840_MSR_DSR) ? TIOCM_DSR : 0);

drivers/usb/serial/mxuport.c

736

unsigned int msr;

drivers/usb/serial/mxuport.c

744

msr = mxport->msr_state;

drivers/usb/serial/mxuport.c

752

((msr & UART_MSR_CTS) ? TIOCM_CTS : 0) | /* 0x020 */

drivers/usb/serial/mxuport.c

753

((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) | /* 0x040 */

drivers/usb/serial/mxuport.c

754

((msr & UART_MSR_RI) ? TIOCM_RI : 0) | /* 0x080 */

drivers/usb/serial/mxuport.c

755

((msr & UART_MSR_DSR) ? TIOCM_DSR : 0)); /* 0x100 */

drivers/usb/serial/spcp8x5.c

242

u8 msr;

drivers/usb/serial/spcp8x5.c

245

ret = spcp8x5_get_msr(port, &msr);

drivers/usb/serial/spcp8x5.c

246

if (ret || msr & MSR_STATUS_LINE_DCD)

drivers/usb/serial/ssu100.c

404

static void ssu100_update_msr(struct usb_serial_port *port, u8 msr)

drivers/usb/serial/ssu100.c

410

priv->shadowMSR = msr;

drivers/usb/serial/ssu100.c

413

if (msr & UART_MSR_ANY_DELTA) {

drivers/usb/serial/ssu100.c

415

if (msr & UART_MSR_DCTS)

drivers/usb/serial/ssu100.c

417

if (msr & UART_MSR_DDSR)

drivers/usb/serial/ssu100.c

419

if (msr & UART_MSR_DDCD)

drivers/usb/serial/ssu100.c

421

if (msr & UART_MSR_TERI)

drivers/usb/serial/ti_usb_3410_5052.c

1014

unsigned int msr;

drivers/usb/serial/ti_usb_3410_5052.c

1019

msr = tport->tp_msr;

drivers/usb/serial/ti_usb_3410_5052.c

1026

| ((msr & TI_MSR_CTS) ? TIOCM_CTS : 0)

drivers/usb/serial/ti_usb_3410_5052.c

1027

| ((msr & TI_MSR_CD) ? TIOCM_CAR : 0)

drivers/usb/serial/ti_usb_3410_5052.c

1028

| ((msr & TI_MSR_RI) ? TIOCM_RI : 0)

drivers/usb/serial/ti_usb_3410_5052.c

1029

| ((msr & TI_MSR_DSR) ? TIOCM_DSR : 0);

drivers/usb/serial/ti_usb_3410_5052.c

1110

u8 msr;

drivers/usb/serial/ti_usb_3410_5052.c

1160

msr = data[1];

drivers/usb/serial/ti_usb_3410_5052.c

1161

dev_dbg(dev, "%s - port %d, msr 0x%02X\n", __func__, port_number, msr);

drivers/usb/serial/ti_usb_3410_5052.c

1162

ti_handle_new_msr(tport, msr);

drivers/usb/serial/ti_usb_3410_5052.c

1393

static void ti_handle_new_msr(struct ti_port *tport, u8 msr)

drivers/usb/serial/ti_usb_3410_5052.c

1399

dev_dbg(&tport->tp_port->dev, "%s - msr 0x%02X\n", __func__, msr);

drivers/usb/serial/ti_usb_3410_5052.c

1401

if (msr & TI_MSR_DELTA_MASK) {

drivers/usb/serial/ti_usb_3410_5052.c

1404

if (msr & TI_MSR_DELTA_CTS)

drivers/usb/serial/ti_usb_3410_5052.c

1406

if (msr & TI_MSR_DELTA_DSR)

drivers/usb/serial/ti_usb_3410_5052.c

1408

if (msr & TI_MSR_DELTA_CD)

drivers/usb/serial/ti_usb_3410_5052.c

1410

if (msr & TI_MSR_DELTA_RI)

drivers/usb/serial/ti_usb_3410_5052.c

1416

tport->tp_msr = msr & TI_MSR_MASK;

drivers/usb/serial/ti_usb_3410_5052.c

1421

if (msr & TI_MSR_CTS)

drivers/usb/serial/ti_usb_3410_5052.c

333

static void ti_handle_new_msr(struct ti_port *tport, u8 msr);

drivers/video/fbdev/cg14.c

99

u8 msr; /* Master Status Reg */

drivers/video/fbdev/geode/gxfb.h

30

} msr;

drivers/video/fbdev/geode/lxfb.h

40

} msr;

drivers/video/fbdev/geode/lxfb_ops.c

595

rdmsrq(MSR_LX_MSR_PADSEL, par->msr.padsel);

drivers/video/fbdev/geode/lxfb_ops.c

596

rdmsrq(MSR_GLCP_DOTPLL, par->msr.dotpll);

drivers/video/fbdev/geode/lxfb_ops.c

597

rdmsrq(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg);

drivers/video/fbdev/geode/lxfb_ops.c

598

rdmsrq(MSR_LX_SPARE_MSR, par->msr.dcspare);

drivers/video/fbdev/geode/lxfb_ops.c

668

wrmsrq(MSR_LX_SPARE_MSR, par->msr.dcspare);

drivers/video/fbdev/geode/lxfb_ops.c

733

wrmsrq(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg);

drivers/video/fbdev/geode/lxfb_ops.c

734

wrmsrq(MSR_LX_MSR_PADSEL, par->msr.padsel);

drivers/video/fbdev/geode/lxfb_ops.c

768

lx_set_dotpll((u32) (par->msr.dotpll >> 32));

drivers/video/fbdev/geode/suspend_gx.c

136

wrmsrq(MSR_GX_MSR_PADSEL, par->msr.padsel);

drivers/video/fbdev/geode/suspend_gx.c

173

gx_set_dotpll((uint32_t) (par->msr.dotpll >> 32));

drivers/video/fbdev/geode/suspend_gx.c

24

rdmsrq(MSR_GX_MSR_PADSEL, par->msr.padsel);

drivers/video/fbdev/geode/suspend_gx.c

25

rdmsrq(MSR_GLCP_DOTPLL, par->msr.dotpll);

drivers/video/fbdev/i810/i810.h

221

u8 msr;

drivers/video/fbdev/i810/i810.h

241

u8 cr39, cr41, cr70, sr01, msr;

drivers/video/fbdev/i810/i810_dvt.c

267

if (~(std_modes[mode].msr & (1 << 6)))

drivers/video/fbdev/i810/i810_dvt.c

269

if (~(std_modes[mode].msr & (1 << 7)))

drivers/video/fbdev/i810/i810_gtf.c

129

u8 msr = 0;

drivers/video/fbdev/i810/i810_gtf.c

191

msr |= 1 << 6;

drivers/video/fbdev/i810/i810_gtf.c

193

msr |= 1 << 7;

drivers/video/fbdev/i810/i810_gtf.c

194

par->regs.msr = msr;

drivers/video/fbdev/i810/i810_main.c

246

i810_writeb(MSR_WRITE, mmio, par->regs.msr | 0xC8 | 1);

drivers/video/fbdev/i810/i810_main.c

520

i810_writeb(MSR_WRITE, mmio, par->hw_state.msr);

drivers/video/fbdev/i810/i810_main.c

626

par->hw_state.msr = i810_readb(MSR_READ, mmio);

include/linux/intel_rapl.h

105

u32 msr;

include/uapi/linux/isst_if.h

148

__u64 msr;

include/uapi/linux/kvm.h

105

__u32 msr;

include/uapi/linux/kvm.h

117

__u32 msr;

include/uapi/linux/kvm.h

435

} msr;

ipc/msg.c

252

struct msg_receiver *msr, *t;

ipc/msg.c

254

list_for_each_entry_safe(msr, t, &msq->q_receivers, r_list) {

ipc/msg.c

257

r_tsk = get_task_struct(msr->r_tsk);

ipc/msg.c

260

smp_store_release(&msr->r_msg, ERR_PTR(res));

ipc/msg.c

819

struct msg_receiver *msr, *t;

ipc/msg.c

821

list_for_each_entry_safe(msr, t, &msq->q_receivers, r_list) {

ipc/msg.c

822

if (testmsg(msg, msr->r_msgtype, msr->r_mode) &&

ipc/msg.c

823

!security_msg_queue_msgrcv(&msq->q_perm, msg, msr->r_tsk,

ipc/msg.c

824

msr->r_msgtype, msr->r_mode)) {

ipc/msg.c

826

list_del(&msr->r_list);

ipc/msg.c

827

if (msr->r_maxsize < msg->m_ts) {

ipc/msg.c

828

wake_q_add(wake_q, msr->r_tsk);

ipc/msg.c

831

smp_store_release(&msr->r_msg, ERR_PTR(-E2BIG));

ipc/msg.c

833

ipc_update_pid(&msq->q_lrpid, task_pid(msr->r_tsk));

ipc/msg.c

836

wake_q_add(wake_q, msr->r_tsk);

ipc/msg.c

839

smp_store_release(&msr->r_msg, msg);

lib/zstd/common/cpu.h

135

D(msr, 5)

samples/kprobes/kprobe_example.c

36

p->symbol_name, p->addr, regs->nip, regs->msr);

samples/kprobes/kprobe_example.c

77

p->symbol_name, p->addr, regs->msr);

sound/pci/ctxfi/ctamixer.c

128

for (i = 0; i < amixer->rsc.msr; i++) {

sound/pci/ctxfi/ctamixer.c

202

AMIXER, desc->msr, mgr->mgr.hw);

sound/pci/ctxfi/ctamixer.c

247

for (i = 0; i < desc->msr; i++) {

sound/pci/ctxfi/ctamixer.c

284

for (i = 0; i < amixer->rsc.msr; i++)

sound/pci/ctxfi/ctamixer.c

366

err = rsc_init(&sum->rsc, sum->idx[0], SUM, desc->msr, mgr->mgr.hw);

sound/pci/ctxfi/ctamixer.c

400

for (i = 0; i < desc->msr; i++) {

sound/pci/ctxfi/ctamixer.c

436

for (i = 0; i < sum->rsc.msr; i++)

sound/pci/ctxfi/ctamixer.h

30

unsigned int msr;

sound/pci/ctxfi/ctamixer.h

75

unsigned int msr;

sound/pci/ctxfi/ctatc.c

1148

da_dsc.msr = state ? 1 : atc->msr;

sound/pci/ctxfi/ctatc.c

1375

info.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

1428

da_desc.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

1451

src_dsc.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

1463

srcimp_dsc.msr = 8;

sound/pci/ctxfi/ctatc.c

1474

sum_dsc.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

1611

info.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

1718

unsigned int rsr, unsigned int msr,

sound/pci/ctxfi/ctatc.c

1740

atc->msr = msr;

sound/pci/ctxfi/ctatc.c

263

desc.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

270

(atc->rsr * atc->msr));

sound/pci/ctxfi/ctatc.c

285

mix_dsc.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

389

max_cisz = src->multi * src->rsc.msr;

sound/pci/ctxfi/ctatc.c

450

max_cisz = src->multi * src->rsc.msr;

sound/pci/ctxfi/ctatc.c

458

unsigned int msr:8;

sound/pci/ctxfi/ctatc.c

470

pitch = atc_get_pitch((atc->rsr * atc->msr),

sound/pci/ctxfi/ctatc.c

474

if (1 == atc->msr) { /* FIXME: do we really need SRC here if pitch==1 */

sound/pci/ctxfi/ctatc.c

477

conf[0].mix_msr = conf[0].imp_msr = conf[0].msr = 1;

sound/pci/ctxfi/ctatc.c

479

} else if (2 <= atc->msr) {

sound/pci/ctxfi/ctatc.c

483

conf[0].pitch = (atc->msr << 24);

sound/pci/ctxfi/ctatc.c

484

conf[0].msr = conf[0].mix_msr = 1;

sound/pci/ctxfi/ctatc.c

485

conf[0].imp_msr = atc->msr;

sound/pci/ctxfi/ctatc.c

489

conf[1].msr = conf[1].mix_msr = conf[1].imp_msr = 1;

sound/pci/ctxfi/ctatc.c

496

conf[0].msr = conf[0].mix_msr

sound/pci/ctxfi/ctatc.c

497

= conf[0].imp_msr = atc->msr;

sound/pci/ctxfi/ctatc.c

531

pitch = atc_get_pitch((atc->rsr * atc->msr),

sound/pci/ctxfi/ctatc.c

541

n_amixer += multi * atc->msr;

sound/pci/ctxfi/ctatc.c

542

n_srcimp += multi * atc->msr;

sound/pci/ctxfi/ctatc.c

569

src_dsc.msr = src_node_conf[i/multi].msr;

sound/pci/ctxfi/ctatc.c

587

mix_dsc.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

589

mix_dsc.msr = src_node_conf[(i-n_sum*2)/multi].mix_msr;

sound/pci/ctxfi/ctatc.c

591

mix_dsc.msr = 1;

sound/pci/ctxfi/ctatc.c

602

sum_dsc.msr = atc->msr;

sound/pci/ctxfi/ctatc.c

607

pitch = atc_get_pitch((atc->rsr * atc->msr),

sound/pci/ctxfi/ctatc.c

612

srcimp_dsc.msr = src_node_conf[i/multi].imp_msr;

sound/pci/ctxfi/ctatc.c

614

srcimp_dsc.msr = (pitch <= 0x8000000) ? atc->msr : 1;

sound/pci/ctxfi/ctatc.c

616

srcimp_dsc.msr = 1;

sound/pci/ctxfi/ctatc.c

628

src_dsc.msr = 1;

sound/pci/ctxfi/ctatc.c

694

pitch = atc_get_pitch((atc->rsr * atc->msr),

sound/pci/ctxfi/ctatc.c

702

for (j = 0; j < atc->msr; j++) {

sound/pci/ctxfi/ctatc.c

804

desc.msr = 1;

sound/pci/ctxfi/ctatc.c

805

while (apcm->substream->runtime->rate > (rsr * desc.msr))

sound/pci/ctxfi/ctatc.c

806

desc.msr <<= 1;

sound/pci/ctxfi/ctatc.c

813

pitch = atc_get_pitch(apcm->substream->runtime->rate, (rsr * desc.msr));

sound/pci/ctxfi/ctatc.c

829

mix_dsc.msr = desc.msr;

sound/pci/ctxfi/ctatc.h

152

unsigned int rsr, unsigned int msr, int chip_type,

sound/pci/ctxfi/ctatc.h

77

unsigned int msr; /* master sample rate in rsr */

sound/pci/ctxfi/ctdaio.c

171

entry = kzalloc_objs(*entry, daio->rscl.msr);

sound/pci/ctxfi/ctdaio.c

179

for (i = 0; i < daio->rscl.msr; i++, entry++) {

sound/pci/ctxfi/ctdaio.c

200

entry = kzalloc_objs(*entry, daio->rscr.msr);

sound/pci/ctxfi/ctdaio.c

208

for (i = 0; i < daio->rscr.msr; i++, entry++) {

sound/pci/ctxfi/ctdaio.c

212

dao->imappers[daio->rscl.msr + i] = entry;

sound/pci/ctxfi/ctdaio.c

240

return dao_clear_input(dao, 0, dao->daio.rscl.msr);

sound/pci/ctxfi/ctdaio.c

245

return dao_clear_input(dao, dao->daio.rscl.msr,

sound/pci/ctxfi/ctdaio.c

246

dao->daio.rscl.msr + dao->daio.rscr.msr);

sound/pci/ctxfi/ctdaio.c

274

static int dai_set_srt_msr(struct dai *dai, unsigned int msr)

sound/pci/ctxfi/ctdaio.c

278

for (rsr = 0; msr > 1; msr >>= 1)

sound/pci/ctxfi/ctdaio.c

335

err = rsc_init(&daio->rscl, idx_l, DAIO, desc->msr, hw);

sound/pci/ctxfi/ctdaio.c

339

err = rsc_init(&daio->rscr, idx_r, DAIO, desc->msr, hw);

sound/pci/ctxfi/ctdaio.c

388

dao->imappers = kzalloc(array3_size(sizeof(void *), desc->msr, 2),

sound/pci/ctxfi/ctdaio.c

410

conf = (desc->msr & 0x7) | (desc->passthru << 3);

sound/pci/ctxfi/ctdaio.c

431

if (dao->imappers[dao->daio.rscl.msr])

sound/pci/ctxfi/ctdaio.c

450

dsc.msr = desc->msr;

sound/pci/ctxfi/ctdaio.c

463

unsigned int rsr, msr;

sound/pci/ctxfi/ctdaio.c

481

for (rsr = 0, msr = desc->msr; msr > 1; msr >>= 1)

sound/pci/ctxfi/ctdaio.h

67

unsigned int msr:4;

sound/pci/ctxfi/ctdaio.h

85

int (*set_srt_msr)(struct dai *dai, unsigned int msr);

sound/pci/ctxfi/ctdaio.h

94

unsigned int msr:4;

sound/pci/ctxfi/cthardware.h

60

unsigned int msr; /* master sample rate in rsrs */

sound/pci/ctxfi/cthw20k1.c

1186

unsigned int msr; /* master sample rate in rsrs */

sound/pci/ctxfi/cthw20k1.c

1190

unsigned int msr; /* master sample rate in rsrs */

sound/pci/ctxfi/cthw20k1.c

1196

unsigned int msr; /* master sample rate in rsrs */

sound/pci/ctxfi/cthw20k1.c

1221

switch (info->msr) {

sound/pci/ctxfi/cthw20k1.c

1452

switch (info->msr) {

sound/pci/ctxfi/cthw20k1.c

2047

daio_info.msr = info->msr;

sound/pci/ctxfi/cthw20k1.c

2052

dac_info.msr = info->msr;

sound/pci/ctxfi/cthw20k1.c

2057

adc_info.msr = info->msr;

sound/pci/ctxfi/cthw20k2.c

1130

unsigned int msr; /* master sample rate in rsrs */

sound/pci/ctxfi/cthw20k2.c

1134

unsigned int msr; /* master sample rate in rsrs */

sound/pci/ctxfi/cthw20k2.c

1140

unsigned int msr; /* master sample rate in rsrs */

sound/pci/ctxfi/cthw20k2.c

1154

if (1 == info->msr) {

sound/pci/ctxfi/cthw20k2.c

1158

} else if (2 == info->msr) {

sound/pci/ctxfi/cthw20k2.c

1176

} else if ((4 == info->msr) && (hw->model == CTSB1270)) {

sound/pci/ctxfi/cthw20k2.c

1180

} else if ((4 == info->msr) && (hw->model == CTOK0010)) {

sound/pci/ctxfi/cthw20k2.c

1223

if (2 == info->msr) {

sound/pci/ctxfi/cthw20k2.c

1226

} else if (4 == info->msr) {

sound/pci/ctxfi/cthw20k2.c

1637

if (1 == info->msr)

sound/pci/ctxfi/cthw20k2.c

1639

else if (2 == info->msr)

sound/pci/ctxfi/cthw20k2.c

1734

if (1 == info->msr) {

sound/pci/ctxfi/cthw20k2.c

1739

} else if (2 == info->msr) {

sound/pci/ctxfi/cthw20k2.c

1898

if (1 == info->msr)

sound/pci/ctxfi/cthw20k2.c

1900

else if (2 == info->msr)

sound/pci/ctxfi/cthw20k2.c

1916

if (1 == info->msr) {

sound/pci/ctxfi/cthw20k2.c

1920

} else if ((2 == info->msr) || (4 == info->msr)) {

sound/pci/ctxfi/cthw20k2.c

1927

info->msr);

sound/pci/ctxfi/cthw20k2.c

2211

daio_info.msr = info->msr;

sound/pci/ctxfi/cthw20k2.c

2216

dac_info.msr = info->msr;

sound/pci/ctxfi/cthw20k2.c

2221

adc_info.msr = info->msr;

sound/pci/ctxfi/ctmixer.c

916

sum_desc.msr = mixer->atc->msr;

sound/pci/ctxfi/ctmixer.c

931

am_desc.msr = mixer->atc->msr;

sound/pci/ctxfi/ctpcm.c

276

runtime->hw.rate_max = atc->rsr * atc->msr;

sound/pci/ctxfi/ctresource.c

115

for (i = 0; (i < 8) && (!(rsc->msr & (0x1 << i))); )

sound/pci/ctxfi/ctresource.c

133

rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, struct hw *hw)

sound/pci/ctxfi/ctresource.c

140

rsc->msr = msr;

sound/pci/ctxfi/ctresource.c

199

rsc->msr = 0;

sound/pci/ctxfi/ctresource.h

35

u32 msr:4; /* The Master Sample Rate a resource working on */

sound/pci/ctxfi/ctresource.h

50

rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, struct hw *hw);

sound/pci/ctxfi/ctsrc.c

182

if (src->rsc.msr > 1) {

sound/pci/ctxfi/ctsrc.c

193

for (i = 1; i < src->rsc.msr; i++) {

sound/pci/ctxfi/ctsrc.c

228

unsigned int rsr, msr;

sound/pci/ctxfi/ctsrc.c

232

for (rsr = 0, msr = src->rsc.msr; msr > 1; msr >>= 1)

sound/pci/ctxfi/ctsrc.c

254

for (msr = 1; msr < src->rsc.msr; msr++) {

sound/pci/ctxfi/ctsrc.c

296

unsigned int rsr, msr;

sound/pci/ctxfi/ctsrc.c

301

for (rsr = 0, msr = src->rsc.msr; msr > 1; msr >>= 1)

sound/pci/ctxfi/ctsrc.c

323

for (msr = 0; msr < src->rsc.msr; msr++) {

sound/pci/ctxfi/ctsrc.c

365

err = rsc_init(&p->rsc, idx + i, SRC, desc->msr, mgr->mgr.hw);

sound/pci/ctxfi/ctsrc.c

486

for (i = 0; i < src->rsc.msr; i++) {

sound/pci/ctxfi/ctsrc.c

502

for (i = 0; i < src->rsc.msr; i++) {

sound/pci/ctxfi/ctsrc.c

518

for (i = 0; i < src->rsc.msr; i++) {

sound/pci/ctxfi/ctsrc.c

621

for (i = 0; i < srcimp->rsc.msr; i++) {

sound/pci/ctxfi/ctsrc.c

644

for (i = 0; i < srcimp->rsc.msr; i++) {

sound/pci/ctxfi/ctsrc.c

667

SRCIMP, desc->msr, mgr->mgr.hw);

sound/pci/ctxfi/ctsrc.c

672

srcimp->imappers = kzalloc_objs(struct imapper, desc->msr);

sound/pci/ctxfi/ctsrc.c

721

for (i = 0; i < desc->msr; i++) {

sound/pci/ctxfi/ctsrc.c

757

for (i = 0; i < srcimp->rsc.msr; i++)

sound/pci/ctxfi/ctsrc.h

119

unsigned int msr;

sound/pci/ctxfi/ctsrc.h

78

unsigned char msr;

sound/soc/atmel/mchp-pdmc.c

771

u32 isr, msr, pending;

sound/soc/atmel/mchp-pdmc.c

775

regmap_read(dd->regmap, MCHP_PDMC_IMR, &msr);

sound/soc/atmel/mchp-pdmc.c

777

pending = isr & msr;

sound/soc/atmel/mchp-pdmc.c

779

MCHP_PDMC_ISR, isr, MCHP_PDMC_IMR, msr, pending);

tools/arch/powerpc/include/uapi/asm/kvm.h

28

__u64 msr;

tools/arch/x86/include/uapi/asm/kvm.h

605

__u32 msr;

tools/include/uapi/linux/kvm.h

105

__u32 msr;

tools/include/uapi/linux/kvm.h

117

__u32 msr;

tools/include/uapi/linux/kvm.h

435

} msr;

tools/perf/arch/powerpc/include/dwarf-regs-table.h

20

REG_DWARFNUM_NAME(msr, 66),

tools/perf/trace/beauty/tracepoints/x86_msr.c

24

static size_t x86_MSR__scnprintf(unsigned long msr, char *bf, size_t size, bool show_prefix)

tools/perf/trace/beauty/tracepoints/x86_msr.c

26

return strarrays__scnprintf(&strarrays__x86_MSRs_tables, bf, size, "%#x", show_prefix, msr);

tools/power/cpupower/debug/i386/centrino-decode.c

28

static int rdmsr(unsigned int cpu, unsigned int msr,

tools/power/cpupower/debug/i386/centrino-decode.c

47

if (lseek(fd, msr, SEEK_CUR) == -1)

tools/power/cpupower/debug/i386/centrino-decode.c

63

static void decode (unsigned int msr)

tools/power/cpupower/debug/i386/centrino-decode.c

68

multiplier = ((msr >> 8) & 0xFF);

tools/power/cpupower/debug/i386/centrino-decode.c

70

mv = (((msr & 0xFF) * 16) + 700);

tools/power/cpupower/debug/i386/centrino-decode.c

72

printf("0x%x means multiplier %d @ %d mV\n", msr, multiplier, mv);

tools/power/cpupower/debug/i386/powernow-k8-decode.c

30

uint64_t msr = 0;

tools/power/cpupower/debug/i386/powernow-k8-decode.c

43

if (read(fd, &msr, 8) != 8)

tools/power/cpupower/debug/i386/powernow-k8-decode.c

46

*fid = ((uint32_t )(msr & 0xffffffffull)) & MSR_S_LO_CURRENT_FID;

tools/power/cpupower/debug/i386/powernow-k8-decode.c

47

*vid = ((uint32_t )(msr>>32 & 0xffffffffull)) & MSR_S_HI_CURRENT_VID;

tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c

65

int msr;

tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c

69

msr = MSR_PKG_C8_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c

72

msr = MSR_PKG_C9_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c

75

msr = MSR_PKG_C10_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c

78

msr = MSR_TSC;

tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c

83

if (read_msr(cpu, msr, val))

tools/power/cpupower/utils/idle_monitor/nhm_idle.c

74

int msr;

tools/power/cpupower/utils/idle_monitor/nhm_idle.c

78

msr = MSR_CORE_C3_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/nhm_idle.c

81

msr = MSR_CORE_C6_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/nhm_idle.c

84

msr = MSR_PKG_C3_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/nhm_idle.c

87

msr = MSR_PKG_C6_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/nhm_idle.c

90

msr = MSR_TSC;

tools/power/cpupower/utils/idle_monitor/nhm_idle.c

95

if (read_msr(cpu, msr, val))

tools/power/cpupower/utils/idle_monitor/snb_idle.c

63

int msr;

tools/power/cpupower/utils/idle_monitor/snb_idle.c

67

msr = MSR_CORE_C7_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/snb_idle.c

70

msr = MSR_PKG_C2_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/snb_idle.c

73

msr = MSR_PKG_C7_RESIDENCY;

tools/power/cpupower/utils/idle_monitor/snb_idle.c

76

msr = MSR_TSC;

tools/power/cpupower/utils/idle_monitor/snb_idle.c

81

if (read_msr(cpu, msr, val))

tools/power/x86/intel-speed-select/isst-core.c

70

int isst_send_msr_command(unsigned int cpu, unsigned int msr, int write,

tools/power/x86/intel-speed-select/isst-core.c

84

msr_cmds.msr_cmd[0].msr = msr;

tools/power/x86/intel-speed-select/isst-core.c

92

cpu, msr, write);

tools/power/x86/intel-speed-select/isst-core.c

99

cpu, msr, write, *req_resp, msr_cmds.msr_cmd[0].data);

tools/power/x86/turbostat/turbostat.c

1446

unsigned long long msr[NUM_RAPL_COUNTERS];

tools/power/x86/turbostat/turbostat.c

1464

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

1479

.msr = MSR_PKG_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1492

.msr = MSR_PKG_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1505

.msr = MSR_PKG_ENERGY_STAT,

tools/power/x86/turbostat/turbostat.c

1518

.msr = MSR_PKG_ENERGY_STAT,

tools/power/x86/turbostat/turbostat.c

1531

.msr = MSR_PP0_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1544

.msr = MSR_PP0_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1557

.msr = MSR_DRAM_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1570

.msr = MSR_DRAM_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1583

.msr = MSR_PP1_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1596

.msr = MSR_PP1_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1609

.msr = MSR_PKG_PERF_STATUS,

tools/power/x86/turbostat/turbostat.c

1622

.msr = MSR_DRAM_PERF_STATUS,

tools/power/x86/turbostat/turbostat.c

1635

.msr = MSR_CORE_ENERGY_STAT,

tools/power/x86/turbostat/turbostat.c

1648

.msr = MSR_CORE_ENERGY_STAT,

tools/power/x86/turbostat/turbostat.c

1661

.msr = MSR_PLATFORM_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1674

.msr = MSR_PLATFORM_ENERGY_STATUS,

tools/power/x86/turbostat/turbostat.c

1710

unsigned long long msr[NUM_CSTATE_COUNTERS];

tools/power/x86/turbostat/turbostat.c

1726

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

1738

.msr = MSR_CORE_C1_RES,

tools/power/x86/turbostat/turbostat.c

1748

.msr = MSR_CORE_C3_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1758

.msr = MSR_CORE_C6_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1768

.msr = MSR_CORE_C7_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1778

.msr = MSR_PKG_C2_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1788

.msr = MSR_PKG_C3_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1798

.msr = MSR_PKG_C6_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1808

.msr = MSR_PKG_C7_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1818

.msr = MSR_PKG_C8_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1828

.msr = MSR_PKG_C9_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1838

.msr = MSR_PKG_C10_RESIDENCY,

tools/power/x86/turbostat/turbostat.c

1857

unsigned long long msr[NUM_MSR_COUNTERS];

tools/power/x86/turbostat/turbostat.c

1868

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

1885

.msr = MSR_IA32_APERF,

tools/power/x86/turbostat/turbostat.c

1893

.msr = MSR_IA32_MPERF,

tools/power/x86/turbostat/turbostat.c

1901

.msr = MSR_SMI_COUNT,

tools/power/x86/turbostat/turbostat.c

2206

int get_msr_sum(int cpu, off_t offset, unsigned long long *msr);

tools/power/x86/turbostat/turbostat.c

2591

int get_msr(int cpu, off_t offset, unsigned long long *msr)

tools/power/x86/turbostat/turbostat.c

2597

retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);

tools/power/x86/turbostat/turbostat.c

2599

if (retval != sizeof *msr)

tools/power/x86/turbostat/turbostat.c

2635

ret = add_msr_counter(cpu, cai->msr);

tools/power/x86/turbostat/turbostat.c

4526

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

4548

get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr);

tools/power/x86/turbostat/turbostat.c

4550

return msr & 0xf;

tools/power/x86/turbostat/turbostat.c

4848

if (get_msr_sum(cpu, rci->msr[i], &rci->data[i]))

tools/power/x86/turbostat/turbostat.c

4851

if (get_msr(cpu, rci->msr[i], &rci->data[i]))

tools/power/x86/turbostat/turbostat.c

4982

if (get_msr(cpu, cci->msr[i], &cci->data[i]))

tools/power/x86/turbostat/turbostat.c

4986

fprintf(stderr, "cstate via %s0x%llx %u: %llu\n", "msr", cci->msr[i], i, cci->data[i]);

tools/power/x86/turbostat/turbostat.c

5081

if (get_msr(cpu, mci->msr[i], &mci->data[i]))

tools/power/x86/turbostat/turbostat.c

5178

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5251

if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))

tools/power/x86/turbostat/turbostat.c

5253

c->core_temp_c = tj_max - ((msr >> 16) & 0x7F);

tools/power/x86/turbostat/turbostat.c

5303

if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))

tools/power/x86/turbostat/turbostat.c

5305

p->pkg_temp_c = tj_max - ((msr >> 16) & 0x7F);

tools/power/x86/turbostat/turbostat.c

5398

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5436

get_msr(master_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);

tools/power/x86/turbostat/turbostat.c

5437

pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];

tools/power/x86/turbostat/turbostat.c

5442

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5448

get_msr(master_cpu, MSR_PLATFORM_INFO, &msr);

tools/power/x86/turbostat/turbostat.c

5450

fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5452

ratio = (msr >> 40) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5455

ratio = (msr >> 8) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5461

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5466

get_msr(master_cpu, MSR_IA32_POWER_CTL, &msr);

tools/power/x86/turbostat/turbostat.c

5467

fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n", master_cpu, msr, msr & 0x2 ? "EN" : "DIS");

tools/power/x86/turbostat/turbostat.c

5471

fprintf(outf, "C-state Pre-wake: %sabled\n", msr & 0x40000000 ? "DIS" : "EN");

tools/power/x86/turbostat/turbostat.c

5478

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5481

get_msr(master_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);

tools/power/x86/turbostat/turbostat.c

5483

fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5485

ratio = (msr >> 8) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5489

ratio = (msr >> 0) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5497

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5500

get_msr(master_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);

tools/power/x86/turbostat/turbostat.c

5502

fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5504

ratio = (msr >> 56) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5508

ratio = (msr >> 48) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5512

ratio = (msr >> 40) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5516

ratio = (msr >> 32) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5520

ratio = (msr >> 24) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5524

ratio = (msr >> 16) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5528

ratio = (msr >> 8) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5532

ratio = (msr >> 0) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5540

unsigned long long msr, core_counts;

tools/power/x86/turbostat/turbostat.c

5543

get_msr(master_cpu, trl_msr_offset, &msr);

tools/power/x86/turbostat/turbostat.c

5544

fprintf(outf, "cpu%d: MSR_%sTURBO_RATIO_LIMIT: 0x%08llx\n", master_cpu, trl_msr_offset == MSR_SECONDARY_TURBO_RATIO_LIMIT ? "SECONDARY_" : "", msr);

tools/power/x86/turbostat/turbostat.c

5556

ratio = (msr >> shift) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5567

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5570

get_msr(master_cpu, MSR_ATOM_CORE_RATIOS, &msr);

tools/power/x86/turbostat/turbostat.c

5571

fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", master_cpu, msr & 0xFFFFFFFF);

tools/power/x86/turbostat/turbostat.c

5573

ratio = (msr >> 0) & 0x3F;

tools/power/x86/turbostat/turbostat.c

5577

ratio = (msr >> 8) & 0x3F;

tools/power/x86/turbostat/turbostat.c

5581

ratio = (msr >> 16) & 0x3F;

tools/power/x86/turbostat/turbostat.c

5585

get_msr(master_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);

tools/power/x86/turbostat/turbostat.c

5586

fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", master_cpu, msr & 0xFFFFFFFF);

tools/power/x86/turbostat/turbostat.c

5588

ratio = (msr >> 24) & 0x3F;

tools/power/x86/turbostat/turbostat.c

5592

ratio = (msr >> 16) & 0x3F;

tools/power/x86/turbostat/turbostat.c

5596

ratio = (msr >> 8) & 0x3F;

tools/power/x86/turbostat/turbostat.c

5600

ratio = (msr >> 0) & 0x3F;

tools/power/x86/turbostat/turbostat.c

5609

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5615

get_msr(master_cpu, MSR_TURBO_RATIO_LIMIT, &msr);

tools/power/x86/turbostat/turbostat.c

5617

fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5643

cores[b_nr] = (msr & 0xFF) >> 1;

tools/power/x86/turbostat/turbostat.c

5644

ratio[b_nr] = (msr >> 8) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5647

delta_cores = (msr >> i) & 0x1F;

tools/power/x86/turbostat/turbostat.c

5648

delta_ratio = (msr >> (i + 5)) & 0x7;

tools/power/x86/turbostat/turbostat.c

5662

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5667

get_msr(master_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);

tools/power/x86/turbostat/turbostat.c

5669

fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5672

(msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",

tools/power/x86/turbostat/turbostat.c

5673

(msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",

tools/power/x86/turbostat/turbostat.c

5674

(msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",

tools/power/x86/turbostat/turbostat.c

5675

(msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",

tools/power/x86/turbostat/turbostat.c

5676

(msr & (1 << 15)) ? "" : "UN", (unsigned int)msr & 0xF, pkg_cstate_limit_strings[pkg_cstate_limit]);

tools/power/x86/turbostat/turbostat.c

5680

fprintf(outf, ", automatic c-state conversion=%s", (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");

tools/power/x86/turbostat/turbostat.c

5690

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5692

get_msr(master_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);

tools/power/x86/turbostat/turbostat.c

5693

fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5694

fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);

tools/power/x86/turbostat/turbostat.c

5696

get_msr(master_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);

tools/power/x86/turbostat/turbostat.c

5697

fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5698

if (msr) {

tools/power/x86/turbostat/turbostat.c

5699

fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);

tools/power/x86/turbostat/turbostat.c

570

int get_msr(int cpu, off_t offset, unsigned long long *msr);

tools/power/x86/turbostat/turbostat.c

5700

fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);

tools/power/x86/turbostat/turbostat.c

5701

fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);

tools/power/x86/turbostat/turbostat.c

5702

fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);

tools/power/x86/turbostat/turbostat.c

5706

get_msr(master_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);

tools/power/x86/turbostat/turbostat.c

5707

fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5708

if (msr) {

tools/power/x86/turbostat/turbostat.c

5709

fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);

tools/power/x86/turbostat/turbostat.c

5710

fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);

tools/power/x86/turbostat/turbostat.c

5711

fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);

tools/power/x86/turbostat/turbostat.c

5712

fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);

tools/power/x86/turbostat/turbostat.c

5716

get_msr(master_cpu, MSR_CONFIG_TDP_CONTROL, &msr);

tools/power/x86/turbostat/turbostat.c

5717

fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5718

if ((msr) & 0x3)

tools/power/x86/turbostat/turbostat.c

5719

fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);

tools/power/x86/turbostat/turbostat.c

5720

fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);

tools/power/x86/turbostat/turbostat.c

5723

get_msr(master_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);

tools/power/x86/turbostat/turbostat.c

5724

fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5725

fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);

tools/power/x86/turbostat/turbostat.c

5726

fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);

tools/power/x86/turbostat/turbostat.c

5734

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

5740

get_msr(master_cpu, MSR_PKGC3_IRTL, &msr);

tools/power/x86/turbostat/turbostat.c

5741

fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5742

fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);

tools/power/x86/turbostat/turbostat.c

5746

get_msr(master_cpu, MSR_PKGC6_IRTL, &msr);

tools/power/x86/turbostat/turbostat.c

5747

fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5748

fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);

tools/power/x86/turbostat/turbostat.c

5752

get_msr(master_cpu, MSR_PKGC7_IRTL, &msr);

tools/power/x86/turbostat/turbostat.c

5753

fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5754

fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);

tools/power/x86/turbostat/turbostat.c

5758

get_msr(master_cpu, MSR_PKGC8_IRTL, &msr);

tools/power/x86/turbostat/turbostat.c

5759

fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5760

fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);

tools/power/x86/turbostat/turbostat.c

5764

get_msr(master_cpu, MSR_PKGC9_IRTL, &msr);

tools/power/x86/turbostat/turbostat.c

5765

fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5766

fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);

tools/power/x86/turbostat/turbostat.c

5770

get_msr(master_cpu, MSR_PKGC10_IRTL, &msr);

tools/power/x86/turbostat/turbostat.c

5771

fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", master_cpu, msr);

tools/power/x86/turbostat/turbostat.c

5772

fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);

tools/power/x86/turbostat/turbostat.c

625

unsigned long long msr = 3;

tools/power/x86/turbostat/turbostat.c

629

if (get_msr(master_cpu, MSR_FSB_FREQ, &msr))

tools/power/x86/turbostat/turbostat.c

632

i = msr & 0xf;

tools/power/x86/turbostat/turbostat.c

6697

int get_msr_sum(int cpu, off_t offset, unsigned long long *msr)

tools/power/x86/turbostat/turbostat.c

6716

*msr = msr_last + per_cpu_msr_sum[cpu].entries[idx].sum;

tools/power/x86/turbostat/turbostat.c

7039

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

7054

get_msr(master_cpu, MSR_PLATFORM_INFO, &msr);

tools/power/x86/turbostat/turbostat.c

7055

base_ratio = (msr >> 8) & 0xFF;

tools/power/x86/turbostat/turbostat.c

7534

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

7557

if (get_msr(cpu, MSR_PM_ENABLE, &msr))

tools/power/x86/turbostat/turbostat.c

7560

fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n", cpu, msr, (msr & (1 << 0)) ? "" : "No-");

tools/power/x86/turbostat/turbostat.c

7563

if ((msr & (1 << 0)) == 0)

tools/power/x86/turbostat/turbostat.c

7566

if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))

tools/power/x86/turbostat/turbostat.c

7571

cpu, msr,

tools/power/x86/turbostat/turbostat.c

7572

(unsigned int)HWP_HIGHEST_PERF(msr),

tools/power/x86/turbostat/turbostat.c

7573

(unsigned int)HWP_GUARANTEED_PERF(msr), (unsigned int)HWP_MOSTEFFICIENT_PERF(msr), (unsigned int)HWP_LOWEST_PERF(msr));

tools/power/x86/turbostat/turbostat.c

7575

if (get_msr(cpu, MSR_HWP_REQUEST, &msr))

tools/power/x86/turbostat/turbostat.c

7580

cpu, msr,

tools/power/x86/turbostat/turbostat.c

7581

(unsigned int)(((msr) >> 0) & 0xff),

tools/power/x86/turbostat/turbostat.c

7582

(unsigned int)(((msr) >> 8) & 0xff),

tools/power/x86/turbostat/turbostat.c

7583

(unsigned int)(((msr) >> 16) & 0xff),

tools/power/x86/turbostat/turbostat.c

7584

(unsigned int)(((msr) >> 24) & 0xff), (unsigned int)(((msr) >> 32) & 0xff3), (unsigned int)(((msr) >> 42) & 0x1));

tools/power/x86/turbostat/turbostat.c

7587

if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))

tools/power/x86/turbostat/turbostat.c

7592

cpu, msr,

tools/power/x86/turbostat/turbostat.c

7593

(unsigned int)(((msr) >> 0) & 0xff),

tools/power/x86/turbostat/turbostat.c

7594

(unsigned int)(((msr) >> 8) & 0xff),

tools/power/x86/turbostat/turbostat.c

7595

(unsigned int)(((msr) >> 16) & 0xff), (unsigned int)(((msr) >> 24) & 0xff), (unsigned int)(((msr) >> 32) & 0xff3));

tools/power/x86/turbostat/turbostat.c

7598

if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))

tools/power/x86/turbostat/turbostat.c

7602

"(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n", cpu, msr, ((msr) & 0x1) ? "EN" : "Dis", ((msr) & 0x2) ? "EN" : "Dis");

tools/power/x86/turbostat/turbostat.c

7604

if (get_msr(cpu, MSR_HWP_STATUS, &msr))

tools/power/x86/turbostat/turbostat.c

7608

"(%sGuaranteed_Perf_Change, %sExcursion_Min)\n", cpu, msr, ((msr) & 0x1) ? "" : "No-", ((msr) & 0x4) ? "" : "No-");

tools/power/x86/turbostat/turbostat.c

7618

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

7639

get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);

tools/power/x86/turbostat/turbostat.c

7640

fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);

tools/power/x86/turbostat/turbostat.c

7642

(msr & 1 << 15) ? "bit15, " : "",

tools/power/x86/turbostat/turbostat.c

7643

(msr & 1 << 14) ? "bit14, " : "",

tools/power/x86/turbostat/turbostat.c

7644

(msr & 1 << 13) ? "Transitions, " : "",

tools/power/x86/turbostat/turbostat.c

7645

(msr & 1 << 12) ? "MultiCoreTurbo, " : "",

tools/power/x86/turbostat/turbostat.c

7646

(msr & 1 << 11) ? "PkgPwrL2, " : "",

tools/power/x86/turbostat/turbostat.c

7647

(msr & 1 << 10) ? "PkgPwrL1, " : "",

tools/power/x86/turbostat/turbostat.c

7648

(msr & 1 << 9) ? "CorePwr, " : "",

tools/power/x86/turbostat/turbostat.c

7649

(msr & 1 << 8) ? "Amps, " : "",

tools/power/x86/turbostat/turbostat.c

7650

(msr & 1 << 6) ? "VR-Therm, " : "",

tools/power/x86/turbostat/turbostat.c

7651

(msr & 1 << 5) ? "Auto-HWP, " : "",

tools/power/x86/turbostat/turbostat.c

7652

(msr & 1 << 4) ? "Graphics, " : "",

tools/power/x86/turbostat/turbostat.c

7653

(msr & 1 << 2) ? "bit2, " : "", (msr & 1 << 1) ? "ThermStatus, " : "", (msr & 1 << 0) ? "PROCHOT, " : "");

tools/power/x86/turbostat/turbostat.c

7655

(msr & 1 << 31) ? "bit31, " : "",

tools/power/x86/turbostat/turbostat.c

7656

(msr & 1 << 30) ? "bit30, " : "",

tools/power/x86/turbostat/turbostat.c

7657

(msr & 1 << 29) ? "Transitions, " : "",

tools/power/x86/turbostat/turbostat.c

7658

(msr & 1 << 28) ? "MultiCoreTurbo, " : "",

tools/power/x86/turbostat/turbostat.c

7659

(msr & 1 << 27) ? "PkgPwrL2, " : "",

tools/power/x86/turbostat/turbostat.c

7660

(msr & 1 << 26) ? "PkgPwrL1, " : "",

tools/power/x86/turbostat/turbostat.c

7661

(msr & 1 << 25) ? "CorePwr, " : "",

tools/power/x86/turbostat/turbostat.c

7662

(msr & 1 << 24) ? "Amps, " : "",

tools/power/x86/turbostat/turbostat.c

7663

(msr & 1 << 22) ? "VR-Therm, " : "",

tools/power/x86/turbostat/turbostat.c

7664

(msr & 1 << 21) ? "Auto-HWP, " : "",

tools/power/x86/turbostat/turbostat.c

7665

(msr & 1 << 20) ? "Graphics, " : "",

tools/power/x86/turbostat/turbostat.c

7666

(msr & 1 << 18) ? "bit18, " : "", (msr & 1 << 17) ? "ThermStatus, " : "", (msr & 1 << 16) ? "PROCHOT, " : "");

tools/power/x86/turbostat/turbostat.c

7670

get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);

tools/power/x86/turbostat/turbostat.c

7671

fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);

tools/power/x86/turbostat/turbostat.c

7673

(msr & 1 << 0) ? "PROCHOT, " : "",

tools/power/x86/turbostat/turbostat.c

7674

(msr & 1 << 1) ? "ThermStatus, " : "",

tools/power/x86/turbostat/turbostat.c

7675

(msr & 1 << 4) ? "Graphics, " : "",

tools/power/x86/turbostat/turbostat.c

7676

(msr & 1 << 6) ? "VR-Therm, " : "",

tools/power/x86/turbostat/turbostat.c

7677

(msr & 1 << 8) ? "Amps, " : "",

tools/power/x86/turbostat/turbostat.c

7678

(msr & 1 << 9) ? "GFXPwr, " : "", (msr & 1 << 10) ? "PkgPwrL1, " : "", (msr & 1 << 11) ? "PkgPwrL2, " : "");

tools/power/x86/turbostat/turbostat.c

7680

(msr & 1 << 16) ? "PROCHOT, " : "",

tools/power/x86/turbostat/turbostat.c

7681

(msr & 1 << 17) ? "ThermStatus, " : "",

tools/power/x86/turbostat/turbostat.c

7682

(msr & 1 << 20) ? "Graphics, " : "",

tools/power/x86/turbostat/turbostat.c

7683

(msr & 1 << 22) ? "VR-Therm, " : "",

tools/power/x86/turbostat/turbostat.c

7684

(msr & 1 << 24) ? "Amps, " : "",

tools/power/x86/turbostat/turbostat.c

7685

(msr & 1 << 25) ? "GFXPwr, " : "", (msr & 1 << 26) ? "PkgPwrL1, " : "", (msr & 1 << 27) ? "PkgPwrL2, " : "");

tools/power/x86/turbostat/turbostat.c

7688

get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);

tools/power/x86/turbostat/turbostat.c

7689

fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);

tools/power/x86/turbostat/turbostat.c

7691

(msr & 1 << 0) ? "PROCHOT, " : "",

tools/power/x86/turbostat/turbostat.c

7692

(msr & 1 << 1) ? "ThermStatus, " : "",

tools/power/x86/turbostat/turbostat.c

7693

(msr & 1 << 6) ? "VR-Therm, " : "",

tools/power/x86/turbostat/turbostat.c

7694

(msr & 1 << 8) ? "Amps, " : "", (msr & 1 << 10) ? "PkgPwrL1, " : "", (msr & 1 << 11) ? "PkgPwrL2, " : "");

tools/power/x86/turbostat/turbostat.c

7696

(msr & 1 << 16) ? "PROCHOT, " : "",

tools/power/x86/turbostat/turbostat.c

7697

(msr & 1 << 17) ? "ThermStatus, " : "",

tools/power/x86/turbostat/turbostat.c

7698

(msr & 1 << 22) ? "VR-Therm, " : "",

tools/power/x86/turbostat/turbostat.c

7699

(msr & 1 << 24) ? "Amps, " : "", (msr & 1 << 26) ? "PkgPwrL1, " : "", (msr & 1 << 27) ? "PkgPwrL2, " : "");

tools/power/x86/turbostat/turbostat.c

7717

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

7720

if (!get_msr(master_cpu, MSR_PKG_POWER_INFO, &msr))

tools/power/x86/turbostat/turbostat.c

7721

return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;

tools/power/x86/turbostat/turbostat.c

7732

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

7759

if (get_msr(master_cpu, MSR_RAPL_POWER_UNIT, &msr))

tools/power/x86/turbostat/turbostat.c

7762

rapl_power_units = 1.0 / (1 << (msr & 0xF));

tools/power/x86/turbostat/turbostat.c

7764

rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;

tools/power/x86/turbostat/turbostat.c

7766

rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));

tools/power/x86/turbostat/turbostat.c

7778

time_unit = msr >> 16 & 0xF;

tools/power/x86/turbostat/turbostat.c

7793

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

7807

if (get_msr(master_cpu, MSR_RAPL_PWR_UNIT, &msr))

tools/power/x86/turbostat/turbostat.c

7810

rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));

tools/power/x86/turbostat/turbostat.c

7811

rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));

tools/power/x86/turbostat/turbostat.c

7812

rapl_power_units = ldexp(1.0, -(msr & 0xf));

tools/power/x86/turbostat/turbostat.c

7821

void print_power_limit_msr(int cpu, unsigned long long msr, char *label)

tools/power/x86/turbostat/turbostat.c

7825

((msr >> 15) & 1) ? "EN" : "DIS",

tools/power/x86/turbostat/turbostat.c

7826

((msr >> 0) & 0x7FFF) * rapl_power_units,

tools/power/x86/turbostat/turbostat.c

7827

(1.0 + (((msr >> 22) & 0x3) / 4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units, (((msr >> 16) & 1) ? "EN" : "DIS"));

tools/power/x86/turbostat/turbostat.c

7986

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

8008

if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))

tools/power/x86/turbostat/turbostat.c

8012

if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))

tools/power/x86/turbostat/turbostat.c

8016

fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr, rapl_power_units, rapl_energy_units, rapl_time_units);

tools/power/x86/turbostat/turbostat.c

8020

if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))

tools/power/x86/turbostat/turbostat.c

8024

cpu, msr,

tools/power/x86/turbostat/turbostat.c

8025

((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,

tools/power/x86/turbostat/turbostat.c

8026

((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,

tools/power/x86/turbostat/turbostat.c

8027

((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);

tools/power/x86/turbostat/turbostat.c

8032

if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))

tools/power/x86/turbostat/turbostat.c

8035

fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr >> 63) & 1 ? "" : "UN");

tools/power/x86/turbostat/turbostat.c

8037

print_power_limit_msr(cpu, msr, "PKG Limit #1");

tools/power/x86/turbostat/turbostat.c

8040

((msr >> 47) & 1) ? "EN" : "DIS",

tools/power/x86/turbostat/turbostat.c

8041

((msr >> 32) & 0x7FFF) * rapl_power_units,

tools/power/x86/turbostat/turbostat.c

8042

(1.0 + (((msr >> 54) & 0x3) / 4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units, ((msr >> 48) & 1) ? "EN" : "DIS");

tools/power/x86/turbostat/turbostat.c

8044

if (get_msr(cpu, MSR_VR_CURRENT_CONFIG, &msr))

tools/power/x86/turbostat/turbostat.c

8047

fprintf(outf, "cpu%d: MSR_VR_CURRENT_CONFIG: 0x%08llx\n", cpu, msr);

tools/power/x86/turbostat/turbostat.c

8048

fprintf(outf, "cpu%d: PKG Limit #4: %f Watts (%slocked)\n", cpu, ((msr >> 0) & 0x1FFF) * rapl_power_units, (msr >> 31) & 1 ? "" : "UN");

tools/power/x86/turbostat/turbostat.c

8052

if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))

tools/power/x86/turbostat/turbostat.c

8056

cpu, msr,

tools/power/x86/turbostat/turbostat.c

8057

((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,

tools/power/x86/turbostat/turbostat.c

8058

((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,

tools/power/x86/turbostat/turbostat.c

8059

((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);

tools/power/x86/turbostat/turbostat.c

8062

if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))

tools/power/x86/turbostat/turbostat.c

8064

fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr >> 31) & 1 ? "" : "UN");

tools/power/x86/turbostat/turbostat.c

8066

print_power_limit_msr(cpu, msr, "DRAM Limit");

tools/power/x86/turbostat/turbostat.c

8069

if (get_msr(cpu, MSR_PP0_POLICY, &msr))

tools/power/x86/turbostat/turbostat.c

8072

fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);

tools/power/x86/turbostat/turbostat.c

8075

if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))

tools/power/x86/turbostat/turbostat.c

8077

fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr >> 31) & 1 ? "" : "UN");

tools/power/x86/turbostat/turbostat.c

8078

print_power_limit_msr(cpu, msr, "Cores Limit");

tools/power/x86/turbostat/turbostat.c

8081

if (get_msr(cpu, MSR_PP1_POLICY, &msr))

tools/power/x86/turbostat/turbostat.c

8084

fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);

tools/power/x86/turbostat/turbostat.c

8086

if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))

tools/power/x86/turbostat/turbostat.c

8088

fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr >> 31) & 1 ? "" : "UN");

tools/power/x86/turbostat/turbostat.c

8089

print_power_limit_msr(cpu, msr, "GFX Limit");

tools/power/x86/turbostat/turbostat.c

8170

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

8201

if (get_msr(master_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))

tools/power/x86/turbostat/turbostat.c

8204

tcc_default = (msr >> 16) & 0xFF;

tools/power/x86/turbostat/turbostat.c

8214

tcc_offset = (msr >> 24) & GENMASK(bits - 1, 0);

tools/power/x86/turbostat/turbostat.c

8216

cpu, msr, tcc_default - tcc_offset, tcc_default, tcc_offset);

tools/power/x86/turbostat/turbostat.c

8218

fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n", cpu, msr, tcc_default);

tools/power/x86/turbostat/turbostat.c

8238

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

8263

if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))

tools/power/x86/turbostat/turbostat.c

8266

dts = (msr >> 16) & 0x7F;

tools/power/x86/turbostat/turbostat.c

8267

fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n", cpu, msr, tj_max - dts);

tools/power/x86/turbostat/turbostat.c

8269

if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))

tools/power/x86/turbostat/turbostat.c

8272

dts = (msr >> 16) & 0x7F;

tools/power/x86/turbostat/turbostat.c

8273

dts2 = (msr >> 8) & 0x7F;

tools/power/x86/turbostat/turbostat.c

8274

fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", cpu, msr, tj_max - dts, tj_max - dts2);

tools/power/x86/turbostat/turbostat.c

8280

if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))

tools/power/x86/turbostat/turbostat.c

8283

dts = (msr >> 16) & 0x7F;

tools/power/x86/turbostat/turbostat.c

8284

resolution = (msr >> 27) & 0xF;

tools/power/x86/turbostat/turbostat.c

8285

fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n", cpu, msr, tj_max - dts, resolution);

tools/power/x86/turbostat/turbostat.c

8287

if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))

tools/power/x86/turbostat/turbostat.c

8290

dts = (msr >> 16) & 0x7F;

tools/power/x86/turbostat/turbostat.c

8291

dts2 = (msr >> 8) & 0x7F;

tools/power/x86/turbostat/turbostat.c

8292

fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", cpu, msr, tj_max - dts, tj_max - dts2);

tools/power/x86/turbostat/turbostat.c

8340

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

8348

if (!get_msr(master_cpu, MSR_IA32_FEAT_CTL, &msr))

tools/power/x86/turbostat/turbostat.c

8350

master_cpu, msr, msr & FEAT_CTL_LOCKED ? "" : "UN-", msr & (1 << 18) ? "SGX" : "");

tools/power/x86/turbostat/turbostat.c

8355

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

8363

if (!get_msr(master_cpu, MSR_IA32_MISC_ENABLE, &msr))

tools/power/x86/turbostat/turbostat.c

8365

master_cpu, msr,

tools/power/x86/turbostat/turbostat.c

8366

msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",

tools/power/x86/turbostat/turbostat.c

8367

msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",

tools/power/x86/turbostat/turbostat.c

8368

msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",

tools/power/x86/turbostat/turbostat.c

8369

msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "", msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");

tools/power/x86/turbostat/turbostat.c

8374

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

8382

if (!get_msr(master_cpu, MSR_MISC_FEATURE_CONTROL, &msr))

tools/power/x86/turbostat/turbostat.c

8385

master_cpu, msr, msr & (0 << 0) ? "No-" : "", msr & (1 << 0) ? "No-" : "", msr & (2 << 0) ? "No-" : "", msr & (3 << 0) ? "No-" : "");

tools/power/x86/turbostat/turbostat.c

8397

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

8405

if (!get_msr(master_cpu, MSR_MISC_PWR_MGMT, &msr))

tools/power/x86/turbostat/turbostat.c

8407

master_cpu, msr, msr & (1 << 0) ? "DIS" : "EN", msr & (1 << 1) ? "EN" : "DIS", msr & (1 << 8) ? "EN" : "DIS");

tools/power/x86/turbostat/turbostat.c

8418

unsigned long long msr;

tools/power/x86/turbostat/turbostat.c

8426

if (!get_msr(master_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))

tools/power/x86/turbostat/turbostat.c

8427

fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");

tools/power/x86/turbostat/turbostat.c

8429

if (!get_msr(master_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))

tools/power/x86/turbostat/turbostat.c

8430

fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");

tools/power/x86/turbostat/turbostat.c

8725

rci->msr[cai->rci_index] = cai->msr;

tools/power/x86/turbostat/turbostat.c

8857

} else if (add_msr_counter(cpu, cai->msr) >= 0) {

tools/power/x86/turbostat/turbostat.c

8859

cci->msr[cai->rci_index] = cai->msr;

tools/power/x86/turbostat/turbostat.c

8969

} else if (pkg_cstate_limit >= cai->pkg_cstate_limit && add_msr_counter(cpu, cai->msr) >= 0) {

tools/power/x86/turbostat/turbostat.c

8971

cci->msr[cai->rci_index] = cai->msr;

tools/power/x86/turbostat/turbostat.c

9288

if (platform->has_msr_knl_core_c6_residency && cai->msr == MSR_CORE_C6_RESIDENCY)

tools/power/x86/turbostat/turbostat.c

9289

cai->msr = MSR_KNL_CORE_C6_RESIDENCY;

tools/power/x86/turbostat/turbostat.c

9291

if (!platform->has_msr_core_c1_res && cai->msr == MSR_CORE_C1_RES)

tools/power/x86/turbostat/turbostat.c

9292

cai->msr = 0;

tools/power/x86/turbostat/turbostat.c

9294

if (platform->has_msr_atom_pkg_c6_residency && cai->msr == MSR_PKG_C6_RESIDENCY)

tools/power/x86/turbostat/turbostat.c

9295

cai->msr = MSR_ATOM_PKG_C6_RESIDENCY;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1216

unsigned long long msr;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1221

get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1223

turbo_is_present_and_disabled = ((msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE) != 0);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1227

msr &= ~MSR_IA32_MISC_ENABLE_TURBO_DISABLE;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1228

put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1238

msr |= MSR_IA32_MISC_ENABLE_TURBO_DISABLE;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1239

put_msr(cpu, MSR_IA32_MISC_ENABLE, msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1366

unsigned long long msr;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1370

get_msr(cpu_num, MSR_PM_ENABLE, &msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1371

retval = (msr & 1);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1487

unsigned long long msr;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1489

get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

1491

bdx_highest_ratio = msr & 0xFF;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

688

int get_msr(int cpu, int offset, unsigned long long *msr)

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

701

retval = pread(fd, msr, sizeof(*msr), offset);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

702

if (retval != sizeof(*msr)) {

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

708

fprintf(stderr, "get_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, *msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

790

unsigned long long msr;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

792

get_msr(cpu, msr_offset, &msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

794

cap->highest = msr_perf_2_ratio(HWP_HIGHEST_PERF(msr));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

795

cap->guaranteed = msr_perf_2_ratio(HWP_GUARANTEED_PERF(msr));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

796

cap->efficient = msr_perf_2_ratio(HWP_MOSTEFFICIENT_PERF(msr));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

797

cap->lowest = msr_perf_2_ratio(HWP_LOWEST_PERF(msr));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

825

unsigned long long msr;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

827

get_msr(cpu, msr_offset, &msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

829

hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 0) & 0xff));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

830

hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 8) & 0xff));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

831

hwp_req->hwp_desired = msr_perf_2_ratio((((msr) >> 16) & 0xff));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

832

hwp_req->hwp_epp = (((msr) >> 24) & 0xff);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

833

hwp_req->hwp_window = (((msr) >> 32) & 0x3ff);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

834

hwp_req->hwp_use_pkg = (((msr) >> 42) & 0x1);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

839

unsigned long long msr = 0;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

847

msr |= HWP_MIN_PERF(ratio_2_msr_perf(hwp_req->hwp_min));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

848

msr |= HWP_MAX_PERF(ratio_2_msr_perf(hwp_req->hwp_max));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

849

msr |= HWP_DESIRED_PERF(ratio_2_msr_perf(hwp_req->hwp_desired));

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

850

msr |= HWP_ENERGY_PERF_PREFERENCE(hwp_req->hwp_epp);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

851

msr |= HWP_ACTIVITY_WINDOW(hwp_req->hwp_window);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

852

msr |= HWP_PACKAGE_CONTROL(hwp_req->hwp_use_pkg);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

854

put_msr(cpu, msr_offset, msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

928

unsigned long long msr;

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

937

get_msr(first_cpu_in_pkg[pkg], MSR_HWP_INTERRUPT, &msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

940

pkg, msr,

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

941

((msr) & 0x2) ? "EN" : "Dis",

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

942

((msr) & 0x1) ? "EN" : "Dis");

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

944

get_msr(first_cpu_in_pkg[pkg], MSR_HWP_STATUS, &msr);

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

947

pkg, msr,

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

948

((msr) & 0x4) ? "" : "No-",

tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c

949

((msr) & 0x1) ? "" : "No-");

tools/testing/selftests/arm64/fp/sme-inst.h

20

msr S0_3_C4_C6_3, xzr

tools/testing/selftests/arm64/fp/sme-inst.h

24

msr S0_3_C4_C5_3, xzr

tools/testing/selftests/arm64/fp/sme-inst.h

28

msr S0_3_C4_C3_3, xzr

tools/testing/selftests/intel_pstate/msr.c

16

long long msr;

tools/testing/selftests/intel_pstate/msr.c

36

pread(fd, &msr, sizeof(msr), 0x199);

tools/testing/selftests/intel_pstate/msr.c

38

printf("msr 0x199: 0x%llx\n", msr);

tools/testing/selftests/kvm/include/x86/processor.h

1139

#define TEST_ASSERT_MSR(cond, fmt, msr, str, args...) \

tools/testing/selftests/kvm/include/x86/processor.h

1141

if (__builtin_constant_p(msr)) { \

tools/testing/selftests/kvm/include/x86/processor.h

1146

snprintf(buf, sizeof(buf), "MSR 0x%x", msr); \

tools/testing/selftests/kvm/include/x86/processor.h

1157

static inline bool is_durable_msr(uint32_t msr)

tools/testing/selftests/kvm/include/x86/processor.h

1159

return msr != MSR_IA32_TSC;

tools/testing/selftests/kvm/include/x86/processor.h

1162

#define vcpu_set_msr(vcpu, msr, val) \

tools/testing/selftests/kvm/include/x86/processor.h

1166

TEST_ASSERT_MSR(_vcpu_set_msr(vcpu, msr, v) == 1, \

tools/testing/selftests/kvm/include/x86/processor.h

1167

"KVM_SET_MSRS failed on %s, value = 0x%lx", msr, #msr, v); \

tools/testing/selftests/kvm/include/x86/processor.h

1168

if (!is_durable_msr(msr)) \

tools/testing/selftests/kvm/include/x86/processor.h

1170

r = vcpu_get_msr(vcpu, msr); \

tools/testing/selftests/kvm/include/x86/processor.h

1171

TEST_ASSERT_MSR(r == v, "Set %s to '0x%lx', got back '0x%lx'", msr, #msr, v, r);\

tools/testing/selftests/kvm/include/x86/processor.h

1331

static inline uint8_t wrmsr_safe(uint32_t msr, uint64_t val)

tools/testing/selftests/kvm/include/x86/processor.h

1333

return kvm_asm_safe("wrmsr", "a"(val & -1u), "d"(val >> 32), "c"(msr));

tools/testing/selftests/kvm/include/x86/processor.h

459

static inline uint64_t rdmsr(uint32_t msr)

tools/testing/selftests/kvm/include/x86/processor.h

463

__asm__ __volatile__("rdmsr" : "=a"(a), "=d"(d) : "c"(msr) : "memory");

tools/testing/selftests/kvm/include/x86/processor.h

468

static inline void wrmsr(uint32_t msr, uint64_t value)

tools/testing/selftests/kvm/include/x86/processor.h

473

__asm__ __volatile__("wrmsr" :: "a"(a), "d"(d), "c"(msr) : "memory");

tools/testing/selftests/kvm/include/x86/svm_util.h

27

void *msr; /* gva */

tools/testing/selftests/kvm/include/x86/vmx.h

509

void *msr;

tools/testing/selftests/kvm/lib/x86/svm.c

44

svm->msr = (void *)vm_vaddr_alloc_page(vm);

tools/testing/selftests/kvm/lib/x86/svm.c

45

svm->msr_hva = addr_gva2hva(vm, (uintptr_t)svm->msr);

tools/testing/selftests/kvm/lib/x86/svm.c

46

svm->msr_gpa = addr_gva2gpa(vm, (uintptr_t)svm->msr);

tools/testing/selftests/kvm/lib/x86/vmx.c

100

vmx->msr_gpa = addr_gva2gpa(vm, (uintptr_t)vmx->msr);

tools/testing/selftests/kvm/lib/x86/vmx.c

98

vmx->msr = (void *)vm_vaddr_alloc_page(vm);

tools/testing/selftests/kvm/lib/x86/vmx.c

99

vmx->msr_hva = addr_gva2hva(vm, (uintptr_t)vmx->msr);

tools/testing/selftests/kvm/x86/aperfmperf_test.c

38

static uint64_t read_dev_msr(int msr_fd, uint32_t msr)

tools/testing/selftests/kvm/x86/aperfmperf_test.c

43

rc = pread(msr_fd, &data, sizeof(data), msr);

tools/testing/selftests/kvm/x86/aperfmperf_test.c

44

TEST_ASSERT(rc == sizeof(data), "Read of MSR 0x%x failed", msr);

tools/testing/selftests/kvm/x86/feature_msrs_test.c

15

static bool is_kvm_controlled_msr(uint32_t msr)

tools/testing/selftests/kvm/x86/feature_msrs_test.c

17

return msr == MSR_IA32_VMX_CR0_FIXED1 || msr == MSR_IA32_VMX_CR4_FIXED1;

tools/testing/selftests/kvm/x86/feature_msrs_test.c

24

static bool is_hidden_vmx_msr(uint32_t msr)

tools/testing/selftests/kvm/x86/feature_msrs_test.c

26

switch (msr) {

tools/testing/selftests/kvm/x86/feature_msrs_test.c

37

static bool is_quirked_msr(uint32_t msr)

tools/testing/selftests/kvm/x86/feature_msrs_test.c

39

return msr != MSR_AMD64_DE_CFG;

tools/testing/selftests/kvm/x86/feature_msrs_test.c

42

static void test_feature_msr(uint32_t msr)

tools/testing/selftests/kvm/x86/feature_msrs_test.c

44

const uint64_t supported_mask = kvm_get_feature_msr(msr);

tools/testing/selftests/kvm/x86/feature_msrs_test.c

45

uint64_t reset_value = is_quirked_msr(msr) ? supported_mask : 0;

tools/testing/selftests/kvm/x86/feature_msrs_test.c

54

if (is_kvm_controlled_msr(msr))

tools/testing/selftests/kvm/x86/feature_msrs_test.c

61

if (msr == MSR_IA32_UCODE_REV)

tools/testing/selftests/kvm/x86/feature_msrs_test.c

71

TEST_ASSERT(vcpu_get_msr(vcpu, msr) == reset_value,

tools/testing/selftests/kvm/x86/feature_msrs_test.c

73

reset_value, is_quirked_msr(msr) ? "" : "non-", msr,

tools/testing/selftests/kvm/x86/feature_msrs_test.c

74

vcpu_get_msr(vcpu, msr));

tools/testing/selftests/kvm/x86/feature_msrs_test.c

75

if (!is_hidden_vmx_msr(msr))

tools/testing/selftests/kvm/x86/feature_msrs_test.c

76

vcpu_set_msr(vcpu, msr, supported_mask);

tools/testing/selftests/kvm/x86/feature_msrs_test.c

79

if (is_hidden_vmx_msr(msr))

tools/testing/selftests/kvm/x86/feature_msrs_test.c

90

TEST_ASSERT(!vcpu_get_msr(vcpu, msr),

tools/testing/selftests/kvm/x86/feature_msrs_test.c

92

msr, vcpu_get_msr(vcpu, msr));

tools/testing/selftests/kvm/x86/hyperv_evmcs.c

144

__set_bit(MSR_FS_BASE & 0x1fff, vmx_pages->msr + 0x400);

tools/testing/selftests/kvm/x86/hyperv_evmcs.c

156

__set_bit(MSR_GS_BASE & 0x1fff, vmx_pages->msr + 0x400);

tools/testing/selftests/kvm/x86/hyperv_evmcs.c

33

static inline void rdmsr_from_l2(uint32_t msr)

tools/testing/selftests/kvm/x86/hyperv_evmcs.c

36

__asm__ __volatile__ ("rdmsr" : : "c"(msr) :

tools/testing/selftests/kvm/x86/hyperv_features.c

138

struct msr_data *msr;

tools/testing/selftests/kvm/x86/hyperv_features.c

146

msr = addr_gva2hva(vm, msr_gva);

tools/testing/selftests/kvm/x86/hyperv_features.c

168

msr->idx = HV_X64_MSR_GUEST_OS_ID;

tools/testing/selftests/kvm/x86/hyperv_features.c

169

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

170

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

173

msr->idx = HV_X64_MSR_HYPERCALL;

tools/testing/selftests/kvm/x86/hyperv_features.c

174

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

175

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

183

msr->idx = HV_X64_MSR_GUEST_OS_ID;

tools/testing/selftests/kvm/x86/hyperv_features.c

184

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

185

msr->write_val = HYPERV_LINUX_OS_ID;

tools/testing/selftests/kvm/x86/hyperv_features.c

186

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

189

msr->idx = HV_X64_MSR_GUEST_OS_ID;

tools/testing/selftests/kvm/x86/hyperv_features.c

190

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

191

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

194

msr->idx = HV_X64_MSR_HYPERCALL;

tools/testing/selftests/kvm/x86/hyperv_features.c

195

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

196

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

200

msr->idx = HV_X64_MSR_VP_RUNTIME;

tools/testing/selftests/kvm/x86/hyperv_features.c

201

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

202

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

206

msr->idx = HV_X64_MSR_VP_RUNTIME;

tools/testing/selftests/kvm/x86/hyperv_features.c

207

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

208

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

212

msr->idx = HV_X64_MSR_VP_RUNTIME;

tools/testing/selftests/kvm/x86/hyperv_features.c

213

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

214

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

215

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

219

msr->idx = HV_X64_MSR_TIME_REF_COUNT;

tools/testing/selftests/kvm/x86/hyperv_features.c

220

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

221

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

225

msr->idx = HV_X64_MSR_TIME_REF_COUNT;

tools/testing/selftests/kvm/x86/hyperv_features.c

226

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

227

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

231

msr->idx = HV_X64_MSR_TIME_REF_COUNT;

tools/testing/selftests/kvm/x86/hyperv_features.c

232

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

233

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

234

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

238

msr->idx = HV_X64_MSR_VP_INDEX;

tools/testing/selftests/kvm/x86/hyperv_features.c

239

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

240

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

244

msr->idx = HV_X64_MSR_VP_INDEX;

tools/testing/selftests/kvm/x86/hyperv_features.c

245

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

246

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

250

msr->idx = HV_X64_MSR_VP_INDEX;

tools/testing/selftests/kvm/x86/hyperv_features.c

251

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

252

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

253

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

257

msr->idx = HV_X64_MSR_RESET;

tools/testing/selftests/kvm/x86/hyperv_features.c

258

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

259

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

263

msr->idx = HV_X64_MSR_RESET;

tools/testing/selftests/kvm/x86/hyperv_features.c

264

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

265

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

268

msr->idx = HV_X64_MSR_RESET;

tools/testing/selftests/kvm/x86/hyperv_features.c

269

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

276

msr->write_val = 0;

tools/testing/selftests/kvm/x86/hyperv_features.c

277

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

281

msr->idx = HV_X64_MSR_REFERENCE_TSC;

tools/testing/selftests/kvm/x86/hyperv_features.c

282

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

283

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

287

msr->idx = HV_X64_MSR_REFERENCE_TSC;

tools/testing/selftests/kvm/x86/hyperv_features.c

288

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

289

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

292

msr->idx = HV_X64_MSR_REFERENCE_TSC;

tools/testing/selftests/kvm/x86/hyperv_features.c

293

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

294

msr->write_val = 0;

tools/testing/selftests/kvm/x86/hyperv_features.c

295

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

299

msr->idx = HV_X64_MSR_EOM;

tools/testing/selftests/kvm/x86/hyperv_features.c

300

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

301

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

308

msr->idx = HV_X64_MSR_EOM;

tools/testing/selftests/kvm/x86/hyperv_features.c

309

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

310

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

314

msr->idx = HV_X64_MSR_EOM;

tools/testing/selftests/kvm/x86/hyperv_features.c

315

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

316

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

319

msr->idx = HV_X64_MSR_EOM;

tools/testing/selftests/kvm/x86/hyperv_features.c

320

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

321

msr->write_val = 0;

tools/testing/selftests/kvm/x86/hyperv_features.c

322

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

326

msr->idx = HV_X64_MSR_STIMER0_CONFIG;

tools/testing/selftests/kvm/x86/hyperv_features.c

327

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

328

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

332

msr->idx = HV_X64_MSR_STIMER0_CONFIG;

tools/testing/selftests/kvm/x86/hyperv_features.c

333

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

334

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

337

msr->idx = HV_X64_MSR_STIMER0_CONFIG;

tools/testing/selftests/kvm/x86/hyperv_features.c

338

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

339

msr->write_val = 0;

tools/testing/selftests/kvm/x86/hyperv_features.c

340

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

344

msr->idx = HV_X64_MSR_STIMER0_CONFIG;

tools/testing/selftests/kvm/x86/hyperv_features.c

345

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

346

msr->write_val = 1 << 12;

tools/testing/selftests/kvm/x86/hyperv_features.c

347

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

351

msr->idx = HV_X64_MSR_STIMER0_CONFIG;

tools/testing/selftests/kvm/x86/hyperv_features.c

352

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

353

msr->write_val = 1 << 12;

tools/testing/selftests/kvm/x86/hyperv_features.c

354

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

358

msr->idx = HV_X64_MSR_EOI;

tools/testing/selftests/kvm/x86/hyperv_features.c

359

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

360

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

364

msr->idx = HV_X64_MSR_EOI;

tools/testing/selftests/kvm/x86/hyperv_features.c

365

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

366

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

367

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

37

static bool is_write_only_msr(uint32_t msr)

tools/testing/selftests/kvm/x86/hyperv_features.c

371

msr->idx = HV_X64_MSR_TSC_FREQUENCY;

tools/testing/selftests/kvm/x86/hyperv_features.c

372

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

373

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

377

msr->idx = HV_X64_MSR_TSC_FREQUENCY;

tools/testing/selftests/kvm/x86/hyperv_features.c

378

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

379

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

383

msr->idx = HV_X64_MSR_TSC_FREQUENCY;

tools/testing/selftests/kvm/x86/hyperv_features.c

384

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

385

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

386

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

39

return msr == HV_X64_MSR_EOI;

tools/testing/selftests/kvm/x86/hyperv_features.c

390

msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL;

tools/testing/selftests/kvm/x86/hyperv_features.c

391

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

392

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

396

msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL;

tools/testing/selftests/kvm/x86/hyperv_features.c

397

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

398

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

401

msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL;

tools/testing/selftests/kvm/x86/hyperv_features.c

402

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

403

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

404

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

408

msr->idx = HV_X64_MSR_TSC_EMULATION_STATUS;

tools/testing/selftests/kvm/x86/hyperv_features.c

409

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

410

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

411

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

415

msr->idx = HV_X64_MSR_CRASH_P0;

tools/testing/selftests/kvm/x86/hyperv_features.c

416

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

417

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

42

static void guest_msr(struct msr_data *msr)

tools/testing/selftests/kvm/x86/hyperv_features.c

421

msr->idx = HV_X64_MSR_CRASH_P0;

tools/testing/selftests/kvm/x86/hyperv_features.c

422

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

423

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

426

msr->idx = HV_X64_MSR_CRASH_P0;

tools/testing/selftests/kvm/x86/hyperv_features.c

427

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

428

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

429

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

433

msr->idx = HV_X64_MSR_SYNDBG_STATUS;

tools/testing/selftests/kvm/x86/hyperv_features.c

434

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

435

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

440

msr->idx = HV_X64_MSR_SYNDBG_STATUS;

tools/testing/selftests/kvm/x86/hyperv_features.c

441

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

442

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

445

msr->idx = HV_X64_MSR_SYNDBG_STATUS;

tools/testing/selftests/kvm/x86/hyperv_features.c

446

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

447

msr->write_val = 0;

tools/testing/selftests/kvm/x86/hyperv_features.c

448

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

455

msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL;

tools/testing/selftests/kvm/x86/hyperv_features.c

456

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

457

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

464

msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL;

tools/testing/selftests/kvm/x86/hyperv_features.c

465

msr->write = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

466

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

47

GUEST_ASSERT(msr->idx);

tools/testing/selftests/kvm/x86/hyperv_features.c

472

msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL;

tools/testing/selftests/kvm/x86/hyperv_features.c

473

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

474

msr->write_val = 0xdeadbeef;

tools/testing/selftests/kvm/x86/hyperv_features.c

475

msr->fault_expected = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

481

msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL;

tools/testing/selftests/kvm/x86/hyperv_features.c

482

msr->write = true;

tools/testing/selftests/kvm/x86/hyperv_features.c

483

msr->write_val = 1;

tools/testing/selftests/kvm/x86/hyperv_features.c

484

msr->fault_expected = false;

tools/testing/selftests/kvm/x86/hyperv_features.c

49

if (msr->write)

tools/testing/selftests/kvm/x86/hyperv_features.c

497

msr->idx, msr->write ? "write" : "read");

tools/testing/selftests/kvm/x86/hyperv_features.c

50

vector = wrmsr_safe(msr->idx, msr->write_val);

tools/testing/selftests/kvm/x86/hyperv_features.c

52

if (!vector && (!msr->write || !is_write_only_msr(msr->idx)))

tools/testing/selftests/kvm/x86/hyperv_features.c

53

vector = rdmsr_safe(msr->idx, &msr_val);

tools/testing/selftests/kvm/x86/hyperv_features.c

55

if (msr->fault_expected)

tools/testing/selftests/kvm/x86/hyperv_features.c

58

msr->write ? "WR" : "RD", msr->idx, ex_str(vector));

tools/testing/selftests/kvm/x86/hyperv_features.c

62

msr->write ? "WR" : "RD", msr->idx, ex_str(vector));

tools/testing/selftests/kvm/x86/hyperv_features.c

64

if (vector || is_write_only_msr(msr->idx))

tools/testing/selftests/kvm/x86/hyperv_features.c

67

if (msr->write)

tools/testing/selftests/kvm/x86/hyperv_features.c

70

msr->idx, msr->write_val, msr_val);

tools/testing/selftests/kvm/x86/hyperv_features.c

73

if (msr->idx == HV_X64_MSR_TSC_INVARIANT_CONTROL) {

tools/testing/selftests/kvm/x86/hyperv_svm_test.c

103

__set_bit(2 * (MSR_FS_BASE & 0x1fff), svm->msr + 0x800);

tools/testing/selftests/kvm/x86/hyperv_svm_test.c

115

__set_bit(2 * (MSR_GS_BASE & 0x1fff), svm->msr + 0x800);

tools/testing/selftests/kvm/x86/hyperv_svm_test.c

24

static inline void rdmsr_from_l2(uint32_t msr)

tools/testing/selftests/kvm/x86/hyperv_svm_test.c

27

__asm__ __volatile__ ("rdmsr" : : "c"(msr) :

tools/testing/selftests/kvm/x86/kvm_pv_test.c

100

struct msr_data *msr = (struct msr_data *)uc->args[0];

tools/testing/selftests/kvm/x86/kvm_pv_test.c

102

pr_info("testing msr: %s (%#x)\n", msr->name, msr->idx);

tools/testing/selftests/kvm/x86/kvm_pv_test.c

20

#define TEST_MSR(msr) { .idx = msr, .name = #msr }

tools/testing/selftests/kvm/x86/kvm_pv_test.c

22

#define PR_MSR(msr) ucall(UCALL_PR_MSR, 1, msr)

tools/testing/selftests/kvm/x86/kvm_pv_test.c

41

static void test_msr(struct msr_data *msr)

tools/testing/selftests/kvm/x86/kvm_pv_test.c

46

PR_MSR(msr);

tools/testing/selftests/kvm/x86/kvm_pv_test.c

48

vector = rdmsr_safe(msr->idx, &ignored);

tools/testing/selftests/kvm/x86/kvm_pv_test.c

51

vector = wrmsr_safe(msr->idx, 0);

tools/testing/selftests/kvm/x86/msrs_test.c

102

vec = rdmsr_safe(msr, &val);

tools/testing/selftests/kvm/x86/msrs_test.c

103

__GUEST_ASSERT(!vec, "Unexpected %s on RDMSR(0x%x)", ex_str(vec), msr);

tools/testing/selftests/kvm/x86/msrs_test.c

106

want, msr, val);

tools/testing/selftests/kvm/x86/msrs_test.c

109

static void __wrmsr(u32 msr, u64 val)

tools/testing/selftests/kvm/x86/msrs_test.c

113

vec = wrmsr_safe(msr, val);

tools/testing/selftests/kvm/x86/msrs_test.c

115

ex_str(vec), msr, val);

tools/testing/selftests/kvm/x86/msrs_test.c

116

__rdmsr(msr, fixup_rdmsr_val(msr, val));

tools/testing/selftests/kvm/x86/msrs_test.c

119

static void guest_test_supported_msr(const struct kvm_msr *msr)

tools/testing/selftests/kvm/x86/msrs_test.c

121

__rdmsr(msr->index, msr->reset_val);

tools/testing/selftests/kvm/x86/msrs_test.c

122

__wrmsr(msr->index, msr->write_val);

tools/testing/selftests/kvm/x86/msrs_test.c

123

GUEST_SYNC(fixup_rdmsr_val(msr->index, msr->write_val));

tools/testing/selftests/kvm/x86/msrs_test.c

125

__rdmsr(msr->index, msr->reset_val);

tools/testing/selftests/kvm/x86/msrs_test.c

128

static void guest_test_unsupported_msr(const struct kvm_msr *msr)

tools/testing/selftests/kvm/x86/msrs_test.c

147

if (this_cpu_has(msr->feature2)) {

tools/testing/selftests/kvm/x86/msrs_test.c

148

if (msr->index != MSR_IA32_U_CET &&

tools/testing/selftests/kvm/x86/msrs_test.c

149

msr->index != MSR_IA32_S_CET)

tools/testing/selftests/kvm/x86/msrs_test.c

155

vec = rdmsr_safe(msr->index, &val);

tools/testing/selftests/kvm/x86/msrs_test.c

157

msr->index, ex_str(vec));

tools/testing/selftests/kvm/x86/msrs_test.c

160

vec = wrmsr_safe(msr->index, msr->write_val);

tools/testing/selftests/kvm/x86/msrs_test.c

162

msr->index, msr->write_val, ex_str(vec));

tools/testing/selftests/kvm/x86/msrs_test.c

168

void guest_test_reserved_val(const struct kvm_msr *msr)

tools/testing/selftests/kvm/x86/msrs_test.c

178

if (!this_cpu_has(msr->feature) ||

tools/testing/selftests/kvm/x86/msrs_test.c

179

msr->rsvd_val == fixup_rdmsr_val(msr->index, msr->rsvd_val)) {

tools/testing/selftests/kvm/x86/msrs_test.c

180

u8 vec = wrmsr_safe(msr->index, msr->rsvd_val);

tools/testing/selftests/kvm/x86/msrs_test.c

184

msr->index, msr->rsvd_val, ex_str(vec));

tools/testing/selftests/kvm/x86/msrs_test.c

186

__wrmsr(msr->index, msr->rsvd_val);

tools/testing/selftests/kvm/x86/msrs_test.c

187

__wrmsr(msr->index, msr->reset_val);

tools/testing/selftests/kvm/x86/msrs_test.c

194

const struct kvm_msr *msr = &msrs[READ_ONCE(idx)];

tools/testing/selftests/kvm/x86/msrs_test.c

196

if (this_cpu_has(msr->feature))

tools/testing/selftests/kvm/x86/msrs_test.c

197

guest_test_supported_msr(msr);

tools/testing/selftests/kvm/x86/msrs_test.c

199

guest_test_unsupported_msr(msr);

tools/testing/selftests/kvm/x86/msrs_test.c

201

if (msr->rsvd_val)

tools/testing/selftests/kvm/x86/msrs_test.c

202

guest_test_reserved_val(msr);

tools/testing/selftests/kvm/x86/msrs_test.c

204

GUEST_SYNC(msr->reset_val);

tools/testing/selftests/kvm/x86/msrs_test.c

23

#define ____MSR_TEST(msr, str, val, rsvd, reset, feat, f2, is_kvm) \

tools/testing/selftests/kvm/x86/msrs_test.c

25

.index = msr, \

tools/testing/selftests/kvm/x86/msrs_test.c

291

u32 msr = msrs[idx].index;

tools/testing/selftests/kvm/x86/msrs_test.c

297

val = vcpu_get_msr(vcpu, msr);

tools/testing/selftests/kvm/x86/msrs_test.c

299

guest_val, msr, val);

tools/testing/selftests/kvm/x86/msrs_test.c

302

vcpu_set_reg(vcpu, KVM_X86_REG_MSR(msr), reset_val);

tools/testing/selftests/kvm/x86/msrs_test.c

304

vcpu_set_msr(vcpu, msr, reset_val);

tools/testing/selftests/kvm/x86/msrs_test.c

306

val = vcpu_get_msr(vcpu, msr);

tools/testing/selftests/kvm/x86/msrs_test.c

308

reset_val, msr, val);

tools/testing/selftests/kvm/x86/msrs_test.c

313

val = vcpu_get_reg(vcpu, KVM_X86_REG_MSR(msr));

tools/testing/selftests/kvm/x86/msrs_test.c

315

reset_val, msr, val);

tools/testing/selftests/kvm/x86/msrs_test.c

35

#define __MSR_TEST(msr, str, val, rsvd, reset, feat) \

tools/testing/selftests/kvm/x86/msrs_test.c

36

____MSR_TEST(msr, str, val, rsvd, reset, feat, feat, false)

tools/testing/selftests/kvm/x86/msrs_test.c

38

#define MSR_TEST_NON_ZERO(msr, val, rsvd, reset, feat) \

tools/testing/selftests/kvm/x86/msrs_test.c

39

__MSR_TEST(msr, #msr, val, rsvd, reset, feat)

tools/testing/selftests/kvm/x86/msrs_test.c

41

#define MSR_TEST(msr, val, rsvd, feat) \

tools/testing/selftests/kvm/x86/msrs_test.c

42

__MSR_TEST(msr, #msr, val, rsvd, 0, feat)

tools/testing/selftests/kvm/x86/msrs_test.c

44

#define MSR_TEST2(msr, val, rsvd, feat, f2) \

tools/testing/selftests/kvm/x86/msrs_test.c

447

struct kvm_msr *msr = &msrs[idx];

tools/testing/selftests/kvm/x86/msrs_test.c

449

if (msr->is_kvm_defined) {

tools/testing/selftests/kvm/x86/msrs_test.c

45

____MSR_TEST(msr, #msr, val, rsvd, 0, feat, f2, false)

tools/testing/selftests/kvm/x86/msrs_test.c

462

TEST_ASSERT(msr->index == MSR_FS_BASE || msr->index == MSR_GS_BASE ||

tools/testing/selftests/kvm/x86/msrs_test.c

463

kvm_msr_is_in_save_restore_list(msr->index) ==

tools/testing/selftests/kvm/x86/msrs_test.c

464

(kvm_cpu_has(msr->feature) || kvm_cpu_has(msr->feature2)),

tools/testing/selftests/kvm/x86/msrs_test.c

465

"%s %s in save/restore list, but %s according to CPUID", msr->name,

tools/testing/selftests/kvm/x86/msrs_test.c

466

kvm_msr_is_in_save_restore_list(msr->index) ? "is" : "isn't",

tools/testing/selftests/kvm/x86/msrs_test.c

467

(kvm_cpu_has(msr->feature) || kvm_cpu_has(msr->feature2)) ?

tools/testing/selftests/kvm/x86/msrs_test.c

60

#define MSR_TEST_CANONICAL(msr, feat) \

tools/testing/selftests/kvm/x86/msrs_test.c

61

__MSR_TEST(msr, #msr, canonical_val, NONCANONICAL, 0, feat)

tools/testing/selftests/kvm/x86/msrs_test.c

63

#define MSR_TEST_KVM(msr, val, rsvd, feat) \

tools/testing/selftests/kvm/x86/msrs_test.c

64

____MSR_TEST(KVM_REG_ ##msr, #msr, val, rsvd, 0, feat, feat, true)

tools/testing/selftests/kvm/x86/msrs_test.c

77

static u64 fixup_rdmsr_val(u32 msr, u64 want)

tools/testing/selftests/kvm/x86/msrs_test.c

87

switch (msr) {

tools/testing/selftests/kvm/x86/msrs_test.c

97

static void __rdmsr(u32 msr, u64 want)

tools/testing/selftests/kvm/x86/pmu_counters_test.c

366

#define GUEST_ASSERT_PMC_MSR_ACCESS(insn, msr, expect_gp, vector) \

tools/testing/selftests/kvm/x86/pmu_counters_test.c

369

expect_gp ? "#GP" : "no fault", msr, ex_str(vector)) \

tools/testing/selftests/kvm/x86/pmu_counters_test.c

371

#define GUEST_ASSERT_PMC_VALUE(insn, msr, val, expected) \

tools/testing/selftests/kvm/x86/pmu_counters_test.c

374

msr, expected, val);

tools/testing/selftests/kvm/x86/pmu_counters_test.c

408

const uint32_t msr = base_msr + i;

tools/testing/selftests/kvm/x86/pmu_counters_test.c

422

const bool expect_gp = !expect_success && msr != MSR_P6_PERFCTR0 &&

tools/testing/selftests/kvm/x86/pmu_counters_test.c

423

msr != MSR_P6_PERFCTR1;

tools/testing/selftests/kvm/x86/pmu_counters_test.c

428

vector = wrmsr_safe(msr, test_val);

tools/testing/selftests/kvm/x86/pmu_counters_test.c

429

GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector);

tools/testing/selftests/kvm/x86/pmu_counters_test.c

431

vector = rdmsr_safe(msr, &val);

tools/testing/selftests/kvm/x86/pmu_counters_test.c

432

GUEST_ASSERT_PMC_MSR_ACCESS(RDMSR, msr, expect_gp, vector);

tools/testing/selftests/kvm/x86/pmu_counters_test.c

436

GUEST_ASSERT_PMC_VALUE(RDMSR, msr, val, expected_val);

tools/testing/selftests/kvm/x86/pmu_counters_test.c

457

vector = wrmsr_safe(msr, 0);

tools/testing/selftests/kvm/x86/pmu_counters_test.c

458

GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector);

tools/testing/selftests/kvm/x86/pmu_event_filter_test.c

78

static void check_msr(uint32_t msr, uint64_t bits_to_flip)

tools/testing/selftests/kvm/x86/pmu_event_filter_test.c

80

uint64_t v = rdmsr(msr) ^ bits_to_flip;

tools/testing/selftests/kvm/x86/pmu_event_filter_test.c

82

wrmsr(msr, v);

tools/testing/selftests/kvm/x86/pmu_event_filter_test.c

83

if (rdmsr(msr) != v)

tools/testing/selftests/kvm/x86/pmu_event_filter_test.c

87

wrmsr(msr, v);

tools/testing/selftests/kvm/x86/pmu_event_filter_test.c

88

if (rdmsr(msr) != v)

tools/testing/selftests/kvm/x86/sev_smoke_test.c

16

static void guest_sev_test_msr(uint32_t msr)

tools/testing/selftests/kvm/x86/sev_smoke_test.c

18

uint64_t val = rdmsr(msr);

tools/testing/selftests/kvm/x86/sev_smoke_test.c

20

wrmsr(msr, val);

tools/testing/selftests/kvm/x86/sev_smoke_test.c

21

GUEST_ASSERT(val == rdmsr(msr));

tools/testing/selftests/kvm/x86/ucna_injection_test.c

71

uint64_t msr = rdmsr(MSR_IA32_APICBASE);

tools/testing/selftests/kvm/x86/ucna_injection_test.c

72

uint64_t base = GET_APIC_BASE(msr);

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

145

static noinline uint64_t test_rdmsr(uint32_t msr)

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

152

"=a"(a), "=d"(d) : "c"(msr) : "memory");

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

161

static noinline void test_wrmsr(uint32_t msr, uint64_t value)

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

169

"a"(a), "d"(d), "c"(msr) : "memory");

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

179

static noinline uint64_t test_em_rdmsr(uint32_t msr)

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

186

"=a"(a), "=d"(d) : "c"(msr) : "memory");

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

195

static noinline void test_em_wrmsr(uint32_t msr, uint64_t value)

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

203

"a"(a), "d"(d), "c"(msr) : "memory");

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

401

TEST_ASSERT(run->msr.index == msr_index,

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

403

run->msr.index, msr_index);

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

405

switch (run->msr.index) {

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

407

run->msr.data = 0;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

410

run->msr.error = 1;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

413

run->msr.data = msr_non_existent_data;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

416

run->msr.data = MSR_FS_BASE;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

419

run->msr.data = MSR_GS_BASE;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

422

TEST_ASSERT(false, "Unexpected MSR: 0x%04x", run->msr.index);

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

433

TEST_ASSERT(run->msr.index == msr_index,

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

435

run->msr.index, msr_index);

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

437

switch (run->msr.index) {

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

439

if (run->msr.data != 0)

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

440

run->msr.error = 1;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

443

if (run->msr.data != 1)

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

444

run->msr.error = 1;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

447

msr_non_existent_data = run->msr.data;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

450

TEST_ASSERT(false, "Unexpected MSR: 0x%04x", run->msr.index);

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

597

run->msr.data = run->msr.index;

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

600

if (run->msr.index == MSR_SYSCALL_MASK ||

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

601

run->msr.index == MSR_GS_BASE) {

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

602

TEST_ASSERT(run->msr.reason == KVM_MSR_EXIT_REASON_FILTER,

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

606

if (run->msr.index == 0xdeadbeef) {

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

607

TEST_ASSERT(run->msr.reason == KVM_MSR_EXIT_REASON_UNKNOWN,

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

617

if (run->msr.index == MSR_IA32_POWER_CTL) {

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

618

TEST_ASSERT(run->msr.data == 0x1234,

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

620

TEST_ASSERT(run->msr.reason == KVM_MSR_EXIT_REASON_FILTER,

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

624

if (run->msr.index == 0xdeadbeef) {

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

625

TEST_ASSERT(run->msr.data == 0x1234,

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

627

TEST_ASSERT(run->msr.reason == KVM_MSR_EXIT_REASON_UNKNOWN,

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

80

static void deny_msr(uint8_t *bitmap, u32 msr)

tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c

82

u32 idx = msr & (KVM_MSR_FILTER_MAX_BITMAP_SIZE - 1);

tools/testing/selftests/kvm/x86/xapic_ipi_test.c

83

uint64_t msr = rdmsr(MSR_IA32_APICBASE);

tools/testing/selftests/kvm/x86/xapic_ipi_test.c

84

uint64_t base = GET_APIC_BASE(msr);

tools/testing/selftests/kvm/x86/xen_shinfo_test.c

468

.msr = XEN_HYPERCALL_MSR,

tools/testing/selftests/kvm/x86/xen_vmcall_test.c

96

.msr = XEN_HYPERCALL_MSR,