arch/arm64/kernel/reloc_test_core.c

37

} const funcs[] = {

arch/arm64/kernel/reloc_test_core.c

58

for (i = 0; i < ARRAY_SIZE(funcs); i++) {

arch/arm64/kernel/reloc_test_core.c

59

u64 ret = funcs[i].f();

arch/arm64/kernel/reloc_test_core.c

61

pr_info("%-31s 0x%016llx %s\n", funcs[i].name, ret,

arch/arm64/kernel/reloc_test_core.c

62

ret == funcs[i].expect ? "pass" : "fail");

arch/arm64/kernel/reloc_test_core.c

63

if (ret != funcs[i].expect)

arch/arm64/kernel/reloc_test_core.c

65

funcs[i].expect, ret);

arch/x86/kernel/cpu/feat_ctl.c

28

u32 supported, funcs, ept, vpid, ign, low, high;

arch/x86/kernel/cpu/feat_ctl.c

54

rdmsr_safe(MSR_IA32_VMX_VMFUNC, &ign, &funcs);

arch/x86/kernel/cpu/feat_ctl.c

64

WARN_ON_ONCE(funcs >> 4);

arch/x86/kernel/cpu/feat_ctl.c

67

((funcs & 0xf) << 28);

arch/x86/kvm/cpuid.c

1981

static const u32 funcs[] = {

arch/x86/kvm/cpuid.c

2004

for (i = 0; i < ARRAY_SIZE(funcs); i++) {

arch/x86/kvm/cpuid.c

2005

r = get_cpuid_func(&array, funcs[i], type);

arch/x86/net/bpf_jit_comp.c

3802

int arch_prepare_bpf_dispatcher(void *image, void *buf, s64 *funcs, int num_funcs)

arch/x86/net/bpf_jit_comp.c

3806

sort(funcs, num_funcs, sizeof(funcs[0]), cmp_ips, NULL);

arch/x86/net/bpf_jit_comp.c

3807

return emit_bpf_dispatcher(&prog, 0, num_funcs - 1, funcs, image, buf);

drivers/accel/amdxdna/amdxdna_gem.c

1027

gobj->funcs = &amdxdna_gem_dev_obj_funcs;

drivers/accel/amdxdna/amdxdna_gem.c

786

to_gobj(abo)->funcs = &amdxdna_gem_shmem_funcs;

drivers/accel/ethosu/ethosu_gem.c

58

obj->base.base.funcs = &ethosu_gem_funcs;

drivers/accel/habanalabs/common/habanalabs.h

2602

struct hl_state_dump_specs_funcs funcs;

drivers/accel/habanalabs/common/state_dump.c

407

rc = sds->funcs.gen_sync_to_engine_map(hdev, map);

drivers/accel/habanalabs/common/state_dump.c

534

if (!(sds->funcs.monitor_valid(&monitors[i])))

drivers/accel/habanalabs/common/state_dump.c

538

rc = sds->funcs.print_single_monitor(buf, size, offset, hdev,

drivers/accel/habanalabs/common/state_dump.c

632

rc = sds->funcs.print_fences_single_engine(

drivers/accel/habanalabs/gaudi/gaudi.c

9079

sds->funcs = gaudi_state_dump_funcs;

drivers/accel/habanalabs/gaudi2/gaudi2.c

11812

hdev->state_dump_specs.funcs = gaudi2_state_dump_funcs;

drivers/accel/habanalabs/goya/goya.c

5389

hdev->state_dump_specs.funcs = goya_state_dump_funcs;

drivers/accel/ivpu/ivpu_gem.c

202

bo->base.base.funcs = &ivpu_gem_funcs;

drivers/accel/qaic/qaic_data.c

769

obj->funcs = &qaic_gem_funcs;

drivers/accel/qaic/qaic_data.c

871

obj->funcs = &qaic_gem_funcs;

drivers/accel/rocket/rocket_gem.c

55

obj->base.base.funcs = &rocket_gem_funcs;

drivers/acpi/utils.c

821

bool acpi_check_dsm(acpi_handle handle, const guid_t *guid, u64 rev, u64 funcs)

drivers/acpi/utils.c

827

if (funcs == 0)

drivers/acpi/utils.c

846

if ((mask & 0x1) && (mask & funcs) == funcs)

drivers/bus/vexpress-config.c

323

list_add(&func->list, &syscfg->funcs);

drivers/bus/vexpress-config.c

335

list_for_each_entry_safe(func, tmp, &syscfg->funcs, list) {

drivers/bus/vexpress-config.c

337

list_del(&syscfg->funcs);

drivers/bus/vexpress-config.c

362

INIT_LIST_HEAD(&syscfg->funcs);

drivers/bus/vexpress-config.c

49

struct list_head funcs;

drivers/clk/hisilicon/clk-hi3559a.c

792

crg->funcs = of_device_get_match_data(&pdev->dev);

drivers/clk/hisilicon/clk-hi3559a.c

793

if (!crg->funcs)

drivers/clk/hisilicon/clk-hi3559a.c

800

crg->clk_data = crg->funcs->register_clks(pdev);

drivers/clk/hisilicon/clk-hi3559a.c

815

crg->funcs->unregister_clks(pdev);

drivers/clk/hisilicon/crg-hi3516cv300.c

269

crg->funcs = of_device_get_match_data(&pdev->dev);

drivers/clk/hisilicon/crg-hi3516cv300.c

270

if (!crg->funcs)

drivers/clk/hisilicon/crg-hi3516cv300.c

277

crg->clk_data = crg->funcs->register_clks(pdev);

drivers/clk/hisilicon/crg-hi3516cv300.c

292

crg->funcs->unregister_clks(pdev);

drivers/clk/hisilicon/crg-hi3798cv200.c

352

crg->funcs = of_device_get_match_data(&pdev->dev);

drivers/clk/hisilicon/crg-hi3798cv200.c

353

if (!crg->funcs)

drivers/clk/hisilicon/crg-hi3798cv200.c

360

crg->clk_data = crg->funcs->register_clks(pdev);

drivers/clk/hisilicon/crg-hi3798cv200.c

375

crg->funcs->unregister_clks(pdev);

drivers/clk/hisilicon/crg.h

22

const struct hisi_crg_funcs *funcs;

drivers/cpufreq/intel_pstate.c

3527

static void __init copy_cpu_funcs(struct pstate_funcs *funcs)

drivers/cpufreq/intel_pstate.c

3529

pstate_funcs.get_max = funcs->get_max;

drivers/cpufreq/intel_pstate.c

3530

pstate_funcs.get_max_physical = funcs->get_max_physical;

drivers/cpufreq/intel_pstate.c

3531

pstate_funcs.get_min = funcs->get_min;

drivers/cpufreq/intel_pstate.c

3532

pstate_funcs.get_turbo = funcs->get_turbo;

drivers/cpufreq/intel_pstate.c

3533

pstate_funcs.get_scaling = funcs->get_scaling;

drivers/cpufreq/intel_pstate.c

3534

pstate_funcs.get_val = funcs->get_val;

drivers/cpufreq/intel_pstate.c

3535

pstate_funcs.get_vid = funcs->get_vid;

drivers/cpufreq/intel_pstate.c

3536

pstate_funcs.get_aperf_mperf_shift = funcs->get_aperf_mperf_shift;

drivers/gpu/drm/adp/adp_drv.c

421

drm->mode_config.funcs = &adp_mode_config_funcs;

drivers/gpu/drm/amd/amdgpu/aldebaran.c

276

adev->gfxhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/aldebaran.c

277

r = adev->gfxhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/aldebaran.c

291

adev->gfx.rlc.funcs->resume(adev);

drivers/gpu/drm/amd/amdgpu/aldebaran.c

322

if (adev->ip_blocks[i].version->funcs->late_init) {

drivers/gpu/drm/amd/amdgpu/aldebaran.c

323

r = adev->ip_blocks[i].version->funcs->late_init(

drivers/gpu/drm/amd/amdgpu/aldebaran.c

328

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c

631

.funcs = &acp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

1431

adev->gfx.imu.funcs) /* Not need to do mode2 reset for IMU enabled APUs */

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

545

if (adev->gfx.funcs->get_gpu_clock_counter)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

546

return adev->gfx.funcs->get_gpu_clock_counter(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

760

gfx_block->version->funcs->set_powergating_state((void *)gfx_block, state);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

887

ring->funcs = ring_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

711

adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

629

adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

608

adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

922

adev->mmhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

924

adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

605

if (!adev->smuio.funcs ||

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

606

!adev->smuio.funcs->get_rom_index_offset ||

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

607

!adev->smuio.funcs->get_rom_data_offset)

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

614

adev->smuio.funcs->get_rom_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

616

adev->smuio.funcs->get_rom_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

618

if (adev->nbio.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

619

adev->nbio.funcs->get_rom_offset) {

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

620

rom_offset = adev->nbio.funcs->get_rom_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c

131

(adev->smuio.funcs && adev->smuio.funcs->get_socket_id) ?

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c

132

adev->smuio.funcs->get_socket_id(adev) :

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c

233

socket_id = (adev->smuio.funcs && adev->smuio.funcs->get_socket_id) ?

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c

234

adev->smuio.funcs->get_socket_id(adev) :

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c

582

ring->funcs = &cper_ring_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c

79

(adev->smuio.funcs && adev->smuio.funcs->get_socket_id) ?

drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c

80

adev->smuio.funcs->get_socket_id(adev) :

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1018

if (!ring->funcs->parse_cs && !ring->funcs->patch_cs_in_place)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

1048

if (ring->funcs->parse_cs) {

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

355

if (p->uf_bo && ring->funcs->no_user_fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

380

r = amdgpu_ib_get(p->adev, vm, ring->funcs->parse_cs ?

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1193

if (adev->gfx.funcs->read_wave_data)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1194

adev->gfx.funcs->read_wave_data(adev, 0, simd, wave, data, &x);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1286

if (adev->gfx.funcs->read_wave_vgprs)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1287

adev->gfx.funcs->read_wave_vgprs(adev, 0, simd, wave, thread, offset, size>>2, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1289

if (adev->gfx.funcs->read_wave_sgprs)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1290

adev->gfx.funcs->read_wave_sgprs(adev, 0, simd, wave, offset, size>>2, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

1980

if (ring->funcs->type != AMDGPU_RING_TYPE_GFX)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

2023

!ring->funcs->preempt_ib)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

435

if (adev->gfx.funcs->read_wave_data)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

436

adev->gfx.funcs->read_wave_data(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, data, &x);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

440

if (adev->gfx.funcs->read_wave_vgprs)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

441

adev->gfx.funcs->read_wave_vgprs(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, rd->id.gpr.thread, *pos, size>>2, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

443

if (adev->gfx.funcs->read_wave_sgprs)

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

444

adev->gfx.funcs->read_wave_sgprs(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, *pos, size>>2, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c

417

coredump->ring->funcs->type,

drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c

432

if (ip_block->version->funcs->print_ip_state) {

drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c

433

drm_printf(&p, "IP: %s\n", ip_block->version->funcs->name);

drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c

434

ip_block->version->funcs->print_ip_state(ip_block, &p);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2070

adev->ip_blocks[i].version->funcs->name);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2072

} else if (ip_block->version->funcs->early_init) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2073

r = ip_block->version->funcs->early_init(ip_block);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2079

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2161

r = adev->ip_blocks[i].version->funcs->hw_init(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2165

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2188

r = adev->ip_blocks[i].version->funcs->hw_init(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2192

adev->ip_blocks[i].version->funcs->name, r);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2228

r = adev->ip_blocks[i].version->funcs->hw_init(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2233

.version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2266

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2339

if (adev->ip_blocks[i].version->funcs->sw_init) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2340

r = adev->ip_blocks[i].version->funcs->sw_init(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2344

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2357

r = adev->ip_blocks[i].version->funcs->hw_init(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2377

r = adev->ip_blocks[i].version->funcs->hw_init(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2592

adev->ip_blocks[i].version->funcs->set_clockgating_state) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2594

r = adev->ip_blocks[i].version->funcs->set_clockgating_state(&adev->ip_blocks[i],

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2599

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2633

adev->ip_blocks[i].version->funcs->set_powergating_state) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2635

r = adev->ip_blocks[i].version->funcs->set_powergating_state(&adev->ip_blocks[i],

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2640

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2704

if (adev->ip_blocks[i].version->funcs->late_init) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2705

r = adev->ip_blocks[i].version->funcs->late_init(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2709

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2785

if (!ip_block->version->funcs->hw_fini) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2787

ip_block->version->funcs->name);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2789

r = ip_block->version->funcs->hw_fini(ip_block);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2794

ip_block->version->funcs->name, r);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2832

if (!adev->ip_blocks[i].version->funcs->early_fini)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2835

r = adev->ip_blocks[i].version->funcs->early_fini(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2839

adev->ip_blocks[i].version->funcs->name, r);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2924

if (adev->ip_blocks[i].version->funcs->sw_fini) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2925

r = adev->ip_blocks[i].version->funcs->sw_fini(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2930

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2943

if (adev->ip_blocks[i].version->funcs->late_fini)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

2944

adev->ip_blocks[i].version->funcs->late_fini(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3107

(adev->flags & AMD_IS_APU) && adev->gfx.imu.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3216

r = block->version->funcs->hw_init(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3219

block->version->funcs->name);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3256

r = block->version->funcs->hw_init(block);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3261

block->version->funcs->name);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

342

if (adev->smuio.funcs && adev->smuio.funcs->get_pkg_type)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

343

pkg_type = adev->smuio.funcs->get_pkg_type(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3929

if (adev->gfxhub.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3930

adev->gfxhub.funcs->get_xgmi_info) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3931

r = adev->gfxhub.funcs->get_xgmi_info(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3938

if (adev->mmhub.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3939

adev->mmhub.funcs->get_xgmi_info) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

3940

r = adev->mmhub.funcs->get_xgmi_info(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4433

if (!adev->ip_blocks[i].version->funcs->prepare_suspend)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4435

r = adev->ip_blocks[i].version->funcs->prepare_suspend(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4459

if (!adev->ip_blocks[i].version->funcs->complete)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4461

adev->ip_blocks[i].version->funcs->complete(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4593

r = adev->gfxhub.funcs->get_xgmi_info(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4600

adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4743

if (adev->ip_blocks[i].version->funcs->check_soft_reset)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4745

adev->ip_blocks[i].version->funcs->check_soft_reset(

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4748

dev_info(adev->dev, "IP block:%s is hung!\n", adev->ip_blocks[i].version->funcs->name);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4774

adev->ip_blocks[i].version->funcs->pre_soft_reset) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4775

r = adev->ip_blocks[i].version->funcs->pre_soft_reset(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4836

adev->ip_blocks[i].version->funcs->soft_reset) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4837

r = adev->ip_blocks[i].version->funcs->soft_reset(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4865

adev->ip_blocks[i].version->funcs->post_soft_reset)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

4866

r = adev->ip_blocks[i].version->funcs->post_soft_reset(&adev->ip_blocks[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

5077

u32 memsize = adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

5184

if (tmp_adev->ip_blocks[i].version->funcs->dump_ip_state)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

5185

tmp_adev->ip_blocks[i].version->funcs

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6249

adev->nbio.funcs->enable_doorbell_interrupt)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6250

adev->nbio.funcs->enable_doorbell_interrupt(adev, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6268

adev->nbio.funcs->enable_doorbell_interrupt)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6269

adev->nbio.funcs->enable_doorbell_interrupt(adev, true);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6271

if (amdgpu_passthrough(adev) && adev->nbio.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6272

adev->nbio.funcs->clear_doorbell_interrupt)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6273

adev->nbio.funcs->clear_doorbell_interrupt(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6636

if (ring && ring->funcs->emit_hdp_flush) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6788

if (ring->funcs->type != AMDGPU_RING_TYPE_GFX &&

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6789

ring->funcs->type != AMDGPU_RING_TYPE_COMPUTE)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

6903

!amdgpu_sriov_vf(ring->adev) && ring->funcs->soft_recovery)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

863

return adev->nbio.funcs->get_rev_id(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_df.h

61

const struct amdgpu_df_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3186

adev->nbio.funcs = &nbio_v6_1_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3192

adev->nbio.funcs = &nbio_v7_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3198

adev->nbio.funcs = &nbio_v7_4_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3203

adev->nbio.funcs = &nbio_v7_9_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3210

adev->nbio.funcs = &nbio_v7_11_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3218

adev->nbio.funcs = &nbio_v7_2_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3229

adev->nbio.funcs = &nbio_v2_3_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3235

adev->nbio.funcs = &nbio_v4_3_sriov_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3237

adev->nbio.funcs = &nbio_v4_3_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3242

adev->nbio.funcs = &nbio_v7_7_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3248

adev->nbio.funcs = &nbif_v6_3_1_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3252

adev->nbio.funcs = &nbio_v6_3_2_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3269

adev->hdp.funcs = &hdp_v4_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3277

adev->hdp.funcs = &hdp_v5_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3280

adev->hdp.funcs = &hdp_v5_2_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3287

adev->hdp.funcs = &hdp_v6_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3290

adev->hdp.funcs = &hdp_v7_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3300

adev->df.funcs = &df_v3_6_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3307

adev->df.funcs = &df_v1_7_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3310

adev->df.funcs = &df_v4_3_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3313

adev->df.funcs = &df_v4_6_2_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3317

adev->df.funcs = &df_v4_15_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3329

adev->smuio.funcs = &smuio_v9_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3337

adev->smuio.funcs = &smuio_v11_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3347

adev->smuio.funcs = &smuio_v11_0_6_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3350

adev->smuio.funcs = &smuio_v13_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3354

adev->smuio.funcs = &smuio_v13_0_3_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3355

if (adev->smuio.funcs->get_pkg_type(adev) == AMDGPU_PKG_TYPE_APU) {

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3363

adev->smuio.funcs = &smuio_v13_0_6_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3366

adev->smuio.funcs = &smuio_v14_0_2_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3370

adev->smuio.funcs = &smuio_v15_0_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3373

adev->smuio.funcs = &smuio_v15_0_8_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3384

adev->lsdma.funcs = &lsdma_v6_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3388

adev->lsdma.funcs = &lsdma_v7_0_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3391

adev->lsdma.funcs = &lsdma_v7_1_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

156

adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base, work->async);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

28

#define amdgpu_display_vblank_get_counter(adev, crtc) (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

29

#define amdgpu_display_backlight_set_level(adev, e, l) (adev)->mode_info.funcs->backlight_set_level((e), (l))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

30

#define amdgpu_display_backlight_get_level(adev, e) (adev)->mode_info.funcs->backlight_get_level((e))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

31

#define amdgpu_display_hpd_sense(adev, h) (adev)->mode_info.funcs->hpd_sense((adev), (h))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

32

#define amdgpu_display_hpd_set_polarity(adev, h) (adev)->mode_info.funcs->hpd_set_polarity((adev), (h))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

33

#define amdgpu_display_hpd_get_gpio_reg(adev) (adev)->mode_info.funcs->hpd_get_gpio_reg((adev))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

34

#define amdgpu_display_bandwidth_update(adev) (adev)->mode_info.funcs->bandwidth_update((adev))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

35

#define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base), (async))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

36

#define amdgpu_display_page_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev), (crtc), (vbl), (pos))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

37

#define amdgpu_display_add_encoder(adev, e, s, c) (adev)->mode_info.funcs->add_encoder((adev), (e), (s), (c))

drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

38

#define amdgpu_display_add_connector(adev, ci, sd, ct, ib, coi, h, r) (adev)->mode_info.funcs->add_connector((adev), (ci), (sd), (ct), (ib), (coi), (h), (r))

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

414

if (ring->funcs->type != AMDGPU_RING_TYPE_UVD) {

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

505

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

759

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

902

if (ring->funcs->type == AMDGPU_RING_TYPE_GFX ||

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

903

ring->funcs->type == AMDGPU_RING_TYPE_SDMA) {

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

910

if (ring->funcs->type != AMDGPU_RING_TYPE_GFX)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1011

if (!amdgpu_sriov_vf(adev) && adev->gfx.cp_ecc_error_irq.funcs)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1018

if (!amdgpu_sriov_vf(adev) && adev->gfx.cp_ecc_error_irq.funcs)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1145

BUG_ON(!ring->funcs->emit_rreg);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1213

BUG_ON(!ring->funcs->emit_wreg);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1282

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1300

DRM_ERROR("%s:unsupported ring type %d\n", __func__, ring->funcs->type);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1319

if (!ring->funcs->emit_hdp_flush) {

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

1701

memset32(ib->ptr, ring->funcs->nop, ib_size_dw);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

2000

(xcp_mgr->funcs && xcp_mgr->funcs->switch_partition_mode);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

2031

(xcp_mgr->funcs && xcp_mgr->funcs->switch_partition_mode);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

873

if (adev->gfx.funcs->init_spm_golden) {

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

993

if (!amdgpu_sriov_vf(adev) && adev->gfx.cp_ecc_error_irq.funcs) {

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

479

const struct amdgpu_gfx_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

559

#define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev))

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

560

#define amdgpu_gfx_select_se_sh(adev, se, sh, instance, xcc_id) ((adev)->gfx.funcs->select_se_sh((adev), (se), (sh), (instance), (xcc_id)))

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

561

#define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q, vmid, xcc_id) ((adev)->gfx.funcs->select_me_pipe_q((adev), (me), (pipe), (q), (vmid), (xcc_id)))

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

562

#define amdgpu_gfx_init_spm_golden(adev) (adev)->gfx.funcs->init_spm_golden((adev))

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

563

#define amdgpu_gfx_get_gfx_shadow_info(adev, si) ((adev)->gfx.funcs->get_gfx_shadow_info((adev), (si), false))

drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h

44

const struct amdgpu_gfxhub_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

1483

if (!adev->psp.funcs) {

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

1571

if (adev->nbio.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

1572

adev->nbio.funcs->get_memory_partition_mode)

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

1573

mode = adev->nbio.funcs->get_memory_partition_mode(adev,

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

770

job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

54

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

59

if (adev->nbio.funcs->get_memsize)

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

60

adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

74

else if (adev->hdp.funcs && adev->hdp.funcs->invalidate_hdp)

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

75

adev->hdp.funcs->invalidate_hdp(adev, ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

82

else if (adev->hdp.funcs && adev->hdp.funcs->flush_hdp)

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

83

adev->hdp.funcs->flush_hdp(adev, ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h

42

const struct amdgpu_hdp_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

191

(!ring->funcs->secure_submission_supported)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

197

alloc_size = ring->funcs->emit_frame_size + num_ibs *

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

198

ring->funcs->emit_ib_size;

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

207

if (ring->funcs->emit_pipeline_sync && job &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

232

if (ring->funcs->insert_start)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

233

ring->funcs->insert_start(ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

235

if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

236

ring->funcs->emit_mem_sync(ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

238

if (ring->funcs->emit_wave_limit &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

240

ring->funcs->emit_wave_limit(ring, true);

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

242

if (ring->funcs->emit_gfx_shadow && adev->gfx.cp_gfx_shadow)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

246

if (ring->funcs->init_cond_exec)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

258

if (job && ring->funcs->emit_cntxcntl) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

267

if (job && ring->funcs->emit_frame_cntl) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

275

if (job && ring->funcs->emit_frame_cntl) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

287

if (job && ring->funcs->emit_frame_cntl)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

304

if (ring->funcs->emit_gfx_shadow && ring->funcs->init_cond_exec &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

316

if (ring->funcs->insert_end)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

317

ring->funcs->insert_end(ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

322

if (job && ring->funcs->emit_switch_buffer)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

325

if (ring->funcs->emit_wave_limit &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

327

ring->funcs->emit_wave_limit(ring, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

440

if (!ring->sched.ready || !ring->funcs->test_ib)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

444

ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

448

if (ring->funcs->type == AMDGPU_RING_TYPE_UVD ||

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

449

ring->funcs->type == AMDGPU_RING_TYPE_VCE ||

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

450

ring->funcs->type == AMDGPU_RING_TYPE_UVD_ENC ||

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

451

ring->funcs->type == AMDGPU_RING_TYPE_VCN_DEC ||

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

452

ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC ||

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

453

ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG)

drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h

57

const struct amdgpu_imu_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

102

if (ip_block->version->funcs->suspend) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

103

r = ip_block->version->funcs->suspend(ip_block);

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

107

ip_block->version->funcs->name, r);

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

120

if (ip_block->version->funcs->resume) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

121

r = ip_block->version->funcs->resume(ip_block);

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

125

ip_block->version->funcs->name, r);

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

245

ip_block_version->rev, ip_block_version->funcs->name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

276

if (!adev->ip_blocks[i].version->funcs->set_clockgating_state)

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

278

r = adev->ip_blocks[i].version->funcs->set_clockgating_state(

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

283

adev->ip_blocks[i].version->funcs->name, r);

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

310

if (!adev->ip_blocks[i].version->funcs->set_powergating_state)

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

312

r = adev->ip_blocks[i].version->funcs->set_powergating_state(

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

317

adev->ip_blocks[i].version->funcs->name, r);

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

341

if (adev->ip_blocks[i].version->funcs->get_clockgating_state)

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

342

adev->ip_blocks[i].version->funcs->get_clockgating_state(

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

365

if (ip_block->version->funcs->wait_for_idle)

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.c

366

return ip_block->version->funcs->wait_for_idle(ip_block);

drivers/gpu/drm/amd/amdgpu/amdgpu_ip.h

113

const struct amd_ip_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

173

if (!src || !src->funcs->set || !src->num_types)

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

177

r = src->funcs->set(adev, src, k,

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

432

if (!source->funcs)

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

512

r = src->funcs->process(adev, src, &entry);

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

577

r = src->funcs->set(adev, src, type, state);

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

604

if (!src || !src->funcs || !src->funcs->set)

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

633

if (!src->enabled_types || !src->funcs->set)

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

667

if (!src->enabled_types || !src->funcs->set)

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

701

if (!src->enabled_types || !src->funcs->set)

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h

65

const struct amdgpu_irq_src_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

326

if (isp->funcs->hw_resume)

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

327

return isp->funcs->hw_resume(isp);

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

337

if (isp->funcs->hw_suspend)

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

338

return isp->funcs->hw_suspend(isp);

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

360

.funcs = &isp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

368

.funcs = &isp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

49

if (isp->funcs->hw_init != NULL)

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

50

return isp->funcs->hw_init(isp);

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

65

if (isp->funcs->hw_fini != NULL)

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

66

return isp->funcs->hw_fini(isp);

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.h

48

const struct isp_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

135

ring->funcs->reset) {

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

43

if (adev->ip_blocks[i].version->funcs->dump_ip_state)

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

44

adev->ip_blocks[i].version->funcs

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

299

!adev->jpeg.inst[i].ras_poison_irq.funcs)

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

1058

if (adev->gfx.funcs->get_gfx_shadow_info) {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

383

if (adev->gfx.funcs->get_gfx_shadow_info) {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

386

adev->gfx.funcs->get_gfx_shadow_info(adev, &shadow, true);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

403

if (adev->gfx.funcs->get_gfx_shadow_info) {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

406

adev->gfx.funcs->get_gfx_shadow_info(adev, &shadow, true);

drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.c

59

ret = adev->lsdma.funcs->copy_mem(adev, src_addr, dst_addr, current_copy_size);

drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.c

83

ret = adev->lsdma.funcs->fill_mem(adev, dst_addr, data, current_fill_size);

drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.h

28

const struct amdgpu_lsdma_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

324

r = adev->mes.funcs->suspend_gang(&adev->mes, &input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

349

r = adev->mes.funcs->resume_gang(&adev->mes, &input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

366

queue_input.queue_type = ring->funcs->type;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

374

r = adev->mes.funcs->map_legacy_queue(&adev->mes, &queue_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

392

queue_input.queue_type = ring->funcs->type;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

400

r = adev->mes.funcs->unmap_legacy_queue(&adev->mes, &queue_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

420

queue_input.queue_type = ring->funcs->type;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

430

if (ring->funcs->type == AMDGPU_RING_TYPE_GFX)

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

434

r = adev->mes.funcs->reset_hw_queue(&adev->mes, &queue_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

473

r = adev->mes.funcs->detect_and_reset_hung_queues(&adev->mes,

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

522

if (!adev->mes.funcs->misc_op) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

528

r = adev->mes.funcs->misc_op(&adev->mes, &op_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

552

if (!adev->mes.funcs->misc_op) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

559

r = adev->mes.funcs->misc_op(&adev->mes, &op_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

583

if (!adev->mes.funcs->misc_op) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

590

r = adev->mes.funcs->misc_op(&adev->mes, &op_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

605

if (!adev->gfx.funcs->get_hdp_flush_mask) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

611

hdp_flush_req_offset = adev->nbio.funcs->get_hdp_flush_req_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

612

hdp_flush_done_offset = adev->nbio.funcs->get_hdp_flush_done_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

614

adev->gfx.funcs->get_hdp_flush_mask(mes_ring, &ref_and_mask, &reg_mem_engine);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

631

if (!adev->mes.funcs->misc_op) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

656

r = adev->mes.funcs->misc_op(&adev->mes, &op_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

672

if (!adev->mes.funcs->misc_op) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

685

r = adev->mes.funcs->misc_op(&adev->mes, &op_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

822

if (!adev->mes.funcs->misc_op) {

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

829

r = adev->mes.funcs->misc_op(&adev->mes, &op_input);

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h

153

const struct amdgpu_mes_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h

76

const struct amdgpu_mmhub_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

345

const struct amdgpu_display_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c

50

if (adev->nbio.funcs && adev->nbio.funcs->get_pcie_replay_count)

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c

51

return adev->nbio.funcs->get_pcie_replay_count(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c

60

(!adev->nbio.funcs || !adev->nbio.funcs->get_pcie_replay_count))

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c

94

if (adev->nbio.funcs->program_aspm)

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c

95

adev->nbio.funcs->program_aspm(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h

114

const struct amdgpu_nbio_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

670

bo->tbo.base.funcs = &amdgpu_gem_object_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

236

if ((!pe->adev->df.funcs) ||

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

237

(!pe->adev->df.funcs->pmc_start))

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

247

target_cntr = pe->adev->df.funcs->pmc_start(pe->adev,

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

256

pe->adev->df.funcs->pmc_start(pe->adev, hwc->config,

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

275

if ((!pe->adev->df.funcs) ||

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

276

(!pe->adev->df.funcs->pmc_get_count))

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

284

pe->adev->df.funcs->pmc_get_count(pe->adev,

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

307

if ((!pe->adev->df.funcs) ||

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

308

(!pe->adev->df.funcs->pmc_stop))

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

314

pe->adev->df.funcs->pmc_stop(pe->adev, hwc->config, hwc->idx,

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

340

if ((!pe->adev->df.funcs) ||

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

341

(!pe->adev->df.funcs->pmc_start))

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

360

target_cntr = pe->adev->df.funcs->pmc_start(pe->adev,

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

389

if ((!pe->adev->df.funcs) ||

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

390

(!pe->adev->df.funcs->pmc_stop))

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c

398

pe->adev->df.funcs->pmc_stop(pe->adev, hwc->config, hwc->idx,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2862

if (!amdgpu_sriov_vf(adev) && psp->funcs && psp->funcs->wait_for_bootloader != NULL)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2863

ret = psp->funcs->wait_for_bootloader(psp);

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2870

if (psp->funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2871

psp->funcs->get_ras_capability) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2872

return psp->funcs->get_ras_capability(psp);

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2885

if (psp->funcs && psp->funcs->is_reload_needed)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2886

return psp->funcs->is_reload_needed(psp);

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2914

(psp->funcs->bootloader_load_kdb != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2923

(psp->funcs->bootloader_load_spl != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2932

(psp->funcs->bootloader_load_sysdrv != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2941

(psp->funcs->bootloader_load_soc_drv != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2950

(psp->funcs->bootloader_load_intf_drv != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2959

(psp->funcs->bootloader_load_dbg_drv != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2968

(psp->funcs->bootloader_load_ras_drv != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2977

(psp->funcs->bootloader_load_ipkeymgr_drv != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2986

(psp->funcs->bootloader_load_spdm_drv != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

2995

(psp->funcs->bootloader_load_sos != NULL)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

4954

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

4962

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

4970

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

4978

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

4986

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

4994

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

5002

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

5010

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

5018

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

5026

.funcs = &psp_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

391

const struct psp_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

485

#define psp_ring_create(psp, type) (psp)->funcs->ring_create((psp), (type))

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

486

#define psp_ring_stop(psp, type) (psp)->funcs->ring_stop((psp), (type))

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

487

#define psp_ring_destroy(psp, type) ((psp)->funcs->ring_destroy((psp), (type)))

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

489

((psp)->funcs->init_microcode ? (psp)->funcs->init_microcode((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

491

((psp)->funcs->bootloader_load_kdb ? (psp)->funcs->bootloader_load_kdb((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

493

((psp)->funcs->bootloader_load_spl ? (psp)->funcs->bootloader_load_spl((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

495

((psp)->funcs->bootloader_load_sysdrv ? (psp)->funcs->bootloader_load_sysdrv((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

497

((psp)->funcs->bootloader_load_soc_drv ? (psp)->funcs->bootloader_load_soc_drv((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

499

((psp)->funcs->bootloader_load_intf_drv ? (psp)->funcs->bootloader_load_intf_drv((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

501

((psp)->funcs->bootloader_load_dbg_drv ? (psp)->funcs->bootloader_load_dbg_drv((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

503

((psp)->funcs->bootloader_load_ras_drv ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

504

(psp)->funcs->bootloader_load_ras_drv((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

506

((psp)->funcs->bootloader_load_ipkeymgr_drv ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

507

(psp)->funcs->bootloader_load_ipkeymgr_drv((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

509

((psp)->funcs->bootloader_load_spdm_drv ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

510

(psp)->funcs->bootloader_load_spdm_drv((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

512

((psp)->funcs->bootloader_load_sos ? (psp)->funcs->bootloader_load_sos((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

514

((psp)->funcs->smu_reload_quirk ? (psp)->funcs->smu_reload_quirk((psp)) : false)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

516

((psp)->funcs->mode1_reset ? (psp)->funcs->mode1_reset((psp)) : false)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

518

((psp)->funcs->mem_training ? (psp)->funcs->mem_training((psp), (ops)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

520

#define psp_ring_get_wptr(psp) (psp)->funcs->ring_get_wptr((psp))

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

521

#define psp_ring_set_wptr(psp, value) (psp)->funcs->ring_set_wptr((psp), (value))

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

524

((psp)->funcs->load_usbc_pd_fw ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

525

(psp)->funcs->load_usbc_pd_fw((psp), (fw_pri_mc_addr)) : -EINVAL)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

528

((psp)->funcs->read_usbc_pd_fw ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

529

(psp)->funcs->read_usbc_pd_fw((psp), fw_ver) : -EINVAL)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

532

((psp)->funcs->update_spirom ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

533

(psp)->funcs->update_spirom((psp), fw_pri_mc_addr) : -EINVAL)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

536

((psp)->funcs->dump_spirom ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

537

(psp)->funcs->dump_spirom((psp), fw_pri_mc_addr) : -EINVAL)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

540

((psp)->funcs->vbflash_stat ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

541

(psp)->funcs->vbflash_stat((psp)) : -EINVAL)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

544

((psp)->funcs->fatal_error_recovery_quirk ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

545

(psp)->funcs->fatal_error_recovery_quirk((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

548

((psp)->funcs->is_aux_sos_load_required ? (psp)->funcs->is_aux_sos_load_required((psp)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

551

((psp)->funcs->reg_program_no_ring ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

552

(psp)->funcs->reg_program_no_ring((psp), val, id) : -EINVAL)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

555

((psp)->funcs->get_fw_type ? \

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

556

(psp)->funcs->get_fw_type(ucode, type):amdgpu_psp_get_fw_type(ucode, type))

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1251

adev->smuio.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1252

adev->smuio.funcs->get_socket_id &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1253

adev->smuio.funcs->get_die_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1257

adev->smuio.funcs->get_socket_id(adev),

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1258

adev->smuio.funcs->get_die_id(adev),

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1274

adev->smuio.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1275

adev->smuio.funcs->get_socket_id &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1276

adev->smuio.funcs->get_die_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1280

adev->smuio.funcs->get_socket_id(adev),

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1281

adev->smuio.funcs->get_die_id(adev),

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1297

adev->smuio.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1298

adev->smuio.funcs->get_socket_id &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1299

adev->smuio.funcs->get_die_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1303

adev->smuio.funcs->get_socket_id(adev),

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1304

adev->smuio.funcs->get_die_id(adev),

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

3037

if (adev->smuio.funcs && adev->smuio.funcs->get_socket_id)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

3038

socket = adev->smuio.funcs->get_socket_id(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

3070

if (adev->smuio.funcs && adev->smuio.funcs->get_socket_id)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

3071

socket = adev->smuio.funcs->get_socket_id(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

4141

} else if (adev->df.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

4142

adev->df.funcs->query_ras_poison_mode &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

4146

adev->df.funcs->query_ras_poison_mode(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

4423

if (adev->smuio.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

4424

adev->smuio.funcs->get_socket_id)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

4425

con->features |= ((adev->smuio.funcs->get_socket_id(adev)) <<

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

532

if (amdgpu_sriov_fullaccess(adev) && adev->gfx.rlc.funcs &&

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

533

adev->gfx.rlc.funcs->is_rlcg_access_range) {

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

534

if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg))

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

597

pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

598

pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

620

if (unlikely(!adev->nbio.funcs)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

624

pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

625

pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

629

if (unlikely(!adev->nbio.funcs))

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

633

adev->nbio.funcs->get_pcie_index_hi_offset(

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

680

pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

681

pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

709

pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

710

pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

711

if ((reg_addr >> 32) && (adev->nbio.funcs->get_pcie_index_hi_offset))

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

713

adev->nbio.funcs->get_pcie_index_hi_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

765

pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

766

pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

787

pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

788

pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

789

if ((reg_addr >> 32) && (adev->nbio.funcs->get_pcie_index_hi_offset))

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

791

adev->nbio.funcs->get_pcie_index_hi_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

835

pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

836

pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

864

pcie_index = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

865

pcie_data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

866

if ((reg_addr >> 32) && (adev->nbio.funcs->get_pcie_index_hi_offset))

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

868

adev->nbio.funcs->get_pcie_index_hi_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

910

address = adev->nbio.funcs->get_pcie_port_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

911

data = adev->nbio.funcs->get_pcie_port_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

925

address = adev->nbio.funcs->get_pcie_port_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

926

data = adev->nbio.funcs->get_pcie_port_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

104

if (ring->funcs->begin_use)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

105

ring->funcs->begin_use(ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

128

memset32(&ring->ring[occupied], ring->funcs->nop, chunk1);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

131

memset32(ring->ring, ring->funcs->nop, chunk2);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

148

u32 align_mask = ring->funcs->align_mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

154

memset32(&ib->ptr[ib->length_dw], ring->funcs->nop, count);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

177

count = ring->funcs->align_mask + 1 -

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

178

(ring->wptr & ring->funcs->align_mask);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

179

count &= ring->funcs->align_mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

182

ring->funcs->insert_nop(ring, count);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

187

if (ring->funcs->end_use)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

188

ring->funcs->end_use(ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

202

if (ring->funcs->end_use)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

203

ring->funcs->end_use(ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

243

if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

245

if (ring->funcs->type == AMDGPU_RING_TYPE_MES)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

325

if (ring->funcs->type != AMDGPU_RING_TYPE_CPER) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

332

max_ibs_dw = ring->funcs->emit_frame_size +

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

333

amdgpu_ring_max_ibs(ring->funcs->type) * ring->funcs->emit_ib_size;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

334

max_ibs_dw = (max_ibs_dw + ring->funcs->align_mask) & ~ring->funcs->align_mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

348

ring->ptr_mask = ring->funcs->support_64bit_ptrs ?

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

361

r = amdgpu_bo_create_kernel(adev, ring->ring_size + ring->funcs->extra_bytes,

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

378

if (!ring->no_scheduler && ring->funcs->type < AMDGPU_HW_IP_NUM) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

379

hw_ip = ring->funcs->type;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

459

if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

469

ring->funcs->soft_recovery(ring, vmid);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

615

if (ring->funcs->type == AMDGPU_RING_TYPE_CPER && amdgpu_uniras_enabled(ring->adev))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

623

if (ring->funcs->type == AMDGPU_RING_TYPE_CPER)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

643

if (ring->funcs->type != AMDGPU_RING_TYPE_CPER) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

696

if (ring->funcs->type == AMDGPU_RING_TYPE_CPER)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

710

if (ring->funcs->type == AMDGPU_RING_TYPE_CPER)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

827

bool is_high_prio_compute = ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

829

bool is_high_prio_gfx = ring->funcs->type == AMDGPU_RING_TYPE_GFX &&

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

847

prop->hqd_active = ring->funcs->type == AMDGPU_RING_TYPE_KIQ;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

866

if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

869

mqd_mgr = &adev->mqds[ring->funcs->type];

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

90

ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

941

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

307

const struct amdgpu_ring_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

431

#define amdgpu_ring_parse_cs(r, p, job, ib) ((r)->funcs->parse_cs((p), (job), (ib)))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

432

#define amdgpu_ring_patch_cs_in_place(r, p, job, ib) ((r)->funcs->patch_cs_in_place((p), (job), (ib)))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

433

#define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

434

#define amdgpu_ring_test_ib(r, t) ((r)->funcs->test_ib ? (r)->funcs->test_ib((r), (t)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

435

#define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

436

#define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

437

#define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

438

#define amdgpu_ring_emit_ib(r, job, ib, flags) ((r)->funcs->emit_ib((r), (job), (ib), (flags)))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

439

#define amdgpu_ring_emit_pipeline_sync(r) (r)->funcs->emit_pipeline_sync((r))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

440

#define amdgpu_ring_emit_vm_flush(r, vmid, addr) (r)->funcs->emit_vm_flush((r), (vmid), (addr))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

441

#define amdgpu_ring_emit_fence(r, addr, seq, flags) (r)->funcs->emit_fence((r), (addr), (seq), (flags))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

442

#define amdgpu_ring_emit_gds_switch(r, v, db, ds, wb, ws, ab, as) (r)->funcs->emit_gds_switch((r), (v), (db), (ds), (wb), (ws), (ab), (as))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

443

#define amdgpu_ring_emit_hdp_flush(r) (r)->funcs->emit_hdp_flush((r))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

444

#define amdgpu_ring_emit_switch_buffer(r) (r)->funcs->emit_switch_buffer((r))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

445

#define amdgpu_ring_emit_cntxcntl(r, d) (r)->funcs->emit_cntxcntl((r), (d))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

446

#define amdgpu_ring_emit_gfx_shadow(r, s, c, g, i, v) ((r)->funcs->emit_gfx_shadow((r), (s), (c), (g), (i), (v)))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

447

#define amdgpu_ring_emit_rreg(r, d, o) (r)->funcs->emit_rreg((r), (d), (o))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

448

#define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

449

#define amdgpu_ring_emit_reg_wait(r, d, v, m) (r)->funcs->emit_reg_wait((r), (d), (v), (m))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

450

#define amdgpu_ring_emit_reg_write_reg_wait(r, d0, d1, v, m) (r)->funcs->emit_reg_write_reg_wait((r), (d0), (d1), (v), (m))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

451

#define amdgpu_ring_emit_frame_cntl(r, b, s) (r)->funcs->emit_frame_cntl((r), (b), (s))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

452

#define amdgpu_ring_pad_ib(r, ib) ((r)->funcs->pad_ib((r), (ib)))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

453

#define amdgpu_ring_init_cond_exec(r, a) (r)->funcs->init_cond_exec((r), (a))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

454

#define amdgpu_ring_preempt_ib(r) (r)->funcs->preempt_ib(r)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

455

#define amdgpu_ring_patch_cntl(r, o) ((r)->funcs->patch_cntl((r), (o)))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

456

#define amdgpu_ring_patch_ce(r, o) ((r)->funcs->patch_ce((r), (o)))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

457

#define amdgpu_ring_patch_de(r, o) ((r)->funcs->patch_de((r), (o)))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

458

#define amdgpu_ring_reset(r, v, f) (r)->funcs->reset((r), (v), (f))

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

491

memset32(ring->ring, ring->funcs->nop, ring->buf_mask + 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

547

if (!ring->funcs->init_cond_exec)

drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c

134

adev->gfx.rlc.clear_state_size = dws = adev->gfx.rlc.funcs->get_csb_size(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c

197

max_me = adev->gfx.rlc.funcs->get_cp_table_num(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c

44

if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev))

drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c

50

adev->gfx.rlc.funcs->set_safe_mode(adev, xcc_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c

69

if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev))

drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c

75

adev->gfx.rlc.funcs->unset_safe_mode(adev, xcc_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h

305

const struct amdgpu_rlc_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

538

if (sdma_instance->funcs->soft_reset_kernel_queue)

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

539

return sdma_instance->funcs->soft_reset_kernel_queue(adev, instance_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

577

if (sdma_instance->funcs->stop_kernel_queue) {

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

578

sdma_instance->funcs->stop_kernel_queue(gfx_ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

580

sdma_instance->funcs->stop_kernel_queue(page_ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

590

if (sdma_instance->funcs->start_kernel_queue) {

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

591

sdma_instance->funcs->start_kernel_queue(gfx_ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

593

sdma_instance->funcs->start_kernel_queue(page_ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h

85

const struct amdgpu_sdma_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h

54

const struct amdgpu_smuio_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h

608

const struct amdgpu_psp_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h

143

const struct amdgpu_umc_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c

327

adev->umsch_mm.ring.funcs = &umsch_v4_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c

549

.funcs = &umsch_mm_v4_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

139

const struct umsch_mm_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

212

((umsch)->funcs->set_hw_resources ? (umsch)->funcs->set_hw_resources((umsch)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

214

((umsch)->funcs->add_queue ? (umsch)->funcs->add_queue((umsch), (input)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

216

((umsch)->funcs->remove_queue ? (umsch)->funcs->remove_queue((umsch), (input)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

219

((umsch)->funcs->set_regs ? (umsch)->funcs->set_regs((umsch)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

221

((umsch)->funcs->init_microcode ? (umsch)->funcs->init_microcode((umsch)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

223

((umsch)->funcs->load_microcode ? (umsch)->funcs->load_microcode((umsch)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

226

((umsch)->funcs->ring_init ? (umsch)->funcs->ring_init((umsch)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

228

((umsch)->funcs->ring_start ? (umsch)->funcs->ring_start((umsch)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

230

((umsch)->funcs->ring_stop ? (umsch)->funcs->ring_stop((umsch)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

232

((umsch)->funcs->ring_fini ? (umsch)->funcs->ring_fini((umsch)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c

118

const struct amdgpu_userq_funcs *funcs =

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c

126

funcs && funcs->detect_and_reset) {

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c

127

r = funcs->detect_and_reset(adev, ring_type);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

1304

!adev->vcn.inst[i].ras_poison_irq.funcs)

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

521

if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

549

ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC &&

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

395

adev_to_drm(adev)->mode_config.funcs = &amdgpu_vkms_mode_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

540

.funcs = &amdgpu_vkms_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

724

if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

754

if (ring->funcs->emit_gds_switch && job->gds_switch_needed)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

781

bool gds_switch_needed = ring->funcs->emit_gds_switch &&

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

802

gds_switch_needed &= !!ring->funcs->emit_gds_switch;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

803

vm_flush_needed &= !!ring->funcs->emit_vm_flush &&

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

806

ring->funcs->emit_wreg;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

810

ring->funcs->emit_cleaner_shader && job->base.s_fence &&

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

826

if (ring->funcs->insert_start)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

827

ring->funcs->insert_start(ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

829

if (ring->funcs->init_cond_exec)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

837

ring->funcs->emit_cleaner_shader(ring);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

847

if (spm_update_needed && adev->gfx.rlc.funcs->update_spm_vmid)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

848

adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

850

if (ring->funcs->emit_gds_switch &&

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

896

if (ring->funcs->emit_switch_buffer) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

1006

adev->vpe.ring.funcs = &vpe_ring_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

1040

.funcs = &vpe_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

1048

.funcs = &vpe2_ip_funcs,

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

496

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

499

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

101

((vpe)->funcs->set_regs ? (vpe)->funcs->set_regs((vpe)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

103

((vpe)->funcs->irq_init ? (vpe)->funcs->irq_init((vpe)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

105

((vpe)->funcs->init_microcode ? (vpe)->funcs->init_microcode((vpe)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

107

((vpe)->funcs->load_microcode ? (vpe)->funcs->load_microcode((vpe)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

67

const struct vpe_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

93

#define vpe_ring_init(vpe) ((vpe)->funcs->ring_init ? (vpe)->funcs->ring_init((vpe)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

94

#define vpe_ring_start(vpe) ((vpe)->funcs->ring_start ? (vpe)->funcs->ring_start((vpe)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

95

#define vpe_ring_stop(vpe) ((vpe)->funcs->ring_stop ? (vpe)->funcs->ring_stop((vpe)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

96

#define vpe_ring_fini(vpe) ((vpe)->funcs->ring_fini ? (vpe)->funcs->ring_fini((vpe)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

99

((vpe)->funcs->get_reg_offset ? (vpe)->funcs->get_reg_offset((vpe), (inst), (offset)) : 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

162

ret = xcp_mgr->funcs->get_ip_details(xcp_mgr, i, j,

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

172

if (xcp_mgr->funcs->get_xcp_mem_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

173

ret = xcp_mgr->funcs->get_xcp_mem_id(

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

195

if (!xcp_mgr->funcs || !xcp_mgr->funcs->switch_partition_mode)

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

204

ret = xcp_mgr->funcs->switch_partition_mode(xcp_mgr, mode, &num_xcps);

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

208

if (xcp_mgr->funcs->query_partition_mode)

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

244

if (!xcp_mgr->funcs || !xcp_mgr->funcs->query_partition_mode)

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

267

mode = xcp_mgr->funcs->query_partition_mode(xcp_mgr);

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

344

xcp_mgr->funcs = xcp_funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

532

if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE)

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

535

(ring->funcs->type == AMDGPU_RING_TYPE_CPER))

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

540

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

555

dev_err(adev->dev, "Not support ring type %d!", ring->funcs->type);

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

564

if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE)

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

578

.gpu_sched[ring->funcs->type][ring->hw_prio].num_scheds;

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

579

adev->xcp_mgr->xcp[sel_xcp_id].gpu_sched[ring->funcs->type][ring->hw_prio]

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

582

ring->name, sel_xcp_id, ring->funcs->type,

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

609

if ((ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC ||

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

610

ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) &&

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

625

if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE ||

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

626

ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

789

if (xcp_mgr->funcs && xcp_mgr->funcs->get_xcp_res_info)

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

790

return xcp_mgr->funcs->get_xcp_res_info(xcp_mgr, mode, xcp_cfg);

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h

124

struct amdgpu_xcp_mgr_funcs *funcs;

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

1533

.socket_id = adev->smuio.funcs->get_socket_id(adev),

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

547

if ((!adev->df.funcs) ||

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

548

(!adev->df.funcs->get_fica) ||

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

549

(!adev->df.funcs->set_fica))

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

552

fica_out = adev->df.funcs->get_fica(adev, ficaa_pie_ctl_in);

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

556

fica_out = adev->df.funcs->get_fica(adev, ficaa_pie_status_in);

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

561

adev->df.funcs->set_fica(adev, ficaa_pie_status_in, 0, 0);

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

103

if (adev->nbio.funcs->get_compute_partition_mode) {

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

104

mode = adev->nbio.funcs->get_compute_partition_mode(adev);

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

403

if (adev->gfx.funcs->switch_partition_mode)

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

404

adev->gfx.funcs->switch_partition_mode(xcp_mgr->adev,

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

68

if (adev->gfx.funcs->get_xccs_per_xcp)

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

69

num_xcc_per_xcp = adev->gfx.funcs->get_xccs_per_xcp(adev);

drivers/gpu/drm/amd/amdgpu/cik.c

1860

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/cik.c

1871

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/cik.c

2189

.funcs = &cik_common_ip_funcs,

drivers/gpu/drm/amd/amdgpu/cik_ih.c

461

.funcs = &cik_ih_ip_funcs,

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1266

adev->sdma.instance[i].ring.funcs = &cik_sdma_ring_funcs;

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1283

adev->sdma.trap_irq.funcs = &cik_sdma_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1284

adev->sdma.illegal_inst_irq.funcs = &cik_sdma_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1358

.funcs = &cik_sdma_ip_funcs,

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

205

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

208

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

458

.funcs = &cz_ih_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2798

adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3619

adev->mode_info.funcs = &dce_v10_0_display_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3643

adev->crtc_irq.funcs = &dce_v10_0_crtc_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3646

adev->pageflip_irq.funcs = &dce_v10_0_pageflip_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3649

adev->hpd_irq.funcs = &dce_v10_0_hpd_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3657

.funcs = &dce_v10_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3665

.funcs = &dce_v10_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2751

adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3515

adev->mode_info.funcs = &dce_v6_0_display_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3539

adev->crtc_irq.funcs = &dce_v6_0_crtc_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3542

adev->pageflip_irq.funcs = &dce_v6_0_pageflip_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3545

adev->hpd_irq.funcs = &dce_v6_0_hpd_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3554

.funcs = &dce_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3563

.funcs = &dce_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2712

adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3527

adev->mode_info.funcs = &dce_v8_0_display_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3551

adev->crtc_irq.funcs = &dce_v8_0_crtc_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3554

adev->pageflip_irq.funcs = &dce_v8_0_pageflip_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3557

adev->hpd_irq.funcs = &dce_v8_0_hpd_irq_funcs;

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3565

.funcs = &dce_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3573

.funcs = &dce_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3581

.funcs = &dce_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3589

.funcs = &dce_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3597

.funcs = &dce_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/df_v1_7.c

100

adev->df.funcs->enable_broadcast_mode(adev, false);

drivers/gpu/drm/amd/amdgpu/df_v1_7.c

72

fb_channel_number = adev->df.funcs->get_fb_channel_number(adev);

drivers/gpu/drm/amd/amdgpu/df_v1_7.c

85

adev->df.funcs->enable_broadcast_mode(adev, true);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

102

address = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

103

data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

124

address = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

125

data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

143

address = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

144

data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

224

adev->df.funcs->get_fb_channel_number(adev) == 0xe) ||

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

226

adev->df.funcs->get_fb_channel_number(adev) == 0x1e)) {

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

297

fb_channel_number = adev->df.funcs->get_fb_channel_number(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

311

adev->df.funcs->enable_broadcast_mode(adev, true);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

330

adev->df.funcs->enable_broadcast_mode(adev, false);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

51

address = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

52

data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

74

address = adev->nbio.funcs->get_pcie_index_offset(adev);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

75

data = adev->nbio.funcs->get_pcie_data_offset(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10000

adev->gfx.kiq[0].irq.funcs = &gfx_v10_0_kiq_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10003

adev->gfx.priv_reg_irq.funcs = &gfx_v10_0_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10006

adev->gfx.bad_op_irq.funcs = &gfx_v10_0_bad_op_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10009

adev->gfx.priv_inst_irq.funcs = &gfx_v10_0_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10026

adev->gfx.rlc.funcs = &gfx_v10_0_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10030

adev->gfx.rlc.funcs = &gfx_v10_0_rlc_funcs_sriov;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10246

.funcs = &gfx_v10_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

3733

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

3771

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

3798

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4905

if (adev->gfx.rlc.funcs) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4906

if (adev->gfx.rlc.funcs->init) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4907

r = adev->gfx.rlc.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5459

adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5591

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5615

adev->gfx.rlc.funcs->start(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7827

adev->gfx.funcs = &gfx_v10_0_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8631

if (!adev->gfx.funcs->get_hdp_flush_mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8636

adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, &reg_mem_engine);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8638

adev->nbio.funcs->get_hdp_flush_req_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8639

adev->nbio.funcs->get_hdp_flush_done_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8750

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8776

if (ring->funcs->type == AMDGPU_RING_TYPE_GFX) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9008

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9036

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9500

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9960

adev->gfx.kiq[0].ring.funcs = &gfx_v10_0_ring_funcs_kiq;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9963

adev->gfx.gfx_ring[i].funcs = &gfx_v10_0_ring_funcs_gfx;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9966

adev->gfx.compute_ring[i].funcs = &gfx_v10_0_ring_funcs_compute;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9997

adev->gfx.eop_irq.funcs = &gfx_v10_0_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1549

if (adev->gfx.imu.funcs->load_microcode)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1550

adev->gfx.imu.funcs->load_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1552

if (adev->gfx.imu.funcs->setup_imu)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1553

adev->gfx.imu.funcs->setup_imu(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1554

if (adev->gfx.imu.funcs->start_imu)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1555

adev->gfx.imu.funcs->start_imu(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2285

adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2514

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2531

adev->gfx.rlc.funcs->start(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

395

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

437

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

470

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4747

r = adev->gfxhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4755

adev->gfxhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4912

if (adev->gfx.imu.funcs) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4914

if (adev->gfx.imu.funcs->program_rlc_ram)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4915

adev->gfx.imu.funcs->program_rlc_ram(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4923

if (adev->gfx.imu.funcs && (amdgpu_dpm > 0)) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4924

if (adev->gfx.imu.funcs->load_microcode)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4925

adev->gfx.imu.funcs->load_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4926

if (adev->gfx.imu.funcs->setup_imu)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4927

adev->gfx.imu.funcs->setup_imu(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4928

if (adev->gfx.imu.funcs->start_imu)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4929

adev->gfx.imu.funcs->start_imu(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4979

if (adev->nbio.funcs->gc_doorbell_init)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4980

adev->nbio.funcs->gc_doorbell_init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5062

adev->gfxhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5399

adev->gfx.funcs = &gfx_v11_0_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

569

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5733

&& ((ring->funcs->type == AMDGPU_RING_TYPE_GFX)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5734

|| (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE))) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

596

if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5984

if (!adev->gfx.funcs->get_hdp_flush_mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5989

adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, &reg_mem_engine);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5991

adev->nbio.funcs->get_hdp_flush_req_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5992

adev->nbio.funcs->get_hdp_flush_done_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6100

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6126

if (ring->funcs->type == AMDGPU_RING_TYPE_GFX) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

633

ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6358

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6386

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7423

adev->gfx.kiq[0].ring.funcs = &gfx_v11_0_ring_funcs_kiq;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7426

adev->gfx.gfx_ring[i].funcs = &gfx_v11_0_ring_funcs_gfx;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7429

adev->gfx.compute_ring[i].funcs = &gfx_v11_0_ring_funcs_compute;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7459

adev->gfx.eop_irq.funcs = &gfx_v11_0_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7462

adev->gfx.priv_reg_irq.funcs = &gfx_v11_0_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7465

adev->gfx.bad_op_irq.funcs = &gfx_v11_0_bad_op_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7468

adev->gfx.priv_inst_irq.funcs = &gfx_v11_0_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7471

adev->gfx.rlc_gc_fed_irq.funcs = &gfx_v11_0_rlc_gc_fed_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7482

adev->gfx.imu.funcs = &gfx_v11_0_imu_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7487

adev->gfx.rlc.funcs = &gfx_v11_0_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7630

.funcs = &gfx_v11_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

827

if (adev->gfx.imu.funcs && adev->gfx.imu.funcs->init_microcode) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

828

err = adev->gfx.imu.funcs->init_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

941

if (adev->gfx.rlc.funcs->update_spm_vmid)

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

942

adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1338

if (adev->gfx.imu.funcs && (amdgpu_dpm > 0)) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1340

if (adev->gfx.imu.funcs->load_microcode)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1341

adev->gfx.imu.funcs->load_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1343

if (adev->gfx.imu.funcs->setup_imu)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1344

adev->gfx.imu.funcs->setup_imu(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1345

if (adev->gfx.imu.funcs->start_imu)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1346

adev->gfx.imu.funcs->start_imu(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1914

adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2093

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2110

adev->gfx.rlc.funcs->start(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

313

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

355

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3580

r = adev->gfxhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3588

adev->gfxhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3745

if (adev->gfx.imu.funcs && (amdgpu_dpm > 0)) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3747

if (adev->gfx.imu.funcs->program_rlc_ram)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3748

adev->gfx.imu.funcs->program_rlc_ram(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3756

if (adev->gfx.imu.funcs && (amdgpu_dpm > 0)) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3757

if (adev->gfx.imu.funcs->load_microcode)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3758

adev->gfx.imu.funcs->load_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3759

if (adev->gfx.imu.funcs->setup_imu)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3760

adev->gfx.imu.funcs->setup_imu(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3761

if (adev->gfx.imu.funcs->start_imu)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3762

adev->gfx.imu.funcs->start_imu(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3809

if (adev->nbio.funcs->gc_doorbell_init)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3810

adev->nbio.funcs->gc_doorbell_init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

387

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3889

adev->gfxhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3939

if (adev->smuio.funcs &&

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3940

adev->smuio.funcs->get_gpu_clock_counter)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3941

clock = adev->smuio.funcs->get_gpu_clock_counter(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3969

adev->gfx.funcs = &gfx_v12_0_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4069

&& ((ring->funcs->type == AMDGPU_RING_TYPE_GFX)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4070

|| (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE))) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4480

if (!adev->gfx.funcs->get_hdp_flush_mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4485

adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, &reg_mem_engine);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4487

adev->nbio.funcs->get_hdp_flush_req_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4488

adev->nbio.funcs->get_hdp_flush_done_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4567

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4593

if (ring->funcs->type == AMDGPU_RING_TYPE_GFX) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

468

if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4684

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4712

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

505

ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5116

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5628

adev->gfx.kiq[0].ring.funcs = &gfx_v12_0_ring_funcs_kiq;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5631

adev->gfx.gfx_ring[i].funcs = &gfx_v12_0_ring_funcs_gfx;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5634

adev->gfx.compute_ring[i].funcs = &gfx_v12_0_ring_funcs_compute;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5660

adev->gfx.eop_irq.funcs = &gfx_v12_0_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5663

adev->gfx.priv_reg_irq.funcs = &gfx_v12_0_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5666

adev->gfx.bad_op_irq.funcs = &gfx_v12_0_bad_op_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5669

adev->gfx.priv_inst_irq.funcs = &gfx_v12_0_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5679

adev->gfx.imu.funcs = &gfx_v12_0_imu_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5684

adev->gfx.rlc.funcs = &gfx_v12_0_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5814

.funcs = &gfx_v12_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

657

if (adev->gfx.imu.funcs) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

658

if (adev->gfx.imu.funcs->init_microcode) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

659

err = adev->gfx.imu.funcs->init_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

770

if (adev->gfx.rlc.funcs->update_spm_vmid)

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

771

adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1134

if (adev->gfx.imu.funcs) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1136

if (adev->gfx.imu.funcs->load_microcode)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1137

adev->gfx.imu.funcs->load_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

118

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

155

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1562

adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

187

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2595

if (adev->gfx.funcs &&

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2596

adev->gfx.funcs->get_xccs_per_xcp) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2597

num_xcc_per_xcp = adev->gfx.funcs->get_xccs_per_xcp(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2626

r = adev->gfxhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2633

adev->gfxhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2805

if (adev->gfx.imu.funcs) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2806

if (adev->gfx.imu.funcs->load_microcode)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2807

adev->gfx.imu.funcs->load_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

281

if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2842

if (adev->nbio.funcs->gc_doorbell_init)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2843

adev->nbio.funcs->gc_doorbell_init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2916

adev->gfxhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2964

if (adev->smuio.funcs &&

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2965

adev->smuio.funcs->get_gpu_clock_counter)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2966

clock = adev->smuio.funcs->get_gpu_clock_counter(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2990

adev->gfx.funcs = &gfx_v12_1_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3079

&& ((ring->funcs->type == AMDGPU_RING_TYPE_GFX)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3080

|| (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE))) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

318

ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3515

if (ring->funcs->type == AMDGPU_RING_TYPE_GFX) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3571

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3976

adev->gfx.kiq[i].ring.funcs = &gfx_v12_1_ring_funcs_kiq;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3979

adev->gfx.compute_ring[j + i * adev->gfx.num_compute_rings].funcs =

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

4006

adev->gfx.eop_irq.funcs = &gfx_v12_1_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

4009

adev->gfx.priv_reg_irq.funcs = &gfx_v12_1_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

4012

adev->gfx.priv_inst_irq.funcs = &gfx_v12_1_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

4015

adev->gfx.rlc_poison_irq.funcs = &gfx_v12_1_rlc_poison_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

4025

adev->gfx.imu.funcs = &gfx_v12_1_imu_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

4030

adev->gfx.rlc.funcs = &gfx_v12_1_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

4138

.funcs = &gfx_v12_1_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

448

if (adev->gfx.imu.funcs) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

449

if (adev->gfx.imu.funcs->init_microcode) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

450

err = adev->gfx.imu.funcs->init_microcode(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

578

if (adev->gfx.rlc.funcs->update_spm_vmid)

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

579

adev->gfx.rlc.funcs->update_spm_vmid(adev, i, NULL, 0xf);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2354

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2380

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2410

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2579

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2580

adev->gfx.rlc.funcs->reset(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2608

adev->gfx.rlc.funcs->start(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3098

adev->gfx.funcs = &gfx_v6_0_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3099

adev->gfx.rlc.funcs = &gfx_v6_0_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3130

r = adev->gfx.rlc.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3201

r = adev->gfx.rlc.funcs->resume(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3219

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3577

adev->gfx.gfx_ring[i].funcs = &gfx_v6_0_ring_funcs_gfx;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3579

adev->gfx.compute_ring[i].funcs = &gfx_v6_0_ring_funcs_compute;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3600

adev->gfx.eop_irq.funcs = &gfx_v6_0_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3603

adev->gfx.priv_reg_irq.funcs = &gfx_v6_0_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3606

adev->gfx.priv_inst_irq.funcs = &gfx_v6_0_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3667

.funcs = &gfx_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2074

if (!adev->gfx.funcs->get_hdp_flush_mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2079

adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, &usepfp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3105

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3147

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3179

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3244

if (adev->gfx.rlc.funcs->update_spm_vmid)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3245

adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3429

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3435

adev->gfx.rlc.funcs->reset(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3466

adev->gfx.rlc.funcs->start(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4092

if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE ||

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4093

ring->funcs->type == AMDGPU_RING_TYPE_KIQ) {

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4143

adev->gfx.funcs = &gfx_v7_0_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4144

adev->gfx.rlc.funcs = &gfx_v7_0_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4388

r = adev->gfx.rlc.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4479

adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4481

r = adev->gfx.rlc.funcs->resume(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4499

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4580

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

5014

adev->gfx.gfx_ring[i].funcs = &gfx_v7_0_ring_funcs_gfx;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

5016

adev->gfx.compute_ring[i].funcs = &gfx_v7_0_ring_funcs_compute;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

5037

adev->gfx.eop_irq.funcs = &gfx_v7_0_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

5040

adev->gfx.priv_reg_irq.funcs = &gfx_v7_0_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

5043

adev->gfx.priv_inst_irq.funcs = &gfx_v7_0_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

5117

.funcs = &gfx_v7_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

5125

.funcs = &gfx_v7_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

5133

.funcs = &gfx_v7_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1276

if (adev->gfx.rlc.funcs->update_spm_vmid)

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1277

adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1954

r = adev->gfx.rlc.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3858

adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4076

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4077

adev->gfx.rlc.funcs->reset(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4079

adev->gfx.rlc.funcs->start(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4390

if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4544

if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4756

r = adev->gfx.rlc.funcs->resume(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4876

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4968

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5095

adev->gfx.rlc.funcs->start(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5235

if ((ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5236

(ring->funcs->type == AMDGPU_RING_TYPE_KIQ)) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5271

adev->gfx.funcs = &gfx_v8_0_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6045

if (!adev->gfx.funcs->get_hdp_flush_mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6050

adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, &reg_mem_engine);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6180

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6198

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6355

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6981

adev->gfx.kiq[0].ring.funcs = &gfx_v8_0_ring_funcs_kiq;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6984

adev->gfx.gfx_ring[i].funcs = &gfx_v8_0_ring_funcs_gfx;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6987

adev->gfx.compute_ring[i].funcs = &gfx_v8_0_ring_funcs_compute;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7018

adev->gfx.eop_irq.funcs = &gfx_v8_0_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7021

adev->gfx.priv_reg_irq.funcs = &gfx_v8_0_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7024

adev->gfx.priv_inst_irq.funcs = &gfx_v8_0_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7027

adev->gfx.cp_ecc_error_irq.funcs = &gfx_v8_0_cp_ecc_error_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7030

adev->gfx.sq_irq.funcs = &gfx_v8_0_sq_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7035

adev->gfx.rlc.funcs = &iceland_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7135

.funcs = &gfx_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7144

.funcs = &gfx_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1014

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1148

adev->smuio.funcs->get_die_id(adev));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2316

if (adev->gfx.rlc.funcs) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2317

if (adev->gfx.rlc.funcs->init) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2318

r = adev->gfx.rlc.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2774

adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3204

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3240

adev->gfx.rlc.funcs->start(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3540

if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3679

if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4041

r = adev->gfx.rlc.funcs->resume(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4159

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4231

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4267

BUG_ON(!ring->funcs->emit_rreg);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4859

adev->gfx.funcs = &gfx_v9_0_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5435

if (!adev->gfx.funcs->get_hdp_flush_mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5440

adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, &reg_mem_engine);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5442

adev->nbio.funcs->get_hdp_flush_req_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5443

adev->nbio.funcs->get_hdp_flush_done_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5654

if (ring->funcs->type == AMDGPU_RING_TYPE_GFX) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5668

if (ring->funcs->type == AMDGPU_RING_TYPE_GFX) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5943

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5971

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5973

bool fw_version_ok = (ring->funcs->type == AMDGPU_RING_TYPE_GFX) ?

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7210

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7227

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7724

adev->gfx.kiq[0].ring.funcs = &gfx_v9_0_ring_funcs_kiq;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7727

adev->gfx.gfx_ring[i].funcs = &gfx_v9_0_ring_funcs_gfx;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7731

adev->gfx.sw_gfx_ring[i].funcs = &gfx_v9_0_sw_ring_funcs_gfx;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7735

adev->gfx.compute_ring[i].funcs = &gfx_v9_0_ring_funcs_compute;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7767

adev->gfx.eop_irq.funcs = &gfx_v9_0_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7770

adev->gfx.priv_reg_irq.funcs = &gfx_v9_0_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7773

adev->gfx.bad_op_irq.funcs = &gfx_v9_0_bad_op_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7776

adev->gfx.priv_inst_irq.funcs = &gfx_v9_0_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7779

adev->gfx.cp_ecc_error_irq.funcs = &gfx_v9_0_cp_ecc_error_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7793

adev->gfx.rlc.funcs = &gfx_v9_0_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7962

.funcs = &gfx_v9_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

956

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

986

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1095

r = adev->gfx.rlc.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1458

if (adev->gfx.rlc.funcs->update_spm_vmid)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1459

adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1817

if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1955

if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

205

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

235

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2366

r = adev->gfx.rlc.funcs->resume(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2402

if (!adev->psp.funcs)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2559

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

262

uint32_t eng_sel = ring->funcs->type == AMDGPU_RING_TYPE_GFX ? 4 : 0;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2910

if (!adev->gfx.funcs->get_hdp_flush_mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2915

adev->gfx.funcs->get_hdp_flush_mask(ring, &ref_and_mask, &reg_mem_engine);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2917

adev->nbio.funcs->get_hdp_flush_req_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2918

adev->nbio.funcs->get_hdp_flush_done_offset(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2993

int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3088

switch (ring->funcs->type) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4461

.socket_id = adev->smuio.funcs->get_socket_id(adev),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4631

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4881

adev->gfx.kiq[i].ring.funcs = &gfx_v9_4_3_ring_funcs_kiq;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4884

adev->gfx.compute_ring[j + i * adev->gfx.num_compute_rings].funcs

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4912

adev->gfx.eop_irq.funcs = &gfx_v9_4_3_eop_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4915

adev->gfx.priv_reg_irq.funcs = &gfx_v9_4_3_priv_reg_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4918

adev->gfx.bad_op_irq.funcs = &gfx_v9_4_3_bad_op_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4921

adev->gfx.priv_inst_irq.funcs = &gfx_v9_4_3_priv_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4926

adev->gfx.rlc.funcs = &gfx_v9_4_3_rlc_funcs;

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

5051

.funcs = &gfx_v9_4_3_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

803

if (adev->psp.funcs) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

923

adev->gfx.funcs = &gfx_v9_4_3_gfx_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

1005

adev->gfxhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

1006

adev->mmhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

1023

if (adev->gmc.ecc_irq.funcs &&

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

1079

r = adev->mmhub.funcs->set_clockgating(adev, state);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

1097

adev->mmhub.funcs->get_clockgating(adev, flags);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

1133

.funcs = &gmc_v10_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

183

adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

187

adev->gmc.ecc_irq.funcs = &gmc_v10_0_ecc_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

585

adev->mmhub.funcs = &mmhub_v2_3_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

588

adev->mmhub.funcs = &mmhub_v2_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

604

adev->gfxhub.funcs = &gfxhub_v2_1_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

607

adev->gfxhub.funcs = &gfxhub_v2_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

655

base = adev->gfxhub.funcs->get_fb_location(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

667

adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

689

adev->nbio.funcs->get_memsize(adev) * 1024ULL * 1024ULL;

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

702

adev->gmc.aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

753

adev->gfxhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

755

adev->mmhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

932

r = adev->gfxhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

937

r = adev->mmhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

941

adev->hdp.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

949

adev->gfxhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

950

adev->mmhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

976

if (!adev->in_s0ix && adev->gfxhub.funcs && adev->gfxhub.funcs->utcl2_harvest)

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

977

adev->gfxhub.funcs->utcl2_harvest(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

989

if (adev->umc.funcs && adev->umc.funcs->init_registers)

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

990

adev->umc.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

1029

r = adev->mmhub.funcs->set_clockgating(adev, state);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

1040

adev->mmhub.funcs->get_clockgating(adev, flags);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

1073

.funcs = &gmc_v11_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

179

adev->gmc.vm_fault.funcs = &gmc_v11_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

183

adev->gmc.ecc_irq.funcs = &gmc_v11_0_ecc_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

579

adev->mmhub.funcs = &mmhub_v3_0_1_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

582

adev->mmhub.funcs = &mmhub_v3_0_2_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

589

adev->mmhub.funcs = &mmhub_v3_3_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

592

adev->mmhub.funcs = &mmhub_v3_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

601

adev->gfxhub.funcs = &gfxhub_v3_0_3_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

611

adev->gfxhub.funcs = &gfxhub_v11_5_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

614

adev->gfxhub.funcs = &gfxhub_v3_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

661

base = adev->mmhub.funcs->get_fb_location(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

675

adev->vm_manager.vram_base_offset = adev->mmhub.funcs->get_mc_fb_offset(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

693

adev->nbio.funcs->get_memsize(adev) * 1024ULL * 1024ULL;

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

706

adev->gmc.aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

749

adev->mmhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

751

adev->gfxhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

919

r = adev->mmhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

928

adev->mmhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

952

if (adev->umc.funcs && adev->umc.funcs->init_registers)

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

953

adev->umc.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

967

adev->mmhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

982

if (adev->gmc.ecc_irq.funcs &&

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1021

r = adev->mmhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1030

adev->mmhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1053

if (adev->umc.funcs && adev->umc.funcs->init_registers)

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1054

adev->umc.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1068

adev->mmhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1083

if (adev->gmc.ecc_irq.funcs &&

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1130

r = adev->mmhub.funcs->set_clockgating(adev, state);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1144

adev->mmhub.funcs->get_clockgating(adev, flags);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

1178

.funcs = &gmc_v12_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

175

adev->gmc.vm_fault.funcs = &gmc_v12_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

179

adev->gmc.ecc_irq.funcs = &gmc_v12_0_ecc_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

359

adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

363

adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

610

adev->mmhub.funcs = &mmhub_v4_1_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

613

adev->mmhub.funcs = &mmhub_v4_2_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

625

adev->gfxhub.funcs = &gfxhub_v12_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

628

adev->gfxhub.funcs = &gfxhub_v12_1_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

639

if (adev->smuio.funcs &&

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

640

adev->smuio.funcs->is_host_gpu_xgmi_supported)

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

642

adev->smuio.funcs->is_host_gpu_xgmi_supported(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

697

base = adev->mmhub.funcs->get_fb_location(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

712

adev->vm_manager.vram_base_offset = adev->mmhub.funcs->get_mc_fb_offset(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

738

adev->nbio.funcs->get_memsize(adev) * 1024ULL * 1024ULL;

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

756

adev->mmhub.funcs->get_mc_fb_offset(adev) +

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

819

adev->mmhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

821

adev->gfxhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

134

if (adev->gfx.funcs->ih_node_to_logical_xcc) {

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

135

xcc_id = adev->gfx.funcs->ih_node_to_logical_xcc(adev,

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

395

adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input);

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

401

adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input);

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

405

adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input);

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

648

adev->gmc.vm_fault.funcs = &gmc_v12_1_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

651

adev->gmc.ecc_irq.funcs = &gmc_v12_1_ecc_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

1164

adev->gmc.vm_fault.funcs = &gmc_v6_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

1172

.funcs = &gmc_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1380

adev->gmc.vm_fault.funcs = &gmc_v7_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1388

.funcs = &gmc_v7_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1396

.funcs = &gmc_v7_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1751

adev->gmc.vm_fault.funcs = &gmc_v8_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1759

.funcs = &gmc_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1767

.funcs = &gmc_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1775

.funcs = &gmc_v8_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1302

if (adev->nbio.funcs && adev->nbio.funcs->is_nps_switch_requested &&

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1303

adev->nbio.funcs->is_nps_switch_requested(adev)) {

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1348

adev->umc.funcs = &umc_v6_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1377

if (1 & adev->smuio.funcs->get_die_id(adev))

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1448

adev->mmhub.funcs = &mmhub_v9_4_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1451

adev->mmhub.funcs = &mmhub_v1_7_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1455

adev->mmhub.funcs = &mmhub_v1_8_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1458

adev->mmhub.funcs = &mmhub_v1_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1490

adev->gfxhub.funcs = &gfxhub_v1_2_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1492

adev->gfxhub.funcs = &gfxhub_v1_0_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1577

adev->smuio.funcs->is_host_gpu_xgmi_supported(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1582

adev->smuio.funcs->get_pkg_type(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1631

if (adev->df.funcs &&

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1632

adev->df.funcs->enable_ecc_force_par_wr_rmw)

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1633

adev->df.funcs->enable_ecc_force_par_wr_rmw(adev, false);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1652

u64 base = adev->mmhub.funcs->get_fb_location(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1667

adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1690

adev->nbio.funcs->get_memsize(adev) * 1024ULL * 1024ULL;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1724

adev->gfxhub.funcs->get_mc_fb_offset(adev) +

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1855

adev->gfxhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1857

adev->mmhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1883

if (adev->df.funcs &&

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1884

adev->df.funcs->get_hbm_channel_number) {

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1885

numchan = adev->df.funcs->get_hbm_channel_number(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2139

r = adev->gfxhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2144

r = adev->mmhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2186

if (adev->mmhub.funcs->update_power_gating)

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2187

adev->mmhub.funcs->update_power_gating(adev, true);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2189

adev->hdp.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2201

adev->gfxhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2202

adev->mmhub.funcs->set_fault_enable_default(adev, value);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2210

if (adev->umc.funcs && adev->umc.funcs->init_registers)

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2211

adev->umc.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2233

adev->gfxhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2234

adev->mmhub.funcs->gart_disable(adev);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2254

if (adev->mmhub.funcs->update_power_gating)

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2255

adev->mmhub.funcs->update_power_gating(adev, false);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2264

if (adev->gmc.ecc_irq.funcs &&

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2322

adev->mmhub.funcs->set_clockgating(adev, state);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2333

adev->mmhub.funcs->get_clockgating(adev, flags);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2367

.funcs = &gmc_v9_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

575

if (adev->gfx.funcs->ih_node_to_logical_xcc) {

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

576

xcc_id = adev->gfx.funcs->ih_node_to_logical_xcc(adev,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

697

adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

703

adev->gmc.ecc_irq.funcs = &gmc_v9_0_ecc_funcs;

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

47

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c

33

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

33

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

44

if (adev->nbio.funcs->get_memsize)

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

45

adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

450

.funcs = &iceland_ih_ip_funcs,

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

334

adev->nbio.funcs->ih_control(adev);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

356

adev->nbio.funcs->ih_doorbell_range(adev, ih[0]->use_doorbell,

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

563

adev->irq.self_irq.funcs = &ih_v6_0_self_irq_funcs;

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

816

.funcs = &ih_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

306

adev->nbio.funcs->ih_control(adev);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

327

adev->nbio.funcs->ih_doorbell_range(adev, ih[0]->use_doorbell,

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

532

adev->irq.self_irq.funcs = &ih_v6_1_self_irq_funcs;

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

795

.funcs = &ih_v6_1_ip_funcs,

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

324

adev->nbio.funcs->ih_control(adev);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

350

adev->nbio.funcs->ih_doorbell_range(adev, ih[0]->use_doorbell,

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

575

adev->irq.self_irq.funcs = &ih_v7_0_self_irq_funcs;

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

874

.funcs = &ih_v7_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/imu_v12_1.c

142

if (adev->psp.funcs) {

drivers/gpu/drm/amd/amdgpu/isp_v4_1_0.c

189

isp->funcs = &isp_v4_1_0_funcs;

drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.c

416

isp->funcs = &isp_v4_1_1_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

307

if (ring->funcs->parse_cs)

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

591

adev->jpeg.inst->ring_dec->funcs = &jpeg_v1_0_decode_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

601

adev->jpeg.inst->irq.funcs = &jpeg_v1_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

163

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

568

if (ring->funcs->parse_cs)

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

836

adev->jpeg.inst->ring_dec->funcs = &jpeg_v2_0_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

847

adev->jpeg.inst->irq.funcs = &jpeg_v2_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

855

.funcs = &jpeg_v2_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

219

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

765

adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v2_5_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

767

adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v2_6_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

791

adev->jpeg.inst[i].irq.funcs = &jpeg_v2_5_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

794

adev->jpeg.inst[i].ras_poison_irq.funcs = &jpeg_v2_6_ras_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

803

.funcs = &jpeg_v2_5_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

811

.funcs = &jpeg_v2_6_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

178

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

628

adev->jpeg.inst->ring_dec->funcs = &jpeg_v3_0_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

639

adev->jpeg.inst->irq.funcs = &jpeg_v3_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

648

.funcs = &jpeg_v3_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

198

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

793

adev->jpeg.inst->ring_dec->funcs = &jpeg_v4_0_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

808

adev->jpeg.inst->irq.funcs = &jpeg_v4_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

811

adev->jpeg.inst->ras_poison_irq.funcs = &jpeg_v4_0_ras_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

819

.funcs = &jpeg_v4_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1258

adev->jpeg.inst[i].ring_dec[j].funcs = &jpeg_v4_0_3_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1285

adev->jpeg.inst->irq.funcs = &jpeg_v4_0_3_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1288

adev->jpeg.inst->ras_poison_irq.funcs = &jpeg_v4_0_3_ras_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1296

.funcs = &jpeg_v4_0_3_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1503

adev->jpeg.inst->ras_poison_irq.funcs) {

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

402

adev->nbio.funcs->vcn_doorbell_range(

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

881

if (ring->funcs->parse_cs)

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

515

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

844

adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v4_0_5_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

862

adev->jpeg.inst[i].irq.funcs = &jpeg_v4_0_5_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

871

.funcs = &jpeg_v4_0_5_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

166

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

714

adev->jpeg.inst->ring_dec->funcs = &jpeg_v5_0_0_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

725

adev->jpeg.inst->irq.funcs = &jpeg_v5_0_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

733

.funcs = &jpeg_v5_0_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

1087

adev->jpeg.inst->ras_poison_irq.funcs) {

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

278

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

923

adev->jpeg.inst[i].ring_dec[j].funcs = &jpeg_v5_0_1_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

950

adev->jpeg.inst->irq.funcs = &jpeg_v5_0_1_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

953

adev->jpeg.inst->ras_poison_irq.funcs = &jpeg_v5_0_1_ras_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

962

.funcs = &jpeg_v5_0_1_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c

239

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c

741

adev->jpeg.inst[i].ring_dec[j].funcs = &jpeg_v5_0_2_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c

763

adev->jpeg.inst->irq.funcs = &jpeg_v5_0_2_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c

771

.funcs = &jpeg_v5_0_2_ip_funcs,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

149

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

719

adev->jpeg.inst->ring_dec->funcs = &jpeg_v5_3_0_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

730

adev->jpeg.inst->irq.funcs = &jpeg_v5_3_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

738

.funcs = &jpeg_v5_3_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

147

r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input);

drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

171

r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input);

drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

337

if (adev->gfx.funcs->get_gfx_shadow_info) {

drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

338

adev->gfx.funcs->get_gfx_shadow_info(adev, &shadow_info, true);

drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

497

r = adev->mes.funcs->suspend_gang(&adev->mes, &queue_input);

drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

533

r = adev->mes.funcs->resume_gang(&adev->mes, &queue_input);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1345

ring->funcs = &mes_v11_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1431

adev->mes.funcs = &mes_v11_0_funcs;

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1765

.funcs = &mes_v11_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1525

ring->funcs = &mes_v12_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1610

adev->mes.funcs = &mes_v12_0_funcs;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1942

.funcs = &mes_v12_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1489

ring->funcs = &mes_v12_1_ring_funcs;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1594

adev->mes.funcs = &mes_v12_1_funcs;

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1838

if (adev->gfx.funcs &&

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1839

adev->gfx.funcs->get_xccs_per_xcp)

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1840

num_xcc_per_xcp = adev->gfx.funcs->get_xccs_per_xcp(adev);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

2023

.funcs = &mes_v12_1_ip_funcs,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

701

.socket_id = adev->smuio.funcs->get_socket_id(adev),

drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c

405

adev->virt.ack_irq.funcs = &xgpu_ai_mailbox_ack_irq_funcs;

drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c

407

adev->virt.rcv_irq.funcs = &xgpu_ai_mailbox_rcv_irq_funcs;

drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c

496

adev->virt.ack_irq.funcs = &xgpu_nv_mailbox_ack_irq_funcs;

drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c

498

adev->virt.rcv_irq.funcs = &xgpu_nv_mailbox_rcv_irq_funcs;

drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c

581

adev->virt.ack_irq.funcs = &xgpu_vi_mailbox_ack_irq_funcs;

drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c

583

adev->virt.rcv_irq.funcs = &xgpu_vi_mailbox_rcv_irq_funcs;

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

329

adev->nbio.funcs->ih_control(adev);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

361

adev->nbio.funcs->ih_doorbell_range(adev, ih[0]->use_doorbell,

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

541

adev->irq.self_irq.funcs = &navi10_ih_self_irq_funcs;

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

728

.funcs = &navi10_ih_ip_funcs,

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

725

adev->nbio.ras_err_event_athub_irq.funcs =

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

618

adev->nbio.ras_err_event_athub_irq.funcs =

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

552

adev->nbio.ras_controller_irq.funcs =

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

570

adev->nbio.ras_err_event_athub_irq.funcs =

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

648

adev->nbio.ras_controller_irq.funcs =

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

666

adev->nbio.ras_err_event_athub_irq.funcs =

drivers/gpu/drm/amd/amdgpu/nv.c

1021

adev->nbio.funcs->update_medium_grain_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/nv.c

1023

adev->nbio.funcs->update_medium_grain_light_sleep(adev,

drivers/gpu/drm/amd/amdgpu/nv.c

1025

adev->hdp.funcs->update_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/nv.c

1027

adev->smuio.funcs->update_rom_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/nv.c

1050

adev->nbio.funcs->get_clockgating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/nv.c

1052

adev->hdp.funcs->get_clock_gating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/nv.c

1054

adev->smuio.funcs->get_clock_gating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/nv.c

308

return adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/nv.c

413

u32 memsize = adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/nv.c

502

.funcs = &nv_common_ip_funcs,

drivers/gpu/drm/amd/amdgpu/nv.c

577

if (adev->gfx.funcs->update_perfmon_mgcg)

drivers/gpu/drm/amd/amdgpu/nv.c

578

adev->gfx.funcs->update_perfmon_mgcg(adev, !enter);

drivers/gpu/drm/amd/amdgpu/nv.c

580

if (adev->nbio.funcs->enable_aspm &&

drivers/gpu/drm/amd/amdgpu/nv.c

582

adev->nbio.funcs->enable_aspm(adev, !enter);

drivers/gpu/drm/amd/amdgpu/nv.c

610

adev->nbio.funcs->set_reg_remap(adev);

drivers/gpu/drm/amd/amdgpu/nv.c

934

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/nv.c

953

if (adev->nbio.funcs->apply_lc_spc_mode_wa)

drivers/gpu/drm/amd/amdgpu/nv.c

954

adev->nbio.funcs->apply_lc_spc_mode_wa(adev);

drivers/gpu/drm/amd/amdgpu/nv.c

956

if (adev->nbio.funcs->apply_l1_link_width_reconfig_wa)

drivers/gpu/drm/amd/amdgpu/nv.c

957

adev->nbio.funcs->apply_l1_link_width_reconfig_wa(adev);

drivers/gpu/drm/amd/amdgpu/nv.c

962

adev->nbio.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/nv.c

967

if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev))

drivers/gpu/drm/amd/amdgpu/nv.c

968

adev->nbio.funcs->remap_hdp_registers(adev);

drivers/gpu/drm/amd/amdgpu/nv.c

970

adev->nbio.funcs->enable_doorbell_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/nv.c

984

adev->nbio.funcs->enable_doorbell_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/nv.c

985

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/psp_v10_0.c

173

psp->funcs = &psp_v10_0_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

691

psp->funcs = &psp_v11_0_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

185

psp->funcs = &psp_v11_0_8_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

294

psp->funcs = &psp_v12_0_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

981

psp->funcs = &psp_v13_0_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

352

psp->funcs = &psp_v13_0_4_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

702

psp->funcs = &psp_v14_0_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

271

psp->funcs = &psp_v15_0_0_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

363

psp->funcs = &psp_v15_0_8_funcs;

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

386

psp->funcs = &psp_v3_1_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

1155

adev->sdma.instance[i].ring.funcs = &sdma_v2_4_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

1172

adev->sdma.trap_irq.funcs = &sdma_v2_4_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

1173

adev->sdma.illegal_inst_irq.funcs = &sdma_v2_4_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

1247

.funcs = &sdma_v2_4_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

230

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

233

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1597

adev->sdma.instance[i].ring.funcs = &sdma_v3_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1614

adev->sdma.trap_irq.funcs = &sdma_v3_0_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1615

adev->sdma.illegal_inst_irq.funcs = &sdma_v3_0_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1690

.funcs = &sdma_v3_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1699

.funcs = &sdma_v3_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

406

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

409

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2494

adev->sdma.instance[i].ring.funcs = &sdma_v4_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2497

adev->sdma.instance[i].page.funcs =

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2550

adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2551

adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2552

adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2553

adev->sdma.vm_hole_irq.funcs = &sdma_v4_0_vm_hole_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2554

adev->sdma.doorbell_invalid_irq.funcs = &sdma_v4_0_doorbell_invalid_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2555

adev->sdma.pool_timeout_irq.funcs = &sdma_v4_0_pool_timeout_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2556

adev->sdma.srbm_write_irq.funcs = &sdma_v4_0_srbm_write_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2740

.funcs = &sdma_v4_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

790

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

793

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

868

adev->nbio.funcs->get_hdp_flush_done_offset(adev),

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

869

adev->nbio.funcs->get_hdp_flush_req_offset(adev),

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1468

adev->sdma.instance[i].funcs = &sdma_v4_4_2_sdma_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2188

adev->sdma.instance[i].ring.funcs = &sdma_v4_4_2_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2191

adev->sdma.instance[i].page.funcs =

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2247

adev->sdma.trap_irq.funcs = &sdma_v4_4_2_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2248

adev->sdma.illegal_inst_irq.funcs = &sdma_v4_4_2_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2249

adev->sdma.ecc_irq.funcs = &sdma_v4_4_2_ecc_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2250

adev->sdma.vm_hole_irq.funcs = &sdma_v4_4_2_vm_hole_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2251

adev->sdma.doorbell_invalid_irq.funcs = &sdma_v4_4_2_doorbell_invalid_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2252

adev->sdma.pool_timeout_irq.funcs = &sdma_v4_4_2_pool_timeout_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2253

adev->sdma.srbm_write_irq.funcs = &sdma_v4_4_2_srbm_write_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2254

adev->sdma.ctxt_empty_irq.funcs = &sdma_v4_4_2_ctxt_empty_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2367

.funcs = &sdma_v4_4_2_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2447

.socket_id = adev->smuio.funcs->get_socket_id(adev),

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

357

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

360

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

436

adev->nbio.funcs->get_hdp_flush_done_offset(adev),

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

437

adev->nbio.funcs->get_hdp_flush_req_offset(adev),

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1408

adev->sdma.instance[i].funcs = &sdma_v5_0_sdma_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1971

adev->sdma.instance[i].ring.funcs = &sdma_v5_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1989

adev->sdma.trap_irq.funcs = &sdma_v5_0_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1990

adev->sdma.illegal_inst_irq.funcs = &sdma_v5_0_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

2065

.funcs = &sdma_v5_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

413

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

416

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

502

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

503

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

781

adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1327

adev->sdma.instance[i].funcs = &sdma_v5_2_sdma_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1978

adev->sdma.instance[i].ring.funcs = &sdma_v5_2_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1996

adev->sdma.trap_irq.funcs = &sdma_v5_2_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1997

adev->sdma.illegal_inst_irq.funcs = &sdma_v5_2_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

2072

.funcs = &sdma_v5_2_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

261

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

264

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

351

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

352

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

625

adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

1799

adev->sdma.instance[i].ring.funcs = &sdma_v6_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

1821

adev->sdma.trap_irq.funcs = &sdma_v6_0_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

1822

adev->sdma.fence_irq.funcs = &sdma_v6_0_fence_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

1823

adev->sdma.illegal_inst_irq.funcs = &sdma_v6_0_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

1898

.funcs = &sdma_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

249

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

252

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

336

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

337

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

566

adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

1731

adev->sdma.instance[i].ring.funcs = &sdma_v7_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

1753

adev->sdma.trap_irq.funcs = &sdma_v7_0_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

1754

adev->sdma.fence_irq.funcs = &sdma_v7_0_fence_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

1755

adev->sdma.illegal_inst_irq.funcs = &sdma_v7_0_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

1847

.funcs = &sdma_v7_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

251

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

254

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

338

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

339

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

560

adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1539

if (adev->gfx.funcs && adev->gfx.funcs->ih_node_to_logical_xcc)

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1540

xcc_id = adev->gfx.funcs->ih_node_to_logical_xcc(adev, entry->node_id);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1694

adev->sdma.instance[i].ring.funcs = &sdma_v7_1_ring_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1717

adev->sdma.trap_irq.funcs = &sdma_v7_1_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1718

adev->sdma.illegal_inst_irq.funcs = &sdma_v7_1_illegal_inst_irq_funcs;

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1793

.funcs = &sdma_v7_1_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

245

amdgpu_ring_write(ring, ring->funcs->nop |

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

248

amdgpu_ring_write(ring, ring->funcs->nop);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

542

adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/si.c

1493

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/si.c

1504

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/si.c

2690

.funcs = &si_common_ip_funcs,

drivers/gpu/drm/amd/amdgpu/si_dma.c

765

adev->sdma.instance[i].ring.funcs = &si_dma_ring_funcs;

drivers/gpu/drm/amd/amdgpu/si_dma.c

776

adev->sdma.trap_irq.funcs = &si_dma_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/si_dma.c

850

.funcs = &si_dma_ip_funcs,

drivers/gpu/drm/amd/amdgpu/si_ih.c

324

.funcs = &si_ih_ip_funcs,

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

100

if (adev->gfxhub.funcs->mode2_save_regs)

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

101

adev->gfxhub.funcs->mode2_save_regs(adev);

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

102

if (adev->gfxhub.funcs->halt)

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

103

adev->gfxhub.funcs->halt(adev);

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

161

if (adev->gfxhub.funcs->mode2_restore_regs)

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

162

adev->gfxhub.funcs->mode2_restore_regs(adev);

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

163

adev->gfxhub.funcs->init(adev);

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

164

r = adev->gfxhub.funcs->gart_enable(adev);

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

196

if (adev->ip_blocks[i].version->funcs->late_init) {

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

197

r = adev->ip_blocks[i].version->funcs->late_init(

drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

202

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c

197

if (adev->ip_blocks[i].version->funcs->late_init) {

drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c

198

r = adev->ip_blocks[i].version->funcs->late_init(

drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c

203

adev->ip_blocks[i].version->funcs->name,

drivers/gpu/drm/amd/amdgpu/soc15.c

1213

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/soc15.c

1225

if (adev->df.funcs &&

drivers/gpu/drm/amd/amdgpu/soc15.c

1226

adev->df.funcs->sw_init)

drivers/gpu/drm/amd/amdgpu/soc15.c

1227

adev->df.funcs->sw_init(adev);

drivers/gpu/drm/amd/amdgpu/soc15.c

1236

if (adev->df.funcs &&

drivers/gpu/drm/amd/amdgpu/soc15.c

1237

adev->df.funcs->sw_fini)

drivers/gpu/drm/amd/amdgpu/soc15.c

1238

adev->df.funcs->sw_fini(adev);

drivers/gpu/drm/amd/amdgpu/soc15.c

1249

adev->nbio.funcs->sdma_doorbell_range(adev, i,

drivers/gpu/drm/amd/amdgpu/soc15.c

1263

adev->nbio.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/soc15.c

1268

if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev))

drivers/gpu/drm/amd/amdgpu/soc15.c

1269

adev->nbio.funcs->remap_hdp_registers(adev);

drivers/gpu/drm/amd/amdgpu/soc15.c

1272

adev->nbio.funcs->enable_doorbell_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/soc15.c

1294

adev->nbio.funcs->enable_doorbell_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/soc15.c

1295

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/soc15.c

1396

adev->nbio.funcs->update_medium_grain_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1398

adev->nbio.funcs->update_medium_grain_light_sleep(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1400

adev->hdp.funcs->update_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1406

adev->smuio.funcs->update_rom_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1408

adev->df.funcs->update_medium_grain_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1414

adev->nbio.funcs->update_medium_grain_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1416

adev->nbio.funcs->update_medium_grain_light_sleep(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1418

adev->hdp.funcs->update_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1427

adev->hdp.funcs->update_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc15.c

1444

if (adev->nbio.funcs && adev->nbio.funcs->get_clockgating_state)

drivers/gpu/drm/amd/amdgpu/soc15.c

1445

adev->nbio.funcs->get_clockgating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/soc15.c

1447

if (adev->hdp.funcs && adev->hdp.funcs->get_clock_gating_state)

drivers/gpu/drm/amd/amdgpu/soc15.c

1448

adev->hdp.funcs->get_clock_gating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/soc15.c

1467

if (adev->smuio.funcs && adev->smuio.funcs->get_clock_gating_state)

drivers/gpu/drm/amd/amdgpu/soc15.c

1468

adev->smuio.funcs->get_clock_gating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/soc15.c

1470

if (adev->df.funcs && adev->df.funcs->get_clockgating_state)

drivers/gpu/drm/amd/amdgpu/soc15.c

1471

adev->df.funcs->get_clockgating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/soc15.c

342

return adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/soc15.c

496

adev->nbio.funcs->enable_doorbell_interrupt(adev, false);

drivers/gpu/drm/amd/amdgpu/soc15.c

504

adev->nbio.funcs->enable_doorbell_interrupt(adev, true);

drivers/gpu/drm/amd/amdgpu/soc15.c

687

.funcs = &soc15_common_ip_funcs,

drivers/gpu/drm/amd/amdgpu/soc15.c

936

adev->nbio.funcs->set_reg_remap(adev);

drivers/gpu/drm/amd/amdgpu/soc15_common.h

41

((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs && adev->gfx.rlc.rlcg_reg_access_supported) ? \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

46

((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs && adev->gfx.rlc.rlcg_reg_access_supported) ? \

drivers/gpu/drm/amd/amdgpu/soc21.c

1059

adev->nbio.funcs->update_medium_grain_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc21.c

1061

adev->nbio.funcs->update_medium_grain_light_sleep(adev,

drivers/gpu/drm/amd/amdgpu/soc21.c

1063

adev->hdp.funcs->update_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc21.c

1080

adev->lsdma.funcs->update_memory_power_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc21.c

1094

adev->nbio.funcs->get_clockgating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/soc21.c

1096

adev->hdp.funcs->get_clock_gating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/soc21.c

254

return adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/soc21.c

372

u32 memsize = adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/soc21.c

463

.funcs = &soc21_common_ip_funcs,

drivers/gpu/drm/amd/amdgpu/soc21.c

538

if (adev->gfx.funcs->update_perfmon_mgcg)

drivers/gpu/drm/amd/amdgpu/soc21.c

539

adev->gfx.funcs->update_perfmon_mgcg(adev, !enter);

drivers/gpu/drm/amd/amdgpu/soc21.c

567

adev->nbio.funcs->set_reg_remap(adev);

drivers/gpu/drm/amd/amdgpu/soc21.c

932

adev->nbio.ras_err_event_athub_irq.funcs)

drivers/gpu/drm/amd/amdgpu/soc21.c

943

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/soc21.c

965

adev->nbio.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/soc21.c

970

if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev))

drivers/gpu/drm/amd/amdgpu/soc21.c

971

adev->nbio.funcs->remap_hdp_registers(adev);

drivers/gpu/drm/amd/amdgpu/soc21.c

973

adev->nbio.funcs->enable_doorbell_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/soc21.c

987

adev->nbio.funcs->enable_doorbell_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/soc21.c

988

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/soc21.c

994

adev->nbio.ras_err_event_athub_irq.funcs)

drivers/gpu/drm/amd/amdgpu/soc24.c

229

(adev->nbio.funcs->program_aspm))

drivers/gpu/drm/amd/amdgpu/soc24.c

230

adev->nbio.funcs->program_aspm(adev);

drivers/gpu/drm/amd/amdgpu/soc24.c

238

.funcs = &soc24_common_ip_funcs,

drivers/gpu/drm/amd/amdgpu/soc24.c

319

if (adev->gfx.funcs->update_perfmon_mgcg)

drivers/gpu/drm/amd/amdgpu/soc24.c

320

adev->gfx.funcs->update_perfmon_mgcg(adev, !enter);

drivers/gpu/drm/amd/amdgpu/soc24.c

345

adev->nbio.funcs->set_reg_remap(adev);

drivers/gpu/drm/amd/amdgpu/soc24.c

420

adev->nbio.ras_err_event_athub_irq.funcs)

drivers/gpu/drm/amd/amdgpu/soc24.c

432

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/soc24.c

454

adev->nbio.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/soc24.c

459

if (adev->nbio.funcs->remap_hdp_registers)

drivers/gpu/drm/amd/amdgpu/soc24.c

460

adev->nbio.funcs->remap_hdp_registers(adev);

drivers/gpu/drm/amd/amdgpu/soc24.c

462

if (adev->df.funcs && adev->df.funcs->hw_init)

drivers/gpu/drm/amd/amdgpu/soc24.c

463

adev->df.funcs->hw_init(adev);

drivers/gpu/drm/amd/amdgpu/soc24.c

466

adev->nbio.funcs->enable_doorbell_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/soc24.c

480

adev->nbio.funcs->enable_doorbell_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/soc24.c

481

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/soc24.c

487

adev->nbio.ras_err_event_athub_irq.funcs)

drivers/gpu/drm/amd/amdgpu/soc24.c

544

adev->nbio.funcs->update_medium_grain_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc24.c

546

adev->nbio.funcs->update_medium_grain_light_sleep(adev,

drivers/gpu/drm/amd/amdgpu/soc24.c

548

adev->hdp.funcs->update_clock_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc24.c

565

adev->lsdma.funcs->update_memory_power_gating(adev,

drivers/gpu/drm/amd/amdgpu/soc24.c

579

adev->nbio.funcs->get_clockgating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/soc24.c

581

adev->hdp.funcs->get_clock_gating_state(adev, flags);

drivers/gpu/drm/amd/amdgpu/soc24.c

93

return adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

146

return adev->nbio.funcs->get_memsize(adev);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

315

adev->nbio.funcs->init_registers(adev);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

327

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

342

adev->nbio.funcs->enable_doorbell_aperture(adev, true);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

351

adev->nbio.funcs->enable_doorbell_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

352

adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, false);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

410

.funcs = &soc_v1_0_common_ip_funcs,

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

419

if (adev->gfx.funcs &&

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

420

adev->gfx.funcs->get_xccs_per_xcp)

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

421

num_xcc_per_xcp = adev->gfx.funcs->get_xccs_per_xcp(adev);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

452

if (amdgpu_sriov_vf(adev) || !adev->psp.funcs)

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

455

if (adev->nbio.funcs &&

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

456

adev->nbio.funcs->get_compute_partition_mode) {

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

457

mode = adev->nbio.funcs->get_compute_partition_mode(adev);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

723

if (adev->gfx.imu.funcs &&

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

724

adev->gfx.imu.funcs->switch_compute_partition)

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

725

adev->gfx.imu.funcs->switch_compute_partition(xcp_mgr->adev, num_xcc_per_xcp, mode);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

508

.funcs = &tonga_ih_ip_funcs,

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

147

.socket_id = adev->smuio.funcs->get_socket_id(adev),

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

412

adev->smuio.funcs &&

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

413

adev->smuio.funcs->get_socket_id)

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

414

addr_in.ma.socket_id = adev->smuio.funcs->get_socket_id(adev);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

225

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

433

umsch->funcs = &umsch_mm_v4_0_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

203

adev->uvd.inst->ring.funcs = &uvd_v3_1_ring_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

540

adev->uvd.inst->irq.funcs = &uvd_v3_1_irq_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

858

.funcs = &uvd_v3_1_ip_funcs,

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

802

adev->uvd.inst->ring.funcs = &uvd_v4_2_ring_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

813

adev->uvd.inst->irq.funcs = &uvd_v4_2_irq_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

822

.funcs = &uvd_v4_2_ip_funcs,

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

904

adev->uvd.inst->ring.funcs = &uvd_v5_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

915

adev->uvd.inst->irq.funcs = &uvd_v5_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

924

.funcs = &uvd_v5_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1635

adev->uvd.inst->ring.funcs = &uvd_v6_0_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1638

adev->uvd.inst->ring.funcs = &uvd_v6_0_ring_phys_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1648

adev->uvd.inst->ring_enc[i].funcs = &uvd_v6_0_enc_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1665

adev->uvd.inst->irq.funcs = &uvd_v6_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1674

.funcs = &uvd_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1683

.funcs = &uvd_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1692

.funcs = &uvd_v6_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

406

adev->uvd.inst->ring_enc[i].funcs = NULL;

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1607

adev->uvd.inst[i].ring.funcs = &uvd_v7_0_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1621

adev->uvd.inst[j].ring_enc[i].funcs = &uvd_v7_0_enc_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1642

adev->uvd.inst[i].irq.funcs = &uvd_v7_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1651

.funcs = &uvd_v7_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

832

adev->vce.ring[i].funcs = &vce_v1_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

845

adev->vce.irq.funcs = &vce_v1_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

853

.funcs = &vce_v1_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

670

adev->vce.ring[i].funcs = &vce_v2_0_ring_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

683

adev->vce.irq.funcs = &vce_v2_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

692

.funcs = &vce_v2_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

1007

.funcs = &vce_v3_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

1015

.funcs = &vce_v3_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

1023

.funcs = &vce_v3_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

978

adev->vce.ring[i].funcs = &vce_v3_0_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

984

adev->vce.ring[i].funcs = &vce_v3_0_ring_phys_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

999

adev->vce.irq.funcs = &vce_v3_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

864

adev->vce.ring[i].funcs = &vce_v4_0_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

878

adev->vce.irq.funcs = &vce_v4_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

887

.funcs = &vce_v4_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1953

if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC)

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1955

else if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG)

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

2182

adev->vcn.inst->ring_dec.funcs = &vcn_v1_0_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

2190

adev->vcn.inst->ring_enc[i].funcs = &vcn_v1_0_enc_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

2201

adev->vcn.inst->irq.funcs = &vcn_v1_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

2209

.funcs = &vcn_v1_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

2178

adev->vcn.inst->ring_dec.funcs = &vcn_v2_0_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

2186

adev->vcn.inst->ring_enc[i].funcs = &vcn_v2_0_enc_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

2197

adev->vcn.inst->irq.funcs = &vcn_v2_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

2206

.funcs = &vcn_v2_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

288

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

179

if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) {

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1917

adev->vcn.inst[i].ring_dec.funcs = &vcn_v2_5_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1930

adev->vcn.inst[j].ring_enc[i].funcs = &vcn_v2_5_enc_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

206

ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC &&

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

2099

adev->vcn.inst[i].irq.funcs = &vcn_v2_5_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

2102

adev->vcn.inst[i].ras_poison_irq.funcs = &vcn_v2_6_ras_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

2146

.funcs = &vcn_v2_5_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

2155

.funcs = &vcn_v2_6_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

480

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

2181

adev->vcn.inst[i].ring_dec.funcs = &vcn_v3_0_dec_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

2183

adev->vcn.inst[i].ring_dec.funcs = &vcn_v3_0_dec_sw_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

2197

adev->vcn.inst[i].ring_enc[j].funcs = &vcn_v3_0_enc_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

2362

adev->vcn.inst[i].irq.funcs = &vcn_v3_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

2388

.funcs = &vcn_v3_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

414

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

2049

adev->vcn.inst[i].ring_enc[0].funcs =

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

2252

adev->vcn.inst[i].irq.funcs = &vcn_v4_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

2255

adev->vcn.inst[i].ras_poison_irq.funcs = &vcn_v4_0_ras_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

2281

.funcs = &vcn_v4_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

346

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1818

adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_3_unified_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

2019

adev->vcn.inst->irq.funcs = &vcn_v4_0_3_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

2022

adev->vcn.inst->ras_poison_irq.funcs = &vcn_v4_0_3_ras_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

2048

.funcs = &vcn_v4_0_3_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

2223

adev->vcn.inst->ras_poison_irq.funcs) {

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

319

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1531

adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_5_unified_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1699

adev->vcn.inst[i].irq.funcs = &vcn_v4_0_5_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1725

.funcs = &vcn_v4_0_5_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

300

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1311

adev->vcn.inst[i].ring_enc[0].funcs =

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1314

adev->vcn.inst[i].ring_enc[0].funcs =

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1483

adev->vcn.inst[i].irq.funcs = &vcn_v5_0_0_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1509

.funcs = &vcn_v5_0_0_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

264

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1462

adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v5_0_1_unified_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1641

adev->vcn.inst->irq.funcs = &vcn_v5_0_1_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1644

adev->vcn.inst->ras_poison_irq.funcs = &vcn_v5_0_1_ras_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1675

.funcs = &vcn_v5_0_1_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1795

adev->vcn.inst->ras_poison_irq.funcs) {

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

282

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c

1036

adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v5_0_2_unified_ring_vm_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c

1191

adev->vcn.inst->irq.funcs = &vcn_v5_0_2_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c

1219

.funcs = &vcn_v5_0_2_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c

218

adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

273

adev->nbio.funcs->ih_control(adev);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

293

adev->nbio.funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

471

adev->irq.self_irq.funcs = &vega10_ih_self_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

658

.funcs = &vega10_ih_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

319

adev->nbio.funcs->ih_control(adev);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

357

adev->nbio.funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

557

adev->irq.self_irq.funcs = &vega20_ih_self_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

754

.funcs = &vega20_ih_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vi.c

1312

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/vi.c

1323

if (!ring || !ring->funcs->emit_wreg) {

drivers/gpu/drm/amd/amdgpu/vi.c

2041

.funcs = &vi_common_ip_funcs,

drivers/gpu/drm/amd/amdgpu/vpe_v2_0.c

232

adev->nbio.funcs->vpe_doorbell_range(adev, i, ring->use_doorbell, ring->doorbell_index + i*4, 4);

drivers/gpu/drm/amd/amdgpu/vpe_v2_0.c

349

vpe->funcs = &vpe_v2_0_funcs;

drivers/gpu/drm/amd/amdgpu/vpe_v2_0.c

350

vpe->trap_irq.funcs = &vpe_v2_0_trap_irq_funcs;

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

258

adev->nbio.funcs->vpe_doorbell_range(adev, i, ring->use_doorbell, ring->doorbell_index + i*4, 4);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

396

vpe->funcs = &vpe_v6_1_funcs;

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

397

vpe->trap_irq.funcs = &vpe_v6_1_trap_irq_funcs;

drivers/gpu/drm/amd/amdkfd/kfd_crat.c

2153

kdev->adev->smuio.funcs->get_pkg_type(kdev->adev) ==

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

269

r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input);

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

307

r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13582

if (obj->funcs == adev->dm.atomic_obj.funcs) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1456

dmcu->funcs->dmcu_init(dmcu);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1457

abm->dmcu_is_running = dmcu->funcs->is_dmcu_initialized(dmcu);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2764

create_params.funcs.reg_read = amdgpu_dm_dmub_reg_read;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2765

create_params.funcs.reg_write = amdgpu_dm_dmub_reg_write;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4031

.funcs = &amdgpu_dm_funcs,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5088

if (obj->funcs == dm->atomic_obj.funcs)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5165

adev_to_drm(adev)->mode_config.funcs = (void *)&amdgpu_dm_mode_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6304

if (adev->mode_info.funcs == NULL)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6305

adev->mode_info.funcs = &dm_display_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9312

if (aconnector->base.funcs->reset)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9313

aconnector->base.funcs->reset(&aconnector->base);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

762

if (acrtc->base.funcs->reset)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

763

acrtc->base.funcs->reset(&acrtc->base);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1312

pipe_ctx->stream_res.tg->funcs->get_odm_combine_segments)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1313

pipe_ctx->stream_res.tg->funcs->get_odm_combine_segments(pipe_ctx->stream_res.tg, &segments);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1593

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1779

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

1963

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2143

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2318

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2372

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2441

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2510

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

4358

if (hubbub && hubbub->funcs->get_mall_en)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

4359

hubbub->funcs->get_mall_en(hubbub, &mall_in_use);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

782

struct mod_hdcp_ddc_funcs *ddc_funcs = &config->ddc.funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

814

cp_psp->funcs.update_stream_config = update_config;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c

815

cp_psp->funcs.enable_assr = enable_assr;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1058

!bios->funcs->get_embedded_panel_info)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1062

r = bios->funcs->get_embedded_panel_info(bios, &info);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1528

ctx->dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

862

adev->crtc_irq.funcs = &dm_crtc_irq_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

865

adev->vline0_irq.funcs = &dm_vline0_irq_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

868

adev->dmub_outbox_irq.funcs = &dm_dmub_outbox_irq_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

871

adev->vupdate_irq.funcs = &dm_vupdate_irq_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

874

adev->dmub_trace_irq.funcs = &dm_dmub_trace_irq_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

877

adev->pageflip_irq.funcs = &dm_pageflip_irq_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

880

adev->hpd_irq.funcs = &dm_hpd_irq_funcs;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1598

if (res_pool->funcs->remove_stream_from_ctx &&

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1599

res_pool->funcs->remove_stream_from_ctx(stream->ctx->dc, dc_state, stream) != DC_OK)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1494

plane->funcs->atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1969

if (plane->funcs->reset)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1970

plane->funcs->reset(plane);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

702

struct pp_smu_funcs *funcs)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

707

funcs->ctx.ver = PP_SMU_VER_RV;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

708

funcs->rv_funcs.pp_smu.dm = ctx;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

709

funcs->rv_funcs.set_wm_ranges = pp_rv_set_wm_ranges;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

710

funcs->rv_funcs.set_pme_wa_enable = pp_rv_set_pme_wa_enable;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

711

funcs->rv_funcs.set_display_count =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

713

funcs->rv_funcs.set_min_deep_sleep_dcfclk =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

715

funcs->rv_funcs.set_hard_min_dcfclk_by_freq =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

717

funcs->rv_funcs.set_hard_min_fclk_by_freq =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

721

funcs->ctx.ver = PP_SMU_VER_NV;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

722

funcs->nv_funcs.pp_smu.dm = ctx;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

723

funcs->nv_funcs.set_display_count = pp_nv_set_display_count;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

724

funcs->nv_funcs.set_hard_min_dcfclk_by_freq =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

726

funcs->nv_funcs.set_min_deep_sleep_dcfclk =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

728

funcs->nv_funcs.set_voltage_by_freq =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

730

funcs->nv_funcs.set_wm_ranges = pp_nv_set_wm_ranges;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

733

funcs->nv_funcs.set_pme_wa_enable = NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

735

funcs->nv_funcs.set_hard_min_uclk_by_freq = pp_nv_set_hard_min_uclk_by_freq;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

737

funcs->nv_funcs.get_maximum_sustainable_clocks = pp_nv_get_maximum_sustainable_clocks;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

739

funcs->nv_funcs.get_uclk_dpm_states = pp_nv_get_uclk_dpm_states;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

740

funcs->nv_funcs.set_pstate_handshake_support = pp_nv_set_pstate_handshake_support;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

744

funcs->ctx.ver = PP_SMU_VER_RN;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

745

funcs->rn_funcs.pp_smu.dm = ctx;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

746

funcs->rn_funcs.set_wm_ranges = pp_rn_set_wm_ranges;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

747

funcs->rn_funcs.get_dpm_clock_table = pp_rn_get_dpm_clock_table;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c

209

if (wbcon->base.base.funcs->reset)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c

210

wbcon->base.base.funcs->reset(&wbcon->base.base);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

3012

bp->base.funcs = &vbios_funcs;

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

3826

bp->base.funcs = &vbios_funcs;

drivers/gpu/drm/amd/display/dc/bios/bios_parser_interface.c

54

bios->funcs->bios_parser_destroy(dcb);

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

225

bp->funcs->program_display_engine_pll(bp, &pxl_clk_params);

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

234

if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

235

dmcu->funcs->set_psr_wait_loop(dmcu, actual_clock / 1000 / 7);

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

262

int ss_info_num = bp->funcs->get_ss_entry_number(

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

267

enum bp_result result = bp->funcs->get_spread_spectrum_info(

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

291

result = bp->funcs->get_spread_spectrum_info(

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

362

base->funcs = &dce_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

275

clk_mgr->base.funcs = &dce110_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

123

bp->funcs->set_dce_clock(bp, &dce_clk_params);

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

126

if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

128

dmcu->funcs->set_psr_wait_loop(dmcu,

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

157

bp->funcs->set_dce_clock(bp, &dce_clk_params);

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

195

clk_mgr->base.funcs = &dce112_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

76

bp->funcs->set_dce_clock(bp, &dce_clk_params);

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

92

bp->funcs->set_dce_clock(bp, &dce_clk_params);

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

94

if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

96

dmcu->funcs->set_psr_wait_loop(dmcu,

drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c

121

clk_mgr->base.funcs = &dce120_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c

52

result = bp->funcs->get_spread_spectrum_info(bp, AS_SIGNAL_TYPE_XGMI,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

158

clk_mgr->funcs->set_dispclk(clk_mgr, dispclk_to_dpp_threshold);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

159

clk_mgr->funcs->set_dprefclk(clk_mgr);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

169

pipe_ctx->plane_res.dpp->funcs->dpp_dppclk_control(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

177

clk_mgr->funcs->set_dispclk(clk_mgr, new_clocks->dispclk_khz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

178

clk_mgr->funcs->set_dprefclk(clk_mgr);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

323

clk_mgr->base.funcs = &rv1_clk_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

324

clk_mgr->funcs = &rv1_clk_internal_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c

137

if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c

139

dmcu->funcs->set_psr_wait_loop(dmcu,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv2_clk_mgr.c

42

clk_mgr->funcs = &rv2_clk_internal_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

122

clk_mgr->dccg->funcs->update_dpp_dto(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

163

if (!stream_enc->funcs->get_fifo_cal_average_level)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

165

fifo_level = stream_enc->funcs->get_fifo_cal_average_level(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

168

dccg->funcs->set_fifo_errdet_ovr_en(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

172

dccg->funcs->otg_drop_pixel(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

175

dccg->funcs->set_fifo_errdet_ovr_en(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

194

if (!stream_enc->funcs->get_fifo_cal_average_level)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

196

fifo_level = stream_enc->funcs->get_fifo_cal_average_level(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

199

dccg->funcs->set_fifo_errdet_ovr_en(dccg, true);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

201

dccg->funcs->otg_add_pixel(dccg,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

203

dccg->funcs->set_fifo_errdet_ovr_en(dccg, false);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

339

dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

341

dmcu->funcs->set_psr_wait_loop(dmcu,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

544

clk_mgr->base.funcs = &dcn2_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c

187

clk_mgr->base.funcs = &dcn201_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

125

clk_mgr->dccg->funcs->update_dpp_dto(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

246

dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

248

dmcu->funcs->set_psr_wait_loop(dmcu,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

721

clk_mgr->base.funcs = &dcn21_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

74

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

75

link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c

155

if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c

157

dmcu->funcs->set_psr_wait_loop(dmcu,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

165

clk_mgr_base->funcs->get_memclk_states_from_smu(clk_mgr_base);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

323

if (update_dispclk && dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

325

dmcu->funcs->set_psr_wait_loop(dmcu,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

432

clk_mgr_base->ctx->dc->res_pool->funcs->update_bw_bounding_box(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

536

clk_mgr->base.funcs = &dcn3_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

692

clk_mgr->base.base.funcs = &vg_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

83

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

84

link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

105

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

106

link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

129

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

132

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

690

clk_mgr->base.base.funcs = &dcn31_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

139

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

140

link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

166

if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

167

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

171

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

807

clk_mgr->base.base.funcs = &dcn314_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

119

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

122

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

623

clk_mgr->base.base.funcs = &dcn315_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

81

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

82

link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

97

if (pipe->stream->link->link_enc && pipe->stream->link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

98

pipe->stream->link->link_enc->funcs->is_dig_enabled(pipe->stream->link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

121

if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

122

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

126

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

598

clk_mgr->base.base.funcs = &dcn316_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

93

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

94

link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

1080

clk_mgr_base->ctx->dc->res_pool->funcs->update_bw_bounding_box(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

1169

clk_mgr->base.funcs = &dcn32_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

260

clk_mgr_base->funcs->get_memclk_states_from_smu(clk_mgr_base);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

298

dccg->funcs->set_dtbclk_dto(clk_mgr->dccg, &dto_params);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

355

clk_mgr->dccg->funcs->update_dpp_dto(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

394

if (!stream_enc->funcs->get_fifo_cal_average_level)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

396

fifo_level = stream_enc->funcs->get_fifo_cal_average_level(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

399

dccg->funcs->set_fifo_errdet_ovr_en(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

403

dccg->funcs->otg_drop_pixel(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

406

dccg->funcs->set_fifo_errdet_ovr_en(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

448

if (!stream_enc->funcs->get_fifo_cal_average_level)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

450

fifo_level = stream_enc->funcs->get_fifo_cal_average_level(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

453

dccg->funcs->set_fifo_errdet_ovr_en(dccg, true);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

455

dccg->funcs->otg_add_pixel(dccg,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

457

dccg->funcs->set_fifo_errdet_ovr_en(dccg, false);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

854

if (update_dispclk && dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

856

dmcu->funcs->set_psr_wait_loop(dmcu,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

958

int ss_info_num = bp->funcs->get_ss_entry_number(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

963

enum bp_result result = bp->funcs->get_spread_spectrum_info(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1429

clk_mgr->base.base.funcs = &dcn35_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

177

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

178

link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

225

new_pipe_link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

226

new_pipe_link_enc->funcs->is_dig_enabled(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

229

new_pipe->stream_res.stream_enc->funcs->is_fifo_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

230

new_pipe->stream_res.stream_enc->funcs->is_fifo_enabled(new_pipe->stream_res.stream_enc);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

245

if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

246

pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

250

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

288

dccg->funcs->set_dtbclk_dto(clk_mgr->dccg, &dto_params);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

325

clk_mgr->dccg->funcs->update_dpp_dto(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

334

clk_mgr->dccg->funcs->update_dpp_dto(clk_mgr->dccg, old_dpp->inst, 0);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1231

if (update_dispclk && dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1298

int ss_info_num = bp->funcs->get_ss_entry_number(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1303

enum bp_result result = bp->funcs->get_spread_spectrum_info(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1448

clk_mgr_base->ctx->dc->res_pool->funcs->update_bw_bounding_box(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1584

clk_mgr->base.funcs = &dcn401_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

308

clk_mgr_base->funcs->get_memclk_states_from_smu(clk_mgr_base);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

541

ASSERT(otg_master->clock_source->funcs->program_pix_clk);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

550

otg_master->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

588

clk_mgr->dccg->funcs->update_dpp_dto(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

756

params->update_psr_wait_loop_params.dmcu->funcs->set_psr_wait_loop(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

1051

clk_mgr->base.base.funcs = &dcn42_funcs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

106

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

107

link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

198

clk_mgr->dccg->funcs->update_dpp_dto(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

207

clk_mgr->dccg->funcs->update_dpp_dto(clk_mgr->dccg, old_dpp->inst, 0);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

422

clk_mgr->base.base.funcs = &dcn42b_funcs;

drivers/gpu/drm/amd/display/dc/core/dc.c

1101

if (dc->res_pool->funcs->update_bw_bounding_box)

drivers/gpu/drm/amd/display/dc/core/dc.c

1102

dc->res_pool->funcs->update_bw_bounding_box(dc, dc->clk_mgr->bw_params);

drivers/gpu/drm/amd/display/dc/core/dc.c

1396

if (tg->funcs->enable_crtc) {

drivers/gpu/drm/amd/display/dc/core/dc.c

1397

if (dc->hwseq->funcs.blank_pixel_data)

drivers/gpu/drm/amd/display/dc/core/dc.c

1398

dc->hwseq->funcs.blank_pixel_data(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/core/dc.c

1399

tg->funcs->enable_crtc(tg);

drivers/gpu/drm/amd/display/dc/core/dc.c

1422

if (dc->res_pool->funcs->prepare_mcache_programming)

drivers/gpu/drm/amd/display/dc/core/dc.c

1423

dc->res_pool->funcs->prepare_mcache_programming(dc, dangling_context);

drivers/gpu/drm/amd/display/dc/core/dc.c

1436

if (tg->funcs->disable_phantom_crtc)

drivers/gpu/drm/amd/display/dc/core/dc.c

1437

tg->funcs->disable_phantom_crtc(tg);

drivers/gpu/drm/amd/display/dc/core/dc.c

1476

if (link != NULL && link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

1480

enc_inst = link->link_enc->funcs->get_dig_frontend(link->link_enc);

drivers/gpu/drm/amd/display/dc/core/dc.c

1484

tg_inst = dc->res_pool->stream_enc[j]->funcs->dig_source_otg(

drivers/gpu/drm/amd/display/dc/core/dc.c

1490

dc->res_pool->dp_clock_source->funcs->get_dp_dto_frequency_100hz(

drivers/gpu/drm/amd/display/dc/core/dc.c

1675

unsynced_pipes[j]->stream_res.tg->funcs->align_vblanks &&

drivers/gpu/drm/amd/display/dc/core/dc.c

1699

if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)

drivers/gpu/drm/amd/display/dc/core/dc.c

1701

pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);

drivers/gpu/drm/amd/display/dc/core/dc.c

1704

pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);

drivers/gpu/drm/amd/display/dc/core/dc.c

1746

if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)

drivers/gpu/drm/amd/display/dc/core/dc.c

1748

pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);

drivers/gpu/drm/amd/display/dc/core/dc.c

1751

pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);

drivers/gpu/drm/amd/display/dc/core/dc.c

1818

if (!link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

1823

enc_inst = link->link_enc->funcs->get_dig_frontend(link->link_enc);

drivers/gpu/drm/amd/display/dc/core/dc.c

1835

tg_inst = dc->res_pool->stream_enc[i]->funcs->dig_source_otg(

drivers/gpu/drm/amd/display/dc/core/dc.c

1859

if (!tg->funcs->get_hw_timing) {

drivers/gpu/drm/amd/display/dc/core/dc.c

1864

if (!tg->funcs->get_hw_timing(tg, &hw_crtc_timing)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

1938

if (!dsc || !dsc->funcs->dsc_read_state) {

drivers/gpu/drm/amd/display/dc/core/dc.c

1944

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/dc/core/dc.c

2007

dc->res_pool->dp_clock_source->funcs->get_dp_dto_frequency_100hz(

drivers/gpu/drm/amd/display/dc/core/dc.c

2011

if (tg->funcs->get_optc_source)

drivers/gpu/drm/amd/display/dc/core/dc.c

2012

tg->funcs->get_optc_source(tg,

drivers/gpu/drm/amd/display/dc/core/dc.c

2019

} else if (se && se->funcs->get_pixels_per_cycle) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2020

uint32_t pixels_per_cycle = se->funcs->get_pixels_per_cycle(se);

drivers/gpu/drm/amd/display/dc/core/dc.c

2037

if (!se || !se->funcs->dp_get_pixel_format) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2042

if (!se->funcs->dp_get_pixel_format(

drivers/gpu/drm/amd/display/dc/core/dc.c

211

connectors_num = bios->funcs->get_connectors_number(bios);

drivers/gpu/drm/amd/display/dc/core/dc.c

2181

!tg->funcs->is_tg_enabled(tg) ||

drivers/gpu/drm/amd/display/dc/core/dc.c

2229

if (!dcb->funcs->is_accelerated_mode(dcb)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2242

if (dc->hwseq->funcs.wait_for_pipe_update_if_needed) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2248

dc->hwseq->funcs.wait_for_pipe_update_if_needed(dc, pipe, false);

drivers/gpu/drm/amd/display/dc/core/dc.c

2319

if (dc->res_pool->funcs->prepare_mcache_programming)

drivers/gpu/drm/amd/display/dc/core/dc.c

2320

dc->res_pool->funcs->prepare_mcache_programming(dc, context);

drivers/gpu/drm/amd/display/dc/core/dc.c

2325

if (dc->hwseq->funcs.set_wait_for_update_needed_for_pipe) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2328

dc->hwseq->funcs.set_wait_for_update_needed_for_pipe(dc, pipe);

drivers/gpu/drm/amd/display/dc/core/dc.c

240

struct graphics_object_id connector_id = bios->funcs->get_connector_id(bios, (uint8_t)i);

drivers/gpu/drm/amd/display/dc/core/dc.c

2521

if (res == DC_OK && dc->res_pool->funcs->link_encs_assign && !dc->config.unify_link_enc_assignment)

drivers/gpu/drm/amd/display/dc/core/dc.c

2522

dc->res_pool->funcs->link_encs_assign(

drivers/gpu/drm/amd/display/dc/core/dc.c

2600

if (acquire && pool->funcs->acquire_post_bldn_3dlut)

drivers/gpu/drm/amd/display/dc/core/dc.c

2601

ret = pool->funcs->acquire_post_bldn_3dlut(res_ctx, pool, mpcc_id, lut, shaper);

drivers/gpu/drm/amd/display/dc/core/dc.c

2602

else if (!acquire && pool->funcs->release_post_bldn_3dlut)

drivers/gpu/drm/amd/display/dc/core/dc.c

2603

ret = pool->funcs->release_post_bldn_3dlut(res_ctx, pool, lut, shaper);

drivers/gpu/drm/amd/display/dc/core/dc.c

2644

if (dc->res_pool->dpps[i]->funcs->dpp_deferred_update)

drivers/gpu/drm/amd/display/dc/core/dc.c

2645

dc->res_pool->dpps[i]->funcs->dpp_deferred_update(dc->res_pool->dpps[i]);

drivers/gpu/drm/amd/display/dc/core/dc.c

2694

if (dc->res_pool && dc->res_pool->funcs && dc->res_pool->funcs->get_default_tiling_info) {

drivers/gpu/drm/amd/display/dc/core/dc.c

2695

dc->res_pool->funcs->get_default_tiling_info(tiling_info);

drivers/gpu/drm/amd/display/dc/core/dc.c

3487

if (dc->res_pool->funcs->validate_bandwidth(dc, dsc_validate_context,

drivers/gpu/drm/amd/display/dc/core/dc.c

362

if (!link_enc && dc->res_pool->funcs->link_enc_create_minimal) {

drivers/gpu/drm/amd/display/dc/core/dc.c

363

link_enc = dc->res_pool->funcs->link_enc_create_minimal(dc->ctx,

drivers/gpu/drm/amd/display/dc/core/dc.c

3798

if (dc->res_pool->funcs->validate_bandwidth(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING) != DC_OK) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4005

if (dccg && dccg->funcs->set_dto_dscclk &&

drivers/gpu/drm/amd/display/dc/core/dc.c

4048

if (dsc->funcs->dsc_get_packed_pps) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4049

dsc->funcs->dsc_get_packed_pps(dsc, &dsc_pps_cfg, dsc_packed_pps);

drivers/gpu/drm/amd/display/dc/core/dc.c

405

link_enc->funcs->destroy(&link_enc);

drivers/gpu/drm/amd/display/dc/core/dc.c

4225

if (pipe_ctx->stream_res.tg->funcs->is_blanked)

drivers/gpu/drm/amd/display/dc/core/dc.c

4226

if (pipe_ctx->stream_res.tg->funcs->is_blanked(pipe_ctx->stream_res.tg))

drivers/gpu/drm/amd/display/dc/core/dc.c

4307

pipe_ctx->stream_res.opp->funcs->opp_program_fmt(pipe_ctx->stream_res.opp,

drivers/gpu/drm/amd/display/dc/core/dc.c

4311

odm_pipe->stream_res.opp->funcs->opp_program_fmt(odm_pipe->stream_res.opp,

drivers/gpu/drm/amd/display/dc/core/dc.c

4373

audio->funcs->az_disable(audio);

drivers/gpu/drm/amd/display/dc/core/dc.c

4397

if (pipe_ctx->stream_res.tg->funcs->is_blanked)

drivers/gpu/drm/amd/display/dc/core/dc.c

4398

if (pipe_ctx->stream_res.tg->funcs->is_blanked(pipe_ctx->stream_res.tg))

drivers/gpu/drm/amd/display/dc/core/dc.c

4405

pipe_ctx->stream_res.abm->funcs->set_abm_level(

drivers/gpu/drm/amd/display/dc/core/dc.c

477

if (pipe->stream_res.tg->funcs->get_last_used_drr_vtotal) {

drivers/gpu/drm/amd/display/dc/core/dc.c

478

pipe->stream_res.tg->funcs->get_last_used_drr_vtotal(pipe->stream_res.tg, refresh_rate);

drivers/gpu/drm/amd/display/dc/core/dc.c

4781

if (update_type != UPDATE_TYPE_FAST && dc->res_pool->funcs->prepare_mcache_programming)

drivers/gpu/drm/amd/display/dc/core/dc.c

4782

dc->res_pool->funcs->prepare_mcache_programming(dc, context);

drivers/gpu/drm/amd/display/dc/core/dc.c

4845

top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4858

top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable(

drivers/gpu/drm/amd/display/dc/core/dc.c

4866

if (dc->hwseq->funcs.wait_for_pipe_update_if_needed)

drivers/gpu/drm/amd/display/dc/core/dc.c

4867

dc->hwseq->funcs.wait_for_pipe_update_if_needed(dc, top_pipe_to_program, update_type < UPDATE_TYPE_FULL);

drivers/gpu/drm/amd/display/dc/core/dc.c

5019

if (dc->hwseq->funcs.set_wait_for_update_needed_for_pipe && update_type == UPDATE_TYPE_FULL) {

drivers/gpu/drm/amd/display/dc/core/dc.c

5023

dc->hwseq->funcs.set_wait_for_update_needed_for_pipe(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/core/dc.c

5033

cur_pipe->plane_res.hubp->funcs->validate_dml_output(

drivers/gpu/drm/amd/display/dc/core/dc.c

5104

top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable) {

drivers/gpu/drm/amd/display/dc/core/dc.c

5105

top_pipe_to_program->stream_res.tg->funcs->wait_for_state(

drivers/gpu/drm/amd/display/dc/core/dc.c

5108

top_pipe_to_program->stream_res.tg->funcs->wait_for_state(

drivers/gpu/drm/amd/display/dc/core/dc.c

5111

top_pipe_to_program->stream_res.tg->funcs->wait_for_state(

drivers/gpu/drm/amd/display/dc/core/dc.c

5127

top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_disable(

drivers/gpu/drm/amd/display/dc/core/dc.c

5187

if (pipe_ctx->stream_res.tg->funcs->program_manual_trigger)

drivers/gpu/drm/amd/display/dc/core/dc.c

5188

pipe_ctx->stream_res.tg->funcs->program_manual_trigger(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/core/dc.c

520

dmcu->funcs->stop_crc_win_update(dmcu, mux_mapping);

drivers/gpu/drm/amd/display/dc/core/dc.c

522

dmcu->funcs->forward_crc_window(dmcu, rect, mux_mapping);

drivers/gpu/drm/amd/display/dc/core/dc.c

5327

if (dc->res_pool->funcs->validate_bandwidth(dc, minimal_transition_context,

drivers/gpu/drm/amd/display/dc/core/dc.c

556

else if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))

drivers/gpu/drm/amd/display/dc/core/dc.c

6203

if (hubp && hubp->funcs->hubp_is_flip_pending &&

drivers/gpu/drm/amd/display/dc/core/dc.c

6204

hubp->funcs->hubp_is_flip_pending(hubp)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

6253

if (dc->clk_mgr->funcs->set_low_power_state)

drivers/gpu/drm/amd/display/dc/core/dc.c

6254

dc->clk_mgr->funcs->set_low_power_state(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/core/dc.c

6280

return dmcu->funcs->is_dmcu_initialized(dmcu);

drivers/gpu/drm/amd/display/dc/core/dc.c

6388

if (dc->clk_mgr != NULL && dc->clk_mgr->funcs->is_smu_present)

drivers/gpu/drm/amd/display/dc/core/dc.c

6389

if (!dc->clk_mgr->funcs->is_smu_present(dc->clk_mgr))

drivers/gpu/drm/amd/display/dc/core/dc.c

6402

if (dc->clk_mgr != NULL && dc->clk_mgr->funcs->get_hard_min_fclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6403

idle_fclk_khz = dc->clk_mgr->funcs->get_hard_min_fclk(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/core/dc.c

6405

if (dc->clk_mgr != NULL && dc->clk_mgr->funcs->get_hard_min_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6406

idle_dramclk_khz = dc->clk_mgr->funcs->get_hard_min_memclk(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/core/dc.c

6444

if (dc->clk_mgr->funcs->set_hard_min_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6445

dc->clk_mgr->funcs->set_hard_min_memclk(dc->clk_mgr, false);

drivers/gpu/drm/amd/display/dc/core/dc.c

6447

if (dc->clk_mgr->funcs->set_hard_max_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6448

dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/core/dc.c

6454

if (dc->clk_mgr->funcs->get_memclk_states_from_smu)

drivers/gpu/drm/amd/display/dc/core/dc.c

6455

dc->clk_mgr->funcs->get_memclk_states_from_smu(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/core/dc.c

6457

if (dc->clk_mgr->funcs->set_hard_min_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6458

dc->clk_mgr->funcs->set_hard_min_memclk(dc->clk_mgr, true);

drivers/gpu/drm/amd/display/dc/core/dc.c

6460

if (dc->clk_mgr->funcs->set_hard_max_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6461

dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/core/dc.c

6479

pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/core/dc.c

6480

pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/core/dc.c

6481

pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/core/dc.c

6484

hubp->funcs->set_blank_regs(hubp, true);

drivers/gpu/drm/amd/display/dc/core/dc.c

6487

if (dc->clk_mgr->funcs->set_max_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6488

dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, memclk_mhz);

drivers/gpu/drm/amd/display/dc/core/dc.c

6489

if (dc->clk_mgr->funcs->set_min_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6490

dc->clk_mgr->funcs->set_min_memclk(dc->clk_mgr, memclk_mhz);

drivers/gpu/drm/amd/display/dc/core/dc.c

6499

hubp->funcs->set_blank_regs(hubp, false);

drivers/gpu/drm/amd/display/dc/core/dc.c

6539

if (funcMin <= softMax && dc->clk_mgr->funcs->set_max_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6540

dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, softMax);

drivers/gpu/drm/amd/display/dc/core/dc.c

6549

if (funcMin <= softMax && dc->clk_mgr->funcs->set_max_memclk)

drivers/gpu/drm/amd/display/dc/core/dc.c

6550

dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, maxDPM);

drivers/gpu/drm/amd/display/dc/core/dc.c

697

if (tg->funcs->configure_crc)

drivers/gpu/drm/amd/display/dc/core/dc.c

698

return tg->funcs->configure_crc(tg, &param);

drivers/gpu/drm/amd/display/dc/core/dc.c

7056

if (pipe->stream_res.abm && pipe->stream_res.abm->funcs->set_abm_pause)

drivers/gpu/drm/amd/display/dc/core/dc.c

7057

pipe->stream_res.abm->funcs->set_abm_pause(pipe->stream_res.abm, !enable, i, pipe->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/core/dc.c

7105

pipe->stream_res.abm->funcs->save_restore)

drivers/gpu/drm/amd/display/dc/core/dc.c

7106

return pipe->stream_res.abm->funcs->save_restore(

drivers/gpu/drm/amd/display/dc/core/dc.c

7119

if (dc->debug.allow_sw_cursor_fallback && dc->res_pool->funcs->get_max_hw_cursor_size) {

drivers/gpu/drm/amd/display/dc/core/dc.c

7121

stream_cursor_size = dc->res_pool->funcs->get_max_hw_cursor_size(dc,

drivers/gpu/drm/amd/display/dc/core/dc.c

7177

if (dc->res_pool->funcs->get_power_profile)

drivers/gpu/drm/amd/display/dc/core/dc.c

7178

profile.power_level = dc->res_pool->funcs->get_power_profile(context);

drivers/gpu/drm/amd/display/dc/core/dc.c

7195

if (dc->res_pool->funcs->get_det_buffer_size)

drivers/gpu/drm/amd/display/dc/core/dc.c

7196

return dc->res_pool->funcs->get_det_buffer_size(context);

drivers/gpu/drm/amd/display/dc/core/dc.c

738

if (tg->funcs->get_crc)

drivers/gpu/drm/amd/display/dc/core/dc.c

739

return tg->funcs->get_crc(tg, idx, r_cr, g_y, b_cb);

drivers/gpu/drm/amd/display/dc/core/dc.c

758

pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(

drivers/gpu/drm/amd/display/dc/core/dc.c

7884

if (dc->clk_mgr && dc->clk_mgr->funcs->get_requested_memory_qos) {

drivers/gpu/drm/amd/display/dc/core/dc.c

7885

dc->clk_mgr->funcs->get_requested_memory_qos(dc->clk_mgr, &requested);

drivers/gpu/drm/amd/display/dc/core/dc.c

7900

if (!dc->clk_mgr || !dc->clk_mgr->funcs)

drivers/gpu/drm/amd/display/dc/core/dc.c

7903

return dc->clk_mgr->funcs->override_memory_bandwidth_request(

drivers/gpu/drm/amd/display/dc/core/dc.c

797

pipes->plane_res.xfm->funcs->transform_set_pixel_storage_depth) {

drivers/gpu/drm/amd/display/dc/core/dc.c

798

pipes->plane_res.xfm->funcs->transform_set_pixel_storage_depth(

drivers/gpu/drm/amd/display/dc/core/dc.c

804

pipes->stream_res.opp->funcs->

drivers/gpu/drm/amd/display/dc/core/dc.c

881

if (dc->res_pool && dc->res_pool->funcs->link_encs_assign &&

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1060

if (hws->funcs.set_input_transfer_func && current_mpc_pipe->plane_state->update_flags.bits.gamma_change) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1097

current_mpc_pipe->plane_res.dpp->funcs->set_cursor_matrix &&

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1106

if (hws->funcs.set_output_transfer_func && current_mpc_pipe->stream->update_flags.bits.out_tf) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1219

params->set_flip_control_gsl_params.hubp->funcs->hubp_set_flip_control_surface_gsl(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1233

hws->funcs.set_input_transfer_func(params->set_input_transfer_func_params.dc,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1265

hws->funcs.set_output_transfer_func(params->set_output_transfer_func_params.dc,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1312

params->hubp_wait_pipe_read_start_params.hubp->funcs->hubp_wait_pipe_read_start(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2318

if (pipe_ctx->stream_res.tg->funcs->program_manual_trigger)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2319

pipe_ctx->stream_res.tg->funcs->program_manual_trigger(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2331

if (dpp && dpp->funcs->dpp_setup) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2333

dpp->funcs->dpp_setup(dpp,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2350

if (dpp->funcs->dpp_program_bias_and_scale)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2351

dpp->funcs->dpp_program_bias_and_scale(dpp, &bns_params);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2360

if (mpc->funcs->power_on_mpc_mem_pwr)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2361

mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, power_on);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2371

if (mpc->funcs->set_output_csc != NULL)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2372

mpc->funcs->set_output_csc(mpc,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2385

if (mpc->funcs->set_ocsc_default != NULL)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2386

mpc->funcs->set_ocsc_default(mpc,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2412

hubp->funcs->hubp_program_surface_config(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2430

hubp->funcs->hubp_program_mcache_id_and_split_coordinate(hubp, mcache_regs);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2438

if (dpp && dpp->funcs->dpp_cm_hist_control)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2439

dpp->funcs->dpp_cm_hist_control(dpp,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2479

if (!hws->funcs.wait_for_blank_complete)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2489

hws->funcs.wait_for_blank_complete(opp_head->stream_res.opp);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2505

if (tg->funcs->wait_odm_doublebuffer_pending_clear)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2506

tg->funcs->wait_odm_doublebuffer_pending_clear(tg);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2507

if (tg->funcs->wait_otg_disable)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2508

tg->funcs->wait_otg_disable(tg);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2577

dc->res_pool->mpc->funcs->wait_for_idle(dc->res_pool->mpc, mpcc_inst);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2604

if (tg && tg->funcs->set_odm_combine)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2605

tg->funcs->set_odm_combine(tg, opp_inst, opp_head_count,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2614

if (tg && tg->funcs->set_odm_bypass)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2615

tg->funcs->set_odm_bypass(tg, timing);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2623

if (opp && opp->funcs->opp_pipe_clock_control)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2624

opp->funcs->opp_pipe_clock_control(opp, enable);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2633

if (opp && opp->funcs->opp_program_left_edge_extra_pixel)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2634

opp->funcs->opp_program_left_edge_extra_pixel(opp, pixel_encoding, is_otg_master);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2643

if (dccg && dccg->funcs->set_dto_dscclk)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2644

dccg->funcs->set_dto_dscclk(dccg, inst, num_slices_h);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2653

if (dsc && dsc->funcs->dsc_set_config)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2654

dsc->funcs->dsc_set_config(dsc, dsc_cfg, dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2662

if (dsc && dsc->funcs->dsc_enable)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2663

dsc->funcs->dsc_enable(dsc, opp_inst);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2684

if (tg && tg->funcs->set_dsc_config)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2685

tg->funcs->set_dsc_config(tg, optc_dsc_mode, bytes_per_pixel, slice_width);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2692

if (dsc && dsc->funcs->dsc_disconnect)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2693

dsc->funcs->dsc_disconnect(dsc);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2701

if (dsc && dsc->funcs->dsc_read_state)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2702

dsc->funcs->dsc_read_state(dsc, dsc_state);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2735

if (dsc->funcs->dsc_set_config)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2736

dsc->funcs->dsc_set_config(dsc, &dsc_cfg,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2745

if (dsc && dsc->funcs->dsc_enable)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2746

dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2758

if (tg->funcs->program_global_sync) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2759

tg->funcs->program_global_sync(tg, vready_offset, vstartup_lines,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2769

if (tg->funcs->wait_for_state)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2770

tg->funcs->wait_for_state(tg, state);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2779

if (tg->funcs->set_vtg_params)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2780

tg->funcs->set_vtg_params(tg, timing, program_fp2);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2787

if (hubp->funcs->hubp_enable_3dlut_fl)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2788

hubp->funcs->hubp_enable_3dlut_fl(hubp, true);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2813

if (tg->funcs->setup_vertical_interrupt0)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2814

tg->funcs->setup_vertical_interrupt0(tg, start_line, end_line);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2822

if (tg->funcs->setup_vertical_interrupt2)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2823

tg->funcs->setup_vertical_interrupt2(tg, start_line);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2831

if (dpp->funcs->dpp_set_hdr_multiplier)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2832

dpp->funcs->dpp_set_hdr_multiplier(dpp, hw_mult);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2841

if (hubbub->funcs->program_det_size)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2842

hubbub->funcs->program_det_size(hubbub, hubp_inst, det_buffer_size_kb);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2851

if (hubbub->funcs->program_det_segments)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2852

hubbub->funcs->program_det_segments(hubbub, hubp_inst, det_size);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2862

if (opp->funcs->opp_set_dyn_expansion)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2863

opp->funcs->opp_set_dyn_expansion(opp, color_space, color_depth, signal);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2872

if (opp->funcs->opp_program_fmt)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2873

opp->funcs->opp_program_fmt(opp, fmt_bit_depth, clamping);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2888

if (opp->funcs->opp_program_bit_depth_reduction)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2889

opp->funcs->opp_program_bit_depth_reduction(opp, &bit_depth_params);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2904

if (opp && opp->funcs->opp_set_disp_pattern_generator) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2905

opp->funcs->opp_set_disp_pattern_generator(opp, test_pattern, color_space,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2923

if (abm->funcs->set_abm_level)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2924

abm->funcs->set_abm_level(abm, abm_level);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2942

mpc->funcs->remove_mpcc(mpc, mpc_tree_params, mpcc_to_remove);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2966

if (hubp->funcs->hubp_disconnect)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2967

hubp->funcs->hubp_disconnect(hubp);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2976

if (hubbub->funcs->force_pstate_change_control) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2977

hubbub->funcs->force_pstate_change_control(hubbub, enable, wait);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2988

if (tg->funcs->enable_crtc)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2989

tg->funcs->enable_crtc(tg);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2997

if (tg->funcs->set_gsl)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2998

tg->funcs->set_gsl(tg, gsl);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3007

if (tg->funcs->set_gsl_source_select)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3008

tg->funcs->set_gsl_source_select(tg, group_idx, gsl_ready_signal);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3019

&& hubp->funcs->hubp_is_flip_pending(hubp); j++)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

302

if (!tg->funcs->is_blanked)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3030

if (tg->funcs->get_optc_double_buffer_pending) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3032

&& tg->funcs->get_optc_double_buffer_pending(tg); j++)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3043

if (hwseq->funcs.update_force_pstate)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3044

hwseq->funcs.update_force_pstate(dc, context);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

305

if (tg->funcs->is_blanked(tg))

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3051

hubbub->funcs->apply_DEDCN21_147_wa(hubbub);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3059

hubbub->funcs->allow_self_refresh_control(hubbub, allow);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3070

*frame_count = tg->funcs->get_frame_count(tg);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3079

if (mpc->funcs->set_dwb_mux)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3080

mpc->funcs->set_dwb_mux(mpc, dwb_id, mpcc_id);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3088

if (mpc->funcs->disable_dwb_mux)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3089

mpc->funcs->disable_dwb_mux(mpc, dwb_id);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3098

if (mcif_wb->funcs->config_mcif_buf)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3099

mcif_wb->funcs->config_mcif_buf(mcif_wb, mcif_buf_params, dest_height);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3107

if (mcif_wb->funcs->config_mcif_arb)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3108

mcif_wb->funcs->config_mcif_arb(mcif_wb, mcif_arb_params);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3115

if (mcif_wb->funcs->enable_mcif)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3116

mcif_wb->funcs->enable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3123

if (mcif_wb->funcs->disable_mcif)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3124

mcif_wb->funcs->disable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3132

if (dwb->funcs->enable)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3133

dwb->funcs->enable(dwb, dwb_params);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3140

if (dwb->funcs->disable)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3141

dwb->funcs->disable(dwb);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3149

if (dwb->funcs->update)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3150

dwb->funcs->update(dwb, dwb_params);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3159

if (hubp && hubp->funcs->hubp_update_mall_sel)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3160

hubp->funcs->hubp_update_mall_sel(hubp, mall_sel, cache_cursor);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3168

if (hubp && hubp->funcs->hubp_prepare_subvp_buffering)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3169

hubp->funcs->hubp_prepare_subvp_buffering(hubp, enable);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3177

if (hubp && hubp->funcs->set_hubp_blank_en)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3178

hubp->funcs->set_hubp_blank_en(hubp, enable);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3186

if (hubp && hubp->funcs->hubp_disable_control)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3187

hubp->funcs->hubp_disable_control(hubp, disable);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3204

if (hubp && hubp->funcs->hubp_clk_cntl) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3205

hubp->funcs->hubp_clk_cntl(hubp, enable);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3214

if (hubp && hubp->funcs->hubp_init)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3215

hubp->funcs->hubp_init(hubp);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3227

if (hubp && hubp->funcs->hubp_set_vm_system_aperture_settings)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3228

hubp->funcs->hubp_set_vm_system_aperture_settings(hubp, &apt);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3235

if (hubp && hubp->funcs->hubp_set_flip_int)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3236

hubp->funcs->hubp_set_flip_int(hubp);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3245

if (dpp && dpp->funcs->dpp_dppclk_control)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3246

dpp->funcs->dpp_dppclk_control(dpp, dppclk_div, enable);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3253

if (tg && tg->funcs->disable_phantom_crtc)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3254

tg->funcs->disable_phantom_crtc(tg);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3262

if (hws && hws->funcs.dsc_pg_status)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3263

params->dsc_pg_status_params.is_ungated = hws->funcs.dsc_pg_status(hws, dsc_inst);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3275

if (dsc && dsc->funcs->dsc_wait_disconnect_pending_clear)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3276

dsc->funcs->dsc_wait_disconnect_pending_clear(dsc);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3288

if (dsc && dsc->funcs->dsc_disable)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3289

dsc->funcs->dsc_disable(dsc);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3302

if (dccg && dccg->funcs->set_ref_dscclk)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3303

dccg->funcs->set_ref_dscclk(dccg, dsc_inst);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3312

if (hws->funcs.dpp_pg_control)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3313

hws->funcs.dpp_pg_control(hws, dpp_inst, power_on);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3322

if (hws->funcs.hubp_pg_control)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3323

hws->funcs.hubp_pg_control(hws, hubp_inst, power_on);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3330

if (hubp && hubp->funcs->hubp_reset)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3331

hubp->funcs->hubp_reset(hubp);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3338

if (dpp && dpp->funcs->dpp_reset)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3339

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3348

if (hws->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3349

hws->funcs.dpp_root_clock_control(hws, dpp_inst, clock_on);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3358

if (hws->funcs.dc_ip_request_cntl)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3359

hws->funcs.dc_ip_request_cntl(dc, enable);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3368

if (dccg && dccg->funcs->update_dpp_dto)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3369

dccg->funcs->update_dpp_dto(dccg, dpp_inst, dppclk_khz);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3377

if (hubp && hubp->funcs->hubp_vtg_sel)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3378

hubp->funcs->hubp_vtg_sel(hubp, otg_inst);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3388

if (hubp && hubp->funcs->hubp_setup2)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3389

hubp->funcs->hubp_setup2(hubp, hubp_regs, global_sync, timing);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3400

if (hubp && hubp->funcs->hubp_setup)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3401

hubp->funcs->hubp_setup(hubp, dlg_regs, ttu_regs, rq_regs, pipe_dest);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3409

if (hubp && hubp->funcs->set_unbounded_requesting)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3410

hubp->funcs->set_unbounded_requesting(hubp, unbounded_req);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3418

if (hubp && hubp->funcs->hubp_setup_interdependent2)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3419

hubp->funcs->hubp_setup_interdependent2(hubp, hubp_regs);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3428

if (hubp && hubp->funcs->hubp_setup_interdependent)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3429

hubp->funcs->hubp_setup_interdependent(hubp, dlg_regs, ttu_regs);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3438

if (dpp && dpp->funcs->set_cursor_matrix)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3439

dpp->funcs->set_cursor_matrix(dpp, color_space, *cursor_csc_color_matrix);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3448

if (hws->funcs.update_mpcc)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3449

hws->funcs.update_mpcc(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3458

if (mpc && mpc->funcs->update_blending)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3459

mpc->funcs->update_blending(mpc, blnd_cfg, mpcc_id);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3467

if (mpc && mpc->funcs->wait_for_idle)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3468

mpc->funcs->wait_for_idle(mpc, mpcc_id);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3481

if (mpc && mpc->funcs->insert_plane)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3482

mpc->funcs->insert_plane(mpc, tree, blnd_cfg, sm_cfg, insert_above_mpcc,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3491

if (dpp && dpp->funcs->dpp_set_scaler)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3492

dpp->funcs->dpp_set_scaler(dpp, scl_data);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3501

if (hubp && hubp->funcs->mem_program_viewport)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3502

hubp->funcs->mem_program_viewport(hubp, viewport, viewport_c);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3573

if (hubp && hubp->funcs->set_cursor_attributes)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3574

hubp->funcs->set_cursor_attributes(hubp, attributes);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3582

if (dpp && dpp->funcs->set_cursor_attributes)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3583

dpp->funcs->set_cursor_attributes(dpp, attributes);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3629

if (hubp && hubp->funcs->set_blank)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3630

hubp->funcs->set_blank(hubp, blank);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3637

if (hubp && hubp->funcs->phantom_hubp_post_enable)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3638

hubp->funcs->phantom_hubp_post_enable(hubp);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3644

params->stream_enc_update_hdmi_info_packets_params.pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3645

params->stream_enc_update_hdmi_info_packets_params.pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3653

params->hpo_frl_stream_enc_update_hdmi_info_packets_params.pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->update_hdmi_info_packets)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3654

params->hpo_frl_stream_enc_update_hdmi_info_packets_params.pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->update_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3662

params->hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num_params.pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets_sdp_line_num)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3663

params->hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num_params.pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets_sdp_line_num(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3671

params->hpo_dp_stream_enc_update_dp_info_packets_params.pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3672

params->hpo_dp_stream_enc_update_dp_info_packets_params.pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3680

params->stream_enc_update_dp_info_packets_sdp_line_num_params.pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3681

params->stream_enc_update_dp_info_packets_sdp_line_num_params.pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3689

params->stream_enc_update_dp_info_packets_params.pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3690

params->stream_enc_update_dp_info_packets_params.pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3698

params->stream_enc_dp_set_dsc_config_params.stream_enc->funcs->dp_set_dsc_config) {

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3711

params->stream_enc_dp_set_dsc_config_params.stream_enc->funcs->dp_set_dsc_config(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3720

params->hpo_dp_stream_enc_dp_set_dsc_pps_info_packet_params.hpo_dp_stream_enc->funcs->dp_set_dsc_pps_info_packet)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3721

params->hpo_dp_stream_enc_dp_set_dsc_pps_info_packet_params.hpo_dp_stream_enc->funcs->dp_set_dsc_pps_info_packet(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3731

params->stream_enc_dp_set_dsc_pps_info_packet_params.stream_enc->funcs->dp_set_dsc_pps_info_packet)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3732

params->stream_enc_dp_set_dsc_pps_info_packet_params.stream_enc->funcs->dp_set_dsc_pps_info_packet(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3742

params->hpo_frl_stream_enc_set_dsc_config_params.hpo_frl_stream_enc->funcs->hdmi_frl_set_dsc_config)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3743

params->hpo_frl_stream_enc_set_dsc_config_params.hpo_frl_stream_enc->funcs->hdmi_frl_set_dsc_config(

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3753

if (!hubp || !hubp->funcs->dmdata_set_attributes)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3756

hubp->funcs->dmdata_set_attributes(hubp,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3848

if (dsc && dsc->funcs && dsc->funcs->dsc_set_config)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3849

dsc->funcs->dsc_set_config(dsc, dsc_cfg, dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

703

pipe_ctx->stream_res.tg->funcs->set_drr)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

704

pipe_ctx->stream_res.tg->funcs->set_drr(

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

304

dc->res_pool->funcs->link_enc_unassign(state, dc->current_state->streams[i]);

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

562

link->dc->res_pool->funcs->link_encs_assign) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1614

res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1618

res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1626

res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1630

res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1639

res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1645

res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2235

otg_master->stream_res.tg->funcs->is_two_pixels_per_container(timing) ||

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2281

if (opp && opp->funcs->opp_get_left_edge_extra_pixel_count)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2283

opp->funcs->opp_get_left_edge_extra_pixel_count(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2604

if (pool->funcs->build_pipe_pix_clk_params)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2605

pool->funcs->build_pipe_pix_clk_params(otg_master);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3136

return dc->res_pool->funcs->add_stream_to_ctx(dc, new_ctx, stream);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3190

if (pool->funcs->remove_stream_from_ctx)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3191

pool->funcs->remove_stream_from_ctx(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3283

if (!pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3295

sec_pipe = pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3424

if (!pool->funcs->acquire_free_pipe_as_secondary_opp_head) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3428

new_opp_head = pool->funcs->acquire_free_pipe_as_secondary_opp_head(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3443

new_bottom_dpp_pipe = pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3501

if (!pool->funcs->release_pipe) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3512

pool->funcs->release_pipe(context, tail_pipe->bottom_pipe, pool);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3516

pool->funcs->release_pipe(context, last_opp_head, pool);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3563

if (!pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3567

new_dpp_pipe = pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3623

if (!pool->funcs->release_pipe) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3635

pool->funcs->release_pipe(context, last_dpp_pipe, pool);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3948

if (!link->link_enc->funcs->is_dig_enabled(link->link_enc))

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3951

inst = link->link_enc->funcs->get_dig_frontend(link->link_enc);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3958

tg_inst = pool->stream_enc[i]->funcs->dig_source_otg(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3977

if (pipe_ctx->stream_res.tg->funcs->get_optc_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3978

pipe_ctx->stream_res.tg->funcs->get_optc_source(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4004

if (pool->mpc->funcs->read_mpcc_state) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4007

pool->mpc->funcs->read_mpcc_state(pool->mpc, pipe_ctx->plane_res.mpcc_inst, &s);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4059

if (dcb->funcs->is_accelerated_mode(dcb))

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

416

dc->res_pool->funcs->destroy(&dc->res_pool);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4203

dc->res_pool->funcs->find_first_free_match_stream_enc_for_link(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4711

if (dc->res_pool->funcs->validate_global) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4712

result = dc->res_pool->funcs->validate_global(dc, new_ctx);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4730

if (dc->res_pool->funcs->patch_unknown_plane_state &&

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4733

result = dc->res_pool->funcs->patch_unknown_plane_state(pipe_ctx->plane_state);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4762

result = dc->res_pool->funcs->validate_bandwidth(dc, new_ctx, validate_mode);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

481

if (!aud->funcs->endpoint_valid(aud)) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

482

aud->funcs->destroy(&aud);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5193

if (pipe_ctx->stream->ctx->dc->res_pool->funcs->get_vstartup_for_pipe)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5194

vstartup_start = pipe_ctx->stream->ctx->dc->res_pool->funcs->get_vstartup_for_pipe(pipe_ctx);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5319

} else if (pipe_ctx_old->stream->ctx->dc->res_pool->funcs->link_encs_assign) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5479

if (!tg->funcs->validate_timing(tg, &stream->timing))

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5484

!link->link_enc->funcs->validate_output_with_stream(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5509

if (dc->res_pool->funcs->validate_plane)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5510

return dc->res_pool->funcs->validate_plane(plane_state, &dc->caps);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5943

if (context->clk_mgr->ctx->dc->res_pool->funcs->program_mcache_pipe_config)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5944

context->clk_mgr->ctx->dc->res_pool->funcs->program_mcache_pipe_config(context, mcache_params);

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

267

if (new_stream->ctx->dc->res_pool->funcs->link_encs_assign &&

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

386

if (dc->debug.allow_sw_cursor_fallback && dc->res_pool->funcs->get_max_hw_cursor_size) {

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

387

max_cursor_size = dc->res_pool->funcs->get_max_hw_cursor_size(dc, state, stream);

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

578

pipe_ctx->stream_res.tg->funcs->program_manual_trigger) {

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

579

pipe_ctx->stream_res.tg->funcs->program_manual_trigger(

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

654

if (dwb->funcs->is_enabled(dwb)) {

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

689

if (dwb->funcs->set_fc_enable)

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

690

dwb->funcs->set_fc_enable(dwb, DWB_FRAME_CAPTURE_DISABLE);

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

752

if (dwb->funcs->is_enabled(dwb))

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

774

return tg->funcs->get_frame_count(tg);

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

842

tg->funcs->get_scanoutpos(tg,

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

912

if (hubp->funcs->dmdata_set_attributes != NULL &&

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

914

hubp->funcs->dmdata_set_attributes(hubp, attr);

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

924

if (dc->res_pool->funcs->add_dsc_to_stream_resource) {

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

925

return dc->res_pool->funcs->add_dsc_to_stream_resource(dc, state, stream);

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

164

if (dpp && dpp->funcs->dpp_cm_hist_read)

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

165

dpp->funcs->dpp_cm_hist_read(dpp, &pipe_ctx->plane_state->status.cm_hist);

drivers/gpu/drm/amd/display/dc/dc_bios_types.h

188

const struct dc_vbios_funcs *funcs;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1477

if (dc->clk_mgr->funcs->exit_low_power_state) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1527

dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1544

dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/dc_dsc.h

43

const struct dsc_funcs *funcs;

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

38

dmcu->funcs->is_dmcu_initialized(dmcu) &&

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

39

dmcu->funcs->send_edid_cea) {

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

40

return dmcu->funcs->send_edid_cea(dmcu,

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

55

dmcu->funcs->is_dmcu_initialized(dmcu) &&

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

56

dmcu->funcs->recv_edid_cea_ack) {

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

57

return dmcu->funcs->recv_edid_cea_ack(dmcu, offset);

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

71

dmcu->funcs->is_dmcu_initialized(dmcu) &&

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

72

dmcu->funcs->recv_amd_vsdb) {

drivers/gpu/drm/amd/display/dc/dc_edid_parser.c

73

return dmcu->funcs->recv_amd_vsdb(dmcu,

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

143

spl_in->basic_out.use_two_pixels_per_container = pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c

213

base->funcs = &dccg2_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.c

83

base->funcs = &dccg201_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c

159

base->funcs = &dccg21_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

115

base->funcs = &dccg3_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

140

base->funcs = &dccg3_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.c

74

base->funcs = &dccg301_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

966

base->funcs = &dccg31_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

430

base->funcs = &dccg314_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

442

base->funcs = &dccg32_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2801

base->funcs = &dccg35_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

1000

base->funcs = &dccg401_funcs;

drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c

362

base->funcs = &dccg42_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

273

base->funcs = &dce_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

296

abm_dce->base.funcs = &dce_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_audio.c

1214

static const struct audio_funcs funcs = {

drivers/gpu/drm/amd/display/dc/dce/dce_audio.c

1250

audio->base.funcs = &funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

618

aux_engine110->base.funcs = &aux_functions;

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

620

aux_engine110->base.funcs->configure_timeout = &dce_aux_configure_timeout;

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

250

struct dce_aux_funcs *funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1056

if (clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1094

dtbclk_p_src_clk_khz = clock_source->ctx->dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(clock_source->ctx->dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1114

clock_source->ctx->dc->res_pool->dccg->funcs->set_dp_dto(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1121

clock_source->ctx->dc->res_pool->dccg->funcs->set_hdmistreamclk(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1131

clock_source->ctx->dc->res_pool->dccg->funcs->set_dp_dto(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1173

if (clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1203

bp_result = dce110_clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1540

*ss_entries_num = clk_src->bios->funcs->get_ss_entry_number(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1560

bp_result = clk_src->bios->funcs->get_spread_spectrum_info(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1748

clk_src->base.funcs = &dce110_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1846

clk_src->base.funcs = &dce112_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1873

clk_src->base.funcs = &dcn20_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1889

clk_src->base.funcs = &dcn3_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1905

clk_src->base.funcs = &dcn31_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1921

clk_src->base.funcs = &dcn401_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1936

clk_src->base.funcs = &dcn3_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

441

bp_result = clk_src->bios->funcs->adjust_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

636

result = clk_src->bios->funcs->enable_spread_spectrum_on_ppll(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

743

clk_src->bios->funcs->

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

888

if (clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

949

if (clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

1079

base->funcs = &dce_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

1119

dmcu_dce->base.funcs = &dce_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

1140

dmcu_dce->base.funcs = &dcn10_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

1161

dmcu_dce->base.funcs = &dcn20_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

1182

dmcu_dce->base.funcs = &dcn21_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

182

link->link_enc->funcs->psr_program_dp_dphy_fast_training(link->link_enc,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

230

link->link_enc->funcs->psr_program_secondary_packet(link->link_enc,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

617

link->link_enc->funcs->psr_program_dp_dphy_fast_training(link->link_enc,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

665

link->link_enc->funcs->psr_program_secondary_packet(link->link_enc,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c.c

46

if (dcb->funcs->get_i2c_info(dcb, id, &i2c_info) != BP_RESULT_OK)

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

282

ipp_dce->base.funcs = &dce_ipp_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

300

ipp_dce->base.funcs = &dce60_ipp_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

159

result = bp->funcs->transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

176

return bios->funcs->encoder_control(bios, &encoder_control);

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1928

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1932

enc110->base.funcs = &dce60_lnk_enc_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1934

enc110->base.funcs = &dce60_lnk_enc_funcs_no_hpd;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

478

enc110->base.funcs->setup(&enc110->base, SIGNAL_TYPE_DISPLAY_PORT);

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

531

enc110->base.funcs->setup(&enc110->base, SIGNAL_TYPE_DISPLAY_PORT);

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

894

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

898

enc110->base.funcs = &dce110_lnk_enc_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

900

enc110->base.funcs = &dce110_lnk_enc_funcs_no_hpd;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

1009

dce_mi->base.funcs = &dce120_mi_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

967

dce_mi->base.funcs = &dce_mi_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

984

dce_mi->base.funcs = &dce60_mi_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

997

dce_mi->base.funcs = &dce112_mi_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_opp.c

709

static const struct opp_funcs funcs = {

drivers/gpu/drm/amd/display/dc/dce/dce_opp.c

732

opp110->base.funcs = &funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_opp.c

751

opp110->base.funcs = &dce60_opp_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c

290

dce_panel_cntl->base.funcs = &dce_link_panel_cntl_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

1585

enc110->base.funcs = &dce110_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

1608

enc110->base.funcs = &dce110_an_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

564

if (enc110->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

680

if (enc110->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

704

if (enc110->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dce/dce_transform.c

1654

xfm_dce->base.funcs = &dce_transform_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_transform.c

1683

xfm_dce->base.funcs = &dce60_transform_funcs;

drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c

210

base->funcs = &abm_funcs;

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

323

link->link_enc->funcs->psr_program_dp_dphy_fast_training(link->link_enc,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

327

link->link_enc->funcs->psr_program_secondary_packet(link->link_enc,

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

483

psr->funcs = &psr_funcs;

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h

36

const struct dmub_psr_funcs *funcs;

drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c

435

replay->funcs = &replay_funcs;

drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h

15

const struct dmub_replay_funcs *funcs;

drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c

455

compressor->base.funcs = &dce110_compressor_funcs;

drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

1048

dce_mi->base.funcs = &dce110_mem_input_v_funcs;

drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_v.c

39

static const struct opp_funcs funcs = {

drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_v.c

50

opp110->base.funcs = &funcs;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1401

tg->funcs->get_position(tg, &position1);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1402

tg->funcs->get_position(tg, &position2);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

147

result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2083

tg->funcs->get_scanoutpos(

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

218

tg->funcs->wait_for_vblank(tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

219

tg->funcs->wait_for_vactive(tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2360

tg110->base.funcs = &dce110_tg_funcs;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

239

result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, false);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

343

result = tg->bp->funcs->program_crtc_timing(tg->bp, &bp_params);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

347

tg110->base.funcs->enable_advanced_request(tg, true, &patched_crtc_timing);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

705

tg110->base.funcs = &dce110_tg_v_funcs;

drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c

710

xfm_dce->base.funcs = &dce110_xfmv_funcs;

drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c

824

bp->funcs->get_embedded_panel_info(bp, &panel_info)) {

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1069

tg->funcs->get_scanoutpos(

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1273

tg110->base.funcs = &dce120_tg_funcs;

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

151

result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true);

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

217

if (!tg->funcs->is_counter_moving(tg)) {

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

224

if (!tg->funcs->is_counter_moving(tg)) {

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

235

if (!tg->funcs->is_counter_moving(tg)) {

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

256

tg110->base.funcs = &dce60_tg_funcs;

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

244

tg110->base.funcs = &dce80_tg_funcs;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.c

126

dwbc10->base.funcs = &dcn10_dwbc_funcs;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.c

71

dwbc->funcs->disable(dwbc);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

138

hubp->funcs->hubp_read_state(hubp);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

346

dpp->funcs->dpp_read_state(dpp, &s);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

398

pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

432

if (tg->funcs->read_otg_state)

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

433

tg->funcs->read_otg_state(tg, &s);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

500

if (tg->funcs->read_otg_state)

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

501

tg->funcs->read_otg_state(tg, &s);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

504

tg->funcs->clear_optc_underflow(tg);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

517

hubp->funcs->hubp_read_state(hubp);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

520

hubp->funcs->hubp_clear_underflow(hubp);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

85

dc->res_pool->hubbub->funcs->wm_read_state(dc->res_pool->hubbub, &wm);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.c

68

ippn10->base.funcs = &dcn10_ipp_funcs;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.c

85

ippn10->base.funcs = &dcn20_ipp_funcs;

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c

337

dwbc20->base.funcs = &dcn20_dwbc_funcs;

drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c

122

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c

126

enc10->base.funcs = &dcn201_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dcn201/dcn201_mpc.c

114

mpc201->base.funcs = &dcn201_mpc_funcs;

drivers/gpu/drm/amd/display/dc/dcn201/dcn201_opp.c

69

oppn201->base.funcs = &dcn201_opp_funcs;

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c

343

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c

347

enc10->base.funcs = &dcn21_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

142

if (afmt->funcs->afmt_poweron == NULL)

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

151

if (mute && afmt->funcs->afmt_powerdown)

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

152

afmt->funcs->afmt_powerdown(afmt);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

153

if (!mute && afmt->funcs->afmt_poweron)

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

154

afmt->funcs->afmt_poweron(afmt);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

173

if (afmt->funcs->afmt_poweron)

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

174

afmt->funcs->afmt_poweron(afmt);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

210

afmt3->base.funcs = &dcn30_afmt_funcs;

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

52

if (afmt->funcs->afmt_poweron)

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c

53

afmt->funcs->afmt_poweron(afmt);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.h

133

const struct afmt_funcs *funcs;

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

234

mcif_wb30->base.funcs = &dcn30_mmhubbub_funcs;

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c

259

vpg3->base.funcs = &dcn30_vpg_funcs;

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c

215

dcn301_panel_cntl->base.funcs = &dcn301_link_panel_cntl_funcs;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_afmt.c

87

afmt31->base.funcs = &dcn31_afmt_funcs;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_apg.c

115

apg31->base.funcs = &dcn31_apg_funcs;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_apg.h

85

const struct apg_funcs *funcs;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

172

dcn31_panel_cntl->base.funcs = &dcn31_link_panel_cntl_funcs;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c

87

vpg31->base.funcs = &dcn31_vpg_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_dio.c

42

dio10->base.funcs = &dcn10_dio_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

103

result = bp->funcs->transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

1070

(enc->funcs->is_dig_enabled && !enc->funcs->is_dig_enabled(enc))) {

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

363

enc10->base.funcs->setup(&enc10->base, SIGNAL_TYPE_DISPLAY_PORT);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

682

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

685

enc10->base.funcs = &dcn10_lnk_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1475

if (enc->afmt && enc->afmt->funcs->afmt_powerdown)

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1476

enc->afmt->funcs->afmt_powerdown(enc->afmt);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1620

enc1->base.funcs = &dcn10_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

497

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

617

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c

277

if (enc->funcs->is_in_alt_mode && enc->funcs->is_in_alt_mode(enc)) {

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c

402

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c

406

enc10->base.funcs = &dcn20_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c

652

enc1->base.funcs = &dcn20_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c

340

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c

344

enc10->base.funcs = &dcn30_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

349

enc1->base.vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

430

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

445

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

460

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

467

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

478

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

489

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

550

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

58

enc1->base.vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

596

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

704

enc->afmt->funcs->audio_info_immediate_update(enc->afmt);

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

719

enc->afmt->funcs->audio_mute_control(enc->afmt, mute);

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

728

enc->afmt->funcs->se_audio_setup(enc->afmt, az_inst, info);

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

750

enc->afmt->funcs->setup_dp_audio(enc->afmt);

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

771

enc->afmt->funcs->setup_hdmi_audio(enc->afmt);

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

828

enc->afmt->funcs->se_audio_setup(enc->afmt, az_inst, info);

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

892

enc1->base.funcs = &dcn30_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c

102

enc10->base.funcs = &dcn301_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c

98

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

267

result = bp->funcs->transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

397

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

401

enc10->base.funcs = &dcn31_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

523

enc10->base.funcs = &dcn31_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

678

if (enc->funcs->is_dig_enabled && !enc->funcs->is_dig_enabled(enc))

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

123

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

163

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

265

enc->afmt->funcs->audio_info_immediate_update(enc->afmt);

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

497

enc1->base.funcs = &dcn314_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c

224

result = bp->funcs->transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c

453

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c

457

enc10->base.funcs = &dcn32_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

121

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

223

enc->afmt->funcs->audio_info_immediate_update(enc->afmt);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

484

enc1->base.funcs = &dcn32_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

81

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c

116

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c

120

enc10->base.funcs = &dcn321_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

188

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

192

enc10->base.funcs = &dcn35_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

402

if (enc->funcs->is_dig_enabled && !enc->funcs->is_dig_enabled(enc))

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

108

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

211

enc->afmt->funcs->audio_info_immediate_update(enc->afmt);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

510

enc1->base.funcs = &dcn35_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

69

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c

141

result = bp->funcs->transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c

441

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c

445

enc10->base.funcs = &dcn401_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

123

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

224

enc->afmt->funcs->audio_info_immediate_update(enc->afmt);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

786

enc1->base.funcs = &dcn401_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

83

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c

123

const struct dc_vbios_funcs *bp_funcs = init_data->ctx->dc_bios->funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c

127

enc10->base.funcs = &dcn42_link_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

226

enc1->base.vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

271

enc->apg->funcs->se_audio_setup(enc->apg, az_inst, info);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

303

enc->apg->funcs->enable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

333

enc->apg->funcs->disable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

394

enc->apg->funcs->disable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

425

enc->apg->funcs->se_audio_setup(enc->apg, az_inst, info);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

427

enc->apg->funcs->enable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

435

enc->apg->funcs->disable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

437

enc->apg->funcs->enable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

53

if (enc1->base.bp->funcs->encoder_control(

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

574

enc1->base.funcs = &dcn42_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c

157

enc->funcs = &virtual_lnk_enc_funcs;

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_stream_encoder.c

198

enc->funcs = &virtual_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/dm_cp_psp.h

58

struct cp_psp_funcs funcs;

drivers/gpu/drm/amd/display/dc/dm_services.h

210

struct pp_smu_funcs *funcs);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1006

v->dcc_enable[input_idx] = dc->res_pool->hubbub->funcs->dcc_support_pixel_format(

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

333

input->src.dcc = pipe->plane_res.dpp->ctx->dc->res_pool->hubbub->funcs->

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1155

dc->res_pool->funcs->set_mcif_arb_params(dc, context, pipes, pipe_cnt);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1238

context->bw_ctx.dml.funcs.rq_dlg_get_dlg_reg(&context->bw_ctx.dml,

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1248

context->bw_ctx.dml.funcs.rq_dlg_get_rq_reg(&context->bw_ctx.dml,

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1735

dc->res_pool->funcs->populate_dml_writeback_from_context(dc, res_ctx, pipes);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1791

if (dc->res_pool->funcs->populate_dml_pipes)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1792

pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc,

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2292

if (dc->res_pool->funcs->populate_dml_pipes)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2293

pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc,

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

467

dc->res_pool->funcs->update_soc_for_wm_a(dc, context);

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

732

if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

735

if (dc->ctx->dc_bios->funcs->get_soc_bb_info(dc->ctx->dc_bios, &bb_info) == BP_RESULT_OK) {

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

525

dc->res_pool->funcs->update_soc_for_wm_a(dc, context);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1522

dc->res_pool->funcs->add_phantom_pipes(dc, context, pipes, *pipe_cnt, dc_pipe_idx);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1524

*pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1568

*pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1632

dc->res_pool->funcs->set_mcif_arb_params(dc, context, pipes, pipe_cnt);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1769

context->bw_ctx.dml.funcs.rq_dlg_get_dlg_reg_v2(&context->bw_ctx.dml,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1773

context->bw_ctx.dml.funcs.rq_dlg_get_rq_reg_v2(&context->res_ctx.pipe_ctx[i].rq_regs,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2134

dc->res_pool->funcs->update_soc_for_wm_a(dc, context);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2138

pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2223

pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3078

if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3081

if (dc->ctx->dc_bios->funcs->get_soc_bb_info(dc->ctx->dc_bios, &bb_info) == BP_RESULT_OK) {

drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c

662

if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {

drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c

665

if (dc->ctx->dc_bios->funcs->get_soc_bb_info(dc->ctx->dc_bios, &bb_info) == BP_RESULT_OK) {

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

104

lib->funcs = dml20_funcs;

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

107

lib->funcs = dml20v2_funcs;

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

110

lib->funcs = dml21_funcs;

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

113

lib->funcs = dml30_funcs;

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

117

lib->funcs = dml31_funcs;

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

120

lib->funcs = dml314_funcs;

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

123

lib->funcs = dml32_funcs;

drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h

91

struct dml_funcs funcs;

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

69

mode_lib->funcs.recalculate(mode_lib);

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

76

mode_lib->funcs.validate(mode_lib);

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

974

mode_lib->funcs.recalculate(mode_lib);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper_fpu.c

134

if (dc->res_pool->funcs->calculate_mall_ways_from_bytes) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper_fpu.c

135

context->bw_ctx.bw.dcn.clk.num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, context->bw_ctx.bw.dcn.mall_subvp_size_bytes);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper_fpu.c

239

if (in_dc->res_pool->funcs->program_mcache_pipe_config) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h

1833

struct dml2_core_shared_calculation_funcs *funcs;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h

2322

struct dml2_core_shared_calculation_funcs funcs;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_interfaces.c

30

if (!in_out->dml2_instance->funcs.check_mode_supported)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_interfaces.c

33

return in_out->dml2_instance->funcs.check_mode_supported(in_out);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_interfaces.c

38

if (!in_out->dml2_instance->funcs.build_mode_programming)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_interfaces.c

41

return in_out->dml2_instance->funcs.build_mode_programming(in_out);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_interfaces.c

46

if (!in_out->dml2_instance->funcs.build_mcache_programming)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_interfaces.c

49

return in_out->dml2_instance->funcs.build_mcache_programming(in_out);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

1198

dml->funcs = soc15_funcs;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/inc/dml2_internal_shared_types.h

998

struct dml2_top_funcs funcs;

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

597

dpp->base.funcs = &dcn10_dpp_funcs;

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

424

dpp->base.funcs = &dcn20_dpp_funcs;

drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c

308

dpp->base.funcs = &dcn201_dpp_funcs;

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1547

dpp->base.funcs = &dcn30_dpp_funcs;

drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c

158

dpp->base.funcs = &dcn32_dpp_funcs;

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

139

dpp->base.funcs = &dcn35_dpp_funcs;

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c

273

dpp->base.funcs = &dcn401_dpp_funcs;

drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c

334

dpp->base.funcs = &dcn42_dpp_funcs;

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1064

if (!dsc || !dsc->ctx || !dsc->ctx->dc || !dsc->funcs->dsc_get_single_enc_caps)

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1069

if (!dc->clk_mgr || !dc->clk_mgr->funcs->get_max_clock_khz || !dc->res_pool || dc->debug.disable_dsc)

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1073

max_dscclk_khz = dc->clk_mgr->funcs->get_max_clock_khz(dc->clk_mgr, CLK_TYPE_DSCCLK);

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1075

dsc->funcs->dsc_get_single_enc_caps(&single_dsc_enc_caps, max_dscclk_khz);

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1114

dsc->ctx->dc->clk_mgr->funcs->get_max_clock_khz) {

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1116

max_dispclk_khz = dsc->ctx->dc->clk_mgr->funcs->get_max_clock_khz(dsc->ctx->dc->clk_mgr, CLK_TYPE_DISPCLK);

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1146

if (dsc->funcs->dsc_get_enc_caps) {

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

1147

dsc->funcs->dsc_get_enc_caps(dsc_enc_caps, pixel_clock_100Hz);

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

72

dsc->base.funcs = &dcn20_dsc_funcs;

drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c

70

dsc->base.funcs = &dcn35_dsc_funcs;

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

57

dsc->base.funcs = &dcn401_dsc_funcs;

drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_dwb.c

268

dwbc30->base.funcs = &dcn30_dwbc_funcs;

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

147

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

179

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

369

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

386

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

166

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

197

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

391

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

408

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

151

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

174

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

402

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_translate_dce60.c

410

translate->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

151

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

174

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

402

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

410

translate->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

198

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

230

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

391

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

408

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c

227

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c

259

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

364

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c

381

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c

206

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c

238

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

354

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c

371

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c

235

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c

267

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

369

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c

386

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c

227

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c

259

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

355

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c

372

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c

239

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c

270

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

330

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c

347

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c

231

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c

263

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

315

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c

333

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn42/hw_factory_dcn42.c

221

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn42/hw_factory_dcn42.c

253

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn42/hw_translate_dcn42.c

185

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn42/hw_translate_dcn42.c

203

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn42b/hw_factory_dcn42b.c

280

static const struct hw_factory_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn42b/hw_factory_dcn42b.c

312

factory->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/dcn42b/hw_translate_dcn42b.c

173

static const struct hw_translate_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/dcn42b/hw_translate_dcn42b.c

190

tr->funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

129

return gpio->pin->funcs->change_mode(gpio->pin, mode);

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

153

return gpio->pin->funcs->set_config(gpio->pin, config_data);

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

160

return gpio->service->translate.funcs->id_to_offset(

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

290

gpio->service->factory.funcs->init_ddc_data(&gpio->hw_container.ddc, service->ctx, id, en);

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

293

gpio->service->factory.funcs->init_ddc_data(&gpio->hw_container.ddc, service->ctx, id, en);

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

296

gpio->service->factory.funcs->init_generic(&gpio->hw_container.generic, service->ctx, id, en);

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

299

gpio->service->factory.funcs->init_hpd(&gpio->hw_container.hpd, service->ctx, id, en);

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

87

return gpio->pin->funcs->get_value(gpio->pin, value);

drivers/gpu/drm/amd/display/dc/gpio/gpio_base.c

99

return gpio->pin->funcs->set_value(gpio->pin, value);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

134

if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

151

if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

183

if (service->translate.funcs->id_to_offset) {

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

184

service->translate.funcs->id_to_offset(id, en, &pin);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

321

*pin = service->factory.funcs->get_ddc_pin(gpio);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

322

service->factory.funcs->define_ddc_registers(*pin, en);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

325

*pin = service->factory.funcs->get_ddc_pin(gpio);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

326

service->factory.funcs->define_ddc_registers(*pin, en);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

329

*pin = service->factory.funcs->get_generic_pin(gpio);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

330

service->factory.funcs->define_generic_registers(*pin, en);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

333

*pin = service->factory.funcs->get_hpd_pin(gpio);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

334

service->factory.funcs->define_hpd_registers(*pin, en);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

351

if (!(*pin)->funcs->open(*pin, mode)) {

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

377

pin->funcs->close(pin);

drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c

498

if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en))

drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c

205

static const struct hw_gpio_pin_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c

222

ddc->base.base.funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/hw_factory.h

69

} *funcs;

drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c

100

pin->base.base.funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c

83

static const struct hw_gpio_pin_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.h

40

const struct hw_gpio_pin_funcs *funcs;

drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c

104

static const struct hw_gpio_pin_funcs funcs = {

drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c

121

pin->base.base.funcs = &funcs;

drivers/gpu/drm/amd/display/dc/gpio/hw_translate.h

42

const struct hw_translate_funcs *funcs;

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_link_encoder.c

127

return bp->funcs->transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_link_encoder.c

281

enc3->base.funcs = &dcn30_hpo_frl_link_encoder_funcs;

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

1033

enc3->base.funcs = &dcn30_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

297

enc->afmt->funcs->audio_info_immediate_update(enc->afmt);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

333

enc3->base.vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

708

enc->afmt->funcs->setup_hdmi_audio(enc->afmt);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

767

enc->afmt->funcs->se_audio_setup(enc->afmt, az_inst, info);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

774

if (enc->afmt->funcs->afmt_powerdown)

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

775

enc->afmt->funcs->afmt_powerdown(enc->afmt);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

783

enc->afmt->funcs->audio_mute_control(enc->afmt, mute);

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_link_encoder.c

501

result = bp->funcs->transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_link_encoder.c

621

enc31->base.funcs = &dcn31_hpo_dp_link_encoder_funcs;

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

458

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

465

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

472

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

483

enc->vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

573

enc3->base.vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

649

enc->apg->funcs->se_audio_setup(enc->apg, az_inst, info);

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

670

enc->apg->funcs->enable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

691

enc->apg->funcs->disable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

775

enc3->base.funcs = &dcn30_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/hpo/dcn32/dcn32_hpo_dp_link_encoder.c

82

enc31->base.funcs = &dcn32_hpo_dp_link_encoder_funcs;

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

305

if (enc->afmt && enc->afmt->funcs->audio_info_immediate_update)

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

306

enc->afmt->funcs->audio_info_immediate_update(enc->afmt);

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

326

enc401->base.vpg->funcs->update_generic_info_packet(

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

745

enc->afmt->funcs->setup_hdmi_audio(enc->afmt);

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

804

enc->afmt->funcs->se_audio_setup(enc->afmt, az_inst, info);

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

811

if (enc->afmt->funcs->afmt_powerdown)

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

812

enc->afmt->funcs->afmt_powerdown(enc->afmt);

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

820

enc->afmt->funcs->audio_mute_control(enc->afmt, mute);

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

897

enc401->base.funcs = &dcn401_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_dp_link_encoder.c

86

enc31->base.funcs = &dcn42_hpo_dp_link_encoder_funcs;

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

147

enc->apg->funcs->se_audio_setup(enc->apg, az_inst, info);

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

154

if (enc->apg->funcs->disable_apg)

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

155

enc->apg->funcs->disable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

164

enc->apg->funcs->disable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

166

enc->apg->funcs->enable_apg(enc->apg);

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

197

enc42->base.funcs = &dcn42_str_enc_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.c

843

if (!hubbub1->base.funcs->dcc_support_pixel_format(input->format, &bpe))

drivers/gpu/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.c

846

if (!hubbub1->base.funcs->dcc_support_swizzle(input->swizzle_mode, bpe,

drivers/gpu/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.c

936

hubbub1->base.funcs = &hubbub1_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn20/dcn20_hubbub.c

233

if (!hubbub->funcs->dcc_support_pixel_format(input->format,

drivers/gpu/drm/amd/display/dc/hubbub/dcn20/dcn20_hubbub.c

237

if (!hubbub->funcs->dcc_support_swizzle(input->swizzle_mode, bpe,

drivers/gpu/drm/amd/display/dc/hubbub/dcn20/dcn20_hubbub.c

626

hubbub->funcs->allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);

drivers/gpu/drm/amd/display/dc/hubbub/dcn20/dcn20_hubbub.c

684

hubbub->base.funcs = &hubbub2_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn201/dcn201_hubbub.c

99

hubbub->base.funcs = &hubbub201_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c

715

hubbub->base.funcs = &hubbub21_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn30/dcn30_hubbub.c

292

if (!hubbub->funcs->dcc_support_pixel_format(input->format,

drivers/gpu/drm/amd/display/dc/hubbub/dcn30/dcn30_hubbub.c

296

if (!hubbub->funcs->dcc_support_swizzle(input->swizzle_mode, bpe,

drivers/gpu/drm/amd/display/dc/hubbub/dcn30/dcn30_hubbub.c

481

hubbub3->base.funcs = &hubbub30_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn301/dcn301_hubbub.c

77

hubbub3->base.funcs = &hubbub301_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

1090

hubbub31->base.funcs = &hubbub31_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

819

if (!hubbub->funcs->dcc_support_pixel_format(input->format,

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

823

if (!hubbub->funcs->dcc_support_swizzle(input->swizzle_mode, bpe,

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

936

if (hubbub->funcs->dchvm_init)

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

937

hubbub->funcs->dchvm_init(hubbub);

drivers/gpu/drm/amd/display/dc/hubbub/dcn32/dcn32_hubbub.c

1053

hubbub2->base.funcs = &hubbub32_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c

656

hubbub2->base.funcs = &hubbub35_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1001

if (!hubbub->funcs->dcc_support_swizzle_addr3(input->swizzle_mode_addr3,

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1006

if (!hubbub->funcs->dcc_support_swizzle_addr3(input->swizzle_mode_addr3,

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1266

hubbub2->base.funcs = &hubbub4_01_funcs;

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

930

if (!hubbub->funcs->dcc_support_pixel_format_plane0_plane1(input->format,

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

937

if (!hubbub->funcs->dcc_support_swizzle_addr3(input->swizzle_mode_addr3,

drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c

569

hubbub2->base.funcs = &hubbub42_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

1275

hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

1413

hubp1->base.funcs = &dcn10_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1069

hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1717

hubp2->base.funcs = &dcn20_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c

146

hubp201->base.funcs = &dcn201_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c

852

hubp21->base.funcs = &dcn21_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

670

hubp2->base.funcs = &dcn30_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn31/dcn31_hubp.c

124

hubp2->base.funcs = &dcn31_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c

236

hubp2->base.funcs = &dcn32_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c

233

hubp2->base.funcs = &dcn35_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

1089

hubp2->base.funcs = &dcn401_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

786

hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);

drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c

632

hubp2->base.funcs = &dcn42_hubp_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

56

if (lock && pipe->stream_res.tg->funcs->is_blanked &&

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

57

pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg))

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

114

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

126

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

138

dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating;

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

164

if (clear_tiling && mi->funcs->mem_input_clear_tiling)

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

165

mi->funcs->mem_input_clear_tiling(mi);

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

168

mi->funcs->mem_input_program_surface_flip_and_addr(mi,

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

91

bp_result = dcb->funcs->enable_disp_power_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1013

bool is_backlight_on = link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1078

ctx->dc_bios->funcs->enable_lvtma_control(ctx->dc_bios,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1082

ctx->dc_bios->funcs->enable_lvtma_control(ctx->dc_bios,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1151

if (num_audio >= 1 && clk_mgr->funcs->enable_pme_wa) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1153

clk_mgr->funcs->enable_pme_wa(clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1156

pipe_ctx->stream_res.audio->funcs->az_enable(pipe_ctx->stream_res.audio);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1189

if (clk_mgr->funcs->enable_pme_wa)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1191

clk_mgr->funcs->enable_pme_wa(clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1218

pipe_ctx->stream_res.stream_enc->funcs->stop_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1220

pipe_ctx->stream_res.stream_enc->funcs->hdmi_reset_stream_attribute(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1225

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->stop_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1228

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->stop_dp_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1231

pipe_ctx->stream_res.stream_enc->funcs->stop_dp_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1243

dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1244

dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1246

if (dccg && dccg->funcs->set_dtbclk_dto)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1247

dccg->funcs->set_dtbclk_dto(dccg, &dto_params);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1250

} else if (dccg && dccg->funcs->disable_symclk_se) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1252

dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1273

pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(link, pipe_ctx->stream_res.stream_enc, &params);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1276

hws->funcs.edp_backlight_control(link, true);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1291

hws->funcs.edp_backlight_control(link, false);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1297

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_blank(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1300

pipe_ctx->stream_res.stream_enc->funcs->dp_blank(link, pipe_ctx->stream_res.stream_enc);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1324

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_blank(pipe_ctx->stream_res.hpo_frl_stream_enc);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1328

link->dc->res_pool->dccg->funcs->set_hdmistreamclk) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1329

link->dc->res_pool->dccg->funcs->set_hdmistreamclk(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1344

pipe_ctx->stream_res.stream_enc->funcs->set_avmute(pipe_ctx->stream_res.stream_enc, enable);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1351

if (enable && pipe_ctx->stream_res.tg->funcs->is_tg_enabled(pipe_ctx->stream_res.tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1354

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1356

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1357

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1571

state->clk_mgr->funcs->get_dp_ref_clk_frequency(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1596

if (pipe_ctx->plane_res.xfm->funcs->transform_set_pixel_storage_depth == NULL)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1606

pipe_ctx->plane_res.xfm->funcs->transform_set_pixel_storage_depth(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1611

if (pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1620

pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1625

pipe_ctx->plane_res.xfm->funcs->transform_set_scaler(pipe_ctx->plane_res.xfm,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1645

pipe_ctx->stream_res.tg->funcs->set_blank_color(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1653

pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1655

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1672

pipe_ctx->stream_res.tg->funcs->program_timing(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1685

if (false == pipe_ctx->stream_res.tg->funcs->enable_crtc(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1710

if (hws->funcs.disable_stream_gating) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1711

hws->funcs.disable_stream_gating(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1722

pipe_ctx->stream_res.audio->funcs->az_configure(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1730

if (pipe_ctx->stream_res.audio->funcs->az_disable_hbr_audio &&

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1732

pipe_ctx->stream_res.audio->funcs->az_disable_hbr_audio(pipe_ctx->stream_res.audio);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1739

pipe_ctx->stream_res.opp->funcs->opp_program_fmt(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1744

pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1751

odm_pipe->stream_res.opp->funcs->opp_set_dyn_expansion(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1757

odm_pipe->stream_res.opp->funcs->opp_program_fmt(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1773

hws->funcs.enable_stream_timing(pipe_ctx, context, dc);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1775

if (hws->funcs.setup_vupdate_interrupt)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1776

hws->funcs.setup_vupdate_interrupt(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1789

if (pipe_ctx->stream_res.tg->funcs->set_static_screen_control)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1790

pipe_ctx->stream_res.tg->funcs->set_static_screen_control(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1795

pipe_ctx->stream_res.stream_enc->funcs->dig_connect_to_otg(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1825

hws->funcs.enable_stream_timing(pipe_ctx, context, dc);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1857

link_enc->funcs->disable_output(link_enc, signal);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1860

if (link_enc && link_enc->funcs->fec_set_enable && link_enc->funcs->fec_set_ready) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1861

link_enc->funcs->fec_set_enable(link_enc, false);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1862

link_enc->funcs->fec_set_ready(link_enc, false);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1877

dc->res_pool->timing_generators[i]->funcs->disable_crtc(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1886

if (dc->res_pool->dp_clock_source->funcs->cs_power_down(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1891

if (dc->res_pool->clock_sources[i]->funcs->cs_power_down(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1906

dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1922

if (tg->funcs->disable_vga)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1923

tg->funcs->disable_vga(tg);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1990

dsc->funcs->dsc_read_state(dsc, &s);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1995

if (tg->funcs->set_dsc_config)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1996

tg->funcs->set_dsc_config(tg, OPTC_DSC_DISABLED, 0, 0);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2001

if (se->funcs->dp_set_dsc_config)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2002

se->funcs->dp_set_dsc_config(se, OPTC_DSC_DISABLED, 0, 0);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2003

if (se->funcs->dp_set_dsc_pps_info_packet)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2004

se->funcs->dp_set_dsc_pps_info_packet(se, false, NULL, true);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2007

if (dccg->funcs->set_ref_dscclk)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2008

dccg->funcs->set_ref_dscclk(dccg, dsc->inst);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2009

dsc->funcs->dsc_disable(dsc);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2013

pg_cntl->funcs->dsc_pg_control(pg_cntl, dsc->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2032

if (tg->funcs->enable_otg_pwa) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2042

tg->funcs->enable_otg_pwa(tg, &pwa_param);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2077

if (hws->funcs.init_pipes)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2078

hws->funcs.init_pipes(dc, context);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2089

if (edp_link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2090

edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2110

hws->funcs.is_dp_dig_pixel_rate_div_policy &&

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2111

hws->funcs.is_dp_dig_pixel_rate_div_policy(pipe_ctx)) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2113

dc->res_pool->dccg->funcs->get_pixel_rate_div(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2154

hws->funcs.edp_backlight_control(edp_link_with_sink, false);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2157

if (dcb && dcb->funcs && !dcb->funcs->is_accelerated_mode(dcb))

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2177

if (dcb && dcb->funcs && !dcb->funcs->is_accelerated_mode(dcb))

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2218

pipe_ctx->plane_res.mi->funcs->mem_input_program_display_marks(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2227

pipe_ctx->plane_res.mi->funcs->mem_input_program_chroma_display_marks(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2254

res_ctx->pipe_ctx[i].plane_res.mi->funcs->mem_input_program_display_marks(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2263

res_ctx->pipe_ctx[i].plane_res.mi->funcs->mem_input_program_chroma_display_marks(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2301

if ((tg != NULL) && tg->funcs) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2304

if (tg->funcs->set_static_screen_control)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2305

tg->funcs->set_static_screen_control(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

232

bp_result = dcb->funcs->enable_disp_power_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2320

pipe_ctx[i]->stream_res.tg->funcs->get_position(pipe_ctx[i]->stream_res.tg, position);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2346

pipe_ctx[i]->stream_res.tg->funcs->

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2436

compr->funcs->surface_address_and_pitch(compr, &params);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2437

compr->funcs->set_fbc_invalidation_triggers(compr, 1);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2439

compr->funcs->enable_fbc(compr, &params);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2478

pipe_ctx_old->stream_res.audio->funcs->

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2492

pipe_ctx_old->stream_res.tg->funcs->set_blank(pipe_ctx_old->stream_res.tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2497

pipe_ctx_old->stream_res.tg->funcs->disable_crtc(pipe_ctx_old->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2500

pipe_ctx_old->plane_res.mi->funcs->free_mem_input(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2506

old_clk->funcs->cs_power_down(old_clk);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2556

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs->set_audio_dtbclk_dto) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2558

dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2564

dc->res_pool->dccg->funcs->set_audio_dtbclk_dto(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2569

dc->res_pool->dccg->funcs->set_audio_dtbclk_dto(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2573

pipe_ctx->stream_res.audio->funcs->wall_dto_setup(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2580

pipe_ctx->stream_res.audio->funcs->wall_dto_setup(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2609

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs->set_audio_dtbclk_dto) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2612

dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2617

dc->res_pool->dccg->funcs->set_audio_dtbclk_dto(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2622

dc->res_pool->dccg->funcs->set_audio_dtbclk_dto(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2626

pipe_ctx->stream_res.audio->funcs->wall_dto_setup(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2633

pipe_ctx->stream_res.audio->funcs->wall_dto_setup(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2662

hws->funcs.reset_hw_ctx_wrap(dc, context);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2669

dcb->funcs->set_scratch_critical_state(dcb, true);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2687

hws->funcs.enable_display_power_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2693

dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2697

if (dc->hwseq->funcs.setup_hpo_hw_control && was_hpo_acquired != is_hpo_acquired) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2698

dc->hwseq->funcs.setup_hpo_hw_control(dc->hwseq, is_hpo_acquired);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2729

if (hws->funcs.resync_fifo_dccg_dio)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2730

hws->funcs.resync_fifo_dccg_dio(hws, dc, context, i);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2749

dcb->funcs->set_scratch_critical_state(dcb, false);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2774

pipe_ctx->plane_res.xfm->funcs->opp_set_csc_default(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2822

pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, blank_target);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2842

pipe_ctx->plane_res.xfm->funcs->transform_set_gamut_remap(pipe_ctx->plane_res.xfm, &adjust);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2853

pipe_ctx->plane_res.mi->funcs->mem_input_program_surface_flip_and_addr(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2869

pipe_ctx->plane_res.mi->funcs->mem_input_is_flip_pending(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2877

pipe_ctx->stream_res.tg->funcs->is_stereo_left_eye) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2879

!pipe_ctx->stream_res.tg->funcs->is_stereo_left_eye(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2902

if (!tg->funcs->is_counter_moving(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2907

if (tg->funcs->did_triggered_reset_occur(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2916

tg->funcs->wait_for_state(tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2917

tg->funcs->wait_for_state(tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2949

grouped_pipes[i]->stream_res.tg->funcs->setup_global_swap_lock(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2956

grouped_pipes[i]->stream_res.tg->funcs->enable_reset_trigger(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2963

grouped_pipes[i]->stream_res.tg->funcs->disable_reset_trigger(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2971

grouped_pipes[i]->stream_res.tg->funcs->tear_down_global_swap_lock(grouped_pipes[i]->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2989

grouped_pipes[i]->stream_res.tg->funcs->setup_global_swap_lock(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2995

grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3005

grouped_pipes[i]->stream_res.tg->funcs->tear_down_global_swap_lock(grouped_pipes[i]->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

301

ipp->funcs->ipp_program_prescale(ipp, &prescale_params);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3030

xfm->funcs->transform_reset(xfm);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3032

hws->funcs.enable_display_power_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3035

hws->funcs.enable_display_power_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3038

hws->funcs.enable_display_pipe_clock_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

305

ipp->funcs->ipp_program_input_lut(ipp, &plane_state->gamma_correction);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3053

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3059

tg->funcs->disable_vga(tg);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3063

tg->funcs->set_blank(tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3069

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3076

backlight = link->panel_cntl->funcs->hw_init(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3083

abm->funcs->abm_init(abm, backlight, user_level);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3087

abm->dmcu_is_running = dmcu->funcs->is_dmcu_initialized(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3090

dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

310

ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3103

dccg->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3118

dccg->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

313

ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_xvYCC);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3151

pipe_ctx->plane_res.xfm->funcs->opp_set_csc_adjustment

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

316

ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3163

pipe_ctx->plane_res.xfm->funcs->transform_set_gamut_remap(pipe_ctx->plane_res.xfm, &adjust);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3169

mi->funcs->mem_input_program_surface_config(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3177

if (mi->funcs->set_blank)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3178

mi->funcs->set_blank(mi, pipe_ctx->plane_state->visible);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3181

mi->funcs->mem_input_program_pte_vm(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3191

hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3194

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

324

ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3246

dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3255

pipe_ctx->plane_res.mi->funcs->allocate_mem_input(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3293

hws->funcs.enable_display_power_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3296

dc->res_pool->transforms[fe_idx]->funcs->transform_reset(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3332

pipe_ctx->plane_res.xfm->funcs->opp_set_csc_adjustment(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3376

if (ipp->funcs->ipp_cursor_set_position)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3377

ipp->funcs->ipp_cursor_set_position(ipp, &pos_cpy, &param);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3378

if (mi->funcs->set_cursor_position)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3379

mi->funcs->set_cursor_position(mi, &pos_cpy, &param);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3387

pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3388

pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3392

pipe_ctx->plane_res.mi->funcs->set_cursor_attributes)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3393

pipe_ctx->plane_res.mi->funcs->set_cursor_attributes(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3397

pipe_ctx->plane_res.xfm->funcs->set_cursor_attributes)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3398

pipe_ctx->plane_res.xfm->funcs->set_cursor_attributes(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3418

if (abm == NULL || panel_cntl == NULL || (abm->funcs->set_backlight_level_pwm == NULL))

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3422

fw_set_brightness = dmcu->funcs->is_dmcu_initialized(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3424

if (!fw_set_brightness && panel_cntl->funcs->driver_set_backlight)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3425

panel_cntl->funcs->driver_set_backlight(panel_cntl, backlight_pwm_u16_16);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3427

abm->funcs->set_backlight_level_pwm(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3443

abm->funcs->set_abm_immediate_disable(abm,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3447

panel_cntl->funcs->store_backlight_level(panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3457

abm->funcs->set_pipe(abm, otg_inst, panel_cntl->inst);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3466

link->link_enc->funcs->enable_lvds_output(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3481

link->link_enc->funcs->enable_tmds_output(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3494

link->link_enc->funcs->enable_analog_output(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3537

pipes[i].clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3552

if (dc->clk_mgr->funcs->notify_link_rate_change)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3553

dc->clk_mgr->funcs->notify_link_rate_change(dc->clk_mgr, link);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3556

if (dmcu != NULL && dmcu->funcs->lock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3557

dmcu->funcs->lock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3565

if (dmcu != NULL && dmcu->funcs->unlock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3566

dmcu->funcs->unlock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3583

else if (dmcu != NULL && dmcu->funcs->lock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3584

dmcu->funcs->lock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3593

if (dmcu != NULL && dmcu->funcs->unlock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3594

dmcu->funcs->unlock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3664

dc->hwseq->funcs = dce110_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

616

xfm->funcs->opp_power_on_regamma_lut(xfm, true);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

621

xfm->funcs->opp_set_regamma_mode(xfm, OPP_REGAMMA_SRGB);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

624

xfm->funcs->opp_program_regamma_pwl(xfm, &xfm->regamma_params);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

625

xfm->funcs->opp_set_regamma_mode(xfm, OPP_REGAMMA_USER);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

627

xfm->funcs->opp_set_regamma_mode(xfm, OPP_REGAMMA_BYPASS);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

630

xfm->funcs->opp_power_on_regamma_lut(xfm, false);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

652

pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

656

if (pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

657

pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

661

pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

696

bp_result = bios->funcs->external_encoder_control(bios, &ext_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

716

bp_result = bios->funcs->dac_load_detection(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

749

tg->funcs->set_early_control(tg, early_control);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

761

result = bios->funcs->transmitter_control(bios, cntl);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

844

link->panel_cntl->funcs->is_panel_powered_on(link->panel_cntl)) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

921

bp_result = ctx->dc_bios->funcs->enable_lvtma_control(ctx->dc_bios,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

925

bp_result = ctx->dc_bios->funcs->enable_lvtma_control(ctx->dc_bios,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

971

if (!link->panel_cntl->funcs->is_panel_powered_on(link->panel_cntl) &&

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

132

bp_result = dcb->funcs->enable_disp_power_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c

158

dc->hwseq->funcs.enable_display_power_gating = dce112_enable_display_power_gating;

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

176

bp_result = dcb->funcs->enable_disp_power_gating(

drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c

270

dc->hwseq->funcs.enable_display_power_gating = dce120_enable_display_power_gating;

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

131

compr->funcs->surface_address_and_pitch(compr, &params);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

132

compr->funcs->set_fbc_invalidation_triggers(compr, 1);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

134

compr->funcs->enable_fbc(compr, &params);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

160

pipe_ctx->plane_res.xfm->funcs->opp_set_csc_default(

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

192

pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, blank_target);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

246

pipe_ctx->plane_res.xfm->funcs->transform_set_pixel_storage_depth(

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

251

if (pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color) {

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

260

pipe_ctx->stream_res.tg->funcs->set_overscan_blank_color(

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

265

pipe_ctx->plane_res.xfm->funcs->transform_set_scaler(pipe_ctx->plane_res.xfm,

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

298

pipe_ctx->plane_res.xfm->funcs->opp_set_csc_adjustment

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

310

pipe_ctx->plane_res.xfm->funcs->transform_set_gamut_remap(pipe_ctx->plane_res.xfm, &adjust);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

316

mi->funcs->mem_input_program_surface_config(

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

324

if (mi->funcs->set_blank)

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

325

mi->funcs->set_blank(mi, pipe_ctx->plane_state->visible);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

328

mi->funcs->mem_input_program_pte_vm(

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

338

hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

341

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

393

dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

402

pipe_ctx->plane_res.mi->funcs->allocate_mem_input(

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

425

dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating;

drivers/gpu/drm/amd/display/dc/hwss/dce80/dce80_hwseq.c

49

dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1058

if (hws->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1059

hws->funcs.dpp_root_clock_control(hws, plane_id, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1065

if (hws->funcs.dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1066

hws->funcs.dpp_pg_control(hws, plane_id, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1068

if (hws->funcs.hubp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1069

hws->funcs.hubp_pg_control(hws, plane_id, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1086

hubp->funcs->set_blank(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1091

hws->funcs.hubp_pg_control(hws, 0, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1120

hws->funcs.hubp_pg_control(hws, 0, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1124

hubp->funcs->set_hubp_blank_en(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1135

if (hws->funcs.s0i3_golden_init_wa && hws->funcs.s0i3_golden_init_wa(dc))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1138

if (dc->res_pool->hubbub->funcs->is_allow_self_refresh_enabled)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1140

dc->res_pool->hubbub->funcs->is_allow_self_refresh_enabled(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1151

bp->funcs->enable_disp_power_gating(bp,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1156

bp->funcs->enable_disp_power_gating(bp,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1160

if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1162

dc->res_pool->hubbub->funcs->is_allow_self_refresh_enabled(dc->res_pool->hubbub))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1163

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1179

underflow = tg->funcs->is_optc_underflow_occurred(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1190

if (tg->funcs->set_blank_data_double_buffer)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1191

tg->funcs->set_blank_data_double_buffer(tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1193

if (tg->funcs->is_optc_underflow_occurred(tg) && !underflow)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1194

tg->funcs->clear_optc_underflow(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1245

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1247

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

126

if (tg->funcs->is_tg_enabled && !tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1264

pipe_ctx->stream_res.tg->funcs->program_timing(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1281

pipe_ctx->stream_res.opp->funcs->opp_program_fmt(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1298

if (pipe_ctx->stream_res.tg->funcs->set_blank_color)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1299

pipe_ctx->stream_res.tg->funcs->set_blank_color(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1303

if (pipe_ctx->stream_res.tg->funcs->is_blanked &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1304

!pipe_ctx->stream_res.tg->funcs->is_blanked(pipe_ctx->stream_res.tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1305

pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1311

if (false == pipe_ctx->stream_res.tg->funcs->enable_crtc(pipe_ctx->stream_res.tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

135

frame_count = tg->funcs->get_frame_count(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1355

pipe_ctx->stream_res.audio->funcs->az_disable(pipe_ctx->stream_res.audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1376

pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1378

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1419

if (hubp != NULL && hubp->funcs->set_hubp_blank_en)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1420

hubp->funcs->set_hubp_blank_en(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1432

if (hubp != NULL && hubp->funcs->hubp_disable_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1433

hubp->funcs->hubp_disable_control(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1442

if (hubp != NULL && hubp->funcs->hubp_disable_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1443

hubp->funcs->hubp_disable_control(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1454

if (hubp != NULL && hubp->funcs->set_hubp_blank_en)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1455

hubp->funcs->set_hubp_blank_en(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1467

if (!hubbub->funcs->verify_allow_pstate_change_high)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1470

if (!hubbub->funcs->verify_allow_pstate_change_high(hubbub)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1478

if (!hubbub->funcs->verify_allow_pstate_change_high(hubbub))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1498

mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, dpp_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1504

mpc->funcs->remove_mpcc(mpc, mpc_tree_params, mpcc_to_remove);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1512

if (hubp->funcs->hubp_disconnect)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1513

hubp->funcs->hubp_disconnect(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1516

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1543

if (hws->funcs.dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1544

hws->funcs.dpp_pg_control(hws, dpp->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1546

if (hws->funcs.hubp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1547

hws->funcs.hubp_pg_control(hws, hubp->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1549

hubp->funcs->hubp_reset(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1550

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1558

if (hws->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1559

hws->funcs.dpp_root_clock_control(hws, dpp->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1574

hubp->funcs->hubp_clk_cntl(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1576

dpp->funcs->dpp_dppclk_control(dpp, false, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1579

pipe_ctx->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1586

hws->funcs.plane_atomic_power_down(dc,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1607

hws->funcs.plane_atomic_disable(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1644

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1645

if (hws->funcs.init_blank != NULL) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1646

hws->funcs.init_blank(dc, tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1647

tg->funcs->lock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1649

tg->funcs->lock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1650

tg->funcs->set_blank(tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1666

if (hubbub->funcs->program_det_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1667

hubbub->funcs->program_det_size(hubbub, hubp->inst, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1668

if (hubbub->funcs->program_det_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1669

hubbub->funcs->program_det_segments(hubbub, hubp->inst, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1681

dc->res_pool->mpc->funcs->mpc_init_single_inst(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1697

pipe_ctx->stream_res.tg->funcs->is_tg_enabled(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1703

tg->funcs->tg_init(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1712

hubp->funcs->hubp_reset(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1713

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1730

hws->funcs.plane_atomic_disconnect(dc, context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1732

if (tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1733

tg->funcs->unlock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1740

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1741

if (tg->funcs->init_odm)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1742

tg->funcs->init_odm(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1745

tg->funcs->tg_init(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1763

if (hws->funcs.dsc_pg_control != NULL) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1778

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1779

if (tg->funcs->get_dsc_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1780

tg->funcs->get_dsc_status(tg, &optc_dsc_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1784

tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1794

dc->res_pool->dscs[i]->funcs->dsc_read_state(dc->res_pool->dscs[i], &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1800

hws->funcs.dsc_pg_control(hws, dc->res_pool->dscs[i]->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1817

if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1818

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1827

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1828

dc->res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1830

if (!dcb->funcs->is_accelerated_mode(dcb))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1831

hws->funcs.disable_vga(dc->hwseq);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1834

hws->funcs.bios_golden_init(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1843

(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1847

(res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1868

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1871

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1872

link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1874

if (link->link_enc->funcs->fec_is_active &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1875

link->link_enc->funcs->fec_is_active(link->link_enc))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1883

if (hws->funcs.enable_power_gating_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1884

hws->funcs.enable_power_gating_plane(dc->hwseq, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1892

if (dcb->funcs->is_accelerated_mode(dcb) || !dc->config.seamless_boot_edp_requested) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1894

hws->funcs.init_pipes(dc, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1895

if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1896

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1906

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1913

backlight = link->panel_cntl->funcs->hw_init(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1919

abm->funcs->abm_init(abm, backlight, user_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1922

dmcu->funcs->dmcu_init(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1926

abm->dmcu_is_running = dmcu->funcs->is_dmcu_initialized(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1930

if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1931

dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1935

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1936

dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1941

if (dc->clk_mgr && dc->clk_mgr->funcs->notify_wm_ranges)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1942

dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1961

if (edp_link && edp_link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1962

edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1963

dc->hwseq->funcs.edp_backlight_control &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1964

dc->hwseq->funcs.power_down &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1966

dc->hwseq->funcs.edp_backlight_control(edp_link, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1967

dc->hwseq->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1973

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1974

link->link_enc->funcs->is_dig_enabled(link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1975

dc->hwseq->funcs.power_down) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1976

dc->hwseq->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1988

if (dc->clk_mgr->funcs->set_low_power_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1989

dc->clk_mgr->funcs->set_low_power_state(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2016

if (hws->funcs.enable_stream_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2017

hws->funcs.enable_stream_gating(dc, pipe_ctx_old);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2019

old_clk->funcs->cs_power_down(old_clk);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

204

if (tg->funcs->is_tg_enabled && !tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2064

pipe_ctx->plane_res.hubp->funcs->hubp_program_surface_flip_and_addr(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

209

cur_frame = tg->funcs->get_frame_count(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2094

dpp_base->funcs->dpp_program_input_lut(dpp_base, &plane_state->gamma_correction);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2099

dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_sRGB);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2102

dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_xvYCC);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2105

dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2108

dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_USER_PWL);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2110

dpp_base->funcs->dpp_program_degamma_pwl(dpp_base, &dpp_base->degamma_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2118

dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2122

dpp_base->funcs->dpp_program_degamma_pwl(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2172

dpp->funcs->dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_SRGB);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2180

dpp->funcs->dpp_program_regamma_pwl(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2184

dpp->funcs->dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_BYPASS);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2209

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2212

pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2214

pipe->stream_res.tg->funcs->unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2217

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2308

dc->res_pool->mpc->funcs->cursor_lock(dc->res_pool->mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2325

if (!tg->funcs->is_counter_moving(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2330

if (tg->funcs->did_triggered_reset_occur(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2339

tg->funcs->wait_for_state(tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2340

tg->funcs->wait_for_state(tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

244

!tg->funcs->is_tg_enabled(tg) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2451

dc->res_pool->dp_clock_source->funcs->override_dp_pix_clk) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2460

grouped_pipes[i]->stream_res.tg->funcs->get_hw_timing(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2463

dc->res_pool->dp_clock_source->funcs->get_dp_dto_frequency_100hz(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2498

dc->res_pool->dp_clock_source->funcs->override_dp_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2502

dc->res_pool->dp_clock_source->funcs->get_dp_dto_frequency_100hz(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2535

tg->funcs->get_otg_active_size(tg, &width, &height);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2537

if (!tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2542

if (opp->funcs->opp_program_dpg_dimensions)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2543

opp->funcs->opp_program_dpg_dimensions(opp, width, 2*(height) + 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2562

grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2578

tg->funcs->get_otg_active_size(tg, &width, &height);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2579

if (opp->funcs->opp_program_dpg_dimensions)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2580

opp->funcs->opp_program_dpg_dimensions(opp, width, height);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2607

tg->funcs->get_otg_active_size(tg, &width, &height);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2609

if (!tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2614

if (opp->funcs->opp_program_dpg_dimensions)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2615

opp->funcs->opp_program_dpg_dimensions(opp, width, 2*(height) + 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2632

grouped_pipes[i]->stream_res.tg->funcs->enable_reset_trigger(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2650

grouped_pipes[i]->stream_res.tg->funcs->disable_reset_trigger(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2660

tg->funcs->get_otg_active_size(tg, &width, &height);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2661

if (opp->funcs->opp_program_dpg_dimensions)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2662

opp->funcs->opp_program_dpg_dimensions(opp, width, height);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2679

if (grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2680

grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2773

hubp->funcs->hubp_set_vm_system_aperture_settings(hubp, &apt);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2774

hubp->funcs->hubp_set_vm_context0_settings(hubp, &vm0);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

278

dc->res_pool->hubbub->funcs->wm_read_state(dc->res_pool->hubbub, &wm);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2786

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2795

pipe_ctx->plane_res.hubp->funcs->hubp_clk_cntl(pipe_ctx->plane_res.hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2798

pipe_ctx->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2806

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2812

&& pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2813

pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int(pipe_ctx->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2838

pipe_ctx->plane_res.dpp->funcs->dpp_set_gamut_remap(pipe_ctx->plane_res.dpp, &adjust);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2868

pipe_ctx->plane_res.dpp->funcs->dpp_set_csc_adjustment(pipe_ctx->plane_res.dpp, matrix);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2883

if (pipe_ctx->plane_res.dpp->funcs->dpp_set_csc_adjustment != NULL) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2899

pipe_ctx->plane_res.dpp->funcs->dpp_set_csc_adjustment(pipe_ctx->plane_res.dpp, matrix);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2903

if (pipe_ctx->plane_res.dpp->funcs->dpp_set_csc_default != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2904

pipe_ctx->plane_res.dpp->funcs->dpp_set_csc_default(pipe_ctx->plane_res.dpp, colorspace);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2913

dpp->funcs->dpp_setup(dpp,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2922

if (dpp->funcs->dpp_program_bias_and_scale)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2923

dpp->funcs->dpp_program_bias_and_scale(dpp, &bns_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2932

if (mpc->funcs->set_bg_color) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2933

mpc->funcs->set_bg_color(mpc, &(pipe_ctx->visual_confirm_color), mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2985

mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2991

new_mpcc = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2994

mpc->funcs->remove_mpcc(mpc, mpc_tree_params, new_mpcc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2997

mpc->funcs->assert_mpcc_idle_before_connect(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3001

new_mpcc = mpc->funcs->insert_plane(dc->res_pool->mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3023

pipe_ctx->plane_res.dpp->funcs->dpp_set_scaler(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3079

dpp->funcs->dpp_dppclk_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3085

dc->res_pool->dccg->funcs->update_dpp_dto(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3100

hubp->funcs->hubp_vtg_sel(hubp, pipe_ctx->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3102

hubp->funcs->hubp_setup(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3108

hubp->funcs->hubp_setup_interdependent(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

311

hubp->funcs->hubp_read_state(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3123

hws->funcs.update_mpcc(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3136

hubp->funcs->mem_program_viewport(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3173

hubp->funcs->hubp_program_surface_config(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3189

hubp->funcs->set_blank(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3215

if (stream_res->tg->funcs->set_blank_color)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3216

stream_res->tg->funcs->set_blank_color(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3221

if (stream_res->tg->funcs->set_blank)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3222

stream_res->tg->funcs->set_blank(stream_res->tg, blank);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3225

stream_res->abm->funcs->set_abm_level(stream_res->abm, stream->abm_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3229

if (stream_res->tg->funcs->set_blank) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3230

stream_res->tg->funcs->wait_for_state(stream_res->tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3231

stream_res->tg->funcs->set_blank(stream_res->tg, blank);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3250

pipe_ctx->plane_res.dpp->funcs->dpp_set_hdr_multiplier(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3264

pipe_ctx->stream_res.tg->funcs->program_global_sync(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3272

pipe_ctx->stream_res.tg->funcs->set_vtg_params(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3275

if (hws->funcs.setup_vupdate_interrupt)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3276

hws->funcs.setup_vupdate_interrupt(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3278

hws->funcs.blank_pixel_data(dc, pipe_ctx, blank);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3286

hws->funcs.set_hdr_multiplier(pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3291

hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3300

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3320

!tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3330

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3331

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3393

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3398

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3403

dc->optimized_required = hubbub->funcs->program_watermarks(hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3419

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3431

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3436

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3441

hubbub->funcs->program_watermarks(hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3458

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3486

if ((tg != NULL) && tg->funcs) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3489

if (tg->funcs->set_static_screen_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3490

tg->funcs->set_static_screen_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3505

pipe_ctx[i]->stream_res.tg->funcs->get_position(pipe_ctx[i]->stream_res.tg, position);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3522

pipe_ctx[i]->stream_res.tg->funcs->

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3583

pipe_ctx->stream_res.opp->funcs->opp_program_stereo(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3588

pipe_ctx->stream_res.tg->funcs->program_stereo(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3617

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3628

pipe_ctx->stream_res.tg->funcs->is_tg_enabled(pipe_ctx->stream_res.tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3629

res_pool->mpc->funcs->wait_for_idle(res_pool->mpc, mpcc_inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3631

hubp->funcs->set_blank(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3636

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3664

flip_pending = pipe_ctx->plane_res.hubp->funcs->hubp_is_flip_pending(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3673

tg->funcs->is_stereo_left_eye) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3675

!tg->funcs->is_stereo_left_eye(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3681

unsigned int cur_frame = wa_tg->funcs->get_frame_count(wa_tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3686

hubbub->funcs->allow_self_refresh_control(hubbub, !dc->debug.disable_stutter);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3697

hubbub->funcs->update_dchub(hubbub, dh_data);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3920

hubp->funcs->set_cursor_position(hubp, &pos_cpy, &param);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3921

dpp->funcs->set_cursor_position(dpp, &pos_cpy, &param, hubp->curs_attr.width, hubp->curs_attr.height);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3928

pipe_ctx->plane_res.hubp->funcs->set_cursor_attributes(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3930

pipe_ctx->plane_res.dpp->funcs->set_cursor_attributes(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3942

if (!pipe_ctx->plane_res.dpp->funcs->set_optional_cursor_attributes)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3957

pipe_ctx->plane_res.dpp->funcs->set_optional_cursor_attributes(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4060

tg->funcs->setup_vertical_interrupt0(tg, start_line, end_line);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4073

if (tg->funcs->setup_vertical_interrupt2)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4074

tg->funcs->setup_vertical_interrupt2(tg, start_line);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4093

pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(link, pipe_ctx->stream_res.stream_enc, &params);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4097

hws->funcs.edp_backlight_control(link, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4106

pipe_ctx->stream_res.stream_enc->funcs->send_immediate_sdp_message(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4122

if (!dc->clk_mgr || !dc->clk_mgr->funcs->get_clock)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4125

dc->clk_mgr->funcs->get_clock(dc->clk_mgr,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4145

if (dc->clk_mgr->funcs->update_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4146

dc->clk_mgr->funcs->update_clocks(dc->clk_mgr,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4158

if (dc->clk_mgr && dc->clk_mgr->funcs->get_clock)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4159

dc->clk_mgr->funcs->get_clock(dc->clk_mgr, context, clock_type, clock_cfg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4172

hubp->funcs->hubp_read_state(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4199

if (clear_tiling && hubp->funcs->hubp_clear_tiling)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4200

hubp->funcs->hubp_clear_tiling(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4203

hubp->funcs->hubp_program_surface_flip_and_addr(hubp,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

472

dpp->funcs->dpp_read_state(dpp, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

473

if (dpp->funcs->dpp_get_gamut_remap) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

474

dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

547

pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

570

pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

605

pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

641

if (tg->funcs->read_otg_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

642

tg->funcs->read_otg_state(tg, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

651

if (pool->opps[i]->funcs->dpg_is_blanked)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

652

s.blank_enabled = pool->opps[i]->funcs->dpg_is_blanked(pool->opps[i]);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

654

s.blank_enabled = tg->funcs->is_blanked(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

685

tg->funcs->clear_optc_underflow(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

696

dsc->funcs->dsc_read_state(dsc, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

712

if (enc->funcs->enc_read_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

713

enc->funcs->enc_read_state(enc, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

733

if (lenc && lenc->funcs->read_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

734

lenc->funcs->read_state(lenc, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

765

hpo_frl_stream_enc->funcs->read_state(hpo_frl_stream_enc, &hpo_se_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

767

hpo_frl_link_enc->funcs->read_state(hpo_frl_link_enc, &hpo_le_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

802

if (hpo_dp_stream_enc && hpo_dp_stream_enc->funcs->read_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

803

hpo_dp_stream_enc->funcs->read_state(hpo_dp_stream_enc, &hpo_dp_se_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

833

if (hpo_dp_link_enc->funcs->read_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

834

hpo_dp_link_enc->funcs->read_state(hpo_dp_link_enc, &hpo_dp_le_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

863

if (tg->funcs->is_optc_underflow_occurred(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

864

tg->funcs->clear_optc_underflow(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

868

if (hubp->funcs->hubp_get_underflow_status(hubp)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

869

hubp->funcs->hubp_clear_underflow(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_init.c

128

dc->hwseq->funcs = dcn10_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1004

if (mpc->funcs->power_on_mpc_mem_pwr)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1005

mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1008

if (mpc->funcs->set_output_csc != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1009

mpc->funcs->set_output_csc(mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1014

if (mpc->funcs->set_ocsc_default != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1015

mpc->funcs->set_ocsc_default(mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1035

if (mpc->funcs->power_on_mpc_mem_pwr)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1036

mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1038

&& mpc->funcs->set_output_gamma) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1056

if (mpc->funcs->set_output_gamma)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1057

mpc->funcs->set_output_gamma(mpc, mpcc_id, params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1077

result = dpp_base->funcs->dpp_program_blnd_lut(dpp_base, blend_lut);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1098

result = dpp_base->funcs->dpp_program_shaper_lut(dpp_base, shaper_lut);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1100

result = dpp_base->funcs->dpp_program_3dlut(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1103

result = dpp_base->funcs->dpp_program_3dlut(dpp_base, NULL);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1121

hws->funcs.set_shaper_3dlut(pipe_ctx, plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1122

hws->funcs.set_blend_lut(pipe_ctx, plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1131

dpp_base->funcs->dpp_program_degamma_pwl(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1136

dpp_base->funcs->dpp_program_degamma_pwl(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1147

dpp_base->funcs->dpp_set_degamma(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1151

dpp_base->funcs->dpp_set_degamma(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1155

dpp_base->funcs->dpp_set_degamma(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1159

dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_USER_PWL);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1161

dpp_base->funcs->dpp_program_degamma_pwl(dpp_base, &dpp_base->degamma_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1169

dpp_base->funcs->dpp_set_degamma(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1177

dpp_base->funcs->dpp_set_degamma(dpp_base,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1200

pipe_ctx->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1205

pipe_ctx->stream_res.tg->funcs->set_odm_bypass(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1270

stream_res->abm->funcs->set_abm_level(stream_res->abm, stream->abm_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1283

if (hws->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1284

hws->funcs.dpp_root_clock_control(hws, pipe_ctx->plane_res.dpp->inst, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1292

if (hws->funcs.dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1293

hws->funcs.dpp_pg_control(hws, pipe_ctx->plane_res.dpp->inst, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1295

if (hws->funcs.hubp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1296

hws->funcs.hubp_pg_control(hws, pipe_ctx->plane_res.hubp->inst, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1317

pipe_ctx->plane_res.hubp->funcs->hubp_clk_cntl(pipe_ctx->plane_res.hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1320

pipe_ctx->plane_res.hubp->funcs->hubp_init(pipe_ctx->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1323

pipe_ctx->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1373

pipe_ctx->plane_res.hubp->funcs->hubp_set_vm_system_aperture_settings(pipe_ctx->plane_res.hubp, &apt);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1379

&& pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1380

pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int(pipe_ctx->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1422

if (!temp_pipe->plane_res.hubp->funcs->hubp_is_flip_pending(temp_pipe->plane_res.hubp))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1472

pipe->stream_res.tg->funcs->triplebuffer_lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1474

pipe->stream_res.tg->funcs->triplebuffer_unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1477

pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1479

if (dc->hwseq->funcs.perform_3dlut_wa_unlock)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1480

dc->hwseq->funcs.perform_3dlut_wa_unlock(pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1482

pipe->stream_res.tg->funcs->unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1689

dpp->funcs->dpp_dppclk_control(dpp, false, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1692

dccg->funcs->update_dpp_dto(dccg, dpp->inst, pipe_ctx->plane_res.bw.dppclk_khz);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1700

hubp->funcs->hubp_vtg_sel(hubp, pipe_ctx->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1702

if (hubp->funcs->hubp_setup2) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1703

hubp->funcs->hubp_setup2(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1709

hubp->funcs->hubp_setup(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1718

if (pipe_ctx->update_flags.bits.unbounded_req && hubp->funcs->set_unbounded_requesting)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1719

hubp->funcs->set_unbounded_requesting(hubp, pipe_ctx->unbounded_req);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1722

if (hubp->funcs->hubp_setup_interdependent2) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1723

hubp->funcs->hubp_setup_interdependent2(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1727

hubp->funcs->hubp_setup_interdependent(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

173

pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1743

dpp->funcs->dpp_setup(dpp,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1750

if (dpp->funcs->set_cursor_matrix) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1751

dpp->funcs->set_cursor_matrix(dpp,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1755

if (dpp->funcs->dpp_program_bias_and_scale) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1757

dpp->funcs->dpp_program_bias_and_scale(dpp, &bns_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1766

hws->funcs.update_mpcc(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1777

pipe_ctx->plane_res.dpp->funcs->dpp_set_scaler(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1786

hubp->funcs->mem_program_viewport(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1793

if (hubp->funcs->hubp_program_mcache_id_and_split_coordinate)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1794

hubp->funcs->hubp_program_mcache_id_and_split_coordinate(hubp, &pipe_ctx->mcache_regs);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1842

hubp->funcs->hubp_program_surface_config(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1870

hubp->funcs->set_blank(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1872

if (pipe_mall_type == SUBVP_PHANTOM && hubp->funcs->phantom_hubp_post_enable)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1873

hubp->funcs->phantom_hubp_post_enable(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1908

pipe_ctx->stream_res.tg->funcs->program_global_sync(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1917

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1919

pipe_ctx->stream_res.tg->funcs->set_vtg_params(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1922

if (hws->funcs.setup_vupdate_interrupt)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1923

hws->funcs.setup_vupdate_interrupt(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1938

hws->funcs.blank_pixel_data(dc, pipe_ctx,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1949

hws->funcs.update_odm(dc, context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1952

if (hws->funcs.enable_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1953

hws->funcs.enable_plane(dc, pipe_ctx, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1957

if (dc->res_pool->hubbub->funcs->force_wm_propagate_to_pipes)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1958

dc->res_pool->hubbub->funcs->force_wm_propagate_to_pipes(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1962

if (dc->res_pool->hubbub->funcs->program_det_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1963

dc->res_pool->hubbub->funcs->program_det_size(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1966

if (dc->res_pool->hubbub->funcs->program_det_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1967

dc->res_pool->hubbub->funcs->program_det_segments(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1978

hws->funcs.set_hdr_multiplier(pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1985

hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1994

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2004

pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2010

pipe_ctx->stream_res.opp->funcs->opp_program_fmt(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2020

pipe_ctx->stream_res.abm->funcs->set_abm_level(pipe_ctx->stream_res.abm,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2030

odm_opp->funcs->opp_program_bit_depth_reduction(odm_opp, &params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2079

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2080

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2102

if (tg->funcs->enable_crtc) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2103

if (dc->hwseq->funcs.blank_pixel_data)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2104

dc->hwseq->funcs.blank_pixel_data(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2106

tg->funcs->enable_crtc(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2116

hws->funcs.blank_pixel_data(dc, &context->res_ctx.pipe_ctx[i], true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2134

if (hubbub->funcs->program_det_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2135

hubbub->funcs->program_det_size(hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2137

if (dc->res_pool->hubbub->funcs->program_det_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2138

dc->res_pool->hubbub->funcs->program_det_segments(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2141

hws->funcs.plane_atomic_disconnect(dc, dc->current_state,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2152

hws->funcs.update_odm)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2153

hws->funcs.update_odm(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2165

if (hws->funcs.program_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2166

hws->funcs.program_pipe(dc, pipe, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2191

&& hws->funcs.program_all_writeback_pipes_in_tree)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2192

hws->funcs.program_all_writeback_pipes_in_tree(dc, pipe->stream, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2198

pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start &&

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2201

pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start(pipe->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2225

if (dc->hwseq->funcs.dsc_pg_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2226

is_dsc_ungated = dc->hwseq->funcs.dsc_pg_status(dc->hwseq, dsc->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2235

dsc->funcs->dsc_wait_disconnect_pending_clear(dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2236

dsc->funcs->dsc_disable(dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2237

if (dccg->funcs->set_ref_dscclk)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2238

dccg->funcs->set_ref_dscclk(dccg, dsc->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2278

&& hubp->funcs->hubp_is_flip_pending(hubp); j++)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2297

if (tg->funcs->get_optc_double_buffer_pending) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2299

&& tg->funcs->get_optc_double_buffer_pending(tg); j++)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2305

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2306

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2344

if (hwseq->funcs.update_force_pstate)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2345

dc->hwseq->funcs.update_force_pstate(dc, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2350

if (hwseq->funcs.program_mall_pipe_config)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2351

hwseq->funcs.program_mall_pipe_config(dc, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2355

dc->res_pool->hubbub->funcs->apply_DEDCN21_147_wa(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2365

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2368

hwseq->wa_state.disallow_self_refresh_during_multi_plane_transition_applied_on_frame = tg->funcs->get_frame_count(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2382

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2401

dc->optimized_required |= hubbub->funcs->program_watermarks(hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2411

if (hubbub->funcs->program_compbuf_size) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2420

hubbub->funcs->program_compbuf_size(hubbub, compbuf_size_kb, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2442

hubbub->funcs->program_watermarks(hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2452

dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, dc->clk_mgr->bw_params->dc_mode_softmax_memclk);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2456

if (hubbub->funcs->program_compbuf_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2457

hubbub->funcs->program_compbuf_size(hubbub, context->bw_ctx.bw.dcn.compbuf_size_kb, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2468

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2477

if (pipe_ctx->stream && pipe_ctx->plane_res.hubp->funcs->program_extended_blank

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2480

pipe_ctx->plane_res.hubp->funcs->program_extended_blank(pipe_ctx->plane_res.hubp,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2494

if (dc->res_pool->funcs->validate_bandwidth(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING) != DC_OK)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2510

pipe_ctx->stream_res.tg->funcs->program_global_sync(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2518

pipe_ctx->stream_res.tg->funcs->set_vtg_params(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2522

hws->funcs.blank_pixel_data(dc, pipe_ctx, blank);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2524

if (hws->funcs.setup_vupdate_interrupt)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2525

hws->funcs.setup_vupdate_interrupt(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2528

pipe_ctx->plane_res.hubp->funcs->hubp_setup(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2555

optc->funcs->set_dwb_source(optc, wb_info->dwb_pipe_inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2557

mcif_wb->funcs->config_mcif_buf(mcif_wb, &wb_info->mcif_buf_params, wb_info->dwb_params.dest_height);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2558

mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2560

mcif_wb->funcs->enable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2562

dwb->funcs->enable(dwb, &wb_info->dwb_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2577

dwb->funcs->disable(dwb);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2578

mcif_wb->funcs->disable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2590

if (!opp->funcs->dpg_is_pending(opp))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2601

return opp->funcs->dpg_is_blanked(opp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2610

return hubp->funcs->dmdata_status_done(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2620

hws->funcs.dsc_pg_control(hws, pipe_ctx->stream_res.dsc->inst, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2622

hws->funcs.dsc_pg_control(hws, odm_pipe->stream_res.dsc->inst, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2635

hws->funcs.dsc_pg_control(hws, pipe_ctx->stream_res.dsc->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2637

hws->funcs.dsc_pg_control(hws, odm_pipe->stream_res.dsc->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2660

hubp->funcs->dmdata_set_attributes(hubp, &attr);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2683

dc->res_pool->hubbub->funcs->init_vm_ctx(dc->res_pool->hubbub, &config, vmid);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2702

return dc->res_pool->hubbub->funcs->init_dchub_sys_ctx(dc->res_pool->hubbub, &config);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2748

pipe_ctx->plane_res.hubp->funcs->hubp_program_surface_flip_and_addr(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2771

pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2785

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_unblank(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2791

if (pipe_ctx->stream_res.stream_enc->funcs->dp_set_odm_combine)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2792

pipe_ctx->stream_res.stream_enc->funcs->dp_set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2794

pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(link, pipe_ctx->stream_res.stream_enc, &params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2803

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_unblank(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2808

hws->funcs.edp_backlight_control(link, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2820

if (tg->funcs->setup_vertical_interrupt2)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2821

tg->funcs->setup_vertical_interrupt2(tg, start_line);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2855

pipe_ctx->stream_res.audio->funcs->az_disable(pipe_ctx->stream_res.audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2875

pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2877

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2878

if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2879

pipe_ctx->stream_res.tg->funcs->set_odm_bypass(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

288

if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

289

pipe_ctx->stream_res.tg->funcs->set_gsl(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2898

if (dccg && dccg->funcs->set_dtbclk_dto)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2899

dccg->funcs->set_dtbclk_dto(dccg, &dto_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

292

if (pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

293

pipe_ctx->stream_res.tg->funcs->set_gsl_source_select(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2941

if (hws->funcs.enable_stream_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2942

hws->funcs.enable_stream_gating(dc, pipe_ctx_old);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2944

old_clk->funcs->cs_power_down(old_clk);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3003

mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3009

new_mpcc = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3012

mpc->funcs->remove_mpcc(mpc, mpc_tree_params, new_mpcc);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3015

mpc->funcs->assert_mpcc_idle_before_connect(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3019

new_mpcc = mpc->funcs->insert_plane(dc->res_pool->mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

303

if (pipe_ctx && pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_control_surface_gsl)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

304

pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_control_surface_gsl(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3062

dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3063

dccg->funcs->set_dtbclk_dto(dccg, &dto_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3065

dccg->funcs->set_dpstreamclk(dccg, DTBCLK0, tg->inst, dp_hpo_inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3069

dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3071

dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3074

if (dccg->funcs->enable_symclk_se

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3080

if (dccg->funcs->disable_symclk_se)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3081

dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3084

dccg->funcs->enable_symclk_se(dccg, stream_enc->stream_enc_inst,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3089

if (dc->res_pool->dccg->funcs->set_pixel_rate_div)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3090

dc->res_pool->dccg->funcs->set_pixel_rate_div(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3120

tg->funcs->set_early_control(tg, early_control);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3142

if (!stream_enc || !stream_enc->funcs->set_dynamic_metadata)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3145

stream_enc->funcs->set_dynamic_metadata(stream_enc, enable,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3156

if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3157

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3160

if (res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3161

res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3164

if (hws->funcs.enable_power_gating_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3165

hws->funcs.enable_power_gating_plane(hws, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3173

if (hws->funcs.dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3174

hws->funcs.dccg_init(hws);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3176

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->refclk_setup)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3177

dc->res_pool->dccg->funcs->refclk_setup(dc->res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3185

if (tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3192

if (tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3193

tg->funcs->lock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3199

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3203

res_pool->mpc->funcs->mpc_init(res_pool->mpc);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3230

hubp->funcs->hubp_init(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3237

hws->funcs.plane_atomic_disconnect(dc, context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3247

if (tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3248

tg->funcs->unlock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3263

tg->funcs->tg_init(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3266

if (dc->res_pool->hubbub->funcs->init_crb)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3267

dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3279

pipe_ctx->stream_res.opp->funcs->opp_set_disp_pattern_generator(pipe_ctx->stream_res.opp, test_pattern,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

363

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

364

dc->res_pool->dccg->funcs->dccg_init(dc->res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

384

if (pipe_ctx->plane_res.hubp && pipe_ctx->plane_res.hubp->funcs) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

385

pipe_ctx->plane_res.hubp->funcs->hubp_enable_tripleBuffer(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

410

tg->funcs->get_otg_active_size(tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

415

tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

424

if (opp->funcs->dpg_is_blanked && opp->funcs->dpg_is_blanked(opp))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

437

opp->funcs->opp_set_disp_pattern_generator(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

448

bottom_opp->funcs->opp_set_disp_pattern_generator(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

459

hws->funcs.wait_for_blank_complete(opp);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

609

if (dpp5 && dpp5->funcs->dpp_force_disable_cursor)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

610

dpp5->funcs->dpp_force_disable_cursor(dpp5);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

712

if (hubp->funcs->hubp_update_mall_sel)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

713

hubp->funcs->hubp_update_mall_sel(hubp, 0, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

717

hubp->funcs->hubp_clk_cntl(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

719

dpp->funcs->dpp_dppclk_control(dpp, false, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

723

hws->funcs.plane_atomic_power_down(dc,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

753

if (tg && tg->funcs->disable_phantom_crtc)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

754

tg->funcs->disable_phantom_crtc(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

835

pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

841

if (dc->res_pool->dccg->funcs->set_pixel_rate_div)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

842

dc->res_pool->dccg->funcs->set_pixel_rate_div(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

864

pipe_ctx->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

872

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

874

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

888

if (dccg->funcs->set_dtbclk_p_src)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

889

dccg->funcs->set_dtbclk_p_src(dccg, DTBCLK0, tg->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

895

dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

896

dccg->funcs->set_dtbclk_dto(dccg, &dto_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

907

if (dc->hwseq->funcs.PLAT_58856_wa && (!dc_is_dp_signal(stream->signal)))

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

908

dc->hwseq->funcs.PLAT_58856_wa(context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

910

pipe_ctx->stream_res.tg->funcs->program_timing(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

922

if (pipe_ctx->stream_res.tg->funcs->set_h_timing_div_manual_mode) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

924

pipe_ctx->stream_res.tg->funcs->set_h_timing_div_manual_mode(pipe_ctx->stream_res.tg, manual_mode);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

931

if (mpc->funcs->set_out_rate_control) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

933

mpc->funcs->set_out_rate_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

94

dpp->funcs->dpp_read_state(dpp, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

942

opp_heads[i]->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

945

opp_heads[i]->stream_res.opp->funcs->opp_program_left_edge_extra_pixel(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

95

if (dpp->funcs->dpp_get_gamut_remap) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

951

hws->funcs.blank_pixel_data(dc, pipe_ctx, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

954

if (false == pipe_ctx->stream_res.tg->funcs->enable_crtc(pipe_ctx->stream_res.tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

96

dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

974

if (pipe_ctx->stream_res.tg->funcs->set_static_screen_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

975

pipe_ctx->stream_res.tg->funcs->set_static_screen_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

987

if (pipe_ctx->stream_res.tg->funcs->phantom_crtc_post_enable)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

988

pipe_ctx->stream_res.tg->funcs->phantom_crtc_post_enable(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c

146

dc->hwseq->funcs = dcn20_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

152

pipe_ctx->plane_res.hubp->funcs->hubp_program_surface_flip_and_addr(

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

183

tg->funcs->get_otg_active_size(tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

188

tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

192

opp->funcs->opp_set_disp_pattern_generator(

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

202

hws->funcs.wait_for_blank_complete(opp);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

234

if (res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

235

res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

237

if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

238

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

240

hws->funcs.bios_golden_init(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

247

(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

251

(res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

269

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

278

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

286

if (tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

287

tg->funcs->lock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

293

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

297

res_pool->mpc->funcs->mpc_init(res_pool->mpc);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

324

hubp->funcs->hubp_init(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

329

hws->funcs.plane_atomic_disconnect(dc, context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

339

if (tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

340

tg->funcs->unlock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

355

tg->funcs->tg_init(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

361

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

365

if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

366

dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

370

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

371

dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

394

if (mpc->funcs->get_mpcc_for_dpp_from_secondary)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

395

mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp_from_secondary(mpc_tree_params, dpp_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

398

if (mpcc_to_remove != NULL && mpc->funcs->remove_mpcc_from_secondary) {

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

399

mpc->funcs->remove_mpcc_from_secondary(mpc, mpc_tree_params, mpcc_to_remove);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

404

mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, dpp_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

406

mpc->funcs->remove_mpcc(mpc, mpc_tree_params, mpcc_to_remove);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

418

if (hubp->funcs->hubp_disconnect)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

419

hubp->funcs->hubp_disconnect(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

422

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

490

mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

495

if (mpc->funcs->get_mpcc_for_dpp_from_secondary)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

496

remove_mpcc = mpc->funcs->get_mpcc_for_dpp_from_secondary(mpc_tree_params, dpp_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

499

if (remove_mpcc != NULL && mpc->funcs->remove_mpcc_from_secondary)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

500

mpc->funcs->remove_mpcc_from_secondary(mpc, mpc_tree_params, remove_mpcc);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

503

remove_mpcc = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, dpp_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

507

mpc->funcs->remove_mpcc(mpc, mpc_tree_params, remove_mpcc);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

510

mpc->funcs->assert_mpcc_idle_before_connect(

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

515

new_mpcc = mpc->funcs->insert_plane(dc->res_pool->mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

541

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

545

pipe->stream_res.tg->funcs->triplebuffer_lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

547

pipe->stream_res.tg->funcs->triplebuffer_unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

550

pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

552

pipe->stream_res.tg->funcs->unlock(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

556

hws->funcs.verify_allow_pstate_change_high(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

565

pipe_ctx->plane_res.hubp->funcs->set_cursor_attributes(

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

567

pipe_ctx->plane_res.dpp->funcs->set_cursor_attributes(

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

591

hubp->funcs->dmdata_set_attributes(hubp, &attr);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

609

if (pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing))

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

612

pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(link, pipe_ctx->stream_res.stream_enc, &params);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

616

hws->funcs.edp_backlight_control(link, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_init.c

135

dc->hwseq->funcs = dcn201_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

101

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

111

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

197

if (abm->funcs && abm->funcs->set_pipe_ex) {

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

198

abm->funcs->set_pipe_ex(abm, otg_inst, SET_ABM_PIPE_IMMEDIATELY_DISABLE,

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

207

panel_cntl->funcs->store_backlight_level(panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

229

if (abm->funcs && abm->funcs->set_pipe_ex) {

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

230

abm->funcs->set_pipe_ex(abm,

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

264

if (abm->funcs && abm->funcs->set_pipe_ex) {

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

265

abm->funcs->set_pipe_ex(abm,

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

278

if (abm->funcs && abm->funcs->set_backlight_level_pwm)

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

279

abm->funcs->set_backlight_level_pwm(abm, backlight_pwm_u16_16,

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

84

return dc->res_pool->hubbub->funcs->init_dchub_sys_ctx(dc->res_pool->hubbub, &config);

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

91

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->is_s0i3_golden_init_wa_done)

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

92

return !dc->res_pool->dccg->funcs->is_s0i3_golden_init_wa_done(dc->res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_init.c

149

dc->hwseq->funcs = dcn21_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1227

dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1228

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1241

pipe_ctx->stream_res.opp->funcs->opp_set_disp_pattern_generator(pipe_ctx->stream_res.opp, test_pattern,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1258

dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1273

if (tg && tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1277

if (tg->funcs->get_optc_double_buffer_pending)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1278

pending_updates |= tg->funcs->get_optc_double_buffer_pending(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1280

if (tg->funcs->get_otg_double_buffer_pending)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1281

pending_updates |= tg->funcs->get_otg_double_buffer_pending(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1283

if (tg->funcs->get_pipe_update_pending && pipe_ctx->plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1284

pending_updates |= tg->funcs->get_pipe_update_pending(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1302

if (hubbub->funcs->hubbub_read_reg_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1303

hubbub->funcs->hubbub_read_reg_state(hubbub, out_data->hubbub_reg_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1317

if (hubp->funcs->hubp_read_reg_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1318

hubp->funcs->hubp_read_reg_state(hubp, out_data->hubp_reg_state[i]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1321

if (dpp->funcs->dpp_read_reg_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1322

dpp->funcs->dpp_read_reg_state(dpp, out_data->dpp_reg_state[i]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1325

if (opp->funcs->opp_read_reg_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1326

opp->funcs->opp_read_reg_state(opp, out_data->opp_reg_state[i]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1329

if (dsc->funcs->dsc_read_reg_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1330

dsc->funcs->dsc_read_reg_state(dsc, out_data->dsc_reg_state[i]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1333

if (mpc->funcs->mpc_read_reg_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1334

mpc->funcs->mpc_read_reg_state(mpc, i, out_data->mpc_reg_state[i]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1337

if (optc->funcs->optc_read_reg_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1338

optc->funcs->optc_read_reg_state(optc, out_data->optc_reg_state[i]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1341

if (dccg->funcs->dccg_read_reg_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1342

dccg->funcs->dccg_read_reg_state(dccg, out_data->dccg_reg_state[i]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

186

pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

252

result = dpp_base->funcs->dpp_program_blnd_lut(dpp_base, blend_lut);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

294

acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

299

result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

304

result = mpc->funcs->program_shaper(mpc, shaper_lut,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

311

mpc->funcs->release_rmu(mpc, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

335

dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

345

result = dpp_base->funcs->dpp_program_gamcor_lut(dpp_base, params);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

348

if (dpp_base->funcs->dpp_program_blnd_lut)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

349

hws->funcs.set_blend_lut(pipe_ctx, plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

350

if (dpp_base->funcs->dpp_program_shaper_lut &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

351

dpp_base->funcs->dpp_program_3dlut)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

352

hws->funcs.set_shaper_3dlut(pipe_ctx, plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

377

pipe_ctx->plane_res.dpp->funcs->dpp_set_gamut_remap(pipe_ctx->plane_res.dpp,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

392

mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

408

if (ret == false && mpc->funcs->set_output_gamma) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

423

if (mpc->funcs->set_output_gamma)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

424

mpc->funcs->set_output_gamma(mpc, mpcc_id, params);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

447

dc->res_pool->mpc->funcs->set_dwb_mux(dc->res_pool->mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

450

mcif_wb->funcs->config_mcif_buf(mcif_wb, mcif_buf_params, wb_info->dwb_params.dest_height);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

451

mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

468

dwb->funcs->update(dwb, &wb_info->dwb_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

506

mcif_wb->funcs->warmup_mcif(mcif_wb, &warmup_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

522

mcif_wb->funcs->warmup_mcif(mcif_wb, &warmup_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

550

mcif_wb->funcs->enable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

552

dwb->funcs->enable(dwb, &wb_info->dwb_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

569

dwb->funcs->disable(dwb);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

571

mcif_wb->funcs->disable_mcif(mcif_wb);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

573

dc->res_pool->mpc->funcs->disable_dwb_mux(dc->res_pool->mpc, dwb_pipe_inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

630

if (dwb->funcs->is_enabled(dwb)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

655

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

656

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

659

if (res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

660

res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

662

if (!dcb->funcs->is_accelerated_mode(dcb)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

663

hws->funcs.bios_golden_init(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

664

hws->funcs.disable_vga(dc->hwseq);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

691

(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

695

(res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

715

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

718

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

719

link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

721

if (link->link_enc->funcs->fec_is_active &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

722

link->link_enc->funcs->fec_is_active(link->link_enc))

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

730

if (hws->funcs.enable_power_gating_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

731

hws->funcs.enable_power_gating_plane(dc->hwseq, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

739

if (dcb->funcs->is_accelerated_mode(dcb) || !dc->config.seamless_boot_edp_requested) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

740

hws->funcs.init_pipes(dc, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

741

if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

742

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

758

if (edp_link && edp_link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

759

edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

761

hws->funcs.power_down &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

764

hws->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

770

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

771

link->link_enc->funcs->is_dig_enabled(link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

772

hws->funcs.power_down) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

773

hws->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

784

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

791

backlight = link->panel_cntl->funcs->hw_init(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

798

abms[i]->funcs->abm_init(abms[i], backlight, user_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

802

if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

803

dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

807

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

808

dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

813

if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

814

dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

816

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->notify_wm_ranges)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

817

dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

820

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->set_hard_max_memclk &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

822

dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

824

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

825

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

827

if (dc->res_pool->hubbub->funcs->init_crb)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

828

dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

842

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->set_avmute(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

846

pipe_ctx->stream_res.stream_enc->funcs->set_avmute(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

855

if (enable && pipe_ctx->stream_res.tg->funcs->is_tg_enabled(pipe_ctx->stream_res.tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

858

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

860

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

861

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

887

pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

891

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->update_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

895

if (pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

896

pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

900

pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

929

if (!hpo_enc || !hpo_enc->funcs->set_dynamic_metadata)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

932

hpo_enc->funcs->set_dynamic_metadata(hpo_enc, enable,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

935

if (!stream_enc || !stream_enc->funcs->set_dynamic_metadata)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

938

stream_enc->funcs->set_dynamic_metadata(stream_enc, enable,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

95

dpp->funcs->dpp_read_state(dpp, &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

953

(!dc->res_pool->dccg->funcs->enable_hdmicharclk))

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

957

link->hpo_frl_link_enc->funcs->enable_frl_phy_output(

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

97

if (dpp->funcs->dpp_get_gamut_remap) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

98

dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c

156

dc->hwseq->funcs = dcn30_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_init.c

152

dc->hwseq->funcs = dcn301_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_init.c

38

dc->hwseq->funcs.dpp_pg_control = dcn302_dpp_pg_control;

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_init.c

39

dc->hwseq->funcs.hubp_pg_control = dcn302_hubp_pg_control;

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_init.c

40

dc->hwseq->funcs.dsc_pg_control = dcn302_dsc_pg_control;

drivers/gpu/drm/amd/display/dc/hwss/dcn303/dcn303_init.c

36

dc->hwseq->funcs.dpp_pg_control = dcn303_dpp_pg_control;

drivers/gpu/drm/amd/display/dc/hwss/dcn303/dcn303_init.c

37

dc->hwseq->funcs.hubp_pg_control = dcn303_hubp_pg_control;

drivers/gpu/drm/amd/display/dc/hwss/dcn303/dcn303_init.c

38

dc->hwseq->funcs.dsc_pg_control = dcn303_dsc_pg_control;

drivers/gpu/drm/amd/display/dc/hwss/dcn303/dcn303_init.c

39

dc->hwseq->funcs.enable_power_gating_plane = dcn303_enable_power_gating_plane;

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

100

if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerdown) {

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

104

dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

106

dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->vpg);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

108

dc->res_pool->hpo_frl_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_frl_stream_enc[i]->vpg);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

123

if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

124

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

126

if (!dcb->funcs->is_accelerated_mode(dcb)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

127

hws->funcs.bios_golden_init(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

128

if (hws->funcs.disable_vga)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

129

hws->funcs.disable_vga(dc->hwseq);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

132

if (res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

133

res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

143

(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

147

(res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

170

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

173

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

174

link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

176

if (link->link_enc->funcs->fec_is_active &&

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

177

link->link_enc->funcs->fec_is_active(link->link_enc))

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

185

if (hws->funcs.enable_power_gating_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

186

hws->funcs.enable_power_gating_plane(dc->hwseq, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

194

if (dcb->funcs->is_accelerated_mode(dcb) || !dc->config.seamless_boot_edp_requested) {

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

204

if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) {

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

205

tg->funcs->get_optc_source(tg, &num_opps,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

217

hws->funcs.init_pipes(dc, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

218

if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

219

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

226

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

233

backlight = link->panel_cntl->funcs->hw_init(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

240

abms[i]->funcs->abm_init(abms[i], backlight, user_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

244

if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

245

dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, dc->debug.enable_mem_low_power.bits.i2c);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

247

if (hws->funcs.setup_hpo_hw_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

248

hws->funcs.setup_hpo_hw_control(hws, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

252

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

253

dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

258

if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

259

dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

261

if (dc->clk_mgr && dc->clk_mgr->funcs->notify_wm_ranges)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

262

dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

264

if (dc->clk_mgr && dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

265

dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

267

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

268

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

271

if (dc->res_pool->hubbub->funcs->init_crb)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

272

dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

294

hws->ctx->dc->res_pool->dccg->funcs->enable_dsc &&

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

296

hws->ctx->dc->res_pool->dccg->funcs->enable_dsc(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

337

if (hws->ctx->dc->res_pool->dccg->funcs->disable_dsc && !power_on)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

338

hws->ctx->dc->res_pool->dccg->funcs->disable_dsc(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

398

pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

402

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->update_hdmi_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

406

if (pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets_sdp_line_num)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

407

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets_sdp_line_num(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

414

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

419

if (pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

420

pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

427

pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

522

return dc->res_pool->hubbub->funcs->init_dchub_sys_ctx(dc->res_pool->hubbub, &config);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

553

pipe_ctx->stream_res.tg->funcs->set_dsc_config(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

557

pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

559

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

560

if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

561

pipe_ctx->stream_res.tg->funcs->set_odm_bypass(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

609

pipe_ctx->stream_res.audio->funcs->az_disable(pipe_ctx->stream_res.audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

652

dc->res_pool->hubbub->funcs->program_det_size &&

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

653

dc->res_pool->hubbub->funcs->wait_for_det_apply) {

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

654

dc->res_pool->hubbub->funcs->program_det_size(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

657

dc->res_pool->hubbub->funcs->wait_for_det_apply(

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

662

if (hws->funcs.enable_stream_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

663

hws->funcs.enable_stream_gating(dc, pipe_ctx_old);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

665

old_clk->funcs->cs_power_down(old_clk);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

694

pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control(pipe_ctx[i]->stream_res.tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

96

dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

97

dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode(dc->res_pool->mpc);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c

158

dc->hwseq->funcs = dcn31_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

113

dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

114

dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

119

odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

120

odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

129

pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

135

pipe_ctx->stream_res.tg->funcs->set_dsc_config(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

140

dsc->funcs->dsc_disable(pipe_ctx->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

143

odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

187

pipe_ctx->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

192

pipe_ctx->stream_res.tg->funcs->set_odm_bypass(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

195

if (mpc->funcs->set_out_rate_control) {

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

197

mpc->funcs->set_out_rate_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

206

odm_pipe->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

221

dsc->funcs->dsc_disconnect(dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

236

hws->ctx->dc->res_pool->dccg->funcs->enable_dsc &&

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

238

hws->ctx->dc->res_pool->dccg->funcs->enable_dsc(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

290

if (hws->ctx->dc->res_pool->dccg->funcs->disable_dsc && !power_on)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

291

hws->ctx->dc->res_pool->dccg->funcs->disable_dsc(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

335

two_pix_per_container = pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

379

if (hws->funcs.calculate_dccg_k1_k2_values)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

380

hws->funcs.calculate_dccg_k1_k2_values(pipe_ctx, &k1_div, &k2_div);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

392

&& pipe->stream_res.stream_enc->funcs->dig_source_otg

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

393

&& pipe->stream_res.tg->inst == pipe->stream_res.stream_enc->funcs->dig_source_otg(pipe->stream_res.stream_enc)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

395

&& pipe->stream->link->link_enc->funcs->is_dig_enabled

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

396

&& pipe->stream->link->link_enc->funcs->is_dig_enabled(pipe->stream->link->link_enc)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

397

&& pipe->stream_res.stream_enc->funcs->is_fifo_enabled

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

398

&& pipe->stream_res.stream_enc->funcs->is_fifo_enabled(pipe->stream_res.stream_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

422

pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

428

hws->ctx->dc->res_pool->dccg->funcs->trigger_dio_fifo_resync(hws->ctx->dc->res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

448

pipe->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

453

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

463

if (hws->ctx->dc->res_pool->dccg->funcs->dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

464

hws->ctx->dc->res_pool->dccg->funcs->dpp_root_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

493

pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

518

else if (dmcu != NULL && dmcu->funcs->lock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

519

dmcu->funcs->lock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

528

if (dmcu != NULL && dmcu->funcs->unlock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

529

dmcu->funcs->unlock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

560

if (dpp && dpp->funcs->dpp_force_disable_cursor)

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

561

dpp->funcs->dpp_force_disable_cursor(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

94

if (dsc->funcs->dsc_read_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

95

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c

165

dc->hwseq->funcs = dcn314_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1015

if (dc->debug.using_dml2 && dc->res_pool->funcs->update_bw_bounding_box &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1018

dc->res_pool->funcs->update_bw_bounding_box(dc, dc->clk_mgr->bw_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1043

bool should_use_dto_dscclk = (dccg->funcs->set_dto_dscclk != NULL) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1061

if (dsc->funcs->dsc_read_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1062

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1082

dccg->funcs->set_dto_dscclk(dccg, dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1083

dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1084

dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1092

dccg->funcs->set_dto_dscclk(dccg, odm_dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1093

odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1094

odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1099

pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1105

pipe_ctx->stream_res.tg->funcs->set_dsc_config(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1110

dsc->funcs->dsc_disconnect(pipe_ctx->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1113

odm_pipe->stream_res.dsc->funcs->dsc_disconnect(odm_pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1157

pipe_ctx->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1162

pipe_ctx->stream_res.tg->funcs->set_odm_bypass(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1166

odm_pipe->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1169

odm_pipe->stream_res.opp->funcs->opp_program_left_edge_extra_pixel(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1186

dsc->funcs->dsc_disconnect(dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1195

dc->hwseq->funcs.blank_pixel_data(dc, pipe_ctx, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1205

two_pix_per_container = pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1225

if ((odm_combine_factor == 2) || (hws->funcs.is_dp_dig_pixel_rate_div_policy &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1226

hws->funcs.is_dp_dig_pixel_rate_div_policy(pipe_ctx)))

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1251

if (hws->funcs.calculate_dccg_k1_k2_values)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1252

hws->funcs.calculate_dccg_k1_k2_values(pipe_ctx, &k1_div, &k2_div);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1280

pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1286

hws->ctx->dc->res_pool->dccg->funcs->trigger_dio_fifo_resync(hws->ctx->dc->res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1306

pipe->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1311

pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1340

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_unblank(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1344

if (pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1349

if (pipe_ctx->stream_res.stream_enc->funcs->dp_set_odm_combine)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1350

pipe_ctx->stream_res.stream_enc->funcs->dp_set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1352

pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(link, pipe_ctx->stream_res.stream_enc, &params);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1358

else if (pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing) || params.opp_cnt > 1)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1361

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_unblank(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1366

hws->funcs.edp_backlight_control(link, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1407

pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1432

else if (dmcu != NULL && dmcu->funcs->lock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1433

dmcu->funcs->lock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1442

if (dmcu != NULL && dmcu->funcs->unlock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1443

dmcu->funcs->unlock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1548

bool is_dsc_ungated = hws->funcs.dsc_pg_status(hws, dsc->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1552

hws->funcs.dsc_pg_control(hws, dsc->inst, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1556

hws->funcs.dsc_pg_control(hws, dsc->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1585

if (hws->funcs.reset_back_end_for_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1586

hws->funcs.reset_back_end_for_pipe(dc, pipe_ctx_old, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1587

if (hws->funcs.enable_stream_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1588

hws->funcs.enable_stream_gating(dc, pipe_ctx_old);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1590

old_clk->funcs->cs_power_down(old_clk);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1611

old_pipe->stream_res.tg->funcs->wait_for_state(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1614

old_pipe->stream_res.tg->funcs->wait_for_state(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1641

if (hws->funcs.apply_single_controller_ctx_to_hw)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1642

status = hws->funcs.apply_single_controller_ctx_to_hw(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1650

if (hws->funcs.resync_fifo_dccg_dio)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1651

hws->funcs.resync_fifo_dccg_dio(hws, dc, context, i);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1676

tg->funcs->get_otg_active_size(tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1681

tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1710

if (opp && opp->funcs->opp_set_disp_pattern_generator)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1711

opp->funcs->opp_set_disp_pattern_generator(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1722

if (bottom_opp && bottom_opp->funcs->opp_set_disp_pattern_generator) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1723

bottom_opp->funcs->opp_set_disp_pattern_generator(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1732

hws->funcs.wait_for_blank_complete(bottom_opp);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1737

hws->funcs.wait_for_blank_complete(opp);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1832

dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1860

!tg->funcs->is_tg_enabled(tg) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1877

if (hubbub->funcs->program_compbuf_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1878

hubbub->funcs->program_compbuf_size(hubbub, context->bw_ctx.bw.dcn.compbuf_size_kb, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

250

} else if (dc->res_pool->funcs->calculate_mall_ways_from_bytes) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

251

num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, mall_ss_size_bytes);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

416

pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VBLANK);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

471

result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

475

result = mpc->funcs->program_shaper(mpc, shaper_lut, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

504

mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

518

mpc->funcs->program_shaper(mpc, lut_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

522

result = mpc->funcs->program_3dlut(mpc, &plane_state->lut3d_func.lut_3d, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

524

result = mpc->funcs->program_3dlut(mpc, NULL, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

549

dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

559

dpp_base->funcs->dpp_program_gamcor_lut(dpp_base, params);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

563

hws->funcs.set_mcm_luts)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

564

result = hws->funcs.set_mcm_luts(pipe_ctx, plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

583

if (ret == false && mpc->funcs->set_output_gamma) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

598

if (mpc->funcs->set_output_gamma)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

599

mpc->funcs->set_output_gamma(mpc, mpcc_id, params);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

626

if (hubp && hubp->funcs->hubp_update_force_pstate_disallow)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

627

hubp->funcs->hubp_update_force_pstate_disallow(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

628

if (hubp && hubp->funcs->hubp_update_force_cursor_pstate_disallow)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

629

hubp->funcs->hubp_update_force_cursor_pstate_disallow(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

663

if (hubp && hubp->funcs->hubp_update_force_pstate_disallow)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

664

hubp->funcs->hubp_update_force_pstate_disallow(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

665

if (hubp && hubp->funcs->hubp_update_force_cursor_pstate_disallow)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

666

hubp->funcs->hubp_update_force_cursor_pstate_disallow(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

685

if (pipe->stream && pipe->plane_state && hubp && hubp->funcs->hubp_update_mall_sel) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

709

hubp->funcs->hubp_update_mall_sel(hubp, 1, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

712

hubp->funcs->hubp_update_mall_sel(hubp,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

737

if (hws && hws->funcs.update_mall_sel)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

738

hws->funcs.update_mall_sel(dc, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

745

if (pipe->stream && hubp && hubp->funcs->hubp_prepare_subvp_buffering) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

752

hubp->funcs->hubp_prepare_subvp_buffering(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

761

if (!dc->clk_mgr || !dc->clk_mgr->bw_params || !dc->clk_mgr->funcs)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

775

} else if (dc->clk_mgr->funcs->get_dispclk_from_dentist) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

781

clocks->dispclk_khz = dc->clk_mgr->funcs->get_dispclk_from_dentist(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

784

if (dc->clk_mgr->funcs->update_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

785

dc->clk_mgr->funcs->update_clocks(dc->clk_mgr,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

801

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

802

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

805

if (res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

806

res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

808

if (!dcb->funcs->is_accelerated_mode(dcb)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

809

hws->funcs.bios_golden_init(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

810

hws->funcs.disable_vga(dc->hwseq);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

829

(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

833

(res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

853

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

856

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

857

link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

860

if (link->link_enc->funcs->fec_is_active &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

861

link->link_enc->funcs->fec_is_active(link->link_enc))

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

869

if (hws->funcs.enable_power_gating_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

870

hws->funcs.enable_power_gating_plane(dc->hwseq, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

881

if (dcb->funcs->is_accelerated_mode(dcb) || !dc->config.seamless_boot_edp_requested) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

888

hws->funcs.init_pipes(dc, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

890

if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

891

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

920

if (edp_link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

921

edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

923

hws->funcs.power_down &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

926

hws->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

934

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

935

link->link_enc->funcs->is_dig_enabled(link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

936

hws->funcs.power_down) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

937

hws->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

948

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

955

backlight = link->panel_cntl->funcs->hw_init(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

961

if (abms[i] != NULL && abms[i]->funcs != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

962

abms[i]->funcs->abm_init(abms[i], backlight, user_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

966

if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

967

dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

971

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

972

dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

977

if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

978

dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

980

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->notify_wm_ranges)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

981

dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

983

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->set_hard_max_memclk &&

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

985

dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

987

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

988

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

991

if (dc->res_pool->hubbub->funcs->init_crb)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

992

dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

994

if (dc->res_pool->hubbub->funcs->set_request_limit && dc->config.sdpif_request_limit_words_per_umc > 0)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

995

dc->res_pool->hubbub->funcs->set_request_limit(dc->res_pool->hubbub, dc->ctx->dc_bios->vram_info.num_chans, dc->config.sdpif_request_limit_words_per_umc);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c

176

dc->hwseq->funcs = dcn32_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

102

dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

103

dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode(dc->res_pool->mpc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1031

if (tg && tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

105

if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerdown) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

108

dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

111

dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->vpg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

114

dc->res_pool->hpo_frl_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_frl_stream_enc[i]->vpg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

123

if (dc->res_pool->pg_cntl->funcs->print_pg_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1236

if (pg_cntl->funcs->hpo_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1237

pg_cntl->funcs->hpo_pg_control(pg_cntl, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

124

dc->res_pool->pg_cntl->funcs->print_pg_status(dc->res_pool->pg_cntl, debug_func, debug_log);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1244

if (pg_cntl->funcs->hubp_dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1245

pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, pipe_idx, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1251

if (pg_cntl->funcs->dsc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1252

pg_cntl->funcs->dsc_pg_control(pg_cntl, i, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1258

if (pg_cntl->funcs->dsc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1259

pg_cntl->funcs->dsc_pg_control(pg_cntl, i, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1264

if (pg_cntl->funcs->hubp_dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1265

pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1271

if (pg_cntl->funcs->plane_otg_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1272

pg_cntl->funcs->plane_otg_pg_control(pg_cntl, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1313

if (pg_cntl->funcs->plane_otg_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1314

pg_cntl->funcs->plane_otg_pg_control(pg_cntl, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1319

if (pg_cntl->funcs->dsc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1320

pg_cntl->funcs->dsc_pg_control(pg_cntl, i, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1327

if (pg_cntl->funcs->hubp_dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1328

pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1333

if (pg_cntl->funcs->dsc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1334

pg_cntl->funcs->dsc_pg_control(pg_cntl, i, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1339

if (pg_cntl->funcs->hpo_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1340

pg_cntl->funcs->hpo_pg_control(pg_cntl, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1356

if (dc->hwseq->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1357

dc->hwseq->funcs.dpp_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1360

if (dc->hwseq->funcs.dpstream_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1361

dc->hwseq->funcs.dpstream_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1366

if (dc->hwseq->funcs.physymclk_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1367

dc->hwseq->funcs.physymclk_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1370

if (dc->hwseq->funcs.hdmistream_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1371

dc->hwseq->funcs.hdmistream_root_clock_control(dc->hwseq, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1376

if (dc->res_pool->dccg->funcs->enable_dsc)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1377

dc->res_pool->dccg->funcs->enable_dsc(dc->res_pool->dccg, i);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1379

if (dc->res_pool->dccg->funcs->disable_dsc)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1380

dc->res_pool->dccg->funcs->disable_dsc(dc->res_pool->dccg, i);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1389

if (dc->hwseq->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1390

dc->hwseq->funcs.dpp_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1393

if (dc->hwseq->funcs.dpstream_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1394

dc->hwseq->funcs.dpstream_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1399

if (dc->hwseq->funcs.physymclk_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1400

dc->hwseq->funcs.physymclk_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1403

if (dc->hwseq->funcs.hdmistream_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1404

dc->hwseq->funcs.hdmistream_root_clock_control(dc->hwseq, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1474

if ((tg != NULL) && tg->funcs) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1488

if (tg->funcs->set_static_screen_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1489

tg->funcs->set_static_screen_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1507

pipe_ctx[i]->stream_res.tg->funcs->

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1533

if ((pipe_ctx[i]->stream_res.tg != NULL) && pipe_ctx[i]->stream_res.tg->funcs &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1534

pipe_ctx[i]->stream_res.tg->funcs->set_long_vtotal)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1535

pipe_ctx[i]->stream_res.tg->funcs->set_long_vtotal(pipe_ctx[i]->stream_res.tg, &params);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

154

if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

155

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

159

if (!dcb->funcs->is_accelerated_mode(dcb)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

161

hws->funcs.bios_golden_init(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

165

if (res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

166

res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

176

(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1795

pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

180

(res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1817

else if (dmcu != NULL && dmcu->funcs->lock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1818

dmcu->funcs->lock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1832

if (dmcu != NULL && dmcu->funcs->unlock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1833

dmcu->funcs->unlock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

203

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

206

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

207

link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

209

if (link->link_enc->funcs->fec_is_active &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

210

link->link_enc->funcs->fec_is_active(link->link_enc))

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

218

if (res_pool->hubbub && res_pool->hubbub->funcs->dchubbub_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

219

res_pool->hubbub->funcs->dchubbub_init(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

226

if (dcb->funcs->is_accelerated_mode(dcb) || !dc->config.seamless_boot_edp_requested) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

236

if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

237

tg->funcs->get_optc_source(tg, &num_opps,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

249

hws->funcs.init_pipes(dc, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

252

if (dc->res_pool->hubbub->funcs->allow_self_refresh_control &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

254

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

260

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

267

backlight = link->panel_cntl->funcs->hw_init(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

273

if (abms[i] != NULL && abms[i]->funcs != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

274

abms[i]->funcs->abm_init(abms[i], backlight, user_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

279

if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

280

dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, !dc->debug.enable_mem_low_power.bits.i2c);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

282

if (hws->funcs.setup_hpo_hw_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

283

hws->funcs.setup_hpo_hw_control(hws, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

291

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->enable_memory_low_power)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

292

dc->res_pool->dccg->funcs->enable_memory_low_power(dc->res_pool->dccg, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

294

if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

295

dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

297

if (dc->clk_mgr && dc->clk_mgr->funcs->notify_wm_ranges)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

298

dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

300

if (dc->clk_mgr && dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

301

dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

305

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

306

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

309

if (dc->res_pool->hubbub->funcs->init_crb)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

310

dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

312

if (dc->res_pool->hubbub->funcs->set_request_limit && dc->config.sdpif_request_limit_words_per_umc > 0)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

313

dc->res_pool->hubbub->funcs->set_request_limit(dc->res_pool->hubbub, dc->ctx->dc_bios->vram_info.num_chans, dc->config.sdpif_request_limit_words_per_umc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

323

if (dc->res_pool->pg_cntl->funcs->init_pg_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

324

dc->res_pool->pg_cntl->funcs->init_pg_status(dc->res_pool->pg_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

353

if (dsc->funcs->dsc_read_state) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

354

dsc->funcs->dsc_read_state(dsc, &dsc_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

371

dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

372

dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

377

odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

378

odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

387

pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

393

pipe_ctx->stream_res.tg->funcs->set_dsc_config(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

398

dsc->funcs->dsc_disable(pipe_ctx->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

401

odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

445

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_fifo_odm_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

446

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_fifo_odm_enabled(pipe_ctx->stream_res.hpo_frl_stream_enc))) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

448

pipe_ctx->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

453

pipe_ctx->stream_res.tg->funcs->set_odm_bypass(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

456

if (mpc->funcs->set_out_rate_control) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

458

mpc->funcs->set_out_rate_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

467

odm_pipe->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

483

dsc->funcs->dsc_disconnect(dsc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

493

if (hws->ctx->dc->res_pool->dccg->funcs->dpp_root_clock_control) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

494

hws->ctx->dc->res_pool->dccg->funcs->dpp_root_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

504

if (hws->ctx->dc->res_pool->dccg->funcs->set_dpstreamclk_root_clock_gating) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

505

hws->ctx->dc->res_pool->dccg->funcs->set_dpstreamclk_root_clock_gating(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

515

if (hws->ctx->dc->res_pool->dccg->funcs->set_hdmistreamclk_root_clock_gating) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

516

hws->ctx->dc->res_pool->dccg->funcs->set_hdmistreamclk_root_clock_gating(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

526

if (hws->ctx->dc->res_pool->dccg->funcs->set_physymclk_root_clock_gating) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

527

hws->ctx->dc->res_pool->dccg->funcs->set_physymclk_root_clock_gating(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

548

if (edp_link && edp_link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

549

edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

550

dc->hwseq->funcs.edp_backlight_control &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

551

dc->hwseq->funcs.power_down &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

553

dc->hwseq->funcs.edp_backlight_control(edp_link, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

554

dc->hwseq->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

560

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

561

link->link_enc->funcs->is_dig_enabled(link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

562

dc->hwseq->funcs.power_down) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

563

dc->hwseq->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

575

if (dc->clk_mgr->funcs->set_low_power_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

576

dc->clk_mgr->funcs->set_low_power_state(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

669

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

670

if (hws->funcs.init_blank != NULL) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

671

hws->funcs.init_blank(dc, tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

672

tg->funcs->lock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

674

tg->funcs->lock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

675

tg->funcs->set_blank(tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

691

if (hubbub->funcs->program_det_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

692

hubbub->funcs->program_det_size(hubbub, hubp->inst, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

693

if (hubbub->funcs->program_det_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

694

hubbub->funcs->program_det_segments(hubbub, hubp->inst, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

706

dc->res_pool->mpc->funcs->mpc_init_single_inst(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

722

pipe_ctx->stream_res.tg->funcs->is_tg_enabled(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

728

tg->funcs->tg_init(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

737

hubp->funcs->hubp_reset(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

738

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

755

hws->funcs.plane_atomic_disconnect(dc, context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

757

if (tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

758

tg->funcs->unlock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

765

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

766

if (tg->funcs->init_odm)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

767

tg->funcs->init_odm(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

770

tg->funcs->tg_init(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

788

if (pg_cntl->funcs->dsc_pg_control != NULL) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

803

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

804

if (tg->funcs->get_dsc_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

805

tg->funcs->get_dsc_status(tg, &optc_dsc_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

809

tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

821

dc->res_pool->dscs[i]->funcs->dsc_read_state(dc->res_pool->dscs[i], &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

828

pg_cntl->funcs->dsc_pg_control(pg_cntl, dc->res_pool->dscs[i]->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

841

pipe_ctx->plane_res.hubp->funcs->hubp_clk_cntl(pipe_ctx->plane_res.hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

844

pipe_ctx->plane_res.hubp->funcs->hubp_init(pipe_ctx->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

846

dpp->funcs->dpp_dppclk_control(dpp, false, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

848

pipe_ctx->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

861

pipe_ctx->plane_res.hubp->funcs->hubp_set_vm_system_aperture_settings(pipe_ctx->plane_res.hubp, &apt);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

868

&& pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

869

pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int(pipe_ctx->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

894

hubp->funcs->hubp_clk_cntl(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

896

dpp->funcs->dpp_dppclk_control(dpp, false, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

900

hubp->funcs->hubp_reset(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

901

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

928

if (dpp && dpp->funcs->dpp_force_disable_cursor)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

929

dpp->funcs->dpp_force_disable_cursor(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

931

if (hws->funcs.plane_atomic_disable)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

932

hws->funcs.plane_atomic_disable(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

937

if (tg && tg->funcs->disable_phantom_crtc)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

938

tg->funcs->disable_phantom_crtc(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c

183

dc->hwseq->funcs = dcn35_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

110

if (pg_cntl->funcs->dsc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

111

pg_cntl->funcs->dsc_pg_control(pg_cntl, i, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

116

if (pg_cntl->funcs->hubp_dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

117

pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

124

if (pg_cntl->funcs->plane_otg_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

125

pg_cntl->funcs->plane_otg_pg_control(pg_cntl, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

165

if (pg_cntl->funcs->plane_otg_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

166

pg_cntl->funcs->plane_otg_pg_control(pg_cntl, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

173

if (pg_cntl->funcs->hubp_dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

174

pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

178

if (pg_cntl->funcs->dsc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

179

pg_cntl->funcs->dsc_pg_control(pg_cntl, i, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c

171

dc->hwseq->funcs = dcn351_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1020

dccg->funcs->set_dpstreamclk(dccg, DPREFCLK, tg->inst, dp_hpo_inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1022

dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1024

dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1027

dccg->funcs->enable_symclk_se(dccg, stream_enc->stream_enc_inst,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1034

if (dc->res_pool->dccg->funcs->set_pixel_rate_div) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1035

dc->res_pool->dccg->funcs->set_pixel_rate_div(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1054

tg->funcs->set_early_control(tg, early_control);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1082

pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1104

else if (dmcu != NULL && dmcu->funcs->lock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1105

dmcu->funcs->lock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1119

else if (dmcu != NULL && dmcu->funcs->lock_phy)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1120

dmcu->funcs->unlock_phy(dmcu);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

116

mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

122

mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1295

hubp->funcs->set_cursor_position(hubp, &pos_cpy, &param);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1296

dpp->funcs->set_cursor_position(dpp, &pos_cpy, &param, hubp->curs_attr.width, hubp->curs_attr.height);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1337

else if (dc->res_pool->funcs->calculate_mall_ways_from_bytes)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1338

num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, mall_ss_size_bytes);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

138

mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1463

dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1467

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1476

dc->optimized_required |= hubbub->funcs->program_watermarks(hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1481

if (hubbub->funcs->program_arbiter) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1482

dc->optimized_required |= hubbub->funcs->program_arbiter(hubbub, &context->bw_ctx.bw.dcn.arb_regs, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1486

if (hubbub->funcs->program_compbuf_segments) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1490

hubbub->funcs->program_compbuf_segments(hubbub, compbuf_size, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1521

hubbub->funcs->program_watermarks(hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1526

if (hubbub->funcs->program_arbiter) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1527

hubbub->funcs->program_arbiter(hubbub, &context->bw_ctx.bw.dcn.arb_regs, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1535

dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, dc->clk_mgr->bw_params->dc_mode_softmax_memclk);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1539

if (hubbub->funcs->program_compbuf_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

154

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1540

hubbub->funcs->program_compbuf_segments(hubbub, context->bw_ctx.bw.dcn.arb_regs.compbuf_size, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1542

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

155

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1550

if (pipe_ctx->stream && pipe_ctx->plane_res.hubp->funcs->program_extended_blank

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1553

pipe_ctx->plane_res.hubp->funcs->program_extended_blank(pipe_ctx->plane_res.hubp,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

158

dc->caps.dcmode_power_limits_present = dc->clk_mgr->funcs->is_dc_mode_present &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

159

dc->clk_mgr->funcs->is_dc_mode_present(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

163

if (res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

164

res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1645

old_pipe->stream_res.dsc->funcs->dsc_disconnect(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1667

otg_master->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1672

otg_master->stream_res.tg->funcs->set_odm_bypass(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1677

opp_heads[i]->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1680

opp_heads[i]->stream_res.opp->funcs->opp_program_left_edge_extra_pixel(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1693

dc->hwseq->funcs.blank_pixel_data(dc, otg_master, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1722

bool should_use_dto_dscclk = (dc->res_pool->dccg->funcs->set_dto_dscclk != NULL) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1827

if (dc->hwseq->funcs.blank_pixel_data_sequence)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1828

dc->hwseq->funcs.blank_pixel_data_sequence(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1849

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_unblank(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1853

pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(link, pipe_ctx->stream_res.stream_enc, &params);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1858

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_unblank(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1863

hws->funcs.edp_backlight_control(link, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

187

(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1878

dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1879

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1883

dc->clk_mgr->funcs->update_clocks(dc->clk_mgr, dc->current_state, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1888

dc->clk_mgr->funcs->update_clocks(dc->clk_mgr, dc->current_state, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1919

hubbub->funcs->wait_for_det_update)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1920

hubbub->funcs->wait_for_det_update(hubbub, dpp_pipe->plane_res.hubp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1923

if (hubbub && opp_heads[slice_idx]->plane_res.hubp && hubbub->funcs->wait_for_det_update)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1924

hubbub->funcs->wait_for_det_update(hubbub, opp_heads[slice_idx]->plane_res.hubp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

193

(res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1942

!tg->funcs->is_tg_enabled(tg) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1954

!tg->funcs->is_tg_enabled(tg) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1975

!tg->funcs->is_tg_enabled(tg) ||

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2012

if (pipe_ctx->stream_res.tg->funcs->set_vupdate_keepout)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2013

pipe_ctx->stream_res.tg->funcs->set_vupdate_keepout(pipe_ctx->stream_res.tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2016

if (wa_pipes[i]->plane_res.hubp->funcs->hubp_enable_3dlut_fl)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2017

wa_pipes[i]->plane_res.hubp->funcs->hubp_enable_3dlut_fl(wa_pipes[i]->plane_res.hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2020

pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2021

if (pipe_ctx->stream_res.tg->funcs->wait_update_lock_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2022

pipe_ctx->stream_res.tg->funcs->wait_update_lock_status(pipe_ctx->stream_res.tg, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2025

if (wa_pipes[i]->plane_res.hubp->funcs->hubp_enable_3dlut_fl)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2026

wa_pipes[i]->plane_res.hubp->funcs->hubp_enable_3dlut_fl(wa_pipes[i]->plane_res.hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2029

if (pipe_ctx->stream_res.tg->funcs->set_vupdate_keepout)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2030

pipe_ctx->stream_res.tg->funcs->set_vupdate_keepout(pipe_ctx->stream_res.tg, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2032

pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2042

if (hubbub->funcs->program_compbuf_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2043

hubbub->funcs->program_compbuf_segments(hubbub, context->bw_ctx.bw.dcn.arb_regs.compbuf_size, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2074

pipe_ctx->stream_res.audio->funcs->az_disable(pipe_ctx->stream_res.audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2094

pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2096

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2097

if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2098

pipe_ctx->stream_res.tg->funcs->set_odm_bypass(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2116

if (dc->res_pool->dccg->funcs->set_dtbclk_p_src)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2117

dc->res_pool->dccg->funcs->set_dtbclk_p_src(dc->res_pool->dccg, REFCLK, pipe_ctx->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2142

if (tg->funcs->disable_otg_pwa) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2143

tg->funcs->disable_otg_pwa(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

216

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2174

if (hws->funcs.reset_back_end_for_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2175

hws->funcs.reset_back_end_for_pipe(dc, pipe_ctx_old, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2176

if (hws->funcs.enable_stream_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2177

hws->funcs.enable_stream_gating(dc, pipe_ctx_old);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2179

old_clk->funcs->cs_power_down(old_clk);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

219

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

220

link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2216

pipe_ctx->stream_res.tg->funcs->program_global_sync(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2225

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2227

pipe_ctx->stream_res.tg->funcs->set_vtg_params(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

223

if (link->link_enc->funcs->fec_is_active &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2230

if (hws->funcs.setup_vupdate_interrupt)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2231

hws->funcs.setup_vupdate_interrupt(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

224

link->link_enc->funcs->fec_is_active(link->link_enc))

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2246

hws->funcs.blank_pixel_data(dc, pipe_ctx,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2257

hws->funcs.update_odm(dc, context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2260

if (hws->funcs.enable_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2261

hws->funcs.enable_plane(dc, pipe_ctx, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2265

if (dc->res_pool->hubbub->funcs->force_wm_propagate_to_pipes)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2266

dc->res_pool->hubbub->funcs->force_wm_propagate_to_pipes(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2270

if (dc->res_pool->hubbub->funcs->program_det_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2271

dc->res_pool->hubbub->funcs->program_det_size(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2273

if (dc->res_pool->hubbub->funcs->program_det_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2274

dc->res_pool->hubbub->funcs->program_det_segments(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2285

hws->funcs.set_hdr_multiplier(pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2292

hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2301

hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2311

pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2317

pipe_ctx->stream_res.opp->funcs->opp_program_fmt(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

232

if (hws->funcs.enable_power_gating_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2327

pipe_ctx->stream_res.abm->funcs->set_abm_level(pipe_ctx->stream_res.abm,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

233

hws->funcs.enable_power_gating_plane(dc->hwseq, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2337

odm_opp->funcs->opp_program_bit_depth_reduction(odm_opp, &params);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2350

&& hws->funcs.program_cm_hist)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2351

hws->funcs.program_cm_hist(dc, pipe_ctx, pipe_ctx->plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2376

if (dc->hwseq->funcs.blank_pixel_data_sequence)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2377

dc->hwseq->funcs.blank_pixel_data_sequence(dc, pipe_ctx,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2403

if (hws->funcs.setup_vupdate_interrupt)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2408

if (hws->funcs.update_odm_sequence)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2409

hws->funcs.update_odm_sequence(dc, context, pipe_ctx, seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2418

if (dc->res_pool->hubbub->funcs->program_det_size) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2423

if (dc->res_pool->hubbub->funcs->program_det_segments) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

244

if (dcb->funcs->is_accelerated_mode(dcb) || !dc->config.seamless_boot_edp_requested) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2440

hws->funcs.set_hdr_multiplier_sequence(pipe_ctx, seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2505

&& hws->funcs.program_cm_hist) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

251

hws->funcs.init_pipes(dc, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

253

if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

254

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2548

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2549

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2571

if (tg->funcs->enable_crtc) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2572

if (dc->hwseq->funcs.blank_pixel_data)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2573

dc->hwseq->funcs.blank_pixel_data(dc, pipe, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2575

tg->funcs->enable_crtc(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2585

hws->funcs.blank_pixel_data(dc, &context->res_ctx.pipe_ctx[i], true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2603

if (hubbub->funcs->program_det_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2604

hubbub->funcs->program_det_size(hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2606

if (dc->res_pool->hubbub->funcs->program_det_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2607

dc->res_pool->hubbub->funcs->program_det_segments(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2610

hws->funcs.plane_atomic_disconnect(dc, dc->current_state,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2621

hws->funcs.update_odm)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2622

hws->funcs.update_odm(dc, context, pipe);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2634

if (hws->funcs.program_pipe)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2635

hws->funcs.program_pipe(dc, pipe, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2660

&& hws->funcs.program_all_writeback_pipes_in_tree)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2661

hws->funcs.program_all_writeback_pipes_in_tree(dc, pipe->stream, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2667

pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2670

pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start(pipe->plane_res.hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2710

&& hubp->funcs->hubp_is_flip_pending(hubp); j++)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2729

if (tg->funcs->get_optc_double_buffer_pending) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2731

&& tg->funcs->get_optc_double_buffer_pending(tg); j++)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2737

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2738

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2777

if (hwseq->funcs.update_force_pstate)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2778

dc->hwseq->funcs.update_force_pstate(dc, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2782

if (hwseq->funcs.program_mall_pipe_config)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2783

hwseq->funcs.program_mall_pipe_config(dc, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2787

dc->res_pool->hubbub->funcs->apply_DEDCN21_147_wa(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2798

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2802

tg->funcs->get_frame_count(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2815

if (dc->res_pool->funcs->validate_bandwidth(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING) != DC_OK)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

283

if (edp_link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2831

pipe_ctx->stream_res.tg->funcs->program_global_sync(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2839

pipe_ctx->stream_res.tg->funcs->set_vtg_params(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

284

edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2843

hws->funcs.blank_pixel_data(dc, pipe_ctx, blank);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2845

if (hws->funcs.setup_vupdate_interrupt)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2846

hws->funcs.setup_vupdate_interrupt(dc, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2849

if (pipe_ctx->plane_res.hubp->funcs->hubp_setup2)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2850

pipe_ctx->plane_res.hubp->funcs->hubp_setup2(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

286

hws->funcs.power_down &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

289

hws->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

299

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

300

link->link_enc->funcs->is_dig_enabled(link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

301

hws->funcs.power_down) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

302

hws->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3071

if (hws->funcs.dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3072

hws->funcs.dpp_pg_control(hws, dpp->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3074

if (hws->funcs.hubp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3075

hws->funcs.hubp_pg_control(hws, hubp->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3077

hubp->funcs->hubp_reset(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3078

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3087

if (hws->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3088

hws->funcs.dpp_root_clock_control(hws, dpp->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

313

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3198

mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, dpp_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

320

backlight = link->panel_cntl->funcs->hw_init(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3218

if (hubp->funcs->hubp_disconnect)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3223

dc->hwseq->funcs.verify_allow_pstate_change_high_sequence(dc, seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

329

if (link->ctx->dc_bios->funcs->get_i2c_info(dcb, link->link_id, &i2c_info) == BP_RESULT_OK) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3349

if (dwb->funcs->is_enabled(dwb)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

352

if (abms[i] != NULL && abms[i]->funcs != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

353

abms[i]->funcs->abm_init(abms[i], backlight, user_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3553

if (pipe_ctx->plane_res.hubp && pipe_ctx->plane_res.hubp->funcs->hubp_update_mall_sel)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3566

if (dc->hwseq->funcs.plane_atomic_power_down_sequence)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3567

dc->hwseq->funcs.plane_atomic_power_down_sequence(dc, pipe_ctx->plane_res.dpp,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

357

if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

358

dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3580

if (is_phantom && tg && tg->funcs->disable_phantom_crtc)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3601

if (dc->hwseq && dc->hwseq->funcs.dsc_pg_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3617

if (dccg && dccg->funcs->set_ref_dscclk)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

362

if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

363

dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3645

if (hws->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3649

if (hws->funcs.dc_ip_request_cntl)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3653

if (REG(DC_IP_REQUEST_CNTL) && hws->funcs.dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3657

if (REG(DC_IP_REQUEST_CNTL) && hws->funcs.hubp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3661

if (org_ip_request_cntl == 0 && hws->funcs.dc_ip_request_cntl)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3665

if (pipe_ctx->plane_res.hubp->funcs->hubp_clk_cntl)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3669

if (pipe_ctx->plane_res.hubp->funcs->hubp_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3673

if (pipe_ctx->stream_res.opp->funcs->opp_pipe_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3677

if (dc->vm_pa_config.valid && pipe_ctx->plane_res.hubp->funcs->hubp_set_vm_system_aperture_settings) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3686

&& pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_int) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

370

if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

371

dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3720

if (hubp->funcs->hubp_setup2) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3723

} else if (hubp->funcs->hubp_setup) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

373

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->notify_wm_ranges)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3730

if (pipe_ctx->update_flags.bits.unbounded_req && hubp->funcs->set_unbounded_requesting)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3735

if (hubp->funcs->hubp_setup_interdependent2)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3737

else if (hubp->funcs->hubp_setup_interdependent)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

374

dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3751

if (dpp->funcs->set_cursor_matrix) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3757

if (dpp->funcs->dpp_program_bias_and_scale)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

376

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3768

if (hws->funcs.update_mpcc_sequence)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3769

hws->funcs.update_mpcc_sequence(dc, pipe_ctx, seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

377

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3794

if (hubp->funcs->hubp_program_mcache_id_and_split_coordinate)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

380

if (dc->res_pool->hubbub->funcs->init_crb)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

381

dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

383

if (dc->res_pool->hubbub->funcs->set_request_limit && dc->config.sdpif_request_limit_words_per_umc > 0)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

384

dc->res_pool->hubbub->funcs->set_request_limit(dc->res_pool->hubbub, dc->ctx->dc_bios->vram_info.num_chans, dc->config.sdpif_request_limit_words_per_umc);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3871

if (pipe_mall_type == SUBVP_PHANTOM && hubp->funcs->phantom_hubp_post_enable)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3939

new_mpcc = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3982

dc->hwseq->funcs.verify_allow_pstate_change_high_sequence(dc, seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

399

dc->res_pool->funcs->update_bw_bounding_box &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3992

pipe_ctx->stream_res.tg->funcs->is_tg_enabled(pipe_ctx->stream_res.tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4002

dc->hwseq->funcs.verify_allow_pstate_change_high_sequence(dc, seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4014

if (tg->funcs->setup_vertical_interrupt2)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

402

dc->res_pool->funcs->update_bw_bounding_box(dc,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4049

if (pipe->stream && pipe->plane_state && hubp && hubp->funcs->hubp_update_mall_sel) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4090

if (pipe->stream && hubp && hubp->funcs->hubp_prepare_subvp_buffering) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4102

if (!hubbub->funcs->verify_allow_pstate_change_high)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4105

if (!hubbub->funcs->verify_allow_pstate_change_high(hubbub)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4126

if (hubp != NULL && hubp->funcs->set_hubp_blank_en)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4140

if (hubp != NULL && hubp->funcs->hubp_disable_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4151

if (hubp != NULL && hubp->funcs->hubp_disable_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4165

if (hubp != NULL && hubp->funcs->set_hubp_blank_en)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

422

mpc->funcs->set_movable_cm_location(mpc, MPCC_MOVABLE_CM_LOCATION_BEFORE, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

478

if (mpc->funcs->populate_lut)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

479

mpc->funcs->populate_lut(mpc, MCM_LUT_1DLUT, m_lut_params, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

481

if (mpc->funcs->program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

482

mpc->funcs->program_lut_mode(mpc, MCM_LUT_1DLUT, lut1d_xable && m_lut_params.pwl, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

498

if (mpc->funcs->mcm.populate_lut)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

499

mpc->funcs->mcm.populate_lut(mpc, m_lut_params, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

500

if (mpc->funcs->program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

501

mpc->funcs->program_lut_mode(mpc, MCM_LUT_SHAPER, MCM_LUT_ENABLE, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

509

if (hubp->funcs->hubp_enable_3dlut_fl)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

510

hubp->funcs->hubp_enable_3dlut_fl(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

514

if (mpc->funcs->populate_lut)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

515

mpc->funcs->populate_lut(mpc, MCM_LUT_3DLUT, m_lut_params, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

516

if (mpc->funcs->program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

517

mpc->funcs->program_lut_mode(mpc, MCM_LUT_3DLUT, lut3d_xable, lut_bank_a,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

539

if (mpc->funcs->mcm.is_config_supported &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

540

!mpc->funcs->mcm.is_config_supported(width))

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

543

if (mpc->funcs->program_lut_read_write_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

544

mpc->funcs->program_lut_read_write_control(mpc, MCM_LUT_3DLUT, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

545

if (mpc->funcs->program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

546

mpc->funcs->program_lut_mode(mpc, MCM_LUT_3DLUT, lut3d_xable, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

548

if (hubp->funcs->hubp_program_3dlut_fl_addr)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

549

hubp->funcs->hubp_program_3dlut_fl_addr(hubp, mcm_luts.lut3d_data.gpu_mem_params.addr);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

551

if (mpc->funcs->mcm.program_bit_depth)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

552

mpc->funcs->mcm.program_bit_depth(mpc, mcm_luts.lut3d_data.gpu_mem_params.bit_depth, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

572

if (hubp->funcs->hubp_program_3dlut_fl_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

573

hubp->funcs->hubp_program_3dlut_fl_mode(hubp, mode);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

575

if (hubp->funcs->hubp_program_3dlut_fl_addressing_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

576

hubp->funcs->hubp_program_3dlut_fl_addressing_mode(hubp, addr_mode);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

589

if (hubp->funcs->hubp_program_3dlut_fl_format)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

590

hubp->funcs->hubp_program_3dlut_fl_format(hubp, format);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

591

if (hubp->funcs->hubp_update_3dlut_fl_bias_scale &&

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

592

mpc->funcs->mcm.program_bias_scale) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

593

mpc->funcs->mcm.program_bias_scale(mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

597

hubp->funcs->hubp_update_3dlut_fl_bias_scale(hubp,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

613

if (hubp->funcs->hubp_program_3dlut_fl_crossbar)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

614

hubp->funcs->hubp_program_3dlut_fl_crossbar(hubp,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

619

if (mpc->funcs->mcm.program_lut_read_write_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

620

mpc->funcs->mcm.program_lut_read_write_control(mpc, MCM_LUT_3DLUT, lut_bank_a, true, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

622

if (mpc->funcs->mcm.program_3dlut_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

623

mpc->funcs->mcm.program_3dlut_size(mpc, width, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

625

if (mpc->funcs->update_3dlut_fast_load_select)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

626

mpc->funcs->update_3dlut_fast_load_select(mpc, mpcc_id, hubp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

628

if (hubp->funcs->hubp_enable_3dlut_fl)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

629

hubp->funcs->hubp_enable_3dlut_fl(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

631

if (mpc->funcs->program_lut_mode) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

632

mpc->funcs->program_lut_mode(mpc, MCM_LUT_SHAPER, MCM_LUT_DISABLE, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

633

mpc->funcs->program_lut_mode(mpc, MCM_LUT_3DLUT, MCM_LUT_DISABLE, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

634

mpc->funcs->program_lut_mode(mpc, MCM_LUT_1DLUT, MCM_LUT_DISABLE, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

647

if (hubp->funcs->hubp_enable_3dlut_fl) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

648

hubp->funcs->hubp_enable_3dlut_fl(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

668

mpc->funcs->set_movable_cm_location(mpc, MPCC_MOVABLE_CM_LOCATION_BEFORE, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

679

result = mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

692

result &= mpc->funcs->program_shaper(mpc, lut_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

695

if (mpc->funcs->program_3dlut) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

697

result &= mpc->funcs->program_3dlut(mpc, &plane_state->lut3d_func.lut_3d, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

699

result &= mpc->funcs->program_3dlut(mpc, NULL, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

719

if (ret == false && mpc->funcs->set_output_gamma) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

734

if (mpc->funcs->set_output_gamma)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

735

mpc->funcs->set_output_gamma(mpc, mpcc_id, params);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

76

if (dc->clk_mgr->funcs->get_dispclk_from_dentist) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

77

clocks->dispclk_khz = dc->clk_mgr->funcs->get_dispclk_from_dentist(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

790

if (pipe_ctx->stream_res.tg->funcs->set_h_timing_div_manual_mode) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

829

if (dc->res_pool->dccg->funcs->set_pixel_rate_div) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

830

dc->res_pool->dccg->funcs->set_pixel_rate_div(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

840

pipe_ctx->stream_res.tg->funcs->set_odm_combine(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

847

if (dc->res_pool->dccg->funcs->set_dtbclk_p_src) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

849

dc->res_pool->dccg->funcs->set_dtbclk_p_src(dc->res_pool->dccg, DPREFCLK, pipe_ctx->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

851

dc->res_pool->dccg->funcs->set_dtbclk_p_src(dc->res_pool->dccg, DTBCLK0, pipe_ctx->stream_res.tg->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

858

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

86

dc->clk_mgr->funcs->update_clocks(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

860

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

869

if (dc->hwseq->funcs.PLAT_58856_wa && (!dc_is_dp_signal(stream->signal)))

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

870

dc->hwseq->funcs.PLAT_58856_wa(context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

879

pipe_ctx->stream_res.tg->funcs->program_timing(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

890

if (pipe_ctx->stream_res.tg->funcs->set_h_timing_div_manual_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

891

pipe_ctx->stream_res.tg->funcs->set_h_timing_div_manual_mode(pipe_ctx->stream_res.tg, manual_mode);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

893

opp_heads[i]->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

896

opp_heads[i]->stream_res.opp->funcs->opp_program_left_edge_extra_pixel(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

902

pipe_ctx->stream_res.opp->funcs->opp_pipe_clock_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

906

hws->funcs.blank_pixel_data(dc, pipe_ctx, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

909

if (false == pipe_ctx->stream_res.tg->funcs->enable_crtc(pipe_ctx->stream_res.tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

914

hws->funcs.wait_for_blank_complete(pipe_ctx->stream_res.opp);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

921

if (pipe_ctx->stream_res.tg->funcs->set_static_screen_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

922

pipe_ctx->stream_res.tg->funcs->set_static_screen_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

934

if (pipe_ctx->stream_res.tg->funcs->phantom_crtc_post_enable)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

935

pipe_ctx->stream_res.tg->funcs->phantom_crtc_post_enable(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c

178

dc->hwseq->funcs = dcn401_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1048

if (tg && tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1052

if (dc->res_pool->pg_cntl->funcs->optc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1053

dc->res_pool->pg_cntl->funcs->optc_pg_control(dc->res_pool->pg_cntl, i, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

107

(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

113

(res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1265

if (pg_cntl->funcs->hpo_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1266

pg_cntl->funcs->hpo_pg_control(pg_cntl, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1272

if (pg_cntl->funcs->hubp_dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1273

pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1278

if (pg_cntl->funcs->mem_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1279

pg_cntl->funcs->mem_pg_control(pg_cntl, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1284

if (pg_cntl->funcs->dsc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1285

pg_cntl->funcs->dsc_pg_control(pg_cntl, i, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1299

if (pg_cntl->funcs->plane_otg_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1300

pg_cntl->funcs->plane_otg_pg_control(pg_cntl, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1304

if (pg_cntl->funcs->dio_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1305

pg_cntl->funcs->dio_pg_control(pg_cntl, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1312

if (pg_cntl->funcs->io_clk_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1313

pg_cntl->funcs->io_clk_pg_control(pg_cntl, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1356

if (pg_cntl->funcs->io_clk_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1357

pg_cntl->funcs->io_clk_pg_control(pg_cntl, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

136

link->link_enc->funcs->hw_init(link->link_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1361

if (pg_cntl->funcs->dio_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1362

pg_cntl->funcs->dio_pg_control(pg_cntl, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1374

if (pg_cntl->funcs->plane_otg_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1375

pg_cntl->funcs->plane_otg_pg_control(pg_cntl, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1380

if (pg_cntl->funcs->dsc_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1381

pg_cntl->funcs->dsc_pg_control(pg_cntl, i, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1386

if (pg_cntl->funcs->mem_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1387

pg_cntl->funcs->mem_pg_control(pg_cntl, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

139

if (link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1393

if (pg_cntl->funcs->hubp_dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1394

pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1398

if (pg_cntl->funcs->hpo_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1399

pg_cntl->funcs->hpo_pg_control(pg_cntl, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

140

link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1415

if (dc->hwseq->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1416

dc->hwseq->funcs.dpp_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1419

if (dc->hwseq->funcs.dpstream_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1420

dc->hwseq->funcs.dpstream_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1425

if (dc->hwseq->funcs.physymclk_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1426

dc->hwseq->funcs.physymclk_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1429

if (dc->hwseq->funcs.hdmistream_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

143

if (link->link_enc->funcs->fec_is_active &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1430

dc->hwseq->funcs.hdmistream_root_clock_control(dc->hwseq, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1435

if (dc->res_pool->dccg->funcs->enable_dsc)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1436

dc->res_pool->dccg->funcs->enable_dsc(dc->res_pool->dccg, i);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1438

if (dc->res_pool->dccg->funcs->disable_dsc)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1439

dc->res_pool->dccg->funcs->disable_dsc(dc->res_pool->dccg, i);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

144

link->link_enc->funcs->fec_is_active(link->link_enc))

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1448

if (dc->hwseq->funcs.dpp_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1449

dc->hwseq->funcs.dpp_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1452

if (dc->hwseq->funcs.dpstream_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1453

dc->hwseq->funcs.dpstream_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1458

if (dc->hwseq->funcs.physymclk_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1459

dc->hwseq->funcs.physymclk_root_clock_control(dc->hwseq, i, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1462

if (dc->hwseq->funcs.hdmistream_root_clock_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1463

dc->hwseq->funcs.hdmistream_root_clock_control(dc->hwseq, power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1474

pipe_ctx->stream_res.opp->funcs->opp_program_stereo(

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1479

pipe_ctx->stream_res.tg->funcs->program_stereo(

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

152

if (hws->funcs.enable_power_gating_plane)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

153

hws->funcs.enable_power_gating_plane(dc->hwseq, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1539

if (edp_link && edp_link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1540

edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1541

dc->hwseq->funcs.edp_backlight_control &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1542

dc->hwseq->funcs.power_down &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1544

dc->hwseq->funcs.edp_backlight_control(edp_link, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1545

dc->hwseq->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1551

if (link->link_enc && link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1552

link->link_enc->funcs->is_dig_enabled(link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1553

dc->hwseq->funcs.power_down) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1554

dc->hwseq->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1566

if (dc->clk_mgr->funcs->set_low_power_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1567

dc->clk_mgr->funcs->set_low_power_state(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

164

if (dcb->funcs->is_accelerated_mode(dcb) || !dc->config.seamless_boot_edp_requested) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

171

hws->funcs.init_pipes(dc, dc->current_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

173

if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

174

dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

192

if (edp_link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

193

edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

195

hws->funcs.power_down &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

198

hws->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

207

link->link_enc->funcs->is_dig_enabled &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

208

link->link_enc->funcs->is_dig_enabled(link->link_enc) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

209

hws->funcs.power_down) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

210

hws->funcs.power_down(dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

221

audio->funcs->hw_init(audio);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

228

backlight = link->panel_cntl->funcs->hw_init(link->panel_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

234

if (abms[i] != NULL && abms[i]->funcs != NULL)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

235

abms[i]->funcs->abm_init(abms[i], backlight, user_level);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

239

if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

240

dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

251

if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

252

dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

254

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->notify_wm_ranges)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

255

dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

257

if (dc->res_pool->hubbub->funcs->force_pstate_change_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

258

dc->res_pool->hubbub->funcs->force_pstate_change_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

261

if (dc->res_pool->hubbub->funcs->init_crb)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

262

dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

264

if (dc->res_pool->hubbub->funcs->set_request_limit &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

267

dc->res_pool->hubbub->funcs->set_request_limit(dc->res_pool->hubbub,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

285

dc->res_pool->funcs->update_bw_bounding_box &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

288

dc->res_pool->funcs->update_bw_bounding_box(dc, dc->clk_mgr->bw_params);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

292

if (dc->res_pool->pg_cntl->funcs->init_pg_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

293

dc->res_pool->pg_cntl->funcs->init_pg_status(dc->res_pool->pg_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

353

mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

359

new_mpcc = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

362

mpc->funcs->remove_mpcc(mpc, mpc_tree_params, new_mpcc);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

365

mpc->funcs->assert_mpcc_idle_before_connect(

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

369

new_mpcc = mpc->funcs->insert_plane(dc->res_pool->mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

391

if (dpp && dpp->funcs->dpp_cm_hist_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

392

dpp->funcs->dpp_cm_hist_control(dpp,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

460

if (mpc->funcs->rmcm.power_on_shaper_3dlut &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

461

mpc->funcs->rmcm.fl_3dlut_configure &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

462

hubp->funcs->hubp_program_3dlut_fl_config)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

487

mpc->funcs->set_movable_cm_location(mpc, MPCC_MOVABLE_CM_LOCATION_BEFORE, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

507

mpc->funcs->set_movable_cm_location(mpc, MPCC_MOVABLE_CM_LOCATION_BEFORE, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

57

if (dc->res_pool->pg_cntl->funcs->print_pg_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

58

dc->res_pool->pg_cntl->funcs->print_pg_status(dc->res_pool->pg_cntl, debug_func, debug_log);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

611

if (mpc->funcs->rmcm.populate_lut)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

612

mpc->funcs->rmcm.populate_lut(mpc, m_lut_params, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

613

if (mpc->funcs->rmcm.program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

614

mpc->funcs->rmcm.program_lut_mode(mpc, !bypass_rmcm_shaper, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

636

!mpc->funcs->rmcm.is_config_supported(

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

676

mpc->funcs->rmcm.power_on_shaper_3dlut(mpc, mpcc_id, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

679

mpc->funcs->rmcm.fl_3dlut_configure(mpc, &mpc_fl_config, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

681

hubp->funcs->hubp_program_3dlut_fl_config(hubp, &fl_config);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

684

mpc->funcs->rmcm.power_on_shaper_3dlut(mpc, mpcc_id, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

74

if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

75

dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

751

if (mpc->funcs->populate_lut)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

752

mpc->funcs->populate_lut(mpc, MCM_LUT_1DLUT, m_lut_params, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

754

if (mpc->funcs->program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

755

mpc->funcs->program_lut_mode(mpc, MCM_LUT_1DLUT, lut1d_xable && m_lut_params.pwl, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

771

if (mpc->funcs->mcm.populate_lut)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

772

mpc->funcs->mcm.populate_lut(mpc, m_lut_params, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

773

if (mpc->funcs->program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

774

mpc->funcs->program_lut_mode(mpc, MCM_LUT_SHAPER, MCM_LUT_ENABLE, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

78

dc->caps.dcmode_power_limits_present = dc->clk_mgr->funcs->is_dc_mode_present &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

782

if (hubp->funcs->hubp_enable_3dlut_fl)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

783

hubp->funcs->hubp_enable_3dlut_fl(hubp, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

787

if (mpc->funcs->populate_lut)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

788

mpc->funcs->populate_lut(mpc, MCM_LUT_3DLUT, m_lut_params, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

789

if (mpc->funcs->program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

79

dc->clk_mgr->funcs->is_dc_mode_present(dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

790

mpc->funcs->program_lut_mode(mpc, MCM_LUT_3DLUT, lut3d_xable, lut_bank_a,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

811

if (mpc->funcs->mcm.is_config_supported &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

812

!mpc->funcs->mcm.is_config_supported(width))

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

815

if (mpc->funcs->program_lut_read_write_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

816

mpc->funcs->program_lut_read_write_control(mpc, MCM_LUT_3DLUT, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

817

if (mpc->funcs->program_lut_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

818

mpc->funcs->program_lut_mode(mpc, MCM_LUT_3DLUT, lut3d_xable, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

820

if (hubp->funcs->hubp_program_3dlut_fl_addr)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

821

hubp->funcs->hubp_program_3dlut_fl_addr(hubp, mcm_luts.lut3d_data.gpu_mem_params.addr);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

823

if (mpc->funcs->mcm.program_bit_depth)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

824

mpc->funcs->mcm.program_bit_depth(mpc, mcm_luts.lut3d_data.gpu_mem_params.bit_depth, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

827

if (hubp->funcs->hubp_program_3dlut_fl_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

828

hubp->funcs->hubp_program_3dlut_fl_mode(hubp, mode);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

83

if (res_pool->dccg->funcs->dccg_init)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

830

if (hubp->funcs->hubp_program_3dlut_fl_addressing_mode)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

831

hubp->funcs->hubp_program_3dlut_fl_addressing_mode(hubp, addr_mode);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

84

res_pool->dccg->funcs->dccg_init(res_pool->dccg);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

844

if (hubp->funcs->hubp_program_3dlut_fl_format)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

845

hubp->funcs->hubp_program_3dlut_fl_format(hubp, format);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

846

if (hubp->funcs->hubp_update_3dlut_fl_bias_scale &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

847

mpc->funcs->mcm.program_bias_scale) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

848

mpc->funcs->mcm.program_bias_scale(mpc,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

852

hubp->funcs->hubp_update_3dlut_fl_bias_scale(hubp,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

865

if (hubp->funcs->hubp_program_3dlut_fl_crossbar)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

866

hubp->funcs->hubp_program_3dlut_fl_crossbar(hubp,

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

871

if (mpc->funcs->mcm.program_lut_read_write_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

872

mpc->funcs->mcm.program_lut_read_write_control(mpc, MCM_LUT_3DLUT, lut_bank_a, true, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

874

if (mpc->funcs->mcm.program_3dlut_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

875

mpc->funcs->mcm.program_3dlut_size(mpc, width, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

877

if (mpc->funcs->update_3dlut_fast_load_select)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

878

mpc->funcs->update_3dlut_fast_load_select(mpc, mpcc_id, hubp->inst);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

880

if (hubp->funcs->hubp_enable_3dlut_fl)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

881

hubp->funcs->hubp_enable_3dlut_fl(hubp, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

883

if (mpc->funcs->program_lut_mode) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

884

mpc->funcs->program_lut_mode(mpc, MCM_LUT_SHAPER, MCM_LUT_DISABLE, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

885

mpc->funcs->program_lut_mode(mpc, MCM_LUT_3DLUT, MCM_LUT_DISABLE, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

886

mpc->funcs->program_lut_mode(mpc, MCM_LUT_1DLUT, MCM_LUT_DISABLE, lut_bank_a, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

909

mpc->funcs->set_movable_cm_location(mpc, MPCC_MOVABLE_CM_LOCATION_BEFORE, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

920

result = mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

933

result &= mpc->funcs->program_shaper(mpc, lut_params, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

936

if (mpc->funcs->program_3dlut) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

938

result &= mpc->funcs->program_3dlut(mpc, &plane_state->lut3d_func.lut_3d, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

940

result &= mpc->funcs->program_3dlut(mpc, NULL, mpcc_id);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_init.c

173

dc->hwseq->funcs = dcn42_private_funcs;

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

100

hubbub->funcs->program_det_segments(hubbub, hubp->inst, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

112

dc->res_pool->mpc->funcs->mpc_init_single_inst(

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

132

pipe_ctx->stream_res.tg->funcs->is_tg_enabled(

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

138

tg->funcs->tg_init(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

147

hubp->funcs->hubp_reset(hubp);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

148

dpp->funcs->dpp_reset(dpp);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

165

hws->funcs.plane_atomic_disconnect(dc, context, pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

167

if (tg->funcs->is_tg_enabled(tg))

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

168

tg->funcs->unlock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

175

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

176

if (tg->funcs->init_odm)

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

177

tg->funcs->init_odm(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

180

tg->funcs->tg_init(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

198

if (hws->funcs.dsc_pg_control != NULL) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

213

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

214

if (tg->funcs->get_dsc_status)

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

215

tg->funcs->get_dsc_status(tg, &optc_dsc_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

219

tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

229

dc->res_pool->dscs[i]->funcs->dsc_read_state(dc->res_pool->dscs[i], &s);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

235

hws->funcs.dsc_pg_control(hws, dc->res_pool->dscs[i]->inst, false);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

75

if (tg->funcs->is_tg_enabled(tg)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

76

if (hws->funcs.init_blank != NULL) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

77

hws->funcs.init_blank(dc, tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

78

tg->funcs->lock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

80

tg->funcs->lock(tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

81

tg->funcs->set_blank(tg, true);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

97

if (hubbub->funcs->program_det_size)

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

98

hubbub->funcs->program_det_size(hubbub, hubp->inst, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

99

if (hubbub->funcs->program_det_segments)

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_init.c

18

dc->hwseq->funcs.init_pipes = dcn42b_init_pipes;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

240

struct hwseq_private_funcs funcs;

drivers/gpu/drm/amd/display/dc/inc/clock_source.h

185

const struct clock_source_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/compressor.h

83

const struct compressor_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

335

const struct resource_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/abm.h

34

const struct abm_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/audio.h

60

const struct audio_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h

94

const struct aux_engine_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h

412

struct clk_mgr_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

443

struct clk_mgr_internal_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h

195

const struct dccg_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h

299

const struct hubbub_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/dio.h

18

const struct dio_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h

50

const struct dmcu_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h

69

const struct dpp_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h

157

const struct dwbc_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h

119

const struct hubp_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h

40

const struct ipp_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

267

const struct hpo_frl_link_encoder_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

421

const struct hpo_dp_link_encoder_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

94

const struct link_encoder_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h

69

const struct mcif_wb_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h

83

const struct mem_input_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h

324

const struct mpc_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/opp.h

241

const struct opp_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/panel_cntl.h

64

const struct panel_cntl_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/pg_cntl.h

34

const struct pg_cntl_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

124

const struct stream_encoder_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

316

const struct hpo_frl_stream_encoder_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

524

const struct hpo_dp_stream_encoder_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

322

const struct timing_generator_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/transform.h

39

const struct transform_funcs *funcs;

drivers/gpu/drm/amd/display/dc/inc/hw/vpg.h

48

const struct vpg_funcs *funcs;

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

101

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

115

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

129

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

145

.funcs = &vupdate_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

161

.funcs = &vblank_irq_info_funcs,\

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

167

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

223

if (!tg || !tg->funcs->arm_vert_intr(tg, 2)) {

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

418

irq_service->funcs = &irq_service_funcs_dce110;

drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

105

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

113

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

121

.funcs = &vupdate_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

129

.funcs = &vblank_irq_info_funcs,\

drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

135

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

254

irq_service->funcs = &irq_service_funcs_dce120;

drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

96

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c

100

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c

115

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c

131

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c

147

.funcs = &vblank_irq_info_funcs_dce60\

drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c

152

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c

352

irq_service->funcs = &irq_service_funcs_dce60;

drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c

86

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

106

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

122

.funcs = &vupdate_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

138

.funcs = &vblank_irq_info_funcs,\

drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

144

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

264

irq_service->funcs = &irq_service_funcs_dce80;

drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

77

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

91

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

196

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

205

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

212

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

223

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

231

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

239

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

244

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

369

irq_service->funcs = &irq_service_funcs_dcn10;

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

201

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

210

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

217

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

228

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

236

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

244

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

249

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

374

irq_service->funcs = &irq_service_funcs_dcn20;

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

145

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

154

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

161

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

169

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

180

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

187

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

195

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

200

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c

325

irq_service->funcs = &irq_service_funcs_dcn201;

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

223

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

232

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

239

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

250

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

258

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

266

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

273

.funcs = &dmub_outbox_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

278

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

402

irq_service->funcs = &irq_service_funcs_dcn21;

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

230

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

239

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

246

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

257

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

265

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

272

.funcs = &dmub_trace_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

280

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

285

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

411

irq_service->funcs = &irq_service_funcs_dcn30;

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

196

.funcs = &dmub_trace_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

219

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

228

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

235

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

246

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

254

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

262

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

265

#define dummy_irq_entry() { .funcs = &dummy_irq_info_funcs }

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

378

irq_service->funcs = &irq_service_funcs_dcn302;

drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

143

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

152

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

159

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

170

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

178

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

186

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

189

#define dummy_irq_entry() { .funcs = &dummy_irq_info_funcs }

drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

274

irq_service->funcs = &irq_service_funcs_dcn303;

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

218

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

227

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

234

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

245

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

253

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

261

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

268

.funcs = &outbox_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

273

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c

393

irq_service->funcs = &irq_service_funcs_dcn31;

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

220

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

229

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

236

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

247

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

255

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

263

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

270

.funcs = &outbox_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

275

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c

395

irq_service->funcs = &irq_service_funcs_dcn314;

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

225

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

234

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

241

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

252

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

260

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

268

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

275

.funcs = &outbox_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

280

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c

400

irq_service->funcs = &irq_service_funcs_dcn315;

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

229

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

238

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

245

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

253

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

263

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

271

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

278

.funcs = &vline1_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

285

.funcs = &vline2_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

292

.funcs = &outbox_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

297

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

425

irq_service->funcs = &irq_service_funcs_dcn32;

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

215

REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].funcs = &hpd_irq_info_funcs;\

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

223

REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].funcs = &hpd_rx_irq_info_funcs;\

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

229

REG_STRUCT[DC_IRQ_SOURCE_PFLIP1 + reg_num].funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

238

REG_STRUCT[DC_IRQ_SOURCE_VUPDATE1 + reg_num].funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

244

REG_STRUCT[DC_IRQ_SOURCE_VBLANK1 + reg_num].funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

250

REG_STRUCT[DC_IRQ_SOURCE_DC1_VLINE0 + reg_num].funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

256

REG_STRUCT[DC_IRQ_SOURCE_DMCUB_OUTBOX].funcs = &outbox_irq_info_funcs

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

259

REG_STRUCT[irqno].funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c

389

irq_service->funcs = &irq_service_funcs_dcn35;

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

194

REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].funcs = &hpd_irq_info_funcs;\

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

202

REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].funcs = &hpd_rx_irq_info_funcs;\

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

208

REG_STRUCT[DC_IRQ_SOURCE_PFLIP1 + reg_num].funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

217

REG_STRUCT[DC_IRQ_SOURCE_VUPDATE1 + reg_num].funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

223

REG_STRUCT[DC_IRQ_SOURCE_VBLANK1 + reg_num].funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

229

REG_STRUCT[DC_IRQ_SOURCE_DC1_VLINE0 + reg_num].funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

235

REG_STRUCT[DC_IRQ_SOURCE_DMCUB_OUTBOX].funcs = &outbox_irq_info_funcs

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

238

REG_STRUCT[irqno].funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c

371

irq_service->funcs = &irq_service_funcs_dcn351;

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

193

REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].funcs = &hpd_irq_info_funcs;\

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

201

REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].funcs = &hpd_rx_irq_info_funcs;\

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

207

REG_STRUCT[DC_IRQ_SOURCE_PFLIP1 + reg_num].funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

216

REG_STRUCT[DC_IRQ_SOURCE_VUPDATE1 + reg_num].funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

222

REG_STRUCT[DC_IRQ_SOURCE_VBLANK1 + reg_num].funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

228

REG_STRUCT[DC_IRQ_SOURCE_DC1_VLINE0 + reg_num].funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

234

REG_STRUCT[DC_IRQ_SOURCE_DMCUB_OUTBOX].funcs = &outbox_irq_info_funcs

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

237

REG_STRUCT[irqno].funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c

370

irq_service->funcs = &irq_service_funcs_dcn36;

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

209

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

218

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

225

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

233

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

243

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

251

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

258

.funcs = &vline1_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

265

.funcs = &vline2_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

272

.funcs = &outbox_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

277

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c

403

irq_service->funcs = &irq_service_funcs_dcn401;

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

207

.funcs = &hpd_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

216

.funcs = &hpd_rx_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

223

.funcs = &pflip_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

231

.funcs = &vblank_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

239

.funcs = &vupdate_no_lock_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

247

.funcs = &vline0_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

254

.funcs = &vline1_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

261

.funcs = &vline2_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

268

.funcs = &outbox_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

273

.funcs = &dummy_irq_info_funcs\

drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c

403

irq_service->funcs = &irq_service_funcs_dcn42;

drivers/gpu/drm/amd/display/dc/irq/irq_service.c

125

if (info->funcs && info->funcs->set) {

drivers/gpu/drm/amd/display/dc/irq/irq_service.c

126

if (info->funcs->set == dal_irq_service_dummy_set) {

drivers/gpu/drm/amd/display/dc/irq/irq_service.c

132

return info->funcs->set(irq_service, info, enable);

drivers/gpu/drm/amd/display/dc/irq/irq_service.c

166

if (info->funcs && info->funcs->ack) {

drivers/gpu/drm/amd/display/dc/irq/irq_service.c

167

if (info->funcs->ack == dal_irq_service_dummy_ack) {

drivers/gpu/drm/amd/display/dc/irq/irq_service.c

172

return info->funcs->ack(irq_service, info);

drivers/gpu/drm/amd/display/dc/irq/irq_service.c

185

return irq_service->funcs->to_dal_irq_source(

drivers/gpu/drm/amd/display/dc/irq/irq_service.h

56

struct irq_source_info_funcs *funcs;

drivers/gpu/drm/amd/display/dc/irq/irq_service.h

69

const struct irq_service_funcs *funcs;

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

101

pipes[i]->stream_res.tg->funcs->disable_crtc(pipes[i]->stream_res.tg);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

104

if (needs_divider_update && link->dc->res_pool->funcs->update_dc_state_for_encoder_switch) {

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

105

link->dc->res_pool->funcs->update_dc_state_for_encoder_switch(link,

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

109

pipes[i]->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

122

pipes[i]->stream_res.audio->funcs->az_configure(

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

130

pipes[i]->stream_res.audio->funcs->az_disable_hbr_audio &&

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

132

pipes[i]->stream_res.audio->funcs->az_disable_hbr_audio(pipes[i]->stream_res.audio);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

143

pipes[i]->stream_res.tg->funcs->enable_crtc(pipes[i]->stream_res.tg);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

484

if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) {

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

485

opp->funcs->opp_program_bit_depth_reduction(opp, &params);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

486

pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

503

odm_opp->funcs->opp_program_bit_depth_reduction(odm_opp, &params);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

523

if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) {

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

524

opp->funcs->opp_program_bit_depth_reduction(opp, &params);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

525

pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

535

odm_opp->funcs->opp_program_bit_depth_reduction(odm_opp, &params);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

855

if (pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_enable) {

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

868

pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_enable(

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

872

pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

895

pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg);

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

896

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

898

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

900

pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

903

if (pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_disable) {

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

916

pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_disable(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

100

stream_enc->funcs->enable_stream(stream_enc,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

104

link_enc->funcs->connect_dig_be_to_fe(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

124

stream_encoder->funcs->setup_stereo_sync(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

130

stream_encoder->funcs->dp_set_stream_attribute(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

137

stream_encoder->funcs->hdmi_set_stream_attribute(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

143

stream_encoder->funcs->dvi_set_stream_attribute(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

148

stream_encoder->funcs->lvds_set_stream_attribute(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

173

link_enc->funcs->enable_dp_output(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

178

link_enc->funcs->enable_dp_mst_output(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

199

link_enc->funcs->disable_output(link_enc, signal);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

217

link_enc->funcs->dp_set_phy_pattern(link_enc, tp_params);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

235

link_enc->funcs->dp_set_lane_settings(link_enc, link_settings, lane_settings);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

251

link_enc->funcs->update_mst_stream_allocation_table(link_enc, table);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

258

pipe_ctx->stream_res.stream_enc->funcs->dp_audio_setup(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

263

pipe_ctx->stream_res.stream_enc->funcs->hdmi_audio_setup(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

273

pipe_ctx->stream_res.stream_enc->funcs->dp_audio_enable(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

276

pipe_ctx->stream_res.stream_enc->funcs->audio_mute_control(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

287

pipe_ctx->stream_res.stream_enc->funcs->audio_mute_control(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

292

pipe_ctx->stream_res.stream_enc->funcs->dp_audio_disable(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

295

pipe_ctx->stream_res.stream_enc->funcs->hdmi_audio_disable(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

44

stream_encoder->funcs->set_throttled_vcp_size(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

62

link_enc->funcs->connect_dig_be_to_fe(link_enc,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

67

if (stream_enc->funcs->enable_stream)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

68

stream_enc->funcs->enable_stream(stream_enc,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

70

if (stream_enc->funcs->map_stream_to_link)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

71

stream_enc->funcs->map_stream_to_link(stream_enc,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

73

if (stream_enc->funcs->set_input_mode)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

74

stream_enc->funcs->set_input_mode(stream_enc,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

76

if (stream_enc->funcs->enable_fifo)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

77

stream_enc->funcs->enable_fifo(stream_enc);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

95

if (stream_enc->funcs->disable_fifo)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

96

stream_enc->funcs->disable_fifo(stream_enc);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

97

if (stream_enc->funcs->set_input_mode)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

98

stream_enc->funcs->set_input_mode(stream_enc, 0);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

99

if (stream_enc->funcs->enable_stream)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c

137

link_enc->funcs->dp_set_phy_pattern(link_enc, tp_params);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

107

if (link_enc->funcs->enable_dpia_output)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

108

link_enc->funcs->enable_dpia_output(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

139

if (link_enc->funcs->disable_dpia_output)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

140

link_enc->funcs->disable_dpia_output(link_enc, link->ddc_hw_inst, digmode);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

144

link_enc->funcs->disable_output(link_enc, signal);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

176

return link->is_dig_mapping_flexible && link->dc->res_pool->funcs->link_encs_assign;

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

57

link_enc->funcs->update_mst_stream_allocation_table(link_enc, table);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

75

link_enc->funcs->dp_set_phy_pattern(link_enc, tp_params);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

120

if (link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

121

link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

125

link_res->hpo_dp_link_enc->funcs->enable_link_phy(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

141

link_res->hpo_dp_link_enc->funcs->link_disable(link_res->hpo_dp_link_enc);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

142

link_res->hpo_dp_link_enc->funcs->disable_link_phy(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

144

if (link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating)

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

145

link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

155

link_res->hpo_dp_link_enc->funcs->set_link_test_pattern(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

166

link_res->hpo_dp_link_enc->funcs->set_ffe(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

177

link_res->hpo_dp_link_enc->funcs->update_stream_allocation_table(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

186

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_audio_setup(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

194

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_audio_enable(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

201

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_audio_disable(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

41

hpo_dp_link_encoder->funcs->set_throttled_vcp_size(hpo_dp_link_encoder,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

70

hpo_dp_stream_encoder->funcs->set_hblank_min_symbol_width(hpo_dp_stream_encoder,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

79

stream_enc->funcs->enable_stream(stream_enc);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

80

stream_enc->funcs->map_stream_to_link(stream_enc, stream_enc->inst, link_enc->inst);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

87

stream_enc->funcs->disable(stream_enc);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

96

stream_enc->funcs->set_stream_attribute(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c

166

link_res->hpo_dp_link_enc->funcs->set_link_test_pattern(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c

189

link_res->hpo_dp_link_enc->funcs->set_ffe(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_frl.c

50

stream_enc->funcs->hdmi_frl_set_stream_attribute(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_frl.c

63

link->hpo_frl_link_enc->funcs->disable_link_encoder(link->hpo_frl_link_enc);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_frl.c

64

link->link_enc->funcs->disable_output(link->link_enc, signal);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_frl.c

70

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_audio_setup(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_frl.c

79

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->audio_mute_control(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_frl.c

85

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->audio_mute_control(

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_frl.c

89

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_audio_disable(

drivers/gpu/drm/amd/display/dc/link/link_detection.c

1446

if (dc_ctx->dc->res_pool->funcs->get_panel_config_defaults)

drivers/gpu/drm/amd/display/dc/link/link_detection.c

1447

dc_ctx->dc->res_pool->funcs->get_panel_config_defaults(&link->panel_config);

drivers/gpu/drm/amd/display/dc/link/link_detection.c

667

if (!link->link_enc->funcs->is_in_alt_mode)

drivers/gpu/drm/amd/display/dc/link/link_detection.c

670

is_in_alt_mode = link->link_enc->funcs->is_in_alt_mode(link->link_enc);

drivers/gpu/drm/amd/display/dc/link/link_detection.c

681

if (link->link_enc->funcs->is_in_alt_mode(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/link/link_detection.c

904

link->dc->res_pool->funcs->link_encs_assign &&

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

135

link->link_enc->funcs->get_dig_frontend &&

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

136

link->link_enc->funcs->is_dig_enabled(link->link_enc)) {

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

137

int fe = link->link_enc->funcs->get_dig_frontend(link->link_enc);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

142

dc->res_pool->stream_enc[j]->funcs->dp_blank(link,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

1940

(!core_dc->res_pool->dccg->funcs->enable_hdmicharclk) ||

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

1993

if (core_dc->res_pool->dccg->funcs->set_valid_pixel_rate)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

1994

core_dc->res_pool->dccg->funcs->set_valid_pixel_rate(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

1996

core_dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(core_dc->clk_mgr),

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2002

stream->link->hpo_frl_link_enc->funcs->enable_output(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2005

stream->link->hpo_frl_link_enc->funcs->apply_vsdb_rcc_wa(stream->link->hpo_frl_link_enc);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2012

if (core_dc->res_pool->dccg->funcs->set_hdmistreamclk) {

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2013

core_dc->res_pool->dccg->funcs->set_hdmistreamclk(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2019

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_enable(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2095

state->clk_mgr->funcs->update_clocks(state->clk_mgr,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2461

if (pipe_ctx->stream_res.tg->funcs->set_out_mux)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2462

pipe_ctx->stream_res.tg->funcs->set_out_mux(pipe_ctx->stream_res.tg, OUT_MUX_DIO);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2465

if (vpg && vpg->funcs->vpg_powerdown)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2466

vpg->funcs->vpg_powerdown(vpg);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2523

link_enc->funcs->setup(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2533

if (pipe_ctx->stream_res.tg->funcs->set_out_mux) {

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2540

pipe_ctx->stream_res.tg->funcs->set_out_mux(pipe_ctx->stream_res.tg, otg_out_dest);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2548

if (vpg && vpg->funcs->vpg_poweron)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2549

vpg->funcs->vpg_poweron(vpg);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2645

if (pipe_ctx->stream_res.tg->funcs->set_test_pattern)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2646

pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2659

link_enc->funcs->setup(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

539

if (cp_psp == NULL || cp_psp->funcs.update_stream_config == NULL)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

603

cp_psp->funcs.update_stream_config(cp_psp->handle, &config);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

736

bool should_use_dto_dscclk = (dccg->funcs->set_dto_dscclk != NULL) &&

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

761

dccg->funcs->set_dto_dscclk(dccg, dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

762

dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

763

dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

768

dccg->funcs->set_dto_dscclk(dccg, odm_dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

769

odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

770

odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

782

if (pipe_ctx->stream_res.stream_enc->funcs->dp_set_dsc_config)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

783

pipe_ctx->stream_res.stream_enc->funcs->dp_set_dsc_config(pipe_ctx->stream_res.stream_enc,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

802

dsc->funcs->dsc_get_packed_pps(dsc, &dsc_cfg, &dsc_packed_pps[0]);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

803

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_set_dsc_config(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

810

pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

816

pipe_ctx->stream_res.tg->funcs->set_dsc_config(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

823

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_set_dsc_pps_info_packet(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

829

if (pipe_ctx->stream_res.stream_enc->funcs->dp_set_dsc_config)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

830

pipe_ctx->stream_res.stream_enc->funcs->dp_set_dsc_config(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

833

pipe_ctx->stream_res.stream_enc->funcs->dp_set_dsc_pps_info_packet(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

838

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_set_dsc_config(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

843

odm_pipe->stream_res.dsc->funcs->dsc_disconnect(odm_pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

865

odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

866

if (dccg->funcs->set_ref_dscclk)

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

867

dccg->funcs->set_ref_dscclk(dccg, odm_pipe->stream_res.dsc->inst);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

910

dsc->funcs->dsc_get_packed_pps(dsc, &dsc_cfg, &dsc_packed_pps[0]);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

915

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_set_dsc_pps_info_packet(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

921

pipe_ctx->stream_res.stream_enc->funcs->dp_set_dsc_pps_info_packet(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

930

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_set_dsc_config(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

938

pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_set_dsc_pps_info_packet(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

944

pipe_ctx->stream_res.stream_enc->funcs->dp_set_dsc_pps_info_packet(

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

949

pipe_ctx->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_set_dsc_config(

drivers/gpu/drm/amd/display/dc/link/link_factory.c

414

link->panel_cntl->funcs->destroy(&link->panel_cntl);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

425

link->link_enc->funcs->destroy(&link->link_enc);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

429

link->hpo_frl_link_enc->funcs->destroy(&link->hpo_frl_link_enc);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

491

bp_result = bp->funcs->get_src_obj(bp, link->link_id, i, enc);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

525

const struct dc_vbios_funcs *bp_funcs = bios->funcs;

drivers/gpu/drm/amd/display/dc/link/link_factory.c

548

bios->funcs->get_connector_id(bios, (uint8_t)init_params->connector_index);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

574

if (bios->funcs->get_disp_connector_caps_info) {

drivers/gpu/drm/amd/display/dc/link/link_factory.c

575

bios->funcs->get_disp_connector_caps_info(bios, link->link_id, &disp_connect_caps_info);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

588

if (link->dc->res_pool->funcs->link_init)

drivers/gpu/drm/amd/display/dc/link/link_factory.c

589

link->dc->res_pool->funcs->link_init(link);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

638

if (link->ctx->dc_bios->funcs->get_hpd_info(link->ctx->dc_bios, link->link_id, &hpd_info) == BP_RESULT_OK) {

drivers/gpu/drm/amd/display/dc/link/link_factory.c

650

link->dc->res_pool->funcs->link_enc_create(dc_ctx, &enc_init_data);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

770

if (link->dc->res_pool->funcs->panel_cntl_create &&

drivers/gpu/drm/amd/display/dc/link/link_factory.c

777

link->dc->res_pool->funcs->panel_cntl_create(

drivers/gpu/drm/amd/display/dc/link/link_factory.c

852

if (bios->funcs->get_atom_dc_golden_table)

drivers/gpu/drm/amd/display/dc/link/link_factory.c

853

bios->funcs->get_atom_dc_golden_table(bios);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

866

(link->dc->res_pool->funcs->hpo_frl_link_enc_create)) {

drivers/gpu/drm/amd/display/dc/link/link_factory.c

870

link->hpo_frl_link_enc = link->dc->res_pool->funcs->hpo_frl_link_enc_create(

drivers/gpu/drm/amd/display/dc/link/link_factory.c

894

link->panel_cntl->funcs->destroy(&link->panel_cntl);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

896

link->link_enc->funcs->destroy(&link->link_enc);

drivers/gpu/drm/amd/display/dc/link/link_factory.c

955

if (link->dc->res_pool->funcs->get_preferred_eng_id_dpia)

drivers/gpu/drm/amd/display/dc/link/link_factory.c

956

link->dpia_preferred_eng_id = link->dc->res_pool->funcs->get_preferred_eng_id_dpia(link->ddc_hw_inst);

drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_frl.c

40

stream_enc->funcs->hdmi_frl_set_stream_attribute(

drivers/gpu/drm/amd/display/dc/link/link_validation.c

571

link->dc->res_pool->hpo_frl_stream_enc[hpo_frl_stream_enc_index]->funcs->validate_hdmi_frl_output(

drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c

126

if (dcb->funcs->get_connector_aux_info(dcb, init_data->id, &i2c_info) == BP_RESULT_OK)

drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c

130

dcb->funcs->get_i2c_info(dcb, init_data->id, &i2c_info) != BP_RESULT_OK) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c

530

if (ddc->ctx->dc->res_pool->engines[ddc->link->aux_hw_inst]->funcs->configure_timeout) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c

531

ddc->ctx->dc->res_pool->engines[ddc->link->aux_hw_inst]->funcs->configure_timeout(ddc, timeout);

drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c

535

if (ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]->funcs->configure_timeout) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c

536

ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]->funcs->configure_timeout(ddc, timeout);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

2310

if (link_enc && link_enc->funcs->get_max_link_cap) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

2311

link_enc->funcs->get_max_link_cap(link_enc, max_link_enc_cap);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

2347

link_enc->funcs->get_max_link_cap(link_enc, &max_link_cap);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

152

if (link_enc->funcs->fec_set_ready == NULL)

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

162

link_enc->funcs->fec_set_ready(link_enc, true);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

172

link_enc->funcs->fec_set_ready(link_enc, false);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

187

if (link_enc == NULL || link_enc->funcs == NULL || link_enc->funcs->fec_set_enable == NULL)

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

200

link_enc->funcs->fec_set_enable(link_enc, true);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

205

link_enc->funcs->fec_set_enable(link_enc, false);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

87

if (dc->clk_mgr->funcs->notify_link_rate_change)

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

88

dc->clk_mgr->funcs->notify_link_rate_change(dc->clk_mgr, link);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1052

replay->funcs->replay_copy_settings(replay, link, &replay_context, (uint8_t)panel_inst);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1109

replay->funcs->replay_send_cmd(replay, msg, cmd_data);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1128

replay->funcs->replay_set_coasting_vtotal(replay, coasting_vtotal, (uint8_t)panel_inst, frame_skip_number);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1150

replay->funcs->replay_residency(replay, (uint8_t)panel_inst, residency, is_start, mode);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1173

replay->funcs->replay_set_power_opt_and_coasting_vtotal) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1174

replay->funcs->replay_set_power_opt_and_coasting_vtotal(replay,

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1215

fw_set_brightness = dmcu->funcs->is_dmcu_initialized(dmcu);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1217

if (!fw_set_brightness && panel_cntl->funcs->get_current_backlight)

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1218

return (int)panel_cntl->funcs->get_current_backlight(panel_cntl);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1219

else if (abm != NULL && abm->funcs->get_current_backlight != NULL)

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1220

return (int)abm->funcs->get_current_backlight(abm);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1229

if (abm == NULL || abm->funcs->get_target_backlight == NULL)

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1232

return (int) abm->funcs->get_target_backlight(abm);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1293

} else if (cp_psp && cp_psp->funcs.enable_assr && enable) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

1301

result = cp_psp->funcs.enable_assr(cp_psp->handle, link);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

603

if (psr != NULL && link->psr_settings.psr_feature_enabled && psr->funcs->psr_set_power_opt)

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

604

psr->funcs->psr_set_power_opt(psr, link->psr_settings.psr_power_opt, (uint8_t)panel_inst);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

608

force_static && psr->funcs->psr_force_static)

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

609

psr->funcs->psr_force_static(psr, (uint8_t)panel_inst);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

619

psr->funcs->psr_enable(psr, link->psr_settings.psr_allow_active, wait, (uint8_t)panel_inst);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

620

else if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) &&

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

622

dmcu->funcs->set_psr_enable(dmcu, link->psr_settings.psr_allow_active, wait);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

640

psr->funcs->psr_get_state(psr, state, (uint8_t)panel_inst);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

642

dmcu->funcs->get_psr_state(dmcu, state);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

890

link->psr_settings.psr_feature_enabled = psr->funcs->psr_copy_settings(psr,

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

895

link->psr_settings.psr_feature_enabled = dmcu->funcs->setup_psr(dmcu, link, psr_context);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

919

psr->funcs->psr_get_residency(psr, residency, (uint8_t)panel_inst, mode);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

931

psr->funcs->psr_set_sink_vtotal_in_psr_active(psr, psr_vtotal_idle, psr_vtotal_su);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

952

replay->funcs->replay_set_power_opt) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

953

replay->funcs->replay_set_power_opt(replay, *power_opts, (uint8_t)panel_inst);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

963

replay->funcs->replay_enable(replay, *allow_active, wait, (uint8_t)panel_inst);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

981

replay->funcs->replay_get_state(replay, &pr_state, (uint8_t)panel_inst);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

1009

link_stream->link->hpo_frl_link_enc->funcs->enable_output(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

1012

link_stream->link->hpo_frl_link_enc->funcs->apply_vsdb_rcc_wa(link_stream->link->hpo_frl_link_enc);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

1016

if (dc->res_pool->dccg->funcs->set_hdmistreamclk) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

1017

dc->res_pool->dccg->funcs->set_hdmistreamclk(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

1023

pipe->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_enable(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

250

hpo_frl_link_enc->funcs->set_hdmi_training_pattern(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

257

hpo_frl_link_enc->funcs->set_hdmi_training_pattern(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

264

hpo_frl_link_enc->funcs->set_hdmi_training_pattern(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

283

dio_link_enc->funcs->prog_eq_setting(dio_link_enc, 0xEE,

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

293

hpo_frl_link_enc->funcs->set_hdmi_training_pattern(hpo_frl_link_enc, 0, 0, 0, 0);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

317

dio_link_enc->funcs->prog_eq_setting(dio_link_enc, 0xFF,

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

485

dio_link_enc->funcs->prog_eq_setting(dio_link_enc, 0,

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

542

dio_link_enc->funcs->prog_eq_setting(dio_link_enc, current_FFE,

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

549

dio_link_enc->funcs->prog_eq_setting(dio_link_enc, current_FFE,

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

657

hpo_frl_link_enc->funcs->set_hdmi_training_pattern(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

835

link->dc->res_pool->clock_sources[t_id]->funcs->cs_power_down(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

854

link->dc->res_pool->clock_sources[t_id]->funcs->cs_power_down(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

946

pipe->stream_res.hpo_frl_stream_enc->funcs->hdmi_frl_set_stream_attribute(

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

952

if (pipe->stream_res.tg->funcs->set_out_mux)

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

953

pipe->stream_res.tg->funcs->set_out_mux(pipe->stream_res.tg, OUT_MUX_HPO_FRL);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c

957

(!link_stream->ctx->dc->res_pool->dccg->funcs->enable_hdmicharclk) ||

drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c

107

return link->link_enc->funcs->program_hpd_filter(link->link_enc, delay_on_connect_in_ms, delay_on_disconnect_in_ms);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c

118

if (dcb->funcs->get_hpd_info(dcb, link_id, &hpd_info) != BP_RESULT_OK)

drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c

121

bp_result = dcb->funcs->get_gpio_pin_info(dcb,

drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c

39

return link->link_enc->funcs->get_hpd_state(link->link_enc);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c

47

link->link_enc->funcs->enable_hpd(link->link_enc);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c

53

link->link_enc->funcs->disable_hpd(link->link_enc);

drivers/gpu/drm/amd/display/dc/link/protocols/link_hpd.c

64

link->link_enc->funcs->program_hpd_filter(link->link_enc, 0, 0);

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c

319

mcif_wb20->base.funcs = &dcn20_mmhubbub_funcs;

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

234

mcif_wb30->base.funcs = &dcn32_mmhubbub_funcs;

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c

245

mpc->funcs->update_blending(mpc, blnd_cfg, mpcc_id);

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c

507

mpc10->base.funcs = &dcn10_mpc_funcs;

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.c

596

mpc20->base.funcs = &dcn20_mpc_funcs;

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

1579

mpc30->base.funcs = &dcn30_mpc_funcs;

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

1040

mpc30->base.funcs = &dcn32_mpc_funcs;

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c

634

mpc401->base.funcs = &dcn401_mpc_funcs;

drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c

1109

mpc42->base.funcs = &dcn42_mpc_funcs;

drivers/gpu/drm/amd/display/dc/opp/dcn10/dcn10_opp.c

422

oppn10->base.funcs = &dcn10_opp_funcs;

drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

422

oppn20->base.funcs = &dcn20_opp_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1677

optc1->base.funcs = &dcn10_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

230

optc->funcs->set_vtotal_min_max(optc, v_total, v_total);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

287

optc->funcs->program_global_sync(optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

294

optc->funcs->set_vtg_params(optc, dc_crtc_timing, true);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

306

if (optc->funcs->is_two_pixels_per_container(&patched_crtc_timing) || optc1->opp_count == 2)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

506

if (optc->funcs->is_optc_underflow_occurred(optc) == true)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

507

optc->funcs->clear_optc_underflow(optc);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

715

optc->funcs->get_position(optc, &position1);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

716

optc->funcs->get_position(optc, &position2);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

948

optc->funcs->set_vtotal_min_max(optc, params->vertical_total_min - 1, params->vertical_total_max - 1);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

959

optc->funcs->setup_manual_trigger(optc);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

173

h_div_2 = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

572

optc1->base.funcs = &dcn20_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn201/dcn201_optc.c

188

optc1->base.funcs = &dcn201_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

215

h_div = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

435

optc1->base.funcs = &dcn30_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

180

optc1->base.funcs = &dcn30_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

74

optc->funcs->set_vtotal_min_max(optc, params->vertical_total_min - 1, params->vertical_total_max - 1);

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

83

optc->funcs->setup_manual_trigger(optc);

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

92

optc->funcs->set_vtotal_min_max(optc, 0, 0);

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

202

optc->funcs->set_vtotal_min_max(optc, params->vertical_total_min - 1, params->vertical_total_max - 1);

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

217

optc->funcs->setup_manual_trigger(optc);

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

225

optc->funcs->set_vtotal_min_max(optc, 0, 0);

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

518

optc1->base.funcs = &dcn31_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

178

h_div = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

265

optc1->base.funcs = &dcn314_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

242

h_div = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

295

optc->funcs->set_vtotal_min_max(optc, params->vertical_total_min - 1, params->vertical_total_max - 1);

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

374

optc1->base.funcs = &dcn32_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

391

if (optc->funcs && optc->funcs->setup_manual_trigger)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

392

optc->funcs->setup_manual_trigger(optc);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

422

if (optc->funcs && optc->funcs->set_vtotal_min_max)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

423

optc->funcs->set_vtotal_min_max(optc,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

433

if (optc->funcs && optc->funcs->set_vtotal_min_max)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

434

optc->funcs->set_vtotal_min_max(optc, 0, 0);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

462

if (optc->funcs && optc->funcs->set_vtotal_min_max)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

463

optc->funcs->set_vtotal_min_max(optc, 0, 0);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

474

if (optc->funcs && optc->funcs->set_vtotal_min_max)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

475

optc->funcs->set_vtotal_min_max(optc, max_otg_v_total, max_otg_v_total);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

494

if (optc->funcs && optc->funcs->set_vtotal_min_max)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

495

optc->funcs->set_vtotal_min_max(optc, 0, 0);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

517

if (optc->funcs && optc->funcs->set_vtotal_min_max)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

518

optc->funcs->set_vtotal_min_max(optc,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

614

optc1->base.funcs = &dcn35_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

281

h_div = optc->funcs->is_two_pixels_per_container(dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

359

optc->funcs->set_vtotal_min_max(optc, params->vertical_total_min - 1, params->vertical_total_max - 1);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

368

optc->funcs->set_vtotal_min_max(optc, 0, 0);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

543

optc1->base.funcs = &dcn401_tg_funcs;

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

276

optc1->base.funcs = &dcn42_tg_funcs;

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

555

base->funcs = &pg_cntl35_funcs;

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

127

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

128

pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg(pg_cntl->ctx->dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

134

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->disable_dsc && !power_on) {

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

136

pg_cntl->ctx->dc->res_pool->dccg->funcs->disable_dsc(

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

200

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

201

pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg(pg_cntl->ctx->dc->res_pool->dccg, false);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

231

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

232

pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg(pg_cntl->ctx->dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

286

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

287

pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg(pg_cntl->ctx->dc->res_pool->dccg, false);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

293

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

294

pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg(pg_cntl->ctx->dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

490

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

491

pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg(pg_cntl->ctx->dc->res_pool->dccg, false);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

498

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

499

pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg(pg_cntl->ctx->dc->res_pool->dccg, true);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

60

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->enable_dsc && power_on)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

61

pg_cntl->ctx->dc->res_pool->dccg->funcs->enable_dsc(

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

636

base->funcs = &pg_cntl42_funcs;

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

85

if (pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg)

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

86

pg_cntl->ctx->dc->res_pool->dccg->funcs->dccg_enable_global_fgcg(pg_cntl->ctx->dc->res_pool->dccg, false);

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

1051

pool->base.funcs = &dce100_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

997

(!pool->stream_enc[i]->funcs ||

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

998

!pool->stream_enc[i]->funcs->dp_set_stream_attribute))

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1161

hws->funcs.enable_display_power_gating(

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1171

pipe_ctx->stream_res.tg->funcs->program_timing(pipe_ctx->stream_res.tg,

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1181

pipe_ctx->stream_res.tg->funcs->enable_advanced_request(

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1186

pipe_ctx->plane_res.mi->funcs->allocate_mem_input(pipe_ctx->plane_res.mi,

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1194

pipe_ctx->stream_res.tg->funcs->set_blank_color(

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1370

pool->base.funcs = &dce110_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

927

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

1246

pool->base.funcs = &dce112_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

1080

pool->base.funcs = &dce120_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

1124

pool->base.funcs = &dce60_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

1322

pool->base.funcs = &dce60_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

926

pool->base.funcs = &dce60_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

1136

pool->base.funcs = &dce80_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

1336

pool->base.funcs = &dce80_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

933

pool->base.funcs = &dce80_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1069

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1151

return dc->res_pool->hubbub->funcs->get_dcc_compression_cap(

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1376

pool->base.funcs = &dcn10_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

956

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

962

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1147

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1174

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1290

else if (pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing) || opp_cnt == 2)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1292

else if (hws->funcs.is_dp_dig_pixel_rate_div_policy) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1293

if (hws->funcs.is_dp_dig_pixel_rate_div_policy(pipe_ctx))

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1300

if ((pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container &&

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1301

pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&pipe_ctx->stream->timing)) ||

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1302

(hws->funcs.is_dp_dig_pixel_rate_div_policy &&

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1303

hws->funcs.is_dp_dig_pixel_rate_div_policy(pipe_ctx)) ||

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1321

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1331

if (pool->funcs->build_pipe_pix_clk_params) {

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1332

pool->funcs->build_pipe_pix_clk_params(pipe_ctx);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1712

if (!pipe_ctx->stream_res.dsc->funcs->dsc_validate_stream(pipe_ctx->stream_res.dsc, &dsc_cfg))

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2078

pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2231

if (dc->res_pool->hubbub->funcs->get_dcc_compression_cap)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2232

return dc->res_pool->hubbub->funcs->get_dcc_compression_cap(

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2461

pool->base.funcs = &dcn20_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2789

dc->hwseq->funcs.enable_power_gating_plane = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

1067

return dc->res_pool->hubbub->funcs->get_dcc_compression_cap(

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

1132

pool->base.funcs = &dcn201_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

971

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

985

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1442

pool->base.funcs = &dcn21_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

711

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

737

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

816

pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1261

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1288

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1810

dc->res_pool->funcs->update_soc_for_wm_a(dc, context);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1811

pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2030

pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2237

if (dc->res_pool->funcs->calculate_wm_and_dlg)

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2238

dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2457

pool->base.funcs = &dcn30_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2526

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2530

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2534

if (ctx->dc_bios->funcs->get_lttpr_interop) {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2538

bp_query_result = ctx->dc_bios->funcs->get_lttpr_interop(ctx->dc_bios,

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1110

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1137

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1343

if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1346

if (dc->ctx->dc_bios->funcs->get_soc_bb_info(dc->ctx->dc_bios, &bb_info) == BP_RESULT_OK) {

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1463

pool->base.funcs = &dcn301_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1523

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1527

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1531

if (ctx->dc_bios->funcs->get_lttpr_interop) {

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1535

bp_query_result = ctx->dc_bios->funcs->get_lttpr_interop(ctx->dc_bios, &is_vbios_interop_enabled);

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1094

if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1097

if (dc->ctx->dc_bios->funcs->get_soc_bb_info(

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1195

pool->opps[i]->funcs->opp_destroy(&pool->opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1357

pool->funcs = &dcn302_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1424

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1428

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1432

if (ctx->dc_bios->funcs->get_lttpr_interop) {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1436

bp_query_result = ctx->dc_bios->funcs->get_lttpr_interop(ctx->dc_bios,

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1039

if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1042

if (dc->ctx->dc_bios->funcs->get_soc_bb_info(

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1139

pool->opps[i]->funcs->opp_destroy(&pool->opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1298

pool->funcs = &dcn303_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1369

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1373

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1377

if (ctx->dc_bios->funcs->get_lttpr_interop) {

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1381

bp_query_result = ctx->dc_bios->funcs->get_lttpr_interop(ctx->dc_bios, &is_vbios_interop_enabled);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1561

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1588

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1950

if (dc->res_pool->funcs->calculate_wm_and_dlg)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1951

dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2057

pool->base.funcs = &dcn31_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2137

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2141

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2435

if (link->dc->res_pool->funcs->build_pipe_pix_clk_params)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2436

link->dc->res_pool->funcs->build_pipe_pix_clk_params(&pipes[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1621

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1647

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1893

if (dc->res_pool->funcs->calculate_wm_and_dlg)

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1894

dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1984

pool->base.funcs = &dcn314_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

2063

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

2067

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1563

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1590

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

2031

pool->base.funcs = &dcn315_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

2102

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

2106

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1556

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1583

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1904

pool->base.funcs = &dcn316_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1974

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1978

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1573

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1600

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1955

dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2360

pool->base.funcs = &dcn32_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2461

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2465

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2712

dc->dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool->base.funcs->calculate_mall_ways_from_bytes;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

98

} else if (dc->res_pool->funcs->calculate_mall_ways_from_bytes) {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

99

return dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, context->bw_ctx.bw.dcn.mall_subvp_size_bytes);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1548

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1574

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1856

pool->base.funcs = &dcn321_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1954

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1958

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

2200

dc->dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool->base.funcs->calculate_mall_ways_from_bytes;

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1622

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1649

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

2010

pool->base.funcs = &dcn35_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

2104

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

2108

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1602

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1629

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1983

pool->base.funcs = &dcn351_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

2075

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

2079

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1609

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1636

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1980

pool->base.funcs = &dcn36_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

2073

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

2077

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1563

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1590

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1901

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

2045

pool->base.funcs = &dcn401_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

2164

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

2168

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

2413

dc->dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool->base.funcs->calculate_mall_ways_from_bytes;

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1556

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1582

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1695

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

2009

pool->base.funcs = &dcn42_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

2153

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

2157

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1520

pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1549

pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1660

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1949

pool->base.funcs = &dcn42b_res_pool_funcs;

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

2114

if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

2118

bp_query_result = ctx->dc_bios->funcs->get_lttpr_caps(ctx->dc_bios, &is_vbios_lttpr_enable);

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

2370

pool->base.funcs->calculate_mall_ways_from_bytes;

drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn401/dcn401_soc_and_ip_translator.c

218

if (dc->clk_mgr->funcs->is_smu_present &&

drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn401/dcn401_soc_and_ip_translator.c

219

dc->clk_mgr->funcs->is_smu_present(dc->clk_mgr)) {

drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn42/dcn42_soc_and_ip_translator.c

157

if (dc->clk_mgr->funcs->is_smu_present &&

drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn42/dcn42_soc_and_ip_translator.c

158

dc->clk_mgr->funcs->is_smu_present(dc->clk_mgr)) {

drivers/gpu/drm/amd/display/dmub/dmub_srv.h

571

struct dmub_srv_base_funcs funcs;

drivers/gpu/drm/amd/display/dmub/dmub_srv.h

609

struct dmub_srv_base_funcs funcs;

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

103

srv->funcs.reg_write(srv->user_ctx, addr, reg_val);

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

109

uint32_t reg_val = srv->funcs.reg_read(srv->user_ctx, addr);

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

86

reg_val = srv->funcs.reg_read(srv->user_ctx, addr);

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

88

srv->funcs.reg_write(srv->user_ctx, addr, reg_val);

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

51

#define REG_READ(reg) ((CTX)->funcs.reg_read((CTX)->user_ctx, REG(reg)))

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

54

((CTX)->funcs.reg_write((CTX)->user_ctx, REG(reg), (val)))

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

207

struct dmub_srv_hw_funcs *funcs = &dmub->hw_funcs;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

221

funcs->reset = dmub_dcn20_reset;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

222

funcs->reset_release = dmub_dcn20_reset_release;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

223

funcs->backdoor_load = dmub_dcn20_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

224

funcs->setup_windows = dmub_dcn20_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

225

funcs->setup_mailbox = dmub_dcn20_setup_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

226

funcs->get_inbox1_wptr = dmub_dcn20_get_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

227

funcs->get_inbox1_rptr = dmub_dcn20_get_inbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

228

funcs->set_inbox1_wptr = dmub_dcn20_set_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

229

funcs->is_supported = dmub_dcn20_is_supported;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

230

funcs->is_hw_init = dmub_dcn20_is_hw_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

231

funcs->set_gpint = dmub_dcn20_set_gpint;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

232

funcs->is_gpint_acked = dmub_dcn20_is_gpint_acked;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

233

funcs->get_gpint_response = dmub_dcn20_get_gpint_response;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

234

funcs->get_fw_status = dmub_dcn20_get_fw_boot_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

235

funcs->enable_dmub_boot_options = dmub_dcn20_enable_dmub_boot_options;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

236

funcs->skip_dmub_panel_power_sequence = dmub_dcn20_skip_dmub_panel_power_sequence;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

237

funcs->get_current_time = dmub_dcn20_get_current_time;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

240

funcs->setup_out_mailbox = dmub_dcn20_setup_out_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

241

funcs->get_outbox1_wptr = dmub_dcn20_get_outbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

242

funcs->set_outbox1_rptr = dmub_dcn20_set_outbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

245

funcs->setup_outbox0 = dmub_dcn20_setup_outbox0;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

246

funcs->get_outbox0_wptr = dmub_dcn20_get_outbox0_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

247

funcs->set_outbox0_rptr = dmub_dcn20_set_outbox0_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

249

funcs->get_diagnostic_data = dmub_dcn20_get_diagnostic_data;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

257

funcs->backdoor_load = dmub_dcn30_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

258

funcs->setup_windows = dmub_dcn30_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

263

funcs->backdoor_load = dmub_dcn30_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

264

funcs->setup_windows = dmub_dcn30_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

269

funcs->backdoor_load = dmub_dcn30_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

270

funcs->setup_windows = dmub_dcn30_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

275

funcs->backdoor_load = dmub_dcn30_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

276

funcs->setup_windows = dmub_dcn30_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

287

funcs->is_psrsu_supported = dmub_dcn314_is_psrsu_supported;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

294

funcs->is_psrsu_supported = dmub_dcn31_is_psrsu_supported;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

296

funcs->reset = dmub_dcn31_reset;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

297

funcs->reset_release = dmub_dcn31_reset_release;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

298

funcs->backdoor_load = dmub_dcn31_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

299

funcs->setup_windows = dmub_dcn31_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

300

funcs->setup_mailbox = dmub_dcn31_setup_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

301

funcs->get_inbox1_wptr = dmub_dcn31_get_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

302

funcs->get_inbox1_rptr = dmub_dcn31_get_inbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

303

funcs->set_inbox1_wptr = dmub_dcn31_set_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

304

funcs->setup_out_mailbox = dmub_dcn31_setup_out_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

305

funcs->get_outbox1_wptr = dmub_dcn31_get_outbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

306

funcs->set_outbox1_rptr = dmub_dcn31_set_outbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

307

funcs->is_supported = dmub_dcn31_is_supported;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

308

funcs->is_hw_init = dmub_dcn31_is_hw_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

309

funcs->set_gpint = dmub_dcn31_set_gpint;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

310

funcs->is_gpint_acked = dmub_dcn31_is_gpint_acked;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

311

funcs->get_gpint_response = dmub_dcn31_get_gpint_response;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

312

funcs->get_gpint_dataout = dmub_dcn31_get_gpint_dataout;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

313

funcs->get_fw_status = dmub_dcn31_get_fw_boot_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

314

funcs->get_fw_boot_option = dmub_dcn31_get_fw_boot_option;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

315

funcs->enable_dmub_boot_options = dmub_dcn31_enable_dmub_boot_options;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

316

funcs->skip_dmub_panel_power_sequence = dmub_dcn31_skip_dmub_panel_power_sequence;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

318

funcs->setup_outbox0 = dmub_dcn31_setup_outbox0;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

319

funcs->get_outbox0_wptr = dmub_dcn31_get_outbox0_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

320

funcs->set_outbox0_rptr = dmub_dcn31_set_outbox0_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

322

funcs->get_diagnostic_data = dmub_dcn31_get_diagnostic_data;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

323

funcs->should_detect = dmub_dcn31_should_detect;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

324

funcs->get_current_time = dmub_dcn31_get_current_time;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

331

funcs->configure_dmub_in_system_memory = dmub_dcn32_configure_dmub_in_system_memory;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

332

funcs->send_inbox0_cmd = dmub_dcn32_send_inbox0_cmd;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

333

funcs->clear_inbox0_ack_register = dmub_dcn32_clear_inbox0_ack_register;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

334

funcs->read_inbox0_ack_register = dmub_dcn32_read_inbox0_ack_register;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

335

funcs->subvp_save_surf_addr = dmub_dcn32_save_surf_addr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

336

funcs->reset = dmub_dcn32_reset;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

337

funcs->reset_release = dmub_dcn32_reset_release;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

338

funcs->backdoor_load = dmub_dcn32_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

339

funcs->backdoor_load_zfb_mode = dmub_dcn32_backdoor_load_zfb_mode;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

340

funcs->setup_windows = dmub_dcn32_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

341

funcs->setup_mailbox = dmub_dcn32_setup_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

342

funcs->get_inbox1_wptr = dmub_dcn32_get_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

343

funcs->get_inbox1_rptr = dmub_dcn32_get_inbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

344

funcs->set_inbox1_wptr = dmub_dcn32_set_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

345

funcs->setup_out_mailbox = dmub_dcn32_setup_out_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

346

funcs->get_outbox1_wptr = dmub_dcn32_get_outbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

347

funcs->set_outbox1_rptr = dmub_dcn32_set_outbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

348

funcs->is_supported = dmub_dcn32_is_supported;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

349

funcs->is_hw_init = dmub_dcn32_is_hw_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

350

funcs->set_gpint = dmub_dcn32_set_gpint;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

351

funcs->is_gpint_acked = dmub_dcn32_is_gpint_acked;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

352

funcs->get_gpint_response = dmub_dcn32_get_gpint_response;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

353

funcs->get_gpint_dataout = dmub_dcn32_get_gpint_dataout;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

354

funcs->get_fw_status = dmub_dcn32_get_fw_boot_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

355

funcs->enable_dmub_boot_options = dmub_dcn32_enable_dmub_boot_options;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

356

funcs->skip_dmub_panel_power_sequence = dmub_dcn32_skip_dmub_panel_power_sequence;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

359

funcs->setup_outbox0 = dmub_dcn32_setup_outbox0;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

360

funcs->get_outbox0_wptr = dmub_dcn32_get_outbox0_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

361

funcs->set_outbox0_rptr = dmub_dcn32_set_outbox0_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

362

funcs->get_current_time = dmub_dcn32_get_current_time;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

363

funcs->get_diagnostic_data = dmub_dcn32_get_diagnostic_data;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

364

funcs->init_reg_offsets = dmub_srv_dcn32_regs_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

372

funcs->configure_dmub_in_system_memory = dmub_dcn35_configure_dmub_in_system_memory;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

373

funcs->send_inbox0_cmd = dmub_dcn35_send_inbox0_cmd;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

374

funcs->clear_inbox0_ack_register = dmub_dcn35_clear_inbox0_ack_register;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

375

funcs->read_inbox0_ack_register = dmub_dcn35_read_inbox0_ack_register;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

376

funcs->reset = dmub_dcn35_reset;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

377

funcs->reset_release = dmub_dcn35_reset_release;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

378

funcs->backdoor_load = dmub_dcn35_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

379

funcs->backdoor_load_zfb_mode = dmub_dcn35_backdoor_load_zfb_mode;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

380

funcs->setup_windows = dmub_dcn35_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

381

funcs->setup_mailbox = dmub_dcn35_setup_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

382

funcs->get_inbox1_wptr = dmub_dcn35_get_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

383

funcs->get_inbox1_rptr = dmub_dcn35_get_inbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

384

funcs->set_inbox1_wptr = dmub_dcn35_set_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

385

funcs->setup_out_mailbox = dmub_dcn35_setup_out_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

386

funcs->get_outbox1_wptr = dmub_dcn35_get_outbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

387

funcs->set_outbox1_rptr = dmub_dcn35_set_outbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

388

funcs->is_supported = dmub_dcn35_is_supported;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

389

funcs->is_hw_init = dmub_dcn35_is_hw_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

390

funcs->set_gpint = dmub_dcn35_set_gpint;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

391

funcs->is_gpint_acked = dmub_dcn35_is_gpint_acked;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

392

funcs->get_gpint_response = dmub_dcn35_get_gpint_response;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

393

funcs->get_gpint_dataout = dmub_dcn35_get_gpint_dataout;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

394

funcs->get_fw_status = dmub_dcn35_get_fw_boot_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

395

funcs->get_fw_boot_option = dmub_dcn35_get_fw_boot_option;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

396

funcs->enable_dmub_boot_options = dmub_dcn35_enable_dmub_boot_options;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

397

funcs->skip_dmub_panel_power_sequence = dmub_dcn35_skip_dmub_panel_power_sequence;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

399

funcs->setup_outbox0 = dmub_dcn35_setup_outbox0;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

400

funcs->get_outbox0_wptr = dmub_dcn35_get_outbox0_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

401

funcs->set_outbox0_rptr = dmub_dcn35_set_outbox0_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

403

funcs->get_current_time = dmub_dcn35_get_current_time;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

404

funcs->get_diagnostic_data = dmub_dcn35_get_diagnostic_data;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

405

funcs->get_preos_fw_info = dmub_dcn35_get_preos_fw_info;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

407

funcs->init_reg_offsets = dmub_srv_dcn35_regs_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

409

funcs->init_reg_offsets = dmub_srv_dcn351_regs_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

411

funcs->init_reg_offsets = dmub_srv_dcn36_regs_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

413

funcs->is_hw_powered_up = dmub_dcn35_is_hw_powered_up;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

414

funcs->should_detect = dmub_dcn35_should_detect;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

419

funcs->configure_dmub_in_system_memory = dmub_dcn42_configure_dmub_in_system_memory;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

420

funcs->send_inbox0_cmd = dmub_dcn42_send_inbox0_cmd;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

421

funcs->clear_inbox0_ack_register = dmub_dcn42_clear_inbox0_ack_register;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

422

funcs->read_inbox0_ack_register = dmub_dcn42_read_inbox0_ack_register;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

423

funcs->reset = dmub_dcn42_reset;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

424

funcs->reset_release = dmub_dcn42_reset_release;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

425

funcs->backdoor_load = dmub_dcn42_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

426

funcs->backdoor_load_zfb_mode = dmub_dcn42_backdoor_load_zfb_mode;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

427

funcs->setup_windows = dmub_dcn42_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

428

funcs->setup_mailbox = dmub_dcn42_setup_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

429

funcs->get_inbox1_wptr = dmub_dcn42_get_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

430

funcs->get_inbox1_rptr = dmub_dcn42_get_inbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

431

funcs->set_inbox1_wptr = dmub_dcn42_set_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

432

funcs->setup_out_mailbox = dmub_dcn42_setup_out_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

433

funcs->get_outbox1_wptr = dmub_dcn42_get_outbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

434

funcs->set_outbox1_rptr = dmub_dcn42_set_outbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

435

funcs->is_supported = dmub_dcn42_is_supported;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

436

funcs->is_hw_init = dmub_dcn42_is_hw_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

437

funcs->set_gpint = dmub_dcn42_set_gpint;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

438

funcs->is_gpint_acked = dmub_dcn42_is_gpint_acked;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

439

funcs->get_gpint_response = dmub_dcn42_get_gpint_response;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

440

funcs->get_gpint_dataout = dmub_dcn42_get_gpint_dataout;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

441

funcs->get_fw_status = dmub_dcn42_get_fw_boot_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

442

funcs->get_fw_boot_option = dmub_dcn42_get_fw_boot_option;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

443

funcs->enable_dmub_boot_options = dmub_dcn42_enable_dmub_boot_options;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

444

funcs->skip_dmub_panel_power_sequence = dmub_dcn42_skip_dmub_panel_power_sequence;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

446

funcs->setup_outbox0 = dmub_dcn42_setup_outbox0;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

447

funcs->get_outbox0_wptr = dmub_dcn42_get_outbox0_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

448

funcs->set_outbox0_rptr = dmub_dcn42_set_outbox0_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

450

funcs->get_current_time = dmub_dcn42_get_current_time;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

451

funcs->get_diagnostic_data = dmub_dcn42_get_diagnostic_data;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

452

funcs->get_preos_fw_info = dmub_dcn42_get_preos_fw_info;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

455

funcs->send_reg_inbox0_cmd_msg = dmub_dcn42_send_reg_inbox0_cmd_msg;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

456

funcs->read_reg_inbox0_rsp_int_status = dmub_dcn42_read_reg_inbox0_rsp_int_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

457

funcs->read_reg_inbox0_cmd_rsp = dmub_dcn42_read_reg_inbox0_cmd_rsp;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

458

funcs->write_reg_inbox0_rsp_int_ack = dmub_dcn42_write_reg_inbox0_rsp_int_ack;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

459

funcs->clear_reg_inbox0_rsp_int_ack = dmub_dcn42_clear_reg_inbox0_rsp_int_ack;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

460

funcs->enable_reg_inbox0_rsp_int = dmub_dcn42_enable_reg_inbox0_rsp_int;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

463

funcs->write_reg_outbox0_rdy_int_ack = dmub_dcn42_write_reg_outbox0_rdy_int_ack;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

464

funcs->read_reg_outbox0_msg = dmub_dcn42_read_reg_outbox0_msg;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

465

funcs->write_reg_outbox0_rsp = dmub_dcn42_write_reg_outbox0_rsp;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

466

funcs->read_reg_outbox0_rdy_int_status = dmub_dcn42_read_reg_outbox0_rdy_int_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

467

funcs->read_reg_outbox0_rsp_int_status = dmub_dcn42_read_reg_outbox0_rsp_int_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

468

funcs->enable_reg_inbox0_rsp_int = dmub_dcn42_enable_reg_inbox0_rsp_int;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

469

funcs->enable_reg_outbox0_rdy_int = dmub_dcn42_enable_reg_outbox0_rdy_int;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

470

funcs->init_reg_offsets = dmub_srv_dcn42_regs_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

472

funcs->init_reg_offsets = dmub_srv_dcn42b_regs_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

474

funcs->is_hw_powered_up = dmub_dcn42_is_hw_powered_up;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

475

funcs->should_detect = dmub_dcn42_should_detect;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

480

funcs->configure_dmub_in_system_memory = dmub_dcn401_configure_dmub_in_system_memory;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

481

funcs->send_inbox0_cmd = dmub_dcn401_send_inbox0_cmd;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

482

funcs->clear_inbox0_ack_register = dmub_dcn401_clear_inbox0_ack_register;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

483

funcs->read_inbox0_ack_register = dmub_dcn401_read_inbox0_ack_register;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

484

funcs->reset = dmub_dcn401_reset;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

485

funcs->reset_release = dmub_dcn401_reset_release;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

486

funcs->backdoor_load = dmub_dcn401_backdoor_load;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

487

funcs->backdoor_load_zfb_mode = dmub_dcn401_backdoor_load_zfb_mode;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

488

funcs->setup_windows = dmub_dcn401_setup_windows;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

489

funcs->setup_mailbox = dmub_dcn401_setup_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

490

funcs->get_inbox1_wptr = dmub_dcn401_get_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

491

funcs->get_inbox1_rptr = dmub_dcn401_get_inbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

492

funcs->set_inbox1_wptr = dmub_dcn401_set_inbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

493

funcs->setup_out_mailbox = dmub_dcn401_setup_out_mailbox;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

494

funcs->get_outbox1_wptr = dmub_dcn401_get_outbox1_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

495

funcs->set_outbox1_rptr = dmub_dcn401_set_outbox1_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

496

funcs->is_supported = dmub_dcn401_is_supported;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

497

funcs->is_hw_init = dmub_dcn401_is_hw_init;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

498

funcs->set_gpint = dmub_dcn401_set_gpint;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

499

funcs->is_gpint_acked = dmub_dcn401_is_gpint_acked;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

500

funcs->get_gpint_response = dmub_dcn401_get_gpint_response;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

501

funcs->get_gpint_dataout = dmub_dcn401_get_gpint_dataout;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

502

funcs->get_fw_status = dmub_dcn401_get_fw_boot_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

503

funcs->enable_dmub_boot_options = dmub_dcn401_enable_dmub_boot_options;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

504

funcs->skip_dmub_panel_power_sequence = dmub_dcn401_skip_dmub_panel_power_sequence;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

506

funcs->setup_outbox0 = dmub_dcn401_setup_outbox0;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

507

funcs->get_outbox0_wptr = dmub_dcn401_get_outbox0_wptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

508

funcs->set_outbox0_rptr = dmub_dcn401_set_outbox0_rptr;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

510

funcs->get_current_time = dmub_dcn401_get_current_time;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

511

funcs->get_diagnostic_data = dmub_dcn401_get_diagnostic_data;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

513

funcs->send_reg_inbox0_cmd_msg = dmub_dcn401_send_reg_inbox0_cmd_msg;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

514

funcs->read_reg_inbox0_rsp_int_status = dmub_dcn401_read_reg_inbox0_rsp_int_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

515

funcs->read_reg_inbox0_cmd_rsp = dmub_dcn401_read_reg_inbox0_cmd_rsp;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

516

funcs->write_reg_inbox0_rsp_int_ack = dmub_dcn401_write_reg_inbox0_rsp_int_ack;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

517

funcs->clear_reg_inbox0_rsp_int_ack = dmub_dcn401_clear_reg_inbox0_rsp_int_ack;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

518

funcs->enable_reg_inbox0_rsp_int = dmub_dcn401_enable_reg_inbox0_rsp_int;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

521

funcs->write_reg_outbox0_rdy_int_ack = dmub_dcn401_write_reg_outbox0_rdy_int_ack;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

522

funcs->read_reg_outbox0_msg = dmub_dcn401_read_reg_outbox0_msg;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

523

funcs->write_reg_outbox0_rsp = dmub_dcn401_write_reg_outbox0_rsp;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

524

funcs->read_reg_outbox0_rdy_int_status = dmub_dcn401_read_reg_outbox0_rdy_int_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

525

funcs->read_reg_outbox0_rsp_int_status = dmub_dcn401_read_reg_outbox0_rsp_int_status;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

526

funcs->enable_reg_inbox0_rsp_int = dmub_dcn401_enable_reg_inbox0_rsp_int;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

527

funcs->enable_reg_outbox0_rdy_int = dmub_dcn401_enable_reg_outbox0_rdy_int;

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

538

} else if (funcs->send_reg_inbox0_cmd_msg) {

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

557

dmub->funcs = params->funcs;

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

172

success = hdcp->config.ddc.funcs.read_dpcd(hdcp->config.ddc.handle,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

188

success = hdcp->config.ddc.funcs.read_i2c(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

243

success = hdcp->config.ddc.funcs.write_dpcd(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

262

success = hdcp->config.ddc.funcs.write_i2c(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

686

return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle, cp_irq_addrs,

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

711

return hdcp->config.ddc.funcs.atomic_write_poll_read_aux(

drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c

748

return hdcp->config.ddc.funcs.atomic_write_poll_read_i2c(

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

191

} funcs;

drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h

196

void *funcs;

drivers/gpu/drm/amd/display/modules/power/power_abm.c

1994

result = res_pool->multiple_abms[inst]->funcs->init_abm_config(

drivers/gpu/drm/amd/display/modules/power/power_abm.c

1997

result = res_pool->abm->funcs->init_abm_config(

drivers/gpu/drm/amd/display/modules/power/power_abm.c

2012

if (dmcu && !dmcu->funcs->is_dmcu_initialized(dmcu))

drivers/gpu/drm/amd/display/modules/power/power_abm.c

2019

result = dmcu->funcs->load_iram(dmcu, 0, (char *)(&ram_table),

drivers/gpu/drm/amd/display/modules/power/power_abm.c

2024

result = dmcu->funcs->load_iram(

drivers/gpu/drm/amd/display/modules/power/power_abm.c

2029

result = dmcu->funcs->load_iram(

drivers/gpu/drm/amd/display/modules/power/power_abm.c

2034

result = dmcu->funcs->load_iram(

drivers/gpu/drm/amd/display/modules/power/power_abm.c

2038

result = dmcu->funcs->load_iram(

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

3330

.funcs = &kv_dpm_ip_funcs,

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

3359

adev->pm.dpm.thermal.irq.funcs = &kv_dpm_irq_funcs;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

8149

.funcs = &si_dpm_ip_funcs,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

8182

adev->pm.dpm.thermal.irq.funcs = &si_dpm_irq_funcs;

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

300

.funcs = &pp_ip_funcs,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4752

source->funcs = &smu7_irq_funcs;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

567

source->funcs = &smu9_irq_funcs;

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2114

!((adev->flags & AMD_IS_APU) && adev->gfx.imu.funcs) &&

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2115

!amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs->stop)

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2116

adev->gfx.rlc.funcs->stop(adev);

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2800

.funcs = &smu_ip_funcs,

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2808

.funcs = &smu_ip_funcs,

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2816

.funcs = &smu_ip_funcs,

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2824

.funcs = &smu_ip_funcs,

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2832

.funcs = &smu_ip_funcs,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1419

irq_src->funcs = &smu_v11_0_irq_funcs;

drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

278

if (adev->smuio.funcs->get_socket_id(adev) ||

drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

279

adev->smuio.funcs->get_die_id(adev))

drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

547

if (adev->smuio.funcs && adev->smuio.funcs->get_die_id)

drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

548

return adev->smuio.funcs->get_die_id(adev) == 0;

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1344

irq_src->funcs = &smu_v13_0_irq_funcs;

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

1924

irq_src->funcs = &smu_v13_0_6_irq_funcs;

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

981

irq_src->funcs = &smu_v14_0_irq_funcs;

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

852

irq_src->funcs = &smu_v15_0_irq_funcs;

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c

234

if (!ret && adev->nbio.funcs && adev->nbio.funcs->mc_access_enable)

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c

235

adev->nbio.funcs->mc_access_enable(adev, true);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c

1263

irq_src->funcs = &smu_v15_0_8_irq_funcs;

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c

449

.funcs = &ras_v1_0_ip_funcs,

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_nbio_v7_9.c

110

adev->nbio.ras_err_event_athub_irq.funcs =

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_nbio_v7_9.c

91

adev->nbio.ras_controller_irq.funcs =

drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c

189

dev_info->socket_id = adev->smuio.funcs->get_socket_id(adev);

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

621

const struct komeda_dev_funcs *funcs;

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

632

funcs = &d71_chip_funcs;

drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c

643

return funcs;

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

130

err = mdev->funcs->change_opmode(mdev, new_mode);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

183

err = mdev->funcs->change_opmode(mdev, new_mode);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

277

mdev->funcs->flush(mdev, master->id, kcrtc_st->active_pipes);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

311

mdev->funcs->flush(mdev, kcrtc->master->id, 0);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

542

mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, true);

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

551

mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, false);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

216

mdev->funcs = komeda_identify(mdev->reg_base, &mdev->chip);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

217

if (!mdev->funcs) {

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

228

mdev->funcs->init_format_table(mdev);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

230

err = mdev->funcs->enum_resources(mdev);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

278

const struct komeda_dev_funcs *funcs = mdev->funcs;

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

297

if (funcs && funcs->cleanup)

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

298

funcs->cleanup(mdev);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

31

if (mdev->funcs->dump_register)

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

32

mdev->funcs->dump_register(mdev, sf);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

322

mdev->funcs->enable_irq(mdev);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

324

if (mdev->iommu && mdev->funcs->connect_iommu)

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

325

if (mdev->funcs->connect_iommu(mdev))

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

333

if (mdev->iommu && mdev->funcs->disconnect_iommu)

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

334

if (mdev->funcs->disconnect_iommu(mdev))

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

337

mdev->funcs->disable_irq(mdev);

drivers/gpu/drm/arm/display/komeda/komeda_dev.h

188

const struct komeda_dev_funcs *funcs;

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

271

config->funcs = &komeda_mode_config_funcs;

drivers/gpu/drm/arm/display/komeda/komeda_kms.c

48

status = mdev->funcs->irq_handler(mdev, &evts);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

167

const struct komeda_component_funcs *funcs,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

19

const struct komeda_pipeline_funcs *funcs)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

213

c->funcs = funcs;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

369

if (pipe->funcs && pipe->funcs->dump_register)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

370

pipe->funcs->dump_register(pipe, sf);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

377

if (c->funcs->dump_register)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

378

c->funcs->dump_register(c, sf);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c

40

pipe->funcs = funcs;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

128

const struct komeda_component_funcs *funcs;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

434

const struct komeda_pipeline_funcs *funcs;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

490

const struct komeda_pipeline_funcs *funcs);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

510

const struct komeda_component_funcs *funcs,

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1321

c->funcs->disable(c);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1352

c->funcs->update(c, priv_to_comp_st(c->obj.state));

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

1354

c->funcs->disable(c);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

243

if (!c->funcs->validate)

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

246

err = c->funcs->validate(c, st);

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

491

err = pipe->funcs->downscaling_clk_check(pipe,

drivers/gpu/drm/arm/hdlcd_drv.c

190

drm->mode_config.funcs = &hdlcd_mode_config_funcs;

drivers/gpu/drm/arm/malidp_drv.c

410

drm->mode_config.funcs = &malidp_mode_config_funcs;

drivers/gpu/drm/arm/malidp_planes.c

337

sgt = obj->funcs->get_sg_table(obj);

drivers/gpu/drm/armada/armada_crtc.c

1001

primary->funcs->destroy(primary);

drivers/gpu/drm/armada/armada_drv.c

117

priv->drm.mode_config.funcs = &armada_drm_mode_config_funcs;

drivers/gpu/drm/armada/armada_fbdev.c

29

fbh->fb->funcs->destroy(fbh->fb);

drivers/gpu/drm/armada/armada_fbdev.c

99

fbh->funcs = &armada_fbdev_helper_funcs;

drivers/gpu/drm/armada/armada_gem.c

207

obj->obj.funcs = &armada_gem_object_funcs;

drivers/gpu/drm/armada/armada_gem.c

228

obj->obj.funcs = &armada_gem_object_funcs;

drivers/gpu/drm/aspeed/aspeed_gfx_drv.c

118

drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs;

drivers/gpu/drm/ast/ast_dp.c

485

connector->funcs->atomic_destroy_state(connector, connector->state);

drivers/gpu/drm/ast/ast_drv.h

560

const struct drm_plane_funcs *funcs,

drivers/gpu/drm/ast/ast_mode.c

1030

dev->mode_config.funcs = &ast_mode_config_funcs;

drivers/gpu/drm/ast/ast_mode.c

476

const struct drm_plane_funcs *funcs,

drivers/gpu/drm/ast/ast_mode.c

486

return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,

drivers/gpu/drm/ast/ast_mode.c

896

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

829

dev->mode_config.funcs = &mode_config_funcs;

drivers/gpu/drm/bridge/display-connector.c

121

if (!prev_bridge || !prev_bridge->funcs->atomic_get_output_bus_fmts) {

drivers/gpu/drm/bridge/display-connector.c

142

return prev_bridge->funcs->atomic_get_output_bus_fmts(prev_bridge, prev_bridge_state,

drivers/gpu/drm/bridge/display-connector.c

164

if (!prev_bridge || !prev_bridge->funcs->atomic_get_input_bus_fmts) {

drivers/gpu/drm/bridge/display-connector.c

180

return prev_bridge->funcs->atomic_get_input_bus_fmts(prev_bridge, prev_bridge_state,

drivers/gpu/drm/bridge/fsl-ldb.c

285

static const struct drm_bridge_funcs funcs = {

drivers/gpu/drm/bridge/fsl-ldb.c

305

fsl_ldb = devm_drm_bridge_alloc(dev, struct fsl_ldb, bridge, &funcs);

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c

113

if (!next_bridge->funcs->atomic_get_input_bus_fmts)

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c

119

return next_bridge->funcs->atomic_get_input_bus_fmts(next_bridge,

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

126

ret = companion->funcs->atomic_check(companion,

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

215

companion->funcs->mode_set(companion, mode, adjusted_mode);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

231

companion->funcs->atomic_pre_enable(companion, state);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

265

companion->funcs->atomic_enable(companion, state);

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

295

companion->funcs->atomic_disable(companion, state);

drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c

130

p2d->companion->funcs->mode_set(p2d->companion, mode,

drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c

143

p2d->companion->funcs->atomic_disable(p2d->companion, state);

drivers/gpu/drm/bridge/ite-it6263.c

683

return bridge->funcs->hdmi_tmds_char_rate_valid(bridge, mode, rate);

drivers/gpu/drm/bridge/lontium-lt8713sx.c

553

lt8713sx->bridge.funcs = &lt8713sx_bridge_funcs;

drivers/gpu/drm/bridge/lvds-codec.c

101

static const struct drm_bridge_funcs funcs = {

drivers/gpu/drm/bridge/lvds-codec.c

122

&funcs);

drivers/gpu/drm/bridge/panel.c

204

if (panel->funcs->debugfs_init)

drivers/gpu/drm/bridge/panel.c

205

panel->funcs->debugfs_init(panel, root);

drivers/gpu/drm/bridge/panel.c

232

return bridge->funcs == &panel_bridge_bridge_funcs;

drivers/gpu/drm/bridge/panel.c

89

if (connector->funcs->reset)

drivers/gpu/drm/bridge/panel.c

90

connector->funcs->reset(connector);

drivers/gpu/drm/bridge/tc358767.c

2459

const struct drm_bridge_funcs *funcs;

drivers/gpu/drm/bridge/tc358767.c

2465

funcs = (mode == mode_dsi_to_dpi) ? &tc_dpi_bridge_funcs : &tc_edp_bridge_funcs;

drivers/gpu/drm/bridge/tc358767.c

2467

tc = devm_drm_bridge_alloc(dev, struct tc_data, bridge, funcs);

drivers/gpu/drm/display/drm_bridge_connector.c

151

if (bridge->funcs->hpd_notify)

drivers/gpu/drm/display/drm_bridge_connector.c

152

bridge->funcs->hpd_notify(bridge, connector, status);

drivers/gpu/drm/display/drm_bridge_connector.c

221

status = detect->funcs->detect(detect, connector);

drivers/gpu/drm/display/drm_bridge_connector.c

263

if (bridge->funcs->debugfs_init)

drivers/gpu/drm/display/drm_bridge_connector.c

264

bridge->funcs->debugfs_init(bridge, root);

drivers/gpu/drm/display/drm_bridge_connector.c

350

return bridge->funcs->get_modes(bridge, connector);

drivers/gpu/drm/display/drm_bridge_connector.c

406

if (bridge->funcs->hdmi_tmds_char_rate_valid)

drivers/gpu/drm/display/drm_bridge_connector.c

407

return bridge->funcs->hdmi_tmds_char_rate_valid(bridge, mode, tmds_rate);

drivers/gpu/drm/display/drm_bridge_connector.c

422

return bridge->funcs->hdmi_clear_avi_infoframe(bridge);

drivers/gpu/drm/display/drm_bridge_connector.c

436

return bridge->funcs->hdmi_write_avi_infoframe(bridge, buffer, len);

drivers/gpu/drm/display/drm_bridge_connector.c

449

return bridge->funcs->hdmi_clear_hdmi_infoframe(bridge);

drivers/gpu/drm/display/drm_bridge_connector.c

463

return bridge->funcs->hdmi_write_hdmi_infoframe(bridge, buffer, len);

drivers/gpu/drm/display/drm_bridge_connector.c

476

return bridge->funcs->hdmi_clear_audio_infoframe(bridge);

drivers/gpu/drm/display/drm_bridge_connector.c

490

return bridge->funcs->hdmi_write_audio_infoframe(bridge, buffer, len);

drivers/gpu/drm/display/drm_bridge_connector.c

503

return bridge->funcs->hdmi_clear_hdr_drm_infoframe(bridge);

drivers/gpu/drm/display/drm_bridge_connector.c

517

return bridge->funcs->hdmi_write_hdr_drm_infoframe(bridge, buffer, len);

drivers/gpu/drm/display/drm_bridge_connector.c

530

return bridge->funcs->hdmi_clear_spd_infoframe(bridge);

drivers/gpu/drm/display/drm_bridge_connector.c

544

return bridge->funcs->hdmi_write_spd_infoframe(bridge, buffer, len);

drivers/gpu/drm/display/drm_bridge_connector.c

599

if (!bridge->funcs->hdmi_audio_startup)

drivers/gpu/drm/display/drm_bridge_connector.c

602

return bridge->funcs->hdmi_audio_startup(bridge, connector);

drivers/gpu/drm/display/drm_bridge_connector.c

608

if (!bridge->funcs->dp_audio_startup)

drivers/gpu/drm/display/drm_bridge_connector.c

611

return bridge->funcs->dp_audio_startup(bridge, connector);

drivers/gpu/drm/display/drm_bridge_connector.c

628

return bridge->funcs->hdmi_audio_prepare(bridge, connector, fmt, hparms);

drivers/gpu/drm/display/drm_bridge_connector.c

634

return bridge->funcs->dp_audio_prepare(bridge, connector, fmt, hparms);

drivers/gpu/drm/display/drm_bridge_connector.c

648

bridge->funcs->hdmi_audio_shutdown(bridge, connector);

drivers/gpu/drm/display/drm_bridge_connector.c

653

bridge->funcs->dp_audio_shutdown(bridge, connector);

drivers/gpu/drm/display/drm_bridge_connector.c

667

if (!bridge->funcs->hdmi_audio_mute_stream)

drivers/gpu/drm/display/drm_bridge_connector.c

670

return bridge->funcs->hdmi_audio_mute_stream(bridge, connector,

drivers/gpu/drm/display/drm_bridge_connector.c

677

if (!bridge->funcs->dp_audio_mute_stream)

drivers/gpu/drm/display/drm_bridge_connector.c

680

return bridge->funcs->dp_audio_mute_stream(bridge, connector,

drivers/gpu/drm/display/drm_bridge_connector.c

702

return bridge->funcs->hdmi_cec_enable(bridge, enable);

drivers/gpu/drm/display/drm_bridge_connector.c

713

return bridge->funcs->hdmi_cec_log_addr(bridge, logical_addr);

drivers/gpu/drm/display/drm_bridge_connector.c

727

return bridge->funcs->hdmi_cec_transmit(bridge, attempts,

drivers/gpu/drm/display/drm_bridge_connector.c

740

if (!bridge->funcs->hdmi_cec_init)

drivers/gpu/drm/display/drm_bridge_connector.c

743

return bridge->funcs->hdmi_cec_init(bridge, connector);

drivers/gpu/drm/display/drm_bridge_connector.c

857

if (!bridge->funcs->hdmi_write_avi_infoframe ||

drivers/gpu/drm/display/drm_bridge_connector.c

858

!bridge->funcs->hdmi_clear_avi_infoframe ||

drivers/gpu/drm/display/drm_bridge_connector.c

859

!bridge->funcs->hdmi_write_hdmi_infoframe ||

drivers/gpu/drm/display/drm_bridge_connector.c

860

!bridge->funcs->hdmi_clear_hdmi_infoframe)

drivers/gpu/drm/display/drm_bridge_connector.c

864

(!bridge->funcs->hdmi_write_audio_infoframe ||

drivers/gpu/drm/display/drm_bridge_connector.c

865

!bridge->funcs->hdmi_clear_audio_infoframe))

drivers/gpu/drm/display/drm_bridge_connector.c

869

(!bridge->funcs->hdmi_write_hdr_drm_infoframe ||

drivers/gpu/drm/display/drm_bridge_connector.c

870

!bridge->funcs->hdmi_clear_hdr_drm_infoframe))

drivers/gpu/drm/display/drm_bridge_connector.c

874

(!bridge->funcs->hdmi_write_spd_infoframe ||

drivers/gpu/drm/display/drm_bridge_connector.c

875

!bridge->funcs->hdmi_clear_spd_infoframe))

drivers/gpu/drm/display/drm_bridge_connector.c

897

if (!bridge->funcs->hdmi_audio_prepare ||

drivers/gpu/drm/display/drm_bridge_connector.c

898

!bridge->funcs->hdmi_audio_shutdown)

drivers/gpu/drm/display/drm_bridge_connector.c

915

if (!bridge->funcs->dp_audio_prepare ||

drivers/gpu/drm/display/drm_bridge_connector.c

916

!bridge->funcs->dp_audio_shutdown)

drivers/gpu/drm/display/drm_bridge_connector.c

935

if (!bridge->funcs->hdmi_cec_enable ||

drivers/gpu/drm/display/drm_bridge_connector.c

936

!bridge->funcs->hdmi_cec_log_addr ||

drivers/gpu/drm/display/drm_bridge_connector.c

937

!bridge->funcs->hdmi_cec_transmit)

drivers/gpu/drm/display/drm_dp_mst_topology.c

5794

mgr->funcs = NULL;

drivers/gpu/drm/display/drm_dp_tunnel.c

25

((__obj)->funcs == &tunnel_group_funcs)

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

158

const struct drm_connector_hdmi_audio_funcs *funcs,

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

176

if (!funcs ||

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

177

!funcs->prepare ||

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

178

!funcs->shutdown)

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

181

connector->hdmi_audio.funcs = funcs;

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

20

const struct drm_connector_hdmi_audio_funcs *funcs =

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

21

connector->hdmi_audio.funcs;

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

23

if (funcs->startup)

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

24

return funcs->startup(connector);

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

34

const struct drm_connector_hdmi_audio_funcs *funcs =

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

35

connector->hdmi_audio.funcs;

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

37

return funcs->prepare(connector, fmt, hparms);

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

43

const struct drm_connector_hdmi_audio_funcs *funcs =

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

44

connector->hdmi_audio.funcs;

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

46

return funcs->shutdown(connector);

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

53

const struct drm_connector_hdmi_audio_funcs *funcs =

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

54

connector->hdmi_audio.funcs;

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

56

if (funcs->mute_stream)

drivers/gpu/drm/display/drm_hdmi_audio_helper.c

57

return funcs->mute_stream(connector, enable, direction);

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

104

data->funcs = funcs;

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

121

connector->cec.funcs = &drm_connector_hdmi_cec_adapter_funcs;

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

123

ret = funcs->init(connector);

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

18

const struct drm_connector_hdmi_cec_funcs *funcs;

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

26

return data->funcs->enable(connector, enable);

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

34

return data->funcs->log_addr(connector, logical_addr);

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

43

return data->funcs->transmit(connector, attempts, signal_free_time, msg);

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

74

if (data->funcs->uninit)

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

75

data->funcs->uninit(connector);

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

87

const struct drm_connector_hdmi_cec_funcs *funcs,

drivers/gpu/drm/display/drm_hdmi_cec_helper.c

97

if (!funcs->init || !funcs->enable || !funcs->log_addr || !funcs->transmit)

drivers/gpu/drm/display/drm_hdmi_cec_notifier_helper.c

57

connector->cec.funcs = &drm_connector_cec_notifier_funcs;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1005

const struct drm_connector_hdmi_funcs *funcs = connector->hdmi.funcs;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1016

if (!funcs) {

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1024

&funcs->avi, "AVI",

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1032

&funcs->audio, "Audio",

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1039

&funcs->hdr_drm, "HDR DRM",

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1046

&funcs->spd, "SPD",

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1054

&funcs->hdmi, "HDMI-VS",

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1083

const struct drm_connector_hdmi_funcs *funcs = connector->hdmi.funcs;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1092

if (!funcs || !funcs->audio.write_infoframe) {

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1102

ret = write_infoframe(connector, &funcs->audio, "Audio", infoframe);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1124

const struct drm_connector_hdmi_funcs *funcs = connector->hdmi.funcs;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1133

if (!funcs || !funcs->audio.write_infoframe) {

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1142

ret = clear_infoframe(connector, &funcs->audio, "Audio");

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1166

if (connector->hdmi.funcs->read_edid)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

1167

drm_edid = connector->hdmi.funcs->read_edid(connector);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

555

const struct drm_connector_hdmi_funcs *funcs = connector->hdmi.funcs;

drivers/gpu/drm/display/drm_hdmi_state_helper.c

561

if (funcs && funcs->tmds_char_rate_valid) {

drivers/gpu/drm/display/drm_hdmi_state_helper.c

564

status = funcs->tmds_char_rate_valid(connector, mode, clock);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

743

if (!connector->hdmi.funcs->spd.write_infoframe)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

770

if (!connector->hdmi.funcs->hdr_drm.write_infoframe)

drivers/gpu/drm/display/drm_hdmi_state_helper.c

923

const struct drm_connector_infoframe_funcs *funcs,

drivers/gpu/drm/display/drm_hdmi_state_helper.c

931

if (!funcs->clear_infoframe) {

drivers/gpu/drm/display/drm_hdmi_state_helper.c

936

ret = funcs->clear_infoframe(connector);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

946

const struct drm_connector_infoframe_funcs *funcs,

drivers/gpu/drm/display/drm_hdmi_state_helper.c

957

if (!funcs->write_infoframe) {

drivers/gpu/drm/display/drm_hdmi_state_helper.c

966

ret = funcs->write_infoframe(connector, buffer, len);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

976

const struct drm_connector_infoframe_funcs *funcs,

drivers/gpu/drm/display/drm_hdmi_state_helper.c

982

return write_infoframe(connector, funcs, type, new_frame);

drivers/gpu/drm/display/drm_hdmi_state_helper.c

985

return clear_infoframe(connector, funcs, type);

drivers/gpu/drm/drm_atomic.c

1013

obj_state = obj->funcs->atomic_duplicate_state(obj);

drivers/gpu/drm/drm_atomic.c

1316

connector_state = connector->funcs->atomic_duplicate_state(connector);

drivers/gpu/drm/drm_atomic.c

1372

if (connector->funcs->atomic_print_state)

drivers/gpu/drm/drm_atomic.c

1373

connector->funcs->atomic_print_state(p, state);

drivers/gpu/drm/drm_atomic.c

1479

if (!bridge->funcs->atomic_duplicate_state)

drivers/gpu/drm/drm_atomic.c

1711

if (config->funcs->atomic_check) {

drivers/gpu/drm/drm_atomic.c

1712

ret = config->funcs->atomic_check(state->dev, state);

drivers/gpu/drm/drm_atomic.c

175

if (!config->funcs->atomic_state_alloc) {

drivers/gpu/drm/drm_atomic.c

1789

return config->funcs->atomic_commit(state->dev, state, false);

drivers/gpu/drm/drm_atomic.c

1818

return config->funcs->atomic_commit(state->dev, state, true);

drivers/gpu/drm/drm_atomic.c

188

return config->funcs->atomic_state_alloc(dev);

drivers/gpu/drm/drm_atomic.c

1995

if (obj->funcs->atomic_print_state)

drivers/gpu/drm/drm_atomic.c

1996

obj->funcs->atomic_print_state(p, state);

drivers/gpu/drm/drm_atomic.c

216

connector->funcs->atomic_destroy_state(connector,

drivers/gpu/drm/drm_atomic.c

231

crtc->funcs->atomic_destroy_state(crtc,

drivers/gpu/drm/drm_atomic.c

251

plane->funcs->atomic_destroy_state(plane,

drivers/gpu/drm/drm_atomic.c

276

obj->funcs->atomic_destroy_state(obj,

drivers/gpu/drm/drm_atomic.c

311

if (config->funcs->atomic_state_clear)

drivers/gpu/drm/drm_atomic.c

312

config->funcs->atomic_state_clear(state);

drivers/gpu/drm/drm_atomic.c

335

if (config->funcs->atomic_state_free) {

drivers/gpu/drm/drm_atomic.c

336

config->funcs->atomic_state_free(state);

drivers/gpu/drm/drm_atomic.c

382

crtc_state = crtc->funcs->atomic_duplicate_state(crtc);

drivers/gpu/drm/drm_atomic.c

480

if (crtc->funcs->atomic_print_state)

drivers/gpu/drm/drm_atomic.c

481

crtc->funcs->atomic_print_state(p, state);

drivers/gpu/drm/drm_atomic.c

569

plane_state = plane->funcs->atomic_duplicate_state(plane);

drivers/gpu/drm/drm_atomic.c

878

if (plane->funcs->atomic_print_state)

drivers/gpu/drm/drm_atomic.c

879

plane->funcs->atomic_print_state(p, state);

drivers/gpu/drm/drm_atomic.c

935

const struct drm_private_state_funcs *funcs)

drivers/gpu/drm/drm_atomic.c

943

obj->funcs = funcs;

drivers/gpu/drm/drm_atomic.c

946

state = obj->funcs->atomic_create_state(obj);

drivers/gpu/drm/drm_atomic.c

966

obj->funcs->atomic_destroy_state(obj, obj->state);

drivers/gpu/drm/drm_atomic_helper.c

1029

const struct drm_plane_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1033

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1039

if (!funcs || !funcs->atomic_check)

drivers/gpu/drm/drm_atomic_helper.c

1042

ret = funcs->atomic_check(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

1052

const struct drm_crtc_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1054

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1056

if (!funcs || !funcs->atomic_check)

drivers/gpu/drm/drm_atomic_helper.c

1059

ret = funcs->atomic_check(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

1185

const struct drm_encoder_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1217

funcs = encoder->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

123

const struct drm_connector_helper_funcs *funcs = connector->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1231

if (funcs) {

drivers/gpu/drm/drm_atomic_helper.c

1232

if (funcs->atomic_disable)

drivers/gpu/drm/drm_atomic_helper.c

1233

funcs->atomic_disable(encoder, state);

drivers/gpu/drm/drm_atomic_helper.c

1234

else if (new_conn_state->crtc && funcs->prepare)

drivers/gpu/drm/drm_atomic_helper.c

1235

funcs->prepare(encoder);

drivers/gpu/drm/drm_atomic_helper.c

1236

else if (funcs->disable)

drivers/gpu/drm/drm_atomic_helper.c

1237

funcs->disable(encoder);

drivers/gpu/drm/drm_atomic_helper.c

1238

else if (funcs->dpms)

drivers/gpu/drm/drm_atomic_helper.c

1239

funcs->dpms(encoder, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/drm_atomic_helper.c

1261

const struct drm_crtc_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1271

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1278

if (new_crtc_state->enable && funcs->prepare)

drivers/gpu/drm/drm_atomic_helper.c

1279

funcs->prepare(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1280

else if (funcs->atomic_disable)

drivers/gpu/drm/drm_atomic_helper.c

1281

funcs->atomic_disable(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

1282

else if (funcs->disable)

drivers/gpu/drm/drm_atomic_helper.c

1283

funcs->disable(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1284

else if (funcs->dpms)

drivers/gpu/drm/drm_atomic_helper.c

1285

funcs->dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/drm_atomic_helper.c

129

if (funcs->atomic_best_encoder)

drivers/gpu/drm/drm_atomic_helper.c

130

new_encoder = funcs->atomic_best_encoder(connector,

drivers/gpu/drm/drm_atomic_helper.c

132

else if (funcs->best_encoder)

drivers/gpu/drm/drm_atomic_helper.c

133

new_encoder = funcs->best_encoder(connector);

drivers/gpu/drm/drm_atomic_helper.c

1498

const struct drm_crtc_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1503

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1505

if (new_crtc_state->enable && funcs->mode_set_nofb) {

drivers/gpu/drm/drm_atomic_helper.c

1509

funcs->mode_set_nofb(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1514

const struct drm_encoder_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1523

funcs = encoder->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1538

if (funcs && funcs->atomic_mode_set) {

drivers/gpu/drm/drm_atomic_helper.c

1539

funcs->atomic_mode_set(encoder, new_crtc_state,

drivers/gpu/drm/drm_atomic_helper.c

1541

} else if (funcs && funcs->mode_set) {

drivers/gpu/drm/drm_atomic_helper.c

1542

funcs->mode_set(encoder, mode, adjusted_mode);

drivers/gpu/drm/drm_atomic_helper.c

1595

const struct drm_connector_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1597

funcs = connector->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1598

if (!funcs->atomic_commit)

drivers/gpu/drm/drm_atomic_helper.c

1603

funcs->atomic_commit(connector, state);

drivers/gpu/drm/drm_atomic_helper.c

1668

const struct drm_crtc_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1677

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1682

if (funcs->atomic_enable)

drivers/gpu/drm/drm_atomic_helper.c

1683

funcs->atomic_enable(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

1684

else if (funcs->commit)

drivers/gpu/drm/drm_atomic_helper.c

1685

funcs->commit(crtc);

drivers/gpu/drm/drm_atomic_helper.c

1707

const struct drm_encoder_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

1719

funcs = encoder->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

1730

if (funcs) {

drivers/gpu/drm/drm_atomic_helper.c

1731

if (funcs->atomic_enable)

drivers/gpu/drm/drm_atomic_helper.c

1732

funcs->atomic_enable(encoder, state);

drivers/gpu/drm/drm_atomic_helper.c

1733

else if (funcs->enable)

drivers/gpu/drm/drm_atomic_helper.c

1734

funcs->enable(encoder);

drivers/gpu/drm/drm_atomic_helper.c

1735

else if (funcs->commit)

drivers/gpu/drm/drm_atomic_helper.c

1736

funcs->commit(encoder);

drivers/gpu/drm/drm_atomic_helper.c

2037

const struct drm_mode_config_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

2044

funcs = dev->mode_config.helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2071

if (funcs && funcs->atomic_commit_tail)

drivers/gpu/drm/drm_atomic_helper.c

2072

funcs->atomic_commit_tail(state);

drivers/gpu/drm/drm_atomic_helper.c

2116

const struct drm_plane_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

2142

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2143

if (!funcs->atomic_async_update) {

drivers/gpu/drm/drm_atomic_helper.c

2170

ret = funcs->atomic_async_check(plane, state, false);

drivers/gpu/drm/drm_atomic_helper.c

2197

const struct drm_plane_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

2204

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2205

funcs->atomic_async_update(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

2521

const struct drm_mode_config_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

2524

funcs = state->dev->mode_config.helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2617

if (funcs && funcs->atomic_commit_setup)

drivers/gpu/drm/drm_atomic_helper.c

2618

return funcs->atomic_commit_setup(state);

drivers/gpu/drm/drm_atomic_helper.c

2833

const struct drm_plane_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

2835

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2837

if (funcs->prepare_fb) {

drivers/gpu/drm/drm_atomic_helper.c

2838

ret = funcs->prepare_fb(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2842

WARN_ON_ONCE(funcs->cleanup_fb);

drivers/gpu/drm/drm_atomic_helper.c

2854

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2856

if (funcs->begin_fb_access) {

drivers/gpu/drm/drm_atomic_helper.c

2857

ret = funcs->begin_fb_access(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2867

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2872

if (funcs->end_fb_access)

drivers/gpu/drm/drm_atomic_helper.c

2873

funcs->end_fb_access(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2878

const struct drm_plane_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

2883

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2885

if (funcs->cleanup_fb)

drivers/gpu/drm/drm_atomic_helper.c

2886

funcs->cleanup_fb(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2911

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2913

if (funcs->end_fb_access)

drivers/gpu/drm/drm_atomic_helper.c

2914

funcs->end_fb_access(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2918

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2920

if (funcs->cleanup_fb)

drivers/gpu/drm/drm_atomic_helper.c

2921

funcs->cleanup_fb(plane, new_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

2985

const struct drm_crtc_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

2987

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

2989

if (!funcs || !funcs->atomic_begin)

drivers/gpu/drm/drm_atomic_helper.c

299

const struct drm_connector_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

2995

funcs->atomic_begin(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

2999

const struct drm_plane_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

3002

funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3004

if (!funcs)

drivers/gpu/drm/drm_atomic_helper.c

3027

if (disabling && funcs->atomic_disable) {

drivers/gpu/drm/drm_atomic_helper.c

3036

funcs->atomic_disable(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

3038

funcs->atomic_update(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

3040

if (!disabling && funcs->atomic_enable) {

drivers/gpu/drm/drm_atomic_helper.c

3042

funcs->atomic_enable(plane, state);

drivers/gpu/drm/drm_atomic_helper.c

3048

const struct drm_crtc_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

3050

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3052

if (!funcs || !funcs->atomic_flush)

drivers/gpu/drm/drm_atomic_helper.c

3058

funcs->atomic_flush(crtc, state);

drivers/gpu/drm/drm_atomic_helper.c

3066

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3068

if (funcs->end_fb_access)

drivers/gpu/drm/drm_atomic_helper.c

3069

funcs->end_fb_access(plane, old_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

3210

const struct drm_plane_helper_funcs *funcs = plane->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

3212

if (funcs->cleanup_fb)

drivers/gpu/drm/drm_atomic_helper.c

3213

funcs->cleanup_fb(plane, old_plane_state);

drivers/gpu/drm/drm_atomic_helper.c

359

funcs = connector->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

361

if (funcs->atomic_best_encoder)

drivers/gpu/drm/drm_atomic_helper.c

362

new_encoder = funcs->atomic_best_encoder(connector, state);

drivers/gpu/drm/drm_atomic_helper.c

363

else if (funcs->best_encoder)

drivers/gpu/drm/drm_atomic_helper.c

364

new_encoder = funcs->best_encoder(connector);

drivers/gpu/drm/drm_atomic_helper.c

437

const struct drm_encoder_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

454

funcs = encoder->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

466

if (funcs && funcs->atomic_check) {

drivers/gpu/drm/drm_atomic_helper.c

467

ret = funcs->atomic_check(encoder, new_crtc_state,

drivers/gpu/drm/drm_atomic_helper.c

475

} else if (funcs && funcs->mode_fixup) {

drivers/gpu/drm/drm_atomic_helper.c

476

ret = funcs->mode_fixup(encoder, &new_crtc_state->mode,

drivers/gpu/drm/drm_atomic_helper.c

488

const struct drm_crtc_helper_funcs *funcs;

drivers/gpu/drm/drm_atomic_helper.c

497

funcs = crtc->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

498

if (!funcs || !funcs->mode_fixup)

drivers/gpu/drm/drm_atomic_helper.c

501

ret = funcs->mode_fixup(crtc, &new_crtc_state->mode,

drivers/gpu/drm/drm_atomic_helper.c

715

const struct drm_connector_helper_funcs *funcs = connector->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

742

if (funcs->atomic_check)

drivers/gpu/drm/drm_atomic_helper.c

743

ret = funcs->atomic_check(connector, state);

drivers/gpu/drm/drm_atomic_helper.c

788

const struct drm_connector_helper_funcs *funcs = connector->helper_private;

drivers/gpu/drm/drm_atomic_helper.c

793

if (funcs->atomic_check)

drivers/gpu/drm/drm_atomic_helper.c

794

ret = funcs->atomic_check(connector, state);

drivers/gpu/drm/drm_atomic_state_helper.c

121

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/drm_atomic_uapi.c

1048

} else if (connector->funcs->atomic_get_property) {

drivers/gpu/drm/drm_atomic_uapi.c

1049

return connector->funcs->atomic_get_property(connector,

drivers/gpu/drm/drm_atomic_uapi.c

481

} else if (crtc->funcs->atomic_set_property) {

drivers/gpu/drm/drm_atomic_uapi.c

482

return crtc->funcs->atomic_set_property(crtc, state, property, val);

drivers/gpu/drm/drm_atomic_uapi.c

522

else if (crtc->funcs->atomic_get_property)

drivers/gpu/drm/drm_atomic_uapi.c

523

return crtc->funcs->atomic_get_property(crtc, state, property, val);

drivers/gpu/drm/drm_atomic_uapi.c

625

} else if (plane->funcs->atomic_set_property) {

drivers/gpu/drm/drm_atomic_uapi.c

626

return plane->funcs->atomic_set_property(plane, state,

drivers/gpu/drm/drm_atomic_uapi.c

704

} else if (plane->funcs->atomic_get_property) {

drivers/gpu/drm/drm_atomic_uapi.c

705

return plane->funcs->atomic_get_property(plane, state, property, val);

drivers/gpu/drm/drm_atomic_uapi.c

963

} else if (connector->funcs->atomic_set_property) {

drivers/gpu/drm/drm_atomic_uapi.c

964

return connector->funcs->atomic_set_property(connector,

drivers/gpu/drm/drm_bridge.c

1032

if (bridge->funcs->atomic_enable) {

drivers/gpu/drm/drm_bridge.c

1033

bridge->funcs->atomic_enable(bridge, state);

drivers/gpu/drm/drm_bridge.c

1034

} else if (bridge->funcs->enable) {

drivers/gpu/drm/drm_bridge.c

1035

bridge->funcs->enable(bridge);

drivers/gpu/drm/drm_bridge.c

1044

if (bridge->funcs->atomic_check) {

drivers/gpu/drm/drm_bridge.c

1053

ret = bridge->funcs->atomic_check(bridge, bridge_state,

drivers/gpu/drm/drm_bridge.c

1057

} else if (bridge->funcs->mode_fixup) {

drivers/gpu/drm/drm_bridge.c

1058

if (!bridge->funcs->mode_fixup(bridge, &crtc_state->mode,

drivers/gpu/drm/drm_bridge.c

1088

if (!cur_bridge->funcs->atomic_get_input_bus_fmts) {

drivers/gpu/drm/drm_bridge.c

1117

in_bus_fmts = cur_bridge->funcs->atomic_get_input_bus_fmts(cur_bridge,

drivers/gpu/drm/drm_bridge.c

1204

if (last_bridge->funcs->atomic_get_output_bus_fmts) {

drivers/gpu/drm/drm_bridge.c

1205

const struct drm_bridge_funcs *funcs = last_bridge->funcs;

drivers/gpu/drm/drm_bridge.c

1214

out_bus_fmts = funcs->atomic_get_output_bus_fmts(last_bridge,

drivers/gpu/drm/drm_bridge.c

1378

return bridge->funcs->detect(bridge, connector);

drivers/gpu/drm/drm_bridge.c

1402

return bridge->funcs->get_modes(bridge, connector);

drivers/gpu/drm/drm_bridge.c

1424

return bridge->funcs->edid_read(bridge, connector);

drivers/gpu/drm/drm_bridge.c

1462

if (bridge->funcs->hpd_enable)

drivers/gpu/drm/drm_bridge.c

1463

bridge->funcs->hpd_enable(bridge);

drivers/gpu/drm/drm_bridge.c

1488

if (bridge->funcs->hpd_disable)

drivers/gpu/drm/drm_bridge.c

1489

bridge->funcs->hpd_disable(bridge);

drivers/gpu/drm/drm_bridge.c

1656

drm_printf(p, "bridge[%u]: %ps\n", idx, bridge->funcs);

drivers/gpu/drm/drm_bridge.c

275

if (bridge->funcs->destroy)

drivers/gpu/drm/drm_bridge.c

276

bridge->funcs->destroy(bridge);

drivers/gpu/drm/drm_bridge.c

365

const struct drm_bridge_funcs *funcs)

drivers/gpu/drm/drm_bridge.c

371

if (!funcs) {

drivers/gpu/drm/drm_bridge.c

383

bridge->funcs = funcs;

drivers/gpu/drm/drm_bridge.c

483

state = bridge->funcs->atomic_duplicate_state(bridge);

drivers/gpu/drm/drm_bridge.c

494

bridge->funcs->atomic_destroy_state(bridge, state);

drivers/gpu/drm/drm_bridge.c

503

state = bridge->funcs->atomic_reset(bridge);

drivers/gpu/drm/drm_bridge.c

518

return bridge->funcs->atomic_reset != NULL;

drivers/gpu/drm/drm_bridge.c

584

if (bridge->funcs->attach) {

drivers/gpu/drm/drm_bridge.c

585

ret = bridge->funcs->attach(bridge, encoder, flags);

drivers/gpu/drm/drm_bridge.c

628

if (bridge->funcs->detach)

drivers/gpu/drm/drm_bridge.c

629

bridge->funcs->detach(bridge);

drivers/gpu/drm/drm_bridge.c

752

if (!bridge->funcs->mode_valid)

drivers/gpu/drm/drm_bridge.c

755

ret = bridge->funcs->mode_valid(bridge, info, mode);

drivers/gpu/drm/drm_bridge.c

784

if (bridge->funcs->mode_set)

drivers/gpu/drm/drm_bridge.c

785

bridge->funcs->mode_set(bridge, mode, adjusted_mode);

drivers/gpu/drm/drm_bridge.c

813

if (iter->funcs->atomic_disable) {

drivers/gpu/drm/drm_bridge.c

814

iter->funcs->atomic_disable(iter, state);

drivers/gpu/drm/drm_bridge.c

815

} else if (iter->funcs->disable) {

drivers/gpu/drm/drm_bridge.c

816

iter->funcs->disable(iter);

drivers/gpu/drm/drm_bridge.c

829

if (state && bridge->funcs->atomic_post_disable)

drivers/gpu/drm/drm_bridge.c

830

bridge->funcs->atomic_post_disable(bridge, state);

drivers/gpu/drm/drm_bridge.c

831

else if (bridge->funcs->post_disable)

drivers/gpu/drm/drm_bridge.c

832

bridge->funcs->post_disable(bridge);

drivers/gpu/drm/drm_bridge.c

926

if (state && bridge->funcs->atomic_pre_enable)

drivers/gpu/drm/drm_bridge.c

927

bridge->funcs->atomic_pre_enable(bridge, state);

drivers/gpu/drm/drm_bridge.c

928

else if (bridge->funcs->pre_enable)

drivers/gpu/drm/drm_bridge.c

929

bridge->funcs->pre_enable(bridge);

drivers/gpu/drm/drm_client.c

132

if (client->funcs && client->funcs->hotplug) {

drivers/gpu/drm/drm_client.c

143

ret = client->funcs->hotplug(client);

drivers/gpu/drm/drm_client.c

174

if (client->funcs && client->funcs->free)

drivers/gpu/drm/drm_client.c

175

client->funcs->free(client);

drivers/gpu/drm/drm_client.c

447

if (!buffer || !buffer->fb || !buffer->fb->funcs->dirty)

drivers/gpu/drm/drm_client.c

458

return buffer->fb->funcs->dirty(buffer->fb, buffer->client->file,

drivers/gpu/drm/drm_client.c

462

return buffer->fb->funcs->dirty(buffer->fb, buffer->client->file,

drivers/gpu/drm/drm_client.c

81

const char *name, const struct drm_client_funcs *funcs)

drivers/gpu/drm/drm_client.c

90

client->funcs = funcs;

drivers/gpu/drm/drm_client_event.c

115

if (!client->funcs || !client->funcs->restore)

drivers/gpu/drm/drm_client_event.c

118

ret = client->funcs->restore(client, force);

drivers/gpu/drm/drm_client_event.c

134

if (client->funcs && client->funcs->suspend)

drivers/gpu/drm/drm_client_event.c

135

ret = client->funcs->suspend(client);

drivers/gpu/drm/drm_client_event.c

164

if (client->funcs && client->funcs->resume)

drivers/gpu/drm/drm_client_event.c

165

ret = client->funcs->resume(client);

drivers/gpu/drm/drm_client_event.c

45

if (client->funcs && client->funcs->unregister)

drivers/gpu/drm/drm_client_event.c

46

client->funcs->unregister(client);

drivers/gpu/drm/drm_client_event.c

59

if (!client->funcs || !client->funcs->hotplug)

drivers/gpu/drm/drm_client_event.c

71

ret = client->funcs->hotplug(client);

drivers/gpu/drm/drm_client_modeset.c

1145

if (crtc->funcs->cursor_set2) {

drivers/gpu/drm/drm_client_modeset.c

1146

ret = crtc->funcs->cursor_set2(crtc, NULL, 0, 0, 0, 0, 0);

drivers/gpu/drm/drm_client_modeset.c

1149

} else if (crtc->funcs->cursor_set) {

drivers/gpu/drm/drm_client_modeset.c

1150

ret = crtc->funcs->cursor_set(crtc, NULL, 0, 0, 0);

drivers/gpu/drm/drm_client_modeset.c

1258

connector->funcs->dpms(connector, dpms_mode);

drivers/gpu/drm/drm_client_modeset.c

869

total_modes_count += connectors[i]->funcs->fill_modes(connectors[i], width, height);

drivers/gpu/drm/drm_color_mgmt.c

252

if (crtc->funcs->gamma_set)

drivers/gpu/drm/drm_color_mgmt.c

293

if (crtc->funcs->gamma_set)

drivers/gpu/drm/drm_color_mgmt.c

294

return crtc->funcs->gamma_set(crtc, red, green, blue, size, ctx);

drivers/gpu/drm/drm_colorop.c

113

colorop->funcs = funcs;

drivers/gpu/drm/drm_colorop.c

207

colorop->funcs->destroy(colorop);

drivers/gpu/drm/drm_colorop.c

226

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_colorop.c

248

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_1D_CURVE, flags);

drivers/gpu/drm/drm_colorop.c

313

const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_colorop.c

321

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_1D_LUT, flags);

drivers/gpu/drm/drm_colorop.c

358

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_colorop.c

363

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_CTM_3X4, flags);

drivers/gpu/drm/drm_colorop.c

388

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_colorop.c

394

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_MULTIPLIER, flags);

drivers/gpu/drm/drm_colorop.c

413

const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_colorop.c

421

ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_3D_LUT, flags);

drivers/gpu/drm/drm_colorop.c

96

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

drivers/gpu/drm/drm_connector.c

201

connector->funcs->destroy(connector);

drivers/gpu/drm/drm_connector.c

219

connector->funcs->destroy(connector);

drivers/gpu/drm/drm_connector.c

225

const struct drm_connector_funcs *funcs,

drivers/gpu/drm/drm_connector.c

235

(!funcs->atomic_destroy_state ||

drivers/gpu/drm/drm_connector.c

236

!funcs->atomic_duplicate_state));

drivers/gpu/drm/drm_connector.c

246

connector->funcs = funcs;

drivers/gpu/drm/drm_connector.c

3092

if (panel && panel->funcs && panel->funcs->get_orientation)

drivers/gpu/drm/drm_connector.c

3093

orientation = panel->funcs->get_orientation(panel);

drivers/gpu/drm/drm_connector.c

3258

ret = (*connector->funcs->dpms)(connector, (int)value);

drivers/gpu/drm/drm_connector.c

3259

} else if (connector->funcs->set_property)

drivers/gpu/drm/drm_connector.c

3260

ret = connector->funcs->set_property(connector, property, value);

drivers/gpu/drm/drm_connector.c

3376

connector->funcs->fill_modes(connector,

drivers/gpu/drm/drm_connector.c

3526

if (connector->funcs->oob_hotplug_event)

drivers/gpu/drm/drm_connector.c

3527

connector->funcs->oob_hotplug_event(connector, status);

drivers/gpu/drm/drm_connector.c

366

const struct drm_connector_funcs *funcs,

drivers/gpu/drm/drm_connector.c

372

ret = drm_connector_init_only(dev, connector, funcs, connector_type, ddc);

drivers/gpu/drm/drm_connector.c

404

const struct drm_connector_funcs *funcs,

drivers/gpu/drm/drm_connector.c

407

if (drm_WARN_ON(dev, !(funcs && funcs->destroy)))

drivers/gpu/drm/drm_connector.c

410

return drm_connector_init_and_add(dev, connector, funcs, connector_type, NULL);

drivers/gpu/drm/drm_connector.c

444

const struct drm_connector_funcs *funcs,

drivers/gpu/drm/drm_connector.c

448

if (drm_WARN_ON(dev, !(funcs && funcs->destroy)))

drivers/gpu/drm/drm_connector.c

451

return drm_connector_init_only(dev, connector, funcs, connector_type, ddc);

drivers/gpu/drm/drm_connector.c

481

const struct drm_connector_funcs *funcs,

drivers/gpu/drm/drm_connector.c

485

if (drm_WARN_ON(dev, !(funcs && funcs->destroy)))

drivers/gpu/drm/drm_connector.c

488

return drm_connector_init_and_add(dev, connector, funcs, connector_type, ddc);

drivers/gpu/drm/drm_connector.c

523

const struct drm_connector_funcs *funcs,

drivers/gpu/drm/drm_connector.c

529

if (drm_WARN_ON(dev, funcs && funcs->destroy))

drivers/gpu/drm/drm_connector.c

532

ret = drm_connector_init_and_add(dev, connector, funcs, connector_type, ddc);

drivers/gpu/drm/drm_connector.c

574

const struct drm_connector_funcs *funcs,

drivers/gpu/drm/drm_connector.c

609

ret = drmm_connector_init(dev, connector, funcs, connector_type, ddc);

drivers/gpu/drm/drm_connector.c

621

if (connector->funcs->reset)

drivers/gpu/drm/drm_connector.c

622

connector->funcs->reset(connector);

drivers/gpu/drm/drm_connector.c

630

connector->hdmi.funcs = hdmi_funcs;

drivers/gpu/drm/drm_connector.c

722

if (connector->cec.funcs &&

drivers/gpu/drm/drm_connector.c

723

connector->cec.funcs->phys_addr_invalidate)

drivers/gpu/drm/drm_connector.c

724

connector->cec.funcs->phys_addr_invalidate(connector);

drivers/gpu/drm/drm_connector.c

744

if (connector->cec.funcs &&

drivers/gpu/drm/drm_connector.c

745

connector->cec.funcs->phys_addr_set)

drivers/gpu/drm/drm_connector.c

746

connector->cec.funcs->phys_addr_set(connector, addr);

drivers/gpu/drm/drm_connector.c

803

WARN_ON(connector->state && !connector->funcs->atomic_destroy_state);

drivers/gpu/drm/drm_connector.c

804

if (connector->state && connector->funcs->atomic_destroy_state)

drivers/gpu/drm/drm_connector.c

805

connector->funcs->atomic_destroy_state(connector,

drivers/gpu/drm/drm_connector.c

854

if (connector->funcs->late_register) {

drivers/gpu/drm/drm_connector.c

855

ret = connector->funcs->late_register(connector);

drivers/gpu/drm/drm_connector.c

881

if (connector->funcs->early_unregister)

drivers/gpu/drm/drm_connector.c

882

connector->funcs->early_unregister(connector);

drivers/gpu/drm/drm_connector.c

909

if (WARN_ON(!(connector->funcs && connector->funcs->destroy)))

drivers/gpu/drm/drm_connector.c

950

if (connector->funcs->early_unregister)

drivers/gpu/drm/drm_connector.c

951

connector->funcs->early_unregister(connector);

drivers/gpu/drm/drm_crtc.c

118

if (crtc->funcs->late_register)

drivers/gpu/drm/drm_crtc.c

119

ret = crtc->funcs->late_register(crtc);

drivers/gpu/drm/drm_crtc.c

132

if (crtc->funcs->early_unregister)

drivers/gpu/drm/drm_crtc.c

133

crtc->funcs->early_unregister(crtc);

drivers/gpu/drm/drm_crtc.c

257

const struct drm_crtc_funcs *funcs,

drivers/gpu/drm/drm_crtc.c

271

(!funcs->atomic_destroy_state ||

drivers/gpu/drm/drm_crtc.c

272

!funcs->atomic_duplicate_state));

drivers/gpu/drm/drm_crtc.c

275

crtc->funcs = funcs;

drivers/gpu/drm/drm_crtc.c

362

const struct drm_crtc_funcs *funcs,

drivers/gpu/drm/drm_crtc.c

368

WARN_ON(!funcs->destroy);

drivers/gpu/drm/drm_crtc.c

371

ret = __drm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,

drivers/gpu/drm/drm_crtc.c

392

const struct drm_crtc_funcs *funcs,

drivers/gpu/drm/drm_crtc.c

398

drm_WARN_ON(dev, funcs && funcs->destroy);

drivers/gpu/drm/drm_crtc.c

400

ret = __drm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,

drivers/gpu/drm/drm_crtc.c

443

const struct drm_crtc_funcs *funcs,

drivers/gpu/drm/drm_crtc.c

450

ret = __drmm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,

drivers/gpu/drm/drm_crtc.c

464

const struct drm_crtc_funcs *funcs,

drivers/gpu/drm/drm_crtc.c

472

if (WARN_ON(!funcs || funcs->destroy))

drivers/gpu/drm/drm_crtc.c

482

ret = __drmm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs,

drivers/gpu/drm/drm_crtc.c

520

WARN_ON(crtc->state && !crtc->funcs->atomic_destroy_state);

drivers/gpu/drm/drm_crtc.c

521

if (crtc->state && crtc->funcs->atomic_destroy_state)

drivers/gpu/drm/drm_crtc.c

522

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/drm_crtc.c

625

ret = crtc->funcs->set_config(set, ctx);

drivers/gpu/drm/drm_crtc.c

885

ret = crtc->funcs->set_config(&set, &ctx);

drivers/gpu/drm/drm_crtc.c

920

if (crtc->funcs->set_property)

drivers/gpu/drm/drm_crtc.c

921

ret = crtc->funcs->set_property(crtc, property, value);

drivers/gpu/drm/drm_crtc_helper.c

785

set->connectors[i]->funcs->dpms(set->connectors[i], DRM_MODE_DPMS_ON);

drivers/gpu/drm/drm_debugfs.c

675

if (!connector->hdmi.funcs ||

drivers/gpu/drm/drm_debugfs.c

676

!connector->hdmi.funcs->audio.write_infoframe)

drivers/gpu/drm/drm_debugfs.c

733

if (!connector->hdmi.funcs || \

drivers/gpu/drm/drm_debugfs.c

734

!connector->hdmi.funcs->_f.write_infoframe) \

drivers/gpu/drm/drm_debugfs.c

820

if (connector->funcs->debugfs_init)

drivers/gpu/drm/drm_debugfs.c

821

connector->funcs->debugfs_init(connector, root);

drivers/gpu/drm/drm_debugfs.c

875

if (encoder->funcs && encoder->funcs->debugfs_init)

drivers/gpu/drm/drm_debugfs.c

876

encoder->funcs->debugfs_init(encoder, root);

drivers/gpu/drm/drm_debugfs_crc.c

147

ret = crtc->funcs->verify_crc_source(crtc, source, &values_cnt);

drivers/gpu/drm/drm_debugfs_crc.c

217

ret = crtc->funcs->verify_crc_source(crtc, crc->source, &values_cnt);

drivers/gpu/drm/drm_debugfs_crc.c

246

ret = crtc->funcs->set_crc_source(crtc, crc->source);

drivers/gpu/drm/drm_debugfs_crc.c

269

crtc->funcs->set_crc_source(crtc, NULL);

drivers/gpu/drm/drm_debugfs_crc.c

373

if (!crtc->funcs->set_crc_source || !crtc->funcs->verify_crc_source)

drivers/gpu/drm/drm_debugfs_crc.c

88

if (crtc->funcs->get_crc_sources) {

drivers/gpu/drm/drm_debugfs_crc.c

90

const char *const *sources = crtc->funcs->get_crc_sources(crtc,

drivers/gpu/drm/drm_debugfs_crc.c

99

if (!crtc->funcs->verify_crc_source(crtc, sources[i],

drivers/gpu/drm/drm_encoder.c

103

const struct drm_encoder_funcs *funcs,

drivers/gpu/drm/drm_encoder.c

118

encoder->funcs = funcs;

drivers/gpu/drm/drm_encoder.c

166

const struct drm_encoder_funcs *funcs,

drivers/gpu/drm/drm_encoder.c

172

WARN_ON(!funcs->destroy);

drivers/gpu/drm/drm_encoder.c

175

ret = __drm_encoder_init(dev, encoder, funcs, encoder_type, name, ap);

drivers/gpu/drm/drm_encoder.c

237

const struct drm_encoder_funcs *funcs,

drivers/gpu/drm/drm_encoder.c

244

if (drm_WARN_ON(dev, funcs && funcs->destroy))

drivers/gpu/drm/drm_encoder.c

247

ret = __drm_encoder_init(dev, encoder, funcs, encoder_type, name, args);

drivers/gpu/drm/drm_encoder.c

259

const struct drm_encoder_funcs *funcs,

drivers/gpu/drm/drm_encoder.c

274

ret = __drmm_encoder_init(dev, encoder, funcs, encoder_type, name, ap);

drivers/gpu/drm/drm_encoder.c

302

const struct drm_encoder_funcs *funcs,

drivers/gpu/drm/drm_encoder.c

309

ret = __drmm_encoder_init(dev, encoder, funcs, encoder_type, name, ap);

drivers/gpu/drm/drm_encoder.c

80

if (encoder->funcs && encoder->funcs->late_register)

drivers/gpu/drm/drm_encoder.c

81

ret = encoder->funcs->late_register(encoder);

drivers/gpu/drm/drm_encoder.c

94

if (encoder->funcs && encoder->funcs->early_unregister)

drivers/gpu/drm/drm_encoder.c

95

encoder->funcs->early_unregister(encoder);

drivers/gpu/drm/drm_fb_helper.c

149

if (fb_helper->funcs->fb_restore)

drivers/gpu/drm/drm_fb_helper.c

150

fb_helper->funcs->fb_restore(fb_helper);

drivers/gpu/drm/drm_fb_helper.c

330

if (drm_WARN_ON_ONCE(dev, !helper->funcs->fb_dirty))

drivers/gpu/drm/drm_fb_helper.c

339

ret = helper->funcs->fb_dirty(helper, &clip_copy);

drivers/gpu/drm/drm_fb_helper.c

380

const struct drm_fb_helper_funcs *funcs)

drivers/gpu/drm/drm_fb_helper.c

401

helper->funcs = funcs;

drivers/gpu/drm/drm_fb_helper.c

674

if (fb_helper->funcs->fb_set_suspend)

drivers/gpu/drm/drm_fb_helper.c

675

fb_helper->funcs->fb_set_suspend(fb_helper, suspend);

drivers/gpu/drm/drm_fb_helper.c

777

if (!crtc->funcs->gamma_set || !crtc->gamma_size) {

drivers/gpu/drm/drm_fb_helper.c

795

ret = crtc->funcs->gamma_set(crtc, r, g, b,

drivers/gpu/drm/drm_fbdev_dma.c

178

if (helper->fb->funcs->dirty) {

drivers/gpu/drm/drm_fbdev_dma.c

183

ret = helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 1);

drivers/gpu/drm/drm_fbdev_dma.c

300

fb_helper->funcs = &drm_fbdev_dma_helper_funcs;

drivers/gpu/drm/drm_fbdev_dma.c

306

if (fb->funcs->dirty)

drivers/gpu/drm/drm_fbdev_shmem.c

116

if (helper->fb->funcs->dirty) {

drivers/gpu/drm/drm_fbdev_shmem.c

117

ret = helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 1);

drivers/gpu/drm/drm_fbdev_shmem.c

167

fb_helper->funcs = &drm_fbdev_shmem_helper_funcs;

drivers/gpu/drm/drm_fbdev_ttm.c

155

if (helper->fb->funcs->dirty) {

drivers/gpu/drm/drm_fbdev_ttm.c

156

ret = helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 1);

drivers/gpu/drm/drm_fbdev_ttm.c

195

fb_helper->funcs = &drm_fbdev_ttm_helper_funcs;

drivers/gpu/drm/drm_file.c

925

size_t add_size = (obj->funcs && obj->funcs->rss) ?

drivers/gpu/drm/drm_file.c

926

obj->funcs->rss(obj) : obj->size;

drivers/gpu/drm/drm_file.c

928

if (obj->funcs && obj->funcs->status) {

drivers/gpu/drm/drm_file.c

929

s = obj->funcs->status(obj);

drivers/gpu/drm/drm_fourcc.c

444

if (dev->mode_config.funcs->get_format_info)

drivers/gpu/drm/drm_fourcc.c

445

info = dev->mode_config.funcs->get_format_info(pixel_format,

drivers/gpu/drm/drm_framebuffer.c

305

fb = dev->mode_config.funcs->fb_create(dev, file_priv, info, r);

drivers/gpu/drm/drm_framebuffer.c

541

if (!fb->funcs->create_handle) {

drivers/gpu/drm/drm_framebuffer.c

563

ret = fb->funcs->create_handle(fb, file_priv, &r->handle);

drivers/gpu/drm/drm_framebuffer.c

603

(fb->format->num_planes > 1 || !fb->funcs->create_handle)) {

drivers/gpu/drm/drm_framebuffer.c

661

ret = fb->funcs->create_handle(fb, file_priv,

drivers/gpu/drm/drm_framebuffer.c

764

if (fb->funcs->dirty) {

drivers/gpu/drm/drm_framebuffer.c

765

ret = fb->funcs->dirty(fb, file_priv, flags, r->color,

drivers/gpu/drm/drm_framebuffer.c

841

fb->funcs->destroy(fb);

drivers/gpu/drm/drm_framebuffer.c

864

const struct drm_framebuffer_funcs *funcs)

drivers/gpu/drm/drm_framebuffer.c

885

fb->funcs = funcs;

drivers/gpu/drm/drm_gem.c

1162

if (WARN_ON(!obj->funcs->free))

drivers/gpu/drm/drm_gem.c

1165

obj->funcs->free(obj);

drivers/gpu/drm/drm_gem.c

1241

vma->vm_ops = obj->funcs->vm_ops;

drivers/gpu/drm/drm_gem.c

1243

if (obj->funcs->mmap) {

drivers/gpu/drm/drm_gem.c

1244

ret = obj->funcs->mmap(obj, vma);

drivers/gpu/drm/drm_gem.c

1409

if (obj->funcs->print_info)

drivers/gpu/drm/drm_gem.c

1410

obj->funcs->print_info(p, indent, obj);

drivers/gpu/drm/drm_gem.c

1419

if (!obj->funcs->vmap)

drivers/gpu/drm/drm_gem.c

1422

ret = obj->funcs->vmap(obj, map);

drivers/gpu/drm/drm_gem.c

1439

if (obj->funcs->vunmap)

drivers/gpu/drm/drm_gem.c

1440

obj->funcs->vunmap(obj, map);

drivers/gpu/drm/drm_gem.c

1764

if (obj->funcs->evict)

drivers/gpu/drm/drm_gem.c

1765

return obj->funcs->evict(obj);

drivers/gpu/drm/drm_gem.c

374

if (obj->funcs->close)

drivers/gpu/drm/drm_gem.c

375

obj->funcs->close(obj, file_priv);

drivers/gpu/drm/drm_gem.c

514

if (obj->funcs->open) {

drivers/gpu/drm/drm_gem.c

515

ret = obj->funcs->open(obj, file_priv);

drivers/gpu/drm/drm_gem_dma_helper.c

91

if (!gem_obj->funcs)

drivers/gpu/drm/drm_gem_dma_helper.c

92

gem_obj->funcs = &drm_gem_dma_default_funcs;

drivers/gpu/drm/drm_gem_framebuffer_helper.c

160

const struct drm_framebuffer_funcs *funcs)

drivers/gpu/drm/drm_gem_framebuffer_helper.c

200

ret = drm_gem_fb_init(dev, fb, info, mode_cmd, objs, i, funcs);

drivers/gpu/drm/drm_gem_framebuffer_helper.c

236

const struct drm_framebuffer_funcs *funcs)

drivers/gpu/drm/drm_gem_framebuffer_helper.c

245

ret = drm_gem_fb_init_with_funcs(dev, fb, file, info, mode_cmd, funcs);

drivers/gpu/drm/drm_gem_framebuffer_helper.c

75

const struct drm_framebuffer_funcs *funcs)

drivers/gpu/drm/drm_gem_framebuffer_helper.c

85

ret = drm_framebuffer_init(dev, fb, funcs);

drivers/gpu/drm/drm_gem_shmem_helper.c

60

if (!obj->funcs)

drivers/gpu/drm/drm_gem_shmem_helper.c

61

obj->funcs = &drm_gem_shmem_funcs;

drivers/gpu/drm/drm_gem_vram_helper.c

203

if (!gem->funcs)

drivers/gpu/drm/drm_gem_vram_helper.c

204

gem->funcs = &drm_gem_vram_object_funcs;

drivers/gpu/drm/drm_gpuvm.c

1068

obj->funcs = &drm_gpuvm_object_funcs;

drivers/gpu/drm/drm_ioctl.c

281

if (!crtc->funcs->page_flip_target)

drivers/gpu/drm/drm_mode_config.c

206

if (plane->funcs->reset)

drivers/gpu/drm/drm_mode_config.c

207

plane->funcs->reset(plane);

drivers/gpu/drm/drm_mode_config.c

210

if (crtc->funcs->reset)

drivers/gpu/drm/drm_mode_config.c

211

crtc->funcs->reset(crtc);

drivers/gpu/drm/drm_mode_config.c

214

if (encoder->funcs && encoder->funcs->reset)

drivers/gpu/drm/drm_mode_config.c

215

encoder->funcs->reset(encoder);

drivers/gpu/drm/drm_mode_config.c

219

if (connector->funcs->reset)

drivers/gpu/drm/drm_mode_config.c

220

connector->funcs->reset(connector);

drivers/gpu/drm/drm_mode_config.c

537

encoder->funcs->destroy(encoder);

drivers/gpu/drm/drm_mode_config.c

565

colorop->funcs->destroy(colorop);

drivers/gpu/drm/drm_mode_config.c

570

plane->funcs->destroy(plane);

drivers/gpu/drm/drm_mode_config.c

574

crtc->funcs->destroy(crtc);

drivers/gpu/drm/drm_mode_config.c

700

WARN(crtc->cursor && crtc->funcs->cursor_set,

drivers/gpu/drm/drm_mode_config.c

703

WARN(crtc->cursor && crtc->funcs->cursor_set2,

drivers/gpu/drm/drm_mode_config.c

706

WARN(crtc->cursor && crtc->funcs->cursor_move,

drivers/gpu/drm/drm_modes.c

1680

if (dev->mode_config.funcs->mode_valid)

drivers/gpu/drm/drm_modes.c

1681

return dev->mode_config.funcs->mode_valid(dev, mode);

drivers/gpu/drm/drm_modeset_helper.c

143

const struct drm_crtc_funcs *funcs)

drivers/gpu/drm/drm_modeset_helper.c

163

ret = drm_crtc_init_with_planes(dev, crtc, primary, NULL, funcs, NULL);

drivers/gpu/drm/drm_panel.c

153

if (panel->funcs && panel->funcs->prepare) {

drivers/gpu/drm/drm_panel.c

154

ret = panel->funcs->prepare(panel);

drivers/gpu/drm/drm_panel.c

161

if (!follower->funcs->panel_prepared)

drivers/gpu/drm/drm_panel.c

164

ret = follower->funcs->panel_prepared(follower);

drivers/gpu/drm/drm_panel.c

167

follower->funcs->panel_prepared, ret);

drivers/gpu/drm/drm_panel.c

209

if (!follower->funcs->panel_unpreparing)

drivers/gpu/drm/drm_panel.c

212

ret = follower->funcs->panel_unpreparing(follower);

drivers/gpu/drm/drm_panel.c

215

follower->funcs->panel_unpreparing, ret);

drivers/gpu/drm/drm_panel.c

218

if (panel->funcs && panel->funcs->unprepare) {

drivers/gpu/drm/drm_panel.c

219

ret = panel->funcs->unprepare(panel);

drivers/gpu/drm/drm_panel.c

255

if (panel->funcs && panel->funcs->enable) {

drivers/gpu/drm/drm_panel.c

256

ret = panel->funcs->enable(panel);

drivers/gpu/drm/drm_panel.c

268

if (!follower->funcs->panel_enabled)

drivers/gpu/drm/drm_panel.c

271

ret = follower->funcs->panel_enabled(follower);

drivers/gpu/drm/drm_panel.c

274

follower->funcs->panel_enabled, ret);

drivers/gpu/drm/drm_panel.c

315

if (!follower->funcs->panel_disabling)

drivers/gpu/drm/drm_panel.c

318

ret = follower->funcs->panel_disabling(follower);

drivers/gpu/drm/drm_panel.c

321

follower->funcs->panel_disabling, ret);

drivers/gpu/drm/drm_panel.c

329

if (panel->funcs && panel->funcs->disable) {

drivers/gpu/drm/drm_panel.c

330

ret = panel->funcs->disable(panel);

drivers/gpu/drm/drm_panel.c

358

if (panel->funcs && panel->funcs->get_modes) {

drivers/gpu/drm/drm_panel.c

361

num = panel->funcs->get_modes(panel, connector);

drivers/gpu/drm/drm_panel.c

426

const struct drm_panel_funcs *funcs,

drivers/gpu/drm/drm_panel.c

433

if (!funcs) {

drivers/gpu/drm/drm_panel.c

444

panel->funcs = funcs;

drivers/gpu/drm/drm_panel.c

451

drm_panel_init(panel, dev, funcs, connector_type);

drivers/gpu/drm/drm_panel.c

60

const struct drm_panel_funcs *funcs,

drivers/gpu/drm/drm_panel.c

634

if (panel->prepared && follower->funcs->panel_prepared) {

drivers/gpu/drm/drm_panel.c

635

ret = follower->funcs->panel_prepared(follower);

drivers/gpu/drm/drm_panel.c

638

follower->funcs->panel_prepared, ret);

drivers/gpu/drm/drm_panel.c

640

if (panel->enabled && follower->funcs->panel_enabled) {

drivers/gpu/drm/drm_panel.c

641

ret = follower->funcs->panel_enabled(follower);

drivers/gpu/drm/drm_panel.c

644

follower->funcs->panel_enabled, ret);

drivers/gpu/drm/drm_panel.c

670

if (panel->enabled && follower->funcs->panel_disabling) {

drivers/gpu/drm/drm_panel.c

671

ret = follower->funcs->panel_disabling(follower);

drivers/gpu/drm/drm_panel.c

674

follower->funcs->panel_disabling, ret);

drivers/gpu/drm/drm_panel.c

676

if (panel->prepared && follower->funcs->panel_unpreparing) {

drivers/gpu/drm/drm_panel.c

677

ret = follower->funcs->panel_unpreparing(follower);

drivers/gpu/drm/drm_panel.c

680

follower->funcs->panel_unpreparing, ret);

drivers/gpu/drm/drm_panel.c

70

panel->funcs = funcs;

drivers/gpu/drm/drm_plane.c

1035

ret = plane->funcs->disable_plane(plane, ctx);

drivers/gpu/drm/drm_plane.c

1052

ret = plane->funcs->update_plane(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1086

return plane->funcs->disable_plane(plane, ctx);

drivers/gpu/drm/drm_plane.c

1101

return plane->funcs->update_plane(plane, crtc, fb,

drivers/gpu/drm/drm_plane.c

1320

if (!crtc->funcs->cursor_set && !crtc->funcs->cursor_set2) {

drivers/gpu/drm/drm_plane.c

1325

if (crtc->funcs->cursor_set2)

drivers/gpu/drm/drm_plane.c

1326

ret = crtc->funcs->cursor_set2(crtc, file_priv, req->handle,

drivers/gpu/drm/drm_plane.c

1329

ret = crtc->funcs->cursor_set(crtc, file_priv, req->handle,

drivers/gpu/drm/drm_plane.c

1334

if (crtc->funcs->cursor_move) {

drivers/gpu/drm/drm_plane.c

1335

ret = crtc->funcs->cursor_move(crtc, req->x, req->y);

drivers/gpu/drm/drm_plane.c

1420

if (crtc->funcs->page_flip_target) {

drivers/gpu/drm/drm_plane.c

1454

} else if (crtc->funcs->page_flip == NULL ||

drivers/gpu/drm/drm_plane.c

1537

if (crtc->funcs->page_flip_target)

drivers/gpu/drm/drm_plane.c

1538

ret = crtc->funcs->page_flip_target(crtc, fb, e,

drivers/gpu/drm/drm_plane.c

1543

ret = crtc->funcs->page_flip(crtc, fb, e, page_flip->flags,

drivers/gpu/drm/drm_plane.c

1574

if (ret && crtc->funcs->page_flip_target)

drivers/gpu/drm/drm_plane.c

363

const struct drm_plane_funcs *funcs,

drivers/gpu/drm/drm_plane.c

390

(!funcs->atomic_destroy_state ||

drivers/gpu/drm/drm_plane.c

391

!funcs->atomic_duplicate_state));

drivers/gpu/drm/drm_plane.c

401

plane->funcs = funcs;

drivers/gpu/drm/drm_plane.c

485

plane->funcs->format_mod_supported);

drivers/gpu/drm/drm_plane.c

492

if (plane->funcs->format_mod_supported_async) {

drivers/gpu/drm/drm_plane.c

494

plane->funcs->format_mod_supported_async);

drivers/gpu/drm/drm_plane.c

534

const struct drm_plane_funcs *funcs,

drivers/gpu/drm/drm_plane.c

543

WARN_ON(!funcs->destroy);

drivers/gpu/drm/drm_plane.c

546

ret = __drm_universal_plane_init(dev, plane, possible_crtcs, funcs,

drivers/gpu/drm/drm_plane.c

566

const struct drm_plane_funcs *funcs,

drivers/gpu/drm/drm_plane.c

577

if (WARN_ON(!funcs || funcs->destroy))

drivers/gpu/drm/drm_plane.c

587

ret = __drm_universal_plane_init(dev, plane, possible_crtcs, funcs,

drivers/gpu/drm/drm_plane.c

605

const struct drm_plane_funcs *funcs,

drivers/gpu/drm/drm_plane.c

616

if (drm_WARN_ON(dev, !funcs))

drivers/gpu/drm/drm_plane.c

626

ret = __drm_universal_plane_init(dev, plane, possible_crtcs, funcs,

drivers/gpu/drm/drm_plane.c

649

if (plane->funcs->late_register)

drivers/gpu/drm/drm_plane.c

650

ret = plane->funcs->late_register(plane);

drivers/gpu/drm/drm_plane.c

670

if (plane->funcs->early_unregister)

drivers/gpu/drm/drm_plane.c

671

plane->funcs->early_unregister(plane);

drivers/gpu/drm/drm_plane.c

703

WARN_ON(plane->state && !plane->funcs->atomic_destroy_state);

drivers/gpu/drm/drm_plane.c

704

if (plane->state && plane->funcs->atomic_destroy_state)

drivers/gpu/drm/drm_plane.c

705

plane->funcs->atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/drm_plane.c

759

ret = plane->funcs->disable_plane(plane, NULL);

drivers/gpu/drm/drm_plane.c

793

if (plane->funcs->set_property)

drivers/gpu/drm/drm_plane.c

794

ret = plane->funcs->set_property(plane, property, value);

drivers/gpu/drm/drm_plane.c

928

if (plane->funcs->format_mod_supported) {

drivers/gpu/drm/drm_plane.c

929

if (!plane->funcs->format_mod_supported(plane, format, modifier))

drivers/gpu/drm/drm_plane_helper.c

215

return plane->funcs->disable_plane(plane, ctx);

drivers/gpu/drm/drm_plane_helper.c

236

ret = crtc->funcs->set_config(&set, ctx);

drivers/gpu/drm/drm_prime.c

387

if (obj->funcs && obj->funcs->export)

drivers/gpu/drm/drm_prime.c

388

dmabuf = obj->funcs->export(obj, flags);

drivers/gpu/drm/drm_prime.c

612

!obj->funcs->get_sg_table)

drivers/gpu/drm/drm_prime.c

615

if (!obj->funcs->pin)

drivers/gpu/drm/drm_prime.c

621

ret = obj->funcs->pin(obj);

drivers/gpu/drm/drm_prime.c

643

if (!obj->funcs->unpin)

drivers/gpu/drm/drm_prime.c

649

obj->funcs->unpin(obj);

drivers/gpu/drm/drm_prime.c

676

if (WARN_ON(!obj->funcs->get_sg_table))

drivers/gpu/drm/drm_prime.c

679

sgt = obj->funcs->get_sg_table(obj);

drivers/gpu/drm/drm_prime.c

770

if (obj->funcs && obj->funcs->mmap) {

drivers/gpu/drm/drm_prime.c

771

vma->vm_ops = obj->funcs->vm_ops;

drivers/gpu/drm/drm_prime.c

774

ret = obj->funcs->mmap(obj, vma);

drivers/gpu/drm/drm_probe_helper.c

234

const struct drm_connector_helper_funcs *funcs =

drivers/gpu/drm/drm_probe_helper.c

237

if (funcs && funcs->disable_hpd)

drivers/gpu/drm/drm_probe_helper.c

238

funcs->disable_hpd(connector);

drivers/gpu/drm/drm_probe_helper.c

251

const struct drm_connector_helper_funcs *funcs =

drivers/gpu/drm/drm_probe_helper.c

254

if (funcs && funcs->enable_hpd)

drivers/gpu/drm/drm_probe_helper.c

255

funcs->enable_hpd(connector);

drivers/gpu/drm/drm_probe_helper.c

346

const struct drm_connector_helper_funcs *funcs = connector->helper_private;

drivers/gpu/drm/drm_probe_helper.c

348

if (funcs->detect_ctx)

drivers/gpu/drm/drm_probe_helper.c

349

return funcs->detect_ctx(connector, ctx, force);

drivers/gpu/drm/drm_probe_helper.c

350

else if (connector->funcs->detect)

drivers/gpu/drm/drm_probe_helper.c

351

return connector->funcs->detect(connector, force);

drivers/gpu/drm/drm_probe_helper.c

595

if (connector->funcs->force)

drivers/gpu/drm/drm_probe_helper.c

596

connector->funcs->force(connector);

drivers/gpu/drm/drm_simple_kms_helper.c

110

if (!pipe->funcs || !pipe->funcs->reset_crtc)

drivers/gpu/drm/drm_simple_kms_helper.c

113

return pipe->funcs->reset_crtc(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

121

if (!pipe->funcs || !pipe->funcs->duplicate_crtc_state)

drivers/gpu/drm/drm_simple_kms_helper.c

124

return pipe->funcs->duplicate_crtc_state(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

132

if (!pipe->funcs || !pipe->funcs->destroy_crtc_state)

drivers/gpu/drm/drm_simple_kms_helper.c

135

pipe->funcs->destroy_crtc_state(pipe, state);

drivers/gpu/drm/drm_simple_kms_helper.c

143

if (!pipe->funcs || !pipe->funcs->enable_vblank)

drivers/gpu/drm/drm_simple_kms_helper.c

146

return pipe->funcs->enable_vblank(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

154

if (!pipe->funcs || !pipe->funcs->disable_vblank)

drivers/gpu/drm/drm_simple_kms_helper.c

157

pipe->funcs->disable_vblank(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

194

if (!pipe->funcs || !pipe->funcs->check)

drivers/gpu/drm/drm_simple_kms_helper.c

197

return pipe->funcs->check(pipe, plane_state, crtc_state);

drivers/gpu/drm/drm_simple_kms_helper.c

208

if (!pipe->funcs || !pipe->funcs->update)

drivers/gpu/drm/drm_simple_kms_helper.c

211

pipe->funcs->update(pipe, old_pstate);

drivers/gpu/drm/drm_simple_kms_helper.c

220

if (!pipe->funcs || !pipe->funcs->prepare_fb) {

drivers/gpu/drm/drm_simple_kms_helper.c

224

WARN_ON_ONCE(pipe->funcs && pipe->funcs->cleanup_fb);

drivers/gpu/drm/drm_simple_kms_helper.c

229

return pipe->funcs->prepare_fb(pipe, state);

drivers/gpu/drm/drm_simple_kms_helper.c

238

if (!pipe->funcs || !pipe->funcs->cleanup_fb)

drivers/gpu/drm/drm_simple_kms_helper.c

241

pipe->funcs->cleanup_fb(pipe, state);

drivers/gpu/drm/drm_simple_kms_helper.c

250

if (!pipe->funcs || !pipe->funcs->begin_fb_access)

drivers/gpu/drm/drm_simple_kms_helper.c

253

return pipe->funcs->begin_fb_access(pipe, new_plane_state);

drivers/gpu/drm/drm_simple_kms_helper.c

262

if (!pipe->funcs || !pipe->funcs->end_fb_access)

drivers/gpu/drm/drm_simple_kms_helper.c

265

pipe->funcs->end_fb_access(pipe, new_plane_state);

drivers/gpu/drm/drm_simple_kms_helper.c

289

if (!pipe->funcs || !pipe->funcs->reset_plane)

drivers/gpu/drm/drm_simple_kms_helper.c

292

return pipe->funcs->reset_plane(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

300

if (!pipe->funcs || !pipe->funcs->duplicate_plane_state)

drivers/gpu/drm/drm_simple_kms_helper.c

303

return pipe->funcs->duplicate_plane_state(pipe);

drivers/gpu/drm/drm_simple_kms_helper.c

312

if (!pipe->funcs || !pipe->funcs->destroy_plane_state)

drivers/gpu/drm/drm_simple_kms_helper.c

315

pipe->funcs->destroy_plane_state(pipe, state);

drivers/gpu/drm/drm_simple_kms_helper.c

337

const struct drm_simple_display_pipe_funcs *funcs,

drivers/gpu/drm/drm_simple_kms_helper.c

348

pipe->funcs = funcs;

drivers/gpu/drm/drm_simple_kms_helper.c

48

if (!pipe->funcs || !pipe->funcs->mode_valid)

drivers/gpu/drm/drm_simple_kms_helper.c

52

return pipe->funcs->mode_valid(pipe, mode);

drivers/gpu/drm/drm_simple_kms_helper.c

79

if (!pipe->funcs || !pipe->funcs->enable)

drivers/gpu/drm/drm_simple_kms_helper.c

83

pipe->funcs->enable(pipe, crtc->state, plane->state);

drivers/gpu/drm/drm_simple_kms_helper.c

92

if (!pipe->funcs || !pipe->funcs->disable)

drivers/gpu/drm/drm_simple_kms_helper.c

95

pipe->funcs->disable(pipe);

drivers/gpu/drm/drm_sysfs.c

219

connector->funcs->fill_modes(connector,

drivers/gpu/drm/drm_vblank.c

1175

if (crtc->funcs->enable_vblank)

drivers/gpu/drm/drm_vblank.c

1176

return crtc->funcs->enable_vblank(crtc);

drivers/gpu/drm/drm_vblank.c

1605

drm_WARN_ON_ONCE(dev, !crtc->funcs->get_vblank_timestamp);

drivers/gpu/drm/drm_vblank.c

1908

if (crtc && crtc->funcs->get_vblank_timestamp)

drivers/gpu/drm/drm_vblank.c

232

if (crtc->funcs->get_vblank_counter)

drivers/gpu/drm/drm_vblank.c

233

return crtc->funcs->get_vblank_counter(crtc);

drivers/gpu/drm/drm_vblank.c

437

!crtc->funcs->get_vblank_timestamp,

drivers/gpu/drm/drm_vblank.c

459

if (crtc->funcs->disable_vblank)

drivers/gpu/drm/drm_vblank.c

460

crtc->funcs->disable_vblank(crtc);

drivers/gpu/drm/drm_vblank.c

901

if (crtc && crtc->funcs->get_vblank_timestamp && max_error > 0) {

drivers/gpu/drm/drm_vblank.c

902

ret = crtc->funcs->get_vblank_timestamp(crtc, &max_error,

drivers/gpu/drm/drm_writeback.c

440

const struct drm_connector_helper_funcs *funcs =

drivers/gpu/drm/drm_writeback.c

444

if (funcs->prepare_writeback_job) {

drivers/gpu/drm/drm_writeback.c

445

ret = funcs->prepare_writeback_job(connector, job);

drivers/gpu/drm/drm_writeback.c

492

const struct drm_connector_helper_funcs *funcs =

drivers/gpu/drm/drm_writeback.c

495

if (job->prepared && funcs->cleanup_writeback_job)

drivers/gpu/drm/drm_writeback.c

496

funcs->cleanup_writeback_job(connector, job);

drivers/gpu/drm/etnaviv/etnaviv_gem.c

607

(*obj)->funcs = &etnaviv_gem_object_funcs;

drivers/gpu/drm/exynos/exynos_dp.c

110

dp->encoder.funcs->destroy(&dp->encoder);

drivers/gpu/drm/exynos/exynos_dp.c

130

dp->encoder.funcs->destroy(&dp->encoder);

drivers/gpu/drm/exynos/exynos_drm_crtc.c

203

plane->funcs->destroy(plane);

drivers/gpu/drm/exynos/exynos_drm_dsi.c

95

dsim->bridge.funcs->atomic_disable(&dsim->bridge, NULL);

drivers/gpu/drm/exynos/exynos_drm_fb.c

179

dev->mode_config.funcs = &exynos_drm_mode_config_funcs;

drivers/gpu/drm/exynos/exynos_drm_fbdev.c

111

helper->funcs = &exynos_drm_fbdev_helper_funcs;

drivers/gpu/drm/exynos/exynos_drm_gem.c

167

obj->funcs = &exynos_drm_gem_object_funcs;

drivers/gpu/drm/exynos/exynos_drm_ipp.c

51

const struct exynos_drm_ipp_funcs *funcs, unsigned int caps,

drivers/gpu/drm/exynos/exynos_drm_ipp.c

56

WARN_ON(!funcs);

drivers/gpu/drm/exynos/exynos_drm_ipp.c

64

ipp->funcs = funcs;

drivers/gpu/drm/exynos/exynos_drm_ipp.c

814

ret = ipp->funcs->commit(ipp, task);

drivers/gpu/drm/exynos/exynos_drm_ipp.c

851

if (ipp->funcs->abort)

drivers/gpu/drm/exynos/exynos_drm_ipp.c

852

ipp->funcs->abort(ipp, task);

drivers/gpu/drm/exynos/exynos_drm_ipp.h

128

const struct exynos_drm_ipp_funcs *funcs, unsigned int caps,

drivers/gpu/drm/exynos/exynos_drm_ipp.h

57

const struct exynos_drm_ipp_funcs *funcs;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

185

primary->funcs->destroy(primary);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c

31

fsl_dev->drm->mode_config.funcs = &fsl_dcu_drm_mode_config_funcs;

drivers/gpu/drm/gma500/cdv_device.c

273

connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/gma500/cdv_device.c

351

connector->funcs->dpms(connector, DRM_MODE_DPMS_ON);

drivers/gpu/drm/gma500/fbdev.c

157

fb_helper->funcs = &psb_fbdev_fb_helper_funcs;

drivers/gpu/drm/gma500/framebuffer.c

113

dev->mode_config.funcs = &psb_mode_funcs;

drivers/gpu/drm/gma500/gem.c

168

obj->funcs = &psb_gem_object_funcs;

drivers/gpu/drm/gud/gud_drv.c

507

drm->mode_config.funcs = &gud_mode_config_funcs;

drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c

135

dev->mode_config.funcs = (void *)&hibmc_mode_funcs;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c

169

dev->mode_config.funcs = driver_data->mode_config_funcs;

drivers/gpu/drm/hyperv/hyperv_drm_modeset.c

325

dev->mode_config.funcs = &hyperv_mode_config_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

3587

if (!display->wm.funcs->optimize_watermarks)

drivers/gpu/drm/i915/display/i9xx_wm.c

4155

display->wm.funcs = &ilk_wm_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4158

display->wm.funcs = &vlv_wm_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4161

display->wm.funcs = &g4x_wm_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4167

display->wm.funcs = &nop_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4169

display->wm.funcs = &pnv_wm_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4172

display->wm.funcs = &i965_wm_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4174

display->wm.funcs = &i9xx_wm_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4177

display->wm.funcs = &i845_wm_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4179

display->wm.funcs = &i9xx_wm_funcs;

drivers/gpu/drm/i915/display/i9xx_wm.c

4183

display->wm.funcs = &nop_funcs;

drivers/gpu/drm/i915/display/intel_acpi.c

357

if (panel->backlight.funcs && !panel->backlight.device) {

drivers/gpu/drm/i915/display/intel_audio.c

757

if (display->audio.funcs)

drivers/gpu/drm/i915/display/intel_audio.c

758

display->audio.funcs->audio_codec_enable(encoder, crtc_state, conn_state);

drivers/gpu/drm/i915/display/intel_audio.c

814

if (display->audio.funcs)

drivers/gpu/drm/i915/display/intel_audio.c

815

display->audio.funcs->audio_codec_disable(encoder, old_crtc_state, old_conn_state);

drivers/gpu/drm/i915/display/intel_audio.c

863

if (display->audio.funcs)

drivers/gpu/drm/i915/display/intel_audio.c

864

display->audio.funcs->audio_codec_get_config(encoder, crtc_state);

drivers/gpu/drm/i915/display/intel_audio.c

892

display->audio.funcs = &g4x_audio_funcs;

drivers/gpu/drm/i915/display/intel_audio.c

895

display->audio.funcs = &ibx_audio_funcs;

drivers/gpu/drm/i915/display/intel_audio.c

897

display->audio.funcs = &hsw_audio_funcs;

drivers/gpu/drm/i915/display/intel_backlight.c

1689

if (drm_WARN_ON(display->drm, !panel->backlight.funcs))

drivers/gpu/drm/i915/display/intel_backlight.c

1694

ret = panel->backlight.funcs->setup(connector, pipe);

drivers/gpu/drm/i915/display/intel_backlight.c

1855

panel->backlight.funcs = &pwm_bl_funcs;

drivers/gpu/drm/i915/display/intel_backlight.c

299

panel->backlight.funcs->set(conn_state, level);

drivers/gpu/drm/i915/display/intel_backlight.c

469

panel->backlight.funcs->disable(old_conn_state, 0);

drivers/gpu/drm/i915/display/intel_backlight.c

790

panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level);

drivers/gpu/drm/i915/display/intel_backlight.c

826

val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector));

drivers/gpu/drm/i915/display/intel_cdclk.c

173

display->cdclk.funcs->get_cdclk(display, cdclk_config);

drivers/gpu/drm/i915/display/intel_cdclk.c

180

display->cdclk.funcs->set_cdclk(display, cdclk_config, pipe);

drivers/gpu/drm/i915/display/intel_cdclk.c

187

return display->cdclk.funcs->modeset_calc_cdclk(state);

drivers/gpu/drm/i915/display/intel_cdclk.c

193

return display->cdclk.funcs->calc_voltage_level(cdclk);

drivers/gpu/drm/i915/display/intel_cdclk.c

2649

if (drm_WARN_ON_ONCE(display->drm, !display->cdclk.funcs->set_cdclk))

drivers/gpu/drm/i915/display/intel_cdclk.c

4070

display->cdclk.funcs = &xe3lpd_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4073

display->cdclk.funcs = &xe3lpd_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4076

display->cdclk.funcs = &rplu_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4079

display->cdclk.funcs = &rplu_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4082

display->cdclk.funcs = &rplu_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4085

display->cdclk.funcs = &tgl_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4091

display->cdclk.funcs = &tgl_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4094

display->cdclk.funcs = &rplu_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4097

display->cdclk.funcs = &tgl_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4100

display->cdclk.funcs = &tgl_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4103

display->cdclk.funcs = &tgl_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4106

display->cdclk.funcs = &ehl_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4109

display->cdclk.funcs = &icl_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4112

display->cdclk.funcs = &bxt_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4118

display->cdclk.funcs = &skl_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4120

display->cdclk.funcs = &bdw_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4122

display->cdclk.funcs = &hsw_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4124

display->cdclk.funcs = &chv_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4126

display->cdclk.funcs = &vlv_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4128

display->cdclk.funcs = &fixed_400mhz_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4130

display->cdclk.funcs = &ilk_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4132

display->cdclk.funcs = &gm45_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4134

display->cdclk.funcs = &g33_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4136

display->cdclk.funcs = &i965gm_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4138

display->cdclk.funcs = &fixed_400mhz_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4140

display->cdclk.funcs = &pnv_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4142

display->cdclk.funcs = &g33_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4144

display->cdclk.funcs = &i945gm_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4146

display->cdclk.funcs = &fixed_400mhz_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4148

display->cdclk.funcs = &i915gm_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4150

display->cdclk.funcs = &i915g_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4152

display->cdclk.funcs = &i865g_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4154

display->cdclk.funcs = &i85x_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4156

display->cdclk.funcs = &i845g_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4158

display->cdclk.funcs = &i830_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_cdclk.c

4161

if (drm_WARN(display->drm, !display->cdclk.funcs,

drivers/gpu/drm/i915/display/intel_cdclk.c

4163

display->cdclk.funcs = &i830_cdclk_funcs;

drivers/gpu/drm/i915/display/intel_color.c

1945

display->color.funcs->load_luts(crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

1953

if (display->color.funcs->color_commit_noarm)

drivers/gpu/drm/i915/display/intel_color.c

1954

display->color.funcs->color_commit_noarm(dsb, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

1962

display->color.funcs->color_commit_arm(dsb, crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

1969

if (display->color.funcs->color_post_update)

drivers/gpu/drm/i915/display/intel_color.c

1970

display->color.funcs->color_post_update(crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

2034

display->color.funcs->load_luts(crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

2131

return display->color.funcs->color_check(state, crtc);

drivers/gpu/drm/i915/display/intel_color.c

2138

display->color.funcs->get_config(crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

2140

display->color.funcs->read_luts(crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

2142

if (display->color.funcs->read_csc)

drivers/gpu/drm/i915/display/intel_color.c

2143

display->color.funcs->read_csc(crtc_state);

drivers/gpu/drm/i915/display/intel_color.c

2160

return display->color.funcs->lut_equal(crtc_state, blob1, blob2,

drivers/gpu/drm/i915/display/intel_color.c

4271

if (display->color.funcs->load_plane_csc_matrix)

drivers/gpu/drm/i915/display/intel_color.c

4272

display->color.funcs->load_plane_csc_matrix(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

4281

if (display->color.funcs->load_plane_luts)

drivers/gpu/drm/i915/display/intel_color.c

4282

display->color.funcs->load_plane_luts(dsb, plane_state);

drivers/gpu/drm/i915/display/intel_color.c

4364

display->color.funcs = &chv_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4366

display->color.funcs = &vlv_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4368

display->color.funcs = &i965_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4370

display->color.funcs = &i9xx_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4373

display->color.funcs = &tgl_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4375

display->color.funcs = &icl_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4377

display->color.funcs = &glk_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4379

display->color.funcs = &skl_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4381

display->color.funcs = &bdw_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4383

display->color.funcs = &hsw_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4385

display->color.funcs = &ivb_color_funcs;

drivers/gpu/drm/i915/display/intel_color.c

4387

display->color.funcs = &ilk_color_funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

333

const struct drm_crtc_funcs *funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

381

funcs = &g4x_crtc_funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

383

funcs = &i965_crtc_funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

386

funcs = &i915gm_crtc_funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

388

funcs = &i915_crtc_funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

390

funcs = &i8xx_crtc_funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

393

funcs = &bdw_crtc_funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

395

funcs = &ilk_crtc_funcs;

drivers/gpu/drm/i915/display/intel_crtc.c

400

funcs, "pipe %c", pipe_name(pipe));

drivers/gpu/drm/i915/display/intel_crtc.c

96

return crtc->base.funcs->get_vblank_counter(&crtc->base);

drivers/gpu/drm/i915/display/intel_display.c

2184

if (!display->wm.funcs->initial_watermarks)

drivers/gpu/drm/i915/display/intel_display.c

4073

if (!display->modeset.funcs->get_pipe_config(crtc, crtc_state))

drivers/gpu/drm/i915/display/intel_display.c

6760

display->modeset.funcs->crtc_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

6893

display->modeset.funcs->crtc_disable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c

7537

display->modeset.funcs->commit_modeset_enables(state);

drivers/gpu/drm/i915/display/intel_display.c

8260

display->modeset.funcs = &skl_display_funcs;

drivers/gpu/drm/i915/display/intel_display.c

8262

display->modeset.funcs = &ddi_display_funcs;

drivers/gpu/drm/i915/display/intel_display.c

8264

display->modeset.funcs = &pch_split_display_funcs;

drivers/gpu/drm/i915/display/intel_display.c

8267

display->modeset.funcs = &vlv_display_funcs;

drivers/gpu/drm/i915/display/intel_display.c

8269

display->modeset.funcs = &i9xx_display_funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

104

const struct intel_audio_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

131

const struct intel_dpll_global_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

162

const struct intel_hotplug_irq_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

257

const struct intel_wm_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

340

const struct intel_cdclk_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

357

const struct intel_color_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

413

const struct intel_fdi_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

479

const struct intel_display_irq_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_core.h

521

const struct intel_modeset_funcs *funcs;

drivers/gpu/drm/i915/display/intel_display_driver.c

128

mode_config->funcs = &intel_mode_funcs;

drivers/gpu/drm/i915/display/intel_display_irq.c

2583

display->irq.funcs->reset(display);

drivers/gpu/drm/i915/display/intel_display_irq.c

2591

display->irq.funcs->postinstall(display);

drivers/gpu/drm/i915/display/intel_display_irq.c

2597

if (!HAS_DISPLAY(display) || !display->irq.funcs->ack)

drivers/gpu/drm/i915/display/intel_display_irq.c

2600

display->irq.funcs->ack(display, state);

drivers/gpu/drm/i915/display/intel_display_irq.c

2606

if (!HAS_DISPLAY(display) || !display->irq.funcs->handler)

drivers/gpu/drm/i915/display/intel_display_irq.c

2609

return display->irq.funcs->handler(display, state);

drivers/gpu/drm/i915/display/intel_display_irq.c

2624

display->irq.funcs = &gen11_display_irq_funcs;

drivers/gpu/drm/i915/display/intel_display_irq.c

2626

display->irq.funcs = &vlv_display_irq_funcs;

drivers/gpu/drm/i915/display/intel_display_irq.c

2628

display->irq.funcs = &gen8_display_irq_funcs;

drivers/gpu/drm/i915/display/intel_display_irq.c

2630

display->irq.funcs = &ilk_display_irq_funcs;

drivers/gpu/drm/i915/display/intel_display_irq.c

2632

display->irq.funcs = &i965_display_irq_funcs;

drivers/gpu/drm/i915/display/intel_display_irq.c

2634

display->irq.funcs = &i915_display_irq_funcs;

drivers/gpu/drm/i915/display/intel_display_types.h

441

const struct intel_panel_bl_funcs *funcs;

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

744

panel->backlight.funcs = &intel_dp_hdr_bl_funcs;

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c

751

panel->backlight.funcs = &intel_dp_vesa_bl_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1738

ret = display->dpll.funcs->crtc_compute_clock(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1762

if (!display->dpll.funcs->crtc_get_dpll)

drivers/gpu/drm/i915/display/intel_dpll.c

1765

ret = display->dpll.funcs->crtc_get_dpll(state, crtc);

drivers/gpu/drm/i915/display/intel_dpll.c

1779

display->dpll.funcs = &xe3plpd_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1781

display->dpll.funcs = &mtl_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1783

display->dpll.funcs = &dg2_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1785

display->dpll.funcs = &hsw_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1787

display->dpll.funcs = &ilk_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1789

display->dpll.funcs = &chv_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1791

display->dpll.funcs = &vlv_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1793

display->dpll.funcs = &g4x_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1795

display->dpll.funcs = &pnv_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1797

display->dpll.funcs = &i9xx_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll.c

1799

display->dpll.funcs = &i8xx_dpll_funcs;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1330

{ .name = "WRPLL 1", .funcs = &hsw_ddi_wrpll_funcs, .id = DPLL_ID_WRPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1331

{ .name = "WRPLL 2", .funcs = &hsw_ddi_wrpll_funcs, .id = DPLL_ID_WRPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1332

{ .name = "SPLL", .funcs = &hsw_ddi_spll_funcs, .id = DPLL_ID_SPLL, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1333

{ .name = "LCPLL 810", .funcs = &hsw_ddi_lcpll_funcs, .id = DPLL_ID_LCPLL_810,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1335

{ .name = "LCPLL 1350", .funcs = &hsw_ddi_lcpll_funcs, .id = DPLL_ID_LCPLL_1350,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1337

{ .name = "LCPLL 2700", .funcs = &hsw_ddi_lcpll_funcs, .id = DPLL_ID_LCPLL_2700,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2039

{ .name = "DPLL 0", .funcs = &skl_ddi_dpll0_funcs, .id = DPLL_ID_SKL_DPLL0,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2041

{ .name = "DPLL 1", .funcs = &skl_ddi_pll_funcs, .id = DPLL_ID_SKL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2042

{ .name = "DPLL 2", .funcs = &skl_ddi_pll_funcs, .id = DPLL_ID_SKL_DPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2043

{ .name = "DPLL 3", .funcs = &skl_ddi_pll_funcs, .id = DPLL_ID_SKL_DPLL3, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2521

{ .name = "PORT PLL A", .funcs = &bxt_ddi_pll_funcs, .id = DPLL_ID_SKL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2522

{ .name = "PORT PLL B", .funcs = &bxt_ddi_pll_funcs, .id = DPLL_ID_SKL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2523

{ .name = "PORT PLL C", .funcs = &bxt_ddi_pll_funcs, .id = DPLL_ID_SKL_DPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

255

pll->info->funcs->enable(display, pll, &pll->state.hw_state);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

262

pll->info->funcs->disable(display, pll);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4208

{ .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4209

{ .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4210

{ .name = "TBT PLL", .funcs = &icl_tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4212

{ .name = "MG PLL 1", .funcs = &mg_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4213

{ .name = "MG PLL 2", .funcs = &mg_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4214

{ .name = "MG PLL 3", .funcs = &mg_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4215

{ .name = "MG PLL 4", .funcs = &mg_pll_funcs, .id = DPLL_ID_ICL_MGPLL4, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4231

{ .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4232

{ .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4233

{ .name = "DPLL 4", .funcs = &combo_pll_funcs, .id = DPLL_ID_EHL_DPLL4,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4256

{ .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4257

{ .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4258

{ .name = "TBT PLL", .funcs = &icl_tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4260

{ .name = "TC PLL 1", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4261

{ .name = "TC PLL 2", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4262

{ .name = "TC PLL 3", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4263

{ .name = "TC PLL 4", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL4, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4264

{ .name = "TC PLL 5", .funcs = &dkl_pll_funcs, .id = DPLL_ID_TGL_MGPLL5, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4265

{ .name = "TC PLL 6", .funcs = &dkl_pll_funcs, .id = DPLL_ID_TGL_MGPLL6, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4281

{ .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4282

{ .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4283

{ .name = "DPLL 4", .funcs = &combo_pll_funcs, .id = DPLL_ID_EHL_DPLL4, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4298

{ .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_DG1_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4299

{ .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_DG1_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4300

{ .name = "DPLL 2", .funcs = &combo_pll_funcs, .id = DPLL_ID_DG1_DPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4301

{ .name = "DPLL 3", .funcs = &combo_pll_funcs, .id = DPLL_ID_DG1_DPLL3, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4316

{ .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4317

{ .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4318

{ .name = "DPLL 2", .funcs = &combo_pll_funcs, .id = DPLL_ID_DG1_DPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4319

{ .name = "DPLL 3", .funcs = &combo_pll_funcs, .id = DPLL_ID_DG1_DPLL3, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4334

{ .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4335

{ .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4336

{ .name = "TBT PLL", .funcs = &icl_tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4338

{ .name = "TC PLL 1", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4339

{ .name = "TC PLL 2", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4340

{ .name = "TC PLL 3", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4341

{ .name = "TC PLL 4", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL4, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4458

{ .name = "DPLL 0", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4459

{ .name = "DPLL 1", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4460

{ .name = "TBT PLL", .funcs = &mtl_tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4462

{ .name = "TC PLL 1", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4463

{ .name = "TC PLL 2", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4464

{ .name = "TC PLL 3", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4465

{ .name = "TC PLL 4", .funcs = &mtl_pll_funcs, .id = DPLL_ID_ICL_MGPLL4, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4636

{ .name = "DPLL 0", .funcs = &xe3plpd_pll_funcs, .id = DPLL_ID_ICL_DPLL0, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4637

{ .name = "DPLL 1", .funcs = &xe3plpd_pll_funcs, .id = DPLL_ID_ICL_DPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4638

{ .name = "TBT PLL", .funcs = &xe3plpd_tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL,

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4640

{ .name = "TC PLL 1", .funcs = &xe3plpd_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4641

{ .name = "TC PLL 2", .funcs = &xe3plpd_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4642

{ .name = "TC PLL 3", .funcs = &xe3plpd_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4643

{ .name = "TC PLL 4", .funcs = &xe3plpd_pll_funcs, .id = DPLL_ID_ICL_MGPLL4, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4936

if (drm_WARN_ON(display->drm, !pll->info->funcs->get_freq))

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4939

return pll->info->funcs->get_freq(display, pll, dpll_hw_state);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4954

return pll->info->funcs->get_hw_state(display, pll, dpll_hw_state);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

697

{ .name = "PCH DPLL A", .funcs = &ibx_pch_dpll_funcs, .id = DPLL_ID_PCH_PLL_A, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

698

{ .name = "PCH DPLL B", .funcs = &ibx_pch_dpll_funcs, .id = DPLL_ID_PCH_PLL_B, },

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

332

const struct intel_dpll_funcs *funcs;

drivers/gpu/drm/i915/display/intel_dsi.c

83

const struct mipi_dsi_host_ops *funcs,

drivers/gpu/drm/i915/display/intel_dsi.c

93

host->base.ops = funcs;

drivers/gpu/drm/i915/display/intel_dsi.h

172

const struct mipi_dsi_host_ops *funcs,

drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c

203

panel->backlight.funcs = &dcs_bl_funcs;

drivers/gpu/drm/i915/display/intel_fbc.c

2308

fbc->funcs = &ivb_fbc_funcs;

drivers/gpu/drm/i915/display/intel_fbc.c

2310

fbc->funcs = &snb_fbc_funcs;

drivers/gpu/drm/i915/display/intel_fbc.c

2312

fbc->funcs = &ilk_fbc_funcs;

drivers/gpu/drm/i915/display/intel_fbc.c

2314

fbc->funcs = &g4x_fbc_funcs;

drivers/gpu/drm/i915/display/intel_fbc.c

2316

fbc->funcs = &i965_fbc_funcs;

drivers/gpu/drm/i915/display/intel_fbc.c

2318

fbc->funcs = &i8xx_fbc_funcs;

drivers/gpu/drm/i915/display/intel_fbc.c

2441

fbc->funcs->set_false_color(fbc, fbc->false_color);

drivers/gpu/drm/i915/display/intel_fbc.c

2459

if (fbc->funcs->set_false_color)

drivers/gpu/drm/i915/display/intel_fbc.c

731

return fbc->funcs->is_active(fbc);

drivers/gpu/drm/i915/display/intel_fbc.c

741

fbc->funcs->activate(fbc);

drivers/gpu/drm/i915/display/intel_fbc.c

750

fbc->funcs->deactivate(fbc);

drivers/gpu/drm/i915/display/intel_fbc.c

755

return fbc->funcs->is_compressing(fbc);

drivers/gpu/drm/i915/display/intel_fbc.c

767

fbc->funcs->nuke(fbc);

drivers/gpu/drm/i915/display/intel_fbc.c

925

fbc->funcs->program_cfb(fbc);

drivers/gpu/drm/i915/display/intel_fbc.c

96

const struct intel_fbc_funcs *funcs;

drivers/gpu/drm/i915/display/intel_fbdev.c

173

if (helper->fb->funcs->dirty)

drivers/gpu/drm/i915/display/intel_fbdev.c

174

return helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 1);

drivers/gpu/drm/i915/display/intel_fbdev.c

330

helper->funcs = &intel_fb_helper_funcs;

drivers/gpu/drm/i915/display/intel_fdi.c

1111

display->fdi.funcs = &ilk_funcs;

drivers/gpu/drm/i915/display/intel_fdi.c

1113

display->fdi.funcs = &gen6_funcs;

drivers/gpu/drm/i915/display/intel_fdi.c

1116

display->fdi.funcs = &ivb_funcs;

drivers/gpu/drm/i915/display/intel_fdi.c

126

display->fdi.funcs->fdi_link_train(crtc, crtc_state);

drivers/gpu/drm/i915/display/intel_global_state.c

114

const struct intel_global_state_funcs *funcs)

drivers/gpu/drm/i915/display/intel_global_state.c

123

obj->funcs = funcs;

drivers/gpu/drm/i915/display/intel_global_state.c

200

obj_state = obj->funcs->atomic_duplicate_state(obj);

drivers/gpu/drm/i915/display/intel_global_state.c

95

obj->funcs->atomic_destroy_state(obj, obj_state);

drivers/gpu/drm/i915/display/intel_global_state.h

27

const struct intel_global_state_funcs *funcs;

drivers/gpu/drm/i915/display/intel_global_state.h

41

const struct intel_global_state_funcs *funcs);

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1450

if (display->hotplug.funcs)

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1451

display->hotplug.funcs->hpd_enable_detection(encoder);

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1460

if (display->hotplug.funcs)

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1461

display->hotplug.funcs->hpd_irq_setup(display);

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1472

display->hotplug.funcs = &i915_hpd_funcs;

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1475

display->hotplug.funcs = &icp_hpd_funcs;

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1477

display->hotplug.funcs = &dg1_hpd_funcs;

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1479

display->hotplug.funcs = &xelpdp_hpd_funcs;

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1481

display->hotplug.funcs = &gen11_hpd_funcs;

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1483

display->hotplug.funcs = &bxt_hpd_funcs;

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1485

display->hotplug.funcs = &icp_hpd_funcs;

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1487

display->hotplug.funcs = &spt_hpd_funcs;

drivers/gpu/drm/i915/display/intel_hotplug_irq.c

1489

display->hotplug.funcs = &ilk_hpd_funcs;

drivers/gpu/drm/i915/display/intel_initial_plane.c

227

display->modeset.funcs->get_initial_plane_config(crtc, plane_config);

drivers/gpu/drm/i915/display/intel_initial_plane.c

235

if (display->modeset.funcs->fixup_initial_plane_config(crtc, plane_config))

drivers/gpu/drm/i915/display/intel_modeset_setup.c

86

display->modeset.funcs->crtc_disable(to_intel_atomic_state(state), crtc);

drivers/gpu/drm/i915/display/intel_plane.c

240

if (!plane->base.funcs->format_mod_supported(&plane->base, format, modifier))

drivers/gpu/drm/i915/display/intel_wm.c

101

if (display->wm.funcs->compute_global_watermarks)

drivers/gpu/drm/i915/display/intel_wm.c

102

return display->wm.funcs->compute_global_watermarks(state);

drivers/gpu/drm/i915/display/intel_wm.c

109

if (display->wm.funcs->get_hw_state)

drivers/gpu/drm/i915/display/intel_wm.c

110

return display->wm.funcs->get_hw_state(display);

drivers/gpu/drm/i915/display/intel_wm.c

115

if (display->wm.funcs->sanitize)

drivers/gpu/drm/i915/display/intel_wm.c

116

return display->wm.funcs->sanitize(display);

drivers/gpu/drm/i915/display/intel_wm.c

51

if (display->wm.funcs->update_wm)

drivers/gpu/drm/i915/display/intel_wm.c

52

display->wm.funcs->update_wm(display);

drivers/gpu/drm/i915/display/intel_wm.c

60

if (!display->wm.funcs->compute_watermarks)

drivers/gpu/drm/i915/display/intel_wm.c

63

return display->wm.funcs->compute_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_wm.c

71

if (display->wm.funcs->initial_watermarks) {

drivers/gpu/drm/i915/display/intel_wm.c

72

display->wm.funcs->initial_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_wm.c

84

if (display->wm.funcs->atomic_update_watermarks)

drivers/gpu/drm/i915/display/intel_wm.c

85

display->wm.funcs->atomic_update_watermarks(state, crtc);

drivers/gpu/drm/i915/display/intel_wm.c

93

if (display->wm.funcs->optimize_watermarks)

drivers/gpu/drm/i915/display/intel_wm.c

94

display->wm.funcs->optimize_watermarks(state, crtc);

drivers/gpu/drm/i915/display/skl_watermark.c

3996

display->wm.funcs = &skl_wm_funcs;

drivers/gpu/drm/i915/gem/i915_gem_object.c

85

obj->base.funcs = &i915_gem_object_funcs;

drivers/gpu/drm/i915/intel_uncore.c

2054

(uncore)->funcs.mmio_writeb = x##_write8; \

drivers/gpu/drm/i915/intel_uncore.c

2055

(uncore)->funcs.mmio_writew = x##_write16; \

drivers/gpu/drm/i915/intel_uncore.c

2056

(uncore)->funcs.mmio_writel = x##_write32; \

drivers/gpu/drm/i915/intel_uncore.c

2061

(uncore)->funcs.mmio_readb = x##_read8; \

drivers/gpu/drm/i915/intel_uncore.c

2062

(uncore)->funcs.mmio_readw = x##_read16; \

drivers/gpu/drm/i915/intel_uncore.c

2063

(uncore)->funcs.mmio_readl = x##_read32; \

drivers/gpu/drm/i915/intel_uncore.c

2064

(uncore)->funcs.mmio_readq = x##_read64; \

drivers/gpu/drm/i915/intel_uncore.c

2070

(uncore)->funcs.write_fw_domains = x##_reg_write_fw_domains; \

drivers/gpu/drm/i915/intel_uncore.c

2076

(uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \

drivers/gpu/drm/i915/intel_uncore.c

2566

GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.read_fw_domains);

drivers/gpu/drm/i915/intel_uncore.c

2567

GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.write_fw_domains);

drivers/gpu/drm/i915/intel_uncore.c

2915

fw_domains = uncore->funcs.read_fw_domains(uncore, reg);

drivers/gpu/drm/i915/intel_uncore.c

2918

fw_domains |= uncore->funcs.write_fw_domains(uncore, reg);

drivers/gpu/drm/i915/intel_uncore.h

164

struct intel_uncore_funcs funcs;

drivers/gpu/drm/i915/intel_uncore.h

356

return uncore->funcs.mmio_read##s__(uncore, reg, (trace__)); \

drivers/gpu/drm/i915/intel_uncore.h

363

uncore->funcs.mmio_write##s__(uncore, reg, val, (trace__)); \

drivers/gpu/drm/imagination/pvr_gem.c

325

gem_obj->funcs = &pvr_gem_object_funcs;

drivers/gpu/drm/imx/dc/dc-kms.c

100

drm->mode_config.funcs = &dc_drm_mode_config_funcs;

drivers/gpu/drm/imx/dcss/dcss-kms.c

58

config->funcs = &dcss_drm_mode_config_funcs;

drivers/gpu/drm/imx/dcss/dcss-plane.c

205

!plane->funcs->format_mod_supported(plane,

drivers/gpu/drm/imx/ipuv3/imx-drm-core.c

228

drm->mode_config.funcs = &imx_drm_mode_config_funcs;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

482

drm->mode_config.funcs = &imx_lcdc_mode_config_funcs;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1161

drm->mode_config.funcs = &ingenic_drm_mode_config_funcs;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1317

ib->bridge.funcs = &ingenic_drm_bridge_funcs;

drivers/gpu/drm/kmb/kmb_drv.c

184

drm->mode_config.funcs = &kmb_mode_config_funcs;

drivers/gpu/drm/lima/lima_gem.c

236

bo->base.base.funcs = &lima_gem_funcs;

drivers/gpu/drm/logicvc/logicvc_mode.c

62

mode_config->funcs = &logicvc_mode_config_funcs;

drivers/gpu/drm/loongson/loongson_device.c

39

.funcs = &ls7a1000_kms_funcs,

drivers/gpu/drm/loongson/loongson_device.c

71

.funcs = &ls7a2000_kms_funcs,

drivers/gpu/drm/loongson/lsdc_crtc.c

398

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/loongson/lsdc_crtc.c

578

const struct lsdc_pixpll_funcs *funcs = pixpll->funcs;

drivers/gpu/drm/loongson/lsdc_crtc.c

584

out_khz = funcs->get_rate(pixpll);

drivers/gpu/drm/loongson/lsdc_crtc.c

593

funcs->print(pixpll, &printer);

drivers/gpu/drm/loongson/lsdc_crtc.c

780

const struct lsdc_pixpll_funcs *pfuncs = pixpll->funcs;

drivers/gpu/drm/loongson/lsdc_crtc.c

811

const struct lsdc_pixpll_funcs *pixpll_funcs = pixpll->funcs;

drivers/gpu/drm/loongson/lsdc_debugfs.c

52

gfxpll->funcs->print(gfxpll, &printer, true);

drivers/gpu/drm/loongson/lsdc_drv.c

100

ret = funcs->primary_plane_init(ddev, &dispipe->primary.base, i);

drivers/gpu/drm/loongson/lsdc_drv.c

104

ret = funcs->cursor_plane_init(ddev, &dispipe->cursor.base, i);

drivers/gpu/drm/loongson/lsdc_drv.c

108

ret = funcs->crtc_init(ddev, &dispipe->crtc.base,

drivers/gpu/drm/loongson/lsdc_drv.c

134

ddev->mode_config.funcs = &lsdc_mode_config_funcs;

drivers/gpu/drm/loongson/lsdc_drv.c

245

ret = lsdc_modeset_init(ldev, descp->num_of_crtc, descp->funcs,

drivers/gpu/drm/loongson/lsdc_drv.c

304

descp->funcs->irq_handler,

drivers/gpu/drm/loongson/lsdc_drv.c

64

const struct lsdc_kms_funcs *funcs,

drivers/gpu/drm/loongson/lsdc_drv.c

78

ret = funcs->create_i2c(ddev, dispipe, i);

drivers/gpu/drm/loongson/lsdc_drv.c

90

ret = funcs->output_init(ddev, dispipe, ddc, i);

drivers/gpu/drm/loongson/lsdc_drv.h

66

const struct lsdc_kms_funcs *funcs;

drivers/gpu/drm/loongson/lsdc_gem.c

166

gobj->funcs = &lsdc_gem_object_funcs;

drivers/gpu/drm/loongson/lsdc_gfxpll.c

134

this->funcs->get_rates(this, &dc, &gmc, &gpu);

drivers/gpu/drm/loongson/lsdc_gfxpll.c

161

this->funcs->print(this, &printer, false);

drivers/gpu/drm/loongson/lsdc_gfxpll.c

188

this->funcs = &lsdc_gmc_gpu_funcs;

drivers/gpu/drm/loongson/lsdc_gfxpll.c

190

ret = this->funcs->init(this);

drivers/gpu/drm/loongson/lsdc_gfxpll.h

44

const struct loongson_gfxpll_funcs *funcs;

drivers/gpu/drm/loongson/lsdc_pixpll.c

481

this->funcs = &__pixpll_default_funcs;

drivers/gpu/drm/loongson/lsdc_pixpll.c

483

return this->funcs->setup(this);

drivers/gpu/drm/loongson/lsdc_pixpll.h

68

const struct lsdc_pixpll_funcs *funcs;

drivers/gpu/drm/mcde/mcde_drv.c

168

mode_config->funcs = &mcde_mode_config_funcs;

drivers/gpu/drm/mediatek/mtk_crtc.c

1075

if (comp->funcs) {

drivers/gpu/drm/mediatek/mtk_crtc.c

1076

if (comp->funcs->gamma_set && comp->funcs->gamma_get_lut_size) {

drivers/gpu/drm/mediatek/mtk_crtc.c

1083

if (comp->funcs->ctm_set)

drivers/gpu/drm/mediatek/mtk_crtc.c

942

if (!comp->funcs)

drivers/gpu/drm/mediatek/mtk_crtc.c

945

if (comp_idx == 1 && !comp->funcs->bgclr_in_on)

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

454

const struct mtk_ddp_comp_funcs *funcs;

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

652

comp->funcs = mtk_ddp_matches[comp_id].funcs;

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

100

const struct mtk_ddp_comp_funcs *funcs;

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

105

if (comp->funcs && comp->funcs->power_on)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

106

return comp->funcs->power_on(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

114

if (comp->funcs && comp->funcs->power_off)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

115

comp->funcs->power_off(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

122

if (comp->funcs && comp->funcs->clk_enable)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

123

return comp->funcs->clk_enable(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

130

if (comp->funcs && comp->funcs->clk_disable)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

131

comp->funcs->clk_disable(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

138

if (comp && comp->funcs && comp->funcs->mode_valid)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

139

return comp->funcs->mode_valid(comp->dev, mode);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

148

if (comp->funcs && comp->funcs->config)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

149

comp->funcs->config(comp->dev, w, h, vrefresh, bpc, cmdq_pkt);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

154

if (comp->funcs && comp->funcs->start)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

155

comp->funcs->start(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

160

if (comp->funcs && comp->funcs->stop)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

161

comp->funcs->stop(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

168

if (comp->funcs && comp->funcs->register_vblank_cb)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

169

comp->funcs->register_vblank_cb(comp->dev, vblank_cb,

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

175

if (comp->funcs && comp->funcs->unregister_vblank_cb)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

176

comp->funcs->unregister_vblank_cb(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

181

if (comp->funcs && comp->funcs->enable_vblank)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

182

comp->funcs->enable_vblank(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

187

if (comp->funcs && comp->funcs->disable_vblank)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

188

comp->funcs->disable_vblank(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

194

if (comp->funcs && comp->funcs->supported_rotations)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

195

return comp->funcs->supported_rotations(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

206

if (comp->funcs && comp->funcs->layer_nr)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

207

return comp->funcs->layer_nr(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

216

if (comp->funcs && comp->funcs->layer_check)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

217

return comp->funcs->layer_check(comp->dev, idx, state);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

226

if (comp->funcs && comp->funcs->layer_config)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

227

comp->funcs->layer_config(comp->dev, idx, state, cmdq_pkt);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

232

if (comp->funcs && comp->funcs->gamma_get_lut_size)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

233

return comp->funcs->gamma_get_lut_size(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

241

if (comp->funcs && comp->funcs->gamma_set)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

242

comp->funcs->gamma_set(comp->dev, state);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

247

if (comp->funcs && comp->funcs->bgclr_in_on)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

248

comp->funcs->bgclr_in_on(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

253

if (comp->funcs && comp->funcs->bgclr_in_off)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

254

comp->funcs->bgclr_in_off(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

260

if (comp->funcs && comp->funcs->ctm_set)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

261

comp->funcs->ctm_set(comp->dev, state);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

266

if (comp->funcs && comp->funcs->dma_dev_get)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

267

return comp->funcs->dma_dev_get(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

274

if (comp->funcs && comp->funcs->get_blend_modes)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

275

return comp->funcs->get_blend_modes(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

283

if (comp->funcs && comp->funcs->get_formats)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

284

return comp->funcs->get_formats(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

292

if (comp->funcs && comp->funcs->get_num_formats)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

293

return comp->funcs->get_num_formats(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

300

if (comp->funcs && comp->funcs->is_afbc_supported)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

301

return comp->funcs->is_afbc_supported(comp->dev);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

308

if (comp->funcs && comp->funcs->add) {

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

309

comp->funcs->add(comp->dev, mutex);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

317

if (comp->funcs && comp->funcs->remove) {

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

318

comp->funcs->remove(comp->dev, mutex);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

327

if (comp->funcs && comp->funcs->connect) {

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

328

comp->funcs->connect(comp->dev, mmsys_dev, next);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

337

if (comp->funcs && comp->funcs->disconnect) {

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

338

comp->funcs->disconnect(comp->dev, mmsys_dev, next);

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

346

if (comp->funcs && comp->funcs->encoder_index)

drivers/gpu/drm/mediatek/mtk_ddp_comp.h

347

comp->encoder_index = (int)comp->funcs->encoder_index(comp->dev);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

226

!comp_matches[i].funcs->start)

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

229

comp_matches[i].funcs->start(ovl_adaptor->ovl_adaptor_comp[i]);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

240

!comp_matches[i].funcs->stop)

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

243

comp_matches[i].funcs->stop(ovl_adaptor->ovl_adaptor_comp[i]);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

264

!comp_matches[i].funcs->power_off)

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

267

comp_matches[i].funcs->power_off(ovl_adaptor->ovl_adaptor_comp[i]);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

289

!comp_matches[i].funcs->power_on)

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

292

ret = comp_matches[i].funcs->power_on(ovl_adaptor->ovl_adaptor_comp[i]);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

316

if (!comp || !comp_matches[i].funcs->clk_enable)

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

318

ret = comp_matches[i].funcs->clk_enable(comp);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

322

comp_matches[i].funcs->clk_disable(comp);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

337

if (!comp || !comp_matches[i].funcs->clk_disable)

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

339

comp_matches[i].funcs->clk_disable(comp);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

354

if (!dev || !comp_matches[i].funcs->mode_valid)

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

356

return comp_matches[i].funcs->mode_valid(dev, mode);

drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c

65

const struct mtk_ddp_comp_funcs *funcs;

drivers/gpu/drm/mediatek/mtk_drm_drv.c

487

drm->mode_config.funcs = &mtk_drm_mode_config_funcs;

drivers/gpu/drm/meson/meson_drv.c

290

drm->mode_config.funcs = &meson_mode_config_funcs;

drivers/gpu/drm/mgag200/mgag200_drv.c

169

const struct mgag200_device_funcs *funcs)

drivers/gpu/drm/mgag200/mgag200_drv.c

176

mdev->funcs = funcs;

drivers/gpu/drm/mgag200/mgag200_drv.h

270

const struct mgag200_device_funcs *funcs;

drivers/gpu/drm/mgag200/mgag200_drv.h

328

const struct mgag200_device_funcs *funcs);

drivers/gpu/drm/mgag200/mgag200_g200er.c

189

const struct mgag200_device_funcs *funcs = mdev->funcs;

drivers/gpu/drm/mgag200/mgag200_g200er.c

198

if (funcs->pixpllc_atomic_update)

drivers/gpu/drm/mgag200/mgag200_g200er.c

199

funcs->pixpllc_atomic_update(crtc, old_state);

drivers/gpu/drm/mgag200/mgag200_g200ev.c

190

const struct mgag200_device_funcs *funcs = mdev->funcs;

drivers/gpu/drm/mgag200/mgag200_g200ev.c

199

if (funcs->pixpllc_atomic_update)

drivers/gpu/drm/mgag200/mgag200_g200ev.c

200

funcs->pixpllc_atomic_update(crtc, old_state);

drivers/gpu/drm/mgag200/mgag200_g200se.c

328

const struct mgag200_device_funcs *funcs = mdev->funcs;

drivers/gpu/drm/mgag200/mgag200_g200se.c

337

if (funcs->pixpllc_atomic_update)

drivers/gpu/drm/mgag200/mgag200_g200se.c

338

funcs->pixpllc_atomic_update(crtc, old_state);

drivers/gpu/drm/mgag200/mgag200_g200se.c

453

const struct mgag200_device_funcs *funcs;

drivers/gpu/drm/mgag200/mgag200_g200se.c

501

funcs = &mgag200_g200se_04_device_funcs;

drivers/gpu/drm/mgag200/mgag200_g200se.c

503

funcs = &mgag200_g200se_00_device_funcs;

drivers/gpu/drm/mgag200/mgag200_g200se.c

505

ret = mgag200_device_init(mdev, info, funcs);

drivers/gpu/drm/mgag200/mgag200_mode.c

604

const struct mgag200_device_funcs *funcs = mdev->funcs;

drivers/gpu/drm/mgag200/mgag200_mode.c

617

if (funcs->pixpllc_atomic_check) {

drivers/gpu/drm/mgag200/mgag200_mode.c

618

ret = funcs->pixpllc_atomic_check(crtc, new_state);

drivers/gpu/drm/mgag200/mgag200_mode.c

655

const struct mgag200_device_funcs *funcs = mdev->funcs;

drivers/gpu/drm/mgag200/mgag200_mode.c

664

if (funcs->pixpllc_atomic_update)

drivers/gpu/drm/mgag200/mgag200_mode.c

665

funcs->pixpllc_atomic_update(crtc, old_state);

drivers/gpu/drm/mgag200/mgag200_mode.c

687

crtc->funcs->atomic_destroy_state(crtc, crtc->state);

drivers/gpu/drm/mgag200/mgag200_mode.c

827

dev->mode_config.funcs = &mgag200_mode_config_funcs;

drivers/gpu/drm/msm/adreno/a2xx_catalog.c

23

.funcs = &a2xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a2xx_catalog.c

34

.funcs = &a2xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a2xx_catalog.c

45

.funcs = &a2xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a2xx_catalog.c

57

.funcs = &a2xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

481

mmu->funcs->destroy(mmu);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

517

ret = adreno_gpu_init(dev, pdev, adreno_gpu, config->info->funcs, 1);

drivers/gpu/drm/msm/adreno/a2xx_gpummu.c

110

msm_mmu_init(&gpummu->base, dev, &funcs, MSM_MMU_GPUMMU);

drivers/gpu/drm/msm/adreno/a2xx_gpummu.c

87

static const struct msm_mmu_funcs funcs = {

drivers/gpu/drm/msm/adreno/a3xx_catalog.c

22

.funcs = &a3xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a3xx_catalog.c

33

.funcs = &a3xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a3xx_catalog.c

44

.funcs = &a3xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a3xx_catalog.c

55

.funcs = &a3xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a3xx_catalog.c

70

.funcs = &a3xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a3xx_catalog.c

85

.funcs = &a3xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

534

ret = adreno_gpu_init(dev, pdev, adreno_gpu, config->info->funcs, 1);

drivers/gpu/drm/msm/adreno/a4xx_catalog.c

23

.funcs = &a4xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a4xx_catalog.c

34

.funcs = &a4xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a4xx_catalog.c

45

.funcs = &a4xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

655

ret = adreno_gpu_init(dev, pdev, adreno_gpu, config->info->funcs, 1);

drivers/gpu/drm/msm/adreno/a5xx_catalog.c

109

.funcs = &a5xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a5xx_catalog.c

131

.funcs = &a5xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a5xx_catalog.c

149

.funcs = &a5xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a5xx_catalog.c

25

.funcs = &a5xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a5xx_catalog.c

42

.funcs = &a5xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a5xx_catalog.c

59

.funcs = &a5xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a5xx_catalog.c

76

.funcs = &a5xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a5xx_catalog.c

93

.funcs = &a5xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

133

gpu->funcs->recover(gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1230

struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1747

ret = adreno_gpu_init(dev, pdev, adreno_gpu, config->info->funcs, nr_rings);

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

68

empty = (get_wptr(ring) == gpu->funcs->get_rptr(gpu, ring));

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1005

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1032

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1052

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1076

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1104

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1123

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1465

.funcs = &a6xx_gmuwrapper_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1492

.funcs = &a7xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1515

.funcs = &a7xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1551

.funcs = &a7xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1594

.funcs = &a7xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

1629

.funcs = &a7xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

2380

.funcs = &a8xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

2422

.funcs = &a8xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

2464

.funcs = &a8xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

692

.funcs = &a6xx_gmuwrapper_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

724

.funcs = &a6xx_gmuwrapper_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

742

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

773

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

800

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

823

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

848

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

873

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

899

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

923

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

961

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_catalog.c

981

.funcs = &a6xx_gpu_funcs,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1160

adreno_gpu->funcs->bus_halt(adreno_gpu, true);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1291

if (adreno_gpu->funcs->gx_is_on(adreno_gpu)) {

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1437

adreno_gpu->funcs->bus_halt(adreno_gpu, a6xx_gpu->hung);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1523

mmu->funcs->detach(mmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

278

!adreno_gpu->funcs->gx_is_on(adreno_gpu))

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1570

if (adreno_gpu->funcs->gx_is_on(adreno_gpu)) {

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1600

adreno_gpu->funcs->bus_halt(adreno_gpu, true);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1815

struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2257

adreno_gpu->funcs->bus_halt(adreno_gpu, true);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2739

ret = adreno_gpu_init(dev, pdev, adreno_gpu, info->funcs, nr_rings);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2769

adreno_gpu->funcs->mmu_fault_handler);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

433

trace_msm_gpu_submit_flush(submit, adreno_gpu->funcs->get_timestamp(gpu));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

624

trace_msm_gpu_submit_flush(submit, adreno_gpu->funcs->get_timestamp(gpu));

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1254

if (!adreno_gpu->funcs->gx_is_on(adreno_gpu))

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1610

if (!adreno_gpu->funcs->gx_is_on(adreno_gpu))

drivers/gpu/drm/msm/adreno/a6xx_preempt.h

71

empty = (get_wptr(ring) == gpu->funcs->get_rptr(gpu, ring));

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1124

struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu);

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

884

if (adreno_gpu->funcs->gx_is_on(adreno_gpu)) {

drivers/gpu/drm/msm/adreno/adreno_device.c

126

if (gpu->funcs->debugfs_init) {

drivers/gpu/drm/msm/adreno/adreno_device.c

127

gpu->funcs->debugfs_init(gpu, dev->primary);

drivers/gpu/drm/msm/adreno/adreno_device.c

128

gpu->funcs->debugfs_init(gpu, dev->render);

drivers/gpu/drm/msm/adreno/adreno_device.c

240

gpu = info->funcs->init(drm);

drivers/gpu/drm/msm/adreno/adreno_device.c

262

gpu->funcs->destroy(gpu);

drivers/gpu/drm/msm/adreno/adreno_device.c

310

int ret = gpu->funcs->pm_resume(gpu);

drivers/gpu/drm/msm/adreno/adreno_device.c

329

return gpu->funcs->pm_suspend(gpu);

drivers/gpu/drm/msm/adreno/adreno_device.c

96

if (gpu->funcs->ucode_load) {

drivers/gpu/drm/msm/adreno/adreno_device.c

97

ret = gpu->funcs->ucode_load(gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1187

const struct adreno_gpu_funcs *funcs, int nr_rings)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1196

adreno_gpu->funcs = funcs;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1242

return msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

224

mmu->funcs->destroy(mmu);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

273

mmu->funcs->set_stall(mmu, true);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

303

mmu->funcs->set_stall(mmu, false);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

393

if (adreno_gpu->funcs->get_timestamp) {

drivers/gpu/drm/msm/adreno/adreno_gpu.c

395

*value = adreno_gpu->funcs->get_timestamp(gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

451

*value = !!(adreno_gpu->funcs->aqe_is_enabled &&

drivers/gpu/drm/msm/adreno/adreno_gpu.c

452

adreno_gpu->funcs->aqe_is_enabled(adreno_gpu));

drivers/gpu/drm/msm/adreno/adreno_gpu.c

698

return gpu->funcs->get_rptr(gpu, ring);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

712

gpu->funcs->pm_suspend(gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

713

gpu->funcs->pm_resume(gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

118

const struct adreno_gpu_funcs *funcs;

drivers/gpu/drm/msm/adreno/adreno_gpu.h

208

const struct adreno_gpu_funcs *funcs;

drivers/gpu/drm/msm/adreno/adreno_gpu.h

634

struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs,

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

1099

mmu->funcs->detach(mmu);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

133

mmu->funcs->detach(mmu);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

208

mmu->funcs->detach(mmu);

drivers/gpu/drm/msm/disp/mdp_kms.c

31

mdp_kms->funcs->set_irqmask(mdp_kms, irqmask, mdp_kms->cur_irq_mask);

drivers/gpu/drm/msm/disp/mdp_kms.h

30

const struct mdp_kms_funcs *funcs;

drivers/gpu/drm/msm/disp/mdp_kms.h

41

const struct mdp_kms_funcs *funcs)

drivers/gpu/drm/msm/disp/mdp_kms.h

43

mdp_kms->funcs = funcs;

drivers/gpu/drm/msm/disp/mdp_kms.h

45

return msm_kms_init(&mdp_kms->base, &funcs->base);

drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c

155

if (kms->funcs->snapshot)

drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c

156

kms->funcs->snapshot(disp_state, kms);

drivers/gpu/drm/msm/hdmi/hdmi.c

206

hdmi->connector->funcs->destroy(hdmi->connector);

drivers/gpu/drm/msm/hdmi/hdmi.h

153

const struct hdmi_phy_funcs *funcs;

drivers/gpu/drm/msm/hdmi/hdmi_bridge.c

438

if (kms->funcs->round_pixclk)

drivers/gpu/drm/msm/hdmi/hdmi_bridge.c

439

actual = kms->funcs->round_pixclk(kms,

drivers/gpu/drm/msm/msm_atomic.c

205

if (kms && kms->funcs && kms->funcs->check_mode_changed)

drivers/gpu/drm/msm/msm_atomic.c

206

ret = kms->funcs->check_mode_changed(kms, state);

drivers/gpu/drm/msm/msm_atomic.c

224

kms->funcs->enable_commit(kms);

drivers/gpu/drm/msm/msm_atomic.c

232

kms->funcs->wait_flush(kms, crtc_mask);

drivers/gpu/drm/msm/msm_atomic.c

241

if (kms->funcs->prepare_commit)

drivers/gpu/drm/msm/msm_atomic.c

242

kms->funcs->prepare_commit(kms, state);

drivers/gpu/drm/msm/msm_atomic.c

276

kms->funcs->disable_commit(kms);

drivers/gpu/drm/msm/msm_atomic.c

304

kms->funcs->flush_commit(kms, crtc_mask);

drivers/gpu/drm/msm/msm_atomic.c

310

kms->funcs->wait_flush(kms, crtc_mask);

drivers/gpu/drm/msm/msm_atomic.c

316

kms->funcs->complete_commit(kms, crtc_mask);

drivers/gpu/drm/msm/msm_atomic.c

318

kms->funcs->disable_commit(kms);

drivers/gpu/drm/msm/msm_atomic.c

77

kms->funcs->enable_commit(kms);

drivers/gpu/drm/msm/msm_atomic.c

85

kms->funcs->flush_commit(kms, crtc_mask);

drivers/gpu/drm/msm/msm_atomic.c

91

kms->funcs->wait_flush(kms, crtc_mask);

drivers/gpu/drm/msm/msm_atomic.c

96

kms->funcs->complete_commit(kms, crtc_mask);

drivers/gpu/drm/msm/msm_atomic.c

98

kms->funcs->disable_commit(kms);

drivers/gpu/drm/msm/msm_debugfs.c

224

if (priv->kms->funcs->debugfs_init)

drivers/gpu/drm/msm/msm_debugfs.c

225

priv->kms->funcs->debugfs_init(priv->kms, minor);

drivers/gpu/drm/msm/msm_debugfs.c

45

gpu->funcs->show(gpu, show_priv->state, &p);

drivers/gpu/drm/msm/msm_debugfs.c

60

gpu->funcs->gpu_state_put(show_priv->state);

drivers/gpu/drm/msm/msm_debugfs.c

76

if (!gpu || !gpu->funcs->gpu_state_get)

drivers/gpu/drm/msm/msm_debugfs.c

89

show_priv->state = gpu->funcs->gpu_state_get(gpu);

drivers/gpu/drm/msm/msm_drv.c

319

return gpu->funcs->get_param(gpu, file->driver_priv,

drivers/gpu/drm/msm/msm_drv.c

338

return gpu->funcs->set_param(gpu, file->driver_priv,

drivers/gpu/drm/msm/msm_fbdev.c

131

helper->funcs = &msm_fbdev_helper_funcs;

drivers/gpu/drm/msm/msm_fbdev.c

76

if (helper->fb->funcs->dirty) {

drivers/gpu/drm/msm/msm_fbdev.c

77

ret = helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 1);

drivers/gpu/drm/msm/msm_gem.c

1230

(*obj)->funcs = &msm_gem_object_funcs;

drivers/gpu/drm/msm/msm_gem_vma.c

1158

mmu->funcs->prealloc_count(mmu, &job->prealloc, start_iova, end_iova - start_iova);

drivers/gpu/drm/msm/msm_gem_vma.c

1354

ret = mmu->funcs->prealloc_allocate(mmu, &job->prealloc);

drivers/gpu/drm/msm/msm_gem_vma.c

165

vm->mmu->funcs->destroy(vm->mmu);

drivers/gpu/drm/msm/msm_gem_vma.c

255

vm->mmu->funcs->unmap(vm->mmu, op->iova, op->range);

drivers/gpu/drm/msm/msm_gem_vma.c

263

return vm->mmu->funcs->map(vm->mmu, op->iova, op->sgt, op->offset,

drivers/gpu/drm/msm/msm_gem_vma.c

767

vm->mmu->funcs->prealloc_cleanup(vm->mmu, &job->prealloc);

drivers/gpu/drm/msm/msm_gpu.c

1053

mmu->funcs->detach(mmu);

drivers/gpu/drm/msm/msm_gpu.c

170

ret = gpu->funcs->hw_init(gpu);

drivers/gpu/drm/msm/msm_gpu.c

207

gpu->funcs->show(gpu, state, &p);

drivers/gpu/drm/msm/msm_gpu.c

371

if (!gpu->funcs->gpu_state_get)

drivers/gpu/drm/msm/msm_gpu.c

378

state = gpu->funcs->gpu_state_get(gpu);

drivers/gpu/drm/msm/msm_gpu.c

470

struct msm_ringbuffer *cur_ring = gpu->funcs->active_ring(gpu);

drivers/gpu/drm/msm/msm_gpu.c

558

gpu->funcs->recover(gpu);

drivers/gpu/drm/msm/msm_gpu.c

576

gpu->funcs->submit(gpu, submit);

drivers/gpu/drm/msm/msm_gpu.c

592

struct msm_ringbuffer *cur_ring = gpu->funcs->active_ring(gpu);

drivers/gpu/drm/msm/msm_gpu.c

640

if (!gpu->funcs->progress)

drivers/gpu/drm/msm/msm_gpu.c

643

if (!gpu->funcs->progress(gpu, ring))

drivers/gpu/drm/msm/msm_gpu.c

654

struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu);

drivers/gpu/drm/msm/msm_gpu.c

821

gpu->funcs->submit(gpu, submit);

drivers/gpu/drm/msm/msm_gpu.c

835

return gpu->funcs->irq(gpu);

drivers/gpu/drm/msm/msm_gpu.c

872

if (gpu->funcs->create_private_vm) {

drivers/gpu/drm/msm/msm_gpu.c

873

vm = gpu->funcs->create_private_vm(gpu, kernel_managed);

drivers/gpu/drm/msm/msm_gpu.c

885

struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,

drivers/gpu/drm/msm/msm_gpu.c

894

gpu->funcs = funcs;

drivers/gpu/drm/msm/msm_gpu.c

919

if (funcs->progress)

drivers/gpu/drm/msm/msm_gpu.c

969

gpu->vm = gpu->funcs->create_vm(gpu, pdev);

drivers/gpu/drm/msm/msm_gpu.h

175

const struct msm_gpu_funcs *funcs;

drivers/gpu/drm/msm/msm_gpu.h

749

struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,

drivers/gpu/drm/msm/msm_gpu.h

790

if (gpu->funcs->gpu_state_put(gpu->crashstate))

drivers/gpu/drm/msm/msm_gpu_devfreq.c

146

if (!gpu->funcs->gpu_busy)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

237

df->busy_cycles = gpu->funcs->gpu_busy(gpu, &sample_rate);

drivers/gpu/drm/msm/msm_gpu_devfreq.c

46

if (gpu->funcs->gpu_set_freq) {

drivers/gpu/drm/msm/msm_gpu_devfreq.c

48

gpu->funcs->gpu_set_freq(gpu, opp, df->suspended);

drivers/gpu/drm/msm/msm_gpu_devfreq.c

71

if (gpu->funcs->gpu_get_freq)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

72

return gpu->funcs->gpu_get_freq(gpu);

drivers/gpu/drm/msm/msm_gpu_devfreq.c

99

busy_cycles = gpu->funcs->gpu_busy(gpu, &sample_rate);

drivers/gpu/drm/msm/msm_iommu.c

718

static const struct msm_mmu_funcs funcs = {

drivers/gpu/drm/msm/msm_iommu.c

748

msm_mmu_init(&iommu->base, dev, &funcs, MSM_MMU_IOMMU);

drivers/gpu/drm/msm/msm_kms.c

119

kms->funcs->enable_vblank(kms, vbl_work->crtc);

drivers/gpu/drm/msm/msm_kms.c

121

kms->funcs->disable_vblank(kms, vbl_work->crtc);

drivers/gpu/drm/msm/msm_kms.c

210

mmu->funcs->destroy(mmu);

drivers/gpu/drm/msm/msm_kms.c

259

if (kms && kms->funcs)

drivers/gpu/drm/msm/msm_kms.c

260

kms->funcs->destroy(kms);

drivers/gpu/drm/msm/msm_kms.c

291

ddev->mode_config.funcs = &mode_config_funcs;

drivers/gpu/drm/msm/msm_kms.c

295

ret = kms->funcs->hw_init(kms);

drivers/gpu/drm/msm/msm_kms.c

42

return kms->funcs->irq(kms);

drivers/gpu/drm/msm/msm_kms.c

52

kms->funcs->irq_preinstall(kms);

drivers/gpu/drm/msm/msm_kms.c

62

if (kms->funcs->irq_postinstall)

drivers/gpu/drm/msm/msm_kms.c

63

return kms->funcs->irq_postinstall(kms);

drivers/gpu/drm/msm/msm_kms.c

99

kms->funcs->irq_uninstall(kms);

drivers/gpu/drm/msm/msm_kms.h

139

const struct msm_kms_funcs *funcs;

drivers/gpu/drm/msm/msm_kms.h

176

const struct msm_kms_funcs *funcs)

drivers/gpu/drm/msm/msm_kms.h

183

kms->funcs = funcs;

drivers/gpu/drm/msm/msm_mmu.h

54

const struct msm_mmu_funcs *funcs;

drivers/gpu/drm/msm/msm_mmu.h

70

const struct msm_mmu_funcs *funcs, enum msm_mmu_type type)

drivers/gpu/drm/msm/msm_mmu.h

73

mmu->funcs = funcs;

drivers/gpu/drm/msm/msm_perfcntr.c

206

gpu->funcs->perfcntr_configure(gpu, ring, stream);

drivers/gpu/drm/msm/msm_perfcntr.c

262

if (gpu->funcs->sysprof_setup)

drivers/gpu/drm/msm/msm_perfcntr.c

263

gpu->funcs->sysprof_setup(gpu, true);

drivers/gpu/drm/msm/msm_perfcntr.c

265

if (gpu->funcs->perfcntr_flush)

drivers/gpu/drm/msm/msm_perfcntr.c

266

gpu->funcs->perfcntr_flush(gpu);

drivers/gpu/drm/msm/msm_perfcntr.c

276

to_adreno_gpu(gpu)->funcs->get_timestamp(gpu));

drivers/gpu/drm/msm/msm_perfcntr.c

300

if (gpu->funcs->sysprof_setup)

drivers/gpu/drm/msm/msm_perfcntr.c

301

gpu->funcs->sysprof_setup(gpu, false);

drivers/gpu/drm/msm/msm_rd.c

202

gpu->funcs->get_param(gpu, NULL, MSM_PARAM_GPU_ID, &val, &zero);

drivers/gpu/drm/msm/msm_rd.c

207

gpu->funcs->get_param(gpu, NULL, MSM_PARAM_CHIP_ID, &val, &zero);

drivers/gpu/drm/msm/msm_submitqueue.c

44

if (gpu->funcs->sysprof_setup)

drivers/gpu/drm/msm/msm_submitqueue.c

45

gpu->funcs->sysprof_setup(gpu, false);

drivers/gpu/drm/mxsfb/lcdif_drv.c

195

drm->mode_config.funcs = &lcdif_mode_config_funcs;

drivers/gpu/drm/mxsfb/mxsfb_drv.c

277

drm->mode_config.funcs = &mxsfb_mode_config_funcs;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

713

const struct drm_crtc_helper_funcs *funcs = crtc->helper_private;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

719

funcs->dpms(crtc, DRM_MODE_DPMS_OFF);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

734

const struct drm_crtc_helper_funcs *funcs = crtc->helper_private;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

749

funcs->dpms(crtc, DRM_MODE_DPMS_ON);

drivers/gpu/drm/nouveau/dispnv04/disp.c

286

connector->funcs->destroy(connector);

drivers/gpu/drm/nouveau/dispnv50/disp.c

1285

mstc->connector.funcs->reset(&mstc->connector);

drivers/gpu/drm/nouveau/dispnv50/disp.c

2847

dev->mode_config.funcs = &nv50_disp_func;

drivers/gpu/drm/nouveau/dispnv50/disp.c

2979

connector->funcs->destroy(connector);

drivers/gpu/drm/nouveau/dispnv50/head.c

577

const struct drm_crtc_funcs *funcs;

drivers/gpu/drm/nouveau/dispnv50/head.c

589

funcs = &nv50_head_func;

drivers/gpu/drm/nouveau/dispnv50/head.c

591

funcs = &nvd9_head_func;

drivers/gpu/drm/nouveau/dispnv50/head.c

612

funcs, "head-%d", head->base.index);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

764

plane->funcs->atomic_destroy_state(plane, plane->state);

drivers/gpu/drm/nouveau/nouveau_connector.c

1449

connector->funcs->reset(connector);

drivers/gpu/drm/nouveau/nouveau_connector.c

794

ret = connector->funcs->atomic_set_property(&nv_connector->base,

drivers/gpu/drm/nouveau/nouveau_display.c

657

dev->mode_config.funcs = &nouveau_mode_config_funcs;

drivers/gpu/drm/nouveau/nouveau_gem.c

257

nvbo->bo.base.funcs = &nouveau_gem_object_funcs;

drivers/gpu/drm/nouveau/nouveau_prime.c

61

nvbo->bo.base.funcs = &nouveau_gem_object_funcs;

drivers/gpu/drm/omapdrm/omap_drv.c

536

dev->mode_config.funcs = &omap_mode_config_funcs;

drivers/gpu/drm/omapdrm/omap_fbdev.c

132

if (helper->fb->funcs->dirty)

drivers/gpu/drm/omapdrm/omap_fbdev.c

133

return helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 1);

drivers/gpu/drm/omapdrm/omap_fbdev.c

230

helper->funcs = &omap_fbdev_helper_funcs;

drivers/gpu/drm/omapdrm/omap_gem.c

1347

obj->funcs = &omap_gem_object_funcs;

drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c

1735

boe->base.funcs = &boe_panel_funcs;

drivers/gpu/drm/panel/panel-himax-hx83102.c

1283

ctx->base.funcs = &hx83102_drm_funcs;

drivers/gpu/drm/panel/panel-ilitek-ili9806e-core.c

74

const struct drm_panel_funcs *funcs,

drivers/gpu/drm/panel/panel-ilitek-ili9806e-core.c

82

funcs, connector_type);

drivers/gpu/drm/panel/panel-ilitek-ili9806e-core.h

11

const struct drm_panel_funcs *funcs,

drivers/gpu/drm/panel/panel-ilitek-ili9882t.c

808

ili->base.funcs = &ili9882t_funcs;

drivers/gpu/drm/panfrost/panfrost_gem.c

438

obj->base.base.funcs = &panfrost_gem_funcs;

drivers/gpu/drm/panthor/panthor_gem.c

988

bo->base.funcs = &panthor_gem_funcs;

drivers/gpu/drm/pl111/pl111_drv.c

91

mode_config->funcs = &mode_config_funcs;

drivers/gpu/drm/qxl/qxl_display.c

1285

qdev->ddev.mode_config.funcs = (void *)&qxl_mode_funcs;

drivers/gpu/drm/qxl/qxl_display.c

965

const struct drm_plane_funcs *funcs;

drivers/gpu/drm/qxl/qxl_display.c

971

funcs = &qxl_primary_plane_funcs;

drivers/gpu/drm/qxl/qxl_display.c

976

funcs = &qxl_cursor_plane_funcs;

drivers/gpu/drm/qxl/qxl_display.c

989

funcs, formats, num_formats,

drivers/gpu/drm/qxl/qxl_object.c

128

bo->tbo.base.funcs = &qxl_object_funcs;

drivers/gpu/drm/radeon/radeon.h

1757

struct radeon_audio_basic_funcs *funcs;

drivers/gpu/drm/radeon/radeon_audio.c

212

if (rdev->audio.funcs->enable)

drivers/gpu/drm/radeon/radeon_audio.c

213

rdev->audio.funcs->enable(rdev, pin, enable_mask);

drivers/gpu/drm/radeon/radeon_audio.c

221

rdev->audio.funcs = &dce6_funcs;

drivers/gpu/drm/radeon/radeon_audio.c

225

rdev->audio.funcs = &dce4_funcs;

drivers/gpu/drm/radeon/radeon_audio.c

229

rdev->audio.funcs = &dce32_funcs;

drivers/gpu/drm/radeon/radeon_audio.c

233

rdev->audio.funcs = &r600_funcs;

drivers/gpu/drm/radeon/radeon_audio.c

290

if (rdev->audio.funcs->endpoint_rreg)

drivers/gpu/drm/radeon/radeon_audio.c

291

return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);

drivers/gpu/drm/radeon/radeon_audio.c

299

if (rdev->audio.funcs->endpoint_wreg)

drivers/gpu/drm/radeon/radeon_audio.c

300

rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);

drivers/gpu/drm/radeon/radeon_connectors.c

721

crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL);

drivers/gpu/drm/radeon/radeon_display.c

1597

rdev_to_drm(rdev)->mode_config.funcs = &radeon_mode_funcs;

drivers/gpu/drm/radeon/radeon_display.c

462

crtc->funcs->get_vblank_counter(crtc)) > 0)))

drivers/gpu/drm/radeon/radeon_display.c

584

crtc->funcs->get_vblank_counter(crtc);

drivers/gpu/drm/radeon/radeon_fbdev.c

243

fb_helper->funcs = &radeon_fbdev_fb_helper_funcs;

drivers/gpu/drm/radeon/radeon_object.c

154

bo->tbo.base.funcs = &radeon_gem_object_funcs;

drivers/gpu/drm/radeon/radeon_prime.c

61

bo->tbo.base.funcs = &radeon_gem_object_funcs;

drivers/gpu/drm/renesas/rcar-du/rcar_du_kms.c

390

gem_obj->funcs = &rcar_du_gem_funcs;

drivers/gpu/drm/renesas/rcar-du/rcar_du_kms.c

866

dev->mode_config.funcs = &rcar_du_mode_config_funcs;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c

417

dev->mode_config.funcs = &rzg2l_du_mode_config_funcs;

drivers/gpu/drm/renesas/shmobile/shmob_drm_kms.c

186

sdev->ddev.mode_config.funcs = &shmob_drm_mode_config_funcs;

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

400

dp->encoder.encoder.funcs->destroy(&dp->encoder.encoder);

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

410

dp->encoder.encoder.funcs->destroy(&dp->encoder.encoder);

drivers/gpu/drm/rockchip/cdn-dp-core.c

1054

encoder->funcs->destroy(encoder);

drivers/gpu/drm/rockchip/rk3066_hdmi.c

702

hdmi->bridge.funcs = &rk3066_hdmi_bridge_funcs;

drivers/gpu/drm/rockchip/rk3066_hdmi.c

808

hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);

drivers/gpu/drm/rockchip/rk3066_hdmi.c

820

hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder);

drivers/gpu/drm/rockchip/rockchip_drm_fb.c

81

dev->mode_config.funcs = &rockchip_drm_mode_config_funcs;

drivers/gpu/drm/rockchip/rockchip_drm_gem.c

298

obj->funcs = &rockchip_gem_object_funcs;

drivers/gpu/drm/rockchip/rockchip_lvds.c

617

lvds->bridge->funcs = &rockchip_lvds_bridge_funcs;

drivers/gpu/drm/sitronix/st7571.c

517

drm->mode_config.funcs = &st7571_mode_config_funcs;

drivers/gpu/drm/sitronix/st7586.c

421

drm->mode_config.funcs = &st7586_mode_config_funcs;

drivers/gpu/drm/sitronix/st7735r.c

301

drm->mode_config.funcs = &st7735r_mode_config_funcs;

drivers/gpu/drm/sitronix/st7920.c

728

drm->mode_config.funcs = &st7920_mode_config_funcs;

drivers/gpu/drm/solomon/ssd130x.c

1888

drm->mode_config.funcs = &ssd130x_mode_config_funcs;

drivers/gpu/drm/sprd/sprd_drm.c

45

drm->mode_config.funcs = &sprd_drm_mode_config_funcs;

drivers/gpu/drm/sti/sti_drv.c

129

dev->mode_config.funcs = &sti_mode_config_funcs;

drivers/gpu/drm/stm/drv.c

100

ddev->mode_config.funcs = &drv_mode_config_funcs;

drivers/gpu/drm/sun4i/sun4i_framebuffer.c

50

drm->mode_config.funcs = &sun4i_de_mode_config_funcs;

drivers/gpu/drm/sysfb/corebootdrm.c

216

dev->mode_config.funcs = &corebootdrm_mode_config_funcs;

drivers/gpu/drm/sysfb/efidrm.c

298

dev->mode_config.funcs = &efidrm_mode_config_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

1016

dev->mode_config.funcs = &ofdrm_mode_config_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

302

const struct ofdrm_device_funcs *funcs;

drivers/gpu/drm/sysfb/ofdrm.c

665

odev->funcs->cmap_write(odev, i8, r8, g8, b8);

drivers/gpu/drm/sysfb/ofdrm.c

864

odev->funcs = &ofdrm_unknown_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

867

odev->funcs = &ofdrm_mach64_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

870

odev->funcs = &ofdrm_rage128_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

873

odev->funcs = &ofdrm_rage_m3a_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

876

odev->funcs = &ofdrm_rage_m3b_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

879

odev->funcs = &ofdrm_radeon_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

882

odev->funcs = &ofdrm_gxt2000_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

885

odev->funcs = &ofdrm_avivo_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

888

odev->funcs = &ofdrm_qemu_device_funcs;

drivers/gpu/drm/sysfb/ofdrm.c

971

if (odev->funcs->cmap_ioremap) {

drivers/gpu/drm/sysfb/ofdrm.c

972

void __iomem *cmap_base = odev->funcs->cmap_ioremap(odev, of_node, fb_base);

drivers/gpu/drm/sysfb/simpledrm.c

762

dev->mode_config.funcs = &simpledrm_mode_config_funcs;

drivers/gpu/drm/sysfb/vesadrm.c

537

dev->mode_config.funcs = &vesadrm_mode_config_funcs;

drivers/gpu/drm/tegra/dc.c

1474

planes[i]->funcs->destroy(planes[i]);

drivers/gpu/drm/tegra/dc.c

1476

primary->funcs->destroy(primary);

drivers/gpu/drm/tegra/drm.c

1184

drm->mode_config.funcs = &tegra_drm_mode_config_funcs;

drivers/gpu/drm/tegra/fbdev.c

108

helper->funcs = &tegra_fbdev_helper_funcs;

drivers/gpu/drm/tegra/gem.c

311

bo->gem.funcs = &tegra_gem_object_funcs;

drivers/gpu/drm/tests/drm_bridge_test.c

113

drm_test_bridge_init(struct kunit *test, const struct drm_bridge_funcs *funcs)

drivers/gpu/drm/tests/drm_bridge_test.c

132

priv->test_bridge = devm_drm_bridge_alloc(dev, struct drm_bridge_priv, bridge, funcs);

drivers/gpu/drm/tests/drm_framebuffer_test.c

397

dev->mode_config.funcs = &mock_config_funcs;

drivers/gpu/drm/tests/drm_framebuffer_test.c

585

struct drm_framebuffer_funcs funcs = { };

drivers/gpu/drm/tests/drm_framebuffer_test.c

588

ret = drm_framebuffer_init(dev, &fb1, &funcs);

drivers/gpu/drm/tests/drm_framebuffer_test.c

592

KUNIT_EXPECT_PTR_EQ(test, fb1.funcs, &funcs);

drivers/gpu/drm/tests/drm_framebuffer_test.c

617

struct drm_framebuffer_funcs funcs = { };

drivers/gpu/drm/tests/drm_framebuffer_test.c

621

ret = drm_framebuffer_init(dev, &fb1, &funcs);

drivers/gpu/drm/tests/drm_framebuffer_test.c

638

struct drm_framebuffer_funcs funcs = { };

drivers/gpu/drm/tests/drm_framebuffer_test.c

650

ret = drm_framebuffer_init(wrong_dev, &fb1, &funcs);

drivers/gpu/drm/tests/drm_framebuffer_test.c

677

.funcs = &framebuffer_funcs_free_mock,

drivers/gpu/drm/tests/drm_gem_shmem_test.c

112

KUNIT_EXPECT_NOT_NULL(test, gem_obj->funcs);

drivers/gpu/drm/tests/drm_gem_shmem_test.c

57

KUNIT_EXPECT_NOT_NULL(test, shmem->base.funcs);

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

1377

conn->hdmi.funcs = &reject_connector_hdmi_funcs;

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

267

#define drm_kunit_helper_connector_hdmi_init_with_edid_funcs(test, formats, max_bpc, funcs, edid) \

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

268

__connector_hdmi_init(test, formats, max_bpc, funcs, edid, ARRAY_SIZE(edid))

drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c

75

ret = connector->funcs->fill_modes(connector, 4096, 4096);

drivers/gpu/drm/tests/drm_kunit_helpers.c

175

const struct drm_plane_funcs *funcs,

drivers/gpu/drm/tests/drm_kunit_helpers.c

183

if (!funcs)

drivers/gpu/drm/tests/drm_kunit_helpers.c

184

funcs = &default_plane_funcs;

drivers/gpu/drm/tests/drm_kunit_helpers.c

200

funcs,

drivers/gpu/drm/tests/drm_kunit_helpers.c

248

const struct drm_crtc_funcs *funcs,

drivers/gpu/drm/tests/drm_kunit_helpers.c

254

if (!funcs)

drivers/gpu/drm/tests/drm_kunit_helpers.c

255

funcs = &default_crtc_funcs;

drivers/gpu/drm/tests/drm_kunit_helpers.c

266

funcs,

drivers/gpu/drm/tests/drm_kunit_helpers.c

75

drm->mode_config.funcs = &drm_mode_config_funcs;

drivers/gpu/drm/tidss/tidss_kms.c

279

ddev->mode_config.funcs = &mode_config_funcs;

drivers/gpu/drm/tilcdc/tilcdc_drv.c

88

dev->mode_config.funcs = &mode_config_funcs;

drivers/gpu/drm/tiny/appletbdrm.c

692

drm->mode_config.funcs = &appletbdrm_mode_config_funcs;

drivers/gpu/drm/tiny/arcpgu.c

271

drm->mode_config.funcs = &arcpgu_drm_modecfg_funcs;

drivers/gpu/drm/tiny/bochs.c

643

dev->mode_config.funcs = &bochs_mode_config_funcs;

drivers/gpu/drm/tiny/cirrus-qemu.c

556

dev->mode_config.funcs = &cirrus_mode_config_funcs;

drivers/gpu/drm/tiny/gm12u320.c

666

dev->mode_config.funcs = &gm12u320_mode_config_funcs;

drivers/gpu/drm/tiny/hx8357d.c

326

drm->mode_config.funcs = &hx8357d_mode_config_funcs;

drivers/gpu/drm/tiny/ili9163.c

257

drm->mode_config.funcs = &ili9163_mode_config_funcs;

drivers/gpu/drm/tiny/ili9225.c

484

drm->mode_config.funcs = &ili9225_mode_config_funcs;

drivers/gpu/drm/tiny/ili9341.c

288

drm->mode_config.funcs = &ili9341_mode_config_funcs;

drivers/gpu/drm/tiny/ili9486.c

316

drm->mode_config.funcs = &ili9486_mode_config_funcs;

drivers/gpu/drm/tiny/mi0283qt.c

296

drm->mode_config.funcs = &mi0283qt_mode_config_funcs;

drivers/gpu/drm/tiny/panel-mipi-dbi.c

454

drm->mode_config.funcs = &panel_mipi_dbi_mode_config_funcs;

drivers/gpu/drm/tiny/pixpaper.c

1085

drm->mode_config.funcs = &pixpaper_mode_config_funcs;

drivers/gpu/drm/tiny/repaper.c

981

drm->mode_config.funcs = &repaper_mode_config_funcs;

drivers/gpu/drm/tiny/sharp-memory.c

558

drm->mode_config.funcs = &sharp_memory_mode_config_funcs;

drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.c

540

old_tt = priv->ttm_dev->funcs->ttm_tt_create(bo, 0);

drivers/gpu/drm/ttm/tests/ttm_device_test.c

31

KUNIT_EXPECT_PTR_EQ(test, ttm_dev->funcs, &ttm_dev_funcs);

drivers/gpu/drm/ttm/tests/ttm_device_test.c

64

KUNIT_EXPECT_PTR_EQ(test, ttm_devs[i].funcs, &ttm_dev_funcs);

drivers/gpu/drm/ttm/tests/ttm_kunit_helpers.c

121

struct ttm_device_funcs *funcs)

drivers/gpu/drm/ttm/tests/ttm_kunit_helpers.c

126

err = ttm_device_init(ttm, funcs, drm->dev,

drivers/gpu/drm/ttm/tests/ttm_tt_test.c

232

devs->ttm_dev->funcs = &ttm_dev_empty_funcs;

drivers/gpu/drm/ttm/ttm_bo.c

1123

if (bo->pin_count || !bdev->funcs->eviction_valuable(bo, &place)) {

drivers/gpu/drm/ttm/ttm_bo.c

1176

if (bdev->funcs->swap_notify)

drivers/gpu/drm/ttm/ttm_bo.c

1177

bdev->funcs->swap_notify(bo);

drivers/gpu/drm/ttm/ttm_bo.c

158

ret = bdev->funcs->move(bo, evict, ctx, mem, hop);

drivers/gpu/drm/ttm/ttm_bo.c

185

if (bo->bdev->funcs->delete_mem_notify)

drivers/gpu/drm/ttm/ttm_bo.c

186

bo->bdev->funcs->delete_mem_notify(bo);

drivers/gpu/drm/ttm/ttm_bo.c

270

if (bdev->funcs->release_notify)

drivers/gpu/drm/ttm/ttm_bo.c

271

bdev->funcs->release_notify(bo);

drivers/gpu/drm/ttm/ttm_bo.c

371

bo->bdev->funcs->evict_flags(bo, &placement);

drivers/gpu/drm/ttm/ttm_bo.c

524

if (bo->pin_count || !bo->bdev->funcs->eviction_valuable(bo, evict_walk->place))

drivers/gpu/drm/ttm/ttm_bo_util.c

56

if (!bdev->funcs->io_mem_reserve)

drivers/gpu/drm/ttm/ttm_bo_util.c

59

return bdev->funcs->io_mem_reserve(bdev, mem);

drivers/gpu/drm/ttm/ttm_bo_util.c

71

if (bdev->funcs->io_mem_free)

drivers/gpu/drm/ttm/ttm_bo_util.c

72

bdev->funcs->io_mem_free(bdev, mem);

drivers/gpu/drm/ttm/ttm_bo_vm.c

447

if (bo->bdev->funcs->access_memory)

drivers/gpu/drm/ttm/ttm_bo_vm.c

448

ret = bo->bdev->funcs->access_memory

drivers/gpu/drm/ttm/ttm_bo_vm.c

91

if (bdev->funcs->io_mem_pfn)

drivers/gpu/drm/ttm/ttm_bo_vm.c

92

return bdev->funcs->io_mem_pfn(bo, page_offset);

drivers/gpu/drm/ttm/ttm_device.c

205

int ttm_device_init(struct ttm_device *bdev, const struct ttm_device_funcs *funcs,

drivers/gpu/drm/ttm/ttm_device.c

228

bdev->funcs = funcs;

drivers/gpu/drm/ttm/ttm_tt.c

104

bo->ttm = bdev->funcs->ttm_tt_create(bo, page_flags);

drivers/gpu/drm/ttm/ttm_tt.c

149

bdev->funcs->ttm_tt_destroy(bdev, ttm);

drivers/gpu/drm/ttm/ttm_tt.c

399

if (bdev->funcs->ttm_tt_populate)

drivers/gpu/drm/ttm/ttm_tt.c

400

ret = bdev->funcs->ttm_tt_populate(bdev, ttm, ctx);

drivers/gpu/drm/ttm/ttm_tt.c

437

if (bdev->funcs->ttm_tt_unpopulate)

drivers/gpu/drm/ttm/ttm_tt.c

438

bdev->funcs->ttm_tt_unpopulate(bdev, ttm);

drivers/gpu/drm/tve200/tve200_drv.c

74

mode_config->funcs = &mode_config_funcs;

drivers/gpu/drm/udl/udl_modeset.c

503

dev->mode_config.funcs = &udl_mode_config_funcs;

drivers/gpu/drm/v3d/v3d_bo.c

94

obj->funcs = &v3d_gem_funcs;

drivers/gpu/drm/vboxvideo/vbox_mode.c

511

const struct drm_plane_funcs *funcs;

drivers/gpu/drm/vboxvideo/vbox_mode.c

518

funcs = &vbox_primary_plane_funcs;

drivers/gpu/drm/vboxvideo/vbox_mode.c

523

funcs = &vbox_cursor_plane_funcs;

drivers/gpu/drm/vboxvideo/vbox_mode.c

536

funcs, formats, num_formats,

drivers/gpu/drm/vboxvideo/vbox_mode.c

853

dev->mode_config.funcs = (void *)&vbox_mode_funcs;

drivers/gpu/drm/vc4/vc4_bo.c

416

bo->base.base.funcs = &vc4_gem_object_funcs;

drivers/gpu/drm/vc4/vc4_hdmi.c

569

if (connector->funcs->reset)

drivers/gpu/drm/vc4/vc4_hdmi.c

570

connector->funcs->reset(connector);

drivers/gpu/drm/vc4/vc4_kms.c

1171

dev->mode_config.funcs = (vc4->gen > VC4_GEN_4) ? &vc5_mode_funcs : &vc4_mode_funcs;

drivers/gpu/drm/verisilicon/vs_drm.c

81

drm->mode_config.funcs = &vs_mode_config_funcs;

drivers/gpu/drm/virtio/virtgpu_display.c

371

vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs;

drivers/gpu/drm/virtio/virtgpu_object.c

143

return bo->base.base.funcs == &virtio_gpu_shmem_funcs;

drivers/gpu/drm/virtio/virtgpu_object.c

157

dshmem->base.funcs = &virtio_gpu_shmem_funcs;

drivers/gpu/drm/virtio/virtgpu_plane.c

587

const struct drm_plane_helper_funcs *funcs;

drivers/gpu/drm/virtio/virtgpu_plane.c

595

funcs = &virtio_gpu_cursor_helper_funcs;

drivers/gpu/drm/virtio/virtgpu_plane.c

599

funcs = &virtio_gpu_primary_helper_funcs;

drivers/gpu/drm/virtio/virtgpu_plane.c

608

drm_plane_helper_add(plane, funcs);

drivers/gpu/drm/virtio/virtgpu_prime.c

322

obj->funcs = &virtgpu_gem_dma_buf_funcs;

drivers/gpu/drm/virtio/virtgpu_vram.c

148

return bo->base.base.funcs == &virtio_gpu_vram_funcs;

drivers/gpu/drm/virtio/virtgpu_vram.c

208

obj->funcs = &virtio_gpu_vram_funcs;

drivers/gpu/drm/vkms/vkms_drv.c

142

dev->mode_config.funcs = &vkms_mode_funcs;

drivers/gpu/drm/vmwgfx/vmwgfx_blit.c

595

ret = dst->bdev->funcs->ttm_tt_populate(dst->bdev, dst->ttm, &ctx);

drivers/gpu/drm/vmwgfx/vmwgfx_blit.c

601

ret = src->bdev->funcs->ttm_tt_populate(src->bdev, src->ttm, &ctx);

drivers/gpu/drm/vmwgfx/vmwgfx_bo.c

465

(*p_bo)->tbo.base.funcs = &vmw_gem_object_funcs;

drivers/gpu/drm/vmwgfx/vmwgfx_gem.c

207

vbo->tbo.base.funcs = &vmw_gem_object_funcs;

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

1171

dev->mode_config.funcs = &vmw_kms_funcs;

drivers/gpu/drm/xe/xe_bo.c

2372

bo->ttm.base.funcs = &xe_gem_object_funcs;

drivers/gpu/drm/xe/xe_lrc.c

1277

const struct bo_setup *funcs;

drivers/gpu/drm/xe/xe_lrc.c

1300

ssize_t len = state->funcs[i].setup(state->lrc, state->hwe,

drivers/gpu/drm/xe/xe_lrc.c

1341

static const struct bo_setup funcs[] = {

drivers/gpu/drm/xe/xe_lrc.c

1354

.funcs = funcs,

drivers/gpu/drm/xe/xe_lrc.c

1355

.num_funcs = ARRAY_SIZE(funcs),

drivers/gpu/drm/xe/xe_lrc.c

1418

state.funcs = rcs_funcs;

drivers/gpu/drm/xe/xe_lrc.c

1421

state.funcs = xcs_funcs;

drivers/gpu/drm/xe/xe_lrc.c

1425

if (xe_gt_WARN_ON(lrc->gt, !state.funcs))

drivers/gpu/drm/xe/xe_mmio_gem.c

86

base->funcs = &xe_mmio_gem_funcs;

drivers/gpu/drm/xen/xen_drm_front_gem.c

124

xen_obj->base.funcs = &xen_drm_front_gem_object_funcs;

drivers/gpu/drm/xen/xen_drm_front_gem.c

66

vma->vm_ops = gem_obj->funcs->vm_ops;

drivers/gpu/drm/xen/xen_drm_front_kms.c

351

dev->mode_config.funcs = &mode_config_funcs;

drivers/gpu/drm/xlnx/zynqmp_kms.c

501

drm->mode_config.funcs = &zynqmp_dpsub_mode_config_funcs;

drivers/hid/i2c-hid/i2c-hid-core.c

1205

ihid->panel_follower.funcs = &i2c_hid_core_panel_follower_enable_funcs;

drivers/hid/i2c-hid/i2c-hid-core.c

1207

ihid->panel_follower.funcs = &i2c_hid_core_panel_follower_prepare_funcs;

drivers/i2c/i2c-dev.c

403

unsigned long funcs;

drivers/i2c/i2c-dev.c

439

funcs = i2c_get_functionality(client->adapter);

drivers/i2c/i2c-dev.c

440

return put_user(funcs, (unsigned long __user *)arg);

drivers/i2c/i2c-dev.c

534

unsigned long funcs;

drivers/i2c/i2c-dev.c

537

funcs = i2c_get_functionality(client->adapter);

drivers/i2c/i2c-dev.c

538

return put_user(funcs, (compat_ulong_t __user *)arg);

drivers/mmc/core/sdio.c

1214

int err, i, funcs;

drivers/mmc/core/sdio.c

1275

funcs = (ocr & 0x70000000) >> 28;

drivers/mmc/core/sdio.c

1281

for (i = 0; i < funcs; i++, card->sdio_funcs++) {

drivers/mmc/core/sdio.c

1304

for (i = 0;i < funcs;i++) {

drivers/net/ethernet/intel/ice/ice_common.c

2340

u8 funcs;

drivers/net/ethernet/intel/ice/ice_common.c

2343

funcs = hweight8(hw->dev_caps.common_cap.valid_functions &

drivers/net/ethernet/intel/ice/ice_common.c

2346

if (!funcs)

drivers/net/ethernet/intel/ice/ice_common.c

2349

return max / funcs;

drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c

779

u8 funcs = hweight8(hw->dev_caps.common_cap.valid_functions &

drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c

782

return funcs ? (max / funcs) : 0;

drivers/pci/controller/dwc/pcie-designware-ep.c

1230

u8 funcs = ep->epc->max_functions;

drivers/pci/controller/dwc/pcie-designware-ep.c

1236

for (func_no = 0; func_no < funcs; func_no++)

drivers/pci/controller/dwc/pcie-designware-ep.c

1248

if (funcs > 1) {

drivers/pci/controller/dwc/pcie-designware-ep.c

1254

for (func_no = 1; func_no < funcs; func_no++) {

drivers/pci/controller/dwc/pcie-designware-ep.c

64

u8 func_no, funcs;

drivers/pci/controller/dwc/pcie-designware-ep.c

66

funcs = pci->ep.epc->max_functions;

drivers/pci/controller/dwc/pcie-designware-ep.c

68

for (func_no = 0; func_no < funcs; func_no++)

drivers/pci/hotplug/acpiphp.h

83

struct list_head funcs; /* one slot may have different

drivers/pci/hotplug/acpiphp_glue.c

1014

list_for_each_entry(func, &slot->funcs, sibling)

drivers/pci/hotplug/acpiphp_glue.c

161

list_for_each_entry_safe(func, tmp, &slot->funcs, sibling)

drivers/pci/hotplug/acpiphp_glue.c

292

INIT_LIST_HEAD(&slot->funcs);

drivers/pci/hotplug/acpiphp_glue.c

330

list_add_tail(&newfunc->sibling, &slot->funcs);

drivers/pci/hotplug/acpiphp_glue.c

345

list_for_each_entry(func, &slot->funcs, sibling) {

drivers/pci/hotplug/acpiphp_glue.c

398

list_for_each_entry(func, &slot->funcs, sibling) {

drivers/pci/hotplug/acpiphp_glue.c

422

list_for_each_entry(func, &slot->funcs, sibling) {

drivers/pci/hotplug/acpiphp_glue.c

434

list_for_each_entry(func, &slot->funcs, sibling) {

drivers/pci/hotplug/acpiphp_glue.c

536

list_for_each_entry(func, &slot->funcs, sibling) {

drivers/pci/hotplug/acpiphp_glue.c

569

list_for_each_entry(func, &slot->funcs, sibling)

drivers/pci/hotplug/acpiphp_glue.c

605

list_for_each_entry(func, &slot->funcs, sibling) {

drivers/phy/tegra/xusb-tegra124.c

411

.funcs = tegra124_##_type##_functions, \

drivers/phy/tegra/xusb-tegra186.c

250

.funcs = tegra186_##_type##_functions, \

drivers/phy/tegra/xusb-tegra210.c

1739

.funcs = tegra210_##_type##_functions, \

drivers/phy/tegra/xusb-tegra210.c

2541

.funcs = tegra210_##_type##_functions, \

drivers/phy/tegra/xusb.c

126

err = match_string(lane->soc->funcs, lane->soc->num_funcs, function);

drivers/phy/tegra/xusb.c

394

const char *func = lane->soc->funcs[lane->function];

drivers/phy/tegra/xusb.h

38

const char * const *funcs;

drivers/pinctrl/actions/pinctrl-owl.c

175

if (g->funcs[id] == function)

drivers/pinctrl/actions/pinctrl-owl.h

212

unsigned int *funcs;

drivers/pinctrl/actions/pinctrl-owl.h

23

.funcs = group_name##_funcs, \

drivers/pinctrl/airoha/pinctrl-airoha.c

2999

func = &data->funcs[i];

drivers/pinctrl/airoha/pinctrl-airoha.c

3011

pinctrl->funcs = data->funcs;

drivers/pinctrl/airoha/pinctrl-airoha.c

3027

.funcs = en7581_pinctrl_funcs,

drivers/pinctrl/airoha/pinctrl-airoha.c

3058

.funcs = an7583_pinctrl_funcs,

drivers/pinctrl/airoha/pinctrl-airoha.c

397

const struct airoha_pinctrl_func *funcs;

drivers/pinctrl/airoha/pinctrl-airoha.c

411

const struct airoha_pinctrl_func *funcs;

drivers/pinctrl/aspeed/pinctrl-aspeed.c

165

const struct aspeed_sig_expr ***prios, **funcs, *expr;

drivers/pinctrl/aspeed/pinctrl-aspeed.c

169

while ((funcs = *prios)) {

drivers/pinctrl/aspeed/pinctrl-aspeed.c

170

while ((expr = *funcs)) {

drivers/pinctrl/aspeed/pinctrl-aspeed.c

188

funcs++;

drivers/pinctrl/aspeed/pinctrl-aspeed.c

237

const struct aspeed_sig_expr **funcs;

drivers/pinctrl/aspeed/pinctrl-aspeed.c

251

while ((funcs = *prios)) {

drivers/pinctrl/aspeed/pinctrl-aspeed.c

252

expr = aspeed_find_expr_by_name(funcs, pfunc->name);

drivers/pinctrl/aspeed/pinctrl-aspeed.c

257

ret = aspeed_disable_sig(&pdata->pinmux, funcs);

drivers/pinctrl/aspeed/pinctrl-aspeed.c

384

const struct aspeed_sig_expr ***prios, **funcs, *expr;

drivers/pinctrl/aspeed/pinctrl-aspeed.c

397

while ((funcs = *prios)) {

drivers/pinctrl/aspeed/pinctrl-aspeed.c

398

if (aspeed_gpio_in_exprs(funcs))

drivers/pinctrl/aspeed/pinctrl-aspeed.c

401

ret = aspeed_disable_sig(&pdata->pinmux, funcs);

drivers/pinctrl/aspeed/pinctrl-aspeed.c

408

if (!funcs) {

drivers/pinctrl/aspeed/pinctrl-aspeed.c

418

expr = *funcs;

drivers/pinctrl/bcm/pinctrl-bcm2835.c

825

struct property *pins, *funcs, *pulls;

drivers/pinctrl/bcm/pinctrl-bcm2835.c

843

funcs = of_find_property(np, "brcm,function", NULL);

drivers/pinctrl/bcm/pinctrl-bcm2835.c

846

if (!funcs && !pulls) {

drivers/pinctrl/bcm/pinctrl-bcm2835.c

854

num_funcs = funcs ? (funcs->length / 4) : 0;

drivers/pinctrl/bcm/pinctrl-brcmstb-bcm2712.c

23

.funcs = (u8[]) { \

drivers/pinctrl/bcm/pinctrl-brcmstb.c

100

pin_funcs = pc->pin_funcs[pin].funcs;

drivers/pinctrl/bcm/pinctrl-brcmstb.c

69

func = pc->pin_funcs[pin].funcs[fsel];

drivers/pinctrl/bcm/pinctrl-brcmstb.h

67

const u8 *funcs;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1108

struct lochnagar_func_groups *funcs;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1115

funcs = &priv->func_groups[i];

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1117

if (!funcs->ngroups)

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1120

funcs->groups = devm_kcalloc(priv->dev, funcs->ngroups,

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1121

sizeof(*funcs->groups),

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1123

if (!funcs->groups)

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1126

funcs->ngroups = 0;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1130

funcs = &priv->func_groups[priv->groups[i].type];

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1132

funcs->groups[funcs->ngroups++] = priv->groups[i].name;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1171

priv->funcs = lochnagar1_funcs;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1181

priv->funcs = lochnagar2_funcs;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

714

const struct lochnagar_func *funcs;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

776

return priv->funcs[func_idx].name;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

787

func_type = priv->funcs[func_idx].type;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

914

const struct lochnagar_func *func = &priv->funcs[func_idx];

drivers/pinctrl/mediatek/pinctrl-moore.c

644

const struct pinfunction *func = hw->soc->funcs + i;

drivers/pinctrl/mediatek/pinctrl-moore.h

37

.funcs = NULL, \

drivers/pinctrl/mediatek/pinctrl-mt7622.c

858

.funcs = mt7622_functions,

drivers/pinctrl/mediatek/pinctrl-mt7623.c

1381

.funcs = mt7623_functions,

drivers/pinctrl/mediatek/pinctrl-mt7629.c

414

.funcs = mt7629_functions,

drivers/pinctrl/mediatek/pinctrl-mt7981.c

1018

.funcs = mt7981_functions,

drivers/pinctrl/mediatek/pinctrl-mt7986.c

918

.funcs = mt7986_functions,

drivers/pinctrl/mediatek/pinctrl-mt7986.c

944

.funcs = mt7986_functions,

drivers/pinctrl/mediatek/pinctrl-mt7988.c

1504

.funcs = mt7988_functions,

drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c

272

if (desc->funcs && !desc->funcs[desc->eint.eint_m].name)

drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h

223

struct mtk_func_desc *funcs;

drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h

241

const struct pinfunction *funcs;

drivers/pinctrl/mediatek/pinctrl-paris.c

372

const struct mtk_func_desc *func = pin->funcs;

drivers/pinctrl/mediatek/pinctrl-paris.c

392

const struct mtk_func_desc *func = pin->funcs;

drivers/pinctrl/mediatek/pinctrl-paris.h

48

.funcs = (struct mtk_func_desc[]){ \

drivers/pinctrl/meson/pinctrl-amlogic-c3.c

1077

.funcs = c3_periphs_functions,

drivers/pinctrl/meson/pinctrl-amlogic-t7.c

1580

.funcs = t7_periphs_functions,

drivers/pinctrl/meson/pinctrl-meson-a1.c

910

.funcs = meson_a1_periphs_functions,

drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c

85

const struct meson_pmx_func *func = &pc->data->funcs[func_num];

drivers/pinctrl/meson/pinctrl-meson-axg.c

1047

.funcs = meson_axg_periphs_functions,

drivers/pinctrl/meson/pinctrl-meson-axg.c

1061

.funcs = meson_axg_aobus_functions,

drivers/pinctrl/meson/pinctrl-meson-g12a.c

1406

.funcs = meson_g12a_periphs_functions,

drivers/pinctrl/meson/pinctrl-meson-g12a.c

1420

.funcs = meson_g12a_aobus_functions,

drivers/pinctrl/meson/pinctrl-meson-gxbb.c

869

.funcs = meson_gxbb_periphs_functions,

drivers/pinctrl/meson/pinctrl-meson-gxbb.c

882

.funcs = meson_gxbb_aobus_functions,

drivers/pinctrl/meson/pinctrl-meson-gxl.c

840

.funcs = meson_gxl_periphs_functions,

drivers/pinctrl/meson/pinctrl-meson-gxl.c

853

.funcs = meson_gxl_aobus_functions,

drivers/pinctrl/meson/pinctrl-meson-s4.c

1204

.funcs = meson_s4_periphs_functions,

drivers/pinctrl/meson/pinctrl-meson.c

163

return pc->data->funcs[selector].name;

drivers/pinctrl/meson/pinctrl-meson.c

173

*groups = pc->data->funcs[selector].groups;

drivers/pinctrl/meson/pinctrl-meson.c

174

*num_groups = pc->data->funcs[selector].num_groups;

drivers/pinctrl/meson/pinctrl-meson.h

114

const struct meson_pmx_func *funcs;

drivers/pinctrl/meson/pinctrl-meson8-pmx.c

60

const struct meson_pmx_func *func = &pc->data->funcs[func_num];

drivers/pinctrl/meson/pinctrl-meson8.c

1086

.funcs = meson8_cbus_functions,

drivers/pinctrl/meson/pinctrl-meson8.c

1099

.funcs = meson8_aobus_functions,

drivers/pinctrl/meson/pinctrl-meson8b.c

950

.funcs = meson8b_cbus_functions,

drivers/pinctrl/meson/pinctrl-meson8b.c

963

.funcs = meson8b_aobus_functions,

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

1000

if (!info->funcs)

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

108

struct armada_37xx_pmx_func *funcs;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

120

.funcs = {"gpio"} \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

130

.funcs = {_func1, "gpio"} \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

140

.funcs = {_func1, "gpio"} \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

150

.funcs = {_f1, _f2, "gpio"} \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

163

.funcs = {_f1, _f2} \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

327

return info->funcs[selector].name;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

337

*groups = info->funcs[selector].groups;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

338

*num_groups = info->funcs[selector].ngroups;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

355

func = match_string(grp->funcs, NB_FUNCS, name);

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

371

const char *name = info->funcs[selector].name;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

68

const char *funcs[NB_FUNCS];

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

841

static int armada_37xx_add_function(struct armada_37xx_pmx_func *funcs,

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

847

while (funcs->ngroups) {

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

849

if (strcmp(funcs->name, name) == 0) {

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

850

funcs->ngroups++;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

854

funcs++;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

858

funcs->name = name;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

859

funcs->ngroups = 1;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

895

for (f = 0; (f < NB_FUNCS) && grp->funcs[f]; f++) {

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

898

ret = armada_37xx_add_function(info->funcs, &funcsize,

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

899

grp->funcs[f]);

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

926

struct armada_37xx_pmx_func *funcs = info->funcs;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

931

const char *name = funcs[n].name;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

935

funcs[n].groups = devm_kcalloc(dev, funcs[n].ngroups,

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

936

sizeof(*(funcs[n].groups)),

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

938

if (!funcs[n].groups)

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

941

groups = funcs[n].groups;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

947

f = match_string(gp->funcs, NB_FUNCS, name);

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

999

info->funcs = devm_kcalloc(dev, pin_data->nr_pins, sizeof(*info->funcs), GFP_KERNEL);

drivers/pinctrl/mvebu/pinctrl-mvebu.c

478

static int _add_function(struct mvebu_pinctrl_function *funcs, int *funcsize,

drivers/pinctrl/mvebu/pinctrl-mvebu.c

484

while (funcs->num_groups) {

drivers/pinctrl/mvebu/pinctrl-mvebu.c

486

if (strcmp(funcs->name, name) == 0) {

drivers/pinctrl/mvebu/pinctrl-mvebu.c

487

funcs->num_groups++;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

490

funcs++;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

494

funcs->name = name;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

495

funcs->num_groups = 1;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

504

struct mvebu_pinctrl_function *funcs;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

510

funcs = devm_kcalloc(&pdev->dev,

drivers/pinctrl/mvebu/pinctrl-mvebu.c

513

if (!funcs)

drivers/pinctrl/mvebu/pinctrl-mvebu.c

527

ret = _add_function(funcs, &funcsize,

drivers/pinctrl/mvebu/pinctrl-mvebu.c

541

pctl->functions = funcs;

drivers/pinctrl/pinctrl-amdisp.h

74

unsigned int *funcs;

drivers/pinctrl/pinctrl-amdisp.h

84

.funcs = (int[]){ \

drivers/pinctrl/pinctrl-axp209.c

246

return ARRAY_SIZE(pctl->funcs);

drivers/pinctrl/pinctrl-axp209.c

254

return pctl->funcs[selector].name;

drivers/pinctrl/pinctrl-axp209.c

264

*groups = pctl->funcs[selector].groups;

drivers/pinctrl/pinctrl-axp209.c

265

*num_groups = pctl->funcs[selector].ngroups;

drivers/pinctrl/pinctrl-axp209.c

279

pctl->funcs[function].muxval);

drivers/pinctrl/pinctrl-axp209.c

298

return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval);

drivers/pinctrl/pinctrl-axp209.c

309

pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval);

drivers/pinctrl/pinctrl-axp209.c

312

pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval);

drivers/pinctrl/pinctrl-axp209.c

390

pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out";

drivers/pinctrl/pinctrl-axp209.c

391

pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT;

drivers/pinctrl/pinctrl-axp209.c

392

pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in";

drivers/pinctrl/pinctrl-axp209.c

393

pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN;

drivers/pinctrl/pinctrl-axp209.c

394

pctl->funcs[AXP20X_FUNC_LDO].name = "ldo";

drivers/pinctrl/pinctrl-axp209.c

399

pctl->funcs[AXP20X_FUNC_ADC].name = "adc";

drivers/pinctrl/pinctrl-axp209.c

400

pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux;

drivers/pinctrl/pinctrl-axp209.c

404

pctl->funcs[i].ngroups = npins;

drivers/pinctrl/pinctrl-axp209.c

405

pctl->funcs[i].groups = devm_kcalloc(&pdev->dev,

drivers/pinctrl/pinctrl-axp209.c

408

if (!pctl->funcs[i].groups)

drivers/pinctrl/pinctrl-axp209.c

411

pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name;

drivers/pinctrl/pinctrl-axp209.c

415

npins, &pctl->funcs[AXP20X_FUNC_LDO],

drivers/pinctrl/pinctrl-axp209.c

421

npins, &pctl->funcs[AXP20X_FUNC_ADC],

drivers/pinctrl/pinctrl-axp209.c

73

struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB];

drivers/pinctrl/pinctrl-bm1880.c

1326

pctrl->funcs = bm1880_pmux_functions;

drivers/pinctrl/pinctrl-bm1880.c

39

const struct bm1880_pinmux_function *funcs;

drivers/pinctrl/pinctrl-bm1880.c

968

return pctrl->funcs[selector].name;

drivers/pinctrl/pinctrl-bm1880.c

978

*groups = pctrl->funcs[selector].groups;

drivers/pinctrl/pinctrl-bm1880.c

979

*num_groups = pctrl->funcs[selector].ngroups;

drivers/pinctrl/pinctrl-bm1880.c

989

const struct bm1880_pinmux_function *func = &pctrl->funcs[function];

drivers/pinctrl/pinctrl-equilibrium.c

585

static bool is_func_exist(struct pinfunction *funcs, const char *name,

drivers/pinctrl/pinctrl-equilibrium.c

590

if (!funcs)

drivers/pinctrl/pinctrl-equilibrium.c

594

if (funcs[i].name && !strcmp(funcs[i].name, name)) {

drivers/pinctrl/pinctrl-equilibrium.c

603

static int funcs_utils(struct device *dev, struct pinfunction *funcs,

drivers/pinctrl/pinctrl-equilibrium.c

628

if (!is_func_exist(funcs, fn_name, *nr_funcs, &fid))

drivers/pinctrl/pinctrl-equilibrium.c

633

if (!is_func_exist(funcs, fn_name, *nr_funcs, &fid))

drivers/pinctrl/pinctrl-equilibrium.c

634

funcs[i].name = fn_name;

drivers/pinctrl/pinctrl-equilibrium.c

638

if (is_func_exist(funcs, fn_name, *nr_funcs, &fid))

drivers/pinctrl/pinctrl-equilibrium.c

639

funcs[fid].ngroups++;

drivers/pinctrl/pinctrl-equilibrium.c

643

if (is_func_exist(funcs, fn_name, *nr_funcs, &fid)) {

drivers/pinctrl/pinctrl-equilibrium.c

644

groups = (const char **)funcs[fid].groups;

drivers/pinctrl/pinctrl-equilibrium.c

645

for (j = 0; j < funcs[fid].ngroups; j++)

drivers/pinctrl/pinctrl-equilibrium.c

664

struct pinfunction *funcs = NULL;

drivers/pinctrl/pinctrl-equilibrium.c

668

ret = funcs_utils(dev, funcs, &nr_funcs, OP_COUNT_NR_FUNCS);

drivers/pinctrl/pinctrl-equilibrium.c

672

funcs = devm_kcalloc(dev, nr_funcs, sizeof(*funcs), GFP_KERNEL);

drivers/pinctrl/pinctrl-equilibrium.c

673

if (!funcs)

drivers/pinctrl/pinctrl-equilibrium.c

676

ret = funcs_utils(dev, funcs, &nr_funcs, OP_ADD_FUNCS);

drivers/pinctrl/pinctrl-equilibrium.c

680

ret = funcs_utils(dev, funcs, &nr_funcs, OP_COUNT_NR_FUNC_GRPS);

drivers/pinctrl/pinctrl-equilibrium.c

685

if (!funcs[i].ngroups)

drivers/pinctrl/pinctrl-equilibrium.c

687

funcs[i].groups = devm_kcalloc(dev, funcs[i].ngroups,

drivers/pinctrl/pinctrl-equilibrium.c

688

sizeof(*(funcs[i].groups)),

drivers/pinctrl/pinctrl-equilibrium.c

690

if (!funcs[i].groups)

drivers/pinctrl/pinctrl-equilibrium.c

694

ret = funcs_utils(dev, funcs, &nr_funcs, OP_ADD_FUNC_GRPS);

drivers/pinctrl/pinctrl-equilibrium.c

701

if (funcs[i].name == NULL)

drivers/pinctrl/pinctrl-equilibrium.c

705

&funcs[i], drvdata);

drivers/pinctrl/pinctrl-equilibrium.c

708

funcs[i].name);

drivers/pinctrl/pinctrl-falcon.c

485

falcon_info.funcs = falcon_funcs;

drivers/pinctrl/pinctrl-ingenic.c

86

#define INGENIC_PIN_GROUP_FUNCS(_name_, id, funcs) \

drivers/pinctrl/pinctrl-ingenic.c

89

.data = funcs, \

drivers/pinctrl/pinctrl-lantiq.c

196

return info->funcs[selector].name;

drivers/pinctrl/pinctrl-lantiq.c

206

*groups = info->funcs[func].groups;

drivers/pinctrl/pinctrl-lantiq.c

207

*num_groups = info->funcs[func].num_groups;

drivers/pinctrl/pinctrl-lantiq.h

88

const struct ltq_pmx_func *funcs;

drivers/pinctrl/pinctrl-rp1.c

1045

static enum funcs rp1_get_fsel_func(unsigned int pin, unsigned int fsel)

drivers/pinctrl/pinctrl-rp1.c

1049

return rp1_gpio_pin_funcs[pin].funcs[fsel];

drivers/pinctrl/pinctrl-rp1.c

1082

enum funcs func = rp1_get_fsel_func(offset, fsel);

drivers/pinctrl/pinctrl-rp1.c

1110

enum funcs func;

drivers/pinctrl/pinctrl-rp1.c

1181

struct property *pins, *funcs, *pulls;

drivers/pinctrl/pinctrl-rp1.c

1197

funcs = of_find_property(np, "brcm,function", NULL);

drivers/pinctrl/pinctrl-rp1.c

1198

if (!funcs)

drivers/pinctrl/pinctrl-rp1.c

1205

if (!function && !funcs && !num_configs && !pulls) {

drivers/pinctrl/pinctrl-rp1.c

1213

num_funcs = funcs ? (funcs->length / 4) : 0;

drivers/pinctrl/pinctrl-rp1.c

1355

pin_funcs = rp1_gpio_pin_funcs[pin->num].funcs;

drivers/pinctrl/pinctrl-rp1.c

150

.funcs = { \

drivers/pinctrl/pinctrl-rp1.c

240

u8 funcs[RP1_FSEL_COUNT];

drivers/pinctrl/pinctrl-tps6594.c

309

const struct tps6594_pinctrl_function *funcs;

drivers/pinctrl/pinctrl-tps6594.c

319

.funcs = tps652g1_pinctrl_functions,

drivers/pinctrl/pinctrl-tps6594.c

329

.funcs = tps65224_pinctrl_functions,

drivers/pinctrl/pinctrl-tps6594.c

339

.funcs = pinctrl_functions,

drivers/pinctrl/pinctrl-tps6594.c

382

return pinctrl->funcs[selector].pinfunction.name;

drivers/pinctrl/pinctrl-tps6594.c

392

*groups = pinctrl->funcs[selector].pinfunction.groups;

drivers/pinctrl/pinctrl-tps6594.c

393

*num_groups = pinctrl->funcs[selector].pinfunction.ngroups;

drivers/pinctrl/pinctrl-tps6594.c

418

u8 muxval = pinctrl->funcs[function].muxval;

drivers/pinctrl/pinctrl-tps6594.c

437

u8 muxval = pinctrl->funcs[TPS6594_PINCTRL_GPIO_FUNCTION].muxval;

drivers/pinctrl/pinctrl-upboard.c

326

.funcs = &upboard_up_pin_functions[0],

drivers/pinctrl/pinctrl-upboard.c

57

const struct pinfunction *funcs;

drivers/pinctrl/pinctrl-upboard.c

624

.funcs = &upboard_up2_pin_functions[0],

drivers/pinctrl/pinctrl-upboard.c

886

const struct pinfunction *funcs = pctrl->pctrl_data->funcs;

drivers/pinctrl/pinctrl-upboard.c

892

ret = pinmux_generic_add_function(pctrl->pctldev, funcs[i].name,

drivers/pinctrl/pinctrl-upboard.c

893

funcs[i].groups, funcs[i].ngroups, NULL);

drivers/pinctrl/pinctrl-xway.c

1371

const struct ltq_pmx_func *funcs;

drivers/pinctrl/pinctrl-xway.c

1383

.funcs = ase_funcs,

drivers/pinctrl/pinctrl-xway.c

1395

.funcs = danube_funcs,

drivers/pinctrl/pinctrl-xway.c

1407

.funcs = xrx100_funcs,

drivers/pinctrl/pinctrl-xway.c

1419

.funcs = xrx200_funcs,

drivers/pinctrl/pinctrl-xway.c

1431

.funcs = xrx300_funcs,

drivers/pinctrl/pinctrl-xway.c

1496

xway_info.funcs = xway_soc->funcs;

drivers/pinctrl/pinctrl-zynq.c

1187

pctrl->funcs = zynq_pmux_functions;

drivers/pinctrl/pinctrl-zynq.c

47

const struct zynq_pinmux_function *funcs;

drivers/pinctrl/pinctrl-zynq.c

874

return pctrl->funcs[selector].name;

drivers/pinctrl/pinctrl-zynq.c

884

*groups = pctrl->funcs[selector].groups;

drivers/pinctrl/pinctrl-zynq.c

885

*num_groups = pctrl->funcs[selector].ngroups;

drivers/pinctrl/pinctrl-zynq.c

896

const struct zynq_pinmux_function *func = &pctrl->funcs[function];

drivers/pinctrl/pinctrl-zynqmp.c

174

return pctrl->funcs[selector].name;

drivers/pinctrl/pinctrl-zynqmp.c

195

*groups = pctrl->funcs[selector].groups;

drivers/pinctrl/pinctrl-zynqmp.c

196

*num_groups = pctrl->funcs[selector].ngroups;

drivers/pinctrl/pinctrl-zynqmp.c

785

struct zynqmp_pmux_function *funcs;

drivers/pinctrl/pinctrl-zynqmp.c

793

funcs = devm_kcalloc(dev, pctrl->nfuncs, sizeof(*funcs), GFP_KERNEL);

drivers/pinctrl/pinctrl-zynqmp.c

794

if (!funcs)

drivers/pinctrl/pinctrl-zynqmp.c

798

zynqmp_pinctrl_get_function_name(i, funcs[i].name);

drivers/pinctrl/pinctrl-zynqmp.c

800

ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups);

drivers/pinctrl/pinctrl-zynqmp.c

804

pctrl->ngroups += funcs[i].ngroups;

drivers/pinctrl/pinctrl-zynqmp.c

816

ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i],

drivers/pinctrl/pinctrl-zynqmp.c

822

pctrl->funcs = funcs;

drivers/pinctrl/pinctrl-zynqmp.c

85

const struct zynqmp_pmux_function *funcs;

drivers/pinctrl/pxa/pinctrl-pxa2xx.h

17

#define PXA_PIN(_pin, funcs...) \

drivers/pinctrl/pxa/pinctrl-pxa2xx.h

21

funcs, { } }, \

drivers/pinctrl/pxa/pinctrl-pxa2xx.h

24

#define PXA_GPIO_PIN(_pin, funcs...) \

drivers/pinctrl/pxa/pinctrl-pxa2xx.h

30

funcs, { } }, \

drivers/pinctrl/qcom/pinctrl-apq8064.c

216

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-apq8084.c

331

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-eliza.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-glymur.c

40

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-hawi.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq4019.c

223

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq5018.c

17

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq5210.c

36

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq5332.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq5424.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq6018.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq8064.c

168

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq8074.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq9574.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-ipq9650.c

36

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-kaanapali.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.c

127

if (g->funcs[i] == function)

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

106

unsigned int *funcs;

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

52

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

68

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-lpass-lpi.h

84

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-mdm9607.c

211

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-mdm9615.c

202

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-milos.c

20

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm.c

188

if (g->funcs[i] == function)

drivers/pinctrl/qcom/pinctrl-msm.c

275

return msm_pinmux_set_mux(pctldev, g->funcs[pctrl->soc->gpio_func], offset);

drivers/pinctrl/qcom/pinctrl-msm.h

92

unsigned *funcs;

drivers/pinctrl/qcom/pinctrl-msm8226.c

270

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8660.c

382

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8909.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8916.c

293

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8917.c

319

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8953.c

15

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8960.c

341

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8976.c

21

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8994.c

17

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8996.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8998.c

21

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8x74.c

332

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-msm8x74.c

393

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-nord.c

40

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-qcm2290.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-qcs404.c

29

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-qcs615.c

29

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-qcs8300.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

21

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sa8775p.c

20

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sar2130p.c

20

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sc7180.c

27

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sc7280.c

17

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sc8180x.c

46

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sc8280xp.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sdm660.c

32

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sdm670.c

23

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sdm845.c

22

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sdx55.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sdx65.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sdx75.c

38

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-shikra.c

18

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm4450.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm6115.c

29

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm6125.c

26

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm6350.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm6375.c

20

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm7150.c

33

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm8150.c

29

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm8250.c

30

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm8350.c

20

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm8450.c

20

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm8550.c

21

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm8650.c

21

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-sm8750.c

19

.funcs = (int[]){ \

drivers/pinctrl/qcom/pinctrl-x1e80100.c

19

.funcs = (int[]){ \

drivers/pinctrl/tegra/pinctrl-tegra-xusb.c

306

if (lane->funcs[i] == function)

drivers/pinctrl/tegra/pinctrl-tegra-xusb.c

76

const unsigned int *funcs;

drivers/pinctrl/tegra/pinctrl-tegra-xusb.c

831

.funcs = tegra124_##_funcs##_functions, \

drivers/pinctrl/tegra/pinctrl-tegra.c

265

for (i = 0; i < ARRAY_SIZE(g->funcs); i++) {

drivers/pinctrl/tegra/pinctrl-tegra.c

266

if (g->funcs[i] == function)

drivers/pinctrl/tegra/pinctrl-tegra.c

269

if (WARN_ON(i == ARRAY_SIZE(g->funcs)))

drivers/pinctrl/tegra/pinctrl-tegra.c

693

val = g->funcs[(val >> g->mux_bit) & 0x3];

drivers/pinctrl/tegra/pinctrl-tegra.c

874

if (g->funcs[gfn] == fn)

drivers/pinctrl/tegra/pinctrl-tegra.h

151

u8 funcs[4];

drivers/pinctrl/tegra/pinctrl-tegra114.c

1552

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra124.c

1721

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra124.c

1782

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra186.c

1646

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra194.c

1577

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra20.c

1974

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra210.c

1282

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra234.c

1620

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra238.c

1807

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra264.c

1925

.funcs = { \

drivers/pinctrl/tegra/pinctrl-tegra30.c

2113

.funcs = { \

drivers/pinctrl/vt8500/pinctrl-wmt.c

301

struct property *pins, *funcs, *pulls;

drivers/pinctrl/vt8500/pinctrl-wmt.c

313

funcs = of_find_property(np, "wm,function", NULL);

drivers/pinctrl/vt8500/pinctrl-wmt.c

316

if (!funcs && !pulls) {

drivers/pinctrl/vt8500/pinctrl-wmt.c

326

num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0;

drivers/platform/surface/aggregator/controller.c

1028

static int ssam_dsm_get_functions(acpi_handle handle, u64 *funcs)

drivers/platform/surface/aggregator/controller.c

1034

*funcs = 0;

drivers/platform/surface/aggregator/controller.c

1057

*funcs = mask;

drivers/platform/surface/aggregator/controller.c

1063

static int ssam_dsm_load_u32(acpi_handle handle, u64 funcs, u64 func, u32 *ret)

drivers/platform/surface/aggregator/controller.c

1068

if (!(funcs & BIT_ULL(func)))

drivers/platform/surface/aggregator/controller.c

1104

u64 funcs;

drivers/platform/surface/aggregator/controller.c

1108

status = ssam_dsm_get_functions(handle, &funcs);

drivers/platform/surface/aggregator/controller.c

1113

status = ssam_dsm_load_u32(handle, funcs, SSH_DSM_FN_SSH_POWER_PROFILE,

drivers/platform/surface/aggregator/controller.c

1118

status = ssam_dsm_load_u32(handle, funcs,

drivers/platform/surface/aggregator/controller.c

1124

status = ssam_dsm_load_u32(handle, funcs,

drivers/platform/surface/aggregator/controller.c

1130

status = ssam_dsm_load_u32(handle, funcs, SSH_DSM_FN_D3_CLOSES_HANDLE,

drivers/platform/surface/aggregator/controller.c

1137

status = ssam_dsm_load_u32(handle, funcs, SSH_DSM_FN_SSH_BUFFER_SIZE,

drivers/usb/gadget/legacy/hid.c

138

int status, funcs;

drivers/usb/gadget/legacy/hid.c

140

funcs = list_count_nodes(&hidg_func_list);

drivers/usb/gadget/legacy/hid.c

141

if (!funcs)

drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c

102

const u32 funcs[] = {

drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c

108

for (i = 0; i < ARRAY_SIZE(funcs); ++i) {

drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c

109

if (!kvm_arm_hyp_service_available(funcs[i]))

include/acpi/acpi_bus.h

58

bool acpi_check_dsm(acpi_handle handle, const guid_t *guid, u64 rev, u64 funcs);

include/drm/display/drm_dp_mst_helper.h

1010

if (objs_state->ptr->funcs != &drm_dp_mst_topology_state_funcs)

include/drm/display/drm_dp_mst_helper.h

747

const struct drm_private_state_funcs *funcs;

include/drm/display/drm_hdmi_audio_helper.h

15

const struct drm_connector_hdmi_audio_funcs *funcs,

include/drm/display/drm_hdmi_cec_helper.h

43

const struct drm_connector_hdmi_cec_funcs *funcs,

include/drm/drm_atomic.h

381

const struct drm_private_state_funcs *funcs;

include/drm/drm_atomic.h

741

const struct drm_private_state_funcs *funcs);

include/drm/drm_bridge.h

1120

const struct drm_bridge_funcs *funcs;

include/drm/drm_bridge.h

1300

const struct drm_bridge_funcs *funcs);

include/drm/drm_bridge.h

1316

#define devm_drm_bridge_alloc(dev, type, member, funcs) \

include/drm/drm_bridge.h

1318

offsetof(type, member), funcs))

include/drm/drm_bridge.h

1374

if (!bridge->funcs || !bridge->funcs->atomic_reset)

include/drm/drm_client.h

123

const struct drm_client_funcs *funcs;

include/drm/drm_client.h

165

const char *name, const struct drm_client_funcs *funcs);

include/drm/drm_colorop.h

377

const struct drm_colorop_funcs *funcs;

include/drm/drm_colorop.h

406

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

include/drm/drm_colorop.h

410

const struct drm_colorop_funcs *funcs,

include/drm/drm_colorop.h

415

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

include/drm/drm_colorop.h

418

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

include/drm/drm_colorop.h

421

struct drm_plane *plane, const struct drm_colorop_funcs *funcs,

include/drm/drm_connector.h

1876

const struct drm_connector_hdmi_audio_funcs *funcs;

include/drm/drm_connector.h

1950

const struct drm_connector_hdmi_funcs *funcs;

include/drm/drm_connector.h

1982

const struct drm_connector_cec_funcs *funcs;

include/drm/drm_connector.h

2129

const struct drm_connector_funcs *funcs;

include/drm/drm_connector.h

2419

const struct drm_connector_funcs *funcs,

include/drm/drm_connector.h

2423

const struct drm_connector_funcs *funcs,

include/drm/drm_connector.h

2428

const struct drm_connector_funcs *funcs,

include/drm/drm_connector.h

2433

const struct drm_connector_funcs *funcs,

include/drm/drm_connector.h

2439

const struct drm_connector_funcs *funcs,

include/drm/drm_crtc.h

1082

const struct drm_crtc_funcs *funcs;

include/drm/drm_crtc.h

1241

const struct drm_crtc_funcs *funcs,

include/drm/drm_crtc.h

1249

const struct drm_crtc_funcs *funcs,

include/drm/drm_crtc.h

1259

const struct drm_crtc_funcs *funcs,

include/drm/drm_crtc.h

1281

#define drmm_crtc_alloc_with_planes(dev, type, member, primary, cursor, funcs, name, ...) \

include/drm/drm_crtc.h

1284

primary, cursor, funcs, \

include/drm/drm_drv.h

564

(dev->mode_config.funcs && dev->mode_config.funcs->atomic_commit != NULL);

include/drm/drm_encoder.h

196

const struct drm_encoder_funcs *funcs;

include/drm/drm_encoder.h

212

const struct drm_encoder_funcs *funcs,

include/drm/drm_encoder.h

218

const struct drm_encoder_funcs *funcs,

include/drm/drm_encoder.h

224

const struct drm_encoder_funcs *funcs,

include/drm/drm_encoder.h

246

#define drmm_encoder_alloc(dev, type, member, funcs, encoder_type, name, ...) \

include/drm/drm_encoder.h

248

offsetof(type, member), funcs, \

include/drm/drm_encoder.h

264

#define drmm_plain_encoder_alloc(dev, funcs, encoder_type, name, ...) \

include/drm/drm_encoder.h

267

0, funcs, encoder_type, name, ##__VA_ARGS__))

include/drm/drm_fb_helper.h

149

const struct drm_fb_helper_funcs *funcs;

include/drm/drm_fb_helper.h

237

const struct drm_fb_helper_funcs *funcs);

include/drm/drm_framebuffer.h

148

const struct drm_framebuffer_funcs *funcs;

include/drm/drm_framebuffer.h

215

const struct drm_framebuffer_funcs *funcs);

include/drm/drm_gem.h

437

const struct drm_gem_object_funcs *funcs;

include/drm/drm_gem_framebuffer_helper.h

30

const struct drm_framebuffer_funcs *funcs);

include/drm/drm_gem_framebuffer_helper.h

35

const struct drm_framebuffer_funcs *funcs);

include/drm/drm_kunit_helpers.h

108

const struct drm_plane_funcs *funcs,

include/drm/drm_kunit_helpers.h

119

const struct drm_crtc_funcs *funcs,

include/drm/drm_mode_config.h

556

const struct drm_mode_config_funcs *funcs;

include/drm/drm_modeset_helper.h

41

const struct drm_crtc_funcs *funcs);

include/drm/drm_modeset_helper_vtables.h

1179

const struct drm_connector_helper_funcs *funcs)

include/drm/drm_modeset_helper_vtables.h

1181

connector->helper_private = funcs;

include/drm/drm_modeset_helper_vtables.h

1487

const struct drm_plane_helper_funcs *funcs)

include/drm/drm_modeset_helper_vtables.h

1489

plane->helper_private = funcs;

include/drm/drm_modeset_helper_vtables.h

490

const struct drm_crtc_helper_funcs *funcs)

include/drm/drm_modeset_helper_vtables.h

492

crtc->helper_private = funcs;

include/drm/drm_modeset_helper_vtables.h

839

const struct drm_encoder_helper_funcs *funcs)

include/drm/drm_modeset_helper_vtables.h

841

encoder->helper_private = funcs;

include/drm/drm_panel.h

185

const struct drm_panel_follower_funcs *funcs;

include/drm/drm_panel.h

229

const struct drm_panel_funcs *funcs;

include/drm/drm_panel.h

298

const struct drm_panel_funcs *funcs,

include/drm/drm_panel.h

318

#define devm_drm_panel_alloc(dev, type, member, funcs, connector_type) \

include/drm/drm_panel.h

320

offsetof(type, member), funcs, \

include/drm/drm_plane.h

718

const struct drm_plane_funcs *funcs;

include/drm/drm_plane.h

830

const struct drm_plane_funcs *funcs,

include/drm/drm_plane.h

842

const struct drm_plane_funcs *funcs,

include/drm/drm_plane.h

875

#define drmm_universal_plane_alloc(dev, type, member, possible_crtcs, funcs, formats, \

include/drm/drm_plane.h

879

possible_crtcs, funcs, formats, \

include/drm/drm_plane.h

887

const struct drm_plane_funcs *funcs,

include/drm/drm_plane.h

919

#define drm_universal_plane_alloc(dev, type, member, possible_crtcs, funcs, formats, \

include/drm/drm_plane.h

923

possible_crtcs, funcs, formats, \

include/drm/drm_simple_kms_helper.h

58

const struct drm_simple_display_pipe_funcs *funcs;

include/drm/drm_simple_kms_helper.h

66

const struct drm_simple_display_pipe_funcs *funcs,

include/drm/ttm/ttm_device.h

232

const struct ttm_device_funcs *funcs;

include/drm/ttm/ttm_device.h

298

int ttm_device_init(struct ttm_device *bdev, const struct ttm_device_funcs *funcs,

include/linux/acpi.h

1007

u64 rev, u64 funcs)

include/linux/bpf.h

1521

int arch_prepare_bpf_dispatcher(void *image, void *buf, s64 *funcs, int num_funcs);

include/linux/livepatch.h

153

for (obj = patch->objs; obj->funcs || obj->name; obj++)

include/linux/livepatch.h

162

for (func = obj->funcs; \

include/linux/livepatch.h

97

struct klp_func *funcs;

include/linux/livepatch_external.h

71

struct klp_func_ext *funcs;

include/linux/syscalls.h

154

.event.funcs = &enter_syscall_print_funcs, \

include/linux/syscalls.h

170

.event.funcs = &exit_syscall_print_funcs, \

include/linux/tracepoint-defs.h

46

struct tracepoint_func __rcu *funcs;

include/linux/tracepoint.h

224

rcu_dereference_raw((&__tracepoint_##name)->funcs); \

include/linux/tracepoint.h

379

.funcs = NULL, \

include/linux/tracepoint.h

389

rcu_dereference_raw((&__tracepoint_##_name)->funcs); \

include/trace/trace_custom_events.h

205

.event.funcs = &trace_custom_event_type_funcs_##template, \

include/trace/trace_events.h

499

.event.funcs = &trace_event_type_funcs_##template, \

include/trace/trace_events.h

516

.event.funcs = &trace_event_type_funcs_##call, \

kernel/bpf/dispatcher.c

89

int __weak arch_prepare_bpf_dispatcher(void *image, void *buf, s64 *funcs, int num_funcs)

kernel/livepatch/core.c

1117

if (!obj->funcs)

kernel/trace/blktrace.c

1834

.funcs = &trace_blk_event_funcs,

kernel/trace/bpf_trace.c

2672

const char **funcs;

kernel/trace/bpf_trace.c

2687

cookie_a = data->cookies + (name_a - data->funcs);

kernel/trace/bpf_trace.c

2688

cookie_b = data->cookies + (name_b - data->funcs);

kernel/trace/bpf_trace.c

2859

data.funcs = us.syms;

kernel/trace/ftrace.c

7761

struct list_head funcs;

kernel/trace/ftrace.c

7895

list_for_each_entry_safe(mod_func, n, &mod_map->funcs, list) {

kernel/trace/ftrace.c

8101

list_add_rcu(&mod_func->list, &mod_map->funcs);

kernel/trace/ftrace.c

8122

INIT_LIST_HEAD_RCU(&mod_map->funcs);

kernel/trace/ftrace.c

8137

list_for_each_entry_rcu(mod_func, &mod_map->funcs, list) {

kernel/trace/ftrace.c

8197

list_for_each_entry_rcu(mod_func, &mod_map->funcs, list) {

kernel/trace/trace.c

1957

if (!event_call || !event_call->event.funcs ||

kernel/trace/trace.c

1958

!event_call->event.funcs->trace)

kernel/trace/trace.c

1972

event_call->event.funcs->trace(iter, 0, event);

kernel/trace/trace.c

3020

return (event->funcs == &enter_syscall_print_funcs) ||

kernel/trace/trace.c

3021

(event->funcs == &exit_syscall_print_funcs);

kernel/trace/trace.c

3071

return event->funcs->trace(iter, sym_flags, event);

kernel/trace/trace.c

3097

return event->funcs->raw(iter, 0, event);

kernel/trace/trace.c

3124

enum print_line_t ret = event->funcs->hex(iter, 0, event);

kernel/trace/trace.c

3152

return event ? event->funcs->binary(iter, 0, event) :

kernel/trace/trace_branch.c

164

.funcs = &trace_branch_funcs,

kernel/trace/trace_eprobe.c

762

call->event.funcs = &eprobe_funcs;

kernel/trace/trace_events.c

3267

if (call->event.funcs)

kernel/trace/trace_events_hist.c

842

probe_func_ptr = rcu_dereference_sched((tp)->funcs);

kernel/trace/trace_events_synth.c

975

call->event.funcs = &synth_event_funcs;

kernel/trace/trace_events_user.c

1700

probe_func_ptr = rcu_dereference_sched(tp->funcs);

kernel/trace/trace_events_user.c

2165

user->call.event.funcs = &user_event_funcs;

kernel/trace/trace_events_user.c

2312

probe_func_ptr = rcu_dereference_sched(tp->funcs);

kernel/trace/trace_fprobe.c

744

call->event.funcs = &fexit_funcs;

kernel/trace/trace_fprobe.c

747

call->event.funcs = &fentry_funcs;

kernel/trace/trace_functions_graph.c

1418

ret = event->funcs->trace(iter, sym_flags, event);

kernel/trace/trace_functions_graph.c

1727

.funcs = &graph_functions,

kernel/trace/trace_functions_graph.c

1733

.funcs = &graph_functions,

kernel/trace/trace_functions_graph.c

1739

.funcs = &graph_functions

kernel/trace/trace_kprobe.c

1897

call->event.funcs = &kretprobe_funcs;

kernel/trace/trace_kprobe.c

1900

call->event.funcs = &kprobe_funcs;

kernel/trace/trace_output.c

1271

.funcs = &trace_fn_funcs,

kernel/trace/trace_output.c

1411

.funcs = &trace_ctx_funcs,

kernel/trace/trace_output.c

1423

.funcs = &trace_wake_funcs,

kernel/trace/trace_output.c

1464

.funcs = &trace_stack_funcs,

kernel/trace/trace_output.c

1517

.funcs = &trace_user_stack_funcs,

kernel/trace/trace_output.c

1581

.funcs = &trace_hwlat_funcs,

kernel/trace/trace_output.c

1651

.funcs = &trace_osnoise_funcs,

kernel/trace/trace_output.c

1699

.funcs = &trace_timerlat_funcs,

kernel/trace/trace_output.c

1743

.funcs = &trace_bputs_funcs,

kernel/trace/trace_output.c

1787

.funcs = &trace_bprint_funcs,

kernel/trace/trace_output.c

1827

.funcs = &trace_print_funcs,

kernel/trace/trace_output.c

1856

.funcs = &trace_raw_data_funcs,

kernel/trace/trace_output.c

1902

.funcs = &trace_func_repeats_funcs,

kernel/trace/trace_output.c

891

if (WARN_ON(!event->funcs))

kernel/trace/trace_output.c

907

if (event->funcs->trace == NULL)

kernel/trace/trace_output.c

908

event->funcs->trace = trace_nop_print;

kernel/trace/trace_output.c

909

if (event->funcs->raw == NULL)

kernel/trace/trace_output.c

910

event->funcs->raw = trace_nop_print;

kernel/trace/trace_output.c

911

if (event->funcs->hex == NULL)

kernel/trace/trace_output.c

912

event->funcs->hex = trace_nop_print;

kernel/trace/trace_output.c

913

if (event->funcs->binary == NULL)

kernel/trace/trace_output.c

914

event->funcs->binary = trace_nop_print;

kernel/trace/trace_uprobe.c

1604

call->event.funcs = &uprobe_funcs;

kernel/tracepoint.c

131

static void debug_print_probes(struct tracepoint_func *funcs)

kernel/tracepoint.c

135

if (!tracepoint_debug || !funcs)

kernel/tracepoint.c

138

for (i = 0; funcs[i].func; i++)

kernel/tracepoint.c

139

printk(KERN_DEBUG "Probe %d : %pSb\n", i, funcs[i].func);

kernel/tracepoint.c

143

func_add(struct tracepoint_func **funcs, struct tracepoint_func *tp_func,

kernel/tracepoint.c

154

debug_print_probes(*funcs);

kernel/tracepoint.c

155

old = *funcs;

kernel/tracepoint.c

190

*funcs = new;

kernel/tracepoint.c

191

debug_print_probes(*funcs);

kernel/tracepoint.c

195

static void *func_remove(struct tracepoint_func **funcs,

kernel/tracepoint.c

201

old = *funcs;

kernel/tracepoint.c

206

debug_print_probes(*funcs);

kernel/tracepoint.c

223

*funcs = NULL;

kernel/tracepoint.c

224

debug_print_probes(*funcs);

kernel/tracepoint.c

239

*funcs = new;

kernel/tracepoint.c

250

*funcs = old;

kernel/tracepoint.c

253

debug_print_probes(*funcs);

kernel/tracepoint.c

299

tp_funcs = rcu_dereference_protected(tp->funcs,

kernel/tracepoint.c

325

rcu_assign_pointer(tp->funcs, tp_funcs);

kernel/tracepoint.c

338

rcu_assign_pointer(tp->funcs, tp_funcs);

kernel/tracepoint.c

366

tp_funcs = rcu_dereference_protected(tp->funcs,

kernel/tracepoint.c

385

rcu_assign_pointer(tp->funcs, NULL);

kernel/tracepoint.c

393

rcu_assign_pointer(tp->funcs, tp_funcs);

kernel/tracepoint.c

410

rcu_assign_pointer(tp->funcs, tp_funcs);

kernel/tracepoint.c

601

WARN_ON_ONCE(tp->funcs);

lib/tests/min_heap_kunit.c

101

struct min_heap_callbacks funcs = {

lib/tests/min_heap_kunit.c

109

min_heap_push_inline(&heap, &data[i], &funcs, NULL);

lib/tests/min_heap_kunit.c

111

pop_verify_heap(test, params->min_heap, &heap, &funcs);

lib/tests/min_heap_kunit.c

116

min_heap_push_inline(&heap, &temp, &funcs, NULL);

lib/tests/min_heap_kunit.c

118

pop_verify_heap(test, params->min_heap, &heap, &funcs);

lib/tests/min_heap_kunit.c

132

struct min_heap_callbacks funcs = {

lib/tests/min_heap_kunit.c

141

min_heap_push_inline(&heap, &temp, &funcs, NULL);

lib/tests/min_heap_kunit.c

145

min_heap_pop_push_inline(&heap, &data[i], &funcs, NULL);

lib/tests/min_heap_kunit.c

147

pop_verify_heap(test, params->min_heap, &heap, &funcs);

lib/tests/min_heap_kunit.c

151

min_heap_push_inline(&heap, &temp, &funcs, NULL);

lib/tests/min_heap_kunit.c

156

min_heap_pop_push_inline(&heap, &temp, &funcs, NULL);

lib/tests/min_heap_kunit.c

158

pop_verify_heap(test, params->min_heap, &heap, &funcs);

lib/tests/min_heap_kunit.c

170

struct min_heap_callbacks funcs = {

lib/tests/min_heap_kunit.c

177

min_heapify_all_inline(&heap, &funcs, NULL);

lib/tests/min_heap_kunit.c

179

min_heap_del_inline(&heap, get_random_u32() % heap.nr, &funcs, NULL);

lib/tests/min_heap_kunit.c

180

pop_verify_heap(test, params->min_heap, &heap, &funcs);

lib/tests/min_heap_kunit.c

186

min_heapify_all_inline(&heap, &funcs, NULL);

lib/tests/min_heap_kunit.c

189

min_heap_del_inline(&heap, get_random_u32() % heap.nr, &funcs, NULL);

lib/tests/min_heap_kunit.c

190

pop_verify_heap(test, params->min_heap, &heap, &funcs);

lib/tests/min_heap_kunit.c

44

const struct min_heap_callbacks *funcs)

lib/tests/min_heap_kunit.c

50

min_heap_pop_inline(heap, funcs, NULL);

lib/tests/min_heap_kunit.c

57

min_heap_pop_inline(heap, funcs, NULL);

lib/tests/min_heap_kunit.c

71

struct min_heap_callbacks funcs = {

lib/tests/min_heap_kunit.c

78

min_heapify_all_inline(&heap, &funcs, NULL);

lib/tests/min_heap_kunit.c

79

pop_verify_heap(test, params->min_heap, &heap, &funcs);

lib/tests/min_heap_kunit.c

86

min_heapify_all_inline(&heap, &funcs, NULL);

lib/tests/min_heap_kunit.c

87

pop_verify_heap(test, params->min_heap, &heap, &funcs);

net/mac80211/util.c

1753

struct cfg80211_nan_func *func, **funcs;

net/mac80211/util.c

1756

funcs = kzalloc_objs(*funcs, sdata->local->hw.max_nan_de_entries + 1);

net/mac80211/util.c

1757

if (!funcs)

net/mac80211/util.c

1767

funcs[i++] = func;

net/mac80211/util.c

1771

for (i = 0; funcs[i]; i++) {

net/mac80211/util.c

1772

res = drv_add_nan_func(sdata->local, sdata, funcs[i]);

net/mac80211/util.c

1775

funcs[i]->instance_id,

net/mac80211/util.c

1780

kfree(funcs);

samples/livepatch/livepatch-callbacks-demo.c

151

.funcs = no_funcs,

samples/livepatch/livepatch-callbacks-demo.c

160

.funcs = no_funcs,

samples/livepatch/livepatch-callbacks-demo.c

169

.funcs = busymod_funcs,

samples/livepatch/livepatch-sample.c

39

static struct klp_func funcs[] = {

samples/livepatch/livepatch-sample.c

49

.funcs = funcs,

samples/livepatch/livepatch-shadow-fix1.c

135

static struct klp_func funcs[] = {

samples/livepatch/livepatch-shadow-fix1.c

149

.funcs = funcs,

samples/livepatch/livepatch-shadow-fix2.c

109

.funcs = funcs,

samples/livepatch/livepatch-shadow-fix2.c

95

static struct klp_func funcs[] = {

scripts/livepatch/init.c

45

struct klp_func_ext *funcs_ext = obj_ext->funcs;

scripts/livepatch/init.c

47

struct klp_func *funcs = objs[i].funcs;

scripts/livepatch/init.c

50

funcs = kzalloc(sizeof(struct klp_func) * (nr_funcs + 1), GFP_KERNEL);

scripts/livepatch/init.c

51

if (!funcs) {

scripts/livepatch/init.c

54

kfree(objs[i].funcs);

scripts/livepatch/init.c

59

funcs[j].old_name = funcs_ext[j].old_name;

scripts/livepatch/init.c

60

funcs[j].new_func = funcs_ext[j].new_func;

scripts/livepatch/init.c

61

funcs[j].old_sympos = funcs_ext[j].sympos;

scripts/livepatch/init.c

65

obj->funcs = funcs;

scripts/livepatch/init.c

96

kfree(obj->funcs);

tools/arch/x86/kcpuid/kcpuid.c

189

func = &range->funcs[f & CPUID_FUNCTION_MASK];

tools/arch/x86/kcpuid/kcpuid.c

224

struct cpuid_func *func = &range->funcs[f];

tools/arch/x86/kcpuid/kcpuid.c

258

range->funcs = malloc(range_funcs_sz);

tools/arch/x86/kcpuid/kcpuid.c

259

if (!range->funcs)

tools/arch/x86/kcpuid/kcpuid.c

262

memset(range->funcs, 0, range_funcs_sz);

tools/arch/x86/kcpuid/kcpuid.c

369

func = &range->funcs[index];

tools/arch/x86/kcpuid/kcpuid.c

527

show_func(&range->funcs[i]);

tools/arch/x86/kcpuid/kcpuid.c

539

return &range->funcs[func_idx];

tools/arch/x86/kcpuid/kcpuid.c

81

struct cpuid_func *funcs;

tools/bpf/bpftool/cfg.c

13

struct list_head funcs;

tools/bpf/bpftool/cfg.c

339

INIT_LIST_HEAD(&cfg->funcs);

tools/bpf/bpftool/cfg.c

344

list_for_each_entry(func, &cfg->funcs, l) {

tools/bpf/bpftool/cfg.c

359

list_for_each_entry_safe(func, func2, &cfg->funcs, l) {

tools/bpf/bpftool/cfg.c

466

list_for_each_entry(func, &cfg->funcs, l) {

tools/bpf/bpftool/cfg.c

55

list_first_entry(&cfg->funcs, struct func_node, l)

tools/bpf/bpftool/cfg.c

57

list_last_entry(&cfg->funcs, struct func_node, l)

tools/bpf/bpftool/cfg.c

67

list_for_each_entry(func, &cfg->funcs, l) {

tools/bpf/resolve_btfids/main.c

1023

id = btf_id__find(&obj->funcs, func_name);

tools/bpf/resolve_btfids/main.c

147

struct rb_root funcs;

tools/bpf/resolve_btfids/main.c

1480

.funcs = RB_ROOT,

tools/bpf/resolve_btfids/main.c

1576

btf_id__free_all(&obj.funcs);

tools/bpf/resolve_btfids/main.c

541

id = add_symbol(&obj->funcs, prefix, sizeof(BTF_FUNC) - 1);

tools/bpf/resolve_btfids/main.c

649

root = &obj->funcs;

tools/bpf/resolve_btfids/main.c

800

__symbols_patch(obj, &obj->funcs) ||

tools/include/linux/livepatch_external.h

71

struct klp_func_ext *funcs;

tools/objtool/klp-diff.c

1974

if (!elf_create_reloc(e->out, obj_sec, offsetof(struct klp_object_ext, funcs),

tools/perf/builtin-ftrace.c

456

static int __set_tracing_filter(const char *filter_file, struct list_head *funcs)

tools/perf/builtin-ftrace.c

460

list_for_each_entry(pos, funcs, list) {

tools/perf/tests/dwarf-unwind.c

60

static const char *funcs[MAX_STACK] = {

tools/perf/tests/dwarf-unwind.c

90

symbol, entry->ip, funcs[idx]);

tools/perf/tests/dwarf-unwind.c

91

return strcmp((const char *) symbol, funcs[idx]);

tools/testing/selftests/bpf/prog_tests/core_reloc_raw.c

56

struct bpf_func_info funcs[] = {

tools/testing/selftests/bpf/prog_tests/core_reloc_raw.c

97

attr.func_info = (__u64)funcs;

tools/testing/selftests/bpf/prog_tests/core_reloc_raw.c

98

attr.func_info_cnt = sizeof(funcs) / sizeof(*funcs);

tools/testing/selftests/bpf/prog_tests/core_reloc_raw.c

99

attr.func_info_rec_size = sizeof(*funcs);

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

109

if (!tsearch(&funcs[i], &root, compare)) {

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

149

idx = *val - funcs;

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

391

const char *funcs[FUNCS_CNT];

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

404

cnt = get_random_funcs(funcs);

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

405

ids = get_ids(funcs, cnt, NULL);

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

53

static int get_random_funcs(const char **funcs)

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

59

funcs[cnt++] = bpf_fentry_test[i];

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

63

funcs[cnt++] = bpf_fentry_test[rand() % FUNCS_CNT];

tools/testing/selftests/bpf/prog_tests/tracing_multi.c

79

static __u32 *get_ids(const char * const funcs[], int funcs_cnt, const char *mod)

tools/testing/selftests/bpf/progs/uprobe_multi_session.c

22

const __u64 funcs[] = {

tools/testing/selftests/bpf/progs/uprobe_multi_session.c

35

for (i = 0; i < ARRAY_SIZE(funcs); i++) {

tools/testing/selftests/bpf/progs/uprobe_multi_session.c

36

if (funcs[i] == addr) {

tools/testing/selftests/livepatch/test_modules/test_klp_atomic_replace.c

22

static struct klp_func funcs[] = {

tools/testing/selftests/livepatch/test_modules/test_klp_atomic_replace.c

32

.funcs = funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_callbacks_demo.c

74

.funcs = no_funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_callbacks_demo.c

83

.funcs = no_funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_callbacks_demo.c

92

.funcs = busymod_funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_callbacks_demo2.c

62

.funcs = no_funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_livepatch.c

18

static struct klp_func funcs[] = {

tools/testing/selftests/livepatch/test_modules/test_klp_livepatch.c

28

.funcs = funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_mod_patch.c

18

static struct klp_func funcs[] = {

tools/testing/selftests/livepatch/test_modules/test_klp_mod_patch.c

29

.funcs = funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_state.c

124

.funcs = no_funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_state2.c

153

.funcs = no_funcs,

tools/testing/selftests/livepatch/test_modules/test_klp_syscall.c

83

.funcs = vmlinux_funcs,