bin/cpdup/hclink.c

352

hcc_leaf_int32(hctransaction_t trans, int16_t leafid, int32_t value)

bin/cpdup/hclink.c

357

assert(trans->windex + sizeof(*item) + sizeof(value) < HC_BUFSIZE);

bin/cpdup/hclink.c

360

item->bytes = sizeof(*item) + sizeof(value);

bin/cpdup/hclink.c

361

*(int32_t *)(item + 1) = value;

bin/cpdup/hclink.c

366

hcc_leaf_int64(hctransaction_t trans, int16_t leafid, int64_t value)

bin/cpdup/hclink.c

371

assert(trans->windex + sizeof(*item) + sizeof(value) < HC_BUFSIZE);

bin/cpdup/hclink.c

374

item->bytes = sizeof(*item) + sizeof(value);

bin/cpdup/hclink.c

375

*(int64_t *)(item + 1) = value;

bin/cpdup/hclink.h

97

void hcc_leaf_int32(hctransaction_t trans, int16_t leafid, int32_t value);

bin/cpdup/hclink.h

98

void hcc_leaf_int64(hctransaction_t trans, int16_t leafid, int64_t value);

bin/pax/options.c

1339

fprintf(stderr, "\t%s = %s\n", opt->name, opt->value);

bin/pax/options.c

1391

opt->value = pt;

bin/pax/pax.h

219

char *value; /* value for option variable */

bin/pax/tar.c

334

strcmp(opt->value, TAR_NODIR)) {

bin/pax/tar.c

336

opt->name, opt->value);

bin/pax/tar.c

347

opt->name, opt->value);

bin/sh/arith_yylex.c

171

value = ARITH_VAR;

bin/sh/arith_yylex.c

174

value += ARITH_ASS - '=';

bin/sh/arith_yylex.c

180

value += 11;

bin/sh/arith_yylex.c

185

value += ARITH_GE - '>';

bin/sh/arith_yylex.c

188

value += ARITH_RSHIFT - '>';

bin/sh/arith_yylex.c

191

value += ARITH_GT - '>';

bin/sh/arith_yylex.c

198

value += ARITH_LE - '<';

bin/sh/arith_yylex.c

201

value += ARITH_LSHIFT - '<';

bin/sh/arith_yylex.c

204

value += ARITH_LT - '<';

bin/sh/arith_yylex.c

210

value += ARITH_BOR - '|';

bin/sh/arith_yylex.c

213

value += ARITH_OR - '|';

bin/sh/arith_yylex.c

217

value += ARITH_BAND - '&';

bin/sh/arith_yylex.c

220

value += ARITH_AND - '&';

bin/sh/arith_yylex.c

224

value += ARITH_NOT - '!';

bin/sh/arith_yylex.c

227

value += ARITH_NE - '!';

bin/sh/arith_yylex.c

232

value += ARITH_LPAREN - '(';

bin/sh/arith_yylex.c

235

value += ARITH_RPAREN - ')';

bin/sh/arith_yylex.c

238

value += ARITH_MUL - '*';

bin/sh/arith_yylex.c

241

value += ARITH_DIV - '/';

bin/sh/arith_yylex.c

244

value += ARITH_REM - '%';

bin/sh/arith_yylex.c

249

value += ARITH_ADD - '+';

bin/sh/arith_yylex.c

254

value += ARITH_SUB - '-';

bin/sh/arith_yylex.c

257

value += ARITH_BNOT - '~';

bin/sh/arith_yylex.c

260

value += ARITH_BXOR - '^';

bin/sh/arith_yylex.c

263

value += ARITH_QMARK - '?';

bin/sh/arith_yylex.c

266

value += ARITH_COLON - ':';

bin/sh/arith_yylex.c

275

return value;

bin/sh/arith_yylex.c

84

int value;

bin/sh/arith_yylex.c

90

value = *buf;

bin/sh/arith_yylex.c

91

switch (value) {

bin/sh/options.c

414

getoptsreset(const char *value)

bin/sh/options.c

416

while (*value == '0')

bin/sh/options.c

417

value++;

bin/sh/options.c

418

if (strcmp(value, "1") == 0)

crypto/libressl/apps/nc/netcat.c

1694

char **value;

crypto/libressl/apps/nc/netcat.c

1714

if (t->value != NULL) {

crypto/libressl/apps/nc/netcat.c

1717

*t->value = v;

crypto/libressl/apps/openssl/apps.c

1933

pkey_ctrl_string(EVP_PKEY_CTX *ctx, char *value)

crypto/libressl/apps/openssl/apps.c

1938

if (value == NULL)

crypto/libressl/apps/openssl/apps.c

1940

stmp = strdup(value);

crypto/libressl/apps/openssl/apps.c

2159

*opt->opt.value = fmt;

crypto/libressl/apps/openssl/apps.c

2174

*opt->opt.value = (int)val;

crypto/libressl/apps/openssl/apps.c

2214

*opt->opt.value = opt->value;

crypto/libressl/apps/openssl/apps.c

2218

*opt->opt.value &= opt->value;

crypto/libressl/apps/openssl/apps.c

2222

*opt->opt.value |= opt->value;

crypto/libressl/apps/openssl/apps.c

531

if (OBJ_create(cnf->value, cnf->name, cnf->name) == NID_undef) {

crypto/libressl/apps/openssl/apps.c

533

cnf->name, cnf->value);

crypto/libressl/apps/openssl/apps.h

248

int pkey_ctrl_string(EVP_PKEY_CTX *ctx, char *value);

crypto/libressl/apps/openssl/apps.h

319

int *value;

crypto/libressl/apps/openssl/apps.h

324

const int value;

crypto/libressl/apps/openssl/asn1pars.c

134

.value = -1,

crypto/libressl/apps/openssl/asn1pars.c

135

.opt.value = &asn1pars_config.dump,

crypto/libressl/apps/openssl/asn1pars.c

176

.opt.value = &asn1pars_config.informat,

crypto/libressl/apps/openssl/asn1pars.c

196

.opt.value = &asn1pars_config.offset,

crypto/libressl/apps/openssl/asn1pars.c

379

tmpbuf = at->value.asn1_string->data;

crypto/libressl/apps/openssl/asn1pars.c

380

tmplen = at->value.asn1_string->length;

crypto/libressl/apps/openssl/ca.c

1870

if (strcmp(cv->value, "optional") == 0) {

crypto/libressl/apps/openssl/ca.c

1873

} else if (strcmp(cv->value, "supplied") == 0) {

crypto/libressl/apps/openssl/ca.c

1881

} else if (strcmp(cv->value, "match") == 0) {

crypto/libressl/apps/openssl/ca.c

1927

cv->value);

crypto/libressl/apps/openssl/ca.c

2385

buf = cv->value;

crypto/libressl/apps/openssl/ca.c

2388

spki = NETSCAPE_SPKI_b64_decode(cv->value, -1);

crypto/libressl/apps/openssl/ca.c

2451

do_revoke(X509 *x509, CA_DB *db, int type, char *value)

crypto/libressl/apps/openssl/ca.c

2542

ok = do_revoke(x509, db, type, value);

crypto/libressl/apps/openssl/ca.c

2557

rev_str = make_revocation_str(type, value);

crypto/libressl/apps/openssl/ca.c

460

.opt.value = &ca_config.keyform,

crypto/libressl/apps/openssl/ca.c

491

.opt.value = &ca_config.email_dn,

crypto/libressl/apps/openssl/ca.c

492

.value = 0,

crypto/libressl/apps/openssl/ciphers.c

113

uint16_t value;

crypto/libressl/apps/openssl/ciphers.c

175

value = SSL_CIPHER_get_value(cipher);

crypto/libressl/apps/openssl/ciphers.c

177

((value >> 8) & 0xff), (value & 0xff));

crypto/libressl/apps/openssl/ciphers.c

55

.opt.value = &ciphers_config.version,

crypto/libressl/apps/openssl/ciphers.c

56

.value = TLS1_VERSION,

crypto/libressl/apps/openssl/ciphers.c

62

.opt.value = &ciphers_config.version,

crypto/libressl/apps/openssl/ciphers.c

63

.value = TLS1_1_VERSION,

crypto/libressl/apps/openssl/ciphers.c

69

.opt.value = &ciphers_config.version,

crypto/libressl/apps/openssl/ciphers.c

70

.value = TLS1_2_VERSION,

crypto/libressl/apps/openssl/ciphers.c

76

.opt.value = &ciphers_config.version,

crypto/libressl/apps/openssl/ciphers.c

77

.value = TLS1_3_VERSION,

crypto/libressl/apps/openssl/ciphers.c

83

.opt.value = &ciphers_config.verbose,

crypto/libressl/apps/openssl/ciphers.c

84

.value = 1,

crypto/libressl/apps/openssl/ciphers.c

90

.opt.value = &ciphers_config.verbose,

crypto/libressl/apps/openssl/ciphers.c

91

.value = 2,

crypto/libressl/apps/openssl/cms.c

555

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

556

.value = CMS_BINARY,

crypto/libressl/apps/openssl/cms.c

576

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

577

.value = SMIME_CMSOUT,

crypto/libressl/apps/openssl/cms.c

583

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

584

.value = SMIME_COMPRESS,

crypto/libressl/apps/openssl/cms.c

597

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

598

.value = CMS_CRLFEOL,

crypto/libressl/apps/openssl/cms.c

604

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

605

.value = SMIME_DATA_CREATE,

crypto/libressl/apps/openssl/cms.c

611

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

612

.value = SMIME_DATAOUT,

crypto/libressl/apps/openssl/cms.c

618

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

619

.value = CMS_DEBUG_DECRYPT,

crypto/libressl/apps/openssl/cms.c

625

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

626

.value = SMIME_DECRYPT,

crypto/libressl/apps/openssl/cms.c

632

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

633

.value = SMIME_DIGEST_CREATE,

crypto/libressl/apps/openssl/cms.c

639

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

640

.value = SMIME_DIGEST_VERIFY,

crypto/libressl/apps/openssl/cms.c

653

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

654

.value = SMIME_ENCRYPT,

crypto/libressl/apps/openssl/cms.c

660

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

661

.value = SMIME_ENCRYPTED_DECRYPT,

crypto/libressl/apps/openssl/cms.c

667

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

668

.value = SMIME_ENCRYPTED_ENCRYPT,

crypto/libressl/apps/openssl/cms.c

688

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

689

.value = CMS_STREAM,

crypto/libressl/apps/openssl/cms.c

696

.opt.value = &cms_config.informat,

crypto/libressl/apps/openssl/cms.c

710

.opt.value = &cms_config.keyform,

crypto/libressl/apps/openssl/cms.c

716

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

717

.value = CMS_USE_KEYID,

crypto/libressl/apps/openssl/cms.c

737

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

738

.value = CMS_NO_ATTR_VERIFY,

crypto/libressl/apps/openssl/cms.c

744

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

745

.value = CMS_NO_CONTENT_VERIFY,

crypto/libressl/apps/openssl/cms.c

751

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

752

.value = CMS_NO_SIGNER_CERT_VERIFY,

crypto/libressl/apps/openssl/cms.c

758

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

759

.value = CMS_NOATTR,

crypto/libressl/apps/openssl/cms.c

765

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

766

.value = CMS_NOCERTS,

crypto/libressl/apps/openssl/cms.c

772

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

773

.value = ~CMS_DETACHED,

crypto/libressl/apps/openssl/cms.c

779

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

780

.value = ~CMS_STREAM,

crypto/libressl/apps/openssl/cms.c

786

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

787

.value = CMS_NOINTERN,

crypto/libressl/apps/openssl/cms.c

793

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

794

.value = CMS_NOOLDMIMETYPE,

crypto/libressl/apps/openssl/cms.c

806

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

807

.value = CMS_NOSIGS,

crypto/libressl/apps/openssl/cms.c

813

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

814

.value = CMS_NOSMIMECAP,

crypto/libressl/apps/openssl/cms.c

820

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

821

.value = CMS_NO_SIGNER_CERT_VERIFY,

crypto/libressl/apps/openssl/cms.c

835

.opt.value = &cms_config.outformat,

crypto/libressl/apps/openssl/cms.c

862

.opt.value = &cms_config.rctformat,

crypto/libressl/apps/openssl/cms.c

868

.opt.value = &cms_config.rr_allorfirst,

crypto/libressl/apps/openssl/cms.c

869

.value = 0,

crypto/libressl/apps/openssl/cms.c

875

.opt.value = &cms_config.rr_allorfirst,

crypto/libressl/apps/openssl/cms.c

876

.value = 1,

crypto/libressl/apps/openssl/cms.c

909

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

910

.value = SMIME_RESIGN,

crypto/libressl/apps/openssl/cms.c

930

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

931

.value = SMIME_SIGN,

crypto/libressl/apps/openssl/cms.c

937

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

938

.value = SMIME_SIGN_RECEIPT,

crypto/libressl/apps/openssl/cms.c

951

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

952

.value = CMS_STREAM,

crypto/libressl/apps/openssl/cms.c

965

.opt.value = &cms_config.flags,

crypto/libressl/apps/openssl/cms.c

966

.value = CMS_TEXT,

crypto/libressl/apps/openssl/cms.c

979

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

980

.value = SMIME_UNCOMPRESS,

crypto/libressl/apps/openssl/cms.c

986

.opt.value = &cms_config.operation,

crypto/libressl/apps/openssl/cms.c

987

.value = SMIME_VERIFY,

crypto/libressl/apps/openssl/crl.c

142

.opt.value = &crl_config.informat,

crypto/libressl/apps/openssl/crl.c

187

.opt.value = &crl_config.outformat,

crypto/libressl/apps/openssl/crl2p7.c

125

.opt.value = &crl2p7_config.informat,

crypto/libressl/apps/openssl/crl2p7.c

145

.opt.value = &crl2p7_config.outformat,

crypto/libressl/apps/openssl/dgst.c

178

.opt.value = &dgst_config.out_bin,

crypto/libressl/apps/openssl/dgst.c

179

.value = 1,

crypto/libressl/apps/openssl/dgst.c

185

.opt.value = &dgst_config.separator,

crypto/libressl/apps/openssl/dgst.c

186

.value = 1,

crypto/libressl/apps/openssl/dgst.c

198

.opt.value = &dgst_config.out_bin,

crypto/libressl/apps/openssl/dgst.c

199

.value = 0,

crypto/libressl/apps/openssl/dgst.c

213

.opt.value = &dgst_config.keyform,

crypto/libressl/apps/openssl/dgst.c

254

.opt.value = &dgst_config.separator,

crypto/libressl/apps/openssl/dgst.c

255

.value = 2,

crypto/libressl/apps/openssl/dh.c

113

.opt.value = &dh_config.informat,

crypto/libressl/apps/openssl/dh.c

133

.opt.value = &dh_config.outformat,

crypto/libressl/apps/openssl/dhparam.c

153

.opt.value = &dhparam_config.g,

crypto/libressl/apps/openssl/dhparam.c

154

.value = 2,

crypto/libressl/apps/openssl/dhparam.c

160

.opt.value = &dhparam_config.g,

crypto/libressl/apps/openssl/dhparam.c

161

.value = 5,

crypto/libressl/apps/openssl/dhparam.c

193

.opt.value = &dhparam_config.informat,

crypto/libressl/apps/openssl/dhparam.c

213

.opt.value = &dhparam_config.outformat,

crypto/libressl/apps/openssl/dsa.c

122

.opt.value = &dsa_config.informat,

crypto/libressl/apps/openssl/dsa.c

148

.opt.value = &dsa_config.outformat,

crypto/libressl/apps/openssl/dsa.c

181

.value = 0,

crypto/libressl/apps/openssl/dsa.c

182

.opt.value = &dsa_config.pvk_encr,

crypto/libressl/apps/openssl/dsa.c

188

.value = 2,

crypto/libressl/apps/openssl/dsa.c

189

.opt.value = &dsa_config.pvk_encr,

crypto/libressl/apps/openssl/dsa.c

195

.value = 1,

crypto/libressl/apps/openssl/dsa.c

196

.opt.value = &dsa_config.pvk_encr,

crypto/libressl/apps/openssl/dsaparam.c

118

.opt.value = &dsaparam_config.informat,

crypto/libressl/apps/openssl/dsaparam.c

138

.opt.value = &dsaparam_config.outformat,

crypto/libressl/apps/openssl/ec.c

164

.opt.value = &ec_config.informat,

crypto/libressl/apps/openssl/ec.c

184

.opt.value = &ec_config.outformat,

crypto/libressl/apps/openssl/ecparam.c

182

.opt.value = &ecparam_config.informat,

crypto/libressl/apps/openssl/ecparam.c

222

.opt.value = &ecparam_config.outformat,

crypto/libressl/apps/openssl/enc.c

156

.opt.value = &enc_config.enc,

crypto/libressl/apps/openssl/enc.c

157

.value = 0,

crypto/libressl/apps/openssl/enc.c

169

.opt.value = &enc_config.enc,

crypto/libressl/apps/openssl/enc.c

170

.value = 1,

crypto/libressl/apps/openssl/enc.c

184

.opt.value = &enc_config.iter,

crypto/libressl/apps/openssl/enc.c

232

.opt.value = &enc_config.nosalt,

crypto/libressl/apps/openssl/enc.c

233

.value = 1,

crypto/libressl/apps/openssl/enc.c

247

.opt.value = &enc_config.printkey,

crypto/libressl/apps/openssl/enc.c

248

.value = 2,

crypto/libressl/apps/openssl/enc.c

254

.opt.value = &enc_config.printkey,

crypto/libressl/apps/openssl/enc.c

255

.value = 1,

crypto/libressl/apps/openssl/enc.c

281

.opt.value = &enc_config.nosalt,

crypto/libressl/apps/openssl/enc.c

282

.value = 0,

crypto/libressl/apps/openssl/gendh.c

100

.value = 2,

crypto/libressl/apps/openssl/gendh.c

101

.opt.value = &gendh_config.g,

crypto/libressl/apps/openssl/gendh.c

107

.value = 5,

crypto/libressl/apps/openssl/gendh.c

108

.opt.value = &gendh_config.g,

crypto/libressl/apps/openssl/genpkey.c

170

.opt.value = &genpkey_config.outformat,

crypto/libressl/apps/openssl/ocsp.c

1456

if (!OCSP_REQ_CTX_add1_header(ctx, hdr->name, hdr->value))

crypto/libressl/apps/openssl/ocsp.c

494

.opt.value = &ocsp_config.add_nonce,

crypto/libressl/apps/openssl/ocsp.c

495

.value = 0,

crypto/libressl/apps/openssl/ocsp.c

508

.opt.value = &ocsp_config.add_nonce,

crypto/libressl/apps/openssl/ocsp.c

509

.value = 2,

crypto/libressl/apps/openssl/pkcs12.c

1018

p = alg->parameter->value.sequence->data;

crypto/libressl/apps/openssl/pkcs12.c

1019

pbe = d2i_PBEPARAM(NULL, &p, alg->parameter->value.sequence->length);

crypto/libressl/apps/openssl/pkcs12.c

1033

char *value;

crypto/libressl/apps/openssl/pkcs12.c

1037

value = OPENSSL_uni2asc(

crypto/libressl/apps/openssl/pkcs12.c

1038

av->value.bmpstring->data,

crypto/libressl/apps/openssl/pkcs12.c

1039

av->value.bmpstring->length);

crypto/libressl/apps/openssl/pkcs12.c

1040

BIO_printf(out, "%s\n", value);

crypto/libressl/apps/openssl/pkcs12.c

1041

free(value);

crypto/libressl/apps/openssl/pkcs12.c

1045

hex_prin(out, av->value.octet_string->data,

crypto/libressl/apps/openssl/pkcs12.c

1046

av->value.octet_string->length);

crypto/libressl/apps/openssl/pkcs12.c

1051

hex_prin(out, av->value.bit_string->data,

crypto/libressl/apps/openssl/pkcs12.c

1052

av->value.bit_string->length);

crypto/libressl/apps/openssl/pkcs12.c

272

.opt.value = &pkcs12_config.options,

crypto/libressl/apps/openssl/pkcs12.c

273

.value = CACERTS,

crypto/libressl/apps/openssl/pkcs12.c

320

.opt.value = &pkcs12_config.options,

crypto/libressl/apps/openssl/pkcs12.c

321

.value = CLCERTS,

crypto/libressl/apps/openssl/pkcs12.c

334

.opt.value = &pkcs12_config.cert_pbe,

crypto/libressl/apps/openssl/pkcs12.c

335

.value = NID_pbe_WithSHA1And3_Key_TripleDES_CBC,

crypto/libressl/apps/openssl/pkcs12.c

354

.opt.value = &pkcs12_config.options,

crypto/libressl/apps/openssl/pkcs12.c

355

.value = INFO,

crypto/libressl/apps/openssl/pkcs12.c

368

.opt.value = &pkcs12_config.keytype,

crypto/libressl/apps/openssl/pkcs12.c

369

.value = KEY_EX,

crypto/libressl/apps/openssl/pkcs12.c

382

.opt.value = &pkcs12_config.keytype,

crypto/libressl/apps/openssl/pkcs12.c

383

.value = KEY_SIG,

crypto/libressl/apps/openssl/pkcs12.c

402

.opt.value = &pkcs12_config.maciter,

crypto/libressl/apps/openssl/pkcs12.c

403

.value = PKCS12_DEFAULT_ITER,

crypto/libressl/apps/openssl/pkcs12.c

416

.opt.value = &pkcs12_config.options,

crypto/libressl/apps/openssl/pkcs12.c

417

.value = NOCERTS,

crypto/libressl/apps/openssl/pkcs12.c

429

.opt.value = &pkcs12_config.iter,

crypto/libressl/apps/openssl/pkcs12.c

430

.value = 1,

crypto/libressl/apps/openssl/pkcs12.c

436

.opt.value = &pkcs12_config.options,

crypto/libressl/apps/openssl/pkcs12.c

437

.value = NOKEYS,

crypto/libressl/apps/openssl/pkcs12.c

443

.opt.value = &pkcs12_config.maciter,

crypto/libressl/apps/openssl/pkcs12.c

444

.value = -1,

crypto/libressl/apps/openssl/pkcs12.c

450

.opt.value = &pkcs12_config.maciter,

crypto/libressl/apps/openssl/pkcs12.c

451

.value = 1,

crypto/libressl/apps/openssl/pkcs12.c

457

.opt.value = &pkcs12_config.macver,

crypto/libressl/apps/openssl/pkcs12.c

458

.value = 0,

crypto/libressl/apps/openssl/pkcs12.c

464

.opt.value = &pkcs12_config.options,

crypto/libressl/apps/openssl/pkcs12.c

465

.value = (NOKEYS | NOCERTS),

crypto/libressl/apps/openssl/pkcs7.c

117

.opt.value = &pkcs7_config.outformat,

crypto/libressl/apps/openssl/pkcs7.c

97

.opt.value = &pkcs7_config.informat,

crypto/libressl/apps/openssl/pkcs8.c

119

.opt.value = &pkcs8_config.informat,

crypto/libressl/apps/openssl/pkcs8.c

131

.value = 1,

crypto/libressl/apps/openssl/pkcs8.c

132

.opt.value = &pkcs8_config.iter,

crypto/libressl/apps/openssl/pkcs8.c

146

.opt.value = &pkcs8_config.outformat,

crypto/libressl/apps/openssl/pkey.c

121

.opt.value = &pkey_config.informat,

crypto/libressl/apps/openssl/pkey.c

141

.opt.value = &pkey_config.outformat,

crypto/libressl/apps/openssl/pkey.c

167

.value = 1,

crypto/libressl/apps/openssl/pkey.c

168

.opt.value = &pkey_config.pubin,

crypto/libressl/apps/openssl/pkey.c

174

.value = 1,

crypto/libressl/apps/openssl/pkey.c

175

.opt.value = &pkey_config.pubout,

crypto/libressl/apps/openssl/pkeyutl.c

110

.value = KEY_CERT,

crypto/libressl/apps/openssl/pkeyutl.c

111

.opt.value = &pkeyutl_config.key_type,

crypto/libressl/apps/openssl/pkeyutl.c

117

.value = EVP_PKEY_OP_DECRYPT,

crypto/libressl/apps/openssl/pkeyutl.c

118

.opt.value = &pkeyutl_config.pkey_op,

crypto/libressl/apps/openssl/pkeyutl.c

124

.value = EVP_PKEY_OP_DERIVE,

crypto/libressl/apps/openssl/pkeyutl.c

125

.opt.value = &pkeyutl_config.pkey_op,

crypto/libressl/apps/openssl/pkeyutl.c

131

.value = EVP_PKEY_OP_ENCRYPT,

crypto/libressl/apps/openssl/pkeyutl.c

132

.opt.value = &pkeyutl_config.pkey_op,

crypto/libressl/apps/openssl/pkeyutl.c

159

.opt.value = &pkeyutl_config.keyform,

crypto/libressl/apps/openssl/pkeyutl.c

180

.opt.value = &pkeyutl_config.peerform,

crypto/libressl/apps/openssl/pkeyutl.c

200

.value = KEY_PUBKEY,

crypto/libressl/apps/openssl/pkeyutl.c

201

.opt.value = &pkeyutl_config.key_type,

crypto/libressl/apps/openssl/pkeyutl.c

220

.value = EVP_PKEY_OP_SIGN,

crypto/libressl/apps/openssl/pkeyutl.c

221

.opt.value = &pkeyutl_config.pkey_op,

crypto/libressl/apps/openssl/pkeyutl.c

227

.value = EVP_PKEY_OP_VERIFY,

crypto/libressl/apps/openssl/pkeyutl.c

228

.opt.value = &pkeyutl_config.pkey_op,

crypto/libressl/apps/openssl/pkeyutl.c

234

.value = EVP_PKEY_OP_VERIFYRECOVER,

crypto/libressl/apps/openssl/pkeyutl.c

235

.opt.value = &pkeyutl_config.pkey_op,

crypto/libressl/apps/openssl/prime.c

73

.opt.value = &prime_config.bits,

crypto/libressl/apps/openssl/prime.c

80

.opt.value = &prime_config.checks,

crypto/libressl/apps/openssl/req.c

116

char *value, int nid, int n_min,

crypto/libressl/apps/openssl/req.c

118

static int add_DN_object(X509_NAME * n, char *text, const char *def, char *value,

crypto/libressl/apps/openssl/req.c

1221

char *type, *value;

crypto/libressl/apps/openssl/req.c

1287

if ((value = NCONF_get_string(req_conf, dn_sect, buf)) == NULL) {

crypto/libressl/apps/openssl/req.c

1289

value = NULL;

crypto/libressl/apps/openssl/req.c

1311

if (!add_DN_object(subj, v->value, def, value, nid,

crypto/libressl/apps/openssl/req.c

1356

if ((value = NCONF_get_string(req_conf, attr_sect, buf))

crypto/libressl/apps/openssl/req.c

1359

value = NULL;

crypto/libressl/apps/openssl/req.c

1382

v->value, def, value, nid, n_min, n_max, chtype))

crypto/libressl/apps/openssl/req.c

1429

(unsigned char *) v->value, -1, -1, mval))

crypto/libressl/apps/openssl/req.c

1442

(unsigned char *) v->value, -1))

crypto/libressl/apps/openssl/req.c

1451

add_DN_object(X509_NAME * n, char *text, const char *def, char *value,

crypto/libressl/apps/openssl/req.c

1460

if (value != NULL) {

crypto/libressl/apps/openssl/req.c

1461

strlcpy(buf, value, sizeof buf);

crypto/libressl/apps/openssl/req.c

1463

BIO_printf(bio_err, "%s\n", value);

crypto/libressl/apps/openssl/req.c

1503

char *value, int nid, int n_min,

crypto/libressl/apps/openssl/req.c

1513

if (value != NULL) {

crypto/libressl/apps/openssl/req.c

1514

strlcpy(buf, value, sizeof buf);

crypto/libressl/apps/openssl/req.c

1516

BIO_printf(bio_err, "%s\n", value);

crypto/libressl/apps/openssl/req.c

336

.opt.value = &req_config.informat,

crypto/libressl/apps/openssl/req.c

350

.opt.value = &req_config.keyform,

crypto/libressl/apps/openssl/req.c

421

.opt.value = &req_config.outformat,

crypto/libressl/apps/openssl/rsa.c

130

.opt.value = &rsa_config.informat,

crypto/libressl/apps/openssl/rsa.c

156

.opt.value = &rsa_config.outformat,

crypto/libressl/apps/openssl/rsa.c

176

.value = 1,

crypto/libressl/apps/openssl/rsa.c

177

.opt.value = &rsa_config.pubin,

crypto/libressl/apps/openssl/rsa.c

183

.value = 1,

crypto/libressl/apps/openssl/rsa.c

184

.opt.value = &rsa_config.pubout,

crypto/libressl/apps/openssl/rsa.c

189

.value = 0,

crypto/libressl/apps/openssl/rsa.c

190

.opt.value = &rsa_config.pvk_encr,

crypto/libressl/apps/openssl/rsa.c

195

.value = 2,

crypto/libressl/apps/openssl/rsa.c

196

.opt.value = &rsa_config.pvk_encr,

crypto/libressl/apps/openssl/rsa.c

201

.value = 1,

crypto/libressl/apps/openssl/rsa.c

202

.opt.value = &rsa_config.pvk_encr,

crypto/libressl/apps/openssl/rsa.c

207

.value = 2,

crypto/libressl/apps/openssl/rsa.c

208

.opt.value = &rsa_config.pubin,

crypto/libressl/apps/openssl/rsa.c

213

.value = 2,

crypto/libressl/apps/openssl/rsa.c

214

.opt.value = &rsa_config.pubout,

crypto/libressl/apps/openssl/rsautl.c

103

.value = KEY_CERT,

crypto/libressl/apps/openssl/rsautl.c

104

.opt.value = &rsautl_config.key_type,

crypto/libressl/apps/openssl/rsautl.c

110

.value = RSA_DECRYPT,

crypto/libressl/apps/openssl/rsautl.c

111

.opt.value = &rsautl_config.rsa_mode,

crypto/libressl/apps/openssl/rsautl.c

117

.value = RSA_ENCRYPT,

crypto/libressl/apps/openssl/rsautl.c

118

.opt.value = &rsautl_config.rsa_mode,

crypto/libressl/apps/openssl/rsautl.c

145

.opt.value = &rsautl_config.keyform,

crypto/libressl/apps/openssl/rsautl.c

151

.value = RSA_PKCS1_OAEP_PADDING,

crypto/libressl/apps/openssl/rsautl.c

152

.opt.value = &rsautl_config.pad,

crypto/libressl/apps/openssl/rsautl.c

172

.value = RSA_PKCS1_PADDING,

crypto/libressl/apps/openssl/rsautl.c

173

.opt.value = &rsautl_config.pad,

crypto/libressl/apps/openssl/rsautl.c

179

.value = KEY_PUBKEY,

crypto/libressl/apps/openssl/rsautl.c

180

.opt.value = &rsautl_config.key_type,

crypto/libressl/apps/openssl/rsautl.c

186

.value = RSA_NO_PADDING,

crypto/libressl/apps/openssl/rsautl.c

187

.opt.value = &rsautl_config.pad,

crypto/libressl/apps/openssl/rsautl.c

199

.value = RSA_SIGN,

crypto/libressl/apps/openssl/rsautl.c

200

.opt.value = &rsautl_config.rsa_mode,

crypto/libressl/apps/openssl/rsautl.c

206

.value = RSA_VERIFY,

crypto/libressl/apps/openssl/rsautl.c

207

.opt.value = &rsautl_config.rsa_mode,

crypto/libressl/apps/openssl/rsautl.c

213

.value = RSA_X931_PADDING,

crypto/libressl/apps/openssl/rsautl.c

214

.opt.value = &rsautl_config.pad,

crypto/libressl/apps/openssl/s_client.c

422

.opt.value = &s_client_config.af,

crypto/libressl/apps/openssl/s_client.c

423

.value = AF_INET,

crypto/libressl/apps/openssl/s_client.c

429

.opt.value = &s_client_config.af,

crypto/libressl/apps/openssl/s_client.c

430

.value = AF_INET6,

crypto/libressl/apps/openssl/s_client.c

472

.opt.value = &s_client_config.cert_format,

crypto/libressl/apps/openssl/s_client.c

542

.opt.value = &s_client_config.ign_eof,

crypto/libressl/apps/openssl/s_client.c

543

.value = 1,

crypto/libressl/apps/openssl/s_client.c

557

.opt.value = &s_client_config.key_format,

crypto/libressl/apps/openssl/s_client.c

581

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

582

.value = SSL_OP_LEGACY_SERVER_CONNECT,

crypto/libressl/apps/openssl/s_client.c

620

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

621

.value = SSL_OP_NO_COMPRESSION,

crypto/libressl/apps/openssl/s_client.c

627

.opt.value = &s_client_config.ign_eof,

crypto/libressl/apps/openssl/s_client.c

628

.value = 0,

crypto/libressl/apps/openssl/s_client.c

634

.opt.value = &s_client_config.clr,

crypto/libressl/apps/openssl/s_client.c

635

.value = SSL_OP_LEGACY_SERVER_CONNECT,

crypto/libressl/apps/openssl/s_client.c

641

.opt.value = &s_client_config.no_servername,

crypto/libressl/apps/openssl/s_client.c

646

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

647

.value = SSL_OP_NO_SSLv2,

crypto/libressl/apps/openssl/s_client.c

652

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

653

.value = SSL_OP_NO_SSLv3,

crypto/libressl/apps/openssl/s_client.c

659

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

660

.value = SSL_OP_NO_TICKET,

crypto/libressl/apps/openssl/s_client.c

666

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

667

.value = SSL_OP_NO_TLSv1,

crypto/libressl/apps/openssl/s_client.c

673

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

674

.value = SSL_OP_NO_TLSv1_1,

crypto/libressl/apps/openssl/s_client.c

680

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

681

.value = SSL_OP_NO_TLSv1_2,

crypto/libressl/apps/openssl/s_client.c

687

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

688

.value = SSL_OP_NO_TLSv1_3,

crypto/libressl/apps/openssl/s_client.c

693

.opt.value = &s_client_config.no_servername,

crypto/libressl/apps/openssl/s_client.c

743

.opt.value = &s_client_config.reconnect,

crypto/libressl/apps/openssl/s_client.c

744

.value = 5,

crypto/libressl/apps/openssl/s_client.c

757

.opt.value = &s_client_config.off,

crypto/libressl/apps/openssl/s_client.c

758

.value = SSL_OP_CIPHER_SERVER_PREFERENCE,

crypto/libressl/apps/openssl/s_server.c

1000

.opt.value = &s_server_config.www,

crypto/libressl/apps/openssl/s_server.c

1001

.value = 2,

crypto/libressl/apps/openssl/s_server.c

1007

.opt.value = &s_server_config.www,

crypto/libressl/apps/openssl/s_server.c

1008

.value = 1,

crypto/libressl/apps/openssl/s_server.c

566

.opt.value = &s_server_config.cert_format,

crypto/libressl/apps/openssl/s_server.c

607

.opt.value = &s_server_config.dcert_format,

crypto/libressl/apps/openssl/s_server.c

634

.opt.value = &s_server_config.dkey_format,

crypto/libressl/apps/openssl/s_server.c

678

.opt.value = &s_server_config.www,

crypto/libressl/apps/openssl/s_server.c

679

.value = 3,

crypto/libressl/apps/openssl/s_server.c

709

.opt.value = &s_server_config.key_format,

crypto/libressl/apps/openssl/s_server.c

749

.opt.value = &s_server_config.naccept

crypto/libressl/apps/openssl/s_server.c

785

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

786

.value = SSL_OP_NO_COMPRESSION,

crypto/libressl/apps/openssl/s_server.c

804

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

805

.value = SSL_OP_NO_TICKET,

crypto/libressl/apps/openssl/s_server.c

810

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

811

.value = SSL_OP_NO_SSLv2,

crypto/libressl/apps/openssl/s_server.c

816

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

817

.value = SSL_OP_NO_SSLv3,

crypto/libressl/apps/openssl/s_server.c

823

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

824

.value = SSL_OP_NO_TLSv1,

crypto/libressl/apps/openssl/s_server.c

830

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

831

.value = SSL_OP_NO_TLSv1_1,

crypto/libressl/apps/openssl/s_server.c

837

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

838

.value = SSL_OP_NO_TLSv1_2,

crypto/libressl/apps/openssl/s_server.c

844

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

845

.value = SSL_OP_NO_TLSv1_3,

crypto/libressl/apps/openssl/s_server.c

887

.opt.value = &s_server_config.tlsextcbp.extension_error,

crypto/libressl/apps/openssl/s_server.c

888

.value = SSL_TLSEXT_ERR_ALERT_FATAL,

crypto/libressl/apps/openssl/s_server.c

894

.opt.value = &s_server_config.off,

crypto/libressl/apps/openssl/s_server.c

895

.value = SSL_OP_CIPHER_SERVER_PREFERENCE,

crypto/libressl/apps/openssl/s_time.c

178

.opt.value = &s_time_config.perform,

crypto/libressl/apps/openssl/s_time.c

179

.value = 1,

crypto/libressl/apps/openssl/s_time.c

191

.opt.value = &s_time_config.perform,

crypto/libressl/apps/openssl/s_time.c

192

.value = 2,

crypto/libressl/apps/openssl/s_time.c

206

.opt.value = &s_time_config.verify_depth,

crypto/libressl/apps/openssl/sess_id.c

109

.opt.value = &sess_id_config.informat,

crypto/libressl/apps/openssl/sess_id.c

129

.opt.value = &sess_id_config.outformat,

crypto/libressl/apps/openssl/smime.c

352

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

353

.value = PKCS7_BINARY,

crypto/libressl/apps/openssl/smime.c

373

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

374

.value = PKCS7_CRLFEOL,

crypto/libressl/apps/openssl/smime.c

380

.opt.value = &smime_config.operation,

crypto/libressl/apps/openssl/smime.c

381

.value = SMIME_DECRYPT,

crypto/libressl/apps/openssl/smime.c

387

.opt.value = &smime_config.operation,

crypto/libressl/apps/openssl/smime.c

388

.value = SMIME_ENCRYPT,

crypto/libressl/apps/openssl/smime.c

408

.opt.value = &smime_config.indef,

crypto/libressl/apps/openssl/smime.c

409

.value = 1,

crypto/libressl/apps/openssl/smime.c

416

.opt.value = &smime_config.informat,

crypto/libressl/apps/openssl/smime.c

430

.opt.value = &smime_config.keyform,

crypto/libressl/apps/openssl/smime.c

443

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

444

.value = PKCS7_NOATTR,

crypto/libressl/apps/openssl/smime.c

450

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

451

.value = PKCS7_NOCERTS,

crypto/libressl/apps/openssl/smime.c

457

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

458

.value = PKCS7_NOCHAIN,

crypto/libressl/apps/openssl/smime.c

464

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

465

.value = ~PKCS7_DETACHED,

crypto/libressl/apps/openssl/smime.c

471

.opt.value = &smime_config.indef,

crypto/libressl/apps/openssl/smime.c

472

.value = 0,

crypto/libressl/apps/openssl/smime.c

478

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

479

.value = PKCS7_NOINTERN,

crypto/libressl/apps/openssl/smime.c

485

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

486

.value = PKCS7_NOOLDMIMETYPE,

crypto/libressl/apps/openssl/smime.c

492

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

493

.value = PKCS7_NOSIGS,

crypto/libressl/apps/openssl/smime.c

499

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

500

.value = PKCS7_NOSMIMECAP,

crypto/libressl/apps/openssl/smime.c

506

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

507

.value = PKCS7_NOVERIFY,

crypto/libressl/apps/openssl/smime.c

521

.opt.value = &smime_config.outformat,

crypto/libressl/apps/openssl/smime.c

534

.opt.value = &smime_config.operation,

crypto/libressl/apps/openssl/smime.c

535

.value = SMIME_PK7OUT,

crypto/libressl/apps/openssl/smime.c

548

.opt.value = &smime_config.operation,

crypto/libressl/apps/openssl/smime.c

549

.value = SMIME_RESIGN,

crypto/libressl/apps/openssl/smime.c

555

.opt.value = &smime_config.operation,

crypto/libressl/apps/openssl/smime.c

556

.value = SMIME_SIGN,

crypto/libressl/apps/openssl/smime.c

569

.opt.value = &smime_config.indef,

crypto/libressl/apps/openssl/smime.c

570

.value = 1,

crypto/libressl/apps/openssl/smime.c

583

.opt.value = &smime_config.flags,

crypto/libressl/apps/openssl/smime.c

584

.value = PKCS7_TEXT,

crypto/libressl/apps/openssl/smime.c

597

.opt.value = &smime_config.operation,

crypto/libressl/apps/openssl/smime.c

598

.value = SMIME_VERIFY,

crypto/libressl/apps/openssl/x509.c

363

.opt.value = &x509_config.CAformat,

crypto/libressl/apps/openssl/x509.c

378

.opt.value = &x509_config.CAkeyformat,

crypto/libressl/apps/openssl/x509.c

489

.opt.value = &x509_config.informat,

crypto/libressl/apps/openssl/x509.c

519

.opt.value = &x509_config.keyformat,

crypto/libressl/apps/openssl/x509.c

575

.opt.value = &x509_config.outformat,

crypto/libressl/crypto/asn1/a_bitstr.c

115

ASN1_BIT_STRING_set_bit(ASN1_BIT_STRING *a, int n, int value)

crypto/libressl/crypto/asn1/a_bitstr.c

123

if (!value)

crypto/libressl/crypto/asn1/a_bitstr.c

132

if (!value)

crypto/libressl/crypto/asn1/a_bitstr.c

207

ASN1_BIT_STRING_set_asc(ASN1_BIT_STRING *bs, const char *name, int value,

crypto/libressl/crypto/asn1/a_bitstr.c

216

if (!ASN1_BIT_STRING_set_bit(bs, bitnum, value))

crypto/libressl/crypto/asn1/a_mbstr.c

265

int (*rfunc)(unsigned long value, void *in), void *arg)

crypto/libressl/crypto/asn1/a_mbstr.c

267

unsigned long value;

crypto/libressl/crypto/asn1/a_mbstr.c

273

value = *p++;

crypto/libressl/crypto/asn1/a_mbstr.c

277

value = *p++ << 8;

crypto/libressl/crypto/asn1/a_mbstr.c

278

value |= *p++;

crypto/libressl/crypto/asn1/a_mbstr.c

280

if (UNICODE_IS_SURROGATE(value))

crypto/libressl/crypto/asn1/a_mbstr.c

285

value = (unsigned long)*p++ << 24;

crypto/libressl/crypto/asn1/a_mbstr.c

286

value |= *p++ << 16;

crypto/libressl/crypto/asn1/a_mbstr.c

287

value |= *p++ << 8;

crypto/libressl/crypto/asn1/a_mbstr.c

288

value |= *p++;

crypto/libressl/crypto/asn1/a_mbstr.c

289

if (value > UNICODE_MAX || UNICODE_IS_SURROGATE(value))

crypto/libressl/crypto/asn1/a_mbstr.c

294

ret = UTF8_getc(p, len, &value);

crypto/libressl/crypto/asn1/a_mbstr.c

302

ret = rfunc(value, arg);

crypto/libressl/crypto/asn1/a_mbstr.c

315

in_utf8(unsigned long value, void *arg)

crypto/libressl/crypto/asn1/a_mbstr.c

327

out_utf8(unsigned long value, void *arg)

crypto/libressl/crypto/asn1/a_mbstr.c

333

ret = UTF8_putc(NULL, -1, value);

crypto/libressl/crypto/asn1/a_mbstr.c

345

type_str(unsigned long value, void *arg)

crypto/libressl/crypto/asn1/a_mbstr.c

350

if ((types & B_ASN1_PRINTABLESTRING) && !is_printable(value))

crypto/libressl/crypto/asn1/a_mbstr.c

352

if ((types & B_ASN1_IA5STRING) && (value > 127))

crypto/libressl/crypto/asn1/a_mbstr.c

354

if ((types & B_ASN1_T61STRING) && (value > 0xff))

crypto/libressl/crypto/asn1/a_mbstr.c

356

if ((types & B_ASN1_BMPSTRING) && (value > 0xffff))

crypto/libressl/crypto/asn1/a_mbstr.c

367

cpy_asc(unsigned long value, void *arg)

crypto/libressl/crypto/asn1/a_mbstr.c

373

*q = value;

crypto/libressl/crypto/asn1/a_mbstr.c

381

cpy_bmp(unsigned long value, void *arg)

crypto/libressl/crypto/asn1/a_mbstr.c

387

*q++ = (value >> 8) & 0xff;

crypto/libressl/crypto/asn1/a_mbstr.c

388

*q = value & 0xff;

crypto/libressl/crypto/asn1/a_mbstr.c

396

cpy_univ(unsigned long value, void *arg)

crypto/libressl/crypto/asn1/a_mbstr.c

402

*q++ = (value >> 24) & 0xff;

crypto/libressl/crypto/asn1/a_mbstr.c

403

*q++ = (value >> 16) & 0xff;

crypto/libressl/crypto/asn1/a_mbstr.c

404

*q++ = (value >> 8) & 0xff;

crypto/libressl/crypto/asn1/a_mbstr.c

405

*q = value & 0xff;

crypto/libressl/crypto/asn1/a_mbstr.c

413

cpy_utf8(unsigned long value, void *arg)

crypto/libressl/crypto/asn1/a_mbstr.c

420

ret = UTF8_putc(*p, 0xff, value);

crypto/libressl/crypto/asn1/a_mbstr.c

427

is_printable(unsigned long value)

crypto/libressl/crypto/asn1/a_mbstr.c

431

if (value > 0x7f)

crypto/libressl/crypto/asn1/a_mbstr.c

433

ch = (int)value;

crypto/libressl/crypto/asn1/a_mbstr.c

69

int (*rfunc)(unsigned long value, void *in), void *arg);

crypto/libressl/crypto/asn1/a_mbstr.c

70

static int in_utf8(unsigned long value, void *arg);

crypto/libressl/crypto/asn1/a_mbstr.c

71

static int out_utf8(unsigned long value, void *arg);

crypto/libressl/crypto/asn1/a_mbstr.c

72

static int type_str(unsigned long value, void *arg);

crypto/libressl/crypto/asn1/a_mbstr.c

73

static int cpy_asc(unsigned long value, void *arg);

crypto/libressl/crypto/asn1/a_mbstr.c

74

static int cpy_bmp(unsigned long value, void *arg);

crypto/libressl/crypto/asn1/a_mbstr.c

75

static int cpy_univ(unsigned long value, void *arg);

crypto/libressl/crypto/asn1/a_mbstr.c

76

static int cpy_utf8(unsigned long value, void *arg);

crypto/libressl/crypto/asn1/a_mbstr.c

77

static int is_printable(unsigned long value);

crypto/libressl/crypto/asn1/a_strex.c

311

t.value.ptr = (char *)str;

crypto/libressl/crypto/asn1/a_type.c

107

if ((a->value.ptr != NULL) || (a->type == V_ASN1_NULL))

crypto/libressl/crypto/asn1/a_type.c

114

ASN1_TYPE_set(ASN1_TYPE *a, int type, void *value)

crypto/libressl/crypto/asn1/a_type.c

116

if (a->value.ptr != NULL) {

crypto/libressl/crypto/asn1/a_type.c

122

a->value.boolean = value ? 0xff : 0;

crypto/libressl/crypto/asn1/a_type.c

124

a->value.ptr = value;

crypto/libressl/crypto/asn1/a_type.c

128

ASN1_TYPE_set1(ASN1_TYPE *a, int type, const void *value)

crypto/libressl/crypto/asn1/a_type.c

130

if (!value || (type == V_ASN1_BOOLEAN)) {

crypto/libressl/crypto/asn1/a_type.c

131

void *p = (void *)value;

crypto/libressl/crypto/asn1/a_type.c

135

odup = OBJ_dup(value);

crypto/libressl/crypto/asn1/a_type.c

141

sdup = ASN1_STRING_dup(value);

crypto/libressl/crypto/asn1/a_type.c

160

result = OBJ_cmp(a->value.object, b->value.object);

crypto/libressl/crypto/asn1/a_type.c

163

result = a->value.boolean - b->value.boolean;

crypto/libressl/crypto/asn1/a_type.c

190

result = ASN1_STRING_cmp((ASN1_STRING *)a->value.ptr,

crypto/libressl/crypto/asn1/a_type.c

191

(ASN1_STRING *)b->value.ptr);

crypto/libressl/crypto/asn1/a_type.c

220

(a->value.octet_string == NULL)) {

crypto/libressl/crypto/asn1/a_type.c

224

p = ASN1_STRING_data(a->value.octet_string);

crypto/libressl/crypto/asn1/a_type.c

225

ret = ASN1_STRING_length(a->value.octet_string);

crypto/libressl/crypto/asn1/a_type.c

247

if (!ASN1_OCTET_STRING_set(ios->value, data, len))

crypto/libressl/crypto/asn1/a_type.c

269

ASN1_STRING *sp = at->value.sequence;

crypto/libressl/crypto/asn1/a_type.c

283

len = ASN1_STRING_length(ios->value);

crypto/libressl/crypto/asn1/a_type.c

286

memcpy(data, ASN1_STRING_data(ios->value), len);

crypto/libressl/crypto/asn1/a_type.c

289

ret = ASN1_STRING_length(ios->value);

crypto/libressl/crypto/asn1/a_type.c

326

if (t == NULL || t->type != V_ASN1_SEQUENCE || t->value.sequence == NULL)

crypto/libressl/crypto/asn1/a_type.c

328

return ASN1_item_unpack(t->value.sequence, it);

crypto/libressl/crypto/asn1/a_type.c

67

ASN1_OCTET_STRING *value;

crypto/libressl/crypto/asn1/a_type.c

77

.offset = offsetof(ASN1_int_octetstring, value),

crypto/libressl/crypto/asn1/a_utf8.c

100

value |= *p++ & 0x3f;

crypto/libressl/crypto/asn1/a_utf8.c

101

if (value < 0x80)

crypto/libressl/crypto/asn1/a_utf8.c

110

value = (*p++ & 0xf) << 12;

crypto/libressl/crypto/asn1/a_utf8.c

111

value |= (*p++ & 0x3f) << 6;

crypto/libressl/crypto/asn1/a_utf8.c

112

value |= *p++ & 0x3f;

crypto/libressl/crypto/asn1/a_utf8.c

113

if (value < 0x800)

crypto/libressl/crypto/asn1/a_utf8.c

116

if (value >= 0xd800 && value < 0xe000)

crypto/libressl/crypto/asn1/a_utf8.c

126

value = ((unsigned long)(*p++ & 0x7)) << 18;

crypto/libressl/crypto/asn1/a_utf8.c

127

value |= (*p++ & 0x3f) << 12;

crypto/libressl/crypto/asn1/a_utf8.c

128

value |= (*p++ & 0x3f) << 6;

crypto/libressl/crypto/asn1/a_utf8.c

129

value |= *p++ & 0x3f;

crypto/libressl/crypto/asn1/a_utf8.c

130

if (value < 0x10000)

crypto/libressl/crypto/asn1/a_utf8.c

132

if (value > UNICODE_MAX)

crypto/libressl/crypto/asn1/a_utf8.c

137

*val = value;

crypto/libressl/crypto/asn1/a_utf8.c

156

UTF8_putc(unsigned char *str, int len, unsigned long value)

crypto/libressl/crypto/asn1/a_utf8.c

158

if (value < 0x80) {

crypto/libressl/crypto/asn1/a_utf8.c

162

str[0] = (unsigned char)value;

crypto/libressl/crypto/asn1/a_utf8.c

166

if (value < 0x800) {

crypto/libressl/crypto/asn1/a_utf8.c

170

str[0] = (unsigned char)(((value >> 6) & 0x1f) | 0xc0);

crypto/libressl/crypto/asn1/a_utf8.c

171

str[1] = (unsigned char)((value & 0x3f) | 0x80);

crypto/libressl/crypto/asn1/a_utf8.c

175

if (value < 0x10000) {

crypto/libressl/crypto/asn1/a_utf8.c

176

if (UNICODE_IS_SURROGATE(value))

crypto/libressl/crypto/asn1/a_utf8.c

181

str[0] = (unsigned char)(((value >> 12) & 0xf) | 0xe0);

crypto/libressl/crypto/asn1/a_utf8.c

182

str[1] = (unsigned char)(((value >> 6) & 0x3f) | 0x80);

crypto/libressl/crypto/asn1/a_utf8.c

183

str[2] = (unsigned char)((value & 0x3f) | 0x80);

crypto/libressl/crypto/asn1/a_utf8.c

187

if (value <= UNICODE_MAX) {

crypto/libressl/crypto/asn1/a_utf8.c

191

str[0] = (unsigned char)(((value >> 18) & 0x7) | 0xf0);

crypto/libressl/crypto/asn1/a_utf8.c

192

str[1] = (unsigned char)(((value >> 12) & 0x3f) | 0x80);

crypto/libressl/crypto/asn1/a_utf8.c

193

str[2] = (unsigned char)(((value >> 6) & 0x3f) | 0x80);

crypto/libressl/crypto/asn1/a_utf8.c

194

str[3] = (unsigned char)((value & 0x3f) | 0x80);

crypto/libressl/crypto/asn1/a_utf8.c

82

unsigned long value;

crypto/libressl/crypto/asn1/a_utf8.c

90

value = *p++ & 0x7f;

crypto/libressl/crypto/asn1/a_utf8.c

99

value = (*p++ & 0x1f) << 6;

crypto/libressl/crypto/asn1/asn1_gen.c

452

sk_CONF_VALUE_value(sect, i)->value, cnf);

crypto/libressl/crypto/asn1/asn1_gen.c

473

if (!(ret->value.asn1_string = ASN1_STRING_type_new(utype)))

crypto/libressl/crypto/asn1/asn1_gen.c

478

ret->value.asn1_string->data = der;

crypto/libressl/crypto/asn1/asn1_gen.c

479

ret->value.asn1_string->length = derlen;

crypto/libressl/crypto/asn1/asn1_gen.c

641

vtmp.value = (char *)str;

crypto/libressl/crypto/asn1/asn1_gen.c

642

if (!X509V3_get_value_bool(&vtmp, &atmp->value.boolean)) {

crypto/libressl/crypto/asn1/asn1_gen.c

654

if (!(atmp->value.integer =

crypto/libressl/crypto/asn1/asn1_gen.c

666

if (!(atmp->value.object = OBJ_txt2obj(str, 0))) {

crypto/libressl/crypto/asn1/asn1_gen.c

678

if (!(atmp->value.asn1_string = ASN1_STRING_new())) {

crypto/libressl/crypto/asn1/asn1_gen.c

682

if (!ASN1_STRING_set(atmp->value.asn1_string, str, -1)) {

crypto/libressl/crypto/asn1/asn1_gen.c

686

atmp->value.asn1_string->type = utype;

crypto/libressl/crypto/asn1/asn1_gen.c

687

if (!ASN1_TIME_check(atmp->value.asn1_string)) {

crypto/libressl/crypto/asn1/asn1_gen.c

712

if (ASN1_mbstring_copy(&atmp->value.asn1_string,

crypto/libressl/crypto/asn1/asn1_gen.c

722

if (!(atmp->value.asn1_string = ASN1_STRING_new())) {

crypto/libressl/crypto/asn1/asn1_gen.c

734

atmp->value.asn1_string->data = rdata;

crypto/libressl/crypto/asn1/asn1_gen.c

735

atmp->value.asn1_string->length = rdlen;

crypto/libressl/crypto/asn1/asn1_gen.c

736

atmp->value.asn1_string->type = utype;

crypto/libressl/crypto/asn1/asn1_gen.c

739

if (ASN1_STRING_set(atmp->value.asn1_string, str,

crypto/libressl/crypto/asn1/asn1_gen.c

747

atmp->value.bit_string)) {

crypto/libressl/crypto/asn1/asn1_gen.c

759

if (!asn1_abs_set_unused_bits(atmp->value.asn1_string,

crypto/libressl/crypto/asn1/asn1_locl.h

166

int asn1_set_choice_selector(ASN1_VALUE **pval, int value, const ASN1_ITEM *it);

crypto/libressl/crypto/asn1/asn1_locl.h

193

int UTF8_putc(unsigned char *str, int len, unsigned long value);

crypto/libressl/crypto/asn1/asn_mime.c

446

if (!(hdr = mime_hdr_find(headers, "content-type")) || !hdr->value) {

crypto/libressl/crypto/asn1/asn_mime.c

454

if (!strcmp(hdr->value, "multipart/signed")) {

crypto/libressl/crypto/asn1/asn_mime.c

482

!hdr->value) {

crypto/libressl/crypto/asn1/asn_mime.c

489

if (strcmp(hdr->value, "application/x-pkcs7-signature") &&

crypto/libressl/crypto/asn1/asn_mime.c

490

strcmp(hdr->value, "application/pkcs7-signature")) {

crypto/libressl/crypto/asn1/asn_mime.c

492

ERR_asprintf_error_data("type: %s", hdr->value);

crypto/libressl/crypto/asn1/asn_mime.c

515

if (strcmp (hdr->value, "application/x-pkcs7-mime") &&

crypto/libressl/crypto/asn1/asn_mime.c

516

strcmp (hdr->value, "application/pkcs7-mime")) {

crypto/libressl/crypto/asn1/asn_mime.c

518

ERR_asprintf_error_data("type: %s", hdr->value);

crypto/libressl/crypto/asn1/asn_mime.c

582

if (!(hdr = mime_hdr_find(headers, "content-type")) || !hdr->value) {

crypto/libressl/crypto/asn1/asn_mime.c

587

if (strcmp (hdr->value, "text/plain")) {

crypto/libressl/crypto/asn1/asn_mime.c

589

ERR_asprintf_error_data("type: %s", hdr->value);

crypto/libressl/crypto/asn1/asn_mime.c

843

mime_hdr_new(char *name, char *value)

crypto/libressl/crypto/asn1/asn_mime.c

854

if (value) {

crypto/libressl/crypto/asn1/asn_mime.c

855

if (!(tmpval = strdup(value)))

crypto/libressl/crypto/asn1/asn_mime.c

86

char *value; /* Value of line e.g. "text/plain" */

crypto/libressl/crypto/asn1/asn_mime.c

864

mhdr->value = tmpval;

crypto/libressl/crypto/asn1/asn_mime.c

877

mime_hdr_addparam(MIME_HEADER *mhdr, char *name, char *value)

crypto/libressl/crypto/asn1/asn_mime.c

889

if (value) {

crypto/libressl/crypto/asn1/asn_mime.c

890

tmpval = strdup(value);

crypto/libressl/crypto/asn1/asn_mime.c

957

free(hdr->value);

crypto/libressl/crypto/asn1/asn_mime.c

97

static MIME_HEADER *mime_hdr_new(char *name, char *value);

crypto/libressl/crypto/asn1/asn_mime.c

98

static int mime_hdr_addparam(MIME_HEADER *mhdr, char *name, char *value);

crypto/libressl/crypto/asn1/asn_moid.c

115

do_create(char *value, char *name)

crypto/libressl/crypto/asn1/asn_moid.c

121

p = strrchr(value, ',');

crypto/libressl/crypto/asn1/asn_moid.c

124

ostr = value;

crypto/libressl/crypto/asn1/asn_moid.c

140

ln = value;

crypto/libressl/crypto/asn1/asn_moid.c

72

static int do_create(char *value, char *name);

crypto/libressl/crypto/asn1/asn_moid.c

89

if (!do_create(oval->value, oval->name)) {

crypto/libressl/crypto/asn1/p5_pbev2.c

269

&ret->parameter->value.sequence)) goto merr;

crypto/libressl/crypto/asn1/p5_pbev2.c

309

kdf->salt->value.octet_string = osalt;

crypto/libressl/crypto/asn1/p5_pbev2.c

362

&keyfunc->parameter->value.sequence))

crypto/libressl/crypto/asn1/t_req.c

193

bs = at->value.asn1_string;

crypto/libressl/crypto/asn1/t_req.c

235

ASN1_STRING_print(bp, ex->value);

crypto/libressl/crypto/asn1/tasn_dec.c

402

if (!asn1_c2i_primitive(&atype->value.asn1_value, content, utype, it)) {

crypto/libressl/crypto/asn1/tasn_dec.c

410

atype->value.ptr = NULL;

crypto/libressl/crypto/asn1/tasn_enc.c

597

pval = &typ->value.asn1_value;

crypto/libressl/crypto/asn1/tasn_fre.c

203

pval = &typ->value.asn1_value;

crypto/libressl/crypto/asn1/tasn_new.c

300

typ->value.ptr = NULL;

crypto/libressl/crypto/asn1/tasn_prn.c

526

fld = &atype->value.asn1_value;

crypto/libressl/crypto/asn1/tasn_utl.c

284

if (atbl->value == selector)

crypto/libressl/crypto/asn1/tasn_utl.c

91

asn1_set_choice_selector(ASN1_VALUE **pval, int value, const ASN1_ITEM *it)

crypto/libressl/crypto/asn1/tasn_utl.c

96

*sel = value;

crypto/libressl/crypto/asn1/x_algor.c

191

*ppval = algor->parameter->value.ptr;

crypto/libressl/crypto/asn1/x_attrib.c

140

X509_ATTRIBUTE_create(int nid, int atrtype, void *value)

crypto/libressl/crypto/asn1/x_attrib.c

156

ASN1_TYPE_set(val, atrtype, value);

crypto/libressl/crypto/asn1/x_exten.c

79

.offset = offsetof(X509_EXTENSION, value),

crypto/libressl/crypto/asn1/x_name.c

495

if (!asn1_string_canon(tmpentry->value, entry->value))

crypto/libressl/crypto/asn1/x_name.c

98

.offset = offsetof(X509_NAME_ENTRY, value),

crypto/libressl/crypto/bytestring/bs_cbb.c

384

CBB_add_u8(CBB *cbb, size_t value)

crypto/libressl/crypto/bytestring/bs_cbb.c

386

if (value > UINT8_MAX)

crypto/libressl/crypto/bytestring/bs_cbb.c

389

return cbb_add_u(cbb, (uint32_t)value, 1);

crypto/libressl/crypto/bytestring/bs_cbb.c

393

CBB_add_u16(CBB *cbb, size_t value)

crypto/libressl/crypto/bytestring/bs_cbb.c

395

if (value > UINT16_MAX)

crypto/libressl/crypto/bytestring/bs_cbb.c

398

return cbb_add_u(cbb, (uint32_t)value, 2);

crypto/libressl/crypto/bytestring/bs_cbb.c

402

CBB_add_u24(CBB *cbb, size_t value)

crypto/libressl/crypto/bytestring/bs_cbb.c

404

if (value > 0xffffffUL)

crypto/libressl/crypto/bytestring/bs_cbb.c

407

return cbb_add_u(cbb, (uint32_t)value, 3);

crypto/libressl/crypto/bytestring/bs_cbb.c

411

CBB_add_u32(CBB *cbb, size_t value)

crypto/libressl/crypto/bytestring/bs_cbb.c

413

if (value > 0xffffffffUL)

crypto/libressl/crypto/bytestring/bs_cbb.c

416

return cbb_add_u(cbb, (uint32_t)value, 4);

crypto/libressl/crypto/bytestring/bs_cbb.c

420

CBB_add_u64(CBB *cbb, uint64_t value)

crypto/libressl/crypto/bytestring/bs_cbb.c

424

a = value >> 32;

crypto/libressl/crypto/bytestring/bs_cbb.c

425

b = value & 0xffffffff;

crypto/libressl/crypto/bytestring/bs_cbb.c

433

CBB_add_asn1_uint64(CBB *cbb, uint64_t value)

crypto/libressl/crypto/bytestring/bs_cbb.c

443

uint8_t byte = (value >> 8 * (7 - i)) & 0xff;

crypto/libressl/crypto/bytestring/bytestring.h

491

int CBB_add_u8(CBB *cbb, size_t value);

crypto/libressl/crypto/bytestring/bytestring.h

497

int CBB_add_u16(CBB *cbb, size_t value);

crypto/libressl/crypto/bytestring/bytestring.h

503

int CBB_add_u24(CBB *cbb, size_t value);

crypto/libressl/crypto/bytestring/bytestring.h

509

int CBB_add_u32(CBB *cbb, size_t value);

crypto/libressl/crypto/bytestring/bytestring.h

515

int CBB_add_u64(CBB *cbb, uint64_t value);

crypto/libressl/crypto/bytestring/bytestring.h

522

int CBB_add_asn1_uint64(CBB *cbb, uint64_t value);

crypto/libressl/crypto/cmac/cm_pmeth.c

165

pkey_cmac_ctrl_str(EVP_PKEY_CTX *ctx, const char *type, const char *value)

crypto/libressl/crypto/cmac/cm_pmeth.c

167

if (!value)

crypto/libressl/crypto/cmac/cm_pmeth.c

170

void *p = (void *)value;

crypto/libressl/crypto/cmac/cm_pmeth.c

177

c = EVP_get_cipherbyname(value);

crypto/libressl/crypto/cmac/cm_pmeth.c

187

key = string_to_hex(value, &keylen);

crypto/libressl/crypto/cms/cms_asn1.c

1245

.value = NID_pkcs7_data,

crypto/libressl/crypto/cms/cms_asn1.c

1256

.value = NID_pkcs7_signed,

crypto/libressl/crypto/cms/cms_asn1.c

1267

.value = NID_pkcs7_enveloped,

crypto/libressl/crypto/cms/cms_asn1.c

1278

.value = NID_pkcs7_digest,

crypto/libressl/crypto/cms/cms_asn1.c

1289

.value = NID_pkcs7_encrypted,

crypto/libressl/crypto/cms/cms_asn1.c

1300

.value = NID_id_smime_ct_authData,

crypto/libressl/crypto/cms/cms_asn1.c

1311

.value = NID_id_smime_ct_compressedData,

crypto/libressl/crypto/cms/cms_lib.c

269

return &cms->d.other->value.octet_string;

crypto/libressl/crypto/cms/cms_pwri.c

184

&pwri->keyEncryptionAlgorithm->parameter->value.sequence))

crypto/libressl/crypto/cms/cms_pwri.c

354

algtmp->parameter->value.sequence != NULL)

crypto/libressl/crypto/cms/cms_pwri.c

355

kekalg = ASN1_item_unpack(algtmp->parameter->value.sequence,

crypto/libressl/crypto/conf/conf_api.c

101

return ((STACK_OF(CONF_VALUE) *)v->value);

crypto/libressl/crypto/conf/conf_api.c

107

_CONF_add_string(CONF *conf, CONF_VALUE *section, CONF_VALUE *value)

crypto/libressl/crypto/conf/conf_api.c

112

ts = (STACK_OF(CONF_VALUE) *)section->value;

crypto/libressl/crypto/conf/conf_api.c

114

value->section = section->section;

crypto/libressl/crypto/conf/conf_api.c

115

if (!sk_CONF_VALUE_push(ts, value)) {

crypto/libressl/crypto/conf/conf_api.c

119

v = lh_CONF_VALUE_insert(conf->data, value);

crypto/libressl/crypto/conf/conf_api.c

123

free(v->value);

crypto/libressl/crypto/conf/conf_api.c

142

return (v->value);

crypto/libressl/crypto/conf/conf_api.c

148

return (v->value);

crypto/libressl/crypto/conf/conf_api.c

234

sk = (STACK_OF(CONF_VALUE) *)a->value;

crypto/libressl/crypto/conf/conf_api.c

237

free(vv->value);

crypto/libressl/crypto/conf/conf_api.c

265

v->value = (char *)sk;

crypto/libressl/crypto/conf/conf_def.c

367

v->value = NULL;

crypto/libressl/crypto/conf/conf_def.c

372

if (!str_copy(conf, psection, &(v->value), start))

crypto/libressl/crypto/conf/conf_def.c

411

free(v->value);

crypto/libressl/crypto/conf/conf_def.c

673

BIO_printf(out, "[%s] %s=%s\n", a->section, a->name, a->value);

crypto/libressl/crypto/conf/conf_mod.c

101

char *value;

crypto/libressl/crypto/conf/conf_mod.c

111

static int module_run(const CONF *cnf, char *name, char *value,

crypto/libressl/crypto/conf/conf_mod.c

116

static int module_init(CONF_MODULE *pmod, char *name, char *value,

crypto/libressl/crypto/conf/conf_mod.c

118

static CONF_MODULE *module_load_dso(const CONF *cnf, char *name, char *value,

crypto/libressl/crypto/conf/conf_mod.c

153

ret = module_run(cnf, vl->name, vl->value, flags);

crypto/libressl/crypto/conf/conf_mod.c

201

module_run(const CONF *cnf, char *name, char *value, unsigned long flags)

crypto/libressl/crypto/conf/conf_mod.c

210

md = module_load_dso(cnf, name, value, flags);

crypto/libressl/crypto/conf/conf_mod.c

220

ret = module_init(md, name, value, cnf);

crypto/libressl/crypto/conf/conf_mod.c

227

name, value, ret);

crypto/libressl/crypto/conf/conf_mod.c

236

module_load_dso(const CONF *cnf, char *name, char *value, unsigned long flags)

crypto/libressl/crypto/conf/conf_mod.c

246

path = NCONF_get_string(cnf, value, "path");

crypto/libressl/crypto/conf/conf_mod.c

339

module_init(CONF_MODULE *pmod, char *name, char *value, const CONF *cnf)

crypto/libressl/crypto/conf/conf_mod.c

352

imod->value = value ? strdup(value) : NULL;

crypto/libressl/crypto/conf/conf_mod.c

355

if (!imod->name || !imod->value)

crypto/libressl/crypto/conf/conf_mod.c

392

free(imod->value);

crypto/libressl/crypto/conf/conf_mod.c

462

free(imod->value);

crypto/libressl/crypto/conf/conf_mod.c

496

return md->value;

crypto/libressl/crypto/dh/dh_pmeth.c

154

pkey_dh_ctrl_str(EVP_PKEY_CTX *ctx, const char *type, const char *value)

crypto/libressl/crypto/dh/dh_pmeth.c

162

lval = strtol(value, &ep, 10);

crypto/libressl/crypto/dh/dh_pmeth.c

163

if (value[0] == '\0' || *ep != '\0')

crypto/libressl/crypto/dh/dh_pmeth.c

173

lval = strtol(value, &ep, 10);

crypto/libressl/crypto/dh/dh_pmeth.c

174

if (value[0] == '\0' || *ep != '\0')

crypto/libressl/crypto/dsa/dsa_pmeth.c

236

pkey_dsa_ctrl_str(EVP_PKEY_CTX *ctx, const char *type, const char *value)

crypto/libressl/crypto/dsa/dsa_pmeth.c

245

lval = strtol(value, &ep, 10);

crypto/libressl/crypto/dsa/dsa_pmeth.c

246

if (value[0] == '\0' || *ep != '\0')

crypto/libressl/crypto/dsa/dsa_pmeth.c

258

lval = strtol(value, &ep, 10);

crypto/libressl/crypto/dsa/dsa_pmeth.c

259

if (value[0] == '\0' || *ep != '\0')

crypto/libressl/crypto/dsa/dsa_pmeth.c

272

(void *)EVP_get_digestbyname(value));

crypto/libressl/crypto/ec/ec_ameth.c

796

p = alg->parameter->value.sequence->data;

crypto/libressl/crypto/ec/ec_ameth.c

797

plen = alg->parameter->value.sequence->length;

crypto/libressl/crypto/ec/ec_asn1.c

1003

if (ret->type == 0 && ret->value.named_curve)

crypto/libressl/crypto/ec/ec_asn1.c

1004

ASN1_OBJECT_free(ret->value.named_curve);

crypto/libressl/crypto/ec/ec_asn1.c

1005

else if (ret->type == 1 && ret->value.parameters)

crypto/libressl/crypto/ec/ec_asn1.c

1006

ECPARAMETERS_free(ret->value.parameters);

crypto/libressl/crypto/ec/ec_asn1.c

1017

if ((ret->value.named_curve = OBJ_nid2obj(tmp)) == NULL)

crypto/libressl/crypto/ec/ec_asn1.c

1025

if ((ret->value.parameters = ec_asn1_group2parameters(

crypto/libressl/crypto/ec/ec_asn1.c

1260

tmp = OBJ_obj2nid(params->value.named_curve);

crypto/libressl/crypto/ec/ec_asn1.c

1268

ret = ec_asn1_parameters2group(params->value.parameters);

crypto/libressl/crypto/ec/ec_asn1.c

192

} value;

crypto/libressl/crypto/ec/ec_asn1.c

263

.value = NID_X9_62_onBasis,

crypto/libressl/crypto/ec/ec_asn1.c

274

.value = NID_X9_62_tpBasis,

crypto/libressl/crypto/ec/ec_asn1.c

285

.value = NID_X9_62_ppBasis,

crypto/libressl/crypto/ec/ec_asn1.c

365

.value = NID_X9_62_prime_field,

crypto/libressl/crypto/ec/ec_asn1.c

376

.value = NID_X9_62_characteristic_two_field,

crypto/libressl/crypto/ec/ec_asn1.c

532

.offset = offsetof(ECPKPARAMETERS, value.named_curve),

crypto/libressl/crypto/ec/ec_asn1.c

539

.offset = offsetof(ECPKPARAMETERS, value.parameters),

crypto/libressl/crypto/ec/ec_asn1.c

546

.offset = offsetof(ECPKPARAMETERS, value.implicitlyCA),

crypto/libressl/crypto/ec/ec_pmeth.c

414

pkey_ec_ctrl_str(EVP_PKEY_CTX * ctx, const char *type, const char *value)

crypto/libressl/crypto/ec/ec_pmeth.c

418

nid = EC_curve_nist2nid(value);

crypto/libressl/crypto/ec/ec_pmeth.c

420

nid = OBJ_sn2nid(value);

crypto/libressl/crypto/ec/ec_pmeth.c

422

nid = OBJ_ln2nid(value);

crypto/libressl/crypto/ec/ec_pmeth.c

430

if (strcmp(value, "explicit") == 0)

crypto/libressl/crypto/ec/ec_pmeth.c

432

else if (strcmp(value, "named_curve") == 0)

crypto/libressl/crypto/ec/ec_pmeth.c

439

if ((md = EVP_get_digestbyname(value)) == NULL) {

crypto/libressl/crypto/ec/ec_pmeth.c

446

co_mode = atoi(value);

crypto/libressl/crypto/engine/eng_cnf.c

115

ecmds = NCONF_get_section(cnf, value);

crypto/libressl/crypto/engine/eng_cnf.c

125

ctrlvalue = ecmd->value;

crypto/libressl/crypto/engine/eng_cnf.c

170

if (!NCONF_get_number_e(cnf, value, "init",

crypto/libressl/crypto/engine/eng_cnf.c

201

ecmd->section, ecmd->name, ecmd->value);

crypto/libressl/crypto/engine/eng_cnf.c

229

if (!int_engine_configure(cval->name, cval->value, cnf))

crypto/libressl/crypto/engine/eng_cnf.c

99

int_engine_configure(char *name, char *value, const CONF *cnf)

crypto/libressl/crypto/evp/e_gost2814789.c

163

p = params->value.sequence->data;

crypto/libressl/crypto/evp/e_gost2814789.c

166

params->value.sequence->length);

crypto/libressl/crypto/evp/evp_locl.h

261

int (*ctrl_str)(EVP_PKEY_CTX *ctx, const char *type, const char *value);

crypto/libressl/crypto/evp/p5_crpt.c

103

pbuf = param->value.sequence->data;

crypto/libressl/crypto/evp/p5_crpt.c

104

if (!(pbe = d2i_PBEPARAM(NULL, &pbuf, param->value.sequence->length))) {

crypto/libressl/crypto/evp/p5_crpt.c

94

param->value.sequence == NULL) {

crypto/libressl/crypto/evp/p5_crpt2.c

178

param->value.sequence == NULL) {

crypto/libressl/crypto/evp/p5_crpt2.c

183

pbuf = param->value.sequence->data;

crypto/libressl/crypto/evp/p5_crpt2.c

184

plen = param->value.sequence->length;

crypto/libressl/crypto/evp/p5_crpt2.c

252

pbuf = param->value.sequence->data;

crypto/libressl/crypto/evp/p5_crpt2.c

253

plen = param->value.sequence->length;

crypto/libressl/crypto/evp/p5_crpt2.c

290

salt = kdf->salt->value.octet_string->data;

crypto/libressl/crypto/evp/p5_crpt2.c

291

saltlen = kdf->salt->value.octet_string->length;

crypto/libressl/crypto/evp/pmeth_lib.c

388

EVP_PKEY_CTX_ctrl_str(EVP_PKEY_CTX *ctx, const char *name, const char *value)

crypto/libressl/crypto/evp/pmeth_lib.c

396

EVP_PKEY_CTRL_MD, value);

crypto/libressl/crypto/evp/pmeth_lib.c

398

return ctx->pmeth->ctrl_str(ctx, name, value);

crypto/libressl/crypto/evp/pmeth_lib.c

616

int (*ctrl_str)(EVP_PKEY_CTX *ctx, const char *type, const char *value))

crypto/libressl/crypto/gost/gost89imit_pmeth.c

183

pkey_gost_mac_ctrl_str(EVP_PKEY_CTX *ctx, const char *type, const char *value)

crypto/libressl/crypto/gost/gost89imit_pmeth.c

185

if (value == NULL)

crypto/libressl/crypto/gost/gost89imit_pmeth.c

188

void *p = (void *)value;

crypto/libressl/crypto/gost/gost89imit_pmeth.c

190

strlen(value), p);

crypto/libressl/crypto/gost/gost89imit_pmeth.c

197

key = string_to_hex(value, &keylen);

crypto/libressl/crypto/gost/gost_locl.h

112

extern int GostR3410_256_param_id(const char *value);

crypto/libressl/crypto/gost/gost_locl.h

113

extern int GostR3410_512_param_id(const char *value);

crypto/libressl/crypto/gost/gostr341001_params.c

107

GostR3410_256_param_id(const char *value)

crypto/libressl/crypto/gost/gostr341001_params.c

112

if (strcasecmp(GostR3410_256_params[i].name, value) == 0)

crypto/libressl/crypto/gost/gostr341001_params.c

120

GostR3410_512_param_id(const char *value)

crypto/libressl/crypto/gost/gostr341001_params.c

125

if (strcasecmp(GostR3410_512_params[i].name, value) == 0)

crypto/libressl/crypto/gost/gostr341001_pmeth.c

644

pkey_gost01_ctrl_str(EVP_PKEY_CTX *ctx, const char *type, const char *value)

crypto/libressl/crypto/gost/gostr341001_pmeth.c

650

if (value == NULL)

crypto/libressl/crypto/gost/gostr341001_pmeth.c

656

param_nid = GostR3410_512_param_id(value);

crypto/libressl/crypto/gost/gostr341001_pmeth.c

658

param_nid = GostR3410_256_param_id(value);

crypto/libressl/crypto/gost/gostr341001_pmeth.c

660

param_nid = OBJ_txt2nid(value);

crypto/libressl/crypto/gost/gostr341001_pmeth.c

668

if (value == NULL)

crypto/libressl/crypto/gost/gostr341001_pmeth.c

670

else if (strcmp(value, "gost94") == 0 ||

crypto/libressl/crypto/gost/gostr341001_pmeth.c

671

strcmp(value, "md_gost94") == 0)

crypto/libressl/crypto/gost/gostr341001_pmeth.c

673

else if (strcmp(value, "streebog256") == 0)

crypto/libressl/crypto/gost/gostr341001_pmeth.c

675

else if (strcmp(value, "streebog512") == 0)

crypto/libressl/crypto/hmac/hm_pmeth.c

218

pkey_hmac_ctrl_str(EVP_PKEY_CTX *ctx, const char *type, const char *value)

crypto/libressl/crypto/hmac/hm_pmeth.c

220

if (!value)

crypto/libressl/crypto/hmac/hm_pmeth.c

223

void *p = (void *)value;

crypto/libressl/crypto/hmac/hm_pmeth.c

230

key = string_to_hex(value, &keylen);

crypto/libressl/crypto/kdf/hkdf_evp.c

161

const char *value)

crypto/libressl/crypto/kdf/hkdf_evp.c

166

if (strcmp(value, "EXTRACT_AND_EXPAND") == 0)

crypto/libressl/crypto/kdf/hkdf_evp.c

168

else if (strcmp(value, "EXTRACT_ONLY") == 0)

crypto/libressl/crypto/kdf/hkdf_evp.c

170

else if (strcmp(value, "EXPAND_ONLY") == 0)

crypto/libressl/crypto/kdf/hkdf_evp.c

180

EVP_PKEY_CTRL_HKDF_MD, value);

crypto/libressl/crypto/kdf/hkdf_evp.c

184

value);

crypto/libressl/crypto/kdf/hkdf_evp.c

188

value);

crypto/libressl/crypto/kdf/hkdf_evp.c

191

return EVP_PKEY_CTX_str2ctrl(ctx, EVP_PKEY_CTRL_HKDF_KEY, value);

crypto/libressl/crypto/kdf/hkdf_evp.c

194

return EVP_PKEY_CTX_hex2ctrl(ctx, EVP_PKEY_CTRL_HKDF_KEY, value);

crypto/libressl/crypto/kdf/hkdf_evp.c

198

value);

crypto/libressl/crypto/kdf/hkdf_evp.c

202

value);

crypto/libressl/crypto/ocsp/ocsp_asn.c

499

.offset = offsetof(OCSP_RESPID, value.byName),

crypto/libressl/crypto/ocsp/ocsp_asn.c

506

.offset = offsetof(OCSP_RESPID, value.byKey),

crypto/libressl/crypto/ocsp/ocsp_asn.c

605

.offset = offsetof(OCSP_CERTSTATUS, value.good),

crypto/libressl/crypto/ocsp/ocsp_asn.c

612

.offset = offsetof(OCSP_CERTSTATUS, value.revoked),

crypto/libressl/crypto/ocsp/ocsp_asn.c

619

.offset = offsetof(OCSP_CERTSTATUS, value.unknown),

crypto/libressl/crypto/ocsp/ocsp_cl.c

257

*pname = rid->value.byName;

crypto/libressl/crypto/ocsp/ocsp_cl.c

260

*pid = rid->value.byKey;

crypto/libressl/crypto/ocsp/ocsp_cl.c

328

OCSP_REVOKEDINFO *rev = cst->value.revoked;

crypto/libressl/crypto/ocsp/ocsp_ext.c

127

OCSP_REQUEST_add1_ext_i2d(OCSP_REQUEST *x, int nid, void *value, int crit,

crypto/libressl/crypto/ocsp/ocsp_ext.c

130

return X509V3_add1_i2d(&x->tbsRequest->requestExtensions, nid, value,

crypto/libressl/crypto/ocsp/ocsp_ext.c

187

OCSP_ONEREQ_add1_ext_i2d(OCSP_ONEREQ *x, int nid, void *value, int crit,

crypto/libressl/crypto/ocsp/ocsp_ext.c

190

return X509V3_add1_i2d(&x->singleRequestExtensions, nid, value, crit,

crypto/libressl/crypto/ocsp/ocsp_ext.c

250

OCSP_BASICRESP_add1_ext_i2d(OCSP_BASICRESP *x, int nid, void *value, int crit,

crypto/libressl/crypto/ocsp/ocsp_ext.c

254

value, crit, flags);

crypto/libressl/crypto/ocsp/ocsp_ext.c

310

OCSP_SINGLERESP_add1_ext_i2d(OCSP_SINGLERESP *x, int nid, void *value, int crit,

crypto/libressl/crypto/ocsp/ocsp_ext.c

313

return X509V3_add1_i2d(&x->singleExtensions, nid, value, crit, flags);

crypto/libressl/crypto/ocsp/ocsp_ext.c

419

if (ASN1_OCTET_STRING_cmp(req_ext->value, resp_ext->value))

crypto/libressl/crypto/ocsp/ocsp_ht.c

134

const char *value)

crypto/libressl/crypto/ocsp/ocsp_ht.c

140

if (value) {

crypto/libressl/crypto/ocsp/ocsp_ht.c

143

if (BIO_puts(rctx->mem, value) <= 0)

crypto/libressl/crypto/ocsp/ocsp_local.h

162

} value;

crypto/libressl/crypto/ocsp/ocsp_local.h

189

} value;

crypto/libressl/crypto/ocsp/ocsp_prn.c

240

X509_NAME_print_ex(bp, rid->value.byName, 0, XN_FLAG_ONELINE);

crypto/libressl/crypto/ocsp/ocsp_prn.c

243

i2a_ASN1_STRING(bp, rid->value.byKey, V_ASN1_OCTET_STRING);

crypto/libressl/crypto/ocsp/ocsp_prn.c

265

rev = cst->value.revoked;

crypto/libressl/crypto/ocsp/ocsp_srv.c

176

if (!(cs->value.revoked = ri = OCSP_REVOKEDINFO_new()))

crypto/libressl/crypto/ocsp/ocsp_srv.c

190

cs->value.good = ASN1_NULL_new();

crypto/libressl/crypto/ocsp/ocsp_srv.c

194

cs->value.unknown = ASN1_NULL_new();

crypto/libressl/crypto/ocsp/ocsp_srv.c

249

if (!(rid->value.byKey = ASN1_OCTET_STRING_new()))

crypto/libressl/crypto/ocsp/ocsp_srv.c

251

if (!(ASN1_OCTET_STRING_set(rid->value.byKey, md,

crypto/libressl/crypto/ocsp/ocsp_srv.c

256

if (!X509_NAME_set(&rid->value.byName,

crypto/libressl/crypto/ocsp/ocsp_vfy.c

225

return X509_find_by_subject(certs, id->value.byName);

crypto/libressl/crypto/ocsp/ocsp_vfy.c

230

if (id->value.byKey->length != SHA_DIGEST_LENGTH)

crypto/libressl/crypto/ocsp/ocsp_vfy.c

232

keyhash = id->value.byKey->data;

crypto/libressl/crypto/pkcs12/p12_add.c

191

return PKCS8_decrypt(bag->value.shkeybag, pass, passlen);

crypto/libressl/crypto/pkcs12/p12_add.c

79

if (!ASN1_item_pack(obj, it, &bag->value.octet)) {

crypto/libressl/crypto/pkcs12/p12_add.c

89

safebag->value.bag = bag;

crypto/libressl/crypto/pkcs12/p12_asn.c

191

.offset = offsetof(PKCS12_BAGS, value.other),

crypto/libressl/crypto/pkcs12/p12_asn.c

198

.value = NID_x509Certificate,

crypto/libressl/crypto/pkcs12/p12_asn.c

202

.offset = offsetof(PKCS12_BAGS, value.x509cert),

crypto/libressl/crypto/pkcs12/p12_asn.c

209

.value = NID_x509Crl,

crypto/libressl/crypto/pkcs12/p12_asn.c

213

.offset = offsetof(PKCS12_BAGS, value.x509crl),

crypto/libressl/crypto/pkcs12/p12_asn.c

220

.value = NID_sdsiCertificate,

crypto/libressl/crypto/pkcs12/p12_asn.c

224

.offset = offsetof(PKCS12_BAGS, value.sdsicert),

crypto/libressl/crypto/pkcs12/p12_asn.c

297

.offset = offsetof(PKCS12_SAFEBAG, value.other),

crypto/libressl/crypto/pkcs12/p12_asn.c

304

.value = NID_keyBag,

crypto/libressl/crypto/pkcs12/p12_asn.c

308

.offset = offsetof(PKCS12_SAFEBAG, value.keybag),

crypto/libressl/crypto/pkcs12/p12_asn.c

315

.value = NID_pkcs8ShroudedKeyBag,

crypto/libressl/crypto/pkcs12/p12_asn.c

319

.offset = offsetof(PKCS12_SAFEBAG, value.shkeybag),

crypto/libressl/crypto/pkcs12/p12_asn.c

326

.value = NID_safeContentsBag,

crypto/libressl/crypto/pkcs12/p12_asn.c

330

.offset = offsetof(PKCS12_SAFEBAG, value.safes),

crypto/libressl/crypto/pkcs12/p12_asn.c

336

.value = NID_certBag,

crypto/libressl/crypto/pkcs12/p12_asn.c

340

.offset = offsetof(PKCS12_SAFEBAG, value.bag),

crypto/libressl/crypto/pkcs12/p12_asn.c

347

.value = NID_crlBag,

crypto/libressl/crypto/pkcs12/p12_asn.c

351

.offset = offsetof(PKCS12_SAFEBAG, value.bag),

crypto/libressl/crypto/pkcs12/p12_asn.c

358

.value = NID_secretBag,

crypto/libressl/crypto/pkcs12/p12_asn.c

362

.offset = offsetof(PKCS12_SAFEBAG, value.bag),

crypto/libressl/crypto/pkcs12/p12_attr.c

148

return OPENSSL_uni2asc(atype->value.bmpstring->data,

crypto/libressl/crypto/pkcs12/p12_attr.c

149

atype->value.bmpstring->length);

crypto/libressl/crypto/pkcs12/p12_crpt.c

84

param->value.sequence == NULL) {

crypto/libressl/crypto/pkcs12/p12_crpt.c

89

pbuf = param->value.sequence->data;

crypto/libressl/crypto/pkcs12/p12_crpt.c

90

if (!(pbe = d2i_PBEPARAM(NULL, &pbuf, param->value.sequence->length))) {

crypto/libressl/crypto/pkcs12/p12_kiss.c

234

fname = attrib->value.bmpstring;

crypto/libressl/crypto/pkcs12/p12_kiss.c

237

lkid = attrib->value.octet_string;

crypto/libressl/crypto/pkcs12/p12_kiss.c

243

if (!(*pkey = EVP_PKCS82PKEY(bag->value.keybag)))

crypto/libressl/crypto/pkcs12/p12_kiss.c

259

if (OBJ_obj2nid(bag->value.bag->type) != NID_x509Certificate )

crypto/libressl/crypto/pkcs12/p12_kiss.c

289

return parse_bags(bag->value.safes, pass, passlen,

crypto/libressl/crypto/pkcs12/p12_sbag.c

104

return bag->value.safes;

crypto/libressl/crypto/pkcs12/p12_sbag.c

128

return OBJ_obj2nid(bag->value.bag->type);

crypto/libressl/crypto/pkcs12/p12_sbag.c

138

if (OBJ_obj2nid(bag->value.bag->type) != NID_x509Certificate)

crypto/libressl/crypto/pkcs12/p12_sbag.c

140

return ASN1_item_unpack(bag->value.bag->value.octet, &X509_it);

crypto/libressl/crypto/pkcs12/p12_sbag.c

148

if (OBJ_obj2nid(bag->value.bag->type) != NID_x509Crl)

crypto/libressl/crypto/pkcs12/p12_sbag.c

150

return ASN1_item_unpack(bag->value.bag->value.octet, &X509_CRL_it);

crypto/libressl/crypto/pkcs12/p12_sbag.c

180

bag->value.keybag = p8;

crypto/libressl/crypto/pkcs12/p12_sbag.c

199

bag->value.shkeybag = p8;

crypto/libressl/crypto/pkcs12/p12_sbag.c

86

return bag->value.keybag;

crypto/libressl/crypto/pkcs12/p12_sbag.c

95

return bag->value.shkeybag;

crypto/libressl/crypto/pkcs12/pkcs12_local.h

84

} value;

crypto/libressl/crypto/pkcs12/pkcs12_local.h

96

} value;

crypto/libressl/crypto/pkcs7/pk7_asn1.c

101

.value = NID_pkcs7_enveloped,

crypto/libressl/crypto/pkcs7/pk7_asn1.c

112

.value = NID_pkcs7_signedAndEnveloped,

crypto/libressl/crypto/pkcs7/pk7_asn1.c

123

.value = NID_pkcs7_digest,

crypto/libressl/crypto/pkcs7/pk7_asn1.c

134

.value = NID_pkcs7_encrypted,

crypto/libressl/crypto/pkcs7/pk7_asn1.c

79

.value = NID_pkcs7_data,

crypto/libressl/crypto/pkcs7/pk7_asn1.c

90

.value = NID_pkcs7_signed,

crypto/libressl/crypto/pkcs7/pk7_attr.c

121

alg->parameter->value.integer = nbit;

crypto/libressl/crypto/pkcs7/pk7_attr.c

92

p = cap->value.sequence->data;

crypto/libressl/crypto/pkcs7/pk7_attr.c

94

ASN1_item_d2i(NULL, &p, cap->value.sequence->length,

crypto/libressl/crypto/pkcs7/pk7_doit.c

106

return p7->d.other->value.octet_string;

crypto/libressl/crypto/pkcs7/pk7_doit.c

1147

return astype->value.octet_string;

crypto/libressl/crypto/pkcs7/pk7_doit.c

1193

void *value)

crypto/libressl/crypto/pkcs7/pk7_doit.c

1195

return (add_attribute(&(p7si->auth_attr), nid, atrtype, value));

crypto/libressl/crypto/pkcs7/pk7_doit.c

1199

PKCS7_add_attribute(PKCS7_SIGNER_INFO *p7si, int nid, int atrtype, void *value)

crypto/libressl/crypto/pkcs7/pk7_doit.c

1201

return (add_attribute(&(p7si->unauth_attr), nid, atrtype, value));

crypto/libressl/crypto/pkcs7/pk7_doit.c

1205

add_attribute(STACK_OF(X509_ATTRIBUTE) **sk, int nid, int atrtype, void *value)

crypto/libressl/crypto/pkcs7/pk7_doit.c

1214

if (!(attr = X509_ATTRIBUTE_create(nid, atrtype, value)))

crypto/libressl/crypto/pkcs7/pk7_doit.c

1228

value);

crypto/libressl/crypto/pkcs7/pk7_doit.c

72

void *value);

crypto/libressl/crypto/rsa/rsa_ameth.c

1002

label = plab->parameter->value.octet_string->data;

crypto/libressl/crypto/rsa/rsa_ameth.c

1006

plab->parameter->value.octet_string->data = NULL;

crypto/libressl/crypto/rsa/rsa_ameth.c

1007

labellen = plab->parameter->value.octet_string->length;

crypto/libressl/crypto/rsa/rsa_pmeth.c

620

pkey_rsa_ctrl_str(EVP_PKEY_CTX *ctx, const char *type, const char *value)

crypto/libressl/crypto/rsa/rsa_pmeth.c

622

if (!value) {

crypto/libressl/crypto/rsa/rsa_pmeth.c

628

if (!strcmp(value, "pkcs1"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

630

else if (!strcmp(value, "none"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

632

else if (!strcmp(value, "oeap"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

634

else if (!strcmp(value, "oaep"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

636

else if (!strcmp(value, "x931"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

638

else if (!strcmp(value, "pss"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

650

if (!strcmp(value, "digest"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

652

else if (!strcmp(value, "max"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

654

else if (!strcmp(value, "auto"))

crypto/libressl/crypto/rsa/rsa_pmeth.c

657

saltlen = atoi(value);

crypto/libressl/crypto/rsa/rsa_pmeth.c

662

int nbits = atoi(value);

crypto/libressl/crypto/rsa/rsa_pmeth.c

671

if (!BN_asc2bn(&pubexp, value))

crypto/libressl/crypto/rsa/rsa_pmeth.c

682

EVP_PKEY_CTRL_RSA_MGF1_MD, value);

crypto/libressl/crypto/rsa/rsa_pmeth.c

687

EVP_PKEY_CTRL_RSA_MGF1_MD, value);

crypto/libressl/crypto/rsa/rsa_pmeth.c

691

EVP_PKEY_CTRL_MD, value);

crypto/libressl/crypto/rsa/rsa_pmeth.c

694

int saltlen = atoi(value);

crypto/libressl/crypto/rsa/rsa_pmeth.c

702

EVP_PKEY_CTRL_RSA_OAEP_MD, value);

crypto/libressl/crypto/rsa/rsa_pmeth.c

709

if ((lab = string_to_hex(value, &lablen)) == NULL)

crypto/libressl/crypto/rsa/rsa_sign.c

109

parameter.value.ptr = NULL;

crypto/libressl/crypto/stack/stack.c

311

sk_set(_STACK *st, int i, void *value)

crypto/libressl/crypto/stack/stack.c

316

return (st->data[i] = value);

crypto/libressl/crypto/ts/ts_asn1.c

1011

tst_info_der = tst_info_wrapper->value.octet_string;

crypto/libressl/crypto/ts/ts_conf.c

373

const char *extval = val->value ? val->value : val->name;

crypto/libressl/crypto/ts/ts_conf.c

413

const char *extval = val->value ? val->value : val->name;

crypto/libressl/crypto/ts/ts_conf.c

446

if (val->value)

crypto/libressl/crypto/ts/ts_conf.c

447

secs = atoi(val->value);

crypto/libressl/crypto/ts/ts_conf.c

449

if (val->value)

crypto/libressl/crypto/ts/ts_conf.c

450

millis = atoi(val->value);

crypto/libressl/crypto/ts/ts_conf.c

452

if (val->value)

crypto/libressl/crypto/ts/ts_conf.c

453

micros = atoi(val->value);

crypto/libressl/crypto/ts/ts_conf.c

499

const char *value = NCONF_get_string(conf, section, field);

crypto/libressl/crypto/ts/ts_conf.c

501

if (value) {

crypto/libressl/crypto/ts/ts_conf.c

502

if (strcmp(value, ENV_VALUE_YES) == 0)

crypto/libressl/crypto/ts/ts_conf.c

504

else if (strcmp(value, ENV_VALUE_NO) != 0) {

crypto/libressl/crypto/ts/ts_lib.c

123

ASN1_STRING_print(bio, ex->value);

crypto/libressl/crypto/ts/ts_rsp_verify.c

354

p = attr->value.sequence->data;

crypto/libressl/crypto/ts/ts_rsp_verify.c

355

return d2i_ESS_SIGNING_CERT(NULL, &p, attr->value.sequence->length);

crypto/libressl/crypto/ts/ts_rsp_verify.c

367

p = attr->value.sequence->data;

crypto/libressl/crypto/ts/ts_rsp_verify.c

368

return d2i_ESS_SIGNING_CERT_V2(NULL, &p, attr->value.sequence->length);

crypto/libressl/crypto/txt_db/txt_db.c

189

TXT_DB_get_by_index(TXT_DB *db, int idx, OPENSSL_STRING *value)

crypto/libressl/crypto/txt_db/txt_db.c

203

ret = lh_OPENSSL_STRING_retrieve(lh, value);

crypto/libressl/crypto/x509/pcy_cache.c

264

policy_cache_set_int(long *out, ASN1_INTEGER *value)

crypto/libressl/crypto/x509/pcy_cache.c

266

if (value == NULL)

crypto/libressl/crypto/x509/pcy_cache.c

268

if (value->type == V_ASN1_NEG_INTEGER)

crypto/libressl/crypto/x509/pcy_cache.c

270

*out = ASN1_INTEGER_get(value);

crypto/libressl/crypto/x509/pcy_cache.c

67

static int policy_cache_set_int(long *out, ASN1_INTEGER *value);

crypto/libressl/crypto/x509/x509_addr.c

1532

parsed_safi = strtoul(val->value, &t, 0);

crypto/libressl/crypto/x509/x509_addr.c

1535

if (val->value[0] == '\0' ||

crypto/libressl/crypto/x509/x509_addr.c

1568

s = strdup(val->value);

crypto/libressl/crypto/x509/x509_akey.c

168

if (cnf->value && !strcmp(cnf->value, "always"))

crypto/libressl/crypto/x509/x509_akey.c

172

if (cnf->value && !strcmp(cnf->value, "always"))

crypto/libressl/crypto/x509/x509_alt.c

328

if (name_cmp(cnf->name, "issuer") == 0 && cnf->value != NULL &&

crypto/libressl/crypto/x509/x509_alt.c

329

strcmp(cnf->value, "copy") == 0) {

crypto/libressl/crypto/x509/x509_alt.c

404

if (!name_cmp(cnf->name, "email") && cnf->value &&

crypto/libressl/crypto/x509/x509_alt.c

405

!strcmp(cnf->value, "copy")) {

crypto/libressl/crypto/x509/x509_alt.c

408

} else if (!name_cmp(cnf->name, "email") && cnf->value &&

crypto/libressl/crypto/x509/x509_alt.c

409

!strcmp(cnf->value, "move")) {

crypto/libressl/crypto/x509/x509_alt.c

525

X509V3_CTX *ctx, int gen_type, const char *value, int is_nc)

crypto/libressl/crypto/x509/x509_alt.c

530

if (!value) {

crypto/libressl/crypto/x509/x509_alt.c

555

if (!(obj = OBJ_txt2obj(value, 0))) {

crypto/libressl/crypto/x509/x509_alt.c

557

ERR_asprintf_error_data("value=%s", value);

crypto/libressl/crypto/x509/x509_alt.c

566

gen->d.ip = a2i_IPADDRESS_NC(value);

crypto/libressl/crypto/x509/x509_alt.c

568

gen->d.ip = a2i_IPADDRESS(value);

crypto/libressl/crypto/x509/x509_alt.c

571

ERR_asprintf_error_data("value=%s", value);

crypto/libressl/crypto/x509/x509_alt.c

577

if (!do_dirname(gen, value, ctx)) {

crypto/libressl/crypto/x509/x509_alt.c

584

if (!do_othername(gen, value, ctx)) {

crypto/libressl/crypto/x509/x509_alt.c

597

!ASN1_STRING_set(gen->d.ia5, value, strlen(value))) {

crypto/libressl/crypto/x509/x509_alt.c

618

char *name, *value;

crypto/libressl/crypto/x509/x509_alt.c

624

value = cnf->value;

crypto/libressl/crypto/x509/x509_alt.c

626

if (!value) {

crypto/libressl/crypto/x509/x509_alt.c

651

ret = a2i_GENERAL_NAME(out, method, ctx, type, value, is_nc);

crypto/libressl/crypto/x509/x509_alt.c

715

do_othername(GENERAL_NAME *gen, const char *value, X509V3_CTX *ctx)

crypto/libressl/crypto/x509/x509_alt.c

720

if (!(p = strchr(value, ';')))

crypto/libressl/crypto/x509/x509_alt.c

727

ASN1_TYPE_free(gen->d.otherName->value);

crypto/libressl/crypto/x509/x509_alt.c

728

if (!(gen->d.otherName->value = ASN1_generate_v3(p + 1, ctx)))

crypto/libressl/crypto/x509/x509_alt.c

730

objlen = p - value;

crypto/libressl/crypto/x509/x509_alt.c

733

strlcpy(objtmp, value, objlen + 1);

crypto/libressl/crypto/x509/x509_alt.c

74

static int do_othername(GENERAL_NAME *gen, const char *value, X509V3_CTX *ctx);

crypto/libressl/crypto/x509/x509_alt.c

744

do_dirname(GENERAL_NAME *gen, const char *value, X509V3_CTX *ctx)

crypto/libressl/crypto/x509/x509_alt.c

75

static int do_dirname(GENERAL_NAME *gen, const char *value, X509V3_CTX *ctx);

crypto/libressl/crypto/x509/x509_alt.c

752

sk = X509V3_get_section(ctx, value);

crypto/libressl/crypto/x509/x509_alt.c

755

ERR_asprintf_error_data("section=%s", value);

crypto/libressl/crypto/x509/x509_asid.c

801

if (strcmp(val->value, "inherit") == 0) {

crypto/libressl/crypto/x509/x509_asid.c

812

i1 = strspn(val->value, "0123456789");

crypto/libressl/crypto/x509/x509_asid.c

813

if (val->value[i1] == '\0') {

crypto/libressl/crypto/x509/x509_asid.c

817

i2 = i1 + strspn(val->value + i1, " \t");

crypto/libressl/crypto/x509/x509_asid.c

818

if (val->value[i2] != '-') {

crypto/libressl/crypto/x509/x509_asid.c

824

i2 = i2 + strspn(val->value + i2, " \t");

crypto/libressl/crypto/x509/x509_asid.c

825

i3 = i2 + strspn(val->value + i2, "0123456789");

crypto/libressl/crypto/x509/x509_asid.c

826

if (val->value[i3] != '\0') {

crypto/libressl/crypto/x509/x509_asid.c

842

char *s = strdup(val->value);

crypto/libressl/crypto/x509/x509_att.c

384

return ttmp->value.ptr;

crypto/libressl/crypto/x509/x509_conf.c

100

ret = do_ext_nconf(conf, ctx, OBJ_sn2nid(name), crit, value);

crypto/libressl/crypto/x509/x509_conf.c

103

ERR_asprintf_error_data("name=%s, value=%s", name, value);

crypto/libressl/crypto/x509/x509_conf.c

112

const char *value)

crypto/libressl/crypto/x509/x509_conf.c

117

crit = v3_check_critical(&value);

crypto/libressl/crypto/x509/x509_conf.c

118

if ((ext_type = v3_check_generic(&value)))

crypto/libressl/crypto/x509/x509_conf.c

120

value, crit, ext_type, ctx);

crypto/libressl/crypto/x509/x509_conf.c

121

return do_ext_nconf(conf, ctx, ext_nid, crit, value);

crypto/libressl/crypto/x509/x509_conf.c

128

const char *value)

crypto/libressl/crypto/x509/x509_conf.c

146

if (*value == '@')

crypto/libressl/crypto/x509/x509_conf.c

147

nval = NCONF_get_section(conf, value + 1);

crypto/libressl/crypto/x509/x509_conf.c

149

nval = X509V3_parse_list(value);

crypto/libressl/crypto/x509/x509_conf.c

153

OBJ_nid2sn(ext_nid), value);

crypto/libressl/crypto/x509/x509_conf.c

154

if (*value != '@')

crypto/libressl/crypto/x509/x509_conf.c

159

if (*value != '@')

crypto/libressl/crypto/x509/x509_conf.c

162

ext_struc = method->s2i(method, ctx, value);

crypto/libressl/crypto/x509/x509_conf.c

168

ext_struc = method->r2i(method, ctx, value);

crypto/libressl/crypto/x509/x509_conf.c

244

v3_check_critical(const char **value)

crypto/libressl/crypto/x509/x509_conf.c

246

const char *p = *value;

crypto/libressl/crypto/x509/x509_conf.c

252

*value = p;

crypto/libressl/crypto/x509/x509_conf.c

258

v3_check_generic(const char **value)

crypto/libressl/crypto/x509/x509_conf.c

261

const char *p = *value;

crypto/libressl/crypto/x509/x509_conf.c

274

*value = p;

crypto/libressl/crypto/x509/x509_conf.c

280

v3_generic_extension(const char *ext, const char *value, int crit, int gen_type,

crypto/libressl/crypto/x509/x509_conf.c

296

ext_der = string_to_hex(value, &ext_len);

crypto/libressl/crypto/x509/x509_conf.c

298

ext_der = generic_asn1(value, ctx, &ext_len);

crypto/libressl/crypto/x509/x509_conf.c

306

ERR_asprintf_error_data("value=%s", value);

crypto/libressl/crypto/x509/x509_conf.c

329

generic_asn1(const char *value, X509V3_CTX *ctx, long *ext_len)

crypto/libressl/crypto/x509/x509_conf.c

334

typ = ASN1_generate_v3(value, ctx);

crypto/libressl/crypto/x509/x509_conf.c

359

if (!(ext = X509V3_EXT_nconf(conf, ctx, val->name, val->value)))

crypto/libressl/crypto/x509/x509_conf.c

454

nconf_get_string(void *db, const char *section, const char *value)

crypto/libressl/crypto/x509/x509_conf.c

456

return NCONF_get_string(db, section, value);

crypto/libressl/crypto/x509/x509_conf.c

494

const char *value)

crypto/libressl/crypto/x509/x509_conf.c

499

return X509V3_EXT_nconf(&ctmp, ctx, name, value);

crypto/libressl/crypto/x509/x509_conf.c

506

const char *value)

crypto/libressl/crypto/x509/x509_conf.c

511

return X509V3_EXT_nconf_nid(&ctmp, ctx, ext_nid, value);

crypto/libressl/crypto/x509/x509_conf.c

515

conf_lhash_get_string(void *db, const char *section, const char *value)

crypto/libressl/crypto/x509/x509_conf.c

517

return CONF_get_string(db, section, value);

crypto/libressl/crypto/x509/x509_conf.c

71

static int v3_check_critical(const char **value);

crypto/libressl/crypto/x509/x509_conf.c

72

static int v3_check_generic(const char **value);

crypto/libressl/crypto/x509/x509_conf.c

74

int crit, const char *value);

crypto/libressl/crypto/x509/x509_conf.c

75

static X509_EXTENSION *v3_generic_extension(const char *ext, const char *value,

crypto/libressl/crypto/x509/x509_conf.c

78

const char *value);

crypto/libressl/crypto/x509/x509_conf.c

83

static unsigned char *generic_asn1(const char *value, X509V3_CTX *ctx,

crypto/libressl/crypto/x509/x509_conf.c

91

const char *value)

crypto/libressl/crypto/x509/x509_conf.c

97

crit = v3_check_critical(&value);

crypto/libressl/crypto/x509/x509_conf.c

98

if ((ext_type = v3_check_generic(&value)))

crypto/libressl/crypto/x509/x509_conf.c

99

return v3_generic_extension(name, value, crit, ext_type, ctx);

crypto/libressl/crypto/x509/x509_cpols.c

210

.value = NID_id_qt_cps,

crypto/libressl/crypto/x509/x509_cpols.c

221

.value = NID_id_qt_unotice,

crypto/libressl/crypto/x509/x509_cpols.c

402

r2i_certpol(X509V3_EXT_METHOD *method, X509V3_CTX *ctx, char *value)

crypto/libressl/crypto/x509/x509_cpols.c

417

vals = X509V3_parse_list(value);

crypto/libressl/crypto/x509/x509_cpols.c

425

if (cnf->value || !cnf->name) {

crypto/libressl/crypto/x509/x509_cpols.c

485

if ((pobj = OBJ_txt2obj(cnf->value, 0)) == NULL) {

crypto/libressl/crypto/x509/x509_cpols.c

498

if (ASN1_STRING_set(nqual->d.cpsuri, cnf->value,

crypto/libressl/crypto/x509/x509_cpols.c

499

strlen(cnf->value)) == 0)

crypto/libressl/crypto/x509/x509_cpols.c

514

if (*cnf->value != '@') {

crypto/libressl/crypto/x509/x509_cpols.c

519

unot = X509V3_get_section(ctx, cnf->value + 1);

crypto/libressl/crypto/x509/x509_cpols.c

581

if (!ASN1_STRING_set(not->exptext, cnf->value,

crypto/libressl/crypto/x509/x509_cpols.c

582

strlen(cnf->value)))

crypto/libressl/crypto/x509/x509_cpols.c

596

if (!ASN1_STRING_set(nref->organization, cnf->value,

crypto/libressl/crypto/x509/x509_cpols.c

597

strlen(cnf->value)))

crypto/libressl/crypto/x509/x509_cpols.c

608

nos = X509V3_parse_list(cnf->value);

crypto/libressl/crypto/x509/x509_cpols.c

76

X509V3_CTX *ctx, char *value);

crypto/libressl/crypto/x509/x509_crld.c

138

fnm = gnames_from_sectname(ctx, cnf->value);

crypto/libressl/crypto/x509/x509_crld.c

148

dnsect = X509V3_get_section(ctx, cnf->value);

crypto/libressl/crypto/x509/x509_crld.c

210

set_reasons(ASN1_BIT_STRING **preas, char *value)

crypto/libressl/crypto/x509/x509_crld.c

219

rsk = X509V3_parse_list(value);

crypto/libressl/crypto/x509/x509_crld.c

289

if (!set_reasons(&point->reasons, cnf->value))

crypto/libressl/crypto/x509/x509_crld.c

294

gnames_from_sectname(ctx, cnf->value);

crypto/libressl/crypto/x509/x509_crld.c

322

if (!cnf->value) {

crypto/libressl/crypto/x509/x509_crld.c

664

val = cnf->value;

crypto/libressl/crypto/x509/x509_ext.c

113

X509_CRL_add1_ext_i2d(X509_CRL *x, int nid, void *value, int crit,

crypto/libressl/crypto/x509/x509_ext.c

116

return X509V3_add1_i2d(&x->crl->extensions, nid, value, crit, flags);

crypto/libressl/crypto/x509/x509_ext.c

175

X509_add1_ext_i2d(X509 *x, int nid, void *value, int crit, unsigned long flags)

crypto/libressl/crypto/x509/x509_ext.c

177

return X509V3_add1_i2d(&x->cert_info->extensions, nid, value, crit,

crypto/libressl/crypto/x509/x509_ext.c

231

X509_REVOKED_add1_ext_i2d(X509_REVOKED *x, int nid, void *value, int crit,

crypto/libressl/crypto/x509/x509_ext.c

234

return X509V3_add1_i2d(&x->extensions, nid, value, crit, flags);

crypto/libressl/crypto/x509/x509_extku.c

199

if (val->value)

crypto/libressl/crypto/x509/x509_extku.c

200

extval = val->value;

crypto/libressl/crypto/x509/x509_genn.c

413

result = ASN1_TYPE_cmp(a->value, b->value);

crypto/libressl/crypto/x509/x509_genn.c

418

GENERAL_NAME_set0_value(GENERAL_NAME *a, int type, void *value)

crypto/libressl/crypto/x509/x509_genn.c

422

a->d.x400Address = value;

crypto/libressl/crypto/x509/x509_genn.c

426

a->d.ediPartyName = value;

crypto/libressl/crypto/x509/x509_genn.c

430

a->d.otherName = value;

crypto/libressl/crypto/x509/x509_genn.c

436

a->d.ia5 = value;

crypto/libressl/crypto/x509/x509_genn.c

440

a->d.dirn = value;

crypto/libressl/crypto/x509/x509_genn.c

444

a->d.ip = value;

crypto/libressl/crypto/x509/x509_genn.c

448

a->d.rid = value;

crypto/libressl/crypto/x509/x509_genn.c

490

ASN1_TYPE *value)

crypto/libressl/crypto/x509/x509_genn.c

498

oth->value = value;

crypto/libressl/crypto/x509/x509_genn.c

512

*pvalue = gen->d.otherName->value;

crypto/libressl/crypto/x509/x509_genn.c

78

.offset = offsetof(OTHERNAME, value),

crypto/libressl/crypto/x509/x509_info.c

279

ctmp.value = cnf->value;

crypto/libressl/crypto/x509/x509_int.c

100

return s2i_ASN1_INTEGER(meth, value);

crypto/libressl/crypto/x509/x509_int.c

98

s2i_asn1_int(X509V3_EXT_METHOD *meth, X509V3_CTX *ctx, char *value)

crypto/libressl/crypto/x509/x509_lcl.h

107

ASN1_OCTET_STRING *value;

crypto/libressl/crypto/x509/x509_lcl.h

85

ASN1_STRING *value;

crypto/libressl/crypto/x509/x509_lib.c

213

p = ext->value->data;

crypto/libressl/crypto/x509/x509_lib.c

215

return ASN1_item_d2i(NULL, &p, ext->value->length,

crypto/libressl/crypto/x509/x509_lib.c

217

return method->d2i(NULL, &p, ext->value->length);

crypto/libressl/crypto/x509/x509_lib.c

291

X509V3_add1_i2d(STACK_OF(X509_EXTENSION) **x, int nid, void *value,

crypto/libressl/crypto/x509/x509_lib.c

337

ext = X509V3_EXT_i2d(nid, crit, value);

crypto/libressl/crypto/x509/x509_ncons.c

212

tval.value = val->value;

crypto/libressl/crypto/x509/x509_obj.c

112

type = ne->value->type;

crypto/libressl/crypto/x509/x509_obj.c

113

num = ne->value->length;

crypto/libressl/crypto/x509/x509_obj.c

114

q = ne->value->data;

crypto/libressl/crypto/x509/x509_obj.c

152

q = ne->value->data;

crypto/libressl/crypto/x509/x509_pci.c

128

if (strncmp(val->value, "hex:", 4) == 0) {

crypto/libressl/crypto/x509/x509_pci.c

130

string_to_hex(val->value + 4, &val_len);

crypto/libressl/crypto/x509/x509_pci.c

157

else if (strncmp(val->value, "file:", 5) == 0) {

crypto/libressl/crypto/x509/x509_pci.c

160

BIO *b = BIO_new_file(val->value + 5, "r");

crypto/libressl/crypto/x509/x509_pci.c

191

else if (strncmp(val->value, "text:", 5) == 0) {

crypto/libressl/crypto/x509/x509_pci.c

192

val_len = strlen(val->value + 5);

crypto/libressl/crypto/x509/x509_pci.c

198

val->value + 5, val_len);

crypto/libressl/crypto/x509/x509_pci.c

231

r2i_pci(X509V3_EXT_METHOD *method, X509V3_CTX *ctx, char *value)

crypto/libressl/crypto/x509/x509_pci.c

240

vals = X509V3_parse_list(value);

crypto/libressl/crypto/x509/x509_pci.c

243

if (!cnf->name || (*cnf->name != '@' && !cnf->value)) {

crypto/libressl/crypto/x509/x509_pci.c

98

if (!(*language = OBJ_txt2obj(val->value, 0))) {

crypto/libressl/crypto/x509/x509_pmaps.c

200

if (!val->value || !val->name) {

crypto/libressl/crypto/x509/x509_pmaps.c

205

obj2 = OBJ_txt2obj(val->value, 0);

crypto/libressl/crypto/x509/x509_prn.c

109

char *value = NULL;

crypto/libressl/crypto/x509/x509_prn.c

117

p = ext->value->data;

crypto/libressl/crypto/x509/x509_prn.c

119

ext_str = ASN1_item_d2i(NULL, &p, ext->value->length,

crypto/libressl/crypto/x509/x509_prn.c

122

ext_str = method->d2i(NULL, &p, ext->value->length);

crypto/libressl/crypto/x509/x509_prn.c

128

if (!(value = method->i2s(method, ext_str))) {

crypto/libressl/crypto/x509/x509_prn.c

132

BIO_printf(out, "%*s%s", indent, "", value);

crypto/libressl/crypto/x509/x509_prn.c

148

free(value);

crypto/libressl/crypto/x509/x509_prn.c

183

ASN1_STRING_print(bp, ex->value);

crypto/libressl/crypto/x509/x509_prn.c

206

ext->value->data, ext->value->length, indent, -1);

crypto/libressl/crypto/x509/x509_prn.c

208

return BIO_dump_indent(out, (char *)ext->value->data,

crypto/libressl/crypto/x509/x509_prn.c

209

ext->value->length, indent);

crypto/libressl/crypto/x509/x509_prn.c

93

BIO_puts(out, nval->value);

crypto/libressl/crypto/x509/x509_prn.c

94

else if (!nval->value)

crypto/libressl/crypto/x509/x509_prn.c

97

BIO_printf(out, "%s:%s", nval->name, nval->value);

crypto/libressl/crypto/x509/x509_req.c

231

p = ext->value.sequence->data;

crypto/libressl/crypto/x509/x509_req.c

232

return d2i_X509_EXTENSIONS(NULL, &p, ext->value.sequence->length);

crypto/libressl/crypto/x509/x509_sxnet.c

243

if (!SXNET_add_id_asc(&sx, cnf->name, cnf->value, -1))

crypto/libressl/crypto/x509/x509_utl.c

122

X509V3_add_value_uchar(const char *name, const unsigned char *value,

crypto/libressl/crypto/x509/x509_utl.c

125

return X509V3_add_value(name, (const char *)value, extlist);

crypto/libressl/crypto/x509/x509_utl.c

136

free(conf->value);

crypto/libressl/crypto/x509/x509_utl.c

1384

(unsigned char *) v->value, -1, -1, mval))

crypto/libressl/crypto/x509/x509_utl.c

217

s2i_ASN1_INTEGER(X509V3_EXT_METHOD *method, const char *value)

crypto/libressl/crypto/x509/x509_utl.c

224

if (!value) {

crypto/libressl/crypto/x509/x509_utl.c

229

if (value[0] == '-') {

crypto/libressl/crypto/x509/x509_utl.c

230

value++;

crypto/libressl/crypto/x509/x509_utl.c

235

if (value[0] == '0' && ((value[1] == 'x') || (value[1] == 'X'))) {

crypto/libressl/crypto/x509/x509_utl.c

236

value += 2;

crypto/libressl/crypto/x509/x509_utl.c

242

ret = BN_hex2bn(&bn, value);

crypto/libressl/crypto/x509/x509_utl.c

244

ret = BN_dec2bn(&bn, value);

crypto/libressl/crypto/x509/x509_utl.c

246

if (!ret || value[ret]) {

crypto/libressl/crypto/x509/x509_utl.c

283

X509V3_get_value_bool(const CONF_VALUE *value, int *asn1_bool)

crypto/libressl/crypto/x509/x509_utl.c

287

if (!(btmp = value->value))

crypto/libressl/crypto/x509/x509_utl.c

303

X509V3_conf_err(value);

crypto/libressl/crypto/x509/x509_utl.c

308

X509V3_get_value_int(const CONF_VALUE *value, ASN1_INTEGER **aint)

crypto/libressl/crypto/x509/x509_utl.c

312

if (!(itmp = s2i_ASN1_INTEGER(NULL, value->value))) {

crypto/libressl/crypto/x509/x509_utl.c

313

X509V3_conf_err(value);

crypto/libressl/crypto/x509/x509_utl.c

84

X509V3_add_value(const char *name, const char *value,

crypto/libressl/crypto/x509/x509_utl.c

96

if (value != NULL) {

crypto/libressl/crypto/x509/x509_utl.c

97

if ((vtmp->value = strdup(value)) == NULL)

crypto/libressl/crypto/x509/x509_v3.c

270

i = ASN1_STRING_set(ex->value, data->data, data->length);

crypto/libressl/crypto/x509/x509_v3.c

289

return (ex->value);

crypto/libressl/crypto/x509/x509name.c

379

return ASN1_STRING_set_by_NID(&ne->value, bytes, len, type,

crypto/libressl/crypto/x509/x509name.c

383

i = ASN1_STRING_set(ne->value, bytes, len);

crypto/libressl/crypto/x509/x509name.c

388

ne->value->type = ASN1_PRINTABLE_type(bytes, len);

crypto/libressl/crypto/x509/x509name.c

390

ne->value->type = type;

crypto/libressl/crypto/x509/x509name.c

408

return (ne->value);

crypto/libressl/include/openssl/asn1.h

473

} value;

crypto/libressl/include/openssl/asn1.h

543

void ASN1_TYPE_set(ASN1_TYPE *a, int type, void *value);

crypto/libressl/include/openssl/asn1.h

544

int ASN1_TYPE_set1(ASN1_TYPE *a, int type, const void *value);

crypto/libressl/include/openssl/asn1.h

579

int ASN1_BIT_STRING_set_bit(ASN1_BIT_STRING *a, int n, int value);

crypto/libressl/include/openssl/asn1.h

589

int ASN1_BIT_STRING_set_asc(ASN1_BIT_STRING *bs, const char *name, int value,

crypto/libressl/include/openssl/asn1t.h

486

long value; /* NID for an object or value for an int */

crypto/libressl/include/openssl/conf.h

78

char *value;

crypto/libressl/include/openssl/conf_api.h

77

int _CONF_add_string(CONF *conf, CONF_VALUE *section, CONF_VALUE *value);

crypto/libressl/include/openssl/evp.h

1045

const char *value);

crypto/libressl/include/openssl/evp.h

1157

int (*ctrl_str)(EVP_PKEY_CTX *ctx, const char *type, const char *value));

crypto/libressl/include/openssl/ocsp.h

199

const char *value);

crypto/libressl/include/openssl/ocsp.h

287

int OCSP_REQUEST_add1_ext_i2d(OCSP_REQUEST *x, int nid, void *value,

crypto/libressl/include/openssl/ocsp.h

299

int OCSP_ONEREQ_add1_ext_i2d(OCSP_ONEREQ *x, int nid, void *value, int crit,

crypto/libressl/include/openssl/ocsp.h

313

int OCSP_BASICRESP_add1_ext_i2d(OCSP_BASICRESP *x, int nid, void *value,

crypto/libressl/include/openssl/ocsp.h

328

int OCSP_SINGLERESP_add1_ext_i2d(OCSP_SINGLERESP *x, int nid, void *value,

crypto/libressl/include/openssl/pkcs7.h

381

void *value);

crypto/libressl/include/openssl/ssl.h

1141

const SSL_CIPHER *SSL_CIPHER_get_by_value(uint16_t value);

crypto/libressl/include/openssl/ssl.h

1384

const char *SSL_alert_type_string_long(int value);

crypto/libressl/include/openssl/ssl.h

1385

const char *SSL_alert_type_string(int value);

crypto/libressl/include/openssl/ssl.h

1386

const char *SSL_alert_desc_string_long(int value);

crypto/libressl/include/openssl/ssl.h

1387

const char *SSL_alert_desc_string(int value);

crypto/libressl/include/openssl/txt_db.h

105

OPENSSL_STRING *TXT_DB_get_by_index(TXT_DB *db, int idx, OPENSSL_STRING *value);

crypto/libressl/include/openssl/txt_db.h

106

int TXT_DB_insert(TXT_DB *db, OPENSSL_STRING *value);

crypto/libressl/include/openssl/x509.h

654

X509_ATTRIBUTE *X509_ATTRIBUTE_create(int nid, int atrtype, void *value);

crypto/libressl/include/openssl/x509.h

961

int X509_add1_ext_i2d(X509 *x, int nid, void *value, int crit,

crypto/libressl/include/openssl/x509.h

976

int X509_CRL_add1_ext_i2d(X509_CRL *x, int nid, void *value,

crypto/libressl/include/openssl/x509.h

992

int X509_REVOKED_add1_ext_i2d(X509_REVOKED *x, int nid, void *value,

crypto/libressl/include/openssl/x509v3.h

124

char *(*get_string)(void *db, const char *section, const char *value);

crypto/libressl/include/openssl/x509v3.h

167

ASN1_TYPE *value;

crypto/libressl/include/openssl/x509v3.h

389

val->name, val->value);

crypto/libressl/include/openssl/x509v3.h

593

void GENERAL_NAME_set0_value(GENERAL_NAME *a, int type, void *value);

crypto/libressl/include/openssl/x509v3.h

596

ASN1_OBJECT *oid, ASN1_TYPE *value);

crypto/libressl/include/openssl/x509v3.h

693

int gen_type, const char *value, int is_nc);

crypto/libressl/include/openssl/x509v3.h

704

const char *value);

crypto/libressl/include/openssl/x509v3.h

706

const char *value);

crypto/libressl/include/openssl/x509v3.h

717

int ext_nid, const char *value);

crypto/libressl/include/openssl/x509v3.h

719

const char *name, const char *value);

crypto/libressl/include/openssl/x509v3.h

729

int X509V3_get_value_bool(const CONF_VALUE *value, int *asn1_bool);

crypto/libressl/include/openssl/x509v3.h

730

int X509V3_get_value_int(const CONF_VALUE *value, ASN1_INTEGER **aint);

crypto/libressl/include/openssl/x509v3.h

743

int X509V3_add_value(const char *name, const char *value,

crypto/libressl/include/openssl/x509v3.h

745

int X509V3_add_value_uchar(const char *name, const unsigned char *value,

crypto/libressl/include/openssl/x509v3.h

752

ASN1_INTEGER *s2i_ASN1_INTEGER(X509V3_EXT_METHOD *meth, const char *value);

crypto/libressl/include/openssl/x509v3.h

771

int X509V3_add1_i2d(STACK_OF(X509_EXTENSION) **x, int nid, void *value, int crit, unsigned long flags);

crypto/libressl/ssl/bs_cbb.c

384

CBB_add_u8(CBB *cbb, size_t value)

crypto/libressl/ssl/bs_cbb.c

386

if (value > UINT8_MAX)

crypto/libressl/ssl/bs_cbb.c

389

return cbb_add_u(cbb, (uint32_t)value, 1);

crypto/libressl/ssl/bs_cbb.c

393

CBB_add_u16(CBB *cbb, size_t value)

crypto/libressl/ssl/bs_cbb.c

395

if (value > UINT16_MAX)

crypto/libressl/ssl/bs_cbb.c

398

return cbb_add_u(cbb, (uint32_t)value, 2);

crypto/libressl/ssl/bs_cbb.c

402

CBB_add_u24(CBB *cbb, size_t value)

crypto/libressl/ssl/bs_cbb.c

404

if (value > 0xffffffUL)

crypto/libressl/ssl/bs_cbb.c

407

return cbb_add_u(cbb, (uint32_t)value, 3);

crypto/libressl/ssl/bs_cbb.c

411

CBB_add_u32(CBB *cbb, size_t value)

crypto/libressl/ssl/bs_cbb.c

413

if (value > 0xffffffffUL)

crypto/libressl/ssl/bs_cbb.c

416

return cbb_add_u(cbb, (uint32_t)value, 4);

crypto/libressl/ssl/bs_cbb.c

420

CBB_add_u64(CBB *cbb, uint64_t value)

crypto/libressl/ssl/bs_cbb.c

424

a = value >> 32;

crypto/libressl/ssl/bs_cbb.c

425

b = value & 0xffffffff;

crypto/libressl/ssl/bs_cbb.c

433

CBB_add_asn1_uint64(CBB *cbb, uint64_t value)

crypto/libressl/ssl/bs_cbb.c

443

uint8_t byte = (value >> 8 * (7 - i)) & 0xff;

crypto/libressl/ssl/bytestring.h

491

int CBB_add_u8(CBB *cbb, size_t value);

crypto/libressl/ssl/bytestring.h

497

int CBB_add_u16(CBB *cbb, size_t value);

crypto/libressl/ssl/bytestring.h

503

int CBB_add_u24(CBB *cbb, size_t value);

crypto/libressl/ssl/bytestring.h

509

int CBB_add_u32(CBB *cbb, size_t value);

crypto/libressl/ssl/bytestring.h

515

int CBB_add_u64(CBB *cbb, uint64_t value);

crypto/libressl/ssl/bytestring.h

522

int CBB_add_asn1_uint64(CBB *cbb, uint64_t value);

crypto/libressl/ssl/s3_lib.c

1430

ssl3_get_cipher_by_value(uint16_t value)

crypto/libressl/ssl/s3_lib.c

1432

return ssl3_get_cipher_by_id(SSL3_CK_ID | value);

crypto/libressl/ssl/ssl_asn1.c

129

if (!CBB_add_asn1(&sidctx, &value, CBS_ASN1_OCTETSTRING))

crypto/libressl/ssl/ssl_asn1.c

131

if (!CBB_add_bytes(&value, s->sid_ctx, s->sid_ctx_length))

crypto/libressl/ssl/ssl_asn1.c

149

if (!CBB_add_asn1(&hostname, &value, CBS_ASN1_OCTETSTRING))

crypto/libressl/ssl/ssl_asn1.c

151

if (!CBB_add_bytes(&value, (const uint8_t *)s->tlsext_hostname,

crypto/libressl/ssl/ssl_asn1.c

172

if (!CBB_add_asn1(&ticket, &value, CBS_ASN1_OCTETSTRING))

crypto/libressl/ssl/ssl_asn1.c

174

if (!CBB_add_bytes(&value, s->tlsext_tick, s->tlsext_ticklen))

crypto/libressl/ssl/ssl_asn1.c

51

CBB peer_cert, sidctx, verify_result, hostname, lifetime, ticket, value;

crypto/libressl/ssl/ssl_ciph.c

1411

SSL_CIPHER_get_by_value(uint16_t value)

crypto/libressl/ssl/ssl_ciph.c

1413

return ssl3_get_cipher_by_value(value);

crypto/libressl/ssl/ssl_clnt.c

2129

if (!CBB_add_u16(cert_verify, sigalg->value))

crypto/libressl/ssl/ssl_lib.c

2928

ssl_info_callback(const SSL *s, int type, int value)

crypto/libressl/ssl/ssl_lib.c

2935

cb(s, type, value);

crypto/libressl/ssl/ssl_locl.h

1290

void ssl_info_callback(const SSL *s, int type, int value);

crypto/libressl/ssl/ssl_locl.h

1373

const SSL_CIPHER *ssl3_get_cipher_by_value(uint16_t value);

crypto/libressl/ssl/ssl_sigalgs.c

100

.value = SIGALG_RSA_PSS_RSAE_SHA384,

crypto/libressl/ssl/ssl_sigalgs.c

107

.value = SIGALG_RSA_PSS_RSAE_SHA512,

crypto/libressl/ssl/ssl_sigalgs.c

114

.value = SIGALG_RSA_PSS_PSS_SHA256,

crypto/libressl/ssl/ssl_sigalgs.c

121

.value = SIGALG_RSA_PSS_PSS_SHA384,

crypto/libressl/ssl/ssl_sigalgs.c

128

.value = SIGALG_RSA_PSS_PSS_SHA512,

crypto/libressl/ssl/ssl_sigalgs.c

135

.value = SIGALG_RSA_PKCS1_SHA224,

crypto/libressl/ssl/ssl_sigalgs.c

141

.value = SIGALG_ECDSA_SECP224R1_SHA224,

crypto/libressl/ssl/ssl_sigalgs.c

147

.value = SIGALG_RSA_PKCS1_SHA1,

crypto/libressl/ssl/ssl_sigalgs.c

153

.value = SIGALG_ECDSA_SHA1,

crypto/libressl/ssl/ssl_sigalgs.c

159

.value = SIGALG_RSA_PKCS1_MD5_SHA1,

crypto/libressl/ssl/ssl_sigalgs.c

165

.value = SIGALG_NONE,

crypto/libressl/ssl/ssl_sigalgs.c

213

ssl_sigalg_lookup(uint16_t value)

crypto/libressl/ssl/ssl_sigalgs.c

217

for (i = 0; sigalgs[i].value != SIGALG_NONE; i++) {

crypto/libressl/ssl/ssl_sigalgs.c

218

if (sigalgs[i].value == value)

crypto/libressl/ssl/ssl_sigalgs.c

226

ssl_sigalg_from_value(SSL *s, uint16_t value)

crypto/libressl/ssl/ssl_sigalgs.c

236

if (values[i] == value)

crypto/libressl/ssl/ssl_sigalgs.c

237

return ssl_sigalg_lookup(value);

crypto/libressl/ssl/ssl_sigalgs.c

32

.value = SIGALG_RSA_PKCS1_SHA512,

crypto/libressl/ssl/ssl_sigalgs.c

38

.value = SIGALG_ECDSA_SECP521R1_SHA512,

crypto/libressl/ssl/ssl_sigalgs.c

46

.value = SIGALG_GOSTR12_512_STREEBOG_512,

crypto/libressl/ssl/ssl_sigalgs.c

53

.value = SIGALG_RSA_PKCS1_SHA384,

crypto/libressl/ssl/ssl_sigalgs.c

59

.value = SIGALG_ECDSA_SECP384R1_SHA384,

crypto/libressl/ssl/ssl_sigalgs.c

66

.value = SIGALG_RSA_PKCS1_SHA256,

crypto/libressl/ssl/ssl_sigalgs.c

72

.value = SIGALG_ECDSA_SECP256R1_SHA256,

crypto/libressl/ssl/ssl_sigalgs.c

80

.value = SIGALG_GOSTR12_256_STREEBOG_256,

crypto/libressl/ssl/ssl_sigalgs.c

86

.value = SIGALG_GOSTR01_GOST94,

crypto/libressl/ssl/ssl_sigalgs.c

93

.value = SIGALG_RSA_PSS_RSAE_SHA256,

crypto/libressl/ssl/ssl_sigalgs.h

64

uint16_t value;

crypto/libressl/ssl/ssl_srvr.c

1477

if (!CBB_add_u16(&server_kex, sigalg->value)) {

crypto/libressl/ssl/ssl_stat.c

552

SSL_alert_type_string_long(int value)

crypto/libressl/ssl/ssl_stat.c

554

value >>= 8;

crypto/libressl/ssl/ssl_stat.c

555

if (value == SSL3_AL_WARNING)

crypto/libressl/ssl/ssl_stat.c

557

else if (value == SSL3_AL_FATAL)

crypto/libressl/ssl/ssl_stat.c

564

SSL_alert_type_string(int value)

crypto/libressl/ssl/ssl_stat.c

566

value >>= 8;

crypto/libressl/ssl/ssl_stat.c

567

if (value == SSL3_AL_WARNING)

crypto/libressl/ssl/ssl_stat.c

569

else if (value == SSL3_AL_FATAL)

crypto/libressl/ssl/ssl_stat.c

576

SSL_alert_desc_string(int value)

crypto/libressl/ssl/ssl_stat.c

580

switch (value & 0xff) {

crypto/libressl/ssl/ssl_stat.c

673

SSL_alert_desc_string_long(int value)

crypto/libressl/ssl/ssl_stat.c

677

switch (value & 0xff) {

crypto/libressl/ssl/tls13_client.c

968

if (!CBB_add_u16(cbb, sigalg->value))

crypto/libressl/ssl/tls13_server.c

766

if (!CBB_add_u16(cbb, sigalg->value))

crypto/openssh/audit-bsm.c

183

scf_value_t *value = NULL;

crypto/openssh/audit-bsm.c

210

value = scf_value_create(handle);

crypto/openssh/audit-bsm.c

211

if (value == NULL)

crypto/openssh/audit-bsm.c

214

ret = scf_property_get_value(property, value);

crypto/openssh/audit-bsm.c

218

ret = scf_value_get_astring(value, auditstring, len);

crypto/openssh/audit-bsm.c

222

scf_value_destroy(value);

crypto/openssh/auth-pam.c

1241

do_pam_putenv(char *name, char *value)

crypto/openssh/auth-pam.c

1247

len = strlen(name) + strlen(value) + 2;

crypto/openssh/auth-pam.c

1250

snprintf(compound, len, "%s=%s", name, value);

crypto/openssh/auth-pam.c

181

pthread_exit(void *value)

crypto/openssh/auth-pam.c

222

pthread_join(sp_pthread_t thread, void **value)

crypto/openssh/auth2-gss.c

165

recv_tok.value = p;

crypto/openssh/auth2-gss.c

176

(r = sshpkt_put_string(ssh, send_tok.value,

crypto/openssh/auth2-gss.c

188

(r = sshpkt_put_string(ssh, send_tok.value,

crypto/openssh/auth2-gss.c

228

recv_tok.value = p;

crypto/openssh/auth2-gss.c

235

free(recv_tok.value);

crypto/openssh/auth2-gss.c

301

mic.value = p;

crypto/openssh/auth2-gss.c

306

if ((gssbuf.value = sshbuf_mutable_ptr(b)) == NULL)

crypto/openssh/auth2-gss.c

316

free(mic.value);

crypto/openssh/channels.c

5281

u_int i, value;

crypto/openssh/channels.c

5309

if (sscanf(data + 2 * i, "%2x", &value) != 1) {

crypto/openssh/channels.c

5313

sc->x11_saved_data[i] = value;

crypto/openssh/gss-genr.c

129

if ((r = sshbuf_put(b, msg.value, msg.length)) != 0 ||

crypto/openssh/gss-genr.c

141

if ((r = sshbuf_put(b, msg.value, msg.length)) != 0 ||

crypto/openssh/gss-genr.c

237

gssbuf.value = val;

crypto/openssh/gss-genr.c

238

gssbuf.length = strlen(gssbuf.value);

crypto/openssh/gss-genr.c

244

free(gssbuf.value);

crypto/openssh/gss-genr.c

58

g->value = p;

crypto/openssh/gss-serv-krb5.c

104

name, (char *)client->displayname.value);

crypto/openssh/gss-serv-krb5.c

158

client->exportedname.value, &princ))) {

crypto/openssh/gss-serv-krb5.c

94

if ((retval = krb5_parse_name(krb_context, client->exportedname.value,

crypto/openssh/gss-serv.c

222

tok = ename->value;

crypto/openssh/gss-serv.c

264

name->value = xmalloc(name->length+1);

crypto/openssh/gss-serv.c

265

memcpy(name->value, tok+offset, name->length);

crypto/openssh/gss-serv.c

266

((char *)name->value)[name->length] = 0;

crypto/openssh/gss-serv.c

364

gssapi_client.exportedname.value == NULL) {

crypto/openssh/gss-serv.c

399

gssapi_client.displayname.value == NULL)

crypto/openssh/gss-serv.c

401

return (char *)gssapi_client.displayname.value;

crypto/openssh/kex.c

428

const u_char *value, size_t vlen)

crypto/openssh/kex.c

435

if (memchr(value, '\0', vlen) != NULL) {

crypto/openssh/kex.c

439

debug_f("%s=<%s>", name, value);

crypto/openssh/kex.c

441

ssh->kex->server_sig_algs = xstrdup((const char *)value);

crypto/openssh/kex.c

444

if ((r = kex_ext_info_check_ver(ssh->kex, name, value, vlen,

crypto/openssh/kex.c

450

if ((r = kex_ext_info_check_ver(ssh->kex, name, value, vlen,

crypto/openssh/kex.c

462

const u_char *value, size_t vlen)

crypto/openssh/kex.c

467

if ((r = kex_ext_info_check_ver(ssh->kex, name, value, vlen,

crypto/openssh/krl.c

1010

struct sshbuf *value = NULL;

crypto/openssh/krl.c

1015

(r = sshbuf_froms(sect, &value)) != 0) {

crypto/openssh/krl.c

1027

name, critical, sshbuf_len(value));

crypto/openssh/krl.c

1038

sshbuf_free(value);

crypto/openssh/krl.c

830

struct sshbuf *value = NULL;

crypto/openssh/krl.c

835

(r = sshbuf_froms(subsect, &value)) != 0) {

crypto/openssh/krl.c

848

name, critical, sshbuf_len(value));

crypto/openssh/krl.c

860

sshbuf_free(value);

crypto/openssh/misc.c

1842

int value;

crypto/openssh/misc.c

1884

return ipqos[i].value;

crypto/openssh/misc.c

1900

if (ipqos[i].value == iptos)

crypto/openssh/misc.c

2317

const char *value)

crypto/openssh/misc.c

2369

env[i] = xmalloc(strlen(name) + 1 + strlen(value) + 1);

crypto/openssh/misc.c

2370

snprintf(env[i], strlen(name) + 1 + strlen(value) + 1, "%s=%s", name, value);

crypto/openssh/misc.h

190

const char *value);

crypto/openssh/monitor.c

1894

free(in.value);

crypto/openssh/monitor.c

1898

(r = sshbuf_put_string(m, out.value, out.length)) != 0 ||

crypto/openssh/monitor.c

1929

free(gssbuf.value);

crypto/openssh/monitor.c

1930

free(mic.value);

crypto/openssh/monitor_wrap.c

1013

if ((r = sshbuf_put_string(m, in->value, in->length)) != 0)

crypto/openssh/monitor_wrap.c

1042

if ((r = sshbuf_put_string(m, gssbuf->value, gssbuf->length)) != 0 ||

crypto/openssh/monitor_wrap.c

1043

(r = sshbuf_put_string(m, gssmic->value, gssmic->length)) != 0)

crypto/openssh/pkcs11.h

462

void *value;

crypto/openssh/readconf.c

1023

return multistate_ptr[i].value;

crypto/openssh/readconf.c

1050

int r, oactive, negated, opcode, *intptr, value, value2, cmdline = 0;

crypto/openssh/readconf.c

1133

value = -1;

crypto/openssh/readconf.c

1134

else if ((value = convtime(arg)) == -1) {

crypto/openssh/readconf.c

1140

*intptr = value;

crypto/openssh/readconf.c

1153

value = -1;

crypto/openssh/readconf.c

1157

value = multistate_ptr[i].value;

crypto/openssh/readconf.c

1161

if (value != -1) {

crypto/openssh/readconf.c

1163

*intptr = value;

crypto/openssh/readconf.c

1179

if ((value = parse_multistate_value(arg, filename, linenum,

crypto/openssh/readconf.c

1186

*intptr = value;

crypto/openssh/readconf.c

1366

value = *uintptr == 0; /* was array empty when we started? */

crypto/openssh/readconf.c

1383

if (*activep && value) {

crypto/openssh/readconf.c

1477

value = a2port(arg);

crypto/openssh/readconf.c

1478

if (value <= 0) {

crypto/openssh/readconf.c

1484

options->port = value;

crypto/openssh/readconf.c

1491

if ((errstr = atoi_err(arg, &value)) != NULL) {

crypto/openssh/readconf.c

1497

*intptr = value;

crypto/openssh/readconf.c

1581

value = log_level_number(arg);

crypto/openssh/readconf.c

1582

if (value == SYSLOG_LEVEL_NOT_SET) {

crypto/openssh/readconf.c

1588

*log_level_ptr = (LogLevel) value;

crypto/openssh/readconf.c

1594

value = log_facility_number(arg);

crypto/openssh/readconf.c

1595

if (value == SYSLOG_FACILITY_NOT_SET) {

crypto/openssh/readconf.c

1601

*log_facility_ptr = (SyslogFacility) value;

crypto/openssh/readconf.c

1781

value = match_cfg_line(options, &str, pw, host, original_host,

crypto/openssh/readconf.c

1784

if (value < 0) {

crypto/openssh/readconf.c

1789

*activep = (flags & SSHCONF_NEVERMATCH) ? 0 : value;

crypto/openssh/readconf.c

1808

value = SSH_ESCAPECHAR_NONE;

crypto/openssh/readconf.c

1810

value = (u_char) arg[0];

crypto/openssh/readconf.c

1813

value = (u_char) arg[1] & 31;

crypto/openssh/readconf.c

1820

*intptr = value;

crypto/openssh/readconf.c

1917

value = 0;

crypto/openssh/readconf.c

1920

value = 0;

crypto/openssh/readconf.c

1922

value = 1;

crypto/openssh/readconf.c

1924

value = 1;

crypto/openssh/readconf.c

1931

*intptr = value;

crypto/openssh/readconf.c

1952

value = a2tun(arg, &value2);

crypto/openssh/readconf.c

1953

if (value == SSH_TUNID_ERR) {

crypto/openssh/readconf.c

1959

options->tun_local = value;

crypto/openssh/readconf.c

1986

value = 0;

crypto/openssh/readconf.c

2048

value = -1;

crypto/openssh/readconf.c

2052

if (value != 0)

crypto/openssh/readconf.c

2053

ret = value;

crypto/openssh/readconf.c

2058

if ((value = parse_ipqos(arg)) == -1) {

crypto/openssh/readconf.c

2065

value2 = value;

crypto/openssh/readconf.c

2072

options->ip_qos_interactive = value;

crypto/openssh/readconf.c

2204

value = strtol(arg, &endofnumber, 8);

crypto/openssh/readconf.c

2205

if (arg == endofnumber || value < 0 || value > 0777) {

crypto/openssh/readconf.c

2209

options->fwd_opts.streamlocal_bind_mask = (mode_t)value;

crypto/openssh/readconf.c

2228

if ((value = ssh_digest_alg_by_name(arg)) == -1) {

crypto/openssh/readconf.c

2234

*intptr = value;

crypto/openssh/readconf.c

2255

value = parse_multistate_value(arg, filename, linenum,

crypto/openssh/readconf.c

2258

if (value == 3 && arg2 != NULL) {

crypto/openssh/readconf.c

2265

} else if (value == -1 && arg2 == NULL) {

crypto/openssh/readconf.c

2271

value = 1; /* yes */

crypto/openssh/readconf.c

2272

} else if (value == -1 || arg2 != NULL) {

crypto/openssh/readconf.c

2278

options->add_keys_to_agent = value;

crypto/openssh/readconf.c

2319

value = -1;

crypto/openssh/readconf.c

2321

if (value != -1) {

crypto/openssh/readconf.c

2328

value = SSH_KEYSTROKE_DEFAULT_INTERVAL_MS;

crypto/openssh/readconf.c

2331

value = 0;

crypto/openssh/readconf.c

2334

&value)) != NULL) {

crypto/openssh/readconf.c

2339

if (value <= 0 || value > 1000) {

crypto/openssh/readconf.c

2350

if (value == -1) {

crypto/openssh/readconf.c

2357

*intptr = value;

crypto/openssh/readconf.c

3347

if (m[i].value == val)

crypto/openssh/readconf.c

910

int value;

crypto/openssh/servconf.c

1201

int value;

crypto/openssh/servconf.c

1258

int cmdline = 0, *intptr, value, value2, n, port, oactive, r;

crypto/openssh/servconf.c

1370

if ((value = convtime(arg)) == -1)

crypto/openssh/servconf.c

1374

*intptr = value;

crypto/openssh/servconf.c

1423

value = -1;

crypto/openssh/servconf.c

1426

value = multistate_ptr[i].value;

crypto/openssh/servconf.c

1430

if (value == -1)

crypto/openssh/servconf.c

1434

*intptr = value;

crypto/openssh/servconf.c

1550

value = 0;

crypto/openssh/servconf.c

1555

value |= PUBKEYAUTH_TOUCH_REQUIRED;

crypto/openssh/servconf.c

1557

value |= PUBKEYAUTH_VERIFY_REQUIRED;

crypto/openssh/servconf.c

1565

*intptr = value;

crypto/openssh/servconf.c

1620

if ((errstr = atoi_err(arg, &value)) != NULL)

crypto/openssh/servconf.c

1624

*intptr = value;

crypto/openssh/servconf.c

1662

value = 0;

crypto/openssh/servconf.c

1665

value = 1;

crypto/openssh/servconf.c

1667

value = 0;

crypto/openssh/servconf.c

1670

value = 1;

crypto/openssh/servconf.c

1674

*intptr = value;

crypto/openssh/servconf.c

1726

value = log_facility_number(arg);

crypto/openssh/servconf.c

1727

if (value == SYSLOG_FACILITY_NOT_SET)

crypto/openssh/servconf.c

1731

*log_facility_ptr = (SyslogFacility) value;

crypto/openssh/servconf.c

1737

value = log_level_number(arg);

crypto/openssh/servconf.c

1738

if (value == SYSLOG_LEVEL_NOT_SET)

crypto/openssh/servconf.c

1742

*log_level_ptr = (LogLevel) value;

crypto/openssh/servconf.c

1971

switch (n = sscanf(arg, "%d:%d", &value, &value2)) {

crypto/openssh/servconf.c

1977

if (value < 0 || value > 32)

crypto/openssh/servconf.c

1984

options->per_source_masklen_ipv4 = value;

crypto/openssh/servconf.c

1995

value = INT_MAX;

crypto/openssh/servconf.c

1997

if ((errstr = atoi_err(arg, &value)) != NULL)

crypto/openssh/servconf.c

2002

options->per_source_max_startups = value;

crypto/openssh/servconf.c

2023

value = -1;

crypto/openssh/servconf.c

2058

if ((errstr = atoi_err(arg+13, &value)) != NULL)

crypto/openssh/servconf.c

2063

if ((errstr = atoi_err(arg+13, &value)) != NULL)

crypto/openssh/servconf.c

2068

value = PER_SOURCE_PENALTY_OVERFLOW_DENY_ALL;

crypto/openssh/servconf.c

2071

value = PER_SOURCE_PENALTY_OVERFLOW_PERMISSIVE;

crypto/openssh/servconf.c

2074

value = PER_SOURCE_PENALTY_OVERFLOW_DENY_ALL;

crypto/openssh/servconf.c

2077

value = PER_SOURCE_PENALTY_OVERFLOW_PERMISSIVE;

crypto/openssh/servconf.c

2083

if (value == -1 && (value = convtime(p)) == -1) {

crypto/openssh/servconf.c

2088

*intptr = value;

crypto/openssh/servconf.c

2215

value = -1;

crypto/openssh/servconf.c

2218

value = tunmode_desc[i].val;

crypto/openssh/servconf.c

2221

if (value == -1)

crypto/openssh/servconf.c

2225

*intptr = value;

crypto/openssh/servconf.c

2233

value = 0;

crypto/openssh/servconf.c

2240

value++;

crypto/openssh/servconf.c

2318

if (value == 0) {

crypto/openssh/servconf.c

2328

value = match_cfg_line(&str, linenum,

crypto/openssh/servconf.c

2330

if (value < 0)

crypto/openssh/servconf.c

2333

*activep = (*inc_flags & SSHCFG_NEVERMATCH) ? 0 : value;

crypto/openssh/servconf.c

2456

if ((value = parse_ipqos(arg)) == -1)

crypto/openssh/servconf.c

2461

value2 = value;

crypto/openssh/servconf.c

2466

options->ip_qos_interactive = value;

crypto/openssh/servconf.c

2528

value = 0; /* seen "any" pseudo-method */

crypto/openssh/servconf.c

2536

value = 1;

crypto/openssh/servconf.c

2537

} else if (value) {

crypto/openssh/servconf.c

2565

value = strtol(arg, &p, 8);

crypto/openssh/servconf.c

2566

if (arg == p || value < 0 || value > 0777)

crypto/openssh/servconf.c

2570

options->fwd_opts.streamlocal_bind_mask = (mode_t)value;

crypto/openssh/servconf.c

2582

if ((value = ssh_digest_alg_by_name(arg)) == -1)

crypto/openssh/servconf.c

2586

options->fingerprint_hash = value;

crypto/openssh/servconf.c

2988

if (m[i].value == val)

crypto/openssh/session.c

1144

if ((value = strchr(cp, '=')) == NULL) {

crypto/openssh/session.c

1148

*value++ = '\0';

crypto/openssh/session.c

1149

child_set_env(&env, &envsize, cp, value);

crypto/openssh/session.c

837

char *line = NULL, *cp, *value;

crypto/openssh/session.c

855

value = strchr(cp, '=');

crypto/openssh/session.c

856

if (value == NULL) {

crypto/openssh/session.c

865

*value = '\0';

crypto/openssh/session.c

866

value++;

crypto/openssh/session.c

870

child_set_env(env, envsize, cp, value);

crypto/openssh/session.c

976

char *ocp, *cp, *value, **env, *laddr;

crypto/openssh/sftp-client.c

503

u_char *value;

crypto/openssh/sftp-client.c

508

(r = sshbuf_get_string(msg, &value, &vlen)) != 0)

crypto/openssh/sftp-client.c

511

strcmp((char *)value, "1") == 0) {

crypto/openssh/sftp-client.c

515

strcmp((char *)value, "2") == 0) {

crypto/openssh/sftp-client.c

519

strcmp((char *)value, "2") == 0) {

crypto/openssh/sftp-client.c

523

strcmp((char *)value, "1") == 0) {

crypto/openssh/sftp-client.c

527

strcmp((char *)value, "1") == 0) {

crypto/openssh/sftp-client.c

531

strcmp((char *)value, "1") == 0) {

crypto/openssh/sftp-client.c

535

strcmp((char *)value, "1") == 0) {

crypto/openssh/sftp-client.c

539

strcmp((char *)value, "1") == 0) {

crypto/openssh/sftp-client.c

543

strcmp((char *)value, "1") == 0) {

crypto/openssh/sftp-client.c

548

strcmp((char *)value, "1") == 0) {

crypto/openssh/sftp-client.c

554

name, value);

crypto/openssh/sftp-client.c

559

free(value);

crypto/openssh/sk-api.h

78

char *value;

crypto/openssh/ssh-keygen.c

1630

cert_ext_add(const char *key, const char *value, int iscrit)

crypto/openssh/ssh-keygen.c

1634

cert_ext[ncert_ext].val = value == NULL ? NULL : xstrdup(value);

crypto/openssh/ssh-keygen.c

459

buffer_get_bignum_bits(struct sshbuf *b, BIGNUM *value)

crypto/openssh/ssh-keygen.c

470

if (BN_bin2bn(sshbuf_ptr(b), bytes, value) == NULL)

crypto/openssh/sshconnect2.c

836

(r = sshpkt_put_string(ssh, send_tok.value,

crypto/openssh/sshconnect2.c

860

if ((gssbuf.value = sshbuf_mutable_ptr(b)) == NULL)

crypto/openssh/sshconnect2.c

869

(r = sshpkt_put_string(ssh, mic.value,

crypto/openssh/sshconnect2.c

944

recv_tok.value = p;

crypto/openssh/sshconnect2.c

982

recv_tok.value = p;

games/adventure/vocab.c

124

vocab(const char *word, int type, int value)

games/adventure/vocab.c

145

h->val = value;

games/arithmetic/arithmetic.c

283

int value, penalty; /* Penalised value and its penalty. */

games/arithmetic/arithmetic.c

295

penalise(int value, int op, int operand)

games/arithmetic/arithmetic.c

305

p->value = value;

games/arithmetic/arithmetic.c

317

int value;

games/arithmetic/arithmetic.c

321

value = random() % (maxval + penalty[op][operand]);

games/arithmetic/arithmetic.c

327

if (value < maxval)

games/arithmetic/arithmetic.c

328

return(value);

games/arithmetic/arithmetic.c

329

value -= maxval;

games/arithmetic/arithmetic.c

336

if (p->penalty > value) {

games/arithmetic/arithmetic.c

337

value = p->value;

games/arithmetic/arithmetic.c

344

return(value);

games/arithmetic/arithmetic.c

346

value -= p->penalty;

games/battlestar/command2.c

38

int firstnumber, value;

games/battlestar/command2.c

44

value = wordvalue[wordnumber];

games/battlestar/command2.c

45

if (value >= 0 && objsht[value] == NULL)

games/battlestar/command2.c

47

switch (value) {

games/battlestar/command2.c

55

A_OR_AN_OR_BLANK(value), objsht[value]);

games/battlestar/command2.c

77

if (testbit(inven, value)) {

games/battlestar/command2.c

78

clearbit(inven, value);

games/battlestar/command2.c

79

setbit(wear, value);

games/battlestar/command2.c

80

carrying -= objwt[value];

games/battlestar/command2.c

81

encumber -= objcumber[value];

games/battlestar/command2.c

84

A_OR_AN_OR_THE(value), objsht[value]);

games/battlestar/command2.c

86

if (testbit(wear, value)) {

games/battlestar/command2.c

88

objsht[value]);

games/battlestar/command2.c

92

objsht[value]);

games/battlestar/command3.c

102

int value;

games/battlestar/command3.c

108

value = wordvalue[wordnumber];

games/battlestar/command3.c

110

(testbit(location[position].objects, value) ||

games/battlestar/command3.c

111

value == BODY))

games/battlestar/command3.c

112

switch (value) {

games/battlestar/command3.c

117

value = MAID;

games/battlestar/command3.c

121

value = DEADWOOD;

games/battlestar/command3.c

125

value = DEADGOD;

games/battlestar/command3.c

129

value = DEADTIME;

games/battlestar/command3.c

133

value = DEADNATIVE;

games/battlestar/command3.c

155

(testbit(inven, value) ||

games/battlestar/command3.c

156

testbit(location[position].objects, value))) {

games/battlestar/command3.c

158

if (testbit(inven, value)) {

games/battlestar/command3.c

159

clearbit(inven, value);

games/battlestar/command3.c

160

carrying -= objwt[value];

games/battlestar/command3.c

161

encumber -= objcumber[value];

games/battlestar/command3.c

163

clearbit(location[position].objects, value);

games/battlestar/command3.c

164

switch (value) {

games/battlestar/command3.c

172

objsht[value]);

games/battlestar/command3.c

205

int firstnumber, value;

games/battlestar/command3.c

214

value = wordvalue[wordnumber];

games/battlestar/command3.c

215

printf("%s:\n", objsht[value]);

games/battlestar/command3.c

216

if (testbit(location[position].objects, value)) {

games/battlestar/command3.c

217

clearbit(location[position].objects, value);

games/battlestar/command3.c

219

printf("The %s explode%s\n", objsht[value],

games/battlestar/command3.c

220

(is_plural_object(value) ? "." : "s."));

games/battlestar/command3.c

221

if (value == BOMB)

games/battlestar/command3.c

225

objsht[value]);

games/battlestar/command4.c

208

int first, value;

games/battlestar/command4.c

241

value = wordvalue[wordnumber];

games/battlestar/command4.c

243

testbit(location[position].objects, value)) {

games/battlestar/command4.c

244

clearbit(location[position].objects, value);

games/battlestar/command4.c

245

if (value != GRENADE)

games/battlestar/command4.c

247

value);

games/battlestar/command4.c

257

if (value == ROPE && position == FINAL)

games/battlestar/command4.c

274

if (value == GRENADE &&

games/battlestar/command4.c

276

value)) {

games/battlestar/command4.c

296

int firstnumber, value;

games/battlestar/command4.c

302

value = wordvalue[wordnumber];

games/battlestar/command4.c

303

if (value == BODY) { /* special case */

games/battlestar/command4.c

307

value = MAID;

games/battlestar/command4.c

310

value = DEADWOOD;

games/battlestar/command4.c

313

value = DEADGOD;

games/battlestar/command4.c

316

value = DEADTIME;

games/battlestar/command4.c

319

value = DEADNATIVE;

games/battlestar/command4.c

321

if (wordtype[wordnumber] == NOUNS && value == DOOR) {

games/battlestar/command4.c

326

} else if (objsht[value] == NULL) {

games/battlestar/command4.c

332

printf("%s:\n", objsht[value]);

games/battlestar/command4.c

333

if (testbit(inven, value)) {

games/battlestar/command4.c

334

clearbit(inven, value);

games/battlestar/command4.c

335

carrying -= objwt[value];

games/battlestar/command4.c

336

encumber -= objcumber[value];

games/battlestar/command4.c

337

if (value == BOMB) {

games/battlestar/command4.c

344

if (value != AMULET && value != MEDALION &&

games/battlestar/command4.c

345

value != TALISMAN)

games/battlestar/command4.c

347

value);

games/battlestar/command4.c

358

objsht[value]);

games/battlestar/command4.c

360

value)) {

games/battlestar/command4.c

367

value))

games/battlestar/command4.c

369

else if (testbit(wear, value))

games/battlestar/command4.c

38

int firstnumber, heavy, bulky, value;

games/battlestar/command4.c

402

int firstnumber, value;

games/battlestar/command4.c

407

value = wordvalue[wordnumber];

games/battlestar/command4.c

408

if (wordtype[wordnumber] != OBJECT || objsht[value] == NULL)

games/battlestar/command4.c

409

value = -2;

games/battlestar/command4.c

410

switch (value) {

games/battlestar/command4.c

422

A_OR_AN_OR_BLANK(value), objsht[value]);

games/battlestar/command4.c

431

printf("%s:\n", objsht[value]);

games/battlestar/command4.c

432

if (testbit(inven, value) &&

games/battlestar/command4.c

435

clearbit(inven, value);

games/battlestar/command4.c

436

carrying -= objwt[value];

games/battlestar/command4.c

437

encumber -= objcumber[value];

games/battlestar/command4.c

443

} else if (!testbit(inven, value)) {

games/battlestar/command4.c

445

objsht[value]);

games/battlestar/command4.c

50

value = wordvalue[wordnumber];

games/battlestar/command4.c

51

printf("%s:\n", objsht[value]);

games/battlestar/command4.c

52

heavy = (carrying + objwt[value]) <= WEIGHT;

games/battlestar/command4.c

53

bulky = (encumber + objcumber[value]) <= CUMBER;

games/battlestar/command4.c

54

if ((testbit(from, value) || wiz || tempwiz) &&

games/battlestar/command4.c

55

heavy && bulky && !testbit(inven, value)) {

games/battlestar/command4.c

56

setbit(inven, value);

games/battlestar/command4.c

57

carrying += objwt[value];

games/battlestar/command4.c

58

encumber += objcumber[value];

games/battlestar/command4.c

60

if (testbit(from, value))

games/battlestar/command4.c

64

clearbit(from, value);

games/battlestar/command4.c

65

if (value == MEDALION)

games/battlestar/command4.c

67

} else if (testbit(inven, value))

games/battlestar/command4.c

69

A_OR_AN_OR_BLANK(value),

games/battlestar/command4.c

70

objsht[value]);

games/battlestar/command4.c

71

else if (!testbit(from, value))

games/battlestar/command4.c

73

objsht[value]);

games/battlestar/command4.c

75

printf("The %s %stoo heavy.\n", objsht[value],

games/battlestar/command4.c

76

IS_OR_ARE(value));

games/battlestar/command4.c

79

objsht[value], IS_OR_ARE(value));

games/battlestar/extern.h

318

int value, article;

games/battlestar/parse.c

104

wordvalue[n] = wp->value;

games/larn/store.c

689

int i, j, value, isub, izarg;

games/larn/store.c

735

value = 20 * ivenarg[isub];

games/larn/store.c

736

else if ((itm_[j].obj == OSCROLL) || (itm_[j].obj == OPOTION)) value = 2 * itm_[j + ivenarg[isub]].price;

games/larn/store.c

739

value = itm_[j].price; /* appreciate if a +n object */

games/larn/store.c

741

value *= 2;

games/larn/store.c

742

while ((izarg-- > 0) && ((value = 14 * (67 + value) / 10) < 500000))

games/larn/store.c

745

lprintf("\nItem (%c) is worth %d gold pieces to us. Do you want to sell it? ", i, (long)value);

games/larn/store.c

749

c[GOLD] += value;

games/mille/comp.c

171

value = valbuf;

games/mille/comp.c

190

*value = 0;

games/mille/comp.c

195

*value = (Value[card] >> 3);

games/mille/comp.c

197

++*value;

games/mille/comp.c

199

--*value;

games/mille/comp.c

202

*value = (pp->mileage ? 10 : 20);

games/mille/comp.c

208

*value = 0;

games/mille/comp.c

214

*value = (Value[card] >> 3);

games/mille/comp.c

216

--*value;

games/mille/comp.c

218

++*value;

games/mille/comp.c

221

*value = (End == 700 ? card : 0);

games/mille/comp.c

223

*value = (foundend ? card : V_VALUABLE);

games/mille/comp.c

229

*value = (pp->safety[S_RIGHT_WAY] ==

games/mille/comp.c

233

*value = 1;

games/mille/comp.c

241

*value = 0;

games/mille/comp.c

249

*value = (pp->safety[safe] ==

games/mille/comp.c

255

*value = 0;

games/mille/comp.c

260

*value = Numcards[oppos] * 6;

games/mille/comp.c

261

*value += Numseen[card] -

games/mille/comp.c

264

*value /= (count[card]*count[card]);

games/mille/comp.c

270

*value = (pp->safety[S_RIGHT_WAY] ==

games/mille/comp.c

274

*value = 0;

games/mille/comp.c

278

*value = Numneed[C_GO] * 3;

games/mille/comp.c

279

*value += (Numseen[C_GO] - Numgos);

games/mille/comp.c

280

*value /= (count[C_GO] * count[C_GO]);

games/mille/comp.c

286

*value = (End == 700 && !cango);

games/mille/comp.c

290

*value = 1;

games/mille/comp.c

292

*value = (pp->safety[S_RIGHT_WAY] !=

games/mille/comp.c

302

*value = (pp->safety[safe]!=S_UNKNOWN ? 3 : 4);

games/mille/comp.c

305

*value = -1;

games/mille/comp.c

307

*value *= Numneed[oppos] +

games/mille/comp.c

311

*value += 5;

games/mille/comp.c

313

*value += 5;

games/mille/comp.c

315

*value -= 3;

games/mille/comp.c

318

*value += 3;

games/mille/comp.c

320

*value /= ++badcount;

games/mille/comp.c

325

*value = -1;

games/mille/comp.c

327

*value = (pp->safety[S_RIGHT_WAY] !=

games/mille/comp.c

329

*value *= Numcards[C_STOP] +

games/mille/comp.c

333

*value += 5;

games/mille/comp.c

335

*value /= ++badcount;

games/mille/comp.c

337

*value += 5;

games/mille/comp.c

341

*value -= 5;

games/mille/comp.c

344

*value += 5;

games/mille/comp.c

349

*value = cango ? 0 : 101;

games/mille/comp.c

352

*value = 0;

games/mille/comp.c

357

*value = cango ? 0 : 101;

games/mille/comp.c

359

if (*value >= curmax) {

games/mille/comp.c

361

curmax = *value;

games/mille/comp.c

363

if (*value <= curmin) {

games/mille/comp.c

365

curmin = *value;

games/mille/comp.c

370

mvprintw(i + 6, 2, "%3d %-14s", *value,

games/mille/comp.c

373

value++;

games/mille/comp.c

45

int *value;

games/monop/prop.c

38

static int value(SQUARE *);

games/monop/prop.c

66

val = value(op->sqr);

games/monop/prop.c

68

for (tp = *head; tp && value(tp->sqr) < val; tp = tp->next)

games/monop/prop.c

69

if (val == value(tp->sqr)) {

games/rogue/machdep.c

426

char *value;

games/rogue/machdep.c

428

value = getenv(name);

games/rogue/machdep.c

430

return(value);

games/rogue/rogue.h

202

short value;

games/rogue/save.c

327

r_write(fp, (const char *) &(id_table[i].value), sizeof(short));

games/rogue/save.c

332

r_read(fp, (char *) &(id_table[i].value), sizeof(short));

games/rogue/score.c

438

val = id_weapons[wc].value;

games/rogue/score.c

447

val = id_armors[wc].value;

games/rogue/score.c

454

val = id_wands[wc].value * (obj->class + 1);

games/rogue/score.c

457

val = id_scrolls[wc].value * obj->quantity;

games/rogue/score.c

460

val = id_potions[wc].value * obj->quantity;

games/rogue/score.c

466

val = id_rings[wc].value * (obj->class + 1);

games/sail/dr_main.c

108

value = 1;

games/sail/dr_main.c

124

value = 1;

games/sail/dr_main.c

129

return value;

games/sail/dr_main.c

60

int value = 0;

games/trek/computer.c

120

switch ((long)r->value) {

games/trek/getpar.h

40

cmdfun value;

games/trek/phaser.c

138

manual = (long) ptr->value;

games/trek/play.c

101

(*r->value)(r->value2);

games/trek/setup.c

86

Game.length = (long) r->value;

games/trek/setup.c

95

Game.skill = (long) r->value;

games/trek/shield.c

103

i = (long) r->value;

games/worm/worm.c

197

int value;

games/worm/worm.c

199

value = rnd(9) + 1;

games/worm/worm.c

201

waddch(tv, value+'0');

include/rpc/xdr.h

239

int value;

lib/i18n_module/VIQR/citrus_viqr.c

109

if (mid->value == wc)

lib/i18n_module/VIQR/citrus_viqr.c

111

else if (mid->value < wc) {

lib/i18n_module/VIQR/citrus_viqr.c

125

wchar_t value;

lib/i18n_module/VIQR/citrus_viqr.c

143

mnemonic_create(mnemonic_t *parent, int ascii, wchar_t value)

lib/i18n_module/VIQR/citrus_viqr.c

151

m->value = value;

lib/i18n_module/VIQR/citrus_viqr.c

160

wchar_t value, wchar_t invalid)

lib/i18n_module/VIQR/citrus_viqr.c

188

m0->value = value;

lib/i18n_module/VIQR/citrus_viqr.c

298

if (m->value != ei->invalid)

lib/i18n_module/VIQR/citrus_viqr.c

306

wc = (m == ei->mroot) ? (wchar_t)ch : m->value;

lib/i18n_module/VIQR/citrus_viqr.c

466

p->name, p->value, ei->invalid);

lib/i18n_module/VIQR/citrus_viqr.c

93

wchar_t value;

lib/libc/gen/gethostid.c

39

long value;

lib/libc/gen/gethostid.c

42

size = sizeof value;

lib/libc/gen/gethostid.c

43

if (sysctlbyname("kern.hostid", &value, &size, NULL, 0) == -1)

lib/libc/gen/gethostid.c

45

return (value);

lib/libc/gen/getosreldate.c

45

int value;

lib/libc/gen/getosreldate.c

52

size = sizeof value;

lib/libc/gen/getosreldate.c

53

if (sysctl(mib, 2, &value, &size, NULL, 0) == -1)

lib/libc/gen/getosreldate.c

55

save_osreldate = value;

lib/libc/gen/getosreldate.c

57

return (value);

lib/libc/gen/getpagesize.c

46

static int value;

lib/libc/gen/getpagesize.c

49

if (!value) {

lib/libc/gen/getpagesize.c

52

size = sizeof value;

lib/libc/gen/getpagesize.c

53

if (sysctl(mib, 2, &value, &size, NULL, 0) == -1)

lib/libc/gen/getpagesize.c

56

return (value);

lib/libc/gen/getttyent.c

158

tty.ty_window = value(p);

lib/libc/gen/getttyent.c

160

tty.ty_group = value(p);

lib/libc/gen/getttyent.c

53

static char *value (char *);

lib/libc/gen/ldexp.c

25

double value;

lib/libc/gen/ldexp.c

39

double value;

lib/libc/gen/ldexp.c

54

ew_u.value = (d); \

lib/libc/gen/ldexp.c

64

gh_u.value = (d); \

lib/libc/gen/ldexp.c

73

sh_u.value = (d); \

lib/libc/gen/ldexp.c

75

(d) = sh_u.value; \

lib/libc/gen/modf.c

34

double value;

lib/libc/gen/modf.c

48

double value;

lib/libc/gen/modf.c

63

ew_u.value = (d); \

lib/libc/gen/modf.c

73

gh_u.value = (d); \

lib/libc/gen/modf.c

84

(d) = iw_u.value; \

lib/libc/gen/setmode.c

100

value = (newmode & S_IRWXG) >> 3;

lib/libc/gen/setmode.c

104

value = newmode & S_IRWXO;

lib/libc/gen/setmode.c

107

(set->cmd2 & CMD2_SET) ? S_IRWXO : value;

lib/libc/gen/setmode.c

117

newmode |= (value<<6) & set->bits;

lib/libc/gen/setmode.c

119

newmode |= (value<<3) & set->bits;

lib/libc/gen/setmode.c

121

newmode |= value & set->bits;

lib/libc/gen/setmode.c

83

mode_t clrval, newmode, value;

lib/libc/gen/setmode.c

87

for (value = 0;; set++)

lib/libc/gen/setmode.c

96

value = (newmode & S_IRWXU) >> 6;

lib/libc/gen/sysconf.c

301

len = sizeof(value);

lib/libc/gen/sysconf.c

302

if (sysctl(mib, 2, &value, &len, NULL, 0) == -1)

lib/libc/gen/sysconf.c

304

if (value == 0)

lib/libc/gen/sysconf.c

306

return ((long)value);

lib/libc/gen/sysconf.c

571

value = sysconf(_SC_ASYNCHRONOUS_IO) > 0 &&

lib/libc/gen/sysconf.c

582

if (value)

lib/libc/gen/sysconf.c

616

value = _socket(PF_INET6, SOCK_DGRAM, 0);

lib/libc/gen/sysconf.c

618

if (value >= 0) {

lib/libc/gen/sysconf.c

619

_close(value);

lib/libc/gen/sysconf.c

648

len = sizeof(value);

lib/libc/gen/sysconf.c

649

if (sysctl(mib, 2, &value, &len, NULL, 0) == -1)

lib/libc/gen/sysconf.c

650

value = -1;

lib/libc/gen/sysconf.c

651

return ((long)value);

lib/libc/gen/sysconf.c

74

int mib[2], sverrno, value;

lib/libc/gen/unvis.c

467

*cp = nv[ia].value;

lib/libc/gen/unvis.c

84

uint8_t value;

lib/libc/include/isc/eventlib.h

179

int value));

lib/libc/isc/ev_timers.c

270

int value

lib/libc/isc/ev_timers.c

276

UNUSED(value);

lib/libc/nameser/ns_name.c

853

int value = 0, count = 0, tbcount = 0, blen = 0;

lib/libc/nameser/ns_name.c

878

*tp++ = ((value << 4) & 0xff);

lib/libc/nameser/ns_name.c

899

value <<= 4;

lib/libc/nameser/ns_name.c

900

value += digitvalue[(int)c];

lib/libc/nameser/ns_name.c

906

*tp++ = value;

lib/libc/nameser/ns_name.c

931

if (((value << (8 - traillen)) & 0xff) != 0)

lib/libc/resolv/mtctxres.c

97

__res_destroy_ctx(void *value) {

lib/libc/resolv/mtctxres.c

99

mtctxres_t *mt = (mtctxres_t *)value;

lib/libc/resolv/res_debug.c

683

p_time(u_int32_t value) {

lib/libc/resolv/res_debug.c

686

if (ns_format_ttl(value, nbuf, sizeof nbuf) < 0)

lib/libc/resolv/res_debug.c

687

sprintf(nbuf, "%u", value);

lib/libc/stdlib/a64l.c

16

int digit, i, value;

lib/libc/stdlib/a64l.c

18

value = 0;

lib/libc/stdlib/a64l.c

30

value |= digit << shift;

lib/libc/stdlib/a64l.c

33

return (value);

lib/libc/stdlib/getenv.c

175

return (envVars[ndx].value);

lib/libc/stdlib/getenv.c

354

envVars[envNdx].value = strchr(envVars[envNdx].name, '=');

lib/libc/stdlib/getenv.c

355

if (envVars[envNdx].value != NULL) {

lib/libc/stdlib/getenv.c

356

envVars[envNdx].value++;

lib/libc/stdlib/getenv.c

358

strlen(envVars[envNdx].value);

lib/libc/stdlib/getenv.c

371

nameLen = envVars[envNdx].value - envVars[envNdx].name - 1;

lib/libc/stdlib/getenv.c

457

__setenv(const char *name, size_t nameLen, const char *value, int overwrite)

lib/libc/stdlib/getenv.c

468

valueLen = strlen(value);

lib/libc/stdlib/getenv.c

510

env = envVars[envNdx].value;

lib/libc/stdlib/getenv.c

513

strcpy(env, value);

lib/libc/stdlib/getenv.c

514

envVars[envNdx].value = env;

lib/libc/stdlib/getenv.c

579

setenv(const char *name, const char *value, int overwrite)

lib/libc/stdlib/getenv.c

593

return (__setenv(name, nameLen, value, overwrite));

lib/libc/stdlib/getenv.c

643

envVars[envNdx].value = NULL;

lib/libc/stdlib/getenv.c

78

char *value;

lib/libc/stdlib/l64a.c

12

l64a(long value)

lib/libc/stdlib/l64a.c

16

l64a_r(value, buf, sizeof(buf));

lib/libc/stdlib/l64a.c

21

l64a_r(long value, char *buffer, int buflen)

lib/libc/stdlib/l64a.c

26

v = value & (long)0xffffffff;

lib/libc/stdlib/strfmon.c

114

double value; /* just value */

lib/libc/stdlib/strfmon.c

156

value = 0; /* we have no value to print now */

lib/libc/stdlib/strfmon.c

246

value = va_arg(ap, double);

lib/libc/stdlib/strfmon.c

249

if (value < 0) {

lib/libc/stdlib/strfmon.c

251

value = -value;

lib/libc/stdlib/strfmon.c

265

asciivalue = __format_grouped_double(value, &flags,

lib/libc/stdlib/strfmon.c

521

__format_grouped_double(double value, int *flags,

lib/libc/stdlib/strfmon.c

570

avalue_size = asprintf(&avalue, fmt, value);

lib/libc/stdtime/localtime.c

850

int_fast32_t value;

lib/libc/stdtime/localtime.c

854

INITIALIZE(value);

lib/libc/stdtime/localtime.c

866

value = (rulep->r_day - 1) * SECSPERDAY;

lib/libc/stdtime/localtime.c

868

value += SECSPERDAY;

lib/libc/stdtime/localtime.c

877

value = rulep->r_day * SECSPERDAY;

lib/libc/stdtime/localtime.c

916

value = d * SECSPERDAY;

lib/libc/stdtime/localtime.c

918

value += mon_lengths[leapyear][i] * SECSPERDAY;

lib/libc/stdtime/localtime.c

928

return value + rulep->r_time + offset;

lib/libc/sysvipc/ipc.c

137

data = (struct shm_data*)tmp->value;

lib/libc/sysvipc/ipc.c

177

data = (struct shm_data*)tmp->value;

lib/libc/sysvipc/shm.c

415

data = (struct shm_data*)tmp->value;

lib/libc/sysvipc/sysvipc_hash.c

106

return tmp->value;

lib/libc/sysvipc/sysvipc_hash.c

117

void *value;

lib/libc/sysvipc/sysvipc_hash.c

132

value = tmp->value;

lib/libc/sysvipc/sysvipc_hash.c

134

return value;

lib/libc/sysvipc/sysvipc_hash.c

83

_hash_insert(struct hashtable *hashtable, u_long key, void *value)

lib/libc/sysvipc/sysvipc_hash.c

90

new_entry->value = value;

lib/libc/sysvipc/sysvipc_hash.h

35

void * value;

lib/libc/tre-regex/config.h

201

#define TRE_REGEX_T_FIELD value

lib/libc/tre-regex/regex.h

92

void *value; /* For internal use only. */

lib/libc/xdr/xdr.c

662

if (choices->value == dscm)

lib/libcam/scsi_cmdparse.c

109

int value;

lib/libcam/scsi_cmdparse.c

188

value = (bits >> (shift - width)) &

lib/libcam/scsi_cmdparse.c

193

shift, bits, value, width, mask[width]);

lib/libcam/scsi_cmdparse.c

196

ARG_PUT(value);

lib/libcam/scsi_cmdparse.c

362

int value = 0;

lib/libcam/scsi_cmdparse.c

411

value = strtol(p, &intendp, 16);

lib/libcam/scsi_cmdparse.c

417

value = *value_p;

lib/libcam/scsi_cmdparse.c

424

value = *value_p;

lib/libcam/scsi_cmdparse.c

440

value = *value_p;

lib/libcam/scsi_cmdparse.c

455

value = *value_p;

lib/libcam/scsi_cmdparse.c

458

value = strtol(p, &intendp, 0);

lib/libcam/scsi_cmdparse.c

528

*value_p = value;

lib/libcam/scsi_cmdparse.c

543

int width, value, error, suppress;

lib/libcam/scsi_cmdparse.c

552

while ((ret = next_field(&fmt, &c, &width, &value, field_name,

lib/libcam/scsi_cmdparse.c

558

value = 0;

lib/libcam/scsi_cmdparse.c

560

value = arg_get ?

lib/libcam/scsi_cmdparse.c

568

ret, c, width, value, field_name, error, suppress);

lib/libcam/scsi_cmdparse.c

572

ind = value;

lib/libcam/scsi_cmdparse.c

585

val |= (value << (8 - shift));

lib/libcam/scsi_cmdparse.c

605

buff[ind++] = value;

lib/libcam/scsi_cmdparse.c

610

buff[ind++] = value >> 8;

lib/libcam/scsi_cmdparse.c

611

buff[ind++] = value;

lib/libcam/scsi_cmdparse.c

617

buff[ind++] = value >> 16;

lib/libcam/scsi_cmdparse.c

618

buff[ind++] = value >> 8;

lib/libcam/scsi_cmdparse.c

619

buff[ind++] = value;

lib/libcam/scsi_cmdparse.c

625

buff[ind++] = value >> 24;

lib/libcam/scsi_cmdparse.c

626

buff[ind++] = value >> 16;

lib/libcam/scsi_cmdparse.c

627

buff[ind++] = value >> 8;

lib/libcam/scsi_cmdparse.c

628

buff[ind++] = value;

lib/libfetch/http.c

759

char *value = malloc(strlen(cp) + 1);

lib/libfetch/http.c

762

if (key == NULL || value == NULL || buf == NULL) {

lib/libfetch/http.c

811

lex = http_header_lex(&cp, value);

lib/libfetch/http.c

817

strdup(value);

lib/libfetch/http.c

820

strdup(value);

lib/libfetch/http.c

823

strdup(value);

lib/libfetch/http.c

826

strdup(value);

lib/libfetch/http.c

829

strdup(value);

lib/libfetch/http.c

832

strcasecmp(value, "no");

lib/libfetch/http.c

867

if (value)

lib/libfetch/http.c

868

free(value);

lib/libhammer/stats.c

103

libhammer_stats_file_write(int64_t *value)

lib/libhammer/stats.c

105

return (dosysctl("vfs.hammer.stats_file_write", value));

lib/libhammer/stats.c

109

libhammer_stats_file_read(int64_t *value)

lib/libhammer/stats.c

111

return (dosysctl("vfs.hammer.stats_file_read", value));

lib/libhammer/stats.c

115

libhammer_stats_record_iterations(int64_t *value)

lib/libhammer/stats.c

117

return (dosysctl("vfs.hammer.stats_record_iterations", value));

lib/libhammer/stats.c

121

libhammer_stats_root_iterations(int64_t *value)

lib/libhammer/stats.c

123

return (dosysctl("vfs.hammer.stats_btree_root_iterations", value));

lib/libhammer/stats.c

127

libhammer_stats_btree_iterations(int64_t *value)

lib/libhammer/stats.c

129

return (dosysctl("vfs.hammer.stats_btree_iterations", value));

lib/libhammer/stats.c

133

libhammer_stats_btree_splits(int64_t *value)

lib/libhammer/stats.c

135

return (dosysctl("vfs.hammer.stats_btree_splits", value));

lib/libhammer/stats.c

139

libhammer_stats_btree_elements(int64_t *value)

lib/libhammer/stats.c

141

return (dosysctl("vfs.hammer.stats_btree_elements", value));

lib/libhammer/stats.c

145

libhammer_stats_btree_deletes(int64_t *value)

lib/libhammer/stats.c

147

return (dosysctl("vfs.hammer.stats_btree_deletes", value));

lib/libhammer/stats.c

151

libhammer_stats_btree_inserts(int64_t *value)

lib/libhammer/stats.c

153

return (dosysctl("vfs.hammer.stats_btree_inserts", value));

lib/libhammer/stats.c

157

libhammer_stats_btree_lookups(int64_t *value)

lib/libhammer/stats.c

159

return (dosysctl("vfs.hammer.stats_btree_lookups", value));

lib/libhammer/stats.c

163

libhammer_stats_btree_searches(int64_t *value)

lib/libhammer/stats.c

165

return (dosysctl("vfs.hammer.stats_btree_searches", value));

lib/libhammer/stats.c

43

dosysctl(const char *sname, int64_t *value)

lib/libhammer/stats.c

48

len = sizeof(*value);

lib/libhammer/stats.c

49

error = sysctlbyname(sname, value, &len, NULL, 0);

lib/libhammer/stats.c

55

libhammer_stats_redo(int64_t *value)

lib/libhammer/stats.c

57

return (dosysctl("vfs.hammer.stats_redo", value));

lib/libhammer/stats.c

61

libhammer_stats_undo(int64_t *value)

lib/libhammer/stats.c

63

return (dosysctl("vfs.hammer.stats_undo", value));

lib/libhammer/stats.c

67

libhammer_stats_commits(int64_t *value)

lib/libhammer/stats.c

69

return (dosysctl("vfs.hammer.stats_commits", value));

lib/libhammer/stats.c

73

libhammer_stats_inode_flushes(int64_t *value)

lib/libhammer/stats.c

75

return (dosysctl("vfs.hammer.stats_inode_flushes", value));

lib/libhammer/stats.c

79

libhammer_stats_disk_write(int64_t *value)

lib/libhammer/stats.c

81

return (dosysctl("vfs.hammer.stats_disk_write", value));

lib/libhammer/stats.c

85

libhammer_stats_disk_read(int64_t *value)

lib/libhammer/stats.c

87

return (dosysctl("vfs.hammer.stats_disk_read", value));

lib/libhammer/stats.c

91

libhammer_stats_file_iopsw(int64_t *value)

lib/libhammer/stats.c

93

return (dosysctl("vfs.hammer.stats_file_iopsw", value));

lib/libhammer/stats.c

97

libhammer_stats_file_iopsr(int64_t *value)

lib/libhammer/stats.c

99

return (dosysctl("vfs.hammer.stats_file_iopsr", value));

lib/libldns/ldns/util.h

210

void ldns_set_bit(uint8_t *byte, int bit_nr, bool value);

lib/libsdp/sdp.h

333

uint8_t *value; /* base pointer */

lib/libsdp/search.c

400

if (vp->value != NULL) {

lib/libsdp/search.c

407

memcpy(vp->value, rsp_tmp, vp->vlen);

lib/libsdp/util.c

317

} value;

lib/libsdp/util.c

336

SDP_GET8(value.uint8, start);

lib/libsdp/util.c

337

printf("uint8 %u\n", value.uint8);

lib/libsdp/util.c

340

SDP_GET16(value.uint16, start);

lib/libsdp/util.c

341

printf("uint16 %u\n", value.uint16);

lib/libsdp/util.c

344

SDP_GET32(value.uint32, start);

lib/libsdp/util.c

345

printf("uint32 %u\n", value.uint32);

lib/libsdp/util.c

348

SDP_GET64(value.uint64, start);

lib/libsdp/util.c

349

printf("uint64 %ju\n", value.uint64);

lib/libsdp/util.c

354

SDP_GET128(&value.int128, start);

lib/libsdp/util.c

360

value.int128.b[ 0], value.int128.b[ 1],

lib/libsdp/util.c

361

value.int128.b[ 2], value.int128.b[ 3],

lib/libsdp/util.c

362

value.int128.b[ 4], value.int128.b[ 5],

lib/libsdp/util.c

363

value.int128.b[ 6], value.int128.b[ 7],

lib/libsdp/util.c

364

value.int128.b[ 8], value.int128.b[ 9],

lib/libsdp/util.c

365

value.int128.b[10], value.int128.b[11],

lib/libsdp/util.c

366

value.int128.b[12], value.int128.b[13],

lib/libsdp/util.c

367

value.int128.b[14], value.int128.b[15]);

lib/libsdp/util.c

371

SDP_GET_UUID128(&value.int128, start);

lib/libsdp/util.c

378

value.int128.b[ 0], value.int128.b[ 1],

lib/libsdp/util.c

379

value.int128.b[ 2], value.int128.b[ 3],

lib/libsdp/util.c

380

value.int128.b[ 4], value.int128.b[ 5],

lib/libsdp/util.c

381

value.int128.b[ 6], value.int128.b[ 7],

lib/libsdp/util.c

382

value.int128.b[ 8], value.int128.b[ 9],

lib/libsdp/util.c

383

value.int128.b[10], value.int128.b[11],

lib/libsdp/util.c

384

value.int128.b[12], value.int128.b[13],

lib/libsdp/util.c

385

value.int128.b[14], value.int128.b[15]);

lib/libsdp/util.c

389

SDP_GET8(value.int8, start);

lib/libsdp/util.c

390

printf("int8 %d\n", value.int8);

lib/libsdp/util.c

393

SDP_GET16(value.int16, start);

lib/libsdp/util.c

394

printf("int16 %d\n", value.int16);

lib/libsdp/util.c

397

SDP_GET32(value.int32, start);

lib/libsdp/util.c

398

printf("int32 %d\n", value.int32);

lib/libsdp/util.c

401

SDP_GET64(value.int64, start);

lib/libsdp/util.c

402

printf("int64 %ju\n", value.int64);

lib/libsdp/util.c

406

SDP_GET16(value.uint16, start);

lib/libsdp/util.c

407

printf("uuid16 %#4.4x - %s\n", value.uint16,

lib/libsdp/util.c

408

sdp_uuid2desc(value.uint16));

lib/libsdp/util.c

411

SDP_GET32(value.uint32, start);

lib/libsdp/util.c

412

printf("uuid32 %#8.8x\n", value.uint32);

lib/libsdp/util.c

416

SDP_GET8(value.uint8, start);

lib/libsdp/util.c

417

printf("str8 %*.*s\n", value.uint8, value.uint8, start);

lib/libsdp/util.c

418

start += value.uint8;

lib/libsdp/util.c

421

SDP_GET16(value.uint16, start);

lib/libsdp/util.c

422

printf("str16 %*.*s\n", value.uint16, value.uint16, start);

lib/libsdp/util.c

423

start += value.uint16;

lib/libsdp/util.c

426

SDP_GET32(value.uint32, start);

lib/libsdp/util.c

427

printf("str32 %*.*s\n", value.uint32, value.uint32, start);

lib/libsdp/util.c

428

start += value.uint32;

lib/libsdp/util.c

432

SDP_GET8(value.uint8, start);

lib/libsdp/util.c

433

printf("bool %d\n", value.uint8);

lib/libsdp/util.c

437

SDP_GET8(value.uint8, start);

lib/libsdp/util.c

438

printf("seq8 %d\n", value.uint8);

lib/libsdp/util.c

439

sdp_print(level + 1, start, start + value.uint8);

lib/libsdp/util.c

440

start += value.uint8;

lib/libsdp/util.c

443

SDP_GET16(value.uint16, start);

lib/libsdp/util.c

444

printf("seq16 %d\n", value.uint16);

lib/libsdp/util.c

445

sdp_print(level + 1, start, start + value.uint16);

lib/libsdp/util.c

446

start += value.uint16;

lib/libsdp/util.c

449

SDP_GET32(value.uint32, start);

lib/libsdp/util.c

450

printf("seq32 %d\n", value.uint32);

lib/libsdp/util.c

451

sdp_print(level + 1, start, start + value.uint32);

lib/libsdp/util.c

452

start += value.uint32;

lib/libsdp/util.c

456

SDP_GET8(value.uint8, start);

lib/libsdp/util.c

457

printf("alt8 %d\n", value.uint8);

lib/libsdp/util.c

458

sdp_print(level + 1, start, start + value.uint8);

lib/libsdp/util.c

459

start += value.uint8;

lib/libsdp/util.c

462

SDP_GET16(value.uint16, start);

lib/libsdp/util.c

463

printf("alt16 %d\n", value.uint16);

lib/libsdp/util.c

464

sdp_print(level + 1, start, start + value.uint16);

lib/libsdp/util.c

465

start += value.uint16;

lib/libsdp/util.c

468

SDP_GET32(value.uint32, start);

lib/libsdp/util.c

469

printf("alt32 %d\n", value.uint32);

lib/libsdp/util.c

470

sdp_print(level + 1, start, start + value.uint32);

lib/libsdp/util.c

471

start += value.uint32;

lib/libsdp/util.c

475

SDP_GET8(value.uint8, start);

lib/libsdp/util.c

476

printf("url8 %*.*s\n", value.uint8, value.uint8, start);

lib/libsdp/util.c

477

start += value.uint8;

lib/libsdp/util.c

480

SDP_GET16(value.uint16, start);

lib/libsdp/util.c

481

printf("url16 %*.*s\n", value.uint16, value.uint16, start);

lib/libsdp/util.c

482

start += value.uint16;

lib/libsdp/util.c

485

SDP_GET32(value.uint32, start);

lib/libsdp/util.c

486

printf("url32 %*.*s\n", value.uint32, value.uint32, start);

lib/libsdp/util.c

487

start += value.uint32;

lib/libssh/openbsd-compat/openbsd-compat.h

120

int setenv(register const char *name, register const char *value, int rewrite);

lib/libthread_xu/thread/thr_sem.c

182

sem_alloc(unsigned int value, int pshared)

lib/libthread_xu/thread/thr_sem.c

187

if (value > SEM_VALUE_MAX) {

lib/libthread_xu/thread/thr_sem.c

215

sem->count = (u_int32_t)value;

lib/libthread_xu/thread/thr_sem.c

218

sem_log("sem_alloc %p (%d)\n", sem, value);

lib/libthread_xu/thread/thr_sem.c

224

_sem_init(sem_t *sem, int pshared, unsigned int value)

lib/libthread_xu/thread/thr_sem.c

231

*sem = sem_alloc(value, pshared);

lib/libthread_xu/thread/thr_sem.c

522

unsigned int value = 0;

lib/libthread_xu/thread/thr_sem.c

589

value = (unsigned int) va_arg(ap, int);

lib/libthread_xu/thread/thr_sem.c

593

if (value > SEM_VALUE_MAX) {

lib/libthread_xu/thread/thr_sem.c

666

semtmp->count = (u_int32_t)value;

lib/libthread_xu/thread/thr_spec.c

190

_pthread_setspecific(pthread_key_t key, const void *value)

lib/libthread_xu/thread/thr_spec.c

203

if (value != NULL)

lib/libthread_xu/thread/thr_spec.c

205

} else if (value == NULL)

lib/libthread_xu/thread/thr_spec.c

207

pthread->specific[key].data = value;

lib/libusb/libusb01.c

696

int value, int wIndex, char *bytes, int size, int timeout)

lib/libusb/libusb01.c

706

req.wValue = value;

lib/libusb/usb.h

287

int usb_control_msg(usb_dev_handle * dev, int requesttype, int request, int value, int index, char *bytes, int size, int timeout);

lib/libutil/libutil.h

56

char *value;

lib/libutil/property.c

238

return (list->value);

lib/libutil/property.c

253

if (list->value)

lib/libutil/property.c

254

free(list->value);

lib/libutil/property.c

44

property_alloc(char *name, char *value)

lib/libutil/property.c

58

if (value != NULL) {

lib/libutil/property.c

59

if ((n->value = strdup(value)) == NULL) {

lib/libutil/property.c

65

n->value = NULL;

libexec/bootpd/dovend.c

372

insert_u_long(u_int32 value, byte **dest)

libexec/bootpd/dovend.c

377

value = ntohl(value); /* Must use host byte order here */

libexec/bootpd/dovend.c

380

*--temp = (byte) (value & 0xFF);

libexec/bootpd/dovend.c

381

value >>= 8;

libexec/bootpd/readfile.c

1000

bcopy(&value, hp->vm_cookie, 4);

libexec/bootpd/readfile.c

1644

u_int32 value;

libexec/bootpd/readfile.c

1700

value = parts[0];

libexec/bootpd/readfile.c

1703

value = (parts[0] << 24) | (parts[1] & 0xFFFFFF);

libexec/bootpd/readfile.c

1706

value = (parts[0] << 24) | ((parts[1] & 0xFF) << 16) |

libexec/bootpd/readfile.c

1710

value = (parts[0] << 24) | ((parts[1] & 0xFF) << 16) |

libexec/bootpd/readfile.c

1716

*result = htonl(value);

libexec/bootpd/readfile.c

1824

u_int32 value, base;

libexec/bootpd/readfile.c

1831

value = 0;

libexec/bootpd/readfile.c

1843

value = (value * base) + (c - '0');

libexec/bootpd/readfile.c

1848

value = (value << 4) + ((c & ~32) + 10 - 'A');

libexec/bootpd/readfile.c

1854

return value;

libexec/bootpd/readfile.c

407

u_int32 value;

libexec/bootpd/readfile.c

409

if (lookup_ipa(hn, &value)) {

libexec/bootpd/readfile.c

413

hp->iaddr.s_addr = value;

libexec/bootpd/readfile.c

419

if (lookup_netmask(hp->iaddr.s_addr, &value)) {

libexec/bootpd/readfile.c

422

hp->subnet_mask.s_addr = value;

libexec/bootpd/readfile.c

712

if (prs_inetaddr(symbol, &value) < 0) \

libexec/bootpd/readfile.c

714

hp->MEMBER.s_addr = value; \

libexec/bootpd/readfile.c

764

value = get_u_long(symbol); \

libexec/bootpd/readfile.c

765

hp->MEMBER = value; \

libexec/bootpd/readfile.c

784

u_int32 value;

libexec/bootpd/readfile.c

805

value = get_u_long(symbol);

libexec/bootpd/readfile.c

807

"T%d", (int)value);

libexec/bootpd/readfile.c

817

if (process_generic(symbol, &(hp->generic), (byte) (value & 0xFF)))

libexec/bootpd/readfile.c

907

value = 0L; /* Assume an illegal value */

libexec/bootpd/readfile.c

910

value = get_u_long(symbol);

libexec/bootpd/readfile.c

923

value = htnamemap[i].htype;

libexec/bootpd/readfile.c

926

if (value >= hwinfocnt) {

libexec/bootpd/readfile.c

929

hp->htype = (byte) (value & 0xFF);

libexec/bootpd/readfile.c

998

if (prs_inetaddr(symbol, &value) < 0)

libexec/getty/gettytab.h

100

#define SP gettynums[2].value

libexec/getty/gettytab.h

101

#define ND gettynums[3].value

libexec/getty/gettytab.h

102

#define CD gettynums[4].value

libexec/getty/gettytab.h

103

#define TD gettynums[5].value

libexec/getty/gettytab.h

104

#define FD gettynums[6].value

libexec/getty/gettytab.h

105

#define BD gettynums[7].value

libexec/getty/gettytab.h

106

#define TO gettynums[8].value

libexec/getty/gettytab.h

107

#define F0 gettynums[9].value

libexec/getty/gettytab.h

109

#define F1 gettynums[10].value

libexec/getty/gettytab.h

111

#define F2 gettynums[11].value

libexec/getty/gettytab.h

113

#define PF gettynums[12].value

libexec/getty/gettytab.h

114

#define C0 gettynums[13].value

libexec/getty/gettytab.h

116

#define C1 gettynums[14].value

libexec/getty/gettytab.h

118

#define C2 gettynums[15].value

libexec/getty/gettytab.h

120

#define I0 gettynums[16].value

libexec/getty/gettytab.h

122

#define I1 gettynums[17].value

libexec/getty/gettytab.h

124

#define I2 gettynums[18].value

libexec/getty/gettytab.h

126

#define L0 gettynums[19].value

libexec/getty/gettytab.h

128

#define L1 gettynums[20].value

libexec/getty/gettytab.h

130

#define L2 gettynums[21].value

libexec/getty/gettytab.h

132

#define O0 gettynums[22].value

libexec/getty/gettytab.h

134

#define O1 gettynums[23].value

libexec/getty/gettytab.h

136

#define O2 gettynums[24].value

libexec/getty/gettytab.h

138

#define DE gettynums[25].value

libexec/getty/gettytab.h

140

#define RT gettynums[26].value

libexec/getty/gettytab.h

141

#define CT gettynums[27].value

libexec/getty/gettytab.h

142

#define DC gettynums[28].value

libexec/getty/gettytab.h

147

#define HT gettyflags[0].value

libexec/getty/gettytab.h

148

#define NL gettyflags[1].value

libexec/getty/gettytab.h

149

#define EP gettyflags[2].value

libexec/getty/gettytab.h

151

#define OP gettyflags[3].value

libexec/getty/gettytab.h

153

#define AP gettyflags[4].value

libexec/getty/gettytab.h

155

#define EC gettyflags[5].value

libexec/getty/gettytab.h

156

#define CO gettyflags[6].value

libexec/getty/gettytab.h

157

#define CB gettyflags[7].value

libexec/getty/gettytab.h

158

#define CK gettyflags[8].value

libexec/getty/gettytab.h

159

#define CE gettyflags[9].value

libexec/getty/gettytab.h

160

#define PE gettyflags[10].value

libexec/getty/gettytab.h

161

#define RW gettyflags[11].value

libexec/getty/gettytab.h

162

#define XC gettyflags[12].value

libexec/getty/gettytab.h

163

#define LC gettyflags[13].value

libexec/getty/gettytab.h

164

#define UC gettyflags[14].value

libexec/getty/gettytab.h

165

#define IG gettyflags[15].value

libexec/getty/gettytab.h

166

#define PS gettyflags[16].value

libexec/getty/gettytab.h

167

#define HC gettyflags[17].value

libexec/getty/gettytab.h

168

#define UB gettyflags[18].value

libexec/getty/gettytab.h

169

#define AB gettyflags[19].value

libexec/getty/gettytab.h

170

#define DX gettyflags[20].value

libexec/getty/gettytab.h

171

#define NP gettyflags[21].value

libexec/getty/gettytab.h

173

#define MB gettyflags[22].value

libexec/getty/gettytab.h

174

#define HW gettyflags[23].value

libexec/getty/gettytab.h

175

#define NC gettyflags[24].value

libexec/getty/gettytab.h

176

#define PL gettyflags[25].value

libexec/getty/gettytab.h

41

char *value; /* value that we find there */

libexec/getty/gettytab.h

47

long value; /* number we find there */

libexec/getty/gettytab.h

55

char value; /* true/false flag */

libexec/getty/gettytab.h

62

#define NX gettystrs[0].value

libexec/getty/gettytab.h

63

#define CL gettystrs[1].value

libexec/getty/gettytab.h

64

#define IM gettystrs[2].value

libexec/getty/gettytab.h

65

#define LM gettystrs[3].value

libexec/getty/gettytab.h

66

#define ER gettystrs[4].value

libexec/getty/gettytab.h

67

#define KL gettystrs[5].value

libexec/getty/gettytab.h

68

#define ET gettystrs[6].value

libexec/getty/gettytab.h

69

#define PC gettystrs[7].value

libexec/getty/gettytab.h

70

#define TT gettystrs[8].value

libexec/getty/gettytab.h

71

#define EV gettystrs[9].value

libexec/getty/gettytab.h

72

#define LO gettystrs[10].value

libexec/getty/gettytab.h

73

#define HN gettystrs[11].value

libexec/getty/gettytab.h

74

#define HE gettystrs[12].value

libexec/getty/gettytab.h

75

#define IN gettystrs[13].value

libexec/getty/gettytab.h

76

#define QU gettystrs[14].value

libexec/getty/gettytab.h

77

#define XN gettystrs[15].value

libexec/getty/gettytab.h

78

#define XF gettystrs[16].value

libexec/getty/gettytab.h

79

#define BK gettystrs[17].value

libexec/getty/gettytab.h

80

#define SU gettystrs[18].value

libexec/getty/gettytab.h

81

#define DS gettystrs[19].value

libexec/getty/gettytab.h

82

#define RP gettystrs[20].value

libexec/getty/gettytab.h

83

#define FL gettystrs[21].value

libexec/getty/gettytab.h

84

#define WE gettystrs[22].value

libexec/getty/gettytab.h

85

#define LN gettystrs[23].value

libexec/getty/gettytab.h

86

#define Lo gettystrs[24].value

libexec/getty/gettytab.h

87

#define PP gettystrs[25].value

libexec/getty/gettytab.h

88

#define IF gettystrs[26].value

libexec/getty/gettytab.h

89

#define IC gettystrs[27].value

libexec/getty/gettytab.h

90

#define AC gettystrs[28].value

libexec/getty/gettytab.h

91

#define AL gettystrs[29].value

libexec/getty/gettytab.h

92

#define DF gettystrs[30].value

libexec/getty/gettytab.h

93

#define IMP gettystrs[31].value

libexec/getty/gettytab.h

98

#define IS gettynums[0].value

libexec/getty/gettytab.h

99

#define OS gettynums[1].value

libexec/getty/subr.c

122

if (sp->value) {

libexec/getty/subr.c

124

if (strcmp(p, sp->value) != 0)

libexec/getty/subr.c

125

free(sp->value);

libexec/getty/subr.c

128

p = sp->value;

libexec/getty/subr.c

131

sp->value = p;

libexec/getty/subr.c

133

free(sp->value);

libexec/getty/subr.c

134

sp->value = NULL;

libexec/getty/subr.c

143

np->value = n;

libexec/getty/subr.c

152

fp->value = 1 ^ fp->invrt;

libexec/getty/subr.c

165

if (sp->value)

libexec/getty/subr.c

166

sp->defalt = strdup(sp->value);

libexec/getty/subr.c

169

np->defalt = np->value;

libexec/getty/subr.c

172

fp->defalt = fp->value;

libexec/getty/subr.c

185

if (!sp->value)

libexec/getty/subr.c

186

sp->value = !sp->defalt ? sp->defalt

libexec/getty/subr.c

190

np->value = np->defalt;

libexec/getty/subr.c

193

fp->value = fp->defalt;

libexec/getty/subr.c

81

if (sp->value != NULL) {

libexec/getty/subr.c

86

l = strlen(sp->value) + 1;

libexec/getty/subr.c

88

strncpy(p, sp->value, l);

libexec/getty/subr.c

95

sp->value = p;

libexec/rtld-elf/rtld.c

3785

set_program_var(const char *name, const void *value)

libexec/rtld-elf/rtld.c

3790

dbg("\"%s\": *%p <-- %p", name, addr, value);

libexec/rtld-elf/rtld.c

3791

*addr = value;

libexec/telnetd/sys_term.c

764

int value;

libexec/telnetd/sys_term.c

810

cfsetospeed(&termbuf, tp->value);

libexec/telnetd/sys_term.c

826

cfsetispeed(&termbuf, tp->value);

libexec/telnetd/utility.c

102

value = select(s+1, NULL, NULL, &excepts, &timeout);

libexec/telnetd/utility.c

103

} while ((value == -1) && (errno == EINTR));

libexec/telnetd/utility.c

105

if (value < 0) {

libexec/telnetd/utility.c

96

int value;

sbin/camcontrol/modeedit.c

150

newentry->value.svalue = NULL;

sbin/camcontrol/modeedit.c

171

dest->value.ivalue = (intptr_t)arg;

sbin/camcontrol/modeedit.c

195

return (src->value.ivalue);

sbin/camcontrol/modeedit.c

200

return ((intptr_t)src->value.svalue);

sbin/camcontrol/modeedit.c

273

if (dest->value.ivalue != ival)

sbin/camcontrol/modeedit.c

275

dest->value.ivalue = ival;

sbin/camcontrol/modeedit.c

296

if (strncmp(dest->value.svalue, cval, dest->size) == 0) {

sbin/camcontrol/modeedit.c

301

if (dest->value.svalue != NULL) {

sbin/camcontrol/modeedit.c

303

free(dest->value.svalue);

sbin/camcontrol/modeedit.c

304

dest->value.svalue = NULL;

sbin/camcontrol/modeedit.c

306

dest->value.svalue = cval;

sbin/camcontrol/modeedit.c

620

scan->value.svalue);

sbin/camcontrol/modeedit.c

623

scan->value.ivalue);

sbin/camcontrol/modeedit.c

636

char *value; /* Value portion of line buffer. */

sbin/camcontrol/modeedit.c

657

if ((value = strchr(buffer, '#')) != NULL)

sbin/camcontrol/modeedit.c

658

*value = '\0';

sbin/camcontrol/modeedit.c

671

if ((value = strrchr(buffer, ':')) == NULL)

sbin/camcontrol/modeedit.c

673

*value = '\0'; /* Null-terminate name. */

sbin/camcontrol/modeedit.c

674

value++; /* Value starts afterwards. */

sbin/camcontrol/modeedit.c

677

RTRIM(value);

sbin/camcontrol/modeedit.c

678

while (isspace(*value))

sbin/camcontrol/modeedit.c

679

value++;

sbin/camcontrol/modeedit.c

682

if (strlen(value) == 0)

sbin/camcontrol/modeedit.c

686

if (editentry_set(name, value, 1) != 0) {

sbin/camcontrol/modeedit.c

81

} value;

sbin/devattr/devattr.c

160

print_prop(const char* key, prop_object_t value)

sbin/devattr/devattr.c

166

prop_type_t val_type = prop_object_type(value);

sbin/devattr/devattr.c

169

printf("%s\n", prop_bool_true((prop_bool_t)value) ?

sbin/devattr/devattr.c

173

if (prop_number_unsigned((prop_number_t)value))

sbin/devattr/devattr.c

175

prop_number_unsigned_integer_value((prop_number_t)value));

sbin/devattr/devattr.c

178

prop_number_integer_value((prop_number_t)value));

sbin/devattr/devattr.c

181

val_str = prop_string_cstring(value);

sbin/devd/devd.cc

291

const string &value = c.get_variable(_var);

sbin/devd/devd.cc

302

_var.c_str(), value.c_str(), _re.c_str(), _inv);

sbin/devd/devd.cc

305

retval = (regexec(&_regex, value.c_str(), 0, NULL, 0) == 0);

sbin/devd/devd.cc

341

string value;

sbin/devd/devd.cc

351

value = c.get_variable("device-name");

sbin/devd/devd.cc

352

if (value.empty())

sbin/devd/devd.cc

353

value = c.get_variable("subsystem");

sbin/devd/devd.cc

355

value.c_str(), _type);

sbin/devd/devd.cc

362

strncpy(ifmr.ifm_name, value.c_str(), sizeof(ifmr.ifm_name));

sbin/devd/devd.cc

367

value.c_str(), IFM_TYPE(ifmr.ifm_active));

sbin/devd/devd.cc

371

value.c_str());

sbin/devfsctl/devfsctl.c

294

id->devtype = devtypes[i].value;

sbin/devfsctl/devfsctl.c

391

if (devtypes[i].value == id->devtype) {

sbin/devfsctl/devfsctl.c

66

int value;

sbin/dhclient/dhclient.c

1784

script_set_env(const char *prefix, const char *name, const char *value)

sbin/dhclient/dhclient.c

1789

for (j = 0; j < strlen(value); j++)

sbin/dhclient/dhclient.c

1790

switch (value[j]) {

sbin/dhclient/dhclient.c

1794

value[j], value);

sbin/dhclient/dhclient.c

1832

strlen(value) + 1);

sbin/dhclient/dhclient.c

1836

1 + strlen(value) + 1, "%s%s=%s", prefix, name, value);

sbin/fsck_hammer2/reconstruct.c

458

if (bscan->check.iscsi32.value != cv) {

sbin/fsck_hammer2/reconstruct.c

460

bscan->check.iscsi32.value = cv;

sbin/fsck_hammer2/reconstruct.c

466

if (bscan->check.xxhash64.value != cv64) {

sbin/fsck_hammer2/reconstruct.c

468

bscan->check.xxhash64.value = cv64;

sbin/fsck_hammer2/test.c

934

if (bref->check.iscsi32.value != cv) {

sbin/fsck_hammer2/test.c

944

if (bref->check.xxhash64.value != cv64) {

sbin/hammer/cmd_info.c

239

percent(int64_t value, int64_t total)

sbin/hammer/cmd_info.c

245

return ((value * 100.0) / (double)total);

sbin/hammer/cmd_info.c

42

static double percent(int64_t value, int64_t total);

sbin/hammer/hammer_util.h

150

int64_t init_boot_area_size(int64_t value, off_t avg_vol_size);

sbin/hammer/hammer_util.h

151

int64_t init_memory_log_size(int64_t value, off_t avg_vol_size);

sbin/hammer/ondisk.c

1012

init_boot_area_size(int64_t value, off_t avg_vol_size)

sbin/hammer/ondisk.c

1014

if (value == 0) {

sbin/hammer/ondisk.c

1015

value = HAMMER_BOOT_NOMBYTES;

sbin/hammer/ondisk.c

1016

while (value > avg_vol_size / HAMMER_MAX_VOLUMES)

sbin/hammer/ondisk.c

1017

value >>= 1;

sbin/hammer/ondisk.c

1020

if (value < HAMMER_BOOT_MINBYTES)

sbin/hammer/ondisk.c

1021

value = HAMMER_BOOT_MINBYTES;

sbin/hammer/ondisk.c

1022

else if (value > HAMMER_BOOT_MAXBYTES)

sbin/hammer/ondisk.c

1023

value = HAMMER_BOOT_MAXBYTES;

sbin/hammer/ondisk.c

1025

return(value);

sbin/hammer/ondisk.c

1029

init_memory_log_size(int64_t value, off_t avg_vol_size)

sbin/hammer/ondisk.c

1031

if (value == 0) {

sbin/hammer/ondisk.c

1032

value = HAMMER_MEM_NOMBYTES;

sbin/hammer/ondisk.c

1033

while (value > avg_vol_size / HAMMER_MAX_VOLUMES)

sbin/hammer/ondisk.c

1034

value >>= 1;

sbin/hammer/ondisk.c

1037

if (value < HAMMER_MEM_MINBYTES)

sbin/hammer/ondisk.c

1038

value = HAMMER_MEM_MINBYTES;

sbin/hammer/ondisk.c

1039

else if (value > HAMMER_MEM_MAXBYTES)

sbin/hammer/ondisk.c

1040

value = HAMMER_MEM_MAXBYTES;

sbin/hammer/ondisk.c

1042

return(value);

sbin/hammer2/cmd_debug.c

1252

count_blocks(hammer2_bmap_data_t *bmap, int value,

sbin/hammer2/cmd_debug.c

1261

value16 = value;

sbin/hammer2/cmd_debug.c

50

static void count_blocks(hammer2_bmap_data_t *bmap, int value,

sbin/hammer2/cmd_debug.c

947

if (bref->check.iscsi32.value != cv) {

sbin/hammer2/cmd_debug.c

950

bref->check.iscsi32.value,

sbin/hammer2/cmd_debug.c

960

if (bref->check.xxhash64.value != cv64) {

sbin/hammer2/cmd_debug.c

963

bref->check.xxhash64.value,

sbin/hammer2/cmd_info.c

439

if (bref->check.iscsi32.value != cv) {

sbin/hammer2/cmd_info.c

442

bref->check.iscsi32.value,

sbin/hammer2/cmd_info.c

448

if (bref->check.xxhash64.value != cv64) {

sbin/hammer2/cmd_info.c

451

bref->check.xxhash64.value,

sbin/hammer2/cmd_recover.c

1504

if (bref->check.iscsi32.value == cv) {

sbin/hammer2/cmd_recover.c

1510

if (bref->check.xxhash64.value == cv64) {

sbin/hammer2/lz4/hammer2_lz4.c

96

# define expect(expr,value) (__builtin_expect ((expr),(value)) )

sbin/hammer2/lz4/hammer2_lz4.c

98

# define expect(expr,value) (expr)

sbin/hammer2/zlib/hammer2_zlib_inflate.c

101

int inflatePrime(z_streamp strm, int bits, int value);

sbin/hammer2/zlib/hammer2_zlib_inflate.c

211

inflatePrime(z_streamp strm, int bits, int value)

sbin/hammer2/zlib/hammer2_zlib_inflate.c

223

value &= (1L << bits) - 1;

sbin/hammer2/zlib/hammer2_zlib_inflate.c

224

state->hold += value << state->bits;

sbin/hammer2/zlib/hammer2_zlib_trees.c

152

local unsigned bi_reverse (unsigned value, int length);

sbin/hammer2/zlib/hammer2_zlib_trees.c

186

local void send_bits (deflate_state *s, int value, int length);

sbin/hammer2/zlib/hammer2_zlib_trees.c

190

send_bits(deflate_state *s, int value, int length)

sbin/hammer2/zlib/hammer2_zlib_trees.c

192

Tracevv((stderr," l %2d v %4x ", length, value));

sbin/hammer2/zlib/hammer2_zlib_trees.c

201

s->bi_buf |= (ush)value << s->bi_valid;

sbin/hammer2/zlib/hammer2_zlib_trees.c

203

s->bi_buf = (ush)value >> (Buf_size - s->bi_valid);

sbin/hammer2/zlib/hammer2_zlib_trees.c

206

s->bi_buf |= (ush)value << s->bi_valid;

sbin/hammer2/zlib/hammer2_zlib_trees.c

212

#define send_bits(s, value, length) \

sbin/hammer2/zlib/hammer2_zlib_trees.c

215

int val = value;\

sbin/hammer2/zlib/hammer2_zlib_trees.c

221

s->bi_buf |= (ush)(value) << s->bi_valid;\

sbin/ifconfig/ifconfig.c

1061

setifflags(const char *vname, int value, int s,

sbin/ifconfig/ifconfig.c

1068

if (value < 0) {

sbin/ifconfig/ifconfig.c

1069

value = -value;

sbin/ifconfig/ifconfig.c

1070

flags &= ~value;

sbin/ifconfig/ifconfig.c

1072

flags |= value;

sbin/ifconfig/ifconfig.c

1085

setifcap(const char *vname, int value, int s,

sbin/ifconfig/ifconfig.c

1098

if (value < 0) {

sbin/ifconfig/ifconfig.c

1099

value = -value;

sbin/ifconfig/ifconfig.c

1100

flags &= ~value;

sbin/ifconfig/ifconfig.c

1102

flags |= value;

sbin/ifconfig/ifconfig.h

151

void setifcap(const char *, int value, int s, const struct afswtch *);

sbin/ifconfig/ifconfig.h

154

void printb(const char *s, unsigned value, const char *bits);

sbin/ifconfig/regdomain.c

187

uint32_t value;

sbin/ifconfig/regdomain.c

236

return flags[i].value;

sbin/ip6fw/ip6fw.c

690

u_char value;

sbin/ip6fw/ip6fw.c

712

*d |= flags[i].value;

sbin/ipfw/ipfw2.c

374

match_value(struct _s_x *p, u_int32_t value)

sbin/ipfw/ipfw2.c

377

if (p->x == value)

sbin/newfs_hammer2/mkfs_hammer2.c

404

root_blockref[i].check.xxhash64.value =

sbin/newfs_hammer2/mkfs_hammer2.c

473

sroot_blockref.check.xxhash64.value =

sbin/nvmectl/nvmectl.h

51

const char *format_number(uint64_t value);

sbin/nvmectl/subs.c

38

format_number(uint64_t value)

sbin/nvmectl/subs.c

42

humanize_number(buf, sizeof(buf), value, "",

sbin/route/route.c

590

set_metric(char *value, int key)

sbin/route/route.c

614

*valp = atoi(value);

sbin/routed/rtquery/rtquery.c

109

char *p, *options, *value, delim;

sbin/routed/rtquery/rtquery.c

184

switch (getsubopt(&options,traceopts,&value)) {

sbin/routed/rtquery/rtquery.c

187

if (!value

sbin/routed/rtquery/rtquery.c

188

|| strlen(value) > MAXPATHLEN)

sbin/routed/rtquery/rtquery.c

190

result = value;

sbin/routed/rtquery/rtquery.c

193

if (value)

sbin/routed/rtquery/rtquery.c

198

if (value)

sbin/routed/rtquery/rtquery.c

203

if (value)

sbin/sysctl/sysctl.c

443

(s->value - 273150000) / 1000000.0);

sbin/sysctl/sysctl.c

446

printf("%jd RPM", (intmax_t)s->value);

sbin/sysctl/sysctl.c

449

printf("%.2f VDC", s->value / 1000000.0);

sbin/sysctl/sysctl.c

452

printf("%.2f W", s->value / 1000000.0);

sbin/sysctl/sysctl.c

455

printf("%.2f A", s->value / 1000000.0);

sbin/sysctl/sysctl.c

458

printf("%.2f Wh", s->value / 1000000.0);

sbin/sysctl/sysctl.c

461

printf("%.2f Ah", s->value / 1000000.0);

sbin/sysctl/sysctl.c

464

printf("%s", s->value ? "On" : "Off");

sbin/sysctl/sysctl.c

467

printf("%jd Hz", (intmax_t)s->value);

sbin/sysctl/sysctl.c

471

printf("%jd", (intmax_t)s->value);

sbin/sysctl/sysctl.c

474

printf("%.2f%%", s->value / 1000.0);

sbin/sysctl/sysctl.c

477

printf("%.2f lx", s->value / 1000000.0);

sbin/sysctl/sysctl.c

483

switch (s->value) {

sbin/sysctl/sysctl.c

522

printf("%.6f secs", s->value / 1000000000.0);

stand/boot/common/bootstrap.h

315

void (*arch_isaoutb)(int port, int value);

stand/boot/common/console.c

144

isa_outb(int port, int value)

stand/boot/common/console.c

146

u_char al = value;

stand/boot/common/console.c

201

cons_set(struct env_var *ev, int flags, const void *value)

stand/boot/common/console.c

205

if ((value == NULL) || ((active = cons_find(value)) == -1)) {

stand/boot/common/console.c

206

if (value != NULL)

stand/boot/common/console.c

207

printf("no such console '%s'\n", (char *)value);

stand/boot/common/console.c

222

env_setenv(ev->ev_name, flags | EV_NOHOOK, value, NULL, NULL);

stand/boot/common/console.c

38

static int cons_set(struct env_var *ev, int flags, const void *value);

stand/boot/common/fs.h

218

int64_t value; /* inode or block number to be affected */

stand/boot/efi/loader/devicename.c

163

efi_setcurrdev(struct env_var *ev, int flags, const void *value)

stand/boot/efi/loader/devicename.c

168

rv = efi_parsedev(&ncurr, value, NULL);

stand/boot/efi/loader/devicename.c

173

env_setenv(ev->ev_name, flags | EV_NOHOOK, value, NULL, NULL);

stand/boot/efi/loader/loader_efi.h

41

int efi_setcurrdev(struct env_var *ev, int flags, const void *value);

stand/boot/pc32/libi386/devicename.c

233

i386_setcurrdev(struct env_var *ev, int flags, const void *value)

stand/boot/pc32/libi386/devicename.c

238

if ((rv = i386_parsedev(&ncurr, value, NULL)) != 0)

stand/boot/pc32/libi386/devicename.c

241

env_setenv(ev->ev_name, flags | EV_NOHOOK, value, NULL, NULL);

stand/boot/pc32/libi386/libi386.h

89

int i386_setcurrdev(struct env_var *ev, int flags, const void *value);

stand/boot/pc32/loader/main.c

409

isa_outb(int port, int value)

stand/boot/pc32/loader/main.c

411

u_char al = value;

stand/boot/pc32/loader/main.c

99

static void isa_outb(int port, int value);

stand/lib/environment.c

128

ev->ev_value = strdup(value);

stand/lib/environment.c

130

ev->ev_value = (char *)value;

stand/lib/environment.c

154

setenv(const char *name, const char *value, int overwrite)

stand/lib/environment.c

158

return(env_setenv(name, EV_VOLATILE, value, NULL, NULL));

stand/lib/environment.c

165

char *value, *copy;

stand/lib/environment.c

169

if ((value = strchr(copy, '=')) != NULL)

stand/lib/environment.c

170

*(value++) = 0;

stand/lib/environment.c

171

result = setenv(copy, value, 1);

stand/lib/environment.c

211

env_noset(struct env_var *ev, int flags, const void *value)

stand/lib/environment.c

68

env_setenv(const char *name, int flags, const void *value,

stand/lib/environment.c

79

return(ev->ev_sethook(ev, flags, value));

sys/bus/cam/cam_extend.c

54

cam_extend_set(struct extend_array *ea, int index, void *value)

sys/bus/cam/cam_extend.c

75

ea->ps[index] = value;

sys/bus/cam/cam_extend.c

77

return value;

sys/bus/cam/cam_extend.h

27

void *cam_extend_set(struct extend_array *ea, int index, void *value);

sys/bus/cam/scsi/scsi_cd.c

633

int error, value;

sys/bus/cam/scsi/scsi_cd.c

635

value = *(int *)arg1;

sys/bus/cam/scsi/scsi_cd.c

637

error = sysctl_handle_int(oidp, &value, 0, req);

sys/bus/cam/scsi/scsi_cd.c

652

if (value < 6)

sys/bus/cam/scsi/scsi_cd.c

653

value = 6;

sys/bus/cam/scsi/scsi_cd.c

654

else if (value > 6)

sys/bus/cam/scsi/scsi_cd.c

655

value = 10;

sys/bus/cam/scsi/scsi_cd.c

657

*(int *)arg1 = value;

sys/bus/cam/scsi/scsi_da.c

1090

int error, value;

sys/bus/cam/scsi/scsi_da.c

1092

value = *(int *)arg1;

sys/bus/cam/scsi/scsi_da.c

1094

error = sysctl_handle_int(oidp, &value, 0, req);

sys/bus/cam/scsi/scsi_da.c

1103

if (value < 6)

sys/bus/cam/scsi/scsi_da.c

1104

value = 6;

sys/bus/cam/scsi/scsi_da.c

1105

else if ((value > 6)

sys/bus/cam/scsi/scsi_da.c

1106

&& (value <= 10))

sys/bus/cam/scsi/scsi_da.c

1107

value = 10;

sys/bus/cam/scsi/scsi_da.c

1108

else if ((value > 10)

sys/bus/cam/scsi/scsi_da.c

1109

&& (value <= 12))

sys/bus/cam/scsi/scsi_da.c

1110

value = 12;

sys/bus/cam/scsi/scsi_da.c

1111

else if (value > 12)

sys/bus/cam/scsi/scsi_da.c

1112

value = 16;

sys/bus/cam/scsi/scsi_da.c

1114

*(int *)arg1 = value;

sys/bus/gpio/gpio_intel/gpio_cherryview.c

496

gpio_cherryview_write_pin(struct gpio_intel_softc *sc, uint16_t pin, int value)

sys/bus/gpio/gpio_intel/gpio_cherryview.c

505

if (value)

sys/bus/gpio/gpio_intel/gpio_cherryview.c

98

uint16_t pin, int value);

sys/bus/gpio/gpio_intel/gpio_intel.c

373

gpio_intel_write_pin(device_t dev, void *cookie, int value)

sys/bus/gpio/gpio_intel/gpio_intel.c

382

sc->fns->write_pin(sc, map->pin, value);

sys/bus/gpio/gpio_intel/gpio_intel.c

71

static void gpio_intel_write_pin(device_t dev, void *cookie, int value);

sys/bus/gpio/gpio_intel/gpio_intel_var.h

48

uint16_t pin, int value);

sys/bus/isa/isa_common.c

747

int index, uintptr_t value)

sys/bus/isa/isa_common.c

767

idev->id_vendorid = value;

sys/bus/isa/isa_common.c

771

idev->id_serial = value;

sys/bus/isa/isa_common.c

775

idev->id_logicalid = value;

sys/bus/isa/isa_common.c

779

idev->id_compatid = value;

sys/bus/mmc/mmc.c

131

uintptr_t value);

sys/bus/mmc/mmc.c

170

uint8_t value, uint8_t *res);

sys/bus/mmc/mmc.c

1966

mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)

sys/bus/mmc/mmc.c

617

mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,

sys/bus/mmc/mmc.c

633

cmd.arg |= value << (grp * 4);

sys/bus/mmc/mmc.c

649

uint8_t value;

sys/bus/mmc/mmc.c

678

value = EXT_CSD_BUS_WIDTH_1;

sys/bus/mmc/mmc.c

686

value = EXT_CSD_BUS_WIDTH_4_DDR;

sys/bus/mmc/mmc.c

689

value = EXT_CSD_BUS_WIDTH_4;

sys/bus/mmc/mmc.c

699

value = EXT_CSD_BUS_WIDTH_8_DDR;

sys/bus/mmc/mmc.c

702

value = EXT_CSD_BUS_WIDTH_8;

sys/bus/mmc/mmc.c

710

EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value,

sys/bus/mmc/mmc.c

722

uint8_t value;

sys/bus/mmc/mmc.c

728

value = 0;

sys/bus/mmc/mmc.c

734

value = ext_csd[EXT_CSD_PWR_CL_26_195];

sys/bus/mmc/mmc.c

738

value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR];

sys/bus/mmc/mmc.c

740

value = ext_csd[EXT_CSD_PWR_CL_52_195];

sys/bus/mmc/mmc.c

742

value = ext_csd[EXT_CSD_PWR_CL_200_195];

sys/bus/mmc/mmc.c

755

value = ext_csd[EXT_CSD_PWR_CL_26_360];

sys/bus/mmc/mmc.c

759

value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR];

sys/bus/mmc/mmc.c

761

value = ext_csd[EXT_CSD_PWR_CL_52_360];

sys/bus/mmc/mmc.c

764

value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR];

sys/bus/mmc/mmc.c

766

value = ext_csd[EXT_CSD_PWR_CL_200_360];

sys/bus/mmc/mmc.c

776

value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >>

sys/bus/mmc/mmc.c

779

value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >>

sys/bus/mmc/mmc.c

782

if (value == 0)

sys/bus/mmc/mmc.c

786

EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));

sys/bus/mmc/mmc.c

794

uint8_t value;

sys/bus/mmc/mmc.c

800

value = SD_SWITCH_NORMAL_MODE;

sys/bus/mmc/mmc.c

803

value = SD_SWITCH_HS_MODE;

sys/bus/mmc/mmc.c

809

value, switch_res);

sys/bus/mmc/mmc.c

812

if ((switch_res[16] & 0xf) != value)

sys/bus/mmc/mmc.c

819

value = EXT_CSD_HS_TIMING_BC;

sys/bus/mmc/mmc.c

823

value = EXT_CSD_HS_TIMING_HS;

sys/bus/mmc/mmc.c

829

EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value,

sys/bus/mmc/mmc_subr.c

153

uint8_t index, uint8_t value, u_int timeout, bool status)

sys/bus/mmc/mmc_subr.c

162

cmd.arg = (MMC_SWITCH_FUNC_WR << 24) | (index << 16) | (value << 8) |

sys/bus/mmc/mmc_subr.h

64

uint8_t index, uint8_t value, u_int timeout, bool send_status);

sys/bus/pci/hostb_pci.c

98

pci_hostb_write_ivar(device_t dev, device_t child, int which, uintptr_t value)

sys/bus/pci/pci.c

1180

cfg->vpd.vpd_ros[off].value = kmalloc(1 *

sys/bus/pci/pci.c

1181

sizeof(*cfg->vpd.vpd_ros[off].value),

sys/bus/pci/pci.c

1183

cfg->vpd.vpd_ros[off].value[0] = '\x00';

sys/bus/pci/pci.c

1185

cfg->vpd.vpd_ros[off].value = kmalloc(

sys/bus/pci/pci.c

1187

sizeof(*cfg->vpd.vpd_ros[off].value),

sys/bus/pci/pci.c

1201

cfg->vpd.vpd_ros[off].value[i++] = byte;

sys/bus/pci/pci.c

1222

cfg->vpd.vpd_ros[off++].value[i++] = '\0';

sys/bus/pci/pci.c

1257

cfg->vpd.vpd_w[off].value = kmalloc((dflen + 1) *

sys/bus/pci/pci.c

1258

sizeof(*cfg->vpd.vpd_w[off].value),

sys/bus/pci/pci.c

1272

cfg->vpd.vpd_w[off].value[i++] = byte;

sys/bus/pci/pci.c

1277

cfg->vpd.vpd_w[off++].value[i++] = '\0';

sys/bus/pci/pci.c

1300

for (off = 0; cfg->vpd.vpd_ros[off].value; off++)

sys/bus/pci/pci.c

1301

kfree(cfg->vpd.vpd_ros[off].value, M_DEVBUF);

sys/bus/pci/pci.c

1315

for (off = 0; cfg->vpd.vpd_w[off].value; off++)

sys/bus/pci/pci.c

1316

kfree(cfg->vpd.vpd_w[off].value, M_DEVBUF);

sys/bus/pci/pci.c

1357

*vptr = cfg->vpd.vpd_ros[i].value;

sys/bus/pci/pci.c

2149

kfree(dinfo->cfg.vpd.vpd_ros[i].value, M_DEVBUF);

sys/bus/pci/pci.c

2152

kfree(dinfo->cfg.vpd.vpd_w[i].value, M_DEVBUF);

sys/bus/pci/pci.c

3831

pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value)

sys/bus/pci/pci.c

3839

dinfo->cfg.intpin = value;

sys/bus/pci/pci_pci.c

370

pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)

sys/bus/pci/pci_pci.c

378

sc->secbus = value;

sys/bus/pci/pci_private.h

52

uintptr_t value);

sys/bus/pci/pci_user.c

312

uint32_t value;

sys/bus/pci/pci_user.c

711

value = pci_read_config(pcidev, bio->pbi_reg, 4);

sys/bus/pci/pci_user.c

712

if (PCI_BAR_MEM(value)) {

sys/bus/pci/pci_user.c

717

value &= ~PCIM_BAR_MEM_BASE;

sys/bus/pci/pci_user.c

723

value &= ~PCIM_BAR_IO_BASE;

sys/bus/pci/pci_user.c

725

bio->pbi_base = rman_get_start(rle->res) | value;

sys/bus/pci/pci_user.c

732

value = pci_read_config(pcidev, PCIR_COMMAND, 2);

sys/bus/pci/pci_user.c

734

bio->pbi_enabled = (value & PCIM_CMD_MEMEN) != 0;

sys/bus/pci/pci_user.c

736

bio->pbi_enabled = (value & PCIM_CMD_PORTEN) != 0;

sys/bus/pci/pcib_private.h

73

int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);

sys/bus/pci/pcivar.h

60

char *value;

sys/bus/pci/pcivar.h

65

char *value;

sys/bus/pci/vga_pci.c

394

vga_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value)

sys/bus/pci/x86_64/legacy.c

217

legacy_write_ivar(device_t dev, device_t child, int which, uintptr_t value)

sys/bus/pci/x86_64/legacy.c

225

atdev->lg_pcibus = value;

sys/bus/pci/x86_64/legacyvar.h

53

uintptr_t value);

sys/bus/pci/x86_64/pci_bus.c

496

uintptr_t value)

sys/bus/pci/x86_64/pci_bus.c

503

legacy_set_pcibus(dev, value);

sys/bus/smbus/amdsmb/amdsmb.c

120

#define AMDSMB_ECOUTB(amdsmb, register, value) \

sys/bus/smbus/amdsmb/amdsmb.c

121

(bus_write_1(amdsmb->res, register, value))

sys/bus/smbus/ichiic/ig4_iic.c

77

reg_write(ig4iic_softc_t *sc, uint32_t reg, uint32_t value)

sys/bus/smbus/ichiic/ig4_iic.c

79

bus_space_write_4(sc->regs_t, sc->regs_h, reg, value);

sys/bus/smbus/ichiic/ig4_iic.c

88

uint32_t value;

sys/bus/smbus/ichiic/ig4_iic.c

92

value = bus_space_read_4(sc->regs_t, sc->regs_h, reg);

sys/bus/smbus/ichiic/ig4_iic.c

93

return value;

sys/bus/u4b/controller/ehci.c

3107

uint16_t value;

sys/bus/u4b/controller/ehci.c

3118

value = UGETW(req->wValue);

sys/bus/u4b/controller/ehci.c

3124

UGETW(req->wLength), value, index);

sys/bus/u4b/controller/ehci.c

3141

switch (value >> 8) {

sys/bus/u4b/controller/ehci.c

3143

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/ehci.c

3156

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/ehci.c

3165

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/ehci.c

3174

switch (value & 0xff) {

sys/bus/u4b/controller/ehci.c

3216

if (value >= EHCI_MAX_DEVICES) {

sys/bus/u4b/controller/ehci.c

3220

sc->sc_addr = value;

sys/bus/u4b/controller/ehci.c

3223

if ((value != 0) && (value != 1)) {

sys/bus/u4b/controller/ehci.c

3227

sc->sc_conf = value;

sys/bus/u4b/controller/ehci.c

3253

switch (value) {

sys/bus/u4b/controller/ehci.c

3308

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/ehci.c

3397

switch (value) {

sys/bus/u4b/controller/ohci.c

2092

uint16_t value;

sys/bus/u4b/controller/ohci.c

2104

value = UGETW(req->wValue);

sys/bus/u4b/controller/ohci.c

2110

UGETW(req->wLength), value, index);

sys/bus/u4b/controller/ohci.c

2127

switch (value >> 8) {

sys/bus/u4b/controller/ohci.c

2129

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/ohci.c

2138

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/ohci.c

2147

switch (value & 0xff) {

sys/bus/u4b/controller/ohci.c

2190

if (value >= OHCI_MAX_DEVICES) {

sys/bus/u4b/controller/ohci.c

2194

sc->sc_addr = value;

sys/bus/u4b/controller/ohci.c

2197

if ((value != 0) && (value != 1)) {

sys/bus/u4b/controller/ohci.c

2201

sc->sc_conf = value;

sys/bus/u4b/controller/ohci.c

2220

index, value);

sys/bus/u4b/controller/ohci.c

2227

switch (value) {

sys/bus/u4b/controller/ohci.c

2257

switch (value) {

sys/bus/u4b/controller/ohci.c

2272

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/ohci.c

2330

switch (value) {

sys/bus/u4b/controller/uhci.c

2485

uint16_t value;

sys/bus/u4b/controller/uhci.c

2499

value = UGETW(req->wValue);

sys/bus/u4b/controller/uhci.c

2505

UGETW(req->wLength), value, index);

sys/bus/u4b/controller/uhci.c

2522

switch (value >> 8) {

sys/bus/u4b/controller/uhci.c

2524

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/uhci.c

2533

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/uhci.c

2542

switch (value & 0xff) {

sys/bus/u4b/controller/uhci.c

2585

if (value >= UHCI_MAX_DEVICES) {

sys/bus/u4b/controller/uhci.c

2589

sc->sc_addr = value;

sys/bus/u4b/controller/uhci.c

2592

if ((value != 0) && (value != 1)) {

sys/bus/u4b/controller/uhci.c

2596

sc->sc_conf = value;

sys/bus/u4b/controller/uhci.c

2615

index, value);

sys/bus/u4b/controller/uhci.c

2624

switch (value) {

sys/bus/u4b/controller/uhci.c

2680

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/uhci.c

2758

switch (value) {

sys/bus/u4b/controller/xhci.c

3307

uint16_t value;

sys/bus/u4b/controller/xhci.c

3319

value = UGETW(req->wValue);

sys/bus/u4b/controller/xhci.c

3325

UGETW(req->wLength), value, index);

sys/bus/u4b/controller/xhci.c

3342

switch (value >> 8) {

sys/bus/u4b/controller/xhci.c

3344

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/xhci.c

3353

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/xhci.c

3362

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/xhci.c

3371

switch (value & 0xff) {

sys/bus/u4b/controller/xhci.c

3414

if (value >= XHCI_MAX_DEVICES) {

sys/bus/u4b/controller/xhci.c

3420

if (value != 0 && value != 1) {

sys/bus/u4b/controller/xhci.c

3424

sc->sc_conf = value;

sys/bus/u4b/controller/xhci.c

3454

switch (value) {

sys/bus/u4b/controller/xhci.c

3508

if ((value & 0xff) != 0) {

sys/bus/u4b/controller/xhci.c

3638

switch (value) {

sys/bus/u4b/misc/ufm.c

178

uint16_t value, uint16_t index, uint8_t *retbuf)

sys/bus/u4b/misc/ufm.c

187

USETW(req.wValue, value);

sys/bus/u4b/net/if_cdce.c

325

uint8_t value[8];

sys/bus/u4b/net/if_cdce.c

451

USETDW(value, sc->sc_ncm.rx_max);

sys/bus/u4b/net/if_cdce.c

452

USETW(value + 4, (CDCE_NCM_SUBFRAMES_MAX - 1));

sys/bus/u4b/net/if_cdce.c

453

USETW(value + 6, 0);

sys/bus/u4b/net/if_cdce.c

456

USETDW(value, sc->sc_ncm.rx_max);

sys/bus/u4b/net/if_cdce.c

460

&value, 0, NULL, 1000 /* ms */);

sys/bus/u4b/net/if_urndis.c

408

uint16_t index, uint16_t value, void *buf, uint16_t buflen)

sys/bus/u4b/net/if_urndis.c

414

USETW(req.wValue, value);

sys/bus/u4b/quirk/usb_quirk.c

975

unsigned long value;

sys/bus/u4b/quirk/usb_quirk.c

978

value = strtoul(*pptr, &end, 0);

sys/bus/u4b/quirk/usb_quirk.c

979

if (value > 65535 || *pptr == end || (*end != ' ' && *end != '\t')) {

sys/bus/u4b/quirk/usb_quirk.c

985

return ((uint16_t)value);

sys/bus/u4b/serial/uark.c

418

uark_cfg_write(struct uark_softc *sc, uint16_t index, uint16_t value)

sys/bus/u4b/serial/uark.c

425

USETW(req.wValue, value);

sys/bus/u4b/serial/ubsa.c

347

ubsa_cfg_request(struct ubsa_softc *sc, uint8_t index, uint16_t value)

sys/bus/u4b/serial/ubsa.c

354

USETW(req.wValue, value);

sys/bus/u4b/serial/ubsa.c

427

uint16_t value = 0;

sys/bus/u4b/serial/ubsa.c

448

value = B230400 / t->c_ospeed;

sys/bus/u4b/serial/ubsa.c

449

ubsa_cfg_request(sc, UBSA_REG_BAUDRATE, value);

sys/bus/u4b/serial/ubsa.c

456

value = (t->c_cflag & PARODD) ? UBSA_PARITY_ODD : UBSA_PARITY_EVEN;

sys/bus/u4b/serial/ubsa.c

458

value = UBSA_PARITY_NONE;

sys/bus/u4b/serial/ubsa.c

460

ubsa_cfg_request(sc, UBSA_REG_PARITY, value);

sys/bus/u4b/serial/ubsa.c

464

value = 0;

sys/bus/u4b/serial/ubsa.c

467

value = 1;

sys/bus/u4b/serial/ubsa.c

470

value = 2;

sys/bus/u4b/serial/ubsa.c

474

value = 3;

sys/bus/u4b/serial/ubsa.c

478

ubsa_cfg_request(sc, UBSA_REG_DATA_BITS, value);

sys/bus/u4b/serial/ubsa.c

480

value = (t->c_cflag & CSTOPB) ? 1 : 0;

sys/bus/u4b/serial/ubsa.c

482

ubsa_cfg_request(sc, UBSA_REG_STOP_BITS, value);

sys/bus/u4b/serial/ubsa.c

484

value = 0;

sys/bus/u4b/serial/ubsa.c

486

value |= UBSA_FLOW_OCTS | UBSA_FLOW_IRTS;

sys/bus/u4b/serial/ubsa.c

489

value |= UBSA_FLOW_OXON | UBSA_FLOW_IXON;

sys/bus/u4b/serial/ubsa.c

491

ubsa_cfg_request(sc, UBSA_REG_FLOW_CTRL, value);

sys/bus/u4b/serial/uchcom.c

371

uint16_t value, uint16_t index)

sys/bus/u4b/serial/uchcom.c

377

USETW(req.wValue, value);

sys/bus/u4b/serial/uchcom.c

387

uint16_t value, uint16_t index, void *buf, uint16_t buflen)

sys/bus/u4b/serial/uchcom.c

393

USETW(req.wValue, value);

sys/bus/u4b/serial/umct.c

128

uint16_t len, uint32_t value);

sys/bus/u4b/serial/umct.c

316

uint16_t len, uint32_t value)

sys/bus/u4b/serial/umct.c

330

USETDW(temp, value);

sys/bus/u4b/serial/umct.c

469

uint32_t value;

sys/bus/u4b/serial/umct.c

471

value = umct_calc_baud(t->c_ospeed);

sys/bus/u4b/serial/umct.c

472

umct_cfg_do_request(sc, UMCT_SET_BAUD, UMCT_SET_BAUD_SIZE, value);

sys/bus/u4b/serial/umct.c

474

value = (sc->sc_lcr & 0x40);

sys/bus/u4b/serial/umct.c

478

value |= 0x0;

sys/bus/u4b/serial/umct.c

481

value |= 0x1;

sys/bus/u4b/serial/umct.c

484

value |= 0x2;

sys/bus/u4b/serial/umct.c

488

value |= 0x3;

sys/bus/u4b/serial/umct.c

492

value |= (t->c_cflag & CSTOPB) ? 0x4 : 0;

sys/bus/u4b/serial/umct.c

494

value |= 0x8;

sys/bus/u4b/serial/umct.c

495

value |= (t->c_cflag & PARODD) ? 0x0 : 0x10;

sys/bus/u4b/serial/umct.c

502

sc->sc_lcr = value;

sys/bus/u4b/serial/umct.c

503

umct_cfg_do_request(sc, UMCT_SET_LCR, UMCT_SET_LCR_SIZE, value);

sys/bus/u4b/serial/uplcom.c

477

uint16_t value, uint16_t index, uint16_t length)

sys/bus/u4b/serial/uplcom.c

485

USETW(req.wValue, value);

sys/bus/u4b/serial/uvscom.c

539

uint16_t value;

sys/bus/u4b/serial/uvscom.c

545

value = UVSCOM_SPEED_150BPS;

sys/bus/u4b/serial/uvscom.c

548

value = UVSCOM_SPEED_300BPS;

sys/bus/u4b/serial/uvscom.c

551

value = UVSCOM_SPEED_600BPS;

sys/bus/u4b/serial/uvscom.c

554

value = UVSCOM_SPEED_1200BPS;

sys/bus/u4b/serial/uvscom.c

557

value = UVSCOM_SPEED_2400BPS;

sys/bus/u4b/serial/uvscom.c

560

value = UVSCOM_SPEED_4800BPS;

sys/bus/u4b/serial/uvscom.c

563

value = UVSCOM_SPEED_9600BPS;

sys/bus/u4b/serial/uvscom.c

566

value = UVSCOM_SPEED_19200BPS;

sys/bus/u4b/serial/uvscom.c

569

value = UVSCOM_SPEED_38400BPS;

sys/bus/u4b/serial/uvscom.c

572

value = UVSCOM_SPEED_57600BPS;

sys/bus/u4b/serial/uvscom.c

575

value = UVSCOM_SPEED_115200BPS;

sys/bus/u4b/serial/uvscom.c

581

uvscom_cfg_write(sc, UVSCOM_SET_SPEED, value);

sys/bus/u4b/serial/uvscom.c

583

value = 0;

sys/bus/u4b/serial/uvscom.c

586

value |= UVSCOM_STOP_BIT_2;

sys/bus/u4b/serial/uvscom.c

590

value |= UVSCOM_PARITY_ODD;

sys/bus/u4b/serial/uvscom.c

592

value |= UVSCOM_PARITY_EVEN;

sys/bus/u4b/serial/uvscom.c

595

value |= UVSCOM_PARITY_NONE;

sys/bus/u4b/serial/uvscom.c

600

value |= UVSCOM_DATA_BIT_5;

sys/bus/u4b/serial/uvscom.c

603

value |= UVSCOM_DATA_BIT_6;

sys/bus/u4b/serial/uvscom.c

606

value |= UVSCOM_DATA_BIT_7;

sys/bus/u4b/serial/uvscom.c

610

value |= UVSCOM_DATA_BIT_8;

sys/bus/u4b/serial/uvscom.c

614

uvscom_cfg_write(sc, UVSCOM_SET_PARAM, value);

sys/bus/u4b/serial/uvscom.c

695

uvscom_cfg_write(struct uvscom_softc *sc, uint8_t index, uint16_t value)

sys/bus/u4b/serial/uvscom.c

702

USETW(req.wValue, value);

sys/bus/u4b/storage/rio500_usb.h

38

int value;

sys/bus/u4b/storage/umass.c

2056

sc->sbl.common.type, sc->sbl.common.value);

sys/bus/u4b/storage/umass.c

2059

status = (sc->sbl.common.value & IDB_VALUE_STATUS_MASK);

sys/bus/u4b/storage/umass.c

287

uint8_t value;

sys/bus/u4b/storage/urio.c

465

USETW(ur.ucr_request.wValue, rio_cmd->value);

sys/bus/u4b/usb_hid.c

705

struct hid_location *loc, unsigned int value)

sys/bus/u4b/usb_hid.c

714

DPRINTFN(11, "hid_put_data: loc %d/%d = %u\n", hpos, hsize, value);

sys/bus/u4b/usb_hid.c

725

data = ((uint64_t)value) << (hpos % 8);

sys/bus/u4b/usbhid.h

237

struct hid_location *loc, unsigned int value);

sys/bus/u4b/uvc/uvc_ctrls.c

1024

if (menu_items[i].value == query->default_value) {

sys/bus/u4b/uvc/uvc_drv.h

466

uint32_t value;

sys/bus/u4b/uvc/uvc_drv.h

515

void (*set)(struct uvc_ctrl_sub_info *this, int32_t value,

sys/cpu/x86_64/include/atomic.h

180

atomic_swap_int(volatile int *addr, int value)

sys/cpu/x86_64/include/atomic.h

183

"=r" (value), "=m" (*addr) : "0" (value) : "memory");

sys/cpu/x86_64/include/atomic.h

184

return (value);

sys/cpu/x86_64/include/atomic.h

188

atomic_swap_long(volatile long *addr, long value)

sys/cpu/x86_64/include/atomic.h

191

"=r" (value), "=m" (*addr) : "0" (value) : "memory");

sys/cpu/x86_64/include/atomic.h

192

return (value);

sys/cpu/x86_64/include/atomic.h

196

atomic_swap_ptr(volatile void **addr, void *value)

sys/cpu/x86_64/include/atomic.h

199

"=r" (value), "=m" (*addr) : "0" (value) : "memory");

sys/cpu/x86_64/include/atomic.h

200

return (value);

sys/cpu/x86_64/include/bus_dma.h

371

bus_size_t offset, u_int8_t value);

sys/cpu/x86_64/include/bus_dma.h

375

bus_size_t offset, u_int16_t value);

sys/cpu/x86_64/include/bus_dma.h

379

bus_size_t offset, u_int32_t value);

sys/cpu/x86_64/include/bus_dma.h

383

bus_size_t offset, u_int8_t value)

sys/cpu/x86_64/include/bus_dma.h

387

outb(bsh + offset, value);

sys/cpu/x86_64/include/bus_dma.h

389

*(volatile u_int8_t *)(bsh + offset) = value;

sys/cpu/x86_64/include/bus_dma.h

394

bus_size_t offset, u_int16_t value)

sys/cpu/x86_64/include/bus_dma.h

398

outw(bsh + offset, value);

sys/cpu/x86_64/include/bus_dma.h

400

*(volatile u_int16_t *)(bsh + offset) = value;

sys/cpu/x86_64/include/bus_dma.h

405

bus_size_t offset, u_int32_t value)

sys/cpu/x86_64/include/bus_dma.h

409

outl(bsh + offset, value);

sys/cpu/x86_64/include/bus_dma.h

411

*(volatile u_int32_t *)(bsh + offset) = value;

sys/cpu/x86_64/include/bus_dma.h

417

bus_size_t offset, u_int64_t value)

sys/cpu/x86_64/include/bus_dma.h

421

*(volatile u_int64_t *)(bsh + offset) = value;

sys/cpu/x86_64/include/bus_dma.h

627

u_int8_t value, size_t count);

sys/cpu/x86_64/include/bus_dma.h

631

u_int16_t value, size_t count);

sys/cpu/x86_64/include/bus_dma.h

635

u_int32_t value, size_t count);

sys/cpu/x86_64/include/bus_dma.h

639

bus_size_t offset, u_int8_t value, size_t count)

sys/cpu/x86_64/include/bus_dma.h

645

outb(addr, value);

sys/cpu/x86_64/include/bus_dma.h

648

*(volatile u_int8_t *)(addr) = value;

sys/cpu/x86_64/include/bus_dma.h

653

bus_size_t offset, u_int16_t value, size_t count)

sys/cpu/x86_64/include/bus_dma.h

659

outw(addr, value);

sys/cpu/x86_64/include/bus_dma.h

662

*(volatile u_int16_t *)(addr) = value;

sys/cpu/x86_64/include/bus_dma.h

667

bus_size_t offset, u_int32_t value, size_t count)

sys/cpu/x86_64/include/bus_dma.h

673

outl(addr, value);

sys/cpu/x86_64/include/bus_dma.h

676

*(volatile u_int32_t *)(addr) = value;

sys/cpu/x86_64/include/bus_dma.h

690

bus_size_t offset, u_int8_t value,

sys/cpu/x86_64/include/bus_dma.h

694

bus_size_t offset, u_int16_t value,

sys/cpu/x86_64/include/bus_dma.h

698

bus_size_t offset, u_int32_t value,

sys/cpu/x86_64/include/bus_dma.h

703

bus_size_t offset, u_int8_t value, size_t count)

sys/cpu/x86_64/include/bus_dma.h

709

outb(addr, value);

sys/cpu/x86_64/include/bus_dma.h

712

*(volatile u_int8_t *)(addr) = value;

sys/cpu/x86_64/include/bus_dma.h

717

bus_size_t offset, u_int16_t value, size_t count)

sys/cpu/x86_64/include/bus_dma.h

723

outw(addr, value);

sys/cpu/x86_64/include/bus_dma.h

726

*(volatile u_int16_t *)(addr) = value;

sys/cpu/x86_64/include/bus_dma.h

731

bus_size_t offset, u_int32_t value, size_t count)

sys/cpu/x86_64/include/bus_dma.h

737

outl(addr, value);

sys/cpu/x86_64/include/bus_dma.h

740

*(volatile u_int32_t *)(addr) = value;

sys/crypto/blowfish/bf_enc.c

73

If you set BF_ROUNDS to some value other than 16 or 20, you will have

sys/crypto/rmd160/rmd160.c

38

#define PUT_64BIT_LE(cp, value) do { \

sys/crypto/rmd160/rmd160.c

39

(cp)[7] = (value) >> 56; \

sys/crypto/rmd160/rmd160.c

40

(cp)[6] = (value) >> 48; \

sys/crypto/rmd160/rmd160.c

41

(cp)[5] = (value) >> 40; \

sys/crypto/rmd160/rmd160.c

42

(cp)[4] = (value) >> 32; \

sys/crypto/rmd160/rmd160.c

43

(cp)[3] = (value) >> 24; \

sys/crypto/rmd160/rmd160.c

44

(cp)[2] = (value) >> 16; \

sys/crypto/rmd160/rmd160.c

45

(cp)[1] = (value) >> 8; \

sys/crypto/rmd160/rmd160.c

46

(cp)[0] = (value); } while (0)

sys/crypto/rmd160/rmd160.c

48

#define PUT_32BIT_LE(cp, value) do { \

sys/crypto/rmd160/rmd160.c

49

(cp)[3] = (value) >> 24; \

sys/crypto/rmd160/rmd160.c

50

(cp)[2] = (value) >> 16; \

sys/crypto/rmd160/rmd160.c

51

(cp)[1] = (value) >> 8; \

sys/crypto/rmd160/rmd160.c

52

(cp)[0] = (value); } while (0)

sys/ddb/db_access.c

102

db_put_value(db_addr_t addr, int size, db_expr_t value)

sys/ddb/db_access.c

116

data[i] = value & 0xFF;

sys/ddb/db_access.c

117

value >>= 8;

sys/ddb/db_access.c

77

db_expr_t value;

sys/ddb/db_access.c

84

value = 0;

sys/ddb/db_access.c

91

value = (value << 8) + (data[i] & 0xFF);

sys/ddb/db_access.c

95

if (is_signed && (value & db_extend[size]) != 0)

sys/ddb/db_access.c

96

value |= db_extend[size];

sys/ddb/db_access.c

98

return (value);

sys/ddb/db_access.h

48

void db_put_value (db_addr_t addr, int size, db_expr_t value);

sys/ddb/db_examine.c

115

value = db_get_value(addr, size, TRUE);

sys/ddb/db_examine.c

117

db_printsym(value, DB_STGY_ANY);

sys/ddb/db_examine.c

121

value = db_get_value(addr, size, TRUE);

sys/ddb/db_examine.c

123

db_printf("%p", (void *)value);

sys/ddb/db_examine.c

126

value = db_get_value(addr, size, TRUE);

sys/ddb/db_examine.c

128

db_format_radix(tbuf, 24, value, FALSE);

sys/ddb/db_examine.c

132

value = db_get_value(addr, size, FALSE);

sys/ddb/db_examine.c

134

db_printf("%-*lx", width, (long)value);

sys/ddb/db_examine.c

137

value = db_get_value(addr, size, TRUE);

sys/ddb/db_examine.c

139

db_format_hex(tbuf, 24, value, FALSE);

sys/ddb/db_examine.c

143

value = db_get_value(addr, size, TRUE);

sys/ddb/db_examine.c

145

db_printf("%-*ld", width, (long)value);

sys/ddb/db_examine.c

148

value = db_get_value(addr, size, FALSE);

sys/ddb/db_examine.c

150

db_printf("%-*lu", width, (long)value);

sys/ddb/db_examine.c

153

value = db_get_value(addr, size, FALSE);

sys/ddb/db_examine.c

155

db_printf("%-*lo", width, (long)value);

sys/ddb/db_examine.c

158

value = db_get_value(addr, 1, FALSE);

sys/ddb/db_examine.c

160

if (value >= ' ' && value <= '~')

sys/ddb/db_examine.c

161

db_printf("%c", (int)value);

sys/ddb/db_examine.c

163

db_printf("\\%03o", (int)value);

sys/ddb/db_examine.c

167

value = db_get_value(addr, 1, FALSE);

sys/ddb/db_examine.c

169

if (value == 0)

sys/ddb/db_examine.c

171

if (value >= ' ' && value <= '~')

sys/ddb/db_examine.c

172

db_printf("%c", (int)value);

sys/ddb/db_examine.c

174

db_printf("\\%03o", (int)value);

sys/ddb/db_examine.c

206

db_expr_t value;

sys/ddb/db_examine.c

244

value = addr & 0xFF;

sys/ddb/db_examine.c

245

if (value >= ' ' && value <= '~')

sys/ddb/db_examine.c

246

db_printf("%c", (int)value);

sys/ddb/db_examine.c

248

db_printf("\\%03o", (int)value);

sys/ddb/db_examine.c

273

db_expr_t value;

sys/ddb/db_examine.c

306

if (!db_expression(&value)) {

sys/ddb/db_examine.c

328

db_search(addr, size, value, mask, count);

sys/ddb/db_examine.c

332

db_search(db_addr_t addr, int size, db_expr_t value, db_expr_t mask,

sys/ddb/db_examine.c

337

if ((db_get_value(addr, size, FALSE) & mask) == value)

sys/ddb/db_examine.c

76

db_expr_t value;

sys/ddb/db_kld.c

90

symval.value = NULL;

sys/ddb/db_kld.c

95

*valuep = (db_expr_t) symval.value;

sys/ddb/db_print.c

49

db_expr_t value, offset;

sys/ddb/db_print.c

53

db_read_variable(regp, &value);

sys/ddb/db_print.c

54

db_printf("%-12s%s", regp->name, db_num_to_str(value));

sys/ddb/db_print.c

55

db_find_xtrn_sym_and_offset((db_addr_t)value, &name, &offset);

sys/ddb/db_print.c

57

offset != value) {

sys/ddb/db_sym.c

235

db_expr_t value;

sys/ddb/db_sym.c

242

X_db_symbol_values(db_last_symtab, sym, namep, &value);

sys/ddb/db_sym.c

247

*valuep = value;

sys/ddb/db_sym.c

275

db_expr_t value;

sys/ddb/db_sym.c

281

db_symbol_values(cursym, &name, &value);

sys/ddb/db_sym.c

283

value = off;

sys/ddb/db_sym.c

284

if (value >= DB_SMALL_VALUE_MIN && value <= DB_SMALL_VALUE_MAX) {

sys/ddb/db_variables.c

103

db_write_variable(vp, &value);

sys/ddb/db_variables.c

134

db_expr_t value;

sys/ddb/db_variables.c

152

if (!db_expression(&value)) {

sys/ddb/db_variables.c

160

db_write_variable(vp, &value);

sys/ddb/db_variables.c

45

static int db_set_variable (db_expr_t value);

sys/ddb/db_variables.c

96

db_set_variable(db_expr_t value)

sys/ddb/db_watch.c

196

db_expr_t value;

sys/ddb/db_watch.c

198

if (db_expression(&value))

sys/ddb/db_watch.c

199

size = (vm_size_t) value;

sys/dev/acpica/acpi.c

1002

acpi_write_ivar(device_t dev, device_t child, int index, uintptr_t value)

sys/dev/acpica/acpi.c

1013

ad->ad_handle = (ACPI_HANDLE)value;

sys/dev/acpica/acpi.c

1016

ad->ad_magic = value;

sys/dev/acpica/acpi.c

1019

ad->ad_private = (void *)value;

sys/dev/acpica/acpi.c

1022

ad->ad_flags = (int)value;

sys/dev/acpica/acpi.c

1025

ad->ad_recheck = (int)value;

sys/dev/acpica/acpi.c

116

uintptr_t value);

sys/dev/acpica/acpi.c

3555

UINT32 value;

sys/dev/acpica/acpi.c

3662

*flag |= tag[i].value;

sys/dev/acpica/acpi.c

3664

*flag &= ~tag[i].value;

sys/dev/acpica/acpi.c

3728

if ((*dbg & tag->value) == tag->value)

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

166

static int acpi_fujitsu_method_set(struct acpi_fujitsu_softc *sc, int method, int value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

503

status = acpi_GetInteger(sc->handle, nv.name, &nv.value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

510

sc->bIsMuted = (uint8_t)((nv.value & VOLUME_MUTE_BIT) != 0);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

514

nv.value &= GENERAL_SETTING_BITS;

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

515

return (nv.value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

519

acpi_fujitsu_method_set(struct acpi_fujitsu_softc *sc, int method, int value)

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

558

if (value == 1)

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

559

value = nv.value | VOLUME_MUTE_BIT;

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

560

else if (value == 0)

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

561

value = nv.value & ~VOLUME_MUTE_BIT;

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

566

status = acpi_SetInteger(sc->handle, control, value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

588

sc->gsif.name, &(sc->gsif.value)))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

664

changed = sc->gsif.value & acpi_fujitsu_method_get(sc,METHOD_GHKS);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

671

sc->gvol.name, &(sc->gvol.value)))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

678

(uint8_t)((sc->gvol.value & VOLUME_MUTE_BIT) != 0);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

681

sc->gvol.value &= VOLUME_SETTING_BITS;

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

688

sc->gvol.value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

697

sc->gmou.name, &(sc->gmou.value)))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

703

sc->bIntPtrEnabled = (uint8_t)(sc->gmou.value & 0x1);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

706

sc->gmou.value &= MOUSE_SETTING_BITS;

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

709

acpi_fujitsu_method_set(sc, METHOD_GMOU, sc->gmou.value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

721

sc->gbls.name, &(sc->gbls.value)))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

729

sc->gbls.value &= BRIGHTNESS_SETTING_BITS;

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

732

acpi_fujitsu_method_set(sc, METHOD_GBLS, sc->gbls.value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

737

sc->gbls.value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

744

sc->gbll.name, &(sc->gbll.value)))) {

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

753

sc->gbll.value &= BRIGHTNESS_SETTING_BITS;

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

758

sc->gbll.value);

sys/dev/acpica/acpi_fujitsu/acpi_fujitsu.c

98

int value;

sys/dev/acpica/acpi_pci.c

124

acpi_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value)

sys/dev/acpica/acpi_pci.c

131

dinfo->ap_handle = (ACPI_HANDLE)value;

sys/dev/acpica/acpi_pci.c

134

dinfo->ap_flags = (int)value;

sys/dev/acpica/acpi_pci.c

137

return (pci_write_ivar(dev, child, which, value));

sys/dev/acpica/acpi_pci.c

73

uintptr_t value);

sys/dev/acpica/acpi_pci_link.c

577

uint32_t value;

sys/dev/acpica/acpi_pci_link.c

581

value = pci_cfgregread(bus, device, 0, PCIR_HDRTYPE, 1);

sys/dev/acpica/acpi_pci_link.c

582

if ((value & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)

sys/dev/acpica/acpi_pci_link.c

584

if (value & PCIM_MFDEV)

sys/dev/acpica/acpi_pci_link.c

591

value = pci_cfgregread(bus, device, func, PCIR_DEVVENDOR, 4);

sys/dev/acpica/acpi_pci_link.c

592

if (value == 0xffffffff)

sys/dev/acpica/acpi_pci_link.c

594

value = pci_cfgregread(bus, device, func, PCIR_INTPIN, 1);

sys/dev/acpica/acpi_pci_link.c

601

if (value != pin + 1)

sys/dev/acpica/acpi_pci_link.c

603

value = pci_cfgregread(bus, device, func, PCIR_INTLINE, 1);

sys/dev/acpica/acpi_pci_link.c

607

bus, device, pin + 'A', func, value);

sys/dev/acpica/acpi_pci_link.c

608

if (value != PCI_INVALID_IRQ)

sys/dev/acpica/acpi_pci_link.c

609

return (value);

sys/dev/acpica/acpi_pcib_acpi.c

290

acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)

sys/dev/acpica/acpi_pcib_acpi.c

298

sc->ap_bus = value;

sys/dev/acpica/acpi_pcib_acpi.c

301

sc->ap_handle = (ACPI_HANDLE)value;

sys/dev/acpica/acpi_pcib_acpi.c

304

sc->ap_flags = (int)value;

sys/dev/acpica/acpi_pcib_acpi.c

70

int which, uintptr_t value);

sys/dev/acpica/acpi_quirk.c

70

static int aq_revcmp(int revision, enum ops_t op, int value);

sys/dev/acpica/acpi_quirk.c

76

aq_revcmp(int revision, enum ops_t op, int value)

sys/dev/acpica/acpi_quirk.c

80

if (revision <= value)

sys/dev/acpica/acpi_quirk.c

84

if (revision >= value)

sys/dev/acpica/acpi_quirk.c

88

if (revision == value)

sys/dev/acpica/acpi_thermal.c

526

sc->sensor.value = sc->tz_temperature * 100000 - 50000;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1558

sc->sensors[i].value = data * 100000 - 50000;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1560

sc->sensors[i].value = data * 1000000 + 273150000;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1568

sc->sensors[i].value = data;

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1574

sc->sensors[i].value = speed;

sys/dev/acpica/acpi_wmi/acpi_wmi.c

143

UINT64 *value, void *context,

sys/dev/acpica/acpi_wmi/acpi_wmi.c

661

UINT32 width, UINT64 *value, void *context,

sys/dev/acpica/acpi_wmi/acpi_wmi.c

673

if (width % 8 != 0 || value == NULL || context == NULL)

sys/dev/acpica/acpi_wmi/acpi_wmi.c

678

*value = 0;

sys/dev/acpica/acpi_wmi/acpi_wmi.c

687

*value |= ec_data << i;

sys/dev/acpica/acpi_wmi/acpi_wmi.c

690

ec_data = (UINT8)((*value) >> i);

sys/dev/acpica/aibs/atk0110.c

361

s->value = v * 100 * 1000 + 273150000;

sys/dev/acpica/aibs/atk0110.c

376

s->value = v;

sys/dev/acpica/aibs/atk0110.c

386

s->value = v * 1000;

sys/dev/disk/advansys/advlib.c

1252

u_int16_t value)

sys/dev/disk/advansys/advlib.c

1258

ADV_OUTW(adv, ADV_LRAM_DATA, value);

sys/dev/disk/advansys/advlib.c

1261

if (value != ADV_INW(adv, ADV_LRAM_DATA))

sys/dev/disk/advansys/advlib.c

1285

adv_write_lram_32(struct adv_softc *adv, u_int16_t addr, u_int32_t value)

sys/dev/disk/advansys/advlib.c

1290

ADV_OUTW(adv, ADV_LRAM_DATA, (u_int16_t)((value >> 16) & 0xFFFF));

sys/dev/disk/advansys/advlib.c

1291

ADV_OUTW(adv, ADV_LRAM_DATA, (u_int16_t)(value & 0xFFFF));

sys/dev/disk/advansys/advlib.c

1293

ADV_OUTW(adv, ADV_LRAM_DATA, (u_int16_t)(value & 0xFFFF));

sys/dev/disk/advansys/advlib.c

1294

ADV_OUTW(adv, ADV_LRAM_DATA, (u_int16_t)((value >> 16) & 0xFFFF));

sys/dev/disk/advansys/advlib.c

1323

adv_write_eeprom_16(struct adv_softc *adv, u_int8_t addr, u_int16_t value)

sys/dev/disk/advansys/advlib.c

1328

if (read_value != value) {

sys/dev/disk/advansys/advlib.c

1332

ADV_OUTW(adv, ADV_EEPROM_DATA, value);

sys/dev/disk/advansys/advlib.c

205

u_int16_t addr, u_int16_t value);

sys/dev/disk/advansys/advlib.c

210

u_int32_t value);

sys/dev/disk/advansys/advlib.c

218

u_int16_t value);

sys/dev/disk/advansys/advlib.c

423

adv_write_lram_8(struct adv_softc *adv, u_int16_t addr, u_int8_t value)

sys/dev/disk/advansys/advlib.c

430

word_data |= (((u_int8_t)value << 8) & 0xFF00);

sys/dev/disk/advansys/advlib.c

433

word_data |= ((u_int8_t)value & 0x00FF);

sys/dev/disk/advansys/advlib.c

447

adv_write_lram_16(struct adv_softc *adv, u_int16_t addr, u_int16_t value)

sys/dev/disk/advansys/advlib.c

450

ADV_OUTW(adv, ADV_LRAM_DATA, value);

sys/dev/disk/advansys/advlib.h

789

u_int8_t value);

sys/dev/disk/advansys/advlib.h

792

u_int16_t value);

sys/dev/disk/advansys/adwlib.c

436

u_int16_t value;

sys/dev/disk/advansys/adwlib.c

438

value = byte_codes[2]

sys/dev/disk/advansys/adwlib.c

441

value, byte_codes[1]);

sys/dev/disk/advansys/adwlib.c

445

u_int16_t value;

sys/dev/disk/advansys/adwlib.c

447

value = byte_codes[1]

sys/dev/disk/advansys/adwlib.c

449

adw_outw(adw, ADW_RAM_DATA, value);

sys/dev/disk/advansys/adwlib.h

668

#define adw_outb(adw, port, value) \

sys/dev/disk/advansys/adwlib.h

669

bus_space_write_1((adw)->tag, (adw)->bsh, port, value)

sys/dev/disk/advansys/adwlib.h

670

#define adw_outw(adw, port, value) \

sys/dev/disk/advansys/adwlib.h

671

bus_space_write_2((adw)->tag, (adw)->bsh, port, value)

sys/dev/disk/advansys/adwlib.h

672

#define adw_outl(adw, port, value) \

sys/dev/disk/advansys/adwlib.h

673

bus_space_write_4((adw)->tag, (adw)->bsh, port, value)

sys/dev/disk/advansys/adwlib.h

675

#define adw_set_multi_2(adw, port, value, count) \

sys/dev/disk/advansys/adwlib.h

676

bus_space_set_multi_2((adw)->tag, (adw)->bsh, port, value, count)

sys/dev/disk/advansys/adwlib.h

683

u_int value);

sys/dev/disk/advansys/adwlib.h

685

u_int value);

sys/dev/disk/advansys/adwlib.h

687

u_int value);

sys/dev/disk/advansys/adwlib.h

740

adw_lram_write_8(struct adw_softc *adw, u_int addr, u_int value)

sys/dev/disk/advansys/adwlib.h

743

adw_outb(adw, ADW_RAM_DATA, value);

sys/dev/disk/advansys/adwlib.h

747

adw_lram_write_16(struct adw_softc *adw, u_int addr, u_int value)

sys/dev/disk/advansys/adwlib.h

750

adw_outw(adw, ADW_RAM_DATA, value);

sys/dev/disk/advansys/adwlib.h

754

adw_lram_write_32(struct adw_softc *adw, u_int addr, u_int value)

sys/dev/disk/advansys/adwlib.h

757

adw_outw(adw, ADW_RAM_DATA, value);

sys/dev/disk/advansys/adwlib.h

758

adw_outw(adw, ADW_RAM_DATA, value >> 16);

sys/dev/disk/advansys/adwlib.h

836

static __inline void adw_tickle_risc(struct adw_softc *adw, u_int value)

sys/dev/disk/advansys/adwlib.h

841

adw_outb(adw, ADW_TICKLE, value);

sys/dev/disk/amd/amd.h

569

#define amd_write8(amd, port, value) \

sys/dev/disk/amd/amd.h

570

bus_space_write_1((amd)->tag, (amd)->bsh, port, value)

sys/dev/disk/amd/amd.h

575

#define amd_write16(amd, port, value) \

sys/dev/disk/amd/amd.h

576

bus_space_write_2((amd)->tag, (amd)->bsh, port, value)

sys/dev/disk/amd/amd.h

578

#define amd_write32(amd, port, value) \

sys/dev/disk/amd/amd.h

579

bus_space_write_4((amd)->tag, (amd)->bsh, port, value)

sys/dev/disk/buslogic/btreg.h

664

#define bt_outb(bt, reg, value) \

sys/dev/disk/buslogic/btreg.h

665

bus_write_1((bt)->port, reg, value)

sys/dev/disk/dm/crypt/dm_target_crypt.c

159

clamp_value(int value, int min, int max)

sys/dev/disk/dm/crypt/dm_target_crypt.c

161

if (value < min)

sys/dev/disk/dm/crypt/dm_target_crypt.c

163

if (value > max)

sys/dev/disk/dm/crypt/dm_target_crypt.c

165

return value;

sys/dev/disk/dm/dmirror/dm_target_dmirror.c

63

#define dmirror_set_bio_retries(bio, x) ((bio)->bio_caller_info3.value = (x))

sys/dev/disk/dm/dmirror/dm_target_dmirror.c

64

#define dmirror_get_bio_retries(bio) ((bio)?((bio)->bio_caller_info3.value):0)

sys/dev/disk/dm/flakey/dm_target_flakey.c

126

unsigned int value;

sys/dev/disk/dm/flakey/dm_target_flakey.c

157

value = atoi64(*argv++);

sys/dev/disk/dm/flakey/dm_target_flakey.c

158

if (value < 1) {

sys/dev/disk/dm/flakey/dm_target_flakey.c

160

"<Nth_byte> arg %u\n", value);

sys/dev/disk/dm/flakey/dm_target_flakey.c

163

tfc->corrupt_buf_byte = value;

sys/dev/disk/dm/flakey/dm_target_flakey.c

180

value = atoi64(*argv++);

sys/dev/disk/dm/flakey/dm_target_flakey.c

181

if (value > 0xff) {

sys/dev/disk/dm/flakey/dm_target_flakey.c

183

"<value> arg %u\n", value);

sys/dev/disk/dm/flakey/dm_target_flakey.c

186

tfc->corrupt_buf_value = value;

sys/dev/disk/mpt/mpt_debug.c

652

u_int value;

sys/dev/disk/mpt/mpt_debug.c

658

const char *name, u_int value, u_int *cur_column,

sys/dev/disk/mpt/mpt_debug.c

674

printed = kprintf("%s[0x%x]", name, value);

sys/dev/disk/mpt/mpt_debug.c

685

if (((value & table[entry].mask)

sys/dev/disk/mpt/mpt_debug.c

686

!= table[entry].value)

sys/dev/disk/nata/ata-all.c

374

int *value = (int *)ap->a_data;

sys/dev/disk/nata/ata-all.c

380

*value = devclass_get_maxunit(ata_devclass);

sys/dev/disk/nata/ata-all.c

385

if (*value >= devclass_get_maxunit(ata_devclass) ||

sys/dev/disk/nata/ata-all.c

386

!(device = devclass_get_device(ata_devclass, *value)))

sys/dev/disk/nata/ata-all.c

393

if (*value >= devclass_get_maxunit(ata_devclass) ||

sys/dev/disk/nata/ata-all.c

394

!(device = devclass_get_device(ata_devclass, *value)))

sys/dev/disk/nata/ata-all.c

401

if (*value >= devclass_get_maxunit(ata_devclass) ||

sys/dev/disk/nata/ata-all.c

402

!(device = devclass_get_device(ata_devclass, *value)))

sys/dev/disk/nata/ata-all.h

653

#define ATA_OUTB(res, offset, value) \

sys/dev/disk/nata/ata-all.h

655

rman_get_bushandle((res)), (offset), (value))

sys/dev/disk/nata/ata-all.h

656

#define ATA_OUTW(res, offset, value) \

sys/dev/disk/nata/ata-all.h

658

rman_get_bushandle((res)), (offset), (value))

sys/dev/disk/nata/ata-all.h

659

#define ATA_OUTL(res, offset, value) \

sys/dev/disk/nata/ata-all.h

661

rman_get_bushandle((res)), (offset), (value))

sys/dev/disk/nata/ata-all.h

700

#define ATA_IDX_OUTB(ch, idx, value) \

sys/dev/disk/nata/ata-all.h

701

ATA_OUTB(ch->r_io[idx].res, ch->r_io[idx].offset, value)

sys/dev/disk/nata/ata-all.h

703

#define ATA_IDX_OUTW(ch, idx, value) \

sys/dev/disk/nata/ata-all.h

704

ATA_OUTW(ch->r_io[idx].res, ch->r_io[idx].offset, value)

sys/dev/disk/nata/ata-all.h

706

#define ATA_IDX_OUTL(ch, idx, value) \

sys/dev/disk/nata/ata-all.h

707

ATA_OUTL(ch->r_io[idx].res, ch->r_io[idx].offset, value)

sys/dev/disk/sdhci/sdhci.c

1891

sdhci_generic_write_ivar(device_t bus, device_t child, int which, uintptr_t value)

sys/dev/disk/sdhci/sdhci.c

1901

slot->host.ios.bus_mode = value;

sys/dev/disk/sdhci/sdhci.c

1904

slot->host.ios.bus_width = value;

sys/dev/disk/sdhci/sdhci.c

1907

slot->host.ios.chip_select = value;

sys/dev/disk/sdhci/sdhci.c

1910

if (value > 0) {

sys/dev/disk/sdhci/sdhci.c

1917

if (clock <= value)

sys/dev/disk/sdhci/sdhci.c

1924

if (clock <= value)

sys/dev/disk/sdhci/sdhci.c

1935

slot->host.mode = value;

sys/dev/disk/sdhci/sdhci.c

1938

slot->host.ocr = value;

sys/dev/disk/sdhci/sdhci.c

1941

slot->host.ios.power_mode = value;

sys/dev/disk/sdhci/sdhci.c

1944

slot->host.ios.vdd = value;

sys/dev/disk/sdhci/sdhci.c

1947

slot->host.ios.vccq = value;

sys/dev/disk/sdhci/sdhci.c

1950

slot->host.ios.timing = value;

sys/dev/disk/sdhci/sdhci.h

403

int sdhci_generic_write_ivar(device_t bus, device_t child, int which, uintptr_t value);

sys/dev/disk/trm/trm.c

101

#define trm_reg_write8(value,reg) bus_space_write_1(pACB->tag, pACB->bsh,\

sys/dev/disk/trm/trm.c

102

reg, value)

sys/dev/disk/trm/trm.c

103

#define trm_reg_write16(value,reg) bus_space_write_2(pACB->tag, pACB->bsh,\

sys/dev/disk/trm/trm.c

104

reg, value)

sys/dev/disk/trm/trm.c

105

#define trm_reg_write32(value,reg) bus_space_write_4(pACB->tag, pACB->bsh,\

sys/dev/disk/trm/trm.c

106

reg, value)

sys/dev/drm/amd/amdgpu/amdgpu.h

1070

void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);

sys/dev/drm/amd/amdgpu/amdgpu.h

1154

#define REG_GET_FIELD(value, reg, field) \

sys/dev/drm/amd/amdgpu/amdgpu.h

1155

(((value) & REG_FIELD_MASK(reg, field)) >> REG_FIELD_SHIFT(reg, field))

sys/dev/drm/amd/amdgpu/amdgpu.h

593

uint32_t value)

sys/dev/drm/amd/amdgpu/amdgpu.h

595

p->job->ibs[ib_idx].ptr[idx] = value;

sys/dev/drm/amd/amdgpu/amdgpu.h

641

u32 sh_num, u32 reg_offset, u32 *value);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

197

uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

200

WREG32(mmSRBM_GFX_CNTL, value);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

329

uint32_t value, mec, pipe;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

336

value = RREG32(mmRLC_CP_SCHEDULERS);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

337

value = REG_SET_FIELD(value, RLC_CP_SCHEDULERS, scheduler1,

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

339

WREG32(mmRLC_CP_SCHEDULERS, value);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

418

uint32_t value, mec, pipe;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

425

value = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS));

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

426

value = REG_SET_FIELD(value, RLC_CP_SCHEDULERS, scheduler1,

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

428

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS), value);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1543

voltage_table->entries[i].value =

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

123

u16 value;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

101

return WREG32_GC_CAC(index, value);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

103

return WREG32_SE_CAC(index, value);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

50

uint32_t value)

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

53

WREG32(offset, value);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

86

unsigned index, uint32_t value)

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

91

return WREG32_IDX(index, value);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

93

return WREG32_PCIE(index, value);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

95

return WREG32_SMC(index, value);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

97

return WREG32_UVD_CTX(index, value);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

99

return WREG32_DIDT(index, value);

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

779

uint64_t value)

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

796

switch (value) {

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

159

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

165

value = RREG32(*pos >> 2);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

166

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

168

r = get_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

170

WREG32(*pos >> 2, value);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

240

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

242

value = RREG32_PCIE(*pos >> 2);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

243

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

279

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

281

r = get_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

285

WREG32_PCIE(*pos >> 2, value);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

319

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

321

value = RREG32_DIDT(*pos >> 2);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

322

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

358

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

360

r = get_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

364

WREG32_DIDT(*pos >> 2, value);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

398

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

400

value = RREG32_SMC(*pos);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

401

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

437

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

439

r = get_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

443

WREG32_SMC(*pos, value);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

525

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

527

value = config[*pos >> 2];

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

528

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

651

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

653

value = data[offset >> 2];

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

654

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

730

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

732

value = data[offset++];

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

733

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

184

void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value) {

sys/dev/drm/amd/amdgpu/amdgpu_device.c

186

writeb(value, adev->rmmio + offset);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

263

#define amdgpu_dpm_read_sensor(adev, idx, value, size) \

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

264

((adev)->powerplay.pp_funcs->read_sensor((adev)->powerplay.pp_handle, (idx), (value), (size)))

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

314

#define amdgpu_dpm_set_sclk_od(adev, value) \

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

315

((adev)->powerplay.pp_funcs->set_sclk_od((adev)->powerplay.pp_handle, value))

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

320

#define amdgpu_dpm_set_mclk_od(adev, value) \

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

321

((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value))

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

705

void __user *out = u64_to_user_ptr(args->value);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

717

if (robj->prime_shared_count && (args->value & AMDGPU_GEM_DOMAIN_VRAM)) {

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

727

robj->preferred_domains = args->value & (AMDGPU_GEM_DOMAIN_VRAM |

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1099

int value;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1109

err = kstrtoint(buf, 10, &value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1113

amdgpu_dpm_set_fan_control_mode(adev, value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1138

u32 value;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1152

err = kstrtou32(buf, 10, &value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1156

value = (value * 100) / 255;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1159

err = amdgpu_dpm_set_fan_speed_percent(adev, value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1281

u32 value;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1293

err = kstrtou32(buf, 10, &value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1298

err = amdgpu_dpm_set_fan_speed_rpm(adev, value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1328

int value;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1339

err = kstrtoint(buf, 10, &value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1343

if (value == 0)

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1345

else if (value == 1)

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1506

u32 value;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1508

err = kstrtou32(buf, 10, &value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1512

value = value / 1000000; /* convert to Watt */

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1514

err = adev->powerplay.pp_funcs->set_power_limit(adev->powerplay.pp_handle, value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2181

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2192

size = sizeof(value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2194

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2195

seq_printf(m, "\t%u MHz (MCLK)\n", value/100);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2196

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2197

seq_printf(m, "\t%u MHz (SCLK)\n", value/100);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2198

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2199

seq_printf(m, "\t%u MHz (PSTATE_SCLK)\n", value/100);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2200

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2201

seq_printf(m, "\t%u MHz (PSTATE_MCLK)\n", value/100);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2202

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2203

seq_printf(m, "\t%u mV (VDDGFX)\n", value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2204

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2205

seq_printf(m, "\t%u mV (VDDNB)\n", value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2209

size = sizeof(value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2213

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2214

seq_printf(m, "GPU Temperature: %u C\n", value/1000);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2217

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2218

seq_printf(m, "GPU Load: %u %%\n", value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2226

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, (void *)&value, &size)) {

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2227

if (!value) {

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2231

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2232

seq_printf(m, "\t%u MHz (DCLK)\n", value/100);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2233

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2234

seq_printf(m, "\t%u MHz (VCLK)\n", value/100);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2240

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, (void *)&value, &size)) {

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2241

if (!value) {

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2245

if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, (void *)&value, &size))

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2246

seq_printf(m, "\t%u MHz (ECCLK)\n", value/100);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

800

uint32_t value = 0;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

803

value = amdgpu_dpm_get_sclk_od(adev);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

805

return snprintf(buf, PAGE_SIZE, "%d\n", value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

816

long int value;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

818

ret = kstrtol(buf, 0, &value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

825

amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

844

uint32_t value = 0;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

847

value = amdgpu_dpm_get_mclk_od(adev);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

849

return snprintf(buf, PAGE_SIZE, "%d\n", value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

860

long int value;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

862

ret = kstrtol(buf, 0, &value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

869

amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

982

int r, value, size = sizeof(value);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

991

(void *)&value, &size);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

995

return snprintf(buf, PAGE_SIZE, "%d\n", value);

sys/dev/drm/amd/amdgpu/amdgpu_ring.c

428

uint32_t value, result, early[3];

sys/dev/drm/amd/amdgpu/amdgpu_ring.c

454

value = ring->ring[(*pos - 12)/4];

sys/dev/drm/amd/amdgpu/amdgpu_ring.c

455

r = put_user(value, (uint32_t*)buf);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1593

uint32_t value = 0;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1619

value = RREG32_NO_KIQ(mmMM_DATA);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1621

value &= ~mask;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1622

value |= (*(uint32_t *)buf << shift) & mask;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1623

WREG32_NO_KIQ(mmMM_DATA, value);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1627

value = (value & mask) >> shift;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1628

memcpy(buf, &value, bytes);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2290

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2298

value = RREG32_NO_KIQ(mmMM_DATA);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2301

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2334

uint32_t value;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2339

r = get_user(value, (uint32_t *)buf);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2346

WREG32_NO_KIQ(mmMM_DATA, value);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1368

uint64_t value;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1375

value = params->pages_addr ?

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1379

i, value, flags);

sys/dev/drm/amd/amdgpu/amdgpu_vm.h

161

uint64_t value, unsigned count,

sys/dev/drm/amd/amdgpu/amdgpu_vm.h

292

#define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->write_pte((ib), (pe), (value), (count), (incr)))

sys/dev/drm/amd/amdgpu/ci_dpm.c

1435

u16 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

1441

value, pi->sram_end);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1445

u16 reg_offset, u32 value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

1451

value, pi->sram_end);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2266

voltage_table->entries[i].value = voltage_dependency_table->entries[i].v;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2346

smc_voltage_table->StdVoltageHiSidd = voltage_table->value * VOLTAGE_SCALE;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2347

smc_voltage_table->StdVoltageLoSidd = voltage_table->value * VOLTAGE_SCALE;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2350

smc_voltage_table->Voltage = cpu_to_be16(voltage_table->value * VOLTAGE_SCALE);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2455

voltage->Voltage = pi->mvdd_voltage_table.entries[i].value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2473

*std_voltage_hi_sidd = voltage_table->value * VOLTAGE_SCALE;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2474

*std_voltage_lo_sidd = voltage_table->value * VOLTAGE_SCALE;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2481

if (voltage_table->value ==

sys/dev/drm/amd/amdgpu/ci_dpm.c

2498

if (voltage_table->value <=

sys/dev/drm/amd/amdgpu/ci_dpm.c

2694

pi->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/amdgpu/ci_dpm.c

2695

pi->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/drm/amd/amdgpu/ci_dpm.c

2771

(u8)dpm_table->pcie_speed_table.dpm_levels[i].value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3434

dpm_table->sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/amdgpu/ci_dpm.c

3480

if (dpm_table->mclk_table.dpm_levels[i].value == 0)

sys/dev/drm/amd/amdgpu/ci_dpm.c

3483

dpm_table->mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/amdgpu/ci_dpm.c

3529

dpm_table->dpm_levels[index].value = pcie_gen;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3623

(pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value !=

sys/dev/drm/amd/amdgpu/ci_dpm.c

3625

pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value =

sys/dev/drm/amd/amdgpu/ci_dpm.c

3636

(pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value !=

sys/dev/drm/amd/amdgpu/ci_dpm.c

3638

pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value =

sys/dev/drm/amd/amdgpu/ci_dpm.c

3647

pi->dpm_table.vddc_table.dpm_levels[i].value =

sys/dev/drm/amd/amdgpu/ci_dpm.c

3658

pi->dpm_table.vddci_table.dpm_levels[i].value =

sys/dev/drm/amd/amdgpu/ci_dpm.c

3668

pi->dpm_table.mvdd_table.dpm_levels[i].value =

sys/dev/drm/amd/amdgpu/ci_dpm.c

3685

u32 value, u32 *boot_level)

sys/dev/drm/amd/amdgpu/ci_dpm.c

3691

if (value == table->dpm_levels[i].value) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

3855

if ((dpm_table->dpm_levels[i].value < low_limit) ||

sys/dev/drm/amd/amdgpu/ci_dpm.c

3856

(dpm_table->dpm_levels[i].value > high_limit))

sys/dev/drm/amd/amdgpu/ci_dpm.c

3872

if ((pcie_table->dpm_levels[i].value < speed_low) ||

sys/dev/drm/amd/amdgpu/ci_dpm.c

3874

(pcie_table->dpm_levels[i].value > speed_high) ||

sys/dev/drm/amd/amdgpu/ci_dpm.c

3885

if ((pcie_table->dpm_levels[i].value == pcie_table->dpm_levels[j].value) &&

sys/dev/drm/amd/amdgpu/ci_dpm.c

4016

if (sclk == sclk_table->dpm_levels[i].value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

4029

if (mclk == mclk_table->dpm_levels[i].value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

4055

dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value = sclk;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4058

dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk;

sys/dev/drm/amd/amdgpu/ci_dpm.c

437

vid[i] = ci_convert_to_vid(pi->vddc_voltage_table.entries[i].value);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4861

data->value[i] = cpu_to_be32(entry->mc_data[j]);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4895

pi->dpm_table.mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/amdgpu/ci_dpm.c

6556

if (clock > sclk_table->dpm_levels[i].value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6564

i, sclk_table->dpm_levels[i].value / 100,

sys/dev/drm/amd/amdgpu/ci_dpm.c

6572

if (clock > mclk_table->dpm_levels[i].value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6580

i, mclk_table->dpm_levels[i].value / 100,

sys/dev/drm/amd/amdgpu/ci_dpm.c

6586

if (pcie_speed != pcie_table->dpm_levels[i].value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6594

(pcie_table->dpm_levels[i].value == 0) ? "2.5GT/s, x1" :

sys/dev/drm/amd/amdgpu/ci_dpm.c

6595

(pcie_table->dpm_levels[i].value == 1) ? "5.0GT/s, x16" :

sys/dev/drm/amd/amdgpu/ci_dpm.c

6596

(pcie_table->dpm_levels[i].value == 2) ? "8.0GT/s, x16" : "",

sys/dev/drm/amd/amdgpu/ci_dpm.c

6661

int value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6663

value = (sclk_table->dpm_levels[sclk_table->count - 1].value -

sys/dev/drm/amd/amdgpu/ci_dpm.c

6664

golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value) *

sys/dev/drm/amd/amdgpu/ci_dpm.c

6666

golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6668

return value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6671

static int ci_dpm_set_sclk_od(void *handle, uint32_t value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6679

if (value > 20)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6680

value = 20;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6683

golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value *

sys/dev/drm/amd/amdgpu/ci_dpm.c

6684

value / 100 +

sys/dev/drm/amd/amdgpu/ci_dpm.c

6685

golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6697

int value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6699

value = (mclk_table->dpm_levels[mclk_table->count - 1].value -

sys/dev/drm/amd/amdgpu/ci_dpm.c

6700

golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value) *

sys/dev/drm/amd/amdgpu/ci_dpm.c

6702

golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6704

return value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6707

static int ci_dpm_set_mclk_od(void *handle, uint32_t value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6715

if (value > 20)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6716

value = 20;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6719

golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value *

sys/dev/drm/amd/amdgpu/ci_dpm.c

6720

value / 100 +

sys/dev/drm/amd/amdgpu/ci_dpm.c

6721

golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6727

void *value, int *size)

sys/dev/drm/amd/amdgpu/ci_dpm.c

6739

*((uint32_t *)value) = ci_get_average_sclk_freq(adev);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6743

*((uint32_t *)value) = ci_get_average_mclk_freq(adev);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6747

*((uint32_t *)value) = ci_dpm_get_temp(adev);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6761

*((uint32_t *)value) = activity_percent;

sys/dev/drm/amd/amdgpu/ci_dpm.c

703

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/ci_dpm.c

718

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/ci_dpm.h

172

u32 value;

sys/dev/drm/amd/amdgpu/ci_dpm.h

345

u32 smc_address, u32 *value, u32 limit);

sys/dev/drm/amd/amdgpu/ci_dpm.h

347

u32 smc_address, u32 value, u32 limit);

sys/dev/drm/amd/amdgpu/ci_dpm.h

55

u32 value;

sys/dev/drm/amd/amdgpu/ci_smc.c

252

u32 smc_address, u32 *value, u32 limit)

sys/dev/drm/amd/amdgpu/ci_smc.c

260

*value = RREG32(mmSMC_IND_DATA_0);

sys/dev/drm/amd/amdgpu/ci_smc.c

267

u32 smc_address, u32 value, u32 limit)

sys/dev/drm/amd/amdgpu/ci_smc.c

275

WREG32(mmSMC_IND_DATA_0, value);

sys/dev/drm/amd/amdgpu/cik.c

1123

u32 sh_num, u32 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/cik.c

1127

*value = 0;

sys/dev/drm/amd/amdgpu/cik.c

1134

*value = cik_get_register_value(adev, indexed, se_num, sh_num,

sys/dev/drm/amd/amdgpu/cik_sdma.c

349

unsigned value = amdgpu_sdma_phase_quantum;

sys/dev/drm/amd/amdgpu/cik_sdma.c

352

while (value > (SDMA0_PHASE0_QUANTUM__VALUE_MASK >>

sys/dev/drm/amd/amdgpu/cik_sdma.c

354

value = (value + 1) >> 1;

sys/dev/drm/amd/amdgpu/cik_sdma.c

359

value = (SDMA0_PHASE0_QUANTUM__VALUE_MASK >>

sys/dev/drm/amd/amdgpu/cik_sdma.c

365

value << unit);

sys/dev/drm/amd/amdgpu/cik_sdma.c

368

value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT |

sys/dev/drm/amd/amdgpu/cik_sdma.c

771

uint64_t value, unsigned count,

sys/dev/drm/amd/amdgpu/cik_sdma.c

782

ib->ptr[ib->length_dw++] = lower_32_bits(value);

sys/dev/drm/amd/amdgpu/cik_sdma.c

783

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/amd/amdgpu/cik_sdma.c

784

value += incr;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1308

u32 value = 0;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1318

value = (sad->channels <<

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1334

value |= (stereo_freqs <<

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1337

WREG32_AUDIO_ENDPT(offset, eld_reg_to_type[i][0], value);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4210

uint32_t value = 0;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4212

value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4213

value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4214

value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4215

value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4216

WREG32(mmSQ_CMD, value);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6512

uint32_t value = 0;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6514

value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6515

value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6516

value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6517

value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6518

WREG32(mmSQ_CMD, value);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4515

uint32_t value = 0;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4517

value = REG_SET_FIELD(value, SQ_CMD, CMD, 0x03);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4518

value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4519

value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4520

value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4521

WREG32(mmSQ_CMD, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

315

bool value)

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

320

RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

322

PDE0_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

324

PDE1_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

326

PDE2_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

330

value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

332

NACK_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

334

DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

336

VALID_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

338

READ_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

340

WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

342

EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

343

if (!value) {

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

40

uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

43

lower_32_bits(value));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

46

upper_32_bits(value));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

66

uint64_t value;

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

92

value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

95

(u32)(value >> 12));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.c

97

(u32)(value >> 44));

sys/dev/drm/amd/amdgpu/gfxhub_v1_0.h

30

bool value);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

478

uint64_t value;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

480

value = addr & 0xFFFFFFFFFFFFF000ULL;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

481

value |= flags;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

482

writeq(value, ptr + (gpu_page_idx * 8));

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

515

bool value)

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

521

RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

523

DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

525

PDE0_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

527

VALID_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

529

READ_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

531

WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

681

uint64_t value;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

703

value = addr & 0x000000FFFFFFF000ULL;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

704

value |= flags;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

705

writeq(value, ptr + (gpu_page_idx * 8));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

740

bool value)

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

746

RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

748

DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

750

PDE0_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

752

VALID_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

754

READ_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

756

WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

758

EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1090

bool value;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1130

value = false;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1132

value = true;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1134

gfxhub_v1_0_set_fault_enable_default(adev, value);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1135

mmhub_v1_0_set_fault_enable_default(adev, value);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

480

uint64_t value;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

517

value = addr & 0x0000FFFFFFFFF000ULL;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

518

value |= flags;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

519

writeq(value, ptr + (gpu_page_idx * 8));

sys/dev/drm/amd/amdgpu/kv_dpm.c

1405

u16 reg_offset, u32 value)

sys/dev/drm/amd/amdgpu/kv_dpm.c

1410

(u8 *)&value, sizeof(u16), pi->sram_end);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1414

u16 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/kv_dpm.c

1419

value, pi->sram_end);

sys/dev/drm/amd/amdgpu/kv_dpm.c

3282

void *value, int *size)

sys/dev/drm/amd/amdgpu/kv_dpm.c

3301

*((uint32_t *)value) = sclk;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3307

*((uint32_t *)value) = kv_dpm_get_temp(adev);

sys/dev/drm/amd/amdgpu/kv_dpm.c

423

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/kv_dpm.c

438

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/kv_dpm.c

880

u32 value;

sys/dev/drm/amd/amdgpu/kv_dpm.c

884

value = 3;

sys/dev/drm/amd/amdgpu/kv_dpm.c

886

value = 2;

sys/dev/drm/amd/amdgpu/kv_dpm.c

888

value = 7;

sys/dev/drm/amd/amdgpu/kv_dpm.c

890

value = 6;

sys/dev/drm/amd/amdgpu/kv_dpm.c

892

value = 8;

sys/dev/drm/amd/amdgpu/kv_dpm.c

894

value = 0;

sys/dev/drm/amd/amdgpu/kv_dpm.c

896

value = 0;

sys/dev/drm/amd/amdgpu/kv_dpm.c

899

return value;

sys/dev/drm/amd/amdgpu/kv_dpm.h

222

u32 *value, u32 limit);

sys/dev/drm/amd/amdgpu/kv_dpm.h

74

u32 value;

sys/dev/drm/amd/amdgpu/kv_smc.c

102

*value = RREG32(mmSMC_IND_DATA_0);

sys/dev/drm/amd/amdgpu/kv_smc.c

94

u32 *value, u32 limit)

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

110

value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

113

(u32)(value >> 12));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

115

(u32)(value >> 44));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

348

void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, bool value)

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

353

RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

355

PDE0_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

357

PDE1_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

359

PDE2_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

363

value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

365

NACK_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

367

DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

369

VALID_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

371

READ_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

373

WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

375

EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

376

if (!value) {

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

57

uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

60

lower_32_bits(value));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

63

upper_32_bits(value));

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

83

uint64_t value;

sys/dev/drm/amd/amdgpu/mmhub_v1_0.h

30

bool value);

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

128

#define MMSCH_V1_0_INSERT_DIRECT_WT(reg, value) { \

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

131

(value)); \

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

90

uint32_t value)

sys/dev/drm/amd/amdgpu/mmsch_v1_0.h

93

direct_wt->reg_value = value;

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

709

uint64_t value, unsigned count,

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

720

ib->ptr[ib->length_dw++] = lower_32_bits(value);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

721

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

722

value += incr;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

556

unsigned value = amdgpu_sdma_phase_quantum;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

559

while (value > (SDMA0_PHASE0_QUANTUM__VALUE_MASK >>

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

561

value = (value + 1) >> 1;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

566

value = (SDMA0_PHASE0_QUANTUM__VALUE_MASK >>

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

572

value << unit);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

575

value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

980

uint64_t value, unsigned count,

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

991

ib->ptr[ib->length_dw++] = lower_32_bits(value);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

992

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

993

value += incr;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1155

uint64_t value, unsigned count,

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1166

ib->ptr[ib->length_dw++] = lower_32_bits(value);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1167

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1168

value += incr;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

610

unsigned value = amdgpu_sdma_phase_quantum;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

613

while (value > (SDMA0_PHASE0_QUANTUM__VALUE_MASK >>

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

615

value = (value + 1) >> 1;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

620

value = (SDMA0_PHASE0_QUANTUM__VALUE_MASK >>

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

626

value << unit);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

629

value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT |

sys/dev/drm/amd/amdgpu/si_dpm.c

1838

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage);

sys/dev/drm/amd/amdgpu/si_dpm.c

1843

u16 reg_offset, u32 value);

sys/dev/drm/amd/amdgpu/si_dpm.c

2857

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/amdgpu/si_dpm.c

3211

if (voltage <= table->entries[i].value)

sys/dev/drm/amd/amdgpu/si_dpm.c

3212

return table->entries[i].value;

sys/dev/drm/amd/amdgpu/si_dpm.c

3214

return table->entries[table->count - 1].value;

sys/dev/drm/amd/amdgpu/si_dpm.c

3642

u16 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/si_dpm.c

3647

si_pi->soft_regs_start + reg_offset, value,

sys/dev/drm/amd/amdgpu/si_dpm.c

3653

u16 reg_offset, u32 value)

sys/dev/drm/amd/amdgpu/si_dpm.c

3659

value, si_pi->sram_end);

sys/dev/drm/amd/amdgpu/si_dpm.c

4412

voltage_table->entries[i].value = voltage_dependency_table->entries[i].v;

sys/dev/drm/amd/amdgpu/si_dpm.c

4531

if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {

sys/dev/drm/amd/amdgpu/si_dpm.c

4574

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage)

sys/dev/drm/amd/amdgpu/si_dpm.c

4579

if (value <= table->entries[i].value) {

sys/dev/drm/amd/amdgpu/si_dpm.c

4581

voltage->value = cpu_to_be16(table->entries[i].value);

sys/dev/drm/amd/amdgpu/si_dpm.c

4604

voltage->value = cpu_to_be16(si_pi->mvdd_voltage_table.entries[voltage->index].value);

sys/dev/drm/amd/amdgpu/si_dpm.c

4615

*std_voltage = be16_to_cpu(voltage->value);

sys/dev/drm/amd/amdgpu/si_dpm.c

4623

if (be16_to_cpu(voltage->value) ==

sys/dev/drm/amd/amdgpu/si_dpm.c

4638

if (be16_to_cpu(voltage->value) <=

sys/dev/drm/amd/amdgpu/si_dpm.c

4661

u16 value, u8 index,

sys/dev/drm/amd/amdgpu/si_dpm.c

4665

voltage->value = cpu_to_be16(value);

sys/dev/drm/amd/amdgpu/si_dpm.c

6064

data->value[i] = cpu_to_be32(entry->mc_data[j]);

sys/dev/drm/amd/amdgpu/si_dpm.c

7981

void *value, int *size)

sys/dev/drm/amd/amdgpu/si_dpm.c

8000

*((uint32_t *)value) = sclk;

sys/dev/drm/amd/amdgpu/si_dpm.c

8008

*((uint32_t *)value) = mclk;

sys/dev/drm/amd/amdgpu/si_dpm.c

8014

*((uint32_t *)value) = si_dpm_get_temp(adev);

sys/dev/drm/amd/amdgpu/si_dpm.h

284

uint32_t value[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/amd/amdgpu/si_dpm.h

301

uint32_t value[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/amd/amdgpu/si_dpm.h

409

uint16_t value;

sys/dev/drm/amd/amdgpu/si_dpm.h

740

uint16_t value;

sys/dev/drm/amd/amdgpu/si_dpm.h

857

u32 value;

sys/dev/drm/amd/amdgpu/sislands_smc.h

134

uint16_t value;

sys/dev/drm/amd/amdgpu/sislands_smc.h

313

uint32_t value[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/amd/amdgpu/sislands_smc.h

418

u32 *value, u32 limit);

sys/dev/drm/amd/amdgpu/sislands_smc.h

420

u32 value, u32 limit);

sys/dev/drm/amd/amdgpu/soc15.c

332

u32 sh_num, u32 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/soc15.c

337

*value = 0;

sys/dev/drm/amd/amdgpu/soc15.c

344

*value = soc15_get_register_value(adev,

sys/dev/drm/amd/amdgpu/soc15_common.h

41

#define WREG32_SOC15(ip, inst, reg, value) \

sys/dev/drm/amd/amdgpu/soc15_common.h

42

WREG32((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), value)

sys/dev/drm/amd/amdgpu/soc15_common.h

44

#define WREG32_SOC15_NO_KIQ(ip, inst, reg, value) \

sys/dev/drm/amd/amdgpu/soc15_common.h

45

WREG32_NO_KIQ((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), value)

sys/dev/drm/amd/amdgpu/soc15_common.h

47

#define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \

sys/dev/drm/amd/amdgpu/soc15_common.h

48

WREG32((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, value)

sys/dev/drm/amd/amdgpu/soc15_common.h

82

#define WREG32_SOC15_DPG_MODE(ip, inst, reg, value, mask, sram_sel) \

sys/dev/drm/amd/amdgpu/soc15_common.h

84

WREG32_SOC15(ip, inst, mmUVD_DPG_LMA_DATA, value); \

sys/dev/drm/amd/amdgpu/vi.c

647

u32 sh_num, u32 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/vi.c

651

*value = 0;

sys/dev/drm/amd/amdgpu/vi.c

658

*value = vi_get_register_value(adev, indexed, se_num, sh_num,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4326

attributes.attribute_flags.value = 0;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

223

stream->gamut_remap_matrix.matrix[i].value = val;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

111

res.value = (long long)res_value;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

114

res.value = -res.value;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

123

bool arg1_negative = arg1.value < 0;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

124

bool arg2_negative = arg2.value < 0;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

126

unsigned long long arg1_value = arg1_negative ? -arg1.value : arg1.value;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

127

unsigned long long arg2_value = arg2_negative ? -arg2.value : arg2.value;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

137

res.value = arg1_int * arg2_int;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

139

ASSERT(res.value <= LONG_MAX);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

141

res.value <<= FIXED31_32_BITS_PER_FRACTIONAL_PART;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

145

ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value));

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

147

res.value += tmp;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

151

ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value));

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

153

res.value += tmp;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

158

(tmp >= (unsigned long long)dc_fixpt_half.value);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

160

ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value));

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

162

res.value += tmp;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

165

res.value = -res.value;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

174

unsigned long long arg_value = abs_i64(arg.value);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

182

res.value = arg_int * arg_int;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

184

ASSERT(res.value <= LONG_MAX);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

186

res.value <<= FIXED31_32_BITS_PER_FRACTIONAL_PART;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

190

ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value));

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

192

res.value += tmp;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

194

ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value));

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

196

res.value += tmp;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

201

(tmp >= (unsigned long long)dc_fixpt_half.value);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

203

ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value));

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

205

res.value += tmp;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

217

ASSERT(arg.value);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

220

dc_fixpt_one.value,

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

221

arg.value);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

242

arg_norm.value,

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

243

dc_fixpt_two_pi.value)));

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

260

if (arg.value != arg_norm.value)

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

372

} else if (arg.value != 0)

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

385

ASSERT(arg.value > 0);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

404

} while (abs_i64(error.value) > 100ULL);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

418

long long value,

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

425

unsigned int fractional_part = FRACTIONAL_PART_MASK & value;

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

427

result &= GET_INTEGER_PART(value);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

437

long long value,

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

442

unsigned int truncated_val = ux_dy(value, integer_bits, fractional_bits);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

444

if (value >= (1LL << (integer_bits + FIXED31_32_BITS_PER_FRACTIONAL_PART)))

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

454

return ux_dy(arg.value, 3, 19);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

459

return ux_dy(arg.value, 2, 19);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

464

return ux_dy(arg.value, 0, 19);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

469

return clamp_ux_dy(arg.value, 0, 14, 1);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

474

return clamp_ux_dy(arg.value, 0, 10, 1);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

479

if (arg.value < 0)

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

480

return -(int)ux_dy(dc_fixpt_abs(arg).value, 4, 19);

sys/dev/drm/amd/display/dc/basics/fixpt31_32.c

482

return ux_dy(arg.value, 4, 19);

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

105

res.value = (int64_t)(res_value);

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

108

res.value = -res.value;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

119

multiplicand = div64_s64(arg.value, abs_i64(significance.value));

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

120

result.value = abs_i64(significance.value) * multiplicand;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

121

ASSERT(abs_i64(result.value) <= abs_i64(arg.value));

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

132

multiplicand = div64_s64(arg.value, abs_i64(significance.value));

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

133

result.value = abs_i64(significance.value) * multiplicand;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

134

if (abs_i64(result.value) < abs_i64(arg.value)) {

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

135

if (arg.value < 0)

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

136

result.value -= abs_i64(significance.value);

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

138

result.value += abs_i64(significance.value);

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

147

bool arg1_negative = arg1.value < 0;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

148

bool arg2_negative = arg2.value < 0;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

150

uint64_t arg1_value = abs_i64(arg1.value);

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

151

uint64_t arg2_value = abs_i64(arg2.value);

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

161

res.value = arg1_int * arg2_int;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

163

ASSERT(res.value <= BW_FIXED_MAX_I32);

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

165

res.value <<= BW_FIXED_BITS_PER_FRACTIONAL_PART;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

169

ASSERT(tmp <= (uint64_t)(MAX_I64 - res.value));

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

171

res.value += tmp;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

175

ASSERT(tmp <= (uint64_t)(MAX_I64 - res.value));

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

177

res.value += tmp;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

182

(tmp >= (uint64_t)(bw_frc_to_fixed(1, 2).value));

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

184

ASSERT(tmp <= (uint64_t)(MAX_I64 - res.value));

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

186

res.value += tmp;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

189

res.value = -res.value;

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

49

struct bw_fixed bw_int_to_fixed_nonconst(int64_t value)

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

52

ASSERT(value < BW_FIXED_MAX_I32 && value > BW_FIXED_MIN_I32);

sys/dev/drm/amd/display/dc/calcs/bw_fixed.c

53

res.value = value << BW_FIXED_BITS_PER_FRACTIONAL_PART;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

102

value,

sys/dev/drm/amd/display/dc/calcs/custom_float.c

132

uint32_t value = 0;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

160

value |= mask;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

169

value |= mask << i;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

175

value |= 1 << (i + j);

sys/dev/drm/amd/display/dc/calcs/custom_float.c

177

*result = value;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

183

struct fixed31_32 value,

sys/dev/drm/amd/display/dc/calcs/custom_float.c

192

value, format, &negative, &mantissa, &exponenta) &&

sys/dev/drm/amd/display/dc/calcs/custom_float.c

30

struct fixed31_32 value,

sys/dev/drm/amd/display/dc/calcs/custom_float.c

46

value,

sys/dev/drm/amd/display/dc/calcs/custom_float.c

55

value,

sys/dev/drm/amd/display/dc/calcs/custom_float.c

58

value = dc_fixpt_neg(value);

sys/dev/drm/amd/display/dc/calcs/custom_float.c

64

value,

sys/dev/drm/amd/display/dc/calcs/custom_float.c

69

value = dc_fixpt_shl(value, 1);

sys/dev/drm/amd/display/dc/calcs/custom_float.c

72

value,

sys/dev/drm/amd/display/dc/calcs/custom_float.c

86

value)) {

sys/dev/drm/amd/display/dc/calcs/custom_float.c

90

value = dc_fixpt_shr(value, 1);

sys/dev/drm/amd/display/dc/calcs/custom_float.c

94

value));

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2801

data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.horz.value);

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2802

data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value);

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2857

pipe[i].bottom_pipe->plane_res.scl_data.ratios.horz.value);

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2859

pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value);

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2903

data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.horz.value);

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2904

data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value);

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

381

input->scale_ratio_depth.hscl_ratio = pipe->plane_res.scl_data.ratios.horz.value/4294967296.0;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

382

input->scale_ratio_depth.vscl_ratio = pipe->plane_res.scl_data.ratios.vert.value/4294967296.0;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

383

input->scale_ratio_depth.vinit = pipe->plane_res.scl_data.inits.v.value/4294967296.0;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

389

input->scale_ratio_depth.hscl_ratio_c = pipe->plane_res.scl_data.ratios.horz_c.value/4294967296.0;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

390

input->scale_ratio_depth.vscl_ratio_c = pipe->plane_res.scl_data.ratios.vert_c.value/4294967296.0;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

391

input->scale_ratio_depth.vinit_c = pipe->plane_res.scl_data.inits.v_c.value/4294967296.0;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

909

ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

911

ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

914

ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

916

ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value

sys/dev/drm/amd/display/dc/core/dc_link.c

1604

uint8_t value = 0;

sys/dev/drm/amd/display/dc/core/dc_link.c

1638

value = settings->reg_settings[i].i2c_reg_val;

sys/dev/drm/amd/display/dc/core/dc_link.c

1643

slave_address, &offset, 1, &value, 1);

sys/dev/drm/amd/display/dc/core/dc_link.c

1651

buffer[1] = value | apply_rx_tx_change;

sys/dev/drm/amd/display/dc/core/dc_link.c

1691

value = settings->reg_settings_6g[i].i2c_reg_val;

sys/dev/drm/amd/display/dc/core/dc_link.c

1696

slave_address, &offset, 1, &value, 1);

sys/dev/drm/amd/display/dc/core/dc_link.c

1704

buffer[1] = value | apply_rx_tx_change;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1011

data->inits.v_c.value &= 0xffffffff;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1059

data->inits.v.value &= 0xffffffff;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1088

data->inits.v_c.value &= 0xffffffff;

sys/dev/drm/amd/display/dc/core/dc_resource.c

730

pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2;

sys/dev/drm/amd/display/dc/core/dc_resource.c

732

pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2;

sys/dev/drm/amd/display/dc/core/dc_resource.c

734

pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64(

sys/dev/drm/amd/display/dc/core/dc_resource.c

735

pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h);

sys/dev/drm/amd/display/dc/core/dc_resource.c

736

pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64(

sys/dev/drm/amd/display/dc/core/dc_resource.c

737

pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w);

sys/dev/drm/amd/display/dc/core/dc_resource.c

744

pipe_ctx->plane_res.scl_data.ratios.horz_c.value /= 2;

sys/dev/drm/amd/display/dc/core/dc_resource.c

745

pipe_ctx->plane_res.scl_data.ratios.vert_c.value /= 2;

sys/dev/drm/amd/display/dc/core/dc_resource.c

849

data->inits.h.value &= 0xffffffff;

sys/dev/drm/amd/display/dc/core/dc_resource.c

870

data->inits.h_c.value &= 0xffffffff;

sys/dev/drm/amd/display/dc/core/dc_resource.c

918

data->inits.h.value &= 0xffffffff;

sys/dev/drm/amd/display/dc/core/dc_resource.c

947

data->inits.h_c.value &= 0xffffffff;

sys/dev/drm/amd/display/dc/core/dc_resource.c

990

data->inits.v.value &= 0xffffffff;

sys/dev/drm/amd/display/dc/dc_helper.c

316

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dc_helper.c

319

value = dm_read_reg(ctx, addr_data);

sys/dev/drm/amd/display/dc/dc_helper.c

321

return value;

sys/dev/drm/amd/display/dc/dc_hw_types.h

486

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_abm.c

347

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_abm.c

353

REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, &value);

sys/dev/drm/amd/display/dc/dce/dce_abm.c

354

if (value == 0 || value == 1) {

sys/dev/drm/amd/display/dc/dce/dce_abm.c

389

value = REG_READ(BIOS_SCRATCH_2);

sys/dev/drm/amd/display/dc/dce/dce_abm.c

390

value |= ATOM_S2_VRI_BRIGHT_ENABLE;

sys/dev/drm/amd/display/dc/dce/dce_abm.c

391

REG_WRITE(BIOS_SCRATCH_2, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

295

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

298

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_HBR);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

300

set_reg_field_value(value, capable,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

304

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_HBR, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

312

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

317

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

319

set_reg_field_value(value, latency_in_ms,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

324

value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

332

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

340

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

342

set_reg_field_value(value, latency_in_ms,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

347

value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

352

uint32_t value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

355

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

358

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

362

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

363

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

366

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

369

audio->inst, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

374

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

377

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

378

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

381

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

383

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

386

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

388

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

391

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

392

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

394

audio->inst, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

406

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

414

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

415

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

418

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

424

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

426

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

437

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

445

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

450

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

455

field = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

461

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

469

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

479

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

489

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

503

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

52

#define AZ_REG_WRITE(reg_name, value) \

sys/dev/drm/amd/display/dc/dce/dce_audio.c

525

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

53

write_indirect_azalia_reg(audio, IX_REG(reg_name), value)

sys/dev/drm/amd/display/dc/dce/dce_audio.c

546

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

551

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

556

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

564

value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

588

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

589

set_reg_field_value(value, audio_info->manufacture_id,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

593

set_reg_field_value(value, audio_info->product_id,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

598

value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

600

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

608

set_reg_field_value(value, strlen,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

613

value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

622

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

624

set_reg_field_value(value, audio_info->port_id[0],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

628

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

630

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

631

set_reg_field_value(value, audio_info->port_id[1],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

635

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO3, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

639

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

640

set_reg_field_value(value, audio_info->display_name[0],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

644

set_reg_field_value(value, audio_info->display_name[1],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

648

set_reg_field_value(value, audio_info->display_name[2],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

652

set_reg_field_value(value, audio_info->display_name[3],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

656

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO4, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

658

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

659

set_reg_field_value(value, audio_info->display_name[4],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

663

set_reg_field_value(value, audio_info->display_name[5],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

667

set_reg_field_value(value, audio_info->display_name[6],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

671

set_reg_field_value(value, audio_info->display_name[7],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

675

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

677

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

678

set_reg_field_value(value, audio_info->display_name[8],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

682

set_reg_field_value(value, audio_info->display_name[9],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

686

set_reg_field_value(value, audio_info->display_name[10],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

690

set_reg_field_value(value, audio_info->display_name[11],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

694

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO6, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

696

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

697

set_reg_field_value(value, audio_info->display_name[12],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

701

set_reg_field_value(value, audio_info->display_name[13],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

705

set_reg_field_value(value, audio_info->display_name[14],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

709

set_reg_field_value(value, audio_info->display_name[15],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

713

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO7, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

715

value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

716

set_reg_field_value(value, audio_info->display_name[16],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

720

set_reg_field_value(value, audio_info->display_name[17],

sys/dev/drm/amd/display/dc/dce/dce_audio.c

724

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO8, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

725

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

726

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

729

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

77

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

84

value = REG_READ(AZALIA_F0_CODEC_ENDPOINT_DATA);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

868

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

87

reg_index, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

871

value = AZ_REG_READ(

sys/dev/drm/amd/display/dc/dce/dce_audio.c

874

port_connectivity = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

885

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

89

return value;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

898

value = AZ_REG_READ(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

899

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

902

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_audio.c

910

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

913

AZ_REG_WRITE(AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

101

value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

109

value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

115

REG_WRITE(AUX_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

124

value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

129

REG_WRITE(AUX_CONTROL, value);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

139

value = REG_READ(AUX_ARB_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

141

value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

162

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

210

value = REG_UPDATE_4(AUX_SW_DATA,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

216

value = REG_SET_2(AUX_SW_DATA, value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

220

value = REG_SET(AUX_SW_DATA, value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

224

value = REG_SET(AUX_SW_DATA, value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

237

value = REG_SET(AUX_SW_DATA, value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

361

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

371

value = REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

375

if ((value & AUX_SW_STATUS__AUX_SW_HPD_DISCON_MASK))

sys/dev/drm/amd/display/dc/dce/dce_aux.c

386

if (value & AUX_SW_STATUS__AUX_SW_DONE_MASK) {

sys/dev/drm/amd/display/dc/dce/dce_aux.c

387

if ((value & AUX_SW_STATUS__AUX_SW_RX_TIMEOUT_STATE_MASK) ||

sys/dev/drm/amd/display/dc/dce/dce_aux.c

388

(value & AUX_SW_STATUS__AUX_SW_RX_TIMEOUT_MASK))

sys/dev/drm/amd/display/dc/dce/dce_aux.c

391

else if ((value & AUX_SW_STATUS__AUX_SW_RX_INVALID_STOP_MASK) ||

sys/dev/drm/amd/display/dc/dce/dce_aux.c

392

(value & AUX_SW_STATUS__AUX_SW_RX_RECV_NO_DET_MASK) ||

sys/dev/drm/amd/display/dc/dce/dce_aux.c

393

(value &

sys/dev/drm/amd/display/dc/dce/dce_aux.c

395

(value & AUX_SW_STATUS__AUX_SW_RX_RECV_INVALID_L_MASK))

sys/dev/drm/amd/display/dc/dce/dce_aux.c

398

*returned_bytes = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

73

uint32_t value = REG_READ(AUX_ARB_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

75

value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

86

uint32_t value = REG_READ(AUX_ARB_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

88

value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

94

value = REG_READ(AUX_CONTROL);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

95

field = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_hwseq.c

82

uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]);

sys/dev/drm/amd/display/dc/dce/dce_hwseq.c

83

REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value);

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

161

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

214

value = REG_SET_4(DC_I2C_DATA, 0,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

221

value = REG_SET_2(DC_I2C_DATA, 0,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

229

REG_SET_2(DC_I2C_DATA, value,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

72

uint32_t value =

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

76

else if (value & dce_i2c_hw->masks->DC_I2C_SW_STOPPED_ON_NACK)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

78

else if (value & dce_i2c_hw->masks->DC_I2C_SW_TIMEOUT)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

80

else if (value & dce_i2c_hw->masks->DC_I2C_SW_ABORTED)

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

82

else if (value & dce_i2c_hw->masks->DC_I2C_SW_DONE)

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

42

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

45

dal_gpio_get_value(ddc->pin_data, &value);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

47

dal_gpio_get_value(ddc->pin_clock, &value);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

49

return (value != 0);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

57

uint32_t value = bit ? 1 : 0;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

60

dal_gpio_set_value(ddc->pin_data, value);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

62

dal_gpio_set_value(ddc->pin_clock, value);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

1372

uint32_t value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

1377

set_reg_field_value(value, 1, DC_HPD_CONTROL, DC_HPD_EN);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

1385

uint32_t value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

1387

set_reg_field_value(value, 0, DC_HPD_CONTROL, DC_HPD_EN);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

259

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

267

value = REG_READ(DP_DPHY_INTERNAL_CTRL);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

271

value = 0x1;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

274

value = 0x11;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

277

value = 0x0;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

281

REG_WRITE(DP_DPHY_INTERNAL_CTRL, value);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

495

uint32_t value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

497

set_reg_field_value(value, hpd_source, AUX_CONTROL, AUX_HPD_SEL);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

498

set_reg_field_value(value, 0, AUX_CONTROL, AUX_LS_READ_EN);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

499

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

502

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

505

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

507

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

548

uint32_t value;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

550

REG_GET(DIG_BE_EN_CNTL, DIG_ENABLE, &value);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

551

return value;

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1017

if (ratio.value < dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1019

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1021

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1029

if (ratio.value < dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1031

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1033

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1041

if (ratio.value < dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1043

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1045

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1053

if (ratio.value < dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1055

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1057

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1065

if (ratio.value < dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1067

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1069

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1077

if (ratio.value < dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1079

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1081

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1089

if (ratio.value < dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1091

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1093

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1101

if (ratio.value < dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1103

else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_scl_filters.c

1105

else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1025

unsigned int value = enable ? 1 : 0;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1027

REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1504

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1516

value = REG_READ(DP_SEC_CNTL);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1517

if (value != 0)

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

841

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

875

value = REG_READ(DP_SEC_CNTL);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

876

if (value)

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

885

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

901

value = REG_READ(DP_SEC_CNTL);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

902

if (value)

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

109

uint32_t value, frame_count;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

118

value = dm_read_reg(ctx, mmLB_SYNC_RESET_SEL);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

119

set_reg_field_value(value, 3, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

120

set_reg_field_value(value, 1, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL2);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

121

dm_write_reg(ctx, mmLB_SYNC_RESET_SEL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

135

value = dm_read_reg(ctx, mmLB_SYNC_RESET_SEL);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

136

set_reg_field_value(value, 2, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

137

set_reg_field_value(value, 0, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL2);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

138

dm_write_reg(ctx, mmLB_SYNC_RESET_SEL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

150

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

153

value = dm_read_reg(cp110->base.ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

155

value,

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

175

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

179

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

180

set_reg_field_value(value, 0, FBC_CNTL, FBC_GRPH_COMP_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

181

set_reg_field_value(value, 1, FBC_CNTL, FBC_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

182

set_reg_field_value(value, 2, FBC_CNTL, FBC_COHERENCY_MODE);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

186

value,

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

191

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

194

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

195

set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_RLE_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

196

set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_DPCM4_RGB_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

197

set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_IND_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

198

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

201

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

202

set_reg_field_value(value, 1, FBC_COMP_CNTL, FBC_DEPTH_RGB08_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

203

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

208

set_reg_field_value(value, 0xF, FBC_COMP_CNTL, FBC_MIN_COMPRESSION);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

209

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

212

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

213

dm_write_reg(compressor->ctx, mmFBC_IND_LUT0, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

215

value = 0xFFFFFF;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

216

dm_write_reg(compressor->ctx, mmFBC_IND_LUT1, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

229

uint32_t value, misc_value;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

233

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

234

set_reg_field_value(value, 1, FBC_CNTL, FBC_GRPH_COMP_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

236

value,

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

239

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

247

set_reg_field_value(value, 0, FBC_CNTL, FBC_GRPH_COMP_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

248

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

263

set_reg_field_value(value, 1, FBC_CNTL, FBC_GRPH_COMP_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

264

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

299

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

301

value = dm_read_reg(compressor->ctx, mmFBC_STATUS);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

302

if (get_reg_field_value(value, FBC_STATUS, FBC_ENABLE_STATUS)) {

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

308

value = dm_read_reg(compressor->ctx, mmFBC_MISC);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

309

if (get_reg_field_value(value, FBC_MISC, FBC_STOP_ON_HFLIP_EVENT)) {

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

310

value = dm_read_reg(compressor->ctx, mmFBC_CNTL);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

312

if (get_reg_field_value(value, FBC_CNTL, FBC_GRPH_COMP_EN)) {

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

328

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

362

value,

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

366

dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

378

uint32_t value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

381

value,

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

385

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

412

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

414

value,

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

424

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

116

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

121

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

124

value,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

130

value,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

136

value,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

141

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

144

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

147

value,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

152

value,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

159

value,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1619

pstate_blackout_duration_ns = 1000 * blackout_duration.value >> 24;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

165

value,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

171

value,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1746

unsigned int value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1749

value |= 0x100;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1751

value |= 0x80;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1753

value |= 0x2;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1755

value |= 0x1;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

176

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1761

value |= 0x84;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1766

set_static_screen_control(pipe_ctx[i]->stream_res.tg, value);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

747

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

749

REG_GET(LVTMA_PWRSEQ_CNTL, LVTMA_BLON, &value);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

751

return value;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

100

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

1000

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

1004

dm_write_reg(mi->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

1007

value = 0x4000800;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

1008

dm_write_reg(mi->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

1011

value = 0x4000800;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

1012

dm_write_reg(mi->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

107

set_reg_field_value(value, temp,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

114

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

117

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

121

set_reg_field_value(value, temp,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

128

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

157

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

159

value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_ENABLE);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

160

set_reg_field_value(value, 1, UNP_GRPH_ENABLE, GRPH_ENABLE);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

163

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

171

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

173

set_reg_field_value(value, info->gfx8.num_banks,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

176

set_reg_field_value(value, info->gfx8.bank_width,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

179

set_reg_field_value(value, info->gfx8.bank_height,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

182

set_reg_field_value(value, info->gfx8.tile_aspect,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

185

set_reg_field_value(value, info->gfx8.tile_split,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

188

set_reg_field_value(value, info->gfx8.tile_mode,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

191

set_reg_field_value(value, info->gfx8.pipe_config,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

194

set_reg_field_value(value, info->gfx8.array_mode,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

197

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

200

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

206

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

208

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

210

set_reg_field_value(value, info->gfx8.bank_width_c,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

213

set_reg_field_value(value, info->gfx8.bank_height_c,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

216

set_reg_field_value(value, info->gfx8.tile_aspect_c,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

219

set_reg_field_value(value, info->gfx8.tile_split_c,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

222

set_reg_field_value(value, info->gfx8.tile_mode_c,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

228

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

236

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

252

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

253

set_reg_field_value(value, local_size.video.luma_pitch,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

259

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

261

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

262

set_reg_field_value(value, local_size.video.chroma_pitch,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

267

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

269

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

270

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

275

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

277

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

278

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

283

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

285

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

286

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

291

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

293

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

294

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

299

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

301

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

302

set_reg_field_value(value, local_size.video.luma_size.x +

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

308

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

310

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

311

set_reg_field_value(value, local_size.video.chroma_size.x +

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

317

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

319

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

320

set_reg_field_value(value, local_size.video.luma_size.y +

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

326

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

328

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

329

set_reg_field_value(value, local_size.video.chroma_size.y +

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

335

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

337

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

340

set_reg_field_value(value, 3,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

344

set_reg_field_value(value, 2,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

348

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

352

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

360

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

368

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

372

value = dm_read_reg(

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

409

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

414

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

422

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

424

value = dm_read_reg(

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

430

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

437

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

44

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

441

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

444

value = dm_read_reg(

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

46

value = dm_read_reg(

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

461

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

469

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

477

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

479

value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_UPDATE);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

481

if (get_reg_field_value(value, UNP_GRPH_UPDATE,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

50

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

57

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

586

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

612

value = dm_read_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

614

set_reg_field_value(value, 0xff, UNP_PIPE_OUTSTANDING_REQUEST_LIMIT, UNP_PIPE_OUTSTANDING_REQUEST_LIMIT_L);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

615

set_reg_field_value(value, 0xff, UNP_PIPE_OUTSTANDING_REQUEST_LIMIT, UNP_PIPE_OUTSTANDING_REQUEST_LIMIT_C);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

616

dm_write_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

618

value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

619

set_reg_field_value(value, page_width, UNP_DVMM_PTE_CONTROL, DVMM_PAGE_WIDTH);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

620

set_reg_field_value(value, page_height, UNP_DVMM_PTE_CONTROL, DVMM_PAGE_HEIGHT);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

621

set_reg_field_value(value, min_pte_before_flip, UNP_DVMM_PTE_CONTROL, DVMM_MIN_PTE_BEFORE_FLIP);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

622

dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

624

value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

625

set_reg_field_value(value, pte[5], UNP_DVMM_PTE_ARB_CONTROL, DVMM_PTE_REQ_PER_CHUNK);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

626

set_reg_field_value(value, 0xff, UNP_DVMM_PTE_ARB_CONTROL, DVMM_MAX_PTE_REQ_OUTSTANDING);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

627

dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

629

value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

630

set_reg_field_value(value, page_width_chroma, UNP_DVMM_PTE_CONTROL_C, DVMM_PAGE_WIDTH_C);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

631

set_reg_field_value(value, page_height_chroma, UNP_DVMM_PTE_CONTROL_C, DVMM_PAGE_HEIGHT_C);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

632

set_reg_field_value(value, min_pte_before_flip_chroma, UNP_DVMM_PTE_CONTROL_C, DVMM_MIN_PTE_BEFORE_FLIP_C);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

633

dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

635

value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

636

set_reg_field_value(value, pte_chroma[5], UNP_DVMM_PTE_ARB_CONTROL_C, DVMM_PTE_REQ_PER_CHUNK_C);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

637

set_reg_field_value(value, 0xff, UNP_DVMM_PTE_ARB_CONTROL_C, DVMM_MAX_PTE_REQ_OUTSTANDING_C);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

638

dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

65

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

71

set_reg_field_value(value, temp,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

78

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

81

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

830

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

834

value = dm_read_reg(ctx, wm_mask_ctrl_addr);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

837

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

841

dm_write_reg(ctx, wm_mask_ctrl_addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

843

value = dm_read_reg(ctx, nbp_pstate_ctrl_addr);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

846

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

85

set_reg_field_value(value, temp,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

851

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

856

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

860

dm_write_reg(ctx, nbp_pstate_ctrl_addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

863

value = dm_read_reg(ctx, nbp_pstate_ctrl_addr);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

865

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

869

dm_write_reg(ctx, nbp_pstate_ctrl_addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

872

value = dm_read_reg(ctx, wm_mask_ctrl_addr);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

874

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

878

dm_write_reg(ctx, wm_mask_ctrl_addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

880

value = dm_read_reg(ctx, nbp_pstate_ctrl_addr);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

882

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

887

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

892

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

896

dm_write_reg(ctx, nbp_pstate_ctrl_addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

899

value = dm_read_reg(ctx, nbp_pstate_ctrl_addr);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

901

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

905

dm_write_reg(ctx, nbp_pstate_ctrl_addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

92

value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

983

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

987

value = dm_read_reg(mi->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

990

value,

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

994

dm_write_reg(mi->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

997

value = dm_read_reg(mi->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

127

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

131

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

137

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

142

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

145

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

149

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

155

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

160

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

163

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

167

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

173

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

178

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

181

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

185

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

191

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

196

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

199

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

203

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

209

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

214

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

217

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

221

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

227

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

232

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

241

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

245

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

251

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

256

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

259

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

263

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

269

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

274

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

277

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

281

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

287

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

292

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

295

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

299

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

305

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

310

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

313

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

317

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

323

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

328

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

331

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

335

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

341

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

346

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

366

uint32_t value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

369

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

382

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

394

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

403

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

417

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

429

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

438

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

450

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

456

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

465

uint32_t value = dm_read_reg(xfm->ctx, mmDENORM_CLAMP_CONTROL);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

471

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

479

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

487

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

498

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

503

dm_write_reg(xfm->ctx, mmDENORM_CLAMP_CONTROL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

538

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

555

value = dm_read_reg(ctx, mmCOL_MAN_INPUT_CSC_CONTROL);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

557

value, COL_MAN_INPUT_CSC_CONTROL, INPUT_CSC_MODE) != 1;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

561

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

563

value, regval[0], INPUT_CSC_C11_C12_A, INPUT_CSC_C11_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

565

value, regval[1], INPUT_CSC_C11_C12_A, INPUT_CSC_C12_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

566

dm_write_reg(ctx, mmINPUT_CSC_C11_C12_A, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

568

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

570

value, regval[2], INPUT_CSC_C13_C14_A, INPUT_CSC_C13_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

572

value, regval[3], INPUT_CSC_C13_C14_A, INPUT_CSC_C14_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

573

dm_write_reg(ctx, mmINPUT_CSC_C13_C14_A, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

575

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

577

value, regval[4], INPUT_CSC_C21_C22_A, INPUT_CSC_C21_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

579

value, regval[5], INPUT_CSC_C21_C22_A, INPUT_CSC_C22_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

580

dm_write_reg(ctx, mmINPUT_CSC_C21_C22_A, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

582

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

584

value, regval[6], INPUT_CSC_C23_C24_A, INPUT_CSC_C23_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

586

value, regval[7], INPUT_CSC_C23_C24_A, INPUT_CSC_C24_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

587

dm_write_reg(ctx, mmINPUT_CSC_C23_C24_A, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

589

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

591

value, regval[8], INPUT_CSC_C31_C32_A, INPUT_CSC_C31_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

593

value, regval[9], INPUT_CSC_C31_C32_A, INPUT_CSC_C32_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

594

dm_write_reg(ctx, mmINPUT_CSC_C31_C32_A, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

596

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

598

value, regval[10], INPUT_CSC_C33_C34_A, INPUT_CSC_C33_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

600

value, regval[11], INPUT_CSC_C33_C34_A, INPUT_CSC_C34_A);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

601

dm_write_reg(ctx, mmINPUT_CSC_C33_C34_A, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

604

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

606

value, regval[0], INPUT_CSC_C11_C12_B, INPUT_CSC_C11_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

608

value, regval[1], INPUT_CSC_C11_C12_B, INPUT_CSC_C12_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

609

dm_write_reg(ctx, mmINPUT_CSC_C11_C12_B, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

611

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

613

value, regval[2], INPUT_CSC_C13_C14_B, INPUT_CSC_C13_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

615

value, regval[3], INPUT_CSC_C13_C14_B, INPUT_CSC_C14_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

616

dm_write_reg(ctx, mmINPUT_CSC_C13_C14_B, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

618

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

620

value, regval[4], INPUT_CSC_C21_C22_B, INPUT_CSC_C21_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

622

value, regval[5], INPUT_CSC_C21_C22_B, INPUT_CSC_C22_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

623

dm_write_reg(ctx, mmINPUT_CSC_C21_C22_B, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

625

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

627

value, regval[6], INPUT_CSC_C23_C24_B, INPUT_CSC_C23_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

629

value, regval[7], INPUT_CSC_C23_C24_B, INPUT_CSC_C24_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

630

dm_write_reg(ctx, mmINPUT_CSC_C23_C24_B, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

632

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

634

value, regval[8], INPUT_CSC_C31_C32_B, INPUT_CSC_C31_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

636

value, regval[9], INPUT_CSC_C31_C32_B, INPUT_CSC_C32_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

637

dm_write_reg(ctx, mmINPUT_CSC_C31_C32_B, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

639

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

641

value, regval[10], INPUT_CSC_C33_C34_B, INPUT_CSC_C33_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

643

value, regval[11], INPUT_CSC_C33_C34_B, INPUT_CSC_C34_B);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

644

dm_write_reg(ctx, mmINPUT_CSC_C33_C34_B, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

648

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

661

value, 2, COL_MAN_INPUT_CSC_CONTROL, INPUT_CSC_INPUT_TYPE);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

663

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

668

dm_write_reg(ctx, mmCOL_MAN_INPUT_CSC_CONTROL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

103

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

106

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

134

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

138

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

144

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

150

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

153

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

155

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

161

mmGAMMA_CORR_CNTLA_SLOPE_CNTL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

164

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

166

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

172

mmGAMMA_CORR_CNTLA_END_CNTL1, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

175

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

177

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

183

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

189

mmGAMMA_CORR_CNTLA_END_CNTL2, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

195

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

197

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

203

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

209

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

215

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

223

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

228

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

230

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

236

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

242

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

248

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

255

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

260

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

262

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

268

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

274

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

280

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

287

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

292

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

294

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

300

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

306

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

312

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

319

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

324

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

326

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

332

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

338

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

344

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

351

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

356

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

358

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

364

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

37

uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

370

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

376

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

383

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

388

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

390

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

396

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

402

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

408

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

415

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

420

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

422

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

428

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

43

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

434

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

440

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

447

value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

454

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

457

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

463

mmGAMMA_CORR_LUT_WRITE_EN_MASK, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

49

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

521

uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

524

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

530

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

536

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

542

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

547

dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

56

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

62

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

68

dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

71

value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

72

if (get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

75

get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

86

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

88

value = dm_read_reg(xfm_dce->base.ctx,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

92

value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

98

mmCOL_MAN_INPUT_GAMMA_CONTROL1, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

100

value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1000

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1005

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

101

field = get_reg_field_value(value, CRTC_STATUS, CRTC_V_BLANK);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1010

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1015

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1024

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1029

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1034

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1039

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1044

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1053

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1055

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1057

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1061

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1064

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1070

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1076

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1082

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1087

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1092

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1093

dm_write_reg(ctx, CRTC_REG(mmCRTC_TEST_PATTERN_CONTROL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1094

dm_write_reg(ctx, CRTC_REG(mmCRTC_TEST_PATTERN_COLOR), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1096

value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1218

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1223

value = dm_read_reg(tg->ctx, address);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1226

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1231

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1236

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1243

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1248

dm_write_reg(tg->ctx, CRTC_REG(mmDCP_GSL_CONTROL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1249

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1251

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1256

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1261

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1266

dm_write_reg(tg->ctx, CRTC_REG(mmDCIO_GSL0_CNTL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1275

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

128

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1288

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1293

dm_write_reg(tg->ctx, address, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1298

value = dm_read_reg(tg->ctx, address);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1299

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1304

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1309

dm_write_reg(tg->ctx, address, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1319

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1323

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1327

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1332

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1337

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1342

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

135

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1354

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1360

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1365

dm_write_reg(tg->ctx, address, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1370

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1371

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1376

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1381

dm_write_reg(tg->ctx, address, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

140

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1416

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1420

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1426

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

143

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1434

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1439

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

144

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_LOCK), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1445

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1450

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1457

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1463

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1468

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1478

uint32_t value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1481

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1486

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1493

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1515

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1519

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1524

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1529

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1534

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1539

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1544

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1549

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1554

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1558

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1560

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1565

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

157

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1570

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1575

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1583

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1599

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

160

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1601

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1606

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1611

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1616

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1621

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1626

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1632

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1634

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1639

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1644

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1649

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

165

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1651

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1653

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1658

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1666

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1668

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1673

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1678

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1680

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1682

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1687

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1692

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1697

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

170

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1701

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1703

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1708

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1713

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1716

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1718

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1723

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1728

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1730

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1732

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1737

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1742

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1745

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1747

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

175

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1752

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1757

set_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1762

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1778

uint32_t value = dm_read_reg(tg->ctx,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1782

bool force = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1801

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1827

value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1829

set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1830

set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1832

value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1833

set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1835

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1852

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1856

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1862

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1868

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1874

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1876

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1882

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1899

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1902

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1907

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1912

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1917

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1920

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1927

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

193

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1932

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1938

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1944

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1950

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1966

uint32_t value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_BLANK_CONTROL));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1969

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1973

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1984

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1987

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

199

value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1992

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_DOUBLE_BUFFER_CONTROL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1993

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1997

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2002

dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_BLANK_CONTROL), value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

201

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

206

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2083

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2088

value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2089

field = get_reg_field_value(value, CRTC_CONTROL,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2099

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2116

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2118

set_reg_field_value(value, params->windowa_x_start,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2121

set_reg_field_value(value, params->windowa_x_end,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2124

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2127

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2129

set_reg_field_value(value, params->windowa_y_start,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2132

set_reg_field_value(value, params->windowa_y_end,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2135

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2138

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2140

set_reg_field_value(value, params->windowb_x_start,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2143

set_reg_field_value(value, params->windowb_x_end,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2146

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2149

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2151

set_reg_field_value(value, params->windowb_y_start,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2154

set_reg_field_value(value, params->windowb_y_end,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2157

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2160

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2161

set_reg_field_value(value, params->continuous_mode ? 1 : 0,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2163

set_reg_field_value(value, params->selection,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2165

set_reg_field_value(value, 1, CRTC_CRC_CNTL, CRTC_CRC_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2166

dm_write_reg(tg->ctx, cntl_addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2175

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2180

value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2181

field = get_reg_field_value(value, CRTC_CRC_CNTL, CRTC_CRC_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2188

value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2189

*r_cr = get_reg_field_value(value, CRTC_CRC0_DATA_RG, CRC0_R_CR);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2190

*g_y = get_reg_field_value(value, CRTC_CRC0_DATA_RG, CRC0_G_Y);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2193

value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2194

*b_cb = get_reg_field_value(value, CRTC_CRC0_DATA_B, CRC0_B_CB);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

221

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

222

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

225

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

472

uint32_t value)

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

482

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

512

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

514

value, CRTC_STATUS_FRAME_COUNT, CRTC_FRAME_COUNT);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

532

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

535

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_STATUS_POSITION));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

538

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

543

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

547

value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_NOM_VERT_POSITION));

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

550

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

575

uint32_t value = dm_read_reg(tg->ctx,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

578

*v_blank_start = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

581

*v_blank_end = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

610

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

615

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

617

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

621

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

624

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

626

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

630

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

636

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

638

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

642

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

645

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

647

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

651

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

654

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

660

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

669

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

674

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

677

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

682

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

691

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

696

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

708

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

758

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

762

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

767

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

772

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

775

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

778

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

784

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

790

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

795

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

799

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

842

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

844

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

872

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

879

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

884

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

889

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

897

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

901

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

904

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

910

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

916

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

922

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

927

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

95

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

959

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

966

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

971

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

976

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

981

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

986

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

995

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.h

234

uint32_t value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

103

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

106

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

112

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

117

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

123

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

126

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

132

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

137

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

144

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

148

value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

149

field = get_reg_field_value(value, CRTCV_STATUS, CRTC_V_BLANK);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

155

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

161

value = dm_read_reg(tg->ctx, mmCRTCV_STATUS_POSITION);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

164

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

169

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

173

value = dm_read_reg(tg->ctx, mmCRTCV_STATUS_POSITION);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

176

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

181

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

255

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

260

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

262

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

266

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

269

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

271

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

275

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

278

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

284

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

293

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

298

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

301

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

306

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

315

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

320

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

323

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

325

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

329

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

332

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

335

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

341

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

346

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

349

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

351

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

355

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

358

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

361

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

367

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

372

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

375

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

377

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

381

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

390

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

395

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

401

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

407

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

413

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

418

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

424

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

451

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

454

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

459

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

464

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

469

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

478

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

481

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

487

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

493

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

499

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

501

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

507

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

522

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

525

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

530

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

535

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

540

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

543

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

550

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

554

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

560

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

566

value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

572

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

60

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

601

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

603

value, CRTCV_STATUS_FRAME_COUNT, CRTC_FRAME_COUNT);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

62

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

63

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

66

mmCRTCV_MASTER_UPDATE_MODE, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

69

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

70

dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

72

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

73

set_reg_field_value(value, 1,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

76

mmCRTCV_MASTER_EN, value);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

83

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

85

value = dm_read_reg(tg->ctx,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

87

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

89

set_reg_field_value(value, 0,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

92

mmCRTCV_CONTROL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

102

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

104

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

109

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

113

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

118

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

120

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

125

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

129

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

132

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

134

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

139

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

143

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

163

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

165

set_reg_field_value(value, data->taps.h_taps - 1,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

167

set_reg_field_value(value, data->taps.v_taps - 1,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

169

set_reg_field_value(value, data->taps.h_taps_c - 1,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

171

set_reg_field_value(value, data->taps.v_taps_c - 1,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

173

dm_write_reg(ctx, mmSCLV_TAP_CONTROL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

175

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

177

set_reg_field_value(value, 1, SCLV_MODE, SCL_MODE);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

178

set_reg_field_value(value, 1, SCLV_MODE, SCL_PSCL_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

181

set_reg_field_value(value, 0, SCLV_MODE, SCL_MODE);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

182

set_reg_field_value(value, 0, SCLV_MODE, SCL_PSCL_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

186

set_reg_field_value(value, 1, SCLV_MODE, SCL_MODE_C);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

187

set_reg_field_value(value, 1, SCLV_MODE, SCL_PSCL_EN_C);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

191

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

192

get_reg_field_value(value, SCLV_MODE, SCL_MODE),

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

196

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

197

get_reg_field_value(value, SCLV_MODE, SCL_PSCL_EN),

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

201

set_reg_field_value(value, 0, SCLV_MODE, SCL_MODE_C);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

202

set_reg_field_value(value, 0, SCLV_MODE, SCL_PSCL_EN_C);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

204

dm_write_reg(ctx, mmSCLV_MODE, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

206

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

212

set_reg_field_value(value, 1, SCLV_CONTROL, SCL_BOUNDARY_MODE);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

213

dm_write_reg(ctx, mmSCLV_CONTROL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

276

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

278

value = dm_read_reg(xfm_dce->base.ctx, mmSCLV_UPDATE);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

279

set_reg_field_value(value, 1, SCLV_UPDATE, SCL_COEF_UPDATE_COMPLETE);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

280

dm_write_reg(xfm_dce->base.ctx, mmSCLV_UPDATE, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

396

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

399

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

403

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

406

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

408

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

412

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

415

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

417

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

421

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

424

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

426

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

430

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

433

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

435

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

440

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

444

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

447

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

449

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

454

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

458

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

461

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

463

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

468

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

472

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

475

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

477

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

482

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

486

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

507

uint32_t value;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

509

value = dm_read_reg(xfm_dce->base.ctx, mmLBV_MEMORY_CTRL);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

512

set_reg_field_value(value, 0, LBV_MEMORY_CTRL, LB_MEMORY_CONFIG);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

514

set_reg_field_value(value, xfm_dce->lb_memory_size, LBV_MEMORY_CTRL,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

517

dm_write_reg(xfm_dce->base.ctx, mmLBV_MEMORY_CTRL, value);

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

83

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

88

value = 0;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

90

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

95

value,

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

99

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

296

uint32_t value;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

299

value = dm_read_reg(cp110->base.ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

301

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

318

uint32_t value;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

322

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

323

set_reg_field_value(value, 0, FBC_CNTL, FBC_GRPH_COMP_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

324

set_reg_field_value(value, 1, FBC_CNTL, FBC_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

325

set_reg_field_value(value, 2, FBC_CNTL, FBC_COHERENCY_MODE);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

329

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

334

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

337

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

338

set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_RLE_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

339

set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_DPCM4_RGB_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

340

set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_IND_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

341

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

344

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

345

set_reg_field_value(value, 1, FBC_COMP_CNTL, FBC_DEPTH_RGB08_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

346

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

351

set_reg_field_value(value, 0xF, FBC_COMP_CNTL, FBC_MIN_COMPRESSION);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

352

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

355

value = 0;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

356

dm_write_reg(compressor->ctx, mmFBC_IND_LUT0, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

358

value = 0xFFFFFF;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

359

dm_write_reg(compressor->ctx, mmFBC_IND_LUT1, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

378

uint32_t value;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

391

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

392

set_reg_field_value(value, 1, FBC_CNTL, FBC_GRPH_COMP_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

394

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

397

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

405

set_reg_field_value(value, 0, FBC_CNTL, FBC_GRPH_COMP_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

406

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

407

set_reg_field_value(value, 1, FBC_CNTL, FBC_GRPH_COMP_EN);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

408

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

444

uint32_t value;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

446

value = dm_read_reg(compressor->ctx, mmFBC_STATUS);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

447

if (get_reg_field_value(value, FBC_STATUS, FBC_ENABLE_STATUS)) {

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

453

value = dm_read_reg(compressor->ctx, mmFBC_MISC);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

454

if (get_reg_field_value(value, FBC_MISC, FBC_STOP_ON_HFLIP_EVENT)) {

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

455

value = dm_read_reg(compressor->ctx, mmFBC_CNTL);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

457

if (get_reg_field_value(value, FBC_CNTL, FBC_GRPH_COMP_EN)) {

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

470

uint32_t value = dm_read_reg(compressor->ctx,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

474

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

484

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

532

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

536

dm_write_reg(compressor->ctx, DCP_REG(mmGRPH_COMPRESS_PITCH), value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

543

uint32_t value;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

549

value =

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

554

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

561

value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

565

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

567

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

571

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

575

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

577

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

581

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

585

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

587

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

591

dm_write_reg(compressor->ctx, mmGMCON_LPT_TARGET, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

597

uint32_t value;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

603

value = dm_read_reg(compressor->ctx,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

606

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

611

DMIF_REG(mmDPG_PIPE_STUTTER_CONTROL_NONLPTCH), value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

615

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

617

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

621

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

633

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

635

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

640

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

644

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

646

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

650

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

738

uint32_t value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

741

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

745

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

772

value = dm_read_reg(compressor->ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

774

value,

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

784

dm_write_reg(compressor->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

104

value,

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

109

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

72

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

77

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

80

value,

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

85

value,

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

92

value,

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

98

value,

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

115

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

118

value,

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

123

value,

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

130

value,

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

136

value,

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

142

value,

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

147

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

88

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

903

uint32_t value = dm_read_reg_soc15(ctx, mmCC_DC_PIPE_DIS, 0);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

905

value = value & 0x3f;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

906

return value;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1002

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1007

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1012

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1020

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1108

value = 0;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1109

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1110

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1111

dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

179

uint32_t value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

184

value, CRTC0_CRTC_STATUS_FRAME_COUNT, CRTC_FRAME_COUNT);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

196

uint32_t value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

201

position->horizontal_count = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

204

position->vertical_count = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

207

value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

212

position->nominal_vcount = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

388

uint32_t value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

393

return get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

405

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

431

value = dm_read_reg_soc15(tg->ctx, mmD1VGA_CONTROL, offset);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

433

set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

434

set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

436

value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

437

set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

439

dm_write_reg_soc15(tg->ctx, mmD1VGA_CONTROL, offset, value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

524

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

531

value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

540

value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

550

value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

625

uint32_t value;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

628

value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

634

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

639

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

643

value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

649

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

695

uint32_t value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

701

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

713

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

721

value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

729

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

737

value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

745

value);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

776

uint32_t value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

782

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

786

value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

848

uint32_t value)

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

853

CRTC_STATIC_SCREEN_EVENT_MASK, value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

867

uint32_t value;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

90

uint32_t value = dm_read_reg_soc15(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

95

field = get_reg_field_value(value, CRTC0_CRTC_STATUS, CRTC_V_BLANK);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

996

value = 0;

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

100

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

105

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

125

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

129

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

135

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

143

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

148

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

154

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

159

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

166

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

172

value,

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

177

dm_write_reg(tg->ctx, addr, value);

sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c

92

uint32_t value = dm_read_reg(tg->ctx, addr);

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

156

scl_data->ratios.horz.value != dc_fixpt_one.value &&

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

157

scl_data->ratios.vert.value != dc_fixpt_one.value)

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

168

if (scl_data->ratios.horz.value == (4ll << 32))

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

169

scl_data->ratios.horz.value--;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

170

if (scl_data->ratios.vert.value == (4ll << 32))

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

171

scl_data->ratios.vert.value--;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

172

if (scl_data->ratios.horz_c.value == (4ll << 32))

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

173

scl_data->ratios.horz_c.value--;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

174

if (scl_data->ratios.vert_c.value == (4ll << 32))

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

175

scl_data->ratios.vert_c.value--;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

174

const long long one = dc_fixpt_one.value;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

182

if (data->ratios.horz.value == one

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

183

&& data->ratios.vert.value == one

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

184

&& data->ratios.horz_c.value == one

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

185

&& data->ratios.vert_c.value == one

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

195

if (data->ratios.horz.value == one && data->ratios.vert.value == one)

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

197

if (data->ratios.horz_c.value == one && data->ratios.vert_c.value == one)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

1121

ASSERT(param->h_scale_ratio.value);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

1123

if (param->h_scale_ratio.value)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

113

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

117

value = REG_READ(HUBPREQ_DEBUG_DB);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

120

value |= 0x100;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

121

value &= ~0x1000;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

127

value |= 0x1000;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

130

REG_WRITE(HUBPREQ_DEBUG_DB, value);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1909

&& plane_state->coeff_reduction_factor.value != 0) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2485

unsigned int value = 0;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2488

value |= 0x80;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2490

value |= 0x2;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2492

value |= 0x1;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2496

set_static_screen_control(pipe_ctx[i]->stream_res.tg, value);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

229

uint32_t value;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

232

value = REG_READ(DP_DPHY_INTERNAL_CTRL);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

236

value = 0x1;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

239

value = 0x11;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

242

value = 0x0;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

246

REG_WRITE(DP_DPHY_INTERNAL_CTRL, value);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

492

uint32_t value;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

494

REG_GET(DIG_BE_EN_CNTL, DIG_ENABLE, &value);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

495

return value;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

790

uint32_t value)

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

797

if ((value & STATIC_SCREEN_EVENT_MASK_RANGETIMING_DOUBLE_BUFFER_UPDATE_EN)

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

799

value = value &

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

803

OTG_STATIC_SCREEN_EVENT_MASK, value,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.h

536

uint32_t value);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1175

uint32_t value = dm_read_reg_soc15(ctx, mmCC_DC_PIPE_DIS, 0);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1177

value = value & 0xf;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1178

return value;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1341

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1354

value = REG_READ(DP_SEC_CNTL);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1355

if (value != 0)

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

697

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

732

value = REG_READ(DP_SEC_CNTL);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

733

if (value)

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

742

uint32_t value = 0;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

759

value = REG_READ(DP_SEC_CNTL);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

760

if (value)

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

885

unsigned int value = enable ? 1 : 0;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

887

REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value);

sys/dev/drm/amd/display/dc/dm_services.h

107

uint32_t value)

sys/dev/drm/amd/display/dc/dm_services.h

109

cgs_write_ind_register(ctx->cgs_device, addr_space, index, value);

sys/dev/drm/amd/display/dc/dm_services.h

128

uint32_t value,

sys/dev/drm/amd/display/dc/dm_services.h

133

return (reg_value & ~mask) | (mask & (value << shift));

sys/dev/drm/amd/display/dc/dm_services.h

136

#define set_reg_field_value(reg_value, value, reg_name, reg_field)\

sys/dev/drm/amd/display/dc/dm_services.h

139

(value),\

sys/dev/drm/amd/display/dc/dm_services.h

163

#define dm_write_reg_soc15(ctx, reg, inst_offset, value) \

sys/dev/drm/amd/display/dc/dm_services.h

164

dm_write_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, value, __func__)

sys/dev/drm/amd/display/dc/dm_services.h

184

#define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\

sys/dev/drm/amd/display/dc/dm_services.h

187

(value),\

sys/dev/drm/amd/display/dc/dm_services.h

65

uint32_t value;

sys/dev/drm/amd/display/dc/dm_services.h

72

value = cgs_read_register(ctx->cgs_device, address);

sys/dev/drm/amd/display/dc/dm_services.h

74

return value;

sys/dev/drm/amd/display/dc/dm_services.h

77

#define dm_write_reg(ctx, address, value) \

sys/dev/drm/amd/display/dc/dm_services.h

78

dm_write_reg_func(ctx, address, value, __func__)

sys/dev/drm/amd/display/dc/dm_services.h

83

uint32_t value,

sys/dev/drm/amd/display/dc/dm_services.h

92

cgs_write_register(ctx->cgs_device, address, value);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

76

uint32_t *value)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

83

return gpio->pin->funcs->get_value(gpio->pin, value);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

88

uint32_t value)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

95

return gpio->pin->funcs->set_value(gpio->pin, value);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

107

REG_UPDATE(A_reg, A, value);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

114

REG_UPDATE(EN_reg, EN, ~value);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

75

uint32_t *value)

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

86

REG_GET(Y_reg, Y, value);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

97

uint32_t value)

sys/dev/drm/amd/display/dc/gpio/hw_gpio.h

124

uint32_t *value);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.h

135

uint32_t value);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.h

56

uint32_t *value);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.h

59

uint32_t value);

sys/dev/drm/amd/display/dc/gpio/hw_hpd.c

80

uint32_t *value)

sys/dev/drm/amd/display/dc/gpio/hw_hpd.c

92

*value = hpd_delayed;

sys/dev/drm/amd/display/dc/gpio/hw_hpd.c

98

return dal_hw_gpio_get_value(ptr, value);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

104

uint32_t value = REG_READ(AUX_ARB_CONTROL);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

106

value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

117

uint32_t value = REG_READ(AUX_ARB_CONTROL);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

119

value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

125

value = REG_READ(AUX_CONTROL);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

126

field = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

132

value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

140

value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

146

REG_WRITE(AUX_CONTROL, value);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

155

value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

160

REG_WRITE(AUX_CONTROL, value);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

170

value = REG_READ(AUX_ARB_CONTROL);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

172

value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

193

uint32_t value;

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

240

value = REG_UPDATE_4(AUX_SW_DATA,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

246

value = REG_SET_2(AUX_SW_DATA, value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

250

value = REG_SET(AUX_SW_DATA, value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

254

value = REG_SET(AUX_SW_DATA, value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

266

value = REG_SET(AUX_SW_DATA, value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

395

uint32_t value;

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

405

value = REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

409

if ((value & AUX_SW_STATUS__AUX_SW_HPD_DISCON_MASK))

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

419

if (value & AUX_SW_STATUS__AUX_SW_DONE_MASK) {

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

420

if ((value & AUX_SW_STATUS__AUX_SW_RX_TIMEOUT_STATE_MASK) ||

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

421

(value & AUX_SW_STATUS__AUX_SW_RX_TIMEOUT_MASK))

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

424

else if ((value & AUX_SW_STATUS__AUX_SW_RX_INVALID_STOP_MASK) ||

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

425

(value & AUX_SW_STATUS__AUX_SW_RX_RECV_NO_DET_MASK) ||

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

426

(value &

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

428

(value & AUX_SW_STATUS__AUX_SW_RX_RECV_INVALID_L_MASK))

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

431

*returned_bytes = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

274

uint32_t value = 0;

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

310

value = REG_SET_4(DC_I2C_DATA, 0,

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

317

value = REG_SET_2(DC_I2C_DATA, 0,

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

325

REG_SET_2(DC_I2C_DATA, value,

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

420

uint32_t value =

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

425

else if (value & hw_engine->i2c_mask->DC_I2C_SW_STOPPED_ON_NACK)

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

427

else if (value & hw_engine->i2c_mask->DC_I2C_SW_TIMEOUT)

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

429

else if (value & hw_engine->i2c_mask->DC_I2C_SW_ABORTED)

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

431

else if (value & hw_engine->i2c_mask->DC_I2C_SW_DONE)

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

104

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

107

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

112

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

122

uint32_t value = 0;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

132

value = dm_read_reg(engine->ctx, mmDC_I2C_ARBITRATION);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

135

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

140

dm_write_reg(engine->ctx, mmDC_I2C_ARBITRATION, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

147

value = dm_read_reg(engine->ctx, mmDC_I2C_SW_STATUS);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

150

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

157

value = dm_read_reg(engine->ctx, mmDC_I2C_CONTROL);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

161

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

167

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

172

dm_write_reg(engine->ctx, mmDC_I2C_CONTROL, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

201

uint32_t value = 0;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

208

value = dm_read_reg(i2c_engine->base.ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

211

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

217

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

223

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

229

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

235

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

241

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

246

dm_write_reg(i2c_engine->base.ctx, addr, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

253

value = dm_read_reg(i2c_engine->base.ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

256

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

262

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

267

dm_write_reg(i2c_engine->base.ctx, addr, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

275

value = dm_read_reg(i2c_engine->base.ctx,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

279

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

285

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

291

mmDC_I2C_ARBITRATION, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

306

uint32_t value = dm_read_reg(i2c_engine->base.ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

309

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

330

uint32_t value = dm_read_reg(i2c_engine->base.ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

333

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

339

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

344

dm_write_reg(i2c_engine->base.ctx, addr, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

350

uint32_t value = dm_read_reg(engine->ctx, mmDC_I2C_CONTROL);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

353

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

359

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

364

dm_write_reg(engine->ctx, mmDC_I2C_CONTROL, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

371

uint32_t value = dm_read_reg(engine->ctx, mmDC_I2C_SW_STATUS);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

374

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

383

value = dm_read_reg(engine->ctx, mmDC_I2C_SW_STATUS);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

386

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

412

uint32_t value = 0;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

422

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

425

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

431

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

441

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

449

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

455

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

462

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

467

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

478

value = 0;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

481

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

487

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

494

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

501

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

507

dm_write_reg(ctx, mmDC_I2C_DATA, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

512

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

520

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

525

dm_write_reg(ctx, mmDC_I2C_DATA, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

540

uint32_t value = 0;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

548

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

551

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

557

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

563

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

569

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

575

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

580

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

586

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

589

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

595

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

601

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

607

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

613

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

618

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

625

value = dm_read_reg(ctx, addr);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

628

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

633

dm_write_reg(ctx, addr, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

666

uint32_t value = 0;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

670

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

676

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

682

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

687

dm_write_reg(engine->base.ctx, mmDC_I2C_DATA, value);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

695

value = dm_read_reg(engine->base.ctx, mmDC_I2C_DATA);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

698

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

711

uint32_t value = dm_read_reg(engine->base.ctx, mmDC_I2C_SW_STATUS);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

714

value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

720

else if (value & DC_I2C_SW_STATUS__DC_I2C_SW_STOPPED_ON_NACK_MASK)

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

722

else if (value & DC_I2C_SW_STATUS__DC_I2C_SW_TIMEOUT_MASK)

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

724

else if (value & DC_I2C_SW_STATUS__DC_I2C_SW_ABORTED_MASK)

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

726

else if (value & DC_I2C_SW_STATUS__DC_I2C_SW_DONE_MASK)

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

98

uint32_t value = 0;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

56

uint32_t value = 0;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

59

dal_gpio_get_value(ddc->pin_data, &value);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

61

dal_gpio_get_value(ddc->pin_clock, &value);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

63

return (value != 0);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

71

uint32_t value = bit ? 1 : 0;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

74

dal_gpio_set_value(ddc->pin_data, value);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

76

dal_gpio_set_value(ddc->pin_clock, value);

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

106

res.value = arg1.value + arg2.value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

115

res.value = arg1.value - arg2.value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

123

return bw_frc_to_fixed(arg1.value, arg2.value);

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

130

div64_u64_rem(arg1.value, arg2.value, (u64 *)&res.value);

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

139

return arg1.value == arg2.value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

144

return arg1.value != arg2.value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

149

return arg1.value <= arg2.value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

154

return arg1.value >= arg2.value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

159

return arg1.value < arg2.value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

164

return arg1.value > arg2.value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

33

int64_t value;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

45

return (arg1.value <= arg2.value) ? arg1 : arg2;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

51

return (arg2.value <= arg1.value) ? arg1 : arg2;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

68

struct bw_fixed bw_int_to_fixed_nonconst(int64_t value);

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

69

static inline struct bw_fixed bw_int_to_fixed(int64_t value)

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

71

if (__builtin_constant_p(value)) {

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

73

BUILD_BUG_ON(value > BW_FIXED_MAX_I32 || value < BW_FIXED_MIN_I32);

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

74

res.value = value << BW_FIXED_BITS_PER_FRACTIONAL_PART;

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

77

return bw_int_to_fixed_nonconst(value);

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

80

static inline int32_t bw_fixed_to_int(struct bw_fixed value)

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

82

return BW_FIXED_GET_INTEGER_PART(value.value);

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

93

result.value = -(raw >> (32 - BW_FIXED_BITS_PER_FRACTIONAL_PART));

sys/dev/drm/amd/display/dc/inc/bw_fixed.h

95

result.value = raw >> (32 - BW_FIXED_BITS_PER_FRACTIONAL_PART);

sys/dev/drm/amd/display/dc/inc/custom_float.h

35

struct fixed31_32 value,

sys/dev/drm/amd/display/dc/inc/hw/opp.h

138

uint32_t value;

sys/dev/drm/amd/display/dc/inc/hw/timing_generator.h

192

uint32_t value);

sys/dev/drm/amd/display/dc/inc/reg_helper.h

42

#define REG_WRITE(reg_name, value) \

sys/dev/drm/amd/display/dc/inc/reg_helper.h

43

dm_write_reg(CTX, REG(reg_name), value)

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

46

uint32_t value = dm_read_reg(irq_service->ctx, addr);

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

47

uint32_t current_status = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

53

value = dm_read_reg(irq_service->ctx, info->enable_reg);

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

55

set_reg_field_value(value, current_status ? 0 : 1,

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

59

dm_write_reg(irq_service->ctx, info->enable_reg, value);

sys/dev/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

45

uint32_t value = dm_read_reg(irq_service->ctx, addr);

sys/dev/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

48

value,

sys/dev/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

54

value = dm_read_reg(irq_service->ctx, info->enable_reg);

sys/dev/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

57

value,

sys/dev/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

62

dm_write_reg(irq_service->ctx, info->enable_reg, value);

sys/dev/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

45

uint32_t value = dm_read_reg(irq_service->ctx, addr);

sys/dev/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

48

value,

sys/dev/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

54

value = dm_read_reg(irq_service->ctx, info->enable_reg);

sys/dev/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

57

value,

sys/dev/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

62

dm_write_reg(irq_service->ctx, info->enable_reg, value);

sys/dev/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

115

uint32_t value = dm_read_reg(irq_service->ctx, addr);

sys/dev/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

118

value,

sys/dev/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

124

value = dm_read_reg(irq_service->ctx, info->enable_reg);

sys/dev/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

127

value,

sys/dev/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

132

dm_write_reg(irq_service->ctx, info->enable_reg, value);

sys/dev/drm/amd/display/dc/irq/irq_service.c

131

uint32_t value = dm_read_reg(irq_service->ctx, addr);

sys/dev/drm/amd/display/dc/irq/irq_service.c

133

value = (value & ~info->ack_mask) |

sys/dev/drm/amd/display/dc/irq/irq_service.c

135

dm_write_reg(irq_service->ctx, addr, value);

sys/dev/drm/amd/display/dc/irq/irq_service.c

94

uint32_t value = dm_read_reg(irq_service->ctx, addr);

sys/dev/drm/amd/display/dc/irq/irq_service.c

96

value = (value & ~info->enable_mask) |

sys/dev/drm/amd/display/dc/irq/irq_service.c

98

dm_write_reg(irq_service->ctx, addr, value);

sys/dev/drm/amd/display/include/fixed31_32.h

115

res.value = -arg.value;

sys/dev/drm/amd/display/include/fixed31_32.h

126

if (arg.value < 0)

sys/dev/drm/amd/display/include/fixed31_32.h

143

return arg1.value < arg2.value;

sys/dev/drm/amd/display/include/fixed31_32.h

152

return arg1.value <= arg2.value;

sys/dev/drm/amd/display/include/fixed31_32.h

161

return arg1.value == arg2.value;

sys/dev/drm/amd/display/include/fixed31_32.h

170

if (arg1.value <= arg2.value)

sys/dev/drm/amd/display/include/fixed31_32.h

182

if (arg1.value <= arg2.value)

sys/dev/drm/amd/display/include/fixed31_32.h

218

ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) ||

sys/dev/drm/amd/display/include/fixed31_32.h

219

((arg.value < 0) && (arg.value >= ~(LLONG_MAX >> shift))));

sys/dev/drm/amd/display/include/fixed31_32.h

221

arg.value = arg.value << shift;

sys/dev/drm/amd/display/include/fixed31_32.h

232

bool negative = arg.value < 0;

sys/dev/drm/amd/display/include/fixed31_32.h

235

arg.value = -arg.value;

sys/dev/drm/amd/display/include/fixed31_32.h

236

arg.value = arg.value >> shift;

sys/dev/drm/amd/display/include/fixed31_32.h

238

arg.value = -arg.value;

sys/dev/drm/amd/display/include/fixed31_32.h

255

ASSERT(((arg1.value >= 0) && (LLONG_MAX - arg1.value >= arg2.value)) ||

sys/dev/drm/amd/display/include/fixed31_32.h

256

((arg1.value < 0) && (LLONG_MIN - arg1.value <= arg2.value)));

sys/dev/drm/amd/display/include/fixed31_32.h

258

res.value = arg1.value + arg2.value;

sys/dev/drm/amd/display/include/fixed31_32.h

280

ASSERT(((arg2.value >= 0) && (LLONG_MIN + arg2.value <= arg1.value)) ||

sys/dev/drm/amd/display/include/fixed31_32.h

281

((arg2.value < 0) && (LLONG_MAX + arg2.value >= arg1.value)));

sys/dev/drm/amd/display/include/fixed31_32.h

283

res.value = arg1.value - arg2.value;

sys/dev/drm/amd/display/include/fixed31_32.h

331

return dc_fixpt_from_fraction(arg1.value, dc_fixpt_from_int(arg2).value);

sys/dev/drm/amd/display/include/fixed31_32.h

340

return dc_fixpt_from_fraction(arg1.value, arg2.value);

sys/dev/drm/amd/display/include/fixed31_32.h

451

unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;

sys/dev/drm/amd/display/include/fixed31_32.h

453

if (arg.value >= 0)

sys/dev/drm/amd/display/include/fixed31_32.h

465

unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;

sys/dev/drm/amd/display/include/fixed31_32.h

467

const long long summand = dc_fixpt_half.value;

sys/dev/drm/amd/display/include/fixed31_32.h

473

if (arg.value >= 0)

sys/dev/drm/amd/display/include/fixed31_32.h

485

unsigned long long arg_value = arg.value > 0 ? arg.value : -arg.value;

sys/dev/drm/amd/display/include/fixed31_32.h

487

const long long summand = dc_fixpt_one.value -

sys/dev/drm/amd/display/include/fixed31_32.h

488

dc_fixpt_epsilon.value;

sys/dev/drm/amd/display/include/fixed31_32.h

494

if (arg.value >= 0)

sys/dev/drm/amd/display/include/fixed31_32.h

520

bool negative = arg.value < 0;

sys/dev/drm/amd/display/include/fixed31_32.h

528

arg.value = -arg.value;

sys/dev/drm/amd/display/include/fixed31_32.h

529

arg.value &= (~0LL) << (FIXED31_32_BITS_PER_FRACTIONAL_PART - frac_bits);

sys/dev/drm/amd/display/include/fixed31_32.h

531

arg.value = -arg.value;

sys/dev/drm/amd/display/include/fixed31_32.h

58

long long value;

sys/dev/drm/amd/display/include/fixed31_32.h

97

res.value = (long long) arg << FIXED31_32_BITS_PER_FRACTIONAL_PART;

sys/dev/drm/amd/display/include/gpio_interface.h

46

uint32_t *value);

sys/dev/drm/amd/display/include/gpio_interface.h

51

uint32_t value);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1081

struct fixed31_32 value = dc_fixpt_from_fraction(i,

sys/dev/drm/amd/display/modules/color/color_gamma.c

1084

p->r = value;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1085

p->g = value;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1086

p->b = value;

sys/dev/drm/amd/include/cgs_common.h

100

uint32_t value);

sys/dev/drm/amd/include/cgs_common.h

119

unsigned index, uint32_t value);

sys/dev/drm/amd/include/cgs_common.h

128

#define CGS_REG_GET_FIELD(value, reg, field) \

sys/dev/drm/amd/include/cgs_common.h

129

(((value) & CGS_REG_FIELD_MASK(reg, field)) >> CGS_REG_FIELD_SHIFT(reg, field))

sys/dev/drm/amd/include/cgs_common.h

168

#define cgs_write_register(dev,offset,value) \

sys/dev/drm/amd/include/cgs_common.h

169

CGS_CALL(write_register,dev,offset,value)

sys/dev/drm/amd/include/cgs_common.h

172

#define cgs_write_ind_register(dev,space,index,value) \

sys/dev/drm/amd/include/cgs_common.h

173

CGS_CALL(write_ind_register,dev,space,index,value)

sys/dev/drm/amd/include/kgd_pp_interface.h

226

int (*set_sclk_od)(void *handle, uint32_t value);

sys/dev/drm/amd/include/kgd_pp_interface.h

228

int (*set_mclk_od)(void *handle, uint32_t value);

sys/dev/drm/amd/include/kgd_pp_interface.h

229

int (*read_sensor)(void *handle, int idx, void *value, int *size);

sys/dev/drm/amd/include/linux/chash.h

216

#define chash_table_copy_in(tbl, key, value) \

sys/dev/drm/amd/include/linux/chash.h

217

__chash_table_copy_in(&(*tbl).table, key, value)

sys/dev/drm/amd/include/linux/chash.h

220

const void *value);

sys/dev/drm/amd/include/linux/chash.h

232

#define chash_table_copy_out(tbl, key, value) \

sys/dev/drm/amd/include/linux/chash.h

233

__chash_table_copy_out(&(*tbl).table, key, value, false)

sys/dev/drm/amd/include/linux/chash.h

236

void *value, bool remove);

sys/dev/drm/amd/include/linux/chash.h

249

#define chash_table_remove(tbl, key, value) \

sys/dev/drm/amd/include/linux/chash.h

250

__chash_table_copy_out(&(*tbl).table, key, value, true)

sys/dev/drm/amd/lib/chash.c

395

const void *value)

sys/dev/drm/amd/lib/chash.c

404

if (value && table->value_size)

sys/dev/drm/amd/lib/chash.c

405

memcpy(chash_iter_value(iter), value,

sys/dev/drm/amd/lib/chash.c

422

if (value && table->value_size)

sys/dev/drm/amd/lib/chash.c

423

memcpy(chash_iter_value(iter), value, table->value_size);

sys/dev/drm/amd/lib/chash.c

430

void *value, bool remove)

sys/dev/drm/amd/lib/chash.c

440

if (value && table->value_size)

sys/dev/drm/amd/lib/chash.c

441

memcpy(value, chash_iter_value(iter), table->value_size);

sys/dev/drm/amd/lib/chash.c

470

u64 value;

sys/dev/drm/amd/lib/chash.c

499

&value);

sys/dev/drm/amd/lib/chash.c

505

if (value != ~find_count) {

sys/dev/drm/amd/lib/chash.c

507

find_count, ~find_count, value);

sys/dev/drm/amd/lib/chash.c

515

&value);

sys/dev/drm/amd/lib/chash.c

536

value = ~add_count;

sys/dev/drm/amd/lib/chash.c

537

ret = chash_table_copy_in(&table, add_count, &value);

sys/dev/drm/amd/powerplay/amd_powerplay.c

775

static int pp_dpm_set_sclk_od(void *handle, uint32_t value)

sys/dev/drm/amd/powerplay/amd_powerplay.c

789

ret = hwmgr->hwmgr_func->set_sclk_od(hwmgr, value);

sys/dev/drm/amd/powerplay/amd_powerplay.c

812

static int pp_dpm_set_mclk_od(void *handle, uint32_t value)

sys/dev/drm/amd/powerplay/amd_powerplay.c

825

ret = hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);

sys/dev/drm/amd/powerplay/amd_powerplay.c

831

void *value, int *size)

sys/dev/drm/amd/powerplay/amd_powerplay.c

836

if (!hwmgr || !hwmgr->pm_en || !value)

sys/dev/drm/amd/powerplay/amd_powerplay.c

841

*((uint32_t *)value) = hwmgr->pstate_sclk;

sys/dev/drm/amd/powerplay/amd_powerplay.c

844

*((uint32_t *)value) = hwmgr->pstate_mclk;

sys/dev/drm/amd/powerplay/amd_powerplay.c

847

*((uint32_t *)value) = hwmgr->thermal_controller.fanInfo.ulMinRPM;

sys/dev/drm/amd/powerplay/amd_powerplay.c

850

*((uint32_t *)value) = hwmgr->thermal_controller.fanInfo.ulMaxRPM;

sys/dev/drm/amd/powerplay/amd_powerplay.c

854

ret = hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

554

voltage_table->entries[i].value =

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

201

uint16_t value;

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

127

voltage_table->entries[i].value =

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.h

39

uint16_t value;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

149

static fInt fNaturalLog(fInt value)

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

160

while (GreaterThan(fAdd(value, fNegativeOne), upper_bound)) {

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

162

if (GreaterThan(value, GetScaledFraction(k_array[i], 10000))) {

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

163

value = fDivide(value, GetScaledFraction(k_array[i], 10000));

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

169

error_term = fAdd(fNegativeOne, value);

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

74

static fInt fNaturalLog(fInt value); /* Can be used to calculate ln(value) */

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

1101

void *value, int *size)

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

1111

*((uint32_t *)value) = sclk * 100;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

1118

*((uint32_t *)value) = mclk * 100;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

1122

*((uint32_t *)value) = smu10_thermal_get_temperature(hwmgr);

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

168

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

181

value = CG_GFX_CGCG_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

184

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

191

value = CG_GFX_CGLS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

194

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

204

value = CG_GFX_3DCG_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

207

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

215

value = CG_GFX_3DLS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

218

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

228

value = CG_GFX_RLC_LS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

231

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

241

value = CG_GFX_CP_LS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

244

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

254

value = (CG_CPF_MGCG_MASK | CG_RLC_MGCG_MASK |

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

258

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

275

value = CG_SYS_BIF_MGCG_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

278

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

285

value = CG_SYS_BIF_MGLS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

288

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

298

value = CG_SYS_MC_MGCG_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

301

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

309

value = CG_SYS_MC_MGLS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

312

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

322

value = CG_SYS_DRM_MGCG_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

325

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

332

value = CG_SYS_DRM_MGLS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

335

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

345

value = CG_SYS_HDP_MGCG_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

348

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

356

value = CG_SYS_HDP_MGLS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

359

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

369

value = CG_SYS_SDMA_MGCG_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

372

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

380

value = CG_SYS_SDMA_MGLS_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

383

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

393

value = CG_SYS_ROM_MASK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

396

hwmgr, msg, value))

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

233

voltage_table->entries[i].value =

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

2740

percentage = 100 * golden_dpm_table->sclk_table.dpm_levels[golden_dpm_table->sclk_table.count - 1].value /

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

2741

golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

2745

tmp_mclk = golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

2748

tmp_mclk = golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 2].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3509

void *value, int *size)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3523

*((uint32_t *)value) = sclk;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3529

*((uint32_t *)value) = mclk;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3540

*((uint32_t *)value) = activity_percent > 100 ? 100 : activity_percent;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3544

*((uint32_t *)value) = smu7_thermal_get_temperature(hwmgr);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3548

*((uint32_t *)value) = data->uvd_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3552

*((uint32_t *)value) = data->vce_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3556

return smu7_get_gpu_power(hwmgr, (uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3565

*((uint32_t *)value) = (uint32_t)convert_to_vddc(val_vid);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3589

if (sclk == sclk_table->dpm_levels[i].value)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3594

if (sclk > sclk_table->dpm_levels[i-1].value) {

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3596

sclk_table->dpm_levels[i-1].value = sclk;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3609

if (mclk == mclk_table->dpm_levels[i].value)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3614

if (mclk > mclk_table->dpm_levels[i-1].value) {

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3616

mclk_table->dpm_levels[i-1].value = mclk;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3641

if (dpm_table->sclk_table.dpm_levels[i].value == max_sclk)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3644

[dpm_table->pcie_speed_table.count - 1].value :

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3645

dpm_table->pcie_speed_table.dpm_levels[i].value);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3749

dpm_table->sclk_table.dpm_levels[count].value = odn_sclk_table->entries[count].clock;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3756

dpm_table->mclk_table.dpm_levels[count].value = odn_mclk_table->entries[count].clock;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3788

if (!hwmgr->od_enabled && (dpm_table->dpm_levels[i].value < low_limit

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3789

|| dpm_table->dpm_levels[i].value > high_limit))

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4422

if (clock > sclk_table->dpm_levels[i].value)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4430

i, sclk_table->dpm_levels[i].value / 100,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4438

if (clock > mclk_table->dpm_levels[i].value)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4446

i, mclk_table->dpm_levels[i].value / 100,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4452

if (pcie_speed != pcie_table->dpm_levels[i].value)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4460

(pcie_table->dpm_levels[i].value == 0) ? "2.5GT/s, x8" :

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4461

(pcie_table->dpm_levels[i].value == 1) ? "5.0GT/s, x16" :

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4462

(pcie_table->dpm_levels[i].value == 2) ? "8.0GT/s, x16" : "",

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4487

data->golden_dpm_table.sclk_table.dpm_levels[0].value/100,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4490

data->golden_dpm_table.mclk_table.dpm_levels[0].value/100,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4534

int value = sclk_table->dpm_levels[sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4536

[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4538

value -= golden_value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4539

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4541

return value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4544

static int smu7_set_sclk_od(struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4552

if (value > 20)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4553

value = 20;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4563

golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value *

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4564

value / 100 +

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4565

golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4576

int value = mclk_table->dpm_levels[mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4578

[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4580

value -= golden_value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4581

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4583

return value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4586

static int smu7_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4594

if (value > 20)

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4595

value = 20;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4605

golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value *

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4606

value / 100 +

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4607

golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4746

mclk_table->dpm_levels[mclk_table->count-1].value :

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4747

mclk_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4749

sclk_table->dpm_levels[sclk_table->count-1].value :

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4750

sclk_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4788

if (data->golden_dpm_table.sclk_table.dpm_levels[0].value > clk ||

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4791

data->golden_dpm_table.sclk_table.dpm_levels[0].value/100,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4796

if (data->golden_dpm_table.mclk_table.dpm_levels[0].value > clk ||

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4799

data->golden_dpm_table.mclk_table.dpm_levels[0].value/100,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

692

if (i == 0 || data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count-1].value !=

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

694

data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value =

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

706

if (i == 0 || data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count-1].value !=

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

708

data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value =

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

717

data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

729

data->dpm_table.vddci_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

743

data->dpm_table.mvdd_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

785

if (i == 0 || data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count - 1].value !=

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

788

data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value =

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

802

[data->dpm_table.mclk_table.count - 1].value !=

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

804

data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value =

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

839

entries[i].clock = data->golden_dpm_table.sclk_table.dpm_levels[i].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

851

entries[i].clock = data->golden_dpm_table.mclk_table.dpm_levels[i].value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

906

data->dpm_table.sclk_table.dpm_levels[i].value) {

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

914

data->dpm_table.mclk_table.dpm_levels[i].value) {

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.h

50

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.h

90

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

906

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

927

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

960

uint32_t count, value, value2;

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

972

value = 0;

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

975

value = SYS_GRBM_GFX_INDEX_DATA__INSTANCE_BROADCAST_WRITES_MASK

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

978

cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1675

void *value, int *size)

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1708

*((uint32_t *)value) = sclk;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1716

*((uint32_t *)value) = vddnb;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1722

*((uint32_t *)value) = vddgfx;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1730

*((uint32_t *)value) = vclk;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1734

*((uint32_t *)value) = 0;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1742

*((uint32_t *)value) = dclk;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1746

*((uint32_t *)value) = 0;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1754

*((uint32_t *)value) = ecclk;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1758

*((uint32_t *)value) = 0;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1768

*((uint32_t *)value) = activity_percent;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1771

*((uint32_t *)value) = data->uvd_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1774

*((uint32_t *)value) = data->vce_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1777

*((uint32_t *)value) = smu8_thermal_get_temperature(hwmgr);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

107

uint32_t value, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

119

if ((cur_value & mask) == (value & mask))

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

139

uint32_t value,

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

148

return phm_wait_on_register(hwmgr, indirect_port + 1, mask, value);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

153

uint32_t value, uint32_t mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

164

if ((cur_value & mask) != (value & mask))

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

178

uint32_t value,

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

186

value, mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

220

vvalue = vol_table->entries[i].value;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

224

if (vvalue == table->entries[j].value) {

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

231

table->entries[table->count].value = vvalue;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

261

vol_table->entries[i].value = dep_table->entries[i].mvdd;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

289

vol_table->entries[i].value = dep_table->entries[i].vddci;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

317

vol_table->entries[i].value = lookup_table->entries[i].us_vdd;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

363

dpm_table->dpm_level[index].value = pcie_gen;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

418

if (voltage_table->entries[i].value >= voltage)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

431

if (vddci_table->entries[i].value >= vddci)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

432

return vddci_table->entries[i].value;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

436

return vddci_table->entries[i-1].value;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

440

uint32_t value, uint32_t *boot_level)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

447

if (value == dpm_table->dpm_level[i].value) {

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

100

uint32_t value, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

105

uint32_t value,

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

131

#define PHM_GET_FIELD(value, reg, field) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

132

(((value) & PHM_FIELD_MASK(reg, field)) >> \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

163

#define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

164

phm_wait_on_indirect_register(hwmgr, mm##port##_INDEX, index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

167

#define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

168

PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

174

#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

176

mm##port##_INDEX, index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

178

#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

179

PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

188

port, index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

190

mm##port##_INDEX_11, index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

192

#define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

193

PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

202

port, index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

204

mm##port##_INDEX_11, index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

206

#define PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

207

PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

215

index, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

217

index, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

219

#define PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, value, mask) \

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

221

mm##reg, value, mask)

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

64

uint32_t value, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

68

uint32_t value, uint32_t mask);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.h

87

extern int phm_find_boot_level(void *table, uint32_t value, uint32_t *boot_level);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1002

vvalue = vol_table->entries[i].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1006

if (vvalue == table->entries[j].value) {

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1013

table->entries[table->count].value = vvalue;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1041

vol_table->entries[i].value = dep_table->entries[i].mvdd;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1068

vol_table->entries[i].value = dep_table->entries[i].vddci;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1094

vol_table->entries[i].value = dep_table->entries[i].vddc;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1209

if (i == 0 || dpm_table->dpm_levels[dpm_table->count - 1].value <=

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1211

dpm_table->dpm_levels[dpm_table->count].value =

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1327

dpm_table->dpm_levels[dpm_table->count-1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1338

dpm_table->dpm_levels[dpm_table->count-1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1345

[dpm_table->count - 1].value <=

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1347

dpm_table->dpm_levels[dpm_table->count].value =

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1361

[dpm_table->count - 1].value <=

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1363

dpm_table->dpm_levels[dpm_table->count].value =

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1375

[dpm_table->count - 1].value <=

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1377

dpm_table->dpm_levels[dpm_table->count].value =

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1640

dpm_table->dpm_levels[i].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1650

dpm_table->dpm_levels[j].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1664

dpm_table->dpm_levels[i].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1674

dpm_table->dpm_levels[j].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1789

dpm_table->dpm_levels[i].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1800

dpm_table->dpm_levels[j].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1926

dpm_table->dpm_levels[i].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1936

dpm_table->dpm_levels[j].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1996

vclk_dpm_table->dpm_levels[i].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2005

vclk_dpm_table->dpm_levels[j].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2014

dclk_dpm_table->dpm_levels[i].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2023

dclk_dpm_table->dpm_levels[j].value,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2032

vclk_dpm_table->dpm_levels[i].value &&

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2034

dclk_dpm_table->dpm_levels[i].value)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3267

if (sclk == sclk_table->dpm_levels[i].value)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3272

if (sclk > sclk_table->dpm_levels[i-1].value) {

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3274

sclk_table->dpm_levels[i-1].value = sclk;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3279

if (mclk == mclk_table->dpm_levels[i].value)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3284

if (mclk > mclk_table->dpm_levels[i-1].value) {

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3286

mclk_table->dpm_levels[i-1].value = mclk;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3311

dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3317

dpm_table->mem_table.dpm_levels[count].value = odn_clk_table->entries[count].clk;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3348

if ((dpm_table->dpm_levels[i].value < low_limit) ||

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3349

(dpm_table->dpm_levels[i].value > high_limit))

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3365

if ((dpm_table->dpm_levels[i].value < low_limit) ||

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3366

(dpm_table->dpm_levels[i].value > high_limit))

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3687

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3693

value = smum_get_argument(hwmgr);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3696

*query = value << 8;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3702

void *value, int *size)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3715

*((uint32_t *)value) = sclk_mhz * 100;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3721

*((uint32_t *)value) = dpm_table->mem_table.dpm_levels[mclk_idx].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3730

*((uint32_t *)value) = activity_percent > 100 ? 100 : activity_percent;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3734

*((uint32_t *)value) = vega10_thermal_get_temperature(hwmgr);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3738

*((uint32_t *)value) = data->uvd_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3742

*((uint32_t *)value) = data->vce_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3746

ret = vega10_get_gpu_power(hwmgr, (uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3752

*((uint32_t *)value) = (uint32_t)convert_to_vddc((uint8_t)val_vid);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3755

ret = vega10_get_enabled_smc_features(hwmgr, (uint64_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3861

if (dpm_table->dpm_levels[i].value == min_clocks.dcefClock)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3867

clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value * 10;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4296

i, sclk_table->dpm_levels[i].value / 100,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4308

i, mclk_table->dpm_levels[i].value / 100,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4346

data->golden_dpm_table.gfx_table.dpm_levels[0].value/100,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4349

data->golden_dpm_table.mem_table.dpm_levels[0].value/100,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4535

int value = sclk_table->dpm_levels[sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4537

[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4539

value -= golden_value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4540

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4542

return value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4545

static int vega10_set_sclk_od(struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4563

[golden_sclk_table->count - 1].value *

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4564

value / 100 +

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4566

[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4586

int value = mclk_table->dpm_levels[mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4588

[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4590

value -= golden_value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4591

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4593

return value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4596

static int vega10_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4614

[golden_mclk_table->count - 1].value *

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4615

value / 100 +

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4617

[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4761

if (golden_table->dpm_levels[0].value > clk ||

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4764

golden_table->dpm_levels[0].value/100,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4770

if (golden_table->dpm_levels[0].value > clk ||

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4773

golden_table->dpm_levels[0].value/100,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4826

dpm_table->dpm_levels[i].value = podn_vdd_dep_on_socclk->entries[i].clk;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4833

dpm_table->dpm_levels[podn_vdd_dep_on_socclk->count - 1].value = podn_vdd_dep->entries[dep_table->count-1].clk;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4893

dpm_table->dpm_levels[input_level].value = input_clk;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.h

117

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

814

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

820

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

826

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

846

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.h

49

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.h

57

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1211

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1218

value = smum_get_argument(hwmgr);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1220

*query = value << 8;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1285

void *value, int *size)

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1292

ret = vega12_get_current_gfx_clk_freq(hwmgr, (uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1297

ret = vega12_get_current_mclk_freq(hwmgr, (uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1302

ret = vega12_get_current_activity_percent(hwmgr, (uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1307

*((uint32_t *)value) = vega12_thermal_get_temperature(hwmgr);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1311

*((uint32_t *)value) = data->uvd_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1315

*((uint32_t *)value) = data->vce_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1319

ret = vega12_get_gpu_power(hwmgr, (uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1322

ret = vega12_get_enabled_smc_features(hwmgr, (uint64_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1438

data->dpm_table.gfx_table.dpm_levels[soft_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1444

data->dpm_table.mem_table.dpm_levels[soft_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1467

data->dpm_table.gfx_table.dpm_levels[soft_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1473

data->dpm_table.mem_table.dpm_levels[soft_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1645

dpm_table->dpm_levels[i].value * 1000;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1676

clocks->data[i].clocks_in_khz = dpm_table->dpm_levels[i].value * 1000;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1677

data->mclk_latency_table.entries[i].frequency = dpm_table->dpm_levels[i].value * 100;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1680

vega12_get_mem_latency(hwmgr, dpm_table->dpm_levels[i].value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1706

dpm_table->dpm_levels[i].value * 1000;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1734

dpm_table->dpm_levels[i].value * 1000;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1811

data->dpm_table.gfx_table.dpm_levels[soft_min_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1813

data->dpm_table.gfx_table.dpm_levels[soft_max_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1831

data->dpm_table.mem_table.dpm_levels[soft_min_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1833

data->dpm_table.mem_table.dpm_levels[soft_max_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1920

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1921

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1922

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1923

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1927

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_GFXCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1928

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_GFXCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1932

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1933

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1937

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1938

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1944

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1945

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1946

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1947

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1951

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_MCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1952

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_MCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1956

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1957

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1961

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1962

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1972

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1975

if (dpm_table->dpm_levels[i].value >= (hwmgr->display_config->min_mem_set_clock / 100)) {

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1976

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[i].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1984

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1988

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1989

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1990

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1991

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1995

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_UVDCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1996

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_UVDCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2000

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2001

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2007

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2008

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2009

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2010

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2014

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_UVDCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2015

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_UVDCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2019

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2020

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2026

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2027

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2028

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2029

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2033

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_SOCCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2034

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_SOCCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2038

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2039

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2045

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2046

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2047

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2048

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2052

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_VCEMCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2053

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA12_UMD_PSTATE_VCEMCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2057

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2058

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2079

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2220

dpm_table->gfx_table.dpm_levels[i].value >= min_sclk) {

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2228

dpm_table->mem_table.dpm_levels[i].value >= min_mclk) {

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2249

int value = sclk_table->dpm_levels[sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2251

[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2253

value -= golden_value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2254

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2256

return value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2259

static int vega12_set_sclk_od(struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2270

int value = mclk_table->dpm_levels[mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2272

[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2274

value -= golden_value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2275

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2277

return value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2280

static int vega12_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

525

dpm_table->dpm_levels[i].value = clk;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

559

dpm_table->dpm_levels[0].value = data->vbios_boot_state.soc_clock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

572

dpm_table->dpm_levels[0].value = data->vbios_boot_state.gfx_clock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

585

dpm_table->dpm_levels[0].value = data->vbios_boot_state.mem_clock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

598

dpm_table->dpm_levels[0].value = data->vbios_boot_state.eclock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

611

dpm_table->dpm_levels[0].value = data->vbios_boot_state.vclock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

624

dpm_table->dpm_levels[0].value = data->vbios_boot_state.dclock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

637

dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

702

dpm_table->dpm_levels[min_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.h

91

uint32_t value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1245

uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1260

od_table.GfxclkFmin = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1263

if (value < od8_settings[OD8_SETTING_GFXCLK_FMAX].min_value ||

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1264

value > od8_settings[OD8_SETTING_GFXCLK_FMAX].max_value)

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1267

od_table.GfxclkFmax = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1270

od_table.GfxclkFreq1 = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1273

od_table.GfxclkVolt1 = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1276

od_table.GfxclkFreq2 = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1279

od_table.GfxclkVolt2 = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1282

od_table.GfxclkFreq3 = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1285

od_table.GfxclkVolt3 = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1288

if (value < od8_settings[OD8_SETTING_UCLK_FMAX].min_value ||

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1289

value > od8_settings[OD8_SETTING_UCLK_FMAX].max_value)

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1291

od_table.UclkFmax = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1294

od_table.OverDrivePct = (int16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1297

od_table.FanMaximumRpm = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1300

od_table.FanMinimumPwm = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1303

od_table.FanTargetTemperature = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1306

od_table.MaxOpTemp = (uint16_t)value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1326

int value = sclk_table->dpm_levels[sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1328

[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1331

value -= golden_value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1332

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1334

return value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1338

struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1346

od_sclk = golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value * value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1348

od_sclk += golden_sclk_table->dpm_levels[golden_sclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1372

int value = mclk_table->dpm_levels[mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1374

[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1377

value -= golden_value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1378

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1380

return value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1384

struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1392

od_mclk = golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value * value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1394

od_mclk += golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1417

hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1418

hwmgr->pstate_mclk = mem_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1422

hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1423

hwmgr->pstate_mclk = mem_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1969

void *value, int *size)

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1980

(uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1987

(uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1992

ret = vega20_get_current_activity_percent(hwmgr, (uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1997

*((uint32_t *)value) = vega20_thermal_get_temperature(hwmgr);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2001

*((uint32_t *)value) = data->uvd_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2005

*((uint32_t *)value) = data->vce_power_gated ? 0 : 1;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2010

ret = vega20_get_gpu_power(hwmgr, (uint32_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2016

*((uint32_t *)value) =

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2020

ret = vega20_get_enabled_smc_features(hwmgr, (uint64_t *)value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2133

data->dpm_table.gfx_table.dpm_levels[soft_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2139

data->dpm_table.mem_table.dpm_levels[soft_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2165

data->dpm_table.gfx_table.dpm_levels[soft_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2171

data->dpm_table.mem_table.dpm_levels[soft_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2257

data->dpm_table.gfx_table.dpm_levels[soft_min_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2259

data->dpm_table.gfx_table.dpm_levels[soft_max_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2284

data->dpm_table.mem_table.dpm_levels[soft_min_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2286

data->dpm_table.mem_table.dpm_levels[soft_max_level].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2410

dpm_table->dpm_levels[i].value * 1000;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2440

dpm_table->dpm_levels[i].value * 1000;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2443

vega20_get_mem_latency(hwmgr, dpm_table->dpm_levels[i].value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2465

dpm_table->dpm_levels[i].value * 1000;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2488

dpm_table->dpm_levels[i].value * 1000;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2928

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3044

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3045

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3046

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3047

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3051

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3052

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3056

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3057

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3061

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3062

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3068

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3069

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3070

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3071

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3075

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3076

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3080

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3081

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3085

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3086

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3096

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3099

if (dpm_table->dpm_levels[i].value >= (hwmgr->display_config->min_mem_set_clock / 100)) {

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3100

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[i].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3108

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3112

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3113

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3114

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3115

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3119

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_UVDCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3120

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_UVDCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3124

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3125

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3131

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3132

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3133

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3134

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3138

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_UVDCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3139

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_UVDCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3143

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3144

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3150

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3151

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3152

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3153

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3157

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_SOCCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3158

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_SOCCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3162

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3163

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3169

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3170

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3171

dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3172

dpm_table->dpm_state.hard_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3176

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_VCEMCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3177

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[VEGA20_UMD_PSTATE_VCEMCLK_LEVEL].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3181

dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3182

dpm_table->dpm_state.soft_max_level = dpm_table->dpm_levels[dpm_table->count - 1].value;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

524

dpm_table->dpm_levels[i].value = clk;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

546

dpm_table->dpm_levels[0].value = data->vbios_boot_state.gfx_clock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

567

dpm_table->dpm_levels[0].value = data->vbios_boot_state.mem_clock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

599

dpm_table->dpm_levels[0].value = data->vbios_boot_state.soc_clock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

626

dpm_table->dpm_levels[0].value = data->vbios_boot_state.eclock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

639

dpm_table->dpm_levels[0].value = data->vbios_boot_state.vclock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

652

dpm_table->dpm_levels[0].value = data->vbios_boot_state.dclock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

665

dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.h

131

uint32_t value;

sys/dev/drm/amd/powerplay/inc/hwmgr.h

214

uint32_t (*get_mac_definition)(uint32_t value);

sys/dev/drm/amd/powerplay/inc/hwmgr.h

306

int (*set_sclk_od)(struct pp_hwmgr *hwmgr, uint32_t value);

sys/dev/drm/amd/powerplay/inc/hwmgr.h

308

int (*set_mclk_od)(struct pp_hwmgr *hwmgr, uint32_t value);

sys/dev/drm/amd/powerplay/inc/hwmgr.h

309

int (*read_sensor)(struct pp_hwmgr *hwmgr, int idx, void *value, int *size);

sys/dev/drm/amd/powerplay/inc/hwmgr.h

53

uint32_t value;

sys/dev/drm/amd/powerplay/inc/smu10_driver_if.h

32

int32_t value;

sys/dev/drm/amd/powerplay/inc/smu71_discrete.h

360

uint32_t value[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/amd/powerplay/inc/smu72.h

83

uint32_t value;

sys/dev/drm/amd/powerplay/inc/smu72_discrete.h

364

uint32_t value[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/amd/powerplay/inc/smu73.h

77

uint32_t value;

sys/dev/drm/amd/powerplay/inc/smu74.h

108

uint32_t value;

sys/dev/drm/amd/powerplay/inc/smu7_discrete.h

420

uint32_t value[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/amd/powerplay/inc/smumgr.h

106

extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1005

(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1315

PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value),

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1317

result = ci_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1360

voltage->Voltage = data->mvdd_voltage_table.entries[i].value;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1661

(hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1662

data->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1754

data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1797

data->dpm_table.mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

195

uint32_t *value, uint32_t limit)

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

204

*value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2285

static uint32_t ci_get_mac_definition(uint32_t value)

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2287

switch (value) {

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2304

pr_debug("can't get the mac of %x\n", value);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

486

dpm_table->sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

616

vid[i] = convert_to_vid(data->vddc_voltage_table.entries[i].value);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

768

*hi = tab->value * VOLTAGE_SCALE;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

769

*lo = tab->value * VOLTAGE_SCALE;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

781

if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) {

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

797

if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) {

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

828

smc_voltage_tab->StdVoltageHiSidd = tab->value * VOLTAGE_SCALE;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

829

smc_voltage_tab->StdVoltageLoSidd = tab->value * VOLTAGE_SCALE;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

832

smc_voltage_tab->Voltage = PP_HOST_TO_SMC_US(tab->value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1028

dpm_table->sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1239

PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value),

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1243

dpm_table->mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1287

smio_pat->Voltage = data->mvdd_voltage_table.entries[i].value;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1320

data->dpm_table.sclk_table.dpm_levels[0].value;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1378

data->dpm_table.mclk_table.dpm_levels[0].value;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1399

data->dpm_table.mclk_table.dpm_levels[0].value,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1540

data->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1541

data->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1669

volt_with_cks, value;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1743

value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1745

value &= 0xFFC2FF87;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1758

value |= (fiji_clock_stretcher_lookup_table[stretch_amount2][3]) << 16;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1760

value |= (fiji_clock_stretcher_lookup_table[stretch_amount2][2]) << 18;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1762

value |= (fiji_clock_stretch_amount_conversion

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1776

ixPWR_CKS_CNTL, value);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1816

value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1817

value &= 0xFFFFFFFE;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1818

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2340

static uint32_t fiji_get_mac_definition(uint32_t value)

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2342

switch (value) {

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2361

pr_warn("can't get the mac of %x\n", value);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

774

data->vddc_voltage_table.entries[count].value);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

840

(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1362

PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value),

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1364

result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1407

voltage->Voltage = data->mvdd_voltage_table.entries[i].value;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1624

(hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1625

data->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1722

data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1764

data->dpm_table.mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2253

static uint32_t iceland_get_mac_definition(uint32_t value)

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2255

switch (value) {

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2272

pr_warn("can't get the mac of %x\n", value);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

427

vid[i] = convert_to_vid(data->vddc_voltage_table.entries[i].value);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

536

*hi = tab->value * VOLTAGE_SCALE;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

537

*lo = tab->value * VOLTAGE_SCALE;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

555

if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) {

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

575

if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) {

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

606

smc_voltage_tab->StdVoltageHiSidd = tab->value * VOLTAGE_SCALE;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

607

smc_voltage_tab->StdVoltageLoSidd = tab->value * VOLTAGE_SCALE;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

610

smc_voltage_tab->Voltage = PP_HOST_TO_SMC_US(tab->value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

774

(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

982

dpm_table->sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1003

dpm_table->sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1139

PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value),

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1143

dpm_table->mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1185

smio_pat->Voltage = data->mvdd_voltage_table.entries[i].value;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1261

data->dpm_table.mclk_table.dpm_levels[0].value,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1372

hw_data->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1373

hw_data->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1376

result = atomctrl_set_ac_timing_ai(hwmgr, hw_data->dpm_table.mclk_table.dpm_levels[j].value, j);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1512

uint32_t ro, efuse, volt_without_cks, volt_with_cks, value, max, min;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1587

value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1588

value &= 0xFFFFFFFE;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1589

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

2295

static uint32_t polaris10_get_mac_definition(uint32_t value)

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

2297

switch (value) {

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

2318

pr_warn("can't get the mac of %x\n", value);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

657

PP_HOST_TO_SMC_US(data->mvdd_voltage_table.entries[count].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

685

PP_HOST_TO_SMC_US(data->vddci_voltage_table.entries[level].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

714

data->vddc_voltage_table.entries[count].value);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

777

(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

280

int smu7_read_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t *value, uint32_t limit)

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

286

*value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

291

int smu7_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t value, uint32_t limit)

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

300

cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, value);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.h

72

uint32_t *value, uint32_t limit);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.h

74

uint32_t value, uint32_t limit);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

124

uint32_t smc_address, uint32_t value, uint32_t limit)

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

133

cgs_write_register(hwmgr->device, mmMP0PUB_IND_DATA_0, value);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.h

71

uint32_t value;

sys/dev/drm/amd/powerplay/smumgr/smumgr.c

110

uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value)

sys/dev/drm/amd/powerplay/smumgr/smumgr.c

113

return hwmgr->smumgr_funcs->get_mac_definition(value);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1108

PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value),

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1113

dpm_table->mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1157

data->mvdd_voltage_table.entries[i].value;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1500

(hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1501

data->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1576

volt_with_cks, value;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1666

value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1668

value &= 0xFFC2FF87;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1681

value |= (tonga_clock_stretcher_lookup_table[stretch_amount2][3]) << 16;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1683

value |= (tonga_clock_stretcher_lookup_table[stretch_amount2][2]) << 18;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1685

value |= (tonga_clock_stretch_amount_conversion

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1699

ixPWR_CKS_CNTL, value);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1737

value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1739

value &= 0xFFFFFFFE;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1741

ixPWR_CKS_CNTL, value);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2100

data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2143

data->dpm_table.mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2648

static uint32_t tonga_get_mac_definition(uint32_t value)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2650

switch (value) {

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2668

pr_warn("can't get the mac value %x\n", value);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

311

PP_HOST_TO_SMC_US(data->vddc_voltage_table.entries[count].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

328

PP_HOST_TO_SMC_US(data->vddgfx_voltage_table.entries[count].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

345

PP_HOST_TO_SMC_US(data->vddci_voltage_table.entries[count].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

348

PP_HOST_TO_SMC_US(data->vddci_voltage_table.entries[count].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

355

PP_HOST_TO_SMC_US(data->vddci_voltage_table.entries[count].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

375

PP_HOST_TO_SMC_US(data->mvdd_voltage_table.entries[count].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

412

data->vddc_voltage_table.entries[count].value);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

432

data->vddc_voltage_table.entries[count].value);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

516

(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

711

dpm_table->sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1048

PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value),

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1052

dpm_table->mclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1095

smio_pat->Voltage = data->mvdd_voltage_table.entries[i].value;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1178

data->dpm_table.mclk_table.dpm_levels[0].value,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1300

hw_data->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1301

hw_data->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1493

uint32_t ro, efuse, volt_without_cks, volt_with_cks, value, max, min;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1548

value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1549

value &= 0xFFFFFFFE;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1550

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

304

static uint32_t vegam_get_mac_definition(uint32_t value)

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

306

switch (value) {

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

328

pr_warn("can't get the mac of %x\n", value);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

460

data->mvdd_voltage_table.entries[count].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

488

data->vddci_voltage_table.entries[level].value * VOLTAGE_SCALE);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

517

data->vddc_voltage_table.entries[count].value);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

581

(uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

889

dpm_table->sclk_table.dpm_levels[i].value,

sys/dev/drm/drm_connector.c

1640

uint64_t value)

sys/dev/drm/drm_connector.c

1647

ret = (*connector->funcs->dpms)(connector, (int)value);

sys/dev/drm/drm_connector.c

1649

ret = connector->funcs->set_property(connector, property, value);

sys/dev/drm/drm_connector.c

1652

drm_object_property_set_value(&connector->base, property, value);

sys/dev/drm/drm_connector.c

1661

.value = conn_set_prop->value,

sys/dev/drm/drm_crtc.c

783

uint64_t value)

sys/dev/drm/drm_crtc.c

789

ret = crtc->funcs->set_property(crtc, property, value);

sys/dev/drm/drm_crtc.c

791

drm_object_property_set_value(obj, property, value);

sys/dev/drm/drm_crtc_internal.h

104

uint64_t value,

sys/dev/drm/drm_crtc_internal.h

161

uint64_t value);

sys/dev/drm/drm_crtc_internal.h

46

uint64_t value);

sys/dev/drm/drm_dp_helper.c

404

u8 value;

sys/dev/drm/drm_dp_helper.c

411

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);

sys/dev/drm/drm_dp_helper.c

415

value &= ~DP_SET_POWER_MASK;

sys/dev/drm/drm_dp_helper.c

416

value |= DP_SET_POWER_D0;

sys/dev/drm/drm_dp_helper.c

418

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);

sys/dev/drm/drm_dp_helper.c

442

u8 value;

sys/dev/drm/drm_dp_helper.c

449

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);

sys/dev/drm/drm_dp_helper.c

453

value &= ~DP_SET_POWER_MASK;

sys/dev/drm/drm_dp_helper.c

454

value |= DP_SET_POWER_D3;

sys/dev/drm/drm_dp_helper.c

456

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);

sys/dev/drm/drm_fb_helper.c

1349

u32 value;

sys/dev/drm/drm_fb_helper.c

1354

value = (red << info->var.red.offset) |

sys/dev/drm/drm_fb_helper.c

1361

value |= mask;

sys/dev/drm/drm_fb_helper.c

1363

palette[cmap->start + i] = value;

sys/dev/drm/drm_ioctl.c

234

req->value = 0;

sys/dev/drm/drm_ioctl.c

239

req->value = 1;

sys/dev/drm/drm_ioctl.c

242

req->value |= dev->driver->prime_fd_to_handle ? DRM_PRIME_CAP_IMPORT : 0;

sys/dev/drm/drm_ioctl.c

243

req->value |= dev->driver->prime_handle_to_fd ? DRM_PRIME_CAP_EXPORT : 0;

sys/dev/drm/drm_ioctl.c

246

req->value = drm_core_check_feature(dev, DRIVER_SYNCOBJ);

sys/dev/drm/drm_ioctl.c

257

req->value = 1;

sys/dev/drm/drm_ioctl.c

260

req->value = 1;

sys/dev/drm/drm_ioctl.c

263

req->value = dev->mode_config.preferred_depth;

sys/dev/drm/drm_ioctl.c

266

req->value = dev->mode_config.prefer_shadow;

sys/dev/drm/drm_ioctl.c

269

req->value = dev->mode_config.async_page_flip;

sys/dev/drm/drm_ioctl.c

272

req->value = 1;

sys/dev/drm/drm_ioctl.c

275

req->value = 0;

sys/dev/drm/drm_ioctl.c

280

req->value = dev->mode_config.cursor_width;

sys/dev/drm/drm_ioctl.c

282

req->value = 64;

sys/dev/drm/drm_ioctl.c

286

req->value = dev->mode_config.cursor_height;

sys/dev/drm/drm_ioctl.c

288

req->value = 64;

sys/dev/drm/drm_ioctl.c

291

req->value = dev->mode_config.allow_fb_modifiers;

sys/dev/drm/drm_ioctl.c

294

req->value = 1;

sys/dev/drm/drm_ioctl.c

318

if (req->value > 1)

sys/dev/drm/drm_ioctl.c

320

file_priv->stereo_allowed = req->value;

sys/dev/drm/drm_ioctl.c

323

if (req->value > 1)

sys/dev/drm/drm_ioctl.c

325

file_priv->universal_planes = req->value;

sys/dev/drm/drm_ioctl.c

330

if (req->value > 1)

sys/dev/drm/drm_ioctl.c

332

file_priv->atomic = req->value;

sys/dev/drm/drm_ioctl.c

333

file_priv->universal_planes = req->value;

sys/dev/drm/drm_ioctl.c

337

file_priv->aspect_ratio_allowed = req->value;

sys/dev/drm/drm_ioctl.c

340

if (req->value > 1)

sys/dev/drm/drm_ioctl.c

342

file_priv->aspect_ratio_allowed = req->value;

sys/dev/drm/drm_ioctl.c

347

if (req->value > 1)

sys/dev/drm/drm_ioctl.c

349

file_priv->writeback_connectors = req->value;

sys/dev/drm/drm_ioctl.c

459

static int drm_copy_field(char __user *buf, size_t *buf_len, const char *value)

sys/dev/drm/drm_ioctl.c

464

len = strlen(value);

sys/dev/drm/drm_ioctl.c

470

*buf_len = strlen(value);

sys/dev/drm/drm_ioctl.c

474

if (copy_to_user(buf, value, len))

sys/dev/drm/drm_mipi_dsi.c

1001

err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_ON, &value,

sys/dev/drm/drm_mipi_dsi.c

1002

sizeof(value));

sys/dev/drm/drm_mipi_dsi.c

541

u16 value)

sys/dev/drm/drm_mipi_dsi.c

543

u8 tx[2] = { value & 0xff, value >> 8 };

sys/dev/drm/drm_mipi_dsi.c

998

u8 value = mode;

sys/dev/drm/drm_mode_object.c

527

ret = set_property_atomic(arg_obj, property, arg->value);

sys/dev/drm/drm_mode_object.c

529

ret = set_property_legacy(arg_obj, property, arg->value);

sys/dev/drm/drm_plane.c

457

uint64_t value)

sys/dev/drm/drm_plane.c

463

ret = plane->funcs->set_property(plane, property, value);

sys/dev/drm/drm_plane.c

465

drm_object_property_set_value(obj, property, value);

sys/dev/drm/drm_property.c

386

uint64_t value, const char *name)

sys/dev/drm/drm_property.c

403

value > 63))

sys/dev/drm/drm_property.c

407

if (WARN_ON(prop_enum->value == value))

sys/dev/drm/drm_property.c

421

prop_enum->value = value;

sys/dev/drm/drm_property.c

423

property->values[index] = value;

sys/dev/drm/drm_property.c

498

if (copy_to_user(&enum_ptr[copied].value,

sys/dev/drm/drm_property.c

499

&prop_enum->value, sizeof(uint64_t)))

sys/dev/drm/drm_property.c

873

uint64_t value, struct drm_mode_object **ref)

sys/dev/drm/drm_property.c

883

if (value < property->values[0] || value > property->values[1])

sys/dev/drm/drm_property.c

887

int64_t svalue = U642I64(value);

sys/dev/drm/drm_property.c

898

return !(value & ~valid_mask);

sys/dev/drm/drm_property.c

902

if (value == 0)

sys/dev/drm/drm_property.c

905

blob = drm_property_lookup_blob(property->dev, value);

sys/dev/drm/drm_property.c

914

if (value == 0)

sys/dev/drm/drm_property.c

917

*ref = __drm_mode_object_find(property->dev, NULL, value,

sys/dev/drm/drm_property.c

923

if (property->values[i] == value)

sys/dev/drm/i915/dvo_ns2501.c

195

u8 value;

sys/dev/drm/i915/dvo_ns2501.c

300

[0] = { .offset = 0x0a, .value = 0x81, },

sys/dev/drm/i915/dvo_ns2501.c

302

[1] = { .offset = 0x12, .value = 0x02, },

sys/dev/drm/i915/dvo_ns2501.c

303

[2] = { .offset = 0x18, .value = 0x07, },

sys/dev/drm/i915/dvo_ns2501.c

304

[3] = { .offset = 0x19, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

305

[4] = { .offset = 0x1a, .value = 0x00, }, /* PLL?, ignored */

sys/dev/drm/i915/dvo_ns2501.c

307

[5] = { .offset = 0x1e, .value = 0x02, },

sys/dev/drm/i915/dvo_ns2501.c

308

[6] = { .offset = 0x1f, .value = 0x40, },

sys/dev/drm/i915/dvo_ns2501.c

309

[7] = { .offset = 0x20, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

310

[8] = { .offset = 0x21, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

311

[9] = { .offset = 0x22, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

312

[10] = { .offset = 0x23, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

313

[11] = { .offset = 0x24, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

314

[12] = { .offset = 0x25, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

315

[13] = { .offset = 0x26, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

316

[14] = { .offset = 0x27, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

317

[15] = { .offset = 0x7e, .value = 0x18, },

sys/dev/drm/i915/dvo_ns2501.c

319

[16] = { .offset = 0x84, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

320

[17] = { .offset = 0x85, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

321

[18] = { .offset = 0x86, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

322

[19] = { .offset = 0x87, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

323

[20] = { .offset = 0x88, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

324

[21] = { .offset = 0x89, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

325

[22] = { .offset = 0x8a, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

326

[23] = { .offset = 0x8b, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

327

[24] = { .offset = 0x8c, .value = 0x10, },

sys/dev/drm/i915/dvo_ns2501.c

328

[25] = { .offset = 0x8d, .value = 0x02, },

sys/dev/drm/i915/dvo_ns2501.c

330

[26] = { .offset = 0x90, .value = 0xff, },

sys/dev/drm/i915/dvo_ns2501.c

331

[27] = { .offset = 0x91, .value = 0x07, },

sys/dev/drm/i915/dvo_ns2501.c

332

[28] = { .offset = 0x92, .value = 0xa0, },

sys/dev/drm/i915/dvo_ns2501.c

333

[29] = { .offset = 0x93, .value = 0x02, },

sys/dev/drm/i915/dvo_ns2501.c

334

[30] = { .offset = 0x94, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

335

[31] = { .offset = 0x95, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

336

[32] = { .offset = 0x96, .value = 0x05, },

sys/dev/drm/i915/dvo_ns2501.c

337

[33] = { .offset = 0x97, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

339

[34] = { .offset = 0x9a, .value = 0x88, },

sys/dev/drm/i915/dvo_ns2501.c

340

[35] = { .offset = 0x9b, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

342

[36] = { .offset = 0x9e, .value = 0x25, },

sys/dev/drm/i915/dvo_ns2501.c

343

[37] = { .offset = 0x9f, .value = 0x03, },

sys/dev/drm/i915/dvo_ns2501.c

344

[38] = { .offset = 0xa0, .value = 0x28, },

sys/dev/drm/i915/dvo_ns2501.c

345

[39] = { .offset = 0xa1, .value = 0x01, },

sys/dev/drm/i915/dvo_ns2501.c

346

[40] = { .offset = 0xa2, .value = 0x28, },

sys/dev/drm/i915/dvo_ns2501.c

347

[41] = { .offset = 0xa3, .value = 0x05, },

sys/dev/drm/i915/dvo_ns2501.c

349

[42] = { .offset = 0xa4, .value = 0x84, },

sys/dev/drm/i915/dvo_ns2501.c

350

[43] = { .offset = 0xa5, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

351

[44] = { .offset = 0xa6, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

352

[45] = { .offset = 0xa7, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

353

[46] = { .offset = 0xa8, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

355

[47] = { .offset = 0xa9, .value = 0x04, },

sys/dev/drm/i915/dvo_ns2501.c

356

[48] = { .offset = 0xaa, .value = 0x70, },

sys/dev/drm/i915/dvo_ns2501.c

357

[49] = { .offset = 0xab, .value = 0x4f, },

sys/dev/drm/i915/dvo_ns2501.c

358

[50] = { .offset = 0xac, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

359

[51] = { .offset = 0xad, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

360

[52] = { .offset = 0xb6, .value = 0x09, },

sys/dev/drm/i915/dvo_ns2501.c

361

[53] = { .offset = 0xb7, .value = 0x03, },

sys/dev/drm/i915/dvo_ns2501.c

363

[54] = { .offset = 0xba, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

364

[55] = { .offset = 0xbb, .value = 0x20, },

sys/dev/drm/i915/dvo_ns2501.c

365

[56] = { .offset = 0xf3, .value = 0x90, },

sys/dev/drm/i915/dvo_ns2501.c

366

[57] = { .offset = 0xf4, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

367

[58] = { .offset = 0xf7, .value = 0x88, },

sys/dev/drm/i915/dvo_ns2501.c

369

[59] = { .offset = 0xf8, .value = 0x0a, },

sys/dev/drm/i915/dvo_ns2501.c

370

[60] = { .offset = 0xf9, .value = 0x00, }

sys/dev/drm/i915/dvo_ns2501.c

374

[0] = { .offset = 0x35, .value = 0xff, },

sys/dev/drm/i915/dvo_ns2501.c

375

[1] = { .offset = 0x34, .value = 0x00, },

sys/dev/drm/i915/dvo_ns2501.c

376

[2] = { .offset = 0x08, .value = 0x30, },

sys/dev/drm/i915/dvo_ns2501.c

601

ns2501_writeb(dvo, regs_init[i].offset, regs_init[i].value);

sys/dev/drm/i915/dvo_ns2501.c

606

mode_agnostic_values[i].value);

sys/dev/drm/i915/gvt/gvt.h

377

u32 fence, u64 value);

sys/dev/drm/i915/i915_cmd_parser.c

1005

default_desc->cmd.value = cmd_header;

sys/dev/drm/i915/i915_cmd_parser.c

1173

if (desc->cmd.value == MI_LOAD_REGISTER_MEM) {

sys/dev/drm/i915/i915_cmd_parser.c

1179

if (desc->cmd.value == MI_LOAD_REGISTER_REG) {

sys/dev/drm/i915/i915_cmd_parser.c

1185

if (desc->cmd.value == MI_LOAD_REGISTER_IMM(1) &&

sys/dev/drm/i915/i915_cmd_parser.c

1187

(cmd[offset + 1] & reg->mask) != reg->value)) {

sys/dev/drm/i915/i915_cmd_parser.c

122

u32 value;

sys/dev/drm/i915/i915_cmd_parser.c

1307

if (desc->cmd.value == MI_BATCH_BUFFER_START) {

sys/dev/drm/i915/i915_cmd_parser.c

514

u32 value;

sys/dev/drm/i915/i915_cmd_parser.c

599

.value = 0),

sys/dev/drm/i915/i915_cmd_parser.c

603

.value = 0),

sys/dev/drm/i915/i915_cmd_parser.c

729

u32 curr = desc->cmd.value & desc->cmd.mask;

sys/dev/drm/i915/i915_cmd_parser.c

835

cmd_header_key(desc->cmd.value));

sys/dev/drm/i915/i915_cmd_parser.c

971

if (((cmd_header ^ desc->cmd.value) & desc->cmd.mask) == 0)

sys/dev/drm/i915/i915_cmd_parser.c

994

if (((cmd_header ^ desc->cmd.value) & desc->cmd.mask) == 0)

sys/dev/drm/i915/i915_drv.c

321

int value;

sys/dev/drm/i915/i915_drv.c

331

value = pdev->device;

sys/dev/drm/i915/i915_drv.c

334

value = pdev->revision;

sys/dev/drm/i915/i915_drv.c

337

value = dev_priv->num_fence_regs;

sys/dev/drm/i915/i915_drv.c

340

value = dev_priv->overlay ? 1 : 0;

sys/dev/drm/i915/i915_drv.c

343

value = !!dev_priv->engine[VCS];

sys/dev/drm/i915/i915_drv.c

346

value = !!dev_priv->engine[BCS];

sys/dev/drm/i915/i915_drv.c

349

value = !!dev_priv->engine[VECS];

sys/dev/drm/i915/i915_drv.c

352

value = !!dev_priv->engine[VCS2];

sys/dev/drm/i915/i915_drv.c

355

value = HAS_LLC(dev_priv);

sys/dev/drm/i915/i915_drv.c

358

value = HAS_WT(dev_priv);

sys/dev/drm/i915/i915_drv.c

361

value = USES_PPGTT(dev_priv);

sys/dev/drm/i915/i915_drv.c

364

value = HAS_LEGACY_SEMAPHORES(dev_priv);

sys/dev/drm/i915/i915_drv.c

368

value = capable(CAP_SYS_ADMIN);

sys/dev/drm/i915/i915_drv.c

372

value = i915_cmd_parser_get_version(dev_priv);

sys/dev/drm/i915/i915_drv.c

375

value = sseu_subslice_total(&INTEL_INFO(dev_priv)->sseu);

sys/dev/drm/i915/i915_drv.c

376

if (!value)

sys/dev/drm/i915/i915_drv.c

380

value = INTEL_INFO(dev_priv)->sseu.eu_total;

sys/dev/drm/i915/i915_drv.c

381

if (!value)

sys/dev/drm/i915/i915_drv.c

385

value = i915_modparams.enable_hangcheck &&

sys/dev/drm/i915/i915_drv.c

387

if (value && intel_has_reset_engine(dev_priv))

sys/dev/drm/i915/i915_drv.c

388

value = 2;

sys/dev/drm/i915/i915_drv.c

391

value = 0;

sys/dev/drm/i915/i915_drv.c

394

value = HAS_POOLED_EU(dev_priv);

sys/dev/drm/i915/i915_drv.c

397

value = INTEL_INFO(dev_priv)->sseu.min_eu_in_pool;

sys/dev/drm/i915/i915_drv.c

400

value = intel_huc_check_status(&dev_priv->huc);

sys/dev/drm/i915/i915_drv.c

401

if (value < 0)

sys/dev/drm/i915/i915_drv.c

402

return value;

sys/dev/drm/i915/i915_drv.c

409

value = i915_gem_mmap_gtt_version();

sys/dev/drm/i915/i915_drv.c

412

value = dev_priv->caps.scheduler;

sys/dev/drm/i915/i915_drv.c

442

value = 1;

sys/dev/drm/i915/i915_drv.c

445

value = intel_engines_has_context_isolation(dev_priv);

sys/dev/drm/i915/i915_drv.c

448

value = INTEL_INFO(dev_priv)->sseu.slice_mask;

sys/dev/drm/i915/i915_drv.c

449

if (!value)

sys/dev/drm/i915/i915_drv.c

453

value = INTEL_INFO(dev_priv)->sseu.subslice_mask[0];

sys/dev/drm/i915/i915_drv.c

454

if (!value)

sys/dev/drm/i915/i915_drv.c

458

value = 1000 * INTEL_INFO(dev_priv)->cs_timestamp_frequency_khz;

sys/dev/drm/i915/i915_drv.c

461

value = INTEL_INFO(dev_priv)->has_coherent_ggtt;

sys/dev/drm/i915/i915_drv.c

468

if (put_user(value, param->value))

sys/dev/drm/i915/i915_drv.h

1328

u32 value;

sys/dev/drm/i915/i915_drv.h

1359

u32 value;

sys/dev/drm/i915/i915_drv.h

3548

void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,

sys/dev/drm/i915/i915_gem_context.c

865

args->value = test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);

sys/dev/drm/i915/i915_gem_context.c

869

args->value = ctx->ppgtt->vm.total;

sys/dev/drm/i915/i915_gem_context.c

871

args->value = to_i915(dev)->mm.aliasing_ppgtt->vm.total;

sys/dev/drm/i915/i915_gem_context.c

873

args->value = to_i915(dev)->ggtt.vm.total;

sys/dev/drm/i915/i915_gem_context.c

876

args->value = i915_gem_context_no_error_capture(ctx);

sys/dev/drm/i915/i915_gem_context.c

879

args->value = i915_gem_context_is_bannable(ctx);

sys/dev/drm/i915/i915_gem_context.c

882

args->value = ctx->sched.priority;

sys/dev/drm/i915/i915_gem_context.c

912

else if (args->value)

sys/dev/drm/i915/i915_gem_context.c

920

else if (args->value)

sys/dev/drm/i915/i915_gem_context.c

928

else if (!capable(CAP_SYS_ADMIN) && !args->value)

sys/dev/drm/i915/i915_gem_context.c

930

else if (args->value)

sys/dev/drm/i915/i915_gem_context.c

938

s64 priority = args->value;

sys/dev/drm/i915/i915_gem_execbuffer.c

1110

static void clflush_write32(u32 *addr, u32 value, unsigned int flushes)

sys/dev/drm/i915/i915_gem_execbuffer.c

1118

*addr = value;

sys/dev/drm/i915/i915_gem_execbuffer.c

1130

*addr = value;

sys/dev/drm/i915/i915_gem_gtt.c

3103

__alloc_ppat_entry(struct intel_ppat *ppat, unsigned int index, u8 value)

sys/dev/drm/i915/i915_gem_gtt.c

3111

entry->value = value;

sys/dev/drm/i915/i915_gem_gtt.c

3127

entry->value = ppat->clear_value;

sys/dev/drm/i915/i915_gem_gtt.c

3145

intel_ppat_get(struct drm_i915_private *i915, u8 value)

sys/dev/drm/i915/i915_gem_gtt.c

3158

score = ppat->match(ppat->entries[i].value, value);

sys/dev/drm/i915/i915_gem_gtt.c

3179

entry = __alloc_ppat_entry(ppat, i, value);

sys/dev/drm/i915/i915_gem_gtt.c

3218

I915_WRITE(GEN10_PAT_INDEX(i), ppat->entries[i].value);

sys/dev/drm/i915/i915_gem_gtt.c

3230

pat |= GEN8_PPAT(i, ppat->entries[i].value);

sys/dev/drm/i915/i915_gem_gtt.c

3387

ppat->entries[i].value = ppat->clear_value;

sys/dev/drm/i915/i915_gem_gtt.h

595

u8 value;

sys/dev/drm/i915/i915_gem_gtt.h

615

intel_ppat_get(struct drm_i915_private *i915, u8 value);

sys/dev/drm/i915/i915_gem_userptr.c

470

bool value)

sys/dev/drm/i915/i915_gem_userptr.c

492

if (!value)

sys/dev/drm/i915/i915_params.c

38

#define MEMBER(T, member, value) .member = (value),

sys/dev/drm/i915/i915_perf.c

1565

I915_WRITE(reg->addr, reg->value);

sys/dev/drm/i915/i915_perf.c

1668

u32 value = 0;

sys/dev/drm/i915/i915_perf.c

1675

value = oa_config->flex_regs[j].value;

sys/dev/drm/i915/i915_perf.c

1681

CTX_REG(reg_state, state_offset, flex_regs[i], value);

sys/dev/drm/i915/i915_perf.c

2697

u64 id, value;

sys/dev/drm/i915/i915_perf.c

2704

ret = get_user(value, uprop + 1);

sys/dev/drm/i915/i915_perf.c

2716

props->ctx_handle = value;

sys/dev/drm/i915/i915_perf.c

2719

if (value)

sys/dev/drm/i915/i915_perf.c

2723

if (value == 0) {

sys/dev/drm/i915/i915_perf.c

2727

props->metrics_set = value;

sys/dev/drm/i915/i915_perf.c

2730

if (value == 0 || value >= I915_OA_FORMAT_MAX) {

sys/dev/drm/i915/i915_perf.c

2732

value);

sys/dev/drm/i915/i915_perf.c

2735

if (!dev_priv->perf.oa.oa_formats[value].size) {

sys/dev/drm/i915/i915_perf.c

2737

value);

sys/dev/drm/i915/i915_perf.c

2740

props->oa_format = value;

sys/dev/drm/i915/i915_perf.c

2743

if (value > OA_EXPONENT_MAX) {

sys/dev/drm/i915/i915_perf.c

2756

oa_period = oa_exponent_to_ns(dev_priv, value);

sys/dev/drm/i915/i915_perf.c

2779

props->oa_period_exponent = value;

sys/dev/drm/i915/i915_perf.c

3080

u32 addr, value;

sys/dev/drm/i915/i915_perf.c

3092

err = get_user(value, regs + 1);

sys/dev/drm/i915/i915_perf.c

3097

oa_regs[i].value = mask_reg_value(addr, value);

sys/dev/drm/i915/i915_reg.h

10555

#define DSC_INITIAL_SCALE_VALUE(value) ((value) << 0)

sys/dev/drm/i915/i915_reg.h

175

#define __MASKED_FIELD(mask, value) ((mask) << 16 | (value))

sys/dev/drm/i915/i915_reg.h

176

#define _MASKED_FIELD(mask, value) ({ \

sys/dev/drm/i915/i915_reg.h

179

if (__builtin_constant_p(value)) \

sys/dev/drm/i915/i915_reg.h

180

BUILD_BUG_ON_MSG((value) & 0xffff0000, "Incorrect value"); \

sys/dev/drm/i915/i915_reg.h

181

if (__builtin_constant_p(mask) && __builtin_constant_p(value)) \

sys/dev/drm/i915/i915_reg.h

182

BUILD_BUG_ON_MSG((value) & ~(mask), \

sys/dev/drm/i915/i915_reg.h

184

__MASKED_FIELD(mask, value); })

sys/dev/drm/i915/intel_acpi.c

87

(unsigned long long)connector_count->integer.value);

sys/dev/drm/i915/intel_acpi.c

93

(unsigned long long)connector_id->integer.value);

sys/dev/drm/i915/intel_dp.c

2229

u32 value)

sys/dev/drm/i915/intel_dp.c

2242

mask, value,

sys/dev/drm/i915/intel_dp.c

2247

pp_stat_reg, mask, value,

sys/dev/drm/i915/intel_drv.h

1964

u64 value);

sys/dev/drm/i915/intel_dsi_vbt.c

205

u8 gpio_source, u8 gpio_index, bool value)

sys/dev/drm/i915/intel_dsi_vbt.c

244

tmp = 0x4 | value;

sys/dev/drm/i915/intel_dsi_vbt.c

250

u8 gpio_source, u8 gpio_index, bool value)

sys/dev/drm/i915/intel_dsi_vbt.c

296

CHV_GPIO_GPIOTXSTATE(value));

sys/dev/drm/i915/intel_dsi_vbt.c

301

u8 gpio_source, u8 gpio_index, bool value)

sys/dev/drm/i915/intel_dsi_vbt.c

310

value ? GPIOD_OUT_LOW :

sys/dev/drm/i915/intel_dsi_vbt.c

322

gpiod_set_value(gpio_desc, value);

sys/dev/drm/i915/intel_dsi_vbt.c

330

bool value;

sys/dev/drm/i915/intel_dsi_vbt.c

346

value = *data++ & 1;

sys/dev/drm/i915/intel_dsi_vbt.c

349

vlv_exec_gpio(dev_priv, gpio_source, gpio_number, value);

sys/dev/drm/i915/intel_dsi_vbt.c

351

chv_exec_gpio(dev_priv, gpio_source, gpio_number, value);

sys/dev/drm/i915/intel_dsi_vbt.c

353

bxt_exec_gpio(dev_priv, gpio_source, gpio_index, value);

sys/dev/drm/i915/intel_guc_fwif.h

493

u32 value;

sys/dev/drm/i915/intel_lrc.c

1536

u32 value;

sys/dev/drm/i915/intel_lrc.c

1546

*batch++ = lri->value;

sys/dev/drm/i915/intel_mocs.c

39

#define LE_CACHEABILITY(value) ((value) << 0)

sys/dev/drm/i915/intel_mocs.c

40

#define LE_TGT_CACHE(value) ((value) << 2)

sys/dev/drm/i915/intel_mocs.c

41

#define LE_LRUM(value) ((value) << 4)

sys/dev/drm/i915/intel_mocs.c

42

#define LE_AOM(value) ((value) << 6)

sys/dev/drm/i915/intel_mocs.c

43

#define LE_RSC(value) ((value) << 7)

sys/dev/drm/i915/intel_mocs.c

44

#define LE_SCC(value) ((value) << 8)

sys/dev/drm/i915/intel_mocs.c

45

#define LE_PFM(value) ((value) << 11)

sys/dev/drm/i915/intel_mocs.c

46

#define LE_SCF(value) ((value) << 14)

sys/dev/drm/i915/intel_mocs.c

49

#define L3_ESC(value) ((value) << 0)

sys/dev/drm/i915/intel_mocs.c

50

#define L3_SCC(value) ((value) << 1)

sys/dev/drm/i915/intel_mocs.c

51

#define L3_CACHEABILITY(value) ((value) << 4)

sys/dev/drm/i915/intel_pm.c

1155

int level, enum plane_id plane_id, u16 value)

sys/dev/drm/i915/intel_pm.c

1163

dirty |= raw->plane[plane_id] != value;

sys/dev/drm/i915/intel_pm.c

1164

raw->plane[plane_id] = value;

sys/dev/drm/i915/intel_pm.c

1171

int level, u16 value)

sys/dev/drm/i915/intel_pm.c

1182

dirty |= raw->fbc != value;

sys/dev/drm/i915/intel_pm.c

1183

raw->fbc = value;

sys/dev/drm/i915/intel_pm.c

1755

int level, enum plane_id plane_id, u16 value)

sys/dev/drm/i915/intel_pm.c

1764

dirty |= raw->plane[plane_id] != value;

sys/dev/drm/i915/intel_pm.c

1765

raw->plane[plane_id] = value;

sys/dev/drm/i915/intel_pm.c

1934

#define VLV_FIFO(plane, value) \

sys/dev/drm/i915/intel_pm.c

1935

(((value) << DSPARB_ ## plane ## _SHIFT_VLV) & DSPARB_ ## plane ## _MASK_VLV)

sys/dev/drm/i915/intel_pm.c

346

#define FW_WM(value, plane) \

sys/dev/drm/i915/intel_pm.c

347

(((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK)

sys/dev/drm/i915/intel_pm.c

5668

#define _FW_WM(value, plane) \

sys/dev/drm/i915/intel_pm.c

5669

(((value) & DSPFW_ ## plane ## _MASK) >> DSPFW_ ## plane ## _SHIFT)

sys/dev/drm/i915/intel_pm.c

5670

#define _FW_WM_VLV(value, plane) \

sys/dev/drm/i915/intel_pm.c

5671

(((value) & DSPFW_ ## plane ## _MASK_VLV) >> DSPFW_ ## plane ## _SHIFT)

sys/dev/drm/i915/intel_pm.c

957

#define FW_WM_VLV(value, plane) \

sys/dev/drm/i915/intel_pm.c

958

(((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK_VLV)

sys/dev/drm/i915/intel_ringbuffer.h

1061

gen8_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset)

sys/dev/drm/i915/intel_ringbuffer.h

1075

*cs++ = value;

sys/dev/drm/i915/intel_ringbuffer.h

1083

gen8_emit_ggtt_write(u32 *cs, u32 value, u32 gtt_offset)

sys/dev/drm/i915/intel_ringbuffer.h

1093

*cs++ = value;

sys/dev/drm/i915/intel_ringbuffer.h

752

intel_write_status_page(struct intel_engine_cs *engine, int reg, u32 value)

sys/dev/drm/i915/intel_ringbuffer.h

762

engine->status_page.page_addr[reg] = value;

sys/dev/drm/i915/intel_ringbuffer.h

766

WRITE_ONCE(engine->status_page.page_addr[reg], value);

sys/dev/drm/i915/intel_sdvo.c

616

intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)

sys/dev/drm/i915/intel_sdvo.c

621

return intel_sdvo_read_response(intel_sdvo, value, len);

sys/dev/drm/i915/intel_sdvo_regs.h

575

u16 value;

sys/dev/drm/i915/intel_sdvo_regs.h

673

u16 value;

sys/dev/drm/i915/intel_sideband.c

208

u32 value = 0;

sys/dev/drm/i915/intel_sideband.c

222

value = SBI_CTL_DEST_ICLK | SBI_CTL_OP_CRRD;

sys/dev/drm/i915/intel_sideband.c

224

value = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IORD;

sys/dev/drm/i915/intel_sideband.c

225

I915_WRITE(SBI_CTL_STAT, value | SBI_BUSY);

sys/dev/drm/i915/intel_sideband.c

244

void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,

sys/dev/drm/i915/intel_sideband.c

259

I915_WRITE(SBI_DATA, value);

sys/dev/drm/i915/intel_sideband.c

278

value, reg);

sys/dev/drm/i915/intel_uncore.c

129

const u32 value = type == ACK_SET ? ack_bit : 0;

sys/dev/drm/i915/intel_uncore.c

157

ack_detected = (__raw_i915_read32(i915, d->reg_ack) & ack_bit) == value;

sys/dev/drm/i915/intel_uncore.c

2007

u32 value,

sys/dev/drm/i915/intel_uncore.c

2013

#define done (((reg_value = I915_READ_FW(reg)) & mask) == value)

sys/dev/drm/i915/intel_uncore.c

2055

u32 value,

sys/dev/drm/i915/intel_uncore.c

2071

reg, mask, value,

sys/dev/drm/i915/intel_uncore.c

2079

(reg_value & mask) == value,

sys/dev/drm/i915/intel_uncore.c

87

const u32 value)

sys/dev/drm/i915/intel_uncore.c

89

return wait_for_atomic((__raw_i915_read32(i915, d->reg_ack) & ack) == value,

sys/dev/drm/i915/intel_uncore.h

182

u32 value,

sys/dev/drm/i915/intel_uncore.h

190

u32 value,

sys/dev/drm/i915/intel_uncore.h

193

return __intel_wait_for_register(dev_priv, reg, mask, value, 2,

sys/dev/drm/i915/intel_uncore.h

199

u32 value,

sys/dev/drm/i915/intel_uncore.h

207

u32 value,

sys/dev/drm/i915/intel_uncore.h

210

return __intel_wait_for_register_fw(dev_priv, reg, mask, value,

sys/dev/drm/i915/intel_uncore.h

216

#define raw_reg_write(base, reg, value) \

sys/dev/drm/i915/intel_uncore.h

217

writel(value, base + i915_mmio_reg_offset(reg))

sys/dev/drm/i915/intel_workarounds.c

104

r->value = val;

sys/dev/drm/i915/intel_workarounds.c

124

#define WA_SET_FIELD_MASKED(addr, mask, value) \

sys/dev/drm/i915/intel_workarounds.c

125

WA_REG(addr, (mask), _MASKED_FIELD(mask, value))

sys/dev/drm/i915/intel_workarounds.c

584

*cs++ = w->reg[i].value;

sys/dev/drm/i915/intel_workarounds.c

85

addr, r->mask, r->value);

sys/dev/drm/i915/intel_workarounds.c

87

r->value &= ~mask;

sys/dev/drm/i915/intel_workarounds.c

90

r->value |= val;

sys/dev/drm/include/asm/barrier.h

38

#define smp_store_mb(var, value) do { \

sys/dev/drm/include/asm/barrier.h

39

WRITE_ONCE(var, value); \

sys/dev/drm/include/asm/cmpxchg.h

30

#define xchg(ptr, value) \

sys/dev/drm/include/asm/cmpxchg.h

32

__typeof(value) __ret = (value); \

sys/dev/drm/include/asm/cmpxchg.h

34

switch (sizeof(value)) { \

sys/dev/drm/include/asm/cmpxchg.h

56

panic("xchg(): invalid size %ld\n", sizeof(value)); \

sys/dev/drm/include/asm/io.h

164

outb(u8 value, u_int port)

sys/dev/drm/include/asm/io.h

166

outbv(port, value);

sys/dev/drm/include/asm/io.h

61

writeb(u8 value, volatile void __iomem *addr)

sys/dev/drm/include/asm/io.h

63

*(volatile uint8_t *)addr = value;

sys/dev/drm/include/asm/io.h

68

writew(u16 value, volatile void __iomem *addr)

sys/dev/drm/include/asm/io.h

70

*(volatile uint16_t *)addr = value;

sys/dev/drm/include/asm/io.h

75

writel(u32 value, volatile void __iomem *addr)

sys/dev/drm/include/asm/io.h

77

*(volatile uint32_t *)addr = value;

sys/dev/drm/include/asm/io.h

84

writeq(u64 value, volatile void __iomem *addr)

sys/dev/drm/include/asm/io.h

86

*(volatile uint64_t *)addr = value;

sys/dev/drm/include/asm/pgtable_types.h

60

#define __pgprot(value) ((pgprot_t) {(value)})

sys/dev/drm/include/asm/uaccess.h

96

#define __put_user(value, uptr) \

sys/dev/drm/include/asm/uaccess.h

98

__typeof(*(uptr)) __tmpval = (value); \

sys/dev/drm/include/drm/drm_dp_helper.h

1195

unsigned int offset, u8 value)

sys/dev/drm/include/drm/drm_dp_helper.h

1197

return drm_dp_dpcd_write(aux, offset, &value, 1);

sys/dev/drm/include/drm/drm_mipi_dsi.h

225

u16 value);

sys/dev/drm/include/drm/drm_mode_object.h

128

uint64_t *value);

sys/dev/drm/include/drm/drm_plane.h

746

uint64_t value);

sys/dev/drm/include/drm/drm_property.h

266

uint64_t value, const char *name);

sys/dev/drm/include/drm/drm_property.h

42

uint64_t value;

sys/dev/drm/include/drm/drm_scdc_helper.h

109

u8 *value)

sys/dev/drm/include/drm/drm_scdc_helper.h

111

return drm_scdc_read(adapter, offset, value, sizeof(*value));

sys/dev/drm/include/drm/drm_scdc_helper.h

127

u8 value)

sys/dev/drm/include/drm/drm_scdc_helper.h

129

return drm_scdc_write(adapter, offset, &value, sizeof(value));

sys/dev/drm/include/linux/bitops.h

534

sign_extend64(uint64_t value, int index)

sys/dev/drm/include/linux/bitops.h

537

return (int64_t)(value << shift) >> shift;

sys/dev/drm/include/linux/gpio/consumer.h

56

gpiod_set_value_cansleep(struct gpio_desc *desc, int value)

sys/dev/drm/include/linux/gpio/consumer.h

69

gpiod_set_value(struct gpio_desc *desc, int value)

sys/dev/drm/include/linux/seqlock.h

167

unsigned int value = READ_ONCE(s->sequence);

sys/dev/drm/include/linux/seqlock.h

171

return value;

sys/dev/drm/include/uapi/drm/amdgpu_drm.h

331

#define AMDGPU_TILING_SET(field, value) \

sys/dev/drm/include/uapi/drm/amdgpu_drm.h

332

(((__u64)(value) & AMDGPU_TILING_##field##_MASK) << AMDGPU_TILING_##field##_SHIFT)

sys/dev/drm/include/uapi/drm/amdgpu_drm.h

333

#define AMDGPU_TILING_GET(value, field) \

sys/dev/drm/include/uapi/drm/amdgpu_drm.h

334

(((__u64)(value) >> AMDGPU_TILING_##field##_SHIFT) & AMDGPU_TILING_##field##_MASK)

sys/dev/drm/include/uapi/drm/amdgpu_drm.h

452

__u64 value;

sys/dev/drm/include/uapi/drm/drm.h

265

unsigned long value;

sys/dev/drm/include/uapi/drm/drm.h

650

__u64 value;

sys/dev/drm/include/uapi/drm/drm.h

696

__u64 value;

sys/dev/drm/include/uapi/drm/drm_mode.h

411

__u64 value;

sys/dev/drm/include/uapi/drm/drm_mode.h

430

__u64 value;

sys/dev/drm/include/uapi/drm/drm_mode.h

454

__u64 value;

sys/dev/drm/include/uapi/drm/i915_drm.h

1481

__u64 value;

sys/dev/drm/include/uapi/drm/i915_drm.h

560

int __user *value;

sys/dev/drm/include/uapi/drm/i915_drm.h

572

int value;

sys/dev/drm/include/uapi/drm/radeon_drm.h

1051

__u64 value;

sys/dev/drm/include/uapi/drm/radeon_drm.h

726

void __user *value;

sys/dev/drm/include/uapi/drm/radeon_drm.h

768

__s64 value;

sys/dev/drm/include/uapi/drm/radeon_drm.h

922

__u64 value; /* input or return value */

sys/dev/drm/radeon/btc_dpm.c

1298

if (voltage <= table->entries[i].value)

sys/dev/drm/radeon/btc_dpm.c

1299

return table->entries[i].value;

sys/dev/drm/radeon/btc_dpm.c

1302

return table->entries[table->count - 1].value;

sys/dev/drm/radeon/ci_dpm.c

1316

u16 reg_offset, u32 *value)

sys/dev/drm/radeon/ci_dpm.c

1322

value, pi->sram_end);

sys/dev/drm/radeon/ci_dpm.c

1327

u16 reg_offset, u32 value)

sys/dev/drm/radeon/ci_dpm.c

1333

value, pi->sram_end);

sys/dev/drm/radeon/ci_dpm.c

2161

voltage_table->entries[i].value = voltage_dependency_table->entries[i].v;

sys/dev/drm/radeon/ci_dpm.c

2241

smc_voltage_table->StdVoltageHiSidd = voltage_table->value * VOLTAGE_SCALE;

sys/dev/drm/radeon/ci_dpm.c

2242

smc_voltage_table->StdVoltageLoSidd = voltage_table->value * VOLTAGE_SCALE;

sys/dev/drm/radeon/ci_dpm.c

2245

smc_voltage_table->Voltage = cpu_to_be16(voltage_table->value * VOLTAGE_SCALE);

sys/dev/drm/radeon/ci_dpm.c

2350

voltage->Voltage = pi->mvdd_voltage_table.entries[i].value;

sys/dev/drm/radeon/ci_dpm.c

2368

*std_voltage_hi_sidd = voltage_table->value * VOLTAGE_SCALE;

sys/dev/drm/radeon/ci_dpm.c

2369

*std_voltage_lo_sidd = voltage_table->value * VOLTAGE_SCALE;

sys/dev/drm/radeon/ci_dpm.c

2376

if (voltage_table->value ==

sys/dev/drm/radeon/ci_dpm.c

2393

if (voltage_table->value <=

sys/dev/drm/radeon/ci_dpm.c

2592

pi->dpm_table.sclk_table.dpm_levels[i].value,

sys/dev/drm/radeon/ci_dpm.c

2593

pi->dpm_table.mclk_table.dpm_levels[j].value,

sys/dev/drm/radeon/ci_dpm.c

2669

(u8)dpm_table->pcie_speed_table.dpm_levels[i].value;

sys/dev/drm/radeon/ci_dpm.c

306

vid[i] = ci_convert_to_vid(pi->vddc_voltage_table.entries[i].value);

sys/dev/drm/radeon/ci_dpm.c

3325

dpm_table->sclk_table.dpm_levels[i].value,

sys/dev/drm/radeon/ci_dpm.c

3371

if (dpm_table->mclk_table.dpm_levels[i].value == 0)

sys/dev/drm/radeon/ci_dpm.c

3374

dpm_table->mclk_table.dpm_levels[i].value,

sys/dev/drm/radeon/ci_dpm.c

3422

dpm_table->dpm_levels[index].value = pcie_gen;

sys/dev/drm/radeon/ci_dpm.c

3516

(pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value !=

sys/dev/drm/radeon/ci_dpm.c

3518

pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value =

sys/dev/drm/radeon/ci_dpm.c

3529

(pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value !=

sys/dev/drm/radeon/ci_dpm.c

3531

pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value =

sys/dev/drm/radeon/ci_dpm.c

3540

pi->dpm_table.vddc_table.dpm_levels[i].value =

sys/dev/drm/radeon/ci_dpm.c

3551

pi->dpm_table.vddci_table.dpm_levels[i].value =

sys/dev/drm/radeon/ci_dpm.c

3561

pi->dpm_table.mvdd_table.dpm_levels[i].value =

sys/dev/drm/radeon/ci_dpm.c

3574

u32 value, u32 *boot_level)

sys/dev/drm/radeon/ci_dpm.c

3580

if (value == table->dpm_levels[i].value) {

sys/dev/drm/radeon/ci_dpm.c

3744

if ((dpm_table->dpm_levels[i].value < low_limit) ||

sys/dev/drm/radeon/ci_dpm.c

3745

(dpm_table->dpm_levels[i].value > high_limit))

sys/dev/drm/radeon/ci_dpm.c

3761

if ((pcie_table->dpm_levels[i].value < speed_low) ||

sys/dev/drm/radeon/ci_dpm.c

3763

(pcie_table->dpm_levels[i].value > speed_high) ||

sys/dev/drm/radeon/ci_dpm.c

3774

if ((pcie_table->dpm_levels[i].value == pcie_table->dpm_levels[j].value) &&

sys/dev/drm/radeon/ci_dpm.c

3903

if (sclk == sclk_table->dpm_levels[i].value)

sys/dev/drm/radeon/ci_dpm.c

3919

if (mclk == mclk_table->dpm_levels[i].value)

sys/dev/drm/radeon/ci_dpm.c

3945

dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value = sclk;

sys/dev/drm/radeon/ci_dpm.c

3948

dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk;

sys/dev/drm/radeon/ci_dpm.c

4746

data->value[i] = cpu_to_be32(entry->mc_data[j]);

sys/dev/drm/radeon/ci_dpm.c

4780

pi->dpm_table.mclk_table.dpm_levels[i].value,

sys/dev/drm/radeon/ci_dpm.c

572

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/ci_dpm.c

587

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/ci_dpm.h

171

u32 value;

sys/dev/drm/radeon/ci_dpm.h

336

u32 smc_address, u32 *value, u32 limit);

sys/dev/drm/radeon/ci_dpm.h

338

u32 smc_address, u32 value, u32 limit);

sys/dev/drm/radeon/ci_dpm.h

54

u32 value;

sys/dev/drm/radeon/ci_smc.c

247

u32 smc_address, u32 *value, u32 limit)

sys/dev/drm/radeon/ci_smc.c

255

*value = RREG32(SMC_IND_DATA_0);

sys/dev/drm/radeon/ci_smc.c

262

u32 smc_address, u32 value, u32 limit)

sys/dev/drm/radeon/ci_smc.c

270

WREG32(SMC_IND_DATA_0, value);

sys/dev/drm/radeon/cik_sdma.c

304

uint32_t reg_offset, value;

sys/dev/drm/radeon/cik_sdma.c

312

value = RREG32(SDMA0_CNTL + reg_offset);

sys/dev/drm/radeon/cik_sdma.c

314

value |= AUTO_CTXSW_ENABLE;

sys/dev/drm/radeon/cik_sdma.c

316

value &= ~AUTO_CTXSW_ENABLE;

sys/dev/drm/radeon/cik_sdma.c

317

WREG32(SDMA0_CNTL + reg_offset, value);

sys/dev/drm/radeon/cik_sdma.c

845

uint64_t value;

sys/dev/drm/radeon/cik_sdma.c

861

value = radeon_vm_map_gart(rdev, addr);

sys/dev/drm/radeon/cik_sdma.c

863

value = addr;

sys/dev/drm/radeon/cik_sdma.c

865

value = 0;

sys/dev/drm/radeon/cik_sdma.c

868

value |= flags;

sys/dev/drm/radeon/cik_sdma.c

869

ib->ptr[ib->length_dw++] = value;

sys/dev/drm/radeon/cik_sdma.c

870

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/radeon/cik_sdma.c

894

uint64_t value;

sys/dev/drm/radeon/cik_sdma.c

903

value = addr;

sys/dev/drm/radeon/cik_sdma.c

905

value = 0;

sys/dev/drm/radeon/cik_sdma.c

913

ib->ptr[ib->length_dw++] = value; /* value */

sys/dev/drm/radeon/cik_sdma.c

914

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/radeon/cypress_dpm.c

1092

static void cypress_wait_for_mc_sequencer(struct radeon_device *rdev, u8 value)

sys/dev/drm/radeon/cypress_dpm.c

1113

if (((RREG32(MC_SEQ_CG) & CG_SEQ_RESP_MASK) >> CG_SEQ_RESP_SHIFT) == value)

sys/dev/drm/radeon/cypress_dpm.c

1172

u32 value;

sys/dev/drm/radeon/cypress_dpm.c

1176

value = RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2);

sys/dev/drm/radeon/cypress_dpm.c

1177

WREG32(eg_pi->mc_reg_table.mc_reg_address[i].s0 << 2, value);

sys/dev/drm/radeon/cypress_dpm.c

1233

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/cypress_dpm.c

1545

eg_pi->vddc_voltage_table.entries[i].value) {

sys/dev/drm/radeon/cypress_dpm.c

405

u16 value, RV770_SMC_VOLTAGE_VALUE *voltage)

sys/dev/drm/radeon/cypress_dpm.c

410

if (value <= table->entries[i].value) {

sys/dev/drm/radeon/cypress_dpm.c

412

voltage->value = cpu_to_be16(table->entries[i].value);

sys/dev/drm/radeon/cypress_dpm.c

664

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/cypress_dpm.c

670

voltage->value = cpu_to_be16(MVDD_LOW_VALUE);

sys/dev/drm/radeon/cypress_dpm.c

673

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/cypress_dpm.c

825

data->value[i] = cpu_to_be32(entry->mc_data[j]);

sys/dev/drm/radeon/dce3_1_afmt.c

103

value = MAX_CHANNELS(sad->channels) |

sys/dev/drm/radeon/dce3_1_afmt.c

116

value |= SUPPORTED_FREQUENCIES_STEREO(stereo_freqs);

sys/dev/drm/radeon/dce3_1_afmt.c

118

WREG32_ENDPOINT(0, eld_reg_to_type[i][0], value);

sys/dev/drm/radeon/dce3_1_afmt.c

93

u32 value = 0;

sys/dev/drm/radeon/dce6_afmt.c

241

u32 value = 0;

sys/dev/drm/radeon/dce6_afmt.c

251

value = MAX_CHANNELS(sad->channels) |

sys/dev/drm/radeon/dce6_afmt.c

264

value |= SUPPORTED_FREQUENCIES_STEREO(stereo_freqs);

sys/dev/drm/radeon/dce6_afmt.c

266

WREG32_ENDPOINT(dig->pin->offset, eld_reg_to_type[i][0], value);

sys/dev/drm/radeon/dce6_afmt.c

287

u32 value = 0;

sys/dev/drm/radeon/dce6_afmt.c

290

value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);

sys/dev/drm/radeon/dce6_afmt.c

292

WREG32(DCCG_AUDIO_DTO_SOURCE, value);

sys/dev/drm/radeon/dce6_afmt.c

308

u32 value = 0;

sys/dev/drm/radeon/dce6_afmt.c

309

value |= DCCG_AUDIO_DTO_SEL;

sys/dev/drm/radeon/dce6_afmt.c

312

value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);

sys/dev/drm/radeon/dce6_afmt.c

314

WREG32(DCCG_AUDIO_DTO_SOURCE, value);

sys/dev/drm/radeon/evergreen_hdmi.c

189

u32 value = 0;

sys/dev/drm/radeon/evergreen_hdmi.c

199

value = MAX_CHANNELS(sad->channels) |

sys/dev/drm/radeon/evergreen_hdmi.c

212

value |= SUPPORTED_FREQUENCIES_STEREO(stereo_freqs);

sys/dev/drm/radeon/evergreen_hdmi.c

214

WREG32_ENDPOINT(0, eld_reg_to_type[i][0], value);

sys/dev/drm/radeon/evergreen_hdmi.c

250

u32 value;

sys/dev/drm/radeon/evergreen_hdmi.c

266

value = RREG32(DCCG_AUDIO_DTO0_CNTL) & ~DCCG_AUDIO_DTO_WALLCLOCK_RATIO_MASK;

sys/dev/drm/radeon/evergreen_hdmi.c

267

value |= DCCG_AUDIO_DTO_WALLCLOCK_RATIO(wallclock_ratio);

sys/dev/drm/radeon/evergreen_hdmi.c

268

value &= ~DCCG_AUDIO_DTO1_USE_512FBR_DTO;

sys/dev/drm/radeon/evergreen_hdmi.c

269

WREG32(DCCG_AUDIO_DTO0_CNTL, value);

sys/dev/drm/radeon/evergreen_hdmi.c

272

value = 0;

sys/dev/drm/radeon/evergreen_hdmi.c

275

value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);

sys/dev/drm/radeon/evergreen_hdmi.c

277

WREG32(DCCG_AUDIO_DTO_SOURCE, value);

sys/dev/drm/radeon/evergreen_hdmi.c

292

u32 value;

sys/dev/drm/radeon/evergreen_hdmi.c

294

value = RREG32(DCCG_AUDIO_DTO1_CNTL) & ~DCCG_AUDIO_DTO_WALLCLOCK_RATIO_MASK;

sys/dev/drm/radeon/evergreen_hdmi.c

295

value |= DCCG_AUDIO_DTO1_USE_512FBR_DTO;

sys/dev/drm/radeon/evergreen_hdmi.c

296

WREG32(DCCG_AUDIO_DTO1_CNTL, value);

sys/dev/drm/radeon/evergreen_hdmi.c

299

value = 0;

sys/dev/drm/radeon/evergreen_hdmi.c

300

value |= DCCG_AUDIO_DTO_SEL;

sys/dev/drm/radeon/evergreen_hdmi.c

303

value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);

sys/dev/drm/radeon/evergreen_hdmi.c

305

WREG32(DCCG_AUDIO_DTO_SOURCE, value);

sys/dev/drm/radeon/evergreen_smc.h

43

uint32_t value[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/radeon/kv_dpm.c

1331

u16 reg_offset, u32 value)

sys/dev/drm/radeon/kv_dpm.c

1336

(u8 *)&value, sizeof(u16), pi->sram_end);

sys/dev/drm/radeon/kv_dpm.c

1340

u16 reg_offset, u32 *value)

sys/dev/drm/radeon/kv_dpm.c

1345

value, pi->sram_end);

sys/dev/drm/radeon/kv_dpm.c

291

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/kv_dpm.c

306

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/kv_dpm.c

792

u32 value;

sys/dev/drm/radeon/kv_dpm.c

796

value = 3;

sys/dev/drm/radeon/kv_dpm.c

798

value = 2;

sys/dev/drm/radeon/kv_dpm.c

800

value = 7;

sys/dev/drm/radeon/kv_dpm.c

802

value = 6;

sys/dev/drm/radeon/kv_dpm.c

804

value = 8;

sys/dev/drm/radeon/kv_dpm.c

806

value = 0;

sys/dev/drm/radeon/kv_dpm.c

808

value = 0;

sys/dev/drm/radeon/kv_dpm.c

811

return value;

sys/dev/drm/radeon/kv_dpm.h

193

u32 *value, u32 limit);

sys/dev/drm/radeon/kv_dpm.h

48

u32 value;

sys/dev/drm/radeon/kv_smc.c

90

u32 *value, u32 limit)

sys/dev/drm/radeon/kv_smc.c

98

*value = RREG32(SMC_IND_DATA_0);

sys/dev/drm/radeon/ni_dma.c

357

uint64_t value;

sys/dev/drm/radeon/ni_dma.c

372

value = radeon_vm_map_gart(rdev, addr);

sys/dev/drm/radeon/ni_dma.c

374

value = addr;

sys/dev/drm/radeon/ni_dma.c

376

value = 0;

sys/dev/drm/radeon/ni_dma.c

379

value |= flags;

sys/dev/drm/radeon/ni_dma.c

380

ib->ptr[ib->length_dw++] = value;

sys/dev/drm/radeon/ni_dma.c

381

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/radeon/ni_dma.c

405

uint64_t value;

sys/dev/drm/radeon/ni_dma.c

414

value = addr;

sys/dev/drm/radeon/ni_dma.c

416

value = 0;

sys/dev/drm/radeon/ni_dma.c

424

ib->ptr[ib->length_dw++] = value; /* value */

sys/dev/drm/radeon/ni_dma.c

425

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/radeon/ni_dpm.c

1283

if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {

sys/dev/drm/radeon/ni_dpm.c

1301

u16 value,

sys/dev/drm/radeon/ni_dpm.c

1307

if (value <= table->entries[i].value) {

sys/dev/drm/radeon/ni_dpm.c

1309

voltage->value = cpu_to_be16(table->entries[i].value);

sys/dev/drm/radeon/ni_dpm.c

1329

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/ni_dpm.c

1335

voltage->value = cpu_to_be16(MVDD_LOW_VALUE);

sys/dev/drm/radeon/ni_dpm.c

1338

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/ni_dpm.c

1350

*std_voltage = be16_to_cpu(voltage->value);

sys/dev/drm/radeon/ni_dpm.c

1356

u16 value, u8 index,

sys/dev/drm/radeon/ni_dpm.c

1360

voltage->value = cpu_to_be16(value);

sys/dev/drm/radeon/ni_dpm.c

1676

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/ni_dpm.c

2951

data->value[i] = cpu_to_be32(entry->mc_data[j]);

sys/dev/drm/radeon/ni_dpm.c

3073

eg_pi->vddc_voltage_table.entries[j].value,

sys/dev/drm/radeon/nislands_smc.h

263

uint32_t value[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/radeon/nislands_smc.h

89

uint16_t value;

sys/dev/drm/radeon/r100.c

1278

u32 value;

sys/dev/drm/radeon/r100.c

1288

value = radeon_get_ib_value(p, idx);

sys/dev/drm/radeon/r100.c

1289

tmp = value & 0x003fffff;

sys/dev/drm/radeon/r100.c

1305

p->ib.ptr[idx] = (value & 0x3fc00000) | tmp;

sys/dev/drm/radeon/r100.c

1307

p->ib.ptr[idx] = (value & 0xffc00000) | tmp;

sys/dev/drm/radeon/r100.c

1907

u32 value;

sys/dev/drm/radeon/r100.c

1909

value = radeon_get_ib_value(p, idx + 2);

sys/dev/drm/radeon/r100.c

1910

if ((value + 1) > radeon_bo_size(robj)) {

sys/dev/drm/radeon/r100.c

1913

value + 1,

sys/dev/drm/radeon/r100.c

2938

uint32_t reg, value;

sys/dev/drm/radeon/r100.c

2948

value = RREG32(RADEON_RBBM_CMDFIFO_DATA);

sys/dev/drm/radeon/r100.c

2949

seq_printf(m, "[0x%03X] 0x%04X=0x%08X\n", i, reg, value);

sys/dev/drm/radeon/r600_hdmi.c

100

value = RREG32(R600_AUDIO_STATUS_BITS);

sys/dev/drm/radeon/r600_hdmi.c

103

status.status_bits = value & 0xff;

sys/dev/drm/radeon/r600_hdmi.c

106

status.category_code = (value >> 8) & 0xff;

sys/dev/drm/radeon/r600_hdmi.c

307

u32 value;

sys/dev/drm/radeon/r600_hdmi.c

311

value = 0; /* disable workaround */

sys/dev/drm/radeon/r600_hdmi.c

313

value = HDMI0_AUDIO_TEST_EN; /* enable workaround */

sys/dev/drm/radeon/r600_hdmi.c

315

value, ~HDMI0_AUDIO_TEST_EN);

sys/dev/drm/radeon/r600_hdmi.c

430

uint32_t value;

sys/dev/drm/radeon/r600_hdmi.c

457

value = RREG32(HDMI0_AUDIO_PACKET_CONTROL + offset);

sys/dev/drm/radeon/r600_hdmi.c

458

if (value & HDMI0_AUDIO_TEST_EN)

sys/dev/drm/radeon/r600_hdmi.c

460

value & ~HDMI0_AUDIO_TEST_EN);

sys/dev/drm/radeon/r600_hdmi.c

62

uint32_t value;

sys/dev/drm/radeon/r600_hdmi.c

64

value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);

sys/dev/drm/radeon/r600_hdmi.c

67

status.channels = (value & 0x7) + 1;

sys/dev/drm/radeon/r600_hdmi.c

70

switch ((value & 0xF0) >> 4) {

sys/dev/drm/radeon/r600_hdmi.c

88

(int)value);

sys/dev/drm/radeon/r600_hdmi.c

93

if (value & 0x4000)

sys/dev/drm/radeon/r600_hdmi.c

97

status.rate *= ((value >> 11) & 0x7) + 1;

sys/dev/drm/radeon/r600_hdmi.c

98

status.rate /= ((value >> 8) & 0x7) + 1;

sys/dev/drm/radeon/radeon_atombios.c

1352

tmds->tmds_pll[i].value =

sys/dev/drm/radeon/radeon_atombios.c

1354

tmds->tmds_pll[i].value |=

sys/dev/drm/radeon/radeon_atombios.c

1357

tmds->tmds_pll[i].value |=

sys/dev/drm/radeon/radeon_atombios.c

1360

tmds->tmds_pll[i].value |=

sys/dev/drm/radeon/radeon_atombios.c

1366

tmds->tmds_pll[i].value);

sys/dev/drm/radeon/radeon_atombios.c

3746

voltage_table->entries[i].value =

sys/dev/drm/radeon/radeon_atombios.c

3749

voltage_table->entries[i].value,

sys/dev/drm/radeon/radeon_atombios.c

3781

voltage_table->entries[i].value =

sys/dev/drm/radeon/radeon_combios.c

1318

tmds->tmds_pll[i].value =

sys/dev/drm/radeon/radeon_combios.c

1319

default_tmds_pll[rdev->family][i].value;

sys/dev/drm/radeon/radeon_combios.c

1345

tmds->tmds_pll[i].value =

sys/dev/drm/radeon/radeon_combios.c

1351

tmds->tmds_pll[i].value);

sys/dev/drm/radeon/radeon_combios.c

1359

tmds->tmds_pll[i].value =

sys/dev/drm/radeon/radeon_combios.c

1369

tmds->tmds_pll[i].value);

sys/dev/drm/radeon/radeon_connectors.c

948

uint64_t value)

sys/dev/drm/radeon/radeon_connectors.c

965

switch (value) {

sys/dev/drm/radeon/radeon_gem.c

738

args->value = robj->initial_domain;

sys/dev/drm/radeon/radeon_gem.c

741

robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |

sys/dev/drm/radeon/radeon_kms.c

189

uint32_t *value)

sys/dev/drm/radeon/radeon_kms.c

194

if (*value == 1) {

sys/dev/drm/radeon/radeon_kms.c

198

} else if (*value == 0) {

sys/dev/drm/radeon/radeon_kms.c

203

*value = *owner == applier ? 1 : 0;

sys/dev/drm/radeon/radeon_kms.c

227

uint32_t *value, value_tmp, *value_ptr, value_size;

sys/dev/drm/radeon/radeon_kms.c

232

value_ptr = (uint32_t *)((unsigned long)info->value);

sys/dev/drm/radeon/radeon_kms.c

233

value = &value_tmp;

sys/dev/drm/radeon/radeon_kms.c

238

*value = dev->pdev->device;

sys/dev/drm/radeon/radeon_kms.c

241

*value = rdev->num_gb_pipes;

sys/dev/drm/radeon/radeon_kms.c

244

*value = rdev->num_z_pipes;

sys/dev/drm/radeon/radeon_kms.c

249

*value = false;

sys/dev/drm/radeon/radeon_kms.c

251

*value = rdev->accel_working;

sys/dev/drm/radeon/radeon_kms.c

254

if (copy_from_user(value, value_ptr, sizeof(uint32_t))) {

sys/dev/drm/radeon/radeon_kms.c

260

if (crtc && crtc->base.id == *value) {

sys/dev/drm/radeon/radeon_kms.c

262

*value = radeon_crtc->crtc_id;

sys/dev/drm/radeon/radeon_kms.c

268

DRM_DEBUG_KMS("unknown crtc id %d\n", *value);

sys/dev/drm/radeon/radeon_kms.c

276

*value = 3;

sys/dev/drm/radeon/radeon_kms.c

278

*value = 2;

sys/dev/drm/radeon/radeon_kms.c

280

*value = 0;

sys/dev/drm/radeon/radeon_kms.c

283

*value = rdev->accel_working;

sys/dev/drm/radeon/radeon_kms.c

288

*value = rdev->config.cik.tile_config;

sys/dev/drm/radeon/radeon_kms.c

290

*value = rdev->config.si.tile_config;

sys/dev/drm/radeon/radeon_kms.c

292

*value = rdev->config.cayman.tile_config;

sys/dev/drm/radeon/radeon_kms.c

294

*value = rdev->config.evergreen.tile_config;

sys/dev/drm/radeon/radeon_kms.c

296

*value = rdev->config.rv770.tile_config;

sys/dev/drm/radeon/radeon_kms.c

298

*value = rdev->config.r600.tile_config;

sys/dev/drm/radeon/radeon_kms.c

311

if (copy_from_user(value, value_ptr, sizeof(uint32_t))) {

sys/dev/drm/radeon/radeon_kms.c

315

if (*value >= 2) {

sys/dev/drm/radeon/radeon_kms.c

316

DRM_DEBUG_KMS("WANT_HYPERZ: invalid value %d\n", *value);

sys/dev/drm/radeon/radeon_kms.c

319

radeon_set_filp_rights(dev, &rdev->hyperz_filp, filp, value);

sys/dev/drm/radeon/radeon_kms.c

323

if (copy_from_user(value, value_ptr, sizeof(uint32_t))) {

sys/dev/drm/radeon/radeon_kms.c

327

if (*value >= 2) {

sys/dev/drm/radeon/radeon_kms.c

328

DRM_DEBUG_KMS("WANT_CMASK: invalid value %d\n", *value);

sys/dev/drm/radeon/radeon_kms.c

331

radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, value);

sys/dev/drm/radeon/radeon_kms.c

336

*value = radeon_get_xclk(rdev) * 10;

sys/dev/drm/radeon/radeon_kms.c

338

*value = rdev->clock.spll.reference_freq * 10;

sys/dev/drm/radeon/radeon_kms.c

342

*value = rdev->config.cik.max_backends_per_se *

sys/dev/drm/radeon/radeon_kms.c

345

*value = rdev->config.si.max_backends_per_se *

sys/dev/drm/radeon/radeon_kms.c

348

*value = rdev->config.cayman.max_backends_per_se *

sys/dev/drm/radeon/radeon_kms.c

351

*value = rdev->config.evergreen.max_backends;

sys/dev/drm/radeon/radeon_kms.c

353

*value = rdev->config.rv770.max_backends;

sys/dev/drm/radeon/radeon_kms.c

355

*value = rdev->config.r600.max_backends;

sys/dev/drm/radeon/radeon_kms.c

362

*value = rdev->config.cik.max_tile_pipes;

sys/dev/drm/radeon/radeon_kms.c

364

*value = rdev->config.si.max_tile_pipes;

sys/dev/drm/radeon/radeon_kms.c

366

*value = rdev->config.cayman.max_tile_pipes;

sys/dev/drm/radeon/radeon_kms.c

368

*value = rdev->config.evergreen.max_tile_pipes;

sys/dev/drm/radeon/radeon_kms.c

370

*value = rdev->config.rv770.max_tile_pipes;

sys/dev/drm/radeon/radeon_kms.c

372

*value = rdev->config.r600.max_tile_pipes;

sys/dev/drm/radeon/radeon_kms.c

378

*value = 1;

sys/dev/drm/radeon/radeon_kms.c

382

*value = rdev->config.cik.backend_map;

sys/dev/drm/radeon/radeon_kms.c

384

*value = rdev->config.si.backend_map;

sys/dev/drm/radeon/radeon_kms.c

386

*value = rdev->config.cayman.backend_map;

sys/dev/drm/radeon/radeon_kms.c

388

*value = rdev->config.evergreen.backend_map;

sys/dev/drm/radeon/radeon_kms.c

390

*value = rdev->config.rv770.backend_map;

sys/dev/drm/radeon/radeon_kms.c

392

*value = rdev->config.r600.backend_map;

sys/dev/drm/radeon/radeon_kms.c

401

*value = RADEON_VA_RESERVED_SIZE;

sys/dev/drm/radeon/radeon_kms.c

407

*value = RADEON_IB_VM_MAX_SIZE;

sys/dev/drm/radeon/radeon_kms.c

411

*value = rdev->config.cik.max_cu_per_sh;

sys/dev/drm/radeon/radeon_kms.c

413

*value = rdev->config.si.max_cu_per_sh;

sys/dev/drm/radeon/radeon_kms.c

415

*value = rdev->config.cayman.max_pipes_per_simd;

sys/dev/drm/radeon/radeon_kms.c

417

*value = rdev->config.evergreen.max_pipes;

sys/dev/drm/radeon/radeon_kms.c

419

*value = rdev->config.rv770.max_pipes;

sys/dev/drm/radeon/radeon_kms.c

421

*value = rdev->config.r600.max_pipes;

sys/dev/drm/radeon/radeon_kms.c

431

value = (uint32_t*)&value64;

sys/dev/drm/radeon/radeon_kms.c

437

*value = rdev->config.cik.max_shader_engines;

sys/dev/drm/radeon/radeon_kms.c

439

*value = rdev->config.si.max_shader_engines;

sys/dev/drm/radeon/radeon_kms.c

441

*value = rdev->config.cayman.max_shader_engines;

sys/dev/drm/radeon/radeon_kms.c

443

*value = rdev->config.evergreen.num_ses;

sys/dev/drm/radeon/radeon_kms.c

445

*value = 1;

sys/dev/drm/radeon/radeon_kms.c

449

*value = rdev->config.cik.max_sh_per_se;

sys/dev/drm/radeon/radeon_kms.c

451

*value = rdev->config.si.max_sh_per_se;

sys/dev/drm/radeon/radeon_kms.c

456

*value = rdev->fastfb_working;

sys/dev/drm/radeon/radeon_kms.c

459

if (copy_from_user(value, value_ptr, sizeof(uint32_t))) {

sys/dev/drm/radeon/radeon_kms.c

463

switch (*value) {

sys/dev/drm/radeon/radeon_kms.c

466

*value = rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready;

sys/dev/drm/radeon/radeon_kms.c

469

*value = rdev->ring[R600_RING_TYPE_DMA_INDEX].ready;

sys/dev/drm/radeon/radeon_kms.c

470

*value |= rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX].ready;

sys/dev/drm/radeon/radeon_kms.c

473

*value = rdev->ring[R600_RING_TYPE_UVD_INDEX].ready;

sys/dev/drm/radeon/radeon_kms.c

476

*value = rdev->ring[TN_RING_TYPE_VCE1_INDEX].ready;

sys/dev/drm/radeon/radeon_kms.c

484

value = rdev->config.cik.tile_mode_array;

sys/dev/drm/radeon/radeon_kms.c

487

value = rdev->config.si.tile_mode_array;

sys/dev/drm/radeon/radeon_kms.c

496

value = rdev->config.cik.macrotile_mode_array;

sys/dev/drm/radeon/radeon_kms.c

504

*value = 1;

sys/dev/drm/radeon/radeon_kms.c

508

*value = rdev->config.cik.backend_enable_mask;

sys/dev/drm/radeon/radeon_kms.c

510

*value = rdev->config.si.backend_enable_mask;

sys/dev/drm/radeon/radeon_kms.c

519

*value = rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10;

sys/dev/drm/radeon/radeon_kms.c

521

*value = rdev->pm.default_sclk * 10;

sys/dev/drm/radeon/radeon_kms.c

524

*value = rdev->vce.fw_version;

sys/dev/drm/radeon/radeon_kms.c

527

*value = rdev->vce.fb_version;

sys/dev/drm/radeon/radeon_kms.c

530

value = (uint32_t*)&value64;

sys/dev/drm/radeon/radeon_kms.c

535

value = (uint32_t*)&value64;

sys/dev/drm/radeon/radeon_kms.c

540

value = (uint32_t*)&value64;

sys/dev/drm/radeon/radeon_kms.c

546

*value = rdev->config.cik.active_cus;

sys/dev/drm/radeon/radeon_kms.c

548

*value = rdev->config.si.active_cus;

sys/dev/drm/radeon/radeon_kms.c

550

*value = rdev->config.cayman.active_simds;

sys/dev/drm/radeon/radeon_kms.c

552

*value = rdev->config.evergreen.active_simds;

sys/dev/drm/radeon/radeon_kms.c

554

*value = rdev->config.rv770.active_simds;

sys/dev/drm/radeon/radeon_kms.c

556

*value = rdev->config.r600.active_simds;

sys/dev/drm/radeon/radeon_kms.c

558

*value = 1;

sys/dev/drm/radeon/radeon_kms.c

563

*value = radeon_get_temperature(rdev);

sys/dev/drm/radeon/radeon_kms.c

565

*value = 0;

sys/dev/drm/radeon/radeon_kms.c

570

*value = radeon_dpm_get_current_sclk(rdev) / 100;

sys/dev/drm/radeon/radeon_kms.c

572

*value = rdev->pm.current_sclk / 100;

sys/dev/drm/radeon/radeon_kms.c

577

*value = radeon_dpm_get_current_mclk(rdev) / 100;

sys/dev/drm/radeon/radeon_kms.c

579

*value = rdev->pm.current_mclk / 100;

sys/dev/drm/radeon/radeon_kms.c

582

if (copy_from_user(value, value_ptr, sizeof(uint32_t))) {

sys/dev/drm/radeon/radeon_kms.c

586

if (radeon_get_allowed_info_register(rdev, *value, value))

sys/dev/drm/radeon/radeon_kms.c

590

*value = true;

sys/dev/drm/radeon/radeon_kms.c

593

*value = atomic_read(&rdev->gpu_reset_counter);

sys/dev/drm/radeon/radeon_kms.c

599

if (copy_to_user(value_ptr, (char*)value, value_size)) {

sys/dev/drm/radeon/radeon_legacy_encoders.c

808

tmp = tmds->tmds_pll[i].value ;

sys/dev/drm/radeon/radeon_legacy_tv.c

299

uint16_t addr, uint32_t value)

sys/dev/drm/radeon/radeon_legacy_tv.c

306

WREG32(RADEON_TV_HOST_WRITE_DATA, value);

sys/dev/drm/radeon/radeon_legacy_tv.c

867

static int get_post_div(int value)

sys/dev/drm/radeon/radeon_legacy_tv.c

870

switch (value) {

sys/dev/drm/radeon/radeon_mode.h

143

uint32_t value;

sys/dev/drm/radeon/radeon_mode.h

675

u16 value;

sys/dev/drm/radeon/radeon_pm.c

592

int value;

sys/dev/drm/radeon/radeon_pm.c

597

err = kstrtoint(buf, 10, &value);

sys/dev/drm/radeon/radeon_pm.c

601

switch (value) {

sys/dev/drm/radeon/radeon_pm.c

633

u32 value;

sys/dev/drm/radeon/radeon_pm.c

635

err = kstrtou32(buf, 10, &value);

sys/dev/drm/radeon/radeon_pm.c

639

value = (value * 100) / 255;

sys/dev/drm/radeon/radeon_pm.c

641

err = rdev->asic->dpm.set_fan_speed_percent(rdev, value);

sys/dev/drm/radeon/radeon_ttm.c

1093

uint32_t value;

sys/dev/drm/radeon/radeon_ttm.c

1102

value = RREG32(RADEON_MM_DATA);

sys/dev/drm/radeon/radeon_ttm.c

1105

r = put_user(value, (uint32_t *)buf);

sys/dev/drm/radeon/rv770_dpm.c

1018

voltage->value = cpu_to_be16(MVDD_LOW_VALUE);

sys/dev/drm/radeon/rv770_dpm.c

1021

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/rv770_dpm.c

240

u16 reg_offset, u32 *value)

sys/dev/drm/radeon/rv770_dpm.c

246

value, pi->sram_end);

sys/dev/drm/radeon/rv770_dpm.c

251

u16 reg_offset, u32 value)

sys/dev/drm/radeon/rv770_dpm.c

257

value, pi->sram_end);

sys/dev/drm/radeon/rv770_dpm.c

578

voltage->value = 0;

sys/dev/drm/radeon/rv770_dpm.c

585

voltage->value = cpu_to_be16(vddc);

sys/dev/drm/radeon/rv770_dpm.c

603

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/rv770_dpm.c

609

voltage->value = cpu_to_be16(MVDD_LOW_VALUE);

sys/dev/drm/radeon/rv770_dpm.c

612

voltage->value = cpu_to_be16(MVDD_HIGH_VALUE);

sys/dev/drm/radeon/rv770_dpm.h

282

u16 reg_offset, u32 value);

sys/dev/drm/radeon/rv770_smc.c

604

u16 smc_address, u32 *value, u16 limit)

sys/dev/drm/radeon/rv770_smc.c

612

*value = RREG32(SMC_SRAM_DATA);

sys/dev/drm/radeon/rv770_smc.c

619

u16 smc_address, u32 value, u16 limit)

sys/dev/drm/radeon/rv770_smc.c

627

WREG32(SMC_SRAM_DATA, value);

sys/dev/drm/radeon/rv770_smc.h

201

u16 smc_address, u32 *value, u16 limit);

sys/dev/drm/radeon/rv770_smc.h

203

u16 smc_address, u32 value, u16 limit);

sys/dev/drm/radeon/rv770_smc.h

78

uint16_t value;

sys/dev/drm/radeon/si_dma.c

111

uint64_t value;

sys/dev/drm/radeon/si_dma.c

125

value = radeon_vm_map_gart(rdev, addr);

sys/dev/drm/radeon/si_dma.c

127

value = addr;

sys/dev/drm/radeon/si_dma.c

129

value = 0;

sys/dev/drm/radeon/si_dma.c

132

value |= flags;

sys/dev/drm/radeon/si_dma.c

133

ib->ptr[ib->length_dw++] = value;

sys/dev/drm/radeon/si_dma.c

134

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/radeon/si_dma.c

158

uint64_t value;

sys/dev/drm/radeon/si_dma.c

167

value = addr;

sys/dev/drm/radeon/si_dma.c

169

value = 0;

sys/dev/drm/radeon/si_dma.c

177

ib->ptr[ib->length_dw++] = value; /* value */

sys/dev/drm/radeon/si_dma.c

178

ib->ptr[ib->length_dw++] = upper_32_bits(value);

sys/dev/drm/radeon/si_dpm.c

1748

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage);

sys/dev/drm/radeon/si_dpm.c

1753

u16 reg_offset, u32 value);

sys/dev/drm/radeon/si_dpm.c

2759

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/drm/radeon/si_dpm.c

3187

u16 reg_offset, u32 *value)

sys/dev/drm/radeon/si_dpm.c

3192

si_pi->soft_regs_start + reg_offset, value,

sys/dev/drm/radeon/si_dpm.c

3198

u16 reg_offset, u32 value)

sys/dev/drm/radeon/si_dpm.c

3204

value, si_pi->sram_end);

sys/dev/drm/radeon/si_dpm.c

3953

voltage_table->entries[i].value = voltage_dependency_table->entries[i].v;

sys/dev/drm/radeon/si_dpm.c

4072

if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {

sys/dev/drm/radeon/si_dpm.c

4115

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage)

sys/dev/drm/radeon/si_dpm.c

4120

if (value <= table->entries[i].value) {

sys/dev/drm/radeon/si_dpm.c

4122

voltage->value = cpu_to_be16(table->entries[i].value);

sys/dev/drm/radeon/si_dpm.c

4145

voltage->value = cpu_to_be16(si_pi->mvdd_voltage_table.entries[voltage->index].value);

sys/dev/drm/radeon/si_dpm.c

4156

*std_voltage = be16_to_cpu(voltage->value);

sys/dev/drm/radeon/si_dpm.c

4164

if (be16_to_cpu(voltage->value) ==

sys/dev/drm/radeon/si_dpm.c

4179

if (be16_to_cpu(voltage->value) <=

sys/dev/drm/radeon/si_dpm.c

4202

u16 value, u8 index,

sys/dev/drm/radeon/si_dpm.c

4206

voltage->value = cpu_to_be16(value);

sys/dev/drm/radeon/si_dpm.c

5613

data->value[i] = cpu_to_be32(entry->mc_data[j]);

sys/dev/drm/radeon/si_dpm.h

41

u32 value;

sys/dev/drm/radeon/si_smc.c

283

u32 *value, u32 limit)

sys/dev/drm/radeon/si_smc.c

291

*value = RREG32(SMC_IND_DATA_0);

sys/dev/drm/radeon/si_smc.c

298

u32 value, u32 limit)

sys/dev/drm/radeon/si_smc.c

306

WREG32(SMC_IND_DATA_0, value);

sys/dev/drm/radeon/sislands_smc.h

134

uint16_t value;

sys/dev/drm/radeon/sislands_smc.h

313

uint32_t value[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/radeon/sislands_smc.h

419

u32 *value, u32 limit);

sys/dev/drm/radeon/sislands_smc.h

421

u32 value, u32 limit);

sys/dev/drm/radeon/smu7_discrete.h

419

uint32_t value[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE];

sys/dev/drm/radeon/sumo_dpm.c

367

u32 index, u32 value)

sys/dev/drm/radeon/sumo_dpm.c

370

WREG32(CG_AT_0, value);

sys/dev/drm/radeon/sumo_dpm.c

372

WREG32(CG_AT_1, value);

sys/dev/drm/radeon/sumo_dpm.c

374

WREG32(CG_AT_2, value);

sys/dev/drm/radeon/sumo_dpm.c

376

WREG32(CG_AT_3, value);

sys/dev/drm/radeon/sumo_dpm.c

378

WREG32(CG_AT_4, value);

sys/dev/drm/radeon/sumo_dpm.c

380

WREG32(CG_AT_5, value);

sys/dev/drm/radeon/sumo_dpm.c

382

WREG32(CG_AT_6, value);

sys/dev/drm/radeon/sumo_dpm.c

384

WREG32(CG_AT_7, value);

sys/dev/drm/radeon/trinity_dpm.c

1013

u32 value = RREG32_SMC(SMU_SCLK_DPM_TTT);

sys/dev/drm/radeon/trinity_dpm.c

1015

value &= ~(HT_MASK | LT_MASK);

sys/dev/drm/radeon/trinity_dpm.c

1016

value |= HT((pi->thermal_auto_throttling + 49) * 8);

sys/dev/drm/radeon/trinity_dpm.c

1017

value |= LT((pi->thermal_auto_throttling + 49 - pi->sys_info.htc_hyst_lmt) * 8);

sys/dev/drm/radeon/trinity_dpm.c

1018

WREG32_SMC(SMU_SCLK_DPM_TTT, value);

sys/dev/drm/radeon/trinity_dpm.c

1023

u32 value = RREG32_SMC(SMU_SCLK_DPM_TT_CNTL);

sys/dev/drm/radeon/trinity_dpm.c

1025

value &= ~SCLK_TT_EN_MASK;

sys/dev/drm/radeon/trinity_dpm.c

1026

value |= SCLK_TT_EN(1);

sys/dev/drm/radeon/trinity_dpm.c

1027

WREG32_SMC(SMU_SCLK_DPM_TT_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

1036

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

1042

value = RREG32_SMC(PM_I_CNTL_1);

sys/dev/drm/radeon/trinity_dpm.c

1043

value &= ~SCLK_DPM_MASK;

sys/dev/drm/radeon/trinity_dpm.c

1044

value |= SCLK_DPM(ni);

sys/dev/drm/radeon/trinity_dpm.c

1045

WREG32_SMC(PM_I_CNTL_1, value);

sys/dev/drm/radeon/trinity_dpm.c

371

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

383

value = RREG32_SMC(GFX_POWER_GATING_CNTL);

sys/dev/drm/radeon/trinity_dpm.c

384

value &= ~(SSSD_MASK | PDS_DIV_MASK);

sys/dev/drm/radeon/trinity_dpm.c

386

value |= SSSD(1);

sys/dev/drm/radeon/trinity_dpm.c

387

value |= PDS_DIV(dividers.post_div);

sys/dev/drm/radeon/trinity_dpm.c

388

WREG32_SMC(GFX_POWER_GATING_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

524

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

527

value = RREG32_SMC(PM_I_CNTL_1);

sys/dev/drm/radeon/trinity_dpm.c

528

value &= ~DS_PG_CNTL_MASK;

sys/dev/drm/radeon/trinity_dpm.c

529

value |= DS_PG_CNTL(1);

sys/dev/drm/radeon/trinity_dpm.c

530

WREG32_SMC(PM_I_CNTL_1, value);

sys/dev/drm/radeon/trinity_dpm.c

532

value = RREG32_SMC(SMU_S_PG_CNTL);

sys/dev/drm/radeon/trinity_dpm.c

533

value &= ~DS_PG_EN_MASK;

sys/dev/drm/radeon/trinity_dpm.c

534

value |= DS_PG_EN(1);

sys/dev/drm/radeon/trinity_dpm.c

535

WREG32_SMC(SMU_S_PG_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

537

value = RREG32_SMC(SMU_S_PG_CNTL);

sys/dev/drm/radeon/trinity_dpm.c

538

value &= ~DS_PG_EN_MASK;

sys/dev/drm/radeon/trinity_dpm.c

539

WREG32_SMC(SMU_S_PG_CNTL, value);

sys/dev/drm/radeon/trinity_dpm.c

541

value = RREG32_SMC(PM_I_CNTL_1);

sys/dev/drm/radeon/trinity_dpm.c

542

value &= ~DS_PG_CNTL_MASK;

sys/dev/drm/radeon/trinity_dpm.c

543

WREG32_SMC(PM_I_CNTL_1, value);

sys/dev/drm/radeon/trinity_dpm.c

593

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

601

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);

sys/dev/drm/radeon/trinity_dpm.c

602

value &= ~CLK_DIVIDER_MASK;

sys/dev/drm/radeon/trinity_dpm.c

603

value |= CLK_DIVIDER(dividers.post_div);

sys/dev/drm/radeon/trinity_dpm.c

604

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

611

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix);

sys/dev/drm/radeon/trinity_dpm.c

612

value &= ~PD_SCLK_DIVIDER_MASK;

sys/dev/drm/radeon/trinity_dpm.c

613

value |= PD_SCLK_DIVIDER(dividers.post_div);

sys/dev/drm/radeon/trinity_dpm.c

614

WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

620

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

623

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);

sys/dev/drm/radeon/trinity_dpm.c

624

value &= ~DS_DIV_MASK;

sys/dev/drm/radeon/trinity_dpm.c

625

value |= DS_DIV(divider);

sys/dev/drm/radeon/trinity_dpm.c

626

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

632

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

635

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);

sys/dev/drm/radeon/trinity_dpm.c

636

value &= ~DS_SH_DIV_MASK;

sys/dev/drm/radeon/trinity_dpm.c

637

value |= DS_SH_DIV(divider);

sys/dev/drm/radeon/trinity_dpm.c

638

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

645

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

648

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);

sys/dev/drm/radeon/trinity_dpm.c

649

value &= ~VID_MASK;

sys/dev/drm/radeon/trinity_dpm.c

650

value |= VID(vid_7bit);

sys/dev/drm/radeon/trinity_dpm.c

651

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

653

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);

sys/dev/drm/radeon/trinity_dpm.c

654

value &= ~LVRT_MASK;

sys/dev/drm/radeon/trinity_dpm.c

655

value |= LVRT(0);

sys/dev/drm/radeon/trinity_dpm.c

656

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

662

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

665

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix);

sys/dev/drm/radeon/trinity_dpm.c

666

value &= ~GNB_SLOW_MASK;

sys/dev/drm/radeon/trinity_dpm.c

667

value |= GNB_SLOW(gnb_slow);

sys/dev/drm/radeon/trinity_dpm.c

668

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

674

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

677

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix);

sys/dev/drm/radeon/trinity_dpm.c

678

value &= ~FORCE_NBPS1_MASK;

sys/dev/drm/radeon/trinity_dpm.c

679

value |= FORCE_NBPS1(force_nbp_state);

sys/dev/drm/radeon/trinity_dpm.c

680

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

686

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

689

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);

sys/dev/drm/radeon/trinity_dpm.c

690

value &= ~DISPLAY_WM_MASK;

sys/dev/drm/radeon/trinity_dpm.c

691

value |= DISPLAY_WM(wm);

sys/dev/drm/radeon/trinity_dpm.c

692

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

698

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

701

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);

sys/dev/drm/radeon/trinity_dpm.c

702

value &= ~VCE_WM_MASK;

sys/dev/drm/radeon/trinity_dpm.c

703

value |= VCE_WM(wm);

sys/dev/drm/radeon/trinity_dpm.c

704

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

710

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

713

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix);

sys/dev/drm/radeon/trinity_dpm.c

714

value &= ~AT_MASK;

sys/dev/drm/radeon/trinity_dpm.c

715

value |= AT(at);

sys/dev/drm/radeon/trinity_dpm.c

716

WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

741

u32 value;

sys/dev/drm/radeon/trinity_dpm.c

744

value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);

sys/dev/drm/radeon/trinity_dpm.c

745

value &= ~STATE_VALID_MASK;

sys/dev/drm/radeon/trinity_dpm.c

747

value |= STATE_VALID(1);

sys/dev/drm/radeon/trinity_dpm.c

748

WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);

sys/dev/drm/radeon/trinity_dpm.c

761

u32 value = RREG32_SMC(SMU_SCLK_DPM_CNTL);

sys/dev/drm/radeon/trinity_dpm.c

763

value &= ~(SCLK_DPM_EN_MASK | SCLK_DPM_BOOT_STATE_MASK | VOLTAGE_CHG_EN_MASK);

sys/dev/drm/radeon/trinity_dpm.c

764

value |= SCLK_DPM_EN(1) | SCLK_DPM_BOOT_STATE(0) | VOLTAGE_CHG_EN(1);

sys/dev/drm/radeon/trinity_dpm.c

765

WREG32_SMC(SMU_SCLK_DPM_CNTL, value);

sys/dev/misc/evdev/cdev.c

261

event.value);

sys/dev/misc/evdev/cdev.c

767

int32_t value)

sys/dev/misc/evdev/cdev.c

786

.value = 0

sys/dev/misc/evdev/cdev.c

802

client->ec_buffer[tail].value = value;

sys/dev/misc/evdev/cdev.c

840

event->code, event->value);

sys/dev/misc/evdev/evdev.c

499

.value = 0,

sys/dev/misc/evdev/evdev.c

583

evdev_set_repeat_params(struct evdev_dev *evdev, uint16_t property, int value)

sys/dev/misc/evdev/evdev.c

587

evdev->ev_rep[property] = value;

sys/dev/misc/evdev/evdev.c

600

int32_t value)

sys/dev/misc/evdev/evdev.c

636

(value < 0 || value > MAXIMAL_MT_SLOT(evdev)))

sys/dev/misc/evdev/evdev.c

685

int32_t *value)

sys/dev/misc/evdev/evdev.c

699

*value == KEY_EVENT_DOWN)

sys/dev/misc/evdev/evdev.c

700

*value = KEY_EVENT_REPEAT;

sys/dev/misc/evdev/evdev.c

703

if (bit_test(evdev->ev_key_states, code) == !*value &&

sys/dev/misc/evdev/evdev.c

705

if (*value == KEY_EVENT_DOWN)

sys/dev/misc/evdev/evdev.c

717

old_value = evdev->ev_absinfo[code].value;

sys/dev/misc/evdev/evdev.c

722

*value = evdev_mt_reassign_id(evdev,

sys/dev/misc/evdev/evdev.c

723

evdev_mt_get_last_slot(evdev), *value);

sys/dev/misc/evdev/evdev.c

733

abs_change = abs(*value - old_value);

sys/dev/misc/evdev/evdev.c

735

*value = old_value;

sys/dev/misc/evdev/evdev.c

737

*value = (old_value * 3 + *value) / 4;

sys/dev/misc/evdev/evdev.c

739

*value = (old_value + *value) / 2;

sys/dev/misc/evdev/evdev.c

746

int32_t value)

sys/dev/misc/evdev/evdev.c

758

switch (value) {

sys/dev/misc/evdev/evdev.c

761

if (bit_test(evdev->ev_key_states, code) == value)

sys/dev/misc/evdev/evdev.c

763

bit_change(evdev->ev_key_states, code, value);

sys/dev/misc/evdev/evdev.c

778

if (bit_test(evdev->ev_led_states, code) == value)

sys/dev/misc/evdev/evdev.c

780

bit_change(evdev->ev_led_states, code, value);

sys/dev/misc/evdev/evdev.c

784

bit_change(evdev->ev_snd_states, code, value);

sys/dev/misc/evdev/evdev.c

788

if (bit_test(evdev->ev_sw_states, code) == value)

sys/dev/misc/evdev/evdev.c

790

bit_change(evdev->ev_sw_states, code, value);

sys/dev/misc/evdev/evdev.c

794

if (evdev->ev_rep[code] == value)

sys/dev/misc/evdev/evdev.c

796

evdev_set_repeat_params(evdev, code, value);

sys/dev/misc/evdev/evdev.c

800

if (value == 0)

sys/dev/misc/evdev/evdev.c

809

evdev_mt_set_last_slot(evdev, value);

sys/dev/misc/evdev/evdev.c

819

== value)

sys/dev/misc/evdev/evdev.c

821

evdev_mt_set_value(evdev, last_mt_slot, code, value);

sys/dev/misc/evdev/evdev.c

830

if (evdev->ev_absinfo[code].value == value)

sys/dev/misc/evdev/evdev.c

832

evdev->ev_absinfo[code].value = value;

sys/dev/misc/evdev/evdev.c

855

int32_t value)

sys/dev/misc/evdev/evdev.c

860

evdev->ev_shortname, type, code, value);

sys/dev/misc/evdev/evdev.c

870

evdev_client_push(client, type, code, value);

sys/dev/misc/evdev/evdev.c

881

int32_t value)

sys/dev/misc/evdev/evdev.c

887

evdev_modify_event(evdev, type, code, &value);

sys/dev/misc/evdev/evdev.c

888

sparse = evdev_sparse_event(evdev, type, code, value);

sys/dev/misc/evdev/evdev.c

896

evdev_propagate_event(evdev, type, code, value);

sys/dev/misc/evdev/evdev.c

905

int32_t value)

sys/dev/misc/evdev/evdev.c

908

if (evdev_check_event(evdev, type, code, value) != 0)

sys/dev/misc/evdev/evdev.c

918

evdev_mt_record_event(evdev, type, code, value))

sys/dev/misc/evdev/evdev.c

921

evdev_send_event(evdev, type, code, value);

sys/dev/misc/evdev/evdev.c

930

int32_t value)

sys/dev/misc/evdev/evdev.c

947

type, code, value);

sys/dev/misc/evdev/evdev.c

965

ret = evdev_push_event(evdev, type, code, value);

sys/dev/misc/evdev/evdev.h

192

evdev_push_key(struct evdev_dev *evdev, uint16_t code, int32_t value)

sys/dev/misc/evdev/evdev.h

195

return (evdev_push_event(evdev, EV_KEY, code, value != 0));

sys/dev/misc/evdev/evdev.h

199

evdev_push_rel(struct evdev_dev *evdev, uint16_t code, int32_t value)

sys/dev/misc/evdev/evdev.h

202

return (evdev_push_event(evdev, EV_REL, code, value));

sys/dev/misc/evdev/evdev.h

206

evdev_push_abs(struct evdev_dev *evdev, uint16_t code, int32_t value)

sys/dev/misc/evdev/evdev.h

209

return (evdev_push_event(evdev, EV_ABS, code, value));

sys/dev/misc/evdev/evdev.h

213

evdev_push_msc(struct evdev_dev *evdev, uint16_t code, int32_t value)

sys/dev/misc/evdev/evdev.h

216

return (evdev_push_event(evdev, EV_MSC, code, value));

sys/dev/misc/evdev/evdev.h

220

evdev_push_led(struct evdev_dev *evdev, uint16_t code, int32_t value)

sys/dev/misc/evdev/evdev.h

223

return (evdev_push_event(evdev, EV_LED, code, value != 0));

sys/dev/misc/evdev/evdev.h

227

evdev_push_snd(struct evdev_dev *evdev, uint16_t code, int32_t value)

sys/dev/misc/evdev/evdev.h

230

return (evdev_push_event(evdev, EV_SND, code, value));

sys/dev/misc/evdev/evdev.h

234

evdev_push_sw(struct evdev_dev *evdev, uint16_t code, int32_t value)

sys/dev/misc/evdev/evdev.h

237

return (evdev_push_event(evdev, EV_SW, code, value != 0));

sys/dev/misc/evdev/evdev_mt.c

410

int32_t value)

sys/dev/misc/evdev/evdev_mt.c

430

KASSERT(value >= 0, ("Negative slot number"));

sys/dev/misc/evdev/evdev_mt.c

431

mt->match_slot = value;

sys/dev/misc/evdev/evdev_mt.c

436

if (value == -1)

sys/dev/misc/evdev/evdev_mt.c

444

val[ABS_MT_INDEX(code)] = value;

sys/dev/misc/evdev/evdev_mt.c

510

int32_t value)

sys/dev/misc/evdev/evdev_mt.c

517

if (value != -1)

sys/dev/misc/evdev/evdev_mt.c

522

mt->slots[slot].val[ABS_MT_INDEX(code)] = value;

sys/dev/misc/evdev/evdev_mt.c

579

evdev_mt_normalize(int32_t value, int32_t mtmin, int32_t mtmax, int32_t stmax)

sys/dev/misc/evdev/evdev_mt.c

582

value = (value - mtmin) * stmax / (mtmax - mtmin);

sys/dev/misc/evdev/evdev_mt.c

583

value = MAX(MIN(value, stmax), 0);

sys/dev/misc/evdev/evdev_mt.c

585

return (value);

sys/dev/misc/evdev/evdev_private.h

196

bit_change(bitstr_t *bitstr, int bit, int value)

sys/dev/misc/evdev/evdev_private.h

198

if (value)

sys/dev/misc/evdev/evdev_private.h

66

#define CURRENT_MT_SLOT(evdev) ((evdev)->ev_absinfo[ABS_MT_SLOT].value)

sys/dev/misc/evdev/evdev_utils.c

346

uint16_t code, int32_t value)

sys/dev/misc/evdev/evdev_utils.c

356

if (value)

sys/dev/misc/evdev/evdev_utils.c

367

delay[0] = value;

sys/dev/misc/evdev/evdev_utils.c

372

delay[1] = value;

sys/dev/misc/evdev/input.h

46

int32_t value;

sys/dev/misc/evdev/input.h

59

int32_t value;

sys/dev/misc/ipmi/ipmivars.h

200

#define OUTB_SINGLE(sc, x, value) \

sys/dev/misc/ipmi/ipmivars.h

201

bus_write_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x), value)

sys/dev/misc/ipmi/ipmivars.h

206

#define OUTB_MULTIPLE(sc, x, value) \

sys/dev/misc/ipmi/ipmivars.h

207

bus_write_1((sc)->ipmi_io_res[(x)], 0, value)

sys/dev/misc/ipmi/ipmivars.h

215

#define OUTB(sc, x, value) \

sys/dev/misc/ipmi/ipmivars.h

216

((sc)->ipmi_io_res[1] != NULL ? OUTB_MULTIPLE(sc, x, value) : \

sys/dev/misc/ipmi/ipmivars.h

217

OUTB_SINGLE(sc, x, value))

sys/dev/misc/kbd/atkbd.c

1223

int32_t value)

sys/dev/misc/kbd/atkbd.c

1260

kbd_ev_event(kbd, type, code, value);

sys/dev/misc/kbd/atkbd.c

1695

int value;

sys/dev/misc/kbd/atkbd.c

1702

value = i << 5;

sys/dev/misc/kbd/atkbd.c

1707

value |= i;

sys/dev/misc/kbd/atkbd.c

1708

return value;

sys/dev/misc/kbd/kbd.c

1501

kbd_ev_event(keyboard_t *kbd, uint16_t type, uint16_t code, int32_t value)

sys/dev/misc/kbd/kbd.c

1519

if (value)

sys/dev/misc/kbd/kbd.c

1528

delay[0] = value;

sys/dev/misc/kbd/kbd.c

1533

delay[1] = value;

sys/dev/misc/kbd/kbdreg.h

331

void kbd_ev_event(keyboard_t *kbd, uint16_t type, uint16_t code, int32_t value);

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

434

sc->sensors[i].value = 0;

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

440

sc->sensors[i].value = sdata * 1000000 + 273150000;

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

504

sc->sensors[SIO_VLM_OFF + i].value = 0;

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

521

sc->sensors[SIO_VLM_OFF + i].value = data * rfact;

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

591

nsclpcsio_gpio_pin_write(void *arg, int pin, int value)

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

618

if (value == 0)

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

620

else if (value == 1)

sys/dev/misc/syscons/scmouse.c

801

if (mouse->u.event.value < 0)

sys/dev/misc/syscons/scmouse.c

808

if (mouse->u.event.value > 0)

sys/dev/misc/syscons/scmouse.c

817

if (mouse->u.event.value > 0)

sys/dev/misc/syscons/scmouse.c

837

switch (mouse->u.event.value % 4) {

sys/dev/misc/syscons/scmouse.c

855

switch (mouse->u.event.value) {

sys/dev/misc/syscons/scmouse.c

864

switch (mouse->u.event.value) {

sys/dev/misc/syscons/sysmouse.c

520

if (info->u.event.value > 0)

sys/dev/misc/vkbd/vkbd.c

1467

int value;

sys/dev/misc/vkbd/vkbd.c

1474

value = i << 5;

sys/dev/misc/vkbd/vkbd.c

1479

value |= i;

sys/dev/misc/vkbd/vkbd.c

1480

return (value);

sys/dev/netif/ath/ath_hal/ah.c

874

OS_REG_WRITE(ah, regs->addr, regs->value);

sys/dev/netif/ath/ath_hal/ah_internal.h

59

uint32_t value; /* value to write */

sys/dev/netif/ath/ath_hal/ah_osdep.h

156

extern void OS_MARK(struct ath_hal *, u_int id, u_int32_t value);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

132

static void ar5211GetLowerUpperValues(uint16_t value,

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1814

ar5211GetLowerUpperValues(uint16_t value,

sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c

1819

uint32_t target = value * EEP_SCALE;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

238

uint32_t cwMin, chanCwMin, value;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

334

value = (AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL << AR_D_MISC_ARB_LOCKOUT_CNTRL_S)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

337

value |= AR5311_D_MISC_SEQ_NUM_CONTROL;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

338

OS_REG_WRITE(ah, AR_DMISC(q), value);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

347

value = (ahp->ah_beaconInterval

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

351

OS_REG_WRITE(ah, AR_QRDYTIMECFG(q), value | AR_Q_RDYTIMECFG_EN);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

354

value = (AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL << AR_D_MISC_ARB_LOCKOUT_CNTRL_S);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

356

value |= AR5311_D_MISC_SEQ_NUM_CONTROL;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c

357

OS_REG_WRITE(ah, AR_QMISC(q), value);

sys/dev/netif/ath/ath_hal/ar5212/ar5111.c

56

extern void ar5212GetLowerUpperValues(uint16_t value,

sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c

65

void ar5212GetLowerUpperValues(uint16_t value,

sys/dev/netif/ath/ath_hal/ar5212/ar5212_xmit.c

421

int value;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_xmit.c

432

value = (ahp->ah_beaconInterval * 70 / 100)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_xmit.c

440

if (value < 10)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_xmit.c

441

value = 10;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_xmit.c

444

__func__, value);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_xmit.c

446

SM(TU_TO_USEC(value), AR_Q_RDYTIMECFG_INT) |

sys/dev/netif/ath/ath_hal/ar5416/ar5416.h

217

uint32_t value);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c

182

ar5416BTCoexSetParameter(struct ath_hal *ah, u_int32_t type, u_int32_t value)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c

188

if (value) {

sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c

201

if (value) {

sys/dev/netif/ath/ath_hal/ar5416/ar5416_xmit.c

1396

int value;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_xmit.c

1411

value = (ahp->ah_beaconInterval * 50 / 100)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_xmit.c

1419

if (value < 10)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_xmit.c

1420

value = 10;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_xmit.c

1423

__func__, value);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_xmit.c

1425

SM(TU_TO_USEC(value), AR_Q_RDYTIMECFG_INT) |

sys/dev/netif/ath/ath_hal/ar9002/ar9285.h

54

u_int32_t value, u_int32_t type);

sys/dev/netif/ath/ath_hal/ar9002/ar9285_btcoex.c

130

ar9285BTCoexSetParameter(struct ath_hal *ah, u_int32_t type, u_int32_t value)

sys/dev/netif/ath/ath_hal/ar9002/ar9285_btcoex.c

138

if (value)

sys/dev/netif/ath/ath_hal/ar9002/ar9285_btcoex.c

148

ar5416BTCoexSetParameter(ah, type, value);

sys/dev/netif/bce/if_bcefw.h

14849

#define BCE_RV2P_PROC2_CHG_MAX_BD_PAGE(value) { \

sys/dev/netif/bce/if_bcefw.h

14851

(bce_rv2p_proc2[BCE_RV2P_PROC2_MAX_BD_PAGE_LOC] & ~0xFFFF) | (value); \

sys/dev/netif/bwn/bwn/if_bwn.c

1662

uint32_t value)

sys/dev/netif/bwn/bwn/if_bwn.c

1672

(value >> 16) & 0xffff);

sys/dev/netif/bwn/bwn/if_bwn.c

1674

BWN_WRITE_2(mac, BWN_SHM_DATA, value & 0xffff);

sys/dev/netif/bwn/bwn/if_bwn.c

1680

BWN_WRITE_4(mac, BWN_SHM_DATA, value);

sys/dev/netif/bwn/bwn/if_bwn.c

1685

uint16_t value)

sys/dev/netif/bwn/bwn/if_bwn.c

1694

BWN_WRITE_2(mac, BWN_SHM_DATA_UNALIGNED, value);

sys/dev/netif/bwn/bwn/if_bwn.c

1700

BWN_WRITE_2(mac, BWN_SHM_DATA, value);

sys/dev/netif/bwn/bwn/if_bwn.c

2379

bwn_hf_write(struct bwn_mac *mac, uint64_t value)

sys/dev/netif/bwn/bwn/if_bwn.c

2383

(value & 0x00000000ffffull));

sys/dev/netif/bwn/bwn/if_bwn.c

2385

(value & 0x0000ffff0000ull) >> 16);

sys/dev/netif/bwn/bwn/if_bwn.c

2387

(value & 0xffff00000000ULL) >> 32);

sys/dev/netif/bwn/bwn/if_bwn.c

3167

uint32_t addrext, ring32, value;

sys/dev/netif/bwn/bwn/if_bwn.c

3177

value = BWN_DMA64_TXENABLE;

sys/dev/netif/bwn/bwn/if_bwn.c

3178

value |= (addrext << BWN_DMA64_TXADDREXT_SHIFT)

sys/dev/netif/bwn/bwn/if_bwn.c

3180

BWN_DMA_WRITE(dr, BWN_DMA64_TXCTL, value);

sys/dev/netif/bwn/bwn/if_bwn.c

3189

value = BWN_DMA32_TXENABLE;

sys/dev/netif/bwn/bwn/if_bwn.c

3190

value |= (addrext << BWN_DMA32_TXADDREXT_SHIFT)

sys/dev/netif/bwn/bwn/if_bwn.c

3192

BWN_DMA_WRITE(dr, BWN_DMA32_TXCTL, value);

sys/dev/netif/bwn/bwn/if_bwn.c

3207

value = (dr->dr_frameoffset << BWN_DMA64_RXFROFF_SHIFT);

sys/dev/netif/bwn/bwn/if_bwn.c

3208

value |= BWN_DMA64_RXENABLE;

sys/dev/netif/bwn/bwn/if_bwn.c

3209

value |= (addrext << BWN_DMA64_RXADDREXT_SHIFT)

sys/dev/netif/bwn/bwn/if_bwn.c

3211

BWN_DMA_WRITE(dr, BWN_DMA64_RXCTL, value);

sys/dev/netif/bwn/bwn/if_bwn.c

3221

value = (dr->dr_frameoffset << BWN_DMA32_RXFROFF_SHIFT);

sys/dev/netif/bwn/bwn/if_bwn.c

3222

value |= BWN_DMA32_RXENABLE;

sys/dev/netif/bwn/bwn/if_bwn.c

3223

value |= (addrext << BWN_DMA32_RXADDREXT_SHIFT)

sys/dev/netif/bwn/bwn/if_bwn.c

3225

BWN_DMA_WRITE(dr, BWN_DMA32_RXCTL, value);

sys/dev/netif/bwn/bwn/if_bwn.c

3303

uint32_t value;

sys/dev/netif/bwn/bwn/if_bwn.c

3310

value = BWN_READ_4(mac, base + offset);

sys/dev/netif/bwn/bwn/if_bwn.c

3312

value &= BWN_DMA64_TXSTAT;

sys/dev/netif/bwn/bwn/if_bwn.c

3313

if (value == BWN_DMA64_TXSTAT_DISABLED ||

sys/dev/netif/bwn/bwn/if_bwn.c

3314

value == BWN_DMA64_TXSTAT_IDLEWAIT ||

sys/dev/netif/bwn/bwn/if_bwn.c

3315

value == BWN_DMA64_TXSTAT_STOPPED)

sys/dev/netif/bwn/bwn/if_bwn.c

3318

value &= BWN_DMA32_TXSTATE;

sys/dev/netif/bwn/bwn/if_bwn.c

3319

if (value == BWN_DMA32_TXSTAT_DISABLED ||

sys/dev/netif/bwn/bwn/if_bwn.c

3320

value == BWN_DMA32_TXSTAT_IDLEWAIT ||

sys/dev/netif/bwn/bwn/if_bwn.c

3321

value == BWN_DMA32_TXSTAT_STOPPED)

sys/dev/netif/bwn/bwn/if_bwn.c

3331

value = BWN_READ_4(mac, base + offset);

sys/dev/netif/bwn/bwn/if_bwn.c

3333

value &= BWN_DMA64_TXSTAT;

sys/dev/netif/bwn/bwn/if_bwn.c

3334

if (value == BWN_DMA64_TXSTAT_DISABLED) {

sys/dev/netif/bwn/bwn/if_bwn.c

3339

value &= BWN_DMA32_TXSTATE;

sys/dev/netif/bwn/bwn/if_bwn.c

3340

if (value == BWN_DMA32_TXSTAT_DISABLED) {

sys/dev/netif/bwn/bwn/if_bwn.c

3361

uint32_t value;

sys/dev/netif/bwn/bwn/if_bwn.c

3370

value = BWN_READ_4(mac, base + offset);

sys/dev/netif/bwn/bwn/if_bwn.c

3372

value &= BWN_DMA64_RXSTAT;

sys/dev/netif/bwn/bwn/if_bwn.c

3373

if (value == BWN_DMA64_RXSTAT_DISABLED) {

sys/dev/netif/bwn/bwn/if_bwn.c

3378

value &= BWN_DMA32_RXSTATE;

sys/dev/netif/bwn/bwn/if_bwn.c

3379

if (value == BWN_DMA32_RXSTAT_DISABLED) {

sys/dev/netif/bwn/bwn/if_bwn.c

3553

uint32_t mask = 0x1f, set = 0xf, value;

sys/dev/netif/bwn/bwn/if_bwn.c

3573

value = siba_gpio_get(sc->sc_dev);

sys/dev/netif/bwn/bwn/if_bwn.c

3574

if (value == -1)

sys/dev/netif/bwn/bwn/if_bwn.c

3576

siba_gpio_set(sc->sc_dev, (value & mask) | set);

sys/dev/netif/bwn/bwn/if_bwn.c

3727

uint16_t value;

sys/dev/netif/bwn/bwn/if_bwn.c

3749

value = (ofdm ? 0x41 : 0x40);

sys/dev/netif/bwn/bwn/if_bwn.c

3750

BWN_WRITE_2(mac, 0x050c, value);

sys/dev/netif/bwn/bwn/if_bwn.c

3783

value = BWN_READ_2(mac, 0x050e);

sys/dev/netif/bwn/bwn/if_bwn.c

3784

if (value & 0x0080)

sys/dev/netif/bwn/bwn/if_bwn.c

3789

value = BWN_READ_2(mac, 0x050e);

sys/dev/netif/bwn/bwn/if_bwn.c

3790

if (value & 0x0400)

sys/dev/netif/bwn/bwn/if_bwn.c

3795

value = BWN_READ_2(mac, 0x0690);

sys/dev/netif/bwn/bwn/if_bwn.c

3796

if (!(value & 0x0100))

sys/dev/netif/bwn/bwn/if_bwn.c

4638

uint16_t kidx, value;

sys/dev/netif/bwn/bwn/if_bwn.c

4646

value = key[i];

sys/dev/netif/bwn/bwn/if_bwn.c

4647

value |= (uint16_t)(key[i + 1]) << 8;

sys/dev/netif/bwn/bwn/if_bwn.c

4648

bwn_shm_write_2(mac, BWN_SHARED, offset + i, value);

sys/dev/netif/bwn/bwn/if_bwn.c

6139

bwn_pio_rx_write_2(struct bwn_pio_rxqueue *prq, uint16_t offset, uint16_t value)

sys/dev/netif/bwn/bwn/if_bwn.c

6142

BWN_WRITE_2(prq->prq_mac, prq->prq_base + offset, value);

sys/dev/netif/bwn/bwn/if_bwn.c

6146

bwn_pio_rx_write_4(struct bwn_pio_rxqueue *prq, uint16_t offset, uint32_t value)

sys/dev/netif/bwn/bwn/if_bwn.c

6149

BWN_WRITE_4(prq->prq_mac, prq->prq_base + offset, value);

sys/dev/netif/bwn/bwn/if_bwn.c

6576

uint32_t value = 0;

sys/dev/netif/bwn/bwn/if_bwn.c

6592

value |= (uint32_t)(*data) << 16;

sys/dev/netif/bwn/bwn/if_bwn.c

6596

value |= (uint32_t)(*data) << 8;

sys/dev/netif/bwn/bwn/if_bwn.c

6599

value |= (uint32_t)(*data);

sys/dev/netif/bwn/bwn/if_bwn.c

6602

bwn_pio_write_4(mac, tq, BWN_PIO8_TXDATA, value);

sys/dev/netif/bwn/bwn/if_bwn.c

6610

uint16_t offset, uint32_t value)

sys/dev/netif/bwn/bwn/if_bwn.c

6613

BWN_WRITE_4(mac, tq->tq_base + offset, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

190

uint16_t value, int delay, int timeout)

sys/dev/netif/bwn/bwn/if_bwn_phy_common.c

197

if ((val & mask) == value)

sys/dev/netif/bwn/bwn/if_bwn_phy_common.h

37

uint16_t mask, uint16_t value, int delay, int timeout);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1878

uint16_t value)

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1890

BWN_PHY_WRITE(mac, BWN_PHY_OTABLEI, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1895

uint32_t value)

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1908

BWN_PHY_WRITE(mac, BWN_PHY_OTABLEI, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1909

BWN_PHY_WRITE(mac, BWN_PHY_OTABLEQ, (value >> 16));

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1914

uint16_t value)

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1918

BWN_PHY_WRITE(mac, BWN_PHY_GTABDATA, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1924

uint16_t value;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1929

value = (uint8_t) (ctl->q);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1930

value |= ((uint8_t) (ctl->i)) << 8;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1931

BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

1987

uint16_t *value, uint16_t *pad_mix_gain)

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2012

if (value)

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2013

*value = v;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2525

uint16_t pad, reg, value;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2531

reg = bwn_lo_txctl_regtable(mac, &value, &pad);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

2533

BWN_RF_SETMASK(mac, reg, ~value, (rfatt->padmix ? value :0));

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

3230

uint16_t nr_written = 0, tmp, value;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

3248

value = (uint16_t) pg->pg_tssi2dbm[i];

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

3249

value |= ((uint16_t) pg->pg_tssi2dbm[i + 1]) << 8;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

3250

BWN_PHY_WRITE(mac, 0x380 + (i / 2), value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

500

bwn_phy_g_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

504

BWN_WRITE_2(mac, BWN_PHYDATA, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

517

bwn_phy_g_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

522

BWN_WRITE_2(mac, BWN_RFDATALO, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

965

uint16_t offset, value;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

972

value = 0x2120;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

974

BWN_PHY_WRITE(mac, offset, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.c

975

value += 0x202;

sys/dev/netif/bwn/bwn/if_bwn_phy_g.h

42

extern void bwn_phy_g_write(struct bwn_mac *mac, uint16_t reg, uint16_t value);

sys/dev/netif/bwn/bwn/if_bwn_phy_g.h

44

extern void bwn_phy_g_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1153

uint16_t tssinpt, tssiidx, value[2];

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1217

value[0] = (rxcomp >> 10) & 0x3ff;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1218

value[1] = rxcomp & 0x3ff;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1219

bwn_tab_write_multi(mac, BWN_TAB_2(0, 80), 2, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1275

uint16_t value;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1323

BWN_PHY_WRITE(mac, v1[i].reg, v1[i].value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1570

uint8_t value[6];

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1610

BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1650

((uint16_t)(f->value[1]) << 4) | f->value[0]);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1652

((uint16_t)(f->value[3]) << 4) | f->value[2]);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1653

BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL10, f->value[4]);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1654

BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL11, f->value[5]);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1710

BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1713

BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1726

BWN_RF_WRITE(mac, v2[i].reg, v2[i].value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1880

bwn_phy_lp_roundup(uint32_t value, uint32_t div, uint8_t pre)

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

1887

for (i = 0, q = value / div, r = value % div; i < pre; i++) {

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2108

uint32_t offset, type, value;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2121

value = *data;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2123

KASSERT(!(value & ~0xff),

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2125

BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2128

value = *((const uint16_t *)data);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2130

KASSERT(!(value & ~0xffff),

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2132

BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2135

value = *((const uint32_t *)data);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2137

BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATAHI, value >> 16);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

2138

BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3417

bwn_tab_write(struct bwn_mac *mac, uint32_t typeoffset, uint32_t value)

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3427

KASSERT(!(value & ~0xff), ("%s:%d: fail", __func__, __LINE__));

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3429

BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3432

KASSERT(!(value & ~0xffff),

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3435

BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3439

BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATAHI, value >> 16);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3440

BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3546

uint32_t offset, type, value;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3555

value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO) & 0xff;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3559

value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3563

value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATAHI);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3564

value <<= 16;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3565

value |= BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3569

value = 0;

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

3572

return (value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

495

bwn_phy_lp_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

499

BWN_WRITE_2(mac, BWN_PHYDATA, value);

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

526

bwn_phy_lp_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)

sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c

531

BWN_WRITE_2(mac, BWN_RFDATALO, value);

sys/dev/netif/bwn/bwn/if_bwnvar.h

146

#define BWN_PIO_WRITE_2(mac, tq, offset, value) \

sys/dev/netif/bwn/bwn/if_bwnvar.h

147

BWN_WRITE_2(mac, (tq)->tq_base + offset, value)

sys/dev/netif/bwn/bwn/if_bwnvar.h

157

#define BWN_DMA_WRITE(dr, offset, value) \

sys/dev/netif/bwn/bwn/if_bwnvar.h

158

(BWN_WRITE_4(dr->dr_mac, dr->dr_base + offset, value))

sys/dev/netif/bwn/siba/siba_core.c

1350

siba_cc_pll_write(struct siba_cc *scc, uint32_t offset, uint32_t value)

sys/dev/netif/bwn/siba/siba_core.c

1354

SIBA_CC_WRITE32(scc, SIBA_CC_PLLCTL_DATA, value);

sys/dev/netif/bwn/siba/siba_core.c

2148

siba_pcicore_write_4(struct siba_pci *spc, uint16_t offset, uint32_t value)

sys/dev/netif/bwn/siba/siba_core.c

2151

siba_write_4_sub(spc->spc_dev, offset, value);

sys/dev/netif/bwn/siba/siba_core.c

2600

siba_write_sprom(device_t dev, device_t child, int which, uintptr_t value)

sys/dev/netif/bwn/siba/siba_core.c

2607

siba->siba_sprom.rev = value;

sys/dev/netif/bwn/siba/siba_core.c

2610

siba->siba_sprom.mii_eth0 = value;

sys/dev/netif/bwn/siba/siba_core.c

2613

siba->siba_sprom.mii_eth1 = value;

sys/dev/netif/bwn/siba/siba_core.c

2616

siba->siba_sprom.mdio_eth0 = value;

sys/dev/netif/bwn/siba/siba_core.c

2619

siba->siba_sprom.mdio_eth1 = value;

sys/dev/netif/bwn/siba/siba_core.c

2622

siba->siba_sprom.brev = value;

sys/dev/netif/bwn/siba/siba_core.c

2625

siba->siba_sprom.ccode = value;

sys/dev/netif/bwn/siba/siba_core.c

2628

siba->siba_sprom.ant_a = value;

sys/dev/netif/bwn/siba/siba_core.c

2631

siba->siba_sprom.ant_bg = value;

sys/dev/netif/bwn/siba/siba_core.c

2634

siba->siba_sprom.pa0b0 = value;

sys/dev/netif/bwn/siba/siba_core.c

2637

siba->siba_sprom.pa0b1 = value;

sys/dev/netif/bwn/siba/siba_core.c

2640

siba->siba_sprom.pa0b2 = value;

sys/dev/netif/bwn/siba/siba_core.c

2643

siba->siba_sprom.pa1b0 = value;

sys/dev/netif/bwn/siba/siba_core.c

2646

siba->siba_sprom.pa1b1 = value;

sys/dev/netif/bwn/siba/siba_core.c

2649

siba->siba_sprom.pa1b2 = value;

sys/dev/netif/bwn/siba/siba_core.c

2652

siba->siba_sprom.pa1lob0 = value;

sys/dev/netif/bwn/siba/siba_core.c

2655

siba->siba_sprom.pa1lob1 = value;

sys/dev/netif/bwn/siba/siba_core.c

2658

siba->siba_sprom.pa1lob2 = value;

sys/dev/netif/bwn/siba/siba_core.c

2661

siba->siba_sprom.pa1hib0 = value;

sys/dev/netif/bwn/siba/siba_core.c

2664

siba->siba_sprom.pa1hib1 = value;

sys/dev/netif/bwn/siba/siba_core.c

2667

siba->siba_sprom.pa1hib2 = value;

sys/dev/netif/bwn/siba/siba_core.c

2670

siba->siba_sprom.gpio0 = value;

sys/dev/netif/bwn/siba/siba_core.c

2673

siba->siba_sprom.gpio1 = value;

sys/dev/netif/bwn/siba/siba_core.c

2676

siba->siba_sprom.gpio2 = value;

sys/dev/netif/bwn/siba/siba_core.c

2679

siba->siba_sprom.gpio3 = value;

sys/dev/netif/bwn/siba/siba_core.c

2682

siba->siba_sprom.maxpwr_al = value;

sys/dev/netif/bwn/siba/siba_core.c

2685

siba->siba_sprom.maxpwr_a = value;

sys/dev/netif/bwn/siba/siba_core.c

2688

siba->siba_sprom.maxpwr_ah = value;

sys/dev/netif/bwn/siba/siba_core.c

2691

siba->siba_sprom.maxpwr_bg = value;

sys/dev/netif/bwn/siba/siba_core.c

2694

siba->siba_sprom.rxpo2g = value;

sys/dev/netif/bwn/siba/siba_core.c

2697

siba->siba_sprom.rxpo5g = value;

sys/dev/netif/bwn/siba/siba_core.c

2700

siba->siba_sprom.tssi_a = value;

sys/dev/netif/bwn/siba/siba_core.c

2703

siba->siba_sprom.tssi_bg = value;

sys/dev/netif/bwn/siba/siba_core.c

2706

siba->siba_sprom.tri2g = value;

sys/dev/netif/bwn/siba/siba_core.c

2709

siba->siba_sprom.tri5gl = value;

sys/dev/netif/bwn/siba/siba_core.c

2712

siba->siba_sprom.tri5g = value;

sys/dev/netif/bwn/siba/siba_core.c

2715

siba->siba_sprom.tri5gh = value;

sys/dev/netif/bwn/siba/siba_core.c

2718

siba->siba_sprom.rssisav2g = value;

sys/dev/netif/bwn/siba/siba_core.c

2721

siba->siba_sprom.rssismc2g = value;

sys/dev/netif/bwn/siba/siba_core.c

2724

siba->siba_sprom.rssismf2g = value;

sys/dev/netif/bwn/siba/siba_core.c

2727

siba->siba_sprom.bxa2g = value;

sys/dev/netif/bwn/siba/siba_core.c

2730

siba->siba_sprom.rssisav5g = value;

sys/dev/netif/bwn/siba/siba_core.c

2733

siba->siba_sprom.rssismc5g = value;

sys/dev/netif/bwn/siba/siba_core.c

2736

siba->siba_sprom.rssismf5g = value;

sys/dev/netif/bwn/siba/siba_core.c

2739

siba->siba_sprom.bxa5g = value;

sys/dev/netif/bwn/siba/siba_core.c

2742

siba->siba_sprom.cck2gpo = value;

sys/dev/netif/bwn/siba/siba_core.c

2745

siba->siba_sprom.ofdm2gpo = value;

sys/dev/netif/bwn/siba/siba_core.c

2748

siba->siba_sprom.ofdm5glpo = value;

sys/dev/netif/bwn/siba/siba_core.c

2751

siba->siba_sprom.ofdm5gpo = value;

sys/dev/netif/bwn/siba/siba_core.c

2754

siba->siba_sprom.ofdm5ghpo = value;

sys/dev/netif/bwn/siba/siba_core.c

2757

siba->siba_sprom.bf_lo = value;

sys/dev/netif/bwn/siba/siba_core.c

2760

siba->siba_sprom.bf_hi = value;

sys/dev/netif/bwn/siba/siba_core.c

2763

siba->siba_sprom.bf2_lo = value;

sys/dev/netif/bwn/siba/siba_core.c

2766

siba->siba_sprom.bf2_hi = value;

sys/dev/netif/bwn/siba/siba_core.c

2791

siba_gpio_set(device_t dev, uint32_t value)

sys/dev/netif/bwn/siba/siba_core.c

2801

siba_write_4_sub(gpiodev, SIBA_GPIOCTL, value);

sys/dev/netif/bwn/siba/siba_core.c

658

siba_pci_write_2(struct siba_dev_softc *sd, uint16_t offset, uint16_t value)

sys/dev/netif/bwn/siba/siba_core.c

665

SIBA_WRITE_2(siba, offset, value);

sys/dev/netif/bwn/siba/siba_core.c

669

siba_pci_write_4(struct siba_dev_softc *sd, uint16_t offset, uint32_t value)

sys/dev/netif/bwn/siba/siba_core.c

676

SIBA_WRITE_4(siba, offset, value);

sys/dev/netif/bwn/siba/siba_core.c

850

siba_write_2(device_t dev, uint16_t offset, uint16_t value)

sys/dev/netif/bwn/siba/siba_core.c

854

sd->sd_ops->write_2(sd, offset, value);

sys/dev/netif/bwn/siba/siba_core.c

858

siba_write_4(device_t dev, uint16_t offset, uint32_t value)

sys/dev/netif/bwn/siba/siba_core.c

862

return (siba_write_4_sub(sd, offset, value));

sys/dev/netif/bwn/siba/siba_core.c

866

siba_write_4_sub(struct siba_dev_softc *sd, uint16_t offset, uint32_t value)

sys/dev/netif/bwn/siba/siba_core.c

869

sd->sd_ops->write_4(sd, offset, value);

sys/dev/netif/fxp/if_fxp.c

2017

int value;

sys/dev/netif/fxp/if_fxp.c

2022

while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0

sys/dev/netif/fxp/if_fxp.c

2029

return (value & 0xffff);

sys/dev/netif/fxp/if_fxp.c

2033

fxp_miibus_writereg(device_t dev, int phy, int reg, int value)

sys/dev/netif/fxp/if_fxp.c

2040

(value & 0xffff));

sys/dev/netif/fxp/if_fxp.c

233

int value);

sys/dev/netif/ig_hal/e1000_82543.c

1453

static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset, u32 value)

sys/dev/netif/ig_hal/e1000_82543.c

1461

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);

sys/dev/netif/ig_hal/e1000_82543.c

1466

e1000_write_vfta_generic(hw, offset, value);

sys/dev/netif/ig_hal/e1000_82543.c

65

u32 value);

sys/dev/netif/ig_hal/e1000_82575.c

3218

void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value)

sys/dev/netif/ig_hal/e1000_82575.c

3225

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);

sys/dev/netif/ig_hal/e1000_82575.h

496

void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value);

sys/dev/netif/ig_hal/e1000_api.c

586

void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)

sys/dev/netif/ig_hal/e1000_api.c

589

hw->mac.ops.write_vfta(hw, offset, value);

sys/dev/netif/ig_hal/e1000_api.h

63

void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);

sys/dev/netif/ig_hal/e1000_hw.h

1063

s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_hw.h

1064

s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_hw.h

1065

void e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_hw.h

1066

void e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_hw.h

947

u16 value;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1087

u32 value, scale;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1090

value = ltr & E1000_LTRV_VALUE_MASK;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1093

return value * (1ULL << (scale * E1000_LTRV_SCALE_FACTOR));

sys/dev/netif/ig_hal/e1000_ich8lan.c

1129

s64 value;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1160

value = lat_ns;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1162

while (value > E1000_LTRV_VALUE_MASK) {

sys/dev/netif/ig_hal/e1000_ich8lan.c

1164

value = E1000_DIVIDE_ROUND_UP(value, (1 << 5));

sys/dev/netif/ig_hal/e1000_ich8lan.c

1170

lat_enc = (u16)((scale << E1000_LTRV_SCALE_SHIFT) | value);

sys/dev/netif/ig_hal/e1000_ich8lan.c

3537

dev_spec->shadow_ram[offset + i].value;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3565

dev_spec->shadow_ram[offset + i].value;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3570

dev_spec->shadow_ram[offset + i + 1].value;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3627

data[i] = dev_spec->shadow_ram[offset + i].value;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4033

dev_spec->shadow_ram[offset + i].value = data[i];

sys/dev/netif/ig_hal/e1000_ich8lan.c

4105

dword |= (dev_spec->shadow_ram[i].value & 0xffff);

sys/dev/netif/ig_hal/e1000_ich8lan.c

4109

dword |= ((dev_spec->shadow_ram[i + 1].value & 0xffff)

sys/dev/netif/ig_hal/e1000_ich8lan.c

4182

dev_spec->shadow_ram[i].value = 0xFFFF;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4258

data = dev_spec->shadow_ram[i].value;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4335

dev_spec->shadow_ram[i].value = 0xFFFF;

sys/dev/netif/ig_hal/e1000_ich8lan.c

696

dev_spec->shadow_ram[i].value = 0xFFFF;

sys/dev/netif/ig_hal/e1000_mac.c

360

void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)

sys/dev/netif/ig_hal/e1000_mac.c

364

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);

sys/dev/netif/ig_hal/e1000_mac.h

94

void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);

sys/dev/netif/ig_hal/e1000_osdep.c

101

e1000_write_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)

sys/dev/netif/ig_hal/e1000_osdep.c

110

pci_write_config(dev, pcie_ptr + reg, *value, 2);

sys/dev/netif/ig_hal/e1000_osdep.c

58

e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)

sys/dev/netif/ig_hal/e1000_osdep.c

60

pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2);

sys/dev/netif/ig_hal/e1000_osdep.c

64

e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)

sys/dev/netif/ig_hal/e1000_osdep.c

66

*value = pci_read_config(((struct e1000_osdep *)hw->back)->dev, reg, 2);

sys/dev/netif/ig_hal/e1000_osdep.c

87

e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)

sys/dev/netif/ig_hal/e1000_osdep.c

96

*value = pci_read_config(dev, pcie_ptr + reg, 2);

sys/dev/netif/ig_hal/e1000_osdep.h

104

#define E1000_WRITE_OFFSET(hw, offset, value) \

sys/dev/netif/ig_hal/e1000_osdep.h

106

((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset, value)

sys/dev/netif/ig_hal/e1000_osdep.h

115

#define E1000_WRITE_REG(hw, reg, value) \

sys/dev/netif/ig_hal/e1000_osdep.h

118

E1000_REGISTER(hw, reg), value)

sys/dev/netif/ig_hal/e1000_osdep.h

125

#define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \

sys/dev/netif/ig_hal/e1000_osdep.h

128

E1000_REGISTER(hw, reg) + ((index)<< 2), value)

sys/dev/netif/ig_hal/e1000_osdep.h

138

#define E1000_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \

sys/dev/netif/ig_hal/e1000_osdep.h

141

E1000_REGISTER(hw, reg) + index, value)

sys/dev/netif/ig_hal/e1000_osdep.h

143

#define E1000_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \

sys/dev/netif/ig_hal/e1000_osdep.h

146

E1000_REGISTER(hw, reg) + (index << 1), value)

sys/dev/netif/ig_hal/e1000_osdep.h

148

#define E1000_WRITE_REG_IO(hw, reg, value) do {\

sys/dev/netif/ig_hal/e1000_osdep.h

154

(hw)->io_base + 4, value); } while (0)

sys/dev/netif/ig_hal/e1000_osdep.h

164

#define E1000_WRITE_FLASH_REG(hw, reg, value) \

sys/dev/netif/ig_hal/e1000_osdep.h

166

((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)

sys/dev/netif/ig_hal/e1000_osdep.h

168

#define E1000_WRITE_FLASH_REG16(hw, reg, value) \

sys/dev/netif/ig_hal/e1000_osdep.h

170

((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)

sys/dev/netif/ig_hal/e1000_vf.h

292

s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/iwm/if_iwmreg.h

4116

uint16_t value;

sys/dev/netif/ix/ixgbe_82599.c

1692

#define IXGBE_WRITE_REG_BE32(a, reg, value) \

sys/dev/netif/ix/ixgbe_82599.c

1693

IXGBE_WRITE_REG((a), (reg), IXGBE_STORE_AS_BE32(IXGBE_NTOHL(value)))

sys/dev/netif/ix/ixgbe_api.c

1409

s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value)

sys/dev/netif/ix/ixgbe_api.c

1412

(hw, addr, value), IXGBE_NOT_IMPLEMENTED);

sys/dev/netif/ix/ixgbe_api.h

201

s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value);

sys/dev/netif/ix/ixgbe_common.c

3222

u16 value;

sys/dev/netif/ix/ixgbe_common.c

3262

value = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_STATUS);

sys/dev/netif/ix/ixgbe_common.c

3265

if (!(value & IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING))

sys/dev/netif/ix/ixgbe_common.c

4795

u16 value;

sys/dev/netif/ix/ixgbe_common.c

4823

value = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_STATUS);

sys/dev/netif/ix/ixgbe_common.c

4826

if (!(value & IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING))

sys/dev/netif/ix/ixgbe_common.c

5067

s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value)

sys/dev/netif/ix/ixgbe_common.c

5087

*value = status & BYPASS_CTL2_DATA_M;

sys/dev/netif/ix/ixgbe_common.h

175

s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value);

sys/dev/netif/ix/ixgbe_common.h

39

#define IXGBE_WRITE_REG64(hw, reg, value) \

sys/dev/netif/ix/ixgbe_common.h

41

IXGBE_WRITE_REG(hw, reg, (u32) value); \

sys/dev/netif/ix/ixgbe_common.h

42

IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \

sys/dev/netif/ix/ixgbe_osdep_pf.c

54

ixgbe_write_pci_cfg_pf(struct ixgbe_hw *hw, u32 reg, u16 value)

sys/dev/netif/ix/ixgbe_osdep_pf.c

56

pci_write_config(((struct ix_softc *)hw->back)->dev, reg, value, 2);

sys/dev/netif/ix/ixgbe_type.h

3981

s32 (*bypass_rd_eep) (struct ixgbe_hw *hw, u32 addr, u8 *value);

sys/dev/netif/ix/ixgbe_type.h

4026

u8 *value);

sys/dev/netif/ix/ixgbe_type.h

4028

u8 value);

sys/dev/netif/ix/ixgbe_x550.c

114

static s32 ixgbe_read_cs4227(struct ixgbe_hw *hw, u16 reg, u16 *value)

sys/dev/netif/ix/ixgbe_x550.c

116

return hw->link.ops.read_link_unlocked(hw, hw->link.addr, reg, value);

sys/dev/netif/ix/ixgbe_x550.c

127

static s32 ixgbe_write_cs4227(struct ixgbe_hw *hw, u16 reg, u16 value)

sys/dev/netif/ix/ixgbe_x550.c

129

return hw->link.ops.write_link_unlocked(hw, hw->link.addr, reg, value);

sys/dev/netif/ix/ixgbe_x550.c

140

static s32 ixgbe_read_pe(struct ixgbe_hw *hw, u8 reg, u8 *value)

sys/dev/netif/ix/ixgbe_x550.c

144

status = ixgbe_read_i2c_byte_unlocked(hw, reg, IXGBE_PE, value);

sys/dev/netif/ix/ixgbe_x550.c

159

static s32 ixgbe_write_pe(struct ixgbe_hw *hw, u8 reg, u8 value)

sys/dev/netif/ix/ixgbe_x550.c

163

status = ixgbe_write_i2c_byte_unlocked(hw, reg, IXGBE_PE, value);

sys/dev/netif/ix/ixgbe_x550.c

181

u16 value;

sys/dev/netif/ix/ixgbe_x550.c

223

&value);

sys/dev/netif/ix/ixgbe_x550.c

225

value == IXGBE_CS4227_EEPROM_LOAD_OK)

sys/dev/netif/ix/ixgbe_x550.c

235

status = ixgbe_read_cs4227(hw, IXGBE_CS4227_EEPROM_STATUS, &value);

sys/dev/netif/ix/ixgbe_x550.c

237

!(value & IXGBE_CS4227_EEPROM_LOAD_OK)) {

sys/dev/netif/ix/ixgbe_x550.c

254

u16 value = 0;

sys/dev/netif/ix/ixgbe_x550.c

267

status = ixgbe_read_cs4227(hw, IXGBE_CS4227_SCRATCH, &value);

sys/dev/netif/ix/ixgbe_x550.c

270

value == IXGBE_CS4227_RESET_COMPLETE)

sys/dev/netif/ix/ixgbe_x550.c

274

value != IXGBE_CS4227_RESET_PENDING)

sys/dev/netif/ix/ixgbe_x550.c

3208

u32 value = IXGBE_READ_REG(hw, reg);

sys/dev/netif/ix/ixgbe_x550.c

3210

data[current_word] = (u16)(value & 0xffff);

sys/dev/netif/ix/ixgbe_x550.c

3214

value >>= 16;

sys/dev/netif/ix/ixgbe_x550.c

3215

data[current_word] = (u16)(value & 0xffff);

sys/dev/netif/oce/oce_sysctl.c

168

int value = 0;

sys/dev/netif/oce/oce_sysctl.c

172

status = sysctl_handle_int(oidp, &value, 0, req);

sys/dev/netif/oce/oce_sysctl.c

176

if (value != 1) {

sys/dev/netif/re/re.c

31467

u_int32_t value = 0;

sys/dev/netif/re/re.c

31470

value = re_eri_read(sc, addr, len, ERIAR_OOB);

sys/dev/netif/re/re.c

31472

value = OCP_read_with_oob_base_address(sc, addr, len, RTL8168FP_OOBMAC_BASE);

sys/dev/netif/re/re.c

31474

value = real_ocp_read(sc, addr, len);

sys/dev/netif/re/re.c

31476

return value;

sys/dev/netif/re/re.c

31479

static int real_ocp_write(struct re_softc *sc, u_int16_t addr, u_int8_t len, u_int32_t value)

sys/dev/netif/re/re.c

31497

value1 |= ((value << val_shift * 8) >> shift * 8);

sys/dev/netif/re/re.c

31524

static int OCP_write_with_oob_base_address(struct re_softc *sc, u_int16_t addr, u_int8_t len, u_int32_t value, const u_int32_t base_address)

sys/dev/netif/re/re.c

31526

return re_eri_write_with_oob_base_address(sc, addr, len, value, ERIAR_OOB, base_address);

sys/dev/netif/re/re.c

31529

static void OCP_write(struct re_softc *sc, u_int16_t addr, u_int8_t len, u_int32_t value)

sys/dev/netif/re/re.c

31532

re_eri_write(sc, addr, len, value, ERIAR_OOB);

sys/dev/netif/re/re.c

31534

OCP_write_with_oob_base_address(sc, addr, len, value, RTL8168FP_OOBMAC_BASE);

sys/dev/netif/re/re.c

31536

real_ocp_write(sc, addr, len, value);

sys/dev/netif/re/re.c

904

static int re_eri_write_with_oob_base_address(struct re_softc *sc, int addr, int len, u_int32_t value, int type, const u_int32_t base_address)

sys/dev/netif/re/re.c

924

value1 |= ((value << val_shift * 8) >> shift * 8);

sys/dev/netif/re/re.c

954

static int re_eri_write(struct re_softc *sc, int addr, int len, u_int32_t value, int type)

sys/dev/netif/re/re.c

956

return re_eri_write_with_oob_base_address(sc, addr, len, value, type, 0);

sys/dev/pccard/cardbus/cardbus.c

345

cardbus_write_ivar(device_t cbdev, device_t child, int which, uintptr_t value)

sys/dev/pccard/cardbus/cardbus.c

347

return(pci_write_ivar(cbdev, child, which, value));

sys/dev/pccard/cardbus/cardbus.c

95

uintptr_t value);

sys/dev/pccard/pccbb/pccbb.c

1486

cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)

sys/dev/pccard/pccbb/pccbb.c

1494

sc->secbus = value;

sys/dev/pccard/pccbb/pccbbvar.h

155

uintptr_t value);

sys/dev/powermng/alpm/alpm.c

134

#define ALPM_SMBOUTB(alpm,register,value) \

sys/dev/powermng/alpm/alpm.c

135

(bus_space_write_1(alpm->smbst, alpm->smbsh, register, value))

sys/dev/powermng/amdpm/amdpm.c

133

#define AMDPM_SMBOUTB(amdpm,register,value) \

sys/dev/powermng/amdpm/amdpm.c

134

(bus_write_1(amdpm->res, register, value))

sys/dev/powermng/amdpm/amdpm.c

137

#define AMDPM_SMBOUTW(amdpm,register,value) \

sys/dev/powermng/amdpm/amdpm.c

138

(bus_write_2(amdpm->res, register, value))

sys/dev/powermng/amdsmn/amdsmn.c

280

amdsmn_read(device_t dev, uint32_t addr, uint32_t *value)

sys/dev/powermng/amdsmn/amdsmn.c

289

*value = pci_read_config(parent, sc->smn_pciid->amdsmn_data_reg, 4);

sys/dev/powermng/amdsmn/amdsmn.c

296

amdsmn_write(device_t dev, uint32_t addr, uint32_t value)

sys/dev/powermng/amdsmn/amdsmn.c

305

pci_write_config(parent, sc->smn_pciid->amdsmn_data_reg, value, 4);

sys/dev/powermng/amdsmn/amdsmn.h

32

int amdsmn_read(device_t dev, uint32_t addr, uint32_t *value);

sys/dev/powermng/amdsmn/amdsmn.h

33

int amdsmn_write(device_t dev, uint32_t addr, uint32_t value);

sys/dev/powermng/aps/aps.c

501

sc->sensors[APS_SENSOR_XACCEL].value = sc->aps_data.x_accel;

sys/dev/powermng/aps/aps.c

502

sc->sensors[APS_SENSOR_YACCEL].value = sc->aps_data.y_accel;

sys/dev/powermng/aps/aps.c

508

sc->sensors[APS_SENSOR_TEMP1].value = temp;

sys/dev/powermng/aps/aps.c

514

sc->sensors[APS_SENSOR_TEMP2].value = temp;

sys/dev/powermng/aps/aps.c

516

sc->sensors[APS_SENSOR_XVAR].value = sc->aps_data.x_var;

sys/dev/powermng/aps/aps.c

517

sc->sensors[APS_SENSOR_YVAR].value = sc->aps_data.y_var;

sys/dev/powermng/aps/aps.c

518

sc->sensors[APS_SENSOR_KBACT].value =

sys/dev/powermng/aps/aps.c

520

sc->sensors[APS_SENSOR_MSACT].value =

sys/dev/powermng/aps/aps.c

522

sc->sensors[APS_SENSOR_LIDOPEN].value =

sys/dev/powermng/corecstat/corecstat.c

584

sens->sensor.value = (cstdiff * 100000) / tscdiff;

sys/dev/powermng/corepower/corepower.c

409

sens->sensor.value = corepower_energy_to_uwatts(sc, res, 1);

sys/dev/powermng/intpm/intpm.c

222

int error, rid, value;

sys/dev/powermng/intpm/intpm.c

271

value = pci_read_config(dev, PCI_HST_CFG_SMB, 1);

sys/dev/powermng/intpm/intpm.c

272

sc->poll = (value & PCI_INTR_SMB_ENABLE) == 0;

sys/dev/powermng/intpm/intpm.c

273

intr = value & PCI_INTR_SMB_MASK;

sys/dev/powermng/it/it.c

261

sensors[i].value = sdata * 1000000 + 273150000;

sys/dev/powermng/it/it.c

274

sensors[i].value = (sdata << 4);

sys/dev/powermng/it/it.c

277

sensors[i].value = ((sdata << 4) - IT_VREF);

sys/dev/powermng/it/it.c

279

sensors[i].value *= it_vrfact[i];

sys/dev/powermng/it/it.c

281

sensors[i].value /= 10;

sys/dev/powermng/it/it.c

283

sensors[i].value += IT_VREF * 1000;

sys/dev/powermng/it/it.c

304

sensors[i].value = 0;

sys/dev/powermng/it/it.c

308

sensors[i].value = 1350000 / (sdata << (divisor & 7));

sys/dev/powermng/kate/kate.c

303

s[i].value = temp;

sys/dev/powermng/km/km.c

171

s->value = c * 125000 + 273150000;

sys/dev/powermng/lm/lm78.c

673

sensor->value = (data << 4);

sys/dev/powermng/lm/lm78.c

674

sensor->value *= sc->lm_sensors[n].rfact;

sys/dev/powermng/lm/lm78.c

675

sensor->value /= 10;

sys/dev/powermng/lm/lm78.c

691

sensor->value = 0;

sys/dev/powermng/lm/lm78.c

696

sensor->value = sdata * 1000000 + 273150000;

sys/dev/powermng/lm/lm78.c

725

sensor->value = 0;

sys/dev/powermng/lm/lm78.c

728

sensor->value = 1350000 / (data << divisor);

sys/dev/powermng/lm/lm78.c

767

sensor->value = (data * 4880) + 700000;

sys/dev/powermng/lm/lm78.c

769

sensor->value = (data * 16000);

sys/dev/powermng/lm/lm78.c

779

sensor->value = ((data << 4) - WB_VREF);

sys/dev/powermng/lm/lm78.c

780

sensor->value *= sc->lm_sensors[n].rfact;

sys/dev/powermng/lm/lm78.c

781

sensor->value /= 10;

sys/dev/powermng/lm/lm78.c

782

sensor->value += WB_VREF * 1000;

sys/dev/powermng/lm/lm78.c

792

sensor->value = ((data << 3) - WB_W83627EHF_VREF);

sys/dev/powermng/lm/lm78.c

793

sensor->value *= RFACT(232, 10);

sys/dev/powermng/lm/lm78.c

794

sensor->value /= 10;

sys/dev/powermng/lm/lm78.c

795

sensor->value += WB_W83627EHF_VREF * 1000;

sys/dev/powermng/lm/lm78.c

815

sensor->value = 0;

sys/dev/powermng/lm/lm78.c

820

sensor->value = sdata * 500000 + 273150000;

sys/dev/powermng/lm/lm78.c

866

sensor->value = 0;

sys/dev/powermng/lm/lm78.c

869

sensor->value = 1350000 / (data << divisor);

sys/dev/powermng/lm/lm78.c

909

sensor->value = 0;

sys/dev/powermng/lm/lm78.c

914

sensor->value = 1350000 / (data << divisor);

sys/dev/powermng/lm/lm78.c

929

sensor->value = 0;

sys/dev/powermng/lm/lm78.c

932

sensor->value = (datah << 8) | datal;

sys/dev/powermng/lm/lm78.c

950

sensor->value = 0;

sys/dev/powermng/lm/lm78.c

955

sensor->value = sdata * 500000 + 273150000;

sys/dev/powermng/memtemp/memtemp_e5.c

369

sensor->value = 0;

sys/dev/powermng/uguru/uguru.c

917

sensor->value = 0;

sys/dev/powermng/uguru/uguru.c

921

sensor->value = sc->cs.reading * 1000000 + 273150000;

sys/dev/powermng/uguru/uguru.c

946

sc->sc_sensors[n].value =

sys/dev/powermng/uguru/uguru.c

960

sensor->value = 0;

sys/dev/powermng/uguru/uguru.c

964

sensor->value = sc->cs.reading * 60;

sys/dev/raid/dpt/dpt_scsi.c

88

#define dpt_outl(dpt, port, value) \

sys/dev/raid/dpt/dpt_scsi.c

89

bus_space_write_4((dpt)->tag, (dpt)->bsh, port, value)

sys/dev/raid/dpt/dpt_scsi.c

90

#define dpt_outb(dpt, port, value) \

sys/dev/raid/dpt/dpt_scsi.c

91

bus_space_write_1((dpt)->tag, (dpt)->bsh, port, value)

sys/dev/raid/hpt27xx/himfuncs.h

105

_HIM_INTERFACE(HPT_BOOL, flash_access, (void *adapter, HPT_U32 offset, void *value, int size, HPT_BOOL reading))

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

38

void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); }

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

39

void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); }

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

40

void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); }

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

66

void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value)

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

68

pci_write_config(((PHBA)osext)->pcidev, offset, value, 1);

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

71

void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value)

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

73

pci_write_config(((PHBA)osext)->pcidev, offset, value, 2);

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

76

void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value)

sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c

78

pci_write_config(((PHBA)osext)->pcidev, offset, value, 4);

sys/dev/raid/hpt27xx/hptintf.h

1323

HPT_U8 value[32];

sys/dev/raid/hpt27xx/osm.h

129

void os_outb (void *port, HPT_U8 value);

sys/dev/raid/hpt27xx/osm.h

130

void os_outw (void *port, HPT_U16 value);

sys/dev/raid/hpt27xx/osm.h

131

void os_outl (void *port, HPT_U32 value);

sys/dev/raid/hpt27xx/osm.h

149

void os_pci_writeb(void *osext, HPT_U8 offset, HPT_U8 value);

sys/dev/raid/hpt27xx/osm.h

150

void os_pci_writew(void *osext, HPT_U8 offset, HPT_U16 value);

sys/dev/raid/hpt27xx/osm.h

151

void os_pci_writel(void *osext, HPT_U8 offset, HPT_U32 value);

sys/dev/raid/hptiop/hptiop.c

164

#define BUS_SPACE_WRT4_ITL(offset, value) bus_space_write_4(hba->bar0t,\

sys/dev/raid/hptiop/hptiop.c

165

hba->bar0h, offsetof(struct hpt_iopmu_itl, offset), (value))

sys/dev/raid/hptiop/hptiop.c

169

#define BUS_SPACE_WRT4_MV0(offset, value) bus_space_write_4(hba->bar0t,\

sys/dev/raid/hptiop/hptiop.c

170

hba->bar0h, offsetof(struct hpt_iopmv_regs, offset), value)

sys/dev/raid/hptiop/hptiop.c

173

#define BUS_SPACE_WRT4_MV2(offset, value) bus_space_write_4(hba->bar2t,\

sys/dev/raid/hptiop/hptiop.c

174

hba->bar2h, offsetof(struct hpt_iopmu_mv, offset), value)

sys/dev/raid/hptiop/hptiop.c

178

#define BUS_SPACE_WRT4_MVFREY2(offset, value) bus_space_write_4(hba->bar2t,\

sys/dev/raid/hptiop/hptiop.c

179

hba->bar2h, offsetof(struct hpt_iopmu_mvfrey, offset), value)

sys/dev/raid/hptmv/access601.h

49

MV_U32 offset, void *value, int size, int reading);

sys/dev/raid/hptmv/access601.h

58

#define sx508x_flash_access(pSataAdapter, offset, value, size, reading) 0

sys/dev/raid/hptrr/himfuncs.h

103

_HIM_INTERFACE(HPT_BOOL, flash_access, (void *adapter, HPT_U32 offset, void *value, int size, HPT_BOOL reading))

sys/dev/raid/hptrr/hptintf.h

1178

HPT_U8 value[32];

sys/dev/raid/hptrr/hptrr_os_bsd.c

42

void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); }

sys/dev/raid/hptrr/hptrr_os_bsd.c

43

void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); }

sys/dev/raid/hptrr/hptrr_os_bsd.c

44

void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); }

sys/dev/raid/hptrr/hptrr_os_bsd.c

70

void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value)

sys/dev/raid/hptrr/hptrr_os_bsd.c

72

pci_write_config(((PHBA)osext)->pcidev, offset, value, 1);

sys/dev/raid/hptrr/hptrr_os_bsd.c

75

void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value)

sys/dev/raid/hptrr/hptrr_os_bsd.c

77

pci_write_config(((PHBA)osext)->pcidev, offset, value, 2);

sys/dev/raid/hptrr/hptrr_os_bsd.c

80

void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value)

sys/dev/raid/hptrr/hptrr_os_bsd.c

82

pci_write_config(((PHBA)osext)->pcidev, offset, value, 4);

sys/dev/raid/hptrr/osm.h

100

void os_outl (void *port, HPT_U32 value);

sys/dev/raid/hptrr/osm.h

118

void os_pci_writeb(void *osext, HPT_U8 offset, HPT_U8 value);

sys/dev/raid/hptrr/osm.h

119

void os_pci_writew(void *osext, HPT_U8 offset, HPT_U16 value);

sys/dev/raid/hptrr/osm.h

120

void os_pci_writel(void *osext, HPT_U8 offset, HPT_U32 value);

sys/dev/raid/hptrr/osm.h

98

void os_outb (void *port, HPT_U8 value);

sys/dev/raid/hptrr/osm.h

99

void os_outw (void *port, HPT_U16 value);

sys/dev/raid/iir/iir.h

712

gdt_enc16(u_int8_t *addr, u_int16_t value)

sys/dev/raid/iir/iir.h

714

*(u_int16_t *)addr = htole16(value);

sys/dev/raid/iir/iir.h

718

gdt_enc32(u_int8_t *addr, u_int32_t value)

sys/dev/raid/iir/iir.h

720

*(u_int32_t *)addr = htole32(value);

sys/dev/raid/ips/ips.c

348

command[i].status.value = IPS_ERROR_STATUS;

sys/dev/raid/ips/ips.c

567

while ((status.value = ips_read_4(sc, MORPHEUS_REG_OQPR))

sys/dev/raid/ips/ips.c

571

command->status.value = status.value;

sys/dev/raid/ips/ips.c

597

command->status.value = IPS_ERROR_STATUS;

sys/dev/raid/ips/ips.c

748

u_int32_t value;

sys/dev/raid/ips/ips.c

755

value = sc->copper_queue->status[statnum];

sys/dev/raid/ips/ips.c

759

return value;

sys/dev/raid/ips/ips.c

771

status.value = ips_copperhead_cmd_status(sc);

sys/dev/raid/ips/ips.c

773

sc->commandarray[cmdnumber].status.value = status.value;

sys/dev/raid/ips/ips.c

791

command->status.value = IPS_ERROR_STATUS;

sys/dev/raid/ips/ips.h

217

#define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value)

sys/dev/raid/ips/ips.h

218

#define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value)

sys/dev/raid/ips/ips.h

219

#define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value)

sys/dev/raid/ips/ips.h

386

volatile u_int32_t value;

sys/dev/raid/ips/ips_commands.c

270

command->status.value = IPS_ERROR_STATUS; /* a lovely error value */

sys/dev/raid/ips/ips_commands.c

316

if ((command->status.value == IPS_ERROR_STATUS) ||

sys/dev/raid/ips/ips_commands.c

368

command->status.value = IPS_ERROR_STATUS;

sys/dev/raid/ips/ips_commands.c

414

if ((command->status.value == IPS_ERROR_STATUS) ||

sys/dev/raid/ips/ips_commands.c

470

if (command->status.value != IPS_ERROR_STATUS)

sys/dev/raid/ips/ips_commands.c

557

if (command->status.value != IPS_ERROR_STATUS)

sys/dev/raid/ips/ips_commands.c

582

command->status.value);

sys/dev/raid/ips/ips_commands.c

624

command->status.value = IPS_ERROR_STATUS;

sys/dev/raid/ips/ips_commands.c

672

if ((command->status.value == IPS_ERROR_STATUS) ||

sys/dev/raid/ips/ips_commands.c

721

if (command->status.value != IPS_ERROR_STATUS)

sys/dev/raid/ips/ips_commands.c

742

if (command->status.value != IPS_ERROR_STATUS)

sys/dev/raid/ips/ips_disk.c

289

command->status.value = IPS_ERROR_STATUS;

sys/dev/raid/ips/ips_disk.c

331

command->status.value);

sys/dev/raid/ips/ips_ioctl.c

124

ioctl_cmd->status.value = 0xffffffff;

sys/dev/raid/ips/ips_ioctl.c

133

while (ioctl_cmd->status.value == 0xffffffff)

sys/dev/raid/ips/ips_ioctl.c

48

ioctl_cmd->status.value = command->status.value;

sys/dev/raid/ips/ips_ioctl.c

64

ioctl_cmd->status.value = IPS_ERROR_STATUS;

sys/dev/raid/mly/mly.c

1106

mci->timeout.value = 30;

sys/dev/raid/mly/mly.c

1229

mci->timeout.value = 30;

sys/dev/raid/mly/mly.c

2267

ss->timeout.value = csio->ccb_h.timeout / 1000;

sys/dev/raid/mly/mly.c

2270

ss->timeout.value = csio->ccb_h.timeout / (60 * 1000);

sys/dev/raid/mly/mly.c

2273

ss->timeout.value = csio->ccb_h.timeout / (60 * 60 * 1000); /* overflow? */

sys/dev/raid/mly/mly.c

2643

ge->timeout.value,

sys/dev/raid/mly/mly.c

843

mci->timeout.value = 30;

sys/dev/raid/mly/mlyreg.h

307

u_int8_t value:6;

sys/dev/raid/mrsas/mrsas.c

121

u_int32_t value);

sys/dev/raid/mrsas/mrsas.c

244

u_int32_t value)

sys/dev/raid/mrsas/mrsas.c

249

bus_space_write_4(bus_tag, bus_handle, offset, value);

sys/dev/raid/twa/tw_cl_fwif.h

344

#define TW_CLI_WRITE_CONTROL_REGISTER(ctlr_handle, value) \

sys/dev/raid/twa/tw_cl_fwif.h

345

tw_osl_write_reg(ctlr_handle, TWA_CONTROL_REGISTER_OFFSET, value, 4)

sys/dev/raid/twa/tw_cl_fwif.h

352

#define TW_CLI_WRITE_COMMAND_QUEUE(ctlr_handle, value) do { \

sys/dev/raid/twa/tw_cl_fwif.h

356

(TW_UINT32)(value), 4); \

sys/dev/raid/twa/tw_cl_fwif.h

358

(TW_UINT32)(((TW_UINT64)value)>>32), 4); \

sys/dev/raid/twa/tw_cl_fwif.h

361

(TW_UINT32)(value), 4); \

sys/dev/raid/twa/tw_cl_share.h

505

TW_INT32 offset, TW_INT32 value, TW_INT32 size);

sys/dev/raid/twa/tw_cl_share.h

516

TW_INT32 offset, TW_INT32 value, TW_INT32 size);

sys/dev/raid/twa/tw_osl_inline.h

200

TW_INT32 offset, TW_INT32 value, TW_INT32 size)

sys/dev/raid/twa/tw_osl_inline.h

208

bus_space_write_4(bus_tag, bus_handle, offset, value);

sys/dev/raid/twa/tw_osl_inline.h

210

bus_space_write_2(bus_tag, bus_handle, offset, (TW_INT16)value);

sys/dev/raid/twa/tw_osl_inline.h

212

bus_space_write_1(bus_tag, bus_handle, offset, (TW_INT8)value);

sys/dev/raid/twa/tw_osl_inline.h

247

#define tw_osl_write_pci_config(ctlr_handle, offset, value, size) \

sys/dev/raid/twa/tw_osl_inline.h

250

offset/*PCIR_STATUS*/, value, size)

sys/dev/raid/twe/twe.c

1198

rq.value = TWE_RESPONSE_QUEUE(sc);

sys/dev/raid/twe/twe.c

1305

rq.value = TWE_RESPONSE_QUEUE(sc);

sys/dev/raid/twe/twe.c

52

static int twe_set_param_1(struct twe_softc *sc, int table_id, int param_id, u_int8_t value);

sys/dev/raid/twe/twe.c

55

static int twe_set_param_2(struct twe_softc *sc, int table_id, int param_id, u_int16_t value);

sys/dev/raid/twe/twe.c

56

static int twe_set_param_4(struct twe_softc *sc, int table_id, int param_id, u_int32_t value);

sys/dev/raid/twe/twe.c

841

twe_set_param_1(struct twe_softc *sc, int table_id, int param_id, u_int8_t value)

sys/dev/raid/twe/twe.c

843

return(twe_set_param(sc, table_id, param_id, sizeof(value), &value));

sys/dev/raid/twe/twe.c

849

twe_set_param_2(struct twe_softc *sc, int table_id, int param_id, u_int16_t value)

sys/dev/raid/twe/twe.c

851

return(twe_set_param(sc, table_id, param_id, sizeof(value), &value));

sys/dev/raid/twe/twe.c

855

twe_set_param_4(struct twe_softc *sc, int table_id, int param_id, u_int32_t value)

sys/dev/raid/twe/twe.c

857

return(twe_set_param(sc, table_id, param_id, sizeof(value), &value));

sys/dev/raid/twe/twereg.h

339

u_int32_t value;

sys/dev/raid/tws/tws_services.c

171

u_int32_t value, int size)

sys/dev/raid/tws/tws_services.c

177

bus_space_write_4(bus_tag, bus_handle, offset, value);

sys/dev/raid/tws/tws_services.c

181

(u_int16_t)value);

sys/dev/raid/tws/tws_services.c

183

bus_space_write_1(bus_tag, bus_handle, offset, (u_int8_t)value);

sys/dev/raid/tws/tws_services.h

46

u_int32_t value, int size);

sys/dev/serial/sio/sio.c

112

#define sio_setreg(com, off, value) \

sys/dev/serial/sio/sio.c

113

(bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))

sys/dev/sound/pci/atiixp.c

1334

uint32_t value;

sys/dev/sound/pci/atiixp.c

1353

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

1354

value |= ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET;

sys/dev/sound/pci/atiixp.c

220

uint32_t value;

sys/dev/sound/pci/atiixp.c

226

value = atiixp_rd(sc, ATI_REG_IER);

sys/dev/sound/pci/atiixp.c

228

value |= ATI_REG_IER_IO_STATUS_EN;

sys/dev/sound/pci/atiixp.c

235

value &= ~(ATI_REG_IER_IN_XRUN_EN | ATI_REG_IER_OUT_XRUN_EN |

sys/dev/sound/pci/atiixp.c

238

value |= ATI_REG_IER_IN_XRUN_EN;

sys/dev/sound/pci/atiixp.c

239

value |= ATI_REG_IER_OUT_XRUN_EN;

sys/dev/sound/pci/atiixp.c

241

value |= ATI_REG_IER_SPDF_XRUN_EN;

sys/dev/sound/pci/atiixp.c

242

value |= ATI_REG_IER_SPDF_STATUS_EN;

sys/dev/sound/pci/atiixp.c

245

atiixp_wr(sc, ATI_REG_IER, value);

sys/dev/sound/pci/atiixp.c

261

uint32_t value, timeout;

sys/dev/sound/pci/atiixp.c

264

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

265

if (value & ATI_REG_CMD_POWERDOWN) {

sys/dev/sound/pci/atiixp.c

267

value &= ~ATI_REG_CMD_POWERDOWN;

sys/dev/sound/pci/atiixp.c

268

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

275

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

276

value |= ATI_REG_CMD_AC_SOFT_RESET;

sys/dev/sound/pci/atiixp.c

277

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

280

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

284

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

285

value &= ~ATI_REG_CMD_AC_SOFT_RESET;

sys/dev/sound/pci/atiixp.c

286

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

290

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

291

while (!(value & ATI_REG_CMD_ACLINK_ACTIVE) && --timeout) {

sys/dev/sound/pci/atiixp.c

297

value &= ~ATI_REG_CMD_AC_RESET;

sys/dev/sound/pci/atiixp.c

298

value |= ATI_REG_CMD_AC_SYNC;

sys/dev/sound/pci/atiixp.c

299

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

302

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

306

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

307

value |= ATI_REG_CMD_AC_RESET;

sys/dev/sound/pci/atiixp.c

308

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

311

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

322

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

323

value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET;

sys/dev/sound/pci/atiixp.c

324

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

336

uint32_t value;

sys/dev/sound/pci/atiixp.c

338

value = atiixp_rd(ch->parent, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

339

if (!(value & ch->enable_bit)) {

sys/dev/sound/pci/atiixp.c

340

value |= ch->enable_bit;

sys/dev/sound/pci/atiixp.c

341

atiixp_wr(ch->parent, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

348

uint32_t value;

sys/dev/sound/pci/atiixp.c

350

value = atiixp_rd(ch->parent, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

351

if (value & ch->enable_bit) {

sys/dev/sound/pci/atiixp.c

352

value &= ~ch->enable_bit;

sys/dev/sound/pci/atiixp.c

353

atiixp_wr(ch->parent, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

490

uint32_t value;

sys/dev/sound/pci/atiixp.c

494

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

495

value &= ~ATI_REG_CMD_INTERLEAVE_IN;

sys/dev/sound/pci/atiixp.c

497

value |= ATI_REG_CMD_INTERLEAVE_IN;

sys/dev/sound/pci/atiixp.c

498

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

500

value = atiixp_rd(sc, ATI_REG_OUT_DMA_SLOT);

sys/dev/sound/pci/atiixp.c

501

value &= ~ATI_REG_OUT_DMA_SLOT_MASK;

sys/dev/sound/pci/atiixp.c

503

value |= ATI_REG_OUT_DMA_SLOT_BIT(3) |

sys/dev/sound/pci/atiixp.c

505

value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;

sys/dev/sound/pci/atiixp.c

506

atiixp_wr(sc, ATI_REG_OUT_DMA_SLOT, value);

sys/dev/sound/pci/atiixp.c

507

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

508

value &= ~ATI_REG_CMD_INTERLEAVE_OUT;

sys/dev/sound/pci/atiixp.c

510

value |= ATI_REG_CMD_INTERLEAVE_OUT;

sys/dev/sound/pci/atiixp.c

511

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/atiixp.c

512

value = atiixp_rd(sc, ATI_REG_6CH_REORDER);

sys/dev/sound/pci/atiixp.c

513

value &= ~ATI_REG_6CH_REORDER_EN;

sys/dev/sound/pci/atiixp.c

514

atiixp_wr(sc, ATI_REG_6CH_REORDER, value);

sys/dev/sound/pci/atiixp.c

722

uint32_t value;

sys/dev/sound/pci/atiixp.c

812

value = atiixp_rd(sc, ATI_REG_IER);

sys/dev/sound/pci/atiixp.c

815

value |= ATI_REG_IER_SET_BUS_BUSY;

sys/dev/sound/pci/atiixp.c

817

value &= ~ATI_REG_IER_SET_BUS_BUSY;

sys/dev/sound/pci/atiixp.c

818

atiixp_wr(sc, ATI_REG_IER, value);

sys/dev/sound/pci/atiixp.c

937

uint32_t value;

sys/dev/sound/pci/atiixp.c

945

value = atiixp_rd(sc, ATI_REG_CMD);

sys/dev/sound/pci/atiixp.c

946

value &= ~(ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_OUT_DMA_EN |

sys/dev/sound/pci/atiixp.c

948

atiixp_wr(sc, ATI_REG_CMD, value);

sys/dev/sound/pci/aureal.c

181

au_setbit(u_int32_t *p, char bit, u_int32_t value)

sys/dev/sound/pci/aureal.c

186

*p |= (value << bit);

sys/dev/sound/pci/emu10kx.c

3001

int ivar_index, uintptr_t value __unused)

sys/dev/sound/pci/emu10kx.c

420

int ivar_index, uintptr_t value __unused);

sys/dev/sound/pci/hda/hdaa.c

1316

*on |= hdaa_quirks_tab[k].value;

sys/dev/sound/pci/hda/hdaa.c

1317

*off &= ~hdaa_quirks_tab[k].value;

sys/dev/sound/pci/hda/hdaa.c

1319

*off |= hdaa_quirks_tab[k].value;

sys/dev/sound/pci/hda/hdaa.c

1320

*on &= ~hdaa_quirks_tab[k].value;

sys/dev/sound/pci/hda/hdaa.c

1338

if ((quirks & hdaa_quirks_tab[i].value) != 0)

sys/dev/sound/pci/hda/hdaa.c

57

uint32_t value;

sys/dev/sound/pci/hda/hdaa.c

6241

hdaa_quirks_tab[i].value) ==

sys/dev/sound/pci/hda/hdaa.c

6242

hdaa_quirks_tab[i].value)

sys/dev/sound/pci/hda/hdaa.c

857

char *key, *value, *rest, *bad;

sys/dev/sound/pci/hda/hdaa.c

863

value = strsep(&rest, " \t");

sys/dev/sound/pci/hda/hdaa.c

864

if (value == NULL)

sys/dev/sound/pci/hda/hdaa.c

866

ival = strtol(value, &bad, 10);

sys/dev/sound/pci/hda/hdaa.c

886

if (strcasecmp(HDA_COLORS[i], value) == 0) {

sys/dev/sound/pci/hda/hdaa.c

898

if (strcasecmp(HDA_CONNECTORS[i], value) == 0) {

sys/dev/sound/pci/hda/hdaa.c

911

if (strcasecmp(HDA_DEVS[i], value) == 0) {

sys/dev/sound/pci/hda/hdaa.c

924

if (strcasecmp(HDA_LOCS[i], value) == 0) {

sys/dev/sound/pci/hda/hdaa.c

937

if (strcasecmp(HDA_CONNS[i], value) == 0) {

sys/dev/sound/pci/hda/hdaa.c

951

char *key, *value, *rest;

sys/dev/sound/pci/hda/hdaa.c

957

value = strsep(&rest, " \t");

sys/dev/sound/pci/hda/hdaa.c

958

if (value == NULL)

sys/dev/sound/pci/hda/hdaa.c

964

if (strcasecmp(HDA_GPIO_ACTIONS[i], value) == 0) {

sys/dev/sound/pci/hda/hdac.c

321

*on |= hdac_quirks_tab[k].value;

sys/dev/sound/pci/hda/hdac.c

322

*on &= ~hdac_quirks_tab[k].value;

sys/dev/sound/pci/hda/hdac.c

324

*off |= hdac_quirks_tab[k].value;

sys/dev/sound/pci/hda/hdac.c

325

*off &= ~hdac_quirks_tab[k].value;

sys/dev/sound/pci/hda/hdac.c

64

uint32_t value;

sys/dev/sound/pci/hda/hdac_private.h

47

#define HDAC_WRITE_1(mem, offset, value) \

sys/dev/sound/pci/hda/hdac_private.h

48

bus_space_write_1((mem)->mem_tag, (mem)->mem_handle, (offset), (value))

sys/dev/sound/pci/hda/hdac_private.h

49

#define HDAC_WRITE_2(mem, offset, value) \

sys/dev/sound/pci/hda/hdac_private.h

50

bus_space_write_2((mem)->mem_tag, (mem)->mem_handle, (offset), (value))

sys/dev/sound/pci/hda/hdac_private.h

51

#define HDAC_WRITE_4(mem, offset, value) \

sys/dev/sound/pci/hda/hdac_private.h

52

bus_space_write_4((mem)->mem_tag, (mem)->mem_handle, (offset), (value))

sys/dev/sound/pci/hdspe-pcm.c

173

hdspechan_enable(struct sc_chinfo *ch, int value)

sys/dev/sound/pci/hdspe-pcm.c

184

ch->run = value;

sys/dev/sound/pci/hdspe-pcm.c

186

hdspe_write_1(sc, reg + (4 * ch->lslot), value);

sys/dev/sound/pci/hdspe-pcm.c

187

hdspe_write_1(sc, reg + (4 * ch->rslot), value);

sys/dev/sound/pci/solo.c

125

static void ess_setmixer(struct ess_info *sc, u_int port, u_int value);

sys/dev/sound/pci/solo.c

241

ess_setmixer(struct ess_info *sc, u_int port, u_int value)

sys/dev/sound/pci/solo.c

243

DEB(kprintf("ess_setmixer: reg=%x, val=%x\n", port, value);)

sys/dev/sound/pci/solo.c

246

ess_wr(sc, SB_MIX_DATA, (u_char) (value & 0xff));

sys/dev/sound/pcm/feeder_eq.c

379

feed_eq_set(struct pcm_feeder *f, int what, int value)

sys/dev/sound/pcm/feeder_eq.c

387

if (value < SND_CHN_MIN || value > SND_CHN_MAX)

sys/dev/sound/pcm/feeder_eq.c

389

info->channels = (uint32_t)value;

sys/dev/sound/pcm/feeder_eq.c

394

if (feeder_eq_validrate(value) == 0)

sys/dev/sound/pcm/feeder_eq.c

396

info->rate = (uint32_t)value;

sys/dev/sound/pcm/feeder_eq.c

403

if (value < 0 || value > 100)

sys/dev/sound/pcm/feeder_eq.c

406

info->treble.gain = FEEDEQ_L2GAIN(value);

sys/dev/sound/pcm/feeder_eq.c

408

info->bass.gain = FEEDEQ_L2GAIN(value);

sys/dev/sound/pcm/feeder_eq.c

411

if (value < FEEDEQ_PREAMP_MIN || value > FEEDEQ_PREAMP_MAX)

sys/dev/sound/pcm/feeder_eq.c

413

info->preamp = FEEDEQ_PREAMP2IDX(value);

sys/dev/sound/pcm/feeder_eq.c

416

if (!(value == FEEDEQ_BYPASS || value == FEEDEQ_ENABLE ||

sys/dev/sound/pcm/feeder_eq.c

417

value == FEEDEQ_DISABLE))

sys/dev/sound/pcm/feeder_eq.c

419

info->state = value;

sys/dev/sound/pcm/feeder_format.c

187

feed_format_set(struct pcm_feeder *f, int what, int value)

sys/dev/sound/pcm/feeder_format.c

195

if (value < SND_CHN_MIN || value > SND_CHN_MAX)

sys/dev/sound/pcm/feeder_format.c

197

info->channels = (uint32_t)value;

sys/dev/sound/pcm/feeder_mixer.c

160

feed_mixer_set(struct pcm_feeder *f, int what, int value)

sys/dev/sound/pcm/feeder_mixer.c

165

if (value < SND_CHN_MIN || value > SND_CHN_MAX)

sys/dev/sound/pcm/feeder_mixer.c

167

f->data = FEEDMIXER_DATA(FEEDMIXER_INFOIDX(f->data), value);

sys/dev/sound/pcm/feeder_rate.c

1408

z_resampler_set(struct pcm_feeder *f, int what, int32_t value)

sys/dev/sound/pcm/feeder_rate.c

1417

if (value < feeder_rate_min || value > feeder_rate_max)

sys/dev/sound/pcm/feeder_rate.c

1419

if (value == info->rsrc)

sys/dev/sound/pcm/feeder_rate.c

1421

info->rsrc = value;

sys/dev/sound/pcm/feeder_rate.c

1424

if (value < feeder_rate_min || value > feeder_rate_max)

sys/dev/sound/pcm/feeder_rate.c

1426

if (value == info->rdst)

sys/dev/sound/pcm/feeder_rate.c

1428

info->rdst = value;

sys/dev/sound/pcm/feeder_rate.c

1431

if (value < Z_QUALITY_MIN || value > Z_QUALITY_MAX)

sys/dev/sound/pcm/feeder_rate.c

1433

if (value == info->quality)

sys/dev/sound/pcm/feeder_rate.c

1442

info->quality = value;

sys/dev/sound/pcm/feeder_rate.c

1448

if (value < SND_CHN_MIN || value > SND_CHN_MAX)

sys/dev/sound/pcm/feeder_rate.c

1450

if (value == info->channels)

sys/dev/sound/pcm/feeder_rate.c

1452

info->channels = value;

sys/dev/sound/pcm/feeder_volume.c

198

feed_volume_set(struct pcm_feeder *f, int what, int value)

sys/dev/sound/pcm/feeder_volume.c

209

if (value < SND_VOL_C_BEGIN || value > SND_VOL_C_END)

sys/dev/sound/pcm/feeder_volume.c

211

info->volume_class = value;

sys/dev/sound/pcm/feeder_volume.c

214

if (value < SND_CHN_MIN || value > SND_CHN_MAX)

sys/dev/sound/pcm/feeder_volume.c

216

m = feeder_matrix_default_channel_map(value);

sys/dev/sound/pcm/feeder_volume.c

222

if (!(value == FEEDVOLUME_ENABLE || value == FEEDVOLUME_BYPASS))

sys/dev/sound/pcm/feeder_volume.c

224

info->state = value;

sys/dev/video/bktr/bktr_reg.h

432

#define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value))

sys/dev/video/bktr/bktr_reg.h

433

#define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))

sys/dev/video/bktr/bktr_reg.h

434

#define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value))

sys/dev/video/cxm/cxm.h

474

char value[2];

sys/dev/video/cxm/cxm.h

497

uint16_t value;

sys/dev/video/cxm/cxm.h

518

unsigned char value;

sys/dev/video/cxm/cxm_msp34xxx.c

340

settings[i].value,

sys/dev/video/cxm/cxm_msp34xxx.c

341

sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

342

!= sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

367

settings[i].value,

sys/dev/video/cxm/cxm_msp34xxx.c

368

sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

369

!= sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

389

settings[i].value,

sys/dev/video/cxm/cxm_msp34xxx.c

390

sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

391

!= sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

446

settings[i].value,

sys/dev/video/cxm/cxm_msp34xxx.c

447

sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

448

!= sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

540

settings[i].value,

sys/dev/video/cxm/cxm_msp34xxx.c

541

sizeof(settings[i].value))

sys/dev/video/cxm/cxm_msp34xxx.c

542

!= sizeof(settings[i].value))

sys/dev/virtual/amazon/ena/ena-com/ena_plat.h

325

#define ENA_REG_WRITE32(bus, value, offset) \

sys/dev/virtual/amazon/ena/ena-com/ena_plat.h

329

(bus_size_t)(offset), (value))

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

108

uint64_t value;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

114

: [value] "=r" (value)

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

119

return value;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

123

vmx_vmwrite(uint64_t field, uint64_t value)

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

130

: [field] "r" (field), [value] "r" (value)

sys/dev/virtual/virtio/mmio/virtio_mmio.c

366

vtmmio_write_ivar(device_t dev, device_t child, int index, uintptr_t value)

sys/dev/virtual/virtio/mmio/virtio_mmio.c

377

sc->vtmmio_child_feat_desc = (void *) value;

sys/dev/virtual/virtio/pci/virtio_pci.c

393

vtpci_write_ivar(device_t dev, device_t child, int index, uintptr_t value)

sys/dev/virtual/virtio/pci/virtio_pci.c

404

sc->vtpci_child_feat_desc = (void *) value;

sys/dev/virtual/virtio/random/virtio_random.c

195

uint32_t value;

sys/dev/virtual/virtio/random/virtio_random.c

201

error = sglist_append(&sg, &value, sizeof(value));

sys/dev/virtual/virtio/random/virtio_random.c

207

if (virtqueue_enqueue(vq, &value, &sg, 0, 1) != 0)

sys/dev/virtual/virtio/random/virtio_random.c

217

add_buffer_randomness_src((const char *)&value, sizeof(value),

sys/dev/virtual/vmware/pvscsi/pvscsi.c

127

static int pvscsi_get_tunable(struct pvscsi_softc *sc, char *name, int value);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

237

static int pvscsi_get_tunable(struct pvscsi_softc *sc, char *name, int value)

sys/dev/virtual/vmware/pvscsi/pvscsi.c

243

TUNABLE_INT_FETCH(cfg, &value);

sys/dev/virtual/vmware/pvscsi/pvscsi.c

245

return (value);

sys/kern/kern_collect.c

124

kcollect_setvalue(int n, uint64_t value)

sys/kern/kern_collect.c

130

kcollect_ary[i].data[n] = value;

sys/kern/kern_collect.c

139

kcollect_setscale(int n, uint64_t value)

sys/kern/kern_collect.c

142

kcollect_scale.data[n] = value;

sys/kern/kern_environment.c

100

if (uap->value != NULL && buffer != NULL && len > 0) {

sys/kern/kern_environment.c

107

error = copyout(buffer, uap->value, done);

sys/kern/kern_environment.c

136

value = kgetenv(name);

sys/kern/kern_environment.c

137

if (value == NULL) {

sys/kern/kern_environment.c

141

len = strlen(value) + 1;

sys/kern/kern_environment.c

144

error = copyout(value, uap->value, len);

sys/kern/kern_environment.c

145

kfreeenv(value);

sys/kern/kern_environment.c

158

value = kmalloc(len, M_TEMP, M_WAITOK);

sys/kern/kern_environment.c

159

error = copyinstr(uap->value, value, len, NULL);

sys/kern/kern_environment.c

161

kfree(value, M_TEMP);

sys/kern/kern_environment.c

164

ksetenv(name, value);

sys/kern/kern_environment.c

165

kfree(value, M_TEMP);

sys/kern/kern_environment.c

257

ksetenv(const char *name, const char *value)

sys/kern/kern_environment.c

264

vallen = strlen(value) + 1;

sys/kern/kern_environment.c

268

ksprintf(buf, "%s=%s", name, value);

sys/kern/kern_environment.c

429

char* value;

sys/kern/kern_environment.c

433

if ((value = kgetenv(name)) == NULL)

sys/kern/kern_environment.c

436

iv = strtoq(value, &vtp, 0);

sys/kern/kern_environment.c

459

if ((vtp == value) || (*vtp != '\0')) {

sys/kern/kern_environment.c

460

kfreeenv(value);

sys/kern/kern_environment.c

465

kfreeenv(value);

sys/kern/kern_environment.c

76

char *name, *value, *buffer = NULL;

sys/kern/kern_environment.c

89

if (uap->len > 0 && uap->value != NULL)

sys/kern/kern_linker.c

1048

lookup.symvalue = (uintptr_t)symval.value;

sys/kern/kern_linker.c

1057

lookup.symvalue = (uintptr_t)symval.value;

sys/kern/kern_linker.c

618

if (symval.value == NULL && symval.size != 0) {

sys/kern/kern_linker.c

625

KLD_DPF(SYM, ("linker_file_lookup_symbol: symbol.value=%p\n", symval.value));

sys/kern/kern_linker.c

626

*raddr = symval.value;

sys/kern/kern_linker.c

726

linker_ddb_search_symbol(caddr_t value, c_linker_sym_t *sym, long *diffp)

sys/kern/kern_linker.c

729

u_long off = (uintptr_t)value;

sys/kern/kern_linker.c

737

if (lf->ops->search_symbol(lf, value, &es, &diff) != 0)

sys/kern/kern_posix4_mib.c

103

void p31b_setcfg(int num, int value)

sys/kern/kern_posix4_mib.c

106

facility[num - 1] = value;

sys/kern/kern_sensors.c

487

us->value = ks->value;

sys/kern/kern_spinlock.c

167

_spin_lock_contested(struct spinlock *spin, const char *ident, int value)

sys/kern/kern_spinlock.c

182

if (value == (SPINLOCK_SHARED | 1) - 1) {

sys/kern/kern_spinlock.c

406

int value = 0;

sys/kern/kern_spinlock.c

411

if ((error = SYSCTL_IN(req, &value, sizeof(value))) != 0)

sys/kern/kern_spinlock.c

417

if (value == 1) {

sys/kern/kern_spinlock.c

430

if (value == 2) {

sys/kern/kern_sysctl.c

1599

int error, value;

sys/kern/kern_sysctl.c

1601

value = *(int *)arg1;

sys/kern/kern_sysctl.c

1602

error = sysctl_handle_int(oidp, &value, 0, req);

sys/kern/kern_sysctl.c

1605

if (value < low || value > high)

sys/kern/kern_sysctl.c

1607

*(int *)arg1 = value;

sys/kern/kern_umtx.c

117

int value;

sys/kern/kern_umtx.c

146

value = fuwordadd32(uptr, 0);

sys/kern/kern_umtx.c

148

} while (waddr == (void *)(intptr_t)-1 && value != -1);

sys/kern/kern_umtx.c

150

if (value == -1 && waddr == (void *)(intptr_t)-1) {

sys/kern/kern_umtx.c

159

if (value == uap->value) {

sys/kern/kern_umtx.c

172

if (fuwordadd32(uptr, 0) != uap->value) {

sys/kern/kern_umtx.c

224

value = fuwordadd32(uptr, 0);

sys/kern/kern_umtx.c

226

if (value == uap->value) {

sys/kern/kern_umtx.c

255

int32_t value;

sys/kern/kern_umtx.c

285

value = fuwordadd32(uptr, 0);

sys/kern/kern_umtx.c

287

} while (waddr == (void *)(intptr_t)-1 && value != -1);

sys/kern/kern_umtx.c

289

if (value == -1 && waddr == (void *)(intptr_t)-1) {

sys/kern/link_elf.c

57

static int link_elf_search_symbol(linker_file_t, caddr_t value,

sys/kern/link_elf.c

868

symval->value = 0; /* avoid gcc warnings */

sys/kern/link_elf.c

872

symval->value = ef->address + es->st_value;

sys/kern/link_elf.c

880

symval->value = ef->address + es->st_value;

sys/kern/link_elf.c

888

link_elf_search_symbol(linker_file_t lf, caddr_t value,

sys/kern/link_elf.c

892

u_long off = (uintptr_t)(void *)value;

sys/kern/link_elf.c

945

if (symval.value == NULL) {

sys/kern/link_elf.c

949

start = (void **)symval.value;

sys/kern/link_elf.c

957

if (symval.value == NULL) {

sys/kern/link_elf.c

961

stop = (void **)symval.value;

sys/kern/link_elf_obj.c

1053

symval->value = (caddr_t)es->st_value;

sys/kern/link_elf_obj.c

1061

link_elf_obj_search_symbol(linker_file_t lf, caddr_t value,

sys/kern/link_elf_obj.c

1065

u_long off = (uintptr_t) (void *) value;

sys/kern/link_elf_obj.c

59

link_elf_obj_search_symbol(linker_file_t, caddr_t value,

sys/kern/subr_bus.c

116

const char *value;

sys/kern/subr_bus.c

120

value = dc->parent ? dc->parent->name : "";

sys/kern/subr_bus.c

125

return (SYSCTL_OUT(req, value, strlen(value)));

sys/kern/subr_bus.c

156

const char *value;

sys/kern/subr_bus.c

163

value = dev->desc ? dev->desc : "";

sys/kern/subr_bus.c

166

value = dev->driver ? dev->driver->name : "";

sys/kern/subr_bus.c

169

value = buf = kmalloc(1024, M_BUS, M_WAITOK | M_ZERO);

sys/kern/subr_bus.c

173

value = buf = kmalloc(1024, M_BUS, M_WAITOK | M_ZERO);

sys/kern/subr_bus.c

177

value = dev->parent ? dev->parent->nameunit : "";

sys/kern/subr_bus.c

182

error = SYSCTL_OUT(req, value, strlen(value));

sys/kern/subr_bus.c

2247

resource_match_string(int i, const char *resname, const char *value)

sys/kern/subr_bus.c

2256

&& !strcmp(res->u.stringval, value))

sys/kern/subr_bus.c

2402

resource_query_string(int i, const char *resname, const char *value)

sys/kern/subr_bus.c

2409

if (resource_match_string(i, resname, value) >= 0)

sys/kern/subr_bus.c

2477

resource_set_int(const char *name, int unit, const char *resname, int value)

sys/kern/subr_bus.c

2487

res->u.intval = value;

sys/kern/subr_bus.c

2492

resource_set_long(const char *name, int unit, const char *resname, long value)

sys/kern/subr_bus.c

2502

res->u.longval = value;

sys/kern/subr_bus.c

2508

const char *value)

sys/kern/subr_bus.c

2520

res->u.stringval = kmalloc(strlen(value) + 1, M_TEMP, M_INTWAIT);

sys/kern/subr_bus.c

2523

strcpy(res->u.stringval, value);

sys/kern/subr_bus.c

2986

uintptr_t value)

sys/kern/subr_bus.c

2991

error = BUS_WRITE_IVAR(dev->parent, child, index, value);

sys/kern/subr_bus.c

3823

int error, value;

sys/kern/subr_bus.c

3825

error = resource_int_value(name, unit, "disabled", &value);

sys/kern/subr_bus.c

3828

return(value);

sys/kern/uipc_mbuf.c

513

int error, value;

sys/kern/uipc_mbuf.c

515

value = *limit;

sys/kern/uipc_mbuf.c

516

error = sysctl_handle_int(oidp, &value, 0, req);

sys/kern/uipc_mbuf.c

520

return mbsetlimit(limit, value, minlim);

sys/kern/vfs_bio.c

2179

int value;

sys/kern/vfs_bio.c

2182

value = atomic_fetchadd_int(&needsbuffer, 0);

sys/kern/vfs_bio.c

2183

if (value & flags) {

sys/net/bridge/bridgestp.c

1502

t->value = v;

sys/net/bridge/bridgestp.c

1509

t->value = 0;

sys/net/bridge/bridgestp.c

1518

t->value += BSTP_TICK_VAL;

sys/net/bridge/bridgestp.c

1519

if (t->value >= v) {

sys/net/bridge/bridgestp.c

221

sc->sc_root_port->bif_message_age_timer.value +

sys/net/bridge/if_bridgevar.h

233

uint16_t value;

sys/net/ipfw/ip_fw2.c

393

uint64_t value;

sys/net/ipfw/ip_fw2.c

397

uint32_t value;

sys/net/ipfw/ip_fw2.c

418

#define tc_addrs tc_key.addr_u.value

sys/net/ipfw/ip_fw2.c

419

#define tc_ports tc_key.port_u.value

sys/net/ipfw/ip_fw2.c

442

#define t_addrs t_key.addr_u.value

sys/net/ipfw/ip_fw2.c

443

#define t_ports t_key.port_u.value

sys/net/ipfw/ip_fw2.c

485

#define st_addrs st_key.addr_u.value

sys/net/ipfw/ip_fw2.c

486

#define st_ports st_key.port_u.value

sys/net/sppp/if_spppsubr.c

3896

u_char *value, *name, digest[AUTHKEYLEN], dsize;

sys/net/sppp/if_spppsubr.c

3915

value = 1 + (u_char*)(h+1);

sys/net/sppp/if_spppsubr.c

3916

value_len = value[-1];

sys/net/sppp/if_spppsubr.c

3917

name = value + value_len;

sys/net/sppp/if_spppsubr.c

3941

sppp_print_bytes(value, value_len);

sys/net/sppp/if_spppsubr.c

3950

MD5Update(&ctx, value, value_len);

sys/net/sppp/if_spppsubr.c

4008

value = 1 + (u_char*)(h+1);

sys/net/sppp/if_spppsubr.c

4009

value_len = value[-1];

sys/net/sppp/if_spppsubr.c

4010

name = value + value_len;

sys/net/sppp/if_spppsubr.c

4053

sppp_print_bytes(value, value_len);

sys/net/sppp/if_spppsubr.c

4077

bcmp(digest, value, value_len) != 0) {

sys/net/wg/selftest/allowedips.c

190

other->value = node->value;

sys/net/wg/selftest/allowedips.c

209

const void *ip, uint8_t cidr, void *value)

sys/net/wg/selftest/allowedips.c

220

node->value = value;

sys/net/wg/selftest/allowedips.c

230

const void *ip, uint8_t cidr, void *value)

sys/net/wg/selftest/allowedips.c

241

node->value = value;

sys/net/wg/selftest/allowedips.c

260

ret = node->value;

sys/net/wg/selftest/allowedips.c

279

ret = node->value;

sys/net/wg/selftest/allowedips.c

94

void *value;

sys/net/zlib.c

1972

local unsigned bi_reverse OF((unsigned value, int length));

sys/net/zlib.c

2013

local void send_bits OF((deflate_state *s, int value, int length));

sys/net/zlib.c

2016

send_bits(deflate_state *s, int value, int length)

sys/net/zlib.c

2018

Tracevv((stderr," l %2d v %4x ", length, value));

sys/net/zlib.c

2027

s->bi_buf |= (value << s->bi_valid);

sys/net/zlib.c

2029

s->bi_buf = (ush)value >> (Buf_size - s->bi_valid);

sys/net/zlib.c

2032

s->bi_buf |= value << s->bi_valid;

sys/net/zlib.c

2038

#define send_bits(s, value, length) \

sys/net/zlib.c

2041

int val = value;\

sys/net/zlib.c

2047

s->bi_buf |= (value) << s->bi_valid;\

sys/netbt/bluetooth.h

142

# define UNKNOWN(value) \

sys/netbt/bluetooth.h

143

kprintf("%s: %s = %d unknown!\n", __func__, #value, (value));

sys/netbt/hci.h

2177

uint32_t value; /* 000000 - 999999 */

sys/netbt/hci.h

2210

uint32_t value; /* 000000 - 999999 */

sys/netbt/hci.h

766

uint32_t value; /* 000000 - 999999 */

sys/netgraph/ksocket/ng_ksocket.c

116

const int value;

sys/netgraph/ksocket/ng_ksocket.c

1243

return aliases[k].value;

sys/netgraph/ksocket/ng_ksocket.c

393

static const int offset = OFFSETOF(struct ng_ksocket_sockopt, value);

sys/netgraph/ksocket/ng_ksocket.c

806

sopt.sopt_val = ksopt->value;

sys/netgraph/ksocket/ng_ksocket.c

836

sopt.sopt_val = ksopt->value;

sys/netgraph/ksocket/ng_ksocket.h

56

u_char value[0]; /* fourth arg of [gs]etsockopt() */

sys/netgraph7/bluetooth/common/ng_bluetooth.c

101

if (0 < value && value <= bluetooth_l2cap_rtx_timeout_value)

sys/netgraph7/bluetooth/common/ng_bluetooth.c

102

bluetooth_hci_connect_timeout_value = value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

130

u_int32_t value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

133

value = bluetooth_l2cap_rtx_timeout_value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

134

error = sysctl_handle_int(oidp, &value, 0, req);

sys/netgraph7/bluetooth/common/ng_bluetooth.c

136

if (bluetooth_hci_connect_timeout_value <= value &&

sys/netgraph7/bluetooth/common/ng_bluetooth.c

137

value <= bluetooth_l2cap_ertx_timeout_value)

sys/netgraph7/bluetooth/common/ng_bluetooth.c

138

bluetooth_l2cap_rtx_timeout_value = value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

155

u_int32_t value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

158

value = bluetooth_l2cap_ertx_timeout_value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

159

error = sysctl_handle_int(oidp, &value, 0, req);

sys/netgraph7/bluetooth/common/ng_bluetooth.c

161

if (value >= bluetooth_l2cap_rtx_timeout_value)

sys/netgraph7/bluetooth/common/ng_bluetooth.c

162

bluetooth_l2cap_ertx_timeout_value = value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

71

u_int32_t value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

74

value = bluetooth_hci_command_timeout_value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

75

error = sysctl_handle_int(oidp, &value, 0, req);

sys/netgraph7/bluetooth/common/ng_bluetooth.c

77

if (value > 0)

sys/netgraph7/bluetooth/common/ng_bluetooth.c

78

bluetooth_hci_command_timeout_value = value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

95

u_int32_t value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

98

value = bluetooth_hci_connect_timeout_value;

sys/netgraph7/bluetooth/common/ng_bluetooth.c

99

error = sysctl_handle_int(oidp, &value, 0, req);

sys/netgraph7/ksocket/ng_ksocket.c

116

const int value;

sys/netgraph7/ksocket/ng_ksocket.c

1275

return aliases[k].value;

sys/netgraph7/ksocket/ng_ksocket.c

394

static const int offset = OFFSETOF(struct ng_ksocket_sockopt, value);

sys/netgraph7/ksocket/ng_ksocket.c

829

sopt.sopt_val = ksopt->value;

sys/netgraph7/ksocket/ng_ksocket.c

858

sopt.sopt_val = ksopt->value;

sys/netgraph7/ksocket/ng_ksocket.h

58

u_char value[]; /* fourth arg of [gs]etsockopt() */

sys/netinet/tcp_timer.h

130

#define TCPT_RANGESET(tv, value, tvmin, tvmax) do { \

sys/netinet/tcp_timer.h

131

(tv) = (value) + tcp_rexmit_slop; \

sys/platform/pc64/apic/ioapic_abi.c

634

uint32_t value;

sys/platform/pc64/apic/ioapic_abi.c

665

value = ioapic_read(ioapic_irqs[intr].io_addr, select);

sys/platform/pc64/apic/ioapic_abi.c

666

value |= IOART_INTMSET;

sys/platform/pc64/apic/ioapic_abi.c

669

(value & ~APIC_TRIGMOD_MASK));

sys/platform/pc64/apic/ioapic_abi.c

671

(value & ~IOART_INTVEC) | vector);

sys/platform/pc64/apic/ioapic_abi.c

685

uint32_t value;

sys/platform/pc64/apic/ioapic_abi.c

721

value = ioapic_read(ioapic_irqs[intr].io_addr, select);

sys/platform/pc64/apic/ioapic_abi.c

724

(value & ~APIC_TRIGMOD_MASK));

sys/platform/pc64/apic/ioapic_abi.c

726

(value & ~IOART_INTVEC) | vector);

sys/platform/pc64/apic/lapic.c

446

uint32_t value;

sys/platform/pc64/apic/lapic.c

448

value = LAPIC_READ(lvt_timer);

sys/platform/pc64/apic/lapic.c

449

value &= ~(APIC_LVTT_PERIODIC | APIC_LVTT_TSCDLT);

sys/platform/pc64/apic/lapic.c

450

LAPIC_WRITE(lvt_timer, value);

sys/platform/pc64/apic/lapic.c

470

lapic_scale_to_tsc(unsigned value, unsigned scale)

sys/platform/pc64/apic/lapic.c

474

val = value;

sys/platform/pc64/apic/lapic.c

538

sysclock_t value;

sys/platform/pc64/apic/lapic.c

551

value = (uint32_t)(beginning - finish);

sys/platform/pc64/apic/lapic.c

556

value = muldivu64(value, sys_cputimer->freq, end);

sys/platform/pc64/apic/lapic.c

558

return value;

sys/platform/pc64/apic/lapic.c

564

sysclock_t value;

sys/platform/pc64/apic/lapic.c

633

value = do_tsc_calibration(200*1000, apic_delay_tsc);

sys/platform/pc64/apic/lapic.c

635

value = do_cputimer_calibration(2*1000*1000);

sys/platform/pc64/apic/lapic.c

637

if (value != 0)

sys/platform/pc64/apic/lapic.c

642

lapic_cputimer_intr.freq = value;

sys/platform/pc64/x86_64/nexus.c

327

nexus_write_ivar(device_t dev, device_t child, int which, uintptr_t value)

sys/platform/pc64/x86_64/nexus.c

333

ndev->nx_pcibus = value;

sys/sys/assym.h

43

#define ASSYM_ABS(value) ((value) < 0 ? -((value) + 1) + 1ULL : (value))

sys/sys/assym.h

45

#define ASSYM(name, value) \

sys/sys/assym.h

46

char name ## sign[((value) < 0 ? 1 : 0) + ASSYM_BIAS]; \

sys/sys/assym.h

47

char name ## w0[(ASSYM_ABS(value) & 0xFFFFU) + ASSYM_BIAS]; \

sys/sys/assym.h

48

char name ## w1[((ASSYM_ABS(value) & 0xFFFF0000UL) >> 16) + ASSYM_BIAS]; \

sys/sys/assym.h

49

char name ## w2[((ASSYM_ABS(value) & 0xFFFF00000000ULL) >> 32) + ASSYM_BIAS]; \

sys/sys/assym.h

50

char name ## w3[((ASSYM_ABS(value) & 0xFFFF000000000000ULL) >> 48) + ASSYM_BIAS]

sys/sys/bio.h

90

int value;

sys/sys/bitstring.h

109

#define bit_ffc(name, nbits, value) do { \

sys/sys/bitstring.h

124

*(value) = _value; \

sys/sys/bitstring.h

128

#define bit_ffs(name, nbits, value) do { \

sys/sys/bitstring.h

143

*(value) = _value; \

sys/sys/bitstring.h

147

#define bit_fls(name, nbits, value) do { \

sys/sys/bitstring.h

162

*(value) = _value; \

sys/sys/bitstring.h

166

#define bit_nsearch(name, nbits, value, len) do { \

sys/sys/bitstring.h

169

int *_value = (value); \

sys/sys/bus.h

285

uintptr_t value);

sys/sys/bus.h

437

int resource_query_string(int i, const char *resname, const char *value);

sys/sys/bus.h

442

int value);

sys/sys/bus.h

444

long value);

sys/sys/bus.h

446

const char *value);

sys/sys/consio.h

129

int value;

sys/sys/kcollect.h

101

void kcollect_setvalue(int n, uint64_t value);

sys/sys/kcollect.h

102

void kcollect_setscale(int n, uint64_t value);

sys/sys/linker.h

66

caddr_t value;

sys/sys/linker.h

84

int (*search_symbol)(linker_file_t, caddr_t value,

sys/sys/refcount.h

43

refcount_init(volatile u_int *countp, u_int value)

sys/sys/refcount.h

45

*countp = value;

sys/sys/sensors.h

114

int64_t value; /* current value */

sys/sys/sensors.h

146

int64_t value; /* current value */

sys/sys/sensors.h

197

sens->value = 0;

sys/sys/sensors.h

206

sens->value = 0;

sys/sys/sensors.h

214

sens->value = val;

sys/sys/soundcard.h

1415

#define SEQ_CONTROL(dev, chn, controller, value) \

sys/sys/soundcard.h

1416

_CHN_COMMON(dev, MIDI_CTL_CHANGE, chn, controller, 0, value)

sys/sys/soundcard.h

1418

#define SEQ_BENDER(dev, chn, value) \

sys/sys/soundcard.h

1419

_CHN_COMMON(dev, MIDI_PITCH_BEND, chn, 0, 0, value)

sys/sys/soundcard.h

1422

#define SEQ_V2_X_CONTROL(dev, voice, controller, value) { \

sys/sys/soundcard.h

1429

*(short *)&_seqbuf[_seqbufptr+5] = (value);\

sys/sys/soundcard.h

1438

#define SEQ_PITCHBEND(dev, voice, value) \

sys/sys/soundcard.h

1439

SEQ_V2_X_CONTROL(dev, voice, CTRL_PITCH_BENDER, value)

sys/sys/soundcard.h

1440

#define SEQ_BENDER_RANGE(dev, voice, value) \

sys/sys/soundcard.h

1441

SEQ_V2_X_CONTROL(dev, voice, CTRL_PITCH_BENDER_RANGE, value)

sys/sys/soundcard.h

1442

#define SEQ_EXPRESSION(dev, voice, value) \

sys/sys/soundcard.h

1443

SEQ_CONTROL(dev, voice, CTL_EXPRESSION, value*128)

sys/sys/soundcard.h

1444

#define SEQ_MAIN_VOLUME(dev, voice, value) \

sys/sys/soundcard.h

1445

SEQ_CONTROL(dev, voice, CTL_MAIN_VOLUME, (value*16383)/100)

sys/sys/soundcard.h

1469

#define SEQ_SET_TEMPO(value) _TIMER_EVENT(TMR_TEMPO, value)

sys/sys/soundcard.h

1844

int value;

sys/sys/sysproto.h

1032

int value; char value_[PAD_(int)];

sys/sys/sysproto.h

1104

off_t value; char value_[PAD_(off_t)];

sys/sys/sysproto.h

1139

off_t value; char value_[PAD_(off_t)];

sys/sys/sysproto.h

961

char * value; char value_[PAD_(char *)];

sys/sys/systm.h

334

int ksetenv(const char *name, const char *value);

sys/sys/tree.h

1000

name##_RB_LOOKUP_##ext (struct name *head, datatype value) \

sys/sys/tree.h

1007

r = xcmp(value, tmp); \

sys/sys/tree.h

1025

#define RB_LOOKUP(name, root, value) name##_RB_LOOKUP(root, value)

sys/sys/tree.h

1026

#define RB_RLOOKUP(name, root, value) name##_RB_RLOOKUP(root, value)

sys/sys/tree.h

883

name##_RB_LOOKUP(struct name *head, datatype value) \

sys/sys/tree.h

889

if (value > tmp->indexfield) \

sys/sys/tree.h

891

else if (value < tmp->indexfield) \

sys/sys/tree.h

900

name##_RB_LOOKUP_REL(struct name *head, datatype value, struct type *rel)\

sys/sys/tree.h

904

if (value == rel->indexfield - 1) { \

sys/sys/tree.h

906

if (tmp && value != tmp->indexfield) \

sys/sys/tree.h

910

if (value == rel->indexfield + 1) { \

sys/sys/tree.h

912

if (tmp && value != tmp->indexfield) \

sys/sys/tree.h

919

if (value > tmp->indexfield) \

sys/sys/tree.h

921

else if (value < tmp->indexfield) \

sys/sys/tree.h

940

name##_RB_RLOOKUP(struct name *head, datatype value) \

sys/sys/tree.h

946

if (value >= tmp->begfield && value <= tmp->endfield) \

sys/sys/tree.h

948

if (value > tmp->begfield) \

sys/sys/tree.h

969

name##_RB_RLOOKUP(struct name *head, datatype value) \

sys/sys/tree.h

975

if (value >= tmp->begfield && \

sys/sys/tree.h

976

value < tmp->begfield + tmp->sizefield) { \

sys/sys/tree.h

979

if (value > tmp->begfield) \

sys/vfs/hammer2/hammer2_chain.c

5390

chain->bref.check.iscsi32.value =

sys/vfs/hammer2/hammer2_chain.c

5394

chain->bref.check.xxhash64.value =

sys/vfs/hammer2/hammer2_chain.c

5449

chain->bref.check.iscsi32.value,

sys/vfs/hammer2/hammer2_chain.c

5453

chain->bref.check.xxhash64.value,

sys/vfs/hammer2/hammer2_chain.c

5539

r = (chain->bref.check.iscsi32.value == check32);

sys/vfs/hammer2/hammer2_chain.c

5548

r = (chain->bref.check.xxhash64.value == check64);

sys/vfs/hammer2/hammer2_disk.h

661

uint32_t value;

sys/vfs/hammer2/hammer2_disk.h

665

uint64_t value;

sys/vfs/hammer2/hammer2_lz4.c

96

# define expect(expr,value) (__builtin_expect ((expr),(value)) )

sys/vfs/hammer2/hammer2_lz4.c

98

# define expect(expr,value) (expr)

sys/vfs/hammer2/hammer2_strategy.c

1452

crc = (uint64_t)(uint32_t)chain->bref.check.iscsi32.value;

sys/vfs/hammer2/hammer2_strategy.c

1457

crc = chain->bref.check.xxhash64.value;

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

106

int inflatePrime(z_streamp strm, int bits, int value);

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

216

inflatePrime(z_streamp strm, int bits, int value)

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

228

value &= (1L << bits) - 1;

sys/vfs/hammer2/zlib/hammer2_zlib_inflate.c

229

state->hold += value << state->bits;

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

152

local unsigned bi_reverse (unsigned value, int length);

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

186

local void send_bits (deflate_state *s, int value, int length);

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

190

send_bits(deflate_state *s, int value, int length)

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

192

Tracevv((stderr," l %2d v %4x ", length, value));

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

201

s->bi_buf |= (ush)value << s->bi_valid;

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

203

s->bi_buf = (ush)value >> (Buf_size - s->bi_valid);

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

206

s->bi_buf |= (ush)value << s->bi_valid;

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

212

#define send_bits(s, value, length) \

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

215

int val = value;\

sys/vfs/hammer2/zlib/hammer2_zlib_trees.c

221

s->bi_buf |= (ush)(value) << s->bi_valid;\

sys/vfs/ufs/ffs_softdep.c

259

int value;

sys/vfs/ufs/ffs_softdep.c

275

semap->value = 0;

sys/vfs/ufs/ffs_softdep.c

291

if (semap->value > 0) {

sys/vfs/ufs/ffs_softdep.c

292

++semap->value; /* serves as wakeup flag */

sys/vfs/ufs/ffs_softdep.c

297

semap->value = 1; /* serves as owned flag */

sys/vfs/ufs/ffs_softdep.c

303

if (semap->value > 0) {

sys/vfs/ufs/ffs_softdep.c

304

++semap->value; /* serves as wakeup flag */

sys/vfs/ufs/ffs_softdep.c

310

semap->value = 1; /* serves as owned flag */

sys/vfs/ufs/ffs_softdep.c

322

if (semap->value <= 0 || semap->holder != curthread)

sys/vfs/ufs/ffs_softdep.c

326

if (--semap->value > 0) {

sys/vfs/ufs/ffs_softdep.c

327

semap->value = 0;

sys/vfs/ufs/ffs_softdep.c

333

if (--semap->value > 0) {

sys/vfs/ufs/ffs_softdep.c

334

semap->value = 0;

sys/vm/swap_pager.c

343

#define PTOB(value) ((uint64_t)(value) << PAGE_SHIFT)

sys/vm/vm_map.c

2284

int behav, off_t value)

sys/vm/vm_map.c

2400

current->ba.start, current->ba.end, value,

sys/vm/vm_map.c

2403

current->aux.master_pde = value;

sys/vm/vm_meter.c

444

#define PTOB(value) ((uint64_t)(value) << PAGE_SHIFT)

sys/vm/vm_meter.c

593

long value;

sys/vm/vm_meter.c

596

value = atomic_swap_long(&gd->gd_vmstats_adj.v_free_count, 0);

sys/vm/vm_meter.c

597

atomic_add_long(&vmstats.v_free_count, value);

sys/vm/vm_meter.c

600

value = atomic_swap_long(&gd->gd_vmstats_adj.v_cache_count, 0);

sys/vm/vm_meter.c

601

atomic_add_long(&vmstats.v_cache_count, value);

sys/vm/vm_meter.c

604

value=atomic_swap_long(&gd->gd_vmstats_adj.v_inactive_count, 0);

sys/vm/vm_meter.c

605

atomic_add_long(&vmstats.v_inactive_count, value);

sys/vm/vm_meter.c

608

value = atomic_swap_long(&gd->gd_vmstats_adj.v_active_count, 0);

sys/vm/vm_meter.c

609

atomic_add_long(&vmstats.v_active_count, value);

sys/vm/vm_meter.c

612

value = atomic_swap_long(&gd->gd_vmstats_adj.v_wire_count, 0);

sys/vm/vm_meter.c

613

atomic_add_long(&vmstats.v_wire_count, value);

sys/vm/vm_mmap.c

769

uap->behav, uap->value);

sys/vm/vm_vmspace.c

562

uap->behav, uap->value);

test/debug/kmapinfo.c

160

formatnum(int64_t value)

test/debug/kmapinfo.c

167

if (value < 0) {

test/debug/kmapinfo.c

168

value = -value;

test/debug/kmapinfo.c

173

if (value < 100000) {

test/debug/kmapinfo.c

176

} else if (value < 1 * 1024 * 1024) {

test/debug/kmapinfo.c

179

} else if (value < 1024 * 1024 * 1024) {

test/debug/kmapinfo.c

182

} else if (value < 1024LL * 1024 * 1024 * 1024) {

test/debug/kmapinfo.c

189

if (value == 0) {

test/debug/kmapinfo.c

194

(double)value / (double)div,

test/debug/kmapinfo.c

199

(double)value / (double)div,

test/debug/kmapinfo.c

78

static const char *formatnum(int64_t value);

test/debug/psinfo.c

249

formatnum(int64_t value)

test/debug/psinfo.c

256

if (value < 0) {

test/debug/psinfo.c

257

value = -value;

test/debug/psinfo.c

262

if (value < 100000) {

test/debug/psinfo.c

265

} else if (value < 1 * 1024 * 1024) {

test/debug/psinfo.c

268

} else if (value < 1024 * 1024 * 1024) {

test/debug/psinfo.c

271

} else if (value < 1024LL * 1024 * 1024 * 1024) {

test/debug/psinfo.c

278

if (value == 0) {

test/debug/psinfo.c

283

(double)value / (double)div,

test/debug/psinfo.c

288

(double)value / (double)div,

test/debug/psinfo.c

81

static const char *formatnum(int64_t value);

test/stress/stress2/tools/module/ptest.c

43

int error, value;

test/stress/stress2/tools/module/ptest.c

52

error = SYSCTL_IN(req, &value, sizeof(int));

test/stress/stress2/tools/module/ptest.c

55

if (value < 0)

test/stress/stress2/tools/module/ptest.c

57

panic_type = value;

test/testcases/posixipc/common/common.c

296

unsigned int value, int error)

test/testcases/posixipc/common/common.c

301

id = sem_open(path, flags, mode, value);

test/testcases/posixipc/common/common.c

318

sem_init_should_fail(unsigned int value, int error)

test/testcases/posixipc/common/common.c

322

if (sem_init(&id, 0, value) >= 0) {

tools/tools/ath/athpoke/athpoke.c

147

rw.value = v;

tools/tools/ath/athprom/athprom.c

193

eewrite(uint16_t off, uint16_t value)

tools/tools/ath/athprom/athprom.c

198

eeval.ee_data = value;

tools/tools/ath/common/ah_osdep.h

56

extern void OS_MARK(struct ath_hal *, u_int id, u_int32_t value);

tools/tools/net80211/wesside/wesside/aircrack-ptw-lib.c

346

fixvalue = sh2[i].value;

tools/tools/net80211/wesside/wesside/aircrack-ptw-lib.c

398

sh[i][j-1].value = table[i][j].b;

tools/tools/net80211/wesside/wesside/aircrack-ptw-lib.c

54

uint8_t value;

usr.bin/at/parsetime.c

162

return sc_tokid = Specials[i].value;

usr.bin/at/parsetime.c

73

int value; /* token id */

usr.bin/brandelf/brandelf.c

179

if (etype == elftypes[elfwalk].value)

usr.bin/brandelf/brandelf.c

193

return elftypes[elfwalk].value;

usr.bin/brandelf/brandelf.c

207

elftypes[elfwalk].value);

usr.bin/brandelf/brandelf.c

49

int value;

usr.bin/calendar/io.c

102

static bool is_variable_entry(char *line, char **value);

usr.bin/calendar/io.c

307

__func__, entry.variable, entry.value);

usr.bin/calendar/io.c

311

if (setlocale(LC_ALL, entry.value) == NULL) {

usr.bin/calendar/io.c

313

entry.value);

usr.bin/calendar/io.c

319

__func__, entry.value,

usr.bin/calendar/io.c

325

if (!set_calendar(entry.value)) {

usr.bin/calendar/io.c

327

entry.value);

usr.bin/calendar/io.c

331

__func__, entry.value);

usr.bin/calendar/io.c

336

set_nsequences(entry.value);

usr.bin/calendar/io.c

344

sday->n_name = xstrdup(entry.value);

usr.bin/calendar/io.c

353

entry.variable, entry.value);

usr.bin/calendar/io.c

357

free(entry.value);

usr.bin/calendar/io.c

421

char *p, *value, *content;

usr.bin/calendar/io.c

446

if (is_variable_entry(p, &value)) {

usr.bin/calendar/io.c

447

value = triml(value);

usr.bin/calendar/io.c

448

if (*value == '\0') {

usr.bin/calendar/io.c

456

entry->value = xstrdup(value);

usr.bin/calendar/io.c

526

is_variable_entry(char *line, char **value)

usr.bin/calendar/io.c

542

if (value != NULL)

usr.bin/calendar/io.c

543

*value = eq + 1;

usr.bin/calendar/io.c

73

char *value; /* variable value (T_VARIABLE) */

usr.bin/calendar/nnames.c

120

nname->value, nname->name, nname->f_name,

usr.bin/calendar/nnames.c

141

nname->value, nname->name, nname->f_name,

usr.bin/calendar/nnames.c

169

nname->value, nname->name, nname->f_name,

usr.bin/calendar/nnames.h

44

int value; /* month number, dow value, etc. */

usr.bin/calendar/parsedata.c

417

*month = nname->value;

usr.bin/calendar/parsedata.c

424

*month = nname->value;

usr.bin/calendar/parsedata.c

431

*month = nname->value;

usr.bin/calendar/parsedata.c

437

*month = nname->value;

usr.bin/calendar/parsedata.c

456

*dow = nname->value;

usr.bin/calendar/parsedata.c

463

*dow = nname->value;

usr.bin/calendar/parsedata.c

470

*dow = nname->value;

usr.bin/calendar/parsedata.c

476

*dow = nname->value;

usr.bin/calendar/parsedata.c

520

*index = nname->value;

usr.bin/calendar/sun.c

266

double value = ((fabs(try) > 1) ?

usr.bin/calendar/sun.c

270

if (fabs(value) > 1) {

usr.bin/calendar/sun.c

273

double offset = mod3_f(arcsin_deg(value) / 360.0, -0.5, 0.5);

usr.bin/dc/bcode.c

1503

struct value *v;

usr.bin/dc/bcode.c

450

push(struct value *v)

usr.bin/dc/bcode.c

455

static __inline struct value *

usr.bin/dc/bcode.c

461

static __inline struct value *

usr.bin/dc/bcode.c

494

struct value *value = tos();

usr.bin/dc/bcode.c

495

if (value != NULL) {

usr.bin/dc/bcode.c

496

print_value(stdout, value, "", bmachine.obase);

usr.bin/dc/bcode.c

506

struct value *value = pop();

usr.bin/dc/bcode.c

508

if (value != NULL) {

usr.bin/dc/bcode.c

509

switch (value->type) {

usr.bin/dc/bcode.c

513

normalize(value->u.num, 0);

usr.bin/dc/bcode.c

514

print_ascii(stdout, value->u.num);

usr.bin/dc/bcode.c

518

fputs(value->u.string, stdout);

usr.bin/dc/bcode.c

522

stack_free_value(value);

usr.bin/dc/bcode.c

529

struct value *value = pop();

usr.bin/dc/bcode.c

531

if (value != NULL) {

usr.bin/dc/bcode.c

532

print_value(stdout, value, "", bmachine.obase);

usr.bin/dc/bcode.c

534

stack_free_value(value);

usr.bin/dc/bcode.c

553

struct value *v = pop();

usr.bin/dc/bcode.c

659

struct value *value;

usr.bin/dc/bcode.c

664

value = pop();

usr.bin/dc/bcode.c

665

if (value != NULL) {

usr.bin/dc/bcode.c

666

switch (value->type) {

usr.bin/dc/bcode.c

670

scale = value->u.num->scale;

usr.bin/dc/bcode.c

675

stack_free_value(value);

usr.bin/dc/bcode.c

68

static __inline void push(struct value *);

usr.bin/dc/bcode.c

69

static __inline struct value *tos(void);

usr.bin/dc/bcode.c

709

struct value *value;

usr.bin/dc/bcode.c

713

value = pop();

usr.bin/dc/bcode.c

714

if (value != NULL) {

usr.bin/dc/bcode.c

715

switch (value->type) {

usr.bin/dc/bcode.c

719

digits = count_digits(value->u.num);

usr.bin/dc/bcode.c

724

digits = strlen(value->u.string);

usr.bin/dc/bcode.c

729

stack_free_value(value);

usr.bin/dc/bcode.c

738

struct value *value;

usr.bin/dc/bcode.c

741

value = pop();

usr.bin/dc/bcode.c

742

if (value != NULL) {

usr.bin/dc/bcode.c

744

switch (value->type) {

usr.bin/dc/bcode.c

748

n = value->u.num;

usr.bin/dc/bcode.c

755

str[0] = value->u.string[0];

usr.bin/dc/bcode.c

758

stack_free_value(value);

usr.bin/dc/bcode.c

789

struct value *v, copy;

usr.bin/dc/bcode.c

808

struct value *val;

usr.bin/dc/bcode.c

825

struct value *value;

usr.bin/dc/bcode.c

830

value = NULL;

usr.bin/dc/bcode.c

832

value = stack_pop(stack);

usr.bin/dc/bcode.c

834

if (value != NULL)

usr.bin/dc/bcode.c

835

push(value);

usr.bin/dc/bcode.c

846

struct value *value;

usr.bin/dc/bcode.c

850

value = pop();

usr.bin/dc/bcode.c

851

if (value == NULL)

usr.bin/dc/bcode.c

853

stack_push(&bmachine.reg[index], value);

usr.bin/dc/bcode.c

864

struct value *v, copy;

usr.bin/dc/bcode.c

897

struct value *value;

usr.bin/dc/bcode.c

905

value = pop();

usr.bin/dc/bcode.c

906

if (value == NULL) {

usr.bin/dc/bcode.c

913

stack_free_value(value);

usr.bin/dc/bcode.c

916

stack_free_value(value);

usr.bin/dc/bcode.c

919

frame_assign(stack, index, value);

usr.bin/dc/bcode.h

58

struct value *data;

usr.bin/dc/bcode.h

63

struct value *stack;

usr.bin/dc/extern.h

32

void print_value(FILE *, const struct value *, const char *, u_int);

usr.bin/dc/extern.h

47

void stack_free_value(struct value *);

usr.bin/dc/extern.h

48

struct value *stack_dup_value(const struct value *, struct value *);

usr.bin/dc/extern.h

54

void stack_push(struct stack *, struct value *);

usr.bin/dc/extern.h

55

void stack_set_tos(struct stack *, struct value *);

usr.bin/dc/extern.h

56

struct value *stack_tos(const struct stack *);

usr.bin/dc/extern.h

57

struct value *stack_pop(struct stack *);

usr.bin/dc/extern.h

63

void frame_assign(struct stack *, size_t, const struct value *);

usr.bin/dc/extern.h

64

struct value * frame_retrieve(const struct stack *, size_t);

usr.bin/dc/inout.c

370

print_value(FILE *f, const struct value *value, const char *prefix, u_int base)

usr.bin/dc/inout.c

373

switch (value->type) {

usr.bin/dc/inout.c

375

if (value->array != NULL)

usr.bin/dc/inout.c

379

printnumber(f, value->u.num, base);

usr.bin/dc/inout.c

382

fputs(value->u.string, f);

usr.bin/dc/stack.c

107

struct value *value;

usr.bin/dc/stack.c

108

struct value copy;

usr.bin/dc/stack.c

110

value = stack_tos(stack);

usr.bin/dc/stack.c

111

if (value == NULL) {

usr.bin/dc/stack.c

115

stack_push(stack, stack_dup_value(value, &copy));

usr.bin/dc/stack.c

121

struct value copy;

usr.bin/dc/stack.c

164

stack_push(struct stack *stack, struct value *v)

usr.bin/dc/stack.c

182

struct value *

usr.bin/dc/stack.c

191

stack_set_tos(struct stack *stack, struct value *v)

usr.bin/dc/stack.c

203

struct value *

usr.bin/dc/stack.c

318

array_assign(struct array *array, size_t index, const struct value *v)

usr.bin/dc/stack.c

326

static __inline struct value *

usr.bin/dc/stack.c

335

frame_assign(struct stack *stack, size_t index, const struct value *v)

usr.bin/dc/stack.c

338

struct value n;

usr.bin/dc/stack.c

34

static __inline void array_assign(struct array *, size_t, const struct value *);

usr.bin/dc/stack.c

35

static __inline struct value *array_retrieve(const struct array *, size_t);

usr.bin/dc/stack.c

352

struct value *

usr.bin/dc/stack.c

56

stack_free_value(struct value *v)

usr.bin/dc/stack.c

75

struct value *

usr.bin/dc/stack.c

76

stack_dup_value(const struct value *a, struct value *copy)

usr.bin/diff/diffreg.c

163

int value;

usr.bin/diff/diffreg.c

516

p[++j].value = h;

usr.bin/diff/diffreg.c

528

file[0][pref + 1].value == file[1][pref + 1].value;

usr.bin/diff/diffreg.c

532

file[0][len[0] - suff].value == file[1][len[1] - suff].value;

usr.bin/diff/diffreg.c

550

if (a[i].value < b[j].value)

usr.bin/diff/diffreg.c

551

a[i++].value = 0;

usr.bin/diff/diffreg.c

552

else if (a[i].value == b[j].value)

usr.bin/diff/diffreg.c

553

a[i++].value = j;

usr.bin/diff/diffreg.c

558

a[i++].value = 0;

usr.bin/diff/diffreg.c

559

b[m + 1].value = 0;

usr.bin/diff/diffreg.c

563

while (b[j + 1].value == b[j].value) {

usr.bin/diff/diffreg.c

811

if (aim->value > ai[0].value ||

usr.bin/diff/diffreg.c

812

(aim->value == ai[0].value &&

usr.bin/diff/diffreg.c

815

w.value = ai[0].value;

usr.bin/diff/diffreg.c

816

ai[0].value = aim->value;

usr.bin/diff/diffreg.c

817

aim->value = w.value;

usr.bin/diff/diffreg.c

833

a[f[i].serial] = f[i].value;

usr.bin/evtranalyze/xml.c

115

fprintf(doc->file, " %s=\"%s\"", at->name, at->value);

usr.bin/evtranalyze/xml.c

157

if (el->value) {

usr.bin/evtranalyze/xml.c

166

if (el->value) {

usr.bin/evtranalyze/xml.c

168

fprintf(doc->file, "%s", el->value);

usr.bin/evtranalyze/xml.h

41

const char *value;

usr.bin/evtranalyze/xml.h

47

const char *value;

usr.bin/evtranalyze/xml.h

64

el->value = NULL;

usr.bin/evtranalyze/xml.h

70

xml_elem_set_value(xml_element_t el, const char *value)

usr.bin/evtranalyze/xml.h

72

el->value = value;

usr.bin/evtranalyze/xml.h

77

xml_attribute_init(xml_attribute_t at, const char *name, const char *value)

usr.bin/evtranalyze/xml.h

80

at->value = value;

usr.bin/evtranalyze/xml.h

85

xml_attribute_set_value(xml_attribute_t at, const char *value)

usr.bin/evtranalyze/xml.h

87

at->value = value;

usr.bin/find/function.c

102

long long value;

usr.bin/find/function.c

126

value = strtoq(str, &endchar, 10);

usr.bin/find/function.c

127

if (value == 0 && endchar == str)

usr.bin/find/function.c

133

return value;

usr.bin/find/function.c

143

long long secs, value;

usr.bin/find/function.c

162

value = strtoq(str, &unit, 10);

usr.bin/find/function.c

163

if (value == 0 && unit == str) {

usr.bin/find/function.c

168

return value;

usr.bin/find/function.c

175

secs += value;

usr.bin/find/function.c

178

secs += value * 60;

usr.bin/find/function.c

181

secs += value * 3600;

usr.bin/find/function.c

184

secs += value * 86400;

usr.bin/find/function.c

187

secs += value * 604800;

usr.bin/find/function.c

196

value = strtoq(str, &unit, 10);

usr.bin/find/function.c

197

if (value == 0 && unit == str) {

usr.bin/find/function.c

309

char *value;

usr.bin/find/function.c

312

value = nextarg(option, argvp);

usr.bin/find/function.c

316

new->t_data.tv_sec = find_parsetime(new, option->name, value);

usr.bin/find/getdate.y

703

yylval.Number = tp->value;

usr.bin/find/getdate.y

708

yylval.Number = tp->value;

usr.bin/find/getdate.y

715

yylval.Number = tp->value;

usr.bin/find/getdate.y

724

yylval.Number = tp->value;

usr.bin/find/getdate.y

734

yylval.Number = tp->value;

usr.bin/find/getdate.y

742

yylval.Number = tp->value;

usr.bin/find/getdate.y

750

yylval.Number = tp->value;

usr.bin/find/getdate.y

765

yylval.Number = tp->value;

usr.bin/find/getdate.y

82

time_t value;

usr.bin/getaddrinfo/getaddrinfo.c

190

long value;

usr.bin/getaddrinfo/getaddrinfo.c

193

value = strtol(string, &end, 0);

usr.bin/getaddrinfo/getaddrinfo.c

196

if ((errno == ERANGE) && ((value == LONG_MAX) || (value == LONG_MIN)))

usr.bin/getaddrinfo/getaddrinfo.c

198

if ((value > INT_MAX) || (value < INT_MIN))

usr.bin/getaddrinfo/getaddrinfo.c

201

*protop = value;

usr.bin/getaddrinfo/getaddrinfo.c

229

long value;

usr.bin/getaddrinfo/getaddrinfo.c

235

value = strtol(string, &end, 0);

usr.bin/getaddrinfo/getaddrinfo.c

238

if ((errno == ERANGE) && ((value == LONG_MAX) || (value == LONG_MIN)))

usr.bin/getaddrinfo/getaddrinfo.c

240

if ((value > INT_MAX) || (value < INT_MIN))

usr.bin/getaddrinfo/getaddrinfo.c

243

*valuep = value;

usr.bin/getconf/getconf.c

163

long value;

usr.bin/getconf/getconf.c

166

value = sysconf(key);

usr.bin/getconf/getconf.c

167

if (value == -1 && errno != 0)

usr.bin/getconf/getconf.c

169

else if (value == -1)

usr.bin/getconf/getconf.c

172

printf("%ld\n", value);

usr.bin/getconf/getconf.c

178

long value;

usr.bin/getconf/getconf.c

181

value = pathconf(path, key);

usr.bin/getconf/getconf.c

182

if (value == -1 && errno != 0)

usr.bin/getconf/getconf.c

184

else if (value == -1)

usr.bin/getconf/getconf.c

187

printf("%ld\n", value);

usr.bin/getconf/getconf.h

35

int find_limit(const char *name, intmax_t *value);

usr.bin/kcollect/gnuplot.c

153

value = ary[i].data[j];

usr.bin/kcollect/gnuplot.c

156

value += ary[i].data[plot1[k]];

usr.bin/kcollect/gnuplot.c

157

dv = (double)value / 1e9;

usr.bin/kcollect/gnuplot.c

159

dv = (double)value / 100.0;

usr.bin/kcollect/gnuplot.c

231

value = ary[i].data[j];

usr.bin/kcollect/gnuplot.c

238

value += ary[i].data[plot2[k]];

usr.bin/kcollect/gnuplot.c

239

dv = (double)value / 100.0;

usr.bin/kcollect/gnuplot.c

257

dv = (double)value / KCOLLECT_INTERVAL;

usr.bin/kcollect/gnuplot.c

261

dv = (double)value / 100.0;

usr.bin/kcollect/gnuplot.c

94

uint64_t value;

usr.bin/kcollect/kcollect.c

371

format_output(uintmax_t value,char fmt,uintmax_t scale, char* ret)

usr.bin/kcollect/kcollect.c

381

value / 100, value % 100);

usr.bin/kcollect/kcollect.c

388

value / 100, value % 100);

usr.bin/kcollect/kcollect.c

394

humanize_number(buf, sizeof(buf), value, "",

usr.bin/kcollect/kcollect.c

404

humanize_number(buf, sizeof(buf), value, "",

usr.bin/kcollect/kcollect.c

418

value, "",

usr.bin/kcollect/kcollect.c

424

value, "",

usr.bin/kcollect/kcollect.c

490

uintmax_t value;

usr.bin/kcollect/kcollect.c

526

value = ary[i].data[j];

usr.bin/kcollect/kcollect.c

531

hostname, colname, value, ts_nsec);

usr.bin/kcollect/kcollect.c

546

uintmax_t value;

usr.bin/kcollect/kcollect.c

592

value = ary[i].data[j];

usr.bin/kcollect/kcollect.c

598

format_output(value, fmt, scale, sbuf);

usr.bin/kcollect/kcollect.c

614

datum key, value;

usr.bin/kcollect/kcollect.c

640

value.dptr = &ary[i].data;

usr.bin/kcollect/kcollect.c

641

value.dsize = sizeof(uint64_t) * KCOLLECT_ENTRIES;

usr.bin/kcollect/kcollect.c

642

if (dbm_store(db,key,value,DBM_REPLACE) == -1) {

usr.bin/kcollect/kcollect.c

687

datum value;

usr.bin/kcollect/kcollect.c

703

value = dbm_fetch(db, key);

usr.bin/kcollect/kcollect.c

704

if (value.dptr == NULL ||

usr.bin/kcollect/kcollect.c

705

bcmp(ary[i].data, value.dptr,

usr.bin/kcollect/kcollect.c

708

if (value.dptr != NULL) {

usr.bin/kcollect/kcollect.c

727

value.dptr = ary[i].data;

usr.bin/kcollect/kcollect.c

728

value.dsize = sizeof(uint64_t) * KCOLLECT_ENTRIES;

usr.bin/kcollect/kcollect.c

729

if (dbm_store(db, key, value, cmd) == -1) {

usr.bin/kcollect/kcollect.c

818

datum value;

usr.bin/kcollect/kcollect.c

834

value = dbm_fetch(db, key);

usr.bin/kcollect/kcollect.c

835

if (value.dptr == NULL)

usr.bin/kcollect/kcollect.c

864

value = dbm_fetch(db, key);

usr.bin/kcollect/kcollect.c

865

if (value.dptr == NULL) {

usr.bin/kcollect/kcollect.c

887

value.dptr,

usr.bin/mail/cmd1.c

134

if ((cp = value("screen")) != NULL && (s = atoi(cp)) > 0)

usr.bin/mail/cmd1.c

191

name = value("show-rcpt") != NULL ?

usr.bin/mail/cmd1.c

287

if (value("interactive") != NULL &&

usr.bin/mail/cmd1.c

288

(page || (cp = value("crt")) != NULL)) {

usr.bin/mail/cmd1.c

295

cp = value("PAGER");

usr.bin/mail/cmd1.c

315

if (value("quiet") == NULL)

usr.bin/mail/cmd1.c

358

valtop = value("toplines");

usr.bin/mail/cmd1.c

369

if (value("quiet") == NULL)

usr.bin/mail/cmd1.c

431

if ((cmd = value("LISTER")) == NULL)

usr.bin/mail/cmd3.c

182

if (value("Replyall") == NULL && value("flipr") == NULL)

usr.bin/mail/cmd3.c

247

head.h_replyto = value("REPLYTO");

usr.bin/mail/cmd3.c

366

printf("%s\t%s\n", *p, value(*p));

usr.bin/mail/cmd3.c

560

if (value("Replyall") == NULL && value("flipr") == NULL)

usr.bin/mail/cmd3.c

57

if ((sh = value("SHELL")) == NULL)

usr.bin/mail/cmd3.c

598

head.h_replyto = value("REPLYTO");

usr.bin/mail/cmd3.c

75

if ((sh = value("SHELL")) == NULL)

usr.bin/mail/collect.c

116

if (hp->h_subject == NULL && value("interactive") != NULL &&

usr.bin/mail/collect.c

117

(value("ask") != NULL || value("asksub") != NULL))

usr.bin/mail/collect.c

123

if ((cp = value("escape")) != NULL)

usr.bin/mail/collect.c

156

if (value("interactive") != NULL &&

usr.bin/mail/collect.c

157

value("ignoreeof") != NULL && ++eofcount < 25) {

usr.bin/mail/collect.c

168

value("interactive") != NULL && !lastlong &&

usr.bin/mail/collect.c

169

(value("dot") != NULL || value("ignoreeof") != NULL))

usr.bin/mail/collect.c

171

if (linebuf[0] != escape || value("interactive") == NULL ||

usr.bin/mail/collect.c

294

if(*cp != '\0' && (cp = value(cp)) != NULL) {

usr.bin/mail/collect.c

352

if ((sh = value("SHELL")) == NULL)

usr.bin/mail/collect.c

574

if ((sh = value("SHELL")) == NULL)

usr.bin/mail/collect.c

625

else if ((tabst = value("indentprefix")) == NULL)

usr.bin/mail/collect.c

678

if (value("ignore") != NULL) {

usr.bin/mail/collect.c

688

if (value("nosave") == NULL)

usr.bin/mail/edit.c

173

if ((edit = value(type == 'e' ? "EDITOR" : "VISUAL")) == NULL)

usr.bin/mail/extern.h

69

char *value(const char *);

usr.bin/mail/fio.c

348

if (name[1] == 0 && (name = value("MBOX")) == NULL)

usr.bin/mail/fio.c

369

if ((sh = value("SHELL")) == NULL)

usr.bin/mail/fio.c

417

if ((folder = value("folder")) == NULL)

usr.bin/mail/fio.c

435

if ((cp = value("DEAD")) == NULL || (cp = expand(cp)) == NULL)

usr.bin/mail/lex.c

215

if (!sourcing && value("interactive") != NULL) {

usr.bin/mail/lex.c

216

if ((value("autoinc") != NULL) && (incfile() > 0))

usr.bin/mail/lex.c

250

if (value("interactive") != NULL &&

usr.bin/mail/lex.c

251

value("ignoreeof") != NULL &&

usr.bin/mail/lex.c

451

if (value("autoprint") != NULL && com->c_argtype & P)

usr.bin/mail/lex.c

594

if (msgCount > 0 && value("noheader") == NULL) {

usr.bin/mail/lex.c

70

checkmode = value("checkmode") != NULL;

usr.bin/mail/list.c

723

if (value("searchheaders") && (cp = strchr(str, ':')) != NULL) {

usr.bin/mail/main.c

248

replyto = value("REPLYTO");

usr.bin/mail/main.c

257

if (value("checkmode") != NULL) {

usr.bin/mail/main.c

280

if (value("quiet") == NULL)

usr.bin/mail/main.c

289

if (value("headersummary") != NULL)

usr.bin/mail/names.c

361

if ((sh = value("SHELL")) == NULL)

usr.bin/mail/names.c

458

metoo = (value("metoo") != NULL);

usr.bin/mail/names.c

564

metoo = value("metoo") != NULL;

usr.bin/mail/names.c

567

verbose = value("verbose") != NULL;

usr.bin/mail/quit.c

138

autohold = value("hold") != NULL;

usr.bin/mail/quit.c

141

if (value("keepsave") != NULL)

usr.bin/mail/quit.c

200

if (value("append") == NULL) {

usr.bin/mail/quit.c

238

if (value("append") != NULL) {

usr.bin/mail/quit.c

262

if (value("append") == NULL) {

usr.bin/mail/send.c

273

head.h_replyto = value("REPLYTO");

usr.bin/mail/send.c

299

if (value("interactive") != NULL) {

usr.bin/mail/send.c

300

if (value("askcc") != NULL || value("askbcc") != NULL) {

usr.bin/mail/send.c

301

if (value("askcc") != NULL)

usr.bin/mail/send.c

303

if (value("askbcc") != NULL)

usr.bin/mail/send.c

311

if (value("dontsendempty") != NULL)

usr.bin/mail/send.c

339

if (value("recordrecip") != NULL) {

usr.bin/mail/send.c

366

if (value("recordrecip") != NULL) {

usr.bin/mail/send.c

377

} else if ((cp = value("record")) != NULL)

usr.bin/mail/send.c

400

if ((cp = value("sendmail")) != NULL)

usr.bin/mail/send.c

408

if (value("verbose") != NULL)

usr.bin/mail/v7.local.c

67

if (value("keep") != NULL || rm(mailname) < 0)

usr.bin/mail/vars.c

47

assign(const char *name, const char *value)

usr.bin/mail/vars.c

62

vp->v_value = vcopy(value);

usr.bin/netstat/if.c

73

show_stat(const char *fmt, int width, u_long value, short showvalue)

usr.bin/netstat/if.c

86

humanize_number(buf, sizeof buf, (int64_t) value, "",

usr.bin/netstat/if.c

93

printf(newfmt, value);

usr.bin/patch/backupfile.c

215

invalid_arg(const char *kind, const char *value, int problem)

usr.bin/patch/backupfile.c

222

fprintf(stderr, " %s `%s'\n", kind, value);

usr.bin/printf/printf.c

465

int value;

usr.bin/printf/printf.c

515

for (value = 0;

usr.bin/printf/printf.c

517

value <<= 3;

usr.bin/printf/printf.c

518

value += *fmt - '0';

usr.bin/printf/printf.c

521

if (percent && value == '%') {

usr.bin/printf/printf.c

525

*store = (char)value;

usr.bin/rfcomm_sppd/rfcomm_sdp.c

151

SDP_GET8(type, proto.value);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

154

SDP_GET8(len, proto.value);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

156

SDP_GET16(len, proto.value);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

158

SDP_GET32(len, proto.value);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

163

SDP_GET8(type, proto.value);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

167

SDP_GET8(len, proto.value);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

171

SDP_GET16(len, proto.value);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

175

SDP_GET32(len, proto.value);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

186

return (rfcomm_proto_list_parse(proto.value,

usr.bin/rfcomm_sppd/rfcomm_sdp.c

211

int type, len, value;

usr.bin/rfcomm_sppd/rfcomm_sdp.c

259

SDP_GET16(value, start); len -= sizeof(uint16_t);

usr.bin/rfcomm_sppd/rfcomm_sdp.c

260

if (value != SDP_UUID_PROTOCOL_RFCOMM)

usr.bin/sdpquery/search.c

109

uint32_t type, len, value;

usr.bin/sdpquery/search.c

142

SDP_GET16(value, start);

usr.bin/sdpquery/search.c

144

sdp_uuid2desc(value), value);

usr.bin/sdpquery/search.c

148

SDP_GET32(value, start);

usr.bin/sdpquery/search.c

149

fprintf(stdout, "\t%#8.8x\n", value);

usr.bin/sdpquery/search.c

198

} value;

usr.bin/sdpquery/search.c

205

SDP_GET16(value.uint16, start);

usr.bin/sdpquery/search.c

206

fprintf(stdout, "\t%s (%#4.4x)\n", sdp_uuid2desc(value.uint16),

usr.bin/sdpquery/search.c

207

value.uint16);

usr.bin/sdpquery/search.c

211

SDP_GET32(value.uint32, start);

usr.bin/sdpquery/search.c

212

fprintf(stdout, "\t%#8.8x\n", value.uint32);

usr.bin/sdpquery/search.c

216

SDP_GET_UUID128(&value.int128, start);

usr.bin/sdpquery/search.c

218

ntohl(*(uint32_t *)&value.int128.b[0]),

usr.bin/sdpquery/search.c

219

ntohs(*(uint16_t *)&value.int128.b[4]),

usr.bin/sdpquery/search.c

220

ntohs(*(uint16_t *)&value.int128.b[6]),

usr.bin/sdpquery/search.c

221

ntohs(*(uint16_t *)&value.int128.b[8]),

usr.bin/sdpquery/search.c

222

ntohs(*(uint16_t *)&value.int128.b[10]),

usr.bin/sdpquery/search.c

223

ntohl(*(uint32_t *)&value.int128.b[12]));

usr.bin/sdpquery/search.c

246

SDP_GET8(value.uint8, start);

usr.bin/sdpquery/search.c

247

fprintf(stdout, "u/int8/bool %u\n", value.uint8);

usr.bin/sdpquery/search.c

253

SDP_GET16(value.uint16, start);

usr.bin/sdpquery/search.c

254

fprintf(stdout, "u/int/uuid16 %u\n", value.uint16);

usr.bin/sdpquery/search.c

260

SDP_GET32(value.uint32, start);

usr.bin/sdpquery/search.c

261

fprintf(stdout, "u/int/uuid32 %u\n", value.uint32);

usr.bin/sdpquery/search.c

266

SDP_GET64(value.uint64, start);

usr.bin/sdpquery/search.c

267

fprintf(stdout, "u/int64 %ju\n", value.uint64);

usr.bin/sdpquery/search.c

272

SDP_GET128(&value.int128, start);

usr.bin/sdpquery/search.c

274

*(uint32_t *)&value.int128.b[0],

usr.bin/sdpquery/search.c

275

*(uint32_t *)&value.int128.b[4],

usr.bin/sdpquery/search.c

276

*(uint32_t *)&value.int128.b[8],

usr.bin/sdpquery/search.c

277

*(uint32_t *)&value.int128.b[12]);

usr.bin/sdpquery/search.c

281

SDP_GET_UUID128(&value.int128, start);

usr.bin/sdpquery/search.c

283

ntohl(*(uint32_t *)&value.int128.b[0]),

usr.bin/sdpquery/search.c

284

ntohs(*(uint16_t *)&value.int128.b[4]),

usr.bin/sdpquery/search.c

285

ntohs(*(uint16_t *)&value.int128.b[6]),

usr.bin/sdpquery/search.c

286

ntohs(*(uint16_t *)&value.int128.b[8]),

usr.bin/sdpquery/search.c

287

ntohs(*(uint16_t *)&value.int128.b[10]),

usr.bin/sdpquery/search.c

288

ntohl(*(uint32_t *)&value.int128.b[12]));

usr.bin/sdpquery/search.c

422

uint32_t type, len, value;

usr.bin/sdpquery/search.c

478

SDP_GET16(value, start);

usr.bin/sdpquery/search.c

480

sdp_uuid2desc(value), value);

usr.bin/sdpquery/search.c

484

SDP_GET32(value, start);

usr.bin/sdpquery/search.c

485

fprintf(stdout, "\t%#8.8x ", value);

usr.bin/sdpquery/search.c

518

SDP_GET16(value, start);

usr.bin/sdpquery/search.c

520

(value >> 8) & 0xff, value & 0xff);

usr.bin/sdpquery/search.c

569

int32_t type, value;

usr.bin/sdpquery/search.c

592

values[n].value = buffer[n];

usr.bin/sdpquery/search.c

619

SDP_GET8(type, values[n].value);

usr.bin/sdpquery/search.c

621

SDP_GET32(value, values[n].value);

usr.bin/sdpquery/search.c

623

"%#8.8x\n", value);

usr.bin/sdpquery/search.c

636

print_service_class_id_list(values[n].value,

usr.bin/sdpquery/search.c

637

values[n].value + values[n].vlen);

usr.bin/sdpquery/search.c

642

print_protocol_descriptor_list(values[n].value,

usr.bin/sdpquery/search.c

643

values[n].value + values[n].vlen);

usr.bin/sdpquery/search.c

648

print_bluetooth_profile_descriptor_list(values[n].value,

usr.bin/sdpquery/search.c

649

values[n].value + values[n].vlen);

usr.bin/sort/sort.c

406

parse_memory_buffer_value(const char *value)

usr.bin/sort/sort.c

409

if (value == NULL)

usr.bin/sort/sort.c

417

membuf = strtoll(value, &endptr, 10);

usr.bin/systat/netbw.c

163

static const char *numtok(double value);

usr.bin/systat/netbw.c

396

numtok(double value)

usr.bin/systat/netbw.c

404

while (value >= 1000.0 && suffixes[suffix+1]) {

usr.bin/systat/netbw.c

405

value /= 1000.0;

usr.bin/systat/netbw.c

409

if (value < 0.001) {

usr.bin/systat/netbw.c

411

} else if (value < 1.0) {

usr.bin/systat/netbw.c

413

} else if (value < 10.0) {

usr.bin/systat/netbw.c

415

} else if (value < 100.0) {

usr.bin/systat/netbw.c

421

fmt, value, suffixes[suffix]);

usr.bin/systat/pftop.c

189

static const char *numtok(double value, double template);

usr.bin/systat/pftop.c

431

numtok(double value, double template)

usr.bin/systat/pftop.c

440

value /= 1000.0;

usr.bin/systat/pftop.c

445

if (value < 0.001) {

usr.bin/systat/pftop.c

459

fmt, value, suffixes[suffix]);

usr.bin/systat/sensors.c

201

(sensor.value - 273150000) / 1000000.0);

usr.bin/systat/sensors.c

204

mvwprintw(wnd, row, 24, "%11lld RPM", sensor.value);

usr.bin/systat/sensors.c

208

sensor.value / 1000000.0);

usr.bin/systat/sensors.c

211

mvwprintw(wnd, row, 24, "%13.2f W", sensor.value / 1000000.0);

usr.bin/systat/sensors.c

214

mvwprintw(wnd, row, 24, "%10.2f A", sensor.value / 1000000.0);

usr.bin/systat/sensors.c

217

mvwprintw(wnd, row, 24, "%15s", sensor.value? "On" : "Off");

usr.bin/systat/sensors.c

220

mvwprintw(wnd, row, 24, "%11lld raw", sensor.value);

usr.bin/systat/sensors.c

223

mvwprintw(wnd, row, 24, "%14.2f%%", sensor.value / 1000.0);

usr.bin/systat/sensors.c

226

mvwprintw(wnd, row, 24, "%15.2f lx", sensor.value / 1000000.0);

usr.bin/systat/sensors.c

229

if (0 < sensor.value &&

usr.bin/systat/sensors.c

230

(size_t)sensor.value < NELEM(drvstat)) {

usr.bin/systat/sensors.c

231

mvwprintw(wnd, row, 24, "%15s", drvstat[sensor.value]);

usr.bin/systat/sensors.c

236

mvwprintw(wnd, row, 24, "%15s", fmttime(sensor.value / 1000000000.0));

usr.bin/systat/sensors.c

239

mvwprintw(wnd, row, 24, "%12.2f Wh", sensor.value / 1000000.0);

usr.bin/systat/sensors.c

242

mvwprintw(wnd, row, 24, "%10.2f Ah", sensor.value / 1000000.0);

usr.bin/systat/sensors.c

245

humanize_number(buf, sizeof(buf), sensor.value, "Hz",

usr.bin/systat/sensors.c

250

mvwprintw(wnd, row, 24, "%10lld", sensor.value);

usr.bin/telnet/commands.c

1574

unsigned char *value; /* pointer to variable value */

usr.bin/telnet/commands.c

1615

&& ((*ep->value == ':')

usr.bin/telnet/commands.c

1616

|| (strncmp((char *)ep->value, "unix:", 5) == 0))) {

usr.bin/telnet/commands.c

1618

char *cp2 = strchr((char *)ep->value, ':');

usr.bin/telnet/commands.c

1627

free(ep->value);

usr.bin/telnet/commands.c

1628

ep->value = (unsigned char *)cp;

usr.bin/telnet/commands.c

1636

env_define("USER", ep->value);

usr.bin/telnet/commands.c

1644

env_define(const unsigned char *var, unsigned char *value)

usr.bin/telnet/commands.c

1651

if (ep->value)

usr.bin/telnet/commands.c

1652

free(ep->value);

usr.bin/telnet/commands.c

1664

ep->value = strdup(value);

usr.bin/telnet/commands.c

1679

if (ep->value)

usr.bin/telnet/commands.c

1680

free(ep->value);

usr.bin/telnet/commands.c

1736

ep->var, ep->value);

usr.bin/telnet/commands.c

1764

return(ep->value);

usr.bin/telnet/commands.c

888

int value;

usr.bin/telnet/commands.c

945

value = special(argv[2]);

usr.bin/telnet/commands.c

947

value = _POSIX_VDISABLE;

usr.bin/telnet/commands.c

949

*(ct->charp) = (cc_t)value;

usr.bin/telnet/network.c

79

int value;

usr.bin/telnet/network.c

84

value = select(net+1, NULL, NULL, &excepts, &timeout);

usr.bin/telnet/network.c

85

} while ((value == -1) && (errno == EINTR));

usr.bin/telnet/network.c

87

if (value < 0) {

usr.bin/telnet/sys_bsd.c

730

long value;

usr.bin/telnet/sys_bsd.c

758

while ((tp->speed != -1) && (tp->value < in))

usr.bin/telnet/sys_bsd.c

763

while ((tp->speed != -1) && (tp->value < out))

usr.bin/telnet/telnet.c

1327

slc_add_reply(unsigned char func, unsigned char flags, cc_t value)

usr.bin/telnet/telnet.c

1341

if ((*slc_replyp++ = (unsigned char)value) == IAC)

usr.bin/tip/acu.c

104

logent(value(HOST), phnum, acu->acu_name,

usr.bin/tip/acu.c

108

logent(value(HOST), phnum, acu->acu_name,

usr.bin/tip/acu.c

125

if (strcmp(string, value(HOST)))

usr.bin/tip/acu.c

142

logent(value(HOST), phnum, acu->acu_name,

usr.bin/tip/acu.c

146

logent(value(HOST), phnum, acu->acu_name,

usr.bin/tip/acu.c

153

logent(value(HOST), "", acu->acu_name, "missing phone number");

usr.bin/tip/acu.c

163

logent(value(HOST), "", DV, "call terminated");

usr.bin/tip/acu.c

167

logent(value(HOST), "", acu->acu_name, "call terminated");

usr.bin/tip/acu.c

168

if (boolean(value(VERBOSE)))

usr.bin/tip/acu.c

171

logent(value(HOST), "", acu->acu_name, reason);

usr.bin/tip/acu.c

69

logent(value(HOST), "", DV, "call completed");

usr.bin/tip/acu.c

82

logent(value(HOST), "", "", "call aborted");

usr.bin/tip/acu.c

84

boolean(value(VERBOSE)) = FALSE;

usr.bin/tip/cmds.c

120

transfer(buf, sfd, value(EOFREAD));

usr.bin/tip/cmds.c

162

v = boolean(value(VERBOSE));

usr.bin/tip/cmds.c

168

if ((cnt = number(value(FRAMESIZE))) != BUFSIZ)

usr.bin/tip/cmds.c

247

v = boolean(value(VERBOSE));

usr.bin/tip/cmds.c

253

if ((cnt = number(value(FRAMESIZE))) != BUFSIZ)

usr.bin/tip/cmds.c

329

transfer(buf, pdes[1], value(EOFREAD));

usr.bin/tip/cmds.c

384

transmit(fd, value(EOFWRITE), NULL);

usr.bin/tip/cmds.c

385

if (!boolean(value(ECHOCHECK))) {

usr.bin/tip/cmds.c

410

if (boolean(value(ECHOCHECK)))

usr.bin/tip/cmds.c

428

if (c == 0177 && !boolean(value(RAWFTP)))

usr.bin/tip/cmds.c

433

if (!boolean(value(RAWFTP)))

usr.bin/tip/cmds.c

437

if (!boolean(value(RAWFTP))) {

usr.bin/tip/cmds.c

438

if (boolean(value(TABEXPAND))) {

usr.bin/tip/cmds.c

446

if (!boolean(value(RAWFTP)))

usr.bin/tip/cmds.c

450

} while (c != '\r' && !boolean(value(RAWFTP)));

usr.bin/tip/cmds.c

451

if (boolean(value(VERBOSE)))

usr.bin/tip/cmds.c

453

if (boolean(value(ECHOCHECK))) {

usr.bin/tip/cmds.c

455

alarm(number(value(ETIMEOUT)));

usr.bin/tip/cmds.c

464

} while ((c&0177) != character(value(PROMPT)));

usr.bin/tip/cmds.c

469

if (lastc != '\n' && !boolean(value(RAWFTP)))

usr.bin/tip/cmds.c

476

if (boolean(value(VERBOSE))) {

usr.bin/tip/cmds.c

477

if (boolean(value(RAWFTP)))

usr.bin/tip/cmds.c

510

if (boolean(value(ECHOCHECK)))

usr.bin/tip/cmds.c

543

if (number(value(CDELAY)) > 0 && c != '\r')

usr.bin/tip/cmds.c

544

nap(number(value(CDELAY)));

usr.bin/tip/cmds.c

545

if (!boolean(value(ECHOCHECK))) {

usr.bin/tip/cmds.c

546

if (number(value(LDELAY)) > 0 && c == '\r')

usr.bin/tip/cmds.c

547

nap(number(value(LDELAY)));

usr.bin/tip/cmds.c

552

alarm(number(value(ETIMEOUT)));

usr.bin/tip/cmds.c

612

if (boolean(value(VERBOSE)))

usr.bin/tip/cmds.c

658

if (flags & TL_VERBOSE && boolean(value(VERBOSE)))

usr.bin/tip/cmds.c

710

if ((cp = rindex(value(SHELL), '/')) == NULL)

usr.bin/tip/cmds.c

711

cp = value(SHELL);

usr.bin/tip/cmds.c

715

execl(value(SHELL), cp, NULL);

usr.bin/tip/cmds.c

733

if (boolean(value(SCRIPT)))

usr.bin/tip/cmds.c

734

write(fildes[1], value(RECORD), size(value(RECORD)));

usr.bin/tip/cmds.c

741

printf("can't create %s\r\n", value(RECORD));

usr.bin/tip/cmds.c

757

cp = value(HOME);

usr.bin/tip/cmds.c

788

if ((dismsg = value(DISCONNECT)) != NULL) {

usr.bin/tip/cmds.c

808

if ((cp = rindex(value(SHELL), '/')) == NULL)

usr.bin/tip/cmds.c

809

cp = value(SHELL);

usr.bin/tip/cmds.c

813

execl(value(SHELL), cp, "-c", s, NULL);

usr.bin/tip/cmds.c

881

if (boolean(value(SCRIPT)))

usr.bin/tip/cmds.c

886

if (boolean(value(TAND)))

usr.bin/tip/cmds.c

893

HD = boolean(value(LECHO));

usr.bin/tip/cmds.c

897

setparity(value(PARITY));

usr.bin/tip/cmds.c

968

Shell = value(SHELL);

usr.bin/tip/cu.c

115

boolean(value(VERBOSE)) = 0;

usr.bin/tip/log.c

73

flog = fopen(value(LOG), "a");

usr.bin/tip/log.c

75

fprintf(stderr, "can't open log file %s.\r\n", value(LOG));

usr.bin/tip/remote.c

201

boolean(value(RAISE)) = 1;

usr.bin/tip/remote.c

203

boolean(value(ECHOCHECK)) = 1;

usr.bin/tip/remote.c

205

boolean(value(BEAUTIFY)) = 1;

usr.bin/tip/remote.c

207

boolean(value(BEAUTIFY)) = 0;

usr.bin/tip/remote.c

209

boolean(value(SCRIPT)) = 1;

usr.bin/tip/remote.c

211

boolean(value(TABEXPAND)) = 1;

usr.bin/tip/remote.c

213

boolean(value(VERBOSE)) = 1;

usr.bin/tip/remote.c

215

boolean(value(VERBOSE)) = 0;

usr.bin/tip/remote.c

217

boolean(value(TAND)) = 1;

usr.bin/tip/remote.c

219

boolean(value(TAND)) = 0;

usr.bin/tip/remote.c

221

boolean(value(RAWFTP)) = 1;

usr.bin/tip/remote.c

223

boolean(value(HALFDUPLEX)) = 1;

usr.bin/tip/tip.c

160

if ((i = speed(number(value(BAUDRATE)))) == 0) {

usr.bin/tip/tip.c

161

printf("tip: bad baud rate %d\n", number(value(BAUDRATE)));

usr.bin/tip/tip.c

373

if (boolean(value(SCRIPT))) {

usr.bin/tip/tip.c

383

if ((gch == character(value(ESCAPE))) && bol) {

usr.bin/tip/tip.c

386

} else if (!cumode && gch == character(value(RAISECHAR))) {

usr.bin/tip/tip.c

387

boolean(value(RAISE)) = !boolean(value(RAISE));

usr.bin/tip/tip.c

392

if (boolean(value(HALFDUPLEX)))

usr.bin/tip/tip.c

395

} else if (!cumode && gch == character(value(FORCE))) {

usr.bin/tip/tip.c

401

bol = any(gch, value(EOL));

usr.bin/tip/tip.c

402

if (boolean(value(RAISE)) && islower(gch))

usr.bin/tip/tip.c

405

if (boolean(value(HALFDUPLEX)))

usr.bin/tip/tip.c

421

char c = character(value(ESCAPE));

usr.bin/tip/tip.c

520

printf("%2s", ctrl(character(value(ESCAPE))));

usr.bin/tip/tip.c

534

if (boolean(value(TAND)))

usr.bin/tip/tip.c

598

if (value(PARITY) == NULL)

usr.bin/tip/tip.c

599

value(PARITY) = defparity;

usr.bin/tip/tip.c

600

parity = value(PARITY);

usr.bin/tip/tipout.c

104

boolean(value(BEAUTIFY)) = !boolean(value(BEAUTIFY));

usr.bin/tip/tipout.c

156

if (boolean(value(SCRIPT)) && fscript != NULL) {

usr.bin/tip/tipout.c

157

if (!boolean(value(BEAUTIFY))) {

usr.bin/tip/tipout.c

163

any(*cp, value(EXCEPTIONS)))

usr.bin/tip/tipout.c

74

if (boolean(value(SCRIPT)) && fscript != NULL)

usr.bin/tip/tipout.c

77

boolean(value(SCRIPT)) = FALSE;

usr.bin/tip/tipout.c

84

boolean(value(SCRIPT)) = TRUE;

usr.bin/tip/tipout.c

95

if (boolean(value(SCRIPT)) && fscript != NULL)

usr.bin/tip/unidialer.c

196

if (cgetstr (bp, (char *)mpp->name, mpp->value.string) == -1)

usr.bin/tip/unidialer.c

197

*mpp->value.string = mpp->default_value.string;

usr.bin/tip/unidialer.c

203

*mpp->value.number = mpp->default_value.number;

usr.bin/tip/unidialer.c

205

*mpp->value.number = (unsigned int)l;

usr.bin/tip/unidialer.c

209

*mpp->value.number = cgetflag ((char *)mpp->name);

usr.bin/tip/unidialer.c

392

if ((i = speed(number(value(BAUDRATE)))) == 0)

usr.bin/tip/unidialer.c

397

if (boolean(value(VERBOSE)))

usr.bin/tip/unidialer.c

408

logent(value(HOST), num, modem_name, "can't synch up");

usr.bin/tip/unidialer.c

417

if (boolean(value(VERBOSE)))

usr.bin/tip/unidialer.c

446

number(value(DIALTIMEOUT)));

usr.bin/tip/unidialer.c

447

logent(value(HOST), num, modem_name, line);

usr.bin/tip/unidialer.c

509

logent(value(HOST), "", modem_name, "can't hang up modem");

usr.bin/tip/unidialer.c

510

if (boolean(value(VERBOSE)))

usr.bin/tip/unidialer.c

546

alarm(number(value(DIALTIMEOUT)));

usr.bin/tip/unidialer.c

559

if (boolean(value(VERBOSE)))

usr.bin/tip/unidialer.c

569

if (boolean(value(VERBOSE)))

usr.bin/tip/unidialer.c

606

alarm(number(value(DIALTIMEOUT)));

usr.bin/tip/unidialer.c

618

boolean(value(VERBOSE))) {

usr.bin/tip/unidialer.c

630

if (boolean(value(VERBOSE)))

usr.bin/tip/unidialer.c

64

} value;

usr.bin/tip/unidialer.c

641

if (boolean(value(VERBOSE)))

usr.bin/tip/value.c

70

strcpy(file, value(HOME));

usr.bin/top/color.c

247

color_test(int tagidx, int value)

usr.bin/top/color.c

262

if ((!ce->min || ce->min <= value) &&

usr.bin/top/color.c

263

(!ce->max || ce->max >= value))

usr.bin/top/color.h

46

int color_test(int tagidx, int value);

usr.bin/top/display.c

1141

int value;

usr.bin/top/display.c

1168

value = *states;

usr.bin/top/display.c

1172

color = color_test(*cidx++, value/10);

usr.bin/top/display.c

1177

(value >= 1000 ? "%4.0f%% %s%s" : "%4.1f%% %s%s"),

usr.bin/top/display.c

1178

((float)value)/10.,

usr.bin/top/display.c

1199

value = *states;

usr.bin/top/display.c

1203

color = color_test(*cidx++, value/10);

usr.bin/top/display.c

1209

(value >= 1000 ? "%4.0f%% %s%s" : "%4.1f%% %s%s"),

usr.bin/top/display.c

1210

((float)value)/10.,

usr.bin/top/display.c

1230

int value;

usr.bin/top/display.c

1254

value = *states;

usr.bin/top/display.c

1258

color = color_test(*cidx, value/10);

usr.bin/top/display.c

1262

(value >= 1000 ? "%4.0f" : "%4.1f"),

usr.bin/top/display.c

1263

((double)value)/10.);

usr.bin/top/display.c

1289

value = *states;

usr.bin/top/display.c

1293

color = color_test(*cidx, value/10);

usr.bin/top/display.c

1298

(value >= 1000 ? "%4.0f" : "%4.1f"),

usr.bin/top/display.c

1299

((double)value)/10.);

usr.bin/top/display.c

1302

*lp = value;

usr.bin/top/hash.c

1016

hi->value = value;

usr.bin/top/hash.c

1048

return ((hash_item_string *)(li->datum))->value;

usr.bin/top/hash.c

1062

hash_replace_string(hash_table *ht, char * key, void *value)

usr.bin/top/hash.c

1085

result = hi->value;

usr.bin/top/hash.c

1086

hi->value = value;

usr.bin/top/hash.c

1098

hi->value = value;

usr.bin/top/hash.c

1135

result = h->value;

usr.bin/top/hash.c

1176

result = hi->value;

usr.bin/top/hash.c

1310

ans = hi->value;

usr.bin/top/hash.c

1337

hash_add_pidthr(hash_table *ht, pidthr_t key, void *value)

usr.bin/top/hash.c

1354

hi->value = value;

usr.bin/top/hash.c

1386

return ((hash_item_pidthr *)(li->datum))->value;

usr.bin/top/hash.c

1400

hash_replace_pidthr(hash_table *ht, pidthr_t key, void *value)

usr.bin/top/hash.c

1423

result = hi->value;

usr.bin/top/hash.c

1424

hi->value = value;

usr.bin/top/hash.c

1436

hi->value = value;

usr.bin/top/hash.c

1473

result = h->value;

usr.bin/top/hash.c

1514

result = hi->value;

usr.bin/top/hash.c

1648

ans = hi->value;

usr.bin/top/hash.c

1676

hash_add_lwpid(hash_table *ht, lwpid_t key, void *value)

usr.bin/top/hash.c

1693

hi->value = value;

usr.bin/top/hash.c

1725

return ((hash_item_lwpid *)(li->datum))->value;

usr.bin/top/hash.c

1739

hash_replace_lwpid(hash_table *ht, lwpid_t key, void *value)

usr.bin/top/hash.c

1762

result = hi->value;

usr.bin/top/hash.c

1763

hi->value = value;

usr.bin/top/hash.c

1775

hi->value = value;

usr.bin/top/hash.c

1812

result = h->value;

usr.bin/top/hash.c

1853

result = hi->value;

usr.bin/top/hash.c

1987

ans = hi->value;

usr.bin/top/hash.c

323

hash_add_uint(hash_table *ht, unsigned int key, void *value)

usr.bin/top/hash.c

340

hi->value = value;

usr.bin/top/hash.c

372

return ((hash_item_uint *)(li->datum))->value;

usr.bin/top/hash.c

386

hash_replace_uint(hash_table *ht, unsigned int key, void *value)

usr.bin/top/hash.c

409

result = hi->value;

usr.bin/top/hash.c

410

hi->value = value;

usr.bin/top/hash.c

422

hi->value = value;

usr.bin/top/hash.c

459

result = h->value;

usr.bin/top/hash.c

500

result = hi->value;

usr.bin/top/hash.c

634

ans = hi->value;

usr.bin/top/hash.c

661

hash_add_pid(hash_table *ht, pid_t key, void *value)

usr.bin/top/hash.c

678

hi->value = value;

usr.bin/top/hash.c

710

return ((hash_item_pid *)(li->datum))->value;

usr.bin/top/hash.c

724

hash_replace_pid(hash_table *ht, pid_t key, void *value)

usr.bin/top/hash.c

747

result = hi->value;

usr.bin/top/hash.c

748

hi->value = value;

usr.bin/top/hash.c

760

hi->value = value;

usr.bin/top/hash.c

797

result = h->value;

usr.bin/top/hash.c

838

result = hi->value;

usr.bin/top/hash.c

972

ans = hi->value;

usr.bin/top/hash.c

999

hash_add_string(hash_table *ht, char * key, void *value)

usr.bin/top/hash.h

101

void *hash_add_pid(hash_table *ht, pid_t key, void *value);

usr.bin/top/hash.h

102

void *hash_replace_pid(hash_table *ht, pid_t key, void *value);

usr.bin/top/hash.h

112

void *value;

usr.bin/top/hash.h

115

void *hash_add_string(hash_table *ht, char * key, void *value);

usr.bin/top/hash.h

116

void *hash_replace_string(hash_table *ht, char * key, void *value);

usr.bin/top/hash.h

126

void *value;

usr.bin/top/hash.h

129

void *hash_add_pidthr(hash_table *ht, pidthr_t key, void *value);

usr.bin/top/hash.h

130

void *hash_replace_pidthr(hash_table *ht, pidthr_t key, void *value);

usr.bin/top/hash.h

141

void *value;

usr.bin/top/hash.h

144

void *hash_add_lwpid(hash_table *ht, lwpid_t key, void *value);

usr.bin/top/hash.h

145

void *hash_replace_lwpid(hash_table *ht, lwpid_t key, void *value);

usr.bin/top/hash.h

84

void *value;

usr.bin/top/hash.h

87

void *hash_add_uint(hash_table *ht, unsigned int key, void *value);

usr.bin/top/hash.h

88

void *hash_replace_uint(hash_table *ht, unsigned int key, void *value);

usr.bin/top/hash.h

98

void *value;

usr.bin/unifdef/unifdef.c

1011

*valp = (value[sym] != NULL);

usr.bin/unifdef/unifdef.c

1021

} else if (value[sym] == NULL) {

usr.bin/unifdef/unifdef.c

1025

*valp = strtol(value[sym], &ep, 0);

usr.bin/unifdef/unifdef.c

1026

if (*ep != '\0' || ep == value[sym])

usr.bin/unifdef/unifdef.c

1374

if (value[sym] == NULL)

usr.bin/unifdef/unifdef.c

1376

cp = value[sym];

usr.bin/unifdef/unifdef.c

1380

value[ind] == NULL ||

usr.bin/unifdef/unifdef.c

1381

value[ind] == value[sym])

usr.bin/unifdef/unifdef.c

1384

value[sym] = value[ind];

usr.bin/unifdef/unifdef.c

1429

value[symind] = val;

usr.bin/unifdef/unifdef.c

1437

value[symind] ? '=' : ' ',

usr.bin/unifdef/unifdef.c

1438

value[symind] ? value[symind] : "undef");

usr.bin/unifdef/unifdef.c

166

static const char *value[MAXSYMS]; /* -Dsym=value */

usr.bin/unifdef/unifdef.c

807

if (value[cursym] == NULL)

usr.bin/usbhidaction/usbhidaction.c

212

if (val == cmd->value)

usr.bin/usbhidaction/usbhidaction.c

218

cmd->value : -1;

usr.bin/usbhidaction/usbhidaction.c

220

if (cmd->value != val && cmd->anyvalue == 0)

usr.bin/usbhidaction/usbhidaction.c

282

char buf[SIZE], name[SIZE], value[SIZE], debounce[SIZE], action[SIZE];

usr.bin/usbhidaction/usbhidaction.c

308

name, value, debounce, action) != 4) {

usr.bin/usbhidaction/usbhidaction.c

333

if (strcmp(value, "*") == 0) {

usr.bin/usbhidaction/usbhidaction.c

337

if (sscanf(value, "%d", &cmd->value) != 1) {

usr.bin/usbhidaction/usbhidaction.c

342

conf, line, value);

usr.bin/usbhidaction/usbhidaction.c

348

conf, line, value);

usr.bin/usbhidaction/usbhidaction.c

451

if (cmd->value == 1)

usr.bin/usbhidaction/usbhidaction.c

452

cmd->value = u - lo;

usr.bin/usbhidaction/usbhidaction.c

454

cmd->value = -1;

usr.bin/usbhidaction/usbhidaction.c

459

cmd->value, cmd->action);

usr.bin/usbhidaction/usbhidaction.c

466

docmd(struct command *cmd, int value, const char *hid, int argc, char **argv)

usr.bin/usbhidaction/usbhidaction.c

484

snprintf(q, len, "%d", value);

usr.bin/usbhidaction/usbhidaction.c

59

int value;

usr.bin/vmstat/vmstat.c

157

static const char *formatnum(intmax_t value, int width, int do10s);

usr.bin/vmstat/vmstat.c

582

formatnum(intmax_t value, int width, int do10s)

usr.bin/vmstat/vmstat.c

597

snprintf(buf[bi], sizeof(buf[bi]), "%4jd", value);

usr.bin/vmstat/vmstat.c

600

snprintf(buf[bi], sizeof(buf[bi]), "%5jd", value);

usr.bin/vmstat/vmstat.c

603

snprintf(buf[bi], sizeof(buf[bi]), "%jd", value);

usr.bin/vmstat/vmstat.c

609

d = (double)value;

usr.bin/vmstat/vmstat.c

614

if (value < 1024) {

usr.bin/vmstat/vmstat.c

616

} else if (value < 10*1024) {

usr.bin/vmstat/vmstat.c

619

} else if (value < 1000*1024) {

usr.bin/vmstat/vmstat.c

622

} else if (value < 10*1024*1024) {

usr.bin/vmstat/vmstat.c

625

} else if (value < 1000*1024*1024) {

usr.bin/vmstat/vmstat.c

634

if (value < 1024) {

usr.bin/vmstat/vmstat.c

636

} else if (value < 10*1024) {

usr.bin/vmstat/vmstat.c

639

} else if (value < 100*1024 && do10s) {

usr.bin/vmstat/vmstat.c

642

} else if (value < 1000*1024) {

usr.bin/vmstat/vmstat.c

645

} else if (value < 10*1024*1024) {

usr.bin/vmstat/vmstat.c

648

} else if (value < 100*1024*1024 && do10s) {

usr.bin/vmstat/vmstat.c

651

} else if (value < 1000*1024*1024) {

usr.bin/vmstat/vmstat.c

654

} else if (value < 10LL*1024*1024*1024) {

usr.bin/vmstat/vmstat.c

657

} else if (value < 100LL*1024*1024*1024 && do10s) {

usr.bin/vmstat/vmstat.c

660

} else if (value < 1000LL*1024*1024*1024) {

usr.bin/window/cmd4.c

50

if (dolongcmd(buf, (struct value *)0, 0) < 0)

usr.bin/window/context.c

108

cx_beginbuf(char *buf, struct value *arg, int narg)

usr.bin/window/context.h

58

struct value *X_arg; /* argument for alias */

usr.bin/window/context.h

64

struct value x_val; /* values associated with token */

usr.bin/window/defs.h

89

int cx_beginbuf(char *, struct value *, int);

usr.bin/window/defs.h

96

int dolongcmd(char *, struct value *, int);

usr.bin/window/lcmd.c

114

dolongcmd(char *buffer, struct value *arg, int narg)

usr.bin/window/lcmd.h

42

void (*lc_func)(struct value *, struct value *);

usr.bin/window/lcmd.h

60

void l_alias(struct value *, struct value *);

usr.bin/window/lcmd.h

61

void l_close(struct value *, struct value *);

usr.bin/window/lcmd.h

62

void l_cursormodes(struct value *, struct value *);

usr.bin/window/lcmd.h

63

void l_debug(struct value *, struct value *);

usr.bin/window/lcmd.h

64

void l_def_nline(struct value *, struct value *);

usr.bin/window/lcmd.h

65

void l_def_shell(struct value *, struct value *);

usr.bin/window/lcmd.h

66

void l_def_smooth(struct value *, struct value *);

usr.bin/window/lcmd.h

67

void l_echo(struct value *, struct value *);

usr.bin/window/lcmd.h

68

void l_escape(struct value *, struct value *);

usr.bin/window/lcmd.h

69

void l_foreground(struct value *, struct value *);

usr.bin/window/lcmd.h

70

void l_iostat(struct value *, struct value *);

usr.bin/window/lcmd.h

71

void l_label(struct value *, struct value *);

usr.bin/window/lcmd.h

72

void l_list(struct value *, struct value *);

usr.bin/window/lcmd.h

73

void l_select(struct value *, struct value *);

usr.bin/window/lcmd.h

74

void l_smooth(struct value *, struct value *);

usr.bin/window/lcmd.h

75

void l_source(struct value *, struct value *);

usr.bin/window/lcmd.h

76

void l_terse(struct value *, struct value *);

usr.bin/window/lcmd.h

77

void l_time(struct value *, struct value *);

usr.bin/window/lcmd.h

78

void l_unalias(struct value *, struct value *);

usr.bin/window/lcmd.h

79

void l_unset(struct value *, struct value *);

usr.bin/window/lcmd.h

80

void l_variable(struct value *, struct value *);

usr.bin/window/lcmd.h

81

void l_window(struct value *, struct value *);

usr.bin/window/lcmd.h

82

void l_write(struct value *, struct value *);

usr.bin/window/lcmd.h

83

struct ww *vtowin(struct value *, struct ww *);

usr.bin/window/lcmd1.c

135

l_def_nline(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

150

l_smooth(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

171

l_def_smooth(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

184

l_select(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

203

l_debug(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

216

l_escape(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

238

l_label(struct value *v __unused, struct value *a)

usr.bin/window/lcmd1.c

256

l_foreground(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

279

l_terse(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

292

l_source(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

309

l_write(struct value *v __unused, struct value *a)

usr.bin/window/lcmd1.c

333

l_close(struct value *v __unused, struct value *a)

usr.bin/window/lcmd1.c

351

l_cursormodes(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

366

l_unset(struct value *v, struct value *a)

usr.bin/window/lcmd1.c

386

vtowin(struct value *v, struct ww *w)

usr.bin/window/lcmd1.c

407

vtobool(struct value *v, char def, char err)

usr.bin/window/lcmd1.c

43

char vtobool(struct value *, char, char);

usr.bin/window/lcmd1.c

62

l_window(struct value *v, struct value *a)

usr.bin/window/lcmd2.c

103

l_time(struct value *v __unused, struct value *a)

usr.bin/window/lcmd2.c

173

l_list(struct value *v __unused, struct value *a __unused)

usr.bin/window/lcmd2.c

205

l_variable(struct value *v __unused, struct value *a __unused)

usr.bin/window/lcmd2.c

245

l_def_shell(struct value *v, struct value *a)

usr.bin/window/lcmd2.c

248

struct value *vp;

usr.bin/window/lcmd2.c

287

l_alias(struct value *v, struct value *a)

usr.bin/window/lcmd2.c

310

struct value *vp;

usr.bin/window/lcmd2.c

353

l_unalias(struct value *v, struct value *a)

usr.bin/window/lcmd2.c

367

l_echo(struct value *v __unused, struct value *a)

usr.bin/window/lcmd2.c

51

l_iostat(struct value *v __unused, struct value *a __unused)

usr.bin/window/main.c

165

(void) dolongcmd(cmd, (struct value *)0, 0);

usr.bin/window/parser.h

46

int p_assign(const char *, struct value *, int);

usr.bin/window/parser.h

47

int p_convstr(struct value *v);

usr.bin/window/parser.h

50

int p_expr(struct value *, char);

usr.bin/window/parser.h

51

int p_expr0(struct value *, char);

usr.bin/window/parser.h

52

int p_expr1(struct value *, char);

usr.bin/window/parser.h

53

int p_expr11(struct value *, char);

usr.bin/window/parser.h

54

int p_expr12(struct value *, char);

usr.bin/window/parser.h

55

int p_expr2(struct value *, char);

usr.bin/window/parser.h

56

int p_expr3_10(int, struct value *, char);

usr.bin/window/parser.h

58

int p_function(const char *, struct value *, int);

usr.bin/window/parser1.c

141

struct value t;

usr.bin/window/parser1.c

184

p_convstr(struct value *v)

usr.bin/window/parser1.c

86

struct value t;

usr.bin/window/parser2.c

210

p_assign(const char *name, struct value *v, int flag)

usr.bin/window/parser2.c

50

p_function(const char *name, struct value *v, int flag)

usr.bin/window/parser2.c

52

struct value t;

usr.bin/window/parser2.c

58

struct value av[LCMD_NARG + 1];

usr.bin/window/parser2.c

59

struct value *vp;

usr.bin/window/parser3.c

124

p_expr1(struct value *v, char flag)

usr.bin/window/parser3.c

158

p_expr2(struct value *v, char flag)

usr.bin/window/parser3.c

55

p_expr(struct value *v, char flag)

usr.bin/window/parser3.c

57

struct value t;

usr.bin/window/parser3.c

85

p_expr0(struct value *v, char flag)

usr.bin/window/parser3.c

87

struct value t;

usr.bin/window/parser4.c

51

p_expr3_10(int level, struct value *v, char flag)

usr.bin/window/parser4.c

53

struct value l, r;

usr.bin/window/parser5.c

145

p_expr12(struct value *v, char flag)

usr.bin/window/parser5.c

44

p_expr11(struct value *v, char flag)

usr.bin/window/var.c

45

var_set1(struct var **head, const char *name, struct value *v)

usr.bin/window/var.c

49

struct value val;

usr.bin/window/var.c

80

struct value v;

usr.bin/window/var.c

90

struct value v;

usr.bin/window/var.h

45

struct value r_val;

usr.bin/window/var.h

49

struct var *var_set1(struct var **, const char *, struct value *);

usr.bin/wtmpcvt/wtmpcvt.c

67

#define MATCH(field, value) (strncmp(ui->ut_ ## field, (value), \

usr.sbin/autofs/defined.c

165

value = defined_find(name);

usr.sbin/autofs/defined.c

166

if (value == NULL) {

usr.sbin/autofs/defined.c

175

before_len, string, value, string + after_off);

usr.sbin/autofs/defined.c

186

i = before_len + strlen(value);

usr.sbin/autofs/defined.c

201

defined_add(const char *name, const char *value)

usr.sbin/autofs/defined.c

210

log_debugx("defining variable %s=%s", name, value);

usr.sbin/autofs/defined.c

216

d->d_value = checked_strdup(value);

usr.sbin/autofs/defined.c

224

char *name, *value;

usr.sbin/autofs/defined.c

226

value = def;

usr.sbin/autofs/defined.c

227

name = strsep(&value, "=");

usr.sbin/autofs/defined.c

229

if (value == NULL || value[0] == '\0')

usr.sbin/autofs/defined.c

234

defined_add(name, value);

usr.sbin/autofs/defined.c

68

const char *value;

usr.sbin/config/mkoptions.c

111

char *value;

usr.sbin/config/mkoptions.c

121

value = NULL;

usr.sbin/config/mkoptions.c

124

oldvalue = value;

usr.sbin/config/mkoptions.c

125

value = op->op_value;

usr.sbin/config/mkoptions.c

126

if (value == NULL)

usr.sbin/config/mkoptions.c

127

value = strdup("1");

usr.sbin/config/mkoptions.c

128

if (oldvalue != NULL && strcmp(value, oldvalue) != 0)

usr.sbin/config/mkoptions.c

132

value);

usr.sbin/config/mkoptions.c

144

if (value) {

usr.sbin/config/mkoptions.c

145

fprintf(outf, "#define %s %s\n", name, value);

usr.sbin/config/mkoptions.c

179

invalue = value;

usr.sbin/config/mkoptions.c

208

if (!tidy && ((value == NULL && oldvalue == NULL) ||

usr.sbin/config/mkoptions.c

209

(value && oldvalue && strcmp(value, oldvalue) == 0))) {

usr.sbin/config/mkoptions.c

219

if (value != NULL && !seen) {

usr.sbin/config/mkoptions.c

224

op->op_value = value != NULL ? strdup(value) : NULL;

usr.sbin/cron/lib/compat.c

215

setenv(char *name, char *value, int overwrite)

usr.sbin/cron/lib/compat.c

222

if (!(tmp = malloc(strlen(name) + strlen(value) + 2))) {

usr.sbin/cron/lib/compat.c

227

sprintf(tmp, "%s=%s", name, value);

usr.sbin/gifconfig/gifconfig.c

413

setifflags(char *vname, int value)

usr.sbin/gifconfig/gifconfig.c

422

if (value < 0) {

usr.sbin/gifconfig/gifconfig.c

423

value = -value;

usr.sbin/gifconfig/gifconfig.c

424

flags &= ~value;

usr.sbin/gifconfig/gifconfig.c

426

flags |= value;

usr.sbin/inetd/inetd.c

260

getvalue(const char *arg, int *value, const char *whine)

usr.sbin/inetd/inetd.c

270

*value = tmp;

usr.sbin/installer/dfuife_curses/curses_widget.c

439

curses_checkbox_set(struct curses_widget *w, const char *value)

usr.sbin/installer/dfuife_curses/curses_widget.c

441

if (value == NULL || value[0] == '\0')

usr.sbin/installer/dfuife_curses/curses_widget.c

443

w->amount = (value[0] == 'Y' ? 1 : 0);

usr.sbin/installer/dfuife_curses/curses_xlat.c

261

const char *value;

usr.sbin/installer/dfuife_curses/curses_xlat.c

272

value = dfui_celldata_get_value(cd);

usr.sbin/installer/dfuife_curses/curses_xlat.c

277

xbox->amount = (value[0] == 'Y' ? 1 : 0);

usr.sbin/installer/dfuife_curses/curses_xlat.c

281

value, 256, 0);

usr.sbin/installer/dfuife_curses/curses_xlat.c

287

xbox->amount = (value[0] == 'Y' ? 1 : 0);

usr.sbin/installer/dfuife_curses/curses_xlat.c

291

CURSES_TEXTBOX, value, 256, 0);

usr.sbin/installer/dfuife_curses/curses_xlat.c

362

const char *value;

usr.sbin/installer/dfuife_curses/curses_xlat.c

384

value = dfui_celldata_get_value(cd);

usr.sbin/installer/dfuife_curses/curses_xlat.c

386

curses_textbox_set_text(cw, value);

usr.sbin/installer/dfuife_curses/curses_xlat.c

388

curses_checkbox_set(cw, value);

usr.sbin/installer/dfuife_curses/curses_xlat.c

521

const char *value;

usr.sbin/installer/dfuife_curses/curses_xlat.c

610

value = dfui_celldata_get_value(cd);

usr.sbin/installer/dfuife_curses/curses_xlat.c

616

xbox->amount = (value[0] == 'Y' ? 1 : 0);

usr.sbin/installer/dfuife_curses/curses_xlat.c

620

cf->height, 20, CURSES_TEXTBOX, value, 256, 0);

usr.sbin/installer/dfuife_curses/curses_xlat.c

928

const char *value;

usr.sbin/installer/dfuife_curses/curses_xlat.c

937

value = curses_widget_xlat_value(cw);

usr.sbin/installer/dfuife_curses/curses_xlat.c

938

dfui_dataset_celldata_add(ds, id, value);

usr.sbin/installer/dfuife_curses/curses_xlat.c

955

const char *value;

usr.sbin/installer/dfuife_curses/curses_xlat.c

972

value = curses_widget_xlat_value(cw);

usr.sbin/installer/dfuife_curses/curses_xlat.c

973

dfui_dataset_celldata_add(ds, id, value);

usr.sbin/installer/libdfui/connection.c

430

const char *key, const char *value,

usr.sbin/installer/libdfui/connection.c

437

p = dfui_property_new(key, value);

usr.sbin/installer/libdfui/decode.c

174

char *value;

usr.sbin/installer/libdfui/decode.c

176

value = dfui_decode_string(e);

usr.sbin/installer/libdfui/decode.c

178

return(dfui_option_new(value));

usr.sbin/installer/libdfui/decode.c

233

char *value;

usr.sbin/installer/libdfui/decode.c

237

value = dfui_decode_string(e);

usr.sbin/installer/libdfui/decode.c

239

c = dfui_celldata_new(field_id, value);

usr.sbin/installer/libdfui/decode.c

242

free(value);

usr.sbin/installer/libdfui/decode.c

266

char *name, *value;

usr.sbin/installer/libdfui/decode.c

270

value = dfui_decode_string(e);

usr.sbin/installer/libdfui/decode.c

272

h = dfui_property_new(name, value);

usr.sbin/installer/libdfui/decode.c

274

free(value);

usr.sbin/installer/libdfui/dfui.h

171

char *value;

usr.sbin/installer/libdfui/dfui.h

186

char *value;

usr.sbin/installer/libdfui/dfui.h

217

char *value;

usr.sbin/installer/libdfui/dump.c

128

fprintf(dfui_debug_file, "{%s = %s}", c->field_id, c->value);

usr.sbin/installer/libdfui/dump.c

82

fprintf(dfui_debug_file, "value: %s\n", o->value);

usr.sbin/installer/libdfui/encode.c

155

dfui_encode_string(e, o->value);

usr.sbin/installer/libdfui/encode.c

211

dfui_encode_string(e, c->value);

usr.sbin/installer/libdfui/encode.c

229

dfui_encode_string(e, h->value);

usr.sbin/installer/libdfui/form.c

1023

dfui_dataset_celldata_add(struct dfui_dataset *ds, const char *field_id, const char *value)

usr.sbin/installer/libdfui/form.c

1030

c = dfui_celldata_new(field_id, value);

usr.sbin/installer/libdfui/form.c

1093

dfui_dataset_set_value(struct dfui_dataset *ds, const char *id, const char *value)

usr.sbin/installer/libdfui/form.c

1101

return(dfui_celldata_set_value(cd, value));

usr.sbin/installer/libdfui/form.c

131

dfui_property_new(const char *name, const char *value)

usr.sbin/installer/libdfui/form.c

137

p->value = aura_strdup(value);

usr.sbin/installer/libdfui/form.c

148

free(p->value);

usr.sbin/installer/libdfui/form.c

183

return(p->value);

usr.sbin/installer/libdfui/form.c

188

dfui_property_set(struct dfui_property **head, const char *name, const char *value)

usr.sbin/installer/libdfui/form.c

196

free(p->value);

usr.sbin/installer/libdfui/form.c

197

p->value = aura_strdup(value);

usr.sbin/installer/libdfui/form.c

201

p = dfui_property_new(name, value);

usr.sbin/installer/libdfui/form.c

217

return(p->value);

usr.sbin/installer/libdfui/form.c

289

dfui_field_option_add(struct dfui_field *fi, const char *value)

usr.sbin/installer/libdfui/form.c

295

o = dfui_option_new(value);

usr.sbin/installer/libdfui/form.c

311

dfui_field_property_set(struct dfui_field *fi, const char *name, const char *value)

usr.sbin/installer/libdfui/form.c

313

return(dfui_property_set(&fi->property_head, name, value));

usr.sbin/installer/libdfui/form.c

323

dfui_field_property_is(const struct dfui_field *fi, const char *name, const char *value)

usr.sbin/installer/libdfui/form.c

331

return(!strcmp(h->value, value));

usr.sbin/installer/libdfui/form.c

355

dfui_option_new(const char *value)

usr.sbin/installer/libdfui/form.c

360

o->value = aura_strdup(value);

usr.sbin/installer/libdfui/form.c

371

free(o->value);

usr.sbin/installer/libdfui/form.c

401

return(o->value);

usr.sbin/installer/libdfui/form.c

467

dfui_action_property_set(struct dfui_action *a, const char *name, const char *value)

usr.sbin/installer/libdfui/form.c

469

return(dfui_property_set(&a->property_head, name, value));

usr.sbin/installer/libdfui/form.c

479

dfui_action_property_is(const struct dfui_action *a, const char *name, const char *value)

usr.sbin/installer/libdfui/form.c

487

return(!strcmp(h->value, value));

usr.sbin/installer/libdfui/form.c

788

dfui_form_property_set(struct dfui_form *f, const char *name, const char *value)

usr.sbin/installer/libdfui/form.c

790

return(dfui_property_set(&f->property_head, name, value));

usr.sbin/installer/libdfui/form.c

800

dfui_form_property_is(const struct dfui_form *f, const char *name, const char *value)

usr.sbin/installer/libdfui/form.c

808

return(!strcmp(h->value, value));

usr.sbin/installer/libdfui/form.c

882

dfui_celldata_new(const char *field_id, const char *value)

usr.sbin/installer/libdfui/form.c

888

c->value = aura_strdup(value);

usr.sbin/installer/libdfui/form.c

899

free(c->value);

usr.sbin/installer/libdfui/form.c

955

return(cd->value);

usr.sbin/installer/libdfui/form.c

962

dfui_celldata_set_value(struct dfui_celldata *cd, const char *value)

usr.sbin/installer/libdfui/form.c

967

free(cd->value);

usr.sbin/installer/libdfui/form.c

968

cd->value = aura_strdup(value);

usr.sbin/installer/libdfui/form.c

996

cd->field_id, cd->value);

usr.sbin/installer/libinstaller/confed.c

110

config_var_set(struct config_vars *cvs, const char *name, const char *value)

usr.sbin/installer/libinstaller/confed.c

114

value, strlen(value) + 1);

usr.sbin/installer/libinstaller/confed.c

175

char *tmp_filename, line[1024], *value;

usr.sbin/installer/libinstaller/confed.c

224

for (value = line; *value != '=' && *value != '\0'; value++)

usr.sbin/installer/libinstaller/confed.c

226

if (*value == '\0')

usr.sbin/installer/libinstaller/confed.c

228

*value++ = '\0';

usr.sbin/installer/libinstaller/confed.c

229

config_var_set(cvs, line, value);

usr.sbin/installer/libinstaller/confed.c

245

char *fullpath, *key, *value, *end;

usr.sbin/installer/libinstaller/confed.c

271

value = key;

usr.sbin/installer/libinstaller/confed.c

272

while (*value != '\0' &&

usr.sbin/installer/libinstaller/confed.c

273

!isspace((unsigned char)*value))

usr.sbin/installer/libinstaller/confed.c

274

value++;

usr.sbin/installer/libinstaller/confed.c

275

if (*value == '\0')

usr.sbin/installer/libinstaller/confed.c

278

*value++ = '\0';

usr.sbin/installer/libinstaller/confed.c

281

while (isspace((unsigned char)*value))

usr.sbin/installer/libinstaller/confed.c

282

value++;

usr.sbin/installer/libinstaller/confed.c

283

if (*value == '\0')

usr.sbin/installer/libinstaller/confed.c

286

config_var_set(cvs, key, value);

usr.sbin/kbdcontrol/kbdcontrol.c

355

print_entry(FILE *fp, int value)

usr.sbin/kbdcontrol/kbdcontrol.c

357

int val = value & 0xFF;

usr.sbin/kbdcontrol/kbdcontrol.c

359

switch (value) {

usr.sbin/kbdcontrol/kbdcontrol.c

448

if (value & 0x100) {

usr.sbin/kbdcontrol/kbdcontrol.c

554

dump_entry(int value)

usr.sbin/kbdcontrol/kbdcontrol.c

556

if (value & 0x100) {

usr.sbin/kbdcontrol/kbdcontrol.c

557

value &= 0x00ff;

usr.sbin/kbdcontrol/kbdcontrol.c

558

switch (value) {

usr.sbin/kbdcontrol/kbdcontrol.c

647

if (value >= F_FN && value <= L_FN)

usr.sbin/kbdcontrol/kbdcontrol.c

648

printf(" F(%2d),", value - F_FN + 1);

usr.sbin/kbdcontrol/kbdcontrol.c

649

else if (value >= F_SCR && value <= L_SCR)

usr.sbin/kbdcontrol/kbdcontrol.c

650

printf(" S(%2d),", value - F_SCR + 1);

usr.sbin/kbdcontrol/kbdcontrol.c

651

else if (value >= F_ACC && value <= L_ACC)

usr.sbin/kbdcontrol/kbdcontrol.c

652

printf(" %-4s, ", acc_names_u[value - F_ACC]);

usr.sbin/kbdcontrol/kbdcontrol.c

654

printf(" 0x%02X, ", value);

usr.sbin/kbdcontrol/kbdcontrol.c

657

} else if (value == '\'') {

usr.sbin/kbdcontrol/kbdcontrol.c

659

} else if (value == '\\') {

usr.sbin/kbdcontrol/kbdcontrol.c

661

} else if (isascii(value) && isprint(value)) {

usr.sbin/kbdcontrol/kbdcontrol.c

662

printf(" '%c', ", value);

usr.sbin/kbdcontrol/kbdcontrol.c

664

printf(" 0x%02X, ", value);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

199

const char *option_string, const char *value)

usr.sbin/makefs/cd9660/cd9660_eltorito.c

222

image->loadSegment = strtoul(value, &eptr, 16);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

223

if (eptr == value || *eptr != '\0' || errno != ERANGE) {

usr.sbin/makefs/cd9660/cd9660_eltorito.c

228

if (strcmp(value, "efi") == 0)

usr.sbin/makefs/cd9660/cd9660_eltorito.c

231

warn("%s: unknown platform: %s", __func__, value);

usr.sbin/makefs/hammer2/hammer2_chain.c

5396

chain->bref.check.iscsi32.value =

usr.sbin/makefs/hammer2/hammer2_chain.c

5400

chain->bref.check.xxhash64.value =

usr.sbin/makefs/hammer2/hammer2_chain.c

5458

chain->bref.check.iscsi32.value,

usr.sbin/makefs/hammer2/hammer2_chain.c

5462

chain->bref.check.xxhash64.value,

usr.sbin/makefs/hammer2/hammer2_chain.c

5548

r = (chain->bref.check.iscsi32.value == check32);

usr.sbin/makefs/hammer2/hammer2_chain.c

5557

r = (chain->bref.check.xxhash64.value == check64);

usr.sbin/makefs/hammer2/hammer2_lz4.c

96

# define expect(expr,value) (__builtin_expect ((expr),(value)) )

usr.sbin/makefs/hammer2/hammer2_lz4.c

98

# define expect(expr,value) (expr)

usr.sbin/makefs/hammer2/hammer2_strategy.c

1476

crc = (uint64_t)(uint32_t)chain->bref.check.iscsi32.value;

usr.sbin/makefs/hammer2/hammer2_strategy.c

1481

crc = chain->bref.check.xxhash64.value;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

106

int inflatePrime(z_streamp strm, int bits, int value);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

216

inflatePrime(z_streamp strm, int bits, int value)

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

228

value &= (1L << bits) - 1;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inflate.c

229

state->hold += value << state->bits;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

152

local unsigned bi_reverse (unsigned value, int length);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

186

local void send_bits (deflate_state *s, int value, int length);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

190

send_bits(deflate_state *s, int value, int length)

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

192

Tracevv((stderr," l %2d v %4x ", length, value));

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

201

s->bi_buf |= (ush)value << s->bi_valid;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

203

s->bi_buf = (ush)value >> (Buf_size - s->bi_valid);

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

206

s->bi_buf |= (ush)value << s->bi_valid;

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

212

#define send_bits(s, value, length) \

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

215

int val = value;\

usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c

221

s->bi_buf |= (ush)(value) << s->bi_valid;\

usr.sbin/makefs/makefs.c

390

*(type *)options[i].value = 1; \

usr.sbin/makefs/makefs.c

393

*(type *)options[i].value = (type)strsuftoll(options[i].desc, val, \

usr.sbin/makefs/makefs.c

404

*(bool *)options[i].value = 1;

usr.sbin/makefs/makefs.c

407

strlcpy((void *)options[i].value, val, (size_t)

usr.sbin/makefs/makefs.c

412

*(char **)options[i].value = s;

usr.sbin/makefs/makefs.h

128

void *value; /* where to stuff the value */

usr.sbin/makefs/msdos.c

89

.value = &msdos_opt->options._name, \

usr.sbin/makefs/mtree.c

482

char *name, *p, *value;

usr.sbin/makefs/mtree.c

504

value = strchr(keyword, '=');

usr.sbin/makefs/mtree.c

505

if (value != NULL)

usr.sbin/makefs/mtree.c

506

*value++ = '\0';

usr.sbin/makefs/mtree.c

523

if (value == NULL) {

usr.sbin/makefs/mtree.c

527

node->contents = estrdup(value);

usr.sbin/makefs/mtree.c

533

if (value == NULL) {

usr.sbin/makefs/mtree.c

539

if (!strtofflags(&value, &flset, &flclr)) {

usr.sbin/makefs/mtree.c

550

if (value == NULL) {

usr.sbin/makefs/mtree.c

554

error = read_number(value, 10, &num,

usr.sbin/makefs/mtree.c

559

if (value == NULL) {

usr.sbin/makefs/mtree.c

563

if (gid_from_group(value, &gid) == 0)

usr.sbin/makefs/mtree.c

572

if (value == NULL) {

usr.sbin/makefs/mtree.c

576

node->symlink = emalloc(strlen(value) + 1);

usr.sbin/makefs/mtree.c

581

if (strunvis(node->symlink, value) < 0) {

usr.sbin/makefs/mtree.c

590

if (value == NULL) {

usr.sbin/makefs/mtree.c

594

if (value[0] >= '0' && value[0] <= '9') {

usr.sbin/makefs/mtree.c

595

error = read_number(value, 8, &num,

usr.sbin/makefs/mtree.c

611

if (value != NULL)

usr.sbin/makefs/mtree.c

619

if (value == NULL) {

usr.sbin/makefs/mtree.c

623

error = read_number(value, 10, &num,

usr.sbin/makefs/mtree.c

632

if (value == NULL) {

usr.sbin/makefs/mtree.c

638

if (value == NULL) {

usr.sbin/makefs/mtree.c

642

p = strchr(value, '.');

usr.sbin/makefs/mtree.c

645

error = read_number(value, 10, &num, 0,

usr.sbin/makefs/mtree.c

664

if (value == NULL) {

usr.sbin/makefs/mtree.c

668

if (strcmp(value, "dir") == 0)

usr.sbin/makefs/mtree.c

670

else if (strcmp(value, "file") == 0)

usr.sbin/makefs/mtree.c

672

else if (strcmp(value, "link") == 0)

usr.sbin/makefs/mtree.c

681

if (value == NULL) {

usr.sbin/makefs/mtree.c

685

error = read_number(value, 10, &num,

usr.sbin/makefs/mtree.c

690

if (value == NULL) {

usr.sbin/makefs/mtree.c

694

if (uid_from_user(value, &uid) == 0)

usr.sbin/makefs/mtree.c

708

mtree_error("%s: invalid value '%s'", keyword, value);

usr.sbin/moused/moused.c

2422

mouse.u.event.value = mstate[i]->count;

usr.sbin/moused/moused.c

2425

mouse.u.event.value = 0;

usr.sbin/moused/moused.c

2431

debug("button %d count %d", i + 1, mouse.u.event.value);

usr.sbin/mtree/spec.c

530

int type, value, len;

usr.sbin/mtree/spec.c

541

ip->flags |= type = parsekey(kw, &value);

usr.sbin/mtree/spec.c

542

if (!value)

usr.sbin/nscd/cachelib.c

1097

memcpy(data, rs->current_item->value, rs->current_item->value_size);

usr.sbin/nscd/cachelib.c

1196

free(ht_item_data->value);

usr.sbin/nscd/cachelib.c

193

free(data_item->value);

usr.sbin/nscd/cachelib.c

231

free(ht_item_data->value);

usr.sbin/nscd/cachelib.c

300

free(ht_item_data->value);

usr.sbin/nscd/cachelib.c

403

free(ht_item_data->value);

usr.sbin/nscd/cachelib.c

694

char *value, size_t *value_size)

usr.sbin/nscd/cachelib.c

735

free(find_res->value);

usr.sbin/nscd/cachelib.c

758

if ((*value_size < find_res->value_size) || (value == NULL)) {

usr.sbin/nscd/cachelib.c

765

memcpy(value, find_res->value, find_res->value_size);

usr.sbin/nscd/cachelib.c

795

char const *value, size_t value_size)

usr.sbin/nscd/cachelib.c

809

assert(value != NULL);

usr.sbin/nscd/cachelib.c

834

item_data.value = (char *)malloc(value_size);

usr.sbin/nscd/cachelib.c

835

assert(item_data.value != NULL);

usr.sbin/nscd/cachelib.c

837

memcpy(item_data.value, value, value_size);

usr.sbin/nscd/cachelib.c

952

new_item->value = (char *)malloc(data_size);

usr.sbin/nscd/cachelib.c

953

assert(new_item->value != NULL);

usr.sbin/nscd/cachelib.c

954

memcpy(new_item->value, data, data_size);

usr.sbin/nscd/cachelib.h

128

char *value;

usr.sbin/nscd/cachelib.h

168

char *value;

usr.sbin/nscd/parser.c

320

set_threads_num(struct configuration *config, int value)

usr.sbin/nscd/parser.c

324

config->threads_num = value;

usr.sbin/nscd/parser.c

338

int field_count, line_num, value;

usr.sbin/nscd/parser.c

369

((value = get_yesno(fields[2])) != -1)) {

usr.sbin/nscd/parser.c

370

enable_cache(config, fields[1], value);

usr.sbin/nscd/parser.c

377

((value = get_number(fields[1], 0, 10)) != -1)) {

usr.sbin/nscd/parser.c

385

((value = get_number(fields[2], 0, -1)) != -1)) {

usr.sbin/nscd/parser.c

387

fields[1], value);

usr.sbin/nscd/parser.c

392

((value = get_policy(fields[2])) != -1)) {

usr.sbin/nscd/parser.c

393

set_positive_policy(config, fields[1], value);

usr.sbin/nscd/parser.c

398

((value = get_yesno(fields[2])) != -1)) {

usr.sbin/nscd/parser.c

400

value);

usr.sbin/nscd/parser.c

408

((value = get_number(fields[2], 0, -1)) != -1)) {

usr.sbin/nscd/parser.c

410

fields[1], value);

usr.sbin/nscd/parser.c

415

((value = get_policy(fields[2])) != -1)) {

usr.sbin/nscd/parser.c

417

fields[1], value);

usr.sbin/nscd/parser.c

425

((value = get_number(fields[2], 1, -1)) != -1)) {

usr.sbin/nscd/parser.c

426

set_suggested_size(config, fields[1], value);

usr.sbin/nscd/parser.c

433

((value = get_number(fields[1], 1, -1)) != -1)) {

usr.sbin/nscd/parser.c

434

set_threads_num(config, value);

usr.sbin/nscd/parser.c

442

((value = get_number(fields[2], 0, -1)) != -1)) {

usr.sbin/nscd/parser.c

444

fields[1], value);

usr.sbin/nscd/parser.c

452

((value = get_yesno(fields[2])) != -1)) {

usr.sbin/nscd/parser.c

454

fields[1], value);

usr.sbin/powerd/powerd.c

1383

t = (int)((sensor.value - 273150000) / 1000000);

usr.sbin/powerd/powerd.c

1403

t = (int)((sensor.value - 273150000) / 1000000);

usr.sbin/ppp/iface.c

619

const char *value;

usr.sbin/ppp/iface.c

661

if_flags[f].value);

usr.sbin/ppp/libradius/radlib.c

1132

rad_put_attr(struct rad_handle *h, int type, const void *value, size_t len)

usr.sbin/ppp/libradius/radlib.c

1160

result = put_password_attr(h, type, value, len);

usr.sbin/ppp/libradius/radlib.c

1164

result = put_raw_attr(h, type, value, len);

usr.sbin/ppp/libradius/radlib.c

1177

rad_put_int(struct rad_handle *h, int type, u_int32_t value)

usr.sbin/ppp/libradius/radlib.c

1181

nvalue = htonl(value);

usr.sbin/ppp/libradius/radlib.c

1384

const void *value, size_t len)

usr.sbin/ppp/libradius/radlib.c

1403

memcpy(attr->attrib_data, value, len);

usr.sbin/ppp/libradius/radlib.c

1418

u_int32_t value;

usr.sbin/ppp/libradius/radlib.c

1420

value = htonl(i);

usr.sbin/ppp/libradius/radlib.c

1421

return (rad_put_vendor_attr(h, vendor, type, &value, sizeof value));

usr.sbin/ppp/libradius/radlib.c

341

put_password_attr(struct rad_handle *h, int type, const void *value, size_t len)

usr.sbin/ppp/libradius/radlib.c

364

memcpy(h->pass, value, len);

usr.sbin/ppp/libradius/radlib.c

371

put_raw_attr(struct rad_handle *h, int type, const void *value, size_t len)

usr.sbin/ppp/libradius/radlib.c

383

memcpy(&h->out[h->out_len], value, len);

usr.sbin/ppp/libradius/radlib.c

906

struct in_addr value;

usr.sbin/ppp/libradius/radlib.c

908

memcpy(&value.s_addr, data, sizeof value.s_addr);

usr.sbin/ppp/libradius/radlib.c

909

return value;

usr.sbin/ppp/libradius/radlib.c

915

struct in6_addr value;

usr.sbin/ppp/libradius/radlib.c

917

memcpy(&value.s6_addr, data, sizeof value.s6_addr);

usr.sbin/ppp/libradius/radlib.c

918

return value;

usr.sbin/ppp/libradius/radlib.c

924

u_int32_t value;

usr.sbin/ppp/libradius/radlib.c

926

memcpy(&value, data, sizeof value);

usr.sbin/ppp/libradius/radlib.c

927

return ntohl(value);

usr.sbin/ppp/libradius/radlib.c

948

rad_get_attr(struct rad_handle *h, const void **value, size_t *len)

usr.sbin/ppp/libradius/radlib.c

964

*value = &h->in[h->in_pos];

usr.sbin/rtadvd/if.c

621

int value;

usr.sbin/rtadvd/if.c

625

size = sizeof(value);

usr.sbin/rtadvd/if.c

626

if (sysctl(mib, NELEM(mib), &value, &size, NULL, 0)

usr.sbin/rtadvd/if.c

634

return (value);

usr.sbin/rtsold/if.c

305

int value;

usr.sbin/rtsold/if.c

309

size = sizeof(value);

usr.sbin/rtsold/if.c

310

if (sysctl(mib, NELEM(mib), &value, &size, NULL, 0) < 0)

usr.sbin/rtsold/if.c

313

return value;

usr.sbin/sensorsd/sensorsd.c

353

limit->last_val = sensor.value;

usr.sbin/sensorsd/sensorsd.c

366

else if (sensor.value > limit->upper)

usr.sbin/sensorsd/sensorsd.c

368

else if (sensor.value < limit->lower)

usr.sbin/sensorsd/sensorsd.c

378

limit->last_val = sensor.value;

usr.sbin/sensorsd/sensorsd.c

606

print_sensor(enum sensor_type type, int64_t value)

usr.sbin/sensorsd/sensorsd.c

619

(value - 273150000) / 1000000.0);

usr.sbin/sensorsd/sensorsd.c

622

snprintf(fbuf, RFBUFSIZ, "%"PRId64" RPM", value);

usr.sbin/sensorsd/sensorsd.c

625

snprintf(fbuf, RFBUFSIZ, "%.2f V DC", value / 1000000.0);

usr.sbin/sensorsd/sensorsd.c

628

snprintf(fbuf, RFBUFSIZ, "%.2f A", value / 1000000.0);

usr.sbin/sensorsd/sensorsd.c

631

snprintf(fbuf, RFBUFSIZ, "%.2f Wh", value / 1000000.0);

usr.sbin/sensorsd/sensorsd.c

634

snprintf(fbuf, RFBUFSIZ, "%.2f Ah", value / 1000000.0);

usr.sbin/sensorsd/sensorsd.c

637

snprintf(fbuf, RFBUFSIZ, "%s", value? "On" : "Off");

usr.sbin/sensorsd/sensorsd.c

640

snprintf(fbuf, RFBUFSIZ, "%"PRId64" Hz", value);

usr.sbin/sensorsd/sensorsd.c

644

snprintf(fbuf, RFBUFSIZ, "%"PRId64, value);

usr.sbin/sensorsd/sensorsd.c

647

snprintf(fbuf, RFBUFSIZ, "%.2f%%", value / 1000.0);

usr.sbin/sensorsd/sensorsd.c

650

snprintf(fbuf, RFBUFSIZ, "%.2f lx", value / 1000000.0);

usr.sbin/sensorsd/sensorsd.c

653

if (0 < value && value < (int64_t)NELEM(drvstat))

usr.sbin/sensorsd/sensorsd.c

654

snprintf(fbuf, RFBUFSIZ, "%s", drvstat[value]);

usr.sbin/sensorsd/sensorsd.c

656

snprintf(fbuf, RFBUFSIZ, "%"PRId64" ???", value);

usr.sbin/sensorsd/sensorsd.c

659

snprintf(fbuf, RFBUFSIZ, "%.6f secs", value / 1000000000.0);

usr.sbin/sensorsd/sensorsd.c

662

snprintf(fbuf, RFBUFSIZ, "%"PRId64" ???", value);

usr.sbin/usbconfig/dump.c

101

printf("%s%s = 0x%04x ", plevel, field, value);

usr.sbin/usbconfig/dump.c

107

if (value & 0x80)

usr.sbin/usbconfig/dump.c

114

switch (value & 0x03) {

usr.sbin/usbconfig/dump.c

119

switch (value & 0x0C) {

usr.sbin/usbconfig/dump.c

146

if (value == 0) {

usr.sbin/usbconfig/dump.c

150

if (libusb20_dev_req_string_simple_sync(pdev, value,

usr.sbin/usbconfig/dump.c

165

switch (value) {

usr.sbin/usbconfig/dump.c

47

dump_mode(uint8_t value)

usr.sbin/usbconfig/dump.c

49

if (value == LIBUSB20_MODE_HOST)

usr.sbin/usbconfig/dump.c

55

dump_speed(uint8_t value)

usr.sbin/usbconfig/dump.c

58

switch (value) {

usr.sbin/usbconfig/dump.c

76

dump_power_mode(uint8_t value)

usr.sbin/usbconfig/dump.c

79

switch (value) {

usr.sbin/usbconfig/dump.c

97

const char *field, uint32_t value)

usr.sbin/usbconfig/dump.h

30

const char *dump_mode(uint8_t value);

usr.sbin/usbconfig/dump.h

31

const char *dump_speed(uint8_t value);

usr.sbin/usbconfig/dump.h

32

const char *dump_power_mode(uint8_t value);

usr.sbin/usbconfig/usbconfig.c

218

return (token[n].value);

usr.sbin/usbconfig/usbconfig.c

93

uint8_t value;