#ifndef ENA_PLAT_H_
#define ENA_PLAT_H_
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/condvar.h>
#include <sys/endian.h>
#include <sys/kernel.h>
#include <sys/kthread.h>
#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <sys/proc.h>
#include <sys/socket.h>
#include <sys/sockio.h>
#include <sys/spinlock.h>
#include <sys/spinlock2.h>
#include <sys/sysctl.h>
#include <sys/taskqueue.h>
#include <sys/eventhandler.h>
#include <sys/types.h>
#include <sys/cdefs.h>
#include <machine/atomic.h>
#include <net/bpf.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_var.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_media.h>
#include <net/if_types.h>
#include <netinet/in_systm.h>
#include <netinet/in.h>
#include <netinet/if_ether.h>
#include <netinet/ip.h>
#include <netinet/ip6.h>
#include <netinet/tcp.h>
#include <netinet/udp.h>
#include <dev/misc/led/led.h>
#include <bus/pci/pcivar.h>
#include <bus/pci/pcireg.h>
extern struct ena_bus_space ebs;
#define ENA_ALERT (1 << 0)
#define ENA_WARNING (1 << 1)
#define ENA_INFO (1 << 2)
#define ENA_DBG (1 << 3)
#define ENA_TXPTH (1 << 4)
#define ENA_RXPTH (1 << 5)
#define ENA_RSC (1 << 6)
#define ENA_IOQ (1 << 7)
#define ENA_ADMQ (1 << 8)
extern int ena_log_level;
#define ena_trace_raw(level, fmt, args...) \
do { \
if (((level) & ena_log_level) != (level)) \
break; \
kprintf(fmt, ##args); \
} while (0)
#define ena_trace(level, fmt, args...) \
ena_trace_raw(level, "%s() [TID:%p]: " \
fmt " \n", __func__, curthread, ##args)
#define ena_trc_dbg(format, arg...) ena_trace(ENA_DBG, format, ##arg)
#define ena_trc_info(format, arg...) ena_trace(ENA_INFO, format, ##arg)
#define ena_trc_warn(format, arg...) ena_trace(ENA_WARNING, format, ##arg)
#define ena_trc_err(format, arg...) ena_trace(ENA_ALERT, format, ##arg)
#define unlikely(x) __predict_false(x)
#define likely(x) __predict_true(x)
#define __iomem
#define ____cacheline_aligned __cachealign
#define MAX_ERRNO 4095
#define IS_ERR_VALUE(x) unlikely((x) <= (unsigned long)MAX_ERRNO)
#define ENA_ASSERT(cond, format, arg...) \
do { \
if (unlikely(!(cond))) { \
ena_trc_err( \
"Assert failed on %s:%s:%d:" format, \
__FILE__, __func__, __LINE__, ##arg); \
} \
} while (0)
#define ENA_WARN(cond, format, arg...) \
do { \
if (unlikely((cond))) { \
ena_trc_warn(format, ##arg); \
} \
} while (0)
static inline long IS_ERR(const void *ptr)
{
return IS_ERR_VALUE((unsigned long)ptr);
}
static inline void *ERR_PTR(long error)
{
return (void *)error;
}
static inline long PTR_ERR(const void *ptr)
{
return (long) ptr;
}
#define GENMASK(h, l) (((1U << ((h) - (l) + 1)) - 1) << (l))
#define GENMASK_ULL(h, l) (((~0ULL) << (l)) & (~0ULL >> (64 - 1 - (h))))
#define BIT(x) (1 << (x))
#define ENA_ABORT() BUG()
#define BUG() panic("ENA BUG")
#define SZ_256 (256)
#define SZ_4K (4096)
#define ENA_COM_OK 0
#define ENA_COM_FAULT EFAULT
#define ENA_COM_INVAL EINVAL
#define ENA_COM_NO_MEM ENOMEM
#define ENA_COM_NO_SPACE ENOSPC
#define ENA_COM_TRY_AGAIN -1
#define ENA_COM_UNSUPPORTED EOPNOTSUPP
#define ENA_COM_NO_DEVICE ENODEV
#define ENA_COM_PERMISSION EPERM
#define ENA_COM_TIMER_EXPIRED ETIMEDOUT
#define cputick2usec(t) (1000000*(t) / hz)
#define ENA_MSLEEP(x) do { \
int dummy; \
int wait_ticks = 1; \
\
tsleep(&dummy, 0, "ena", wait_ticks); \
} while (0)
#define ENA_UDELAY(x) DELAY(x)
#define ENA_GET_SYSTEM_TIMEOUT(timeout_us) \
((long)cputick2usec(ticks) + (timeout_us))
#define ENA_TIME_EXPIRE(timeout) ((timeout) < (long)cputick2usec(ticks))
#define ENA_MIGHT_SLEEP()
#define min_t(type, _x, _y) ((type)(_x) < (type)(_y) ? (type)(_x) : (type)(_y))
#define max_t(type, _x, _y) ((type)(_x) > (type)(_y) ? (type)(_x) : (type)(_y))
#define ENA_MIN32(x,y) MIN(x, y)
#define ENA_MIN16(x,y) MIN(x, y)
#define ENA_MIN8(x,y) MIN(x, y)
#define ENA_MAX32(x,y) MAX(x, y)
#define ENA_MAX16(x,y) MAX(x, y)
#define ENA_MAX8(x,y) MAX(x, y)
#define ena_spinlock_t struct spinlock
#define ENA_SPINLOCK_INIT(spinlock) \
spin_init(&(spinlock), "ena_spin")
#define ENA_SPINLOCK_DESTROY(spinlock) \
do { \
spin_uninit(&(spinlock)); \
} while (0)
#define ENA_SPINLOCK_LOCK(spinlock, flags) \
do { \
(void)(flags); \
spin_lock(&(spinlock)); \
} while (0)
#define ENA_SPINLOCK_UNLOCK(spinlock, flags) \
do { \
(void)(flags); \
spin_unlock(&(spinlock)); \
} while (0)
#define ena_wait_event_t struct { struct cv wq; struct lock lock; }
#define ENA_WAIT_EVENT_INIT(waitqueue) \
do { \
cv_init(&((waitqueue).wq), "cv"); \
lockinit(&((waitqueue).lock), "wq", 0, LK_CANRECURSE); \
} while (0)
#define ENA_WAIT_EVENT_DESTROY(waitqueue) \
do { \
cv_destroy(&((waitqueue).wq)); \
lockuninit(&((waitqueue).lock)); \
} while (0)
#define ENA_WAIT_EVENT_CLEAR(waitqueue) \
cv_init(&((waitqueue).wq), (waitqueue).wq.cv_desc)
#define ENA_WAIT_EVENT_WAIT(waitqueue, timeout_us) \
do { \
lockmgr(&((waitqueue).lock), LK_EXCLUSIVE); \
cv_timedwait(&((waitqueue).wq), &((waitqueue).lock), \
timeout_us * hz / 1000 / 1000 ); \
lockmgr(&((waitqueue).lock), LK_RELEASE); \
} while (0)
#define ENA_WAIT_EVENT_SIGNAL(waitqueue) cv_broadcast(&((waitqueue).wq))
#define dma_addr_t bus_addr_t
#define u8 uint8_t
#define u16 uint16_t
#define u32 uint32_t
#define u64 uint64_t
#ifdef __x86_64__
#define mb() __asm volatile("mfence" ::: "memory")
#define wmb() __asm volatile("sfence" ::: "memory")
#define rmb() __asm volatile("lfence" ::: "memory")
#else
#define mb()
#define rmb()
#define wmb()
#endif
typedef struct {
bus_addr_t paddr;
caddr_t vaddr;
bus_dma_tag_t tag;
bus_dmamap_t map;
bus_dma_segment_t seg;
int nseg;
} ena_mem_handle_t;
struct ena_bus {
bus_space_handle_t reg_bar_h;
bus_space_tag_t reg_bar_t;
bus_space_handle_t mem_bar_h;
bus_space_tag_t mem_bar_t;
};
typedef uint32_t ena_atomic32_t;
void ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg,
int error);
int ena_dma_alloc(device_t dmadev, bus_size_t size, ena_mem_handle_t *dma,
int mapflags);
#define ENA_MEMCPY_TO_DEVICE_64(dst, src, size) \
do { \
int count, i; \
volatile uint64_t *to = (volatile uint64_t *)(dst); \
const uint64_t *from = (const uint64_t *)(src); \
count = (size) / 8; \
\
for (i = 0; i < count; i++, from++, to++) \
*to = *from; \
} while (0)
#define ENA_MEM_ALLOC(dmadev, size) kmalloc(size, M_DEVBUF, M_NOWAIT | M_ZERO)
#define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) (virt = NULL)
#define ENA_MEM_FREE(dmadev, ptr) kfree(ptr, M_DEVBUF)
#define ENA_MEM_ALLOC_COHERENT_NODE(dmadev, size, virt, phys, handle, node, \
dev_node) \
do { \
((virt) = NULL); \
(void)(dev_node); \
} while (0)
#define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, dma) \
do { \
ena_dma_alloc((dmadev), (size), &(dma), 0); \
(virt) = (void *)(dma).vaddr; \
(phys) = (dma).paddr; \
} while (0)
#define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, dma) \
do { \
(void)size; \
bus_dmamap_unload((dma).tag, (dma).map); \
bus_dmamem_free((dma).tag, (virt), (dma).map); \
bus_dma_tag_destroy((dma).tag); \
(dma).tag = NULL; \
(virt) = NULL; \
} while (0)
#define ENA_REG_WRITE32(bus, value, offset) \
bus_space_write_4( \
((struct ena_bus*)bus)->reg_bar_t, \
((struct ena_bus*)bus)->reg_bar_h, \
(bus_size_t)(offset), (value))
#define ENA_REG_READ32(bus, offset) \
bus_space_read_4( \
((struct ena_bus*)bus)->reg_bar_t, \
((struct ena_bus*)bus)->reg_bar_h, \
(bus_size_t)(offset))
#define ENA_DB_SYNC(mem_handle) bus_dmamap_sync((mem_handle)->tag, \
(mem_handle)->map, BUS_DMASYNC_PREREAD)
#define time_after(a,b) ((long)((unsigned long)(b) - (unsigned long)(a)) < 0)
#define VLAN_HLEN sizeof(struct ether_vlan_header)
#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
#if defined(__i386__) || defined(__amd64__)
static __inline
void prefetch(void *x)
{
__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
}
#else
#define prefetch(x)
#endif
#define dma_unmap_addr(p, name) ((p)->dma->name)
#define dma_unmap_addr_set(p, name, v) (((p)->dma->name) = (v))
#define dma_unmap_len(p, name) ((p)->name)
#define dma_unmap_len_set(p, name, v) (((p)->name) = (v))
#define memcpy_toio memcpy
#define ATOMIC32_INC(I32_PTR) atomic_add_int(I32_PTR, 1)
#define ATOMIC32_DEC(I32_PTR) atomic_add_int(I32_PTR, -1)
#define ATOMIC32_READ(I32_PTR) atomic_load_acq_int(I32_PTR)
#define ATOMIC32_SET(I32_PTR, VAL) atomic_store_rel_int(I32_PTR, VAL)
#define barrier() __asm__ __volatile__("": : :"memory")
#define ACCESS_ONCE(x) (*(volatile __typeof(x) *)&(x))
#define READ_ONCE(x) ({ \
__typeof(x) __var; \
barrier(); \
__var = ACCESS_ONCE(x); \
barrier(); \
__var; \
})
#include "ena_defs/ena_includes.h"
#endif