Symbol: IPL_SOFTCLOCK
sys/arch/aarch64/aarch64/cpu_machdep.c
105
*machdep == (1 << (IPL_SOFTCLOCK - IPL_SOFTCLOCK)));
sys/arch/aarch64/aarch64/cpu_machdep.c
107
*machdep == (1 << (IPL_SOFTBIO - IPL_SOFTCLOCK)));
sys/arch/aarch64/aarch64/cpu_machdep.c
109
*machdep == (1 << (IPL_SOFTNET - IPL_SOFTCLOCK)));
sys/arch/aarch64/aarch64/cpu_machdep.c
111
*machdep == (1 << (IPL_SOFTSERIAL - IPL_SOFTCLOCK)));
sys/arch/aarch64/aarch64/cpu_machdep.c
130
(softints & (1 << (opl - IPL_SOFTCLOCK))) == 0);
sys/arch/aarch64/aarch64/cpu_machdep.c
143
if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) {\
sys/arch/aarch64/aarch64/cpu_machdep.c
145
~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \
sys/arch/aarch64/aarch64/cpu_machdep.c
65
#elif IPL_SOFTBIO != IPL_SOFTCLOCK + 1
sys/arch/aarch64/aarch64/cpu_machdep.c
67
#elif !(IPL_SOFTCLOCK > IPL_NONE)
sys/arch/aarch64/aarch64/cpu_machdep.c
75
(((IPL_SOFTSERIAL - IPL_SOFTCLOCK) << (SOFTINT_SERIAL * 4)) | \
sys/arch/aarch64/aarch64/cpu_machdep.c
76
((IPL_SOFTNET - IPL_SOFTCLOCK) << (SOFTINT_NET * 4)) | \
sys/arch/aarch64/aarch64/cpu_machdep.c
77
((IPL_SOFTBIO - IPL_SOFTCLOCK) << (SOFTINT_BIO * 4)) | \
sys/arch/aarch64/aarch64/cpu_machdep.c
78
((IPL_SOFTCLOCK - IPL_SOFTCLOCK) << (SOFTINT_CLOCK * 4)))
sys/arch/aarch64/aarch64/cpu_machdep.c
86
CTASSERT(SOFTIPLMASK(IPL_SOFTCLOCK) == 0x0000000e);
sys/arch/algor/algor/algor_intr.c
73
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/alpha/alpha/interrupt.c
478
__CTASSERT(IPL_SOFTCLOCK == ALPHA_PSL_IPL_SOFT_LO);
sys/arch/alpha/alpha/interrupt.c
491
__CTASSERT(SOFTINTS_ELIGIBLE(IPL_SOFTCLOCK) == ALPHA_IPL2_SOFTINTS);
sys/arch/amiga/amiga/machdep.c
853
[IPL_SOFTCLOCK] = PSL_IPL1|PSL_S,
sys/arch/arc/arc/c_magnum.c
92
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/arc/arc/c_nec_eisa.c
114
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/arc/arc/c_nec_pci.c
119
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/arc/arc/p_dti_arcstation.c
109
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/arc/arc/p_dti_tyne.c
110
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/arc/arc/p_sni_rm200pci.c
93
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/arc/isa/isabus.c
279
imask[IPL_SOFTCLOCK] |= imask[IPL_NONE];
sys/arch/arc/isa/isabus.c
280
imask[IPL_SOFTNET] |= imask[IPL_SOFTCLOCK];
sys/arch/arm/arm32/arm32_machdep.c
639
#elif IPL_SOFTBIO != IPL_SOFTCLOCK + 1
sys/arch/arm/arm32/arm32_machdep.c
641
#elif !(IPL_SOFTCLOCK > IPL_NONE)
sys/arch/arm/arm32/arm32_machdep.c
649
(((IPL_SOFTSERIAL - IPL_SOFTCLOCK) << (SOFTINT_SERIAL * 4)) | \
sys/arch/arm/arm32/arm32_machdep.c
650
((IPL_SOFTNET - IPL_SOFTCLOCK) << (SOFTINT_NET * 4)) | \
sys/arch/arm/arm32/arm32_machdep.c
651
((IPL_SOFTBIO - IPL_SOFTCLOCK) << (SOFTINT_BIO * 4)) | \
sys/arch/arm/arm32/arm32_machdep.c
652
((IPL_SOFTCLOCK - IPL_SOFTCLOCK) << (SOFTINT_CLOCK * 4)))
sys/arch/arm/arm32/arm32_machdep.c
680
KASSERT(level != SOFTINT_CLOCK || *machdep == (1 << (IPL_SOFTCLOCK - IPL_SOFTCLOCK)));
sys/arch/arm/arm32/arm32_machdep.c
681
KASSERT(level != SOFTINT_BIO || *machdep == (1 << (IPL_SOFTBIO - IPL_SOFTCLOCK)));
sys/arch/arm/arm32/arm32_machdep.c
682
KASSERT(level != SOFTINT_NET || *machdep == (1 << (IPL_SOFTNET - IPL_SOFTCLOCK)));
sys/arch/arm/arm32/arm32_machdep.c
683
KASSERT(level != SOFTINT_SERIAL || *machdep == (1 << (IPL_SOFTSERIAL - IPL_SOFTCLOCK)));
sys/arch/arm/arm32/arm32_machdep.c
699
KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0);
sys/arch/arm/arm32/arm32_machdep.c
704
if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \
sys/arch/arm/arm32/arm32_machdep.c
706
~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \
sys/arch/arm/arm32/intr.c
71
spl_masks[IPL_SOFTCLOCK] = irqmasks[IPL_SOFTCLOCK];
sys/arch/arm/at91/at91aic.c
156
KASSERT(aic_imask[IPL_SOFTCLOCK] == 0);
sys/arch/arm/broadcom/bcm53xx_rng.c
141
sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/arch/arm/cortex/gic.c
708
intr_establish_xname(SOFTINT_CLOCK, IPL_SOFTCLOCK, IST_MPSAFE | IST_EDGE,
sys/arch/arm/ep93xx/ep93xx_intr.c
149
KASSERT(vic1_imask[IPL_SOFTCLOCK] == 0);
sys/arch/arm/ep93xx/ep93xx_intr.c
150
KASSERT(vic2_imask[IPL_SOFTCLOCK] == 0);
sys/arch/arm/footbridge/footbridge_intr.h
168
#define spllowersoftclock() (void)_spllower(IPL_SOFTCLOCK)
sys/arch/arm/footbridge/footbridge_irqhandler.c
138
KASSERT(footbridge_imask[IPL_SOFTCLOCK] == 0);
sys/arch/arm/include/arm32/psl.h
57
#define splsoftclock() raisespl(IPL_SOFTCLOCK)
sys/arch/arm/ixp12x0/ixp12x0_intr.c
203
KASSERT(imask[IPL_SOFTCLOCK] == 0);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
204
KASSERT(pci_imask[IPL_SOFTCLOCK] == 0);
sys/arch/arm/s3c2xx0/s3c2410_intr.c
276
s3c24x0_soft_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTSERIAL) |
sys/arch/arm/s3c2xx0/s3c2410_intr.c
82
[SI_SOFTCLOCK] = IPL_SOFTCLOCK,
sys/arch/arm/s3c2xx0/s3c2440_intr.c
109
[SI_SOFTCLOCK] = IPL_SOFTCLOCK,
sys/arch/arm/s3c2xx0/s3c2440_intr.c
306
s3c24x0_soft_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTSERIAL) |
sys/arch/arm/xscale/becc_timer.c
172
becc_intr_establish(ICU_SOFT, IPL_SOFTCLOCK, becc_softint, NULL);
sys/arch/arm/xscale/i80321_icu.c
187
KASSERT(i80321_imask[IPL_SOFTCLOCK] == 0);
sys/arch/arm/xscale/ixp425_intr.c
129
[SI_SOFTCLOCK] = IPL_SOFTCLOCK,
sys/arch/arm/xscale/ixp425_intr.c
223
ixp425_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTCLOCK);
sys/arch/arm/xscale/ixp425_intr.c
228
KASSERT(ixp425_imask[IPL_SOFTCLOCK] == 0);
sys/arch/atari/atari/intr.c
318
[IPL_SOFTCLOCK] = PSL_S | PSL_IPL1,
sys/arch/cobalt/cobalt/interrupt.c
145
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0 | MIPS_INT_MASK_0,
sys/arch/dreamcast/dev/maple/maple.c
249
mutex_init(&sc->sc_event_lock, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/arch/emips/emips/xilinx_ml40x.c
78
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/emips/emips/xs_bee3.c
76
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/evbarm/iq80310/iq80310_intr.c
173
iq80310_imask[IPL_SOFTCLOCK] = 0;
sys/arch/evbarm/iq80310/iq80310_intr.c
182
iq80310_imask[IPL_SOFTNET] |= iq80310_imask[IPL_SOFTCLOCK];
sys/arch/evbarm/iq80310/iq80310_intr.c
89
IPL_SOFTCLOCK, /* SI_SOFTCLOCK */
sys/arch/evbmips/gdium/gdium_intr.c
145
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/evbmips/ingenic/intr.c
68
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/evbmips/loongson/loongson_intr.c
75
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/evbmips/malta/malta_intr.c
71
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/evbmips/mipssim/mipssim_intr.c
50
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/evbmips/sbmips/sb1250_icu.c
62
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0 | MIPS_INT_MASK_5,
sys/arch/ews4800mips/ews4800mips/tr2_intr.c
56
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/ews4800mips/ews4800mips/tr2a_intr.c
54
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/hpcmips/tx/tx39icu.c
88
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/hpcmips/vr/vr.c
136
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/ia64/include/intr.h
28
#define splsoftclock() splraise(IPL_SOFTCLOCK)
sys/arch/m68k/m68k/m68k_intr.c
105
[IPL_SOFTCLOCK] = PSL_S | MACHINE_PSL_IPL_SOFTCLOCK,
sys/arch/mac68k/mac68k/intr.c
108
ipl2psl_table[IPL_SOFTCLOCK] = PSL_S|PSL_IPL1;
sys/arch/mips/adm5120/adm5120_intr.c
93
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/mips/alchemy/au_icu.c
98
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/mips/atheros/ar5312.c
369
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/mips/atheros/ar5315.c
354
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/mips/atheros/ar7100.c
73
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/mips/atheros/ar9344.c
368
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/mips/cavium/octeon_intr.c
81
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/mips/include/intr.h
45
#define IPL_SOFTBIO (IPL_SOFTCLOCK) /* shares SWINT with softclock */
sys/arch/mips/mips/mips_machdep.c
2389
KASSERT((status ^ sr_map[IPL_SOFTCLOCK]) == MIPS_INT_MASK);
sys/arch/mips/mips/mips_machdep.c
2390
KASSERT(ci->ci_cpl == IPL_SOFTCLOCK);
sys/arch/mips/mips/mips_machdep.c
2397
KASSERT(s == IPL_SOFTCLOCK);
sys/arch/mips/mips/mips_machdep.c
2434
for (int r = IPL_SOFTCLOCK; r <= IPL_HIGH; r++) {
sys/arch/mips/ralink/ralink_intr.c
57
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/mips/rmi/rmixl_intr.c
1047
IPL_SOFTCLOCK, ipl_eimr_map[IPL_SOFTCLOCK]);
sys/arch/mipsco/mipsco/mips_3x30.c
74
[IPL_SOFTCLOCK] = MIPS_INT_MASK_SPL_SOFT0,
sys/arch/newsmips/newsmips/news3400.c
68
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/newsmips/newsmips/news4000.c
59
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/newsmips/newsmips/news5000.c
64
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/or1k/include/intr.h
85
return _splraise(IPL_SOFTCLOCK);
sys/arch/playstation2/playstation2/interrupt.c
107
intc_intr_establish(I_CH10_TIMER1, IPL_SOFTCLOCK, timer1_intr, 0);
sys/arch/playstation2/playstation2/interrupt.c
156
[IPL_SOFTCLOCK] = 1,
sys/arch/playstation2/playstation2/interrupt.c
162
KDASSERT(ipl >= IPL_SOFTCLOCK && ipl <= IPL_SOFTSERIAL);
sys/arch/pmax/pmax/dec_3100.c
113
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/pmax/pmax/dec_3max.c
118
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/pmax/pmax/dec_3maxplus.c
123
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/pmax/pmax/dec_3min.c
120
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/pmax/pmax/dec_5100.c
73
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/pmax/pmax/dec_maxine.c
119
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
sys/arch/powerpc/include/booke/intr.h
200
return splraise(IPL_SOFTCLOCK);
sys/arch/powerpc/include/softint.h
51
|(1 << IPL_SOFTBIO ) | (1 << IPL_SOFTCLOCK ) \
sys/arch/powerpc/include/softint.h
58
|(IPL_SOFTCLOCK << (4*SOFTINT_CLOCK )))
sys/arch/powerpc/include/softint.h
64
|(SOFTINT_CLOCK << (4*IPL_SOFTCLOCK )))
sys/arch/powerpc/powerpc/softint_machdep.c
47
__CTASSERT(IPL_NONE < IPL_SOFTCLOCK);
sys/arch/powerpc/powerpc/softint_machdep.c
48
__CTASSERT(IPL_SOFTCLOCK < IPL_SOFTBIO);
sys/arch/powerpc/powerpc/softint_machdep.c
92
KASSERT(old_ipl < IPL_SOFTCLOCK);
sys/arch/powerpc/powerpc/softint_machdep.c
93
if (softints & (1 << IPL_SOFTCLOCK)) {
sys/arch/powerpc/powerpc/softint_machdep.c
94
softint_deliver(ci, IPL_SOFTCLOCK);
sys/arch/riscv/include/intr.h
45
#define IPL_SOFTBIO (IPL_SOFTCLOCK + 1)
sys/arch/riscv/riscv/softint_machdep.c
100
if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \
sys/arch/riscv/riscv/softint_machdep.c
102
~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \
sys/arch/riscv/riscv/softint_machdep.c
46
(((IPL_SOFTSERIAL - IPL_SOFTCLOCK) << (SOFTINT_SERIAL * 4)) | \
sys/arch/riscv/riscv/softint_machdep.c
47
((IPL_SOFTNET - IPL_SOFTCLOCK) << (SOFTINT_NET * 4)) | \
sys/arch/riscv/riscv/softint_machdep.c
48
((IPL_SOFTBIO - IPL_SOFTCLOCK) << (SOFTINT_BIO * 4)) | \
sys/arch/riscv/riscv/softint_machdep.c
49
((IPL_SOFTCLOCK - IPL_SOFTCLOCK) << (SOFTINT_CLOCK * 4)))
sys/arch/riscv/riscv/softint_machdep.c
77
KASSERT(level != SOFTINT_CLOCK || *machdep == (1 << (IPL_SOFTCLOCK - IPL_SOFTCLOCK)));
sys/arch/riscv/riscv/softint_machdep.c
78
KASSERT(level != SOFTINT_BIO || *machdep == (1 << (IPL_SOFTBIO - IPL_SOFTCLOCK)));
sys/arch/riscv/riscv/softint_machdep.c
79
KASSERT(level != SOFTINT_NET || *machdep == (1 << (IPL_SOFTNET - IPL_SOFTCLOCK)));
sys/arch/riscv/riscv/softint_machdep.c
80
KASSERT(level != SOFTINT_SERIAL || *machdep == (1 << (IPL_SOFTSERIAL - IPL_SOFTCLOCK)));
sys/arch/riscv/riscv/softint_machdep.c
94
KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0);
sys/arch/sbmips/sbmips/sb1250_icu.c
62
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0 | MIPS_INT_MASK_5,
sys/arch/sgimips/sgimips/machdep.c
125
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0, \
sys/arch/sh3/dev/wdog.c
126
intc_intr_establish(SH_INTEVT_WDT_ITI, IST_LEVEL, IPL_SOFTCLOCK,
sys/arch/shark/isa/isa_irqhandler.c
299
irqmasks[IPL_SOFTCLOCK] &= irqmasks[IPL_NONE];
sys/arch/shark/isa/isa_irqhandler.c
300
irqmasks[IPL_SOFTBIO] &= irqmasks[IPL_SOFTCLOCK];
sys/arch/sparc64/sparc64/intr.c
346
pil = IPL_SOFTCLOCK;
sys/arch/vax/vax/machdep.c
578
#define SOFTINT_IPLS ((IPL_SOFTCLOCK << (SOFTINT_CLOCK * 5)) \
sys/arch/virt68k/virt68k/machdep.c
288
[IPL_SOFTCLOCK] = PSL_S | PSL_IPL1,
sys/arch/x68k/x68k/machdep.c
386
[IPL_SOFTCLOCK] = PSL_S | PSL_IPL1,
sys/arch/x86/x86/x86_softintr.c
281
fake_softclock_intrhand.ih_level = IPL_SOFTCLOCK;
sys/dev/cadence/if_cemac.c
483
cemac_handle_reset_work, sc, PRI_NONE, IPL_SOFTCLOCK,
sys/dev/dmover/dmover_io.c
160
0, 0, 0, "dmiostate", NULL, IPL_SOFTCLOCK);
sys/dev/dmover/dmover_io.c
162
0, 0, 0, "dmiourstate", NULL, IPL_SOFTCLOCK);
sys/dev/dmover/dmover_io.c
175
NULL, PWAIT, IPL_SOFTCLOCK, 0);
sys/dev/dmover/dmover_io.c
188
mutex_init(&ds->ds_lock, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/dev/ipmi.c
1980
mutex_init(&sc.sc_cmd_mtx, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/dev/ipmi.c
2161
mutex_init(&sc->sc_cmd_mtx, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/dev/ipmi.c
2163
mutex_init(&sc->sc_poll_mtx, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/dev/pad/pad.c
222
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/dev/pci/if_aq.c
1846
aq_handle_reset_work, sc, PRI_SOFTNET, IPL_SOFTCLOCK,
sys/dev/pci/if_bge.c
3674
bge_handle_reset_work, sc, PRI_NONE, IPL_SOFTCLOCK,
sys/dev/pci/if_vmx.c
651
vmxnet3_reset_work, sc, VMXNET3_WORKQUEUE_PRI, IPL_SOFTCLOCK,
sys/dev/pci/if_wm.c
2286
wm_handle_reset_work, sc, WM_WORKQUEUE_PRI, IPL_SOFTCLOCK,
sys/dev/raidframe/rf_paritymap.c
465
mutex_init(&pm->lk_flags, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/dev/sysmon/sysmon_envsys.c
534
mutex_init(&sme->sme_work_mtx, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/dev/sysmon/sysmon_envsys_events.c
577
sme_events_worker, sme, PRI_NONE, IPL_SOFTCLOCK, WQ_MPSAFE);
sys/dev/sysmon/sysmon_wdog.c
93
mutex_init(&sysmon_wdog_mtx, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/dev/tprof/tprof.c
370
NULL, PRI_NONE, IPL_SOFTCLOCK, WQ_MPSAFE | WQ_PERCPU);
sys/dev/usb/usbnet.c
1469
mutex_init(&unp->unp_mcastlock, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/kern/kern_mutex.c
361
if (ipl == IPL_NONE || ipl == IPL_SOFTCLOCK ||
sys/kern/kern_softint.c
327
IPL_SOFTCLOCK);
sys/kern/subr_pool.c
1685
if (pp->pr_ipl == IPL_SOFTNET || pp->pr_ipl == IPL_SOFTCLOCK ||
sys/kern/subr_vmem.c
1600
vmem_rehash_all, NULL, PRI_VM, IPL_SOFTCLOCK, WQ_MPSAFE);
sys/kern/subr_xcall.c
177
#if IPL_SOFTCLOCK != IPL_SOFTBIO
sys/kern/subr_xcall.c
209
#if IPL_SOFTCLOCK != IPL_SOFTBIO
sys/kern/subr_xcall.c
210
case IPL_SOFTCLOCK:
sys/net/if.c
346
if_slowtimo_work, NULL, PRI_SOFTNET, IPL_SOFTCLOCK, WQ_MPSAFE);
sys/net/if.c
797
mutex_init(&isd->isd_lock, MUTEX_DEFAULT, IPL_SOFTCLOCK);
sys/rump/librump/rumpkern/locks.c
127
} else if (ipl == IPL_NONE || ipl == IPL_SOFTCLOCK ||
sys/sys/spl.h
49
#if defined(IPL_SOFTCLOCK)