#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: subr_xcall.c,v 1.39 2025/04/01 03:16:41 ozaki-r Exp $");
#include <sys/types.h>
#include <sys/param.h>
#include <sys/xcall.h>
#include <sys/mutex.h>
#include <sys/condvar.h>
#include <sys/evcnt.h>
#include <sys/kthread.h>
#include <sys/cpu.h>
#include <sys/atomic.h>
#ifdef _RUMPKERNEL
#include "rump_private.h"
#endif
typedef struct {
kmutex_t xc_lock;
kcondvar_t xc_busy;
xcfunc_t xc_func;
void * xc_arg1;
void * xc_arg2;
uint64_t xc_headp;
uint64_t xc_donep;
unsigned int xc_ipl;
} xc_state_t;
#define XC_PRI_BIT (1ULL << 63)
static xc_state_t xc_low_pri __cacheline_aligned;
static xc_state_t xc_high_pri __cacheline_aligned;
static void * xc_sihs[4] __cacheline_aligned;
static struct evcnt xc_unicast_ev __cacheline_aligned;
static struct evcnt xc_broadcast_ev __cacheline_aligned;
static void xc_init(void);
static void xc_thread(void *);
static inline uint64_t xc_highpri(xcfunc_t, void *, void *, struct cpu_info *,
unsigned int);
static inline uint64_t xc_lowpri(xcfunc_t, void *, void *, struct cpu_info *);
#define XC_IPL_MASK 0xff00
#define XC_IPL_SOFTSERIAL 0
#define XC_IPL_SOFTNET 1
#define XC_IPL_SOFTBIO 2
#define XC_IPL_SOFTCLOCK 3
#define XC_IPL_MAX XC_IPL_SOFTCLOCK
CTASSERT(XC_IPL_MAX <= __arraycount(xc_sihs));
static void
xc_init(void)
{
xc_state_t *xclo = &xc_low_pri, *xchi = &xc_high_pri;
memset(xclo, 0, sizeof(xc_state_t));
mutex_init(&xclo->xc_lock, MUTEX_DEFAULT, IPL_NONE);
cv_init(&xclo->xc_busy, "xclow");
memset(xchi, 0, sizeof(xc_state_t));
mutex_init(&xchi->xc_lock, MUTEX_DEFAULT, IPL_SOFTSERIAL);
cv_init(&xchi->xc_busy, "xchigh");
#define SETUP_SOFTINT(xipl, sipl) do { \
xc_sihs[(xipl)] = softint_establish( (sipl) | SOFTINT_MPSAFE,\
xc__highpri_intr, NULL); \
KASSERT(xc_sihs[(xipl)] != NULL); \
} while (0)
SETUP_SOFTINT(XC_IPL_SOFTSERIAL, SOFTINT_SERIAL);
#if IPL_SOFTNET != IPL_SOFTSERIAL
SETUP_SOFTINT(XC_IPL_SOFTNET, SOFTINT_NET);
#endif
#if IPL_SOFTBIO != IPL_SOFTNET
SETUP_SOFTINT(XC_IPL_SOFTBIO, SOFTINT_BIO);
#endif
#if IPL_SOFTCLOCK != IPL_SOFTBIO
SETUP_SOFTINT(XC_IPL_SOFTCLOCK, SOFTINT_CLOCK);
#endif
#undef SETUP_SOFTINT
evcnt_attach_dynamic(&xc_unicast_ev, EVCNT_TYPE_MISC, NULL,
"crosscall", "unicast");
evcnt_attach_dynamic(&xc_broadcast_ev, EVCNT_TYPE_MISC, NULL,
"crosscall", "broadcast");
}
unsigned int
xc_encode_ipl(int ipl)
{
switch (ipl) {
case IPL_SOFTSERIAL:
return __SHIFTIN(XC_IPL_SOFTSERIAL, XC_IPL_MASK);
#if IPL_SOFTNET != IPL_SOFTSERIAL
case IPL_SOFTNET:
return __SHIFTIN(XC_IPL_SOFTNET, XC_IPL_MASK);
#endif
#if IPL_SOFTBIO != IPL_SOFTNET
case IPL_SOFTBIO:
return __SHIFTIN(XC_IPL_SOFTBIO, XC_IPL_MASK);
#endif
#if IPL_SOFTCLOCK != IPL_SOFTBIO
case IPL_SOFTCLOCK:
return __SHIFTIN(XC_IPL_SOFTCLOCK, XC_IPL_MASK);
#endif
}
panic("Invalid IPL: %d", ipl);
}
static inline unsigned int
xc_extract_ipl(unsigned int flags)
{
return __SHIFTOUT(flags, XC_IPL_MASK);
}
void
xc_init_cpu(struct cpu_info *ci)
{
static bool again = false;
int error __diagused;
if (!again) {
xc_init();
again = true;
}
cv_init(&ci->ci_data.cpu_xcall, "xcall");
error = kthread_create(PRI_XCALL, KTHREAD_MPSAFE, ci, xc_thread,
NULL, NULL, "xcall/%u", ci->ci_index);
KASSERT(error == 0);
}
uint64_t
xc_broadcast(unsigned int flags, xcfunc_t func, void *arg1, void *arg2)
{
KASSERT(!cpu_intr_p());
KASSERT(!cpu_softintr_p());
ASSERT_SLEEPABLE();
if (__predict_false(!mp_online)) {
int s, bound;
if (flags & XC_HIGHPRI)
s = splsoftserial();
else
bound = curlwp_bind();
(*func)(arg1, arg2);
if (flags & XC_HIGHPRI)
splx(s);
else
curlwp_bindx(bound);
return 0;
}
if ((flags & XC_HIGHPRI) != 0) {
unsigned int ipl = xc_extract_ipl(flags);
return xc_highpri(func, arg1, arg2, NULL, ipl);
} else {
return xc_lowpri(func, arg1, arg2, NULL);
}
}
static void
xc_nop(void *arg1, void *arg2)
{
return;
}
void
xc_barrier(unsigned int flags)
{
uint64_t where;
where = xc_broadcast(flags, xc_nop, NULL, NULL);
xc_wait(where);
}
uint64_t
xc_unicast(unsigned int flags, xcfunc_t func, void *arg1, void *arg2,
struct cpu_info *ci)
{
KASSERT(ci != NULL);
KASSERT(!cpu_intr_p());
KASSERT(!cpu_softintr_p());
ASSERT_SLEEPABLE();
if (__predict_false(!mp_online)) {
int s, bound;
KASSERT(ci == curcpu());
if (flags & XC_HIGHPRI)
s = splsoftserial();
else
bound = curlwp_bind();
(*func)(arg1, arg2);
if (flags & XC_HIGHPRI)
splx(s);
else
curlwp_bindx(bound);
return 0;
}
if ((flags & XC_HIGHPRI) != 0) {
unsigned int ipl = xc_extract_ipl(flags);
return xc_highpri(func, arg1, arg2, ci, ipl);
} else {
return xc_lowpri(func, arg1, arg2, ci);
}
}
void
xc_wait(uint64_t where)
{
xc_state_t *xc;
KASSERT(!cpu_intr_p());
KASSERT(!cpu_softintr_p());
ASSERT_SLEEPABLE();
if (__predict_false(!mp_online)) {
return;
}
if ((where & XC_PRI_BIT) != 0) {
xc = &xc_high_pri;
where &= ~XC_PRI_BIT;
} else {
xc = &xc_low_pri;
}
#ifdef __HAVE_ATOMIC64_LOADSTORE
if (atomic_load_acquire(&xc->xc_donep) >= where) {
return;
}
#endif
mutex_enter(&xc->xc_lock);
while (xc->xc_donep < where) {
cv_wait(&xc->xc_busy, &xc->xc_lock);
}
mutex_exit(&xc->xc_lock);
}
static inline uint64_t
xc_lowpri(xcfunc_t func, void *arg1, void *arg2, struct cpu_info *ci)
{
xc_state_t *xc = &xc_low_pri;
CPU_INFO_ITERATOR cii;
uint64_t where;
mutex_enter(&xc->xc_lock);
while (xc->xc_headp != xc->xc_donep) {
cv_wait(&xc->xc_busy, &xc->xc_lock);
}
xc->xc_arg1 = arg1;
xc->xc_arg2 = arg2;
xc->xc_func = func;
if (ci == NULL) {
xc_broadcast_ev.ev_count++;
for (CPU_INFO_FOREACH(cii, ci)) {
if ((ci->ci_schedstate.spc_flags & SPCF_RUNNING) == 0)
continue;
xc->xc_headp += 1;
ci->ci_data.cpu_xcall_pending = true;
cv_signal(&ci->ci_data.cpu_xcall);
}
} else {
xc_unicast_ev.ev_count++;
xc->xc_headp += 1;
ci->ci_data.cpu_xcall_pending = true;
cv_signal(&ci->ci_data.cpu_xcall);
}
KASSERT(xc->xc_donep < xc->xc_headp);
where = xc->xc_headp;
mutex_exit(&xc->xc_lock);
KASSERT((where & XC_PRI_BIT) == 0);
return where;
}
static void
xc_thread(void *cookie)
{
struct cpu_info *ci = curcpu();
xc_state_t *xc = &xc_low_pri;
void *arg1, *arg2;
xcfunc_t func;
struct lwp *l = curlwp;
KASSERTMSG(l->l_nopreempt == 0, "lwp %p nopreempt %d",
l, l->l_nopreempt);
mutex_enter(&xc->xc_lock);
for (;;) {
while (!ci->ci_data.cpu_xcall_pending) {
if (xc->xc_headp == xc->xc_donep) {
cv_broadcast(&xc->xc_busy);
}
cv_wait(&ci->ci_data.cpu_xcall, &xc->xc_lock);
KASSERT(ci == curcpu());
}
ci->ci_data.cpu_xcall_pending = false;
func = xc->xc_func;
arg1 = xc->xc_arg1;
arg2 = xc->xc_arg2;
mutex_exit(&xc->xc_lock);
KASSERT(func != NULL);
(*func)(arg1, arg2);
KASSERTMSG(l->l_nopreempt == 0, "lwp %p nopreempt %d func %p",
l, l->l_nopreempt, func);
mutex_enter(&xc->xc_lock);
#ifdef __HAVE_ATOMIC64_LOADSTORE
atomic_store_release(&xc->xc_donep, xc->xc_donep + 1);
#else
xc->xc_donep++;
#endif
}
}
void
xc_ipi_handler(void)
{
xc_state_t *xc = & xc_high_pri;
KASSERT(xc->xc_ipl < __arraycount(xc_sihs));
KASSERT(xc_sihs[xc->xc_ipl] != NULL);
softint_schedule(xc_sihs[xc->xc_ipl]);
}
void
xc__highpri_intr(void *dummy)
{
xc_state_t *xc = &xc_high_pri;
void *arg1, *arg2;
xcfunc_t func;
KASSERTMSG(!cpu_intr_p(), "high priority xcall for function %p",
xc->xc_func);
func = xc->xc_func;
arg1 = xc->xc_arg1;
arg2 = xc->xc_arg2;
KASSERT(func != NULL);
(*func)(arg1, arg2);
mutex_enter(&xc->xc_lock);
KASSERT(xc->xc_donep < xc->xc_headp);
#ifdef __HAVE_ATOMIC64_LOADSTORE
atomic_store_release(&xc->xc_donep, xc->xc_donep + 1);
#else
xc->xc_donep++;
#endif
if (xc->xc_donep == xc->xc_headp) {
cv_broadcast(&xc->xc_busy);
}
mutex_exit(&xc->xc_lock);
}
static inline uint64_t
xc_highpri(xcfunc_t func, void *arg1, void *arg2, struct cpu_info *ci,
unsigned int ipl)
{
xc_state_t *xc = &xc_high_pri;
uint64_t where;
mutex_enter(&xc->xc_lock);
while (xc->xc_headp != xc->xc_donep) {
cv_wait(&xc->xc_busy, &xc->xc_lock);
}
xc->xc_func = func;
xc->xc_arg1 = arg1;
xc->xc_arg2 = arg2;
xc->xc_headp += (ci ? 1 : ncpu);
xc->xc_ipl = ipl;
where = xc->xc_headp;
mutex_exit(&xc->xc_lock);
#ifdef _RUMPKERNEL
rump_xc_highpri(ci);
#else
#ifdef MULTIPROCESSOR
kpreempt_disable();
if (curcpu() == ci) {
xc_ipi_handler();
} else if (ci) {
xc_send_ipi(ci);
} else {
xc_send_ipi(NULL);
xc_ipi_handler();
}
kpreempt_enable();
#else
KASSERT(ci == NULL || curcpu() == ci);
xc_ipi_handler();
#endif
#endif
return (where | XC_PRI_BIT);
}