bin/sh/exec.c

152

return false;

bin/sh/exec.c

164

hasletter = false;

bin/sh/exec.c

169

return false;

games/adventure/save.c

126

sf->warned = false;

games/adventure/save.c

753

bool skipsum = false;

games/adventure/save.c

755

sf = savefile_open(infile, false);

games/cgram/cgram.c

304

return false;

games/cgram/cgram.c

522

return false;

games/cribbage/cards.c

95

return (false);

games/cribbage/crib.c

197

compcrib = false;

games/cribbage/crib.c

213

msgcard(deck[i], false);

games/cribbage/crib.c

216

msgcard(deck[j], false);

games/cribbage/crib.c

259

iwon = false;

games/cribbage/crib.c

293

prhand(phand, FULLHAND, Playwin, false);

games/cribbage/crib.c

303

return (false);

games/cribbage/crib.c

342

prhand(phand, FULLHAND, Playwin, false);

games/cribbage/crib.c

348

prhand(phand, FULLHAND, Playwin, false);

games/cribbage/crib.c

366

win = false;

games/cribbage/crib.c

376

msgcard(turnover, false);

games/cribbage/crib.c

386

msgcard(turnover, false);

games/cribbage/crib.c

394

prcrib(mycrib, false);

games/cribbage/crib.c

448

played = mego = ugo = false;

games/cribbage/crib.c

452

prhand(ph, pnum, Playwin, false);

games/cribbage/crib.c

470

mego = ugo = false;

games/cribbage/crib.c

494

msgcard(crd, false);

games/cribbage/crib.c

517

mego = ugo = false;

games/cribbage/crib.c

521

played = false;

games/cribbage/crib.c

528

pnum, Playwin, false);

games/cribbage/crib.c

554

mego = ugo = false;

games/cribbage/crib.c

556

last = false; /* disable last flag */

games/cribbage/crib.c

561

prhand(ph, pnum, Playwin, false);

games/cribbage/crib.c

578

return (false);

games/cribbage/crib.c

588

prhand(Table, Tcnt, Tablewin, false);

games/cribbage/crib.c

617

return (false);

games/cribbage/extern.c

39

bool explain = false; /* player mistakes explained */

games/cribbage/extern.c

40

bool iwon = false; /* if comp won last game */

games/cribbage/extern.c

41

bool quiet = false; /* if suppress random mess */

games/cribbage/extern.c

42

bool rflag = false; /* if all cuts random */

games/cribbage/io.c

223

retval = false;

games/cribbage/io.c

84

return (msgcrd(c, false, " of ", false));

games/cribbage/io.c

95

return (false);

games/cribbage/score.c

269

run = false;

games/cribbage/score.c

307

got[i] = false;

games/cribbage/support.c

129

prhand(hand, CINHAND, Playwin, false);

games/cribbage/support.c

161

j = scorehand(h, turnover, CINHAND, strcmp(s, "crib") == 0, false);

games/cribbage/support.c

162

prhand(h, CINHAND, Compwin, false);

games/cribbage/support.c

259

scorehand(h, d[k], CINHAND, true, false);

games/cribbage/support.c

289

return (false);

games/fortune/fortune/fortune.c

1044

static bool did_noprobs = false;

games/fortune/fortune/fortune.c

1273

Found_one = false;

games/fortune/fortune/fortune.c

1325

in_file = false;

games/fortune/fortune/fortune.c

272

ignore_case = false;

games/fortune/fortune/fortune.c

297

Short_only = false;

games/fortune/fortune/fortune.c

304

Long_only = false;

games/fortune/fortune/fortune.c

368

Fortunes_only = false;

games/fortune/fortune/fortune.c

398

return (false);

games/fortune/fortune/fortune.c

402

return (false);

games/fortune/fortune/fortune.c

416

return (false);

games/fortune/fortune/fortune.c

431

return false;

games/fortune/fortune/fortune.c

435

return false;

games/fortune/fortune/fortune.c

460

was_malloc = false;

games/fortune/fortune/fortune.c

598

fp->read_tbl = false;

games/fortune/fortune/fortune.c

652

if (!is_fortfile(offensive, &datfile, &posfile, false))

games/fortune/fortune/fortune.c

680

obscene->read_tbl = false;

games/fortune/fortune/fortune.c

701

return (false);

games/fortune/fortune/fortune.c

718

return (false);

games/fortune/fortune/fortune.c

734

return (false);

games/fortune/fortune/fortune.c

771

return (false);

games/fortune/fortune/fortune.c

781

return (false);

games/fortune/fortune/fortune.c

785

return (false);

games/fortune/fortune/fortune.c

792

return (false);

games/fortune/fortune/fortune.c

805

return (false);

games/fortune/fortune/fortune.c

90

static bool Find_files = false; /* just find a list of proper fortune files */

games/fortune/fortune/fortune.c

91

static bool Fortunes_only = false; /* check only "fortunes" files */

games/fortune/fortune/fortune.c

92

static bool Wait = false; /* wait desired after fortune */

games/fortune/fortune/fortune.c

93

static bool Short_only = false; /* short fortune desired */

games/fortune/fortune/fortune.c

94

static bool Long_only = false; /* long fortune desired */

games/fortune/fortune/fortune.c

95

static bool Offend = false; /* offensive fortunes only */

games/fortune/fortune/fortune.c

96

static bool All_forts = false; /* any fortune allowed */

games/fortune/fortune/fortune.c

97

static bool Equal_probs = false; /* scatter un-allocted prob equally */

games/fortune/fortune/fortune.c

98

static bool Match = false; /* dump fortunes matching a pattern */

games/fortune/fortune/fortune.c

99

static bool WriteToDisk = false; /* use files on disk to save state */

games/grdc/grdc.c

61

t12 = false;

games/grdc/grdc.c

63

scrol = false;

games/grdc/grdc.c

95

forever = false;

games/robots/extern.c

36

bool Real_time = false; /* Play in real time? */

games/robots/extern.c

37

bool Jump = false; /* Jump while running, counting, or waiting */

games/robots/extern.c

38

bool Teleport = false; /* Teleport automatically when player must */

games/robots/extern.c

41

bool Running = false; /* Currently in the middle of a run */

games/robots/extern.c

44

bool Was_bonus = false; /* Was a bonus last level */

games/robots/extern.c

48

bool Pattern_roll = false; /* Auto play for YHBJNLUK pattern */

games/robots/extern.c

49

bool Stand_still = false; /* Auto play for standing still pattern */

games/robots/init_field.c

106

first = false;

games/robots/init_field.c

72

Dead = false;

games/robots/init_field.c

73

Waiting = false;

games/robots/main.c

174

return false;

games/robots/main.c

47

show_only = false;

games/robots/main.c

49

bad_arg = false;

games/robots/make_level.c

55

Waiting = false;

games/robots/make_level.c

57

leaveok(stdscr, false);

games/robots/move.c

165

Running = false;

games/robots/move.c

169

leaveok(stdscr, false);

games/robots/move.c

188

leaveok(stdscr, false);

games/robots/move.c

218

return false;

games/robots/move.c

239

Running = false;

games/robots/move.c

240

leaveok(stdscr, false);

games/robots/move.c

248

return false;

games/robots/move.c

279

return false;

games/robots/move.c

290

Running = false;

games/robots/move.c

291

leaveok(stdscr, false);

games/robots/play_level.c

81

Was_bonus = false;

games/robots/play_level.c

90

Was_bonus = false;

games/robots/score.c

108

Full_clear = false;

games/robots/score.c

66

bool done_show = false;

games/robots/score.c

69

Newscore = false;

games/sail/game.c

52

if (*af != false) {

games/sail/pl_5.c

59

bool moved = false;

games/sail/pl_7.c

1014

done = false;

games/sail/pl_7.c

1069

shipselected = false;

games/sail/pl_7.c

1077

ingame = false;

games/sail/pl_7.c

1099

ingame = false;

games/sail/pl_7.c

1111

ingame = false;

games/sail/pl_7.c

1455

connected = false;

games/sail/pl_7.c

1458

joinactive = false;

games/sail/pl_7.c

1463

startactive = false;

games/sail/pl_7.c

1467

optionsactive = false;

games/sail/pl_7.c

1485

joinactive = false;

games/sail/pl_7.c

1502

startactive = false;

games/sail/pl_7.c

1522

optionsactive = false;

games/sail/pl_7.c

1547

joinactive = false;

games/sail/pl_7.c

1549

startactive = false;

games/sail/pl_7.c

1551

optionsactive = false;

games/sail/pl_7.c

453

sc_hasprompt = false;

games/sail/pl_7.c

472

sc_hideprompt = false;

games/sail/pl_7.c

957

done = false;

lib/libc/citrus/citrus_iconv.c

68

static bool isinit = false;

lib/libc/citrus/citrus_prop.c

235

obj->u.boolean = false;

lib/libc/gen/arc4random-compat.c

52

static bool warned = false;

lib/libc/gen/arc4random-compat.c

62

static bool warned = false;

lib/libc/gen/arc4random.c

122

need_init = false;

lib/libc/gen/wordexp.c

110

return (false);

lib/libc/gen/wordexp.c

303

bool quote = false, dollar = false;

lib/libc/gen/wordexp.c

305

bool have_sq = false, have_dq = false, have_par_begin = false;

lib/libc/gen/wordexp.c

306

bool have_cmd = false;

lib/libc/gen/wordexp.c

308

bool need_sq = false, need_dq = false, need_par_end = false;

lib/libc/gen/wordexp.c

309

bool need_cmd_old = false, need_cmd_new = false;

lib/libc/gen/wordexp.c

318

quote = false;

lib/libc/gen/wordexp.c

326

need_sq = false;

lib/libc/gen/wordexp.c

333

need_dq = false;

lib/libc/gen/wordexp.c

340

need_cmd_old = false;

lib/libc/gen/wordexp.c

357

need_par_end = false;

lib/libc/gen/wordexp.c

372

need_cmd_new = false;

lib/libc/gen/wordexp.c

381

quote = dollar = false;

lib/libc/iconv/iconv.c

89

handle->cv_shared->ci_ilseq_invalid = false;

lib/libc/locale/cXXrtomb_iconv.h

74

cs->initialized = false;

lib/libc/locale/mbrtocXX_iconv.h

76

cs->initialized = false;

lib/libc/stdlib/getenv.c

145

return (false);

lib/libc/stdlib/getenv.c

236

envVars[envNdx].active = false;

lib/libc/stdlib/getenv.c

311

return (false);

lib/libc/stdlib/getenv.c

349

envVars[envNdx].putenv = false;

lib/libc/stdlib/getenv.c

375

false) == NULL) {

lib/libc/stdlib/getenv.c

469

reuse = false;

lib/libc/stdlib/getenv.c

470

if (__findenv(name, nameLen, &envNdx, false) != NULL) {

lib/libc/stdlib/getenv.c

475

envVars[envNdx].active = false;

lib/libc/stdlib/getenv.c

547

__clean_env(false);

lib/libc/stdlib/getenv.c

631

envVars[envNdx].active = false;

lib/libc/stdlib/getenv.c

679

envVars[envNdx].active = false;

lib/libc/stdlib/getenv.c

706

envVars[ndx].active = false;

lib/libc/string/strcspn.c

59

memset(charset, false, sizeof(charset));

lib/libc/string/strcspn.c

64

for(s = str; charset[*(const unsigned char *)s] == false; s++)

lib/libc/string/strspn.c

59

memset(charset, false, sizeof(charset));

lib/libcrypt/crypt-sha256.c

318

bool rounds_custom = false;

lib/libcrypt/crypt-sha512.c

349

bool rounds_custom = false;

lib/libdevattr/devattr.c

197

if (prop_dictionary_set(dict, key, ps) == false) {

lib/libdevattr/devattr.c

215

if (prop_dictionary_set(dict, key, pn) == false) {

lib/libdevattr/devattr.c

233

if (prop_dictionary_set(dict, key, pn) == false) {

lib/libdevattr/devattr.c

297

if (prop_dictionary_set(dict, "filters", filters) == false) {

lib/libdevattr/devattr_monitor.c

192

udev_monitor->ev_filt) == false) {

lib/libdevattr/devattr_monitor.c

326

if (prop_array_add(filters, dict) == false)

lib/libnvmm/libnvmm.c

76

return false;

lib/libnvmm/libnvmm.c

80

return false;

lib/libnvmm/libnvmm.c

83

return false;

lib/libnvmm/libnvmm_x86.c

1122

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1161

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1188

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1215

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1232

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1233

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1241

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1255

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1272

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1273

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1281

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1295

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1312

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1313

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1321

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1335

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1352

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1353

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1361

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1375

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1397

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1414

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1415

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1423

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1432

.todmo = false,

lib/libnvmm/libnvmm_x86.c

1433

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1441

.todmo = false,

lib/libnvmm/libnvmm_x86.c

1451

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1472

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1492

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1512

.szoverride = false,

lib/libnvmm/libnvmm_x86.c

1534

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1544

.regtorm = false,

lib/libnvmm/libnvmm_x86.c

1556

[false] = {

lib/libnvmm/libnvmm_x86.c

1646

[false] = {

lib/libnvmm/libnvmm_x86.c

2141

noindex = false;

lib/libnvmm/libnvmm_x86.c

2142

nobase = false;

lib/libnvmm/libnvmm_x86.c

2764

mem->write = false;

lib/libnvmm/libnvmm_x86.c

2797

mem->write = false;

lib/libnvmm/libnvmm_x86.c

2827

mem->write = false;

lib/libnvmm/libnvmm_x86.c

2855

mem->write = false;

lib/libnvmm/libnvmm_x86.c

2888

mem->write = false;

lib/libnvmm/libnvmm_x86.c

2922

mem->write = false;

lib/libnvmm/libnvmm_x86.c

2946

mem->write = false;

lib/libnvmm/libnvmm_x86.c

3233

mem.write = false;

lib/libnvmm/libnvmm_x86.c

3243

mem.write = false;

lib/libnvmm/libnvmm_x86.c

3249

mem.write = false;

lib/libnvmm/libnvmm_x86.c

3252

mem.write = false;

lib/libnvmm/libnvmm_x86.c

617

mem.write = false;

lib/libnvmm/libnvmm_x86.c

747

bool psld = false;

lib/libutil/gr_util.c

352

return (false);

lib/libutil/gr_util.c

354

return (false);

lib/libutil/gr_util.c

357

return (false);

lib/libutil/gr_util.c

359

return (false);

lib/libutil/gr_util.c

361

return (false);

lib/libutil/gr_util.c

373

return (false);

lib/libutil/gr_util.c

386

return (false);

lib/libutil/gr_util.c

574

return (false);

lib/libutil/gr_util.c

581

return (false);

lib/libutil/gr_util.c

585

return (false);

lib/libutil/gr_util.c

589

return (false);

lib/libutil/gr_util.c

597

return (false);

libexec/rtld-elf/rtld.c

1002

obj->bind_now = false;

libexec/rtld-elf/rtld.c

1262

obj->traced = false;

libexec/rtld-elf/rtld.c

1484

return false;

libexec/rtld-elf/rtld.c

1575

nodeflib = objgiven ? refobj->z_nodeflib : false;

libexec/rtld-elf/rtld.c

1788

skip = false;

libexec/rtld-elf/rtld.c

2030

obj->filtees_loaded = false;

libexec/rtld-elf/rtld.c

2427

obj->init_scanned = false;

libexec/rtld-elf/rtld.c

2612

if (before == false)

libexec/rtld-elf/rtld.c

2655

if (obj->textrel && reloc_textrel_prot(obj, false) != 0)

libexec/rtld-elf/rtld.c

4072

return (false);

libexec/rtld-elf/rtld.c

4082

return (false);

libexec/rtld-elf/rtld.c

4085

return (false);

libexec/rtld-elf/rtld.c

4094

return (false);

libexec/rtld-elf/rtld.c

4121

return (false);

libexec/rtld-elf/rtld.c

4132

return (false);

libexec/rtld-elf/rtld.c

4139

return (false);

libexec/rtld-elf/rtld.c

4155

return (false);

libexec/rtld-elf/rtld.c

4588

return false;

libexec/rtld-elf/rtld.c

4609

return false;

libexec/rtld-elf/rtld.c

960

res1 = origin_subst_one(real, "$ORIGIN", origin_path, false);

libexec/rtld-elf/x86_64/reloc.c

423

obj->irelative = false;

libexec/rtld-elf/x86_64/reloc.c

446

obj->irelative_nonplt = false;

libexec/rtld-elf/x86_64/reloc.c

485

obj->gnu_ifunc = false;

sbin/devattr/devattr.c

101

invert = false;

sbin/dumpon/dumpon.c

63

is_dumpoff = false;

sbin/fsck_hammer2/destroy.c

67

static bool ForceOpt = false;

sbin/fsck_hammer2/destroy.c

72

bool failed = false;

sbin/fsck_hammer2/reconstruct.c

108

bool failed = false;

sbin/fsck_hammer2/reconstruct.c

153

bool found = false;

sbin/fsck_hammer2/reconstruct.c

407

bool found = false;

sbin/fsck_hammer2/reconstruct.c

63

static bool ForceOpt = false;

sbin/fsck_hammer2/reconstruct.c

68

bool failed = false;

sbin/fsck_hammer2/test.c

1013

norecurse = false;

sbin/fsck_hammer2/test.c

1018

for (i = 0; norecurse == false && i < bcount; ++i) {

sbin/fsck_hammer2/test.c

1338

bool failed = false;

sbin/fsck_hammer2/test.c

257

bool failed = false;

sbin/fsck_hammer2/test.c

295

bool failed = false;

sbin/fsck_hammer2/test.c

315

if (verify_blockref(NULL, &broot, false, &bstats,

sbin/fsck_hammer2/test.c

333

bool failed = false;

sbin/fsck_hammer2/test.c

365

bool found = false;

sbin/fsck_hammer2/test.c

389

if (verify_blockref(NULL, &p->bref, false, &bstats,

sbin/fsck_hammer2/test.c

796

bool failed = false;

sbin/fsck_hammer2/test.c

926

print_blockref_stats(bstats, false);

sbin/fsck_msdosfs/fat.c

373

entry->dirty = false;

sbin/fsck_msdosfs/fat.c

458

p = fat_get_fat32_cached_ptr(fat, cl, false);

sbin/fsck_msdosfs/fat.c

623

fat->is_mmapped = false;

sbin/fsck_msdosfs/fat.c

624

fat->use_cache = false;

sbin/gpt/add.c

253

*is_sector = false;

sbin/gpt/add.c

270

is_sector = false;

sbin/gpt/create.c

284

bool with_boot = false;

sbin/gpt/create.c

285

bool with_trim = false;

sbin/gpt/create.c

47

static bool force = false;

sbin/gpt/create.c

48

static bool primary_only = false;

sbin/gpt/destroy.c

109

destroy(fd, false);

sbin/gpt/destroy.c

41

static bool recoverable = false;

sbin/gpt/gpt.c

690

if (gpt_read_table(false) < 0)

sbin/gpt/label.c

41

static bool all = false;

sbin/gpt/migrate.c

45

static bool force = false;

sbin/gpt/migrate.c

46

static bool keep_slice = false;

sbin/gpt/remove.c

41

static bool all = false;

sbin/gpt/show.c

42

static bool show_guid = false;

sbin/gpt/show.c

43

static bool show_label = false;

sbin/gpt/show.c

44

static bool show_uuid = false;

sbin/ifconfig/ifconfig.c

1022

newaddr = false;

sbin/ifconfig/ifconfig.c

1024

clearaddr = false;

sbin/ifconfig/ifconfig.c

1249

allfamilies = false;

sbin/ifconfig/ifconfig.c

365

all = downonly = uponly = namesonly = verbose = false;

sbin/ifconfig/ifconfig.c

366

clearaddr = noload = setaddr = setmask = false;

sbin/ifconfig/ifconfig.c

624

return (false);

sbin/ifconfig/ifconfig.c

639

return (false);

sbin/ifconfig/ifconfig.c

653

matched = false;

sbin/ifconfig/ifconfig.c

73

bool supmedia = false;

sbin/ifconfig/ifconfig.c

74

bool printkeys = false; /* Print keying material for interfaces. */

sbin/ifconfig/ifconfig.c

75

bool printifname = false; /* Print the name of the created interface. */

sbin/ifconfig/ifconfig.c

898

clearaddr = false;

sbin/ifconfig/ifconfig.c

915

newaddr = false;

sbin/ifconfig/ifieee80211.c

4307

list_channels(s, false);

sbin/ifconfig/iflagg.c

155

bool isport = false;

sbin/mountd/mountd.c

1011

int false = 0;

sbin/mountd/mountd.c

1032

if (!xdr_bool(xdrsp, &false))

sbin/mountd/mountd.c

1050

int false = 0;

sbin/mountd/mountd.c

1099

if (!xdr_bool(xdrsp, &false))

sbin/mountd/mountd.c

984

int false = 0;

sbin/mountd/mountd.c

999

if (!xdr_bool(xdrsp, &false))

sbin/rcorder/rcorder.c

78

#define RESET false

sbin/udevd/test_udevd.c

387

udev_monitor->ev_filt) == false) {

sbin/udevd/test_udevd.c

528

if (prop_array_add(udev_monitor->ev_filt, dict) == false)

sbin/udevd/test_udevd.c

630

if (prop_dictionary_set(dict, key, ps) == false) {

sbin/udevd/test_udevd.c

648

if (prop_dictionary_set(dict, key, pn) == false) {

sbin/udevd/test_udevd.c

666

if (prop_dictionary_set(dict, key, pn) == false) {

sbin/udevd/udevd.c

282

if (prop_dictionary_set(pd, "command", ps) == false) {

sbin/vquota/vquota.c

147

bool retval = false;

sbin/vquota/vquota.c

442

return false;

sbin/vquota/vquota.c

446

if (rv== false) {

sbin/vquota/vquota.c

448

return false;

sbin/vquota/vquota.c

452

if (rv == false) {

sbin/vquota/vquota.c

454

return false;

sbin/vquota/vquota.c

461

return false;

sbin/vquota/vquota.c

471

return false;

sbin/vquota/vquota.c

508

if (rv == false) {

sbin/vquota/vquota.c

516

rv = false;

sbin/vquota/vquota.c

523

rv = false;

sbin/vquota/vquota.c

610

if (send_command(dirname, "set usage all", args, &res) == false) {

sbin/vquota/vquota.c

636

if (send_command(dirname, "set limit", args, &res) == false) {

sbin/vquota/vquota.c

663

if (send_command(dirname, "set limit uid", args, &res) == false) {

sbin/vquota/vquota.c

690

if (send_command(dirname, "set limit gid", args, &res) == false) {

sys/bus/mmc/mmc.c

1856

changed = false;

sys/bus/mmc/mmc.c

830

ivar->cmd6_time, false);

sys/bus/mmc/mmc_subr.c

175

if (err != MMC_ERR_NONE || status == false)

sys/bus/u4b/storage/umass.c

2794

return (false); /* failure */

sys/bus/u4b/storage/umass.c

2839

return (false);

sys/bus/u4b/storage/umass.c

2843

return (false); /* failure */

sys/bus/u4b/storage/umass.c

2918

return (false); /* failure */

sys/bus/u4b/storage/umass.c

2928

return (false); /* failure */

sys/bus/u4b/storage/umass.c

2966

return (false); /* Already failed -- don't submit */

sys/crypto/chachapoly.c

234

return (false);

sys/crypto/chachapoly.c

236

_chacha20poly1305_init(&ctx, false, nonce, key);

sys/crypto/chachapoly.c

394

_chacha20poly1305_init(&ctx, false, nonce, key);

sys/crypto/cryptoapi/cryptoapi.c

1145

session->cipher->crypt(session->context, data, datalen, iv2, false);

sys/crypto/cryptoapi/cryptoapi.c

384

return false;

sys/dev/acpica/acpi_cpu_cstate.c

994

cpuhelper_assert(mycpuid, false);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1332

status = acpi_thinkpad_privacyguard_acpi_call(sc, false, &val);

sys/dev/apple/smc/smc.c

1103

return (false);

sys/dev/apple/smc/smc.c

1121

return (false);

sys/dev/crypto/tpm/tpm20.c

237

return (tpm20_save_state(dev, false));

sys/dev/crypto/tpm/tpm_crb.c

179

sc->interrupts = false;

sys/dev/crypto/tpm/tpm_crb.c

261

return (false);

sys/dev/crypto/tpm/tpm_crb.c

271

return (false);

sys/dev/crypto/tpm/tpm_crb.c

277

return (false);

sys/dev/crypto/tpm/tpm_crb.c

299

return (false);

sys/dev/crypto/tpm/tpm_tis.c

143

sc->interrupts = false;

sys/dev/crypto/tpm/tpm_tis.c

147

sc->interrupts = false;

sys/dev/crypto/tpm/tpm_tis.c

216

return (false);

sys/dev/crypto/tpm/tpm_tis.c

273

return (false);

sys/dev/crypto/tpm/tpm_tis.c

303

return (false);

sys/dev/crypto/tpm/tpm_tis.c

323

return (false);

sys/dev/crypto/tpm/tpm_tis.c

343

return (false);

sys/dev/crypto/tpm/tpm_tis.c

365

return (false);

sys/dev/crypto/tpm/tpm_tis.c

393

return (false);

sys/dev/drm/amd/amdgpu/amdgpu.h

1138

#define DREG32_SYS(sqf, adev, reg) seq_printf((sqf), #reg " : 0x%08X\n", amdgpu_mm_rreg((adev), (reg), false))

sys/dev/drm/amd/amdgpu/amdgpu.h

1215

static inline bool amdgpu_has_atpx_dgpu_power_cntl(void) { return false; }

sys/dev/drm/amd/amdgpu/amdgpu.h

1216

static inline bool amdgpu_is_atpx_hybrid(void) { return false; }

sys/dev/drm/amd/amdgpu/amdgpu.h

1217

static inline bool amdgpu_atpx_dgpu_req_power_for_displays(void) { return false; }

sys/dev/drm/amd/amdgpu/amdgpu.h

1218

static inline bool amdgpu_has_atpx(void) { return false; }

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

160

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

228

pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

413

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

475

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

519

bool enable = state == AMD_PG_STATE_GATE ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

291

n->enabled = false;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

569

return false;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

804

atif->notification_cfg.enabled = false;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

383

mem_info->mem_clk_max = amdgpu_dpm_get_mclk(adev, false) / 100;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

406

return amdgpu_dpm_get_sclk(adev, false) / 100;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

494

ret = dma_fence_wait(f, false);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

521

return false;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

527

return false;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.h

152

bool valid = false; \

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

321

bool valid_wptr = false;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

527

bool retval = false;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

559

return false;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

639

bool retval = false;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

672

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

101

i2c.valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1041

ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1043

ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE) ? false : true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1061

ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1063

ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE) ? false : true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1500

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1505

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1509

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1684

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

172

gpio.valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1744

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

275

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

278

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

288

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

312

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

315

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

373

router.ddc_valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

374

router.cd_valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

487

ddc_bus.valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

72

i2c.hw_capable = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

77

i2c.mm_i2c = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

84

i2c.valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

910

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

914

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

999

return false;

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

49

return false;

sys/dev/drm/amd/amdgpu/amdgpu_benchmark.c

114

r = amdgpu_bo_reserve(dobj, false);

sys/dev/drm/amd/amdgpu/amdgpu_benchmark.c

43

false, false);

sys/dev/drm/amd/amdgpu/amdgpu_benchmark.c

46

r = dma_fence_wait(fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_benchmark.c

95

r = amdgpu_bo_reserve(sobj, false);

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

103

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

109

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

117

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

132

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

138

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

146

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

158

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

161

if (amdgpu_asic_read_bios_from_rom(adev, &header[0], sizeof(header)) == false)

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

162

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

169

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

177

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

186

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

194

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

203

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

208

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

214

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

279

bool found = false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

283

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

303

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

336

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

341

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

355

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

363

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

386

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

390

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

395

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

408

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

414

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

429

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

437

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

442

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

477

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

480

adev->is_atom_fw = (adev->asic_type >= CHIP_VEGA10) ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

54

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

59

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

65

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

71

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

80

return false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

97

return false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1000

dret = amdgpu_display_ddc_probe(amdgpu_connector, false);

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1002

amdgpu_connector->detected_by_load = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1089

amdgpu_connector->use_digital = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1101

amdgpu_connector->use_digital = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1154

amdgpu_connector->use_digital = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1303

bool found = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1324

return false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1404

false))

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1516

bool shared_ddc = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1517

bool is_dp_bridge = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1518

bool has_aux = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1537

amdgpu_connector->shared_ddc = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1538

shared_ddc = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1644

connector->doublescan_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1662

connector->interlace_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1663

connector->doublescan_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1756

connector->doublescan_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1799

connector->doublescan_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1841

connector->doublescan_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1861

connector->interlace_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1862

connector->doublescan_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1880

connector->interlace_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1881

connector->doublescan_allowed = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

228

connected = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

405

mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

459

mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

488

new_coherent_mode = val ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

572

amdgpu_connector->dac_load_detect = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

762

amdgpu_connector->ddc_bus->has_aux = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

858

bool dret = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

875

dret = amdgpu_display_ddc_probe(amdgpu_connector, false);

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

877

amdgpu_connector->detected_by_load = false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

962

return false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

984

bool dret = false, broken_edid = false;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1281

bool reserved_buffers = false;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1640

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

399

.no_wait_gpu = false,

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

452

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

456

return false;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

505

return false;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

528

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

534

bool binding_userptr = false;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

902

r = amdgpu_vm_bo_update(adev, fpriv->prt_va, false);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

907

fpriv->prt_va->last_pt_update, false);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

916

r = amdgpu_vm_bo_update(adev, bo_va, false);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

921

r = amdgpu_sync_fence(adev, &p->job->sync, f, false);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

938

r = amdgpu_vm_bo_update(adev, bo_va, false);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

943

r = amdgpu_sync_fence(adev, &p->job->sync, f, false);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

956

r = amdgpu_sync_fence(adev, &p->job->sync, vm->last_update, false);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

975

amdgpu_vm_bo_invalidate(adev, bo, false);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

108

pm_pg_lock = use_bank = use_ring = false;

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

213

return amdgpu_debugfs_process_reg_op(false, f, (char __user *)buf, size, pos);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

112

return false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1248

adev->enable_virtual_display = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1508

adev->ip_blocks[i].status.valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1513

adev->ip_blocks[i].status.valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1877

adev->ip_blocks[i].status.hw = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1894

adev->ip_blocks[i].status.hw = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1915

adev->ip_blocks[i].status.sw = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1916

adev->ip_blocks[i].status.valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1925

adev->ip_blocks[i].status.late_initialized = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1930

if (amdgpu_virt_release_full_gpu(adev, false))

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2091

amdgpu_virt_request_full_gpu(adev, false);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2099

amdgpu_virt_release_full_gpu(adev, false);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2334

return false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2349

return false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2375

bool runtime = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2379

adev->shutdown = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2389

adev->accel_working = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2391

adev->fictitious_range_registered = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2460

adev->pm.ac_power = power_supply_is_system_supplied() > 0 ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2750

adev->accel_working = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2752

adev->fictitious_range_registered = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3002

adev->in_suspend = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3020

bool asic_hang = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3101

return false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3198

r = dma_fence_wait_timeout(fence, false, tmo);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3210

tmo = dma_fence_wait_timeout(fence, false, tmo);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3367

return false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3373

return false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3424

r = amdgpu_device_reset_sriov(adev, job ? false : true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

746

return false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

769

adev->has_hw_reset = false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

781

return false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

858

bool is_os_64 = (sizeof(void *) == 8) ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

185

r = amdgpu_bo_reserve(new_abo, false);

sys/dev/drm/amd/amdgpu/amdgpu_display.c

240

if (unlikely(amdgpu_bo_reserve(new_abo, false) != 0)) {

sys/dev/drm/amd/amdgpu/amdgpu_display.c

268

bool active = false;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

299

adev->have_disp_power_ref = false;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

473

return false;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

482

return false;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

57

return false;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

658

return false;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

66

return false;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

838

in_vbl = false;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

239

return false;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

256

return false; /* need special handling */

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

261

return false;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

490

adev->pm.dpm.power_control = false;

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1127

return amdgpu_device_suspend(drm_dev, false, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1135

return amdgpu_device_resume(drm_dev, false, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1151

return amdgpu_device_resume(drm_dev, false, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1168

ret = amdgpu_device_suspend(drm_dev, false, false);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1201

ret = amdgpu_device_resume(drm_dev, false, false);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

927

bool supports_atomic = false;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

213

return false;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

218

return false;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

221

return false;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

228

return false;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

235

return false;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

240

return false;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

244

return false;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

136

bool fb_tiled = false; /* useful for testing */

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

167

ret = amdgpu_bo_reserve(abo, false);

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

422

return false;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

425

return false;

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

162

dma_fence_wait(old, false);

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

239

return false;

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

313

r = dma_fence_wait(fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

431

ring->fence_drv.initialized = false;

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

515

ring->fence_drv.initialized = false;

sys/dev/drm/amd/amdgpu/amdgpu_gart.c

148

r = amdgpu_bo_reserve(adev->gart.bo, false);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

139

r = amdgpu_bo_reserve(abo, false);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

177

r = ttm_eu_reserve_buffers(&ticket, &list, false, &duplicates);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

253

r = amdgpu_bo_reserve(vm->root.base.bo, false);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

291

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

476

r = amdgpu_bo_reserve(robj, false);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

532

r = amdgpu_vm_bo_update(adev, bo_va, false);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

698

r = amdgpu_bo_reserve(robj, false);

sys/dev/drm/amd/amdgpu/amdgpu_gfx.c

158

return false;

sys/dev/drm/amd/amdgpu/amdgpu_gfx.c

409

if (!amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false))

sys/dev/drm/amd/amdgpu/amdgpu_gfx.c

410

adev->gfx.gfx_off_state = false;

sys/dev/drm/amd/amdgpu/amdgpu_ib.c

135

bool need_pipe_sync = false;

sys/dev/drm/amd/amdgpu/amdgpu_ib.c

228

need_ctx_switch = false;

sys/dev/drm/amd/amdgpu/amdgpu_ib.c

232

amdgpu_ring_emit_tmz(ring, false);

sys/dev/drm/amd/amdgpu/amdgpu_ib.c

313

adev->ib_pool_ready = false;

sys/dev/drm/amd/amdgpu/amdgpu_ib.c

380

ring->ready = false;

sys/dev/drm/amd/amdgpu/amdgpu_ib.c

385

adev->accel_working = false;

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

136

1, false);

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

147

dma_fence_wait(fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

163

reservation_object_wait_timeout_rcu(resv, true, false,

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

213

return amdgpu_sync_fence(adev, sync, ring->vmid_wait, false);

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

248

r = amdgpu_sync_fence(adev, sync, &array->base, false);

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

301

r = amdgpu_sync_fence(adev, sync, tmp, false);

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

310

r = amdgpu_sync_fence(ring->adev, &(*id)->active, fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

378

r = amdgpu_sync_fence(ring->adev, &(*id)->active, fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

439

fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

217

return false;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

241

adev->irq.msi_enabled = false;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

276

adev->irq.installed = false;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

303

adev->irq.installed = false;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

576

return false;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

579

return false;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

582

return false;

sys/dev/drm/amd/amdgpu/amdgpu_job.c

180

bool explicit = false;

sys/dev/drm/amd/amdgpu/amdgpu_job.c

187

fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

700

dev_info.max_engine_clock = amdgpu_dpm_get_sclk(adev, false) * 10;

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

701

dev_info.max_memory_clock = amdgpu_dpm_get_mclk(adev, false) * 10;

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

88

amdgpu_virt_request_full_gpu(adev, false);

sys/dev/drm/amd/amdgpu/amdgpu_mn.c

229

true, false, MAX_SCHEDULE_TIMEOUT);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

120

return false;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

1267

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_object.c

243

bool free = false;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

270

r = amdgpu_bo_reserve(*bo_ptr, false);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

416

return false;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

425

.no_wait_gpu = false,

sys/dev/drm/amd/amdgpu/amdgpu_object.c

519

amdgpu_bo_fence(bo, fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

654

direct, false);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

676

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_object.c

721

true, false);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

750

r = reservation_object_wait_timeout_rcu(bo->tbo.resv, false, false,

sys/dev/drm/amd/amdgpu/amdgpu_object.c

855

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_object.c

964

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_object.h

156

r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL);

sys/dev/drm/amd/amdgpu/amdgpu_object.h

207

return false;

sys/dev/drm/amd/amdgpu/amdgpu_object.h

214

return false;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1491

adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, false);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1750

adev->pm.dpm.thermal_active = false;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1764

true : false;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1769

single_display = false;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1896

bool equal = false;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1934

equal = false;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

402

adev->pp_force_state_enabled = false;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

78

adev->pm.ac_power = false;

sys/dev/drm/amd/amdgpu/amdgpu_prime.c

223

false);

sys/dev/drm/amd/amdgpu/amdgpu_prime.c

264

r = amdgpu_bo_reserve(bo, false);

sys/dev/drm/amd/amdgpu/amdgpu_prime.c

362

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_prime.c

372

ret = amdgpu_bo_reserve(bo, false);

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

541

return false;

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

545

return false;

sys/dev/drm/amd/amdgpu/amdgpu_psp.h

177

((psp)->funcs->smu_reload_quirk ? (psp)->funcs->smu_reload_quirk((psp)) : false)

sys/dev/drm/amd/amdgpu/amdgpu_psp.h

179

((psp)->funcs->mode1_reset ? (psp)->funcs->mode1_reset((psp)) : false)

sys/dev/drm/amd/amdgpu/amdgpu_ring.c

341

ring->ready = false;

sys/dev/drm/amd/amdgpu/amdgpu_ring.c

401

return false;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

172

return false;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

203

return false;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

272

return false;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

322

t = dma_fence_wait_any_timeout(fences, count, false,

sys/dev/drm/amd/amdgpu/amdgpu_sync.c

148

return false;

sys/dev/drm/amd/amdgpu/amdgpu_sync.c

208

r = amdgpu_sync_fence(adev, sync, f, false);

sys/dev/drm/amd/amdgpu/amdgpu_sync.c

243

r = amdgpu_sync_fence(adev, sync, f, false);

sys/dev/drm/amd/amdgpu/amdgpu_sync.c

77

return false;

sys/dev/drm/amd/amdgpu/amdgpu_test.c

127

size, NULL, &fence, false, false);

sys/dev/drm/amd/amdgpu/amdgpu_test.c

134

r = dma_fence_wait(fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_test.c

172

size, NULL, &fence, false, false);

sys/dev/drm/amd/amdgpu/amdgpu_test.c

179

r = dma_fence_wait(fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_test.c

76

r = amdgpu_bo_reserve(vram_obj, false);

sys/dev/drm/amd/amdgpu/amdgpu_test.c

98

r = amdgpu_bo_reserve(gtt_obj[i], false);

sys/dev/drm/amd/amdgpu/amdgpu_trace.h

39

trace_amdgpu_vm_bo_mapping_enabled(void) { return false; }

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1114

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

113

adev->mman.mem_global_referenced = false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1406

return false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1413

return false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1422

return false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1454

return false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1467

return false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1547

return false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1565

return false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

158

adev->mman.mem_global_referenced = false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1687

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1715

r = amdgpu_bo_reserve(adev->fw_vram_usage.reserved_bo, false);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1817

amdgpu_ttm_set_buffer_funcs_status(adev, false);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1946

adev->mman.initialized = false;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2116

false);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2200

AMDGPU_FENCE_OWNER_UNDEFINED, false);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

472

resv, &next, false, true);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

549

dma_fence_wait(fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

756

mem->bus.is_iomem = false;

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

267

return false;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1035

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1075

true, false,

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1087

AMDGPU_FENCE_OWNER_UNDEFINED, false);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1097

amdgpu_bo_fence(bo, f, false);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1193

amdgpu_dpm_enable_uvd(adev, false);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1260

r = dma_fence_wait_timeout(fence, false, timeout);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

430

r = amdgpu_uvd_get_destroy_msg(ring, handle, false,

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

437

dma_fence_wait(fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

477

struct ttm_operation_ctx tctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1135

r = dma_fence_wait_timeout(fence, false, timeout);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

293

r = amdgpu_bo_reserve(adev->vce.vcpu_bo, false);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

336

amdgpu_dpm_enable_vce(adev, false);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

412

r = amdgpu_vce_get_destroy_msg(ring, handle, false, NULL);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

579

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

374

amdgpu_dpm_enable_uvd(adev, false);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

389

amdgpu_gfx_off_ctrl(adev, false);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

498

amdgpu_bo_fence(bo, f, false);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

594

r = dma_fence_wait_timeout(fence, false, timeout);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

768

r = dma_fence_wait_timeout(fence, false, timeout);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

876

r = dma_fence_wait_timeout(fence, false, timeout);

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

276

return false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1065

has_compute_vm_bug = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1084

ring->has_compute_vm_bug = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1108

return false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

126

rb_insert_color_cached(&node->rb, root, false);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1402

amdgpu_sync_resv(adev, &sync, vm->root.base.bo->tbo.resv, owner, false);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1552

AMDGPU_FENCE_OWNER_VM, false);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1702

cursor.entry->huge = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1902

r = amdgpu_sync_fence(adev, &job->sync, exclusive, false);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1907

owner, false);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2109

bo_va->base.moved = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2231

dma_fence_wait(fence, false);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2283

reservation_object_wait_timeout_rcu(resv, true, false,

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2377

r = amdgpu_vm_bo_update(adev, bo_va, false);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2391

clear = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2633

valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2831

vm->bulk_moveable = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3072

vm->pte_support_ats = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3338

prt_fini_needed = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3387

return false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

348

vm_bo->moved = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

408

vm->bulk_moveable = false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

490

return false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

520

return false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

527

return false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

547

return false;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

816

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

880

AMDGPU_FENCE_OWNER_UNDEFINED, false);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

951

bool ats = false;

sys/dev/drm/amd/amdgpu/atom.c

1220

ectx.abort = false;

sys/dev/drm/amd/amdgpu/atom.c

1393

return false;

sys/dev/drm/amd/amdgpu/atom.c

1413

return false;

sys/dev/drm/amd/amdgpu/atombios_crtc.c

570

return false;

sys/dev/drm/amd/amdgpu/atombios_crtc.c

758

amdgpu_crtc->ss_enabled = false;

sys/dev/drm/amd/amdgpu/atombios_dp.c

114

amdgpu_atombios_copy_swap(recv, base + 16, recv_bytes, false);

sys/dev/drm/amd/amdgpu/atombios_dp.c

453

return false;

sys/dev/drm/amd/amdgpu/atombios_dp.c

455

return false;

sys/dev/drm/amd/amdgpu/atombios_dp.c

602

clock_recovery = false;

sys/dev/drm/amd/amdgpu/atombios_dp.c

669

channel_eq = false;

sys/dev/drm/amd/amdgpu/atombios_dp.c

740

dp_info.tp3_supported = false;

sys/dev/drm/amd/amdgpu/atombios_dp.c

742

dp_info.tp3_supported = false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

1281

return false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

1470

amdgpu_dig_connector->edp_on = false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

1788

return false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

1816

return false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

2138

lvds->linkb = false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

2144

bool bad_record = false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

2224

dig->linkb = false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

350

return false;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

842

bool is_dp = false;

sys/dev/drm/amd/amdgpu/atombios_i2c.c

104

amdgpu_atombios_copy_swap(buf, base, num, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1082

pi->fan_ctrl_is_in_default_mode = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1106

adev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1114

adev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1167

adev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1209

pi->fan_is_controlled_by_smc = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1542

want_thermal_protection = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1761

ret = ci_enable_sclk_mclk_dpm(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1899

return ci_enable_sclk_mclk_dpm(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2472

bool voltage_found = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2641

patch = ((tmp & 0x0000f00) == 0x300) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2805

table->UvdLevel[count].VclkFrequency, false, &dividers);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2813

table->UvdLevel[count].DclkFrequency, false, &dividers);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2846

table->VceLevel[count].Frequency, false, &dividers);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2879

table->AcpLevel[count].Frequency, false, &dividers);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2911

table->SamuLevel[count].Frequency, false, &dividers);

sys/dev/drm/amd/amdgpu/ci_dpm.c

3063

memory_level->StutterEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3064

memory_level->StrobeEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3065

memory_level->EdcReadEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3066

memory_level->EdcWriteEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3067

memory_level->RttEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3096

dll_state_on = ((RREG32(mmMC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3098

dll_state_on = ((RREG32(mmMC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3104

dll_state_on = ((RREG32(mmMC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3156

table->ACPILevel.SclkFrequency, false, &dividers);

sys/dev/drm/amd/amdgpu/ci_dpm.c

3239

table->MemoryACPILevel.StutterEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3240

table->MemoryACPILevel.StrobeEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3241

table->MemoryACPILevel.EdcReadEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3242

table->MemoryACPILevel.EdcWriteEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3243

table->MemoryACPILevel.RttEnable = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3276

pi->ulv.supported = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3320

engine_clock, false, &dividers);

sys/dev/drm/amd/amdgpu/ci_dpm.c

3523

dpm_table->dpm_levels[i].enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3628

(i == 0) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3641

(i == 0) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

376

pi->caps_cac = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

377

pi->caps_sq_ramping = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

378

pi->caps_db_ramping = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

379

pi->caps_td_ramping = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

380

pi->caps_tcp_ramping = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

385

pi->enable_bapm_feature = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3857

dpm_table->dpm_levels[i].enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3876

pcie_table->dpm_levels[i].enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3887

pcie_table->dpm_levels[j].enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4111

pi->uvd_enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4242

ret = ci_enable_uvd_dpm(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4283

ret = ci_enable_vce_dpm(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4622

result = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4691

patch = ((tmp & 0x0000f00) == 0x300) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5012

pi->pspp_notify_required = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5017

if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN3, false) == 0)

sys/dev/drm/amd/amdgpu/ci_dpm.c

5023

if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)

sys/dev/drm/amd/amdgpu/ci_dpm.c

5058

amdgpu_acpi_pcie_performance_request(adev, request, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5311

pi->caps_dynamic_ac_timing = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5359

ret = ci_notify_smc_display_change(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5435

ci_enable_thermal_protection(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5436

ci_enable_power_containment(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5437

ci_enable_smc_cac(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5438

ci_enable_didt(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5439

ci_enable_spread_spectrum(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5440

ci_enable_auto_throttle_source(adev, AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5442

ci_enable_ds_master_switch(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5443

ci_enable_ulv(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5448

ci_enable_thermal_based_sclk_dpm(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5887

pi->dll_default_on = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5909

pi->caps_sclk_ds = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5918

pi->caps_fps = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5920

pi->caps_sclk_throttle_low_notification = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5966

pi->uvd_enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6049

pi->pcie_performance_request = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6058

pi->caps_sclk_ss_support = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6059

pi->caps_mclk_ss_support = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6066

pi->thermal_protection = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6158

*equal = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6164

*equal = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6171

*equal = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6231

ret = ci_thermal_enable_alert(adev, false);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6363

adev->pm.dpm_enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6419

adev->pm.dpm_enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6500

bool queue_thermal = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6508

adev->pm.dpm.thermal.high_to_low = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

833

pi->cac_enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

839

pi->cac_enabled = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

873

bool adjust_polarity = false; /* ??? */

sys/dev/drm/amd/amdgpu/ci_dpm.c

921

return false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

947

disable_mclk_switching = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

952

pi->battery_state = false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

959

if (adev->pm.ac_power == false) {

sys/dev/drm/amd/amdgpu/ci_smc.c

166

return false;

sys/dev/drm/amd/amdgpu/cik.c

1020

{mmGB_BACKEND_MAP, false},

sys/dev/drm/amd/amdgpu/cik.c

1288

amdgpu_atombios_scratch_regs_engine_hung(adev, false);

sys/dev/drm/amd/amdgpu/cik.c

1307

clock, false, &dividers);

sys/dev/drm/amd/amdgpu/cik.c

1348

ecclk, false, &dividers);

sys/dev/drm/amd/amdgpu/cik.c

1543

bool disable_l0s = false, disable_l1 = false, disable_plloff_in_l1 = false;

sys/dev/drm/amd/amdgpu/cik.c

1544

bool disable_clkreq = false;

sys/dev/drm/amd/amdgpu/cik.c

1633

clk_req_support = false;

sys/dev/drm/amd/amdgpu/cik.c

1638

clk_req_support = false;

sys/dev/drm/amd/amdgpu/cik.c

943

return false;

sys/dev/drm/amd/amdgpu/cik.c

945

return false;

sys/dev/drm/amd/amdgpu/cik.c

948

return false;

sys/dev/drm/amd/amdgpu/cik_ih.c

256

return false;

sys/dev/drm/amd/amdgpu/cik_ih.c

321

r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false);

sys/dev/drm/amd/amdgpu/cik_ih.c

382

return false;

sys/dev/drm/amd/amdgpu/cik_ih.c

89

adev->irq.ih.enabled = false;

sys/dev/drm/amd/amdgpu/cik_sdma.c

1034

cik_ctx_switch_enable(adev, false);

sys/dev/drm/amd/amdgpu/cik_sdma.c

1035

cik_sdma_enable(adev, false);

sys/dev/drm/amd/amdgpu/cik_sdma.c

1063

return false;

sys/dev/drm/amd/amdgpu/cik_sdma.c

1225

bool gate = false;

sys/dev/drm/amd/amdgpu/cik_sdma.c

1264

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/cik_sdma.c

311

amdgpu_ttm_set_buffer_funcs_status(adev, false);

sys/dev/drm/amd/amdgpu/cik_sdma.c

319

sdma0->ready = false;

sys/dev/drm/amd/amdgpu/cik_sdma.c

320

sdma1->ready = false;

sys/dev/drm/amd/amdgpu/cik_sdma.c

506

ring->ready = false;

sys/dev/drm/amd/amdgpu/cik_sdma.c

547

cik_sdma_enable(adev, false);

sys/dev/drm/amd/amdgpu/cik_sdma.c

587

cik_sdma_enable(adev, false);

sys/dev/drm/amd/amdgpu/cik_sdma.c

707

r = dma_fence_wait_timeout(f, false, timeout);

sys/dev/drm/amd/amdgpu/cz_ih.c

235

return false;

sys/dev/drm/amd/amdgpu/cz_ih.c

300

r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false);

sys/dev/drm/amd/amdgpu/cz_ih.c

361

return false;

sys/dev/drm/amd/amdgpu/cz_ih.c

89

adev->irq.ih.enabled = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1034

amdgpu_dpm_get_mclk(adev, false) * 10;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1036

amdgpu_dpm_get_sclk(adev, false) * 10;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1046

wm_high.interlaced = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1085

wm_low.interlaced = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1177

adev->mode_info.audio.pin[i].connected = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1428

adev->mode_info.audio.pin[i].connected = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1433

dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1450

dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1452

adev->mode_info.audio.enabled = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1572

dce_v10_0_audio_enable(adev, dig->afmt->pin, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1685

err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1741

dce_v10_0_audio_enable(adev, dig->afmt->pin, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1838

bool bypass_lut = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1857

r = amdgpu_bo_reserve(abo, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1991

dce_v10_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2342

dce_v10_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2380

ret = amdgpu_bo_reserve(aobj, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2415

dce_v10_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2444

dce_v10_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2487

dce_v10_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2503

dce_v10_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2506

amdgpu_crtc->enabled = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2550

dce_v10_0_grph_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2572

0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2625

return false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2628

return false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2630

return false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2636

return false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

277

bool connected = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2824

adev->mode_info.mode_config_initialized = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2837

dce_v10_0_set_vga_render_state(adev, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2846

dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2862

dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3362

amdgpu_atombios_scratch_regs_lock(adev, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3374

dce_v10_0_afmt_enable(encoder, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3501

amdgpu_encoder->is_ext_encoder = false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

423

return false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

474

dce_v10_0_set_vga_render_state(adev, false);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

944

return false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

964

return false;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

999

return false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1025

return false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1060

amdgpu_dpm_get_mclk(adev, false) * 10;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1062

amdgpu_dpm_get_sclk(adev, false) * 10;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1072

wm_high.interlaced = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1111

wm_low.interlaced = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1203

adev->mode_info.audio.pin[i].connected = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1470

adev->mode_info.audio.pin[i].connected = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1475

dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1492

dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1494

adev->mode_info.audio.enabled = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1614

dce_v11_0_audio_enable(adev, dig->afmt->pin, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1727

err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1783

dce_v11_0_audio_enable(adev, dig->afmt->pin, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1880

bool bypass_lut = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1899

r = amdgpu_bo_reserve(abo, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2033

dce_v11_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2421

dce_v11_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2459

ret = amdgpu_bo_reserve(aobj, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2494

dce_v11_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2523

dce_v11_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2566

dce_v11_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2582

dce_v11_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2585

amdgpu_crtc->enabled = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2629

dce_v11_0_grph_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2651

0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2661

0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2733

return false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2736

return false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2738

return false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2744

return false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2946

adev->mode_info.mode_config_initialized = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

295

bool connected = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2959

dce_v11_0_set_vga_render_state(adev, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2979

dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2995

dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3488

amdgpu_atombios_scratch_regs_lock(adev, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3500

dce_v11_0_afmt_enable(encoder, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3633

amdgpu_encoder->is_ext_encoder = false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

439

return false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

500

dce_v11_0_set_vga_render_state(adev, false);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

970

return false;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

990

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1020

wm_low.interlaced = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1114

adev->mode_info.audio.pin[i].connected = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1391

adev->mode_info.audio.pin[i].connected = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1396

dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1413

dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1415

adev->mode_info.audio.enabled = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1521

dce_v8_0_audio_enable(adev, dig->afmt->pin, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1619

err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1670

dce_v8_0_audio_enable(adev, dig->afmt->pin, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1767

bool bypass_lut = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1786

r = amdgpu_bo_reserve(abo, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1906

dce_v8_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

222

bool connected = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2243

dce_v8_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2281

ret = amdgpu_bo_reserve(aobj, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2316

dce_v8_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2345

dce_v8_0_lock_cursor(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2388

dce_v8_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2404

dce_v8_0_vga_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2407

amdgpu_crtc->enabled = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2451

dce_v8_0_grph_enable(crtc, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2472

0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2480

0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2533

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2536

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2538

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2544

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2721

adev->mode_info.mode_config_initialized = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2732

dce_v8_0_set_vga_render_state(adev, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2741

dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2757

dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3250

amdgpu_atombios_scratch_regs_lock(adev, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3262

dce_v8_0_afmt_enable(encoder, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3389

amdgpu_encoder->is_ext_encoder = false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

356

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

414

dce_v8_0_set_vga_render_state(adev, false);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

879

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

899

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

934

return false;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

969

amdgpu_dpm_get_mclk(adev, false) * 10;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

971

amdgpu_dpm_get_sclk(adev, false) * 10;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

981

wm_high.interlaced = false;

sys/dev/drm/amd/amdgpu/dce_virtual.c

149

amdgpu_crtc->enabled = false;

sys/dev/drm/amd/amdgpu/dce_virtual.c

317

mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);

sys/dev/drm/amd/amdgpu/dce_virtual.c

425

adev->mode_info.mode_config_initialized = false;

sys/dev/drm/amd/amdgpu/dce_virtual.c

626

connector->interlace_allowed = false;

sys/dev/drm/amd/amdgpu/dce_virtual.c

627

connector->doublescan_allowed = false;

sys/dev/drm/amd/amdgpu/df_v1_7.c

91

adev->df_funcs->enable_broadcast_mode(adev, false);

sys/dev/drm/amd/amdgpu/df_v3_6.c

94

adev->df_funcs->enable_broadcast_mode(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2339

r = dma_fence_wait_timeout(f, false, timeout);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2406

adev->gfx.gfx_ring[i].ready = false;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2444

gfx_v7_0_cp_gfx_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2619

ring->ready = false;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2678

adev->gfx.compute_ring[i].ready = false;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2706

gfx_v7_0_cp_compute_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3113

ring->ready = false;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3157

gfx_v7_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3491

gfx_v7_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3581

gfx_v7_0_enable_lbpw(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3619

gfx_v7_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3722

gfx_v7_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3728

gfx_v7_0_enable_cgcg(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3729

gfx_v7_0_enable_mgcg(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4140

gfx_v7_0_update_gfx_pg(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4142

gfx_v7_0_enable_cp_pg(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4143

gfx_v7_0_enable_gds_pg(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4648

gfx_v7_0_cp_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4674

return false;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4731

gfx_v7_0_update_cg(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4985

bool gate = false;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4991

gfx_v7_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4997

gfx_v7_0_enable_cgcg(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4998

gfx_v7_0_enable_mgcg(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5008

bool gate = false;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5051

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5083

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1076

adev->virt.chained_ib_support = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1754

r = dma_fence_wait(f, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3990

new_entry = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4152

gfx_v8_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4200

adev->gfx.gfx_ring[i].ready = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4385

ring->ready = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4399

adev->gfx.compute_ring[i].ready = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4400

adev->gfx.kiq.ring.ready = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4479

kiq_ring->ready = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4774

r = amdgpu_bo_reserve(ring->mqd_obj, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4800

r = amdgpu_bo_reserve(ring->mqd_obj, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4828

ring->ready = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4840

gfx_v8_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4917

return false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4927

return false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4980

gfx_v8_0_cp_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5059

return false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5081

gfx_v8_0_cp_gfx_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5099

gfx_v8_0_cp_compute_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5432

cz_enable_gfx_cg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5433

cz_enable_gfx_pipeline_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5459

cz_enable_sck_slow_down_on_power_up(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5460

cz_enable_sck_slow_down_on_power_down(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5465

cz_enable_cp_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5472

gfx_v8_0_enable_gfx_static_mg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5477

gfx_v8_0_enable_gfx_dynamic_mg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5485

gfx_v8_0_enable_gfx_static_mg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5490

gfx_v8_0_enable_gfx_dynamic_mg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5495

polaris11_enable_gfx_quick_mg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5646

adev->gfx.rlc.in_safe_mode = false;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5818

gfx_v8_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6894

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6939

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6969

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

913

r = dma_fence_wait_timeout(f, false, timeout);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1214

r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1522

adev->gfx.ngg.init = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1643

gfx_v9_0_write_data_to_reg(ring, 0, false,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1659

gfx_v9_0_write_data_to_reg(ring, 0, false,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2425

gfx_v9_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2524

gfx_v9_0_enable_lbpw(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2542

adev->gfx.gfx_ring[i].ready = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2570

gfx_v9_0_cp_gfx_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2747

adev->gfx.compute_ring[i].ready = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2748

adev->gfx.kiq.ring.ready = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2763

gfx_v9_0_cp_compute_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2874

kiq_ring->ready = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3242

r = amdgpu_bo_reserve(ring->mqd_obj, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3268

r = amdgpu_bo_reserve(ring->mqd_obj, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3293

gfx_v9_0_enable_gui_idle_interrupt(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3321

ring->ready = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3331

ring->ready = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3414

gfx_v9_0_cp_gfx_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3437

gfx_v9_0_cp_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3461

return false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3516

gfx_v9_0_cp_gfx_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3519

gfx_v9_0_cp_compute_enable(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3562

gfx_v9_0_write_data_to_reg(ring, 0, false,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3567

gfx_v9_0_write_data_to_reg(ring, 0, false,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3572

gfx_v9_0_write_data_to_reg(ring, 0, false,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3577

gfx_v9_0_write_data_to_reg(ring, 0, false,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3662

adev->gfx.rlc.in_safe_mode = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3676

gfx_v9_0_enable_gfx_cg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3677

gfx_v9_0_enable_gfx_pipeline_powergating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3692

gfx_v9_0_enable_gfx_static_mg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3697

gfx_v9_0_enable_gfx_dynamic_mg_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3903

bool enable = (state == AMD_PG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3908

amdgpu_gfx_off_ctrl(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3915

gfx_v9_0_enable_sck_slow_down_on_power_up(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3916

gfx_v9_0_enable_sck_slow_down_on_power_down(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3922

gfx_v9_0_enable_cp_power_gating(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3935

amdgpu_gfx_off_ctrl(adev, false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3962

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

470

r = dma_fence_wait_timeout(f, false, timeout);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

539

adev->gfx.me_fw_write_wait = false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

540

adev->gfx.mec_fw_write_wait = false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1019

adev->need_dma32 = false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1040

adev->need_swiotlb = false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1172

return false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1301

gmc_v7_0_set_fault_enable_default(adev, false);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1329

info->prot_valid = protections & 0x7 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1330

info->prot_read = protections & 0x8 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1331

info->prot_write = protections & 0x10 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1332

info->prot_exec = protections & 0x20 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1343

bool gate = false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

691

gmc_v7_0_set_fault_enable_default(adev, false);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1145

adev->need_dma32 = false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1166

adev->need_swiotlb = false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1306

return false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1354

return false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1480

gmc_v8_0_set_fault_enable_default(adev, false);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1513

info->prot_valid = protections & 0x7 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1514

info->prot_read = protections & 0x8 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1515

info->prot_write = protections & 0x10 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1516

info->prot_exec = protections & 0x20 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

941

gmc_v8_0_set_fault_enable_default(adev, false);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1003

adev->need_swiotlb = false;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1130

value = false;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

716

return false;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

759

adev->df_funcs->enable_ecc_force_par_wr_rmw(adev, false);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

982

adev->need_dma32 = false;

sys/dev/drm/amd/amdgpu/iceland_ih.c

235

return false;

sys/dev/drm/amd/amdgpu/iceland_ih.c

300

r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false);

sys/dev/drm/amd/amdgpu/iceland_ih.c

361

return false;

sys/dev/drm/amd/amdgpu/iceland_ih.c

89

adev->irq.ih.enabled = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1061

table->entries[i].clk, false, &dividers);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1120

table->entries[i].clk, false, &dividers);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1349

ret = amdgpu_kv_smc_bapm_enable(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1380

amdgpu_kv_smc_bapm_enable(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1383

kv_enable_nb_dpm(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1386

kv_dpm_powergate_acp(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1387

kv_dpm_powergate_samu(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1393

kv_enable_smc_cac(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1394

kv_enable_didt(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1397

kv_enable_ulv(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1463

pi->uvd_power_gated = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1464

pi->vce_power_gated = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1465

pi->samu_power_gated = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1466

pi->acp_power_gated = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1574

kv_enable_vce_dpm(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1715

kv_enable_vce_dpm(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1745

kv_update_samu_dpm(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1768

kv_update_acp_dpm(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1873

pi->nb_dpm_enabled = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1980

kv_freeze_sclk_dpm(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2029

kv_freeze_sclk_dpm(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2296

pi->battery_state = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2461

kv_dpm_power_level_enable(adev, i, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2597

pi->sys_info.nb_dpm_enable = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2819

pi->enable_didt = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2830

pi->caps_sclk_ds = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2833

pi->disable_nb_ps3_in_battery = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2835

pi->bapm_enable = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2839

pi->caps_sclk_throttle_low_notification = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2840

pi->caps_fps = false; /* true? */

sys/dev/drm/amd/amdgpu/kv_dpm.c

2841

pi->caps_uvd_pg = (adev->pg_flags & AMD_PG_SUPPORT_UVD) ? true : false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2843

pi->caps_vce_pg = (adev->pg_flags & AMD_PG_SUPPORT_VCE) ? true : false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2844

pi->caps_samu_pg = (adev->pg_flags & AMD_PG_SUPPORT_SAMU) ? true : false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2845

pi->caps_acp_pg = (adev->pg_flags & AMD_PG_SUPPORT_ACP) ? true : false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2846

pi->caps_stable_p_state = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3066

adev->pm.dpm_enabled = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3113

adev->pm.dpm_enabled = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3191

bool queue_thermal = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3199

adev->pm.dpm.thermal.high_to_low = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3257

*equal = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3262

*equal = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3269

*equal = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

571

pi->cac_enabled = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

576

pi->cac_enabled = false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

670

sclk, false, &dividers);

sys/dev/drm/amd/amdgpu/kv_dpm.c

738

amdgpu_kv_smc_dpm_enable(adev, false);

sys/dev/drm/amd/amdgpu/kv_dpm.c

930

table->entries[i].vclk, false, &dividers);

sys/dev/drm/amd/amdgpu/kv_dpm.c

936

table->entries[i].dclk, false, &dividers);

sys/dev/drm/amd/amdgpu/kv_dpm.c

998

table->entries[i].evclk, false, &dividers);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

533

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

535

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

537

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

539

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/mxgpu_ai.c

129

xgpu_ai_mailbox_set_valid(adev, false);

sys/dev/drm/amd/amdgpu/mxgpu_ai.c

157

xgpu_ai_mailbox_set_valid(adev, false);

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

442

xgpu_vi_mailbox_set_valid(adev, false);

sys/dev/drm/amd/amdgpu/psp_v10_0.c

232

0x80000000, 0x8000FFFF, false);

sys/dev/drm/amd/amdgpu/psp_v10_0.c

256

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v10_0.c

429

return false;

sys/dev/drm/amd/amdgpu/psp_v10_0.c

439

return false;

sys/dev/drm/amd/amdgpu/psp_v11_0.c

161

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

181

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

202

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

300

0x80000000, 0x8000FFFF, false);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

319

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

494

return false;

sys/dev/drm/amd/amdgpu/psp_v11_0.c

504

return false;

sys/dev/drm/amd/amdgpu/psp_v11_0.c

522

ret = psp_wait_for(psp, offset, 0x80000000, 0x8000FFFF, false);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

536

ret = psp_wait_for(psp, offset, 0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

188

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

208

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

229

return false;

sys/dev/drm/amd/amdgpu/psp_v3_1.c

248

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

350

0x80000000, 0x8000FFFF, false);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

374

0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

549

return false;

sys/dev/drm/amd/amdgpu/psp_v3_1.c

559

return false;

sys/dev/drm/amd/amdgpu/psp_v3_1.c

577

return (reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) ? true : false;

sys/dev/drm/amd/amdgpu/psp_v3_1.c

588

ret = psp_wait_for(psp, offset, 0x80000000, 0x8000FFFF, false);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

602

ret = psp_wait_for(psp, offset, 0x80000000, 0x80000000, false);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

1147

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

342

amdgpu_ttm_set_buffer_funcs_status(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

352

sdma0->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

353

sdma1->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

482

ring->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

521

sdma_v2_4_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

645

r = dma_fence_wait_timeout(f, false, timeout);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

885

ring->use_doorbell = false;

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

929

sdma_v2_4_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

955

return false;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1214

sdma_v3_0_ctx_switch_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1215

sdma_v3_0_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1241

return false;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1280

return false;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1296

sdma_v3_0_ctx_switch_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1297

sdma_v3_0_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1586

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

516

amdgpu_ttm_set_buffer_funcs_status(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

526

sdma0->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

527

sdma1->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

754

ring->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

792

sdma_v3_0_ctx_switch_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

793

sdma_v3_0_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

917

r = dma_fence_wait_timeout(f, false, timeout);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1089

r = dma_fence_wait_timeout(f, false, timeout);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1371

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1387

sdma_v4_0_ctx_switch_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1388

sdma_v4_0_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1420

return false;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1637

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1639

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1655

state == AMD_PG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

569

amdgpu_ttm_set_buffer_funcs_status(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

580

sdma0->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

581

sdma1->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

663

if (enable == false) {

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

806

ring->ready = false;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

912

sdma_v4_0_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

950

sdma_v4_0_ctx_switch_enable(adev, false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

951

sdma_v4_0_enable(adev, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

1137

false

sys/dev/drm/amd/amdgpu/si_dpm.c

1695

false

sys/dev/drm/amd/amdgpu/si_dpm.c

1982

bool update_dte_from_pl2 = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2147

ni_pi->enable_power_containment = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2148

ni_pi->enable_cac = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2149

ni_pi->enable_sq_ramping = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2150

si_pi->enable_dte = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2174

ni_pi->support_cac_long_term_average = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2179

si_pi->dyn_powertune_data.disable_uvd_powertune = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2266

false, /* ??? */

sys/dev/drm/amd/amdgpu/si_dpm.c

2373

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2402

if (ni_pi->enable_power_containment == false)

sys/dev/drm/amd/amdgpu/si_dpm.c

2496

enable_sq_ramping = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2499

enable_sq_ramping = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2502

enable_sq_ramping = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2505

enable_sq_ramping = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2508

enable_sq_ramping = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2547

ni_pi->pc_enabled = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2556

ni_pi->pc_enabled = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2574

si_pi->enable_dte = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2576

if (si_pi->enable_dte == false)

sys/dev/drm/amd/amdgpu/si_dpm.c

2584

si_pi->enable_dte = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2760

if (ni_pi->enable_cac == false)

sys/dev/drm/amd/amdgpu/si_dpm.c

2826

ni_pi->enable_cac = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2827

ni_pi->enable_power_containment = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2880

if ((ni_pi->enable_cac == false) ||

sys/dev/drm/amd/amdgpu/si_dpm.c

2881

(ni_pi->cac_configuration_required == false))

sys/dev/drm/amd/amdgpu/si_dpm.c

2912

ni_pi->support_cac_long_term_average = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2918

ni_pi->cac_enabled = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

2935

ni_pi->cac_enabled = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3008

ni_pi->enable_power_containment = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3075

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3389

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3421

pi->dynamic_ss = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

343

false

sys/dev/drm/amd/amdgpu/si_dpm.c

3430

bool disable_mclk_switching = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3431

bool disable_sclk_switching = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3492

if (adev->pm.ac_power == false) {

sys/dev/drm/amd/amdgpu/si_dpm.c

3636

ps->dc_compatible = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3664

bool ret = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3745

want_thermal_protection = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

3933

amdgpu_si_smc_clock(adev, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

4327

bool strobe_mode = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4349

amdgpu_si_smc_clock(adev, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

4361

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4368

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4373

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4376

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4470

pi->mvdd_control = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4475

pi->mvdd_control = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4489

si_pi->vddc_phase_shed_control = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4493

si_pi->vddc_phase_shed_control = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4564

si_pi->vddc_phase_shed_control = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

4614

bool voltage_found = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5263

engine_clock, false, &dividers);

sys/dev/drm/amd/amdgpu/si_dpm.c

5448

bool gmc_pg = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5485

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5487

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5489

dll_state_on = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5495

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5617

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5626

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5631

return false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5672

eg_pi->uvd_enabled = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5721

ni_pi->enable_power_containment = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5725

ni_pi->enable_sq_ramping = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5927

result = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

6209

si_pi->pspp_notify_required = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

6214

if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN3, false) == 0)

sys/dev/drm/amd/amdgpu/si_dpm.c

6220

if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)

sys/dev/drm/amd/amdgpu/si_dpm.c

6254

amdgpu_acpi_pcie_performance_request(adev, request, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

645

false

sys/dev/drm/amd/amdgpu/si_dpm.c

6450

si_pi->fan_ctrl_is_in_default_mode = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

6474

adev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

6481

adev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

6525

adev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

6553

si_pi->fan_is_controlled_by_smc = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

6802

eg_pi->dynamic_ac_timing = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

6880

ret = si_notify_smc_display_change(adev, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

6898

ret = si_thermal_enable_alert(adev, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

6922

si_enable_thermal_protection(adev, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

6923

si_enable_power_containment(adev, boot_ps, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

6924

si_enable_smc_cac(adev, boot_ps, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

6925

si_enable_spread_spectrum(adev, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

6926

si_enable_auto_throttle_source(adev, AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

6995

ret = si_enable_power_containment(adev, new_ps, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

7000

ret = si_enable_smc_cac(adev, new_ps, false);

sys/dev/drm/amd/amdgpu/si_dpm.c

7171

si_pi->ulv.supported = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7173

si_pi->ulv.one_pcie_lane_in_ulv = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7371

0, false, &dividers);

sys/dev/drm/amd/amdgpu/si_dpm.c

7377

eg_pi->smu_uvd_hs = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7426

si_pi->sclk_deep_sleep_above_low = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7431

pi->thermal_protection = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7440

eg_pi->pcie_performance_request = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7553

bool queue_thermal = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7561

adev->pm.dpm.thermal.high_to_low = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7761

adev->pm.dpm_enabled = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7808

adev->pm.dpm_enabled = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7956

*equal = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7961

*equal = false;

sys/dev/drm/amd/amdgpu/si_dpm.c

7968

*equal = false;

sys/dev/drm/amd/amdgpu/soc15.c

1003

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1005

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1007

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1009

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1011

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1013

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

239

return false;

sys/dev/drm/amd/amdgpu/soc15.c

249

return false;

sys/dev/drm/amd/amdgpu/soc15.c

251

return false;

sys/dev/drm/amd/amdgpu/soc15.c

254

return false;

sys/dev/drm/amd/amdgpu/soc15.c

415

amdgpu_atombios_scratch_regs_engine_hung(adev, false);

sys/dev/drm/amd/amdgpu/soc15.c

843

soc15_enable_doorbell_aperture(adev, false);

sys/dev/drm/amd/amdgpu/soc15.c

987

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

989

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

991

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

993

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

995

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

997

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

999

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/tonga_ih.c

246

return false;

sys/dev/drm/amd/amdgpu/tonga_ih.c

384

return false;

sys/dev/drm/amd/amdgpu/tonga_ih.c

420

return false;

sys/dev/drm/amd/amdgpu/tonga_ih.c

85

adev->irq.ih.enabled = false;

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

168

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

221

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

438

uvd_v4_2_set_dcm(adev, false);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

752

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

164

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

218

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

775

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

786

uvd_v5_0_enable_clock_gating(adev, false);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

861

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1157

return false;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1239

int_handled = false;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1245

int_handled = false;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1249

if (false == int_handled)

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1432

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1443

uvd_v6_0_enable_clock_gating(adev, false);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1526

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1551

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1579

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

350

r = dma_fence_wait_timeout(fence, false, timeout);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

482

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

519

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

551

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1478

return false;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1703

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1781

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1813

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

357

r = dma_fence_wait_timeout(fence, false, timeout);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

546

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

588

ring->ready = false;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

622

adev->uvd.inst[i].ring.ready = false;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

395

vce_v2_0_set_sw_cg(adev, false);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

397

vce_v2_0_set_dyn_cg(adev, false);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

465

vce_v2_0_enable_mgcg(adev, true, false);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

467

adev->vce.ring[i].ready = false;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

557

bool gate = false;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

558

bool sw_cg = false;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

611

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/vce_v3_0.c

233

vce_v3_0_override_vce_clock_gating(adev, false);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

478

adev->vce.ring[i].ready = false;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

647

return false;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

748

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

898

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/vce_v3_0.c

921

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1072

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/vce_v4_0.c

523

adev->vce.ring[i].ready = false;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

552

adev->vce.ring[i].ready = false;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

732

return false;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

870

vce_v4_0_override_vce_clock_gating(adev, false);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

889

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1228

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

183

ring->ready = false;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

192

ring->ready = false;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

201

ring->ready = false;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

2047

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

2080

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

2111

.support_64bit_ptrs = false,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

228

ring->ready = false;

sys/dev/drm/amd/amdgpu/vega10_ih.c

309

return false;

sys/dev/drm/amd/amdgpu/vega10_ih.c

72

adev->irq.ih.enabled = false;

sys/dev/drm/amd/amdgpu/vi.c

1235

vi_enable_doorbell_aperture(adev, false);

sys/dev/drm/amd/amdgpu/vi.c

427

return false;

sys/dev/drm/amd/amdgpu/vi.c

429

return false;

sys/dev/drm/amd/amdgpu/vi.c

432

return false;

sys/dev/drm/amd/amdgpu/vi.c

545

{mmGB_BACKEND_MAP, false},

sys/dev/drm/amd/amdgpu/vi.c

708

amdgpu_atombios_scratch_regs_engine_hung(adev, false);

sys/dev/drm/amd/amdgpu/vi.c

727

clock, false, &dividers);

sys/dev/drm/amd/amdgpu/vi.c

813

ecclk, false, &dividers);

sys/dev/drm/amd/amdgpu/vi.c

931

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1086

aconnector->fake_enable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1121

bool new_irq_handled = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1185

new_irq_handled = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1222

aconnector->fake_enable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1235

aconnector->fake_enable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1934

dm->dc->debug.disable_stutter = amdgpu_pp_feature_mask & PP_STUTTER_MODE ? false : true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1978

bool enable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2184

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2187

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2195

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2219

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2223

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2229

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2234

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2264

int r = amdgpu_bo_reserve(rbo, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

231

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2863

bool native_mode_found = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2913

dm_state ? (dm_state->scaling != RMX_OFF) : false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3025

dm_set_vblank(crtc, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3204

state->underscan_enable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3263

aconnector->base.override_edid = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3509

r = amdgpu_bo_reserve(rbo, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3574

r = amdgpu_bo_reserve(rbo, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3728

acrtc->base.enabled = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3857

bool mode_existed = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3935

aconnector->base.interlace_allowed = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3936

aconnector->base.doublescan_allowed = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3937

aconnector->base.stereo_allowed = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3950

link->link_enc->features.ycbcr420_supported ? true : false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3955

link->link_enc->features.ycbcr420_supported ? true : false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4226

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4236

acrtc->enabled = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4247

position->enable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4416

WARN_ON(reservation_object_wait_timeout_rcu(abo->tbo.resv, true, false,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4507

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4522

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4644

false : true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4674

if (false == commit_planes_to_stream(dm->dc,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4721

manage_dm_interrupts(adev, acrtc, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5233

new_crtc_state->mode_changed = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5654

bool lock_and_validation_needed = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5682

ret = dm_update_planes_state(dc, state, false, &lock_and_validation_needed);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5688

ret = dm_update_crtcs_state(&adev->dm, state, false, &lock_and_validation_needed);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5796

bool capable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5805

capable = (dpcd_data & DP_MSA_TIMING_PAR_IGNORED) ? true:false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5837

dm_con_state->freesync_capable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5838

dm_con_state->freesync_enable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5844

edid_check_required = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5862

dm_con_state->freesync_capable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

652

bool need_hotplug = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

670

drm_dp_mst_topology_mgr_set_mst(mgr, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

845

s3_handle_mst(ddev, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

874

aconnector->fake_enable = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

196

stream->gamut_remap_matrix.enable_remap = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

279

__drm_lut_to_dc_gamma(lut, gamma, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

62

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

69

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

97

false, false)) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

98

crtc_state->crc_enabled = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

157

bool valid_input = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

494

bool disable_hpd = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

495

bool valid_test_pattern = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

597

valid_test_pattern = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

200

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

205

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

247

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

263

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

292

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

297

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

302

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

320

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

327

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

332

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

436

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

466

drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

481

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

499

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

519

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

525

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

114

bool handler_removed = false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

146

if (handler_removed == false) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

167

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

173

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

179

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

190

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

195

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

216

if (false == validate_irq_registration_params(int_params, ih))

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

272

if (false == validate_irq_unregistration_params(irq_source, ih))

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

357

dc_interrupt_set(adev->dm.dc, src, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

667

dc_interrupt_set(adev->dm.dc, dc_link->irq_source_hpd, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

672

false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

77

print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

379

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

384

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

402

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

407

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

419

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

427

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

442

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

449

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

466

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c

60

return false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c

72

return false;

sys/dev/drm/amd/display/dc/basics/vector.c

169

return false;

sys/dev/drm/amd/display/dc/basics/vector.c

215

return false;

sys/dev/drm/amd/display/dc/basics/vector.c

302

return false;

sys/dev/drm/amd/display/dc/basics/vector.c

40

return false;

sys/dev/drm/amd/display/dc/basics/vector.c

45

return false;

sys/dev/drm/amd/display/dc/basics/vector.c

68

return false;

sys/dev/drm/amd/display/dc/basics/vector.c

74

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1066

info->type.STEP_AND_DELAY_INFO = false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1918

rc = false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1924

rc = false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1928

rc = false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1939

if (false == dal_graphics_object_id_is_valid(id1)) {

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1942

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1945

if (false == dal_graphics_object_id_is_valid(id2)) {

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1948

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1955

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2871

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2874

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2887

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2892

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2896

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2903

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2908

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2914

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2926

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2933

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

710

ss_info->type.STEP_AND_DELAY_INFO = false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1923

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1926

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1940

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1945

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1949

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1956

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1961

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1968

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1980

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1984

return false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

370

bool find_valid = false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

390

if (find_valid == false)

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

395

info->i2c_hw_assist = (record->i2c_id & I2C_HW_CAP) ? true : false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

653

ss_info->type.STEP_AND_DELAY_INFO = false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

726

ss_info->type.STEP_AND_DELAY_INFO = false;

sys/dev/drm/amd/display/dc/bios/command_table.c

1043

bp_params->signal_type, false);

sys/dev/drm/amd/display/dc/bios/command_table.c

1119

bp_params->signal_type, false);

sys/dev/drm/amd/display/dc/bios/command_table.c

1183

clk.ucEncoderMode = (uint8_t) bp->cmd_helper->encoder_mode_bp_to_atom(bp_params->signal_type, false);

sys/dev/drm/amd/display/dc/bios/command_table.c

1475

bp_params->signal_type, false);

sys/dev/drm/amd/display/dc/bios/command_table.c

1498

bp_params->signal_type, false);

sys/dev/drm/amd/display/dc/bios/command_table.c

2254

bool is_input_signal_dp = false;

sys/dev/drm/amd/display/dc/bios/command_table.c

2308

cntl->signal, false);

sys/dev/drm/amd/display/dc/bios/command_table.c

2330

cntl->signal, false);

sys/dev/drm/amd/display/dc/bios/command_table.c

373

frev, crev) == false)

sys/dev/drm/amd/display/dc/bios/command_table.c

978

bp_params->signal_type, false));

sys/dev/drm/amd/display/dc/bios/command_table2.c

181

if (BIOS_CMD_TABLE_REVISION(dig1transmittercontrol, frev, crev) == false)

sys/dev/drm/amd/display/dc/bios/command_table2.c

302

bp_params->signal_type, false);

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

104

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

214

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

236

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

61

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

73

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

120

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

191

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

214

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

76

return false;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

88

return false;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

228

result = false;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

231

result = false;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

240

bool result = false;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

324

ASSERT_CRITICAL(false); /* Unhandle action in driver! */

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

230

result = false;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

233

result = false;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

242

bool result = false;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

326

ASSERT_CRITICAL(false); /* Unhandle action in driver! */

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

350

ASSERT_CRITICAL(false); /* Unhandle action in driver! */

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

376

ASSERT_CRITICAL(false); /* Unhandle action in driver! */

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

230

result = false;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

233

result = false;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

242

bool result = false;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

326

ASSERT_CRITICAL(false); /* Unhandle action in driver! */

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

350

ASSERT_CRITICAL(false); /* Unhandle action in driver! */

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

376

ASSERT_CRITICAL(false); /* Unhandle action in driver! */

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

142

result = false;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

145

result = false;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

63

bool result = false;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

48

*negative = false;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

60

*negative = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2078

dceip.large_cursor = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2080

dceip.dmif_pipe_en_fbc_chunk_tracker = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2087

dceip.display_write_back_supported = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2088

dceip.argb_compression_support = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2114

dceip.graphics_lb_nodownscaling_multi_line_prefetching = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2194

dceip.large_cursor = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2196

dceip.dmif_pipe_en_fbc_chunk_tracker = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2203

dceip.display_write_back_supported = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2310

dceip.large_cursor = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2312

dceip.dmif_pipe_en_fbc_chunk_tracker = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2319

dceip.display_write_back_supported = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2415

vbios.scatter_gather_enable = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2426

dceip.large_cursor = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2428

dceip.dmif_pipe_en_fbc_chunk_tracker = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2539

dceip.large_cursor = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2541

dceip.dmif_pipe_en_fbc_chunk_tracker = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2548

dceip.display_write_back_supported = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2575

dceip.graphics_lb_nodownscaling_multi_line_prefetching = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2641

vbios.scatter_gather_enable = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2652

dceip.large_cursor = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2685

dceip.underlay_downscale_prefetch_enabled = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2746

return false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2751

return false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2791

data->fbc_en[num_displays + 4] = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2792

data->lpt_en[num_displays + 4] = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2842

data->interlace_mode[num_displays + 4] = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2847

data->fbc_en[num_displays * 2 + j] = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2848

data->lpt_en[num_displays * 2 + j] = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2889

data->fbc_en[num_displays + 4] = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2890

data->lpt_en[num_displays + 4] = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2970

data->interlace_mode[num_displays + 4] = false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2995

return false;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

3000

calcs_output->all_displays_in_sync = false;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

1202

return false;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

1342

return false;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

1347

return false;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

254

input->src.is_hsplit = false;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

620

bool updated = false;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

845

v->underscan_output[input_idx] = false; /* taken care of in recout already*/

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

846

v->interlace_output[input_idx] = false;

sys/dev/drm/amd/display/dc/core/dc.c

102

return false;

sys/dev/drm/amd/display/dc/core/dc.c

1042

if (false == context_changed(dc, context))

sys/dev/drm/amd/display/dc/core/dc.c

1073

dc->optimized_required = false;

sys/dev/drm/amd/display/dc/core/dc.c

1122

return false;

sys/dev/drm/amd/display/dc/core/dc.c

1499

dc->hwss.set_bandwidth(dc, context, false);

sys/dev/drm/amd/display/dc/core/dc.c

1571

dc->hwss.pipe_control_lock(dc, top_pipe_to_program, false);

sys/dev/drm/amd/display/dc/core/dc.c

1685

return false;

sys/dev/drm/amd/display/dc/core/dc.c

175

return false;

sys/dev/drm/amd/display/dc/core/dc.c

1754

return false;

sys/dev/drm/amd/display/dc/core/dc.c

199

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc.c

224

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc.c

268

return false;

sys/dev/drm/amd/display/dc/core/dc.c

291

return false;

sys/dev/drm/amd/display/dc/core/dc.c

317

return false;

sys/dev/drm/amd/display/dc/core/dc.c

324

return false;

sys/dev/drm/amd/display/dc/core/dc.c

369

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc.c

386

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc.c

442

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/core/dc.c

490

dp_retrain_link_dp_test(link, &store_settings, false);

sys/dev/drm/amd/display/dc/core/dc.c

645

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/core/dc.c

656

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/core/dc.c

667

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/core/dc.c

689

return false;

sys/dev/drm/amd/display/dc/core/dc.c

710

should_disable = false;

sys/dev/drm/amd/display/dc/core/dc.c

737

if (false == construct(dc, init_params))

sys/dev/drm/amd/display/dc/core/dc.c

896

return false;

sys/dev/drm/amd/display/dc/core/dc.c

944

dc->hwss.set_bandwidth(dc, context, false);

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

112

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

123

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

134

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

144

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

155

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

266

return false;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

96

bool ret = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1259

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1273

if (false == construct(link, init_params))

sys/dev/drm/amd/display/dc/core/dc_link.c

1297

bool panel_mode_edp = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

136

bool result = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1394

state->dis_clk, &clocks, false);

sys/dev/drm/amd/display/dc/core/dc_link.c

1415

skip_video_pattern = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

144

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1475

bool result = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1481

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1547

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1549

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1551

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1555

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1560

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1591

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1606

bool i2c_success = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

170

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1767

bool i2c_success = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

1893

bool i2c_success = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

192

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/core/dc_link.c

1924

bool is_over_340mhz = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2068

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2074

dongle_caps->extendedCapValid == false)

sys/dev/drm/amd/display/dc/core/dc_link.c

2084

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2088

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2092

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2109

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2114

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2122

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2126

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2193

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2238

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

234

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2484

false)) {

sys/dev/drm/amd/display/dc/core/dc_link.c

2526

false);

sys/dev/drm/amd/display/dc/core/dc_link.c

2569

true : false);

sys/dev/drm/amd/display/dc/core/dc_link.c

2583

pipe_ctx->stream->apply_edp_fast_boot_optimization = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2584

pipe_ctx->stream->dpms_off = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2675

link->is_hpd_filter_disabled = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

2696

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/core/dc_link.c

516

bool boot = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

524

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

602

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

605

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

615

bool converter_disable_audio = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

617

bool same_edid = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

627

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

629

if (false == dc_link_detect_sink(link, &new_connection_type)) {

sys/dev/drm/amd/display/dc/core/dc_link.c

631

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

697

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

703

same_dpcd = false;

sys/dev/drm/amd/display/dc/core/dc_link.c

725

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

736

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

760

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

793

return false;

sys/dev/drm/amd/display/dc/core/dc_link.c

915

ASSERT(false);

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

279

ddc_service->flags.EDID_QUERY_DONE_ONCE = false;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

280

ddc_service->flags.FORCE_READ_REPEATED_START = false;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

281

ddc_service->flags.EDID_STRESS_READ = false;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

343

return false;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

412

.write = false,

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

437

bool is_type2_dongle = false;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

470

is_valid_hdmi_signature = false;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

481

is_valid_hdmi_signature = false;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

574

return false;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

593

payloads, address, read_size, read_buf, false);

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

619

payloads, address, read_size, read_buf, false);

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1062

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1113

success = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1114

skip_link_training = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1149

skip_video_pattern = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1321

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1339

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1352

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1369

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1381

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1386

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1497

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1587

sink_status_changed = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1588

return_code = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1638

return_code = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1705

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1713

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

175

bool edp_workaround = false; /* TODO link_prop.INTERNAL */

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1751

dc_link_set_psr_enable(link, false, true);

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1765

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1787

dp_retrain_link_dp_test(link, &link_settings, false);

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1901

link_training_settings.allow_invalid_msa_timing_param = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2018

bool status = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2021

*out_link_loss = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2042

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2054

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2060

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2076

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2095

status = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2122

bool mst = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2327

link->wa_flags.dp_keep_receiver_powered = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2331

link->wa_flags.dp_keep_receiver_powered = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2365

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2420

link->test_pattern_enabled = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2511

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

263

done = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2633

link->test_pattern_enabled = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2694

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2699

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

276

done = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

281

done = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

577

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

604

req_drv_setting_changed = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

608

req_drv_setting_changed = false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

631

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

637

return false;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

914

perform_post_lt_adj_req_sequence(link, lt_settings) == false)

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

150

dp_receiver_power_ctrl(link, false);

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

154

link->dc->hwss.edp_power_control(link, false);

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

172

dp_enable_mst_on_sink(link, false);

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

294

dp_receiver_power_ctrl(link, false);

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

337

pipes[i].stream_res.stream_enc, false);

sys/dev/drm/amd/display/dc/core/dc_resource.c

1109

bool res = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1126

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1368

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1375

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1382

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1395

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1442

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1486

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1517

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1527

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1547

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1552

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1588

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1602

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1634

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1637

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

164

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/core/dc_resource.c

1640

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1643

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1646

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1656

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1668

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1673

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1678

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1788

if ((res_ctx->is_audio_acquired[i] == false) && (res_ctx->is_stream_enc_acquired[i] == true)) {

sys/dev/drm/amd/display/dc/core/dc_resource.c

1798

if (res_ctx->is_audio_acquired[i] == false) {

sys/dev/drm/amd/display/dc/core/dc_resource.c

1817

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

186

aud_support->hdmi_audio_native = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1864

false);

sys/dev/drm/amd/display/dc/core/dc_resource.c

187

aud_support->hdmi_audio_on_dongle = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1871

false);

sys/dev/drm/amd/display/dc/core/dc_resource.c

2170

bool itc = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

237

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2407

bool hdmi_vic_mode = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2414

info_packet->valid = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

259

dc->caps.dynamic_audio = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2624

info->avi.valid = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2625

info->gamut.valid = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2626

info->vendor.valid = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2627

info->spd.valid = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2628

info->hdrsmd.valid = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2629

info->vsc.valid = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

269

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2705

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2735

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2926

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/core/dc_resource.c

341

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

344

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

348

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

352

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

356

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

359

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

364

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

367

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

376

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

380

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

391

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

394

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

400

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

404

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

408

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

412

return false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

500

bool flip_vert_scan_dir = false, flip_horz_scan_dir = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

515

pri_split = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

516

sec_split = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

763

bool flip_vert_scan_dir = false, flip_horz_scan_dir = false;

sys/dev/drm/amd/display/dc/core/dc_resource.c

788

flip_vert_scan_dir = false;

sys/dev/drm/amd/display/dc/core/dc_sink.c

48

return false;

sys/dev/drm/amd/display/dc/core/dc_sink.c

92

if (false == construct(sink, init_params))

sys/dev/drm/amd/display/dc/core/dc_stream.c

187

return false;

sys/dev/drm/amd/display/dc/core/dc_stream.c

191

return false;

sys/dev/drm/amd/display/dc/core/dc_stream.c

196

return false;

sys/dev/drm/amd/display/dc/core/dc_stream.c

220

core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, false);

sys/dev/drm/amd/display/dc/core/dc_stream.c

236

return false;

sys/dev/drm/amd/display/dc/core/dc_stream.c

241

return false;

sys/dev/drm/amd/display/dc/core/dc_stream.c

267

core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, false);

sys/dev/drm/amd/display/dc/core/dc_stream.c

298

bool ret = false;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

137

bool limit_freq_to_48_khz = false;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

138

bool limit_freq_to_88_2_khz = false;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

139

bool limit_freq_to_96_khz = false;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

140

bool limit_freq_to_174_4_khz = false;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

411

bool is_ac3_supported = false;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

99

bool found = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

328

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

365

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

413

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

429

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

441

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

451

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

458

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

468

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

473

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

477

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

496

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

514

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

523

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

535

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

539

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

557

ctx.transaction_complete = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

575

return false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

628

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

640

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

647

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

662

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

667

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

671

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

702

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

711

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

723

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

727

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

745

ctx.transaction_complete = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

763

return false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

808

return false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

824

return read_command(engine, &dummy_request, false);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

826

return write_command(engine, &dummy_request, false);

sys/dev/drm/amd/display/dc/dce/dce_aux.c

847

result = false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

880

return false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

887

return false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

891

return false;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

92

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1061

if (ss_info_cur->type.STEP_AND_DELAY_INFO != false) {

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1151

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1156

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1193

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1198

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1244

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1300

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1313

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1320

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1345

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1346

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

169

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

242

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

284

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

455

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

636

false);

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

654

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

656

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

658

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

660

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

745

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

747

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

871

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

884

return false;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

945

return false;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

332

dce_clk_params.flags.USE_GENLOCK_AS_SOURCE_FOR_DPREFCLK = false;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

581

bool send_request_to_increase = false;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

582

bool send_request_to_lower = false;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

700

clk_dce->dfs_bypass_active = false;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

739

return false;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

795

clk_dce->ss_on_dprefclk = false;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

919

clk_dce->ss_on_dprefclk = false;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

279

return false;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

400

return false;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

414

return false;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

437

return false;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

452

return false;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

584

return false;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

730

return false;

sys/dev/drm/amd/display/dc/dce/dce_hwseq.c

208

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c.c

38

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c.c

43

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c.c

53

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

160

bool last_transaction = false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

215

DC_I2C_DATA_RW, false,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

222

DC_I2C_DATA_RW, false,

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

309

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

492

bool result = false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

501

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

528

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

568

result = false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

577

pool->i2c_hw_buffer_in_use = false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

117

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

140

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

142

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

161

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

169

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

195

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

200

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

224

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

226

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

247

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

251

write_bit_to_ddc(ddc_handle, SDA, false);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

258

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

271

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

28

#define SCL false

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

284

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

288

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

306

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

311

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

350

write_bit_to_ddc(ddc_handle, SDA, false);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

354

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

361

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

390

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

451

result = false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

462

result = false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

493

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

517

result = false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

83

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

87

return false;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

92

return false;

sys/dev/drm/amd/display/dc/dce/dce_ipp.c

134

REG_UPDATE(CUR_UPDATE, CURSOR_UPDATE_LOCK, false);

sys/dev/drm/amd/display/dc/dce/dce_ipp.c

64

REG_UPDATE(CUR_UPDATE, CURSOR_UPDATE_LOCK, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

1202

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

196

enable_phy_bypass_mode(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

245

set_link_training_complete(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

249

enable_phy_bypass_mode(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

288

enable_phy_bypass_mode(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

296

disable_prbs_symbols(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

311

enable_phy_bypass_mode(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

316

disable_prbs_symbols(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

332

enable_phy_bypass_mode(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

387

enable_phy_bypass_mode(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

421

enable_phy_bypass_mode(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

445

enable_phy_bypass_mode(enc110, false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

471

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

596

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

603

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

605

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

608

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

618

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

621

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

636

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

639

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

641

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

645

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

650

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

654

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

657

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

666

return false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

752

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

810

pixel_encoding == PIXEL_ENCODING_RGB) ? true : false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

816

is_valid = false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

835

cntl.coherent = false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

904

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

129

return false;

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

687

return false;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1551

dce110_se_enable_audio_clock(enc, false);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1568

dce110_se_enable_audio_clock(enc, false);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

664

cntl.enable_dp_audio = false;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

688

cntl.enable_dp_audio = false;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

1037

return false;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

1066

return false;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

1101

if (default_adjust->force_hw_default == false) {

sys/dev/drm/amd/display/dc/dce/dce_transform.c

128

return false;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

327

bool filter_updated = false;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

636

spatial_dither_enable = false;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

911

return false;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

922

scl_data->taps.h_taps = decide_taps(scl_data->ratios.horz, in_taps->h_taps, false);

sys/dev/drm/amd/display/dc/dce/dce_transform.c

923

scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false);

sys/dev/drm/amd/display/dc/dce/dce_transform.c

936

return false;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

946

return false;

sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c

105

return false;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

1053

return false;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

770

bool at_least_one_pipe = false;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

799

return false;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

803

return false;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

890

dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], false);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

892

dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL1, &clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

894

dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL2, &clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

902

dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL1, &clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

904

dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL2, &clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

284

compressor->is_enabled = false;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

286

wait_for_fbc_state_changed(cp110, false);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

319

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

449

bool result = false;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

535

compressor->base.options.bits.DUMMY_BACKEND = false;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

543

compressor->base.options.bits.CLK_GATING_DISABLED = false;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

558

compressor->base.is_enabled = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1012

pipe_ctx->stream_res.stream_enc, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1041

update_audio_usage(&dc->current_state->res_ctx, dc->res_pool, pipe_ctx->stream_res.audio, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1075

false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1105

link->dc->hwss.edp_backlight_control(link, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1324

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1353

if (false == pipe_ctx->stream_res.tg->funcs->enable_crtc(

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1421

pipe_ctx->stream->sink->link->psr_enabled = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1448

dp_receiver_power_ctrl(dc->links[i], false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1473

dc->res_pool->dp_clock_source) == false)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1478

dc->res_pool->clock_sources[i]) == false)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1568

bool can_edp_fast_boot_optimize = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1569

bool apply_edp_fast_boot_optimization = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1576

can_edp_fast_boot_optimize = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1601

dc->hwss.edp_backlight_control(edp_link_to_turnoff, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1607

dc->hwss.edp_power_control(edp_link_to_turnoff, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1813

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1817

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1832

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1836

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1840

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1844

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2084

dcb->funcs->set_scratch_critical_state(dcb, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2099

default_adjust.force_hw_default = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2140

bool blank_target = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2230

bool rc = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2257

if (false == rc)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

236

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2366

dce_clock_gating_power_up(dc->hwseq, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2521

context->bw.dce.nbp_state_change_enable == false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2523

context->bw.dce.cpuc_state_change_enable == false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2525

context->bw.dce.cpup_state_change_enable == false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

261

ASSERT(false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2663

false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

276

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2772

dc->hwss.pipe_control_lock(dc, pipe_ctx, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2840

pos_cpy.enable = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2843

pos_cpy.enable = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

305

result = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

312

result = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

335

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

341

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

347

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

351

fmt.sign = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

356

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

362

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

368

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

378

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

384

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

390

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

396

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

402

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

408

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

440

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

615

xfm->funcs->opp_power_on_regamma_lut(xfm, false);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

636

crtc_source_select.enable_dp_audio = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

788

bool edp_hpd_high = false;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

843

if (false == edp_hpd_high) {

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

904

cntl.coherent = false;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

486

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

575

const unsigned int *pte = get_dvmm_hw_setting(tiling_info, format, false);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

389

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

409

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

424

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

444

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

679

if (default_adjust->force_hw_default == false) {

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

505

power_on_lut(xfm, true, false, true);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

514

power_on_lut(xfm, false, false, true);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1054

false);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1113

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1243

&clk_src_regs[0], false);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1246

&clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1395

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

828

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

830

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

861

bool result = false;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

951

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

962

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

969

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

976

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1122

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1129

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1133

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1142

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1149

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1152

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1160

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1404

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1977

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2060

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2104

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2185

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

238

result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, false);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

186

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

612

return false;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

161

bool is_scaling_needed = false;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

527

bool is_scaling_required = false;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

528

bool filter_updated = false;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

280

return false;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

428

compressor->is_enabled = false;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

435

wait_for_fbc_state_changed(cp110, false);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

464

return false;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

798

compressor->base.options.bits.DUMMY_BACKEND = false;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

803

compressor->base.options.bits.LPT_SUPPORT = false;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

805

compressor->base.options.bits.CLK_GATING_DISABLED = false;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

820

compressor->base.is_enabled = false;

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

152

return false;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1172

&clk_src_regs[0], false);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1177

&clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1182

&clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1187

&clk_src_regs[3], false);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1192

&clk_src_regs[4], false);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1197

&clk_src_regs[5], false);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1340

return false;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

815

bool result = false;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

925

return false;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

929

return false;

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

193

return false;

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

195

return false;

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

246

dh_data->dchub_info_valid = false;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

1124

return false;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

946

&clk_src_regs[0], false);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

950

&clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

954

&clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

958

&clk_src_regs[3], false);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

962

&clk_src_regs[4], false);

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

966

&clk_src_regs[5], false);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1134

return false;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

118

return false;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

124

return false;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

791

return false;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1049

return false;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1109

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1111

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL1, &clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1113

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL2, &clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1121

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL1, &clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1123

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL2, &clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1259

return false;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1319

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL1, &clk_src_regs[0], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1321

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL2, &clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1329

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL2, &clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1465

return false;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

650

transform->prescaler_on = false;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

820

return false;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

824

return false;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

899

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

901

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL1, &clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

903

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL2, &clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

911

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL1, &clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

913

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL2, &clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

142

fmt.sign = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

147

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

153

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

159

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

163

fmt.sign = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

168

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

176

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

182

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

195

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

201

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

207

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

213

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

219

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

225

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

260

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

442

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

568

hw_points, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

158

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

163

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

311

bool force_disable_cursor = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

320

is_float = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

362

force_disable_cursor = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

663

bool ret = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

674

*ram_a_inuse = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

753

bool in_use = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

766

*ram_a_inuse = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

787

bool rama_occupied = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

157

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

166

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

297

bool h_2tap_hardcode_coef_en = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

298

bool v_2tap_hardcode_coef_en = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

299

bool h_2tap_sharp_en = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

300

bool v_2tap_sharp_en = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

328

bool filter_updated = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

103

return enable ? true : false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

133

forced_pstate_allow = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

226

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

539

ASSERT(false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

592

dh_data->dchub_info_valid = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

625

bool standard_swizzle = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

626

bool display_swizzle = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

675

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

700

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

743

false : /* full 256B request */

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

747

false : /* full 256B request */

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

765

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

768

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

772

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

809

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

815

output->grph.rgb.independent_64b_blks = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

820

output->grph.rgb.independent_64b_blks = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

830

output->const_color_support = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

714

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1014

if (allow_self_fresh_force_enable == false &&

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1071

hubp->power_gated = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1188

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1195

bool addr_patched = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1226

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1252

result = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1279

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1293

&dpp->regamma_params, false)) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1330

bool rc = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1357

if (false == rc)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1742

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1751

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1762

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1779

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1783

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1972

blnd_cfg.overlap_only = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2150

hubp->power_gated = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2155

hubp->funcs->set_blank(hubp, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2346

bool removed_pipe[4] = { false };

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2402

dcn10_pipe_control_lock(dc, top_pipe_to_program, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2505

bool non_stereo_timing = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2512

if (non_stereo_timing == false &&

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2545

flags.PROGRAM_STEREO == 1 ? true:false,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2564

ASSERT(false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2587

pipe_ctx->stream_res.opp->mpcc_disconnect_pending[mpcc_inst] = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2666

pos_cpy.enable = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

552

hubp_pg_control(hws, 0, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

556

hws->wa_state.DEGVIDCN10_253_applied = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

585

hubp->funcs->set_hubp_blank_en(hubp, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

658

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

705

if (false == pipe_ctx->stream_res.tg->funcs->enable_crtc(pipe_ctx->stream_res.tg)) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

763

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

785

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

801

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

846

hubbub1_soft_reset(dc->res_pool->hubbub, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

918

dpp_pg_control(hws, dpp->inst, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

919

hubp_pg_control(hws, pipe_ctx->plane_res.hubp->inst, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

939

hubp->funcs->hubp_clk_cntl(hubp, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

941

dpp->funcs->dpp_dppclk_control(dpp, false, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

946

false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

949

dc->optimized_required = false; /* We're powering off, no need to optimize */

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

1120

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

166

enable_phy_bypass_mode(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

215

set_link_training_complete(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

219

enable_phy_bypass_mode(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

253

enable_phy_bypass_mode(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

261

disable_prbs_symbols(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

276

enable_phy_bypass_mode(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

281

disable_prbs_symbols(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

297

enable_phy_bypass_mode(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

353

enable_phy_bypass_mode(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

388

enable_phy_bypass_mode(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

412

enable_phy_bypass_mode(enc10, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

438

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

540

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

547

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

549

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

552

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

562

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

565

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

580

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

583

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

585

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

589

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

594

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

598

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

601

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

610

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

700

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

755

is_valid = (stream->timing.pixel_encoding == PIXEL_ENCODING_RGB) ? true : false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

761

is_valid = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

780

cntl.coherent = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

850

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

139

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

270

bool found = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

332

mpcc->blnd_cfg.overlap_only = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

335

mpcc->sm_cfg.enable = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1178

bool ret = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1187

ret = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1258

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1316

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1363

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

394

optc1_set_blank_data_double_buffer(optc, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

540

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

544

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

553

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

557

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

561

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

566

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

643

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1224

dc->caps.post_blend_color_processing = false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1240

&clk_src_regs[0], false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1244

&clk_src_regs[1], false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1248

&clk_src_regs[2], false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1255

&clk_src_regs[3], false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1261

&clk_src_regs[3], false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1479

return false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

525

.force_abm_enable = false,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

526

.timing_trace = false,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

535

.disable_pplib_clock_request = false,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

536

.disable_pplib_wm_range = false,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

544

.performance_trace = false,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

546

.recovery_enabled = false, /*enable this by default after testing.*/

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

552

.force_abm_enable = false,

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1389

enc1_se_enable_audio_clock(enc, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1406

enc1_se_enable_audio_clock(enc, false);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

596

cntl.enable_dp_audio = false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

126

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

100

return false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

114

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

115

return false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

135

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

136

return false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

173

return false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

176

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

177

return false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

217

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

218

result = false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

249

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

250

result = false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

278

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

279

result = false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

304

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

305

result = false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

321

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

322

result = false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

345

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

346

result = false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

351

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

352

result = false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

72

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

73

return false;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

99

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

145

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

121

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

122

return false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

136

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

137

return false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

157

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

158

return false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

195

return false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

198

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

199

return false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

239

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

240

result = false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

271

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

272

result = false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

300

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

301

result = false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

326

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

327

result = false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

343

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

344

result = false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

367

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

368

result = false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

373

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

374

result = false;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

94

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

95

return false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

130

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

124

return false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

139

return false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

160

return false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

202

return false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

206

return false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

247

result = false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

279

result = false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

308

result = false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

334

result = false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

351

result = false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

375

result = false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

386

result = false;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

97

return false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

140

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

121

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

122

return false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

136

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

137

return false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

157

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

158

return false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

195

return false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

198

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

199

return false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

239

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

240

result = false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

271

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

272

result = false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

300

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

301

result = false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

326

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

327

result = false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

343

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

344

result = false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

367

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

368

result = false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

373

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

374

result = false;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

94

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

95

return false;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

245

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

263

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

64

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

152

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

234

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

239

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

272

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

277

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

282

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

299

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

379

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

389

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

397

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

581

config_data.config.ddc.data_en_bit_present = false;

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

582

config_data.config.ddc.clock_en_bit_present = false;

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

220

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

226

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

77

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

96

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

97

return false;

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

138

ptr->opened = false;

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

189

pin->base.opened = false;

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

196

pin->mux_supported = false;

sys/dev/drm/amd/display/dc/gpio/hw_hpd.c

145

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/hw_hpd.c

150

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/hw_hpd.c

156

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/gpio/hw_translate.c

94

return false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

131

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

143

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

153

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

160

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

170

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

175

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

179

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

199

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

217

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

226

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

237

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

241

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

260

ctx.transaction_complete = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

278

return false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

356

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

368

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

375

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

390

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

395

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

399

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

431

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

440

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

451

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

455

ctx->operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

474

ctx.transaction_complete = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

492

return false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

537

return false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

553

return read_command(engine, &dummy_request, false);

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

555

return write_command(engine, &dummy_request, false);

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

578

result = false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

78

return false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

86

return false;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

90

return false;

sys/dev/drm/amd/display/dc/i2caux/dce100/i2caux_dce100.c

96

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

123

return false;

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

362

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

399

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

446

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

492

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

499

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

241

return false;

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

265

} while (false)

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

276

bool last_transaction = false;

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

311

DC_I2C_DATA_RW, false,

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

318

DC_I2C_DATA_RW, false,

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

556

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

560

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

568

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c

146

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c

154

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c

122

i2caux_dce110->i2c_hw_buffer_in_use = false;

sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c

213

bool use_i2c_sw_engine = false;

sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c

227

i2caux_dce110->i2c_hw_buffer_in_use = false;

sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c

317

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce112/i2caux_dce112.c

123

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce120/i2caux_dce120.c

110

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

379

return false;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

411

bool last_transaction = false;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

482

false,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c

131

non_generic = false;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c

158

FROM_I2C_AUX(i2caux)->i2c_hw_buffer_in_use = false;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c

213

i2caux_dce80->i2c_hw_buffer_in_use = false;

sys/dev/drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c

110

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/diagnostics/i2caux_diag.c

91

ASSERT_CRITICAL(false);

sys/dev/drm/amd/display/dc/i2caux/i2c_engine.c

77

result = false;

sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c

106

bool result = false;

sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c

123

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c

173

stop_bit = last_iteration ? initial_stop_bit : false;

sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c

219

first_iteration = false;

sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c

110

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c

131

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c

194

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c

85

bool result = false;

sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c

95

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

102

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

134

write_bit_to_ddc(ddc_handle, SDA, false);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

138

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

145

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

158

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

162

write_bit_to_ddc(ddc_handle, SDA, false);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

169

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

182

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

206

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

208

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

226

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

234

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

259

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

264

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

287

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

289

write_bit_to_ddc(ddc_handle, SCL, false);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

311

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

315

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

333

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

338

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

377

bool operation_succeeded = false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

391

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

472

return false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

49

#define SCL false

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

507

result = false;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

518

result = false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

120

return false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

125

return false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

158

return false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

184

result = false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

208

return false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

213

return false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

219

return false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

257

result = false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

279

return false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

283

return false;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

288

return false;

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

183

return false;

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

191

return false;

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

213

return false;

sys/dev/drm/amd/display/dc/irq/irq_service.c

113

return false;

sys/dev/drm/amd/display/dc/irq/irq_service.c

149

return false;

sys/dev/drm/amd/display/dc/virtual/virtual_stream_encoder.c

109

return false;

sys/dev/drm/amd/display/dc/virtual/virtual_stream_encoder.c

111

return false;

sys/dev/drm/amd/display/include/grph_object_id.h

304

return false;

sys/dev/drm/amd/display/include/logger_interface.h

74

print_not_impl = false; \

sys/dev/drm/amd/display/include/signal_types.h

84

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1148

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1369

bool ret = false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1372

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1435

coordinates_x, tf == TRANSFER_FUNCTION_SRGB ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1516

bool ret = false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1519

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1579

bool ret = false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1582

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1635

tf == TRANSFER_FUNCTION_SRGB ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1670

bool ret = false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1724

coordinates_x, trans == TRANSFER_FUNCTION_SRGB ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1744

trans == TRANSFER_FUNCTION_HLG12 ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1762

bool ret = false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1803

coordinates_x, trans == TRANSFER_FUNCTION_SRGB ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1823

trans == TRANSFER_FUNCTION_HLG12 ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

448

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

486

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

491

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

496

return false;

sys/dev/drm/amd/display/modules/color/color_gamma.c

530

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

1058

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

1066

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

1071

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

1076

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

1081

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

179

target_duration_in_us) ? true : false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

206

in_out_vrr->fixed.ramping_active = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

219

in_out_vrr->fixed.ramping_active = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

259

in_out_vrr->btr.btr_active = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

269

in_out_vrr->fixed.fixed_active = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

293

in_out_vrr->btr.btr_active = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

375

bool update = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

386

in_out_vrr->fixed.fixed_active = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

443

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

466

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

480

return false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

765

in_out_vrr->supported = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

793

in_out_vrr->btr.btr_enabled = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

794

in_out_vrr->btr.btr_active = false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

908

if (in_out_vrr->supported == false)

sys/dev/drm/amd/display/modules/freesync/freesync.c

951

in_out_vrr->fixed.ramping_active = false;

sys/dev/drm/amd/display/modules/info_packet/info_packet.c

51

bool stereo3dSupport = false;

sys/dev/drm/amd/display/modules/stats/stats.c

103

return false;

sys/dev/drm/amd/display/modules/stats/stats.c

98

bool result = false;

sys/dev/drm/amd/include/amd_pcie_helpers.h

33

return false;

sys/dev/drm/amd/include/amd_pcie_helpers.h

41

return false;

sys/dev/drm/amd/include/linux/chash.h

233

__chash_table_copy_out(&(*tbl).table, key, value, false)

sys/dev/drm/amd/lib/chash.c

400

int r = chash_table_find(&iter, key, false);

sys/dev/drm/amd/powerplay/amd_powerplay.c

202

return false;

sys/dev/drm/amd/powerplay/amd_powerplay.c

335

hwmgr->en_umd_pstate = false;

sys/dev/drm/amd/powerplay/amd_powerplay.c

51

hwmgr->pm_en = (amdgpu_dpm && hwmgr->not_vf) ? true : false;

sys/dev/drm/amd/powerplay/amd_powerplay.c

702

ret = hwmgr->hwmgr_func->avfs_control(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/hardwaremanager.c

261

return false;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

102

hwmgr->od_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

106

hwmgr->od_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

120

hwmgr->od_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

173

hwmgr->od_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

217

hwmgr->pm_en = false;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

274

psm_adjust_power_state_dynamic(hwmgr, false, NULL);

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

296

ret = psm_adjust_power_state_dynamic(hwmgr, false, NULL);

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

326

ret = psm_adjust_power_state_dynamic(hwmgr, false, NULL);

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

364

ret = psm_adjust_power_state_dynamic(hwmgr, false, NULL);

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

380

ret = psm_adjust_power_state_dynamic(hwmgr, false, requested_ps);

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

385

ret = psm_adjust_power_state_dynamic(hwmgr, false, NULL);

sys/dev/drm/amd/powerplay/hwmgr/pp_psm.c

251

equal = false;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

518

"Could not find Voltage Table in BIOS.", return false;);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

521

(voltage_info, voltage_type, voltage_mode)) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

594

return false;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

628

bool bRet = false;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

633

"Could not find GPIO lookup Table in BIOS.", return false);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

154

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

202

return false;

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

212

bool ret = false;

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

219

return false);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

87

return false);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

90

voltage_type, voltage_mode)) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

113

bool bNegated = false;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

258

bNEGATED = false;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

323

return false;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

331

return false;

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

747

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

691

ps->classification.temporary_state = false;

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

692

ps->classification.to_be_deleted = false;

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

709

ps->display.disableFrameModulation = false;

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

724

ps->display.limitRefreshrate = false;

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

726

ps->display.limitRefreshrate = false;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

1141

smum_smc_table_manager(hwmgr, (uint8_t *)table, (uint16_t)SMU10_WMTABLE, false);

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

120

smu10_data->gfx_off_controled_by_driver = false;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

280

smu10_data->cc6_disable = false;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

281

smu10_data->pstate_disable = false;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

282

smu10_data->cc6_setting_changed = false;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

302

return false;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

983

bool latency_required = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

100

data->uvd_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

101

data->vce_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

132

smu7_update_uvd_dpm(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

160

smu7_update_vce_dpm(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1016

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1022

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1037

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1252

protection = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1469

smu7_avfs_control(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1471

smu7_avfs_control(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1511

tmp_result = smu7_avfs_control(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1556

data->dll_default_on = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1570

data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1571

data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1572

data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1580

data->ulv_supported = hwmgr->feature_mask & PP_ULV_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

2574

data->is_tlu_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

2877

return false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

2954

disable_mclk_switching = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3143

power_state->classification.temporary_state = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3144

power_state->classification.to_be_deleted = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3152

power_state->display.disableFrameModulation = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3153

power_state->display.limitRefreshrate = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3671

data->pspp_notify_required = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3677

if (0 == amdgpu_acpi_pcie_performance_request(hwmgr->adev, PCIE_PERF_REQ_GEN3, false))

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3683

if (0 == amdgpu_acpi_pcie_performance_request(hwmgr->adev, PCIE_PERF_REQ_GEN2, false))

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3790

dpm_table->dpm_levels[i].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3909

if (amdgpu_acpi_pcie_performance_request(hwmgr->adev, request, false)) {

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4002

data->apply_optimized_settings = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4028

smu7_notify_smc_display_change(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4138

bool is_update_required = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4180

*equal = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4187

*equal = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4219

data->need_long_memory_training = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4314

data->uvd_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4315

data->vce_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4784

return false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4793

return false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4801

return false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4804

return false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

792

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

807

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

1039

result = smu7_enable_didt(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

1070

data->cac_enabled = (0 == smc_result) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

1086

data->cac_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

120

hwmgr->fan_ctrl_is_in_default_mode = false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

185

hwmgr->fan_ctrl_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1069

smu8_nbdpm_pstate_enable_disable(hwmgr, false, false);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1071

smu8_nbdpm_pstate_enable_disable(hwmgr, false, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1241

smu8_nbdpm_pstate_enable_disable(hwmgr, false, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1424

hw_data->cc6_settings.cc6_setting_changed = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1870

smu8_enable_disable_uvd_dpm(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1935

smu8_dpm_update_uvd_dpm(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1951

smu8_enable_disable_vce_dpm(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1956

data->vce_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

223

data->cc6_settings.cpu_cc6_disable = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

224

data->cc6_settings.cpu_pstate_disable = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

225

data->cc6_settings.nb_pstate_switch_disable = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

664

data->uvd_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

665

data->vce_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

666

data->samu_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

668

data->acp_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

821

data->is_nb_dpm_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

857

disable_switch = hw_data->cc6_settings.nb_pstate_switch_disable ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

858

enable_low_mem_state = hw_data->cc6_settings.nb_pstate_switch_disable ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

861

smu8_nbdpm_pstate_enable_disable(hwmgr, false, disable_switch);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

916

hw_data->disp_clk_bypass_pending = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

917

hw_data->disp_clk_bypass = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

924

hw_data->is_nb_dpm_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

931

hw_data->cc6_settings.cc6_setting_changed = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

933

hw_data->cc6_settings.cpu_cc6_disable = false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

934

hw_data->cc6_settings.cpu_pstate_disable = false;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

204

bool found = false;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

221

found = false;

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

352

dpm_table->dpm_level[i].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1003

found = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

104

hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

106

hwmgr->feature_mask & PP_SOCCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

108

hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

110

hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

113

hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

122

hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

125

hwmgr->feature_mask & PP_ULV_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

128

hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1350

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1366

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

137

hwmgr->feature_mask & PP_AVFS_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1380

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2253

data->smu_features[GNLD_AVFS].supported = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2285

data->smu_features[GNLD_ACG].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2298

if (!vega10_enable_smc_features(hwmgr, false,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2300

data->smu_features[GNLD_ACG].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2354

false,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2358

data->smu_features[GNLD_AVFS].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2370

vega10_avfs_enable(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2372

vega10_avfs_enable(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2411

AVFSFUSETABLE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2578

data->vbios_boot_state.bsoc_vddc_lock = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2606

result = smum_smc_table_manager(hwmgr, (uint8_t *)pp_table, PPTABLE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2649

false,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2653

data->smu_features[GNLD_THERMAL].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2708

false, data->smu_features[GNLD_ULV].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2711

data->smu_features[GNLD_ULV].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2762

false, data->smu_features[GNLD_DS_GFXCLK].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2765

data->smu_features[GNLD_DS_GFXCLK].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2770

false, data->smu_features[GNLD_DS_SOCCLK].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2773

data->smu_features[GNLD_DS_SOCCLK].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2778

false, data->smu_features[GNLD_DS_LCLK].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2781

data->smu_features[GNLD_DS_LCLK].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2786

false, data->smu_features[GNLD_DS_DCEFCLK].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2789

data->smu_features[GNLD_DS_DCEFCLK].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2803

false, data->smu_features[GNLD_LED_DISPLAY].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2805

data->smu_features[GNLD_LED_DISPLAY].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2814

data->smu_features[i].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2820

vega10_enable_smc_features(hwmgr, false, feature_mask);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2854

data->smu_features[i].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2868

data->vbios_boot_state.bsoc_vddc_lock = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3006

power_state->classification.temporary_state = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3007

power_state->classification.to_be_deleted = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3013

power_state->display.disableFrameModulation = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3014

power_state->display.limitRefreshrate = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3190

disable_mclk_switching = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3350

dpm_table->dpm_levels[i].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3367

dpm_table->dpm_levels[i].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3369

dpm_table->dpm_levels[i].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

353

data->smu_features[i].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

354

data->smu_features[i].supported = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3629

result = smum_smc_table_manager(hwmgr, (uint8_t *)pp_table, PPTABLE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3852

vega10_notify_smc_display_change(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4095

if (data->smu_features[GNLD_FAN_CONTROL].enabled == false)

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4370

result = smum_smc_table_manager(hwmgr, (uint8_t *)wm_table, WMTABLE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4439

*equal = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4446

*equal = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4463

bool is_update_required = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4491

tmp_result = vega10_avfs_enable(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4511

vega10_enable_disable_PCC_limit_feature(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4756

return false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4766

return false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4775

return false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4778

return false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

835

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

881

data->is_tlu_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

987

bool found = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1033

vega10_didt_set_mask(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1088

vega10_didt_set_mask(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1147

vega10_didt_set_mask(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1178

vega10_didt_set_mask(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1280

result = vega10_enable_smc_features(hwmgr, false, data->smu_features[GNLD_DIDT].smu_feature_bitmap);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1282

data->smu_features[GNLD_DIDT].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1355

data->smu_features[GNLD_PPT].supported = false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1361

data->smu_features[GNLD_TDC].supported = false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1379

false, data->smu_features[GNLD_PPT].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1381

data->smu_features[GNLD_PPT].supported = false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1385

false, data->smu_features[GNLD_TDC].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1387

data->smu_features[GNLD_TDC].supported = false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

980

vega10_didt_set_mask(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

266

bool is_acg_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

649

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

139

hwmgr->fan_ctrl_is_in_default_mode = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

206

hwmgr, false,

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

211

data->smu_features[GNLD_FAN_CONTROL].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

467

false,

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

471

data->smu_features[GNLD_FW_CTF].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

553

PPTABLE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1173

vega12_get_clock_ranges(hwmgr, &gfx_clk, PPCLK_GFXCLK, false) == 0,

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1196

vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, false) == 0,

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1271

PP_ASSERT(false,

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1276

PP_ASSERT(false,

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1400

vega12_notify_smc_display_change(hwmgr, false);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1592

if (data->smu_features[GNLD_FAN_CONTROL].enabled == false)

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1909

bool vblank_too_short = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2113

(uint8_t *)wm_table, TABLE_WATERMARKS, false);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2171

bool is_update_required = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

353

false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

393

data->avfs_exist = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

402

data->is_tlu_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

429

data->gfxoff_controlled_by_driver = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

749

(uint8_t *)pp_table, TABLE_PPTABLE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

791

data->uvd_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

794

data->vce_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

812

enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

838

enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

47

fan_speed_info->supports_percent_read = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

48

fan_speed_info->supports_percent_write = false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

94

hwmgr, false,

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

99

data->smu_features[GNLD_FAN_CONTROL].enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1234

ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1310

ret = smum_smc_table_manager(hwmgr, (uint8_t *)(&od_table), TABLE_OVERDRIVE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

136

data->gfxoff_allowed = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1537

data->uvd_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1540

data->vce_power_gated = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1878

ret = vega20_get_clock_ranges(hwmgr, &gfx_clk, PPCLK_GFXCLK, false);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1904

ret = vega20_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, false);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2353

if (data->smu_features[GNLD_FAN_CONTROL].enabled == false)

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2723

data->gfxclk_overdrive = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2724

data->memclk_overdrive = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2737

TABLE_OVERDRIVE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2744

data->gfxclk_overdrive = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2753

data->memclk_overdrive = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2962

(uint8_t *)wm_table, TABLE_WATERMARKS, false);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3033

bool vblank_too_short = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3193

bool is_update_required = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

361

false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

403

data->avfs_exist = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

412

data->is_tlu_enabled = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

761

(uint8_t *)pp_table, TABLE_PPTABLE, false);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

828

true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

886

true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

692

bool od_supported = false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

39

hwmgr, false,

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

45

data->smu_features[GNLD_FAN_CONTROL].enabled = false;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2370

bool error = false;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2529

result = false;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

550

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

767

bool vol_found = false;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

959

data->ulv_supported = false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1195

mem_level->StutterEnable = false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1415

table->MemoryACPILevel.StutterEnable = false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

151

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1738

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1837

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2451

bool error = false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2544

? true : false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

302

hwmgr->avfs_supported = false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

325

return false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

332

return false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

615

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

702

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

708

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

713

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

717

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

724

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

730

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

736

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

742

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

749

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2283

bool error = false;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2459

result = false;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2660

? true : false;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

345

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

409

PP_ASSERT_WITH_CODE(false, "Iceland should always support EVV", return -EINVAL);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

446

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

452

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

458

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

464

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

469

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

473

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

480

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

486

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

492

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

499

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

535

bool vol_found = false;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

728

data->ulv_supported = false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1102

mem_level->StutterEnable = false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1269

table->MemoryACPILevel.StutterEnable = false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1582

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1609

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1716

data->apply_avfs_cks_off_voltage = (avfs_params.ucEnableApplyAVFS_CKS_OFF_Voltage == 1) ? true : false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

2328

bool error = false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

237

PP_ASSERT_WITH_CODE(false, "SMU Firmware start failed!", return -1);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

2397

? true : false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

330

return false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

512

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

596

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

601

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

606

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

610

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

616

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

621

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

626

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

631

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

638

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

430

TASK_TYPE_UCODE_SAVE, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

448

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_CE, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

450

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_PFP, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

452

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_ME, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

454

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT1, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

458

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT1, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

461

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT2, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

464

SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_G, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

469

TASK_TYPE_UCODE_LOAD, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

473

TASK_TYPE_UCODE_LOAD, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

501

SMU8_SCRATCH_ENTRY_UCODE_ID_SDMA0, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

504

SMU8_SCRATCH_ENTRY_UCODE_ID_SDMA1, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

506

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_CE, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

508

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_PFP, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

510

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_ME, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

512

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT1, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

515

SMU8_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT2, false);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

872

return false;

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

879

return false;

sys/dev/drm/amd/powerplay/smumgr/smu9_smumgr.c

52

return false;

sys/dev/drm/amd/powerplay/smumgr/smumgr.c

198

return false;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1661

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1920

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2006

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2012

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2017

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2022

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2028

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2034

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2041

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2048

false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2056

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2760

bool error = false;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2919

result = false;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3142

? true : false;

sys/dev/drm/amd/powerplay/smumgr/vega10_smumgr.c

122

return false;

sys/dev/drm/amd/powerplay/smumgr/vega12_smumgr.c

179

return false;

sys/dev/drm/amd/powerplay/smumgr/vega20_smumgr.c

560

return false;

sys/dev/drm/amd/powerplay/smumgr/vega20_smumgr.c

61

return false;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1008

mem_level->StutterEnable = false;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1188

table->MemoryACPILevel.StutterEnable = false;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

140

PP_ASSERT_WITH_CODE(false, "SMU Firmware start failed!", return -1);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1543

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1566

return false;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1670

(avfs_params.ucEnableApplyAVFS_CKS_OFF_Voltage == 1) ? true : false;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1691

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1717

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1779

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1863

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1868

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1873

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1877

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1883

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1888

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1893

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1898

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1906

PP_ASSERT_WITH_CODE(false,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

232

bool error = false;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

301

? true : false;

sys/dev/drm/drm_atomic.c

1051

return config->funcs->atomic_commit(state->dev, state, false);

sys/dev/drm/drm_atomic.c

1162

__drm_state_dump(dev, p, false);

sys/dev/drm/drm_atomic.c

497

return false;

sys/dev/drm/drm_atomic.c

500

return false;

sys/dev/drm/drm_atomic_helper.c

1525

drm_atomic_helper_wait_for_fences(dev, old_state, false);

sys/dev/drm/drm_atomic_helper.c

195

crtc_state->active = false;

sys/dev/drm/drm_atomic_helper.c

2899

new_crtc_state->active = false;

sys/dev/drm/drm_atomic_helper.c

2976

crtc_state->active = false;

sys/dev/drm/drm_atomic_helper.c

3051

crtc_state->active = false;

sys/dev/drm/drm_atomic_helper.c

3112

return __drm_atomic_helper_disable_all(dev, ctx, false);

sys/dev/drm/drm_atomic_helper.c

3334

state->allow_modeset = false;

sys/dev/drm/drm_atomic_helper.c

3519

state->mode_changed = false;

sys/dev/drm/drm_atomic_helper.c

3520

state->active_changed = false;

sys/dev/drm/drm_atomic_helper.c

3521

state->planes_changed = false;

sys/dev/drm/drm_atomic_helper.c

3522

state->connectors_changed = false;

sys/dev/drm/drm_atomic_helper.c

3523

state->color_mgmt_changed = false;

sys/dev/drm/drm_atomic_helper.c

3524

state->zpos_changed = false;

sys/dev/drm/drm_atomic_helper.c

636

ret = handle_conflicting_encoders(state, false);

sys/dev/drm/drm_atomic_helper.c

760

plane_state->visible = false;

sys/dev/drm/drm_atomic_helper.c

766

plane_state->visible = false;

sys/dev/drm/drm_atomic_helper.c

783

drm_rect_debug_print("dst: ", &plane_state->dst, false);

sys/dev/drm/drm_atomic_helper.c

806

drm_rect_debug_print("dst: ", dst, false);

sys/dev/drm/drm_atomic_helper.c

807

drm_rect_debug_print("clip: ", &clip, false);

sys/dev/drm/drm_atomic_uapi.c

153

state->enable = false;

sys/dev/drm/drm_atomic_uapi.c

425

bool replaced = false;

sys/dev/drm/drm_atomic_uapi.c

883

bool active = false;

sys/dev/drm/drm_atomic_uapi.c

92

state->enable = false;

sys/dev/drm/drm_auth.c

221

ret = drm_set_master(dev, file_priv, false);

sys/dev/drm/drm_connector.c

1690

return false;

sys/dev/drm/drm_connector.c

1706

return false;

sys/dev/drm/drm_connector.c

210

false, drm_connector_free);

sys/dev/drm/drm_connector.c

358

return false;

sys/dev/drm/drm_crtc_helper.c

114

return false;

sys/dev/drm/drm_crtc_helper.c

144

return false;

sys/dev/drm/drm_crtc_helper.c

294

return false;

sys/dev/drm/drm_crtc_helper.c

521

bool mode_changed = false; /* if true do a full mode set */

sys/dev/drm/drm_crtc_helper.c

522

bool fb_changed = false; /* if true and !mode_changed just do a flip */

sys/dev/drm/drm_crtc_helper.c

959

if (ret == false)

sys/dev/drm/drm_dp_helper.c

1101

drm_crtc_add_crc_entry(crtc, false, 0, crcs);

sys/dev/drm/drm_dp_helper.c

1281

{ OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a', 'r', 'T'), false, BIT(DP_DPCD_QUIRK_CONSTANT_N) },

sys/dev/drm/drm_dp_helper.c

70

return false;

sys/dev/drm/drm_dp_helper.c

74

return false;

sys/dev/drm/drm_dp_helper.c

89

return false;

sys/dev/drm/drm_dp_mst_topology.c

1075

bool send_link = false;

sys/dev/drm/drm_dp_mst_topology.c

1146

bool created = false;

sys/dev/drm/drm_dp_mst_topology.c

1235

bool dowork = false;

sys/dev/drm/drm_dp_mst_topology.c

1403

return false;

sys/dev/drm/drm_dp_mst_topology.c

1560

ret = process_single_tx_qlock(mgr, txmsg, false);

sys/dev/drm/drm_dp_mst_topology.c

1645

mstb->link_address_sent = false;

sys/dev/drm/drm_dp_mst_topology.c

171

return false;

sys/dev/drm/drm_dp_mst_topology.c

175

return false;

sys/dev/drm/drm_dp_mst_topology.c

180

return false;

sys/dev/drm/drm_dp_mst_topology.c

2085

return false;

sys/dev/drm/drm_dp_mst_topology.c

2276

return false;

sys/dev/drm/drm_dp_mst_topology.c

2281

return false;

sys/dev/drm/drm_dp_mst_topology.c

2295

return false;

sys/dev/drm/drm_dp_mst_topology.c

2298

ret = drm_dp_sideband_msg_build(msg, replyblock, len, false);

sys/dev/drm/drm_dp_mst_topology.c

2301

return false;

sys/dev/drm/drm_dp_mst_topology.c

2314

if (!drm_dp_get_one_sb_msg(mgr, false)) {

sys/dev/drm/drm_dp_mst_topology.c

2401

drm_dp_send_up_ack_reply(mgr, mgr->mst_primary, msg.req_type, seqno, false);

sys/dev/drm/drm_dp_mst_topology.c

2418

drm_dp_send_up_ack_reply(mgr, mgr->mst_primary, msg.req_type, seqno, false);

sys/dev/drm/drm_dp_mst_topology.c

2454

*handled = false;

sys/dev/drm/drm_dp_mst_topology.c

2532

bool ret = false;

sys/dev/drm/drm_dp_mst_topology.c

2701

return false;

sys/dev/drm/drm_dp_mst_topology.c

2704

return false;

sys/dev/drm/drm_dp_mst_topology.c

2726

return false;

sys/dev/drm/drm_dp_mst_topology.c

2985

return false;

sys/dev/drm/drm_dp_mst_topology.c

3097

bool send_hotplug = false;

sys/dev/drm/drm_dp_mst_topology.c

3280

bool reading = false;

sys/dev/drm/drm_dp_mst_topology.c

336

if (ret == false) {

sys/dev/drm/drm_dp_mst_topology.c

337

print_hex_dump(KERN_DEBUG, "failed hdr", DUMP_PREFIX_NONE, 16, 1, replybuf, replybuflen, false);

sys/dev/drm/drm_dp_mst_topology.c

338

return false;

sys/dev/drm/drm_dp_mst_topology.c

346

return false;

sys/dev/drm/drm_dp_mst_topology.c

354

return false;

sys/dev/drm/drm_dp_mst_topology.c

430

return false;

sys/dev/drm/drm_dp_mst_topology.c

450

return false;

sys/dev/drm/drm_dp_mst_topology.c

464

return false;

sys/dev/drm/drm_dp_mst_topology.c

483

return false;

sys/dev/drm/drm_dp_mst_topology.c

505

return false;

sys/dev/drm/drm_dp_mst_topology.c

527

return false;

sys/dev/drm/drm_dp_mst_topology.c

545

return false;

sys/dev/drm/drm_dp_mst_topology.c

558

return false;

sys/dev/drm/drm_dp_mst_topology.c

574

return false;

sys/dev/drm/drm_dp_mst_topology.c

597

return false;

sys/dev/drm/drm_dp_mst_topology.c

625

return false;

sys/dev/drm/drm_dp_mst_topology.c

648

return false;

sys/dev/drm/drm_dp_mst_topology.c

664

return false;

sys/dev/drm/drm_dp_mst_topology.c

872

bool wake_tx = false;

sys/dev/drm/drm_drv.c

1285

bool found = false;

sys/dev/drm/drm_drv.c

378

return false;

sys/dev/drm/drm_drv.c

94

static bool drm_core_init_complete = false;

sys/dev/drm/drm_drv.c

948

dev->registered = false;

sys/dev/drm/drm_edid.c

1375

return false;

sys/dev/drm/drm_edid.c

1399

return false;

sys/dev/drm/drm_edid.c

1408

*edid_corrupt = false;

sys/dev/drm/drm_edid.c

1469

raw_edid, EDID_LENGTH, false);

sys/dev/drm/drm_edid.c

1472

return false;

sys/dev/drm/drm_edid.c

1490

return false;

sys/dev/drm/drm_edid.c

1494

return false;

sys/dev/drm/drm_edid.c

1581

else if (!drm_edid_block_valid(block, i, false, NULL))

sys/dev/drm/drm_edid.c

1588

block, EDID_LENGTH, false);

sys/dev/drm/drm_edid.c

1637

if (drm_edid_block_valid(edid, 0, false,

sys/dev/drm/drm_edid.c

1665

if (drm_edid_block_valid(block, j, false, NULL))

sys/dev/drm/drm_edid.c

1690

if (!drm_edid_block_valid(block, i, false, NULL))

sys/dev/drm/drm_edid.c

2000

bool ret = false;

sys/dev/drm/drm_edid.c

2150

false);

sys/dev/drm/drm_edid.c

2166

mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);

sys/dev/drm/drm_edid.c

2198

false);

sys/dev/drm/drm_edid.c

2292

mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);

sys/dev/drm/drm_edid.c

2413

return false;

sys/dev/drm/drm_edid.c

2416

return false;

sys/dev/drm/drm_edid.c

2420

return false;

sys/dev/drm/drm_edid.c

2425

return false;

sys/dev/drm/drm_edid.c

2428

return false;

sys/dev/drm/drm_edid.c

2437

bool ok = false;

sys/dev/drm/drm_edid.c

2443

return false; /* duplicated */

sys/dev/drm/drm_edid.c

2772

false, false);

sys/dev/drm/drm_edid.c

2837

closure->preferred = false;

sys/dev/drm/drm_edid.c

2972

return false;

sys/dev/drm/drm_edid.c

3653

return false;

sys/dev/drm/drm_edid.c

3656

return false;

sys/dev/drm/drm_edid.c

3668

return false;

sys/dev/drm/drm_edid.c

3671

return false;

sys/dev/drm/drm_edid.c

3681

return false;

sys/dev/drm/drm_edid.c

3684

return false;

sys/dev/drm/drm_edid.c

3687

return false;

sys/dev/drm/drm_edid.c

3695

return false;

sys/dev/drm/drm_edid.c

3698

return false;

sys/dev/drm/drm_edid.c

3701

return false;

sys/dev/drm/drm_edid.c

3921

connector->latency_present[0] = false;

sys/dev/drm/drm_edid.c

3922

connector->latency_present[1] = false;

sys/dev/drm/drm_edid.c

4195

return false;

sys/dev/drm/drm_edid.c

4198

return false;

sys/dev/drm/drm_edid.c

4209

return false;

sys/dev/drm/drm_edid.c

4229

bool has_audio = false;

sys/dev/drm/drm_edid.c

4277

return false;

sys/dev/drm/drm_edid.c

4280

return false;

sys/dev/drm/drm_edid.c

4292

return false;

sys/dev/drm/drm_edid.c

4507

info->dvi_dual = false;

sys/dev/drm/drm_edid.c

4508

info->has_hdmi_infoframe = false;

sys/dev/drm/drm_edid.c

5065

connector->display_info.has_hdmi_infoframe : false;

sys/dev/drm/drm_edid.c

5204

connector->has_tile = false;

sys/dev/drm/drm_encoder.c

190

bool uses_atomic = false;

sys/dev/drm/drm_fb_helper.c

2138

if (cmdline_mode->specified == false)

sys/dev/drm/drm_fb_helper.c

2171

prefer_non_interlace = false;

sys/dev/drm/drm_fb_helper.c

2188

return false;

sys/dev/drm/drm_fb_helper.c

2201

bool any_enabled = false;

sys/dev/drm/drm_fb_helper.c

2219

enabled[i] = drm_connector_enabled(connector, false);

sys/dev/drm/drm_fb_helper.c

2229

bool can_clone = false;

sys/dev/drm/drm_fb_helper.c

2235

return false;

sys/dev/drm/drm_fb_helper.c

2245

return false;

sys/dev/drm/drm_fb_helper.c

2255

can_clone = false;

sys/dev/drm/drm_fb_helper.c

2266

can_clone = false;

sys/dev/drm/drm_fb_helper.c

2277

dmt_mode = drm_mode_find_dmt(fb_helper->dev, 1024, 768, 60, false);

sys/dev/drm/drm_fb_helper.c

2293

can_clone = false;

sys/dev/drm/drm_fb_helper.c

2301

return false;

sys/dev/drm/drm_fb_helper.c

2354

if (enabled[i] == false) {

sys/dev/drm/drm_fb_helper.c

2419

return false;

sys/dev/drm/drm_fb_helper.c

2731

fb_helper->deferred_setup = false;

sys/dev/drm/drm_fb_helper.c

447

crtc_state->active = false;

sys/dev/drm/drm_fb_helper.c

549

fb_helper->delayed_hotplug = false;

sys/dev/drm/drm_fb_helper.c

570

return false;

sys/dev/drm/drm_fb_helper.c

582

return false;

sys/dev/drm/drm_fb_helper.c

594

bool ret, error = false;

sys/dev/drm/drm_fb_helper.c

598

return false;

sys/dev/drm/drm_fb_helper.c

71

static bool drm_leak_fbdev_smem = false;

sys/dev/drm/drm_framebuffer.c

745

false, drm_framebuffer_free);

sys/dev/drm/drm_framebuffer.c

850

bool disable_crtcs = false;

sys/dev/drm/drm_framebuffer.c

889

crtc_state->active = false;

sys/dev/drm/drm_gem.c

280

bool final = false;

sys/dev/drm/drm_gem.c

543

obj->on_map = false;

sys/dev/drm/drm_ioctl.c

892

return false;

sys/dev/drm/drm_ioctl.c

895

return false;

sys/dev/drm/drm_irq.c

134

dev->irq_enabled = false;

sys/dev/drm/drm_irq.c

143

dev->irq_enabled = false;

sys/dev/drm/drm_irq.c

183

dev->irq_enabled = false;

sys/dev/drm/drm_mipi_dsi.c

401

return false;

sys/dev/drm/drm_mipi_dsi.c

433

return false;

sys/dev/drm/drm_mm.c

202

leftmost = false;

sys/dev/drm/drm_mm.c

218

leftmost = false;

sys/dev/drm/drm_mm.c

266

first = false;

sys/dev/drm/drm_mm.c

607

node->allocated = false;

sys/dev/drm/drm_mm.c

645

old->allocated = false;

sys/dev/drm/drm_mm.c

779

return false;

sys/dev/drm/drm_mm.c

797

return false;

sys/dev/drm/drm_mm.c

801

return false;

sys/dev/drm/drm_mm.c

842

node->scanned_block = false;

sys/dev/drm/drm_mm.c

940

mm->head_node.allocated = false;

sys/dev/drm/drm_mode_object.c

122

return false;

sys/dev/drm/drm_modes.c

1013

return false;

sys/dev/drm/drm_modes.c

1017

return false;

sys/dev/drm/drm_modes.c

1021

return false;

sys/dev/drm/drm_modes.c

1025

return false;

sys/dev/drm/drm_modes.c

1029

return false;

sys/dev/drm/drm_modes.c

1033

return false;

sys/dev/drm/drm_modes.c

1371

bool found_it = false;

sys/dev/drm/drm_modes.c

1441

bool res_specified = false, bpp_specified = false, refresh_specified = false;

sys/dev/drm/drm_modes.c

1443

bool yres_specified = false, cvt = false, rb = false;

sys/dev/drm/drm_modes.c

1444

bool interlace = false, margins = false, was_digit = false;

sys/dev/drm/drm_modes.c

1454

mode->specified = false;

sys/dev/drm/drm_modes.c

1455

return false;

sys/dev/drm/drm_modes.c

1467

was_digit = false;

sys/dev/drm/drm_modes.c

1476

was_digit = false;

sys/dev/drm/drm_modes.c

1484

was_digit = false;

sys/dev/drm/drm_modes.c

1556

mode->specified = false;

sys/dev/drm/drm_modes.c

1557

return false;

sys/dev/drm/drm_modeset_lock.c

354

return modeset_lock(lock, ctx, ctx->interruptible, false);

sys/dev/drm/drm_plane_helper.c

251

false, false, &visible);

sys/dev/drm/drm_probe_helper.c

224

bool poll = false;

sys/dev/drm/drm_probe_helper.c

476

verbose_prune = false;

sys/dev/drm/drm_probe_helper.c

577

bool repoll = false, changed;

sys/dev/drm/drm_probe_helper.c

581

dev->mode_config.delayed_event = false;

sys/dev/drm/drm_probe_helper.c

611

connector->status = drm_helper_probe_detect(connector, NULL, false);

sys/dev/drm/drm_probe_helper.c

676

return false;

sys/dev/drm/drm_probe_helper.c

769

bool changed = false;

sys/dev/drm/drm_probe_helper.c

772

return false;

sys/dev/drm/drm_probe_helper.c

783

connector->status = drm_helper_probe_detect(connector, NULL, false);

sys/dev/drm/drm_property.c

63

return false;

sys/dev/drm/drm_property.c

67

return false;

sys/dev/drm/drm_property.c

71

return false;

sys/dev/drm/drm_property.c

742

return false;

sys/dev/drm/drm_property.c

822

bool found = false;

sys/dev/drm/drm_property.c

878

return false;

sys/dev/drm/drm_property.c

884

return false;

sys/dev/drm/drm_property.c

891

return false;

sys/dev/drm/drm_property.c

910

return false;

sys/dev/drm/drm_property.c

925

return false;

sys/dev/drm/drm_scdc_helper.c

145

return false;

sys/dev/drm/drm_scdc_helper.c

172

return false;

sys/dev/drm/drm_scdc_helper.c

183

return false;

sys/dev/drm/drm_scdc_helper.c

227

return false;

sys/dev/drm/drm_scdc_helper.c

238

return false;

sys/dev/drm/drm_simple_kms_helper.c

144

false, true);

sys/dev/drm/drm_vblank.c

1284

drm_get_last_vbltimestamp(dev, pipe, &t_vblank, false);

sys/dev/drm/drm_vblank.c

1483

return false;

sys/dev/drm/drm_vblank.c

160

rc = drm_get_last_vbltimestamp(dev, pipe, &t_vblank, false);

sys/dev/drm/drm_vblank.c

1690

return false;

sys/dev/drm/drm_vblank.c

1693

return false;

sys/dev/drm/drm_vblank.c

1707

return false;

sys/dev/drm/drm_vblank.c

310

drm_update_vblank_count(dev, pipe, false);

sys/dev/drm/drm_vblank.c

370

drm_update_vblank_count(dev, pipe, false);

sys/dev/drm/drm_vblank.c

372

vblank->enabled = false;

sys/dev/drm/drm_vblank.c

461

dev->vblank_disable_immediate = false;

sys/dev/drm/drm_vblank.c

595

return false;

sys/dev/drm/drm_vblank.c

601

return false;

sys/dev/drm/drm_vblank.c

607

return false;

sys/dev/drm/drm_vblank.c

622

return false;

sys/dev/drm/drm_vblank.c

647

return false;

sys/dev/drm/drm_vblank.c

720

bool ret = false;

sys/dev/drm/i915/dvo_ch7017.c

209

return false;

sys/dev/drm/i915/dvo_ch7017.c

240

return false;

sys/dev/drm/i915/dvo_ch7017.c

312

ch7017_dpms(dvo, false);

sys/dev/drm/i915/dvo_ch7017.c

369

return false;

sys/dev/drm/i915/dvo_ch7xxx.c

169

return false;

sys/dev/drm/i915/dvo_ch7xxx.c

196

return false;

sys/dev/drm/i915/dvo_ch7xxx.c

209

return false;

sys/dev/drm/i915/dvo_ch7xxx.c

236

ch7xxx->quiet = false;

sys/dev/drm/i915/dvo_ch7xxx.c

242

return false;

sys/dev/drm/i915/dvo_ch7xxx.c

331

return false;

sys/dev/drm/i915/dvo_ivch.c

230

return false;

sys/dev/drm/i915/dvo_ivch.c

258

return false;

sys/dev/drm/i915/dvo_ivch.c

271

return false;

sys/dev/drm/i915/dvo_ivch.c

279

priv->quiet = false;

sys/dev/drm/i915/dvo_ivch.c

307

return false;

sys/dev/drm/i915/dvo_ivch.c

388

return false;

sys/dev/drm/i915/dvo_ivch.c

393

return false;

sys/dev/drm/i915/dvo_ns2501.c

428

return false;

sys/dev/drm/i915/dvo_ns2501.c

462

return false;

sys/dev/drm/i915/dvo_ns2501.c

480

return false;

sys/dev/drm/i915/dvo_ns2501.c

503

ns->quiet = false;

sys/dev/drm/i915/dvo_ns2501.c

511

return false;

sys/dev/drm/i915/dvo_ns2501.c

649

return false;

sys/dev/drm/i915/dvo_sil164.c

102

return false;

sys/dev/drm/i915/dvo_sil164.c

128

return false;

sys/dev/drm/i915/dvo_sil164.c

141

return false;

sys/dev/drm/i915/dvo_sil164.c

164

sil->quiet = false;

sys/dev/drm/i915/dvo_sil164.c

171

return false;

sys/dev/drm/i915/dvo_sil164.c

217

if (ret == false)

sys/dev/drm/i915/dvo_sil164.c

235

if (ret == false)

sys/dev/drm/i915/dvo_sil164.c

236

return false;

sys/dev/drm/i915/dvo_sil164.c

241

return false;

sys/dev/drm/i915/dvo_tfp410.c

127

return false;

sys/dev/drm/i915/dvo_tfp410.c

153

return false;

sys/dev/drm/i915/dvo_tfp410.c

177

return false;

sys/dev/drm/i915/dvo_tfp410.c

196

tfp->quiet = false;

sys/dev/drm/i915/dvo_tfp410.c

200

return false;

sys/dev/drm/i915/dvo_tfp410.c

257

return false;

sys/dev/drm/i915/dvo_tfp410.c

262

return false;

sys/dev/drm/i915/gvt/mpt.h

200

p->writeprotection = false;

sys/dev/drm/i915/i915_cmd_parser.c

1138

return false;

sys/dev/drm/i915/i915_cmd_parser.c

1144

return false;

sys/dev/drm/i915/i915_cmd_parser.c

1165

return false;

sys/dev/drm/i915/i915_cmd_parser.c

1176

return false;

sys/dev/drm/i915/i915_cmd_parser.c

1182

return false;

sys/dev/drm/i915/i915_cmd_parser.c

1190

return false;

sys/dev/drm/i915/i915_cmd_parser.c

1218

return false;

sys/dev/drm/i915/i915_cmd_parser.c

1230

return false;

sys/dev/drm/i915/i915_cmd_parser.c

1265

bool needs_clflush_after = false;

sys/dev/drm/i915/i915_cmd_parser.c

1356

bool active = false;

sys/dev/drm/i915/i915_cmd_parser.c

636

{ gen7_render_regs, ARRAY_SIZE(gen7_render_regs), false },

sys/dev/drm/i915/i915_cmd_parser.c

641

{ gen7_blt_regs, ARRAY_SIZE(gen7_blt_regs), false },

sys/dev/drm/i915/i915_cmd_parser.c

646

{ gen7_render_regs, ARRAY_SIZE(gen7_render_regs), false },

sys/dev/drm/i915/i915_cmd_parser.c

647

{ hsw_render_regs, ARRAY_SIZE(hsw_render_regs), false },

sys/dev/drm/i915/i915_cmd_parser.c

652

{ gen7_blt_regs, ARRAY_SIZE(gen7_blt_regs), false },

sys/dev/drm/i915/i915_cmd_parser.c

736

ret = false;

sys/dev/drm/i915/i915_cmd_parser.c

762

ret = false;

sys/dev/drm/i915/i915_cmd_parser.c

779

return false;

sys/dev/drm/i915/i915_drv.c

1150

return false;

sys/dev/drm/i915/i915_drv.c

1385

dram_info->valid = false;

sys/dev/drm/i915/i915_drv.c

1949

return false;

sys/dev/drm/i915/i915_drv.c

2103

return i915_drm_suspend_late(dev, false);

sys/dev/drm/i915/i915_drv.c

2168

intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false);

sys/dev/drm/i915/i915_drv.c

2232

ret = vlv_resume_prepare(dev_priv, false);

sys/dev/drm/i915/i915_drv.c

2525

return i915_drm_suspend_late(dev, false);

sys/dev/drm/i915/i915_drv.c

2915

vlv_wait_for_gt_wells(dev_priv, false);

sys/dev/drm/i915/i915_drv.c

2926

err = vlv_allow_gt_wake(dev_priv, false);

sys/dev/drm/i915/i915_drv.c

2933

err = vlv_force_gfx_clock(dev_priv, false);

sys/dev/drm/i915/i915_drv.c

2943

vlv_force_gfx_clock(dev_priv, false);

sys/dev/drm/i915/i915_drv.c

2968

err = vlv_force_gfx_clock(dev_priv, false);

sys/dev/drm/i915/i915_drv.c

3091

dev_priv->runtime_pm.suspended = false;

sys/dev/drm/i915/i915_drv.c

541

dev_priv->mchbar_need_disable = false;

sys/dev/drm/i915/i915_drv.c

687

ret = vga_switcheroo_register_client(pdev, &i915_switcheroo_ops, false);

sys/dev/drm/i915/i915_drv.c

69

return false;

sys/dev/drm/i915/i915_drv.c

695

intel_power_domains_init_hw(dev_priv, false);

sys/dev/drm/i915/i915_drv.c

78

return false;

sys/dev/drm/i915/i915_drv.c

913

bool pre = false;

sys/dev/drm/i915/i915_drv.h

121

#define i915_inject_load_failure() false

sys/dev/drm/i915/i915_drv.h

122

#define i915_error_injected() false

sys/dev/drm/i915/i915_drv.h

1227

return false;

sys/dev/drm/i915/i915_drv.h

144

return false;

sys/dev/drm/i915/i915_drv.h

2326

for ((__iter) = __sgt_iter((__sgt)->sgl, false); \

sys/dev/drm/i915/i915_drv.h

2330

(__iter) = __sgt_iter(__sg_next((__iter).sgp), false), 0 : 0)

sys/dev/drm/i915/i915_drv.h

2650

#define HAS_RC6pp(dev_priv) (false) /* HW was never validated */

sys/dev/drm/i915/i915_drv.h

2738

return false;

sys/dev/drm/i915/i915_drv.h

3612

#define I915_READ16_NOTRACE(reg) dev_priv->uncore.funcs.mmio_readw(dev_priv, (reg), false)

sys/dev/drm/i915/i915_drv.h

3613

#define I915_WRITE16_NOTRACE(reg, val) dev_priv->uncore.funcs.mmio_writew(dev_priv, (reg), (val), false)

sys/dev/drm/i915/i915_drv.h

3617

#define I915_READ_NOTRACE(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), false)

sys/dev/drm/i915/i915_drv.h

3618

#define I915_WRITE_NOTRACE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), false)

sys/dev/drm/i915/i915_drv.h

3788

return false;

sys/dev/drm/i915/i915_drv.h

3846

return false;

sys/dev/drm/i915/i915_gem.c

1220

node.allocated = false;

sys/dev/drm/i915/i915_gem.c

1234

ret = i915_gem_object_set_to_gtt_domain(obj, false);

sys/dev/drm/i915/i915_gem.c

1423

node.allocated = false;

sys/dev/drm/i915/i915_gem.c

181

i915->gt.awake = false;

sys/dev/drm/i915/i915_gem.c

1881

return false;

sys/dev/drm/i915/i915_gem.c

2162

vm_object_page_remove(devobj, 0, 0, false);

sys/dev/drm/i915/i915_gem.c

2380

if (vm_page_busy_try(m, false)) {

sys/dev/drm/i915/i915_gem.c

2405

if (vm_page_busy_try(m, false)) {

sys/dev/drm/i915/i915_gem.c

2688

vm_object_page_remove(vm_obj, 0, 0, false);

sys/dev/drm/i915/i915_gem.c

2753

obj->mm.dirty = false;

sys/dev/drm/i915/i915_gem.c

2839

return false;

sys/dev/drm/i915/i915_gem.c

2842

return false;

sys/dev/drm/i915/i915_gem.c

3223

pinned = false;

sys/dev/drm/i915/i915_gem.c

3533

stalled = false;

sys/dev/drm/i915/i915_gem.c

379

obj->mm.dirty = false;

sys/dev/drm/i915/i915_gem.c

3796

return false;

sys/dev/drm/i915/i915_gem.c

393

__i915_gem_object_release_shmem(obj, pages, false);

sys/dev/drm/i915/i915_gem.c

3994

rearm_hangcheck = false;

sys/dev/drm/i915/i915_gem.c

423

obj->mm.dirty = false;

sys/dev/drm/i915/i915_gem.c

459

ret = i915_gem_object_set_to_cpu_domain(obj, false);

sys/dev/drm/i915/i915_gem.c

5058

obj->mm.quirked = false;

sys/dev/drm/i915/i915_gem.c

5242

return false;

sys/dev/drm/i915/i915_gem.c

5257

return false;

sys/dev/drm/i915/i915_gem.c

536

bool prune_fences = false;

sys/dev/drm/i915/i915_gem.c

5571

WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));

sys/dev/drm/i915/i915_gem.c

5852

err = i915_gem_object_set_to_cpu_domain(state->obj, false);

sys/dev/drm/i915/i915_gem.c

64

return false;

sys/dev/drm/i915/i915_gem.c

970

ret = i915_gem_object_set_to_cpu_domain(obj, false);

sys/dev/drm/i915/i915_gem_clflush.c

124

obj->cache_dirty = false;

sys/dev/drm/i915/i915_gem_clflush.c

125

return false;

sys/dev/drm/i915/i915_gem_clflush.c

138

return false;

sys/dev/drm/i915/i915_gem_clflush.c

176

obj->cache_dirty = false;

sys/dev/drm/i915/i915_gem_context.c

673

bool any_active = false;

sys/dev/drm/i915/i915_gem_context.c

697

return false;

sys/dev/drm/i915/i915_gem_dmabuf.c

211

err = i915_gem_object_set_to_gtt_domain(obj, false);

sys/dev/drm/i915/i915_gem_evict.c

46

return false;

sys/dev/drm/i915/i915_gem_evict.c

50

return false;

sys/dev/drm/i915/i915_gem_evict.c

88

return false;

sys/dev/drm/i915/i915_gem_evict.c

91

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

1165

err = i915_gem_object_set_to_wc_domain(obj, false);

sys/dev/drm/i915/i915_gem_execbuffer.c

1340

wide = false;

sys/dev/drm/i915/i915_gem_execbuffer.c

1687

bool have_copy = false;

sys/dev/drm/i915/i915_gem_execbuffer.c

1887

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

1892

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

1900

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

1903

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

390

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

411

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

416

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

579

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

585

return false;

sys/dev/drm/i915/i915_gem_execbuffer.c

915

cache->node.allocated = false;

sys/dev/drm/i915/i915_gem_fence_reg.c

207

fence->dirty = false;

sys/dev/drm/i915/i915_gem_gtt.c

1060

ret = false;

sys/dev/drm/i915/i915_gem_gtt.c

1124

bool maybe_64K = false;

sys/dev/drm/i915/i915_gem_gtt.c

1176

maybe_64K = false;

sys/dev/drm/i915/i915_gem_gtt.c

1386

gen8_ppgtt_notify_vgt(ppgtt, false);

sys/dev/drm/i915/i915_gem_gtt.c

150

has_full_ppgtt = false;

sys/dev/drm/i915/i915_gem_gtt.c

1554

bool found = false;

sys/dev/drm/i915/i915_gem_gtt.c

1933

bool flush = false;

sys/dev/drm/i915/i915_gem_gtt.c

2078

ppgtt->scan_for_unused_pt = false;

sys/dev/drm/i915/i915_gem_gtt.c

3725

WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));

sys/dev/drm/i915/i915_gem_gtt.c

3728

ggtt->vm.closed = false;

sys/dev/drm/i915/i915_gem_gtt.c

525

vm_free_pages_release(vm, false);

sys/dev/drm/i915/i915_gem_gtt.c

884

return false;

sys/dev/drm/i915/i915_gem_internal.c

158

obj->mm.dirty = false;

sys/dev/drm/i915/i915_gem_render_state.c

167

ret = i915_gem_object_set_to_gtt_domain(so->obj, false);

sys/dev/drm/i915/i915_gem_shrinker.c

104

return false;

sys/dev/drm/i915/i915_gem_shrinker.c

412

return false;

sys/dev/drm/i915/i915_gem_shrinker.c

416

return false;

sys/dev/drm/i915/i915_gem_shrinker.c

43

*unlock = false;

sys/dev/drm/i915/i915_gem_shrinker.c

47

*unlock = false;

sys/dev/drm/i915/i915_gem_shrinker.c

84

return false;

sys/dev/drm/i915/i915_gem_shrinker.c

95

return false;

sys/dev/drm/i915/i915_gem_tiling.c

146

return false;

sys/dev/drm/i915/i915_gem_tiling.c

153

return false;

sys/dev/drm/i915/i915_gem_tiling.c

156

return false;

sys/dev/drm/i915/i915_gem_tiling.c

159

return false;

sys/dev/drm/i915/i915_gem_tiling.c

162

return false;

sys/dev/drm/i915/i915_gem_tiling.c

172

return false;

sys/dev/drm/i915/i915_gem_tiling.c

188

return false;

sys/dev/drm/i915/i915_gem_tiling.c

192

return false;

sys/dev/drm/i915/i915_gem_tiling.c

275

obj->mm.quirked = false;

sys/dev/drm/i915/i915_gem_userptr.c

112

mo->attached = false;

sys/dev/drm/i915/i915_gem_userptr.c

560

__i915_gem_userptr_set_active(obj, false);

sys/dev/drm/i915/i915_gem_userptr.c

664

active = false;

sys/dev/drm/i915/i915_gem_userptr.c

695

__i915_gem_userptr_set_active(obj, false);

sys/dev/drm/i915/i915_gem_userptr.c

698

obj->mm.dirty = false;

sys/dev/drm/i915/i915_gem_userptr.c

709

obj->mm.dirty = false;

sys/dev/drm/i915/i915_gpu_error.c

105

return false;

sys/dev/drm/i915/i915_gpu_error.c

1554

count = capture_error_bo(active_bo, count, &vm->active_list, false);

sys/dev/drm/i915/i915_gpu_error.c

1579

found = false;

sys/dev/drm/i915/i915_gpu_error.c

221

return false;

sys/dev/drm/i915/i915_gpu_error.c

225

return false;

sys/dev/drm/i915/i915_gpu_error.c

85

return false;

sys/dev/drm/i915/i915_gpu_error.c

89

return false;

sys/dev/drm/i915/i915_gpu_error.c

99

return false;

sys/dev/drm/i915/i915_irq.c

1005

return false;

sys/dev/drm/i915/i915_irq.c

1283

bool client_boost = false;

sys/dev/drm/i915/i915_irq.c

1496

bool tasklet = false;

sys/dev/drm/i915/i915_irq.c

1588

return false;

sys/dev/drm/i915/i915_irq.c

1602

return false;

sys/dev/drm/i915/i915_irq.c

1614

return false;

sys/dev/drm/i915/i915_irq.c

1630

return false;

sys/dev/drm/i915/i915_irq.c

1640

return false;

sys/dev/drm/i915/i915_irq.c

1656

return false;

sys/dev/drm/i915/i915_irq.c

1666

return false;

sys/dev/drm/i915/i915_irq.c

1680

return false;

sys/dev/drm/i915/i915_irq.c

1694

return false;

sys/dev/drm/i915/i915_irq.c

1959

bool blc_event = false;

sys/dev/drm/i915/i915_irq.c

1983

bool blc_event = false;

sys/dev/drm/i915/i915_irq.c

2731

bool found = false;

sys/dev/drm/i915/i915_irq.c

2771

bool found = false;

sys/dev/drm/i915/i915_irq.c

294

return false;

sys/dev/drm/i915/i915_irq.c

4116

dev_priv->display_irqs_enabled = false;

sys/dev/drm/i915/i915_irq.c

4839

dev_priv->display_irqs_enabled = false;

sys/dev/drm/i915/i915_irq.c

4968

dev_priv->runtime_pm.irqs_enabled = false;

sys/dev/drm/i915/i915_irq.c

4981

dev_priv->runtime_pm.irqs_enabled = false;

sys/dev/drm/i915/i915_irq.c

515

rps->interrupts_enabled = false;

sys/dev/drm/i915/i915_irq.c

564

dev_priv->guc.interrupts_enabled = false;

sys/dev/drm/i915/i915_memcpy.c

84

return false;

sys/dev/drm/i915/i915_memcpy.c

94

return false;

sys/dev/drm/i915/i915_params.h

61

param(bool, fastboot, false) \

sys/dev/drm/i915/i915_params.h

62

param(bool, prefault_disable, false) \

sys/dev/drm/i915/i915_params.h

63

param(bool, load_detect_test, false) \

sys/dev/drm/i915/i915_params.h

64

param(bool, force_reset_modeset_test, false) \

sys/dev/drm/i915/i915_params.h

66

param(bool, disable_display, false) \

sys/dev/drm/i915/i915_params.h

68

param(bool, nuclear_pageflip, false) \

sys/dev/drm/i915/i915_params.h

70

param(bool, enable_dpcd_backlight, false) \

sys/dev/drm/i915/i915_params.h

71

param(bool, enable_gvt, false)

sys/dev/drm/i915/i915_pci.c

122

.has_coherent_ggtt = false,

sys/dev/drm/i915/i915_pci.c

194

.has_snoop = false,

sys/dev/drm/i915/i915_pci.c

204

.has_snoop = false,

sys/dev/drm/i915/i915_pci.c

357

.has_coherent_ggtt = false,

sys/dev/drm/i915/i915_pci.c

450

.has_coherent_ggtt = false,

sys/dev/drm/i915/i915_pci.c

526

.has_coherent_ggtt = false, \

sys/dev/drm/i915/i915_pci.c

590

.has_coherent_ggtt = false, \

sys/dev/drm/i915/i915_pci.c

767

use_kms = false;

sys/dev/drm/i915/i915_pci.c

77

.has_coherent_ggtt = false, \

sys/dev/drm/i915/i915_pci.c

770

use_kms = false;

sys/dev/drm/i915/i915_perf.c

1430

dev_priv->perf.oa.pollin = false;

sys/dev/drm/i915/i915_perf.c

1489

dev_priv->perf.oa.pollin = false;

sys/dev/drm/i915/i915_perf.c

2264

dev_priv->perf.oa.pollin = false;

sys/dev/drm/i915/i915_perf.c

2391

stream->enabled = false;

sys/dev/drm/i915/i915_perf.c

2580

privileged_op = false;

sys/dev/drm/i915/i915_perf.c

2982

return false;

sys/dev/drm/i915/i915_perf.c

3531

dev_priv->perf.initialized = false;

sys/dev/drm/i915/i915_perf.c

542

false : OA_TAKEN(aged_tail, head) >= report_size;

sys/dev/drm/i915/i915_pmu.c

123

i915->pmu.timer_enabled = pmu_needs_timer(i915, false);

sys/dev/drm/i915/i915_pmu.c

170

bool fw = false;

sys/dev/drm/i915/i915_request.c

1210

return false;

sys/dev/drm/i915/i915_request.c

1247

return false;

sys/dev/drm/i915/i915_request.c

1255

return false;

sys/dev/drm/i915/i915_request.c

536

intel_engine_enable_signaling(request, false);

sys/dev/drm/i915/i915_request.c

791

rq->waitboost = false;

sys/dev/drm/i915/i915_request.h

312

return false;

sys/dev/drm/i915/i915_request.h

331

return false;

sys/dev/drm/i915/i915_sw_fence.c

250

return false;

sys/dev/drm/i915/i915_sw_fence.c

263

return false;

sys/dev/drm/i915/i915_sw_fence.c

288

return false;

sys/dev/drm/i915/i915_sw_fence.c

454

return dma_fence_wait(dma, false);

sys/dev/drm/i915/i915_syncmap.c

161

return false;

sys/dev/drm/i915/i915_syncmap.c

170

return false;

sys/dev/drm/i915/i915_syncmap.c

183

return false;

sys/dev/drm/i915/i915_syncmap.c

186

return false;

sys/dev/drm/i915/i915_syncmap.c

193

return false;

sys/dev/drm/i915/i915_sysfs.c

308

bool boost = false;

sys/dev/drm/i915/i915_vma.c

433

return false;

sys/dev/drm/i915/i915_vma.c

453

return false;

sys/dev/drm/i915/i915_vma.c

507

return false;

sys/dev/drm/i915/i915_vma.c

511

return false;

sys/dev/drm/i915/i915_vma.c

877

vm_object_page_remove(devobj, 0, 0, false);

sys/dev/drm/i915/intel_acpi.c

146

return false;

sys/dev/drm/i915/intel_atomic.c

178

crtc_state->update_pipe = false;

sys/dev/drm/i915/intel_atomic.c

179

crtc_state->disable_lp_wm = false;

sys/dev/drm/i915/intel_atomic.c

180

crtc_state->disable_cxsr = false;

sys/dev/drm/i915/intel_atomic.c

181

crtc_state->update_wm_pre = false;

sys/dev/drm/i915/intel_atomic.c

182

crtc_state->update_wm_post = false;

sys/dev/drm/i915/intel_atomic.c

183

crtc_state->fb_changed = false;

sys/dev/drm/i915/intel_atomic.c

184

crtc_state->fifo_changed = false;

sys/dev/drm/i915/intel_atomic.c

185

crtc_state->wm.need_postvbl_update = false;

sys/dev/drm/i915/intel_atomic.c

382

state->dpll_set = state->modeset = false;

sys/dev/drm/i915/intel_atomic_plane.c

123

intel_state->base.visible = false;

sys/dev/drm/i915/intel_audio.c

1011

dev_priv->audio_component_registered = false;

sys/dev/drm/i915/intel_audio.c

241

return false;

sys/dev/drm/i915/intel_audio.c

249

return false;

sys/dev/drm/i915/intel_audio.c

721

intel_lpe_audio_notify(dev_priv, pipe, port, NULL, 0, false);

sys/dev/drm/i915/intel_bios.c

1215

i->supports_dvi = false;

sys/dev/drm/i915/intel_bios.c

1216

i->supports_hdmi = false;

sys/dev/drm/i915/intel_bios.c

1251

i->supports_dp = false;

sys/dev/drm/i915/intel_bios.c

1349

is_dvi = false;

sys/dev/drm/i915/intel_bios.c

1350

is_hdmi = false;

sys/dev/drm/i915/intel_bios.c

1655

return false;

sys/dev/drm/i915/intel_bios.c

1659

return false;

sys/dev/drm/i915/intel_bios.c

1664

return false;

sys/dev/drm/i915/intel_bios.c

1672

return false;

sys/dev/drm/i915/intel_bios.c

1678

return false;

sys/dev/drm/i915/intel_bios.c

1813

return false;

sys/dev/drm/i915/intel_bios.c

1838

return false;

sys/dev/drm/i915/intel_bios.c

1888

return false;

sys/dev/drm/i915/intel_bios.c

1914

return false;

sys/dev/drm/i915/intel_bios.c

1917

return false;

sys/dev/drm/i915/intel_bios.c

1929

return false;

sys/dev/drm/i915/intel_bios.c

1955

return false;

sys/dev/drm/i915/intel_bios.c

1966

return false;

sys/dev/drm/i915/intel_bios.c

1987

return false;

sys/dev/drm/i915/intel_bios.c

1991

return false;

sys/dev/drm/i915/intel_bios.c

2001

return false;

sys/dev/drm/i915/intel_bios.c

2017

return false;

sys/dev/drm/i915/intel_bios.c

2056

return false;

sys/dev/drm/i915/intel_bios.c

2074

return false;

sys/dev/drm/i915/intel_bios.c

2103

return false;

sys/dev/drm/i915/intel_bios.c

2121

return false;

sys/dev/drm/i915/intel_bios.c

2160

return false;

sys/dev/drm/i915/intel_breadcrumbs.c

211

b->irq_armed = false;

sys/dev/drm/i915/intel_breadcrumbs.c

276

return false;

sys/dev/drm/i915/intel_breadcrumbs.c

306

return false;

sys/dev/drm/i915/intel_breadcrumbs.c

334

enabled = false;

sys/dev/drm/i915/intel_breadcrumbs.c

413

armed = false;

sys/dev/drm/i915/intel_breadcrumbs.c

440

first = false;

sys/dev/drm/i915/intel_breadcrumbs.c

450

first = false;

sys/dev/drm/i915/intel_color.c

143

bool limited_color_range = false;

sys/dev/drm/i915/intel_color.c

370

bool reenable_ips = false;

sys/dev/drm/i915/intel_crt.c

226

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);

sys/dev/drm/i915/intel_crt.c

257

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);

sys/dev/drm/i915/intel_crt.c

270

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);

sys/dev/drm/i915/intel_crt.c

355

return false;

sys/dev/drm/i915/intel_crt.c

368

return false;

sys/dev/drm/i915/intel_crt.c

384

return false;

sys/dev/drm/i915/intel_crt.c

389

return false;

sys/dev/drm/i915/intel_crt.c

397

return false;

sys/dev/drm/i915/intel_crt.c

450

ret = false;

sys/dev/drm/i915/intel_crt.c

500

ret = false;

sys/dev/drm/i915/intel_crt.c

515

bool ret = false;

sys/dev/drm/i915/intel_crt.c

569

intel_gmbus_force_bit(i2c, false);

sys/dev/drm/i915/intel_crt.c

598

bool ret = false;

sys/dev/drm/i915/intel_crt.c

680

bool restore_vblank = false;

sys/dev/drm/i915/intel_crt.c

91

return false;

sys/dev/drm/i915/intel_ddi.c

1955

return false;

sys/dev/drm/i915/intel_ddi.c

1958

ret = false;

sys/dev/drm/i915/intel_ddi.c

1983

ret = false;

sys/dev/drm/i915/intel_ddi.c

1991

ret = false;

sys/dev/drm/i915/intel_ddi.c

2013

return false;

sys/dev/drm/i915/intel_ddi.c

2015

ret = false;

sys/dev/drm/i915/intel_ddi.c

3006

bool wait = false;

sys/dev/drm/i915/intel_ddi.c

3065

dig_port->set_infoframes(&encoder->base, false,

sys/dev/drm/i915/intel_ddi.c

3076

intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);

sys/dev/drm/i915/intel_ddi.c

3246

intel_dp->link_trained = false;

sys/dev/drm/i915/intel_ddi.c

3268

false, false))

sys/dev/drm/i915/intel_ddi.c

3301

bool wait = false;

sys/dev/drm/i915/intel_ddi.c

3344

return false;

sys/dev/drm/i915/intel_ddi.c

3347

return false;

sys/dev/drm/i915/intel_ddi.c

3709

return false;

sys/dev/drm/i915/intel_ddi.c

3712

return false;

sys/dev/drm/i915/intel_ddi.c

3729

return false;

sys/dev/drm/i915/intel_ddi.c

3769

bool init_hdmi, init_dp, init_lspcon = false;

sys/dev/drm/i915/intel_ddi.c

3784

init_hdmi = false;

sys/dev/drm/i915/intel_device_info.c

830

invalid = false;

sys/dev/drm/i915/intel_display.c

10064

return false;

sys/dev/drm/i915/intel_display.c

10073

return false;

sys/dev/drm/i915/intel_display.c

10085

return false;

sys/dev/drm/i915/intel_display.c

10088

return false;

sys/dev/drm/i915/intel_display.c

10231

return false;

sys/dev/drm/i915/intel_display.c

10456

return false;

sys/dev/drm/i915/intel_display.c

10696

return false;

sys/dev/drm/i915/intel_display.c

10706

return false;

sys/dev/drm/i915/intel_display.c

10749

was_visible = false;

sys/dev/drm/i915/intel_display.c

10762

plane_state->visible = visible = false;

sys/dev/drm/i915/intel_display.c

1077

wait_for_pipe_scanline_moving(crtc, false);

sys/dev/drm/i915/intel_display.c

10848

return false;

sys/dev/drm/i915/intel_display.c

11248

ret = false;

sys/dev/drm/i915/intel_display.c

11264

return false;

sys/dev/drm/i915/intel_display.c

11423

retry = false;

sys/dev/drm/i915/intel_display.c

11448

return false;

sys/dev/drm/i915/intel_display.c

11455

return false;

sys/dev/drm/i915/intel_display.c

11467

return false;

sys/dev/drm/i915/intel_display.c

11484

return false;

sys/dev/drm/i915/intel_display.c

11505

return false;

sys/dev/drm/i915/intel_display.c

11545

ret = false; \

sys/dev/drm/i915/intel_display.c

1155

#define assert_fdi_tx_disabled(d, p) assert_fdi_tx(d, p, false)

sys/dev/drm/i915/intel_display.c

11555

ret = false; \

sys/dev/drm/i915/intel_display.c

11565

ret = false; \

sys/dev/drm/i915/intel_display.c

11582

ret = false; \

sys/dev/drm/i915/intel_display.c

11592

ret = false; \

sys/dev/drm/i915/intel_display.c

11613

ret = false; \

sys/dev/drm/i915/intel_display.c

11646

ret = false; \

sys/dev/drm/i915/intel_display.c

11657

ret = false; \

sys/dev/drm/i915/intel_display.c

11667

ret = false; \

sys/dev/drm/i915/intel_display.c

1170

#define assert_fdi_rx_disabled(d, p) assert_fdi_rx(d, p, false)

sys/dev/drm/i915/intel_display.c

11987

bool enabled = false, found = false;

sys/dev/drm/i915/intel_display.c

12088

pipe_config, false)) {

sys/dev/drm/i915/intel_display.c

1252

locked = false;

sys/dev/drm/i915/intel_display.c

12522

bool any_ms = false;

sys/dev/drm/i915/intel_display.c

12559

crtc_state->mode_changed = false;

sys/dev/drm/i915/intel_display.c

12683

progress = false;

sys/dev/drm/i915/intel_display.c

12686

bool vbl_wait = false;

sys/dev/drm/i915/intel_display.c

1278

cur_state = false;

sys/dev/drm/i915/intel_display.c

12832

intel_crtc->active = false;

sys/dev/drm/i915/intel_display.c

1299

#define assert_plane_disabled(p) assert_plane(p, false)

sys/dev/drm/i915/intel_display.c

13048

state->legacy_cursor_update = false;

sys/dev/drm/i915/intel_display.c

13068

dev_priv->wm.distrust_bios_wm = false;

sys/dev/drm/i915/intel_display.c

13263

false, 0,

sys/dev/drm/i915/intel_display.c

13308

false, I915_FENCE_TIMEOUT,

sys/dev/drm/i915/intel_display.c

13356

intel_rps_mark_interactive(dev_priv, false);

sys/dev/drm/i915/intel_display.c

13357

intel_state->rps_interactive = false;

sys/dev/drm/i915/intel_display.c

13493

return false;

sys/dev/drm/i915/intel_display.c

13504

return false;

sys/dev/drm/i915/intel_display.c

13516

return false;

sys/dev/drm/i915/intel_display.c

13529

return false;

sys/dev/drm/i915/intel_display.c

13547

return false;

sys/dev/drm/i915/intel_display.c

13550

return false;

sys/dev/drm/i915/intel_display.c

13579

return false;

sys/dev/drm/i915/intel_display.c

13752

return false;

sys/dev/drm/i915/intel_display.c

13769

return false;

sys/dev/drm/i915/intel_display.c

13782

return false;

sys/dev/drm/i915/intel_display.c

13785

return false;

sys/dev/drm/i915/intel_display.c

13788

return false;

sys/dev/drm/i915/intel_display.c

13791

return false;

sys/dev/drm/i915/intel_display.c

14207

return false;

sys/dev/drm/i915/intel_display.c

14210

return false;

sys/dev/drm/i915/intel_display.c

14213

return false;

sys/dev/drm/i915/intel_display.c

14221

return false;

sys/dev/drm/i915/intel_display.c

14224

return false;

sys/dev/drm/i915/intel_display.c

14227

return false;

sys/dev/drm/i915/intel_display.c

14231

return false;

sys/dev/drm/i915/intel_display.c

14235

return false;

sys/dev/drm/i915/intel_display.c

14238

return false;

sys/dev/drm/i915/intel_display.c

14282

bool dpd_is_edp = false;

sys/dev/drm/i915/intel_display.c

14424

bool found = false;

sys/dev/drm/i915/intel_display.c

15606

return false;

sys/dev/drm/i915/intel_display.c

15726

has_active_crtc = false;

sys/dev/drm/i915/intel_display.c

16080

pll->on = false;

sys/dev/drm/i915/intel_display.c

2717

return false;

sys/dev/drm/i915/intel_display.c

2723

return false;

sys/dev/drm/i915/intel_display.c

2733

return false;

sys/dev/drm/i915/intel_display.c

2743

return false;

sys/dev/drm/i915/intel_display.c

2754

return false;

sys/dev/drm/i915/intel_display.c

2775

return false;

sys/dev/drm/i915/intel_display.c

2822

intel_set_plane_visible(crtc_state, plane_state, false);

sys/dev/drm/i915/intel_display.c

3016

return false;

sys/dev/drm/i915/intel_display.c

3374

false, true);

sys/dev/drm/i915/intel_display.c

3492

return false;

sys/dev/drm/i915/intel_display.c

4485

return false;

sys/dev/drm/i915/intel_display.c

4672

cpt_set_fdi_bc_bifurcation(dev, false);

sys/dev/drm/i915/intel_display.c

5017

adjusted_mode->crtc_vdisplay, false, 0);

sys/dev/drm/i915/intel_display.c

5047

fb ? true : false, fb ? fb->format->format : 0);

sys/dev/drm/i915/intel_display.c

5115

uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);

sys/dev/drm/i915/intel_display.c

5116

uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);

sys/dev/drm/i915/intel_display.c

5286

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);

sys/dev/drm/i915/intel_display.c

5300

intel_set_memory_cxsr(dev_priv, false))

sys/dev/drm/i915/intel_display.c

5308

return false;

sys/dev/drm/i915/intel_display.c

5320

return false;

sys/dev/drm/i915/intel_display.c

5340

return false;

sys/dev/drm/i915/intel_display.c

5343

return false;

sys/dev/drm/i915/intel_display.c

5349

return false;

sys/dev/drm/i915/intel_display.c

5388

skl_wa_clkgate(dev_priv, crtc->pipe, false);

sys/dev/drm/i915/intel_display.c

5389

skl_wa_528(dev_priv, crtc->pipe, false);

sys/dev/drm/i915/intel_display.c

5422

intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false);

sys/dev/drm/i915/intel_display.c

5442

pipe_config->disable_cxsr && intel_set_memory_cxsr(dev_priv, false))

sys/dev/drm/i915/intel_display.c

5578

intel_opregion_notify_encoder(encoder, false);

sys/dev/drm/i915/intel_display.c

5647

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);

sys/dev/drm/i915/intel_display.c

5648

intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);

sys/dev/drm/i915/intel_display.c

5860

glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, false);

sys/dev/drm/i915/intel_display.c

5901

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);

sys/dev/drm/i915/intel_display.c

5902

intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);

sys/dev/drm/i915/intel_display.c

5911

ironlake_pfit_disable(intel_crtc, false);

sys/dev/drm/i915/intel_display.c

5964

intel_ddi_set_vc_payload_alloc(old_crtc_state, false);

sys/dev/drm/i915/intel_display.c

5972

ironlake_pfit_disable(intel_crtc, false);

sys/dev/drm/i915/intel_display.c

6007

return false;

sys/dev/drm/i915/intel_display.c

6012

return false;

sys/dev/drm/i915/intel_display.c

6020

return false;

sys/dev/drm/i915/intel_display.c

604

#define INTELPllInvalid(s) do { /* DRM_DEBUG(s); */ return false; } while (0)

sys/dev/drm/i915/intel_display.c

6291

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);

sys/dev/drm/i915/intel_display.c

6348

crtc->state->active = false;

sys/dev/drm/i915/intel_display.c

6349

intel_crtc->active = false;

sys/dev/drm/i915/intel_display.c

6350

crtc->enabled = false;

sys/dev/drm/i915/intel_display.c

6584

bool needs_recompute = false;

sys/dev/drm/i915/intel_display.c

6604

link_bw, &pipe_config->fdi_m_n, false);

sys/dev/drm/i915/intel_display.c

6630

return false;

sys/dev/drm/i915/intel_display.c

6633

return false;

sys/dev/drm/i915/intel_display.c

6636

return false;

sys/dev/drm/i915/intel_display.c

6647

return false;

sys/dev/drm/i915/intel_display.c

6660

return false;

sys/dev/drm/i915/intel_display.c

6663

return false;

sys/dev/drm/i915/intel_display.c

6667

return false;

sys/dev/drm/i915/intel_display.c

6672

return false;

sys/dev/drm/i915/intel_display.c

7976

return false;

sys/dev/drm/i915/intel_display.c

7981

ret = false;

sys/dev/drm/i915/intel_display.c

805

bool found = false;

sys/dev/drm/i915/intel_display.c

8085

bool has_lvds = false;

sys/dev/drm/i915/intel_display.c

8086

bool has_cpu_edp = false;

sys/dev/drm/i915/intel_display.c

8087

bool has_panel = false;

sys/dev/drm/i915/intel_display.c

8088

bool has_ck505 = false;

sys/dev/drm/i915/intel_display.c

8089

bool can_ssc = false;

sys/dev/drm/i915/intel_display.c

8090

bool using_ssc_source = false;

sys/dev/drm/i915/intel_display.c

8113

has_ck505 = false;

sys/dev/drm/i915/intel_display.c

8358

with_fdi = false;

sys/dev/drm/i915/intel_display.c

8478

bool has_vga = false;

sys/dev/drm/i915/intel_display.c

866

return false;

sys/dev/drm/i915/intel_display.c

902

bool found = false;

sys/dev/drm/i915/intel_display.c

9050

return false;

sys/dev/drm/i915/intel_display.c

9055

ret = false;

sys/dev/drm/i915/intel_display.c

9550

return false;

sys/dev/drm/i915/intel_display.c

961

int found = false;

sys/dev/drm/i915/intel_display.c

9664

return false;

sys/dev/drm/i915/intel_display.c

9995

return false;

sys/dev/drm/i915/intel_dp.c

1094

return false;

sys/dev/drm/i915/intel_dp.c

1107

return false;

sys/dev/drm/i915/intel_dp.c

1419

edp_panel_vdd_off(intel_dp, false);

sys/dev/drm/i915/intel_dp.c

1955

return false;

sys/dev/drm/i915/intel_dp.c

2007

return false;

sys/dev/drm/i915/intel_dp.c

2041

pipe_config->has_drrs = false;

sys/dev/drm/i915/intel_dp.c

2043

pipe_config->has_audio = false;

sys/dev/drm/i915/intel_dp.c

2070

return false;

sys/dev/drm/i915/intel_dp.c

2074

return false;

sys/dev/drm/i915/intel_dp.c

2077

return false;

sys/dev/drm/i915/intel_dp.c

2080

return false;

sys/dev/drm/i915/intel_dp.c

2126

intel_dp->link_trained = false;

sys/dev/drm/i915/intel_dp.c

2337

return false;

sys/dev/drm/i915/intel_dp.c

2475

intel_dp->want_panel_vdd = false;

sys/dev/drm/i915/intel_dp.c

2566

intel_dp->want_panel_vdd = false;

sys/dev/drm/i915/intel_dp.c

2708

#define assert_dp_port_disabled(d) assert_dp_port((d), false)

sys/dev/drm/i915/intel_dp.c

2719

#define assert_edp_pll_disabled(d) assert_edp_pll((d), false)

sys/dev/drm/i915/intel_dp.c

2853

return false;

sys/dev/drm/i915/intel_dp.c

2889

return false;

sys/dev/drm/i915/intel_dp.c

2989

intel_dp->link_trained = false;

sys/dev/drm/i915/intel_dp.c

3556

bool uniq_trans_scale = false;

sys/dev/drm/i915/intel_dp.c

3865

intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);

sys/dev/drm/i915/intel_dp.c

3866

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);

sys/dev/drm/i915/intel_dp.c

3900

return false; /* aux transfer failed */

sys/dev/drm/i915/intel_dp.c

3917

return false;

sys/dev/drm/i915/intel_dp.c

3993

return false;

sys/dev/drm/i915/intel_dp.c

4002

return false;

sys/dev/drm/i915/intel_dp.c

4019

return false;

sys/dev/drm/i915/intel_dp.c

4030

return false; /* downstream port status fetch failed */

sys/dev/drm/i915/intel_dp.c

4041

return false;

sys/dev/drm/i915/intel_dp.c

4044

return false;

sys/dev/drm/i915/intel_dp.c

4047

return false;

sys/dev/drm/i915/intel_dp.c

4050

return false;

sys/dev/drm/i915/intel_dp.c

4331

intel_dp->is_mst = false;

sys/dev/drm/i915/intel_dp.c

4346

return false;

sys/dev/drm/i915/intel_dp.c

4349

return false;

sys/dev/drm/i915/intel_dp.c

4357

return false;

sys/dev/drm/i915/intel_dp.c

4409

intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false);

sys/dev/drm/i915/intel_dp.c

4412

intel_crtc_pch_transcoder(crtc), false);

sys/dev/drm/i915/intel_dp.c

4506

return false;

sys/dev/drm/i915/intel_dp.c

4529

return false;

sys/dev/drm/i915/intel_dp.c

4620

return false;

sys/dev/drm/i915/intel_dp.c

4643

return false;

sys/dev/drm/i915/intel_dp.c

4685

return false;

sys/dev/drm/i915/intel_dp.c

4708

return false;

sys/dev/drm/i915/intel_dp.c

4771

return false;

sys/dev/drm/i915/intel_dp.c

4851

return false;

sys/dev/drm/i915/intel_dp.c

4874

return false;

sys/dev/drm/i915/intel_dp.c

4935

return false;

sys/dev/drm/i915/intel_dp.c

4942

return false;

sys/dev/drm/i915/intel_dp.c

4963

return false;

sys/dev/drm/i915/intel_dp.c

5045

intel_dp->has_audio = false;

sys/dev/drm/i915/intel_dp.c

5076

intel_dp->is_mst = false;

sys/dev/drm/i915/intel_dp.c

5091

intel_dp->reset_link_params = false;

sys/dev/drm/i915/intel_dp.c

5183

intel_dp->detect_done = false;

sys/dev/drm/i915/intel_dp.c

552

return false;

sys/dev/drm/i915/intel_dp.c

5534

return false;

sys/dev/drm/i915/intel_dp.c

556

return false;

sys/dev/drm/i915/intel_dp.c

5680

intel_dp->detect_done = false;

sys/dev/drm/i915/intel_dp.c

5694

intel_dp->is_mst = false;

sys/dev/drm/i915/intel_dp.c

5697

intel_dp->detect_done = false;

sys/dev/drm/i915/intel_dp.c

5711

intel_dp->detect_done = false;

sys/dev/drm/i915/intel_dp.c

572

return false;

sys/dev/drm/i915/intel_dp.c

5732

return false;

sys/dev/drm/i915/intel_dp.c

6038

intel_dp_init_panel_power_sequencer_registers(intel_dp, false);

sys/dev/drm/i915/intel_dp.c

6439

return false;

sys/dev/drm/i915/intel_dp.c

6533

return false;

sys/dev/drm/i915/intel_dp.c

6578

return false;

sys/dev/drm/i915/intel_dp.c

6614

return false;

sys/dev/drm/i915/intel_dp.c

6676

return false;

sys/dev/drm/i915/intel_dp.c

6690

return false;

sys/dev/drm/i915/intel_dp.c

6761

return false;

sys/dev/drm/i915/intel_dp.c

714

bool pll_enabled, release_cl_override = false;

sys/dev/drm/i915/intel_dp.c

777

chv_phy_powergate_ch(dev_priv, phy, ch, false);

sys/dev/drm/i915/intel_dp.c

874

intel_dp->pps_reset = false;

sys/dev/drm/i915/intel_dp.c

880

intel_dp_init_panel_power_sequencer_registers(intel_dp, false);

sys/dev/drm/i915/intel_dp.c

962

intel_dp_init_panel_power_sequencer_registers(intel_dp, false);

sys/dev/drm/i915/intel_dp_aux_backlight.c

124

return false;

sys/dev/drm/i915/intel_dp_aux_backlight.c

139

return false;

sys/dev/drm/i915/intel_dp_aux_backlight.c

144

return false;

sys/dev/drm/i915/intel_dp_aux_backlight.c

153

return false;

sys/dev/drm/i915/intel_dp_aux_backlight.c

166

return false;

sys/dev/drm/i915/intel_dp_aux_backlight.c

171

return false;

sys/dev/drm/i915/intel_dp_aux_backlight.c

224

set_aux_backlight_enable(enc_to_intel_dp(old_conn_state->best_encoder), false);

sys/dev/drm/i915/intel_dp_aux_backlight.c

260

return false;

sys/dev/drm/i915/intel_dp_link_training.c

122

return false;

sys/dev/drm/i915/intel_dp_link_training.c

133

bool max_vswing_reached = false;

sys/dev/drm/i915/intel_dp_link_training.c

171

return false;

sys/dev/drm/i915/intel_dp_link_training.c

195

return false;

sys/dev/drm/i915/intel_dp_link_training.c

205

return false;

sys/dev/drm/i915/intel_dp_link_training.c

210

return false;

sys/dev/drm/i915/intel_dp_link_training.c

219

return false;

sys/dev/drm/i915/intel_dp_link_training.c

233

return false;

sys/dev/drm/i915/intel_dp_link_training.c

286

bool channel_eq = false;

sys/dev/drm/i915/intel_dp_link_training.c

297

return false;

sys/dev/drm/i915/intel_dp_mst.c

189

false);

sys/dev/drm/i915/intel_dp_mst.c

297

return false;

sys/dev/drm/i915/intel_dp_mst.c

434

return false;

sys/dev/drm/i915/intel_dp_mst.c

437

return false;

sys/dev/drm/i915/intel_dp_mst.c

52

return false;

sys/dev/drm/i915/intel_dp_mst.c

54

pipe_config->has_pch_encoder = false;

sys/dev/drm/i915/intel_dp_mst.c

599

intel_dp->can_mst = false;

sys/dev/drm/i915/intel_dp_mst.c

88

return false;

sys/dev/drm/i915/intel_dpio_phy.c

168

.dual_channel = false,

sys/dev/drm/i915/intel_dpio_phy.c

180

.dual_channel = false,

sys/dev/drm/i915/intel_dpio_phy.c

190

.dual_channel = false,

sys/dev/drm/i915/intel_dpio_phy.c

200

.dual_channel = false,

sys/dev/drm/i915/intel_dpio_phy.c

314

return false;

sys/dev/drm/i915/intel_dpio_phy.c

321

return false;

sys/dev/drm/i915/intel_dpio_phy.c

328

return false;

sys/dev/drm/i915/intel_dpio_phy.c

511

return false;

sys/dev/drm/i915/intel_dpio_phy.c

528

return false;

sys/dev/drm/i915/intel_dpio_phy.c

934

chv_data_lane_soft_reset(encoder, crtc_state, false);

sys/dev/drm/i915/intel_dpio_phy.c

945

chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false);

sys/dev/drm/i915/intel_dpio_phy.c

946

dport->release_cl2_override = false;

sys/dev/drm/i915/intel_dpio_phy.c

981

chv_phy_powergate_lanes(encoder, false, 0x0);

sys/dev/drm/i915/intel_dpll_mgr.c

1002

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

1004

ret = false;

sys/dev/drm/i915/intel_dpll_mgr.c

1036

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

1038

ret = false;

sys/dev/drm/i915/intel_dpll_mgr.c

1287

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

1318

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

1597

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

1599

ret = false;

sys/dev/drm/i915/intel_dpll_mgr.c

1697

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

1754

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2105

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2107

ret = false;

sys/dev/drm/i915/intel_dpll_mgr.c

2264

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2287

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

236

pll->on = false;

sys/dev/drm/i915/intel_dpll_mgr.c

2508

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2539

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2703

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2722

bool use_ssc = false;

sys/dev/drm/i915/intel_dpll_mgr.c

2728

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2739

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2766

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

2959

bool ret = false;

sys/dev/drm/i915/intel_dpll_mgr.c

2962

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

350

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

522

return false;

sys/dev/drm/i915/intel_dpll_mgr.c

539

return false;

sys/dev/drm/i915/intel_dpll_mgr.h

330

#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)

sys/dev/drm/i915/intel_drv.h

1281

return false;

sys/dev/drm/i915/intel_drv.h

1318

return false;

sys/dev/drm/i915/intel_drv.h

1626

#define assert_pll_disabled(d, p) assert_pll(d, p, false)

sys/dev/drm/i915/intel_drv.h

1629

#define assert_dsi_pll_disabled(d) assert_dsi_pll(d, false)

sys/dev/drm/i915/intel_drv.h

1633

#define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)

sys/dev/drm/i915/intel_drv.h

1636

#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)

sys/dev/drm/i915/intel_dsi_vbt.c

571

return false;

sys/dev/drm/i915/intel_dsi_vbt.c

581

return false;

sys/dev/drm/i915/intel_dvo.c

132

return false;

sys/dev/drm/i915/intel_dvo.c

184

intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);

sys/dev/drm/i915/intel_dvo.c

257

return false;

sys/dev/drm/i915/intel_dvo.c

489

intel_gmbus_force_bit(i2c, false);

sys/dev/drm/i915/intel_dvo.c

525

connector->interlace_allowed = false;

sys/dev/drm/i915/intel_dvo.c

526

connector->doublescan_allowed = false;

sys/dev/drm/i915/intel_engine_cs.c

1098

engine->execlists.no_priolist = false;

sys/dev/drm/i915/intel_engine_cs.c

1155

return false; /* uses physical not virtual addresses */

sys/dev/drm/i915/intel_engine_cs.c

1255

bool skip = false;

sys/dev/drm/i915/intel_engine_cs.c

1272

false) >= sizeof(line));

sys/dev/drm/i915/intel_engine_cs.c

1276

skip = false;

sys/dev/drm/i915/intel_engine_cs.c

907

idle = false;

sys/dev/drm/i915/intel_engine_cs.c

911

idle = false;

sys/dev/drm/i915/intel_engine_cs.c

935

return false;

sys/dev/drm/i915/intel_engine_cs.c

957

return false;

sys/dev/drm/i915/intel_engine_cs.c

962

return false;

sys/dev/drm/i915/intel_engine_cs.c

966

return false;

sys/dev/drm/i915/intel_engine_cs.c

985

return false;

sys/dev/drm/i915/intel_fbc.c

1017

bool crtc_chosen = false;

sys/dev/drm/i915/intel_fbc.c

1196

dev_priv->fbc.underrun_detected = false;

sys/dev/drm/i915/intel_fbc.c

1289

return false;

sys/dev/drm/i915/intel_fbc.c

1304

fbc->enabled = false;

sys/dev/drm/i915/intel_fbc.c

1305

fbc->active = false;

sys/dev/drm/i915/intel_fbc.c

1308

mkwrite_device_info(dev_priv)->has_fbc = false;

sys/dev/drm/i915/intel_fbc.c

378

fbc->active = false;

sys/dev/drm/i915/intel_fbc.c

582

return false;

sys/dev/drm/i915/intel_fbc.c

586

return false;

sys/dev/drm/i915/intel_fbc.c

592

return false;

sys/dev/drm/i915/intel_fbc.c

595

return false;

sys/dev/drm/i915/intel_fbc.c

611

return false;

sys/dev/drm/i915/intel_fbc.c

614

return false;

sys/dev/drm/i915/intel_fbc.c

617

return false;

sys/dev/drm/i915/intel_fbc.c

704

return false;

sys/dev/drm/i915/intel_fbc.c

709

return false;

sys/dev/drm/i915/intel_fbc.c

714

return false;

sys/dev/drm/i915/intel_fbc.c

719

return false;

sys/dev/drm/i915/intel_fbc.c

737

return false;

sys/dev/drm/i915/intel_fbc.c

742

return false;

sys/dev/drm/i915/intel_fbc.c

747

return false;

sys/dev/drm/i915/intel_fbc.c

752

return false;

sys/dev/drm/i915/intel_fbc.c

759

return false;

sys/dev/drm/i915/intel_fbc.c

775

return false;

sys/dev/drm/i915/intel_fbc.c

786

return false;

sys/dev/drm/i915/intel_fbc.c

798

return false;

sys/dev/drm/i915/intel_fbc.c

803

return false;

sys/dev/drm/i915/intel_fbc.c

808

return false;

sys/dev/drm/i915/intel_fbc.c

893

fbc->enabled = false;

sys/dev/drm/i915/intel_fbc.c

907

fbc->flip_pending = false;

sys/dev/drm/i915/intel_fbdev.c

191

bool prealloc = false;

sys/dev/drm/i915/intel_fbdev.c

227

&view, false, &flags);

sys/dev/drm/i915/intel_fbdev.c

373

return false;

sys/dev/drm/i915/intel_fbdev.c

413

enabled[i] = false;

sys/dev/drm/i915/intel_fbdev.c

424

enabled[i] = false;

sys/dev/drm/i915/intel_fbdev.c

497

fallback = false;

sys/dev/drm/i915/intel_fbdev.c

523

ret = false;

sys/dev/drm/i915/intel_fbdev.c

682

return false;

sys/dev/drm/i915/intel_fbdev.c

788

bool send_hpd = false;

sys/dev/drm/i915/intel_fbdev.c

793

ifbdev->hpd_waiting = false;

sys/dev/drm/i915/intel_fifo_underrun.c

376

if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) {

sys/dev/drm/i915/intel_fifo_underrun.c

398

false)) {

sys/dev/drm/i915/intel_fifo_underrun.c

63

return false;

sys/dev/drm/i915/intel_fifo_underrun.c

81

return false;

sys/dev/drm/i915/intel_frontbuffer.h

62

return false;

sys/dev/drm/i915/intel_guc_ct.c

659

bool found = false;

sys/dev/drm/i915/intel_guc_ct.c

903

DRM_INFO("CT: %s\n", enableddisabled(false));

sys/dev/drm/i915/intel_guc_log.c

197

bool overflow = false;

sys/dev/drm/i915/intel_guc_submission.c

130

return false;

sys/dev/drm/i915/intel_guc_submission.c

720

bool submit = false;

sys/dev/drm/i915/intel_guc_submission.c

736

return false;

sys/dev/drm/i915/intel_guc_submission.c

742

return false;

sys/dev/drm/i915/intel_guc_submission.c

895

return false;

sys/dev/drm/i915/intel_guc_submission.c

904

return false;

sys/dev/drm/i915/intel_gvt.c

52

return false;

sys/dev/drm/i915/intel_hdcp.c

178

return false;

sys/dev/drm/i915/intel_hdcp.c

45

bool enabled = false;

sys/dev/drm/i915/intel_hdcp.c

644

ret = connector->hdcp_shim->toggle_signalling(intel_dig_port, false);

sys/dev/drm/i915/intel_hdmi.c

1109

return false;

sys/dev/drm/i915/intel_hdmi.c

1118

return false;

sys/dev/drm/i915/intel_hdmi.c

1184

return false;

sys/dev/drm/i915/intel_hdmi.c

1418

intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);

sys/dev/drm/i915/intel_hdmi.c

1419

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);

sys/dev/drm/i915/intel_hdmi.c

1441

intel_dig_port->set_infoframes(&encoder->base, false,

sys/dev/drm/i915/intel_hdmi.c

1444

intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);

sys/dev/drm/i915/intel_hdmi.c

1603

return false;

sys/dev/drm/i915/intel_hdmi.c

1606

return false;

sys/dev/drm/i915/intel_hdmi.c

1609

return false;

sys/dev/drm/i915/intel_hdmi.c

1612

return false;

sys/dev/drm/i915/intel_hdmi.c

1619

return false;

sys/dev/drm/i915/intel_hdmi.c

1632

return false;

sys/dev/drm/i915/intel_hdmi.c

1635

return false;

sys/dev/drm/i915/intel_hdmi.c

1639

return false;

sys/dev/drm/i915/intel_hdmi.c

1642

return false;

sys/dev/drm/i915/intel_hdmi.c

1649

return false;

sys/dev/drm/i915/intel_hdmi.c

1664

return false;

sys/dev/drm/i915/intel_hdmi.c

1677

return false;

sys/dev/drm/i915/intel_hdmi.c

1704

return false;

sys/dev/drm/i915/intel_hdmi.c

1734

return false;

sys/dev/drm/i915/intel_hdmi.c

1782

false, force_dvi) != MODE_OK) {

sys/dev/drm/i915/intel_hdmi.c

1784

return false;

sys/dev/drm/i915/intel_hdmi.c

1811

intel_hdmi->has_hdmi_sink = false;

sys/dev/drm/i915/intel_hdmi.c

1812

intel_hdmi->has_audio = false;

sys/dev/drm/i915/intel_hdmi.c

1813

intel_hdmi->rgb_quant_range_selectable = false;

sys/dev/drm/i915/intel_hdmi.c

1875

bool connected = false;

sys/dev/drm/i915/intel_hdmi.c

1888

intel_gmbus_force_bit(i2c, false);

sys/dev/drm/i915/intel_hdmi.c

197

return false;

sys/dev/drm/i915/intel_hdmi.c

200

return false;

sys/dev/drm/i915/intel_hdmi.c

2067

chv_set_phy_signal_level(encoder, 128, 102, false);

sys/dev/drm/i915/intel_hdmi.c

256

return false;

sys/dev/drm/i915/intel_hdmi.c

259

return false;

sys/dev/drm/i915/intel_hdmi.c

317

return false;

sys/dev/drm/i915/intel_hdmi.c

373

return false;

sys/dev/drm/i915/intel_hdmi.c

376

return false;

sys/dev/drm/i915/intel_hdmi.c

647

return false;

sys/dev/drm/i915/intel_hdmi.c

676

return false;

sys/dev/drm/i915/intel_hotplug.c

141

bool storm = false;

sys/dev/drm/i915/intel_hotplug.c

169

bool hpd_disabled = false;

sys/dev/drm/i915/intel_hotplug.c

261

drm_helper_probe_detect(&connector->base, NULL, false);

sys/dev/drm/i915/intel_hotplug.c

264

return false;

sys/dev/drm/i915/intel_hotplug.c

340

bool changed = false;

sys/dev/drm/i915/intel_hotplug.c

398

bool storm_detected = false;

sys/dev/drm/i915/intel_hotplug.c

399

bool queue_dig = false, queue_hp = false;

sys/dev/drm/i915/intel_hotplug.c

525

WRITE_ONCE(dev_priv->hotplug.poll_enabled, false);

sys/dev/drm/i915/intel_hotplug.c

644

bool ret = false;

sys/dev/drm/i915/intel_hotplug.c

647

return false;

sys/dev/drm/i915/intel_i2c.c

263

pnv_gmbus_clock_gating(dev_priv, false);

sys/dev/drm/i915/intel_i2c.c

376

bool extra_byte_added = false;

sys/dev/drm/i915/intel_i2c.c

580

bxt_gmbus_clock_gating(dev_priv, false);

sys/dev/drm/i915/intel_i2c.c

583

pch_gmbus_clock_gating(dev_priv, false);

sys/dev/drm/i915/intel_lpe_audio.c

178

int lpe_present = false;

sys/dev/drm/i915/intel_lpe_audio.c

358

ppdata->dp_output = false;

sys/dev/drm/i915/intel_lrc.c

1801

bool unexpected = false;

sys/dev/drm/i915/intel_lrc.c

2164

bool vf_flush_wa = false, dc_flush_wa = false;

sys/dev/drm/i915/intel_lrc.c

2566

subslice_pg = false;

sys/dev/drm/i915/intel_lrc.c

284

first = false;

sys/dev/drm/i915/intel_lrc.c

538

return false;

sys/dev/drm/i915/intel_lrc.c

541

return false;

sys/dev/drm/i915/intel_lrc.c

605

bool submit = false;

sys/dev/drm/i915/intel_lspcon.c

124

return false;

sys/dev/drm/i915/intel_lspcon.c

156

return false;

sys/dev/drm/i915/intel_lspcon.c

222

return false;

sys/dev/drm/i915/intel_lspcon.c

225

lspcon->active = false;

sys/dev/drm/i915/intel_lspcon.c

230

return false;

sys/dev/drm/i915/intel_lspcon.c

241

return false;

sys/dev/drm/i915/intel_lspcon.c

247

return false;

sys/dev/drm/i915/intel_lvds.c

112

return false;

sys/dev/drm/i915/intel_lvds.c

408

return false;

sys/dev/drm/i915/intel_lvds.c

432

return false;

sys/dev/drm/i915/intel_lvds.c

847

return false;

sys/dev/drm/i915/intel_lvds.c

967

connector->interlace_allowed = false;

sys/dev/drm/i915/intel_lvds.c

968

connector->doublescan_allowed = false;

sys/dev/drm/i915/intel_mocs.c

179

bool result = false;

sys/dev/drm/i915/intel_mocs.c

202

return false;

sys/dev/drm/i915/intel_opregion.c

852

bool requested_callbacks = false;

sys/dev/drm/i915/intel_overlay.c

1127

overlay->pfit_active = false;

sys/dev/drm/i915/intel_overlay.c

1188

return false;

sys/dev/drm/i915/intel_overlay.c

1192

return false;

sys/dev/drm/i915/intel_overlay.c

1204

return false;

sys/dev/drm/i915/intel_overlay.c

267

i830_overlay_clock_gating(dev_priv, false);

sys/dev/drm/i915/intel_overlay.c

375

overlay->active = false;

sys/dev/drm/i915/intel_overlay.c

489

overlay->active = false;

sys/dev/drm/i915/intel_overlay.c

612

bool scale_changed = false;

sys/dev/drm/i915/intel_overlay.c

754

bool scale_changed = false;

sys/dev/drm/i915/intel_panel.c

1909

panel->backlight.present = false;

sys/dev/drm/i915/intel_panel.c

795

panel->backlight.enabled = false;

sys/dev/drm/i915/intel_pm.c

1158

bool dirty = false;

sys/dev/drm/i915/intel_pm.c

1174

bool dirty = false;

sys/dev/drm/i915/intel_pm.c

1199

bool dirty = false;

sys/dev/drm/i915/intel_pm.c

1278

return false;

sys/dev/drm/i915/intel_pm.c

1297

wm_state->cxsr = false;

sys/dev/drm/i915/intel_pm.c

1304

wm_state->hpll_en = false;

sys/dev/drm/i915/intel_pm.c

1392

wm_state->fbc_en = false;

sys/dev/drm/i915/intel_pm.c

1395

wm_state->fbc_en = false;

sys/dev/drm/i915/intel_pm.c

1416

intermediate->cxsr = false;

sys/dev/drm/i915/intel_pm.c

1417

intermediate->hpll_en = false;

sys/dev/drm/i915/intel_pm.c

1494

wm->cxsr = false;

sys/dev/drm/i915/intel_pm.c

1496

wm->hpll_en = false;

sys/dev/drm/i915/intel_pm.c

1498

wm->fbc_en = false;

sys/dev/drm/i915/intel_pm.c

1504

wm->cxsr = false;

sys/dev/drm/i915/intel_pm.c

1505

wm->hpll_en = false;

sys/dev/drm/i915/intel_pm.c

1506

wm->fbc_en = false;

sys/dev/drm/i915/intel_pm.c

1532

_intel_set_memory_cxsr(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

1759

bool dirty = false;

sys/dev/drm/i915/intel_pm.c

1778

bool dirty = false;

sys/dev/drm/i915/intel_pm.c

2049

intermediate->cxsr = false;

sys/dev/drm/i915/intel_pm.c

2101

wm->cxsr = false;

sys/dev/drm/i915/intel_pm.c

2108

wm->cxsr = false;

sys/dev/drm/i915/intel_pm.c

2139

chv_set_memory_dvfs(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

2142

chv_set_memory_pm5(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

2145

_intel_set_memory_cxsr(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

2237

cxsr_enabled = false;

sys/dev/drm/i915/intel_pm.c

2239

intel_set_memory_cxsr(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

2351

intel_set_memory_cxsr(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

2687

max->pri = ilk_plane_wm_max(dev, level, config, ddb_partitioning, false);

sys/dev/drm/i915/intel_pm.c

2697

max->pri = ilk_plane_wm_reg_max(dev_priv, level, false);

sys/dev/drm/i915/intel_pm.c

2711

return false;

sys/dev/drm/i915/intel_pm.c

2988

return false;

sys/dev/drm/i915/intel_pm.c

3091

return false;

sys/dev/drm/i915/intel_pm.c

3260

ret_wm->enable = false;

sys/dev/drm/i915/intel_pm.c

3296

wm->enable = false;

sys/dev/drm/i915/intel_pm.c

3307

merged->fbc_wm_enabled = false;

sys/dev/drm/i915/intel_pm.c

3323

wm->enable = false;

sys/dev/drm/i915/intel_pm.c

3505

bool changed = false;

sys/dev/drm/i915/intel_pm.c

3645

return false;

sys/dev/drm/i915/intel_pm.c

3659

return false;

sys/dev/drm/i915/intel_pm.c

3761

return false;

sys/dev/drm/i915/intel_pm.c

3779

return false;

sys/dev/drm/i915/intel_pm.c

3787

return false;

sys/dev/drm/i915/intel_pm.c

3815

return false;

sys/dev/drm/i915/intel_pm.c

389

return false;

sys/dev/drm/i915/intel_pm.c

4686

result->plane_en = false;

sys/dev/drm/i915/intel_pm.c

4776

result->plane_en = false;

sys/dev/drm/i915/intel_pm.c

4802

result->plane_en = false;

sys/dev/drm/i915/intel_pm.c

4943

trans_wm->plane_en = false;

sys/dev/drm/i915/intel_pm.c

5099

return false;

sys/dev/drm/i915/intel_pm.c

5128

return false;

sys/dev/drm/i915/intel_pm.c

5145

*changed = false;

sys/dev/drm/i915/intel_pm.c

5357

bool changed = false;

sys/dev/drm/i915/intel_pm.c

5898

wm_state->fbc_en = false;

sys/dev/drm/i915/intel_pm.c

6158

dev_priv->ipc_enabled = false;

sys/dev/drm/i915/intel_pm.c

6163

dev_priv->ipc_enabled = false;

sys/dev/drm/i915/intel_pm.c

6177

dev_priv->ipc_enabled = false;

sys/dev/drm/i915/intel_pm.c

6203

return false; /* still busy with another command */

sys/dev/drm/i915/intel_pm.c

6660

boost = false;

sys/dev/drm/i915/intel_pm.c

6764

enable_rc6 = false;

sys/dev/drm/i915/intel_pm.c

6775

enable_rc6 = false;

sys/dev/drm/i915/intel_pm.c

6783

enable_rc6 = false;

sys/dev/drm/i915/intel_pm.c

6790

enable_rc6 = false;

sys/dev/drm/i915/intel_pm.c

6795

enable_rc6 = false;

sys/dev/drm/i915/intel_pm.c

6800

enable_rc6 = false;

sys/dev/drm/i915/intel_pm.c

8031

ret = false;

sys/dev/drm/i915/intel_pm.c

8059

ret = false;

sys/dev/drm/i915/intel_pm.c

8081

bool ret = false;

sys/dev/drm/i915/intel_pm.c

809

return false;

sys/dev/drm/i915/intel_pm.c

8105

ret = false;

sys/dev/drm/i915/intel_pm.c

8113

ret = false;

sys/dev/drm/i915/intel_pm.c

8338

i915->gt_pm.llc_pstate.enabled = false;

sys/dev/drm/i915/intel_pm.c

8357

dev_priv->gt_pm.rc6.enabled = false;

sys/dev/drm/i915/intel_pm.c

8378

dev_priv->gt_pm.rps.enabled = false;

sys/dev/drm/i915/intel_pm.c

854

intel_set_memory_cxsr(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

907

intel_set_memory_cxsr(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

9420

intel_set_memory_cxsr(dev_priv, false);

sys/dev/drm/i915/intel_pm.c

9727

dev_priv->runtime_pm.suspended = false;

sys/dev/drm/i915/intel_psr.c

1078

dev_priv->psr.link_standby = false;

sys/dev/drm/i915/intel_psr.c

191

return false;

sys/dev/drm/i915/intel_psr.c

201

return false;

sys/dev/drm/i915/intel_psr.c

459

return false;

sys/dev/drm/i915/intel_psr.c

473

return false;

sys/dev/drm/i915/intel_psr.c

65

return false;

sys/dev/drm/i915/intel_psr.c

690

dev_priv->psr.active = false;

sys/dev/drm/i915/intel_psr.c

715

dev_priv->psr.enabled = false;

sys/dev/drm/i915/intel_psr.c

744

dev_priv->psr.prepared = false;

sys/dev/drm/i915/intel_psr.c

76

return false;

sys/dev/drm/i915/intel_psr.c

792

return false;

sys/dev/drm/i915/intel_psr.c

819

return false;

sys/dev/drm/i915/intel_psr.c

827

return false;

sys/dev/drm/i915/intel_psr.c

944

dev_priv->psr.active = false;

sys/dev/drm/i915/intel_ringbuffer.c

1567

bool force_restore = false;

sys/dev/drm/i915/intel_ringbuffer.c

483

return false;

sys/dev/drm/i915/intel_ringbuffer.h

1187

return false;

sys/dev/drm/i915/intel_ringbuffer.h

1197

return false;

sys/dev/drm/i915/intel_ringbuffer.h

840

return false;

sys/dev/drm/i915/intel_ringbuffer.h

843

return false;

sys/dev/drm/i915/intel_runtime_pm.c

1062

vlv_set_power_well(dev_priv, power_well, false);

sys/dev/drm/i915/intel_runtime_pm.c

1098

vlv_set_power_well(dev_priv, power_well, false);

sys/dev/drm/i915/intel_runtime_pm.c

1297

vlv_set_power_well(dev_priv, power_well, false);

sys/dev/drm/i915/intel_runtime_pm.c

1507

chv_set_pipe_power_well(dev_priv, power_well, false);

sys/dev/drm/i915/intel_runtime_pm.c

1568

return false;

sys/dev/drm/i915/intel_runtime_pm.c

1576

is_enabled = false;

sys/dev/drm/i915/intel_runtime_pm.c

167

power_well->hw_enabled = false;

sys/dev/drm/i915/intel_runtime_pm.c

207

return false;

sys/dev/drm/i915/intel_runtime_pm.c

216

is_enabled = false;

sys/dev/drm/i915/intel_runtime_pm.c

3154

return false;

sys/dev/drm/i915/intel_runtime_pm.c

3166

intel_dbuf_slice_set(dev_priv, DBUF_CTL, false);

sys/dev/drm/i915/intel_runtime_pm.c

3193

ret = intel_dbuf_slice_set(dev_priv, DBUF_CTL_S2, false);

sys/dev/drm/i915/intel_runtime_pm.c

3659

dev_priv->chv_phy_assert[DPIO_PHY0] = false;

sys/dev/drm/i915/intel_runtime_pm.c

3681

dev_priv->chv_phy_assert[DPIO_PHY1] = false;

sys/dev/drm/i915/intel_runtime_pm.c

3774

power_domains->initializing = false;

sys/dev/drm/i915/intel_runtime_pm.c

3902

power_domains->display_core_suspended = false;

sys/dev/drm/i915/intel_runtime_pm.c

3948

dump_domain_info = false;

sys/dev/drm/i915/intel_runtime_pm.c

4056

return false;

sys/dev/drm/i915/intel_runtime_pm.c

918

vlv_set_power_well(dev_priv, power_well, false);

sys/dev/drm/i915/intel_runtime_pm.c

925

bool enabled = false;

sys/dev/drm/i915/intel_sdvo.c

1011

return false;

sys/dev/drm/i915/intel_sdvo.c

1042

return false;

sys/dev/drm/i915/intel_sdvo.c

1046

return false;

sys/dev/drm/i915/intel_sdvo.c

1065

return false;

sys/dev/drm/i915/intel_sdvo.c

1072

return false;

sys/dev/drm/i915/intel_sdvo.c

1076

return false;

sys/dev/drm/i915/intel_sdvo.c

1138

return false;

sys/dev/drm/i915/intel_sdvo.c

1148

return false;

sys/dev/drm/i915/intel_sdvo.c

1157

return false;

sys/dev/drm/i915/intel_sdvo.c

1558

intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);

sys/dev/drm/i915/intel_sdvo.c

1559

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);

sys/dev/drm/i915/intel_sdvo.c

1663

return false;

sys/dev/drm/i915/intel_sdvo.c

1852

intel_sdvo->has_hdmi_monitor = false;

sys/dev/drm/i915/intel_sdvo.c

1853

intel_sdvo->has_hdmi_audio = false;

sys/dev/drm/i915/intel_sdvo.c

1854

intel_sdvo->rgb_quant_range_selectable = false;

sys/dev/drm/i915/intel_sdvo.c

2382

intel_gmbus_force_bit(sdvo->i2c, false);

sys/dev/drm/i915/intel_sdvo.c

2507

return false;

sys/dev/drm/i915/intel_sdvo.c

2543

return false;

sys/dev/drm/i915/intel_sdvo.c

2564

return false;

sys/dev/drm/i915/intel_sdvo.c

2576

return false;

sys/dev/drm/i915/intel_sdvo.c

2589

return false;

sys/dev/drm/i915/intel_sdvo.c

2604

return false;

sys/dev/drm/i915/intel_sdvo.c

2622

return false;

sys/dev/drm/i915/intel_sdvo.c

2641

return false;

sys/dev/drm/i915/intel_sdvo.c

2658

return false;

sys/dev/drm/i915/intel_sdvo.c

2681

return false;

sys/dev/drm/i915/intel_sdvo.c

2691

return false;

sys/dev/drm/i915/intel_sdvo.c

2695

return false;

sys/dev/drm/i915/intel_sdvo.c

270

return false;

sys/dev/drm/i915/intel_sdvo.c

2700

return false;

sys/dev/drm/i915/intel_sdvo.c

2704

return false;

sys/dev/drm/i915/intel_sdvo.c

2708

return false;

sys/dev/drm/i915/intel_sdvo.c

2712

return false;

sys/dev/drm/i915/intel_sdvo.c

2716

return false;

sys/dev/drm/i915/intel_sdvo.c

2720

return false;

sys/dev/drm/i915/intel_sdvo.c

2724

return false;

sys/dev/drm/i915/intel_sdvo.c

2734

return false;

sys/dev/drm/i915/intel_sdvo.c

2764

return false;

sys/dev/drm/i915/intel_sdvo.c

2770

return false;

sys/dev/drm/i915/intel_sdvo.c

2775

return false;

sys/dev/drm/i915/intel_sdvo.c

2787

return false;

sys/dev/drm/i915/intel_sdvo.c

2804

return false; \

sys/dev/drm/i915/intel_sdvo.c

2807

if (!intel_sdvo_connector->name) return false; \

sys/dev/drm/i915/intel_sdvo.c

2835

return false;

sys/dev/drm/i915/intel_sdvo.c

2840

return false;

sys/dev/drm/i915/intel_sdvo.c

2848

return false;

sys/dev/drm/i915/intel_sdvo.c

2856

return false;

sys/dev/drm/i915/intel_sdvo.c

2869

return false;

sys/dev/drm/i915/intel_sdvo.c

2874

return false;

sys/dev/drm/i915/intel_sdvo.c

2883

return false;

sys/dev/drm/i915/intel_sdvo.c

2892

return false;

sys/dev/drm/i915/intel_sdvo.c

2916

return false;

sys/dev/drm/i915/intel_sdvo.c

2922

return false;

sys/dev/drm/i915/intel_sdvo.c

3063

return false;

sys/dev/drm/i915/intel_sdvo.c

3177

return false;

sys/dev/drm/i915/intel_sdvo.c

448

return false;

sys/dev/drm/i915/intel_sdvo.c

453

return false;

sys/dev/drm/i915/intel_sdvo.c

491

ret = false;

sys/dev/drm/i915/intel_sdvo.c

497

ret = false;

sys/dev/drm/i915/intel_sdvo.c

585

return false;

sys/dev/drm/i915/intel_sdvo.c

604

&ddc_bus, 1, false);

sys/dev/drm/i915/intel_sdvo.c

610

return false;

sys/dev/drm/i915/intel_sdvo.c

619

return false;

sys/dev/drm/i915/intel_sdvo.c

645

return false;

sys/dev/drm/i915/intel_sdvo.c

702

return false;

sys/dev/drm/i915/intel_sdvo.c

956

return false;

sys/dev/drm/i915/intel_sdvo.c

960

return false;

sys/dev/drm/i915/intel_sdvo.c

976

return false;

sys/dev/drm/i915/intel_sdvo.c

994

false);

sys/dev/drm/i915/intel_sdvo.c

997

return false;

sys/dev/drm/i915/intel_sprite.c

1046

return false;

sys/dev/drm/i915/intel_sprite.c

1571

return false;

sys/dev/drm/i915/intel_sprite.c

1585

return false;

sys/dev/drm/i915/intel_sprite.c

1597

return false;

sys/dev/drm/i915/intel_sprite.c

1612

return false;

sys/dev/drm/i915/intel_sprite.c

1624

return false;

sys/dev/drm/i915/intel_sprite.c

1644

return false;

sys/dev/drm/i915/intel_sprite.c

1662

return false;

sys/dev/drm/i915/intel_sprite.c

1665

return false;

sys/dev/drm/i915/intel_sprite.c

1694

return false;

sys/dev/drm/i915/intel_sprite.c

1746

return false;

sys/dev/drm/i915/intel_sprite.c

332

y_hphase = skl_scaler_calc_phase(1, hscale, false);

sys/dev/drm/i915/intel_sprite.c

333

y_vphase = skl_scaler_calc_phase(1, vscale, false);

sys/dev/drm/i915/intel_sprite.c

337

uv_rgb_vphase = skl_scaler_calc_phase(2, vscale, false);

sys/dev/drm/i915/intel_sprite.c

343

uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);

sys/dev/drm/i915/intel_sprite.c

344

uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);

sys/dev/drm/i915/intel_sprite.c

449

return false;

sys/dev/drm/i915/intel_sprite.c

713

return false;

sys/dev/drm/i915/intel_sprite.c

880

return false;

sys/dev/drm/i915/intel_tv.c

1021

burst_ena = false;

sys/dev/drm/i915/intel_tv.c

1536

connector->interlace_allowed = false;

sys/dev/drm/i915/intel_tv.c

1537

connector->doublescan_allowed = false;

sys/dev/drm/i915/intel_tv.c

389

.progressive = false, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

412

.pal_burst = false,

sys/dev/drm/i915/intel_tv.c

431

.progressive = false, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

454

.pal_burst = false,

sys/dev/drm/i915/intel_tv.c

474

.progressive = false, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

497

.pal_burst = false,

sys/dev/drm/i915/intel_tv.c

517

.progressive = false, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

560

.progressive = false, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

605

.progressive = false, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

647

.progressive = true, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

652

.veq_ena = false,

sys/dev/drm/i915/intel_tv.c

657

.burst_ena = false,

sys/dev/drm/i915/intel_tv.c

671

.progressive = true, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

676

.veq_ena = false,

sys/dev/drm/i915/intel_tv.c

681

.burst_ena = false,

sys/dev/drm/i915/intel_tv.c

700

.veq_ena = false,

sys/dev/drm/i915/intel_tv.c

705

.burst_ena = false,

sys/dev/drm/i915/intel_tv.c

724

.veq_ena = false,

sys/dev/drm/i915/intel_tv.c

729

.burst_ena = false,

sys/dev/drm/i915/intel_tv.c

744

.progressive = false, .trilevel_sync = true,

sys/dev/drm/i915/intel_tv.c

756

.burst_ena = false,

sys/dev/drm/i915/intel_tv.c

770

.progressive = false, .trilevel_sync = true,

sys/dev/drm/i915/intel_tv.c

782

.burst_ena = false,

sys/dev/drm/i915/intel_tv.c

883

return false;

sys/dev/drm/i915/intel_tv.c

886

return false;

sys/dev/drm/i915/intel_uc_fw.c

218

err = i915_gem_object_set_to_gtt_domain(uc_fw->obj, false);

sys/dev/drm/i915/intel_uncore.c

1115

trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \

sys/dev/drm/i915/intel_uncore.c

1159

unclaimed_reg_debug(dev_priv, reg, true, false); \

sys/dev/drm/i915/intel_uncore.c

1161

trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \

sys/dev/drm/i915/intel_uncore.c

1268

unclaimed_reg_debug(dev_priv, reg, false, true)

sys/dev/drm/i915/intel_uncore.c

1271

unclaimed_reg_debug(dev_priv, reg, false, false); \

sys/dev/drm/i915/intel_uncore.c

2286

bool ret = false;

sys/dev/drm/i915/intel_uncore.c

356

if (xchg(&domain->active, false))

sys/dev/drm/i915/intel_uncore.c

392

smp_store_mb(domain->active, false);

sys/dev/drm/i915/intel_uncore.c

484

return false;

sys/dev/drm/i915/intel_uncore.c

498

return false;

sys/dev/drm/i915/intel_uncore.c

523

bool ret = false;

sys/dev/drm/i915/vlv_dsi.c

1024

bool active = false;

sys/dev/drm/i915/vlv_dsi.c

1030

return false;

sys/dev/drm/i915/vlv_dsi.c

1845

connector->interlace_allowed = false;

sys/dev/drm/i915/vlv_dsi.c

1846

connector->doublescan_allowed = false;

sys/dev/drm/i915/vlv_dsi.c

330

return false;

sys/dev/drm/i915/vlv_dsi.c

348

return false;

sys/dev/drm/i915/vlv_dsi.c

352

return false;

sys/dev/drm/i915/vlv_dsi.c

366

bool cold_boot = false;

sys/dev/drm/i915/vlv_dsi.c

807

bool glk_cold_boot = false;

sys/dev/drm/i915/vlv_dsi.c

885

dpi_send_cmd(intel_dsi, TURN_ON, false, port);

sys/dev/drm/i915/vlv_dsi.c

932

dpi_send_cmd(intel_dsi, SHUTDOWN, false, port);

sys/dev/drm/i915/vlv_dsi_pll.c

206

return false;

sys/dev/drm/i915/vlv_dsi_pll.c

220

enabled = false;

sys/dev/drm/i915/vlv_dsi_pll.c

225

enabled = false;

sys/dev/drm/include/asm/cpufeature.h

47

return false;

sys/dev/drm/include/drm/drmP.h

177

return false;

sys/dev/drm/include/drm/drm_cache.h

49

return false;

sys/dev/drm/include/drm/drm_cache.h

51

return false;

sys/dev/drm/include/drm/drm_cache.h

69

return false;

sys/dev/drm/include/drm/drm_drv.h

659

return false;

sys/dev/drm/include/linux/async.h

59

return false;

sys/dev/drm/include/linux/completion.h

144

bool ret = false;

sys/dev/drm/include/linux/completion.h

148

return false;

sys/dev/drm/include/linux/completion.h

83

bool timeout_expired = false, awakened = false;

sys/dev/drm/include/linux/console.h

34

return false;

sys/dev/drm/include/linux/dma-fence.h

126

return false;

sys/dev/drm/include/linux/dma-fence.h

140

return false;

sys/dev/drm/include/linux/hashtable.h

58

return false;

sys/dev/drm/include/linux/interval_tree_generic.h

86

min_entry = false; \

sys/dev/drm/include/linux/iopoll.h

61

read_poll_timeout(_pollfp, _var, _cond, _us, _to, false, _addr)

sys/dev/drm/include/linux/jump_label.h

34

#define DEFINE_STATIC_KEY_FALSE(key) bool key = false

sys/dev/drm/include/linux/pci.h

476

return false;

sys/dev/drm/include/linux/pci.h

504

return false;

sys/dev/drm/include/linux/scatterlist.h

282

return (false);

sys/dev/drm/include/linux/scatterlist.h

284

return (false);

sys/dev/drm/include/linux/scatterlist.h

293

return (false);

sys/dev/drm/include/linux/scatterlist.h

295

return (false);

sys/dev/drm/include/linux/vga_switcheroo.h

198

static inline bool vga_switcheroo_client_probe_defer(struct pci_dev *pdev) { return false; }

sys/dev/drm/include/linux/wait.h

114

bool timeout_expired = false; \

sys/dev/drm/include/linux/wait.h

115

bool interrupted = false; \

sys/dev/drm/include/linux/wait.h

172

__wait_event_common(wq, condition, 0, 0, false)

sys/dev/drm/include/linux/wait.h

175

__wait_event_common(wq, condition, timeout, 0, false)

sys/dev/drm/include/linux/wait.h

181

retval = __wait_event_common(wq, condition, 0, PCATCH, false); \

sys/dev/drm/include/linux/wait.h

191

retval = __wait_event_common(wq, condition, 0, PCATCH, false); \

sys/dev/drm/include/linux/wait.h

208

__wait_event_common(wq, condition, timeout, PCATCH, false)

sys/dev/drm/include/linux/workqueue.h

142

return false;

sys/dev/drm/include/linux/workqueue.h

82

(work)->on_queue = false; \

sys/dev/drm/include/linux/workqueue.h

83

(work)->running = false; \

sys/dev/drm/include/linux/workqueue.h

84

(work)->canceled = false; \

sys/dev/drm/linux_dmi.c

64

return false;

sys/dev/drm/linux_dmi.c

67

return false;

sys/dev/drm/linux_fence-array.c

111

return false;

sys/dev/drm/linux_fence.c

168

return false;

sys/dev/drm/linux_hdmi.c

1047

frame->itc = ptr[2] & 0x80 ? true : false;

sys/dev/drm/linux_hdmi.c

1139

frame->downmix_inhibit = ptr[4] & 0x80 ? true : false;

sys/dev/drm/linux_hrtimer.c

111

timer->cancel = false;

sys/dev/drm/linux_hrtimer.c

112

timer->running = false;

sys/dev/drm/linux_hrtimer.c

51

timer->running = false;

sys/dev/drm/linux_hrtimer.c

52

timer->active = false;

sys/dev/drm/linux_hrtimer.c

59

timer->running = false;

sys/dev/drm/linux_hrtimer.c

60

timer->active = false;

sys/dev/drm/linux_hrtimer.c

79

timer->active = false;

sys/dev/drm/linux_hrtimer.c

80

timer->running = false;

sys/dev/drm/linux_hrtimer.c

81

timer->cancel = false;

sys/dev/drm/linux_hrtimer.c

95

timer->is_rel = false;

sys/dev/drm/linux_radix.c

86

return (false);

sys/dev/drm/linux_radix.c

89

return (false);

sys/dev/drm/linux_vmalloc.c

104

return false;

sys/dev/drm/linux_workqueue.c

123

int ret = false;

sys/dev/drm/linux_workqueue.c

127

return false;

sys/dev/drm/linux_workqueue.c

135

work->canceled = false;

sys/dev/drm/linux_workqueue.c

136

if (work->on_queue == false || work->running == false) {

sys/dev/drm/linux_workqueue.c

137

if (work->on_queue == false) {

sys/dev/drm/linux_workqueue.c

328

int ret = false;

sys/dev/drm/linux_workqueue.c

346

ret = false;

sys/dev/drm/linux_workqueue.c

354

if (worker != work->worker || work->on_queue == false) {

sys/dev/drm/linux_workqueue.c

360

work->on_queue = false;

sys/dev/drm/linux_workqueue.c

364

if (work->running == false)

sys/dev/drm/linux_workqueue.c

371

if (worker != work->worker || work->running == false) {

sys/dev/drm/linux_workqueue.c

377

if (sync_wait == false) {

sys/dev/drm/linux_workqueue.c

412

return _cancel_work(work, false);

sys/dev/drm/linux_workqueue.c

74

work->on_queue = false;

sys/dev/drm/linux_workqueue.c

83

work->canceled = false;

sys/dev/drm/linux_workqueue.c

92

if (work->on_queue == false)

sys/dev/drm/linux_workqueue.c

96

work->running = false;

sys/dev/drm/radeon/atom.c

1185

ectx.abort = false;

sys/dev/drm/radeon/atom.c

1375

return false;

sys/dev/drm/radeon/atom.c

1395

return false;

sys/dev/drm/radeon/atombios_crtc.c

1017

radeon_crtc->ss_enabled = false;

sys/dev/drm/radeon/atombios_crtc.c

1157

bool bypass_lut = false;

sys/dev/drm/radeon/atombios_crtc.c

1176

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/atombios_crtc.c

1440

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/atombios_crtc.c

1468

bool bypass_lut = false;

sys/dev/drm/radeon/atombios_crtc.c

1484

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/atombios_crtc.c

1634

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/atombios_crtc.c

1902

(dig->linkb == false))

sys/dev/drm/radeon/atombios_crtc.c

2035

bool is_tvcv = false;

sys/dev/drm/radeon/atombios_crtc.c

2088

return false;

sys/dev/drm/radeon/atombios_crtc.c

2097

return false;

sys/dev/drm/radeon/atombios_crtc.c

2099

return false;

sys/dev/drm/radeon/atombios_crtc.c

2105

return false;

sys/dev/drm/radeon/atombios_crtc.c

2143

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/atombios_crtc.c

2177

0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);

sys/dev/drm/radeon/atombios_crtc.c

2186

0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);

sys/dev/drm/radeon/atombios_crtc.c

292

radeon_crtc->enabled = false;

sys/dev/drm/radeon/atombios_crtc.c

91

bool is_tv = false, is_cv = false;

sys/dev/drm/radeon/atombios_crtc.c

970

radeon_crtc->ss_enabled = false;

sys/dev/drm/radeon/atombios_dp.c

145

radeon_atom_copy_swap(recv, base + 16, recv_bytes, false);

sys/dev/drm/radeon/atombios_dp.c

406

return false;

sys/dev/drm/radeon/atombios_dp.c

513

return false;

sys/dev/drm/radeon/atombios_dp.c

515

return false;

sys/dev/drm/radeon/atombios_dp.c

681

clock_recovery = false;

sys/dev/drm/radeon/atombios_dp.c

746

channel_eq = false;

sys/dev/drm/radeon/atombios_dp.c

820

dp_info.use_dpencoder = false;

sys/dev/drm/radeon/atombios_dp.c

839

dp_info.tp3_supported = false;

sys/dev/drm/radeon/atombios_dp.c

841

dp_info.tp3_supported = false;

sys/dev/drm/radeon/atombios_encoders.c

1079

bool is_dp = false;

sys/dev/drm/radeon/atombios_encoders.c

1479

return false;

sys/dev/drm/radeon/atombios_encoders.c

1728

bool travis_quirk = false;

sys/dev/drm/radeon/atombios_encoders.c

1828

radeon_dig_connector->edp_on = false;

sys/dev/drm/radeon/atombios_encoders.c

1907

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/atombios_encoders.c

2346

atombios_yuv_setup(encoder, false);

sys/dev/drm/radeon/atombios_encoders.c

2409

return false;

sys/dev/drm/radeon/atombios_encoders.c

2437

return false;

sys/dev/drm/radeon/atombios_encoders.c

2597

radeon_atom_output_lock(encoder, false);

sys/dev/drm/radeon/atombios_encoders.c

2658

radeon_hdmi_enable(rdev, encoder, false);

sys/dev/drm/radeon/atombios_encoders.c

2772

dig->linkb = false;

sys/dev/drm/radeon/atombios_encoders.c

2826

radeon_encoder->is_ext_encoder = false;

sys/dev/drm/radeon/atombios_i2c.c

96

radeon_atom_copy_swap(buf, base, num, false);

sys/dev/drm/radeon/btc_dpm.c

1621

return false;

sys/dev/drm/radeon/btc_dpm.c

1676

eg_pi->ulv.supported = false;

sys/dev/drm/radeon/btc_dpm.c

1724

eg_pi->uvd_enabled = false;

sys/dev/drm/radeon/btc_dpm.c

1796

return false;

sys/dev/drm/radeon/btc_dpm.c

1799

return false;

sys/dev/drm/radeon/btc_dpm.c

1891

result = false;

sys/dev/drm/radeon/btc_dpm.c

2088

return false;

sys/dev/drm/radeon/btc_dpm.c

2105

disable_mclk_switching = false;

sys/dev/drm/radeon/btc_dpm.c

2112

if (rdev->pm.dpm.ac_power == false) {

sys/dev/drm/radeon/btc_dpm.c

2245

ps->dc_compatible = false;

sys/dev/drm/radeon/btc_dpm.c

2412

eg_pi->dynamic_ac_timing = false;

sys/dev/drm/radeon/btc_dpm.c

2460

ret = cypress_notify_smc_display_change(rdev, false);

sys/dev/drm/radeon/btc_dpm.c

2501

rv770_enable_thermal_protection(rdev, false);

sys/dev/drm/radeon/btc_dpm.c

2504

btc_enable_dynamic_pcie_gen2(rdev, false);

sys/dev/drm/radeon/btc_dpm.c

2508

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/btc_dpm.c

2513

btc_cg_clock_gating_enable(rdev, false);

sys/dev/drm/radeon/btc_dpm.c

2516

btc_mg_clock_gating_enable(rdev, false);

sys/dev/drm/radeon/btc_dpm.c

2519

btc_ls_clock_gating_enable(rdev, false);

sys/dev/drm/radeon/btc_dpm.c

2524

cypress_enable_spread_spectrum(rdev, false);

sys/dev/drm/radeon/btc_dpm.c

2564

eg_pi->ulv.supported = false;

sys/dev/drm/radeon/btc_dpm.c

2603

0, false, &dividers);

sys/dev/drm/radeon/btc_dpm.c

2645

pi->power_gating = false;

sys/dev/drm/radeon/btc_dpm.c

2651

eg_pi->ls_clock_gating = false;

sys/dev/drm/radeon/btc_dpm.c

2652

eg_pi->sclk_deep_sleep = false;

sys/dev/drm/radeon/btc_dpm.c

2659

pi->thermal_protection = false;

sys/dev/drm/radeon/btc_dpm.c

2666

pi->dcodt = false;

sys/dev/drm/radeon/btc_dpm.c

2679

eg_pi->pcie_performance_request = false;

sys/dev/drm/radeon/btc_dpm.c

2685

eg_pi->dll_default_on = false;

sys/dev/drm/radeon/btc_dpm.c

2687

eg_pi->sclk_deep_sleep = false;

sys/dev/drm/radeon/ci_dpm.c

1003

rdev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/radeon/ci_dpm.c

1010

rdev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/radeon/ci_dpm.c

1062

rdev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/radeon/ci_dpm.c

1103

pi->fan_is_controlled_by_smc = false;

sys/dev/drm/radeon/ci_dpm.c

1424

want_thermal_protection = false;

sys/dev/drm/radeon/ci_dpm.c

1642

ret = ci_enable_sclk_mclk_dpm(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

1801

return ci_enable_sclk_mclk_dpm(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

2367

bool voltage_found = false;

sys/dev/drm/radeon/ci_dpm.c

245

pi->caps_cac = false;

sys/dev/drm/radeon/ci_dpm.c

246

pi->caps_sq_ramping = false;

sys/dev/drm/radeon/ci_dpm.c

247

pi->caps_db_ramping = false;

sys/dev/drm/radeon/ci_dpm.c

248

pi->caps_td_ramping = false;

sys/dev/drm/radeon/ci_dpm.c

249

pi->caps_tcp_ramping = false;

sys/dev/drm/radeon/ci_dpm.c

2538

patch = ((tmp & 0x0000f00) == 0x300) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

254

pi->enable_bapm_feature = false;

sys/dev/drm/radeon/ci_dpm.c

2703

table->UvdLevel[count].VclkFrequency, false, &dividers);

sys/dev/drm/radeon/ci_dpm.c

2711

table->UvdLevel[count].DclkFrequency, false, &dividers);

sys/dev/drm/radeon/ci_dpm.c

2744

table->VceLevel[count].Frequency, false, &dividers);

sys/dev/drm/radeon/ci_dpm.c

2777

table->AcpLevel[count].Frequency, false, &dividers);

sys/dev/drm/radeon/ci_dpm.c

2809

table->SamuLevel[count].Frequency, false, &dividers);

sys/dev/drm/radeon/ci_dpm.c

2955

memory_level->StutterEnable = false;

sys/dev/drm/radeon/ci_dpm.c

2956

memory_level->StrobeEnable = false;

sys/dev/drm/radeon/ci_dpm.c

2957

memory_level->EdcReadEnable = false;

sys/dev/drm/radeon/ci_dpm.c

2958

memory_level->EdcWriteEnable = false;

sys/dev/drm/radeon/ci_dpm.c

2959

memory_level->RttEnable = false;

sys/dev/drm/radeon/ci_dpm.c

2965

(pi->uvd_enabled == false) &&

sys/dev/drm/radeon/ci_dpm.c

2988

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

2990

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

2996

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

3048

table->ACPILevel.SclkFrequency, false, &dividers);

sys/dev/drm/radeon/ci_dpm.c

3129

table->MemoryACPILevel.StutterEnable = false;

sys/dev/drm/radeon/ci_dpm.c

3130

table->MemoryACPILevel.StrobeEnable = false;

sys/dev/drm/radeon/ci_dpm.c

3131

table->MemoryACPILevel.EdcReadEnable = false;

sys/dev/drm/radeon/ci_dpm.c

3132

table->MemoryACPILevel.EdcWriteEnable = false;

sys/dev/drm/radeon/ci_dpm.c

3133

table->MemoryACPILevel.RttEnable = false;

sys/dev/drm/radeon/ci_dpm.c

3166

pi->ulv.supported = false;

sys/dev/drm/radeon/ci_dpm.c

3210

engine_clock, false, &dividers);

sys/dev/drm/radeon/ci_dpm.c

3416

dpm_table->dpm_levels[i].enabled = false;

sys/dev/drm/radeon/ci_dpm.c

3521

(i == 0) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

3534

(i == 0) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

3746

dpm_table->dpm_levels[i].enabled = false;

sys/dev/drm/radeon/ci_dpm.c

3765

pcie_table->dpm_levels[i].enabled = false;

sys/dev/drm/radeon/ci_dpm.c

3776

pcie_table->dpm_levels[j].enabled = false;

sys/dev/drm/radeon/ci_dpm.c

4001

pi->uvd_enabled = false;

sys/dev/drm/radeon/ci_dpm.c

4159

cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false);

sys/dev/drm/radeon/ci_dpm.c

4172

ret = ci_enable_vce_dpm(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

4507

result = false;

sys/dev/drm/radeon/ci_dpm.c

4576

patch = ((tmp & 0x0000f00) == 0x300) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

4898

pi->pspp_notify_required = false;

sys/dev/drm/radeon/ci_dpm.c

4903

if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN3, false) == 0)

sys/dev/drm/radeon/ci_dpm.c

4909

if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)

sys/dev/drm/radeon/ci_dpm.c

4944

radeon_acpi_pcie_performance_request(rdev, request, false);

sys/dev/drm/radeon/ci_dpm.c

5136

pi->mem_gddr5 = false;

sys/dev/drm/radeon/ci_dpm.c

5216

pi->caps_dynamic_ac_timing = false;

sys/dev/drm/radeon/ci_dpm.c

5264

ret = ci_notify_smc_display_change(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5326

ret = ci_thermal_enable_alert(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5357

ci_dpm_powergate_uvd(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5365

ci_enable_thermal_protection(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5366

ci_enable_power_containment(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5367

ci_enable_smc_cac(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5368

ci_enable_didt(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5369

ci_enable_spread_spectrum(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5370

ci_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, false);

sys/dev/drm/radeon/ci_dpm.c

5372

ci_enable_ds_master_switch(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5373

ci_enable_ulv(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5378

ci_enable_thermal_based_sclk_dpm(rdev, false);

sys/dev/drm/radeon/ci_dpm.c

5787

pi->dll_default_on = false;

sys/dev/drm/radeon/ci_dpm.c

5821

pi->caps_fps = false;

sys/dev/drm/radeon/ci_dpm.c

5823

pi->caps_sclk_throttle_low_notification = false;

sys/dev/drm/radeon/ci_dpm.c

5867

pi->uvd_enabled = false;

sys/dev/drm/radeon/ci_dpm.c

5950

pi->pcie_performance_request = false;

sys/dev/drm/radeon/ci_dpm.c

5959

pi->caps_sclk_ss_support = false;

sys/dev/drm/radeon/ci_dpm.c

5960

pi->caps_mclk_ss_support = false;

sys/dev/drm/radeon/ci_dpm.c

5967

pi->thermal_protection = false;

sys/dev/drm/radeon/ci_dpm.c

5971

pi->uvd_power_gated = false;

sys/dev/drm/radeon/ci_dpm.c

702

pi->cac_enabled = false;

sys/dev/drm/radeon/ci_dpm.c

708

pi->cac_enabled = false;

sys/dev/drm/radeon/ci_dpm.c

742

bool adjust_polarity = false; /* ??? */

sys/dev/drm/radeon/ci_dpm.c

825

return false;

sys/dev/drm/radeon/ci_dpm.c

851

disable_mclk_switching = false;

sys/dev/drm/radeon/ci_dpm.c

856

pi->battery_state = false;

sys/dev/drm/radeon/ci_dpm.c

863

if (rdev->pm.dpm.ac_power == false) {

sys/dev/drm/radeon/ci_dpm.c

949

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/ci_dpm.c

979

pi->fan_ctrl_is_in_default_mode = false;

sys/dev/drm/radeon/ci_smc.c

163

return false;

sys/dev/drm/radeon/cik.c

1972

bool new_smc = false;

sys/dev/drm/radeon/cik.c

2266

rdev->new_fw = false;

sys/dev/drm/radeon/cik.c

3493

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/cik.c

3695

radeon_sync_resv(rdev, &sync, resv, false);

sys/dev/drm/radeon/cik.c

3724

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/cik.c

3819

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/cik.c

3826

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

sys/dev/drm/radeon/cik.c

3897

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/cik.c

3917

cik_cp_gfx_enable(rdev, false);

sys/dev/drm/radeon/cik.c

4044

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/cik.c

4059

cik_cp_gfx_enable(rdev, false);

sys/dev/drm/radeon/cik.c

4129

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/cik.c

4258

rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;

sys/dev/drm/radeon/cik.c

4259

rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false;

sys/dev/drm/radeon/cik.c

4279

cik_cp_compute_enable(rdev, false);

sys/dev/drm/radeon/cik.c

4362

cik_cp_compute_enable(rdev, false);

sys/dev/drm/radeon/cik.c

4371

r = radeon_bo_reserve(rdev->ring[idx].mqd_obj, false);

sys/dev/drm/radeon/cik.c

4389

r = radeon_bo_reserve(rdev->mec.hpd_eop_obj, false);

sys/dev/drm/radeon/cik.c

4430

r = radeon_bo_reserve(rdev->mec.hpd_eop_obj, false);

sys/dev/drm/radeon/cik.c

4601

r = radeon_bo_reserve(rdev->ring[idx].mqd_obj, false);

sys/dev/drm/radeon/cik.c

4765

rdev->ring[idx].ready = false;

sys/dev/drm/radeon/cik.c

4801

cik_enable_gui_idle_interrupt(rdev, false);

sys/dev/drm/radeon/cik.c

5261

r600_set_bios_scratch_engine_hung(rdev, false);

sys/dev/drm/radeon/cik.c

5283

return false;

sys/dev/drm/radeon/cik.c

5906

cik_enable_gui_idle_interrupt(rdev, false);

sys/dev/drm/radeon/cik.c

6007

cik_enable_lbpw(rdev, false);

sys/dev/drm/radeon/cik.c

6038

cik_enable_gui_idle_interrupt(rdev, false);

sys/dev/drm/radeon/cik.c

6310

cik_enable_gui_idle_interrupt(rdev, false);

sys/dev/drm/radeon/cik.c

6316

cik_enable_cgcg(rdev, false);

sys/dev/drm/radeon/cik.c

6317

cik_enable_mgcg(rdev, false);

sys/dev/drm/radeon/cik.c

6374

RADEON_CG_BLOCK_HDP), false);

sys/dev/drm/radeon/cik.c

6376

cik_update_cg(rdev, RADEON_CG_BLOCK_GFX, false);

sys/dev/drm/radeon/cik.c

6809

cik_update_gfx_pg(rdev, false);

sys/dev/drm/radeon/cik.c

6811

cik_enable_cp_pg(rdev, false);

sys/dev/drm/radeon/cik.c

6812

cik_enable_gds_pg(rdev, false);

sys/dev/drm/radeon/cik.c

6870

rdev->ih.enabled = false;

sys/dev/drm/radeon/cik.c

7574

bool queue_hotplug = false;

sys/dev/drm/radeon/cik.c

7575

bool queue_dp = false;

sys/dev/drm/radeon/cik.c

7576

bool queue_reset = false;

sys/dev/drm/radeon/cik.c

7578

bool queue_thermal = false;

sys/dev/drm/radeon/cik.c

8056

rdev->pm.dpm.thermal.high_to_low = false;

sys/dev/drm/radeon/cik.c

8526

rdev->accel_working = false;

sys/dev/drm/radeon/cik.c

8548

cik_cp_enable(rdev, false);

sys/dev/drm/radeon/cik.c

8549

cik_sdma_enable(rdev, false);

sys/dev/drm/radeon/cik.c

8705

rdev->accel_working = false;

sys/dev/drm/radeon/cik.c

9194

return false;

sys/dev/drm/radeon/cik.c

9214

return false;

sys/dev/drm/radeon/cik.c

9249

return false;

sys/dev/drm/radeon/cik.c

9285

radeon_dpm_get_mclk(rdev, false) * 10;

sys/dev/drm/radeon/cik.c

9287

radeon_dpm_get_sclk(rdev, false) * 10;

sys/dev/drm/radeon/cik.c

9297

wm_high.interlaced = false;

sys/dev/drm/radeon/cik.c

9337

wm_low.interlaced = false;

sys/dev/drm/radeon/cik.c

9449

clock, false, &dividers);

sys/dev/drm/radeon/cik.c

9488

ecclk, false, &dividers);

sys/dev/drm/radeon/cik.c

9683

bool disable_l0s = false, disable_l1 = false, disable_plloff_in_l1 = false;

sys/dev/drm/radeon/cik.c

9685

bool disable_clkreq = false;

sys/dev/drm/radeon/cik.c

9765

clk_req_support = false;

sys/dev/drm/radeon/cik.c

9770

clk_req_support = false;

sys/dev/drm/radeon/cik.c

9773

clk_req_support = false;

sys/dev/drm/radeon/cik_sdma.c

267

rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false;

sys/dev/drm/radeon/cik_sdma.c

268

rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX].ready = false;

sys/dev/drm/radeon/cik_sdma.c

334

if (enable == false) {

sys/dev/drm/radeon/cik_sdma.c

426

ring->ready = false;

sys/dev/drm/radeon/cik_sdma.c

468

cik_sdma_enable(rdev, false);

sys/dev/drm/radeon/cik_sdma.c

558

cik_sdma_enable(rdev, false);

sys/dev/drm/radeon/cik_sdma.c

601

radeon_sync_resv(rdev, &sync, resv, false);

sys/dev/drm/radeon/cik_sdma.c

627

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/cik_sdma.c

672

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/cik_sdma.c

732

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/cik_sdma.c

738

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

sys/dev/drm/radeon/cik_sdma.c

785

return false;

sys/dev/drm/radeon/cypress_dpm.c

1585

pi->mvdd_control = false;

sys/dev/drm/radeon/cypress_dpm.c

1600

pi->mvdd_control = false;

sys/dev/drm/radeon/cypress_dpm.c

1608

pi->mvdd_control = false;

sys/dev/drm/radeon/cypress_dpm.c

1797

eg_pi->pcie_performance_request_registered = false;

sys/dev/drm/radeon/cypress_dpm.c

1842

eg_pi->dynamic_ac_timing = false;

sys/dev/drm/radeon/cypress_dpm.c

1895

ret = cypress_notify_smc_display_change(rdev, false);

sys/dev/drm/radeon/cypress_dpm.c

1930

rv770_enable_thermal_protection(rdev, false);

sys/dev/drm/radeon/cypress_dpm.c

1933

cypress_enable_dynamic_pcie_gen2(rdev, false);

sys/dev/drm/radeon/cypress_dpm.c

1937

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/cypress_dpm.c

1942

cypress_gfx_clock_gating_enable(rdev, false);

sys/dev/drm/radeon/cypress_dpm.c

1945

cypress_mg_clock_gating_enable(rdev, false);

sys/dev/drm/radeon/cypress_dpm.c

1950

cypress_enable_spread_spectrum(rdev, false);

sys/dev/drm/radeon/cypress_dpm.c

2040

eg_pi->ulv.supported = false;

sys/dev/drm/radeon/cypress_dpm.c

2060

0, false, &dividers);

sys/dev/drm/radeon/cypress_dpm.c

2090

pi->power_gating = false;

sys/dev/drm/radeon/cypress_dpm.c

2094

pi->gfx_clock_gating = false;

sys/dev/drm/radeon/cypress_dpm.c

2100

eg_pi->ls_clock_gating = false;

sys/dev/drm/radeon/cypress_dpm.c

2101

eg_pi->sclk_deep_sleep = false;

sys/dev/drm/radeon/cypress_dpm.c

2108

pi->thermal_protection = false;

sys/dev/drm/radeon/cypress_dpm.c

2115

pi->dcodt = false;

sys/dev/drm/radeon/cypress_dpm.c

2128

eg_pi->pcie_performance_request = false;

sys/dev/drm/radeon/cypress_dpm.c

2136

eg_pi->dll_default_on = false;

sys/dev/drm/radeon/cypress_dpm.c

2138

eg_pi->sclk_deep_sleep = false;

sys/dev/drm/radeon/cypress_dpm.c

2167

return false;

sys/dev/drm/radeon/cypress_dpm.c

320

eg_pi->pcie_performance_request_registered = false;

sys/dev/drm/radeon/cypress_dpm.c

343

pi->pcie_gen2 = false;

sys/dev/drm/radeon/cypress_dpm.c

377

cypress_pcie_performance_request(rdev, request, false);

sys/dev/drm/radeon/cypress_dpm.c

399

cypress_pcie_performance_request(rdev, request, false);

sys/dev/drm/radeon/cypress_dpm.c

427

bool strobe_mode = false;

sys/dev/drm/radeon/cypress_dpm.c

722

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/cypress_dpm.c

724

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/dce6_afmt.c

80

rdev->audio.pin[i].connected = false;

sys/dev/drm/radeon/evergreen.c

1134

clock, false, &dividers);

sys/dev/drm/radeon/evergreen.c

1338

return false;

sys/dev/drm/radeon/evergreen.c

1351

return false;

sys/dev/drm/radeon/evergreen.c

1708

return false;

sys/dev/drm/radeon/evergreen.c

2096

return false;

sys/dev/drm/radeon/evergreen.c

2105

return false;

sys/dev/drm/radeon/evergreen.c

2131

return false;

sys/dev/drm/radeon/evergreen.c

2164

radeon_dpm_get_mclk(rdev, false) * 10;

sys/dev/drm/radeon/evergreen.c

2166

radeon_dpm_get_sclk(rdev, false) * 10;

sys/dev/drm/radeon/evergreen.c

2176

wm_high.interlaced = false;

sys/dev/drm/radeon/evergreen.c

2203

wm_low.interlaced = false;

sys/dev/drm/radeon/evergreen.c

2557

bool is_enabled = false;

sys/dev/drm/radeon/evergreen.c

2558

bool found_crtc = false;

sys/dev/drm/radeon/evergreen.c

2707

save->crtc_enabled[i] = false;

sys/dev/drm/radeon/evergreen.c

2710

save->crtc_enabled[i] = false;

sys/dev/drm/radeon/evergreen.c

2997

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/evergreen.c

3040

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/evergreen.c

3106

ring->ready = false;

sys/dev/drm/radeon/evergreen.c

3801

return false;

sys/dev/drm/radeon/evergreen.c

4059

r600_set_bios_scratch_engine_hung(rdev, false);

sys/dev/drm/radeon/evergreen.c

4081

return false;

sys/dev/drm/radeon/evergreen.c

4098

r = radeon_bo_reserve(rdev->rlc.save_restore_obj, false);

sys/dev/drm/radeon/evergreen.c

4110

r = radeon_bo_reserve(rdev->rlc.clear_state_obj, false);

sys/dev/drm/radeon/evergreen.c

4122

r = radeon_bo_reserve(rdev->rlc.cp_table_obj, false);

sys/dev/drm/radeon/evergreen.c

4164

r = radeon_bo_reserve(rdev->rlc.save_restore_obj, false);

sys/dev/drm/radeon/evergreen.c

4243

r = radeon_bo_reserve(rdev->rlc.clear_state_obj, false);

sys/dev/drm/radeon/evergreen.c

4321

r = radeon_bo_reserve(rdev->rlc.cp_table_obj, false);

sys/dev/drm/radeon/evergreen.c

4693

bool queue_hotplug = false;

sys/dev/drm/radeon/evergreen.c

4694

bool queue_hdmi = false;

sys/dev/drm/radeon/evergreen.c

4695

bool queue_dp = false;

sys/dev/drm/radeon/evergreen.c

4696

bool queue_thermal = false;

sys/dev/drm/radeon/evergreen.c

4868

rdev->pm.dpm.thermal.high_to_low = false;

sys/dev/drm/radeon/evergreen.c

5127

rdev->accel_working = false;

sys/dev/drm/radeon/evergreen.c

5258

rdev->accel_working = false;

sys/dev/drm/radeon/evergreen.c

5275

rdev->accel_working = false;

sys/dev/drm/radeon/evergreen.c

5384

bool disable_l0s, disable_l1 = false, disable_plloff_in_l1 = false;

sys/dev/drm/radeon/evergreen.c

5390

bool fusion_platform = false;

sys/dev/drm/radeon/evergreen.c

5411

disable_l0s = false;

sys/dev/drm/radeon/evergreen_cs.c

1008

track->db_dirty = false;

sys/dev/drm/radeon/evergreen_cs.c

165

track->sx_misc_kill_all_prims = false;

sys/dev/drm/radeon/evergreen_cs.c

1761

return false;

sys/dev/drm/radeon/evergreen_cs.c

1767

return false;

sys/dev/drm/radeon/evergreen_cs.c

3342

return false;

sys/dev/drm/radeon/evergreen_cs.c

962

track->streamout_dirty = false;

sys/dev/drm/radeon/evergreen_cs.c

990

track->cb_dirty = false;

sys/dev/drm/radeon/evergreen_dma.c

130

radeon_sync_resv(rdev, &sync, resv, false);

sys/dev/drm/radeon/evergreen_dma.c

154

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/evergreen_dma.c

175

return false;

sys/dev/drm/radeon/kv_dpm.c

1032

table->entries[i].clk, false, &dividers);

sys/dev/drm/radeon/kv_dpm.c

1271

ret = kv_smc_bapm_enable(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1307

kv_smc_bapm_enable(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1310

kv_enable_nb_dpm(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1313

kv_dpm_powergate_acp(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1314

kv_dpm_powergate_samu(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1315

kv_dpm_powergate_vce(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1316

kv_dpm_powergate_uvd(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1318

kv_enable_smc_cac(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1319

kv_enable_didt(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1322

kv_enable_ulv(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1324

kv_enable_thermal_int(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1389

pi->uvd_power_gated = false;

sys/dev/drm/radeon/kv_dpm.c

1390

pi->vce_power_gated = false;

sys/dev/drm/radeon/kv_dpm.c

1391

pi->samu_power_gated = false;

sys/dev/drm/radeon/kv_dpm.c

1392

pi->acp_power_gated = false;

sys/dev/drm/radeon/kv_dpm.c

1480

kv_dpm_powergate_vce(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1482

cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false);

sys/dev/drm/radeon/kv_dpm.c

1504

kv_enable_vce_dpm(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1620

cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);

sys/dev/drm/radeon/kv_dpm.c

1675

kv_update_samu_dpm(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1698

kv_update_acp_dpm(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1803

pi->nb_dpm_enabled = false;

sys/dev/drm/radeon/kv_dpm.c

1907

kv_freeze_sclk_dpm(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

1955

kv_freeze_sclk_dpm(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

2225

pi->battery_state = false;

sys/dev/drm/radeon/kv_dpm.c

2390

kv_dpm_power_level_enable(rdev, i, false);

sys/dev/drm/radeon/kv_dpm.c

2523

pi->sys_info.nb_dpm_enable = false;

sys/dev/drm/radeon/kv_dpm.c

2742

pi->enable_nb_dpm = false;

sys/dev/drm/radeon/kv_dpm.c

2748

pi->enable_didt = false;

sys/dev/drm/radeon/kv_dpm.c

2758

pi->disable_nb_ps3_in_battery = false;

sys/dev/drm/radeon/kv_dpm.c

2764

pi->bapm_enable = false;

sys/dev/drm/radeon/kv_dpm.c

2766

pi->bapm_enable = false;

sys/dev/drm/radeon/kv_dpm.c

2771

pi->caps_sclk_throttle_low_notification = false;

sys/dev/drm/radeon/kv_dpm.c

2772

pi->caps_fps = false; /* true? */

sys/dev/drm/radeon/kv_dpm.c

2775

pi->caps_vce_pg = false; /* XXX true */

sys/dev/drm/radeon/kv_dpm.c

2776

pi->caps_samu_pg = false;

sys/dev/drm/radeon/kv_dpm.c

2777

pi->caps_acp_pg = false;

sys/dev/drm/radeon/kv_dpm.c

2778

pi->caps_stable_p_state = false;

sys/dev/drm/radeon/kv_dpm.c

439

pi->cac_enabled = false;

sys/dev/drm/radeon/kv_dpm.c

444

pi->cac_enabled = false;

sys/dev/drm/radeon/kv_dpm.c

538

sclk, false, &dividers);

sys/dev/drm/radeon/kv_dpm.c

652

kv_smc_dpm_enable(rdev, false);

sys/dev/drm/radeon/kv_dpm.c

842

table->entries[i].vclk, false, &dividers);

sys/dev/drm/radeon/kv_dpm.c

848

table->entries[i].dclk, false, &dividers);

sys/dev/drm/radeon/kv_dpm.c

910

table->entries[i].evclk, false, &dividers);

sys/dev/drm/radeon/kv_dpm.c

973

table->entries[i].clk, false, &dividers);

sys/dev/drm/radeon/ni.c

1480

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/ni.c

1541

cayman_cp_enable(rdev, false);

sys/dev/drm/radeon/ni.c

1577

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/ni.c

1619

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/ni.c

1629

cayman_cp_enable(rdev, false);

sys/dev/drm/radeon/ni.c

1739

rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;

sys/dev/drm/radeon/ni.c

1740

rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false;

sys/dev/drm/radeon/ni.c

1744

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/ni.c

1745

rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;

sys/dev/drm/radeon/ni.c

1746

rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false;

sys/dev/drm/radeon/ni.c

1987

r600_set_bios_scratch_engine_hung(rdev, false);

sys/dev/drm/radeon/ni.c

2009

return false;

sys/dev/drm/radeon/ni.c

2335

rdev->accel_working = false;

sys/dev/drm/radeon/ni.c

2346

cayman_cp_enable(rdev, false);

sys/dev/drm/radeon/ni.c

2469

rdev->accel_working = false;

sys/dev/drm/radeon/ni.c

2739

ecclk, false, &dividers);

sys/dev/drm/radeon/ni_dma.c

173

rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false;

sys/dev/drm/radeon/ni_dma.c

174

rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX].ready = false;

sys/dev/drm/radeon/ni_dma.c

250

ring->ready = false;

sys/dev/drm/radeon/ni_dma.c

297

return false;

sys/dev/drm/radeon/ni_dpm.c

1472

false, /* ??? */

sys/dev/drm/radeon/ni_dpm.c

2016

engine_clock, false, &dividers);

sys/dev/drm/radeon/ni_dpm.c

2349

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ni_dpm.c

2351

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ni_dpm.c

2353

dll_state_on = false;

sys/dev/drm/radeon/ni_dpm.c

2469

if (ni_pi->enable_power_containment == false)

sys/dev/drm/radeon/ni_dpm.c

2479

false, /* ??? */

sys/dev/drm/radeon/ni_dpm.c

2559

enable_sq_ramping = false;

sys/dev/drm/radeon/ni_dpm.c

2562

enable_sq_ramping = false;

sys/dev/drm/radeon/ni_dpm.c

2565

enable_sq_ramping = false;

sys/dev/drm/radeon/ni_dpm.c

2568

enable_sq_ramping = false;

sys/dev/drm/radeon/ni_dpm.c

2571

enable_sq_ramping = false;

sys/dev/drm/radeon/ni_dpm.c

2610

ni_pi->pc_enabled = false;

sys/dev/drm/radeon/ni_dpm.c

2619

ni_pi->pc_enabled = false;

sys/dev/drm/radeon/ni_dpm.c

2676

ni_pi->enable_power_containment = false;

sys/dev/drm/radeon/ni_dpm.c

2680

ni_pi->enable_sq_ramping = false;

sys/dev/drm/radeon/ni_dpm.c

2813

result = false;

sys/dev/drm/radeon/ni_dpm.c

3147

if (ni_pi->enable_cac == false)

sys/dev/drm/radeon/ni_dpm.c

3199

ni_pi->enable_cac = false;

sys/dev/drm/radeon/ni_dpm.c

3200

ni_pi->enable_power_containment = false;

sys/dev/drm/radeon/ni_dpm.c

3393

ni_pi->support_cac_long_term_average = false;

sys/dev/drm/radeon/ni_dpm.c

3400

ni_pi->cac_enabled = (PPSMC_Result_OK == smc_result) ? true : false;

sys/dev/drm/radeon/ni_dpm.c

3405

ni_pi->cac_enabled = false;

sys/dev/drm/radeon/ni_dpm.c

3410

ni_pi->support_cac_long_term_average = false;

sys/dev/drm/radeon/ni_dpm.c

3426

if (eg_pi->pcie_performance_request_registered == false)

sys/dev/drm/radeon/ni_dpm.c

3432

eg_pi->pcie_performance_request_registered = false;

sys/dev/drm/radeon/ni_dpm.c

3450

pi->pcie_gen2 = false;

sys/dev/drm/radeon/ni_dpm.c

3611

eg_pi->dynamic_ac_timing = false;

sys/dev/drm/radeon/ni_dpm.c

3680

ret = cypress_notify_smc_display_change(rdev, false);

sys/dev/drm/radeon/ni_dpm.c

3713

rv770_enable_thermal_protection(rdev, false);

sys/dev/drm/radeon/ni_dpm.c

3714

ni_enable_power_containment(rdev, boot_ps, false);

sys/dev/drm/radeon/ni_dpm.c

3715

ni_enable_smc_cac(rdev, boot_ps, false);

sys/dev/drm/radeon/ni_dpm.c

3716

cypress_enable_spread_spectrum(rdev, false);

sys/dev/drm/radeon/ni_dpm.c

3717

rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, false);

sys/dev/drm/radeon/ni_dpm.c

3719

ni_enable_dynamic_pcie_gen2(rdev, false);

sys/dev/drm/radeon/ni_dpm.c

3723

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/ni_dpm.c

3728

ni_gfx_clockgating_enable(rdev, false);

sys/dev/drm/radeon/ni_dpm.c

3730

ni_mg_clockgating_enable(rdev, false);

sys/dev/drm/radeon/ni_dpm.c

3732

ni_ls_clockgating_enable(rdev, false);

sys/dev/drm/radeon/ni_dpm.c

3791

ret = ni_enable_power_containment(rdev, new_ps, false);

sys/dev/drm/radeon/ni_dpm.c

3796

ret = ni_enable_smc_cac(rdev, new_ps, false);

sys/dev/drm/radeon/ni_dpm.c

3952

pi->acpi_pcie_gen2 = false;

sys/dev/drm/radeon/ni_dpm.c

4062

eg_pi->ulv.supported = false;

sys/dev/drm/radeon/ni_dpm.c

4103

0, false, &dividers);

sys/dev/drm/radeon/ni_dpm.c

4152

pi->power_gating = false;

sys/dev/drm/radeon/ni_dpm.c

4158

eg_pi->ls_clock_gating = false;

sys/dev/drm/radeon/ni_dpm.c

4159

eg_pi->sclk_deep_sleep = false;

sys/dev/drm/radeon/ni_dpm.c

4166

pi->thermal_protection = false;

sys/dev/drm/radeon/ni_dpm.c

4183

eg_pi->pcie_performance_request = false;

sys/dev/drm/radeon/ni_dpm.c

4186

eg_pi->dll_default_on = false;

sys/dev/drm/radeon/ni_dpm.c

4188

eg_pi->sclk_deep_sleep = false;

sys/dev/drm/radeon/ni_dpm.c

4237

ni_pi->enable_power_containment = false;

sys/dev/drm/radeon/ni_dpm.c

4238

ni_pi->enable_cac = false;

sys/dev/drm/radeon/ni_dpm.c

4239

ni_pi->enable_sq_ramping = false;

sys/dev/drm/radeon/ni_dpm.c

4242

ni_pi->driver_calculate_cac_leakage = false;

sys/dev/drm/radeon/ni_dpm.c

4250

ni_pi->support_cac_long_term_average = false;

sys/dev/drm/radeon/ni_dpm.c

781

return false;

sys/dev/drm/radeon/ni_dpm.c

799

disable_mclk_switching = false;

sys/dev/drm/radeon/ni_dpm.c

806

if (rdev->pm.dpm.ac_power == false) {

sys/dev/drm/radeon/ni_dpm.c

897

ps->dc_compatible = false;

sys/dev/drm/radeon/r100.c

100

return false;

sys/dev/drm/radeon/r100.c

1257

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/r100.c

1825

track->textures[i].roundup_w = false;

sys/dev/drm/radeon/r100.c

1828

track->textures[i].roundup_h = false;

sys/dev/drm/radeon/r100.c

216

rdev->pm.dynpm_can_downclock = false;

sys/dev/drm/radeon/r100.c

221

rdev->pm.dynpm_can_downclock = false;

sys/dev/drm/radeon/r100.c

2276

track->cb_dirty = false;

sys/dev/drm/radeon/r100.c

2295

track->zb_dirty = false;

sys/dev/drm/radeon/r100.c

2315

track->aa_dirty = false;

sys/dev/drm/radeon/r100.c

2378

track->tex_dirty = false;

sys/dev/drm/radeon/r100.c

2406

track->aaresolve = false;

sys/dev/drm/radeon/r100.c

2447

track->textures[i].enabled = false;

sys/dev/drm/radeon/r100.c

2448

track->textures[i].lookup_disable = false;

sys/dev/drm/radeon/r100.c

249

rdev->pm.dynpm_can_upclock = false;

sys/dev/drm/radeon/r100.c

2535

return false;

sys/dev/drm/radeon/r100.c

2625

bool force_dac2 = false;

sys/dev/drm/radeon/r100.c

270

rdev->pm.dynpm_can_upclock = false;

sys/dev/drm/radeon/r100.c

2713

rdev->mc.vram_is_ddr = false;

sys/dev/drm/radeon/r100.c

2828

if (state == false) {

sys/dev/drm/radeon/r100.c

3682

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r100.c

3744

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/r100.c

3749

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

sys/dev/drm/radeon/r100.c

3786

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/r100.c

3980

rdev->accel_working = false;

sys/dev/drm/radeon/r100.c

4076

if (radeon_boot_test_post_card(rdev) == false)

sys/dev/drm/radeon/r100.c

4120

rdev->accel_working = false;

sys/dev/drm/radeon/r100.c

509

return false;

sys/dev/drm/radeon/r100.c

526

bool connected = false;

sys/dev/drm/radeon/r100.c

767

bool queue_hotplug = false;

sys/dev/drm/radeon/r100.c

77

return false;

sys/dev/drm/radeon/r100.c

82

return false;

sys/dev/drm/radeon/r100.c

881

return false;

sys/dev/drm/radeon/r100.c

957

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r100.c

990

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r200.c

127

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r200.c

423

track->textures[i].roundup_w = false;

sys/dev/drm/radeon/r200.c

426

track->textures[i].roundup_h = false;

sys/dev/drm/radeon/r300.c

1001

track->textures[i].roundup_h = false;

sys/dev/drm/radeon/r300.c

1462

rdev->accel_working = false;

sys/dev/drm/radeon/r300.c

1534

if (radeon_boot_test_post_card(rdev) == false)

sys/dev/drm/radeon/r300.c

1586

rdev->accel_working = false;

sys/dev/drm/radeon/r300.c

325

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r300.c

835

track->z_enabled = false;

sys/dev/drm/radeon/r300.c

997

track->textures[i].roundup_w = false;

sys/dev/drm/radeon/r420.c

221

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r420.c

236

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r420.c

332

rdev->accel_working = false;

sys/dev/drm/radeon/r420.c

410

if (radeon_boot_test_post_card(rdev) == false)

sys/dev/drm/radeon/r420.c

467

rdev->accel_working = false;

sys/dev/drm/radeon/r520.c

245

rdev->accel_working = false;

sys/dev/drm/radeon/r520.c

282

if (radeon_boot_test_post_card(rdev) == false)

sys/dev/drm/radeon/r520.c

328

rdev->accel_working = false;

sys/dev/drm/radeon/r600.c

1473

rdev->fastfb_working = false;

sys/dev/drm/radeon/r600.c

1484

if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) {

sys/dev/drm/radeon/r600.c

1511

r = radeon_bo_reserve(rdev->vram_scratch.robj, false);

sys/dev/drm/radeon/r600.c

1536

r = radeon_bo_reserve(rdev->vram_scratch.robj, false);

sys/dev/drm/radeon/r600.c

1599

return false;

sys/dev/drm/radeon/r600.c

1898

r600_set_bios_scratch_engine_hung(rdev, false);

sys/dev/drm/radeon/r600.c

1920

return false;

sys/dev/drm/radeon/r600.c

2420

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/r600.c

2718

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r600.c

2779

ring->ready = false;

sys/dev/drm/radeon/r600.c

2854

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r600.c

2997

radeon_sync_resv(rdev, &sync, resv, false);

sys/dev/drm/radeon/r600.c

3031

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r600.c

3204

if (state == false) {

sys/dev/drm/radeon/r600.c

3231

rdev->accel_working = false;

sys/dev/drm/radeon/r600.c

3345

rdev->accel_working = false;

sys/dev/drm/radeon/r600.c

3433

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/r600.c

3438

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

sys/dev/drm/radeon/r600.c

3506

r = radeon_bo_reserve(rdev->ih.ring_obj, false);

sys/dev/drm/radeon/r600.c

3532

r = radeon_bo_reserve(rdev->ih.ring_obj, false);

sys/dev/drm/radeon/r600.c

3628

rdev->ih.enabled = false;

sys/dev/drm/radeon/r600.c

370

rdev->pm.dynpm_can_downclock = false;

sys/dev/drm/radeon/r600.c

375

rdev->pm.dynpm_can_downclock = false;

sys/dev/drm/radeon/r600.c

411

rdev->pm.dynpm_can_upclock = false;

sys/dev/drm/radeon/r600.c

4112

bool queue_hotplug = false;

sys/dev/drm/radeon/r600.c

4113

bool queue_hdmi = false;

sys/dev/drm/radeon/r600.c

4114

bool queue_thermal = false;

sys/dev/drm/radeon/r600.c

4317

rdev->pm.dpm.thermal.high_to_low = false;

sys/dev/drm/radeon/r600.c

435

rdev->pm.dynpm_can_upclock = false;

sys/dev/drm/radeon/r600.c

467

rdev->pm.dynpm_can_downclock = false;

sys/dev/drm/radeon/r600.c

473

rdev->pm.dynpm_can_downclock = false;

sys/dev/drm/radeon/r600.c

479

rdev->pm.dynpm_can_downclock = false;

sys/dev/drm/radeon/r600.c

494

rdev->pm.dynpm_can_upclock = false;

sys/dev/drm/radeon/r600.c

501

rdev->pm.dynpm_can_upclock = false;

sys/dev/drm/radeon/r600.c

507

rdev->pm.dynpm_can_upclock = false;

sys/dev/drm/radeon/r600.c

788

return false;

sys/dev/drm/radeon/r600.c

796

bool connected = false;

sys/dev/drm/radeon/r600_cs.c

1522

is_array = false;

sys/dev/drm/radeon/r600_cs.c

1617

return false;

sys/dev/drm/radeon/r600_cs.c

1623

return false;

sys/dev/drm/radeon/r600_cs.c

181

return false;

sys/dev/drm/radeon/r600_cs.c

186

return false;

sys/dev/drm/radeon/r600_cs.c

192

return false;

sys/dev/drm/radeon/r600_cs.c

195

return false;

sys/dev/drm/radeon/r600_cs.c

200

return false;

sys/dev/drm/radeon/r600_cs.c

321

track->is_resolve = false;

sys/dev/drm/radeon/r600_cs.c

347

track->sx_misc_kill_all_prims = false;

sys/dev/drm/radeon/r600_cs.c

702

track->db_dirty = false;

sys/dev/drm/radeon/r600_cs.c

735

track->streamout_dirty = false;

sys/dev/drm/radeon/r600_cs.c

769

track->cb_dirty = false;

sys/dev/drm/radeon/r600_dma.c

107

rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false;

sys/dev/drm/radeon/r600_dma.c

174

ring->ready = false;

sys/dev/drm/radeon/r600_dma.c

212

return false;

sys/dev/drm/radeon/r600_dma.c

256

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r600_dma.c

363

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/r600_dma.c

369

r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies(

sys/dev/drm/radeon/r600_dma.c

466

radeon_sync_resv(rdev, &sync, resv, false);

sys/dev/drm/radeon/r600_dma.c

490

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/r600_dpm.c

1028

rdev->pm.dpm.power_control = false;

sys/dev/drm/radeon/r600_dpm.c

301

return false;

sys/dev/drm/radeon/r600_dpm.c

688

r600_enable_sclk_control(rdev, false);

sys/dev/drm/radeon/r600_dpm.c

689

r600_enable_mclk_control(rdev, false);

sys/dev/drm/radeon/r600_dpm.c

698

r600_enable_spll_bypass(rdev, false);

sys/dev/drm/radeon/r600_dpm.c

703

r600_enable_spll_bypass(rdev, false);

sys/dev/drm/radeon/r600_dpm.c

712

r600_dynamicpm_enable(rdev, false);

sys/dev/drm/radeon/r600_dpm.c

737

return false;

sys/dev/drm/radeon/r600_dpm.c

779

return false; /* need special handling */

sys/dev/drm/radeon/r600_dpm.c

784

return false;

sys/dev/drm/radeon/r600_hdmi.c

121

bool changed = false;

sys/dev/drm/radeon/r600_hdmi.c

306

bool hdmi_audio_workaround = false; /* FIXME */

sys/dev/drm/radeon/radeon.h

2536

#define RREG32(reg) r100_mm_rreg(rdev, (reg), false)

sys/dev/drm/radeon/radeon.h

2539

#define WREG32(reg, v) r100_mm_wreg(rdev, (reg), (v), false)

sys/dev/drm/radeon/radeon.h

2588

#define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg), false))

sys/dev/drm/radeon/radeon.h

2728

#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev), false)

sys/dev/drm/radeon/radeon.h

430

return false;

sys/dev/drm/radeon/radeon_acpi.c

274

n->enabled = false;

sys/dev/drm/radeon/radeon_acpi.c

530

return false;

sys/dev/drm/radeon/radeon_acpi.c

764

atif->notification_cfg.enabled = false;

sys/dev/drm/radeon/radeon_asic.c

2328

rdev->has_uvd = false;

sys/dev/drm/radeon/radeon_asic.c

2329

rdev->has_vce = false;

sys/dev/drm/radeon/radeon_asic.c

2408

rdev->has_uvd = false;

sys/dev/drm/radeon/radeon_asic.c

2478

rdev->has_uvd = false;

sys/dev/drm/radeon/radeon_asic.c

2479

rdev->has_vce = false;

sys/dev/drm/radeon/radeon_asic.c

2702

rdev->has_uvd = false;

sys/dev/drm/radeon/radeon_asic.c

2704

rdev->has_vce = false;

sys/dev/drm/radeon/radeon_atombios.c

1038

bios_connectors[i].ddc_bus.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

104

i2c.hw_capable = false;

sys/dev/drm/radeon/radeon_atombios.c

1043

bios_connectors[j].ddc_bus.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

1058

bios_connectors[j].valid = false;

sys/dev/drm/radeon/radeon_atombios.c

109

i2c.mm_i2c = false;

sys/dev/drm/radeon/radeon_atombios.c

116

i2c.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

1293

return false;

sys/dev/drm/radeon/radeon_atombios.c

1306

return false;

sys/dev/drm/radeon/radeon_atombios.c

1326

return false;

sys/dev/drm/radeon/radeon_atombios.c

133

i2c.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

1375

return false;

sys/dev/drm/radeon/radeon_atombios.c

1415

return false;

sys/dev/drm/radeon/radeon_atombios.c

1520

return false;

sys/dev/drm/radeon/radeon_atombios.c

1524

return false;

sys/dev/drm/radeon/radeon_atombios.c

1609

return false;

sys/dev/drm/radeon/radeon_atombios.c

1688

lvds->linkb = false;

sys/dev/drm/radeon/radeon_atombios.c

1694

bool bad_record = false;

sys/dev/drm/radeon/radeon_atombios.c

1802

return false;

sys/dev/drm/radeon/radeon_atombios.c

1808

return false;

sys/dev/drm/radeon/radeon_atombios.c

1847

return false;

sys/dev/drm/radeon/radeon_atombios.c

203

gpio.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

2160

false;

sys/dev/drm/radeon/radeon_atombios.c

2196

false;

sys/dev/drm/radeon/radeon_atombios.c

2232

false;

sys/dev/drm/radeon/radeon_atombios.c

2560

return false;

sys/dev/drm/radeon/radeon_atombios.c

2565

return false;

sys/dev/drm/radeon/radeon_atombios.c

2870

true : false;

sys/dev/drm/radeon/radeon_atombios.c

2873

dividers->enable_post_div = (dividers->fb_div & 1) ? true : false;

sys/dev/drm/radeon/radeon_atombios.c

2882

ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false;

sys/dev/drm/radeon/radeon_atombios.c

2884

ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE) ? false : true;

sys/dev/drm/radeon/radeon_atombios.c

2902

ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false;

sys/dev/drm/radeon/radeon_atombios.c

2904

ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE) ? false : true;

sys/dev/drm/radeon/radeon_atombios.c

306

return false;

sys/dev/drm/radeon/radeon_atombios.c

314

return false;

sys/dev/drm/radeon/radeon_atombios.c

322

i2c_bus->valid = false;

sys/dev/drm/radeon/radeon_atombios.c

332

return false;

sys/dev/drm/radeon/radeon_atombios.c

340

return false;

sys/dev/drm/radeon/radeon_atombios.c

3468

return false;

sys/dev/drm/radeon/radeon_atombios.c

3480

return false;

sys/dev/drm/radeon/radeon_atombios.c

3485

return false;

sys/dev/drm/radeon/radeon_atombios.c

3489

return false;

sys/dev/drm/radeon/radeon_atombios.c

350

return false;

sys/dev/drm/radeon/radeon_atombios.c

415

return false;

sys/dev/drm/radeon/radeon_atombios.c

425

(i2c_bus->valid == false) &&

sys/dev/drm/radeon/radeon_atombios.c

531

return false;

sys/dev/drm/radeon/radeon_atombios.c

534

return false;

sys/dev/drm/radeon/radeon_atombios.c

635

router.ddc_valid = false;

sys/dev/drm/radeon/radeon_atombios.c

636

router.cd_valid = false;

sys/dev/drm/radeon/radeon_atombios.c

752

ddc_bus.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

907

router.ddc_valid = false;

sys/dev/drm/radeon/radeon_atombios.c

908

router.cd_valid = false;

sys/dev/drm/radeon/radeon_atombios.c

912

return false;

sys/dev/drm/radeon/radeon_atombios.c

917

return false;

sys/dev/drm/radeon/radeon_atombios.c

934

bios_connectors[i].valid = false;

sys/dev/drm/radeon/radeon_atombios.c

961

bios_connectors[i].ddc_bus.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

964

bios_connectors[i].ddc_bus.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

967

bios_connectors[i].ddc_bus.valid = false;

sys/dev/drm/radeon/radeon_audio.c

336

rdev->audio.pin[i].connected = false;

sys/dev/drm/radeon/radeon_audio.c

498

rdev->audio.enabled = false;

sys/dev/drm/radeon/radeon_audio.c

525

err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);

sys/dev/drm/radeon/radeon_audio.c

731

radeon_audio_set_mute(encoder, false);

sys/dev/drm/radeon/radeon_benchmark.c

101

r = radeon_bo_reserve(sobj, false);

sys/dev/drm/radeon/radeon_benchmark.c

113

r = radeon_bo_reserve(dobj, false);

sys/dev/drm/radeon/radeon_benchmark.c

146

r = radeon_bo_reserve(sobj, false);

sys/dev/drm/radeon/radeon_benchmark.c

154

r = radeon_bo_reserve(dobj, false);

sys/dev/drm/radeon/radeon_benchmark.c

65

r = radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_bios.c

101

return false;

sys/dev/drm/radeon/radeon_bios.c

128

return false;

sys/dev/drm/radeon/radeon_bios.c

137

return false;

sys/dev/drm/radeon/radeon_bios.c

143

return false;

sys/dev/drm/radeon/radeon_bios.c

150

return false;

sys/dev/drm/radeon/radeon_bios.c

158

return false;

sys/dev/drm/radeon/radeon_bios.c

221

bool found = false;

sys/dev/drm/radeon/radeon_bios.c

229

return false;

sys/dev/drm/radeon/radeon_bios.c

251

return false;

sys/dev/drm/radeon/radeon_bios.c

267

return false;

sys/dev/drm/radeon/radeon_bios.c

272

return false;

sys/dev/drm/radeon/radeon_bios.c

293

return false;

sys/dev/drm/radeon/radeon_bios.c

300

return false;

sys/dev/drm/radeon/radeon_bios.c

55

return false;

sys/dev/drm/radeon/radeon_bios.c

61

return false;

sys/dev/drm/radeon/radeon_bios.c

66

return false;

sys/dev/drm/radeon/radeon_bios.c

668

bool ret = false;

sys/dev/drm/radeon/radeon_bios.c

683

return false;

sys/dev/drm/radeon/radeon_bios.c

71

return false;

sys/dev/drm/radeon/radeon_bios.c

727

return false;

sys/dev/drm/radeon/radeon_bios.c

737

if (r == false)

sys/dev/drm/radeon/radeon_bios.c

739

if (r == false)

sys/dev/drm/radeon/radeon_bios.c

741

if (r == false)

sys/dev/drm/radeon/radeon_bios.c

743

if (r == false)

sys/dev/drm/radeon/radeon_bios.c

745

if (r == false)

sys/dev/drm/radeon/radeon_bios.c

747

if (r == false || rdev->bios == NULL) {

sys/dev/drm/radeon/radeon_bios.c

750

return false;

sys/dev/drm/radeon/radeon_bios.c

772

rdev->is_atom_bios = false;

sys/dev/drm/radeon/radeon_bios.c

780

return false;

sys/dev/drm/radeon/radeon_bios.c

88

return false;

sys/dev/drm/radeon/radeon_bios.c

96

return false;

sys/dev/drm/radeon/radeon_clocks.c

111

return false;

sys/dev/drm/radeon/radeon_clocks.c

115

return false;

sys/dev/drm/radeon/radeon_clocks.c

172

return false;

sys/dev/drm/radeon/radeon_combios.c

1145

lvds->use_bios_dividers = false;

sys/dev/drm/radeon/radeon_combios.c

1374

return false;

sys/dev/drm/radeon/radeon_combios.c

1441

return false;

sys/dev/drm/radeon/radeon_combios.c

1620

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

1663

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

1712

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

1760

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

1801

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

1838

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

1874

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

1915

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

1956

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

2080

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

2141

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

2189

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

2205

return false;

sys/dev/drm/radeon/radeon_combios.c

2227

return false;

sys/dev/drm/radeon/radeon_combios.c

2235

return false;

sys/dev/drm/radeon/radeon_combios.c

2247

return false;

sys/dev/drm/radeon/radeon_combios.c

2253

return false;

sys/dev/drm/radeon/radeon_combios.c

2259

return false;

sys/dev/drm/radeon/radeon_combios.c

2535

return false;

sys/dev/drm/radeon/radeon_combios.c

2580

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

2601

ddc_i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

2746

false;

sys/dev/drm/radeon/radeon_combios.c

2762

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = false;

sys/dev/drm/radeon/radeon_combios.c

2886

return false;

sys/dev/drm/radeon/radeon_combios.c

3002

return false;

sys/dev/drm/radeon/radeon_combios.c

371

return false;

sys/dev/drm/radeon/radeon_combios.c

377

return false;

sys/dev/drm/radeon/radeon_combios.c

383

return false;

sys/dev/drm/radeon/radeon_combios.c

561

i2c.hw_capable = false;

sys/dev/drm/radeon/radeon_combios.c

572

i2c.hw_capable = false;

sys/dev/drm/radeon/radeon_combios.c

585

i2c.hw_capable = false;

sys/dev/drm/radeon/radeon_combios.c

597

i2c.hw_capable = false;

sys/dev/drm/radeon/radeon_combios.c

614

i2c.hw_capable = false;

sys/dev/drm/radeon/radeon_combios.c

617

i2c.hw_capable = false;

sys/dev/drm/radeon/radeon_combios.c

622

i2c.hw_capable = false;

sys/dev/drm/radeon/radeon_combios.c

625

i2c.mm_i2c = false;

sys/dev/drm/radeon/radeon_combios.c

633

i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

646

i2c.valid = false;

sys/dev/drm/radeon/radeon_combios.c

805

return false;

sys/dev/drm/radeon/radeon_combios.c

815

return false;

sys/dev/drm/radeon/radeon_combios.c

823

return false;

sys/dev/drm/radeon/radeon_connectors.c

1031

bool dret = false;

sys/dev/drm/radeon/radeon_connectors.c

1048

dret = radeon_ddc_probe(radeon_connector, false);

sys/dev/drm/radeon/radeon_connectors.c

1050

radeon_connector->detected_by_load = false;

sys/dev/drm/radeon/radeon_connectors.c

1148

tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);

sys/dev/drm/radeon/radeon_connectors.c

1191

ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);

sys/dev/drm/radeon/radeon_connectors.c

1235

return false;

sys/dev/drm/radeon/radeon_connectors.c

1259

bool dret = false, broken_edid = false;

sys/dev/drm/radeon/radeon_connectors.c

1271

radeon_connector->detected_hpd_without_ddc = false;

sys/dev/drm/radeon/radeon_connectors.c

1280

dret = radeon_ddc_probe(radeon_connector, false);

sys/dev/drm/radeon/radeon_connectors.c

1296

radeon_connector->detected_by_load = false;

sys/dev/drm/radeon/radeon_connectors.c

1391

radeon_connector->use_digital = false;

sys/dev/drm/radeon/radeon_connectors.c

1403

radeon_connector->use_digital = false;

sys/dev/drm/radeon/radeon_connectors.c

1410

if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&

sys/dev/drm/radeon/radeon_connectors.c

1484

radeon_connector->use_digital = false;

sys/dev/drm/radeon/radeon_connectors.c

1639

bool found = false;

sys/dev/drm/radeon/radeon_connectors.c

1661

return false;

sys/dev/drm/radeon/radeon_connectors.c

1757

if (radeon_ddc_probe(radeon_connector, false))

sys/dev/drm/radeon/radeon_connectors.c

1887

bool shared_ddc = false;

sys/dev/drm/radeon/radeon_connectors.c

1888

bool is_dp_bridge = false;

sys/dev/drm/radeon/radeon_connectors.c

1889

bool has_aux = false;

sys/dev/drm/radeon/radeon_connectors.c

1915

radeon_connector->shared_ddc = false;

sys/dev/drm/radeon/radeon_connectors.c

1916

shared_ddc = false;

sys/dev/drm/radeon/radeon_connectors.c

2033

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2051

connector->interlace_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2052

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2162

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2213

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2263

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2284

connector->interlace_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2285

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2301

connector->interlace_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2302

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2321

connector->interlace_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2322

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2447

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2461

radeon_connector->dac_load_detect = false;

sys/dev/drm/radeon/radeon_connectors.c

2470

connector->interlace_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2471

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2485

connector->interlace_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

2486

connector->doublescan_allowed = false;

sys/dev/drm/radeon/radeon_connectors.c

259

connected = false;

sys/dev/drm/radeon/radeon_connectors.c

494

mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);

sys/dev/drm/radeon/radeon_connectors.c

549

mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);

sys/dev/drm/radeon/radeon_connectors.c

577

new_coherent_mode = val ? true : false;

sys/dev/drm/radeon/radeon_connectors.c

685

radeon_connector->dac_load_detect = false;

sys/dev/drm/radeon/radeon_connectors.c

692

bool ret = false;

sys/dev/drm/radeon/radeon_connectors.c

710

if (val == 1 || ret == false) {

sys/dev/drm/radeon/radeon_connectors.c

931

radeon_connector->ddc_bus->has_aux = false;

sys/dev/drm/radeon/radeon_cs.c

682

radeon_cs_parser_fini(&parser, r, false);

sys/dev/drm/radeon/radeon_cs.c

696

radeon_cs_parser_fini(&parser, r, false);

sys/dev/drm/radeon/radeon_cs.c

799

return false;

sys/dev/drm/radeon/radeon_cs.c

80

bool need_mmap_lock = false;

sys/dev/drm/radeon/radeon_cs.c

801

return false;

sys/dev/drm/radeon/radeon_cs.c

803

return false;

sys/dev/drm/radeon/radeon_cursor.c

247

radeon_crtc->cursor_out_of_bounds = false;

sys/dev/drm/radeon/radeon_cursor.c

269

radeon_lock_cursor(crtc, false);

sys/dev/drm/radeon/radeon_cursor.c

308

ret = radeon_bo_reserve(robj, false);

sys/dev/drm/radeon/radeon_cursor.c

345

radeon_lock_cursor(crtc, false);

sys/dev/drm/radeon/radeon_cursor.c

350

ret = radeon_bo_reserve(robj, false);

sys/dev/drm/radeon/radeon_cursor.c

382

radeon_lock_cursor(crtc, false);

sys/dev/drm/radeon/radeon_device.c

112

static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; }

sys/dev/drm/radeon/radeon_device.c

113

static inline bool radeon_is_atpx_hybrid(void) { return false; }

sys/dev/drm/radeon/radeon_device.c

1235

radeon_suspend_kms(dev, true, true, false);

sys/dev/drm/radeon/radeon_device.c

1290

bool runtime = false;

sys/dev/drm/radeon/radeon_device.c

1293

rdev->shutdown = false;

sys/dev/drm/radeon/radeon_device.c

1299

rdev->is_atom_bios = false;

sys/dev/drm/radeon/radeon_device.c

1302

rdev->accel_working = false;

sys/dev/drm/radeon/radeon_device.c

1303

rdev->fictitious_range_registered = false;

sys/dev/drm/radeon/radeon_device.c

1372

rdev->need_dma32 = false;

sys/dev/drm/radeon/radeon_device.c

156

return false;

sys/dev/drm/radeon/radeon_device.c

1637

r = radeon_bo_reserve(robj, false);

sys/dev/drm/radeon/radeon_device.c

1650

r = radeon_bo_reserve(robj, false);

sys/dev/drm/radeon/radeon_device.c

1756

rdev->pm.dpm_enabled = false;

sys/dev/drm/radeon/radeon_device.c

1772

r = radeon_bo_reserve(robj, false);

sys/dev/drm/radeon/radeon_device.c

1841

bool saved = false;

sys/dev/drm/radeon/radeon_device.c

1893

rdev->pm.dpm_enabled = false;

sys/dev/drm/radeon/radeon_device.c

1919

rdev->needs_reset = false;

sys/dev/drm/radeon/radeon_device.c

1941

rdev->in_reset = false;

sys/dev/drm/radeon/radeon_device.c

291

rdev->scratch.free[i] = false;

sys/dev/drm/radeon/radeon_device.c

416

rdev->wb.enabled = false;

sys/dev/drm/radeon/radeon_device.c

431

if (!radeon_bo_reserve(rdev->wb.wb_obj, false)) {

sys/dev/drm/radeon/radeon_device.c

464

r = radeon_bo_reserve(rdev->wb.wb_obj, false);

sys/dev/drm/radeon/radeon_device.c

490

rdev->wb.use_event = false;

sys/dev/drm/radeon/radeon_device.c

493

rdev->wb.enabled = false;

sys/dev/drm/radeon/radeon_device.c

497

rdev->wb.enabled = false;

sys/dev/drm/radeon/radeon_device.c

500

rdev->wb.enabled = false;

sys/dev/drm/radeon/radeon_device.c

638

return false;

sys/dev/drm/radeon/radeon_device.c

658

return false;

sys/dev/drm/radeon/radeon_device.c

665

return false;

sys/dev/drm/radeon/radeon_device.c

709

return false;

sys/dev/drm/radeon/radeon_device.c

764

return false;

sys/dev/drm/radeon/radeon_display.c

1658

rdev->mode_info.mode_config_initialized = false;

sys/dev/drm/radeon/radeon_display.c

1676

return false;

sys/dev/drm/radeon/radeon_display.c

1743

first = false;

sys/dev/drm/radeon/radeon_display.c

1753

return false;

sys/dev/drm/radeon/radeon_display.c

1892

in_vbl = false;

sys/dev/drm/radeon/radeon_display.c

1902

in_vbl = false;

sys/dev/drm/radeon/radeon_display.c

1952

in_vbl = false;

sys/dev/drm/radeon/radeon_display.c

264

r = radeon_bo_reserve(work->old_rbo, false);

sys/dev/drm/radeon/radeon_display.c

421

r = radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_display.c

430

r = dma_fence_wait(work->fence, false);

sys/dev/drm/radeon/radeon_display.c

518

r = radeon_bo_reserve(new_rbo, false);

sys/dev/drm/radeon/radeon_display.c

596

if (unlikely(radeon_bo_reserve(new_rbo, false) != 0)) {

sys/dev/drm/radeon/radeon_display.c

619

bool active = false;

sys/dev/drm/radeon/radeon_display.c

652

rdev->have_disp_power_ref = false;

sys/dev/drm/radeon/radeon_display.c

843

bool ret = false;

sys/dev/drm/radeon/radeon_display.c

848

if (ret == false)

sys/dev/drm/radeon/radeon_display.c

852

if (ret == false)

sys/dev/drm/radeon/radeon_dp_auxch.c

69

bool is_write = false;

sys/dev/drm/radeon/radeon_dp_mst.c

441

mst_enc->fe_from_be = false;

sys/dev/drm/radeon/radeon_dp_mst.c

490

mst_enc->enc_active = false;

sys/dev/drm/radeon/radeon_dp_mst.c

494

radeon_connector->mst_port->hpd.hpd, false);

sys/dev/drm/radeon/radeon_dp_mst.c

501

mst_enc->fe_from_be = false;

sys/dev/drm/radeon/radeon_dp_mst.c

695

dig_connector->is_mst = false;

sys/dev/drm/radeon/radeon_dp_mst.c

744

dig_connector->is_mst = false;

sys/dev/drm/radeon/radeon_drv.c

165

static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; }

sys/dev/drm/radeon/radeon_drv.c

166

static inline bool radeon_is_atpx_hybrid(void) { return false; }

sys/dev/drm/radeon/radeon_drv.c

363

bool primary = false;

sys/dev/drm/radeon/radeon_drv.c

480

return radeon_suspend_kms(drm_dev, true, true, false);

sys/dev/drm/radeon/radeon_drv.c

502

return radeon_suspend_kms(drm_dev, false, true, true);

sys/dev/drm/radeon/radeon_drv.c

509

return radeon_resume_kms(drm_dev, false, true);

sys/dev/drm/radeon/radeon_drv.c

526

ret = radeon_suspend_kms(drm_dev, false, false, false);

sys/dev/drm/radeon/radeon_drv.c

559

ret = radeon_resume_kms(drm_dev, false, false);

sys/dev/drm/radeon/radeon_drv.c

847

return -radeon_suspend_kms(dev, true, true, false);

sys/dev/drm/radeon/radeon_encoders.c

159

bool use_bl = false;

sys/dev/drm/radeon/radeon_encoders.c

174

use_bl = false;

sys/dev/drm/radeon/radeon_encoders.c

179

use_bl = false;

sys/dev/drm/radeon/radeon_encoders.c

385

return false;

sys/dev/drm/radeon/radeon_encoders.c

390

return false;

sys/dev/drm/radeon/radeon_encoders.c

393

return false;

sys/dev/drm/radeon/radeon_encoders.c

398

return false;

sys/dev/drm/radeon/radeon_encoders.c

403

return false;

sys/dev/drm/radeon/radeon_encoders.c

410

return false;

sys/dev/drm/radeon/radeon_encoders.c

415

return false;

sys/dev/drm/radeon/radeon_encoders.c

419

return false;

sys/dev/drm/radeon/radeon_encoders.c

441

return false;

sys/dev/drm/radeon/radeon_fb.c

123

ret = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/radeon_fb.c

139

bool fb_tiled = false; /* useful for testing */

sys/dev/drm/radeon/radeon_fb.c

189

ret = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/radeon_fb.c

430

return false;

sys/dev/drm/radeon/radeon_fb.c

434

return false;

sys/dev/drm/radeon/radeon_fence.c

142

(*fence)->is_vm_update = false;

sys/dev/drm/radeon/radeon_fence.c

202

bool wake = false;

sys/dev/drm/radeon/radeon_fence.c

288

fence_drv->delayed_irq = false;

sys/dev/drm/radeon/radeon_fence.c

352

return false;

sys/dev/drm/radeon/radeon_fence.c

374

return false;

sys/dev/drm/radeon/radeon_fence.c

391

return false;

sys/dev/drm/radeon/radeon_fence.c

403

return false;

sys/dev/drm/radeon/radeon_fence.c

445

return false;

sys/dev/drm/radeon/radeon_fence.c

467

return false;

sys/dev/drm/radeon/radeon_fence.c

655

r = radeon_fence_wait_seq_timeout(rdev, seq, false, MAX_SCHEDULE_TIMEOUT);

sys/dev/drm/radeon/radeon_fence.c

680

r = radeon_fence_wait_seq_timeout(rdev, seq, false, MAX_SCHEDULE_TIMEOUT);

sys/dev/drm/radeon/radeon_fence.c

765

return false;

sys/dev/drm/radeon/radeon_fence.c

769

return false;

sys/dev/drm/radeon/radeon_fence.c

775

return false;

sys/dev/drm/radeon/radeon_fence.c

886

rdev->fence_drv[ring].initialized = false;

sys/dev/drm/radeon/radeon_fence.c

942

rdev->fence_drv[ring].initialized = false;

sys/dev/drm/radeon/radeon_gart.c

157

r = radeon_bo_reserve(rdev->gart.robj, false);

sys/dev/drm/radeon/radeon_gart.c

202

r = radeon_bo_reserve(rdev->gart.robj, false);

sys/dev/drm/radeon/radeon_gart.c

380

rdev->gart.ready = false;

sys/dev/drm/radeon/radeon_gem.c

162

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/radeon_gem.c

269

false, &gobj);

sys/dev/drm/radeon/radeon_gem.c

294

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/radeon/radeon_gem.c

329

false, &gobj);

sys/dev/drm/radeon/radeon_gem.c

534

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/radeon_gem.c

671

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/radeon_gem.c

732

r = radeon_bo_reserve(robj, false);

sys/dev/drm/radeon/radeon_gem.c

771

false, &gobj);

sys/dev/drm/radeon/radeon_i2c.c

74

return false;

sys/dev/drm/radeon/radeon_i2c.c

83

return false;

sys/dev/drm/radeon/radeon_ib.c

243

rdev->ib_pool_ready = false;

sys/dev/drm/radeon/radeon_ib.c

271

ring->ready = false;

sys/dev/drm/radeon/radeon_ib.c

272

rdev->needs_reset = false;

sys/dev/drm/radeon/radeon_ib.c

277

rdev->accel_working = false;

sys/dev/drm/radeon/radeon_ib.c

81

ib->is_const_ib = false;

sys/dev/drm/radeon/radeon_irq_kms.c

128

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/radeon_irq_kms.c

130

rdev->irq.hpd[i] = false;

sys/dev/drm/radeon/radeon_irq_kms.c

132

rdev->irq.crtc_vblank_int[i] = false;

sys/dev/drm/radeon/radeon_irq_kms.c

134

rdev->irq.afmt[i] = false;

sys/dev/drm/radeon/radeon_irq_kms.c

182

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/radeon_irq_kms.c

184

rdev->irq.hpd[i] = false;

sys/dev/drm/radeon/radeon_irq_kms.c

186

rdev->irq.crtc_vblank_int[i] = false;

sys/dev/drm/radeon/radeon_irq_kms.c

188

rdev->irq.afmt[i] = false;

sys/dev/drm/radeon/radeon_irq_kms.c

209

return false;

sys/dev/drm/radeon/radeon_irq_kms.c

213

return false;

sys/dev/drm/radeon/radeon_irq_kms.c

229

return false;

sys/dev/drm/radeon/radeon_irq_kms.c

265

return false;

sys/dev/drm/radeon/radeon_irq_kms.c

271

return false;

sys/dev/drm/radeon/radeon_irq_kms.c

320

rdev->irq.installed = false;

sys/dev/drm/radeon/radeon_irq_kms.c

340

rdev->irq.installed = false;

sys/dev/drm/radeon/radeon_irq_kms.c

502

rdev->irq.afmt[block] = false;

sys/dev/drm/radeon/radeon_kms.c

249

*value = false;

sys/dev/drm/radeon/radeon_kms.c

42

static inline bool radeon_has_atpx(void) { return false; }

sys/dev/drm/radeon/radeon_kms.c

662

r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);

sys/dev/drm/radeon/radeon_kms.c

733

r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);

sys/dev/drm/radeon/radeon_kms.c

871

rdev->irq.crtc_vblank_int[crtc] = false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

1028

return false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

1093

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/radeon_legacy_crtc.c

112

hscale = false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

113

vscale = false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

121

hscale = false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

123

vscale = false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

350

radeon_crtc->enabled = false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

417

return false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

424

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/radeon_legacy_crtc.c

452

if (nsize <= osize && !radeon_bo_reserve(old_rbo, false)) {

sys/dev/drm/radeon/radeon_legacy_crtc.c

523

return false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

557

r = radeon_bo_reserve(rbo, false);

sys/dev/drm/radeon/radeon_legacy_crtc.c

585

bool is_tv = false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

616

return false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

742

bool use_bios_divs = false;

sys/dev/drm/radeon/radeon_legacy_crtc.c

747

bool is_tv = false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1047

is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1122

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1124

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1162

bool is_tv = false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1166

is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

127

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

129

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1312

bool found = false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1383

bool found = false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1450

bool found = false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

169

radeon_atom_output_lock(encoder, false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

171

radeon_combios_output_lock(encoder, false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1715

if (ret == false)

sys/dev/drm/radeon/radeon_legacy_encoders.c

1738

if (ret == false)

sys/dev/drm/radeon/radeon_legacy_encoders.c

415

pdata->negative = false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

51

bool is_mac = false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

554

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

556

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

578

radeon_atom_output_lock(encoder, false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

580

radeon_combios_output_lock(encoder, false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

751

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

753

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

917

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

919

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

940

radeon_atom_output_lock(encoder, false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

942

radeon_combios_output_lock(encoder, false);

sys/dev/drm/radeon/radeon_legacy_tv.c

444

return false;

sys/dev/drm/radeon/radeon_mn.c

128

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/radeon/radeon_mn.c

169

true, false, MAX_SCHEDULE_TIMEOUT);

sys/dev/drm/radeon/radeon_object.c

327

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/radeon/radeon_object.c

392

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/radeon/radeon_object.c

422

if (rdev->mc.igp_sideport_enabled == false)

sys/dev/drm/radeon/radeon_object.c

533

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/radeon/radeon_object.c

722

r = radeon_bo_reserve(bo, false);

sys/dev/drm/radeon/radeon_object.c

795

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/radeon/radeon_object.c

92

return false;

sys/dev/drm/radeon/radeon_object.h

68

r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL);

sys/dev/drm/radeon/radeon_pm.c

1217

rdev->pm.dpm.uvd_active = false;

sys/dev/drm/radeon/radeon_pm.c

1235

rdev->pm.dpm.vce_active = false;

sys/dev/drm/radeon/radeon_pm.c

1263

rdev->pm.dpm_enabled = false;

sys/dev/drm/radeon/radeon_pm.c

1470

rdev->pm.dpm_enabled = false;

sys/dev/drm/radeon/radeon_pm.c

1508

bool disable_dpm = false;

sys/dev/drm/radeon/radeon_pm.c

162

rdev->pm.vblank_sync = false;

sys/dev/drm/radeon/radeon_pm.c

1625

rdev->pm.dpm_enabled = false;

sys/dev/drm/radeon/radeon_pm.c

174

bool misc_after = false;

sys/dev/drm/radeon/radeon_pm.c

1847

rdev->pm.dpm.ac_power = false;

sys/dev/drm/radeon/radeon_pm.c

1880

in_vbl = false;

sys/dev/drm/radeon/radeon_pm.c

1892

if (in_vbl == false)

sys/dev/drm/radeon/radeon_pm.c

223

radeon_pm_debug_check_in_vbl(rdev, false);

sys/dev/drm/radeon/radeon_pm.c

232

radeon_pm_debug_check_in_vbl(rdev, false);

sys/dev/drm/radeon/radeon_pm.c

78

rdev->pm.dpm.ac_power = false;

sys/dev/drm/radeon/radeon_pm.c

899

rdev->pm.dpm.thermal_active = false;

sys/dev/drm/radeon/radeon_pm.c

909

true : false;

sys/dev/drm/radeon/radeon_pm.c

914

single_display = false;

sys/dev/drm/radeon/radeon_pm.c

921

single_display = false;

sys/dev/drm/radeon/radeon_prime.c

102

ret = radeon_bo_reserve(bo, false);

sys/dev/drm/radeon/radeon_prime.c

112

ret = dma_fence_wait(bo->tbo.moving, false);

sys/dev/drm/radeon/radeon_prime.c

130

ret = radeon_bo_reserve(bo, false);

sys/dev/drm/radeon/radeon_prime.c

83

ret = radeon_bo_create(rdev, attach->dmabuf->size, PAGE_SIZE, false,

sys/dev/drm/radeon/radeon_ring.c

256

return false;

sys/dev/drm/radeon/radeon_ring.c

266

return false;

sys/dev/drm/radeon/radeon_ring.c

358

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/radeon_ring.c

392

r = radeon_bo_reserve(ring->ring_obj, false);

sys/dev/drm/radeon/radeon_ring.c

439

ring->ready = false;

sys/dev/drm/radeon/radeon_ring.c

445

r = radeon_bo_reserve(ring_obj, false);

sys/dev/drm/radeon/radeon_ring.c

66

return false;

sys/dev/drm/radeon/radeon_sa.c

107

r = radeon_bo_reserve(sa_manager->bo, false);

sys/dev/drm/radeon/radeon_sa.c

133

r = radeon_bo_reserve(sa_manager->bo, false);

sys/dev/drm/radeon/radeon_sa.c

211

return false;

sys/dev/drm/radeon/radeon_sa.c

244

return false;

sys/dev/drm/radeon/radeon_sa.c

309

return false;

sys/dev/drm/radeon/radeon_sa.c

356

r = radeon_fence_wait_any(rdev, fences, false);

sys/dev/drm/radeon/radeon_semaphore.c

69

if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, false)) {

sys/dev/drm/radeon/radeon_semaphore.c

76

return false;

sys/dev/drm/radeon/radeon_semaphore.c

95

return false;

sys/dev/drm/radeon/radeon_sync.c

160

r = radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_sync.c

180

r = radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_sync.c

190

r = radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_sync.c

196

radeon_ring_commit(rdev, &rdev->ring[i], false);

sys/dev/drm/radeon/radeon_test.c

133

r = radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_test.c

184

r = radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_test.c

307

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/radeon_test.c

332

radeon_ring_unlock_commit(rdev, ringA, false);

sys/dev/drm/radeon/radeon_test.c

344

radeon_ring_unlock_commit(rdev, ringA, false);

sys/dev/drm/radeon/radeon_test.c

363

radeon_ring_unlock_commit(rdev, ringB, false);

sys/dev/drm/radeon/radeon_test.c

365

r = radeon_fence_wait(fence1, false);

sys/dev/drm/radeon/radeon_test.c

384

radeon_ring_unlock_commit(rdev, ringB, false);

sys/dev/drm/radeon/radeon_test.c

386

r = radeon_fence_wait(fence2, false);

sys/dev/drm/radeon/radeon_test.c

427

radeon_ring_unlock_commit(rdev, ringA, false);

sys/dev/drm/radeon/radeon_test.c

439

radeon_ring_unlock_commit(rdev, ringB, false);

sys/dev/drm/radeon/radeon_test.c

461

radeon_ring_unlock_commit(rdev, ringC, false);

sys/dev/drm/radeon/radeon_test.c

487

radeon_ring_unlock_commit(rdev, ringC, false);

sys/dev/drm/radeon/radeon_test.c

491

r = radeon_fence_wait(fenceA, false);

sys/dev/drm/radeon/radeon_test.c

496

r = radeon_fence_wait(fenceB, false);

sys/dev/drm/radeon/radeon_test.c

520

return false;

sys/dev/drm/radeon/radeon_test.c

75

r = radeon_bo_reserve(vram_obj, false);

sys/dev/drm/radeon/radeon_test.c

97

r = radeon_bo_reserve(gtt_obj[i], false);

sys/dev/drm/radeon/radeon_ttm.c

118

rdev->mman.mem_global_referenced = false;

sys/dev/drm/radeon/radeon_ttm.c

199

if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)

sys/dev/drm/radeon/radeon_ttm.c

470

mem->bus.is_iomem = false;

sys/dev/drm/radeon/radeon_ttm.c

82

rdev->mman.mem_global_referenced = false;

sys/dev/drm/radeon/radeon_ttm.c

856

return false;

sys/dev/drm/radeon/radeon_ttm.c

868

return false;

sys/dev/drm/radeon/radeon_ttm.c

929

r = radeon_bo_reserve(rdev->stolen_vga_memory, false);

sys/dev/drm/radeon/radeon_ttm.c

965

r = radeon_bo_reserve(rdev->stolen_vga_memory, false);

sys/dev/drm/radeon/radeon_ttm.c

977

rdev->mman.initialized = false;

sys/dev/drm/radeon/radeon_uvd.c

137

rdev->uvd.fw_header_present = false;

sys/dev/drm/radeon/radeon_uvd.c

195

r = radeon_bo_reserve(rdev->uvd.vcpu_bo, false);

sys/dev/drm/radeon/radeon_uvd.c

235

r = radeon_bo_reserve(rdev->uvd.vcpu_bo, false);

sys/dev/drm/radeon/radeon_uvd.c

270

radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_uvd.c

345

radeon_fence_wait(fence, false);

sys/dev/drm/radeon/radeon_uvd.c

482

r = radeon_fence_wait((struct radeon_fence *)f, false);

sys/dev/drm/radeon/radeon_uvd.c

690

bool has_msg_cmd = false;

sys/dev/drm/radeon/radeon_uvd.c

763

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/radeon_uvd.c

879

radeon_dpm_enable_uvd(rdev, false);

sys/dev/drm/radeon/radeon_uvd.c

891

bool streams_changed = false;

sys/dev/drm/radeon/radeon_vce.c

150

r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);

sys/dev/drm/radeon/radeon_vce.c

229

r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);

sys/dev/drm/radeon/radeon_vce.c

270

radeon_dpm_enable_vce(rdev, false);

sys/dev/drm/radeon/radeon_vce.c

289

bool streams_changed = false;

sys/dev/drm/radeon/radeon_vce.c

296

streams_changed = false;

sys/dev/drm/radeon/radeon_vce.c

390

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/radeon_vce.c

447

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/radeon_vce.c

524

*allocated = false;

sys/dev/drm/radeon/radeon_vce.c

560

bool destroyed = false, created = false, allocated = false;

sys/dev/drm/radeon/radeon_vce.c

769

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/radeon_vce.c

813

r = radeon_fence_wait_timeout(fence, false, usecs_to_jiffies(

sys/dev/drm/radeon/radeon_vm.c

1023

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/radeon_vm.c

116

rdev->vm_manager.enabled = false;

sys/dev/drm/radeon/radeon_vm.c

1253

r = radeon_bo_reserve(bo_va->bo, false);

sys/dev/drm/radeon/radeon_vm.c

390

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/radeon/radeon_vm.c

396

r = radeon_bo_reserve(bo, false);

sys/dev/drm/radeon/radeon_vm.c

417

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/radeon_vm.c

422

radeon_bo_fence(bo, ib.fence, false);

sys/dev/drm/radeon/radeon_vm.c

707

r = radeon_ib_schedule(rdev, &ib, NULL, false);

sys/dev/drm/radeon/radeon_vm.c

713

radeon_bo_fence(pd, ib.fence, false);

sys/dev/drm/radeon/rs400.c

480

rdev->accel_working = false;

sys/dev/drm/radeon/rs400.c

545

if (radeon_boot_test_post_card(rdev) == false)

sys/dev/drm/radeon/rs400.c

578

rdev->accel_working = false;

sys/dev/drm/radeon/rs600.c

1057

rdev->accel_working = false;

sys/dev/drm/radeon/rs600.c

1123

if (radeon_boot_test_post_card(rdev) == false)

sys/dev/drm/radeon/rs600.c

1157

rdev->accel_working = false;

sys/dev/drm/radeon/rs600.c

350

bool connected = false;

sys/dev/drm/radeon/rs600.c

60

return false;

sys/dev/drm/radeon/rs600.c

73

return false;

sys/dev/drm/radeon/rs600.c

769

bool queue_hotplug = false;

sys/dev/drm/radeon/rs600.c

770

bool queue_hdmi = false;

sys/dev/drm/radeon/rs690.c

177

rdev->fastfb_working = false;

sys/dev/drm/radeon/rs690.c

188

if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) {

sys/dev/drm/radeon/rs690.c

625

rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false);

sys/dev/drm/radeon/rs690.c

626

rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false);

sys/dev/drm/radeon/rs690.c

773

rdev->accel_working = false;

sys/dev/drm/radeon/rs690.c

840

if (radeon_boot_test_post_card(rdev) == false)

sys/dev/drm/radeon/rs690.c

874

rdev->accel_working = false;

sys/dev/drm/radeon/rs780_dpm.c

100

r600_engine_clock_entry_enable(rdev, i, false);

sys/dev/drm/radeon/rs780_dpm.c

102

r600_enable_mclk_control(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

1035

rs780_clk_scaling_enable(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

1036

rs780_voltage_scaling_enable(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

1043

ps->sclk_high, false, &dividers);

sys/dev/drm/radeon/rs780_dpm.c

1050

ps->sclk_low, false, &dividers);

sys/dev/drm/radeon/rs780_dpm.c

163

r600_power_level_enable(rdev, R600_POWER_LEVEL_CTXSW, false);

sys/dev/drm/radeon/rs780_dpm.c

164

r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false);

sys/dev/drm/radeon/rs780_dpm.c

165

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);

sys/dev/drm/radeon/rs780_dpm.c

177

r600_enable_sclk_control(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

178

r600_enable_mclk_control(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

187

r600_enable_spll_bypass(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

192

r600_enable_spll_bypass(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

439

new_state->sclk_low, false, &min_dividers);

sys/dev/drm/radeon/rs780_dpm.c

444

new_state->sclk_high, false, &max_dividers);

sys/dev/drm/radeon/rs780_dpm.c

449

old_state->sclk_high, false, &current_max_dividers);

sys/dev/drm/radeon/rs780_dpm.c

634

r600_dynamicpm_enable(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

636

rs780_clk_scaling_enable(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

637

rs780_voltage_scaling_enable(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

640

r600_gfx_clockgating_enable(rdev, false);

sys/dev/drm/radeon/rs780_dpm.c

644

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/rs780_dpm.c

82

default_state->sclk_low, false, &dividers);

sys/dev/drm/radeon/rs780_dpm.c

868

pi->voltage_control = false;

sys/dev/drm/radeon/rs780_dpm.c

883

(pi->num_of_cycles_in_period & 0x8000) ? true : false;

sys/dev/drm/radeon/rs780_dpm.c

900

(pi->num_of_cycles_in_period & 0x8000) ? true : false;

sys/dev/drm/radeon/rs780_dpm.c

910

(pi->system_config & 0x4) ? true : false;

sys/dev/drm/radeon/rs780_dpm.c

919

pi->voltage_control = false;

sys/dev/drm/radeon/rs780_dpm.c

924

pi->voltage_control = false;

sys/dev/drm/radeon/rs780_dpm.c

928

pi->voltage_control = false;

sys/dev/drm/radeon/rs780_dpm.c

93

r600_engine_clock_entry_enable_post_divider(rdev, 0, false);

sys/dev/drm/radeon/rs780_dpm.c

96

r600_engine_clock_entry_enable_pulse_skipping(rdev, 0, false);

sys/dev/drm/radeon/rv515.c

1245

rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false);

sys/dev/drm/radeon/rv515.c

1246

rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false);

sys/dev/drm/radeon/rv515.c

1248

rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, false);

sys/dev/drm/radeon/rv515.c

1249

rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, false);

sys/dev/drm/radeon/rv515.c

126

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/rv515.c

329

save->crtc_enabled[i] = false;

sys/dev/drm/radeon/rv515.c

332

save->crtc_enabled[i] = false;

sys/dev/drm/radeon/rv515.c

589

rdev->accel_working = false;

sys/dev/drm/radeon/rv515.c

660

if (radeon_boot_test_post_card(rdev) == false)

sys/dev/drm/radeon/rv515.c

701

rdev->accel_working = false;

sys/dev/drm/radeon/rv6xx_dpm.c

1147

rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_MEDIUM, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1361

want_thermal_protection = false;

sys/dev/drm/radeon/rv6xx_dpm.c

146

clock, false, &dividers);

sys/dev/drm/radeon/rv6xx_dpm.c

1478

rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_LOW, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1479

rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_MEDIUM, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1480

rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_HIGH, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1481

rv6xx_enable_dynamic_spread_spectrum(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1482

rv6xx_enable_memory_spread_spectrum(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1507

rv6xx_enable_bif_dynamic_pcie_gen2(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1508

r600_enable_dynamic_pcie_gen2(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1572

if (pi->display_gap == false)

sys/dev/drm/radeon/rv6xx_dpm.c

1573

rv6xx_enable_display_gap(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1602

rv6xx_enable_static_voltage_control(rdev, boot_ps, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1623

rv6xx_enable_display_gap(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1628

r600_enable_thermal_protection(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1631

r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1632

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1635

rv6xx_enable_backbias(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1637

rv6xx_enable_spread_spectrum(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1643

rv6xx_enable_dynamic_pcie_gen2(rdev, boot_ps, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1647

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/rv6xx_dpm.c

1652

r600_gfx_clockgating_enable(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1673

r600_enable_thermal_protection(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1676

r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1677

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1695

rv6xx_enable_dynamic_voltage_control(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1698

rv6xx_enable_dynamic_backbias_control(rdev, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1707

r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1718

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);

sys/dev/drm/radeon/rv6xx_dpm.c

172

r600_engine_clock_entry_enable_pulse_skipping(rdev, step_index, false);

sys/dev/drm/radeon/rv6xx_dpm.c

175

r600_engine_clock_entry_enable_post_divider(rdev, step_index, false);

sys/dev/drm/radeon/rv6xx_dpm.c

1958

0, false, &dividers);

sys/dev/drm/radeon/rv6xx_dpm.c

1965

0, false, &dividers);

sys/dev/drm/radeon/rv6xx_dpm.c

1987

pi->sclk_ss = false;

sys/dev/drm/radeon/rv6xx_dpm.c

1992

pi->dynamic_ss = false;

sys/dev/drm/radeon/rv6xx_dpm.c

2000

pi->thermal_protection = false;

sys/dev/drm/radeon/rv6xx_dpm.c

2147

r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false);

sys/dev/drm/radeon/rv6xx_dpm.c

2148

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);

sys/dev/drm/radeon/rv6xx_dpm.c

2152

r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, false);

sys/dev/drm/radeon/rv6xx_dpm.c

312

r600_engine_clock_entry_enable(rdev, step_index, false);

sys/dev/drm/radeon/rv6xx_dpm.c

492

(state->high.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

494

(state->high.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

496

(state->medium.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

498

(state->low.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

501

(state->high.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

503

(state->medium.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

505

(state->low.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

558

rv6xx_enable_engine_spread_spectrum(rdev, level, false);

sys/dev/drm/radeon/rv6xx_dpm.c

561

if (radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, clock, false, &dividers) == 0) {

sys/dev/drm/radeon/rv6xx_dpm.c

603

if (radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, clock, false, &dividers))

sys/dev/drm/radeon/rv6xx_dpm.c

614

rv6xx_memory_clock_entry_enable_post_divider(rdev, entry, false);

sys/dev/drm/radeon/rv6xx_dpm.c

642

requested_memory_clock, false, &req_dividers) == 0) {

sys/dev/drm/radeon/rv6xx_dpm.c

661

rv6xx_enable_memory_spread_spectrum(rdev, false);

sys/dev/drm/radeon/rv730_dpm.c

136

memory_clock, false, &dividers);

sys/dev/drm/radeon/rv730_dpm.c

58

engine_clock, false, &dividers);

sys/dev/drm/radeon/rv740_dpm.c

138

engine_clock, false, &dividers);

sys/dev/drm/radeon/rv740_dpm.c

206

memory_clock, false, &dividers);

sys/dev/drm/radeon/rv770.c

1082

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/rv770.c

1870

rdev->accel_working = false;

sys/dev/drm/radeon/rv770.c

1990

rdev->accel_working = false;

sys/dev/drm/radeon/rv770_dma.c

66

radeon_sync_resv(rdev, &sync, resv, false);

sys/dev/drm/radeon/rv770_dma.c

90

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/rv770_dpm.c

1322

pi->mvdd_control = false;

sys/dev/drm/radeon/rv770_dpm.c

1330

pi->mvdd_control = false;

sys/dev/drm/radeon/rv770_dpm.c

1605

pi->mem_gddr5 = false;

sys/dev/drm/radeon/rv770_dpm.c

1620

pi->pcie_gen2 = false;

sys/dev/drm/radeon/rv770_dpm.c

1626

pi->boot_in_gen2 = false;

sys/dev/drm/radeon/rv770_dpm.c

1628

pi->boot_in_gen2 = false;

sys/dev/drm/radeon/rv770_dpm.c

173

bool dpm_en = false, cg_en = false;

sys/dev/drm/radeon/rv770_dpm.c

1755

bool current_use_dc = false;

sys/dev/drm/radeon/rv770_dpm.c

1756

bool new_use_dc = false;

sys/dev/drm/radeon/rv770_dpm.c

1784

bool current_use_dc = false;

sys/dev/drm/radeon/rv770_dpm.c

1785

bool new_use_dc = false;

sys/dev/drm/radeon/rv770_dpm.c

1826

want_thermal_protection = false;

sys/dev/drm/radeon/rv770_dpm.c

2013

rv770_enable_thermal_protection(rdev, false);

sys/dev/drm/radeon/rv770_dpm.c

2015

rv770_enable_spread_spectrum(rdev, false);

sys/dev/drm/radeon/rv770_dpm.c

2018

rv770_enable_dynamic_pcie_gen2(rdev, false);

sys/dev/drm/radeon/rv770_dpm.c

2022

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/rv770_dpm.c

2027

rv770_gfx_clock_gating_enable(rdev, false);

sys/dev/drm/radeon/rv770_dpm.c

2030

rv770_mg_clock_gating_enable(rdev, false);

sys/dev/drm/radeon/rv770_dpm.c

214

return false;

sys/dev/drm/radeon/rv770_dpm.c

2236

pi->acpi_pcie_gen2 = false;

sys/dev/drm/radeon/rv770_dpm.c

2344

pi->dynamic_ss = false;

sys/dev/drm/radeon/rv770_dpm.c

2378

0, false, &dividers);

sys/dev/drm/radeon/rv770_dpm.c

2404

pi->power_gating = false;

sys/dev/drm/radeon/rv770_dpm.c

2416

pi->thermal_protection = false;

sys/dev/drm/radeon/rv770_dpm.c

2423

pi->dcodt = false;

sys/dev/drm/radeon/rv770_dpm.c

2588

return false;

sys/dev/drm/radeon/rv770_dpm.c

415

memory_clock, false, &dividers);

sys/dev/drm/radeon/rv770_dpm.c

511

engine_clock, false, &dividers);

sys/dev/drm/radeon/rv770_dpm.c

805

rv740_enable_mclk_spread_spectrum(rdev, false);

sys/dev/drm/radeon/rv770_smc.c

421

return false;

sys/dev/drm/radeon/si.c

1669

bool new_smc = false;

sys/dev/drm/radeon/si.c

1670

bool si58_fw = false;

sys/dev/drm/radeon/si.c

1671

bool banks2_fw = false;

sys/dev/drm/radeon/si.c

1928

rdev->new_fw = false;

sys/dev/drm/radeon/si.c

2246

return false;

sys/dev/drm/radeon/si.c

2255

return false;

sys/dev/drm/radeon/si.c

2281

return false;

sys/dev/drm/radeon/si.c

2317

radeon_dpm_get_mclk(rdev, false) * 10;

sys/dev/drm/radeon/si.c

2319

radeon_dpm_get_sclk(rdev, false) * 10;

sys/dev/drm/radeon/si.c

2329

wm_high.interlaced = false;

sys/dev/drm/radeon/si.c

2356

wm_low.interlaced = false;

sys/dev/drm/radeon/si.c

3459

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/si.c

3460

rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;

sys/dev/drm/radeon/si.c

3461

rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false;

sys/dev/drm/radeon/si.c

3473

si_cp_enable(rdev, false);

sys/dev/drm/radeon/si.c

3571

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/si.c

3600

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/si.c

3610

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/si.c

3619

si_cp_enable(rdev, false);

sys/dev/drm/radeon/si.c

3641

si_enable_gui_idle_interrupt(rdev, false);

sys/dev/drm/radeon/si.c

3738

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;

sys/dev/drm/radeon/si.c

3739

rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;

sys/dev/drm/radeon/si.c

3740

rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false;

sys/dev/drm/radeon/si.c

3745

rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;

sys/dev/drm/radeon/si.c

3749

rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false;

sys/dev/drm/radeon/si.c

4099

r600_set_bios_scratch_engine_hung(rdev, false);

sys/dev/drm/radeon/si.c

4121

return false;

sys/dev/drm/radeon/si.c

4439

return false;

sys/dev/drm/radeon/si.c

5183

si_set_uvd_dcm(rdev, false);

sys/dev/drm/radeon/si.c

5367

si_enable_gui_idle_interrupt(rdev, false);

sys/dev/drm/radeon/si.c

5607

si_enable_gui_idle_interrupt(rdev, false);

sys/dev/drm/radeon/si.c

5613

si_enable_cgcg(rdev, false);

sys/dev/drm/radeon/si.c

5614

si_enable_mgcg(rdev, false);

sys/dev/drm/radeon/si.c

5660

si_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);

sys/dev/drm/radeon/si.c

5666

RADEON_CG_BLOCK_HDP), false);

sys/dev/drm/radeon/si.c

5785

si_enable_dma_pg(rdev, false);

sys/dev/drm/radeon/si.c

5786

si_enable_gfx_cgpg(rdev, false);

sys/dev/drm/radeon/si.c

5809

si_enable_gui_idle_interrupt(rdev, false);

sys/dev/drm/radeon/si.c

5831

return false;

sys/dev/drm/radeon/si.c

5930

rdev->ih.enabled = false;

sys/dev/drm/radeon/si.c

6240

bool queue_hotplug = false;

sys/dev/drm/radeon/si.c

6241

bool queue_dp = false;

sys/dev/drm/radeon/si.c

6242

bool queue_thermal = false;

sys/dev/drm/radeon/si.c

6400

rdev->pm.dpm.thermal.high_to_low = false;

sys/dev/drm/radeon/si.c

6778

rdev->accel_working = false;

sys/dev/drm/radeon/si.c

6791

si_cp_enable(rdev, false);

sys/dev/drm/radeon/si.c

6911

rdev->accel_working = false;

sys/dev/drm/radeon/si.c

6928

rdev->accel_working = false;

sys/dev/drm/radeon/si.c

7248

bool disable_l0s = false, disable_l1 = false, disable_plloff_in_l1 = false;

sys/dev/drm/radeon/si.c

7250

bool disable_clkreq = false;

sys/dev/drm/radeon/si.c

7381

clk_req_support = false;

sys/dev/drm/radeon/si.c

7386

clk_req_support = false;

sys/dev/drm/radeon/si.c

7389

clk_req_support = false;

sys/dev/drm/radeon/si_dma.c

255

radeon_sync_resv(rdev, &sync, resv, false);

sys/dev/drm/radeon/si_dma.c

279

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/si_dma.c

53

return false;

sys/dev/drm/radeon/si_dpm.c

1045

false

sys/dev/drm/radeon/si_dpm.c

1603

false

sys/dev/drm/radeon/si_dpm.c

1871

bool update_dte_from_pl2 = false;

sys/dev/drm/radeon/si_dpm.c

2058

ni_pi->enable_power_containment = false;

sys/dev/drm/radeon/si_dpm.c

2059

ni_pi->enable_cac = false;

sys/dev/drm/radeon/si_dpm.c

2060

ni_pi->enable_sq_ramping = false;

sys/dev/drm/radeon/si_dpm.c

2061

si_pi->enable_dte = false;

sys/dev/drm/radeon/si_dpm.c

2085

ni_pi->support_cac_long_term_average = false;

sys/dev/drm/radeon/si_dpm.c

2090

si_pi->dyn_powertune_data.disable_uvd_powertune = false;

sys/dev/drm/radeon/si_dpm.c

2177

false, /* ??? */

sys/dev/drm/radeon/si_dpm.c

2284

return false;

sys/dev/drm/radeon/si_dpm.c

2306

if (ni_pi->enable_power_containment == false)

sys/dev/drm/radeon/si_dpm.c

2401

enable_sq_ramping = false;

sys/dev/drm/radeon/si_dpm.c

2404

enable_sq_ramping = false;

sys/dev/drm/radeon/si_dpm.c

2407

enable_sq_ramping = false;

sys/dev/drm/radeon/si_dpm.c

2410

enable_sq_ramping = false;

sys/dev/drm/radeon/si_dpm.c

2413

enable_sq_ramping = false;

sys/dev/drm/radeon/si_dpm.c

2452

ni_pi->pc_enabled = false;

sys/dev/drm/radeon/si_dpm.c

2461

ni_pi->pc_enabled = false;

sys/dev/drm/radeon/si_dpm.c

2479

si_pi->enable_dte = false;

sys/dev/drm/radeon/si_dpm.c

2481

if (si_pi->enable_dte == false)

sys/dev/drm/radeon/si_dpm.c

2489

si_pi->enable_dte = false;

sys/dev/drm/radeon/si_dpm.c

251

false

sys/dev/drm/radeon/si_dpm.c

2664

if (ni_pi->enable_cac == false)

sys/dev/drm/radeon/si_dpm.c

2728

ni_pi->enable_cac = false;

sys/dev/drm/radeon/si_dpm.c

2729

ni_pi->enable_power_containment = false;

sys/dev/drm/radeon/si_dpm.c

2782

if ((ni_pi->enable_cac == false) ||

sys/dev/drm/radeon/si_dpm.c

2783

(ni_pi->cac_configuration_required == false))

sys/dev/drm/radeon/si_dpm.c

2814

ni_pi->support_cac_long_term_average = false;

sys/dev/drm/radeon/si_dpm.c

2820

ni_pi->cac_enabled = false;

sys/dev/drm/radeon/si_dpm.c

2837

ni_pi->cac_enabled = false;

sys/dev/drm/radeon/si_dpm.c

2910

ni_pi->enable_power_containment = false;

sys/dev/drm/radeon/si_dpm.c

2972

bool disable_mclk_switching = false;

sys/dev/drm/radeon/si_dpm.c

2973

bool disable_sclk_switching = false;

sys/dev/drm/radeon/si_dpm.c

3037

if (rdev->pm.dpm.ac_power == false) {

sys/dev/drm/radeon/si_dpm.c

3181

ps->dc_compatible = false;

sys/dev/drm/radeon/si_dpm.c

3209

bool ret = false;

sys/dev/drm/radeon/si_dpm.c

3290

want_thermal_protection = false;

sys/dev/drm/radeon/si_dpm.c

3865

bool strobe_mode = false;

sys/dev/drm/radeon/si_dpm.c

3902

return false;

sys/dev/drm/radeon/si_dpm.c

3909

return false;

sys/dev/drm/radeon/si_dpm.c

3914

return false;

sys/dev/drm/radeon/si_dpm.c

3917

return false;

sys/dev/drm/radeon/si_dpm.c

4011

pi->mvdd_control = false;

sys/dev/drm/radeon/si_dpm.c

4016

pi->mvdd_control = false;

sys/dev/drm/radeon/si_dpm.c

4030

si_pi->vddc_phase_shed_control = false;

sys/dev/drm/radeon/si_dpm.c

4034

si_pi->vddc_phase_shed_control = false;

sys/dev/drm/radeon/si_dpm.c

4105

si_pi->vddc_phase_shed_control = false;

sys/dev/drm/radeon/si_dpm.c

4155

bool voltage_found = false;

sys/dev/drm/radeon/si_dpm.c

4804

engine_clock, false, &dividers);

sys/dev/drm/radeon/si_dpm.c

4989

bool gmc_pg = false;

sys/dev/drm/radeon/si_dpm.c

5026

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/si_dpm.c

5028

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/si_dpm.c

5030

dll_state_on = false;

sys/dev/drm/radeon/si_dpm.c

5036

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/si_dpm.c

5158

return false;

sys/dev/drm/radeon/si_dpm.c

5167

return false;

sys/dev/drm/radeon/si_dpm.c

5172

return false;

sys/dev/drm/radeon/si_dpm.c

5213

eg_pi->uvd_enabled = false;

sys/dev/drm/radeon/si_dpm.c

5262

ni_pi->enable_power_containment = false;

sys/dev/drm/radeon/si_dpm.c

5266

ni_pi->enable_sq_ramping = false;

sys/dev/drm/radeon/si_dpm.c

5476

result = false;

sys/dev/drm/radeon/si_dpm.c

553

false

sys/dev/drm/radeon/si_dpm.c

5760

si_pi->pspp_notify_required = false;

sys/dev/drm/radeon/si_dpm.c

5765

if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN3, false) == 0)

sys/dev/drm/radeon/si_dpm.c

5771

if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)

sys/dev/drm/radeon/si_dpm.c

5805

radeon_acpi_pcie_performance_request(rdev, request, false);

sys/dev/drm/radeon/si_dpm.c

5939

vce_v1_0_enable_mgcg(rdev, false);

sys/dev/drm/radeon/si_dpm.c

5968

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/si_dpm.c

6018

si_pi->fan_ctrl_is_in_default_mode = false;

sys/dev/drm/radeon/si_dpm.c

6042

rdev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/radeon/si_dpm.c

6049

rdev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/radeon/si_dpm.c

6101

rdev->pm.dpm.fan.ucode_fan_control = false;

sys/dev/drm/radeon/si_dpm.c

6129

si_pi->fan_is_controlled_by_smc = false;

sys/dev/drm/radeon/si_dpm.c

6373

eg_pi->dynamic_ac_timing = false;

sys/dev/drm/radeon/si_dpm.c

6451

ret = si_notify_smc_display_change(rdev, false);

sys/dev/drm/radeon/si_dpm.c

6472

ret = si_thermal_enable_alert(rdev, false);

sys/dev/drm/radeon/si_dpm.c

6507

si_enable_thermal_protection(rdev, false);

sys/dev/drm/radeon/si_dpm.c

6508

si_enable_power_containment(rdev, boot_ps, false);

sys/dev/drm/radeon/si_dpm.c

6509

si_enable_smc_cac(rdev, boot_ps, false);

sys/dev/drm/radeon/si_dpm.c

6510

si_enable_spread_spectrum(rdev, false);

sys/dev/drm/radeon/si_dpm.c

6511

si_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, false);

sys/dev/drm/radeon/si_dpm.c

6579

ret = si_enable_power_containment(rdev, new_ps, false);

sys/dev/drm/radeon/si_dpm.c

6584

ret = si_enable_smc_cac(rdev, new_ps, false);

sys/dev/drm/radeon/si_dpm.c

6774

si_pi->ulv.supported = false;

sys/dev/drm/radeon/si_dpm.c

6776

si_pi->ulv.one_pcie_lane_in_ulv = false;

sys/dev/drm/radeon/si_dpm.c

6983

0, false, &dividers);

sys/dev/drm/radeon/si_dpm.c

6989

eg_pi->smu_uvd_hs = false;

sys/dev/drm/radeon/si_dpm.c

7038

si_pi->sclk_deep_sleep_above_low = false;

sys/dev/drm/radeon/si_dpm.c

7043

pi->thermal_protection = false;

sys/dev/drm/radeon/si_dpm.c

7052

eg_pi->pcie_performance_request = false;

sys/dev/drm/radeon/si_smc.c

169

return false;

sys/dev/drm/radeon/sumo_dpm.c

1156

sumo_take_smu_control(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

1268

sumo_enable_sclk_ds(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

1272

sumo_enable_voltage_scaling(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

1276

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/sumo_dpm.c

1308

sumo_enable_boost(rdev, new_ps, false);

sys/dev/drm/radeon/sumo_dpm.c

1714

pi->sys_info.enable_boost = false;

sys/dev/drm/radeon/sumo_dpm.c

1753

pi->driver_nbps_policy_disable = false;

sys/dev/drm/radeon/sumo_dpm.c

1757

pi->disable_gfx_power_gating_in_uvd = false;

sys/dev/drm/radeon/sumo_dpm.c

1760

pi->enable_dynamic_m3_arbiter = false;

sys/dev/drm/radeon/sumo_dpm.c

1766

pi->enable_gfx_power_gating = false;

sys/dev/drm/radeon/sumo_dpm.c

1914

sumo_enable_boost(rdev, rps, false);

sys/dev/drm/radeon/sumo_dpm.c

1919

sumo_power_level_enable(rdev, i, false);

sys/dev/drm/radeon/sumo_dpm.c

1921

sumo_set_forced_mode(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

1923

sumo_set_forced_mode(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

1926

sumo_enable_boost(rdev, rps, false);

sys/dev/drm/radeon/sumo_dpm.c

1931

sumo_power_level_enable(rdev, i, false);

sys/dev/drm/radeon/sumo_dpm.c

1933

sumo_set_forced_mode(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

1935

sumo_set_forced_mode(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

310

sumo_gfx_clockgating_enable(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

312

sumo_gfx_powergating_enable(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

314

sumo_mg_clockgating_enable(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

558

pl->sclk, false, &dividers);

sys/dev/drm/radeon/sumo_dpm.c

607

return false;

sys/dev/drm/radeon/sumo_dpm.c

658

sumo_set_forced_mode(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

726

sumo_boost_state_enable(rdev, false);

sys/dev/drm/radeon/sumo_dpm.c

770

sumo_power_level_enable(rdev, i, false);

sys/dev/drm/radeon/sumo_dpm.c

794

false, &dividers);

sys/dev/drm/radeon/sumo_dpm.c

814

sumo_power_level_enable(rdev, i, false);

sys/dev/drm/radeon/sumo_dpm.c

824

sumo_gfx_powergating_enable(rdev, false);

sys/dev/drm/radeon/sumo_smc.c

96

bool return_code = false;

sys/dev/drm/radeon/trinity_dpm.c

1003

vce_v1_0_enable_mgcg(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

1126

trinity_dpm_bapm_enable(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

1163

trinity_dpm_bapm_enable(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

1173

rdev->irq.dpm_thermal = false;

sys/dev/drm/radeon/trinity_dpm.c

1626

sumo_take_smu_control(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

1635

trinity_dce_enable_voltage_adjustment(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

1974

pi->enable_bapm = false;

sys/dev/drm/radeon/trinity_dpm.c

1976

pi->enable_bapm = false;

sys/dev/drm/radeon/trinity_dpm.c

1984

pi->enable_mg_clock_gating = false;

sys/dev/drm/radeon/trinity_dpm.c

1985

pi->enable_gfx_dynamic_mgpg = false;

sys/dev/drm/radeon/trinity_dpm.c

1986

pi->override_dynamic_mgpg = false;

sys/dev/drm/radeon/trinity_dpm.c

1988

pi->voltage_drop_in_dce = false; /* need to restructure dpm/modeset interaction */

sys/dev/drm/radeon/trinity_dpm.c

379

25000, false, &dividers);

sys/dev/drm/radeon/trinity_dpm.c

577

trinity_gfx_powergating_enable(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

579

trinity_gfx_dynamic_mgpg_enable(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

581

trinity_gfx_clockgating_enable(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

583

trinity_mg_clockgating_enable(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

584

trinity_ls_clockgating_enable(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

597

sclk, false, &dividers);

sys/dev/drm/radeon/trinity_dpm.c

607

sclk/2, false, &dividers);

sys/dev/drm/radeon/trinity_dpm.c

756

return false;

sys/dev/drm/radeon/trinity_dpm.c

804

trinity_dpm_config(rdev, false);

sys/dev/drm/radeon/trinity_dpm.c

859

trinity_power_level_enable_disable(rdev, i, false);

sys/dev/drm/radeon/trinity_dpm.c

871

trinity_power_level_enable_disable(rdev, i, false);

sys/dev/drm/radeon/trinity_dpm.c

906

return false;

sys/dev/drm/radeon/trinity_dpm.c

923

return false;

sys/dev/drm/radeon/trinity_dpm.c

933

trinity_gfx_powergating_enable(rdev, false);

sys/dev/drm/radeon/uvd_v1_0.c

176

ring->ready = false;

sys/dev/drm/radeon/uvd_v1_0.c

205

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/uvd_v1_0.c

253

ring->ready = false;

sys/dev/drm/radeon/uvd_v1_0.c

436

radeon_ring_unlock_commit(rdev, ring, false);

sys/dev/drm/radeon/uvd_v1_0.c

471

return false;

sys/dev/drm/radeon/uvd_v1_0.c

526

r = radeon_fence_wait_timeout(fence, false, usecs_to_jiffies(

sys/dev/drm/radeon/vce_v1_0.c

370

ring->ready = false;

sys/dev/drm/radeon/vce_v1_0.c

378

ring->ready = false;

sys/dev/drm/radeon/vce_v2_0.c

113

bool sw_cg = false;

sys/dev/drm/radeon/vce_v2_0.c

124

vce_v2_0_set_sw_cg(rdev, false);

sys/dev/drm/radeon/vce_v2_0.c

126

vce_v2_0_set_dyn_cg(rdev, false);

sys/dev/drm/scheduler/sched_entity.c

110

return false;

sys/dev/drm/scheduler/sched_entity.c

113

return false;

sys/dev/drm/scheduler/sched_entity.c

393

return false;

sys/dev/drm/scheduler/sched_entity.c

412

return false;

sys/dev/drm/scheduler/sched_entity.c

420

return false;

sys/dev/drm/scheduler/sched_entity.c

97

return false;

sys/dev/drm/scheduler/sched_main.c

176

return false;

sys/dev/drm/scheduler/sched_main.c

183

return false;

sys/dev/drm/scheduler/sched_main.c

351

bool found_guilty = false;

sys/dev/drm/scheduler/sched_main.c

519

return false;

sys/dev/drm/ttm/ttm_bo.c

1100

mem.bus.io_reserved_vm = false;

sys/dev/drm/ttm/ttm_bo.c

1108

ret = ttm_bo_handle_move_mem(bo, &mem, false, ctx);

sys/dev/drm/ttm/ttm_bo.c

1136

return false;

sys/dev/drm/ttm/ttm_bo.c

1154

return false;

sys/dev/drm/ttm/ttm_bo.c

1248

bo->mem.bus.io_reserved_vm = false;

sys/dev/drm/ttm/ttm_bo.c

1314

struct ttm_operation_ctx ctx = { interruptible, false };

sys/dev/drm/ttm/ttm_bo.c

1389

.interruptible = false,

sys/dev/drm/ttm/ttm_bo.c

1390

.no_wait_gpu = false,

sys/dev/drm/ttm/ttm_bo.c

1420

ret = dma_fence_wait(fence, false);

sys/dev/drm/ttm/ttm_bo.c

1446

man->use_type = false;

sys/dev/drm/ttm/ttm_bo.c

1447

man->has_type = false;

sys/dev/drm/ttm/ttm_bo.c

1496

man->use_io_reserve_lru = false;

sys/dev/drm/ttm/ttm_bo.c

1587

man->use_type = false;

sys/dev/drm/ttm/ttm_bo.c

1593

man->has_type = false;

sys/dev/drm/ttm/ttm_bo.c

1672

return false;

sys/dev/drm/ttm/ttm_bo.c

1675

return false;

sys/dev/drm/ttm/ttm_bo.c

1678

return false;

sys/dev/drm/ttm/ttm_bo.c

1706

ttm_mem_io_lock(man, false);

sys/dev/drm/ttm/ttm_bo.c

1795

ret = ttm_bo_cleanup_refs(bo, false, false, locked);

sys/dev/drm/ttm/ttm_bo.c

1809

struct ttm_operation_ctx ctx = { false, false };

sys/dev/drm/ttm/ttm_bo.c

1826

ret = ttm_bo_wait(bo, false, false);

sys/dev/drm/ttm/ttm_bo.c

1858

.interruptible = false,

sys/dev/drm/ttm/ttm_bo.c

1859

.no_wait_gpu = false

sys/dev/drm/ttm/ttm_bo.c

372

bdev->driver->move_notify(bo, false, mem);

sys/dev/drm/ttm/ttm_bo.c

386

bo->evicted = false;

sys/dev/drm/ttm/ttm_bo.c

419

bo->bdev->driver->move_notify(bo, false, NULL);

sys/dev/drm/ttm/ttm_bo.c

473

reservation_object_wait_timeout_rcu(bo->resv, true, false,

sys/dev/drm/ttm/ttm_bo.c

628

ttm_bo_cleanup_refs(bo, false, !remove_all, true);

sys/dev/drm/ttm/ttm_bo.c

631

ttm_bo_cleanup_refs(bo, false, !remove_all, true);

sys/dev/drm/ttm/ttm_bo.c

651

if (!ttm_bo_delayed_delete(bdev, false))

sys/dev/drm/ttm/ttm_bo.c

664

ttm_mem_io_lock(man, false);

sys/dev/drm/ttm/ttm_bo.c

719

return ttm_tt_create(bo, false);

sys/dev/drm/ttm/ttm_bo.c

724

evict_mem.bus.io_reserved_vm = false;

sys/dev/drm/ttm/ttm_bo.c

757

return false;

sys/dev/drm/ttm/ttm_bo.c

776

bool ret = false;

sys/dev/drm/ttm/ttm_bo.c

778

*locked = false;

sys/dev/drm/ttm/ttm_bo.c

800

bool locked = false;

sys/dev/drm/ttm/ttm_bo.c

954

return false;

sys/dev/drm/ttm/ttm_bo.c

957

return false;

sys/dev/drm/ttm/ttm_bo.c

982

bool type_found = false;

sys/dev/drm/ttm/ttm_bo.c

983

bool type_ok = false;

sys/dev/drm/ttm/ttm_bo.c

984

bool has_erestartsys = false;

sys/dev/drm/ttm/ttm_bo_util.c

198

mem->bus.io_reserved_vm = false;

sys/dev/drm/ttm/ttm_bo_util.c

212

(void) ttm_mem_io_lock(man, false);

sys/dev/drm/ttm/ttm_bo_util.c

226

(void) ttm_mem_io_lock(man, false);

sys/dev/drm/ttm/ttm_bo_util.c

245

(void) ttm_mem_io_lock(man, false);

sys/dev/drm/ttm/ttm_bo_util.c

564

.interruptible = false,

sys/dev/drm/ttm/ttm_bo_util.c

565

.no_wait_gpu = false

sys/dev/drm/ttm/ttm_bo_util.c

615

(void) ttm_mem_io_lock(man, false);

sys/dev/drm/ttm/ttm_bo_util.c

653

(void) ttm_mem_io_lock(man, false);

sys/dev/drm/ttm/ttm_bo_util.c

674

ret = ttm_bo_wait(bo, false, false);

sys/dev/drm/ttm/ttm_bo_util.c

797

ret = ttm_bo_wait(bo, false, false);

sys/dev/drm/ttm/ttm_bo_util.c

827

ttm_bo_wait(bo, false, false);

sys/dev/drm/ttm/ttm_bo_vm.c

234

.interruptible = false,

sys/dev/drm/ttm/ttm_bo_vm.c

235

.no_wait_gpu = false,

sys/dev/drm/ttm/ttm_bo_vm.c

373

ret = ttm_bo_reserve(bo, true, false, NULL);

sys/dev/drm/ttm/ttm_bo_vm.c

680

.interruptible = false,

sys/dev/drm/ttm/ttm_bo_vm.c

681

.no_wait_gpu = false,

sys/dev/drm/ttm/ttm_bo_vm.c

831

vm_object_page_remove(vm_obj, 0, 0, false);

sys/dev/drm/ttm/ttm_memory.c

203

return false;

sys/dev/drm/ttm/ttm_memory.c

234

.interruptible = false,

sys/dev/drm/ttm/ttm_memory.c

235

.no_wait_gpu = false

sys/dev/drm/ttm/ttm_memory.c

386

bool needs_swapping = false;

sys/dev/drm/ttm/ttm_memory.c

445

return false;

sys/dev/drm/ttm/ttm_memory.c

450

return false;

sys/dev/drm/ttm/ttm_memory.c

457

return false;

sys/dev/drm/ttm/ttm_memory.c

517

ttm_shrink(glob, false, memory + (memory >> 2) + 16, ctx);

sys/dev/drm/ttm/ttm_page_alloc.c

634

pool->fill_lock = false;

sys/dev/drm/ttm/ttm_page_alloc.c

680

struct ttm_page_pool *pool = ttm_get_pool(flags, false, cstate);

sys/dev/drm/ttm/ttm_page_alloc.c

720

ttm_page_pool_free(pool, npages, false);

sys/dev/drm/ttm/ttm_page_alloc.c

730

struct ttm_page_pool *pool = ttm_get_pool(flags, false, cstate);

sys/dev/drm/ttm/ttm_page_alloc.c

804

pool->fill_lock = false;

sys/dev/drm/ttm/ttm_page_alloc_dma.c

1075

ttm_dma_page_pool_free(pool, npages, false);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

948

gfp_t gfp_flags = ttm_dma_pool_gfp_flags(ttm_dma, false);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

995

bool is_cached = false;

sys/dev/misc/evdev/cdev.c

381

client->ec_async = false;

sys/dev/misc/evdev/cdev.c

679

client->ec_blocked = false;

sys/dev/misc/evdev/cdev.c

683

client->ec_selected = false;

sys/dev/misc/evdev/cdev.c

858

bool last_was_syn = false;

sys/dev/misc/evdev/evdev.c

1049

return (false);

sys/dev/misc/evdev/evdev.c

843

evdev->ev_report_opened = false;

sys/dev/misc/evdev/evdev_mt.c

452

return (false);

sys/dev/misc/psm/psm.c

1793

is_pointing_stick = false;

sys/dev/netif/ath/ath_hal/ah_osdep.h

50

#ifndef false

sys/dev/netif/ig_hal/e1000_phy.c

3132

FALSE, false);

sys/dev/netif/ig_hal/e1000_phy.c

3296

FALSE, false);

sys/dev/netif/ig_hal/e1000_phy.c

3607

return __e1000_read_phy_reg_hv(hw, offset, data, FALSE, false);

sys/dev/netif/ig_hal/e1000_phy.c

3733

return __e1000_write_phy_reg_hv(hw, offset, data, FALSE, false);

sys/dev/netif/iwm/if_iwm.c

3228

return false;

sys/dev/netif/iwm/if_iwm.c

3235

return false;

sys/dev/netif/iwm/if_iwm.c

3247

return false;

sys/dev/netif/iwm/if_iwm.c

3279

return false;

sys/dev/netif/iwm/if_iwm.c

3338

return false;

sys/dev/netif/iwm/if_iwm.c

3367

return false;

sys/dev/netif/iwm/if_iwm.c

3387

return false;

sys/dev/netif/iwm/if_iwm_time_event.c

237

return false;

sys/dev/netif/iwn/if_iwn_chip_cfg.h

119

.shadow_ram_support = false, /* shadow_ram_support */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

120

.shadow_reg_enable = false, /* shadow_reg_enable */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

121

.bt_session_2 = false, /* bt_session_2 */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

123

.additional_nic_config = false, /* additional_nic_config */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

125

.enhanced_TX_power = false, /* enhanced_TX_power */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

131

.support_hostap = false, /* support_hostap */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

145

.shadow_reg_enable = false, /* shadow_reg_enable */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

146

.bt_session_2 = false, /* bt_session_2 XXX unknown? */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

148

.additional_nic_config = false, /* additional_nic_config - not for 4965 */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

150

.enhanced_TX_power = false, /* enhanced_TX_power - not for 4965 */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

157

.support_hostap = false, /* support_hostap - XXX should work on fixing! */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

169

.shadow_reg_enable = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

170

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

172

.additional_nic_config = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

182

.no_multi_vaps = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

192

.shadow_reg_enable = false, /* XXX check? */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

195

.additional_nic_config = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

205

.no_multi_vaps = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

214

.shadow_ram_support = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

215

.shadow_reg_enable = false, /* XXX check? */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

216

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

217

.bt_sco_disable = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

218

.additional_nic_config = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

220

.enhanced_TX_power = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

227

.support_hostap = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

239

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

240

.bt_sco_disable = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

241

.additional_nic_config = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

249

.support_hostap = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

260

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

262

.additional_nic_config = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

270

.support_hostap = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

281

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

283

.additional_nic_config = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

292

.support_hostap = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

304

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

313

.support_hostap = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

324

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

333

.support_hostap = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

346

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

348

.additional_nic_config = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

357

.support_hostap = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

372

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

383

.support_hostap = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

395

.shadow_reg_enable = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

396

.bt_session_2 = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

398

.additional_nic_config = false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

400

.enhanced_TX_power =false,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

406

.support_hostap = false,

sys/dev/netif/ix/if_ix.c

5136

hw->phy.reset_disable = false;

sys/dev/netif/ix/if_ix.c

5203

dcfg->fcoe_en = false;

sys/dev/netif/re/if_re.c

583

return false;

sys/dev/netif/re/if_re.c

586

return false;

sys/dev/powermng/amdsmn/amdsmn.c

211

return (false);

sys/dev/powermng/amdtemp/amdtemp.c

167

{ VENDORID_AMD, DEVICEID_AMD_MISC15_M60H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

171

{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

172

{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M10H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

173

{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

174

{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

175

{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M70H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

176

{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_MA0H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

178

{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M10H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

180

{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M40H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

181

{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M50H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

183

{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

184

{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M70H_ROOT, false },

sys/dev/powermng/amdtemp/amdtemp.c

305

return (false);

sys/dev/powermng/amdtemp/amdtemp.c

376

needsmn = false;

sys/dev/raid/mpr/mpr_mapping.c

2386

return (false);

sys/dev/raid/tws/tws.c

365

sc->obfl_q_overrun = false;

sys/dev/raid/tws/tws.c

459

sc->is64bit = (sizeof(bus_addr_t) == 8) ? true : false;

sys/dev/raid/tws/tws.c

620

sc->sense_bufs[i].posted = false;

sys/dev/raid/tws/tws_cam.c

1262

sc->obfl_q_overrun = false;

sys/dev/raid/tws/tws_cam.c

543

sen->posted = false;

sys/dev/raid/tws/tws_hdm.c

147

sc->obfl_q_overrun = false;

sys/dev/raid/tws/tws_hdm.c

364

return(false);

sys/dev/raid/tws/tws_hdm.c

416

return(false);

sys/dev/raid/tws/tws_hdm.c

482

return(false);

sys/dev/raid/tws/tws_hdm.c

91

sc->obfl_q_overrun = false;

sys/dev/video/vga/vga_switcheroo.c

1082

bool delay = false;

sys/dev/video/vga/vga_switcheroo.c

1083

bool just_mux = false;

sys/dev/video/vga/vga_switcheroo.c

1182

vgasr_priv->delayed_switch_active = false;

sys/dev/video/vga/vga_switcheroo.c

1197

if (can_switch == false && delay == false)

sys/dev/video/vga/vga_switcheroo.c

1277

vgasr_priv->delayed_switch_active = false;

sys/dev/video/vga/vga_switcheroo.c

274

vgasr_priv->active = false;

sys/dev/video/vga/vga_switcheroo.c

389

return register_client(pdev, ops, id | ID_BIT_AUDIO, false, false);

sys/dev/video/vga/vga_switcheroo.c

451

return false;

sys/dev/video/vga/vga_switcheroo.c

505

vgasr_priv->active = false;

sys/dev/video/vga/vga_switcheroo.c

740

active->active = false;

sys/dev/video/vga/vga_switcheroo.c

782

return false;

sys/dev/video/vga/vga_switcheroo.c

795

bool delay = false, can_switch;

sys/dev/video/vga/vga_switcheroo.c

796

bool just_mux = false;

sys/dev/video/vga/vga_switcheroo.c

872

vgasr_priv.delayed_switch_active = false;

sys/dev/video/vga/vga_switcheroo.c

887

if (can_switch == false && delay == false)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1379

comp_ctx = get_comp_ctxt(admin_queue, i, false);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1705

admin_queue->polling = false;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

210

comp_ctx->occupied = false;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

309

comp_ctx = get_comp_ctxt(queue, i, false);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

336

admin_queue->running_state = false;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

473

comp_ctx = get_comp_ctxt(admin_queue, cmd_id, false);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

476

admin_queue->running_state = false;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

573

admin_queue->running_state = false;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

613

llq_info->inline_header = false;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

697

admin_queue->running_state = false;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

897

return false;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

996

ena_dev->adaptive_coalescing = false;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

285

return false;

sys/dev/virtual/amazon/ena/ena.c

1122

print_once = false;

sys/dev/virtual/amazon/ena/ena.c

2062

irq->requested = false;

sys/dev/virtual/amazon/ena/ena.c

2613

adapter->up = false;

sys/dev/virtual/amazon/ena/ena.c

2653

offload = false;

sys/dev/virtual/amazon/ena/ena.c

3125

adapter->rss_support = false;

sys/dev/virtual/amazon/ena/ena.c

3288

ena_com_set_admin_polling_mode(ena_dev, false);

sys/dev/virtual/amazon/ena/ena.c

3351

false)) {

sys/dev/virtual/amazon/ena/ena.c

3561

ena_com_set_admin_running_state(ena_dev, false);

sys/dev/virtual/amazon/ena/ena.c

3571

adapter->trigger_reset = false;

sys/dev/virtual/amazon/ena/ena.c

3613

adapter->running = false;

sys/dev/virtual/amazon/ena/ena.c

3698

adapter->up = false;

sys/dev/virtual/nvmm/nvmm.c

155

vcpu->present = false;

sys/dev/virtual/nvmm/nvmm.c

376

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

388

false /* !fixed */, true /* shared */, PROT_READ | PROT_WRITE,

sys/dev/virtual/nvmm/nvmm.c

401

args->cpuid * NVMM_COMM_PAGE_SIZE, false /* !wired */,

sys/dev/virtual/nvmm/nvmm.c

402

false /* !fixed */, true /* shared */, PROT_READ | PROT_WRITE,

sys/dev/virtual/nvmm/nvmm.c

432

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

468

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

503

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

527

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

550

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

608

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

726

hmapping->hva + hmapping->size, false);

sys/dev/virtual/nvmm/nvmm.c

730

hmapping->present = false;

sys/dev/virtual/nvmm/nvmm.c

767

hmapping->vmobj, 0, false /* !wired */, true /* fixed */,

sys/dev/virtual/nvmm/nvmm.c

803

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

85

mach->present = false;

sys/dev/virtual/nvmm/nvmm.c

850

false /* !wired */, true /* fixed */, false /* !shared */,

sys/dev/virtual/nvmm/nvmm.c

866

error = nvmm_machine_get(owner, args->machid, &mach, false);

sys/dev/virtual/nvmm/nvmm.c

895

os_vmobj_unmap(&mach->vm->vm_map, gpa, gpa + args->size, false);

sys/dev/virtual/nvmm/nvmm.c

982

machines[i].cpus[n].present = false;

sys/dev/virtual/nvmm/nvmm_dragonfly.c

188

os_vmobj_unmap(map, start, start + size, false);

sys/dev/virtual/nvmm/nvmm_dragonfly.c

195

os_vmobj_unmap(map, start, start + size, false);

sys/dev/virtual/nvmm/nvmm_netbsd.c

129

error = uvm_map_pageable(map, *addr, *addr + size, false, 0);

sys/dev/virtual/nvmm/nvmm_netbsd.c

131

os_vmobj_unmap(map, *addr, *addr + size, false);

sys/dev/virtual/nvmm/nvmm_netbsd.c

41

return uvmspace_alloc(vmin, vmax, false);

sys/dev/virtual/nvmm/nvmm_os.h

306

return false;

sys/dev/virtual/nvmm/nvmm_os.h

314

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86.c

468

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86.c

470

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1130

svm_event_waitexit_disable(vcpu, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1316

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1590

cpudata->htlb_want_flush = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1597

cpudata->evt_pending = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1709

cpudata->gtlb_want_flush = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1710

cpudata->gtsc_want_update = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1721

svm_event_waitexit_disable(vcpu, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1912

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2038

svm_event_waitexit_enable(vcpu, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2040

svm_event_waitexit_disable(vcpu, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2351

svm_vcpu_msr_allow(cpudata->msrbm, MSR_TSC, true, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2472

cpudata->cpuidpresent[i] = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2582

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2589

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2596

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2603

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2609

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2615

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2627

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2746

os_ipi_broadcast(svm_change_cpu, (void *)false);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

694

cpudata->nmi_window_exit = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

699

cpudata->int_window_exit = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

713

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

824

vcpu->comm->event_commit = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1007

cpudata->vmcs_launched = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1011

cpudata->vmcs_launched = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1083

cpudata->nmi_window_exit = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1086

cpudata->int_window_exit = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1100

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1217

vcpu->comm->event_commit = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1614

vmx_event_waitexit_disable(vcpu, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1756

write = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1953

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2243

cpudata->evt_pending = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2323

cpudata->gtlb_want_flush = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2328

cpudata->gtsc_want_update = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2451

vmx_event_waitexit_disable(vcpu, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2609

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2746

vmx_event_waitexit_enable(vcpu, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2748

vmx_event_waitexit_disable(vcpu, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2982

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_TSC, true, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3160

cpudata->cpuidpresent[i] = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3364

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3371

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3377

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3381

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3390

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3399

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3409

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3417

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3425

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3439

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3447

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3453

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3457

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3461

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3466

vmx_ept_has_ad = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3473

return false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3476

vmx_cpu_has_arch_cap = false;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3653

os_ipi_broadcast(vmx_change_cpu, (void *)false);

sys/dev/virtual/virtio/balloon/virtio_balloon.c

869

sc->vtballoon_update_stats = false;

sys/kern/kern_fork.c

1341

any_signaled = false;

sys/kern/kern_fork.c

1363

visited = false;

sys/kern/kern_fork.c

1420

visited = false;

sys/kern/kern_kthread.c

82

ret = _kthread_create(func, arg, tdp, -1, false, fmt, ap);

sys/kern/kern_sig.c

1750

timevalid = false;

sys/kern/kern_udev.c

179

if (prop_dictionary_set(dict, key, ps) == false) {

sys/kern/kern_udev.c

199

if (prop_dictionary_set(dict, key, pn) == false) {

sys/kern/kern_udev.c

219

if (prop_dictionary_set(dict, key, pn) == false) {

sys/kern/kern_udev.c

566

if (prop_dictionary_set(dict, "evdict", ev->ev.ev_dict) == false) {

sys/kern/kern_udev.c

955

if (prop_array_add(ctx->cdevs, cdev->si_dict) == false) {

sys/kern/subr_gtaskqueue.c

332

in_net_epoch = false;

sys/kern/subr_gtaskqueue.c

349

in_net_epoch = false;

sys/kern/sys_mqueue.c

399

destroy = false;

sys/kern/vfs_syscalls.c

4196

return (kern_fsync(uap->fd, false));

sys/libprop/prop_array.c

156

bool rv = false;

sys/libprop/prop_array.c

166

if (_prop_object_externalize_start_tag(ctx, "array") == false ||

sys/libprop/prop_array.c

167

_prop_object_externalize_append_char(ctx, '\n') == false)

sys/libprop/prop_array.c

178

if ((*po->po_type->pot_extern)(ctx, po) == false) {

sys/libprop/prop_array.c

188

if (_prop_object_externalize_append_char(ctx, '\t') == false)

sys/libprop/prop_array.c

191

if (_prop_object_externalize_end_tag(ctx, "array") == false)

sys/libprop/prop_array.c

303

return (false);

sys/libprop/prop_array.c

500

return (false);

sys/libprop/prop_array.c

557

if (prop_array_is_immutable(pa) == false)

sys/libprop/prop_array.c

572

rv = prop_array_is_immutable(pa) == false;

sys/libprop/prop_array.c

612

_prop_array_expand(pa, pa->pa_capacity + EXPAND_STEP) == false))

sys/libprop/prop_array.c

613

return (false);

sys/libprop/prop_array.c

633

bool rv = false;

sys/libprop/prop_array.c

636

return (false);

sys/libprop/prop_array.c

677

return (false);

sys/libprop/prop_array.c

731

return (false);

sys/libprop/prop_array.c

752

if (_prop_object_externalize_header(ctx) == false ||

sys/libprop/prop_array.c

753

(*pa->pa_obj.po_type->pot_extern)(ctx, pa) == false ||

sys/libprop/prop_array.c

754

_prop_object_externalize_footer(ctx) == false) {

sys/libprop/prop_array.c

811

if (prop_array_add(array, child) == false) {

sys/libprop/prop_array.c

838

_PROP_TAG_TYPE_EITHER) == false)

sys/libprop/prop_array.c

850

return (false);

sys/libprop/prop_array.c

882

return (false);

sys/libprop/prop_array.c

884

if (rv == false)

sys/libprop/prop_array.c

887

if (rv == false)

sys/libprop/prop_array_util.c

114

return (false); \

sys/libprop/prop_array_util.c

116

if (prop_number_unsigned(num) == false && \

sys/libprop/prop_array_util.c

118

return (false); \

sys/libprop/prop_array_util.c

122

return (false); \

sys/libprop/prop_array_util.c

140

return (false); \

sys/libprop/prop_array_util.c

157

return (false); \

sys/libprop/prop_array_util.c

173

return (false); \

sys/libprop/prop_array_util.c

189

return (false); \

sys/libprop/prop_array_util.c

213

return (false); \

sys/libprop/prop_array_util.c

217

return (*cpp == NULL ? false : true); \

sys/libprop/prop_array_util.c

230

return (false); \

sys/libprop/prop_array_util.c

247

return false;

sys/libprop/prop_array_util.c

53

return (false);

sys/libprop/prop_array_util.c

70

return (false);

sys/libprop/prop_array_util.c

87

return (false); \

sys/libprop/prop_array_util.c

94

return (false); \

sys/libprop/prop_array_util.c

98

return (false); \

sys/libprop/prop_bool.c

121

_prop_bool_false.pb_value = false;

sys/libprop/prop_bool.c

178

return (false);

sys/libprop/prop_bool.c

191

return (false);

sys/libprop/prop_bool.c

211

ctx->poic_is_empty_element == false)

sys/libprop/prop_bool.c

218

val = false;

sys/libprop/prop_data.c

115

if (_prop_object_externalize_start_tag(ctx, "data") == false)

sys/libprop/prop_data.c

116

return (false);

sys/libprop/prop_data.c

136

_prop_data_base64[output[0]]) == false ||

sys/libprop/prop_data.c

138

_prop_data_base64[output[1]]) == false ||

sys/libprop/prop_data.c

140

_prop_data_base64[output[2]]) == false ||

sys/libprop/prop_data.c

142

_prop_data_base64[output[3]]) == false)

sys/libprop/prop_data.c

143

return (false);

sys/libprop/prop_data.c

161

_prop_data_base64[output[0]]) == false ||

sys/libprop/prop_data.c

163

_prop_data_base64[output[1]]) == false ||

sys/libprop/prop_data.c

166

: _prop_data_base64[output[2]]) == false ||

sys/libprop/prop_data.c

168

_prop_data_pad64) == false)

sys/libprop/prop_data.c

169

return (false);

sys/libprop/prop_data.c

172

if (_prop_object_externalize_end_tag(ctx, "data") == false)

sys/libprop/prop_data.c

173

return (false);

sys/libprop/prop_data.c

362

return (false);

sys/libprop/prop_data.c

377

return (false);

sys/libprop/prop_data.c

380

return (false);

sys/libprop/prop_data.c

401

return (false);

sys/libprop/prop_data.c

413

return (false);

sys/libprop/prop_data.c

419

return (false);

sys/libprop/prop_data.c

429

return (false);

sys/libprop/prop_data.c

443

return (false);

sys/libprop/prop_data.c

457

return (false);

sys/libprop/prop_data.c

478

return (false);

sys/libprop/prop_data.c

482

return (false);

sys/libprop/prop_data.c

489

return (false);

sys/libprop/prop_data.c

495

return (false);

sys/libprop/prop_data.c

507

return (false);

sys/libprop/prop_data.c

509

return (false);

sys/libprop/prop_data.c

520

return (false);

sys/libprop/prop_data.c

581

NULL) == false)

sys/libprop/prop_data.c

593

&ctx->poic_cp) == false) {

sys/libprop/prop_data.c

603

_PROP_TAG_TYPE_END) == false) {

sys/libprop/prop_dictionary.c

1008

pd->pd_capacity + EXPAND_STEP) == false) {

sys/libprop/prop_dictionary.c

1077

return (false);

sys/libprop/prop_dictionary.c

1166

return (false);

sys/libprop/prop_dictionary.c

1196

return (false);

sys/libprop/prop_dictionary.c

1217

if (_prop_object_externalize_header(ctx) == false ||

sys/libprop/prop_dictionary.c

1218

(*pd->pd_obj.po_type->pot_extern)(ctx, pd) == false ||

sys/libprop/prop_dictionary.c

1219

_prop_object_externalize_footer(ctx) == false) {

sys/libprop/prop_dictionary.c

1292

prop_dictionary_set(dict, tmpkey, child) == false) {

sys/libprop/prop_dictionary.c

1318

if (_prop_object_internalize_find_tag(ctx, NULL, _PROP_TAG_TYPE_EITHER) == false)

sys/libprop/prop_dictionary.c

1336

&ctx->poic_cp) == false)

sys/libprop/prop_dictionary.c

1343

_PROP_TAG_TYPE_END) == false)

sys/libprop/prop_dictionary.c

1348

_PROP_TAG_TYPE_START) == false)

sys/libprop/prop_dictionary.c

1357

return (false);

sys/libprop/prop_dictionary.c

1391

return (false);

sys/libprop/prop_dictionary.c

1393

if (rv == false)

sys/libprop/prop_dictionary.c

1396

if (rv == false)

sys/libprop/prop_dictionary.c

254

if (_prop_object_externalize_start_tag(ctx, "string") == false ||

sys/libprop/prop_dictionary.c

256

pdk->pdk_key) == false ||

sys/libprop/prop_dictionary.c

257

_prop_object_externalize_end_tag(ctx, "string") == false)

sys/libprop/prop_dictionary.c

258

return (false);

sys/libprop/prop_dictionary.c

434

bool rv = false;

sys/libprop/prop_dictionary.c

443

if (_prop_object_externalize_start_tag(ctx, "dict") == false ||

sys/libprop/prop_dictionary.c

444

_prop_object_externalize_append_char(ctx, '\n') == false)

sys/libprop/prop_dictionary.c

458

_prop_object_externalize_start_tag(ctx, "key") == false ||

sys/libprop/prop_dictionary.c

460

pdk->pdk_key) == false ||

sys/libprop/prop_dictionary.c

461

_prop_object_externalize_end_tag(ctx, "key") == false ||

sys/libprop/prop_dictionary.c

462

(*po->po_type->pot_extern)(ctx, po) == false) {

sys/libprop/prop_dictionary.c

472

if (_prop_object_externalize_append_char(ctx, '\t') == false)

sys/libprop/prop_dictionary.c

475

if (_prop_object_externalize_end_tag(ctx, "dict") == false)

sys/libprop/prop_dictionary.c

591

return (false);

sys/libprop/prop_dictionary.c

755

if (prop_dictionary_is_immutable(pd) == false)

sys/libprop/prop_dictionary.c

791

return (false);

sys/libprop/prop_dictionary.c

860

if (rv == false)

sys/libprop/prop_dictionary.c

866

if (rv == false) {

sys/libprop/prop_dictionary.c

966

return (_prop_dictionary_get_keysym(pd, pdk, false));

sys/libprop/prop_dictionary.c

980

bool rv = false;

sys/libprop/prop_dictionary.c

983

return (false);

sys/libprop/prop_dictionary.c

988

return (false);

sys/libprop/prop_dictionary_util.c

106

return (false); \

sys/libprop/prop_dictionary_util.c

110

return (false); \

sys/libprop/prop_dictionary_util.c

126

return (false); \

sys/libprop/prop_dictionary_util.c

128

if (prop_number_unsigned(num) == false && \

sys/libprop/prop_dictionary_util.c

130

return (false); \

sys/libprop/prop_dictionary_util.c

134

return (false); \

sys/libprop/prop_dictionary_util.c

152

return (false); \

sys/libprop/prop_dictionary_util.c

169

return (false); \

sys/libprop/prop_dictionary_util.c

193

return (false); \

sys/libprop/prop_dictionary_util.c

197

return (*cpp == NULL ? false : true); \

sys/libprop/prop_dictionary_util.c

210

return (false); \

sys/libprop/prop_dictionary_util.c

228

return false;

sys/libprop/prop_dictionary_util.c

50

return false;

sys/libprop/prop_dictionary_util.c

65

return (false);

sys/libprop/prop_dictionary_util.c

82

return (false);

sys/libprop/prop_dictionary_util.c

99

return (false); \

sys/libprop/prop_ingest.c

137

if ((*pite->pite_handler)(ctx, NULL) == false) {

sys/libprop/prop_ingest.c

140

return (false);

sys/libprop/prop_ingest.c

145

return (false);

sys/libprop/prop_ingest.c

150

return (false);

sys/libprop/prop_ingest.c

152

if ((*pite->pite_handler)(ctx, obj) == false) {

sys/libprop/prop_ingest.c

154

return (false);

sys/libprop/prop_number.c

208

if (_prop_object_externalize_start_tag(ctx, "integer") == false ||

sys/libprop/prop_number.c

209

_prop_object_externalize_append_cstring(ctx, tmpstr) == false ||

sys/libprop/prop_number.c

210

_prop_object_externalize_end_tag(ctx, "integer") == false)

sys/libprop/prop_number.c

211

return (false);

sys/libprop/prop_number.c

334

pnv.pnv_is_unsigned = false;

sys/libprop/prop_number.c

464

return (false);

sys/libprop/prop_number.c

478

return (false);

sys/libprop/prop_number.c

482

return (false);

sys/libprop/prop_number.c

497

return (false);

sys/libprop/prop_number.c

501

return (false);

sys/libprop/prop_number.c

521

return (false);

sys/libprop/prop_number.c

544

return (false);

sys/libprop/prop_number.c

546

pnv->pnv_is_unsigned = false;

sys/libprop/prop_number.c

578

if (_prop_number_internalize_signed(ctx, &pnv) == false)

sys/libprop/prop_number.c

581

if (_prop_number_internalize_unsigned(ctx, &pnv) == false)

sys/libprop/prop_number.c

584

if (_prop_number_internalize_signed(ctx, &pnv) == false &&

sys/libprop/prop_number.c

585

_prop_number_internalize_unsigned(ctx, &pnv) == false)

sys/libprop/prop_number.c

590

_PROP_TAG_TYPE_END) == false)

sys/libprop/prop_object.c

1147

*error_flag = false;

sys/libprop/prop_object.c

1156

return (false);

sys/libprop/prop_object.c

116

if (_prop_object_externalize_append_char(ctx, '\t') == false)

sys/libprop/prop_object.c

117

return (false);

sys/libprop/prop_object.c

1189

return (false);

sys/libprop/prop_object.c

119

if (_prop_object_externalize_append_char(ctx, '<') == false ||

sys/libprop/prop_object.c

120

_prop_object_externalize_append_cstring(ctx, tag) == false ||

sys/libprop/prop_object.c

121

_prop_object_externalize_append_char(ctx, '>') == false)

sys/libprop/prop_object.c

122

return (false);

sys/libprop/prop_object.c

136

if (_prop_object_externalize_append_char(ctx, '<') == false ||

sys/libprop/prop_object.c

137

_prop_object_externalize_append_char(ctx, '/') == false ||

sys/libprop/prop_object.c

138

_prop_object_externalize_append_cstring(ctx, tag) == false ||

sys/libprop/prop_object.c

139

_prop_object_externalize_append_char(ctx, '>') == false ||

sys/libprop/prop_object.c

140

_prop_object_externalize_append_char(ctx, '\n') == false)

sys/libprop/prop_object.c

141

return (false);

sys/libprop/prop_object.c

157

if (_prop_object_externalize_append_char(ctx, '\t') == false)

sys/libprop/prop_object.c

158

return (false);

sys/libprop/prop_object.c

161

if (_prop_object_externalize_append_char(ctx, '<') == false ||

sys/libprop/prop_object.c

162

_prop_object_externalize_append_cstring(ctx, tag) == false ||

sys/libprop/prop_object.c

163

_prop_object_externalize_append_char(ctx, '/') == false ||

sys/libprop/prop_object.c

164

_prop_object_externalize_append_char(ctx, '>') == false ||

sys/libprop/prop_object.c

165

_prop_object_externalize_append_char(ctx, '\n') == false)

sys/libprop/prop_object.c

166

return (false);

sys/libprop/prop_object.c

182

(unsigned char) *cp) == false)

sys/libprop/prop_object.c

183

return (false);

sys/libprop/prop_object.c

203

"<") == false)

sys/libprop/prop_object.c

204

return (false);

sys/libprop/prop_object.c

208

">") == false)

sys/libprop/prop_object.c

209

return (false);

sys/libprop/prop_object.c

213

"&") == false)

sys/libprop/prop_object.c

214

return (false);

sys/libprop/prop_object.c

218

(unsigned char) *cp) == false)

sys/libprop/prop_object.c

219

return (false);

sys/libprop/prop_object.c

248

return (false);

sys/libprop/prop_object.c

270

_plist_xml_header) == false ||

sys/libprop/prop_object.c

272

"plist version=\"1.0\"") == false ||

sys/libprop/prop_object.c

273

_prop_object_externalize_append_char(ctx, '\n') == false)

sys/libprop/prop_object.c

274

return (false);

sys/libprop/prop_object.c

288

if (_prop_object_externalize_end_tag(ctx, "plist") == false ||

sys/libprop/prop_object.c

289

_prop_object_externalize_append_char(ctx, '\0') == false)

sys/libprop/prop_object.c

290

return (false);

sys/libprop/prop_object.c

351

return (false); /* ran out of buffer */

sys/libprop/prop_object.c

382

return (false);

sys/libprop/prop_object.c

385

return (false);

sys/libprop/prop_object.c

389

return (false);

sys/libprop/prop_object.c

393

return (false);

sys/libprop/prop_object.c

399

return (false);

sys/libprop/prop_object.c

401

if (_prop_object_internalize_skip_comment(ctx) == false)

sys/libprop/prop_object.c

402

return (false);

sys/libprop/prop_object.c

409

return (false);

sys/libprop/prop_object.c

412

return (false);

sys/libprop/prop_object.c

417

return (false);

sys/libprop/prop_object.c

426

return (false);

sys/libprop/prop_object.c

434

return (false);

sys/libprop/prop_object.c

439

return(false); /* only valid on start tags */

sys/libprop/prop_object.c

443

return (false);

sys/libprop/prop_object.c

445

ctx->poic_is_empty_element = false;

sys/libprop/prop_object.c

460

return (false);

sys/libprop/prop_object.c

465

return (false);

sys/libprop/prop_object.c

472

return (false);

sys/libprop/prop_object.c

478

return (false);

sys/libprop/prop_object.c

481

return (false);

sys/libprop/prop_object.c

487

return (false);

sys/libprop/prop_object.c

492

return (false);

sys/libprop/prop_object.c

517

return (false);

sys/libprop/prop_object.c

554

return (false);

sys/libprop/prop_object.c

559

return (false);

sys/libprop/prop_object.c

673

_PROP_TAG_TYPE_START) == false)

sys/libprop/prop_object.c

691

_PROP_TAG_TYPE_START) == false)

sys/libprop/prop_object.c

703

_PROP_TAG_TYPE_END) == false) {

sys/libprop/prop_object.c

757

if (_prop_object_internalize_skip_comment(ctx) == false)

sys/libprop/prop_object.c

855

return (false);

sys/libprop/prop_object.c

865

return (false);

sys/libprop/prop_object.c

868

return (false);

sys/libprop/prop_object.c

895

return (false);

sys/libprop/prop_object.c

909

bool need_guard = false;

sys/libprop/prop_object_impl.h

232

#define _PROP_NOTHREAD_ONCE_DECL(x) static bool x = false;

sys/libprop/prop_object_impl.h

235

if ((x) == false) { \

sys/libprop/prop_rb.c

1222

rb_tree_check_node(rbt, self, prev, false);

sys/libprop/prop_rb.c

186

rebalance = false;

sys/libprop/prop_rb.c

268

KASSERT(rb_tree_check_node(rbt, old_father, NULL, false));

sys/libprop/prop_rb.c

269

KASSERT(rb_tree_check_node(rbt, old_child, NULL, false));

sys/libprop/prop_rb.c

271

rb_tree_check_node(rbt, grandpa, NULL, false));

sys/libprop/prop_rb.c

311

KASSERT(rb_tree_check_node(rbt, new_father, NULL, false));

sys/libprop/prop_rb.c

312

KASSERT(rb_tree_check_node(rbt, new_child, NULL, false));

sys/libprop/prop_rb.c

314

rb_tree_check_node(rbt, grandpa, NULL, false));

sys/libprop/prop_rb.c

435

KASSERT(rb_tree_check_node(rbt, self, NULL, false));

sys/libprop/prop_rb.c

513

KASSERT(rb_tree_check_node(rbt, self, NULL, false));

sys/libprop/prop_rb.c

514

KASSERT(rb_tree_check_node(rbt, standin, NULL, false));

sys/libprop/prop_rb.c

523

rebalance = false;

sys/libprop/prop_rb.c

606

KASSERT(rb_tree_check_node(rbt, standin, NULL, false));

sys/libprop/prop_rb.c

608

|| rb_tree_check_node(rbt, standin_father, NULL, false));

sys/libprop/prop_rb.c

610

|| rb_tree_check_node(rbt, standin->rb_left, NULL, false));

sys/libprop/prop_rb.c

612

|| rb_tree_check_node(rbt, standin->rb_right, NULL, false));

sys/libprop/prop_rb.c

642

KASSERT(rb_tree_check_node(rbt, self, NULL, false));

sys/libprop/prop_rb.c

643

KASSERT(rb_tree_check_node(rbt, son, NULL, false));

sys/libprop/prop_rb.c

779

KASSERT(rb_tree_check_node(rbt, brother, NULL, false));

sys/libprop/prop_rb.c

780

KASSERT(rb_tree_check_node(rbt, parent, NULL, false));

sys/libprop/prop_rb.c

796

KASSERT(rb_tree_check_node(rbt, brother, NULL, false));

sys/libprop/prop_rb.c

797

KASSERT(rb_tree_check_node(rbt, parent, NULL, false));

sys/libprop/prop_stack.c

53

return false;

sys/libprop/prop_stack.c

87

return false;

sys/libprop/prop_string.c

101

if (_prop_object_externalize_start_tag(ctx, "string") == false ||

sys/libprop/prop_string.c

103

ps->ps_immutable) == false ||

sys/libprop/prop_string.c

104

_prop_object_externalize_end_tag(ctx, "string") == false)

sys/libprop/prop_string.c

105

return (false);

sys/libprop/prop_string.c

284

return (false);

sys/libprop/prop_string.c

337

return (false);

sys/libprop/prop_string.c

340

return (false);

sys/libprop/prop_string.c

345

return (false);

sys/libprop/prop_string.c

369

return (false);

sys/libprop/prop_string.c

374

return (false);

sys/libprop/prop_string.c

379

return (false);

sys/libprop/prop_string.c

398

return (false);

sys/libprop/prop_string.c

413

return (false);

sys/libprop/prop_string.c

443

NULL) == false)

sys/libprop/prop_string.c

451

&ctx->poic_cp) == false ||

sys/libprop/prop_string.c

459

_PROP_TAG_TYPE_END) == false) {

sys/net/if_clone.c

280

return (false);

sys/net/if_clone.c

286

return (false);

sys/net/radix.c

1087

stopping = false;

sys/net/radix.c

217

return (false);

sys/net/radix.c

219

equal = false;

sys/net/radix.c

223

return (false);

sys/net/radix.c

295

return (false);

sys/net/radix.c

488

*dupentry = false;

sys/net/radix.c

625

isnormal = false;

sys/net/radix.c

660

return (false);

sys/net/radix.c

722

if ((x = rn_addmask(mask, false, top->rn_offset,

sys/net/wg/if_wg.c

1224

atomic_store_bool(&peer->p_enabled, false);

sys/net/wg/if_wg.c

1225

atomic_store_bool(&peer->p_need_another_keepalive, false);

sys/net/wg/if_wg.c

1384

wg_timers_run_send_initiation(peer, false);

sys/net/wg/if_wg.c

1436

atomic_store_bool(&peer->p_need_another_keepalive, false);

sys/net/wg/if_wg.c

1459

wg_timers_run_send_initiation(peer, false);

sys/net/wg/if_wg.c

2100

if (noise_keypair_should_refresh(peer->p_remote, false))

sys/net/wg/if_wg.c

2526

new_peer = false;

sys/net/wg/if_wg.c

418

bool ok = false;

sys/net/wg/if_wg.c

513

return (false);

sys/net/wg/if_wg.c

529

return (false);

sys/net/wg/selftest/allowedips.c

300

bool ret = false;

sys/net/wg/selftest/allowedips.c

36

return (false);

sys/net/wg/selftest/allowedips.c

39

return (false);

sys/net/wg/selftest/allowedips.c

527

success = false; \

sys/net/wg/selftest/allowedips.c

537

success = false; \

sys/net/wg/selftest/allowedips.c

607

bool success = false;

sys/net/wg/selftest/allowedips.c

728

found_a = found_b = found_c = found_d = found_e = found_other = false;

sys/net/wg/selftest/allowedips.c

765

success = false;

sys/net/wg/selftest/cookie.c

134

bool ret = false;

sys/net/wg/selftest/cookie.c

169

bool ret = false;

sys/net/wg/selftest/cookie.c

225

bool ret = false;

sys/net/wg/selftest/cookie.c

62

bool ret = false;

sys/net/wg/selftest/counter.c

35

success = false; \

sys/net/wg/wg_cookie.c

339

cm->cm_mac1_sent = false;

sys/net/wg/wg_cookie.c

362

cm->cm_cookie_valid = false;

sys/net/wg/wg_cookie.c

474

rl->rl_initialized = false;

sys/net/wg/wg_cookie.c

481

ratelimit_gc(_rl, false);

sys/net/wg/wg_noise.c

1042

bool ok = false;

sys/net/wg/wg_noise.c

1180

bool ok = false;

sys/net/wg/wg_noise.c

1233

r = noise_remote_index_lookup(l, r_idx, false);

sys/net/wg/wg_noise.c

1303

return (false);

sys/net/wg/wg_noise.c

1484

return (false);

sys/net/wg/wg_noise.c

1500

return (false);

sys/net/wg/wg_noise.c

1574

return (false);

sys/net/wg/wg_noise.c

484

r->r_entry_inserted = false;

sys/net/wg/wg_noise.c

585

return (false);

sys/net/wg/wg_noise.c

645

bool has_psk = false;

sys/net/wg/wg_noise.c

720

atomic_store_bool(&kp->kp_can_send, false);

sys/net/wg/wg_noise.c

723

atomic_store_bool(&kp->kp_can_send, false);

sys/net/wg/wg_noise.c

761

atomic_store_bool(&kp->kp_can_send, false);

sys/net/wg/wg_noise.c

783

return (false);

sys/net/wg/wg_noise.c

785

return (false);

sys/net/wg/wg_noise.c

792

return (false);

sys/net/wg/wg_noise.c

865

return (false);

sys/net/wg/wg_noise.c

875

atomic_store_bool(&kp->kp_can_send, false);

sys/net/wg/wg_noise.c

876

return (false);

sys/netinet/if_ether.c

726

bool do_rtmsg = false;

sys/netproto/802_11/wlan/ieee80211.c

807

ieee80211_promisc(vap, false);

sys/netproto/802_11/wlan/ieee80211.c

809

ieee80211_allmulti(vap, false);

sys/platform/pc64/x86_64/efirt.c

309

return false;

sys/platform/vkernel64/platform/init.c

265

usage_help(false);

sys/platform/vkernel64/platform/init.c

438

usage_help(false);

sys/vfs/autofs/autofs.c

158

if (autofs_softc->sc_dev_opened == false)

sys/vfs/autofs/autofs.c

159

return (false);

sys/vfs/autofs/autofs.c

168

return (false);

sys/vfs/autofs/autofs.c

208

ar->ar_in_progress = false;

sys/vfs/autofs/autofs.c

234

return (false);

sys/vfs/autofs/autofs.c

347

ar->ar_done = false;

sys/vfs/autofs/autofs.c

349

ar->ar_wildcards = false;

sys/vfs/autofs/autofs.c

350

ar->ar_in_progress = false;

sys/vfs/autofs/autofs.c

366

while (ar->ar_done == false) {

sys/vfs/autofs/autofs.c

519

ar->ar_in_progress = false;

sys/vfs/autofs/autofs.c

555

autofs_softc->sc_dev_opened = false;

sys/vfs/autofs/autofs.h

174

anp->an_cached = false;

sys/vfs/autofs/autofs_vfsops.c

218

found = false;

sys/vfs/autofs/autofs_vfsops.c

225

ar->ar_in_progress = false;

sys/vfs/autofs/autofs_vfsops.c

228

if (found == false) {

sys/vfs/autofs/autofs_vfsops.c

74

autofs_softc->sc_dev_opened = false;

sys/vfs/autofs/autofs_vnops.c

174

if (nlookup_fs_root(anp, &nvp) == false)

sys/vfs/autofs/autofs_vnops.c

203

if (autofs_cached(anp, ncp->nc_name, ncp->nc_nlen) == false &&

sys/vfs/autofs/autofs_vnops.c

204

autofs_ignore_thread() == false) {

sys/vfs/autofs/autofs_vnops.c

260

if (autofs_ignore_thread() == false)

sys/vfs/autofs/autofs_vnops.c

311

if (autofs_cached(anp, NULL, 0) == false &&

sys/vfs/autofs/autofs_vnops.c

312

autofs_ignore_thread() == false) {

sys/vfs/autofs/autofs_vnops.c

507

anp->an_cached = false;

sys/vfs/autofs/autofs_vnops.c

508

anp->an_wildcards = false;

sys/vfs/autofs/autofs_vnops.c

51

return (false);

sys/vfs/autofs/autofs_vnops.c

56

return (false);

sys/vfs/autofs/autofs_vnops.c

85

return (error ? false : true);

sys/vfs/devfs/devfs_core.c

1948

callback(dev->si_name, dev, false, arg);

sys/vfs/fuse/fuse_node.c

69

fnp->closed = false;

sys/vfs/fuse/fuse_util.c

178

res = false;

sys/vfs/fuse/fuse_util.c

181

res = false;

sys/vfs/fuse/fuse_util.c

184

res = false;

sys/vfs/fuse/fuse_util.c

194

res = false;

sys/vfs/fuse/fuse_util.c

197

res = false;

sys/vfs/fuse/fuse_util.c

203

res = false;

sys/vfs/fuse/fuse_util.c

206

res = false;

sys/vfs/fuse/fuse_util.c

209

res = false;

sys/vfs/fuse/fuse_util.c

212

res = false;

sys/vfs/fuse/fuse_util.c

215

res = false;

sys/vfs/fuse/fuse_util.c

218

res = false;

sys/vfs/fuse/fuse_util.c

221

res = false;

sys/vfs/fuse/fuse_util.c

224

res = false;

sys/vfs/fuse/fuse_util.c

227

res = false;

sys/vfs/fuse/fuse_vfsops.c

177

fmp->dead = false;

sys/vfs/fuse/fuse_vnops.c

205

fnp->closed = false;

sys/vfs/msdosfs/fat.h

116

return (markvoldirty_upgrade(pmp, dirty, false));

test/crypto/cryptoapi/cryptoapi_test.c

354

bool benchmark = false;

test/illumos/oclo/oclo.c

1198

ret = false;

test/illumos/oclo/oclo.c

154

return (false);

test/illumos/oclo/oclo.c

160

return (false);

test/illumos/oclo/oclo.c

168

return (false);

test/illumos/oclo/oclo.c

175

return (false);

test/illumos/oclo/oclo.c

215

if (!oclo_flags_match(&oclo_rtdata[oclo_rtdata_next], false)) {

test/illumos/oclo/oclo.c

404

oclo_dup_common(c, 0, false);

test/illumos/oclo/oclo.c

541

oclo_accept_common(c, 0, false);

test/illumos/oclo/oclo_errors.c

103

return (false);

test/illumos/oclo/oclo_errors.c

114

return (false);

test/illumos/oclo/oclo_errors.c

120

return (false);

test/illumos/oclo/oclo_errors.c

48

return (false);

test/illumos/oclo/oclo_errors.c

53

return (false);

test/illumos/oclo/ocloexec_verify.c

72

return (false);

test/illumos/oclo/ocloexec_verify.c

78

return (false);

test/illumos/oclo/ocloexec_verify.c

84

return (false);

test/illumos/oclo/ocloexec_verify.c

90

return (false);

test/illumos/oclo/ocloexec_verify.c

96

return (false);

test/nvmm/demo/smallkern/main.c

284

print_state(false, "wrong APICBASE");

test/nvmm/demo/smallkern/main.c

291

print_state(false, "PG_NX is enabled!");

test/nvmm/demo/smallkern/main.c

299

print_state(false, "Not running on cpu120!");

test/nvmm/demo/smallkern/main.c

311

print_state(false, "LAPIC information does not match!");

test/nvmm/demo/toyvirt/main.c

105

has_nmi_pending = false;

test/nvmm/demo/toyvirt/main.c

75

static bool can_take_int = false;

test/nvmm/demo/toyvirt/main.c

76

static bool can_take_nmi = false;

test/nvmm/demo/toyvirt/main.c

77

static bool has_int_pending = false;

test/nvmm/demo/toyvirt/main.c

78

static bool has_nmi_pending = false;

test/nvmm/demo/toyvirt/main.c

93

has_int_pending = false;

test/nvmm/demo/toyvirt/toydev.c

85

new_line = false;

test/stress/stress2/testcases/openat/doat.c

84

bool dir_exist = false;

test/stress/stress2/testcases/openat/doat.c

85

bool file_exist = false;

test/stress/stress2/testcases/openat/doat.c

86

bool link_exist = false;

test/testcases/libnvmm/h_io_assist.c

356

{ "test7 - OUTB", &test7_begin, &test7_end, "12", false },

test/testcases/libnvmm/h_io_assist.c

357

{ "test8 - OUTW", &test8_begin, &test8_end, "1234", false },

test/testcases/libnvmm/h_io_assist.c

358

{ "test9 - OUTL", &test9_begin, &test9_end, "12345678", false },

test/testcases/libnvmm/h_io_assist.c

359

{ "test10 - OUTSB+REP", &test10_begin, &test10_end, "12345", false },

test/testcases/libnvmm/h_io_assist.c

361

"Ah, Herr Bramard", false },

test/testcases/libnvmm/h_io_assist.c

363

"123456789abcdefghijklmnopqrs", false },

test/testcases/libnvmm/h_io_assist.c

364

{ NULL, NULL, NULL, NULL, false }

tools/tools/netrate/kq_sendrecv/kq_sendcli/kq_sendcli.c

163

bool do_sendfile = false, bindcpu = false;

usr.bin/backlight/backlight.c

196

if (quiet == false) {

usr.bin/backlight/backlight.c

97

bool quiet = false;

usr.bin/bc/bc.y

1112

do_fork = false;

usr.bin/bc/bc.y

185

st_has_continue = false;

usr.bin/bc/bc.y

191

st_has_continue = false;

usr.bin/calendar/calendar.c

162

return false;

usr.bin/calendar/calendar.c

169

bool L_flag = false;

usr.bin/calendar/calendar.c

365

reaped = false;

usr.bin/calendar/calendar.c

522

return false;

usr.bin/calendar/calendar.c

529

return false;

usr.bin/calendar/calendar.c

74

.allmode = false,

usr.bin/calendar/chinese.c

381

{ "Lìchūn", "立春", false, 315 },

usr.bin/calendar/chinese.c

383

{ "Jīngzhé", "惊蛰", false, 345 },

usr.bin/calendar/chinese.c

385

{ "Qīngmíng", "清明", false, 15 },

usr.bin/calendar/chinese.c

387

{ "Lìxià", "立夏", false, 45 },

usr.bin/calendar/chinese.c

389

{ "Mángzhòng", "芒种", false, 75 },

usr.bin/calendar/chinese.c

391

{ "Xiǎoshǔ", "小暑", false, 105 },

usr.bin/calendar/chinese.c

393

{ "Lìqiū", "立秋", false, 135 },

usr.bin/calendar/chinese.c

395

{ "Báilù", "白露", false, 165 },

usr.bin/calendar/chinese.c

397

{ "Hánlù", "寒露", false, 195 },

usr.bin/calendar/chinese.c

399

{ "Lìdōng", "立冬", false, 225 },

usr.bin/calendar/chinese.c

401

{ "Dàxuě", "大雪", false, 255 },

usr.bin/calendar/chinese.c

403

{ "Xiǎohán", "小寒", false, 285 },

usr.bin/calendar/io.c

175

*skip = false;

usr.bin/calendar/io.c

187

return false;

usr.bin/calendar/io.c

191

return false;

usr.bin/calendar/io.c

201

return false;

usr.bin/calendar/io.c

207

return false;

usr.bin/calendar/io.c

213

return false;

usr.bin/calendar/io.c

221

return false;

usr.bin/calendar/io.c

225

return false;

usr.bin/calendar/io.c

236

return false;

usr.bin/calendar/io.c

249

return false;

usr.bin/calendar/io.c

259

return false;

usr.bin/calendar/io.c

288

skip = false;

usr.bin/calendar/io.c

289

locale_changed = false;

usr.bin/calendar/io.c

290

calendar_changed = false;

usr.bin/calendar/io.c

298

return false;

usr.bin/calendar/io.c

308

var_handled = false;

usr.bin/calendar/io.c

495

return false;

usr.bin/calendar/io.c

502

cfile->rewinded = false;

usr.bin/calendar/io.c

531

return false;

usr.bin/calendar/io.c

533

return false;

usr.bin/calendar/io.c

535

return false;

usr.bin/calendar/io.c

538

return false;

usr.bin/calendar/io.c

554

return false;

usr.bin/calendar/io.c

556

return false;

usr.bin/calendar/parsedata.c

193

if (is_onlydigits(p1, false) && is_onlydigits(p2, true)) {

usr.bin/calendar/parsedata.c

214

if ((strcmp(p1, "*") == 0 && is_onlydigits(p2, false)) ||

usr.bin/calendar/parsedata.c

215

(strcmp(p2, "*") == 0 && is_onlydigits(p1, false) && (p2 = p1))) {

usr.bin/calendar/parsedata.c

222

if (is_onlydigits(p1, false) &&

usr.bin/calendar/parsedata.c

255

if (is_onlydigits(p2, false)) {

usr.bin/calendar/parsedata.c

277

return false;

usr.bin/calendar/parsedata.c

442

return (false);

usr.bin/calendar/parsedata.c

481

return (false);

usr.bin/calendar/parsedata.c

491

return (false);

usr.bin/calendar/parsedata.c

500

bool parsed = false;

usr.bin/calendar/parsedata.c

506

return false; /* has trailing junk */

usr.bin/calendar/parsedata.c

509

return false;

usr.bin/calendar/parsedata.c

567

return false;

usr.bin/calendar/parsedata.c

573

return false;

usr.bin/calendar/parsedata.c

578

return false;

usr.bin/calendar/parsedata.c

581

return false;

usr.bin/calendar/parsedata.c

616

return false;

usr.bin/calendar/parsedata.c

620

return false;

usr.bin/calendar/parsedata.c

649

return false;

usr.bin/calendar/parsedata.c

655

return false;

usr.bin/calendar/parsedata.c

661

return false;

usr.bin/calendar/parsedata.c

670

return false;

usr.bin/calendar/parsedata.c

677

return false;

usr.bin/calendar/parsedata.c

702

return false;

usr.bin/calendar/parsedata.c

705

return false;

usr.bin/calendar/parsedata.c

709

return false;

usr.bin/calendar/parsedata.c

714

return false;

usr.bin/calendar/parsedata.c

745

return false;

usr.bin/calendar/parsedata.c

749

return false;

usr.bin/calendar/sun.c

262

else if (morning == false)

usr.bin/calendar/sun.c

340

alpha, false);

usr.bin/calendar/utils.c

192

return false;

usr.bin/cmp/cmp.c

107

special = false;

usr.bin/dc/bcode.c

1195

neg = false;

usr.bin/dc/bcode.c

1494

return false;

usr.bin/dc/bcode.c

1750

bmachine.interrupted = false;

usr.bin/dc/dc.c

46

bool extended_regs = false;

usr.bin/dc/inout.c

186

bool sign = false;

usr.bin/dc/inout.c

187

bool dot = false;

usr.bin/dc/inout.c

234

escape = false;

usr.bin/dc/inout.c

252

escape = false;

usr.bin/dfregress/testcase.c

376

return _testcase_get_interpreter(testcase, false);

usr.bin/getaddrinfo/getaddrinfo.c

213

return false;

usr.bin/getaddrinfo/getaddrinfo.c

256

return false;

usr.bin/head/head.c

105

first = false;

usr.bin/head/head.c

58

bool qflag = false, vflag = false;

usr.bin/head/head.c

77

vflag = false;

usr.bin/head/head.c

81

qflag = false;

usr.bin/iconv/iconv.c

160

bool opt_c = false, opt_s = false;

usr.bin/indent/args.c

103

{"bs", PRO_BOOL, false, ON, &opt.Bill_Shannon},

usr.bin/indent/args.c

109

{"cs", PRO_BOOL, false, ON, &opt.space_after_cast},

usr.bin/indent/args.c

112

{"dj", PRO_BOOL, false, ON, &opt.ljust_decl},

usr.bin/indent/args.c

114

{"eei", PRO_BOOL, false, ON, &opt.extra_expression_indent},

usr.bin/indent/args.c

123

{"lpl", PRO_BOOL, false, ON, &opt.lineup_to_parens_always},

usr.bin/indent/args.c

126

{"nbacc", PRO_BOOL, false, OFF, &opt.blanklines_around_conditional_compilation},

usr.bin/indent/args.c

127

{"nbadp", PRO_BOOL, false, OFF, &opt.blanklines_after_declarations_at_proctop},

usr.bin/indent/args.c

128

{"nbad", PRO_BOOL, false, OFF, &opt.blanklines_after_declarations},

usr.bin/indent/args.c

129

{"nbap", PRO_BOOL, false, OFF, &opt.blanklines_after_procs},

usr.bin/indent/args.c

130

{"nbbb", PRO_BOOL, false, OFF, &opt.blanklines_before_blockcomments},

usr.bin/indent/args.c

132

{"nbs", PRO_BOOL, false, OFF, &opt.Bill_Shannon},

usr.bin/indent/args.c

135

{"ncs", PRO_BOOL, false, OFF, &opt.space_after_cast},

usr.bin/indent/args.c

136

{"ndj", PRO_BOOL, false, OFF, &opt.ljust_decl},

usr.bin/indent/args.c

137

{"neei", PRO_BOOL, false, OFF, &opt.extra_expression_indent},

usr.bin/indent/args.c

143

{"nlpl", PRO_BOOL, false, OFF, &opt.lineup_to_parens_always},

usr.bin/indent/args.c

145

{"npcs", PRO_BOOL, false, OFF, &opt.proc_calls_space},

usr.bin/indent/args.c

149

{"nsob", PRO_BOOL, false, OFF, &opt.swallow_optional_blanklines},

usr.bin/indent/args.c

151

{"nv", PRO_BOOL, false, OFF, &opt.verbose},

usr.bin/indent/args.c

152

{"pcs", PRO_BOOL, false, ON, &opt.proc_calls_space},

usr.bin/indent/args.c

155

{"sob", PRO_BOOL, false, ON, &opt.swallow_optional_blanklines},

usr.bin/indent/args.c

157

{"ta", PRO_BOOL, false, ON, &opt.auto_typedefs},

usr.bin/indent/args.c

160

{"v", PRO_BOOL, false, ON, &opt.verbose},

usr.bin/indent/args.c

310

*p->p_obj = false;

usr.bin/indent/args.c

95

{"bacc", PRO_BOOL, false, ON, &opt.blanklines_around_conditional_compilation},

usr.bin/indent/args.c

96

{"badp", PRO_BOOL, false, ON, &opt.blanklines_after_declarations_at_proctop},

usr.bin/indent/args.c

97

{"bad", PRO_BOOL, false, ON, &opt.blanklines_after_declarations},

usr.bin/indent/args.c

98

{"bap", PRO_BOOL, false, ON, &opt.blanklines_after_procs},

usr.bin/indent/args.c

99

{"bbb", PRO_BOOL, false, ON, &opt.blanklines_before_blockcomments},

usr.bin/indent/indent.c

1002

sp_sw = false;

usr.bin/indent/indent.c

1005

ps.in_stmt = false;

usr.bin/indent/indent.c

1032

ps.want_blank = false;

usr.bin/indent/indent.c

1038

ps.want_blank = false; /* dont put a blank after a period */

usr.bin/indent/indent.c

1151

ps.pcase = false;

usr.bin/indent/indent.c

1293

ps.want_blank = false;

usr.bin/indent/indent.c

153

had_eof = ps.in_decl = ps.decl_on_line = break_comma = false;

usr.bin/indent/indent.c

154

sp_sw = force_nl = false;

usr.bin/indent/indent.c

155

ps.in_or_st = false;

usr.bin/indent/indent.c

159

ps.want_blank = ps.in_stmt = ps.ind_stmt = false;

usr.bin/indent/indent.c

161

scase = ps.pcase = false;

usr.bin/indent/indent.c

292

int comment_buffered = false;

usr.bin/indent/indent.c

323

force_nl = false;

usr.bin/indent/indent.c

394

force_nl = false;

usr.bin/indent/indent.c

397

ps.search_brace = false;

usr.bin/indent/indent.c

412

force_nl = false;

usr.bin/indent/indent.c

425

ps.search_brace = false; /* stop looking for start of

usr.bin/indent/indent.c

511

ps.want_blank = false; /* dont insert blank at line start */

usr.bin/indent/indent.c

512

force_nl = false;

usr.bin/indent/indent.c

527

ps.want_blank = false;

usr.bin/indent/indent.c

532

force_nl = false; /* cancel forced newline after newline, form

usr.bin/indent/indent.c

549

ps.want_blank = false;

usr.bin/indent/indent.c

556

ps.want_blank = false;

usr.bin/indent/indent.c

584

ps.want_blank = false;

usr.bin/indent/indent.c

597

ps.in_or_st = false; /* turn off flag for structure decl or

usr.bin/indent/indent.c

624

sp_sw = false;

usr.bin/indent/indent.c

628

ps.in_stmt = false; /* dont use stmt continuation

usr.bin/indent/indent.c

663

ps.want_blank = false;

usr.bin/indent/indent.c

710

ps.want_blank = false;

usr.bin/indent/indent.c

713

ps.in_stmt = false; /* seeing a label does not imply we are in a

usr.bin/indent/indent.c

733

scase = false;

usr.bin/indent/indent.c

734

ps.want_blank = false;

usr.bin/indent/indent.c

739

ps.in_or_st = false;/* we are not in an initialization or

usr.bin/indent/indent.c

741

scase = false; /* these will only need resetting in an error */

usr.bin/indent/indent.c

773

sp_sw = false;

usr.bin/indent/indent.c

789

ps.in_stmt = false; /* dont indent the {} */

usr.bin/indent/indent.c

801

ps.want_blank = false;

usr.bin/indent/indent.c

808

ps.want_blank = false;

usr.bin/indent/indent.c

821

sp_sw = false;

usr.bin/indent/indent.c

827

ps.ind_stmt = false; /* dont put extra indentation on line

usr.bin/indent/indent.c

840

ps.decl_on_line = false; /* we can't be in the middle of

usr.bin/indent/indent.c

848

ps.in_decl = false;

usr.bin/indent/indent.c

855

ps.want_blank = false;

usr.bin/indent/indent.c

868

sp_sw = false;

usr.bin/indent/indent.c

880

ps.in_stmt = ps.ind_stmt = false;

usr.bin/indent/indent.c

914

ps.in_stmt = false;

usr.bin/indent/indent.c

920

ps.want_blank = false;

usr.bin/indent/indent.c

931

ps.want_blank = false;

usr.bin/indent/indent.c

983

ps.in_decl = false;

usr.bin/indent/indent.c

991

ps.want_blank = false;

usr.bin/indent/indent.c

998

ps.want_blank = false;

usr.bin/indent/io.c

133

ps.pcase = false;

usr.bin/indent/io.c

209

ps.use_ff = false;

usr.bin/indent/io.c

83

ps.bl_line = false;

usr.bin/indent/lexi.c

172

unary_delim = false;

usr.bin/indent/lexi.c

176

state->last_nl = false;

usr.bin/indent/lexi.c

179

state->col_1 = false; /* leading blanks imply token is not in column

usr.bin/indent/lexi.c

462

unary_delim = false;

usr.bin/indent/lexi.c

478

unary_delim = false;

usr.bin/indent/lexi.c

487

unary_delim = false;

usr.bin/indent/lexi.c

489

state->want_blank = false;

usr.bin/indent/parse.c

110

break_comma = false; /* don't break comma in an initial list */

usr.bin/indent/parse.c

194

break_comma = false; /* turn off flag to break after commas in a

usr.bin/indent/pr_comment.c

100

break_delim = false;

usr.bin/indent/pr_comment.c

113

break_delim = false;

usr.bin/indent/pr_comment.c

128

break_delim = false;

usr.bin/indent/pr_comment.c

178

break_delim = false;

usr.bin/indent/pr_comment.c

311

ps.last_nl = false;

usr.bin/indent/pr_comment.c

90

ps.box_com = false; /* at first, assume that we are not in

usr.bin/msgs/msgs.c

83

#define NO false

usr.bin/patch/inp.c

128

return false;

usr.bin/patch/inp.c

149

return false;

usr.bin/patch/inp.c

153

return false;

usr.bin/patch/inp.c

178

return false;

usr.bin/patch/inp.c

183

out_of_mem = false;

usr.bin/patch/inp.c

184

return false; /* force plan b because plan a bombed */

usr.bin/patch/inp.c

195

return false;

usr.bin/patch/inp.c

211

return false;

usr.bin/patch/inp.c

224

return false;

usr.bin/patch/inp.c

241

return false;

usr.bin/patch/inp.c

250

last_line_missing_eol = false;

usr.bin/patch/inp.c

291

using_plan_a = false;

usr.bin/patch/inp.c

386

warn_on_invalid_line = false;

usr.bin/patch/inp.c

435

return false;

usr.bin/patch/patch.c

1087

return false;

usr.bin/patch/patch.c

1091

return false;

usr.bin/patch/patch.c

1096

return false;

usr.bin/patch/patch.c

1098

return false;

usr.bin/patch/patch.c

110

static bool remove_empty_files = false;

usr.bin/patch/patch.c

1108

return false;

usr.bin/patch/patch.c

1111

return false;

usr.bin/patch/patch.c

1127

return false;

usr.bin/patch/patch.c

113

static bool reverse_flag_specified = false;

usr.bin/patch/patch.c

1135

return false;

usr.bin/patch/patch.c

1148

reverse_seen = false;

usr.bin/patch/patch.c

115

static bool Vflag = false;

usr.bin/patch/patch.c

1168

return (false);

usr.bin/patch/patch.c

1174

return (false);

usr.bin/patch/patch.c

136

static bool do_defines = false;

usr.bin/patch/patch.c

221

patch_seen = false;

usr.bin/patch/patch.c

231

out_creating = false;

usr.bin/patch/patch.c

276

reverse_seen = false;

usr.bin/patch/patch.c

277

out_of_mem = false;

usr.bin/patch/patch.c

278

remove_file = false;

usr.bin/patch/patch.c

512

skip_rest_of_patch = false;

usr.bin/patch/patch.c

56

bool out_of_mem = false; /* ran out of memory in plan a */

usr.bin/patch/patch.c

57

bool nonempty_patchf_seen = false; /* seen nonempty patch file? */

usr.bin/patch/patch.c

62

bool ok_to_create_file = false;

usr.bin/patch/patch.c

643

verbose = false;

usr.bin/patch/patch.c

69

bool toutkeep = false;

usr.bin/patch/patch.c

70

bool trejkeep = false;

usr.bin/patch/patch.c

78

bool force = false;

usr.bin/patch/patch.c

79

bool batch = false;

usr.bin/patch/patch.c

81

bool reverse = false;

usr.bin/patch/patch.c

82

bool noreverse = false;

usr.bin/patch/patch.c

83

bool skip_rest_of_patch = false;

usr.bin/patch/patch.c

85

bool canonicalize = false;

usr.bin/patch/patch.c

86

bool check_only = false;

usr.bin/patch/patch.c

905

copy_till(where + old - 1, false);

usr.bin/patch/patch.c

921

copy_till(where + old - 1, false);

usr.bin/patch/patch.c

943

copy_till(where + old - 1, false);

usr.bin/patch/patch.c

975

copy_till(where + old - 1, false);

usr.bin/patch/pch.c

1032

return false;

usr.bin/patch/pch.c

1080

return false;

usr.bin/patch/pch.c

1117

return false;

usr.bin/patch/pch.c

1132

return false;

usr.bin/patch/pch.c

1156

return false;

usr.bin/patch/pch.c

1176

return false;

usr.bin/patch/pch.c

1264

bool blankline = false;

usr.bin/patch/pch.c

1288

return false; /* not enough memory to swap hunk! */

usr.bin/patch/pch.c

177

bool exists = false;

usr.bin/patch/pch.c

182

return false;

usr.bin/patch/pch.c

185

return false;

usr.bin/patch/pch.c

196

return false;

usr.bin/patch/pch.c

272

bool last_line_was_command = false, this_is_a_command = false;

usr.bin/patch/pch.c

273

bool stars_last_line = false, stars_this_line = false;

usr.bin/patch/pch.c

280

ok_to_create_file = false;

usr.bin/patch/pch.c

290

if (pgets(false) == 0) {

usr.bin/patch/pch.c

491

len = pgets(false);

usr.bin/patch/pch.c

530

return false;

usr.bin/patch/pch.c

570

ptrn_spaces_eaten = false;

usr.bin/patch/pch.c

572

repl_missing = false;

usr.bin/patch/pch.c

581

return false;

usr.bin/patch/pch.c

630

return false;

usr.bin/patch/pch.c

703

return false;

usr.bin/patch/pch.c

737

repl_could_be_missing = false;

usr.bin/patch/pch.c

743

repl_could_be_missing = false;

usr.bin/patch/pch.c

761

return false;

usr.bin/patch/pch.c

783

return false;

usr.bin/patch/pch.c

805

return false;

usr.bin/patch/pch.c

916

return false;

usr.bin/patch/pch.c

956

return false;

usr.bin/patch/pch.c

964

return false;

usr.bin/patch/pch.c

993

return false;

usr.bin/sdiff/sdiff.c

605

sflag = false;

usr.bin/sed/compile.c

400

return (false);

usr.bin/sed/compile.c

409

return (false);

usr.bin/sort/bwstring.c

897

*empty = false;

usr.bin/sort/coll.c

1135

key1_read = key2_read = false;

usr.bin/sort/coll.c

1289

key1_read = key2_read = false;

usr.bin/sort/coll.c

324

empty_field = false;

usr.bin/sort/coll.c

325

empty_key = false;

usr.bin/sort/coll.c

371

empty_field = false;

usr.bin/sort/coll.c

372

empty_key = false;

usr.bin/sort/coll.c

819

key1_read = key2_read = false;

usr.bin/sort/coll.c

839

kv1->hint->v.nh.neg = (sign1 < 0) ? true : false;

usr.bin/sort/coll.c

852

kv2->hint->v.nh.neg = (sign2 < 0) ? true : false;

usr.bin/sort/coll.c

960

return (numcoll_impl(kv1, kv2, offset, false));

usr.bin/sort/file.c

1176

file_list_add(&new_fl, fnew, false);

usr.bin/sort/file.c

1179

fl->tmp = false; /* already taken care of */

usr.bin/sort/file.c

173

bool ret = false;

usr.bin/sort/file.c

282

fl->tmp = false;

usr.bin/sort/file.c

857

file_list_add(fl, fn, false);

usr.bin/sort/sort.c

1052

{ false, false, false, false, false, false };

usr.bin/sort/sort.c

1238

usage(false);

usr.bin/sort/sort.c

1368

file_list_add(&fl, flast, false);

usr.bin/sort/sort.c

1387

file_list_init(&fl, false);

usr.bin/sort/sort.c

545

found_others = found_this = false;

usr.bin/sort/sort.c

634

return false;

usr.bin/sort/sort.c

762

{ false, false, false, false, false, false };

usr.bin/sort/sort.c

781

ret = parse_pos(pos1, ks, mef_flags, false);

usr.bin/sort/sort.c

791

ret = parse_pos(s, ks, mef_flags, false);

usr.bin/sort/vsort.c

73

sfx = false;

usr.bin/sort/vsort.c

74

expect_alpha = false;

usr.bin/sort/vsort.c

80

expect_alpha = false;

usr.bin/sort/vsort.c

82

sfx = false;

usr.bin/sort/vsort.c

90

sfx = false;

usr.bin/strfile/strfile.c

100

static int Iflag = false; /* ignore case flag */

usr.bin/strfile/strfile.c

101

static int Rflag = false; /* randomize order flag */

usr.bin/strfile/strfile.c

102

static int Xflag = false; /* set rotated bit */

usr.bin/strfile/strfile.c

195

first = false;

usr.bin/strfile/strfile.c

389

n1 = false;

usr.bin/strfile/strfile.c

390

n2 = false;

usr.bin/strfile/strfile.c

97

static int Cflag = false; /* embedded comments */

usr.bin/strfile/strfile.c

98

static int Sflag = false; /* silent run flag */

usr.bin/strfile/strfile.c

99

static int Oflag = false; /* ordering flag */

usr.bin/timeout/timeout.c

280

bool foreground = false;

usr.bin/timeout/timeout.c

281

bool preserve = false;

usr.bin/timeout/timeout.c

282

bool timedout = false;

usr.bin/timeout/timeout.c

283

bool do_second_kill = false;

usr.bin/timeout/timeout.c

284

bool child_done = false;

usr.bin/timeout/timeout.c

445

do_second_kill = false;

usr.bin/timeout/timeout.c

57

static bool verbose = false;

usr.bin/tr/cmap.c

159

cm->cm_havecache = false;

usr.bin/tr/cmap.c

57

cm->cm_havecache = false;

usr.bin/tr/cmap.c

71

cm->cm_havecache = false;

usr.bin/tr/cmap.c

76

return (false);

usr.bin/tr/cmap.c

94

return (false);

usr.bin/tr/cset.c

105

return (false);

usr.bin/tr/cset.c

161

return (cs->cs_invert ^ false);

usr.bin/tr/cset.c

188

cs->cs_havecache = false;

usr.bin/tr/cset.c

203

return (false);

usr.bin/tr/cset.c

208

cs->cs_havecache = false;

usr.bin/tr/cset.c

58

cs->cs_havecache = false;

usr.bin/tr/cset.c

59

cs->cs_invert = false;

usr.bin/tr/cset.c

73

cs->cs_havecache = false;

usr.bin/tr/cset.c

81

return (false);

usr.bin/unifdef/unifdef.c

1014

constexpr = false;

usr.bin/unifdef/unifdef.c

1031

constexpr = false;

usr.bin/unifdef/unifdef.c

1091

constexpr = killconsts ? false : true;

usr.bin/unifdef/unifdef.c

111

NO_COMMENT = false, /* outside a comment */

usr.bin/unifdef/unifdef.c

1345

firstsym = zerosyms = false;

usr.bin/unifdef/unifdef.c

1473

return (false);

usr.bin/unifdef/unifdef.c

1496

addsym2(false, sym, val);

usr.bin/unifdef/unifdef.c

1503

addsym2(false, sym, NULL);

usr.bin/unifdef/unifdef.c

270

addsym1(true, false, optarg);

usr.bin/unifdef/unifdef.c

275

addsym1(false, true, optarg);

usr.bin/unifdef/unifdef.c

278

addsym1(false, false, optarg);

usr.bin/unifdef/unifdef.c

546

static void drop (void) { flushline(false); }

usr.bin/unifdef/unifdef.c

760

altered = false;

usr.bin/unifdef/unifdef.c

998

defparen = false;

usr.bin/units/units.c

705

quiet = false;

usr.bin/units/units.c

706

readfile = false;

usr.bin/units/units.c

74

static bool verbose = false;

usr.bin/xargs/strnsubst.c

37

bool error = false;

usr.bin/xargs/strnsubst.c

41

return false;

usr.sbin/autofs/automount.c

167

unmount_by_statfs(&(mntbuf[i]), false);

usr.sbin/autofs/automount.c

264

bool do_unmount = false, force_unmount = false, flush = false;

usr.sbin/autofs/automountd.c

102

first = false;

usr.sbin/autofs/automountd.c

118

bool wildcard_found = false;

usr.sbin/autofs/automountd.c

276

create_subtree(node, false);

usr.sbin/autofs/automountd.c

429

bool dont_daemonize = false, incomplete_hierarchy = false;

usr.sbin/autofs/automountd.c

494

if (dont_daemonize == false) {

usr.sbin/autofs/automountd.c

515

nchildren -= wait_for_children(false);

usr.sbin/autofs/automountd.c

527

nchildren -= wait_for_children(false);

usr.sbin/autofs/automountd.c

99

if (first == false)

usr.sbin/autofs/autounmountd.c

112

af->af_mark = false;

usr.sbin/autofs/autounmountd.c

271

bool dont_daemonize = false;

usr.sbin/autofs/autounmountd.c

314

if (dont_daemonize == false) {

usr.sbin/autofs/common.c

1008

node_expand_includes(parent, false);

usr.sbin/autofs/common.c

1026

*wildcards = false;

usr.sbin/autofs/common.c

1093

node_expand_includes(parent, false);

usr.sbin/autofs/common.c

326

bool backslashed = false;

usr.sbin/autofs/common.c

334

if (c == '\\' && backslashed == false) {

usr.sbin/autofs/common.c

339

backslashed = false;

usr.sbin/autofs/common.c

342

backslashed = false;

usr.sbin/autofs/common.c

368

backslashed = false;

usr.sbin/autofs/common.c

457

return (false);

usr.sbin/autofs/common.c

484

return (false);

usr.sbin/autofs/common.c

497

if (indirect == false)

usr.sbin/autofs/common.c

523

node_expand_maps(n, false);

usr.sbin/autofs/common.c

935

return (false);

usr.sbin/autofs/common.c

970

node_expand_includes(parent, false);

usr.sbin/autofs/defined.c

187

backslashed = bracketed = false;

usr.sbin/autofs/defined.c

71

bool backslashed = false, bracketed = false;

usr.sbin/autofs/defined.c

77

if (c == '\\' && backslashed == false) {

usr.sbin/autofs/defined.c

82

backslashed = false;

usr.sbin/autofs/defined.c

85

backslashed = false;

usr.sbin/efibootmgr/efibootmgr.c

1098

set_boot_to_fw_ui(false);

usr.sbin/efibootmgr/efibootmgr.c

822

return false;

usr.sbin/efibootmgr/efibootmgr.c

847

return false;

usr.sbin/fstyp/exfat.c

291

bool eod = false;

usr.sbin/fstyp/fstyp.c

179

bool ignore_type = false, show_unmountable = false;

usr.sbin/fstyp/fstyp.c

234

if (ignore_type == false)

usr.sbin/fstyp/fstyp.c

240

if (show_unmountable == false && fstypes[i].unmountable == true)

usr.sbin/fstyp/fstyp.c

254

if (show_unmountable == false && fsvtypes[i].unmountable == true)

usr.sbin/fstyp/fstyp.c

52

bool show_label = false;

usr.sbin/fstyp/fstyp.c

64

{ "befs", &fstyp_befs, false, NULL },

usr.sbin/fstyp/fstyp.c

65

{ "cd9660", &fstyp_cd9660, false, NULL },

usr.sbin/fstyp/fstyp.c

66

{ "exfat", &fstyp_exfat, false, EXFAT_ENC },

usr.sbin/fstyp/fstyp.c

67

{ "ext2fs", &fstyp_ext2fs, false, NULL },

usr.sbin/fstyp/fstyp.c

68

{ "hfs+", &fstyp_hfsp, false, NULL },

usr.sbin/fstyp/fstyp.c

69

{ "msdosfs", &fstyp_msdosfs, false, NULL },

usr.sbin/fstyp/fstyp.c

70

{ "ntfs", &fstyp_ntfs, false, NTFS_ENC },

usr.sbin/fstyp/fstyp.c

71

{ "ufs", &fstyp_ufs, false, NULL },

usr.sbin/fstyp/fstyp.c

72

{ "hammer", &fstyp_hammer, false, NULL },

usr.sbin/fstyp/fstyp.c

73

{ "hammer2", &fstyp_hammer2, false, NULL },

usr.sbin/fstyp/fstyp.c

83

{ "hammer", &fsvtyp_hammer, false, NULL }, /* Must be before partial */

usr.sbin/fstyp/fstyp.c

85

{ "hammer2", &fsvtyp_hammer2, false, NULL }, /* Must be before partial */

usr.sbin/fstyp/hammer2.c

283

bool res = false;

usr.sbin/makefs/ffs.c

208

ffs_opts->min_inodes= false;

usr.sbin/makefs/hammer2.c

1289

prev_was_c = false;

usr.sbin/makefs/hammer2.c

1300

prev_was_c = false;

usr.sbin/makefs/hammer2.c

1307

prev_was_c = false;

usr.sbin/makefs/hammer2.c

1316

prev_was_c = false;

usr.sbin/makefs/hammer2.c

1346

return false;

usr.sbin/makefs/hammer2.c

1350

return false;

usr.sbin/makefs/hammer2.c

2233

bool found = false;

usr.sbin/makefs/hammer2/hammer2_inode.c

1077

hammer2_update_time(&xop->meta.ctime, false);

usr.sbin/makefs/hammer2/hammer2_inode.c

1192

hammer2_update_time(&nip->meta.ctime, false);

usr.sbin/makefs/hammer2/hammer2_inode.c

1586

hammer2_update_time(&ctime, false);

usr.sbin/makefs/mtree.c

1005

error = read_mtree_spec1(fp, false, pathspec);

usr.sbin/makefs/mtree.c

877

error = read_mtree_spec1(fp, false, ".");

usr.sbin/makefs/mtree.c

928

type = (def == false || IS_DOT(name)) ? S_IFDIR : 0;

usr.sbin/mpsutil/mps_flash.c

125

bool bios = false;

usr.sbin/mpsutil/mps_flash.c

52

bool bios = false;

usr.sbin/mtree/only.c

77

return false;

usr.sbin/nvmmctl/nvmmctl.c

54

{ "identify", false, false, nvmm_identify },

usr.sbin/nvmmctl/nvmmctl.c

55

{ "list", false, false, nvmm_list },

usr.sbin/nvmmctl/nvmmctl.c

56

{ NULL, false, false, NULL },

usr.sbin/pw/pw_group.c

324

matchFound = false;

usr.sbin/sshlockout/sshlockout.c

194

return false;

usr.sbin/sshlockout/sshlockout.c

197

return false;

usr.sbin/sshlockout/sshlockout.c

199

return false;

usr.sbin/sshlockout/sshlockout.c

213

return false;

usr.sbin/sshlockout/sshlockout.c

217

return false;

usr.sbin/sshlockout/sshlockout.c

225

return false;

usr.sbin/tcpdrop/tcpdrop.c

198

return (false);

usr.sbin/tcpdrop/tcpdrop.c

240

ok = false;

usr.sbin/tcpdrop/tcpdrop.c

275

infamily = false;

usr.sbin/tcpdrop/tcpdrop.c

286

ok = false;

usr.sbin/tcpdrop/tcpdrop.c

293

ok = false;

usr.sbin/tcpdrop/tcpdrop.c

51

static bool tcpdrop_list_commands = false;

usr.sbin/tcpdrop/tcpdrop.c

73

dropall = false;

usr.sbin/uefisign/uefisign.c

338

bool Vflag = false, vflag = false;