bin/chio/chio.c
523
int i, count, base, chet, schet, echet;
bin/chio/chio.c
534
base = 0;
bin/chio/chio.c
600
base = atol(argv[1]);
bin/chio/chio.c
604
count = atol(argv[2]) - base + 1;
bin/chio/chio.c
606
if (base < 0 || count < 0)
bin/chio/chio.c
661
cesr.cesr_element_base = base;
bin/cp/cp.c
263
int base = 0, dne, badcp, rval;
bin/cp/cp.c
321
base = (p == NULL) ? 0 :
bin/cp/cp.c
324
if (!strcmp(&curr->fts_path[base],
bin/cp/cp.c
326
base += 1;
bin/cp/cp.c
328
base = curr->fts_pathlen;
bin/cp/cp.c
331
p = &curr->fts_path[base];
bin/cp/cp.c
332
nlen = curr->fts_pathlen - base;
bin/ls/print.c
222
int base;
bin/ls/print.c
282
base = 0;
bin/ls/print.c
287
base = row;
bin/ls/print.c
289
chcnt += printaname(array[base], dp->s_inode,
bin/ls/print.c
292
base++;
bin/ls/print.c
294
base += numrows;
bin/ls/print.c
295
if (base >= num)
bin/pax/gen_subs.c
207
asc_ul(char *str, int len, int base)
bin/pax/gen_subs.c
224
if (base == HEX) {
bin/pax/gen_subs.c
250
ul_asc(u_long val, char *str, int len, int base)
bin/pax/gen_subs.c
265
if (base == HEX) {
bin/pax/gen_subs.c
303
asc_uqd(char *str, int len, int base)
bin/pax/gen_subs.c
320
if (base == HEX) {
bin/pax/gen_subs.c
346
uqd_asc(u_quad_t val, char *str, int len, int base)
bin/pax/gen_subs.c
361
if (base == HEX) {
bin/ps/ps.c
644
static int dochain_final(KINFO **kfinal, KINFO *base, int j);
bin/ps/ps.c
724
dochain_final(KINFO **kfinal, KINFO *base, int j)
bin/ps/ps.c
728
kfinal[j++] = base;
bin/ps/ps.c
729
for (scan = base->ki_cbase; scan; scan = scan->ki_cnext) {
bin/ps/ps.c
735
scan->ki_indent = base->ki_indent + 1;
crypto/libressl/crypto/asn1/a_strnid.c
220
static ASN1_STRING_TABLE *OBJ_bsearch_table(ASN1_STRING_TABLE *key, ASN1_STRING_TABLE const *base, int num);
crypto/libressl/crypto/asn1/a_strnid.c
238
OBJ_bsearch_table(ASN1_STRING_TABLE *key, ASN1_STRING_TABLE const *base, int num)
crypto/libressl/crypto/asn1/a_strnid.c
240
return (ASN1_STRING_TABLE *)OBJ_bsearch_(key, base, num, sizeof(ASN1_STRING_TABLE),
crypto/libressl/crypto/asn1/ameth_lib.c
124
static const EVP_PKEY_ASN1_METHOD * *OBJ_bsearch_ameth(const EVP_PKEY_ASN1_METHOD * *key, const EVP_PKEY_ASN1_METHOD * const *base, int num);
crypto/libressl/crypto/asn1/ameth_lib.c
143
OBJ_bsearch_ameth(const EVP_PKEY_ASN1_METHOD * *key, const EVP_PKEY_ASN1_METHOD * const *base, int num)
crypto/libressl/crypto/asn1/ameth_lib.c
145
return (const EVP_PKEY_ASN1_METHOD * *)OBJ_bsearch_(key, base, num, sizeof(const EVP_PKEY_ASN1_METHOD *),
crypto/libressl/crypto/bytestring/bs_cbb.c
103
if (newlen > base->cap) {
crypto/libressl/crypto/bytestring/bs_cbb.c
104
size_t newcap = base->cap * 2;
crypto/libressl/crypto/bytestring/bs_cbb.c
107
if (!base->can_resize)
crypto/libressl/crypto/bytestring/bs_cbb.c
110
if (newcap < base->cap || newcap < newlen)
crypto/libressl/crypto/bytestring/bs_cbb.c
113
newbuf = recallocarray(base->buf, base->cap, newcap, 1);
crypto/libressl/crypto/bytestring/bs_cbb.c
117
base->buf = newbuf;
crypto/libressl/crypto/bytestring/bs_cbb.c
118
base->cap = newcap;
crypto/libressl/crypto/bytestring/bs_cbb.c
122
*out = base->buf + base->len;
crypto/libressl/crypto/bytestring/bs_cbb.c
124
base->len = newlen;
crypto/libressl/crypto/bytestring/bs_cbb.c
140
if (!CBB_flush(cbb) || !cbb_buffer_add(cbb->base, &buf, len_len))
crypto/libressl/crypto/bytestring/bs_cbb.c
159
if (cbb->base->can_resize && (out_data == NULL || out_len == NULL))
crypto/libressl/crypto/bytestring/bs_cbb.c
170
*out_data = cbb->base->buf;
crypto/libressl/crypto/bytestring/bs_cbb.c
173
*out_len = cbb->base->len;
crypto/libressl/crypto/bytestring/bs_cbb.c
175
cbb->base->buf = NULL;
crypto/libressl/crypto/bytestring/bs_cbb.c
190
if (cbb->base == NULL)
crypto/libressl/crypto/bytestring/bs_cbb.c
199
cbb->base->len < child_start)
crypto/libressl/crypto/bytestring/bs_cbb.c
202
len = cbb->base->len - child_start;
crypto/libressl/crypto/bytestring/bs_cbb.c
249
if (!cbb_buffer_add(cbb->base, NULL, extra_bytes))
crypto/libressl/crypto/bytestring/bs_cbb.c
252
memmove(cbb->base->buf + child_start + extra_bytes,
crypto/libressl/crypto/bytestring/bs_cbb.c
253
cbb->base->buf + child_start, len);
crypto/libressl/crypto/bytestring/bs_cbb.c
255
cbb->base->buf[cbb->offset++] = initial_length_byte;
crypto/libressl/crypto/bytestring/bs_cbb.c
260
cbb->base->buf[cbb->offset + i] = len;
crypto/libressl/crypto/bytestring/bs_cbb.c
266
cbb->child->base = NULL;
crypto/libressl/crypto/bytestring/bs_cbb.c
28
struct cbb_buffer_st *base;
crypto/libressl/crypto/bytestring/bs_cbb.c
281
cbb->base->len = cbb->offset;
crypto/libressl/crypto/bytestring/bs_cbb.c
283
cbb->child->base = NULL;
crypto/libressl/crypto/bytestring/bs_cbb.c
298
cbb->offset = cbb->base->len;
crypto/libressl/crypto/bytestring/bs_cbb.c
299
if (!cbb_buffer_add(cbb->base, &prefix_bytes, len_len))
crypto/libressl/crypto/bytestring/bs_cbb.c
30
if ((base = calloc(1, sizeof(struct cbb_buffer_st))) == NULL)
crypto/libressl/crypto/bytestring/bs_cbb.c
304
out_contents->base = cbb->base;
crypto/libressl/crypto/bytestring/bs_cbb.c
33
base->buf = buf;
crypto/libressl/crypto/bytestring/bs_cbb.c
34
base->len = 0;
crypto/libressl/crypto/bytestring/bs_cbb.c
348
cbb->offset = cbb->base->len;
crypto/libressl/crypto/bytestring/bs_cbb.c
35
base->cap = cap;
crypto/libressl/crypto/bytestring/bs_cbb.c
353
out_contents->base = cbb->base;
crypto/libressl/crypto/bytestring/bs_cbb.c
36
base->can_resize = 1;
crypto/libressl/crypto/bytestring/bs_cbb.c
366
if (!CBB_flush(cbb) || !cbb_buffer_add(cbb->base, &dest, len))
crypto/libressl/crypto/bytestring/bs_cbb.c
376
if (!CBB_flush(cbb) || !cbb_buffer_add(cbb->base, out_data, len))
crypto/libressl/crypto/bytestring/bs_cbb.c
38
cbb->base = base;
crypto/libressl/crypto/bytestring/bs_cbb.c
73
cbb->base->can_resize = 0;
crypto/libressl/crypto/bytestring/bs_cbb.c
81
if (cbb->base) {
crypto/libressl/crypto/bytestring/bs_cbb.c
82
if (cbb->base->can_resize)
crypto/libressl/crypto/bytestring/bs_cbb.c
83
freezero(cbb->base->buf, cbb->base->cap);
crypto/libressl/crypto/bytestring/bs_cbb.c
84
free(cbb->base);
crypto/libressl/crypto/bytestring/bs_cbb.c
86
cbb->base = NULL;
crypto/libressl/crypto/bytestring/bs_cbb.c
91
cbb_buffer_add(struct cbb_buffer_st *base, uint8_t **out, size_t len)
crypto/libressl/crypto/bytestring/bs_cbb.c
95
if (base == NULL)
crypto/libressl/crypto/bytestring/bs_cbb.c
98
newlen = base->len + len;
crypto/libressl/crypto/bytestring/bs_cbb.c
99
if (newlen < base->len)
crypto/libressl/crypto/bytestring/bytestring.h
371
struct cbb_buffer_st *base;
crypto/libressl/crypto/ec/ec_asn1.c
1192
if (!params->order || !params->base || !params->base->data) {
crypto/libressl/crypto/ec/ec_asn1.c
1201
(params->base->data[0] & ~0x01));
crypto/libressl/crypto/ec/ec_asn1.c
1204
if (!EC_POINT_oct2point(ret, point, params->base->data,
crypto/libressl/crypto/ec/ec_asn1.c
1205
params->base->length, NULL)) {
crypto/libressl/crypto/ec/ec_asn1.c
181
ASN1_OCTET_STRING *base;
crypto/libressl/crypto/ec/ec_asn1.c
483
.offset = offsetof(ECPARAMETERS, base),
crypto/libressl/crypto/ec/ec_asn1.c
952
if (ret->base == NULL && (ret->base = ASN1_OCTET_STRING_new()) == NULL) {
crypto/libressl/crypto/ec/ec_asn1.c
956
if (!ASN1_OCTET_STRING_set(ret->base, buffer, len)) {
crypto/libressl/crypto/ec/ec_mult.c
728
EC_POINT *tmp_point = NULL, *base = NULL, **var;
crypto/libressl/crypto/ec/ec_mult.c
800
if (!(tmp_point = EC_POINT_new(group)) || !(base = EC_POINT_new(group))) {
crypto/libressl/crypto/ec/ec_mult.c
804
if (!EC_POINT_copy(base, generator))
crypto/libressl/crypto/ec/ec_mult.c
811
if (!EC_POINT_dbl(group, tmp_point, base, ctx))
crypto/libressl/crypto/ec/ec_mult.c
814
if (!EC_POINT_copy(*var++, base))
crypto/libressl/crypto/ec/ec_mult.c
834
if (!EC_POINT_dbl(group, base, tmp_point, ctx))
crypto/libressl/crypto/ec/ec_mult.c
837
if (!EC_POINT_dbl(group, base, base, ctx))
crypto/libressl/crypto/ec/ec_mult.c
873
EC_POINT_free(base);
crypto/libressl/crypto/evp/evp_pbe.c
176
static EVP_PBE_CTL *OBJ_bsearch_pbe2(EVP_PBE_CTL *key, EVP_PBE_CTL const *base, int num);
crypto/libressl/crypto/evp/evp_pbe.c
199
OBJ_bsearch_pbe2(EVP_PBE_CTL *key, EVP_PBE_CTL const *base, int num)
crypto/libressl/crypto/evp/evp_pbe.c
201
return (EVP_PBE_CTL *)OBJ_bsearch_(key, base, num, sizeof(EVP_PBE_CTL),
crypto/libressl/crypto/evp/pmeth_lib.c
116
static const EVP_PKEY_METHOD * *OBJ_bsearch_pmeth(const EVP_PKEY_METHOD * *key, const EVP_PKEY_METHOD * const *base, int num);
crypto/libressl/crypto/evp/pmeth_lib.c
134
OBJ_bsearch_pmeth(const EVP_PKEY_METHOD * *key, const EVP_PKEY_METHOD * const *base, int num)
crypto/libressl/crypto/evp/pmeth_lib.c
136
return (const EVP_PKEY_METHOD * *)OBJ_bsearch_(key, base, num, sizeof(const EVP_PKEY_METHOD *),
crypto/libressl/crypto/objects/obj_dat.c
116
OBJ_bsearch_sn(const ASN1_OBJECT * *key, unsigned int const *base, int num)
crypto/libressl/crypto/objects/obj_dat.c
118
return (unsigned int *)OBJ_bsearch_(key, base, num, sizeof(unsigned int),
crypto/libressl/crypto/objects/obj_dat.c
137
OBJ_bsearch_ln(const ASN1_OBJECT * *key, unsigned int const *base, int num)
crypto/libressl/crypto/objects/obj_dat.c
139
return (unsigned int *)OBJ_bsearch_(key, base, num, sizeof(unsigned int),
crypto/libressl/crypto/objects/obj_dat.c
449
OBJ_bsearch_obj(const ASN1_OBJECT * *key, unsigned int const *base, int num)
crypto/libressl/crypto/objects/obj_dat.c
451
return (unsigned int *)OBJ_bsearch_(key, base, num, sizeof(unsigned int),
crypto/libressl/crypto/objects/obj_dat.c
565
OBJ_bsearch_(const void *key, const void *base, int num, int size,
crypto/libressl/crypto/objects/obj_dat.c
568
return OBJ_bsearch_ex_(key, base, num, size, cmp, 0);
crypto/libressl/crypto/objects/obj_dat.c
575
const char *base = base_;
crypto/libressl/crypto/objects/obj_dat.c
585
p = &(base[i * size]);
crypto/libressl/crypto/objects/obj_dat.c
597
while (i > 0 && (*cmp)(key, &(base[(i - 1) * size])) == 0)
crypto/libressl/crypto/objects/obj_dat.c
599
p = &(base[i * size]);
crypto/libressl/crypto/objects/obj_dat.c
79
static unsigned int *OBJ_bsearch_sn(const ASN1_OBJECT * *key, unsigned int const *base, int num);
crypto/libressl/crypto/objects/obj_dat.c
82
static unsigned int *OBJ_bsearch_ln(const ASN1_OBJECT * *key, unsigned int const *base, int num);
crypto/libressl/crypto/objects/obj_dat.c
85
static unsigned int *OBJ_bsearch_obj(const ASN1_OBJECT * *key, unsigned int const *base, int num);
crypto/libressl/crypto/objects/obj_xref.c
121
OBJ_bsearch_sigx(const nid_triple * *key, const nid_triple * const *base, int num)
crypto/libressl/crypto/objects/obj_xref.c
123
return (const nid_triple * *)OBJ_bsearch_(key, base, num, sizeof(const nid_triple *),
crypto/libressl/crypto/objects/obj_xref.c
73
static nid_triple *OBJ_bsearch_sig(nid_triple *key, nid_triple const *base, int num);
crypto/libressl/crypto/objects/obj_xref.c
84
OBJ_bsearch_sig(nid_triple *key, nid_triple const *base, int num)
crypto/libressl/crypto/objects/obj_xref.c
86
return (nid_triple *)OBJ_bsearch_(key, base, num, sizeof(nid_triple),
crypto/libressl/crypto/objects/obj_xref.c
98
static const nid_triple * *OBJ_bsearch_sigx(const nid_triple * *key, const nid_triple * const *base, int num);
crypto/libressl/crypto/x509/x509_constraints.c
1044
if (!x509_constraints_validate(subtree->base, &vname, error))
crypto/libressl/crypto/x509/x509_constraints.c
1066
if (!x509_constraints_validate(subtree->base, &vname, error))
crypto/libressl/crypto/x509/x509_lib.c
109
const X509V3_EXT_METHOD *const *base, int num)
crypto/libressl/crypto/x509/x509_lib.c
111
return (const X509V3_EXT_METHOD **)OBJ_bsearch_(key, base, num,
crypto/libressl/crypto/x509/x509_lib.c
97
static const X509V3_EXT_METHOD * *OBJ_bsearch_ext(const X509V3_EXT_METHOD * *key, const X509V3_EXT_METHOD * const *base, int num);
crypto/libressl/crypto/x509/x509_ncons.c
105
.offset = offsetof(GENERAL_SUBTREE, base),
crypto/libressl/crypto/x509/x509_ncons.c
214
if (!v2i_GENERAL_NAME_ex(sub->base, method, ctx, &tval, 1))
crypto/libressl/crypto/x509/x509_ncons.c
257
if (tree->base->type == GEN_IPADD)
crypto/libressl/crypto/x509/x509_ncons.c
258
print_nc_ipadd(bp, tree->base->d.ip);
crypto/libressl/crypto/x509/x509_ncons.c
260
GENERAL_NAME_print(bp, tree->base);
crypto/libressl/crypto/x509/x509_ncons.c
364
if (gen->type != sub->base->type)
crypto/libressl/crypto/x509/x509_ncons.c
373
r = nc_match_single(gen, sub->base);
crypto/libressl/crypto/x509/x509_ncons.c
387
if (gen->type != sub->base->type)
crypto/libressl/crypto/x509/x509_ncons.c
392
r = nc_match_single(gen, sub->base);
crypto/libressl/crypto/x509/x509_ncons.c
404
nc_match_single(GENERAL_NAME *gen, GENERAL_NAME *base)
crypto/libressl/crypto/x509/x509_ncons.c
406
switch (base->type) {
crypto/libressl/crypto/x509/x509_ncons.c
408
return nc_dn(gen->d.directoryName, base->d.directoryName);
crypto/libressl/crypto/x509/x509_ncons.c
411
return nc_dns(gen->d.dNSName, base->d.dNSName);
crypto/libressl/crypto/x509/x509_ncons.c
414
return nc_email(gen->d.rfc822Name, base->d.rfc822Name);
crypto/libressl/crypto/x509/x509_ncons.c
418
base->d.uniformResourceIdentifier);
crypto/libressl/crypto/x509/x509_ncons.c
431
nc_dn(X509_NAME *nm, X509_NAME *base)
crypto/libressl/crypto/x509/x509_ncons.c
436
if (base->modified && i2d_X509_NAME(base, NULL) < 0)
crypto/libressl/crypto/x509/x509_ncons.c
438
if (base->canon_enclen > nm->canon_enclen)
crypto/libressl/crypto/x509/x509_ncons.c
440
if (memcmp(base->canon_enc, nm->canon_enc, base->canon_enclen))
crypto/libressl/crypto/x509/x509_ncons.c
446
nc_dns(ASN1_IA5STRING *dns, ASN1_IA5STRING *base)
crypto/libressl/crypto/x509/x509_ncons.c
448
char *baseptr = (char *)base->data;
crypto/libressl/crypto/x509/x509_ncons.c
458
if (dns->length > base->length) {
crypto/libressl/crypto/x509/x509_ncons.c
459
dnsptr += dns->length - base->length;
crypto/libressl/crypto/x509/x509_ncons.c
471
nc_email(ASN1_IA5STRING *eml, ASN1_IA5STRING *base)
crypto/libressl/crypto/x509/x509_ncons.c
473
const char *baseptr = (char *)base->data;
crypto/libressl/crypto/x509/x509_ncons.c
482
if (eml->length > base->length) {
crypto/libressl/crypto/x509/x509_ncons.c
483
emlptr += eml->length - base->length;
crypto/libressl/crypto/x509/x509_ncons.c
512
nc_uri(ASN1_IA5STRING *uri, ASN1_IA5STRING *base)
crypto/libressl/crypto/x509/x509_ncons.c
514
const char *baseptr = (char *)base->data;
crypto/libressl/crypto/x509/x509_ncons.c
543
if (hostlen > base->length) {
crypto/libressl/crypto/x509/x509_ncons.c
544
p = hostptr + hostlen - base->length;
crypto/libressl/crypto/x509/x509_ncons.c
545
if (!strncasecmp(p, baseptr, base->length))
crypto/libressl/crypto/x509/x509_ncons.c
551
if ((base->length != (int)hostlen) ||
crypto/libressl/crypto/x509/x509_ncons.c
82
static int nc_uri(ASN1_IA5STRING *uri, ASN1_IA5STRING *base);
crypto/libressl/crypto/x509/x509_purp.c
337
static int *OBJ_bsearch_nid(int *key, int const *base, int num);
crypto/libressl/crypto/x509/x509_purp.c
348
OBJ_bsearch_nid(int *key, int const *base, int num)
crypto/libressl/crypto/x509/x509_purp.c
350
return (int *)OBJ_bsearch_(key, base, num, sizeof(int),
crypto/libressl/crypto/x509/x509_vfy.c
1242
check_delta_base(X509_CRL *delta, X509_CRL *base)
crypto/libressl/crypto/x509/x509_vfy.c
1248
if (!base->crl_number)
crypto/libressl/crypto/x509/x509_vfy.c
1251
if (X509_NAME_cmp(X509_CRL_get_issuer(base),
crypto/libressl/crypto/x509/x509_vfy.c
1255
if (!crl_extension_match(delta, base, NID_authority_key_identifier))
crypto/libressl/crypto/x509/x509_vfy.c
1257
if (!crl_extension_match(delta, base, NID_issuing_distribution_point))
crypto/libressl/crypto/x509/x509_vfy.c
1260
if (ASN1_INTEGER_cmp(delta->base_crl_number, base->crl_number) > 0)
crypto/libressl/crypto/x509/x509_vfy.c
1263
if (ASN1_INTEGER_cmp(delta->crl_number, base->crl_number) > 0)
crypto/libressl/crypto/x509/x509_vfy.c
1273
get_delta_sk(X509_STORE_CTX *ctx, X509_CRL **dcrl, int *pscore, X509_CRL *base,
crypto/libressl/crypto/x509/x509_vfy.c
1281
if (!((ctx->current_cert->ex_flags | base->flags) & EXFLAG_FRESHEST))
crypto/libressl/crypto/x509/x509_vfy.c
1285
if (check_delta_base(delta, base)) {
crypto/libressl/crypto/x509/x509_vfy.c
134
X509_CRL *base, STACK_OF(X509_CRL) *crls);
crypto/libressl/include/openssl/objects.h
1015
const void * OBJ_bsearch_(const void *key, const void *base, int num,
crypto/libressl/include/openssl/objects.h
1017
const void * OBJ_bsearch_ex_(const void *key, const void *base, int num,
crypto/libressl/include/openssl/x509v3.h
320
GENERAL_NAME *base;
crypto/libressl/ssl/bs_cbb.c
103
if (newlen > base->cap) {
crypto/libressl/ssl/bs_cbb.c
104
size_t newcap = base->cap * 2;
crypto/libressl/ssl/bs_cbb.c
107
if (!base->can_resize)
crypto/libressl/ssl/bs_cbb.c
110
if (newcap < base->cap || newcap < newlen)
crypto/libressl/ssl/bs_cbb.c
113
newbuf = recallocarray(base->buf, base->cap, newcap, 1);
crypto/libressl/ssl/bs_cbb.c
117
base->buf = newbuf;
crypto/libressl/ssl/bs_cbb.c
118
base->cap = newcap;
crypto/libressl/ssl/bs_cbb.c
122
*out = base->buf + base->len;
crypto/libressl/ssl/bs_cbb.c
124
base->len = newlen;
crypto/libressl/ssl/bs_cbb.c
140
if (!CBB_flush(cbb) || !cbb_buffer_add(cbb->base, &buf, len_len))
crypto/libressl/ssl/bs_cbb.c
159
if (cbb->base->can_resize && (out_data == NULL || out_len == NULL))
crypto/libressl/ssl/bs_cbb.c
170
*out_data = cbb->base->buf;
crypto/libressl/ssl/bs_cbb.c
173
*out_len = cbb->base->len;
crypto/libressl/ssl/bs_cbb.c
175
cbb->base->buf = NULL;
crypto/libressl/ssl/bs_cbb.c
190
if (cbb->base == NULL)
crypto/libressl/ssl/bs_cbb.c
199
cbb->base->len < child_start)
crypto/libressl/ssl/bs_cbb.c
202
len = cbb->base->len - child_start;
crypto/libressl/ssl/bs_cbb.c
249
if (!cbb_buffer_add(cbb->base, NULL, extra_bytes))
crypto/libressl/ssl/bs_cbb.c
252
memmove(cbb->base->buf + child_start + extra_bytes,
crypto/libressl/ssl/bs_cbb.c
253
cbb->base->buf + child_start, len);
crypto/libressl/ssl/bs_cbb.c
255
cbb->base->buf[cbb->offset++] = initial_length_byte;
crypto/libressl/ssl/bs_cbb.c
260
cbb->base->buf[cbb->offset + i] = len;
crypto/libressl/ssl/bs_cbb.c
266
cbb->child->base = NULL;
crypto/libressl/ssl/bs_cbb.c
28
struct cbb_buffer_st *base;
crypto/libressl/ssl/bs_cbb.c
281
cbb->base->len = cbb->offset;
crypto/libressl/ssl/bs_cbb.c
283
cbb->child->base = NULL;
crypto/libressl/ssl/bs_cbb.c
298
cbb->offset = cbb->base->len;
crypto/libressl/ssl/bs_cbb.c
299
if (!cbb_buffer_add(cbb->base, &prefix_bytes, len_len))
crypto/libressl/ssl/bs_cbb.c
30
if ((base = calloc(1, sizeof(struct cbb_buffer_st))) == NULL)
crypto/libressl/ssl/bs_cbb.c
304
out_contents->base = cbb->base;
crypto/libressl/ssl/bs_cbb.c
33
base->buf = buf;
crypto/libressl/ssl/bs_cbb.c
34
base->len = 0;
crypto/libressl/ssl/bs_cbb.c
348
cbb->offset = cbb->base->len;
crypto/libressl/ssl/bs_cbb.c
35
base->cap = cap;
crypto/libressl/ssl/bs_cbb.c
353
out_contents->base = cbb->base;
crypto/libressl/ssl/bs_cbb.c
36
base->can_resize = 1;
crypto/libressl/ssl/bs_cbb.c
366
if (!CBB_flush(cbb) || !cbb_buffer_add(cbb->base, &dest, len))
crypto/libressl/ssl/bs_cbb.c
376
if (!CBB_flush(cbb) || !cbb_buffer_add(cbb->base, out_data, len))
crypto/libressl/ssl/bs_cbb.c
38
cbb->base = base;
crypto/libressl/ssl/bs_cbb.c
73
cbb->base->can_resize = 0;
crypto/libressl/ssl/bs_cbb.c
81
if (cbb->base) {
crypto/libressl/ssl/bs_cbb.c
82
if (cbb->base->can_resize)
crypto/libressl/ssl/bs_cbb.c
83
freezero(cbb->base->buf, cbb->base->cap);
crypto/libressl/ssl/bs_cbb.c
84
free(cbb->base);
crypto/libressl/ssl/bs_cbb.c
86
cbb->base = NULL;
crypto/libressl/ssl/bs_cbb.c
91
cbb_buffer_add(struct cbb_buffer_st *base, uint8_t **out, size_t len)
crypto/libressl/ssl/bs_cbb.c
95
if (base == NULL)
crypto/libressl/ssl/bs_cbb.c
98
newlen = base->len + len;
crypto/libressl/ssl/bs_cbb.c
99
if (newlen < base->len)
crypto/libressl/ssl/bytestring.h
371
struct cbb_buffer_st *base;
crypto/libressl/ssl/ssl_lib.c
3496
OBJ_bsearch_ssl_cipher_id(SSL_CIPHER *key, SSL_CIPHER const *base, int num)
crypto/libressl/ssl/ssl_lib.c
3498
return (SSL_CIPHER *)OBJ_bsearch_(key, base, num, sizeof(SSL_CIPHER),
crypto/libressl/ssl/ssl_locl.h
1326
SSL_CIPHER *OBJ_bsearch_ssl_cipher_id(SSL_CIPHER *key, SSL_CIPHER const *base,
crypto/openssh/groupaccess.c
50
ga_init(const char *user, gid_t base)
crypto/openssh/groupaccess.c
65
while (getgrouplist(user, base, groups_bygid, &ngroups) == -1) {
crypto/openssh/sftp.c
1350
int base = 0;
crypto/openssh/sftp.c
1503
base = 8;
crypto/openssh/sftp.c
1513
ll = strtoll(argv[optidx], &cp2, base);
games/atc/input.c
328
char *shell, *base;
games/atc/input.c
337
base = strrchr(shell, '/');
games/atc/input.c
338
if (base == NULL)
games/atc/input.c
339
base = shell;
games/atc/input.c
341
base++;
games/atc/input.c
342
execl(shell, base, NULL);
games/boggle/boggle/mach.c
172
prword(char **base, int indx)
games/boggle/boggle/mach.c
174
printw("%s", base[indx]);
games/boggle/boggle/mach.c
178
prwidth(char **base, int indx)
games/boggle/boggle/mach.c
180
return (strlen(base[indx]));
games/boggle/boggle/prtable.c
125
get_maxlen(char **base, int num, int (*length)(char **, int))
games/boggle/boggle/prtable.c
129
max = (*length)(base, 0);
games/boggle/boggle/prtable.c
131
if ((len = (*length)(base, i)) > max)
games/boggle/boggle/prtable.c
62
prtable(char **base, int num, int d_cols, int width,
games/boggle/boggle/prtable.c
71
maxlen = get_maxlen(base, num, length) + 1;
games/boggle/boggle/prtable.c
87
(*prentry)(base, j);
games/boggle/boggle/prtable.c
88
loc += (*length)(base, j);
games/canfield/canfield/canfield.c
144
int cardsoff, base, cinhand, taloncnt, stockcnt, timesthru;
games/canfield/canfield/canfield.c
641
base++;
games/canfield/canfield/canfield.c
642
printcard(pilemap[base], foundrow, *cp);
games/canfield/canfield/canfield.c
651
transit(cp, &found[base]);
games/canfield/canfield/canfield.c
709
base = 0;
games/factor/factor.c
244
BIGNUM *base, *num, *i, *x;
games/factor/factor.c
246
base = BN_new();
games/factor/factor.c
252
BN_set_word(base, 2);
games/factor/factor.c
255
BN_mod_exp(base, base, i, val, ctx);
games/factor/factor.c
257
BN_copy(x, base);
games/phantasia/main.c
960
ROLL(statptr->c_quickness.base, statptr->c_quickness.interval);
games/phantasia/main.c
962
ROLL(statptr->c_strength.base, statptr->c_strength.interval);
games/phantasia/main.c
964
ROLL(statptr->c_mana.base, statptr->c_mana.interval);
games/phantasia/main.c
967
ROLL(statptr->c_energy.base, statptr->c_energy.interval);
games/phantasia/main.c
969
ROLL(statptr->c_brains.base, statptr->c_brains.interval);
games/phantasia/main.c
971
ROLL(statptr->c_magiclvl.base, statptr->c_magiclvl.interval);
games/phantasia/phantstruct.h
111
double base; /* base for roll */
games/tetris/tetris.c
103
memset(&board[base], 0, B_COLS - 2);
games/tetris/tetris.c
106
while (--base != 0)
games/tetris/tetris.c
107
board[base + B_COLS] = board[base];
games/tetris/tetris.c
93
int i, j, base;
games/tetris/tetris.c
97
base = i * B_COLS + 1;
games/tetris/tetris.c
98
p = &board[base];
games/trek/abandon.c
128
Ship.quadx = Now.base[i].x;
games/trek/abandon.c
129
Ship.quady = Now.base[i].y;
games/trek/events.c
184
ix = Now.base[i].x;
games/trek/events.c
185
iy = Now.base[i].y;
games/trek/help.c
110
Ship.quadx = Now.base[l].x;
games/trek/help.c
111
Ship.quady = Now.base[l].y;
games/trek/help.c
97
dx = Now.base[i].x - Ship.quadx;
games/trek/help.c
98
dy = Now.base[i].y - Ship.quady;
games/trek/kill.c
112
for (b = Now.base; ; b++)
games/trek/kill.c
115
*b = Now.base[Now.bases];
games/trek/setup.c
256
Now.base[i].x = ix;
games/trek/setup.c
257
Now.base[i].y = iy;
games/trek/setup.c
287
printf(" at %d,%d", Now.base[0].x, Now.base[0].y);
games/trek/setup.c
289
printf(", %d,%d", Now.base[i].x, Now.base[i].y);
games/trek/trek.h
320
struct xy base[MAXBASES]; /* locations of starbases */
include/ftw.h
51
int base;
include/time.h
191
int timespec_get(struct timespec *ts, int base);
include/xlocale/_locale.h
51
locale_t duplocale(locale_t base);
include/xlocale/_locale.h
53
locale_t newlocale(int mask, const char *locale, locale_t base);
lib/libalias/alias_db.c
2856
PacketAliasSetFWBase(unsigned int base, unsigned int num) {
lib/libalias/alias_db.c
2858
fireWallBaseNum = base;
lib/libc/citrus/_strtol.h
114
cutlim = (int)(cutoff % base);
lib/libc/citrus/_strtol.h
115
cutoff /= base;
lib/libc/citrus/_strtol.h
118
cutlim -= base;
lib/libc/citrus/_strtol.h
130
if (i >= base)
lib/libc/citrus/_strtol.h
146
acc *= base;
lib/libc/citrus/_strtol.h
161
acc *= base;
lib/libc/citrus/_strtol.h
47
_FUNCNAME(const char *nptr, char **endptr, int base)
lib/libc/citrus/_strtol.h
55
if (base && (base < 2 || base > 36)) {
lib/libc/citrus/_strtol.h
63
panic("%s: invalid base %d", __func__, base);
lib/libc/citrus/_strtol.h
84
if ((base == 0 || base == 16) &&
lib/libc/citrus/_strtol.h
91
base = 16;
lib/libc/citrus/_strtol.h
93
if (base == 0)
lib/libc/citrus/_strtol.h
94
base = (c == '0' ? 8 : 10);
lib/libc/citrus/_strtoul.h
104
if (i >= base)
lib/libc/citrus/_strtoul.h
119
acc *= (__UINT)base;
lib/libc/citrus/_strtoul.h
46
_FUNCNAME(const char *nptr, char **endptr, int base)
lib/libc/citrus/_strtoul.h
54
if (base && (base < 2 || base > 36)) {
lib/libc/citrus/_strtoul.h
59
panic("%s: invalid base %d", __func__, base);
lib/libc/citrus/_strtoul.h
80
if ((base == 0 || base == 16) &&
lib/libc/citrus/_strtoul.h
87
base = 16;
lib/libc/citrus/_strtoul.h
89
if (base == 0)
lib/libc/citrus/_strtoul.h
90
base = (c == '0' ? 8 : 10);
lib/libc/citrus/_strtoul.h
95
cutoff = UINT_MAX / (__UINT)base;
lib/libc/citrus/_strtoul.h
96
cutlim = (int)(UINT_MAX % (__UINT)base);
lib/libc/citrus/citrus_prop.c
112
int base, ch; \
lib/libc/citrus/citrus_prop.c
120
base = 10; \
lib/libc/citrus/citrus_prop.c
122
base -= 2; \
lib/libc/citrus/citrus_prop.c
131
base += 8; \
lib/libc/citrus/citrus_prop.c
137
(ms, &obj->u._func_, base)); \
lib/libc/citrus/citrus_prop.c
147
int base, ch;
lib/libc/citrus/citrus_prop.c
154
base = 16;
lib/libc/citrus/citrus_prop.c
180
base -= 8;
lib/libc/citrus/citrus_prop.c
183
return (_citrus_prop_read_chr_common(ms, result, base));
lib/libc/citrus/citrus_prop.c
80
_type_ * __restrict result, int base) \
lib/libc/citrus/citrus_prop.c
87
cutoff = _max_ / base; \
lib/libc/citrus/citrus_prop.c
88
cutlim = _max_ % base; \
lib/libc/citrus/citrus_prop.c
92
if (p == NULL || (n = (p - xdigit)) >= base) \
lib/libc/citrus/citrus_prop.c
96
acc *= base; \
lib/libc/db/btree/bt_search.c
100
if (base == 0 &&
lib/libc/db/btree/bt_search.c
104
if (base == NEXTINDEX(h) &&
lib/libc/db/btree/bt_search.c
110
t->bt_cur.index = base;
lib/libc/db/btree/bt_search.c
121
idx = base ? base - 1 : base;
lib/libc/db/btree/bt_search.c
64
indx_t base, idx, lim;
lib/libc/db/btree/bt_search.c
75
for (base = 0, lim = NEXTINDEX(h); lim; lim >>= 1) {
lib/libc/db/btree/bt_search.c
76
t->bt_cur.index = idx = base + (lim >> 1);
lib/libc/db/btree/bt_search.c
85
base = idx + 1;
lib/libc/gen/getcap.c
1003
base = 16;
lib/libc/gen/getcap.c
1005
base = 8;
lib/libc/gen/getcap.c
1007
base = 10;
lib/libc/gen/getcap.c
1023
if (digit >= base)
lib/libc/gen/getcap.c
1026
n = n * base + digit;
lib/libc/gen/getcap.c
983
int base, digit;
lib/libc/gen/getdevpath.c
224
dodequote(char *base)
lib/libc/gen/getdevpath.c
226
int len = strlen(base);
lib/libc/gen/getdevpath.c
228
if (len && base[0] == '\"' && base[len-1] == '\"') {
lib/libc/gen/getdevpath.c
229
base[len - 1] = 0;
lib/libc/gen/getdevpath.c
230
++base;
lib/libc/gen/getdevpath.c
232
return(base);
lib/libc/gen/getdevpath.c
49
static char *dodequote(char *base);
lib/libc/gen/nftw.c
95
ftw.base = cur->fts_pathlen - cur->fts_namelen;
lib/libc/gen/nlist.c
241
void *base;
lib/libc/gen/nlist.c
263
base = mmap(NULL, (size_t)shdr_size, PROT_READ, 0, fd,
lib/libc/gen/nlist.c
265
if (base == MAP_FAILED)
lib/libc/gen/nlist.c
267
shdr = (Elf_Shdr *)base;
lib/libc/gen/nlist.c
299
base = mmap(NULL, (size_t)symstrsize, PROT_READ, 0, fd,
lib/libc/gen/nlist.c
301
if (base == MAP_FAILED)
lib/libc/gen/nlist.c
303
strtab = (char *)base;
lib/libc/gen/syslog.c
108
memcpy(h->base, buf, len); /* `write' it. */
lib/libc/gen/syslog.c
109
h->base += len;
lib/libc/gen/syslog.c
161
tbuf_cookie.base = tbuf;
lib/libc/gen/syslog.c
189
fmt_cookie.base = fmt_cpy;
lib/libc/gen/syslog.c
88
char *base; /* start of buffer */
lib/libc/inet/inet_addr.c
105
int base, n;
lib/libc/inet/inet_addr.c
120
val = 0; base = 10; digit = 0;
lib/libc/inet/inet_addr.c
124
base = 16, c = *++cp;
lib/libc/inet/inet_addr.c
126
base = 8;
lib/libc/inet/inet_addr.c
132
if (base == 8 && (c == '8' || c == '9'))
lib/libc/inet/inet_addr.c
134
val = (val * base) + (c - '0');
lib/libc/inet/inet_addr.c
137
} else if (base == 16 && isascii(c) &&
lib/libc/inet/inet_cidr_ntop.c
155
struct { int base, len; } best, cur;
lib/libc/inet/inet_cidr_ntop.c
172
best.base = -1;
lib/libc/inet/inet_cidr_ntop.c
174
cur.base = -1;
lib/libc/inet/inet_cidr_ntop.c
178
if (cur.base == -1)
lib/libc/inet/inet_cidr_ntop.c
179
cur.base = i, cur.len = 1;
lib/libc/inet/inet_cidr_ntop.c
183
if (cur.base != -1) {
lib/libc/inet/inet_cidr_ntop.c
184
if (best.base == -1 || cur.len > best.len)
lib/libc/inet/inet_cidr_ntop.c
186
cur.base = -1;
lib/libc/inet/inet_cidr_ntop.c
190
if (cur.base != -1) {
lib/libc/inet/inet_cidr_ntop.c
191
if (best.base == -1 || cur.len > best.len)
lib/libc/inet/inet_cidr_ntop.c
194
if (best.base != -1 && best.len < 2)
lib/libc/inet/inet_cidr_ntop.c
195
best.base = -1;
lib/libc/inet/inet_cidr_ntop.c
203
if (best.base != -1 && i >= best.base &&
lib/libc/inet/inet_cidr_ntop.c
204
i < (best.base + best.len)) {
lib/libc/inet/inet_cidr_ntop.c
205
if (i == best.base)
lib/libc/inet/inet_cidr_ntop.c
213
if (i == 6 && best.base == 0 && (best.len == 6 ||
lib/libc/inet/inet_cidr_ntop.c
236
if (best.base != -1 && (best.base + best.len) ==
lib/libc/inet/inet_network.c
51
in_addr_t val, base, n;
lib/libc/inet/inet_network.c
56
val = 0; base = 10; digit = 0;
lib/libc/inet/inet_network.c
58
digit = 1, base = 8, cp++;
lib/libc/inet/inet_network.c
60
base = 16, cp++;
lib/libc/inet/inet_network.c
63
if (base == 8U && (c == '8' || c == '9'))
lib/libc/inet/inet_network.c
65
val = (val * base) + (c - '0');
lib/libc/inet/inet_network.c
70
if (base == 16U && isxdigit((unsigned char)c)) {
lib/libc/inet/inet_ntop.c
112
struct { int base, len; } best, cur;
lib/libc/inet/inet_ntop.c
124
best.base = -1;
lib/libc/inet/inet_ntop.c
126
cur.base = -1;
lib/libc/inet/inet_ntop.c
130
if (cur.base == -1)
lib/libc/inet/inet_ntop.c
131
cur.base = i, cur.len = 1;
lib/libc/inet/inet_ntop.c
135
if (cur.base != -1) {
lib/libc/inet/inet_ntop.c
136
if (best.base == -1 || cur.len > best.len)
lib/libc/inet/inet_ntop.c
138
cur.base = -1;
lib/libc/inet/inet_ntop.c
142
if (cur.base != -1) {
lib/libc/inet/inet_ntop.c
143
if (best.base == -1 || cur.len > best.len)
lib/libc/inet/inet_ntop.c
146
if (best.base != -1 && best.len < 2)
lib/libc/inet/inet_ntop.c
147
best.base = -1;
lib/libc/inet/inet_ntop.c
155
if (best.base != -1 && i >= best.base &&
lib/libc/inet/inet_ntop.c
156
i < (best.base + best.len)) {
lib/libc/inet/inet_ntop.c
157
if (i == best.base)
lib/libc/inet/inet_ntop.c
165
if (i == 6 && best.base == 0 && (best.len == 6 ||
lib/libc/inet/inet_ntop.c
178
if (best.base != -1 && (best.base + best.len) ==
lib/libc/locale/nextwctype.c
47
_RuneEntry *base, *re;
lib/libc/locale/nextwctype.c
66
base = rr->__ranges;
lib/libc/locale/nextwctype.c
68
re = base + (lim >> 1);
lib/libc/locale/nextwctype.c
72
base = re + 1;
lib/libc/locale/runetype.c
53
_RuneEntry *base, *re;
lib/libc/locale/runetype.c
59
base = rr->__ranges;
lib/libc/locale/runetype.c
61
re = base + (lim >> 1);
lib/libc/locale/runetype.c
68
base = re + 1;
lib/libc/locale/tolower.c
53
_RuneEntry *base, *re;
lib/libc/locale/tolower.c
59
base = rr->__ranges;
lib/libc/locale/tolower.c
61
re = base + (lim >> 1);
lib/libc/locale/tolower.c
65
base = re + 1;
lib/libc/locale/toupper.c
53
_RuneEntry *base, *re;
lib/libc/locale/toupper.c
59
base = rr->__ranges;
lib/libc/locale/toupper.c
61
re = base + (lim >> 1);
lib/libc/locale/toupper.c
67
base = re + 1;
lib/libc/locale/wcstoimax.c
108
if (c >= base)
lib/libc/locale/wcstoimax.c
114
acc *= base;
lib/libc/locale/wcstoimax.c
132
int base)
lib/libc/locale/wcstoimax.c
134
return wcstoimax_l(nptr, endptr, base, __get_locale());
lib/libc/locale/wcstoimax.c
51
int base, locale_t locale)
lib/libc/locale/wcstoimax.c
75
if ((base == 0 || base == 16) &&
lib/libc/locale/wcstoimax.c
82
base = 16;
lib/libc/locale/wcstoimax.c
84
if (base == 0)
lib/libc/locale/wcstoimax.c
85
base = c == L'0' ? 8 : 10;
lib/libc/locale/wcstoimax.c
87
if (base < 2 || base > 36)
lib/libc/locale/wcstoimax.c
92
cutlim = cutoff % base;
lib/libc/locale/wcstoimax.c
93
cutoff /= base;
lib/libc/locale/wcstol.c
107
if (c >= base)
lib/libc/locale/wcstol.c
113
acc *= base;
lib/libc/locale/wcstol.c
130
wcstol(const wchar_t * __restrict nptr, wchar_t ** __restrict endptr, int base)
lib/libc/locale/wcstol.c
132
return wcstol_l(nptr, endptr, base, __get_locale());
lib/libc/locale/wcstol.c
50
base, locale_t locale)
lib/libc/locale/wcstol.c
74
if ((base == 0 || base == 16) &&
lib/libc/locale/wcstol.c
81
base = 16;
lib/libc/locale/wcstol.c
83
if (base == 0)
lib/libc/locale/wcstol.c
84
base = c == L'0' ? 8 : 10;
lib/libc/locale/wcstol.c
86
if (base < 2 || base > 36)
lib/libc/locale/wcstol.c
91
cutlim = cutoff % base;
lib/libc/locale/wcstol.c
92
cutoff /= base;
lib/libc/locale/wcstoll.c
108
if (c >= base)
lib/libc/locale/wcstoll.c
114
acc *= base;
lib/libc/locale/wcstoll.c
131
wcstoll(const wchar_t * __restrict nptr, wchar_t ** __restrict endptr, int base)
lib/libc/locale/wcstoll.c
133
return wcstoll_l(nptr, endptr, base, __get_locale());
lib/libc/locale/wcstoll.c
51
int base, locale_t locale)
lib/libc/locale/wcstoll.c
75
if ((base == 0 || base == 16) &&
lib/libc/locale/wcstoll.c
82
base = 16;
lib/libc/locale/wcstoll.c
84
if (base == 0)
lib/libc/locale/wcstoll.c
85
base = c == L'0' ? 8 : 10;
lib/libc/locale/wcstoll.c
87
if (base < 2 || base > 36)
lib/libc/locale/wcstoll.c
92
cutlim = cutoff % base;
lib/libc/locale/wcstoll.c
93
cutoff /= base;
lib/libc/locale/wcstoul.c
105
if (c >= base)
lib/libc/locale/wcstoul.c
111
acc *= base;
lib/libc/locale/wcstoul.c
128
wcstoul(const wchar_t * __restrict nptr, wchar_t ** __restrict endptr, int base)
lib/libc/locale/wcstoul.c
130
return wcstoul_l(nptr, endptr, base, __get_locale());
lib/libc/locale/wcstoul.c
50
int base, locale_t locale)
lib/libc/locale/wcstoul.c
74
if ((base == 0 || base == 16) &&
lib/libc/locale/wcstoul.c
81
base = 16;
lib/libc/locale/wcstoul.c
83
if (base == 0)
lib/libc/locale/wcstoul.c
84
base = c == L'0' ? 8 : 10;
lib/libc/locale/wcstoul.c
86
if (base < 2 || base > 36)
lib/libc/locale/wcstoul.c
89
cutoff = ULONG_MAX / base;
lib/libc/locale/wcstoul.c
90
cutlim = ULONG_MAX % base;
lib/libc/locale/wcstoull.c
106
if (c >= base)
lib/libc/locale/wcstoull.c
112
acc *= base;
lib/libc/locale/wcstoull.c
130
int base)
lib/libc/locale/wcstoull.c
132
return wcstoull_l(nptr, endptr, base, __get_locale());
lib/libc/locale/wcstoull.c
51
int base, locale_t locale)
lib/libc/locale/wcstoull.c
75
if ((base == 0 || base == 16) &&
lib/libc/locale/wcstoull.c
82
base = 16;
lib/libc/locale/wcstoull.c
84
if (base == 0)
lib/libc/locale/wcstoull.c
85
base = c == L'0' ? 8 : 10;
lib/libc/locale/wcstoull.c
87
if (base < 2 || base > 36)
lib/libc/locale/wcstoull.c
90
cutoff = ULLONG_MAX / base;
lib/libc/locale/wcstoull.c
91
cutlim = ULLONG_MAX % base;
lib/libc/locale/wcstoumax.c
106
if (c >= base)
lib/libc/locale/wcstoumax.c
112
acc *= base;
lib/libc/locale/wcstoumax.c
130
int base)
lib/libc/locale/wcstoumax.c
132
return wcstoumax_l(nptr, endptr, base, __get_locale());
lib/libc/locale/wcstoumax.c
51
int base, locale_t locale)
lib/libc/locale/wcstoumax.c
75
if ((base == 0 || base == 16) &&
lib/libc/locale/wcstoumax.c
82
base = 16;
lib/libc/locale/wcstoumax.c
84
if (base == 0)
lib/libc/locale/wcstoumax.c
85
base = c == L'0' ? 8 : 10;
lib/libc/locale/wcstoumax.c
87
if (base < 2 || base > 36)
lib/libc/locale/wcstoumax.c
90
cutoff = UINTMAX_MAX / base;
lib/libc/locale/wcstoumax.c
91
cutlim = UINTMAX_MAX % base;
lib/libc/locale/xlocale.c
209
static int dupcomponent(int type, locale_t base, locale_t new)
lib/libc/locale/xlocale.c
213
struct xlocale_component *src = base->components[type];
lib/libc/locale/xlocale.c
215
if (&__xlocale_global_locale == base) {
lib/libc/locale/xlocale.c
221
} else if (base->components[type]) {
lib/libc/locale/xlocale.c
222
new->components[type] = xlocale_retain(base->components[type]);
lib/libc/locale/xlocale.c
238
locale_t newlocale(int mask, const char *locale, locale_t base)
lib/libc/locale/xlocale.c
257
FIX_LOCALE(base);
lib/libc/locale/xlocale.c
258
copyflags(new, base);
lib/libc/locale/xlocale.c
318
if (!dupcomponent(type, base, new)) {
lib/libc/locale/xlocale.c
333
locale_t duplocale(locale_t base)
lib/libc/locale/xlocale.c
344
FIX_LOCALE(base);
lib/libc/locale/xlocale.c
345
copyflags(new, base);
lib/libc/locale/xlocale.c
348
dupcomponent(type, base, new);
lib/libc/nls/msgcat.c
122
char *base, *cptr, *cptr1, *nlspath, *pathP, *pcode;
lib/libc/nls/msgcat.c
190
if ((base = cptr = strdup(nlspath)) == NULL) {
lib/libc/nls/msgcat.c
236
free(base);
lib/libc/nls/msgcat.c
250
free(base);
lib/libc/nls/msgcat.c
260
free(base);
lib/libc/stdio/printfcommon.h
165
__ultoa(u_long val, CHAR *endp, int base, int octzero, const char *xdigs)
lib/libc/stdio/printfcommon.h
174
switch (base) {
lib/libc/stdio/printfcommon.h
221
__ujtoa(uintmax_t val, CHAR *endp, int base, int octzero, const char *xdigs)
lib/libc/stdio/printfcommon.h
229
return (__ultoa((u_long)val, endp, base, octzero, xdigs));
lib/libc/stdio/printfcommon.h
230
switch (base) {
lib/libc/stdio/vfprintf.c
348
int base; /* base for [diouxX] conversion */
lib/libc/stdio/vfprintf.c
646
base = 10;
lib/libc/stdio/vfprintf.c
799
base = 8;
lib/libc/stdio/vfprintf.c
810
base = 16;
lib/libc/stdio/vfprintf.c
847
base = 10;
lib/libc/stdio/vfprintf.c
859
base = 16;
lib/libc/stdio/vfprintf.c
888
(flags & ALT && base == 8))
lib/libc/stdio/vfprintf.c
889
cp = __ujtoa(ujval, cp, base,
lib/libc/stdio/vfprintf.c
893
(flags & ALT && base == 8))
lib/libc/stdio/vfprintf.c
894
cp = __ultoa(ulval, cp, base,
lib/libc/stdio/vfscanf.c
319
parseint(FILE *fp, char * __restrict buf, int width, int base, int flags)
lib/libc/stdio/vfscanf.c
347
if (base == 0) {
lib/libc/stdio/vfscanf.c
348
base = 8;
lib/libc/stdio/vfscanf.c
360
base = basefix[base];
lib/libc/stdio/vfscanf.c
366
base = basefix[base];
lib/libc/stdio/vfscanf.c
367
if (base <= 8)
lib/libc/stdio/vfscanf.c
378
if (base <= 10)
lib/libc/stdio/vfscanf.c
399
base = 16; /* if %i */
lib/libc/stdio/vfscanf.c
482
int base; /* base argument to conversion function */
lib/libc/stdio/vfscanf.c
563
base = 10;
lib/libc/stdio/vfscanf.c
568
base = 0;
lib/libc/stdio/vfscanf.c
574
base = 8;
lib/libc/stdio/vfscanf.c
580
base = 10;
lib/libc/stdio/vfscanf.c
588
base = 16;
lib/libc/stdio/vfscanf.c
623
base = 16;
lib/libc/stdio/vfscanf.c
745
nr = parseint(fp, buf, width, base, flags);
lib/libc/stdio/vfscanf.c
753
res = strtoimax_l(buf, NULL, base, locale);
lib/libc/stdio/vfscanf.c
755
res = strtoumax_l(buf, NULL, base, locale);
lib/libc/stdio/vfwprintf.c
425
int base; /* base for [diouxX] conversion */
lib/libc/stdio/vfwprintf.c
702
base = 10;
lib/libc/stdio/vfwprintf.c
860
base = 8;
lib/libc/stdio/vfwprintf.c
871
base = 16;
lib/libc/stdio/vfwprintf.c
910
base = 10;
lib/libc/stdio/vfwprintf.c
922
base = 16;
lib/libc/stdio/vfwprintf.c
951
(flags & ALT && base == 8))
lib/libc/stdio/vfwprintf.c
952
cp = __ujtoa(ujval, cp, base,
lib/libc/stdio/vfwprintf.c
956
(flags & ALT && base == 8))
lib/libc/stdio/vfwprintf.c
957
cp = __ultoa(ulval, cp, base,
lib/libc/stdio/vfwscanf.c
302
parseint(FILE *fp, wchar_t *buf, int width, int base, int flags,
lib/libc/stdio/vfwscanf.c
331
if (base == 0) {
lib/libc/stdio/vfwscanf.c
332
base = 8;
lib/libc/stdio/vfwscanf.c
344
base = basefix[base];
lib/libc/stdio/vfwscanf.c
350
base = basefix[base];
lib/libc/stdio/vfwscanf.c
351
if (base <= 8)
lib/libc/stdio/vfwscanf.c
362
if (base <= 10)
lib/libc/stdio/vfwscanf.c
383
base = 16; /* if %i */
lib/libc/stdio/vfwscanf.c
458
int base; /* base argument to conversion function */
lib/libc/stdio/vfwscanf.c
543
base = 10;
lib/libc/stdio/vfwscanf.c
548
base = 0;
lib/libc/stdio/vfwscanf.c
554
base = 8;
lib/libc/stdio/vfwscanf.c
560
base = 10;
lib/libc/stdio/vfwscanf.c
568
base = 16;
lib/libc/stdio/vfwscanf.c
614
base = 16;
lib/libc/stdio/vfwscanf.c
721
nr = parseint(fp, buf, width, base, flags, locale);
lib/libc/stdio/vfwscanf.c
729
res = wcstoimax(buf, NULL, base);
lib/libc/stdio/vfwscanf.c
731
res = wcstoumax(buf, NULL, base);
lib/libc/stdio/xprintf_int.c
157
assert(base == 16);
lib/libc/stdio/xprintf_int.c
165
__ujtoa(uintmax_t val, char *endp, int base, const char *xdigs,
lib/libc/stdio/xprintf_int.c
172
switch (base) {
lib/libc/stdio/xprintf_int.c
88
__ultoa(u_long val, char *endp, int base, const char *xdigs,
lib/libc/stdio/xprintf_int.c
99
switch (base) {
lib/libc/stdlib/_strtol.h
113
cutlim = (int)(cutoff % base);
lib/libc/stdlib/_strtol.h
114
cutoff /= base;
lib/libc/stdlib/_strtol.h
117
cutlim -= base;
lib/libc/stdlib/_strtol.h
131
if (i >= base)
lib/libc/stdlib/_strtol.h
142
acc *= base;
lib/libc/stdlib/_strtol.h
152
acc *= base;
lib/libc/stdlib/_strtol.h
164
_FUNCNAME(const char * __restrict nptr, char ** __restrict endptr, int base)
lib/libc/stdlib/_strtol.h
166
return _FUNCNAME_L(nptr, endptr, base, __get_locale());
lib/libc/stdlib/_strtol.h
47
_FUNCNAME_L(const char * __restrict nptr, char ** __restrict endptr, int base,
lib/libc/stdlib/_strtol.h
61
if (base && (base < 2 || base > 36)) {
lib/libc/stdlib/_strtol.h
83
if ((base == 0 || base == 16) &&
lib/libc/stdlib/_strtol.h
90
base = 16;
lib/libc/stdlib/_strtol.h
92
if (base == 0)
lib/libc/stdlib/_strtol.h
93
base = c == '0' ? 8 : 10;
lib/libc/stdlib/_strtoul.h
109
if (i >= base)
lib/libc/stdlib/_strtoul.h
119
acc *= (__UINT)base;
lib/libc/stdlib/_strtoul.h
133
_FUNCNAME(const char * __restrict nptr, char ** __restrict endptr, int base)
lib/libc/stdlib/_strtoul.h
135
return _FUNCNAME_L(nptr, endptr, base, __get_locale());
lib/libc/stdlib/_strtoul.h
47
_FUNCNAME_L(const char * __restrict nptr, char ** __restrict endptr, int base,
lib/libc/stdlib/_strtoul.h
61
if (base && (base < 2 || base > 36)) {
lib/libc/stdlib/_strtoul.h
83
if ((base == 0 || base == 16) &&
lib/libc/stdlib/_strtoul.h
90
base = 16;
lib/libc/stdlib/_strtoul.h
92
if (base == 0)
lib/libc/stdlib/_strtoul.h
93
base = c == '0' ? 8 : 10;
lib/libc/stdlib/_strtoul.h
98
cutoff = __UINT_MAX / (__UINT)base;
lib/libc/stdlib/_strtoul.h
99
cutlim = (int)(__UINT_MAX % (__UINT)base);
lib/libc/stdlib/bsearch.c
57
const char *base = base0;
lib/libc/stdlib/bsearch.c
63
p = base + (lim >> 1) * size;
lib/libc/stdlib/bsearch.c
68
base = (char *)p + size;
lib/libc/stdlib/heapsort.c
108
child = base + child_i * size; \
lib/libc/stdlib/heapsort.c
113
par = base + par_i * size; \
lib/libc/stdlib/heapsort.c
119
child = base + child_i * size; \
lib/libc/stdlib/heapsort.c
120
par = base + par_i * size; \
lib/libc/stdlib/heapsort.c
142
char *base, *k, *p, *t;
lib/libc/stdlib/heapsort.c
159
base = (char *)vbase - size;
lib/libc/stdlib/heapsort.c
170
COPY(k, base + nmemb * size, cnt, size, tmp1, tmp2);
lib/libc/stdlib/heapsort.c
171
COPY(base + nmemb * size, base + size, cnt, size, tmp1, tmp2);
lib/libc/stdlib/heapsort.c
77
child = base + child_i * size; \
lib/libc/stdlib/heapsort.c
82
par = base + par_i * size; \
lib/libc/stdlib/lsearch.c
23
void *lsearch(const void *key, void *base, size_t *nelp, size_t width,
lib/libc/stdlib/lsearch.c
27
return (lwork(key, base, nelp, width, compar, 1));
lib/libc/stdlib/lsearch.c
30
void *lfind(const void *key, const void *base, size_t *nelp, size_t width,
lib/libc/stdlib/lsearch.c
34
return (lwork(key, base, nelp, width, compar, 0));
lib/libc/stdlib/lsearch.c
38
lwork(const void *key, const void *base, size_t *nelp, size_t width,
lib/libc/stdlib/lsearch.c
47
ep = (uint8_t *)(uintptr_t)base;
lib/libc/stdlib/merge.c
117
if (!(size % ISIZE) && !(((char *)base - (char *)0) % ISIZE))
lib/libc/stdlib/merge.c
123
list1 = base;
lib/libc/stdlib/merge.c
222
if (base == list2) {
lib/libc/stdlib/merge.c
95
mergesort(void *base, size_t nmemb, size_t size,
lib/libc/stdlib/nmalloc.c
1011
_slabfree(big->base, FASTSLABREALLOC, &big);
lib/libc/stdlib/nmalloc.c
1015
*memptr = big->base;
lib/libc/stdlib/nmalloc.c
1040
big->base = *memptr;
lib/libc/stdlib/nmalloc.c
1150
_slabfree(big->base, FASTSLABREALLOC, &big);
lib/libc/stdlib/nmalloc.c
1155
chunk = big->base;
lib/libc/stdlib/nmalloc.c
1168
big->base = chunk;
lib/libc/stdlib/nmalloc.c
1388
if (big->base == ptr) {
lib/libc/stdlib/nmalloc.c
149
void *base; /* base pointer */
lib/libc/stdlib/nmalloc.c
1543
const char *base = big->base;
lib/libc/stdlib/nmalloc.c
1545
if ((const char *)ptr >= base &&
lib/libc/stdlib/nmalloc.c
1546
(const char *)ptr < base + big->bytes)
lib/libc/stdlib/nmalloc.c
1548
size = base + big->bytes - (const char *)ptr;
lib/libc/stdlib/nmalloc.c
1619
if (big->base == ptr) {
lib/libc/stdlib/nmalloc.c
1636
ptr = big->base; /* reload */
lib/libc/stdlib/nmalloc.c
681
munmap((char *)big->base + big->active,
lib/libc/stdlib/strtoq.c
42
strtoq(const char *nptr, char **endptr, int base)
lib/libc/stdlib/strtoq.c
45
return strtoll(nptr, endptr, base);
lib/libc/stdlib/strtouq.c
42
strtouq(const char *nptr, char **endptr, int base)
lib/libc/stdlib/strtouq.c
45
return strtoull(nptr, endptr, base);
lib/libc/stdtime/localtime.c
170
int * unitsptr, int base);
lib/libc/stdtime/localtime.c
1708
normalize_overflow(int * const tensptr, int * const unitsptr, const int base)
lib/libc/stdtime/localtime.c
1713
(*unitsptr / base) :
lib/libc/stdtime/localtime.c
1714
(-1 - (-1 - *unitsptr) / base);
lib/libc/stdtime/localtime.c
1715
*unitsptr -= tensdelta * base;
lib/libc/stdtime/localtime.c
172
int base);
lib/libc/stdtime/localtime.c
1721
const int base)
lib/libc/stdtime/localtime.c
1726
(*unitsptr / base) :
lib/libc/stdtime/localtime.c
1727
(-1 - (-1 - *unitsptr) / base);
lib/libc/stdtime/localtime.c
1728
*unitsptr -= tensdelta * base;
lib/libc/stdtime/strftime.c
359
int base;
lib/libc/stdtime/strftime.c
365
base = TM_YEAR_BASE;
lib/libc/stdtime/strftime.c
373
len = isleap_sum(year, base) ?
lib/libc/stdtime/strftime.c
392
++base;
lib/libc/stdtime/strftime.c
401
--base;
lib/libc/stdtime/strftime.c
402
yday += isleap_sum(year, base) ?
lib/libc/stdtime/strftime.c
418
pt = _yconv(year, base, 0, 1,
lib/libc/stdtime/strftime.c
420
} else pt = _yconv(year, base, 1, 1,
lib/libc/stdtime/timespec_get.c
39
timespec_get(struct timespec *ts, int base)
lib/libc/stdtime/timespec_get.c
41
switch (base) {
lib/libc/stdtime/timespec_get.c
51
return base;
lib/libcam/scsi_cmdparse.c
110
u_char *base = databuf;
lib/libcam/scsi_cmdparse.c
295
databuf = base + width; /* Absolute seek */
lib/libdmsg/msg_lnk.c
195
_dmsg_termstr(char *base, size_t size)
lib/libdmsg/msg_lnk.c
197
base[size-1] = 0;
lib/libevtr/ktrfmt.yy.c
1605
YY_BUFFER_STATE __ktrfmt_scan_buffer (char * base, yy_size_t size )
lib/libevtr/ktrfmt.yy.c
1610
base[size-2] != YY_END_OF_BUFFER_CHAR ||
lib/libevtr/ktrfmt.yy.c
1611
base[size-1] != YY_END_OF_BUFFER_CHAR )
lib/libevtr/ktrfmt.yy.c
1620
b->yy_buf_pos = b->yy_ch_buf = base;
lib/libevtr/ktrfmt.yy.c
321
YY_BUFFER_STATE __ktrfmt_scan_buffer (char *base,yy_size_t size );
lib/libipfw3/basic/ipfw3_basic.c
163
strtoport(char *s, char **end, int base, int proto)
lib/libipfw3/basic/ipfw3_basic.c
174
return strtol(s, end, base);
lib/libkiconv/quirks.c
118
kiconv_quirkcs(const char* base, int vendor)
lib/libkiconv/quirks.c
129
strcasecmp(quirk_list[i].base_codeset, base) == 0)
lib/libkiconv/quirks.c
132
return (base);
lib/libkiconv/quirks.c
190
kiconv_quirkcs(const char* base __unused, int vendor __unused)
lib/libkiconv/quirks.c
193
return (base);
lib/libkvm/kvm_minidump_x86_64.c
106
inithash(kvm_t *kd, uint64_t *base, int len, off_t off)
lib/libkvm/kvm_minidump_x86_64.c
112
for (idx = 0; idx < len / sizeof(*base); idx++) {
lib/libkvm/kvm_minidump_x86_64.c
113
bits = base[idx];
lib/libkvm/kvm_minidump_x86_64.c
117
pa = (idx * sizeof(*base) * NBBY + bit) * PAGE_SIZE;
lib/libnvmm/libnvmm_x86.c
2108
get_register_bas(struct x86_instr *instr, uint8_t base)
lib/libnvmm/libnvmm_x86.c
2110
uint8_t enc = base;
lib/libnvmm/libnvmm_x86.c
2127
uint8_t scale, index, base;
lib/libnvmm/libnvmm_x86.c
2137
base = ((byte & 0b00000111) >> 0);
lib/libnvmm/libnvmm_x86.c
2149
if (instr->regmodrm.mod == 0b00 && base == 0b101) {
lib/libnvmm/libnvmm_x86.c
2160
instr->strm->u.sib.bas = get_register_bas(instr, base);
lib/libnvmm/libnvmm_x86.c
540
*gva += seg->base;
lib/libnvmm/libnvmm_x86.c
80
state->segs[i].base,
lib/libtelnet/pk.c
100
BN_ULONG r, base = (1 << 8);
lib/libtelnet/pk.c
111
r = BN_div_word(a, base);
lib/libtelnet/pk.c
115
r = BN_div_word(a, base);
lib/libtelnet/pk.c
201
BIGNUM *pk, *sk, *tmp, *base, *root, *modulus;
lib/libtelnet/pk.c
206
base = itobn(BASE);
lib/libtelnet/pk.c
222
BN_mul(sk, base, sk, ctx);
lib/libtelnet/pk.c
241
BN_free(base);
lib/libtelnet/pk.c
69
BN_ULONG r, base = (1 << 8);
lib/libtelnet/pk.c
80
r = BN_div_word(a, base);
lib/libtelnet/pk.c
84
r = BN_div_word(a, base);
libexec/bootpd/readfile.c
1824
u_int32 value, base;
libexec/bootpd/readfile.c
1832
base = 10;
libexec/bootpd/readfile.c
1834
base = 8;
libexec/bootpd/readfile.c
1838
base = 16;
libexec/bootpd/readfile.c
1843
value = (value * base) + (c - '0');
libexec/bootpd/readfile.c
1847
if (base == 16 && isxdigit(c)) {
libexec/getty/chat.c
107
getdigit(unsigned char **ptr, int base, int max)
libexec/getty/chat.c
118
if (s == NULL || (sval = s - xdigits) >= base)
libexec/getty/chat.c
120
val = (val * base) + sval;
libexec/rtld-elf/rtld.c
2587
void *base;
libexec/rtld-elf/rtld.c
2595
base = obj->relocbase + trunc_page(ph->p_vaddr);
libexec/rtld-elf/rtld.c
2613
madvise(base, sz, MADV_CORE);
libexec/rtld-elf/rtld.c
2614
if (mprotect(base, sz, prot) == -1) {
libexec/rtld-elf/rtld.c
3652
rtld_dirname_abs(const char *path, char *base)
libexec/rtld-elf/rtld.c
3656
if (rtld_dirname(path, base) == -1)
libexec/rtld-elf/rtld.c
3658
if (base[0] == '/')
libexec/rtld-elf/rtld.c
3662
strlcat(base_rel, base, sizeof(base_rel)) >= sizeof(base_rel))
libexec/rtld-elf/rtld.c
3664
strcpy(base, base_rel);
libexec/rtld-elf/rtld_printf.c
105
ksprintn(char *nbuf, uintmax_t num, int base, int *lenp, int upper)
libexec/rtld-elf/rtld_printf.c
112
c = upper ? hex2ascii_upper(num % base) :
libexec/rtld-elf/rtld_printf.c
113
hex2ascii(num % base);
libexec/rtld-elf/rtld_printf.c
115
} while (num /= base);
libexec/rtld-elf/rtld_printf.c
130
int base, lflag, qflag, tmp, width, ladjust, sharpflag, neg, sign, dot;
libexec/rtld-elf/rtld_printf.c
243
base = 10;
libexec/rtld-elf/rtld_printf.c
280
base = 8;
libexec/rtld-elf/rtld_printf.c
283
base = 16;
libexec/rtld-elf/rtld_printf.c
292
base = radix;
libexec/rtld-elf/rtld_printf.c
321
base = 10;
libexec/rtld-elf/rtld_printf.c
326
base = 16;
libexec/rtld-elf/rtld_printf.c
329
base = 16;
libexec/rtld-elf/rtld_printf.c
376
p = ksprintn(nbuf, num, base, &n, upper);
libexec/rtld-elf/rtld_printf.c
379
if (base == 8)
libexec/rtld-elf/rtld_printf.c
381
else if (base == 16)
libexec/rtld-elf/rtld_printf.c
397
if (base == 8) {
libexec/rtld-elf/rtld_printf.c
399
} else if (base == 16) {
sbin/dhclient/parse.c
211
int base)
sbin/dhclient/parse.c
225
if (token == TOK_NUMBER || (base == 16 && token == TOK_NUMBER_OR_NAME))
sbin/dhclient/parse.c
227
convert_num(buf, val, base, 8);
sbin/dhclient/parse.c
241
convert_num(unsigned char *buf, char *str, int base, int size)
sbin/dhclient/parse.c
253
if (!base) {
sbin/dhclient/parse.c
256
base = 16;
sbin/dhclient/parse.c
259
base = 8;
sbin/dhclient/parse.c
262
base = 10;
sbin/dhclient/parse.c
264
base = 10;
sbin/dhclient/parse.c
280
if (tval >= base) {
sbin/dhclient/parse.c
282
str, tval, base);
sbin/dhclient/parse.c
285
val = val * base + tval;
sbin/dhclient/parse.c
293
switch (base) {
sbin/dump/cache.c
79
Block *base;
sbin/dump/cache.c
89
base = calloc(sizeof(Block), NBlocks);
sbin/dump/cache.c
94
base[i].b_Data = DataBase + i * BlockSize;
sbin/dump/cache.c
95
base[i].b_Offset = (off_t)-1;
sbin/dump/cache.c
97
base[i].b_HNext = BlockHash[hi];
sbin/dump/cache.c
98
BlockHash[hi] = &base[i];
sbin/fsck/main.c
157
argtoi(int flag, char *req, char *str, int base)
sbin/fsck/main.c
162
ret = (int)strtol(str, &cp, base);
sbin/fsck/main.c
55
static int argtoi(int flag, char *req, char *str, int base);
sbin/fsck/memzone.c
66
chunk->base = mmap(NULL, MEMZONE_CHUNK, PROT_READ|PROT_WRITE,
sbin/fsck/memzone.c
68
if (chunk->base == MAP_FAILED) {
sbin/fsck/memzone.c
78
ptr = chunk->base + zone->index;
sbin/fsck/memzone.c
98
munmap(chunk->base, chunk->bytes);
sbin/fsck/memzone.h
37
char *base;
sbin/hammer/cmd_blockmap.c
424
switch (elm->base.rec_type) {
sbin/hammer/cmd_dedup.c
488
dedup.elm1 = p->base;
sbin/hammer/cmd_dedup.c
489
dedup.elm2 = q->base;
sbin/hammer/cmd_dedup.c
821
data.elm = leaf->base;
sbin/hammer/cmd_dedup.c
838
if (data.leaf.base.btype == HAMMER_BTREE_TYPE_RECORD &&
sbin/hammer/cmd_dedup.c
839
data.leaf.base.rec_type == HAMMER_RECTYPE_DATA) {
sbin/hammer/cmd_dedup.c
952
if (elm.base.btype != HAMMER_BTREE_TYPE_RECORD)
sbin/hammer/cmd_dedup.c
954
if (elm.base.rec_type != HAMMER_RECTYPE_DATA)
sbin/hammer/cmd_mirror.c
1014
mrec->rec.leaf.base.localization,
sbin/hammer/cmd_mirror.c
1015
(uintmax_t)mrec->rec.leaf.base.obj_id,
sbin/hammer/cmd_mirror.c
1016
(uintmax_t)mrec->rec.leaf.base.key,
sbin/hammer/cmd_mirror.c
1017
mrec->rec.leaf.base.rec_type,
sbin/hammer/cmd_mirror.c
1018
mrec->rec.leaf.base.obj_type);
sbin/hammer/cmd_mirror.c
1025
(uintmax_t)mrec->rec.leaf.base.create_tid,
sbin/hammer/cmd_mirror.c
1026
(uintmax_t)mrec->rec.leaf.base.delete_tid,
sbin/hammer/cmd_mirror.c
1032
mrec->rec.leaf.base.localization,
sbin/hammer/cmd_mirror.c
1033
(uintmax_t)mrec->rec.leaf.base.obj_id,
sbin/hammer/cmd_mirror.c
1034
(uintmax_t)mrec->rec.leaf.base.key,
sbin/hammer/cmd_mirror.c
1035
mrec->rec.leaf.base.rec_type,
sbin/hammer/cmd_mirror.c
1036
mrec->rec.leaf.base.obj_type);
sbin/hammer/cmd_mirror.c
1038
(uintmax_t)mrec->rec.leaf.base.create_tid,
sbin/hammer/cmd_mirror.c
1039
(uintmax_t)mrec->rec.leaf.base.delete_tid,
sbin/hammer/cmd_mirror.c
1392
(uintmax_t)mrec->rec.leaf.base.obj_id,
sbin/hammer/cmd_mirror.c
1393
(uintmax_t)mrec->rec.leaf.base.key);
sbin/hammer/cmd_mirror.c
595
tid = mrec->rec.leaf.base.delete_tid;
sbin/hammer/cmd_mirror.c
616
tid = mrec->rec.leaf.base.create_tid;
sbin/hammer/cmd_recover.c
306
if (elm->base.btype == HAMMER_BTREE_TYPE_RECORD)
sbin/hammer/cmd_recover.c
363
pfs_id = lo_to_pfs(leaf->base.localization);
sbin/hammer/cmd_recover.c
371
dict = get_dict(leaf->base.obj_id, pfs_id);
sbin/hammer/cmd_recover.c
373
switch(leaf->base.rec_type) {
sbin/hammer/cmd_recover.c
381
(uintmax_t)leaf->base.obj_id, pfs_id);
sbin/hammer/cmd_recover.c
439
if (leaf->base.obj_id == 0)
sbin/hammer/cmd_recover.c
443
(uintmax_t)leaf->base.obj_id,
sbin/hammer/cmd_recover.c
445
(uintmax_t)leaf->base.key - len,
sbin/hammer/cmd_recover.c
498
file_offset = (int64_t)leaf->base.key - len;
sbin/hammer/cmd_recover.c
559
(uintmax_t)leaf->base.obj_id,
sbin/hammer/cmd_recover.c
660
char *base;
sbin/hammer/cmd_recover.c
680
info.base = malloc(info.len);
sbin/hammer/cmd_recover.c
681
info.next = info.base;
sbin/hammer/cmd_recover.c
686
return(info.base);
sbin/hammer/cmd_show.c
122
printf(" lo=%08x", opt.base.localization);
sbin/hammer/cmd_show.c
124
printf(" objid=%016jx", (uintmax_t)opt.base.obj_id);
sbin/hammer/cmd_show.c
126
printf(" rt=%02x", opt.base.rec_type);
sbin/hammer/cmd_show.c
128
printf(" key=%016jx", (uintmax_t)opt.base.key);
sbin/hammer/cmd_show.c
130
printf(" tid=%016jx", (uintmax_t)opt.base.create_tid);
sbin/hammer/cmd_show.c
301
elm->base.localization == HAMMER_MIN_ONDISK_LOCALIZATION &&
sbin/hammer/cmd_show.c
302
elm->base.obj_id == (int64_t)HAMMER_MIN_OBJID &&
sbin/hammer/cmd_show.c
303
elm->base.key == (int64_t)HAMMER_MIN_KEY &&
sbin/hammer/cmd_show.c
304
elm->base.create_tid == 1 &&
sbin/hammer/cmd_show.c
305
elm->base.delete_tid == 1 &&
sbin/hammer/cmd_show.c
306
elm->base.rec_type == HAMMER_MIN_RECTYPE &&
sbin/hammer/cmd_show.c
307
elm->base.obj_type == 0 &&
sbin/hammer/cmd_show.c
308
elm->base.btype != HAMMER_BTREE_TYPE_NONE);
sbin/hammer/cmd_show.c
317
elm->base.localization == HAMMER_MAX_ONDISK_LOCALIZATION &&
sbin/hammer/cmd_show.c
318
elm->base.obj_id == HAMMER_MAX_OBJID &&
sbin/hammer/cmd_show.c
319
elm->base.key == HAMMER_MAX_KEY &&
sbin/hammer/cmd_show.c
320
elm->base.create_tid == HAMMER_MAX_TID &&
sbin/hammer/cmd_show.c
321
elm->base.delete_tid == 0 &&
sbin/hammer/cmd_show.c
322
elm->base.rec_type == HAMMER_MAX_RECTYPE &&
sbin/hammer/cmd_show.c
323
elm->base.obj_type == 0 &&
sbin/hammer/cmd_show.c
324
elm->base.btype == HAMMER_BTREE_TYPE_NONE);
sbin/hammer/cmd_show.c
366
if (elm->base.delete_tid)
sbin/hammer/cmd_show.c
379
elm->base.localization,
sbin/hammer/cmd_show.c
380
(uintmax_t)elm->base.obj_id,
sbin/hammer/cmd_show.c
381
elm->base.rec_type,
sbin/hammer/cmd_show.c
382
(uintmax_t)elm->base.key,
sbin/hammer/cmd_show.c
383
(uintmax_t)elm->base.create_tid);
sbin/hammer/cmd_show.c
387
(uintmax_t)elm->base.delete_tid,
sbin/hammer/cmd_show.c
388
elm->base.obj_type);
sbin/hammer/cmd_show.c
399
switch(elm->base.btype) {
sbin/hammer/cmd_show.c
421
printf(" badtype=%d", elm->base.btype);
sbin/hammer/cmd_show.c
449
switch(elm->base.btype) {
sbin/hammer/cmd_show.c
47
struct hammer_base_elm base;
sbin/hammer/cmd_show.c
470
switch(elm->base.btype) {
sbin/hammer/cmd_show.c
491
if (elm->base.create_tid && node->mirror_tid &&
sbin/hammer/cmd_show.c
492
elm->base.create_tid > node->mirror_tid) {
sbin/hammer/cmd_show.c
495
if (elm->base.delete_tid && node->mirror_tid &&
sbin/hammer/cmd_show.c
496
elm->base.delete_tid > node->mirror_tid) {
sbin/hammer/cmd_show.c
499
switch(elm->base.btype) {
sbin/hammer/cmd_show.c
562
if (hammer_btree_cmp(&elm->base, &lbe->base) < 0)
sbin/hammer/cmd_show.c
564
if (hammer_btree_cmp(&elm->base, &rbe->base) >= 0)
sbin/hammer/cmd_show.c
576
if (hammer_btree_cmp(&rbn->base, &lbe->base) < 0)
sbin/hammer/cmd_show.c
578
if (hammer_btree_cmp(&rbn->base, &rbe->base) > 0)
sbin/hammer/cmd_show.c
625
switch (elm->leaf.base.rec_type) {
sbin/hammer/cmd_show.c
767
switch(elm->leaf.base.rec_type) {
sbin/hammer/cmd_show.c
806
switch(elm->leaf.base.key) {
sbin/hammer/cmd_show.c
887
_strtoul(const char *p, int base)
sbin/hammer/cmd_show.c
892
retval = strtoul(p, NULL, base);
sbin/hammer/cmd_show.c
902
_strtoull(const char *p, int base)
sbin/hammer/cmd_show.c
907
retval = strtoull(p, NULL, base);
sbin/hammer/cmd_show.c
922
bzero(&opt.base, sizeof(opt.base));
sbin/hammer/cmd_show.c
938
opt.base.localization = _strtoul(p, 16);
sbin/hammer/cmd_show.c
940
opt.base.obj_id = _strtoull(p, 16);
sbin/hammer/cmd_show.c
942
opt.base.rec_type = _strtoul(p, 16);
sbin/hammer/cmd_show.c
944
opt.base.key = _strtoull(p, 16);
sbin/hammer/cmd_show.c
946
opt.base.create_tid = _strtoull(p, 16);
sbin/hammer/cmd_show.c
960
hammer_base_elm_t base1 = &elm->base;
sbin/hammer/cmd_show.c
961
hammer_base_elm_t base2 = &opt.base;
sbin/hammer/cmd_softprune.c
112
scan = hammer_softprune_addentry(&base, &template,
sbin/hammer/cmd_softprune.c
122
hammer_softprune_scandir(&base, &template, *av);
sbin/hammer/cmd_softprune.c
123
if (base == NULL) {
sbin/hammer/cmd_softprune.c
125
scan = hammer_softprune_addentry(&base, &template,
sbin/hammer/cmd_softprune.c
141
if (base->next) {
sbin/hammer/cmd_softprune.c
150
for (scan = base; scan; scan = scan->next) {
sbin/hammer/cmd_softprune.c
310
struct softprune *base = NULL;
sbin/hammer/cmd_softprune.c
314
hammer_softprune_scandir(&base, &dummy_template, dirname);
sbin/hammer/cmd_softprune.c
316
if (base)
sbin/hammer/cmd_softprune.c
73
struct softprune *base, *scan;
sbin/hammer/cmd_softprune.c
77
base = NULL;
sbin/hammer/cycle.c
40
hammer_get_cycle(hammer_base_elm_t base, hammer_tid_t *extra)
sbin/hammer/cycle.c
52
if (st.st_size < (off_t)sizeof(*base)) {
sbin/hammer/cycle.c
59
if (read(fd, base, sizeof(*base)) != sizeof(*base)) {
sbin/hammer/cycle.c
76
hammer_set_cycle(hammer_base_elm_t base, hammer_tid_t extra)
sbin/hammer/cycle.c
81
write(fd, base, sizeof(*base));
sbin/hammer/hammer.h
118
void hammer_get_cycle(hammer_base_elm_t base, hammer_tid_t *tidp);
sbin/hammer/hammer.h
119
void hammer_set_cycle(hammer_base_elm_t base, hammer_tid_t tid);
sbin/hammer/hammer_util.h
169
void hammer_key_beg_init(hammer_base_elm_t base);
sbin/hammer/hammer_util.h
170
void hammer_key_end_init(hammer_base_elm_t base);
sbin/hammer/misc.c
40
hammer_key_beg_init(hammer_base_elm_t base)
sbin/hammer/misc.c
42
bzero(base, sizeof(*base));
sbin/hammer/misc.c
44
base->localization = HAMMER_MIN_LOCALIZATION;
sbin/hammer/misc.c
45
base->obj_id = HAMMER_MIN_OBJID;
sbin/hammer/misc.c
46
base->key = HAMMER_MIN_KEY;
sbin/hammer/misc.c
47
base->create_tid = 1;
sbin/hammer/misc.c
48
base->rec_type = HAMMER_MIN_RECTYPE;
sbin/hammer/misc.c
49
base->obj_type = 0;
sbin/hammer/misc.c
53
hammer_key_end_init(hammer_base_elm_t base)
sbin/hammer/misc.c
55
bzero(base, sizeof(*base));
sbin/hammer/misc.c
57
base->localization = HAMMER_MAX_LOCALIZATION;
sbin/hammer/misc.c
58
base->obj_id = HAMMER_MAX_OBJID;
sbin/hammer/misc.c
59
base->key = HAMMER_MAX_KEY;
sbin/hammer/misc.c
60
base->create_tid = HAMMER_MAX_TID;
sbin/hammer/misc.c
61
base->rec_type = HAMMER_MAX_RECTYPE;
sbin/hammer/misc.c
62
base->obj_type = 0;
sbin/hammer/ondisk.c
41
static void get_buffer_readahead(buffer_info_t base);
sbin/hammer/ondisk.c
411
get_buffer_readahead(const buffer_info_t base)
sbin/hammer/ondisk.c
420
raw_offset = base->raw_offset + ri * HAMMER_BUFSIZE;
sbin/hammer/ondisk.c
421
volume = base->volume;
sbin/hammer2/cmd_recover.c
1237
hammer2_blockref_t *base, int count,
sbin/hammer2/cmd_recover.c
1265
bref = &base[n];
sbin/hammer2/cmd_recover.c
1384
hammer2_blockref_t *base, int count)
sbin/hammer2/cmd_recover.c
1400
bref = &base[n];
sbin/hammer2/cmd_recover.c
150
hammer2_blockref_t *base, int count,
sbin/hammer2/lz4/hammer2_lz4.c
193
# define INITBASE(base) BYTE* base = ip
sbin/hammer2/lz4/hammer2_lz4.c
202
# define INITBASE(base) int base = 0
sbin/hammer2/lz4/hammer2_lz4_encoder.h
117
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
141
ref = base + HashTable[h];
sbin/hammer2/lz4/hammer2_lz4_encoder.h
142
HashTable[h] = (CURRENT_H_TYPE)(ip - base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
231
HashTable[LZ4_HASHVALUE(ip-2)] = (CURRENT_H_TYPE)(ip - 2 - base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
234
ref = base + HashTable[LZ4_HASHVALUE(ip)];
sbin/hammer2/lz4/hammer2_lz4_encoder.h
235
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
282
CURRENTBASE(base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
302
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
326
ref = base + HashTable[h];
sbin/hammer2/lz4/hammer2_lz4_encoder.h
327
HashTable[h] = (CURRENT_H_TYPE)(ip - base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
416
HashTable[LZ4_HASHVALUE(ip-2)] = (CURRENT_H_TYPE)(ip - 2 - base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
419
ref = base + HashTable[LZ4_HASHVALUE(ip)];
sbin/hammer2/lz4/hammer2_lz4_encoder.h
420
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
sbin/hammer2/lz4/hammer2_lz4_encoder.h
69
# define CURRENTBASE(base) BYTE* base = ip
sbin/hammer2/lz4/hammer2_lz4_encoder.h
73
# define CURRENTBASE(base) INITBASE(base)
sbin/hammer2/lz4/hammer2_lz4_encoder.h
97
CURRENTBASE(base);
sbin/hammer2/zlib/hammer2_zlib_inftrees.c
181
base = extra = work; /* dummy value--not used */
sbin/hammer2/zlib/hammer2_zlib_inftrees.c
185
base = lbase;
sbin/hammer2/zlib/hammer2_zlib_inftrees.c
186
base -= 257;
sbin/hammer2/zlib/hammer2_zlib_inftrees.c
192
base = dbase;
sbin/hammer2/zlib/hammer2_zlib_inftrees.c
223
here.val = base[work[sym]];
sbin/hammer2/zlib/hammer2_zlib_inftrees.c
53
const unsigned short FAR *base; /* base value table to use */
sbin/hammer2/zlib/hammer2_zlib_trees.c
499
int base = desc->stat_desc->extra_base;
sbin/hammer2/zlib/hammer2_zlib_trees.c
526
if (n >= base) xbits = extra[n-base];
sbin/ipfw/ipfw2.c
447
strtoport(char *str, char **end, int base, int proto)
sbin/ipfw/ipfw2.c
458
return strtol(str, end, base);
sbin/jscan/dump_debug.c
104
off_t base = *off;
sbin/jscan/dump_debug.c
108
if ((error = jsread(js, base, &sub, sizeof(sub))) != 0) {
sbin/jscan/dump_debug.c
112
printf("@%jd ", (intmax_t)base);
sbin/jscan/dump_debug.c
130
*off = base + sizeof(sub);
sbin/jscan/dump_debug.c
136
error = dump_debug_payload(sub.rectype, js, base + sizeof(sub), payload, level);
sbin/jscan/dump_debug.c
137
*off = base + sizeof(sub) + payload;
sbin/jscan/dump_debug.c
145
recsize -= ((*off + 7) & ~7) - base;
sbin/jscan/dump_debug.c
146
base = (*off + 7) & ~7;
sbin/jscan/dump_debug.c
151
base += subsize;
sbin/jscan/dump_debug.c
156
*off = base;
sbin/jscan/dump_mirror.c
115
off_t base = *off;
sbin/jscan/dump_mirror.c
122
if ((error = jsread(js, base, &sub, sizeof(sub))) != 0)
sbin/jscan/dump_mirror.c
137
*off = base + sizeof(sub);
sbin/jscan/dump_mirror.c
141
*off = base + sizeof(sub) + payload;
sbin/jscan/dump_mirror.c
158
recsize -= ((*off + 7) & ~7) - base;
sbin/jscan/dump_mirror.c
159
base = (*off + 7) & ~7;
sbin/jscan/dump_mirror.c
164
base += subsize;
sbin/jscan/dump_mirror.c
169
*off = base;
sbin/jscan/dump_mirror.c
192
off_t base = *off;
sbin/jscan/dump_mirror.c
196
if ((error = jsread(js, base, &sub, sizeof(sub))) != 0)
sbin/jscan/dump_mirror.c
208
*off = base + sizeof(sub);
sbin/jscan/dump_mirror.c
265
recsize -= ((*off + 7) & ~7) - base;
sbin/jscan/dump_mirror.c
266
base = (*off + 7) & ~7;
sbin/jscan/dump_mirror.c
271
base += subsize;
sbin/jscan/dump_mirror.c
278
*off = base;
sbin/natd/natd.c
1687
unsigned int base, num;
sbin/natd/natd.c
1689
if (sscanf(strValue, "%u:%u", &base, &num) != 2)
sbin/natd/natd.c
1692
PacketAliasSetFWBase(base, num);
sbin/newfs/newfs.c
658
args.base = membase;
sbin/newfs_hammer/newfs_hammer.c
732
elm->leaf.base.btype = HAMMER_BTREE_TYPE_RECORD;
sbin/newfs_hammer/newfs_hammer.c
733
elm->leaf.base.localization = HAMMER_DEF_LOCALIZATION |
sbin/newfs_hammer/newfs_hammer.c
735
elm->leaf.base.obj_id = HAMMER_OBJID_ROOT;
sbin/newfs_hammer/newfs_hammer.c
736
elm->leaf.base.key = 0;
sbin/newfs_hammer/newfs_hammer.c
737
elm->leaf.base.create_tid = create_tid;
sbin/newfs_hammer/newfs_hammer.c
738
elm->leaf.base.delete_tid = 0;
sbin/newfs_hammer/newfs_hammer.c
739
elm->leaf.base.rec_type = HAMMER_RECTYPE_INODE;
sbin/newfs_hammer/newfs_hammer.c
740
elm->leaf.base.obj_type = HAMMER_OBJTYPE_DIRECTORY;
sbin/newfs_hammer/newfs_hammer.c
753
elm->leaf.base.btype = HAMMER_BTREE_TYPE_RECORD;
sbin/newfs_hammer/newfs_hammer.c
754
elm->leaf.base.localization = HAMMER_DEF_LOCALIZATION |
sbin/newfs_hammer/newfs_hammer.c
756
elm->leaf.base.obj_id = HAMMER_OBJID_ROOT;
sbin/newfs_hammer/newfs_hammer.c
757
elm->leaf.base.key = 0;
sbin/newfs_hammer/newfs_hammer.c
758
elm->leaf.base.create_tid = create_tid;
sbin/newfs_hammer/newfs_hammer.c
759
elm->leaf.base.delete_tid = 0;
sbin/newfs_hammer/newfs_hammer.c
760
elm->leaf.base.rec_type = HAMMER_RECTYPE_PFS;
sbin/newfs_hammer/newfs_hammer.c
761
elm->leaf.base.obj_type = HAMMER_OBJTYPE_DIRECTORY;
sbin/ping6/ping6.c
1225
dnsdecode(const u_char **sp, const u_char *ep, const u_char *base, char *buf,
sbin/ping6/ping6.c
1249
if ((i & 0xc0) == 0xc0 && cp - base > (i & 0x3f)) {
sbin/ping6/ping6.c
1251
if (!base)
sbin/ping6/ping6.c
1254
comp = base + (i & 0x3f);
sbin/ping6/ping6.c
1255
if (dnsdecode(&comp, cp, base, cresult,
sbin/rconfig/subs.c
51
char *base;
sbin/rconfig/subs.c
54
for (base = *scanp; *base && iswhite(*base); ++base)
sbin/rconfig/subs.c
56
for (ptr = base; *ptr && !iswhite(*ptr); ++ptr) {
sbin/rconfig/subs.c
75
return(base);
sbin/restore/dirs.c
450
rst_seekdir(RST_DIR *dirpl, long loc, long base)
sbin/restore/dirs.c
455
loc -= base;
sbin/restore/dirs.c
458
lseek(dirpl->dd_fd, base + rounddown2(loc, DIRBLKSIZ), SEEK_SET);
sbin/restore/symtab.c
520
char *base;
sbin/restore/symtab.c
549
base = calloc((unsigned)tblsize, sizeof(char));
sbin/restore/symtab.c
550
if (base == NULL)
sbin/restore/symtab.c
552
if (read(fd, base, (int)tblsize) < 0 ||
sbin/restore/symtab.c
589
(base + tblsize - (entrytblsize * sizeof(struct entry *)));
sbin/restore/symtab.c
590
baseep = (struct entry *)(base + hdr.stringsize - sizeof(struct entry));
sbin/restore/symtab.c
598
ep->e_name = base + (long)ep->e_name;
sbin/routed/defs.h
413
struct netinfo *base;
sbin/routed/output.c
249
wb->lim = wb->base + NETS_LEN;
sbin/routed/output.c
250
wb->n = wb->base;
sbin/routed/output.c
286
na = (struct netauth*)wb->base;
sbin/routed/output.c
76
v12buf.base = &v12buf.buf->rip_nets[0];
sbin/routed/output.c
782
if (v12buf.n != v12buf.base
sbin/routed/output.c
783
&& (v12buf.n > v12buf.base+1
sbin/routed/output.c
784
|| v12buf.base->n_family != RIP_AF_AUTH))
sbin/routed/output.c
786
if (v2buf.n != v2buf.base
sbin/routed/output.c
787
&& (v2buf.n > v2buf.base+1
sbin/routed/output.c
788
|| v2buf.base->n_family != RIP_AF_AUTH))
sbin/routed/output.c
81
v2buf.base = &v2buf.buf->rip_nets[0];
stand/boot/common/isapnp.h
250
u_long base; /* Memory Base Address */
stand/boot/common/load_elf_obj.c
437
Elf_Addr base;
stand/boot/common/load_elf_obj.c
448
base = shdr[shdr[i].sh_info].sh_addr;
stand/boot/common/load_elf_obj.c
449
if (base == 0 || shdr[i].sh_addr == 0)
stand/boot/common/load_elf_obj.c
451
if (off < base || off + len > base +
stand/boot/common/load_elf_obj.c
464
&a, ELF_RELOC_RELA, base, off, val, len);
stand/boot/common/load_elf_obj.c
477
&r, ELF_RELOC_REL, base, off, val, len);
stand/boot/common/load_elf_obj.c
492
Elf_Addr base;
stand/boot/common/load_elf_obj.c
500
base = ef->e_shdr[sym.st_shndx].sh_addr;
stand/boot/common/load_elf_obj.c
501
if (base == 0)
stand/boot/common/load_elf_obj.c
503
return (base + sym.st_value);
stand/boot/common/module.c
771
#define INT_ALIGN(base, ptr) \
stand/boot/common/module.c
772
ptr = (base) + roundup2((ptr) - (base), sizeof(int))
stand/boot/common/rel_open.c
102
base = malloc(dlen + len + 2); /* room for trailing / */
stand/boot/common/rel_open.c
103
bcopy(DirBase, base, dlen);
stand/boot/common/rel_open.c
104
bcopy(path, base + dlen, len);
stand/boot/common/rel_open.c
105
base[dlen + len] = 0;
stand/boot/common/rel_open.c
108
if (stat(base, &st) == 0 && S_ISDIR(st.st_mode)) {
stand/boot/common/rel_open.c
109
p = b = w = s = base;
stand/boot/common/rel_open.c
127
while (w > base && w[-1] == '/')
stand/boot/common/rel_open.c
134
DirBase = base;
stand/boot/common/rel_open.c
137
free(base);
stand/boot/common/rel_open.c
82
char *base;
stand/boot/common/rel_open.c
96
base = malloc(len + 2); /* room for trailing / */
stand/boot/common/rel_open.c
97
bcopy(path, base, len + 1);
stand/boot/pc32/libi386/biosacpi.c
106
biosacpi_search_rsdp(char *base, int length)
stand/boot/pc32/libi386/biosacpi.c
114
rsdp = (ACPI_TABLE_RSDP *)PTOV(base + ofs);
stand/boot/pc32/libi386/biosacpi.c
43
static ACPI_TABLE_RSDP *biosacpi_search_rsdp(char *base, int length);
stand/boot/pc32/libi386/biosdisk.c
143
static void bd_chainextended(struct open_disk *od, u_int32_t base,
stand/boot/pc32/libi386/biosdisk.c
181
int base, unit, nfd = 0;
stand/boot/pc32/libi386/biosdisk.c
184
for (base = 0; base <= 0x80; base += 0x80) {
stand/boot/pc32/libi386/biosdisk.c
185
for (unit = base; (nbdinfo < MAXBDDEV); unit++) {
stand/boot/pc32/libi386/biosdisk.c
187
if((base == 0x80) &&
stand/boot/pc32/libi386/biosdisk.c
201
if (base == 0x80)
stand/boot/pc32/libi386/biosdisk.c
773
bd_chainextended(struct open_disk *od, u_int32_t base, u_int32_t offset)
stand/boot/pc32/libi386/biosdisk.c
779
if (bd_read(od, (daddr_t)(base + offset), 1, buf)) {
stand/boot/pc32/libi386/biosdisk.c
828
dp2->dp_start = base + offset + dp1->dp_start;
stand/boot/pc32/libi386/biosdisk.c
850
bd_chainextended(od, base, dp1->dp_start);
stand/boot/pc32/libi386/biosmem.c
67
(int)(smap.base >> 32), (int)smap.base,
stand/boot/pc32/libi386/biosmem.c
73
if ((smap.type == SMAP_TYPE_MEMORY) && (smap.base == 0) &&
stand/boot/pc32/libi386/biosmem.c
79
if ((smap.type == SMAP_TYPE_MEMORY) && (smap.base == 0x100000)) {
stand/boot/pc32/libi386/biossmap.c
100
heapbase - smap.base;
stand/boot/pc32/libi386/biossmap.c
104
if (smap.base + smap.length >= memtop) {
stand/boot/pc32/libi386/biossmap.c
105
if (smap.base + smap.length - memtop) {
stand/boot/pc32/libi386/biossmap.c
107
smapbase[smaplen].base = memtop;
stand/boot/pc32/libi386/biossmap.c
109
smap.base + smap.length -
stand/boot/pc32/libi386/biossmap.c
94
smap.base + smap.length > heapbase &&
stand/boot/pc32/libi386/biossmap.c
95
smap.base < memtop) {
stand/boot/pc32/libi386/biossmap.c
96
if (smap.base <= heapbase) {
stand/boot/pc32/libi386/biossmap.c
97
if (heapbase - smap.base) {
stand/boot/pc32/libi386/smbios.c
123
#define UUID_GET(base, off) (*(UUID_TYPE *)((base) + (off)))
stand/boot/pc32/libi386/smbios.c
64
#define SMBIOS_GET8(base, off) (*(uint8_t *)((base) + (off)))
stand/boot/pc32/libi386/smbios.c
65
#define SMBIOS_GET16(base, off) (*(uint16_t *)((base) + (off)))
stand/boot/pc32/libi386/smbios.c
66
#define SMBIOS_GET32(base, off) (*(uint32_t *)((base) + (off)))
stand/boot/pc32/libi386/smbios.c
68
#define SMBIOS_GETLEN(base) SMBIOS_GET8(base, 0x01)
stand/boot/pc32/libi386/smbios.c
69
#define SMBIOS_GETSTR(base) ((base) + SMBIOS_GETLEN(base))
stand/boot/pc32/loader/main.c
382
char *base;
stand/boot/pc32/loader/main.c
386
base = getheap(&bytes);
stand/boot/pc32/loader/main.c
387
printf("heap %p-%p (%d)\n", base, base + bytes, (int)bytes);
stand/lib/hammer1.c
284
r = hammer_btree_cmp(elm, &node->elms[i].leaf.base);
stand/lib/hammer1.c
444
hprintb(&node->elms[i].base);
stand/lib/hammer1.c
449
hprintb(&node->elms[node->count].base);
stand/lib/hammer1.c
460
r = hammer_btree_cmp(&search, &e->base);
stand/lib/hammer1.c
472
hprintb(&e->base);
stand/lib/hammer1.c
482
backtrack = (e+1)->base;
stand/lib/hammer1.c
486
r = hammer_btree_cmp(key, &e->base);
stand/lib/hammer1.c
494
while (n < node->count && e->base.delete_tid != 0) {
stand/lib/hammer1.c
518
hprintb(&e->base);
stand/lib/hammer1.c
523
if (hammer_btree_cmp(end, &e->base) < -1)
stand/lib/hammer1.c
600
*off = e->base.key + 1; // remember next pos
stand/lib/hammer1.c
603
de->d_type = hammer_get_dtype(e->base.obj_type);
stand/lib/hammer1.c
635
key.key = e->base.key + 1;
stand/lib/hammer1.c
751
if (e == NULL || off > e->base.key) {
stand/lib/hammer1.c
758
int64_t doff = e->base.key - e->data_len;
stand/lib/hammer2.c
274
h2lookup(struct hammer2_fs *hfs, hammer2_blockref_t *base,
stand/lib/hammer2.c
288
if (base == NULL) {
stand/lib/hammer2.c
292
if (base->data_off == (hammer2_off_t)-1) {
stand/lib/hammer2.c
300
switch(base->type) {
stand/lib/hammer2.c
308
count = blocksize(base) / sizeof(hammer2_blockref_t);
stand/lib/hammer2.c
328
if (base->type != HAMMER2_BREF_TYPE_VOLUME &&
stand/lib/hammer2.c
329
base->data_off != saved_base.data_off) {
stand/lib/hammer2.c
330
if (blocksize(base) && h2read(hfs, &media,
stand/lib/hammer2.c
331
blocksize(base),
stand/lib/hammer2.c
332
blockoff(base))) {
stand/lib/hammer2.c
336
saved_base = *base;
stand/lib/hammer2.c
342
if (base->type == HAMMER2_BREF_TYPE_INODE) {
stand/lib/hammer2.c
355
switch(base->type) {
stand/lib/printf.c
158
ksprintn(char *nbuf, uintmax_t num, int base, int *lenp, int upper)
stand/lib/printf.c
165
c = hex2ascii(num % base);
stand/lib/printf.c
167
} while (num /= base);
stand/lib/printf.c
185
int base, lflag, qflag, tmp, width, ladjust, sharpflag, neg, sign, dot;
stand/lib/printf.c
263
base = 10;
stand/lib/printf.c
300
base = 8;
stand/lib/printf.c
303
base = 16;
stand/lib/printf.c
336
base = 10;
stand/lib/printf.c
341
base = 16;
stand/lib/printf.c
387
p = ksprintn(nbuf, num, base, &n, upper);
stand/lib/printf.c
390
if (base == 8)
stand/lib/printf.c
392
else if (base == 16)
stand/lib/printf.c
408
if (base == 8) {
stand/lib/printf.c
410
} else if (base == 16) {
stand/lib/printf.c
62
static char *ksprintn (char *buf, uintmax_t num, int base, int *len, int upper);
stand/lib/sbrk.c
40
setheap(void *base, void *top)
stand/lib/sbrk.c
43
sbrkbase = (void *)(((uintptr_t)base + 15) & ~15);
stand/lib/strtol.c
106
if (c >= base)
stand/lib/strtol.c
112
acc *= base;
stand/lib/strtol.c
42
strtol(const char *nptr, char **endptr, int base)
stand/lib/strtol.c
68
if ((base == 0 || base == 16) &&
stand/lib/strtol.c
72
base = 16;
stand/lib/strtol.c
74
if (base == 0)
stand/lib/strtol.c
75
base = c == '0' ? 8 : 10;
stand/lib/strtol.c
95
cutlim = cutoff % (unsigned long)base;
stand/lib/strtol.c
96
cutoff /= (unsigned long)base;
stand/lib/strtoul.c
103
acc *= base;
stand/lib/strtoul.c
48
strtoul(const char * __restrict nptr, char ** __restrict endptr, int base)
stand/lib/strtoul.c
71
if ((base == 0 || base == 16) &&
stand/lib/strtoul.c
78
base = 16;
stand/lib/strtoul.c
80
if (base == 0)
stand/lib/strtoul.c
81
base = c == '0' ? 8 : 10;
stand/lib/strtoul.c
83
if (base < 2 || base > 36)
stand/lib/strtoul.c
86
cutoff = ULONG_MAX / base;
stand/lib/strtoul.c
87
cutlim = ULONG_MAX % base;
stand/lib/strtoul.c
97
if (c >= base)
stand/lib/zalloc.c
248
zextendPool(MemPool *mp, void *base, uintptr_t bytes)
stand/lib/zalloc.c
251
mp->mp_Base = base;
stand/lib/zalloc.c
253
mp->mp_End = (char *)base + bytes;
stand/lib/zalloc.c
258
if (base < mp->mp_Base) {
stand/lib/zalloc.c
259
mp->mp_Size += (char *)mp->mp_Base - (char *)base;
stand/lib/zalloc.c
260
mp->mp_Used += (char *)mp->mp_Base - (char *)base;
stand/lib/zalloc.c
261
mp->mp_Base = base;
stand/lib/zalloc.c
263
base = (char *)base + bytes;
stand/lib/zalloc.c
264
if (base > pend) {
stand/lib/zalloc.c
265
mp->mp_Size += (char *)base - (char *)pend;
stand/lib/zalloc.c
266
mp->mp_Used += (char *)base - (char *)pend;
stand/lib/zalloc.c
267
mp->mp_End = (char *)base;
stand/lib/zalloc_malloc.c
66
char *base;
stand/lib/zalloc_malloc.c
68
if ((base = sbrk(incr)) == (char *)-1)
stand/lib/zalloc_malloc.c
70
zextendPool(&MallocPool, base, incr);
stand/lib/zalloc_malloc.c
71
zfree(&MallocPool, base, incr);
stand/lib/zalloc_protos.h
37
Library void zextendPool(MemPool *mp, void *base, uintptr_t bytes);
sys/bus/iicbus/pcf/pcf.c
139
uintptr_t base;
sys/bus/iicbus/pcf/pcf.c
156
BUS_READ_IVAR(parent, pcfdev, ISA_IVAR_PORT, &base);
sys/bus/iicbus/pcf/pcf.c
157
pcf->pcf_base = base;
sys/bus/pci/pci.c
2531
pci_addr_t base;
sys/bus/pci/pci.c
2568
base = pci_mapbase(map);
sys/bus/pci/pci.c
2586
base |= (uint64_t) PCIB_READ_CONFIG(pcib, b, s, f, reg + 4, 4) << 32;
sys/bus/pci/pci.c
2589
reg, pci_maptype(map), ln2range, (uintmax_t)base, ln2size);
sys/bus/pci/pci.c
2609
if (!force && (base == 0 || map == testval))
sys/bus/pci/pci.c
2611
if ((u_long)base != base) {
sys/bus/pci/pci.c
2645
if (base == 0 || base == pci_mapbase(testval)) {
sys/bus/pci/pci.c
2649
start = base;
sys/bus/pci/pci.c
2650
end = base + (1 << ln2size) - 1;
sys/bus/pci/x86_64/pci_cfgreg.c
262
pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus)
sys/bus/pci/x86_64/pci_cfgreg.c
266
"bus [%d, %d]\n", (uintmax_t)base, minbus, maxbus);
sys/bus/pci/x86_64/pci_cfgreg.c
278
pcie_base = (vm_offset_t)pmap_mapdev_uncacheable(base,
sys/bus/pci/x86_64/pci_cfgreg.c
308
#define PCIE_VADDR(base, reg, bus, slot, func) \
sys/bus/pci/x86_64/pci_cfgreg.c
309
((base) + \
sys/bus/pci/x86_64/pci_cfgreg.h
49
int pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus);
sys/bus/pci/x86_64/pci_early_quirks.c
193
vm_paddr_t (*base)(int bus, int slot, int func);
sys/bus/pci/x86_64/pci_early_quirks.c
198
.base = intel_stolen_base_gen3,
sys/bus/pci/x86_64/pci_early_quirks.c
203
.base = intel_stolen_base_gen3,
sys/bus/pci/x86_64/pci_early_quirks.c
208
.base = intel_stolen_base_gen3,
sys/bus/pci/x86_64/pci_early_quirks.c
213
.base = intel_stolen_base_gen3,
sys/bus/pci/x86_64/pci_early_quirks.c
218
.base = intel_stolen_base_gen3,
sys/bus/pci/x86_64/pci_early_quirks.c
223
.base = intel_stolen_base_gen11,
sys/bus/pci/x86_64/pci_early_quirks.c
303
intel_graphics_stolen_base = ops->base(bus, slot, func);
sys/bus/u4b/wlan/if_mtw.c
1967
uint16_t base;
sys/bus/u4b/wlan/if_mtw.c
1997
base = MTW_SKEY(0, k->wk_keyix);
sys/bus/u4b/wlan/if_mtw.c
2000
base = MTW_PKEY(wcid);
sys/bus/u4b/wlan/if_mtw.c
2004
mtw_write_region_1(sc, base, k->wk_key, 16);
sys/bus/u4b/wlan/if_mtw.c
2005
mtw_write_region_1(sc, base + 16, &k->wk_key[24], 8);
sys/bus/u4b/wlan/if_mtw.c
2006
mtw_write_region_1(sc, base + 24, &k->wk_key[16], 8);
sys/bus/u4b/wlan/if_mtw.c
2009
mtw_write_region_1(sc, base, k->wk_key,
sys/bus/u4b/wlan/if_rum.c
2835
uint16_t base)
sys/bus/u4b/wlan/if_rum.c
2838
if (rum_write_multi(sc, base, k->wk_key, k->wk_keylen))
sys/bus/u4b/wlan/if_rum.c
2842
if (rum_write_multi(sc, base + IEEE80211_KEYBUF_SIZE,
sys/bus/u4b/wlan/if_rum.c
2845
if (rum_write_multi(sc, base + IEEE80211_KEYBUF_SIZE + 8,
sys/bus/u4b/wlan/if_run.c
1117
const u_char *base;
sys/bus/u4b/wlan/if_run.c
1145
base = fw->data;
sys/bus/u4b/wlan/if_run.c
1149
base += 4096;
sys/bus/u4b/wlan/if_run.c
1163
run_write_region_1(sc, RT2870_FW_BASE, base, 4096);
sys/bus/u4b/wlan/if_run.c
1202
(base == fw->data) ? "RT2870" : "RT3071",
sys/bus/u4b/wlan/if_run.c
1203
*(base + 4092), *(base + 4093));
sys/bus/u4b/wlan/if_run.c
2247
uint16_t base, associd;
sys/bus/u4b/wlan/if_run.c
2285
base = RT2860_SKEY(RUN_VAP(vap)->rvp_id, k->wk_keyix);
sys/bus/u4b/wlan/if_run.c
2289
base = RT2860_PKEY(wcid);
sys/bus/u4b/wlan/if_run.c
2293
if(run_write_region_1(sc, base, k->wk_key, 16))
sys/bus/u4b/wlan/if_run.c
2295
if(run_write_region_1(sc, base + 16, &k->wk_key[16], 8)) /* wk_txmic */
sys/bus/u4b/wlan/if_run.c
2297
if(run_write_region_1(sc, base + 24, &k->wk_key[24], 8)) /* wk_rxmic */
sys/bus/u4b/wlan/if_run.c
2301
if(run_write_region_1(sc, base, k->wk_key, (k->wk_keylen + 1) & ~1))
sys/bus/u4b/wlan/if_urtwn.c
4534
const struct urtwn_txpwr *base;
sys/bus/u4b/wlan/if_urtwn.c
4549
base = &rtl8188ru_txagc[chain];
sys/bus/u4b/wlan/if_urtwn.c
4551
base = &rtl8192cu_txagc[chain];
sys/bus/u4b/wlan/if_urtwn.c
4553
base = &rtl8192cu_txagc[chain];
sys/bus/u4b/wlan/if_urtwn.c
4558
power[ridx] = base->pwr[0][ridx];
sys/bus/u4b/wlan/if_urtwn.c
4562
power[ridx] = base->pwr[0][ridx];
sys/bus/u4b/wlan/if_urtwn.c
4573
power[ridx] = base->pwr[group][ridx];
sys/bus/u4b/wlan/if_urtwn.c
4575
power[ridx] = base->pwr[0][ridx];
sys/bus/u4b/wlan/if_urtwn.c
4633
const struct urtwn_r88e_txpwr *base;
sys/bus/u4b/wlan/if_urtwn.c
4652
base = &rtl8188eu_txagc[chain];
sys/bus/u4b/wlan/if_urtwn.c
4657
power[ridx] = base->pwr[0][ridx];
sys/bus/u4b/wlan/if_urtwn.c
4661
power[ridx] = base->pwr[0][ridx];
sys/bus/u4b/wlan/if_urtwn.c
4664
power[ridx] = base->pwr[group][ridx];
sys/bus/u4b/wlan/if_urtwn.c
4666
power[ridx] = base->pwr[0][ridx];
sys/cpu/x86_64/include/tls.h
114
info.base = tcb;
sys/cpu/x86_64/include/tls.h
121
tls_set_gs(void *base, size_t bytes)
sys/cpu/x86_64/include/tls.h
126
info.base = base;
sys/cpu/x86_64/misc/cputimer_tsc.c
79
timer->base = 0;
sys/cpu/x86_64/misc/cputimer_tsc.c
80
timer->base = oldclock - timer->count();
sys/cpu/x86_64/misc/cputimer_tsc.c
90
return (tsc + tsc_cputimer.base);
sys/cpu/x86_64/misc/db_disasm.c
1015
addrp->base = NULL;
sys/cpu/x86_64/misc/db_disasm.c
1017
addrp->base = "%eip";
sys/cpu/x86_64/misc/db_disasm.c
1019
addrp->base = "%rip";
sys/cpu/x86_64/misc/db_disasm.c
1022
addrp->base = db_reg[1][size][rm];
sys/cpu/x86_64/misc/db_disasm.c
1029
addrp->base = db_reg[1][size][rm];
sys/cpu/x86_64/misc/db_disasm.c
1035
addrp->base = db_reg[1][size][rm];
sys/cpu/x86_64/misc/db_disasm.c
1053
if (addrp->disp != 0 || (addrp->base == NULL && addrp->index == NULL))
sys/cpu/x86_64/misc/db_disasm.c
1055
if (addrp->base != NULL || addrp->index != NULL) {
sys/cpu/x86_64/misc/db_disasm.c
1057
if (addrp->base)
sys/cpu/x86_64/misc/db_disasm.c
1058
db_printf("%s", addrp->base);
sys/cpu/x86_64/misc/db_disasm.c
918
const char * base;
sys/dev/acpica/Osd/OsdMemory.c
106
track->base = map;
sys/dev/acpica/Osd/OsdMemory.c
142
if (track->base == LogicalAddress && track->size == Length) {
sys/dev/acpica/Osd/OsdMemory.c
144
pmap_unmapdev((vm_offset_t)track->base, track->size);
sys/dev/acpica/Osd/OsdMemory.c
157
if ((char *)LogicalAddress <= (char *)track->base &&
sys/dev/acpica/Osd/OsdMemory.c
158
(char *)LogicalAddress + Length >= (char *)track->base + track->size
sys/dev/acpica/Osd/OsdMemory.c
161
pmap_unmapdev((vm_offset_t)track->base, track->size);
sys/dev/acpica/Osd/OsdMemory.c
165
track->base, (intmax_t)track->size);
sys/dev/acpica/Osd/OsdMemory.c
179
if ((char *)LogicalAddress + Length >= (char *)track->base &&
sys/dev/acpica/Osd/OsdMemory.c
180
(char *)LogicalAddress < (char *)track->base + track->size
sys/dev/acpica/Osd/OsdMemory.c
185
track->base, (intmax_t)track->size);
sys/dev/acpica/Osd/OsdMemory.c
192
if (track->freed && track->base == LogicalAddress) {
sys/dev/acpica/Osd/OsdMemory.c
46
void *base;
sys/dev/acpica/Osd/OsdMemory.c
97
if (track->base == map)
sys/dev/acpica/acpi_hpet.c
149
last_counter = acpi_hpet_timer.base;
sys/dev/acpica/acpi_hpet.c
156
if (atomic_fcmpset_long(&acpi_hpet_timer.base, &last_counter,
sys/dev/acpica/acpi_hpet.c
175
timer->base = oldclock;
sys/dev/acpica/acpi_hpet.c
528
timer->base = oldclock;
sys/dev/acpica/acpi_hpet.c
538
last_counter = acpi_hpet_timer.base;
sys/dev/acpica/acpi_hpet.c
545
if (atomic_fcmpset_long(&acpi_hpet_timer.base, &last_counter,
sys/dev/acpica/acpi_resource.c
444
uint64_t base, uint64_t length);
sys/dev/acpica/acpi_resource.c
449
uint64_t base, uint64_t length);
sys/dev/acpica/acpi_resource.c
508
acpi_res_set_ioport(device_t dev, void *context, uint64_t base,
sys/dev/acpica/acpi_resource.c
515
bus_set_resource(dev, SYS_RES_IOPORT, cp->ar_nio++, base, length, -1);
sys/dev/acpica/acpi_resource.c
523
uint64_t base;
sys/dev/acpica/acpi_resource.c
530
base = roundup(low, align);
sys/dev/acpica/acpi_resource.c
531
if (base + length - 1 <= high) {
sys/dev/acpica/acpi_resource.c
532
acpi_res_set_ioport(dev, context, base, length);
sys/dev/acpica/acpi_resource.c
540
acpi_res_set_memory(device_t dev, void *context, uint64_t base,
sys/dev/acpica/acpi_resource.c
548
bus_set_resource(dev, SYS_RES_MEMORY, cp->ar_nmem++, base, length, -1);
sys/dev/acpica/acpi_smbat.c
126
uint32_t base;
sys/dev/acpica/acpi_smbat.c
130
if (ACPI_FAILURE(acpi_GetInteger(acpi_get_handle(dev), "_EC", &base))) {
sys/dev/acpica/acpi_smbat.c
134
sc->sb_base_addr = (base >> 8) & 0xff;
sys/dev/acpica/acpi_timer.c
231
timer->base = oldclock;
sys/dev/acpica/acpi_timer.c
241
last_counter = acpi_cputimer.base;
sys/dev/acpica/acpi_timer.c
248
if (atomic_fcmpset_long(&acpi_cputimer.base, &last_counter,
sys/dev/acpica/acpi_timer.c
263
last_counter = acpi_cputimer.base;
sys/dev/acpica/acpi_timer.c
270
if (atomic_fcmpset_long(&acpi_cputimer.base, &last_counter,
sys/dev/acpica/acpi_timer.c
285
last_counter = acpi_cputimer.base;
sys/dev/acpica/acpi_timer.c
299
if (atomic_fcmpset_long(&acpi_cputimer.base, &last_counter,
sys/dev/acpica/acpivar.h
388
void (*set_ioport)(device_t dev, void *context, uint64_t base,
sys/dev/acpica/acpivar.h
392
void (*set_memory)(device_t dev, void *context, uint64_t base,
sys/dev/agp/intel-gtt.c
1640
intel_private.base = agp_intel_gtt_get(intel_agp);
sys/dev/agp/intel-gtt.c
1642
*gtt_total = intel_private.base.gtt_total_entries << PAGE_SHIFT;
sys/dev/agp/intel-gtt.c
1645
*mappable_end = intel_private.base.gtt_mappable_entries << PAGE_SHIFT;
sys/dev/agp/intel-gtt.c
195
struct intel_gtt base;
sys/dev/crypto/tpm/tpm_crb.c
157
sc = &crb_sc->base;
sys/dev/crypto/tpm/tpm_crb.c
80
struct tpm_sc base;
sys/dev/disk/ahci/ahci_cam.c
1889
const char *base = *basep;
sys/dev/disk/ahci/ahci_cam.c
1892
while (len && (*base == 0 || *base == ' ')) {
sys/dev/disk/ahci/ahci_cam.c
1894
++base;
sys/dev/disk/ahci/ahci_cam.c
1896
while (len && (base[len-1] == 0 || base[len-1] == ' '))
sys/dev/disk/ahci/ahci_cam.c
1898
*basep = base;
sys/dev/disk/isp/isp.c
7908
uint32_t base = 0x7ffe0000;
sys/dev/disk/isp/isp.c
7912
base = 0x7ff00000 | 0x48000;
sys/dev/disk/isp/isp.c
7914
ISP_WRITE(isp, BIU2400_FLASH_ADDR, base | addr);
sys/dev/disk/isp/isp_pci.c
1481
caddr_t base;
sys/dev/disk/isp/isp_pci.c
1600
if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &isp->isp_osinfo.cdmap) != 0) {
sys/dev/disk/isp/isp_pci.c
1614
im.vbase = base;
sys/dev/disk/isp/isp_pci.c
1617
bus_dmamap_load(isp->isp_osinfo.cdmat, isp->isp_osinfo.cdmap, base, len, imc, &im, 0);
sys/dev/disk/isp/isp_pci.c
1629
if (bus_dmamem_alloc(fc->tdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &fc->tdmap) != 0) {
sys/dev/disk/isp/isp_pci.c
1635
im.vbase = base;
sys/dev/disk/isp/isp_pci.c
1637
bus_dmamap_load(fc->tdmat, fc->tdmap, base, ISP_FC_SCRLEN, imc1, &im, 0);
sys/dev/disk/isp/isp_pci.c
1639
bus_dmamem_free(fc->tdmat, base, fc->tdmap);
sys/dev/disk/isp/isp_pci.c
1670
bus_dmamem_free(fc->tdmat, base, fc->tdmap);
sys/dev/disk/isp/isp_pci.c
1673
bus_dmamem_free(isp->isp_osinfo.cdmat, base, isp->isp_osinfo.cdmap);
sys/dev/disk/ncr/ncr.c
295
#define READSCRIPT_OFF(base, off) \
sys/dev/disk/ncr/ncr.c
296
(base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
sys/dev/disk/ncr/ncr.c
299
#define WRITESCRIPT_OFF(base, off, val) \
sys/dev/disk/ncr/ncr.c
301
if (base) \
sys/dev/disk/ncr/ncr.c
303
((volatile char *)base + (off))) = (val); \
sys/dev/disk/sili/sili_cam.c
1769
const char *base = *basep;
sys/dev/disk/sili/sili_cam.c
1772
while (len && (*base == 0 || *base == ' ')) {
sys/dev/disk/sili/sili_cam.c
1774
++base;
sys/dev/disk/sili/sili_cam.c
1776
while (len && (base[len-1] == 0 || base[len-1] == ' '))
sys/dev/disk/sili/sili_cam.c
1778
*basep = base;
sys/dev/drm/amd/amdgpu/amdgpu.h
393
resource_size_t base;
sys/dev/drm/amd/amdgpu/amdgpu.h
494
uint64_t base;
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c
115
*aperture_base = adev->doorbell.base;
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.h
74
struct dma_fence base;
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1019
uint64_t base = page_table_base | AMDGPU_PTE_VALID;
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1039
WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2), lower_32_bits(base));
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1040
WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2), upper_32_bits(base));
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1050
WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2), lower_32_bits(base));
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
1051
WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2), upper_32_bits(base));
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
376
uint32_t base[2] = {
sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
384
retval = base[engine_id] + queue_id * (mmSDMA0_RLC1_RB_CNTL -
sys/dev/drm/amd/amdgpu/amdgpu_cgs.c
34
struct cgs_device base;
sys/dev/drm/amd/amdgpu/amdgpu_cgs.c
495
cgs_device->base.ops = &amdgpu_cgs_ops;
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1562
connector = &amdgpu_connector->base;
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1593
drm_connector_init(dev, &amdgpu_connector->base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1595
drm_connector_helper_add(&amdgpu_connector->base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1600
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1603
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1612
drm_connector_init(dev, &amdgpu_connector->base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1614
drm_connector_helper_add(&amdgpu_connector->base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1616
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1619
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1622
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1626
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1630
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1635
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1647
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1654
drm_connector_init(dev, &amdgpu_connector->base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1656
drm_connector_helper_add(&amdgpu_connector->base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1658
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1669
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_vga_funcs, connector_type);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1670
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1677
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1680
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1689
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_vga_funcs, connector_type);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1690
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1697
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1700
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1714
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dvi_funcs, connector_type);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1715
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1722
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1725
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1728
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1731
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1734
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1739
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1743
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1748
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1764
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dvi_funcs, connector_type);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1765
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1771
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1774
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1777
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1780
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1783
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1787
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1791
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1806
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dp_funcs, connector_type);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1807
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1816
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1819
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1822
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1825
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1828
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1832
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1836
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1848
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_edp_funcs, connector_type);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1849
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1857
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1869
drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_lvds_funcs, connector_type);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1870
drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_lvds_helper_funcs);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
1876
drm_object_attach_property(&amdgpu_connector->base.base,
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
491
amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
506
amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
521
amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
535
amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
549
amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
563
amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
603
amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
sys/dev/drm/amd/amdgpu/amdgpu_connectors.c
808
amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
1217
r = drm_sched_job_init(&job->base, entity, p->filp);
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
1233
p->fence = dma_fence_get(&job->base.s_fence->finished);
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
1253
priority = job->base.s_priority;
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
1254
drm_sched_entity_push_job(&job->base, entity);
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
1267
dma_fence_put(&job->base.s_fence->finished);
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
1268
job->base.s_fence = NULL;
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
1648
if (!mapping || !mapping->bo_va || !mapping->bo_va->base.bo)
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
1651
*bo = mapping->bo_va->base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
960
r = reservation_object_reserve_shared(vm->root.base.bo->tbo.resv);
sys/dev/drm/amd/amdgpu/amdgpu_cs.c
964
p->job->vm_pd_addr = amdgpu_gmc_pd_addr(vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_device.c
3414
if (job && job->base.sched != &ring->sched)
sys/dev/drm/amd/amdgpu/amdgpu_device.c
3417
drm_sched_hw_job_reset(&ring->sched, job ? &job->base : NULL);
sys/dev/drm/amd/amdgpu/amdgpu_device.c
3438
if ((!job || job->base.sched == &ring->sched) && !r)
sys/dev/drm/amd/amdgpu/amdgpu_device.c
517
adev->doorbell.base = 0;
sys/dev/drm/amd/amdgpu/amdgpu_device.c
528
adev->doorbell.base = pci_resource_start(adev->pdev, 2);
sys/dev/drm/amd/amdgpu/amdgpu_device.c
536
adev->doorbell.ptr = ioremap(adev->doorbell.base,
sys/dev/drm/amd/amdgpu/amdgpu_display.c
109
adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base, work->async);
sys/dev/drm/amd/amdgpu/amdgpu_display.c
214
work->base = amdgpu_bo_gpu_offset(new_abo);
sys/dev/drm/amd/amdgpu/amdgpu_display.c
512
rfb->base.obj[0] = obj;
sys/dev/drm/amd/amdgpu/amdgpu_display.c
513
drm_helper_mode_fill_fb_struct(dev, &rfb->base, mode_cmd);
sys/dev/drm/amd/amdgpu/amdgpu_display.c
514
ret = drm_framebuffer_init(dev, &rfb->base, &amdgpu_fb_funcs);
sys/dev/drm/amd/amdgpu/amdgpu_display.c
516
rfb->base.obj[0] = NULL;
sys/dev/drm/amd/amdgpu/amdgpu_display.c
557
return &amdgpu_fb->base;
sys/dev/drm/amd/amdgpu/amdgpu_display.c
78
struct drm_crtc *crtc = &amdgpu_crtc->base;
sys/dev/drm/amd/amdgpu/amdgpu_display.h
33
#define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base), (async))
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
255
fb = &rfbdev->rfb.base;
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
288
info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base;
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
327
if (rfb->base.obj[0]) {
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
328
amdgpufb_destroy_pinned_object(rfb->base.obj[0]);
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
329
rfb->base.obj[0] = NULL;
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
330
drm_framebuffer_unregister_private(&rfb->base);
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
331
drm_framebuffer_cleanup(&rfb->base);
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
414
robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]);
sys/dev/drm/amd/amdgpu/amdgpu_fb.c
423
if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]))
sys/dev/drm/amd/amdgpu/amdgpu_fence.c
148
dma_fence_init(&fence->base, &amdgpu_fence_ops,
sys/dev/drm/amd/amdgpu/amdgpu_fence.c
165
rcu_assign_pointer(*ptr, dma_fence_get(&fence->base));
sys/dev/drm/amd/amdgpu/amdgpu_fence.c
167
*f = &fence->base;
sys/dev/drm/amd/amdgpu/amdgpu_fence.c
51
struct dma_fence base;
sys/dev/drm/amd/amdgpu/amdgpu_fence.c
619
DMA_FENCE_TRACE(&fence->base, "armed on ring %i!\n", ring->idx);
sys/dev/drm/amd/amdgpu/amdgpu_fence.c
80
struct amdgpu_fence *__f = container_of(f, struct amdgpu_fence, base);
sys/dev/drm/amd/amdgpu/amdgpu_fence.c
82
if (__f->base.ops == &amdgpu_fence_ops)
sys/dev/drm/amd/amdgpu/amdgpu_gem.c
136
abo->tbo.resv != vm->root.base.bo->tbo.resv)
sys/dev/drm/amd/amdgpu/amdgpu_gem.c
253
r = amdgpu_bo_reserve(vm->root.base.bo, false);
sys/dev/drm/amd/amdgpu/amdgpu_gem.c
257
resv = vm->root.base.bo->tbo.resv;
sys/dev/drm/amd/amdgpu/amdgpu_gem.c
267
abo->parent = amdgpu_bo_ref(vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_gem.c
269
amdgpu_bo_unreserve(vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_gem.c
638
r = amdgpu_vm_alloc_pts(adev, bo_va->base.vm, args->va_address,
sys/dev/drm/amd/amdgpu/amdgpu_gem.c
658
r = amdgpu_vm_alloc_pts(adev, bo_va->base.vm, args->va_address,
sys/dev/drm/amd/amdgpu/amdgpu_gmc.c
116
u64 base)
sys/dev/drm/amd/amdgpu/amdgpu_gmc.c
120
mc->vram_start = base;
sys/dev/drm/amd/amdgpu/amdgpu_gmc.h
194
u64 base);
sys/dev/drm/amd/amdgpu/amdgpu_ib.c
143
fence_ctx = job->base.s_fence->scheduled.context;
sys/dev/drm/amd/amdgpu/amdgpu_ids.c
141
fence = &array->base;
sys/dev/drm/amd/amdgpu/amdgpu_ids.c
248
r = amdgpu_sync_fence(adev, sync, &array->base, false);
sys/dev/drm/amd/amdgpu/amdgpu_ids.c
250
ring->vmid_wait = &array->base;
sys/dev/drm/amd/amdgpu/amdgpu_job.c
104
f = job->base.s_fence ? &job->base.s_fence->finished : job->fence;
sys/dev/drm/amd/amdgpu/amdgpu_job.c
142
r = drm_sched_job_init(&job->base, entity, owner);
sys/dev/drm/amd/amdgpu/amdgpu_job.c
147
*f = dma_fence_get(&job->base.s_fence->finished);
sys/dev/drm/amd/amdgpu/amdgpu_job.c
149
priority = job->base.s_priority;
sys/dev/drm/amd/amdgpu/amdgpu_job.c
150
drm_sched_entity_push_job(&job->base, entity);
sys/dev/drm/amd/amdgpu/amdgpu_job.c
163
job->base.sched = &ring->sched;
sys/dev/drm/amd/amdgpu/amdgpu_job.c
195
&job->base.s_fence->finished,
sys/dev/drm/amd/amdgpu/amdgpu_job.c
214
finished = &job->base.s_fence->finished;
sys/dev/drm/amd/amdgpu/amdgpu_job.c
43
job->base.sched->name, atomic_read(&ring->fence_drv.last_seq),
sys/dev/drm/amd/amdgpu/amdgpu_job.c
68
(*job)->base.sched = &adev->rings[0]->sched;
sys/dev/drm/amd/amdgpu/amdgpu_job.c
99
struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched);
sys/dev/drm/amd/amdgpu/amdgpu_job.h
34
container_of((sched_job), struct amdgpu_job, base)
sys/dev/drm/amd/amdgpu/amdgpu_job.h
39
struct drm_sched_job base;
sys/dev/drm/amd/amdgpu/amdgpu_kms.c
1071
pd = amdgpu_bo_ref(fpriv->vm.root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_kms.c
1137
&adev->mode_info.crtcs[pipe]->base.hwmode);
sys/dev/drm/amd/amdgpu/amdgpu_kms.c
493
if (crtc && crtc->base.id == info->mode_crtc.id) {
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
310
struct drm_framebuffer base;
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
389
struct drm_crtc base;
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
440
struct drm_plane base;
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
463
struct drm_encoder base;
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
537
struct i2c_adapter base;
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
545
struct drm_connector base;
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
56
#define to_amdgpu_crtc(x) container_of(x, struct amdgpu_crtc, base)
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
569
struct amdgpu_connector base;
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
57
#define to_amdgpu_connector(x) container_of(x, struct amdgpu_connector, base)
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
58
#define to_amdgpu_encoder(x) container_of(x, struct amdgpu_encoder, base)
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
59
#define to_amdgpu_framebuffer(x) container_of(x, struct amdgpu_framebuffer, base)
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
60
#define to_amdgpu_plane(x) container_of(x, struct amdgpu_plane, base)
sys/dev/drm/amd/amdgpu/amdgpu_mode.h
62
#define to_dm_plane_state(x) container_of(x, struct dm_plane_state, base);
sys/dev/drm/amd/amdgpu/amdgpu_object.c
1127
lockdep_assert_held(&bo->tbo.resv->lock.base);
sys/dev/drm/amd/amdgpu/amdgpu_object.h
61
struct amdgpu_vm_bo_base base;
sys/dev/drm/amd/amdgpu/amdgpu_prime.c
227
reservation_object_add_excl_fence(obj, &array->base);
sys/dev/drm/amd/amdgpu/amdgpu_prime.c
228
dma_fence_put(&array->base);
sys/dev/drm/amd/amdgpu/amdgpu_ttm.c
755
mem->bus.base = 0;
sys/dev/drm/amd/amdgpu/amdgpu_ttm.c
779
mem->bus.base = adev->gmc.aper_base;
sys/dev/drm/amd/amdgpu/amdgpu_ttm.c
799
return (bo->mem.bus.base >> PAGE_SHIFT) + mm->start +
sys/dev/drm/amd/amdgpu/amdgpu_virt.c
102
r = amdgpu_vm_alloc_pts(adev, (*bo_va)->base.vm, csa_addr,
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1012
pt->parent = amdgpu_bo_ref(cursor.parent->base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1014
amdgpu_vm_bo_base_init(&entry->base, vm, pt);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1041
if (entry->base.bo) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1042
entry->base.bo->vm_bo = NULL;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1043
list_del(&entry->base.vm_status);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1044
amdgpu_bo_unref(&entry->base.bo->shadow);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1045
amdgpu_bo_unref(&entry->base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1050
BUG_ON(vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1250
struct amdgpu_vm_bo_base *base;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1252
for (base = bo->vm_bo; base; base = base->next) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1253
if (base->vm != vm)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1256
return container_of(base, struct amdgpu_bo_va, base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1402
amdgpu_sync_resv(adev, &sync, vm->root.base.bo->tbo.resv, owner, false);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1440
struct amdgpu_bo *bo = parent->base.bo, *pbo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1452
amdgpu_gmc_get_pde_for_bo(entry->base.bo, level, &pt, &flags);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1472
if (entry->base.bo && !entry->base.moved)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1473
amdgpu_vm_bo_relocated(&entry->base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1522
base.vm_status);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1523
amdgpu_vm_bo_idle(&entry->base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1543
struct amdgpu_bo *root = vm->root.base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1685
struct amdgpu_bo *pt = cursor.entry->base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1703
amdgpu_vm_bo_relocated(&cursor.entry->base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1849
if (vm->root.base.bo->shadow)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1871
if (vm->root.base.bo->shadow)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1906
r = amdgpu_sync_resv(adev, &job->sync, vm->root.base.bo->tbo.resv,
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1911
r = reservation_object_reserve_shared(vm->root.base.bo->tbo.resv);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
1925
amdgpu_bo_fence(vm->root.base.bo, f, true);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2072
struct amdgpu_bo *bo = bo_va->base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2073
struct amdgpu_vm *vm = bo_va->base.vm;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2103
if (clear || (bo && bo->tbo.resv == vm->root.base.bo->tbo.resv))
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2108
if (!clear && bo_va->base.moved) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2109
bo_va->base.moved = false;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2134
if (bo && bo->tbo.resv == vm->root.base.bo->tbo.resv) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2138
amdgpu_vm_bo_evicted(&bo_va->base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2140
amdgpu_vm_bo_idle(&bo_va->base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2142
amdgpu_vm_bo_done(&bo_va->base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2272
struct reservation_object *resv = vm->root.base.bo->tbo.resv;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2375
list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2385
base.vm_status);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2386
resv = bo_va->base.bo->tbo.resv;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2434
amdgpu_vm_bo_base_init(&bo_va->base, vm, bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2457
struct amdgpu_vm *vm = bo_va->base.vm;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2458
struct amdgpu_bo *bo = bo_va->base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2467
if (bo && bo->tbo.resv == vm->root.base.bo->tbo.resv &&
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2468
!bo_va->base.moved) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2469
list_move(&bo_va->base.vm_status, &vm->moved);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2499
struct amdgpu_bo *bo = bo_va->base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2500
struct amdgpu_vm *vm = bo_va->base.vm;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2564
struct amdgpu_bo *bo = bo_va->base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2584
r = amdgpu_vm_bo_clear_mappings(adev, bo_va->base.vm, saddr, size);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2622
struct amdgpu_vm *vm = bo_va->base.vm;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2798
if (mapping->bo_va && mapping->bo_va->base.bo) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2801
bo = mapping->bo_va->base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2825
struct amdgpu_bo *bo = bo_va->base.bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2826
struct amdgpu_vm *vm = bo_va->base.vm;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2827
struct amdgpu_vm_bo_base **base;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2830
if (bo->tbo.resv == vm->root.base.bo->tbo.resv)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2833
for (base = &bo_va->base.bo->vm_bo; *base;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2834
base = &(*base)->next) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2835
if (*base != &bo_va->base)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2838
*base = bo_va->base.next;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2844
list_del(&bo_va->base.vm_status);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2886
if (evicted && bo->tbo.resv == vm->root.base.bo->tbo.resv) {
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
2897
else if (bo->tbo.resv == vm->root.base.bo->tbo.resv)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3107
amdgpu_vm_bo_base_init(&vm->root.base, vm, root);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3108
amdgpu_bo_unreserve(vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3137
amdgpu_bo_unreserve(vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3140
amdgpu_bo_unref(&vm->root.base.bo->shadow);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3141
amdgpu_bo_unref(&vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3142
vm->root.base.bo = NULL;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3175
r = amdgpu_bo_reserve(vm->root.base.bo, true);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3202
r = amdgpu_vm_clear_bo(adev, vm, vm->root.base.bo,
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3233
amdgpu_bo_unref(&vm->root.base.bo->shadow);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3249
amdgpu_bo_unreserve(vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
3345
root = amdgpu_bo_ref(vm->root.base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
391
static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
395
base->vm = vm;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
396
base->bo = bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
397
base->next = NULL;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
398
INIT_LIST_HEAD(&base->vm_status);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
402
base->next = bo->vm_bo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
403
bo->vm_bo = base;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
405
if (bo->tbo.resv != vm->root.base.bo->tbo.resv)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
410
amdgpu_vm_bo_relocated(base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
412
amdgpu_vm_bo_idle(base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
423
amdgpu_vm_bo_evicted(base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
436
struct amdgpu_bo *parent = pt->base.bo->parent;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
441
return container_of(parent->vm_bo, struct amdgpu_vm_pt, base);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
492
BUG_ON(!cursor->entry->base.bo);
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
684
entry->tv.bo = &vm->root.base.bo->tbo;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
925
else if (!vm->root.base.bo || vm->root.base.bo->shadow)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
928
if (vm->root.base.bo)
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
929
bp->resv = vm->root.base.bo->tbo.resv;
sys/dev/drm/amd/amdgpu/amdgpu_vm.c
990
if (entry->base.bo)
sys/dev/drm/amd/amdgpu/amdgpu_vm.h
142
struct amdgpu_vm_bo_base base;
sys/dev/drm/amd/amdgpu/atom.c
101
static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
sys/dev/drm/amd/amdgpu/atom.c
107
switch (CU8(base)) {
sys/dev/drm/amd/amdgpu/atom.c
109
base++;
sys/dev/drm/amd/amdgpu/atom.c
112
temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
sys/dev/drm/amd/amdgpu/atom.c
113
base += 3;
sys/dev/drm/amd/amdgpu/atom.c
116
ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
sys/dev/drm/amd/amdgpu/atom.c
117
base += 3;
sys/dev/drm/amd/amdgpu/atom.c
1200
int base = CU16(ctx->cmd_table + 4 + 2 * index);
sys/dev/drm/amd/amdgpu/atom.c
1206
if (!base)
sys/dev/drm/amd/amdgpu/atom.c
1209
len = CU16(base + ATOM_CT_SIZE_PTR);
sys/dev/drm/amd/amdgpu/atom.c
121
~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
sys/dev/drm/amd/amdgpu/atom.c
1210
ws = CU8(base + ATOM_CT_WS_PTR);
sys/dev/drm/amd/amdgpu/atom.c
1211
ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
sys/dev/drm/amd/amdgpu/atom.c
1212
ptr = base + ATOM_CT_CODE_PTR;
sys/dev/drm/amd/amdgpu/atom.c
1214
SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
sys/dev/drm/amd/amdgpu/atom.c
1218
ectx.start = base;
sys/dev/drm/amd/amdgpu/atom.c
122
CU8(base + 2));
sys/dev/drm/amd/amdgpu/atom.c
123
base += 3;
sys/dev/drm/amd/amdgpu/atom.c
1236
base, len, ws, ps, ptr - 1);
sys/dev/drm/amd/amdgpu/atom.c
127
(0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
sys/dev/drm/amd/amdgpu/atom.c
1282
static void atom_index_iio(struct atom_context *ctx, int base)
sys/dev/drm/amd/amdgpu/atom.c
1287
while (CU8(base) == ATOM_IIO_START) {
sys/dev/drm/amd/amdgpu/atom.c
1288
ctx->iio[CU8(base + 1)] = base + 2;
sys/dev/drm/amd/amdgpu/atom.c
1289
base += 2;
sys/dev/drm/amd/amdgpu/atom.c
129
base += 3;
sys/dev/drm/amd/amdgpu/atom.c
1290
while (CU8(base) != ATOM_IIO_END)
sys/dev/drm/amd/amdgpu/atom.c
1291
base += atom_iio_len[CU8(base)];
sys/dev/drm/amd/amdgpu/atom.c
1292
base += 3;
sys/dev/drm/amd/amdgpu/atom.c
1298
int base;
sys/dev/drm/amd/amdgpu/atom.c
1323
base = CU16(ATOM_ROM_TABLE_PTR);
sys/dev/drm/amd/amdgpu/atom.c
1325
(CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
sys/dev/drm/amd/amdgpu/atom.c
133
~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
sys/dev/drm/amd/amdgpu/atom.c
1332
ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
sys/dev/drm/amd/amdgpu/atom.c
1333
ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
sys/dev/drm/amd/amdgpu/atom.c
134
CU8(base + 3));
sys/dev/drm/amd/amdgpu/atom.c
136
((index >> CU8(base + 2)) &
sys/dev/drm/amd/amdgpu/atom.c
137
(0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
sys/dev/drm/amd/amdgpu/atom.c
139
base += 4;
sys/dev/drm/amd/amdgpu/atom.c
143
~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
sys/dev/drm/amd/amdgpu/atom.c
144
CU8(base + 3));
sys/dev/drm/amd/amdgpu/atom.c
146
((data >> CU8(base + 2)) &
sys/dev/drm/amd/amdgpu/atom.c
147
(0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
sys/dev/drm/amd/amdgpu/atom.c
149
base += 4;
sys/dev/drm/amd/amdgpu/atom.c
153
~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
sys/dev/drm/amd/amdgpu/atom.c
154
CU8(base + 3));
sys/dev/drm/amd/amdgpu/atom.c
157
io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
sys/dev/drm/amd/amdgpu/atom.c
159
(base
sys/dev/drm/amd/amdgpu/atom.c
162
<< CU8(base + 3);
sys/dev/drm/amd/amdgpu/atom.c
163
base += 4;
sys/dev/drm/amd/amdgpu/atombios_crtc.c
459
SET_PIXEL_CLOCK_PS_ALLOCATION base;
sys/dev/drm/amd/amdgpu/atombios_dp.c
114
amdgpu_atombios_copy_swap(recv, base + 16, recv_bytes, false);
sys/dev/drm/amd/amdgpu/atombios_dp.c
192
amdgpu_connector->ddc_bus->aux.dev = amdgpu_connector->base.kdev;
sys/dev/drm/amd/amdgpu/atombios_dp.c
313
struct drm_device *dev = amdgpu_connector->base.dev;
sys/dev/drm/amd/amdgpu/atombios_dp.c
66
unsigned char *base;
sys/dev/drm/amd/amdgpu/atombios_dp.c
74
base = (unsigned char *)(adev->mode_info.atom_context->scratch + 1);
sys/dev/drm/amd/amdgpu/atombios_dp.c
76
amdgpu_atombios_copy_swap(base, send, send_bytes, true);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1250
struct drm_device *dev = amdgpu_connector->base.dev;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
153
struct drm_device *dev = amdgpu_encoder->base.dev;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
207
struct drm_device *dev = amdgpu_encoder->base.dev;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
2071
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
300
struct drm_device *dev = amdgpu_encoder->base.dev;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
70
struct drm_device *dev = amdgpu_encoder->base.dev;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
83
struct drm_encoder *encoder = &amdgpu_encoder->base;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
84
struct drm_device *dev = amdgpu_encoder->base.dev;
sys/dev/drm/amd/amdgpu/atombios_i2c.c
104
amdgpu_atombios_copy_swap(buf, base, num, false);
sys/dev/drm/amd/amdgpu/atombios_i2c.c
46
unsigned char *base;
sys/dev/drm/amd/amdgpu/atombios_i2c.c
54
base = (unsigned char *)adev->mode_info.atom_context->scratch;
sys/dev/drm/amd/amdgpu/dce_v10_0.c
1017
struct drm_display_mode *mode = &amdgpu_crtc->base.mode;
sys/dev/drm/amd/amdgpu/dce_v10_0.c
1024
if (amdgpu_crtc->base.enabled && num_heads && mode) {
sys/dev/drm/amd/amdgpu/dce_v10_0.c
1154
if (adev->mode_info.crtcs[i]->base.enabled)
sys/dev/drm/amd/amdgpu/dce_v10_0.c
1158
mode = &adev->mode_info.crtcs[i]->base.mode;
sys/dev/drm/amd/amdgpu/dce_v10_0.c
2674
drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v10_0_crtc_funcs);
sys/dev/drm/amd/amdgpu/dce_v10_0.c
2676
drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
sys/dev/drm/amd/amdgpu/dce_v10_0.c
2711
drm_crtc_helper_add(&amdgpu_crtc->base, &dce_v10_0_crtc_helper_funcs);
sys/dev/drm/amd/amdgpu/dce_v10_0.c
3147
drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
sys/dev/drm/amd/amdgpu/dce_v10_0.c
3151
drm_crtc_vblank_put(&amdgpu_crtc->base);
sys/dev/drm/amd/amdgpu/dce_v10_0.c
3477
encoder = &amdgpu_encoder->base;
sys/dev/drm/amd/amdgpu/dce_v10_0.c
595
if (amdgpu_crtc->base.enabled && mode) {
sys/dev/drm/amd/amdgpu/dce_v10_0.c
630
if (amdgpu_crtc->base.enabled && mode) {
sys/dev/drm/amd/amdgpu/dce_v11_0.c
1043
struct drm_display_mode *mode = &amdgpu_crtc->base.mode;
sys/dev/drm/amd/amdgpu/dce_v11_0.c
1050
if (amdgpu_crtc->base.enabled && num_heads && mode) {
sys/dev/drm/amd/amdgpu/dce_v11_0.c
1180
if (adev->mode_info.crtcs[i]->base.enabled)
sys/dev/drm/amd/amdgpu/dce_v11_0.c
1184
mode = &adev->mode_info.crtcs[i]->base.mode;
sys/dev/drm/amd/amdgpu/dce_v11_0.c
2782
drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v11_0_crtc_funcs);
sys/dev/drm/amd/amdgpu/dce_v11_0.c
2784
drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
sys/dev/drm/amd/amdgpu/dce_v11_0.c
2819
drm_crtc_helper_add(&amdgpu_crtc->base, &dce_v11_0_crtc_helper_funcs);
sys/dev/drm/amd/amdgpu/dce_v11_0.c
3273
drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
sys/dev/drm/amd/amdgpu/dce_v11_0.c
3277
drm_crtc_vblank_put(&amdgpu_crtc->base);
sys/dev/drm/amd/amdgpu/dce_v11_0.c
3603
encoder = &amdgpu_encoder->base;
sys/dev/drm/amd/amdgpu/dce_v11_0.c
621
if (amdgpu_crtc->base.enabled && mode) {
sys/dev/drm/amd/amdgpu/dce_v11_0.c
656
if (amdgpu_crtc->base.enabled && mode) {
sys/dev/drm/amd/amdgpu/dce_v8_0.c
1091
if (adev->mode_info.crtcs[i]->base.enabled)
sys/dev/drm/amd/amdgpu/dce_v8_0.c
1095
mode = &adev->mode_info.crtcs[i]->base.mode;
sys/dev/drm/amd/amdgpu/dce_v8_0.c
2582
drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v8_0_crtc_funcs);
sys/dev/drm/amd/amdgpu/dce_v8_0.c
2584
drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
sys/dev/drm/amd/amdgpu/dce_v8_0.c
2599
drm_crtc_helper_add(&amdgpu_crtc->base, &dce_v8_0_crtc_helper_funcs);
sys/dev/drm/amd/amdgpu/dce_v8_0.c
3116
drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
sys/dev/drm/amd/amdgpu/dce_v8_0.c
3120
drm_crtc_vblank_put(&amdgpu_crtc->base);
sys/dev/drm/amd/amdgpu/dce_v8_0.c
3365
encoder = &amdgpu_encoder->base;
sys/dev/drm/amd/amdgpu/dce_v8_0.c
532
if (amdgpu_crtc->base.enabled && mode) {
sys/dev/drm/amd/amdgpu/dce_v8_0.c
565
if (amdgpu_crtc->base.enabled && mode) {
sys/dev/drm/amd/amdgpu/dce_v8_0.c
952
struct drm_display_mode *mode = &amdgpu_crtc->base.mode;
sys/dev/drm/amd/amdgpu/dce_v8_0.c
959
if (amdgpu_crtc->base.enabled && num_heads && mode) {
sys/dev/drm/amd/amdgpu/dce_virtual.c
243
drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_virtual_crtc_funcs);
sys/dev/drm/amd/amdgpu/dce_virtual.c
245
drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
sys/dev/drm/amd/amdgpu/dce_virtual.c
253
drm_crtc_helper_add(&amdgpu_crtc->base, &dce_virtual_crtc_helper_funcs);
sys/dev/drm/amd/amdgpu/dce_virtual.c
690
drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
sys/dev/drm/amd/amdgpu/dce_virtual.c
694
drm_crtc_vblank_put(&amdgpu_crtc->base);
sys/dev/drm/amd/amdgpu/dce_virtual.c
704
struct drm_device *ddev = amdgpu_crtc->base.dev;
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1592
u32 data, base;
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1611
base = lower_32_bits(adev->gfx.ngg.buf[NGG_PRIM].gpu_addr);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1612
data = REG_SET_FIELD(0, WD_INDEX_BUF_BASE, BASE, base);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1615
base = upper_32_bits(adev->gfx.ngg.buf[NGG_PRIM].gpu_addr);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1616
data = REG_SET_FIELD(0, WD_INDEX_BUF_BASE_HI, BASE_HI, base);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1619
base = lower_32_bits(adev->gfx.ngg.buf[NGG_POS].gpu_addr);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1620
data = REG_SET_FIELD(0, WD_POS_BUF_BASE, BASE, base);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1623
base = upper_32_bits(adev->gfx.ngg.buf[NGG_POS].gpu_addr);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1624
data = REG_SET_FIELD(0, WD_POS_BUF_BASE_HI, BASE_HI, base);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1627
base = lower_32_bits(adev->gfx.ngg.buf[NGG_CNTL].gpu_addr);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1628
data = REG_SET_FIELD(0, WD_CNTL_SB_BUF_BASE, BASE, base);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1631
base = upper_32_bits(adev->gfx.ngg.buf[NGG_CNTL].gpu_addr);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
1632
data = REG_SET_FIELD(0, WD_CNTL_SB_BUF_BASE_HI, BASE_HI, base);
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
242
u64 base = RREG32(mmMC_VM_FB_LOCATION) & 0xFFFF;
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
243
base <<= 24;
sys/dev/drm/amd/amdgpu/gmc_v7_0.c
245
amdgpu_gmc_vram_location(adev, &adev->gmc, base);
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
430
u64 base = 0;
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
433
base = RREG32(mmMC_VM_FB_LOCATION) & 0xFFFF;
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
434
base <<= 24;
sys/dev/drm/amd/amdgpu/gmc_v8_0.c
436
amdgpu_gmc_vram_location(adev, &adev->gmc, base);
sys/dev/drm/amd/amdgpu/gmc_v9_0.c
772
u64 base = 0;
sys/dev/drm/amd/amdgpu/gmc_v9_0.c
774
base = mmhub_v1_0_get_fb_location(adev);
sys/dev/drm/amd/amdgpu/gmc_v9_0.c
776
base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;
sys/dev/drm/amd/amdgpu/gmc_v9_0.c
777
amdgpu_gmc_vram_location(adev, &adev->gmc, base);
sys/dev/drm/amd/amdgpu/mmhub_v1_0.c
40
u64 base = RREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_BASE);
sys/dev/drm/amd/amdgpu/mmhub_v1_0.c
43
base &= MC_VM_FB_LOCATION_BASE__FB_BASE_MASK;
sys/dev/drm/amd/amdgpu/mmhub_v1_0.c
44
base <<= 24;
sys/dev/drm/amd/amdgpu/mmhub_v1_0.c
49
adev->gmc.fb_start = base;
sys/dev/drm/amd/amdgpu/mmhub_v1_0.c
52
return base;
sys/dev/drm/amd/amdgpu/nbio_v6_1.c
108
lower_32_bits(adev->doorbell.base));
sys/dev/drm/amd/amdgpu/nbio_v6_1.c
110
upper_32_bits(adev->doorbell.base));
sys/dev/drm/amd/amdgpu/nbio_v7_4.c
103
lower_32_bits(adev->doorbell.base));
sys/dev/drm/amd/amdgpu/nbio_v7_4.c
105
upper_32_bits(adev->doorbell.base));
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1075
struct drm_connector *connector = &aconnector->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1091
if (aconnector->base.force && new_connection_type == dc_connection_none) {
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1099
if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1110
if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1198
struct drm_connector *connector = &aconnector->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1218
if (aconnector->base.force && new_connection_type == dc_connection_none) {
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1548
__drm_atomic_helper_private_obj_duplicate_state(obj, &new_state->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1561
return &new_state->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1615
&state->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
169
acrtc->base.state);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1750
plane->base.type = mode_info->plane_type[plane_id];
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1844
if (amdgpu_dm_crtc_init(dm, &mode_info->planes[i]->base, i)) {
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1885
if (aconnector->base.force && new_connection_type == dc_connection_none) {
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
192
acrtc->base.state);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2004
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2012
new_crtc_state = drm_atomic_get_new_crtc_state(state, &acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2263
struct amdgpu_bo *rbo = gem_to_amdgpu_bo(amdgpu_fb->base.obj[0]);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2287
const struct drm_framebuffer *fb = &amdgpu_fb->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2870
drm_connector = &aconnector->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2889
list_for_each_entry(preferred_mode, &aconnector->base.modes, head) {
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2898
&aconnector->base.modes,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2920
&mode, &aconnector->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2933
if (sink && sink->sink_signal == SIGNAL_TYPE_VIRTUAL && aconnector->base.force != DRM_FORCE_ON)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
295
drm_crtc_accurate_vblank_count(&amdgpu_crtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
297
drm_crtc_send_vblank_event(&amdgpu_crtc->base, amdgpu_crtc->event);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2972
crtc->state = &state->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2991
__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3004
return &state->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3056
if (aconnector->base.force == DRM_FORCE_UNSPECIFIED &&
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3060
connected = (aconnector->base.force == DRM_FORCE_ON);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
311
drm_crtc_vblank_put(&amdgpu_crtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3209
__drm_atomic_helper_connector_reset(connector, &state->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3225
__drm_atomic_helper_connector_duplicate_state(connector, &new_state->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
323
drm_crtc_handle_vblank(&acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3231
return &new_state->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
324
amdgpu_dm_crtc_handle_crc_irq(&acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3258
if (!aconnector->base.edid_blob_ptr) {
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3260
aconnector->base.name);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3262
aconnector->base.force = DRM_FORCE_OFF;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3263
aconnector->base.override_edid = false;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3267
edid = (struct edid *) aconnector->base.edid_blob_ptr->data;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3277
if (aconnector->base.force == DRM_FORCE_ON)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3297
aconnector->base.override_edid = true;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3320
if (aconnector->base.force != DRM_FORCE_UNSPECIFIED &&
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3437
plane->state = &amdgpu_state->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3453
__drm_atomic_helper_plane_duplicate_state(plane, &dm_plane_state->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3460
return &dm_plane_state->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3645
switch (aplane->base.type) {
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3649
&aplane->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3654
NULL, aplane->base.type, NULL);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3659
&aplane->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3664
NULL, aplane->base.type, NULL);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3669
&aplane->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3674
NULL, aplane->base.type, NULL);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3678
drm_plane_helper_add(&aplane->base, &dm_plane_helper_funcs);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3681
if (aplane->base.funcs->reset)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3682
aplane->base.funcs->reset(&aplane->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3701
cursor_plane->base.type = DRM_PLANE_TYPE_CURSOR;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3710
&acrtc->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3712
&cursor_plane->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3718
drm_crtc_helper_add(&acrtc->base, &amdgpu_dm_crtc_helper_funcs);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3721
if (acrtc->base.funcs->reset)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3722
acrtc->base.funcs->reset(&acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3728
acrtc->base.enabled = false;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3732
drm_crtc_enable_color_mgmt(&acrtc->base, MAX_COLOR_LUT_ENTRIES,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3734
drm_mode_crtc_set_gamma_size(&acrtc->base, MAX_COLOR_LEGACY_LUT_ENTRIES);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3935
aconnector->base.interlace_allowed = false;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3936
aconnector->base.doublescan_allowed = false;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3937
aconnector->base.stereo_allowed = false;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3938
aconnector->base.dpms = DRM_MODE_DPMS_OFF;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3948
aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3949
aconnector->base.ycbcr_420_allowed =
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3953
aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3954
aconnector->base.ycbcr_420_allowed =
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3958
aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3964
drm_object_attach_property(&aconnector->base.base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3968
drm_object_attach_property(&aconnector->base.base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3971
drm_object_attach_property(&aconnector->base.base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3974
drm_object_attach_property(&aconnector->base.base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3977
drm_object_attach_property(&aconnector->base.base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4040
i2c->base.owner = THIS_MODULE;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4041
i2c->base.class = I2C_CLASS_DDC;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4043
i2c->base.dev.parent = &adev->pdev->dev;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4044
i2c->base.algo = &amdgpu_dm_i2c_algo;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4045
snprintf(i2c->base.name, sizeof(i2c->base.name), "AMDGPU DM i2c hw bus %d", link_index);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4046
i2c_set_adapdata(&i2c->base, i2c);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4080
res = i2c_add_adapter(&i2c->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4091
&aconnector->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4102
&aconnector->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4105
if (aconnector->base.funcs->reset)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4106
aconnector->base.funcs->reset(&aconnector->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4116
&aconnector->base, &aencoder->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4118
drm_connector_register(&aconnector->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4165
&aencoder->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4170
aencoder->base.possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4177
drm_encoder_helper_add(&aencoder->base, &amdgpu_dm_encoder_helper_funcs);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4196
drm_crtc_vblank_on(&acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4207
drm_crtc_vblank_off(&acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4344
assert_spin_locked(&acrtc->base.dev->event_lock);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4347
acrtc->event = acrtc->base.state->event;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4353
acrtc->base.state->event = NULL;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4447
if (acrtc->base.state->event)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4784
amdgpu_dm_crtc_copy_transient_flags(&dm_new_crtc_state->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4813
__func__, acrtc->base.base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4864
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4868
new_crtc_state = drm_atomic_get_new_crtc_state(state, &acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4869
old_crtc_state = drm_atomic_get_old_crtc_state(state, &acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4882
update_stream_scaling_settings(&dm_new_con_state->base.crtc->mode,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4948
drm_send_event_locked(dev, &new_crtc_state->event->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4983
struct drm_plane *plane = disconnected_acrtc->base.primary;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5005
crtc_state = drm_atomic_get_crtc_state(state, &disconnected_acrtc->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5053
acrtc_state = to_dm_crtc_state(disconnected_acrtc->base.state);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5063
dm_force_atomic_commit(&aconnector->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5109
"timed out\n", crtc->base.id, crtc->name);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5127
to_amdgpu_dm_connector(new_con_state->base.connector);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5199
&aconnector->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5201
&aconnector->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5224
__func__, acrtc->base.base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5268
crtc->base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5310
crtc->base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5355
if (dm_new_crtc_state->base.color_mgmt_changed ||
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5420
plane->base.id, old_plane_crtc->base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5468
plane->base.id, new_plane_crtc->base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5718
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5722
drm_atomic_get_new_crtc_state(state, &acrtc->base)))
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
624
aconnector, aconnector->base.base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
868
if (aconnector->base.force && new_connection_type == dc_connection_none)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
958
struct drm_connector *connector = &aconnector->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
974
if (aconnector->base.force != DRM_FORCE_UNSPECIFIED
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
137
struct drm_connector base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
176
#define to_amdgpu_dm_connector(x) container_of(x, struct amdgpu_dm_connector, base)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
186
struct drm_plane_state base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
191
struct drm_crtc_state base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
202
#define to_dm_crtc_state(x) container_of(x, struct dm_crtc_state, base)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
205
struct drm_private_state base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
210
#define to_dm_atomic_state(x) container_of(x, struct dm_atomic_state, base)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
213
struct drm_connector_state base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h
225
container_of((x), struct dm_connector_state, base)
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
123
struct drm_property_blob *blob = crtc->base.gamma_lut;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
126
crtc->base.state->dev->dev_private;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
189
struct drm_property_blob *blob = crtc->base.ctm;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
706
struct dentry *ent, *dir = connector->base.debugfs_entry;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
708
if (connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
709
connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) {
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
441
aconnector, aconnector->base.base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
446
aconnector, aconnector->base.base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
463
aconnector, aconnector->base.base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
534
result = i2c_transfer(&aconnector->i2c->base, msgs, num) == num;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
571
ddc = &aconnector->i2c->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
578
edid = drm_get_edid(&aconnector->base, ddc);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
599
aconnector->base.name);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
193
drm_encoder_cleanup(&amdgpu_encoder->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
224
&aconnector->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
253
&aconnector->base, aconnector->edid);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
264
return &amdgpu_dm_connector->mst_encoder->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
286
struct drm_device *dev = connector->base.dev;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
295
encoder = &amdgpu_encoder->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
300
&amdgpu_encoder->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
316
struct drm_device *dev = master->base.dev;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
325
connector = &aconnector->base;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
347
drm_connector_attach_encoder(&aconnector->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
348
&aconnector->mst_encoder->base);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
351
&connector->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
355
&connector->base,
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
368
aconnector, connector->base.id, aconnector->mst_port);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
370
DRM_DEBUG_KMS(":%d\n", connector->base.id);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
379
struct drm_device *dev = master->base.dev;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
384
aconnector, connector->base.id, aconnector->mst_port);
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
403
struct drm_device *dev = master->base.dev;
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
438
aconnector->base.name, dm->adev->dev);
sys/dev/drm/amd/display/dc/bios/bios_parser.c
105
return &bp->base;
sys/dev/drm/amd/display/dc/bios/bios_parser.c
1128
if (bios_parser_get_embedded_panel_info(&bp->base, &panel_info)
sys/dev/drm/amd/display/dc/bios/bios_parser.c
114
kfree(bp->base.bios_local_image);
sys/dev/drm/amd/display/dc/bios/bios_parser.c
115
kfree(bp->base.integrated_info);
sys/dev/drm/amd/display/dc/bios/bios_parser.c
1659
if (bios_parser_get_embedded_panel_info(&bp->base, &panel_info)
sys/dev/drm/amd/display/dc/bios/bios_parser.c
2022
*id_list = (uint16_t *)bios_get_image(&bp->base, offset, *number * sizeof(uint16_t));
sys/dev/drm/amd/display/dc/bios/bios_parser.c
2876
bp->base.funcs = &vbios_funcs;
sys/dev/drm/amd/display/dc/bios/bios_parser.c
2877
bp->base.bios = init->bios;
sys/dev/drm/amd/display/dc/bios/bios_parser.c
2878
bp->base.bios_size = bp->base.bios[BIOS_IMAGE_SIZE_OFFSET] * BIOS_IMAGE_SIZE_UNIT;
sys/dev/drm/amd/display/dc/bios/bios_parser.c
2880
bp->base.ctx = init->ctx;
sys/dev/drm/amd/display/dc/bios/bios_parser.c
2881
bp->base.bios_local_image = NULL;
sys/dev/drm/amd/display/dc/bios/bios_parser.c
2938
bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base);
sys/dev/drm/amd/display/dc/bios/bios_parser.c
53
bp->base.ctx->logger
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
114
kfree(bp->base.bios_local_image);
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
115
kfree(bp->base.integrated_info);
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1928
bp->base.funcs = &vbios_funcs;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1929
bp->base.bios = init->bios;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1930
bp->base.bios_size = bp->base.bios[OFFSET_TO_ATOM_ROM_IMAGE_SIZE] * BIOS_IMAGE_SIZE_UNIT;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1932
bp->base.ctx = init->ctx;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1934
bp->base.bios_local_image = NULL;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1989
bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base);
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
2005
return &bp->base;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
67
bp->base.ctx->logger
sys/dev/drm/amd/display/dc/bios/bios_parser_helper.h
39
#define GET_IMAGE(type, offset) ((type *) bios_get_image(&bp->base, offset, sizeof(type)))
sys/dev/drm/amd/display/dc/bios/bios_parser_types_internal.h
54
struct dc_bios base;
sys/dev/drm/amd/display/dc/bios/bios_parser_types_internal.h
70
container_of(dc_bios, struct bios_parser, base)
sys/dev/drm/amd/display/dc/bios/bios_parser_types_internal2.h
55
struct dc_bios base;
sys/dev/drm/amd/display/dc/bios/bios_parser_types_internal2.h
72
container_of(dc_bios, struct bios_parser, base)
sys/dev/drm/amd/display/dc/bios/command_table.c
38
(amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \
sys/dev/drm/amd/display/dc/bios/command_table.c
43
amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \
sys/dev/drm/amd/display/dc/bios/command_table.c
47
bios_cmd_table_para_revision(bp->base.ctx->driver_context, \
sys/dev/drm/amd/display/dc/bios/command_table2.c
42
bp->base.ctx->logger
sys/dev/drm/amd/display/dc/bios/command_table2.c
50
(amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \
sys/dev/drm/amd/display/dc/bios/command_table2.c
55
amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \
sys/dev/drm/amd/display/dc/bios/command_table2.c
59
bios_cmd_table_para_revision(bp->base.ctx->driver_context, \
sys/dev/drm/amd/display/dc/dce/dce_abm.c
36
container_of(abm, struct dce_abm, base)
sys/dev/drm/amd/display/dc/dce/dce_abm.c
443
struct abm *base = &abm_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
445
base->ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
446
base->funcs = &dce_funcs;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
447
base->stored_backlight_registers.BL_PWM_CNTL = 0;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
448
base->stored_backlight_registers.BL_PWM_CNTL2 = 0;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
449
base->stored_backlight_registers.BL_PWM_PERIOD_CNTL = 0;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
450
base->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV = 0;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
472
abm_dce->base.funcs = &dce_funcs;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
474
return &abm_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_abm.c
48
abm_dce->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_abm.h
210
struct abm base;
sys/dev/drm/amd/display/dc/dce/dce_audio.c
32
container_of(audio, struct dce_audio, base)
sys/dev/drm/amd/display/dc/dce/dce_audio.c
35
aud->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_audio.c
949
audio->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_audio.c
950
audio->base.inst = inst;
sys/dev/drm/amd/display/dc/dce/dce_audio.c
951
audio->base.funcs = &funcs;
sys/dev/drm/amd/display/dc/dce/dce_audio.c
957
return &audio->base;
sys/dev/drm/amd/display/dc/dce/dce_audio.h
118
struct audio base;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
31
aux110->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_aux.c
41
container_of((ptr), struct aux_engine_dce110, base)
sys/dev/drm/amd/display/dc/dce/dce_aux.c
44
FROM_AUX_ENGINE(container_of((ptr), struct aux_engine, base))
sys/dev/drm/amd/display/dc/dce/dce_aux.c
47
container_of((ptr), struct aux_engine, base)
sys/dev/drm/amd/display/dc/dce/dce_aux.c
928
aux_engine110->base.ddc = NULL;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
929
aux_engine110->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
930
aux_engine110->base.delay = 0;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
931
aux_engine110->base.max_defer_write_retry = 0;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
932
aux_engine110->base.funcs = &aux_engine_funcs;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
933
aux_engine110->base.inst = inst;
sys/dev/drm/amd/display/dc/dce/dce_aux.c
937
return &aux_engine110->base;
sys/dev/drm/amd/display/dc/dce/dce_aux.h
79
struct aux_engine base;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1233
clk_src->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1235
clk_src->base.id = id;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1236
clk_src->base.funcs = &dce110_clk_src_funcs;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1291
if (clk_src->base.id == CLOCK_SOURCE_ID_EXTERNAL)
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1334
clk_src->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1336
clk_src->base.id = id;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1337
clk_src->base.funcs = &dce112_clk_src_funcs;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
43
clk_src->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
630
bp_ss_params.pll_id = clk_src->base.id;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
732
bp_params.pll_id = clk_src->base.id;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.h
116
struct clock_source base;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.h
31
container_of(clk_src, struct dce110_clk_src, base)
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
282
struct dc_context *ctx = clk_dce->base.ctx;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
348
struct dc_debug_options *debug = &clk_dce->base.ctx->dc->debug;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
349
struct dc_bios *bp = clk_dce->base.ctx->dc_bios;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
406
struct dc_bios *bp = clk_dce->base.ctx->dc_bios;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
41
container_of(clocks, struct dce_dccg, base)
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
51
clk_dce->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
782
struct dccg *base = &clk_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
784
base->ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
785
base->funcs = &dce_funcs;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
797
base->max_clks_state = DM_PP_CLOCKS_STATE_NOMINAL;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
798
base->cur_min_clks_state = DM_PP_CLOCKS_STATE_INVALID;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
824
return &clk_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
847
clk_dce->base.funcs = &dce110_funcs;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
849
return &clk_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
872
clk_dce->base.funcs = &dce112_funcs;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
874
return &clk_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
894
clk_dce->base.funcs = &dce120_funcs;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
896
return &clk_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
912
clk_dce->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
913
clk_dce->base.funcs = &dcn1_funcs;
sys/dev/drm/amd/display/dc/dce/dce_clocks.c
937
return &clk_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_clocks.h
70
struct dccg base;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
35
container_of(dmcu, struct dce_dmcu, base)
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
45
dmcu_dce->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
767
struct dmcu *base = &dmcu_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
769
base->ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
770
base->funcs = &dce_funcs;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
771
base->cached_wait_loop_number = 0;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
794
dmcu_dce->base.funcs = &dce_funcs;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
796
return &dmcu_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
816
dmcu_dce->base.funcs = &dcn10_funcs;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
818
return &dmcu_dce->base;
sys/dev/drm/amd/display/dc/dce/dce_dmcu.h
181
struct dmcu base;
sys/dev/drm/amd/display/dc/dce/dce_ipp.c
252
ipp_dce->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_ipp.c
253
ipp_dce->base.inst = inst;
sys/dev/drm/amd/display/dc/dce/dce_ipp.c
254
ipp_dce->base.funcs = &dce_ipp_funcs;
sys/dev/drm/amd/display/dc/dce/dce_ipp.c
38
ipp_dce->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_ipp.h
223
struct input_pixel_processor base;
sys/dev/drm/amd/display/dc/dce/dce_ipp.h
32
container_of(ipp, struct dce_ipp, base)
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1001
cntl.transmitter = enc110->base.transmitter;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1005
cntl.hpd_sel = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1040
cntl.transmitter = enc110->base.transmitter;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1044
cntl.hpd_sel = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1086
cntl.transmitter = enc110->base.transmitter;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1087
cntl.hpd_sel = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1089
cntl.connector_obj_id = enc110->base.connector;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1120
cntl.transmitter = enc110->base.transmitter;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1121
cntl.connector_obj_id = enc110->base.connector;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1123
cntl.hpd_sel = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
126
struct dc_bios *bp = enc110->base.ctx->dc_bios;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1369
struct dc_context *ctx = enc110->base.ctx;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1383
struct dc_context *ctx = enc110->base.ctx;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
260
struct dc_context *ctx = enc110->base.ctx;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
390
enc110->base.funcs->setup(&enc110->base, SIGNAL_TYPE_DISPLAY_PORT);
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
492
struct dc_context *ctx = enc110->base.ctx;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
493
enum hpd_source_id hpd_source = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
571
enum hpd_source_id hpd_source = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
58
enc110->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
592
max_pixel_clock = enc110->base.features.max_hdmi_pixel_clock;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
60
enc110->base.ctx->logger
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
633
enc110->base.features.max_hdmi_deep_color;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
644
(adjusted_pix_clk_khz > enc110->base.features.max_hdmi_pixel_clock))
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
648
if (!enc110->base.features.ycbcr420_supported &&
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
652
if (!enc110->base.features.flags.bits.HDMI_6GB_EN &&
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
655
if (enc110->base.ctx->dc->debug.hdmi20_disable &&
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
683
enc110->base.funcs = &dce110_lnk_enc_funcs;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
684
enc110->base.ctx = init_data->ctx;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
685
enc110->base.id = init_data->encoder;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
687
enc110->base.hpd_source = init_data->hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
688
enc110->base.connector = init_data->connector;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
690
enc110->base.preferred_engine = ENGINE_ID_UNKNOWN;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
692
enc110->base.features = *enc_features;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
694
enc110->base.transmitter = init_data->transmitter;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
705
enc110->base.output_signals =
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
729
switch (enc110->base.transmitter) {
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
731
enc110->base.preferred_engine = ENGINE_ID_DIGA;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
734
enc110->base.preferred_engine = ENGINE_ID_DIGB;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
737
enc110->base.preferred_engine = ENGINE_ID_DIGC;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
740
enc110->base.preferred_engine = ENGINE_ID_DIGD;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
743
enc110->base.preferred_engine = ENGINE_ID_DIGE;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
746
enc110->base.preferred_engine = ENGINE_ID_DIGF;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
749
enc110->base.preferred_engine = ENGINE_ID_DIGG;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
753
enc110->base.preferred_engine = ENGINE_ID_UNKNOWN;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
757
enc110->base.features.flags.bits.HDMI_6GB_EN = 1;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
759
result = bp_funcs->get_encoder_cap_info(enc110->base.ctx->dc_bios,
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
760
enc110->base.id, &bp_cap_info);
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
764
enc110->base.features.flags.bits.IS_HBR2_CAPABLE =
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
766
enc110->base.features.flags.bits.IS_HBR3_CAPABLE =
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
768
enc110->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
774
if (enc110->base.ctx->dc->debug.hdmi20_disable) {
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
775
enc110->base.features.flags.bits.HDMI_6GB_EN = 0;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
832
cntl.transmitter = enc110->base.transmitter;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
833
cntl.connector_obj_id = enc110->base.connector;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
836
cntl.hpd_sel = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
838
if (enc110->base.connector.id == CONNECTOR_ID_EDP)
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
850
if (enc110->base.connector.id == CONNECTOR_ID_LVDS) {
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
924
cntl.connector_obj_id = enc110->base.connector;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
927
cntl.transmitter = enc110->base.transmitter;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
935
cntl.hpd_sel = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
960
cntl.connector_obj_id = enc110->base.connector;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
963
cntl.transmitter = enc110->base.transmitter;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
968
cntl.hpd_sel = enc110->base.hpd_source;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
998
cntl.connector_obj_id = enc110->base.connector;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.h
157
struct link_encoder base;
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.h
32
container_of(link_encoder, struct dce110_link_encoder, base)
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
31
dce_mi->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
776
dce_mi->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
778
dce_mi->base.inst = inst;
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
779
dce_mi->base.funcs = &dce_mi_funcs;
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
795
dce_mi->base.funcs = &dce112_mi_funcs;
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
807
dce_mi->base.funcs = &dce120_mi_funcs;
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
32
container_of(mem_input, struct dce_mem_input, base)
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
331
struct mem_input base;
sys/dev/drm/amd/display/dc/dce/dce_opp.c
41
opp110->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_opp.c
549
opp110->base.funcs = &funcs;
sys/dev/drm/amd/display/dc/dce/dce_opp.c
551
opp110->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_opp.c
553
opp110->base.inst = inst;
sys/dev/drm/amd/display/dc/dce/dce_opp.h
266
container_of(opp, struct dce110_opp, base)
sys/dev/drm/amd/display/dc/dce/dce_opp.h
269
struct output_pixel_processor base;
sys/dev/drm/amd/display/dc/dce/dce_opp.h
33
container_of(opp, struct dce110_opp, base)
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1627
enc110->base.funcs = &dce110_str_enc_funcs;
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1628
enc110->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1629
enc110->base.id = eng_id;
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1630
enc110->base.bp = bp;
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
32
enc110->base.ctx->logger
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
548
cntl.engine_id = enc110->base.id;
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
554
if (enc110->base.bp->funcs->encoder_control(
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
555
enc110->base.bp, &cntl) != BP_RESULT_OK)
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
58
container_of(audio, struct dce110_stream_encoder, base)
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
61
enc110->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
661
cntl.engine_id = enc110->base.id;
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
668
if (enc110->base.bp->funcs->encoder_control(
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
669
enc110->base.bp, &cntl) != BP_RESULT_OK)
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
686
cntl.engine_id = enc110->base.id;
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
692
if (enc110->base.bp->funcs->encoder_control(
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
693
enc110->base.bp, &cntl) != BP_RESULT_OK)
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.h
32
container_of(stream_encoder, struct dce110_stream_encoder, base)
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.h
694
struct stream_encoder base;
sys/dev/drm/amd/display/dc/dce/dce_transform.c
1350
xfm_dce->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce/dce_transform.c
1352
xfm_dce->base.inst = inst;
sys/dev/drm/amd/display/dc/dce/dce_transform.c
1353
xfm_dce->base.funcs = &dce_transform_funcs;
sys/dev/drm/amd/display/dc/dce/dce_transform.c
158
if (xfm_dce->base.ctx->dc->debug.visual_confirm != VISUAL_CONFIRM_DISABLE) {
sys/dev/drm/amd/display/dc/dce/dce_transform.c
40
xfm_dce->base.ctx
sys/dev/drm/amd/display/dc/dce/dce_transform.c
42
xfm_dce->base.ctx->logger
sys/dev/drm/amd/display/dc/dce/dce_transform.h
33
container_of(transform, struct dce_transform, base)
sys/dev/drm/amd/display/dc/dce/dce_transform.h
470
struct transform base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1005
pool->base.transforms[i] = dce100_transform_create(ctx, i);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1006
if (pool->base.transforms[i] == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1013
pool->base.opps[i] = dce100_opp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1014
if (pool->base.opps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1022
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1023
pool->base.engines[i] = dce100_aux_engine_create(ctx, i);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1024
if (pool->base.engines[i] == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1030
pool->base.hw_i2cs[i] = dce100_i2c_hw_create(ctx, i);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1031
if (pool->base.hw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1037
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1040
dc->caps.max_planes = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1042
if (!resource_construct(num_virtual_links, dc, &pool->base,
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
1067
return &pool->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
423
return &tg110->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
438
return &enc110->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
514
return &dce_mi->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
535
return &transform->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
550
return &ipp->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
576
return &enc110->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
592
return &opp->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
610
return &aux_engine->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
663
clk_src->base.dp_clk_src = dp_clk_src;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
664
return &clk_src->base;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
682
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
683
if (pool->base.opps[i] != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
684
dce110_opp_destroy(&pool->base.opps[i]);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
686
if (pool->base.transforms[i] != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
687
dce100_transform_destroy(&pool->base.transforms[i]);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
689
if (pool->base.ipps[i] != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
690
dce_ipp_destroy(&pool->base.ipps[i]);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
692
if (pool->base.mis[i] != NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
693
kfree(TO_DCE_MEM_INPUT(pool->base.mis[i]));
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
694
pool->base.mis[i] = NULL;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
697
if (pool->base.timing_generators[i] != NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
698
kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i]));
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
699
pool->base.timing_generators[i] = NULL;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
703
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
704
if (pool->base.engines[i] != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
705
dce110_engine_destroy(&pool->base.engines[i]);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
706
if (pool->base.hw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
707
kfree(pool->base.hw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
708
pool->base.hw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
710
if (pool->base.sw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
711
kfree(pool->base.sw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
712
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
716
for (i = 0; i < pool->base.stream_enc_count; i++) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
717
if (pool->base.stream_enc[i] != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
718
kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
721
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
722
if (pool->base.clock_sources[i] != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
723
dce100_clock_source_destroy(&pool->base.clock_sources[i]);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
726
if (pool->base.dp_clock_source != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
727
dce100_clock_source_destroy(&pool->base.dp_clock_source);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
729
for (i = 0; i < pool->base.audio_count; i++) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
730
if (pool->base.audios[i] != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
731
dce_aud_destroy(&pool->base.audios[i]);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
734
if (pool->base.dccg != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
735
dce_dccg_destroy(&pool->base.dccg);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
737
if (pool->base.abm != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
738
dce_abm_destroy(&pool->base.abm);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
740
if (pool->base.dmcu != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
741
dce_dmcu_destroy(&pool->base.dmcu);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
743
if (pool->base.irqs != NULL)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
744
dal_irq_service_destroy(&pool->base.irqs);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
878
pool->base.res_cap = &res_cap;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
879
pool->base.funcs = &dce100_res_pool_funcs;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
880
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
886
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
889
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
891
pool->base.clock_sources[1] =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
893
pool->base.clock_sources[2] =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
895
pool->base.clk_src_count = 3;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
898
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
901
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
903
pool->base.clock_sources[1] =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
905
pool->base.clk_src_count = 2;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
908
if (pool->base.dp_clock_source == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
914
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
915
if (pool->base.clock_sources[i] == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
922
pool->base.dccg = dce_dccg_create(ctx,
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
926
if (pool->base.dccg == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
932
pool->base.dmcu = dce_dmcu_create(ctx,
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
936
if (pool->base.dmcu == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
942
pool->base.abm = dce_abm_create(ctx,
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
946
if (pool->base.abm == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
956
pool->base.dccg->max_clks_state =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
961
pool->base.irqs = dal_irq_service_dce110_create(&init_data);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
962
if (!pool->base.irqs)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
969
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
970
pool->base.pipe_count = res_cap.num_timing_generator;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
971
pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
977
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
978
pool->base.timing_generators[i] =
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
983
if (pool->base.timing_generators[i] == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
989
pool->base.mis[i] = dce100_mem_input_create(ctx, i);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
990
if (pool->base.mis[i] == NULL) {
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
997
pool->base.ipps[i] = dce100_ipp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
998
if (pool->base.ipps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
153
value = dm_read_reg(cp110->base.ctx, addr);
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
38
cp110->base.ctx->logger
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
436
return &cp110->base;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
530
compressor->base.options.raw = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
531
compressor->base.options.bits.FBC_SUPPORT = true;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
534
compressor->base.lpt_channels_num = 1;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
535
compressor->base.options.bits.DUMMY_BACKEND = false;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
543
compressor->base.options.bits.CLK_GATING_DISABLED = false;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
545
compressor->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
546
compressor->base.embedded_panel_h_size = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
547
compressor->base.embedded_panel_v_size = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
548
compressor->base.memory_bus_width = ctx->asic_id.vram_width;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
549
compressor->base.allocated_size = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
550
compressor->base.preferred_requested_size = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
551
compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
552
compressor->base.banks_num = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
553
compressor->base.raw_size = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
554
compressor->base.channel_interleave_size = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
555
compressor->base.dram_channels_num = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
556
compressor->base.lpt_channels_num = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
557
compressor->base.attached_inst = 0;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
558
compressor->base.is_enabled = false;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c
559
compressor->base.funcs = &dce110_compressor_funcs;
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.h
31
container_of(compressor, struct dce110_compressor, base)
sys/dev/drm/amd/display/dc/dce110/dce110_compressor.h
39
struct compressor base;
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
1048
dce_mi->base.funcs = &dce110_mem_input_v_funcs;
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
1049
dce_mi->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
112
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
126
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
159
value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_ENABLE);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
161
dm_write_reg(mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
204
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
226
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
257
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
265
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
273
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
281
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
289
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
297
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
306
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
315
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
324
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
333
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
358
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
373
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
420
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
425
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
435
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
445
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
467
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
47
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
479
value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_UPDATE);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
55
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
612
value = dm_read_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
616
dm_write_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT, value);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
618
value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
622
dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL, value);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
624
value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
627
dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL, value);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
629
value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
633
dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C, value);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
635
value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
638
dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C, value);
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
76
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c
90
mem_input110->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c
113
struct dc_context *ctx = xfm_dce->base.ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c
364
struct dc_context *ctx = xfm_dce->base.ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
111
dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CONTROL, 0);
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
149
dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CNTLA_START_CNTL,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
160
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
171
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
188
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
221
xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
253
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
285
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
317
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
349
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
381
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
413
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
445
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
462
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
465
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
476
dm_write_reg(xfm_dce->base.ctx, addr, rgb->red_reg);
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
477
dm_write_reg(xfm_dce->base.ctx, addr, rgb->green_reg);
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
478
dm_write_reg(xfm_dce->base.ctx, addr, rgb->blue_reg);
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
480
dm_write_reg(xfm_dce->base.ctx, addr,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
482
dm_write_reg(xfm_dce->base.ctx, addr,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
484
dm_write_reg(xfm_dce->base.ctx, addr,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
88
value = dm_read_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
97
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_opp_v.c
50
opp110->base.funcs = &funcs;
sys/dev/drm/amd/display/dc/dce110/dce110_opp_v.c
52
opp110->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1122
pool->opps[pool->pipe_count] = &dce110_oppv->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1123
pool->timing_generators[pool->pipe_count] = &dce110_tgv->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1124
pool->mis[pool->pipe_count] = &dce110_miv->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1125
pool->transforms[pool->pipe_count] = &dce110_xfmv->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1215
pool->base.res_cap = dce110_resource_cap(&ctx->asic_id);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1216
pool->base.funcs = &dce110_res_pool_funcs;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1222
pool->base.pipe_count = pool->base.res_cap->num_timing_generator;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1223
pool->base.underlay_pipe_index = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1224
pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1238
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1241
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1244
pool->base.clock_sources[1] =
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1248
pool->base.clk_src_count = 2;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1253
if (pool->base.dp_clock_source == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1259
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1260
if (pool->base.clock_sources[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1267
pool->base.dccg = dce110_dccg_create(ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1271
if (pool->base.dccg == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1277
pool->base.dmcu = dce_dmcu_create(ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1281
if (pool->base.dmcu == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1287
pool->base.abm = dce_abm_create(ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1291
if (pool->base.abm == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1301
pool->base.dccg->max_clks_state =
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1307
pool->base.irqs = dal_irq_service_dce110_create(&init_data);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1308
if (!pool->base.irqs)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1312
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1313
pool->base.timing_generators[i] = dce110_timing_generator_create(
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1315
if (pool->base.timing_generators[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1321
pool->base.mis[i] = dce110_mem_input_create(ctx, i);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1322
if (pool->base.mis[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1329
pool->base.ipps[i] = dce110_ipp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1330
if (pool->base.ipps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1337
pool->base.transforms[i] = dce110_transform_create(ctx, i);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1338
if (pool->base.transforms[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1345
pool->base.opps[i] = dce110_opp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1346
if (pool->base.opps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1354
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1355
pool->base.engines[i] = dce110_aux_engine_create(ctx, i);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1356
if (pool->base.engines[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1362
pool->base.hw_i2cs[i] = dce110_i2c_hw_create(ctx, i);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1363
if (pool->base.hw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1369
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1375
if (!underlay_create(ctx, &pool->base))
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1378
if (!resource_construct(num_virtual_links, dc, &pool->base,
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1385
dc->caps.max_planes = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1410
return &pool->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
434
return &tg110->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
450
return &enc110->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
530
return &dce_mi->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
551
return &transform->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
566
return &ipp->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
591
return &enc110->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
606
return &opp->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
624
return &aux_engine->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
677
clk_src->base.dp_clk_src = dp_clk_src;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
678
return &clk_src->base;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
707
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
708
if (pool->base.opps[i] != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
709
dce110_opp_destroy(&pool->base.opps[i]);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
711
if (pool->base.transforms[i] != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
712
dce110_transform_destroy(&pool->base.transforms[i]);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
714
if (pool->base.ipps[i] != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
715
dce_ipp_destroy(&pool->base.ipps[i]);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
717
if (pool->base.mis[i] != NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
718
kfree(TO_DCE_MEM_INPUT(pool->base.mis[i]));
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
719
pool->base.mis[i] = NULL;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
722
if (pool->base.timing_generators[i] != NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
723
kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i]));
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
724
pool->base.timing_generators[i] = NULL;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
728
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
729
if (pool->base.engines[i] != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
730
dce110_engine_destroy(&pool->base.engines[i]);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
731
if (pool->base.hw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
732
kfree(pool->base.hw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
733
pool->base.hw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
735
if (pool->base.sw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
736
kfree(pool->base.sw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
737
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
741
for (i = 0; i < pool->base.stream_enc_count; i++) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
742
if (pool->base.stream_enc[i] != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
743
kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
746
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
747
if (pool->base.clock_sources[i] != NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
748
dce110_clock_source_destroy(&pool->base.clock_sources[i]);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
752
if (pool->base.dp_clock_source != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
753
dce110_clock_source_destroy(&pool->base.dp_clock_source);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
755
for (i = 0; i < pool->base.audio_count; i++) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
756
if (pool->base.audios[i] != NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
757
dce_aud_destroy(&pool->base.audios[i]);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
761
if (pool->base.abm != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
762
dce_abm_destroy(&pool->base.abm);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
764
if (pool->base.dmcu != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
765
dce_dmcu_destroy(&pool->base.dmcu);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
767
if (pool->base.dccg != NULL)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
768
dce_dccg_destroy(&pool->base.dccg);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
770
if (pool->base.irqs != NULL) {
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
771
dal_irq_service_destroy(&pool->base.irqs);
sys/dev/drm/amd/display/dc/dce110/dce110_resource.h
35
container_of(pool, struct dce110_resource_pool, base)
sys/dev/drm/amd/display/dc/dce110/dce110_resource.h
38
struct resource_pool base;
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c
2246
tg110->base.inst = instance;
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c
2250
tg110->base.funcs = &dce110_tg_funcs;
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c
2252
tg110->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c
2253
tg110->base.bp = ctx->dc_bios;
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c
347
tg110->base.funcs->enable_advanced_request(tg, true, &patched_crtc_timing);
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.h
118
container_of(tg, struct dce110_timing_generator, base)
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.h
97
struct timing_generator base;
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
690
tg110->base.funcs = &dce110_tg_v_funcs;
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
692
tg110->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
693
tg110->base.bp = ctx->dc_bios;
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
162
struct dc_context *ctx = xfm_dce->base.ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
238
if (xfm_dce->base.ctx->dc->debug.visual_confirm != VISUAL_CONFIRM_DISABLE) {
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
264
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
268
dm_write_reg(xfm_dce->base.ctx,
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
278
value = dm_read_reg(xfm_dce->base.ctx, mmSCLV_UPDATE);
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
280
dm_write_reg(xfm_dce->base.ctx, mmSCLV_UPDATE, value);
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
289
struct dc_context *ctx = xfm_dce->base.ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
394
struct dc_context *ctx = xfm_dce->base.ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
509
value = dm_read_reg(xfm_dce->base.ctx, mmLBV_MEMORY_CTRL);
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
517
dm_write_reg(xfm_dce->base.ctx, mmLBV_MEMORY_CTRL, value);
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
703
xfm_dce->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
705
xfm_dce->base.funcs = &dce110_xfmv_funcs;
sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c
82
struct dc_context *ctx = xfm_dce->base.ctx;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
101
return cp110->base.raw_size * cp110->base.banks_num *
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
102
cp110->base.dram_channels_num;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
109
if (cp110->base.options.bits.LPT_MC_CONFIG == 1) {
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
117
switch (cp110->base.dram_channels_num) {
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
148
switch (cp110->base.banks_num) {
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
195
switch (cp110->base.channel_interleave_size) {
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
231
switch (cp110->base.raw_size) {
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
273
if (cp110->base.embedded_panel_h_size != 0 &&
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
274
cp110->base.embedded_panel_v_size != 0 &&
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
276
(cp110->base.embedded_panel_h_size *
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
277
cp110->base.embedded_panel_v_size)))
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
299
value = dm_read_reg(cp110->base.ctx, addr);
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
37
cp110->base.ctx->logger
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
793
compressor->base.options.raw = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
794
compressor->base.options.bits.FBC_SUPPORT = true;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
795
compressor->base.options.bits.LPT_SUPPORT = true;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
797
compressor->base.lpt_channels_num = 1;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
798
compressor->base.options.bits.DUMMY_BACKEND = false;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
802
if (compressor->base.memory_bus_width == 64)
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
803
compressor->base.options.bits.LPT_SUPPORT = false;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
805
compressor->base.options.bits.CLK_GATING_DISABLED = false;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
807
compressor->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
808
compressor->base.embedded_panel_h_size = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
809
compressor->base.embedded_panel_v_size = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
810
compressor->base.memory_bus_width = ctx->asic_id.vram_width;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
811
compressor->base.allocated_size = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
812
compressor->base.preferred_requested_size = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
813
compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
814
compressor->base.banks_num = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
815
compressor->base.raw_size = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
816
compressor->base.channel_interleave_size = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
817
compressor->base.dram_channels_num = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
818
compressor->base.lpt_channels_num = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
819
compressor->base.attached_inst = 0;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
820
compressor->base.is_enabled = false;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
824
compressor->base.embedded_panel_h_size =
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
826
compressor->base.embedded_panel_v_size =
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c
840
return &cp110->base;
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.h
31
container_of(compressor, struct dce112_compressor, base)
sys/dev/drm/amd/display/dc/dce112/dce112_compressor.h
39
struct compressor base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1149
pool->base.res_cap = dce112_resource_cap(&ctx->asic_id);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1150
pool->base.funcs = &dce112_res_pool_funcs;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1155
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1156
pool->base.pipe_count = pool->base.res_cap->num_timing_generator;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1157
pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1168
pool->base.clock_sources[DCE112_CLK_SRC_PLL0] =
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1173
pool->base.clock_sources[DCE112_CLK_SRC_PLL1] =
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1178
pool->base.clock_sources[DCE112_CLK_SRC_PLL2] =
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1183
pool->base.clock_sources[DCE112_CLK_SRC_PLL3] =
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1188
pool->base.clock_sources[DCE112_CLK_SRC_PLL4] =
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1193
pool->base.clock_sources[DCE112_CLK_SRC_PLL5] =
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1198
pool->base.clk_src_count = DCE112_CLK_SRC_TOTAL;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1200
pool->base.dp_clock_source = dce112_clock_source_create(
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1205
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1206
if (pool->base.clock_sources[i] == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1213
pool->base.dccg = dce112_dccg_create(ctx,
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1217
if (pool->base.dccg == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1223
pool->base.dmcu = dce_dmcu_create(ctx,
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1227
if (pool->base.dmcu == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1233
pool->base.abm = dce_abm_create(ctx,
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1237
if (pool->base.abm == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1247
pool->base.dccg->max_clks_state =
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1253
pool->base.irqs = dal_irq_service_dce110_create(&init_data);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1254
if (!pool->base.irqs)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1258
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1259
pool->base.timing_generators[i] =
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1264
if (pool->base.timing_generators[i] == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1270
pool->base.mis[i] = dce112_mem_input_create(ctx, i);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1271
if (pool->base.mis[i] == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1278
pool->base.ipps[i] = dce112_ipp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1279
if (pool->base.ipps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1286
pool->base.transforms[i] = dce112_transform_create(ctx, i);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1287
if (pool->base.transforms[i] == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1294
pool->base.opps[i] = dce112_opp_create(
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1297
if (pool->base.opps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1305
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1306
pool->base.engines[i] = dce112_aux_engine_create(ctx, i);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1307
if (pool->base.engines[i] == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1313
pool->base.hw_i2cs[i] = dce112_i2c_hw_create(ctx, i);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1314
if (pool->base.hw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1320
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1323
if (!resource_construct(num_virtual_links, dc, &pool->base,
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1327
dc->caps.max_planes = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
1354
return &pool->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
443
return &tg110->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
459
return &enc110->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
529
return &dce_mi->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
551
return &transform->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
580
return &enc110->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
595
return &ipp->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
611
return &opp->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
629
return &aux_engine->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
682
clk_src->base.dp_clk_src = dp_clk_src;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
683
return &clk_src->base;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
701
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
702
if (pool->base.opps[i] != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
703
dce110_opp_destroy(&pool->base.opps[i]);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
705
if (pool->base.transforms[i] != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
706
dce112_transform_destroy(&pool->base.transforms[i]);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
708
if (pool->base.ipps[i] != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
709
dce_ipp_destroy(&pool->base.ipps[i]);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
711
if (pool->base.mis[i] != NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
712
kfree(TO_DCE_MEM_INPUT(pool->base.mis[i]));
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
713
pool->base.mis[i] = NULL;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
716
if (pool->base.timing_generators[i] != NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
717
kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i]));
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
718
pool->base.timing_generators[i] = NULL;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
722
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
723
if (pool->base.engines[i] != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
724
dce110_engine_destroy(&pool->base.engines[i]);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
725
if (pool->base.hw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
726
kfree(pool->base.hw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
727
pool->base.hw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
729
if (pool->base.sw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
730
kfree(pool->base.sw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
731
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
735
for (i = 0; i < pool->base.stream_enc_count; i++) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
736
if (pool->base.stream_enc[i] != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
737
kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
740
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
741
if (pool->base.clock_sources[i] != NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
742
dce112_clock_source_destroy(&pool->base.clock_sources[i]);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
746
if (pool->base.dp_clock_source != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
747
dce112_clock_source_destroy(&pool->base.dp_clock_source);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
749
for (i = 0; i < pool->base.audio_count; i++) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
750
if (pool->base.audios[i] != NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
751
dce_aud_destroy(&pool->base.audios[i]);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
755
if (pool->base.abm != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
756
dce_abm_destroy(&pool->base.abm);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
758
if (pool->base.dmcu != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
759
dce_dmcu_destroy(&pool->base.dmcu);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
761
if (pool->base.dccg != NULL)
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
762
dce_dccg_destroy(&pool->base.dccg);
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
764
if (pool->base.irqs != NULL) {
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
765
dal_irq_service_destroy(&pool->base.irqs);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1003
if (pool->base.abm == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1011
pool->base.irqs = dal_irq_service_dce120_create(&irq_init_data);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1012
if (!pool->base.irqs)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1021
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1029
pool->base.timing_generators[j] =
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1034
if (pool->base.timing_generators[j] == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1040
pool->base.mis[j] = dce120_mem_input_create(ctx, i);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1042
if (pool->base.mis[j] == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1049
pool->base.ipps[j] = dce120_ipp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1050
if (pool->base.ipps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1057
pool->base.transforms[j] = dce120_transform_create(ctx, i);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1058
if (pool->base.transforms[i] == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1065
pool->base.opps[j] = dce120_opp_create(
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1068
if (pool->base.opps[j] == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1078
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1079
pool->base.engines[i] = dce120_aux_engine_create(ctx, i);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1080
if (pool->base.engines[i] == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1086
pool->base.hw_i2cs[i] = dce120_i2c_hw_create(ctx, i);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1087
if (pool->base.hw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1093
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1097
pool->base.pipe_count = j;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1098
pool->base.timing_generator_count = j;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1100
if (!resource_construct(num_virtual_links, dc, &pool->base,
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1108
dc->caps.max_planes = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
1138
return &pool->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
379
return &opp->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
397
return &aux_engine->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
466
clk_src->base.dp_clk_src = dp_clk_src;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
467
return &clk_src->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
506
return &tg110->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
519
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
520
if (pool->base.opps[i] != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
521
dce110_opp_destroy(&pool->base.opps[i]);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
523
if (pool->base.transforms[i] != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
524
dce120_transform_destroy(&pool->base.transforms[i]);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
526
if (pool->base.ipps[i] != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
527
dce_ipp_destroy(&pool->base.ipps[i]);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
529
if (pool->base.mis[i] != NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
530
kfree(TO_DCE_MEM_INPUT(pool->base.mis[i]));
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
531
pool->base.mis[i] = NULL;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
534
if (pool->base.irqs != NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
535
dal_irq_service_destroy(&pool->base.irqs);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
538
if (pool->base.timing_generators[i] != NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
539
kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i]));
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
540
pool->base.timing_generators[i] = NULL;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
544
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
545
if (pool->base.engines[i] != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
546
dce110_engine_destroy(&pool->base.engines[i]);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
547
if (pool->base.hw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
548
kfree(pool->base.hw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
549
pool->base.hw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
551
if (pool->base.sw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
552
kfree(pool->base.sw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
553
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
557
for (i = 0; i < pool->base.audio_count; i++) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
558
if (pool->base.audios[i])
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
559
dce_aud_destroy(&pool->base.audios[i]);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
562
for (i = 0; i < pool->base.stream_enc_count; i++) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
563
if (pool->base.stream_enc[i] != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
564
kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
567
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
568
if (pool->base.clock_sources[i] != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
570
&pool->base.clock_sources[i]);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
573
if (pool->base.dp_clock_source != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
574
dce120_clock_source_destroy(&pool->base.dp_clock_source);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
576
if (pool->base.abm != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
577
dce_abm_destroy(&pool->base.abm);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
579
if (pool->base.dmcu != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
580
dce_dmcu_destroy(&pool->base.dmcu);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
582
if (pool->base.dccg != NULL)
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
583
dce_dccg_destroy(&pool->base.dccg);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
638
return &enc110->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
653
return &ipp->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
669
return &enc110->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
740
return &dce_mi->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
756
return &transform->base;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
923
pool->base.res_cap = &res_cap;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
924
pool->base.funcs = &dce120_res_pool_funcs;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
927
pool->base.pipe_count = res_cap.num_timing_generator;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
928
pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
929
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
943
pool->base.clock_sources[DCE120_CLK_SRC_PLL0] =
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
947
pool->base.clock_sources[DCE120_CLK_SRC_PLL1] =
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
951
pool->base.clock_sources[DCE120_CLK_SRC_PLL2] =
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
955
pool->base.clock_sources[DCE120_CLK_SRC_PLL3] =
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
959
pool->base.clock_sources[DCE120_CLK_SRC_PLL4] =
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
963
pool->base.clock_sources[DCE120_CLK_SRC_PLL5] =
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
967
pool->base.clk_src_count = DCE120_CLK_SRC_TOTAL;
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
969
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
974
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
975
if (pool->base.clock_sources[i] == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
982
pool->base.dccg = dce120_dccg_create(ctx);
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
983
if (pool->base.dccg == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
989
pool->base.dmcu = dce_dmcu_create(ctx,
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
993
if (pool->base.dmcu == NULL) {
sys/dev/drm/amd/display/dc/dce120/dce120_resource.c
999
pool->base.abm = dce_abm_create(ctx,
sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c
1185
tg110->base.inst = instance;
sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c
1189
tg110->base.funcs = &dce120_tg_funcs;
sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c
1191
tg110->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c
1192
tg110->base.bp = ctx->dc_bios;
sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c
43
generic_reg_update_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__)
sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c
46
generic_reg_set_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1003
pool->base.opps[i] = dce80_opp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1004
if (pool->base.opps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1011
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1012
pool->base.engines[i] = dce80_aux_engine_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1013
if (pool->base.engines[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1019
pool->base.hw_i2cs[i] = dce80_i2c_hw_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1020
if (pool->base.hw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1026
pool->base.sw_i2cs[i] = dce80_i2c_sw_create(ctx);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1027
if (pool->base.sw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1035
dc->caps.max_planes = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1038
if (!resource_construct(num_virtual_links, dc, &pool->base,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1063
return &pool->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1082
pool->base.res_cap = &res_cap_81;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1083
pool->base.funcs = &dce80_res_pool_funcs;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1089
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1090
pool->base.pipe_count = res_cap_81.num_timing_generator;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1091
pool->base.timing_generator_count = res_cap_81.num_timing_generator;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1105
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1108
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1110
pool->base.clock_sources[1] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1112
pool->base.clock_sources[2] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1114
pool->base.clk_src_count = 3;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1117
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1120
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1122
pool->base.clock_sources[1] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1124
pool->base.clk_src_count = 2;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1127
if (pool->base.dp_clock_source == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1133
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1134
if (pool->base.clock_sources[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1141
pool->base.dccg = dce_dccg_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1145
if (pool->base.dccg == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1151
pool->base.dmcu = dce_dmcu_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1155
if (pool->base.dmcu == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1161
pool->base.abm = dce_abm_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1165
if (pool->base.abm == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1172
pool->base.dccg->max_clks_state =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1178
pool->base.irqs = dal_irq_service_dce80_create(&init_data);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1179
if (!pool->base.irqs)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1183
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1184
pool->base.timing_generators[i] = dce80_timing_generator_create(
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1186
if (pool->base.timing_generators[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1192
pool->base.mis[i] = dce80_mem_input_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1193
if (pool->base.mis[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1199
pool->base.ipps[i] = dce80_ipp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1200
if (pool->base.ipps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1206
pool->base.transforms[i] = dce80_transform_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1207
if (pool->base.transforms[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1213
pool->base.opps[i] = dce80_opp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1214
if (pool->base.opps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1221
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1222
pool->base.engines[i] = dce80_aux_engine_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1223
if (pool->base.engines[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1229
pool->base.hw_i2cs[i] = dce80_i2c_hw_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1230
if (pool->base.hw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1236
pool->base.sw_i2cs[i] = dce80_i2c_sw_create(ctx);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1237
if (pool->base.sw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1245
dc->caps.max_planes = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1248
if (!resource_construct(num_virtual_links, dc, &pool->base,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1273
return &pool->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1292
pool->base.res_cap = &res_cap_83;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1293
pool->base.funcs = &dce80_res_pool_funcs;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1299
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1300
pool->base.pipe_count = res_cap_83.num_timing_generator;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1301
pool->base.timing_generator_count = res_cap_83.num_timing_generator;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1315
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1318
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1320
pool->base.clock_sources[1] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1322
pool->base.clk_src_count = 2;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1325
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1328
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1330
pool->base.clk_src_count = 1;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1333
if (pool->base.dp_clock_source == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1339
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1340
if (pool->base.clock_sources[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1347
pool->base.dccg = dce_dccg_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1351
if (pool->base.dccg == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1357
pool->base.dmcu = dce_dmcu_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1361
if (pool->base.dmcu == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1367
pool->base.abm = dce_abm_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1371
if (pool->base.abm == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1378
pool->base.dccg->max_clks_state =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1384
pool->base.irqs = dal_irq_service_dce80_create(&init_data);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1385
if (!pool->base.irqs)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1389
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1390
pool->base.timing_generators[i] = dce80_timing_generator_create(
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1392
if (pool->base.timing_generators[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1398
pool->base.mis[i] = dce80_mem_input_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1399
if (pool->base.mis[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1405
pool->base.ipps[i] = dce80_ipp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1406
if (pool->base.ipps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1412
pool->base.transforms[i] = dce80_transform_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1413
if (pool->base.transforms[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1419
pool->base.opps[i] = dce80_opp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1420
if (pool->base.opps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1427
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1428
pool->base.engines[i] = dce80_aux_engine_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1429
if (pool->base.engines[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1435
pool->base.hw_i2cs[i] = dce80_i2c_hw_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1436
if (pool->base.hw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1442
pool->base.sw_i2cs[i] = dce80_i2c_sw_create(ctx);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1443
if (pool->base.sw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1451
dc->caps.max_planes = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1454
if (!resource_construct(num_virtual_links, dc, &pool->base,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
1479
return &pool->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
455
return &tg110->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
470
return &opp->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
488
return &aux_engine->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
553
return &enc110->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
629
return &dce_mi->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
651
return &transform->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
677
return &enc110->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
696
clk_src->base.dp_clk_src = dp_clk_src;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
697
return &clk_src->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
723
return &ipp->base;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
730
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
731
if (pool->base.opps[i] != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
732
dce110_opp_destroy(&pool->base.opps[i]);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
734
if (pool->base.transforms[i] != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
735
dce80_transform_destroy(&pool->base.transforms[i]);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
737
if (pool->base.ipps[i] != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
738
dce_ipp_destroy(&pool->base.ipps[i]);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
740
if (pool->base.mis[i] != NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
741
kfree(TO_DCE_MEM_INPUT(pool->base.mis[i]));
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
742
pool->base.mis[i] = NULL;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
745
if (pool->base.timing_generators[i] != NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
746
kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i]));
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
747
pool->base.timing_generators[i] = NULL;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
751
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
752
if (pool->base.engines[i] != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
753
dce110_engine_destroy(&pool->base.engines[i]);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
754
if (pool->base.hw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
755
kfree(pool->base.hw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
756
pool->base.hw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
758
if (pool->base.sw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
759
kfree(pool->base.sw_i2cs[i]);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
760
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
764
for (i = 0; i < pool->base.stream_enc_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
765
if (pool->base.stream_enc[i] != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
766
kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
769
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
770
if (pool->base.clock_sources[i] != NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
771
dce80_clock_source_destroy(&pool->base.clock_sources[i]);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
775
if (pool->base.abm != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
776
dce_abm_destroy(&pool->base.abm);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
778
if (pool->base.dmcu != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
779
dce_dmcu_destroy(&pool->base.dmcu);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
781
if (pool->base.dp_clock_source != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
782
dce80_clock_source_destroy(&pool->base.dp_clock_source);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
784
for (i = 0; i < pool->base.audio_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
785
if (pool->base.audios[i] != NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
786
dce_aud_destroy(&pool->base.audios[i]);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
790
if (pool->base.dccg != NULL)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
791
dce_dccg_destroy(&pool->base.dccg);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
793
if (pool->base.irqs != NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
794
dal_irq_service_destroy(&pool->base.irqs);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
872
pool->base.res_cap = &res_cap;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
873
pool->base.funcs = &dce80_res_pool_funcs;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
879
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
880
pool->base.pipe_count = res_cap.num_timing_generator;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
881
pool->base.timing_generator_count = res_cap.num_timing_generator;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
895
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
898
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
900
pool->base.clock_sources[1] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
902
pool->base.clock_sources[2] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
904
pool->base.clk_src_count = 3;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
907
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
910
pool->base.clock_sources[0] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
912
pool->base.clock_sources[1] =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
914
pool->base.clk_src_count = 2;
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
917
if (pool->base.dp_clock_source == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
923
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
924
if (pool->base.clock_sources[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
931
pool->base.dccg = dce_dccg_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
935
if (pool->base.dccg == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
941
pool->base.dmcu = dce_dmcu_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
945
if (pool->base.dmcu == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
951
pool->base.abm = dce_abm_create(ctx,
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
955
if (pool->base.abm == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
962
pool->base.dccg->max_clks_state =
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
968
pool->base.irqs = dal_irq_service_dce80_create(&init_data);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
969
if (!pool->base.irqs)
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
973
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
974
pool->base.timing_generators[i] = dce80_timing_generator_create(
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
976
if (pool->base.timing_generators[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
982
pool->base.mis[i] = dce80_mem_input_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
983
if (pool->base.mis[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
989
pool->base.ipps[i] = dce80_ipp_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
990
if (pool->base.ipps[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
996
pool->base.transforms[i] = dce80_transform_create(ctx, i);
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
997
if (pool->base.transforms[i] == NULL) {
sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c
226
tg110->base.inst = instance;
sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c
230
tg110->base.funcs = &dce80_tg_funcs;
sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c
232
tg110->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dce80/dce80_timing_generator.c
233
tg110->base.bp = ctx->dc_bios;
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c
45
dpp->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c
550
dpp->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c
552
dpp->base.inst = inst;
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c
553
dpp->base.funcs = &dcn10_dpp_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c
554
dpp->base.caps = &dcn10_dpp_cap;
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.h
1345
struct dpp base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.h
31
container_of(dpp, struct dcn10_dpp, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
160
dpp->base.ctx,
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
170
dpp->base.ctx,
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
180
dpp->base.ctx,
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
262
dpp->base.ctx,
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
417
cm_helper_program_xfer_func(dpp->base.ctx, params, &gam_regs);
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
446
cm_helper_program_xfer_func(dpp->base.ctx, params, &gam_regs);
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
46
dpp->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
516
dpp->base.ctx,
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
571
cm_helper_program_xfer_func(dpp->base.ctx, params, &gam_regs);
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
599
cm_helper_program_xfer_func(dpp->base.ctx, params, &gam_regs);
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
209
if (dpp->base.caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
46
dpp->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
473
if (dpp->base.ctx->dc->debug.use_max_lb)
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
476
dpp->base.caps->dscl_calc_lb_num_partitions(
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
483
dpp->base.caps->dscl_calc_lb_num_partitions(
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
492
dpp->base.caps->dscl_calc_lb_num_partitions(
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
500
dpp->base.caps->dscl_calc_lb_num_partitions(
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
629
if (dpp->base.ctx->dc->debug.visual_confirm != VISUAL_CONFIRM_DISABLE)
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
643
- visual_confirm_on * 4 * (dpp->base.inst + 1));
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
1210
hubp1->base.funcs = &dcn10_hubp_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
1211
hubp1->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
1215
hubp1->base.inst = inst;
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
1216
hubp1->base.opp_id = 0xf;
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
1217
hubp1->base.mpcc_id = 0xf;
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
35
hubp1->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.h
31
container_of(hubp, struct dcn10_hubp, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.h
658
struct hubp base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_ipp.c
38
ippn10->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_ipp.c
62
ippn10->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dcn10/dcn10_ipp.c
63
ippn10->base.inst = inst;
sys/dev/drm/amd/display/dc/dcn10/dcn10_ipp.c
64
ippn10->base.funcs = &dcn10_ipp_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_ipp.h
149
struct input_pixel_processor base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_ipp.h
32
container_of(ipp, struct dcn10_ipp, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1004
cntl.transmitter = enc10->base.transmitter;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1005
cntl.hpd_sel = enc10->base.hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1007
cntl.connector_obj_id = enc10->base.connector;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1038
cntl.transmitter = enc10->base.transmitter;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1039
cntl.connector_obj_id = enc10->base.connector;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1041
cntl.hpd_sel = enc10->base.hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1342
enum hpd_source_id hpd_source = enc10->base.hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
356
enc10->base.funcs->setup(&enc10->base, SIGNAL_TYPE_DISPLAY_PORT);
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
38
enc10->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
40
enc10->base.ctx->logger
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
515
enum hpd_source_id hpd_source = enc10->base.hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
536
max_pixel_clock = enc10->base.features.max_hdmi_pixel_clock;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
577
enc10->base.features.max_hdmi_deep_color;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
588
(adjusted_pix_clk_khz > enc10->base.features.max_hdmi_pixel_clock))
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
592
if (!enc10->base.features.ycbcr420_supported &&
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
596
if (!enc10->base.features.flags.bits.HDMI_6GB_EN &&
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
599
if (enc10->base.ctx->dc->debug.hdmi20_disable &&
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
629
enc10->base.funcs = &dcn10_lnk_enc_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
630
enc10->base.ctx = init_data->ctx;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
631
enc10->base.id = init_data->encoder;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
633
enc10->base.hpd_source = init_data->hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
634
enc10->base.connector = init_data->connector;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
636
enc10->base.preferred_engine = ENGINE_ID_UNKNOWN;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
638
enc10->base.features = *enc_features;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
640
enc10->base.transmitter = init_data->transmitter;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
651
enc10->base.output_signals =
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
677
switch (enc10->base.transmitter) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
679
enc10->base.preferred_engine = ENGINE_ID_DIGA;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
682
enc10->base.preferred_engine = ENGINE_ID_DIGB;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
685
enc10->base.preferred_engine = ENGINE_ID_DIGC;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
688
enc10->base.preferred_engine = ENGINE_ID_DIGD;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
691
enc10->base.preferred_engine = ENGINE_ID_DIGE;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
694
enc10->base.preferred_engine = ENGINE_ID_DIGF;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
697
enc10->base.preferred_engine = ENGINE_ID_DIGG;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
701
enc10->base.preferred_engine = ENGINE_ID_UNKNOWN;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
705
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
707
result = bp_funcs->get_encoder_cap_info(enc10->base.ctx->dc_bios,
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
708
enc10->base.id, &bp_cap_info);
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
712
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
714
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
716
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
722
if (enc10->base.ctx->dc->debug.hdmi20_disable) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
723
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
777
cntl.transmitter = enc10->base.transmitter;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
778
cntl.connector_obj_id = enc10->base.connector;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
781
cntl.hpd_sel = enc10->base.hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
783
if (enc10->base.connector.id == CONNECTOR_ID_EDP)
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
795
if (enc10->base.connector.id == CONNECTOR_ID_LVDS) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
873
cntl.transmitter = enc10->base.transmitter;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
881
cntl.hpd_sel = enc10->base.hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
915
cntl.transmitter = enc10->base.transmitter;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
919
cntl.hpd_sel = enc10->base.hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
954
cntl.transmitter = enc10->base.transmitter;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
958
cntl.hpd_sel = enc10->base.hpd_source;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
96
struct dc_bios *bp = enc10->base.ctx->dc_bios;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.h
220
struct link_encoder base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.h
32
container_of(link_encoder, struct dcn10_link_encoder, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
33
mpc10->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
452
mpc10->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
454
mpc10->base.funcs = &dcn10_mpc_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c
464
mpc1_init_mpcc(&mpc10->base.mpcc_array[i], i);
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.h
119
struct mpc base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.h
31
container_of(mpc_base, struct dcn10_mpc, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
38
oppn10->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
407
oppn10->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
408
oppn10->base.inst = inst;
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
409
oppn10->base.funcs = &dcn10_opp_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.h
147
struct output_pixel_processor base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.h
31
container_of(opp, struct dcn10_opp, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
1417
optc1->base.funcs = &dcn10_tg_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
35
optc1->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.h
32
container_of(tg, struct optc, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.h
424
struct timing_generator base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1195
pool->base.res_cap = &rv2_res_cap;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1198
pool->base.res_cap = &res_cap;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1199
pool->base.funcs = &dcn10_res_pool_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1209
pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1212
pool->base.pipe_count = pool->base.res_cap->num_timing_generator;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1216
pool->base.pipe_count = 3;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1237
pool->base.clock_sources[DCN10_CLK_SRC_PLL0] =
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1241
pool->base.clock_sources[DCN10_CLK_SRC_PLL1] =
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1245
pool->base.clock_sources[DCN10_CLK_SRC_PLL2] =
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1252
pool->base.clock_sources[DCN10_CLK_SRC_PLL3] =
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1258
pool->base.clock_sources[DCN10_CLK_SRC_PLL3] =
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1264
pool->base.clk_src_count = DCN10_CLK_SRC_TOTAL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1268
pool->base.clk_src_count = DCN101_CLK_SRC_TOTAL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1271
pool->base.dp_clock_source =
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1277
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1278
if (pool->base.clock_sources[i] == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1285
pool->base.dccg = dcn1_dccg_create(ctx);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1286
if (pool->base.dccg == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1292
pool->base.dmcu = dcn10_dmcu_create(ctx,
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1296
if (pool->base.dmcu == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1302
pool->base.abm = dce_abm_create(ctx,
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1306
if (pool->base.abm == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1350
pool->base.pp_smu = dcn10_pp_smu_create(ctx);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1356
dc->res_pool = &pool->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1363
pool->base.irqs = dal_irq_service_dcn10_create(&init_data);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1364
if (!pool->base.irqs)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1371
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1378
pool->base.hubps[j] = dcn10_hubp_create(ctx, i);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1379
if (pool->base.hubps[j] == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1386
pool->base.ipps[j] = dcn10_ipp_create(ctx, i);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1387
if (pool->base.ipps[j] == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1394
pool->base.dpps[j] = dcn10_dpp_create(ctx, i);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1395
if (pool->base.dpps[j] == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1402
pool->base.opps[j] = dcn10_opp_create(ctx, i);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1403
if (pool->base.opps[j] == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1410
pool->base.timing_generators[j] = dcn10_timing_generator_create(
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1412
if (pool->base.timing_generators[j] == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1421
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1422
pool->base.engines[i] = dcn10_aux_engine_create(ctx, i);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1423
if (pool->base.engines[i] == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1429
pool->base.hw_i2cs[i] = dcn10_i2c_hw_create(ctx, i);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1430
if (pool->base.hw_i2cs[i] == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1436
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1440
pool->base.pipe_count = j;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1441
pool->base.timing_generator_count = j;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1446
dc->dml.ip.max_num_dpp = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1447
dc->dcn_ip->max_num_dpp = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1449
pool->base.mpc = dcn10_mpc_create(ctx);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1450
if (pool->base.mpc == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1456
pool->base.hubbub = dcn10_hubbub_create(ctx);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1457
if (pool->base.hubbub == NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1463
if (!resource_construct(num_virtual_links, dc, &pool->base,
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1469
dc->caps.max_planes = pool->base.pipe_count;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1493
return &pool->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
578
return &dpp->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
594
return &ipp->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
611
return &opp->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
629
return &aux_engine->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
680
return &mpc10->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
709
tgn10->base.inst = instance;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
710
tgn10->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
718
return &tgn10->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
750
return &enc10->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
769
clk_src->base.dp_clk_src = dp_clk_src;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
770
return &clk_src->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
805
return &enc1->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
873
for (i = 0; i < pool->base.stream_enc_count; i++) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
874
if (pool->base.stream_enc[i] != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
878
kfree(pool->base.stream_enc[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
879
pool->base.stream_enc[i] = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
883
if (pool->base.mpc != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
884
kfree(TO_DCN10_MPC(pool->base.mpc));
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
885
pool->base.mpc = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
888
if (pool->base.hubbub != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
889
kfree(pool->base.hubbub);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
890
pool->base.hubbub = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
893
for (i = 0; i < pool->base.pipe_count; i++) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
894
if (pool->base.opps[i] != NULL)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
895
pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
897
if (pool->base.dpps[i] != NULL)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
898
dcn10_dpp_destroy(&pool->base.dpps[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
900
if (pool->base.ipps[i] != NULL)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
901
pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
903
if (pool->base.hubps[i] != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
904
kfree(TO_DCN10_HUBP(pool->base.hubps[i]));
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
905
pool->base.hubps[i] = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
908
if (pool->base.irqs != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
909
dal_irq_service_destroy(&pool->base.irqs);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
912
if (pool->base.timing_generators[i] != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
913
kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i]));
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
914
pool->base.timing_generators[i] = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
918
for (i = 0; i < pool->base.res_cap->num_ddc; i++) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
919
if (pool->base.engines[i] != NULL)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
920
pool->base.engines[i]->funcs->destroy_engine(&pool->base.engines[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
921
if (pool->base.hw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
922
kfree(pool->base.hw_i2cs[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
923
pool->base.hw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
925
if (pool->base.sw_i2cs[i] != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
926
kfree(pool->base.sw_i2cs[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
927
pool->base.sw_i2cs[i] = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
931
for (i = 0; i < pool->base.stream_enc_count; i++)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
932
kfree(pool->base.stream_enc[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
934
for (i = 0; i < pool->base.audio_count; i++) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
935
if (pool->base.audios[i])
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
936
dce_aud_destroy(&pool->base.audios[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
939
for (i = 0; i < pool->base.clk_src_count; i++) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
940
if (pool->base.clock_sources[i] != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
941
dcn10_clock_source_destroy(&pool->base.clock_sources[i]);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
942
pool->base.clock_sources[i] = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
946
if (pool->base.dp_clock_source != NULL) {
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
947
dcn10_clock_source_destroy(&pool->base.dp_clock_source);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
948
pool->base.dp_clock_source = NULL;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
951
if (pool->base.abm != NULL)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
952
dce_abm_destroy(&pool->base.abm);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
954
if (pool->base.dmcu != NULL)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
955
dce_dmcu_destroy(&pool->base.dmcu);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
957
if (pool->base.dccg != NULL)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
958
dce_dccg_destroy(&pool->base.dccg);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
960
kfree(pool->base.pp_smu);
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
975
return &hubp1->base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.h
32
container_of(pool, struct dcn10_resource_pool, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.h
39
struct resource_pool base;
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
1462
enc1->base.funcs = &dcn10_str_enc_funcs;
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
1463
enc1->base.ctx = ctx;
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
1464
enc1->base.id = eng_id;
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
1465
enc1->base.bp = bp;
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
33
enc1->base.ctx->logger
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
488
cntl.engine_id = enc1->base.id;
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
494
if (enc1->base.bp->funcs->encoder_control(
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
495
enc1->base.bp, &cntl) != BP_RESULT_OK)
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
53
enc1->base.ctx
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
593
cntl.engine_id = enc1->base.id;
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
600
if (enc1->base.bp->funcs->encoder_control(
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
601
enc1->base.bp, &cntl) != BP_RESULT_OK)
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
32
container_of(stream_encoder, struct dcn10_stream_encoder, base)
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
440
struct stream_encoder base;
sys/dev/drm/amd/display/dc/dml/dml_inline_defs.h
108
static inline double dml_log(double x, double base)
sys/dev/drm/amd/display/dc/dml/dml_inline_defs.h
110
return (double) dcn_bw_log(x, base);
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
119
ddc->base.regs = &ddc_data_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
123
ddc->base.regs = &ddc_clk_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
142
hpd->base.regs = &hpd_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
138
ddc->base.regs = &ddc_data_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
142
ddc->base.regs = &ddc_clk_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
161
hpd->base.regs = &hpd_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
123
ddc->base.regs = &ddc_data_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
127
ddc->base.regs = &ddc_clk_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
146
hpd->base.regs = &hpd_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
133
ddc->base.regs = &ddc_data_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
137
ddc->base.regs = &ddc_clk_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
156
hpd->base.regs = &hpd_regs[en].gpio;
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
157
if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
158
(hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
167
if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
168
(hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
177
if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
178
(hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
208
dal_hw_gpio_construct(&ddc->base, id, en, ctx);
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
209
ddc->base.base.funcs = &funcs;
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
231
return &pin->base.base;
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
41
ddc->base.base.ctx
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
48
dal_hw_gpio_destruct(&pin->base);
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
74
hw_gpio = &ddc->base;
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
92
if (hw_gpio->base.en != GPIO_DDC_LINE_VIP_PAD) {
sys/dev/drm/amd/display/dc/gpio/hw_ddc.h
32
struct hw_gpio base;
sys/dev/drm/amd/display/dc/gpio/hw_ddc.h
39
container_of((HW_GPIO_FROM_BASE(hw_gpio)), struct hw_ddc, base)
sys/dev/drm/amd/display/dc/gpio/hw_gpio.c
145
gpio->base.mode = mode;
sys/dev/drm/amd/display/dc/gpio/hw_gpio.c
185
pin->base.ctx = ctx;
sys/dev/drm/amd/display/dc/gpio/hw_gpio.c
186
pin->base.id = id;
sys/dev/drm/amd/display/dc/gpio/hw_gpio.c
187
pin->base.en = en;
sys/dev/drm/amd/display/dc/gpio/hw_gpio.c
188
pin->base.mode = GPIO_MODE_UNKNOWN;
sys/dev/drm/amd/display/dc/gpio/hw_gpio.c
189
pin->base.opened = false;
sys/dev/drm/amd/display/dc/gpio/hw_gpio.c
202
ASSERT(!pin->base.opened);
sys/dev/drm/amd/display/dc/gpio/hw_gpio.c
38
gpio->base.ctx
sys/dev/drm/amd/display/dc/gpio/hw_gpio.h
110
container_of((hw_gpio_pin), struct hw_gpio, base)
sys/dev/drm/amd/display/dc/gpio/hw_gpio.h
32
container_of((ptr), struct hw_gpio, base)
sys/dev/drm/amd/display/dc/gpio/hw_gpio.h
94
struct hw_gpio_pin base;
sys/dev/drm/amd/display/dc/gpio/hw_hpd.c
134
hpd->base.base.funcs = &funcs;
sys/dev/drm/amd/display/dc/gpio/hw_hpd.c
161
return &hpd->base.base;
sys/dev/drm/amd/display/dc/gpio/hw_hpd.c
40
hpd->base.base.ctx
sys/dev/drm/amd/display/dc/gpio/hw_hpd.c
50
dal_hw_gpio_construct(&pin->base, id, en, ctx);
sys/dev/drm/amd/display/dc/gpio/hw_hpd.c
56
dal_hw_gpio_destruct(&pin->base);
sys/dev/drm/amd/display/dc/gpio/hw_hpd.h
32
struct hw_gpio base;
sys/dev/drm/amd/display/dc/gpio/hw_hpd.h
39
container_of((HW_GPIO_FROM_BASE(hw_gpio)), struct hw_hpd, base)
sys/dev/drm/amd/display/dc/i2caux/aux_engine.c
58
container_of((ptr), struct aux_engine, base)
sys/dev/drm/amd/display/dc/i2caux/aux_engine.c
597
dal_i2caux_construct_engine(&engine->base, ctx);
sys/dev/drm/amd/display/dc/i2caux/aux_engine.c
60
engine->base.ctx->logger
sys/dev/drm/amd/display/dc/i2caux/aux_engine.c
605
dal_i2caux_destruct_engine(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/aux_engine.h
61
struct engine base;
sys/dev/drm/amd/display/dc/i2caux/dce100/i2caux_dce100.c
107
return &i2caux_dce110->base;
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
277
EVENT_LOG_AUX_REQ(engine->base.ddc->pin_data->en, EVENT_LOG_AUX_ORIGIN_NATIVE,
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
343
EVENT_LOG_AUX_REP(engine->base.ddc->pin_data->en,
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
472
dal_aux_engine_construct(&engine->base, aux_init_data->ctx);
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
473
engine->base.base.funcs = &engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
474
engine->base.funcs = &aux_engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
48
aux110->base.base.ctx
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
483
dal_aux_engine_destruct(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
504
return &engine->base;
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
63
container_of((ptr), struct aux_engine_dce110, base)
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
71
FROM_AUX_ENGINE(container_of((ptr), struct aux_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.h
55
struct aux_engine base;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
113
struct i2c_engine *base = NULL;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
116
base = &hw_engine->base.base;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
120
base->funcs->set_speed(base, hw_engine->base.original_speed);
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
153
if (hw_engine->base.base.setup_limit != 0)
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
154
i2c_setup_limit = hw_engine->base.base.setup_limit;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
167
if (hw_engine->base.base.send_reset_length == 0) {
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
174
reset_length = hw_engine->base.base.send_reset_length;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
200
hw_engine->base.default_speed;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
280
ctx = hw_engine->base.base.base.ctx;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
375
if (is_hw_busy(&engine->base)) {
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
452
uint32_t speed = engine->base.funcs->get_speed(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
476
dal_i2c_hw_engine_destruct(&engine_dce110->base);
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
513
dal_i2c_hw_engine_construct(&hw_engine->base, arg->ctx);
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
515
hw_engine->base.base.base.funcs = &engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
516
hw_engine->base.base.funcs = &i2c_engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
517
hw_engine->base.funcs = &i2c_hw_engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
518
hw_engine->base.default_speed = arg->default_speed;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
52
hw_engine->base.base.base.ctx->logger
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
573
return &engine_dce10->base.base;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
73
container_of((ptr), struct i2c_hw_engine_dce110, base)
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
80
FROM_I2C_HW_ENGINE(container_of((ptr), struct i2c_hw_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
88
FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
91
hw_engine->base.base.base.ctx
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.h
176
struct i2c_hw_engine base;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
130
dal_i2c_sw_engine_construct(&engine_dce110->base, &arg_base);
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
133
engine_dce110->base.base.base.funcs = &engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
135
engine_dce110->base.base.funcs = &i2c_engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
136
engine_dce110->base.default_speed = arg_dce110->default_speed;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
159
return &engine_dce110->base.base;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
56
container_of((ptr), struct i2c_sw_engine_dce110, base)
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
63
FROM_I2C_SW_ENGINE(container_of((ptr), struct i2c_sw_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
71
FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c
81
dal_i2c_sw_engine_destruct(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.h
30
struct i2c_sw_engine base;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
106
engine->base.funcs->acquire(&engine->base, ddc)) {
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
214
struct i2caux *base = NULL;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
222
base = &i2caux_dce110->base;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
224
dal_i2caux_construct(base, ctx);
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
226
i2caux_dce110->base.funcs = &i2caux_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
240
sw_arg.default_speed = base->default_i2c_sw_speed;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
242
base->i2c_sw_engines[line_id] =
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
248
hw_arg_dce110.default_speed = base->default_i2c_hw_speed;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
254
base->i2c_hw_engines[line_id] =
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
256
if (base->i2c_hw_engines[line_id] != NULL) {
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
259
base->i2c_hw_engines[line_id]->setup_limit =
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
261
base->i2c_hw_engines[line_id]->send_reset_length = 0;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
264
base->i2c_hw_engines[line_id]->setup_limit =
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
266
base->i2c_hw_engines[line_id]->send_reset_length = 0;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
284
aux_init_data.timeout_period = base->aux_timeout_period;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
288
base->aux_engines[line_id] =
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
328
return &i2caux_dce110->base;
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
59
container_of((ptr), struct i2caux_dce110, base)
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c
64
dal_i2caux_destruct(&i2caux_dce110->base);
sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.h
32
struct i2caux base;
sys/dev/drm/amd/display/dc/i2caux/dce112/i2caux_dce112.c
128
return &i2caux_dce110->base;
sys/dev/drm/amd/display/dc/i2caux/dce120/i2caux_dce120.c
121
return &i2caux_dce110->base;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
102
ctx = engine->base.base.base.ctx;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
120
struct i2c_engine *base = NULL;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
124
base = &hw_engine->base.base;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
128
base->funcs->set_speed(base, hw_engine->base.original_speed);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
183
dal_i2c_hw_engine_destruct(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
208
value = dm_read_reg(i2c_engine->base.ctx, addr);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
246
dm_write_reg(i2c_engine->base.ctx, addr, value);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
253
value = dm_read_reg(i2c_engine->base.ctx, addr);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
267
dm_write_reg(i2c_engine->base.ctx, addr, value);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
275
value = dm_read_reg(i2c_engine->base.ctx,
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
290
dm_write_reg(i2c_engine->base.ctx,
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
306
uint32_t value = dm_read_reg(i2c_engine->base.ctx, addr);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
318
engine->base.default_speed;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
330
uint32_t value = dm_read_reg(i2c_engine->base.ctx, addr);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
344
dm_write_reg(i2c_engine->base.ctx, addr, value);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
416
ctx = engine->base.base.base.ctx;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
543
ctx = engine->base.base.base.ctx;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
651
if (is_hw_busy(&engine->base)) {
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
687
dm_write_reg(engine->base.ctx, mmDC_I2C_DATA, value);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
695
value = dm_read_reg(engine->base.ctx, mmDC_I2C_DATA);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
711
uint32_t value = dm_read_reg(engine->base.ctx, mmDC_I2C_SW_STATUS);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
747
uint32_t speed = engine->base.funcs->get_speed(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
76
container_of((ptr), struct i2c_hw_engine_dce80, base)
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
831
dal_i2c_hw_engine_construct(&engine->base, arg->ctx);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
833
engine->base.base.base.funcs = &engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
834
engine->base.base.funcs = &i2c_engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
835
engine->base.funcs = &i2c_hw_engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
836
engine->base.default_speed = arg->default_speed;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
84
FROM_I2C_HW_ENGINE(container_of((ptr), struct i2c_hw_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
874
return &engine->base.base;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c
92
FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.h
30
struct i2c_hw_engine base;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
147
dal_i2c_sw_engine_construct(&engine->base, &arg_base);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
149
engine->base.base.base.funcs = &engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
150
engine->base.base.funcs = &i2c_engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
151
engine->base.default_speed = arg->default_speed;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
173
return &engine->base.base;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
71
container_of((ptr), struct i2c_sw_engine_dce80, base)
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
79
FROM_I2C_SW_ENGINE(container_of((ptr), struct i2c_sw_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
87
FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c
98
dal_i2c_sw_engine_destruct(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.h
30
struct i2c_sw_engine base;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
140
engine->base.funcs->acquire(&engine->base, ddc)) {
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
145
if (engine->base.funcs->acquire(&engine->base, ddc))
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
197
struct i2caux *base = &i2caux_dce80->base;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
210
dal_i2caux_construct(base, ctx);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
212
i2caux_dce80->base.funcs = &i2caux_funcs;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
230
sw_arg.default_speed = base->default_i2c_sw_speed;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
232
base->i2c_sw_engines[line_id] =
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
238
hw_arg.default_speed = base->default_i2c_hw_speed;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
241
base->i2c_hw_engines[line_id] =
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
258
arg.timeout_period = base->aux_timeout_period;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
262
base->aux_engines[line_id] =
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
283
return &i2caux_dce80->base;
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
89
container_of((ptr), struct i2caux_dce80, base)
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c
94
dal_i2caux_destruct(&i2caux_dce80->base);
sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.h
30
struct i2caux base;
sys/dev/drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c
121
return &i2caux_dce110->base;
sys/dev/drm/amd/display/dc/i2caux/i2c_engine.c
110
dal_i2caux_construct_engine(&engine->base, ctx);
sys/dev/drm/amd/display/dc/i2caux/i2c_engine.c
117
dal_i2caux_destruct_engine(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/i2c_engine.c
49
container_of((ptr), struct i2c_engine, base)
sys/dev/drm/amd/display/dc/i2caux/i2c_engine.h
86
struct engine base;
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
199
operation_result = base->funcs->wait_on_operation_result(
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
200
base,
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
201
base->funcs->get_transaction_timeout(
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
202
base, current_transaction_size),
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
260
const struct i2c_engine *base = &engine->base;
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
262
uint32_t speed = base->funcs->get_speed(base);
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
277
dal_i2c_hw_engine_construct(&engine->base, ctx);
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
283
dal_i2c_hw_engine_destruct(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
56
container_of((ptr), struct i2c_generic_hw_engine, base)
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
64
FROM_I2C_HW_ENGINE(container_of((ptr), struct i2c_hw_engine, base))
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
72
FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
94
struct i2c_hw_engine *base = &hw_engine->base;
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c
97
base->funcs->get_hw_buffer_available_size(base);
sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.h
58
struct i2c_hw_engine base;
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
122
hw_engine->base.funcs->submit_channel_request(
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
123
&hw_engine->base, &request);
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
172
hw_engine->base.funcs->
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
173
process_channel_reply(&hw_engine->base, &reply);
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
196
engine->base.ddc = ddc;
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
224
result = engine->base.funcs->get_channel_status(
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
225
&engine->base, NULL);
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
242
dal_i2c_engine_construct(&engine->base, ctx);
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
250
dal_i2c_engine_destruct(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
56
container_of((ptr), struct i2c_hw_engine, base)
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c
64
FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.h
48
struct i2c_engine base;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
351
container_of((ptr), struct i2c_sw_engine, base)
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
359
FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
374
struct i2c_engine *base = &sw_engine->base;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
398
base->funcs->submit_channel_request(base, &request);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
409
base->funcs->get_channel_status(base, NULL);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
474
engine->base.ddc = ddc;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
485
struct ddc *ddc = engine->base.ddc;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
490
bool result = start_sync(engine->base.ctx, ddc, clock_delay_div_4);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
498
result = i2c_write(engine->base.ctx, ddc, clock_delay_div_4,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
503
result = i2c_read(engine->base.ctx, ddc, clock_delay_div_4,
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
517
if (!stop_sync(engine->base.ctx, ddc, clock_delay_div_4))
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
536
dal_i2c_engine_destruct(&engine->base);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
576
dal_i2c_engine_construct(&engine->base, arg->ctx);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
577
dal_i2c_sw_engine_set_speed(&engine->base, arg->default_speed);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
578
engine->base.funcs = &i2c_engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
579
engine->base.base.funcs = &engine_funcs;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
600
return &engine->base;
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.h
39
struct i2c_engine base;
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
182
if (!engine->base.funcs->submit_request(
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
183
&engine->base, &request, mot)) {
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
191
i2caux->funcs->release_engine(i2caux, &engine->base);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
255
if (!engine->base.funcs->submit_request(
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
256
&engine->base, &request, mot)) {
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
264
i2caux->funcs->release_engine(i2caux, &engine->base);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
308
i2caux->funcs->release_engine(i2caux, &engine->base);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
393
if (!engine->base.funcs->acquire(&engine->base, ddc))
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
414
if (!engine->base.funcs->acquire(&engine->base, ddc))
sys/dev/drm/amd/display/modules/color/color_gamma.c
115
struct fixed31_32 base, div;
sys/dev/drm/amd/display/modules/color/color_gamma.c
123
base = dc_fixpt_sub(l_pow_m1, c1);
sys/dev/drm/amd/display/modules/color/color_gamma.c
125
if (dc_fixpt_lt(base, dc_fixpt_zero))
sys/dev/drm/amd/display/modules/color/color_gamma.c
126
base = dc_fixpt_zero;
sys/dev/drm/amd/display/modules/color/color_gamma.c
130
*out_y = dc_fixpt_pow(dc_fixpt_div(base, div),
sys/dev/drm/amd/display/modules/color/color_gamma.c
86
struct fixed31_32 base;
sys/dev/drm/amd/display/modules/color/color_gamma.c
92
base = dc_fixpt_div(
sys/dev/drm/amd/display/modules/color/color_gamma.c
97
*out_y = dc_fixpt_pow(base, m2);
sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h
526
static int uPow(int base, int power)
sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h
531
return (base)*uPow(base, power - 1);
sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h
67
static int uPow(int base, int exponent); /* Returns base^exponent an INT */
sys/dev/drm/drm_agpsupport.c
385
entry->bound = dev->agp->base + (page << PAGE_SHIFT);
sys/dev/drm/drm_agpsupport.c
496
head->base = head->agp_info.ai_aperture_base;
sys/dev/drm/drm_atomic.c
1016
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic.c
312
crtc->base.id, crtc->name, crtc_state, state);
sys/dev/drm/drm_atomic.c
331
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic.c
341
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic.c
348
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic.c
364
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic.c
376
drm_printf(p, "crtc[%u]: %s\n", crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic.c
404
connector->base.id, connector->name);
sys/dev/drm/drm_atomic.c
414
connector->base.id, connector->name,
sys/dev/drm/drm_atomic.c
415
state->crtc->base.id);
sys/dev/drm/drm_atomic.c
421
connector->base.id, connector->name);
sys/dev/drm/drm_atomic.c
476
plane->base.id, plane->name, plane_state, state);
sys/dev/drm/drm_atomic.c
529
plane->base.id, plane->name);
sys/dev/drm/drm_atomic.c
533
plane->base.id, plane->name);
sys/dev/drm/drm_atomic.c
544
state->crtc->base.id, state->crtc->name,
sys/dev/drm/drm_atomic.c
545
plane->base.id, plane->name);
sys/dev/drm/drm_atomic.c
555
plane->base.id, plane->name,
sys/dev/drm/drm_atomic.c
568
plane->base.id, plane->name,
sys/dev/drm/drm_atomic.c
584
plane->base.id, plane->name,
sys/dev/drm/drm_atomic.c
595
plane->base.id, plane->name);
sys/dev/drm/drm_atomic.c
609
drm_printf(p, "plane[%u]: %s\n", plane->base.id, plane->name);
sys/dev/drm/drm_atomic.c
611
drm_printf(p, "\tfb=%u\n", state->fb ? state->fb->base.id : 0);
sys/dev/drm/drm_atomic.c
816
connector->base.id, connector->name,
sys/dev/drm/drm_atomic.c
837
drm_printf(p, "connector[%u]: %s\n", connector->base.id, connector->name);
sys/dev/drm/drm_atomic.c
842
drm_printf(p, "\tfb=%d\n", state->writeback_job->fb->base.id);
sys/dev/drm/drm_atomic.c
885
crtc->base.id, crtc->name, state);
sys/dev/drm/drm_atomic.c
937
crtc->base.id, crtc->name, state);
sys/dev/drm/drm_atomic.c
979
plane->base.id, plane->name);
sys/dev/drm/drm_atomic.c
988
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic.c
997
conn->base.id, conn->name);
sys/dev/drm/drm_atomic_helper.c
1003
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
1130
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
1154
encoder->base.id, encoder->name);
sys/dev/drm/drm_atomic_helper.c
1255
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
127
new_encoder->base.id, new_encoder->name,
sys/dev/drm/drm_atomic_helper.c
1279
encoder->base.id, encoder->name);
sys/dev/drm/drm_atomic_helper.c
128
connector->base.id, connector->name);
sys/dev/drm/drm_atomic_helper.c
1406
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
1446
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
164
encoder->base.id, encoder->name,
sys/dev/drm/drm_atomic_helper.c
165
connector->state->crtc->base.id,
sys/dev/drm/drm_atomic_helper.c
167
connector->base.id, connector->name);
sys/dev/drm/drm_atomic_helper.c
179
encoder->base.id, encoder->name,
sys/dev/drm/drm_atomic_helper.c
180
new_conn_state->crtc->base.id, new_conn_state->crtc->name,
sys/dev/drm/drm_atomic_helper.c
181
connector->base.id, connector->name);
sys/dev/drm/drm_atomic_helper.c
1835
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
1974
new_crtc_state->event->base.completion = &commit->flip_done;
sys/dev/drm/drm_atomic_helper.c
1975
new_crtc_state->event->base.completion_release = release_crtc_commit;
sys/dev/drm/drm_atomic_helper.c
2052
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
2060
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
2073
conn->base.id, conn->name);
sys/dev/drm/drm_atomic_helper.c
2081
conn->base.id, conn->name);
sys/dev/drm/drm_atomic_helper.c
2094
plane->base.id, plane->name);
sys/dev/drm/drm_atomic_helper.c
2102
plane->base.id, plane->name);
sys/dev/drm/drm_atomic_helper.c
263
encoder->base.id, encoder->name,
sys/dev/drm/drm_atomic_helper.c
264
encoder_crtc->base.id, encoder_crtc->name);
sys/dev/drm/drm_atomic_helper.c
286
connector->base.id,
sys/dev/drm/drm_atomic_helper.c
303
connector->base.id,
sys/dev/drm/drm_atomic_helper.c
327
connector->base.id, connector->name);
sys/dev/drm/drm_atomic_helper.c
3337
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
343
connector->base.id,
sys/dev/drm/drm_atomic_helper.c
350
new_encoder->base.id,
sys/dev/drm/drm_atomic_helper.c
352
new_connector_state->crtc->base.id,
sys/dev/drm/drm_atomic_helper.c
361
connector->base.id,
sys/dev/drm/drm_atomic_helper.c
363
new_encoder->base.id,
sys/dev/drm/drm_atomic_helper.c
365
new_connector_state->crtc->base.id,
sys/dev/drm/drm_atomic_helper.c
378
connector->base.id,
sys/dev/drm/drm_atomic_helper.c
380
new_encoder->base.id,
sys/dev/drm/drm_atomic_helper.c
382
new_connector_state->crtc->base.id,
sys/dev/drm/drm_atomic_helper.c
437
encoder->base.id, encoder->name);
sys/dev/drm/drm_atomic_helper.c
445
encoder->base.id, encoder->name);
sys/dev/drm/drm_atomic_helper.c
469
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
487
encoder->base.id, encoder->name);
sys/dev/drm/drm_atomic_helper.c
500
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
602
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
608
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
624
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
630
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
682
crtc->base.id, crtc->name,
sys/dev/drm/drm_atomic_helper.c
856
plane->base.id, plane->name);
sys/dev/drm/drm_atomic_helper.c
872
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_helper.c
968
encoder->base.id, encoder->name);
sys/dev/drm/drm_atomic_uapi.c
1099
ret = drm_event_reserve_init(dev, file_priv, &e->base,
sys/dev/drm/drm_atomic_uapi.c
1100
&e->event.base);
sys/dev/drm/drm_atomic_uapi.c
1132
crtc_state->event->base.fence = fence;
sys/dev/drm/drm_atomic_uapi.c
1213
if (event && (event->base.fence || event->base.file_priv)) {
sys/dev/drm/drm_atomic_uapi.c
1214
drm_event_cancel_free(dev, &event->base);
sys/dev/drm/drm_atomic_uapi.c
132
crtc->base.id, crtc->name,
sys/dev/drm/drm_atomic_uapi.c
141
crtc->base.id, crtc->name,
sys/dev/drm/drm_atomic_uapi.c
150
state->mode.name, crtc->base.id, crtc->name,
sys/dev/drm/drm_atomic_uapi.c
155
crtc->base.id, crtc->name, state);
sys/dev/drm/drm_atomic_uapi.c
206
plane->base.id, plane->name, plane_state,
sys/dev/drm/drm_atomic_uapi.c
207
crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_uapi.c
210
plane->base.id, plane->name, plane_state);
sys/dev/drm/drm_atomic_uapi.c
234
fb->base.id, plane->base.id, plane->name,
sys/dev/drm/drm_atomic_uapi.c
238
plane->base.id, plane->name, plane_state);
sys/dev/drm/drm_atomic_uapi.c
328
connector->base.id, connector->name,
sys/dev/drm/drm_atomic_uapi.c
329
conn_state, crtc->base.id, crtc->name);
sys/dev/drm/drm_atomic_uapi.c
332
connector->base.id, connector->name,
sys/dev/drm/drm_atomic_uapi.c
474
crtc->base.id, crtc->name,
sys/dev/drm/drm_atomic_uapi.c
475
property->base.id, property->name);
sys/dev/drm/drm_atomic_uapi.c
493
*val = (state->mode_blob) ? state->mode_blob->base.id : 0;
sys/dev/drm/drm_atomic_uapi.c
495
*val = (state->degamma_lut) ? state->degamma_lut->base.id : 0;
sys/dev/drm/drm_atomic_uapi.c
497
*val = (state->ctm) ? state->ctm->base.id : 0;
sys/dev/drm/drm_atomic_uapi.c
499
*val = (state->gamma_lut) ? state->gamma_lut->base.id : 0;
sys/dev/drm/drm_atomic_uapi.c
559
plane->base.id, plane->name, val);
sys/dev/drm/drm_atomic_uapi.c
574
plane->base.id, plane->name,
sys/dev/drm/drm_atomic_uapi.c
575
property->base.id, property->name);
sys/dev/drm/drm_atomic_uapi.c
591
*val = (state->fb) ? state->fb->base.id : 0;
sys/dev/drm/drm_atomic_uapi.c
595
*val = (state->crtc) ? state->crtc->base.id : 0;
sys/dev/drm/drm_atomic_uapi.c
658
fb->base.id, conn_state);
sys/dev/drm/drm_atomic_uapi.c
748
connector->base.id, connector->name,
sys/dev/drm/drm_atomic_uapi.c
749
property->base.id, property->name);
sys/dev/drm/drm_atomic_uapi.c
765
*val = (state->crtc) ? state->crtc->base.id : 0;
sys/dev/drm/drm_atomic_uapi.c
866
e->event.base.type = DRM_EVENT_FLIP_COMPLETE;
sys/dev/drm/drm_atomic_uapi.c
867
e->event.base.length = sizeof(e->event);
sys/dev/drm/drm_atomic_uapi.c
868
e->event.vbl.crtc_id = crtc->base.id;
sys/dev/drm/drm_atomic_uapi.c
89
mode->name, crtc->base.id, crtc->name, state);
sys/dev/drm/drm_atomic_uapi.c
94
crtc->base.id, crtc->name, state);
sys/dev/drm/drm_blend.c
205
drm_object_attach_property(&plane->base, prop, DRM_BLEND_ALPHA_OPAQUE);
sys/dev/drm/drm_blend.c
273
drm_object_attach_property(&plane->base, prop, rotation);
sys/dev/drm/drm_blend.c
356
drm_object_attach_property(&plane->base, prop, zpos);
sys/dev/drm/drm_blend.c
395
drm_object_attach_property(&plane->base, prop, zpos);
sys/dev/drm/drm_blend.c
416
return sa->plane->base.id - sb->plane->base.id;
sys/dev/drm/drm_blend.c
431
crtc->base.id, crtc->name);
sys/dev/drm/drm_blend.c
450
plane->base.id, plane->name,
sys/dev/drm/drm_blend.c
461
plane->base.id, plane->name, i);
sys/dev/drm/drm_blend.c
590
drm_object_attach_property(&plane->base, prop, DRM_MODE_BLEND_PREMULTI);
sys/dev/drm/drm_bufs.c
280
if (map->offset < dev->agp->base ||
sys/dev/drm/drm_bufs.c
281
map->offset > dev->agp->base +
sys/dev/drm/drm_bufs.c
283
map->offset += dev->agp->base;
sys/dev/drm/drm_bufs.c
720
agp_offset = dev->agp->base + request->agp_start;
sys/dev/drm/drm_color_mgmt.c
158
drm_object_attach_property(&crtc->base,
sys/dev/drm/drm_color_mgmt.c
160
drm_object_attach_property(&crtc->base,
sys/dev/drm/drm_color_mgmt.c
166
drm_object_attach_property(&crtc->base,
sys/dev/drm/drm_color_mgmt.c
170
drm_object_attach_property(&crtc->base,
sys/dev/drm/drm_color_mgmt.c
172
drm_object_attach_property(&crtc->base,
sys/dev/drm/drm_color_mgmt.c
449
drm_object_attach_property(&plane->base, prop, default_encoding);
sys/dev/drm/drm_color_mgmt.c
468
drm_object_attach_property(&plane->base, prop, default_range);
sys/dev/drm/drm_connector.c
1077
drm_object_attach_property(&connector->base,
sys/dev/drm/drm_connector.c
1310
drm_object_attach_property(&connector->base,
sys/dev/drm/drm_connector.c
1346
drm_object_attach_property(&connector->base, prop,
sys/dev/drm/drm_connector.c
1456
&connector->base,
sys/dev/drm/drm_connector.c
1484
&connector->base,
sys/dev/drm/drm_connector.c
1499
&connector->base,
sys/dev/drm/drm_connector.c
1543
drm_object_property_set_value(&connector->base,
sys/dev/drm/drm_connector.c
155
container_of(kref, struct drm_connector, base.refcount);
sys/dev/drm/drm_connector.c
1551
&connector->base,
sys/dev/drm/drm_connector.c
158
drm_mode_object_unregister(dev, &connector->base);
sys/dev/drm/drm_connector.c
1632
drm_object_attach_property(&connector->base, prop,
sys/dev/drm/drm_connector.c
1652
drm_object_property_set_value(&connector->base, property, value);
sys/dev/drm/drm_connector.c
1746
if (put_user(encoder->base.id, encoder_ptr + copied)) {
sys/dev/drm/drm_connector.c
1755
out_resp->connector_id = connector->base.id;
sys/dev/drm/drm_connector.c
176
drm_mode_object_unregister(dev, &connector->base);
sys/dev/drm/drm_connector.c
1814
out_resp->encoder_id = encoder->base.id;
sys/dev/drm/drm_connector.c
1820
ret = drm_mode_object_get_properties(&connector->base, file_priv->atomic,
sys/dev/drm/drm_connector.c
208
ret = __drm_mode_object_add(dev, &connector->base,
sys/dev/drm/drm_connector.c
214
connector->base.properties = &connector->properties;
sys/dev/drm/drm_connector.c
264
drm_object_attach_property(&connector->base,
sys/dev/drm/drm_connector.c
268
drm_object_attach_property(&connector->base,
sys/dev/drm/drm_connector.c
271
drm_object_attach_property(&connector->base,
sys/dev/drm/drm_connector.c
275
drm_object_attach_property(&connector->base,
sys/dev/drm/drm_connector.c
280
drm_object_attach_property(&connector->base, config->prop_crtc_id, 0);
sys/dev/drm/drm_connector.c
292
drm_mode_object_unregister(dev, &connector->base);
sys/dev/drm/drm_connector.c
331
connector->encoder_ids[i] = encoder->base.id;
sys/dev/drm/drm_connector.c
405
drm_mode_object_unregister(dev, &connector->base);
sys/dev/drm/drm_connector.c
459
drm_mode_object_register(connector->dev, &connector->base);
sys/dev/drm/drm_connector.c
606
if (!refcount_dec_and_test(&conn->base.refcount.refcount))
sys/dev/drm/drm_connector.c
641
} while (!kref_get_unless_zero(&iter->conn->base.refcount));
sys/dev/drm/drm_crtc.c
296
ret = drm_mode_object_add(dev, &crtc->base, DRM_MODE_OBJECT_CRTC);
sys/dev/drm/drm_crtc.c
311
drm_mode_object_unregister(dev, &crtc->base);
sys/dev/drm/drm_crtc.c
318
"CRTC:%d-%s", crtc->base.id, crtc->name);
sys/dev/drm/drm_crtc.c
320
crtc->base.properties = &crtc->properties;
sys/dev/drm/drm_crtc.c
334
drm_mode_object_unregister(dev, &crtc->base);
sys/dev/drm/drm_crtc.c
339
drm_object_attach_property(&crtc->base, config->prop_active, 0);
sys/dev/drm/drm_crtc.c
340
drm_object_attach_property(&crtc->base, config->prop_mode_id, 0);
sys/dev/drm/drm_crtc.c
341
drm_object_attach_property(&crtc->base,
sys/dev/drm/drm_crtc.c
373
drm_mode_object_unregister(dev, &crtc->base);
sys/dev/drm/drm_crtc.c
420
crtc_resp->fb_id = plane->state->fb->base.id;
sys/dev/drm/drm_crtc.c
422
crtc_resp->fb_id = plane->fb->base.id;
sys/dev/drm/drm_crtc.c
597
DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);
sys/dev/drm/drm_crtc.c
737
connector->base.id,
sys/dev/drm/drm_crtc_helper.c
346
DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);
sys/dev/drm/drm_crtc_helper.c
390
encoder->base.id, encoder->name,
sys/dev/drm/drm_crtc_helper.c
391
mode->base.id, mode->name);
sys/dev/drm/drm_crtc_helper.c
548
set->crtc->base.id, set->crtc->name,
sys/dev/drm/drm_crtc_helper.c
549
set->fb->base.id,
sys/dev/drm/drm_crtc_helper.c
553
set->crtc->base.id, set->crtc->name);
sys/dev/drm/drm_crtc_helper.c
705
connector->base.id, connector->name,
sys/dev/drm/drm_crtc_helper.c
706
new_crtc->base.id, new_crtc->name);
sys/dev/drm/drm_crtc_helper.c
709
connector->base.id, connector->name);
sys/dev/drm/drm_crtc_helper.c
728
set->crtc->base.id, set->crtc->name);
sys/dev/drm/drm_crtc_helper.c
735
DRM_DEBUG_KMS("\t[CONNECTOR:%d:%s] set DPMS on\n", set->connectors[i]->base.id,
sys/dev/drm/drm_dp_mst_topology.c
3143
__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
sys/dev/drm/drm_dp_mst_topology.c
3145
return &state->base;
sys/dev/drm/drm_dp_mst_topology.c
3183
return to_dp_mst_topology_state(drm_atomic_get_private_obj_state(state, &mgr->base));
sys/dev/drm/drm_dp_mst_topology.c
3242
drm_atomic_private_obj_init(&mgr->base,
sys/dev/drm/drm_dp_mst_topology.c
3243
&mst_state->base,
sys/dev/drm/drm_dp_mst_topology.c
3266
drm_atomic_private_obj_fini(&mgr->base);
sys/dev/drm/drm_edid.c
1674
u8 *base;
sys/dev/drm/drm_edid.c
1686
base = new;
sys/dev/drm/drm_edid.c
1693
memcpy(base, block, EDID_LENGTH);
sys/dev/drm/drm_edid.c
1694
base += EDID_LENGTH;
sys/dev/drm/drm_edid.c
4595
struct displayid_hdr *base;
sys/dev/drm/drm_edid.c
4597
base = (struct displayid_hdr *)&displayid[idx];
sys/dev/drm/drm_edid.c
4600
base->rev, base->bytes, base->prod_id, base->ext_count);
sys/dev/drm/drm_edid.c
4602
if (base->bytes + 5 > length - idx)
sys/dev/drm/drm_edid.c
4604
for (i = idx; i <= base->bytes + 5; i++) {
sys/dev/drm/drm_encoder.c
117
ret = drm_mode_object_add(dev, &encoder->base, DRM_MODE_OBJECT_ENCODER);
sys/dev/drm/drm_encoder.c
133
encoder->base.id);
sys/dev/drm/drm_encoder.c
145
drm_mode_object_unregister(dev, &encoder->base);
sys/dev/drm/drm_encoder.c
177
drm_mode_object_unregister(dev, &encoder->base);
sys/dev/drm/drm_encoder.c
233
if (crtc && drm_lease_held(file_priv, crtc->base.id))
sys/dev/drm/drm_encoder.c
234
enc_resp->crtc_id = crtc->base.id;
sys/dev/drm/drm_encoder.c
240
enc_resp->encoder_id = encoder->base.id;
sys/dev/drm/drm_encoder_slave.c
91
encoder->slave_funcs->set_config(&encoder->base,
sys/dev/drm/drm_fb_helper.c
2208
DRM_DEBUG_KMS("connector %d enabled? %s\n", connector->base.id,
sys/dev/drm/drm_fb_helper.c
2321
fb_helper_conn->connector->base.id);
sys/dev/drm/drm_fb_helper.c
2382
fb_helper_conn->connector->base.id);
sys/dev/drm/drm_fb_helper.c
2388
fb_helper_conn->connector->base.id, fb_helper_conn->connector->tile_group ? fb_helper_conn->connector->tile_group->id : 0);
sys/dev/drm/drm_fb_helper.c
2624
mode->name, fb_crtc->mode_set.crtc->base.id, offset->x, offset->y);
sys/dev/drm/drm_fb_helper.c
659
drm_object_property_set_value(&connector->base,
sys/dev/drm/drm_framebuffer.c
1084
drm_printf(&p, "framebuffer[%u]:\n", fb->base.id);
sys/dev/drm/drm_framebuffer.c
360
DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
sys/dev/drm/drm_framebuffer.c
361
r->fb_id = fb->base.id;
sys/dev/drm/drm_framebuffer.c
701
container_of(kref, struct drm_framebuffer, base.refcount);
sys/dev/drm/drm_framebuffer.c
708
drm_mode_object_unregister(dev, &fb->base);
sys/dev/drm/drm_framebuffer.c
744
ret = __drm_mode_object_add(dev, &fb->base, DRM_MODE_OBJECT_FB,
sys/dev/drm/drm_framebuffer.c
754
drm_mode_object_register(dev, &fb->base);
sys/dev/drm/drm_framebuffer.c
808
drm_mode_object_unregister(dev, &fb->base);
sys/dev/drm/drm_mode_config.c
107
put_user(fb->base.id, fb_id + count)) {
sys/dev/drm/drm_mode_config.c
124
if (drm_lease_held(file_priv, crtc->base.id)) {
sys/dev/drm/drm_mode_config.c
126
put_user(crtc->base.id, crtc_id + count))
sys/dev/drm/drm_mode_config.c
137
put_user(encoder->base.id, encoder_id + count))
sys/dev/drm/drm_mode_config.c
152
if (drm_lease_held(file_priv, connector->base.id)) {
sys/dev/drm/drm_mode_config.c
154
put_user(connector->base.id, connector_id + count)) {
sys/dev/drm/drm_mode_config.c
480
drm_printf(&p, "framebuffer[%u]:\n", fb->base.id);
sys/dev/drm/drm_mode_config.c
482
drm_framebuffer_free(&fb->base.refcount);
sys/dev/drm/drm_mode_object.c
353
if (put_user(prop->base.id, prop_ptr + count))
sys/dev/drm/drm_mode_object.c
422
if (obj->properties->properties[i]->base.id == prop_id)
sys/dev/drm/drm_modes.c
74
if (drm_mode_object_add(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) {
sys/dev/drm/drm_modes.c
911
int id = dst->base.id;
sys/dev/drm/drm_modes.c
915
dst->base.id = id;
sys/dev/drm/drm_modes.c
95
drm_mode_object_unregister(dev, &mode->base);
sys/dev/drm/drm_plane.c
1145
e->event.base.type = DRM_EVENT_FLIP_COMPLETE;
sys/dev/drm/drm_plane.c
1146
e->event.base.length = sizeof(e->event);
sys/dev/drm/drm_plane.c
1148
e->event.vbl.crtc_id = crtc->base.id;
sys/dev/drm/drm_plane.c
1150
ret = drm_event_reserve_init(dev, file_priv, &e->base, &e->event.base);
sys/dev/drm/drm_plane.c
1169
drm_event_cancel_free(dev, &e->base);
sys/dev/drm/drm_plane.c
149
drm_object_attach_property(&plane->base, config->modifiers_property,
sys/dev/drm/drm_plane.c
150
blob->base.id);
sys/dev/drm/drm_plane.c
193
ret = drm_mode_object_add(dev, &plane->base, DRM_MODE_OBJECT_PLANE);
sys/dev/drm/drm_plane.c
199
plane->base.properties = &plane->properties;
sys/dev/drm/drm_plane.c
206
drm_mode_object_unregister(dev, &plane->base);
sys/dev/drm/drm_plane.c
231
drm_mode_object_unregister(dev, &plane->base);
sys/dev/drm/drm_plane.c
248
drm_mode_object_unregister(dev, &plane->base);
sys/dev/drm/drm_plane.c
262
drm_object_attach_property(&plane->base,
sys/dev/drm/drm_plane.c
267
drm_object_attach_property(&plane->base, config->prop_fb_id, 0);
sys/dev/drm/drm_plane.c
268
drm_object_attach_property(&plane->base, config->prop_in_fence_fd, -1);
sys/dev/drm/drm_plane.c
269
drm_object_attach_property(&plane->base, config->prop_crtc_id, 0);
sys/dev/drm/drm_plane.c
270
drm_object_attach_property(&plane->base, config->prop_crtc_x, 0);
sys/dev/drm/drm_plane.c
271
drm_object_attach_property(&plane->base, config->prop_crtc_y, 0);
sys/dev/drm/drm_plane.c
272
drm_object_attach_property(&plane->base, config->prop_crtc_w, 0);
sys/dev/drm/drm_plane.c
273
drm_object_attach_property(&plane->base, config->prop_crtc_h, 0);
sys/dev/drm/drm_plane.c
274
drm_object_attach_property(&plane->base, config->prop_src_x, 0);
sys/dev/drm/drm_plane.c
275
drm_object_attach_property(&plane->base, config->prop_src_y, 0);
sys/dev/drm/drm_plane.c
276
drm_object_attach_property(&plane->base, config->prop_src_w, 0);
sys/dev/drm/drm_plane.c
277
drm_object_attach_property(&plane->base, config->prop_src_h, 0);
sys/dev/drm/drm_plane.c
360
drm_mode_object_unregister(dev, &plane->base);
sys/dev/drm/drm_plane.c
460
struct drm_mode_object *obj = &plane->base;
sys/dev/drm/drm_plane.c
497
if (drm_lease_held(file_priv, plane->base.id)) {
sys/dev/drm/drm_plane.c
499
put_user(plane->base.id, plane_ptr + count))
sys/dev/drm/drm_plane.c
524
if (plane->state && plane->state->crtc && drm_lease_held(file_priv, plane->state->crtc->base.id))
sys/dev/drm/drm_plane.c
525
plane_resp->crtc_id = plane->state->crtc->base.id;
sys/dev/drm/drm_plane.c
526
else if (!plane->state && plane->crtc && drm_lease_held(file_priv, plane->crtc->base.id))
sys/dev/drm/drm_plane.c
527
plane_resp->crtc_id = plane->crtc->base.id;
sys/dev/drm/drm_plane.c
532
plane_resp->fb_id = plane->state->fb->base.id;
sys/dev/drm/drm_plane.c
534
plane_resp->fb_id = plane->fb->base.id;
sys/dev/drm/drm_plane.c
539
plane_resp->plane_id = plane->base.id;
sys/dev/drm/drm_probe_helper.c
404
DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
sys/dev/drm/drm_probe_helper.c
449
connector->base.id,
sys/dev/drm/drm_probe_helper.c
474
connector->base.id, connector->name);
sys/dev/drm/drm_probe_helper.c
530
DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
sys/dev/drm/drm_probe_helper.c
638
connector->base.id,
sys/dev/drm/drm_probe_helper.c
785
connector->base.id,
sys/dev/drm/drm_property.c
117
ret = drm_mode_object_add(dev, &property->base, DRM_MODE_OBJECT_PROPERTY);
sys/dev/drm/drm_property.c
448
drm_mode_object_unregister(dev, &property->base);
sys/dev/drm/drm_property.c
527
container_of(kref, struct drm_property_blob, base.refcount);
sys/dev/drm/drm_property.c
533
drm_mode_object_unregister(blob->dev, &blob->base);
sys/dev/drm/drm_property.c
576
ret = __drm_mode_object_add(dev, &blob->base, DRM_MODE_OBJECT_BLOB,
sys/dev/drm/drm_property.c
603
drm_mode_object_put(&blob->base);
sys/dev/drm/drm_property.c
631
drm_mode_object_get(&blob->base);
sys/dev/drm/drm_property.c
713
new_blob->base.id : 0);
sys/dev/drm/drm_property.c
806
out_resp->blob_id = blob->base.id;
sys/dev/drm/drm_property.c
907
*ref = &blob->base;
sys/dev/drm/drm_syncobj.c
207
dma_fence_init(&fence->base, &drm_syncobj_stub_fence_ops,
sys/dev/drm/drm_syncobj.c
209
dma_fence_signal(&fence->base);
sys/dev/drm/drm_syncobj.c
211
drm_syncobj_replace_fence(syncobj, 0, &fence->base);
sys/dev/drm/drm_syncobj.c
213
dma_fence_put(&fence->base);
sys/dev/drm/drm_syncobj.c
60
struct dma_fence base;
sys/dev/drm/drm_trace.h
31
#define trace_i915_ppgtt_create(base)
sys/dev/drm/drm_trace.h
32
#define trace_i915_ppgtt_release(base)
sys/dev/drm/drm_vblank.c
1155
list_for_each_entry_safe(e, t, &dev->vblank_event_list, base.link) {
sys/dev/drm/drm_vblank.c
1161
list_del(&e->base.link);
sys/dev/drm/drm_vblank.c
1421
e->event.base.type = DRM_EVENT_VBLANK;
sys/dev/drm/drm_vblank.c
1422
e->event.base.length = sizeof(e->event.vbl);
sys/dev/drm/drm_vblank.c
1428
e->event.vbl.crtc_id = crtc->base.id;
sys/dev/drm/drm_vblank.c
1444
ret = drm_event_reserve_init_locked(dev, file_priv, &e->base,
sys/dev/drm/drm_vblank.c
1445
&e->event.base);
sys/dev/drm/drm_vblank.c
1464
list_add_tail(&e->base.link, &dev->vblank_event_list);
sys/dev/drm/drm_vblank.c
1562
if (drm_lease_held(file_priv, crtc->base.id)) {
sys/dev/drm/drm_vblank.c
1656
list_for_each_entry_safe(e, t, &dev->vblank_event_list, base.link) {
sys/dev/drm/drm_vblank.c
1665
list_del(&e->base.link);
sys/dev/drm/drm_vblank.c
1871
e->event.base.type = DRM_EVENT_CRTC_SEQUENCE;
sys/dev/drm/drm_vblank.c
1872
e->event.base.length = sizeof(e->event.seq);
sys/dev/drm/drm_vblank.c
1888
ret = drm_event_reserve_init_locked(dev, file_priv, &e->base,
sys/dev/drm/drm_vblank.c
1889
&e->event.base);
sys/dev/drm/drm_vblank.c
1902
list_add_tail(&e->base.link, &dev->vblank_event_list);
sys/dev/drm/drm_vblank.c
534
crtc->base.id);
sys/dev/drm/drm_vblank.c
541
crtc->base.id, mode->crtc_htotal,
sys/dev/drm/drm_vblank.c
544
crtc->base.id, dotclock, framedur_ns, linedur_ns);
sys/dev/drm/drm_vblank.c
818
switch (e->event.base.type) {
sys/dev/drm/drm_vblank.c
837
trace_drm_vblank_event_delivered(e->base.file_priv, e->pipe, seq);
sys/dev/drm/drm_vblank.c
838
drm_send_event_locked(dev, &e->base);
sys/dev/drm/drm_vblank.c
889
list_add_tail(&e->base.link, &dev->vblank_event_list);
sys/dev/drm/i915/gvt/gvt.h
319
#define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.base.total)
sys/dev/drm/i915/gvt/gvt.h
321
((gvt->dev_priv->ggtt.base.total >> PAGE_SHIFT) << 3)
sys/dev/drm/i915/gvt/gvt.h
357
#define vgpu_fence_base(vgpu) (vgpu->fence.base)
sys/dev/drm/i915/gvt/gvt.h
93
u32 base;
sys/dev/drm/i915/i915_drv.c
790
ap->ranges[0].base = ggtt->gmadr.start;
sys/dev/drm/i915/i915_drv.h
3383
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
1002
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
1142
ret = mutex_lock_interruptible(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
1147
mutex_unlock(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
1175
loff_t base, int offset,
sys/dev/drm/i915/i915_gem.c
1182
vaddr = io_mapping_map_atomic_wc(mapping, base);
sys/dev/drm/i915/i915_gem.c
1188
vaddr = io_mapping_map_wc(mapping, base, PAGE_SIZE);
sys/dev/drm/i915/i915_gem.c
1201
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
1323
if (range_overflows_t(u64, args->offset, args->size, obj->base.size)) {
sys/dev/drm/i915/i915_gem.c
1357
loff_t base, int offset,
sys/dev/drm/i915/i915_gem.c
1364
vaddr = io_mapping_map_atomic_wc(mapping, base);
sys/dev/drm/i915/i915_gem.c
1369
vaddr = io_mapping_map_wc(mapping, base, PAGE_SIZE);
sys/dev/drm/i915/i915_gem.c
1388
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
1567
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
1604
vm_obj = obj->base.filp;
sys/dev/drm/i915/i915_gem.c
1624
if (vm_obj != obj->base.filp) {
sys/dev/drm/i915/i915_gem.c
1626
vm_obj, obj->base.filp);
sys/dev/drm/i915/i915_gem.c
1668
if (range_overflows_t(u64, args->offset, args->size, obj->base.size)) {
sys/dev/drm/i915/i915_gem.c
1745
i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
1954
if (!obj->base.filp) {
sys/dev/drm/i915/i915_gem.c
1986
vm_object_hold(obj->base.filp);
sys/dev/drm/i915/i915_gem.c
1987
vm_object_reference_locked(obj->base.filp);
sys/dev/drm/i915/i915_gem.c
1988
vm_object_drop(obj->base.filp);
sys/dev/drm/i915/i915_gem.c
1991
rv = vm_map_find(map, obj->base.filp, NULL,
sys/dev/drm/i915/i915_gem.c
2001
vm_object_deallocate(obj->base.filp);
sys/dev/drm/i915/i915_gem.c
2013
addr = vm_mmap(obj->base.filp, 0, args->size,
sys/dev/drm/i915/i915_gem.c
2029
vm_obj = obj->base.filp;
sys/dev/drm/i915/i915_gem.c
2044
if (vma && __vma_matches(vma, obj->base.filp, addr, args->size))
sys/dev/drm/i915/i915_gem.c
2142
(obj->base.size >> PAGE_SHIFT) - view.partial.offset);
sys/dev/drm/i915/i915_gem.c
2145
if (chunk >= obj->base.size >> PAGE_SHIFT)
sys/dev/drm/i915/i915_gem.c
2156
node,struct drm_i915_gem_object, base.vma_node);
sys/dev/drm/i915/i915_gem.c
2178
drm_vma_node_unmap(&obj->base.vma_node, NULL);
sys/dev/drm/i915/i915_gem.c
2180
drm_vma_node_unmap(&obj->base.vma_node,
sys/dev/drm/i915/i915_gem.c
2181
obj->base.dev->anon_inode->i_mapping);
sys/dev/drm/i915/i915_gem.c
2234
struct drm_device *dev = obj->base.dev;
sys/dev/drm/i915/i915_gem.c
2250
area->vm_end = obj->base.size;
sys/dev/drm/i915/i915_gem.c
2346
PTR_ERR(vma), obj->base.size);
sys/dev/drm/i915/i915_gem.c
2525
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
2600
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
2603
err = drm_gem_create_mmap_offset(&obj->base);
sys/dev/drm/i915/i915_gem.c
2616
err = drm_gem_create_mmap_offset(&obj->base);
sys/dev/drm/i915/i915_gem.c
2628
drm_gem_free_mmap_offset(&obj->base);
sys/dev/drm/i915/i915_gem.c
2647
*offset = DRM_GEM_MAPPING_OFF(obj->base.map_list.key) |
sys/dev/drm/i915/i915_gem.c
2682
vm_object_t vm_obj = obj->base.filp;
sys/dev/drm/i915/i915_gem.c
2684
if (obj->base.filp == NULL)
sys/dev/drm/i915/i915_gem.c
2697
shmem_truncate_range(file_inode(obj->base.filp), 0, (loff_t)-1);
sys/dev/drm/i915/i915_gem.c
2720
if (obj->base.filp == NULL)
sys/dev/drm/i915/i915_gem.c
2724
mapping = obj->base.filp->f_mapping,
sys/dev/drm/i915/i915_gem.c
2727
invalidate_mapping_pages(obj->base.filp, 0, (loff_t)-1);
sys/dev/drm/i915/i915_gem.c
2773
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
280
struct address_space *mapping = obj->base.filp->f_mapping;
sys/dev/drm/i915/i915_gem.c
282
vm_object_t vm_obj = obj->base.filp;
sys/dev/drm/i915/i915_gem.c
2862
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
2863
const unsigned long page_count = obj->base.size / PAGE_SIZE;
sys/dev/drm/i915/i915_gem.c
2908
mapping = obj->base.filp;
sys/dev/drm/i915/i915_gem.c
298
phys = drm_pci_alloc(obj->base.dev,
sys/dev/drm/i915/i915_gem.c
299
roundup_pow_of_two(obj->base.size),
sys/dev/drm/i915/i915_gem.c
300
roundup_pow_of_two(obj->base.size));
sys/dev/drm/i915/i915_gem.c
3056
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
306
for (i = 0; i < obj->base.size / PAGE_SIZE; i++) {
sys/dev/drm/i915/i915_gem.c
3147
unsigned long n_pages = obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem.c
3268
struct address_space *mapping = obj->base.filp->f_mapping;
sys/dev/drm/i915/i915_gem.c
330
i915_gem_chipset_flush(to_i915(obj->base.dev));
sys/dev/drm/i915/i915_gem.c
3310
err = pagecache_write_begin(obj->base.filp, mapping,
sys/dev/drm/i915/i915_gem.c
3312
err = pagecache_write_begin(obj->base.filp, NULL,
sys/dev/drm/i915/i915_gem.c
3324
err = pagecache_write_end(obj->base.filp, mapping,
sys/dev/drm/i915/i915_gem.c
3326
err = pagecache_write_end(obj->base.filp, NULL,
sys/dev/drm/i915/i915_gem.c
346
sg->length = obj->base.size;
sys/dev/drm/i915/i915_gem.c
349
sg_dma_len(sg) = obj->base.size;
sys/dev/drm/i915/i915_gem.c
358
drm_pci_free(obj->base.dev, phys);
sys/dev/drm/i915/i915_gem.c
397
struct address_space *mapping = obj->base.filp->f_mapping;
sys/dev/drm/i915/i915_gem.c
399
vm_object_t vm_obj = obj->base.filp;
sys/dev/drm/i915/i915_gem.c
404
for (i = 0; i < obj->base.size / PAGE_SIZE; i++) {
sys/dev/drm/i915/i915_gem.c
4266
mutex_lock(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
4268
mutex_unlock(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
4284
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
429
drm_pci_free(obj->base.dev, obj->phys_handle);
sys/dev/drm/i915/i915_gem.c
4347
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
4418
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
4474
if (!HAS_LLC(to_i915(obj->base.dev)) &&
sys/dev/drm/i915/i915_gem.c
452
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
4640
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
4657
HAS_WT(to_i915(obj->base.dev)) ?
sys/dev/drm/i915/i915_gem.c
4729
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
4819
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
4824
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
4835
if (obj->base.size > dev_priv->ggtt.mappable_end)
sys/dev/drm/i915/i915_gem.c
4854
obj->base.size > dev_priv->ggtt.mappable_end / 2)
sys/dev/drm/i915/i915_gem.c
5113
i915_gem_info_add_obj(to_i915(obj->base.dev), obj->base.size);
sys/dev/drm/i915/i915_gem.c
5177
if (overflows_type(size, obj->base.size))
sys/dev/drm/i915/i915_gem.c
5184
ret = i915_gem_object_create_shmem(&dev_priv->drm, &obj->base, size);
sys/dev/drm/i915/i915_gem.c
5196
mapping = obj->base.filp->f_mapping;
sys/dev/drm/i915/i915_gem.c
5244
if (obj->base.filp == NULL)
sys/dev/drm/i915/i915_gem.c
5255
return atomic_long_read(&obj->base.filp->f_count) == 1;
sys/dev/drm/i915/i915_gem.c
5315
if (obj->base.import_attach)
sys/dev/drm/i915/i915_gem.c
5316
drm_prime_gem_destroy(&obj->base, NULL);
sys/dev/drm/i915/i915_gem.c
5319
drm_gem_object_release(&obj->base);
sys/dev/drm/i915/i915_gem.c
5320
i915_gem_info_remove_obj(i915, obj->base.size);
sys/dev/drm/i915/i915_gem.c
5384
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
5416
atomic_inc(&to_i915(obj->base.dev)->mm.free_count);
sys/dev/drm/i915/i915_gem.c
5422
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem.c
5643
static void init_unused_ring(struct drm_i915_private *dev_priv, u32 base)
sys/dev/drm/i915/i915_gem.c
5645
I915_WRITE(RING_CTL(base), 0);
sys/dev/drm/i915/i915_gem.c
5646
I915_WRITE(RING_HEAD(base), 0);
sys/dev/drm/i915/i915_gem.c
5647
I915_WRITE(RING_TAIL(base), 0);
sys/dev/drm/i915/i915_gem.c
5648
I915_WRITE(RING_START(base), 0);
sys/dev/drm/i915/i915_gem.c
6481
file = obj->base.filp;
sys/dev/drm/i915/i915_gem.c
6530
GEM_BUG_ON(n >= obj->base.size >> PAGE_SHIFT);
sys/dev/drm/i915/i915_gem.c
6620
unsigned long base = xa_to_value(sg);
sys/dev/drm/i915/i915_gem.c
6622
sg = radix_tree_lookup(&iter->radix, base);
sys/dev/drm/i915/i915_gem.c
6625
*offset = n - base;
sys/dev/drm/i915/i915_gem.c
6675
if (align > obj->base.size)
sys/dev/drm/i915/i915_gem.c
684
!!lockdep_is_held(&obj->base.dev->struct_mutex) !=
sys/dev/drm/i915/i915_gem.c
718
i915_gem_chipset_flush(to_i915(obj->base.dev));
sys/dev/drm/i915/i915_gem.c
731
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
755
ret = drm_gem_handle_create(file, &obj->base, &handle);
sys/dev/drm/i915/i915_gem.c
850
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem.c
950
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem_batch_pool.c
129
if (obj->base.size >= size)
sys/dev/drm/i915/i915_gem_clflush.c
151
to_i915(obj->base.dev)->mm.unordered_timeline,
sys/dev/drm/i915/i915_gem_dmabuf.c
120
if (page_num >= obj->base.size >> PAGE_SHIFT)
sys/dev/drm/i915/i915_gem_dmabuf.c
156
if (obj->base.size < vma->vm_end - vma->vm_start)
sys/dev/drm/i915/i915_gem_dmabuf.c
159
if (!obj->base.filp)
sys/dev/drm/i915/i915_gem_dmabuf.c
163
ret = call_mmap(obj->base.filp, vma);
sys/dev/drm/i915/i915_gem_dmabuf.c
168
vma->vm_file = get_file(obj->base.filp);
sys/dev/drm/i915/i915_gem_dmabuf.c
177
struct drm_device *dev = obj->base.dev;
sys/dev/drm/i915/i915_gem_dmabuf.c
200
struct drm_device *dev = obj->base.dev;
sys/dev/drm/i915/i915_gem_dmabuf.c
259
pages = dma_buf_map_attachment(obj->base.import_attach,
sys/dev/drm/i915/i915_gem_dmabuf.c
275
dma_buf_unmap_attachment(obj->base.import_attach, pages,
sys/dev/drm/i915/i915_gem_dmabuf.c
295
if (obj->base.dev == dev) {
sys/dev/drm/i915/i915_gem_dmabuf.c
300
return &i915_gem_object_get(obj)->base;
sys/dev/drm/i915/i915_gem_dmabuf.c
319
drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
sys/dev/drm/i915/i915_gem_dmabuf.c
321
obj->base.import_attach = attach;
sys/dev/drm/i915/i915_gem_dmabuf.c
334
return &obj->base;
sys/dev/drm/i915/i915_gem_execbuffer.c
941
GEM_BUG_ON(cache->rq_size >= cache->rq->batch->obj->base.size / sizeof(u32));
sys/dev/drm/i915/i915_gem_fence_reg.c
227
&vma->obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem_fence_reg.c
236
&old->obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem_fence_reg.c
786
const unsigned int page_count = obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_gtt.c
1724
static void gen6_dump_ppgtt(struct i915_hw_ppgtt *base, struct seq_file *m)
sys/dev/drm/i915/i915_gem_gtt.c
1726
struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
sys/dev/drm/i915/i915_gem_gtt.c
1731
gen6_for_all_pdes(pt, &base->pd, pde) {
sys/dev/drm/i915/i915_gem_gtt.c
1734
if (pt == base->vm.scratch_pt)
sys/dev/drm/i915/i915_gem_gtt.c
1753
vaddr = kmap_atomic_px(base->pd.page_table[pde]);
sys/dev/drm/i915/i915_gem_gtt.c
1855
struct i915_page_table *pt = ppgtt->base.pd.page_table[pde++];
sys/dev/drm/i915/i915_gem_gtt.c
1935
gen6_for_each_pde(pt, &ppgtt->base.pd, start, length, pde) {
sys/dev/drm/i915/i915_gem_gtt.c
1944
ppgtt->base.pd.page_table[pde] = pt;
sys/dev/drm/i915/i915_gem_gtt.c
1959
mark_tlbs_dirty(&ppgtt->base);
sys/dev/drm/i915/i915_gem_gtt.c
1960
gen6_ggtt_invalidate(ppgtt->base.vm.i915);
sys/dev/drm/i915/i915_gem_gtt.c
1972
struct i915_address_space * const vm = &ppgtt->base.vm;
sys/dev/drm/i915/i915_gem_gtt.c
1992
gen6_for_all_pdes(unused, &ppgtt->base.pd, pde)
sys/dev/drm/i915/i915_gem_gtt.c
1993
ppgtt->base.pd.page_table[pde] = vm->scratch_pt;
sys/dev/drm/i915/i915_gem_gtt.c
2009
gen6_for_all_pdes(pt, &ppgtt->base.pd, pde)
sys/dev/drm/i915/i915_gem_gtt.c
2010
if (pt != ppgtt->base.vm.scratch_pt)
sys/dev/drm/i915/i915_gem_gtt.c
2011
free_pt(&ppgtt->base.vm, pt);
sys/dev/drm/i915/i915_gem_gtt.c
2047
ppgtt->base.pd.base.ggtt_offset = ggtt_offset * sizeof(gen6_pte_t);
sys/dev/drm/i915/i915_gem_gtt.c
2050
gen6_for_all_pdes(pt, &ppgtt->base.pd, pde)
sys/dev/drm/i915/i915_gem_gtt.c
2053
mark_tlbs_dirty(&ppgtt->base);
sys/dev/drm/i915/i915_gem_gtt.c
2054
gen6_ggtt_invalidate(ppgtt->base.vm.i915);
sys/dev/drm/i915/i915_gem_gtt.c
2062
struct i915_page_table * const scratch_pt = ppgtt->base.vm.scratch_pt;
sys/dev/drm/i915/i915_gem_gtt.c
2070
gen6_for_all_pdes(pt, &ppgtt->base.pd, pde) {
sys/dev/drm/i915/i915_gem_gtt.c
2074
free_pt(&ppgtt->base.vm, pt);
sys/dev/drm/i915/i915_gem_gtt.c
2075
ppgtt->base.pd.page_table[pde] = scratch_pt;
sys/dev/drm/i915/i915_gem_gtt.c
2090
struct drm_i915_private *i915 = ppgtt->base.vm.i915;
sys/dev/drm/i915/i915_gem_gtt.c
2120
int gen6_ppgtt_pin(struct i915_hw_ppgtt *base)
sys/dev/drm/i915/i915_gem_gtt.c
2122
struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
sys/dev/drm/i915/i915_gem_gtt.c
2152
void gen6_ppgtt_unpin(struct i915_hw_ppgtt *base)
sys/dev/drm/i915/i915_gem_gtt.c
2154
struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
sys/dev/drm/i915/i915_gem_gtt.c
2173
kref_init(&ppgtt->base.ref);
sys/dev/drm/i915/i915_gem_gtt.c
2175
ppgtt->base.vm.i915 = i915;
sys/dev/drm/i915/i915_gem_gtt.c
2176
ppgtt->base.vm.dma = &i915->drm.pdev->dev;
sys/dev/drm/i915/i915_gem_gtt.c
2178
ppgtt->base.vm.total = I915_PDES * GEN6_PTES * I915_GTT_PAGE_SIZE;
sys/dev/drm/i915/i915_gem_gtt.c
2180
i915_address_space_init(&ppgtt->base.vm, i915);
sys/dev/drm/i915/i915_gem_gtt.c
2182
ppgtt->base.vm.allocate_va_range = gen6_alloc_va_range;
sys/dev/drm/i915/i915_gem_gtt.c
2183
ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
sys/dev/drm/i915/i915_gem_gtt.c
2184
ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries;
sys/dev/drm/i915/i915_gem_gtt.c
2185
ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup;
sys/dev/drm/i915/i915_gem_gtt.c
2186
ppgtt->base.debug_dump = gen6_dump_ppgtt;
sys/dev/drm/i915/i915_gem_gtt.c
2188
ppgtt->base.vm.vma_ops.bind_vma = ppgtt_bind_vma;
sys/dev/drm/i915/i915_gem_gtt.c
2189
ppgtt->base.vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
sys/dev/drm/i915/i915_gem_gtt.c
2190
ppgtt->base.vm.vma_ops.set_pages = ppgtt_set_pages;
sys/dev/drm/i915/i915_gem_gtt.c
2191
ppgtt->base.vm.vma_ops.clear_pages = clear_pages;
sys/dev/drm/i915/i915_gem_gtt.c
2193
ppgtt->base.vm.pte_encode = ggtt->vm.pte_encode;
sys/dev/drm/i915/i915_gem_gtt.c
2205
return &ppgtt->base;
sys/dev/drm/i915/i915_gem_gtt.c
2208
gen6_ppgtt_free_scratch(&ppgtt->base.vm);
sys/dev/drm/i915/i915_gem_gtt.c
2436
if (dma_map_sg_attrs(&obj->base.dev->pdev->dev,
sys/dev/drm/i915/i915_gem_gtt.c
2449
} while (i915_gem_shrink(to_i915(obj->base.dev),
sys/dev/drm/i915/i915_gem_gtt.c
2450
obj->base.size >> PAGE_SHIFT, NULL,
sys/dev/drm/i915/i915_gem_gtt.c
2816
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem_gtt.c
3772
const unsigned long n_pages = obj->base.size / I915_GTT_PAGE_SIZE;
sys/dev/drm/i915/i915_gem_gtt.c
3823
obj->base.size, rot_info->plane[0].width, rot_info->plane[0].height, size);
sys/dev/drm/i915/i915_gem_gtt.c
728
fill32_px(&ppgtt->base.vm, pt, ppgtt->scratch_pte);
sys/dev/drm/i915/i915_gem_gtt.h
230
#define px_base(px) (&(px)->base)
sys/dev/drm/i915/i915_gem_gtt.h
234
struct i915_page_dma base;
sys/dev/drm/i915/i915_gem_gtt.h
239
struct i915_page_dma base;
sys/dev/drm/i915/i915_gem_gtt.h
246
struct i915_page_dma base;
sys/dev/drm/i915/i915_gem_gtt.h
252
struct i915_page_dma base;
sys/dev/drm/i915/i915_gem_gtt.h
425
struct i915_hw_ppgtt base;
sys/dev/drm/i915/i915_gem_gtt.h
435
#define __to_gen6_ppgtt(base) container_of(base, struct gen6_hw_ppgtt, base)
sys/dev/drm/i915/i915_gem_gtt.h
437
static inline struct gen6_hw_ppgtt *to_gen6_ppgtt(struct i915_hw_ppgtt *base)
sys/dev/drm/i915/i915_gem_gtt.h
439
BUILD_BUG_ON(offsetof(struct gen6_hw_ppgtt, base));
sys/dev/drm/i915/i915_gem_gtt.h
440
return __to_gen6_ppgtt(base);
sys/dev/drm/i915/i915_gem_gtt.h
645
int gen6_ppgtt_pin(struct i915_hw_ppgtt *base);
sys/dev/drm/i915/i915_gem_gtt.h
646
void gen6_ppgtt_unpin(struct i915_hw_ppgtt *base);
sys/dev/drm/i915/i915_gem_internal.c
194
if (overflows_type(size, obj->base.size))
sys/dev/drm/i915/i915_gem_internal.c
201
drm_gem_private_object_init(&i915->drm, &obj->base, size);
sys/dev/drm/i915/i915_gem_internal.c
50
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem_internal.c
84
npages = obj->base.size / PAGE_SIZE;
sys/dev/drm/i915/i915_gem_object.c
41
else if (HAS_LLC(to_i915(obj->base.dev)))
sys/dev/drm/i915/i915_gem_object.h
291
BUILD_BUG_ON(offsetof(struct drm_i915_gem_object, base));
sys/dev/drm/i915/i915_gem_object.h
293
return container_of(gem, struct drm_i915_gem_object, base);
sys/dev/drm/i915/i915_gem_object.h
323
if (obj && !kref_get_unless_zero(&obj->base.refcount))
sys/dev/drm/i915/i915_gem_object.h
340
drm_gem_object_get(&obj->base);
sys/dev/drm/i915/i915_gem_object.h
348
__drm_gem_object_put(&obj->base);
sys/dev/drm/i915/i915_gem_object.h
364
obj->base.vma_node.readonly = true;
sys/dev/drm/i915/i915_gem_object.h
370
return obj->base.vma_node.readonly;
sys/dev/drm/i915/i915_gem_object.h
406
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem_object.h
413
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem_object.h
84
struct drm_gem_object base;
sys/dev/drm/i915/i915_gem_shrinker.c
258
count += obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_shrinker.c
262
scanned += obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_shrinker.c
323
count += obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_shrinker.c
329
count += obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_shrinker.c
441
unevictable += obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_shrinker.c
443
unbound += obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_shrinker.c
447
unevictable += obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_shrinker.c
449
bound += obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_stolen.c
202
resource_size_t *base,
sys/dev/drm/i915/i915_gem_stolen.c
225
*base = (reg_val & G4X_STOLEN_RESERVED_ADDR2_MASK) << 16;
sys/dev/drm/i915/i915_gem_stolen.c
226
WARN_ON((reg_val & G4X_STOLEN_RESERVED_ADDR1_MASK) < *base);
sys/dev/drm/i915/i915_gem_stolen.c
228
*size = stolen_top - *base;
sys/dev/drm/i915/i915_gem_stolen.c
232
resource_size_t *base,
sys/dev/drm/i915/i915_gem_stolen.c
242
*base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
sys/dev/drm/i915/i915_gem_stolen.c
264
resource_size_t *base,
sys/dev/drm/i915/i915_gem_stolen.c
288
*base = stolen_top - *size;
sys/dev/drm/i915/i915_gem_stolen.c
292
resource_size_t *base,
sys/dev/drm/i915/i915_gem_stolen.c
302
*base = reg_val & GEN7_STOLEN_RESERVED_ADDR_MASK;
sys/dev/drm/i915/i915_gem_stolen.c
318
resource_size_t *base,
sys/dev/drm/i915/i915_gem_stolen.c
328
*base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
sys/dev/drm/i915/i915_gem_stolen.c
350
resource_size_t *base,
sys/dev/drm/i915/i915_gem_stolen.c
364
*base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
sys/dev/drm/i915/i915_gem_stolen.c
365
*size = stolen_top - *base;
sys/dev/drm/i915/i915_gem_stolen.c
369
resource_size_t *base,
sys/dev/drm/i915/i915_gem_stolen.c
376
*base = reg_val & GEN11_STOLEN_RESERVED_ADDR_MASK;
sys/dev/drm/i915/i915_gem_stolen.c
545
i915_pages_create_for_stolen(obj->base.dev,
sys/dev/drm/i915/i915_gem_stolen.c
567
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem_stolen.c
595
drm_gem_private_object_init(&dev_priv->drm, &obj->base, stolen->size);
sys/dev/drm/i915/i915_gem_tiling.c
138
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem_tiling.c
224
struct drm_i915_private *i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem_tiling.c
305
obj->bit_17 = kcalloc(BITS_TO_LONGS(obj->base.size >> PAGE_SHIFT),
sys/dev/drm/i915/i915_gem_userptr.c
150
if (kref_get_unless_zero(&mo->obj->base.refcount))
sys/dev/drm/i915/i915_gem_userptr.c
275
mo->it.last = obj->userptr.ptr + obj->base.size - 1;
sys/dev/drm/i915/i915_gem_userptr.c
338
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem_userptr.c
362
mm->i915 = to_i915(obj->base.dev);
sys/dev/drm/i915/i915_gem_userptr.c
413
&to_i915(obj->base.dev)->mm_lock);
sys/dev/drm/i915/i915_gem_userptr.c
510
const int npages = obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_userptr.c
608
queue_work(to_i915(obj->base.dev)->mm.userptr_wq, &work->work);
sys/dev/drm/i915/i915_gem_userptr.c
617
const int num_pages = obj->base.size >> PAGE_SHIFT;
sys/dev/drm/i915/i915_gem_userptr.c
80
mutex_lock(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gem_userptr.c
825
drm_gem_private_object_init(dev, &obj->base, args->user_size);
sys/dev/drm/i915/i915_gem_userptr.c
843
ret = drm_gem_handle_create(file, &obj->base, &handle);
sys/dev/drm/i915/i915_gem_userptr.c
91
mutex_unlock(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_gpu_error.c
1040
err->size = obj->base.size;
sys/dev/drm/i915/i915_gpu_error.c
1041
err->name = obj->base.name;
sys/dev/drm/i915/i915_gpu_error.c
1452
.node = { .start = U64_MAX, .size = obj->base.size },
sys/dev/drm/i915/i915_gpu_error.c
1453
.size = obj->base.size,
sys/dev/drm/i915/i915_gpu_error.c
971
num_pages = min_t(u64, vma->size, vma->obj->base.size) >> PAGE_SHIFT;
sys/dev/drm/i915/i915_irq.c
1106
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/i915_irq.c
1771
drm_crtc_add_crc_entry(&crtc->base, true,
sys/dev/drm/i915/i915_irq.c
1772
drm_crtc_accurate_vblank_count(&crtc->base),
sys/dev/drm/i915/i915_irq.c
889
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/i915_irq.c
891
&crtc->base.dev->vblank[drm_crtc_index(&crtc->base)];
sys/dev/drm/i915/i915_irq.c
933
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/i915_irq.c
943
vblank = &crtc->base.dev->vblank[drm_crtc_index(&crtc->base)];
sys/dev/drm/i915/i915_pmu.c
1050
i915->pmu.base.attr_groups = i915_pmu_attr_groups;
sys/dev/drm/i915/i915_pmu.c
1051
i915->pmu.base.task_ctx_nr = perf_invalid_context;
sys/dev/drm/i915/i915_pmu.c
1052
i915->pmu.base.event_init = i915_pmu_event_init;
sys/dev/drm/i915/i915_pmu.c
1053
i915->pmu.base.add = i915_pmu_event_add;
sys/dev/drm/i915/i915_pmu.c
1054
i915->pmu.base.del = i915_pmu_event_del;
sys/dev/drm/i915/i915_pmu.c
1055
i915->pmu.base.start = i915_pmu_event_start;
sys/dev/drm/i915/i915_pmu.c
1056
i915->pmu.base.stop = i915_pmu_event_stop;
sys/dev/drm/i915/i915_pmu.c
1057
i915->pmu.base.read = i915_pmu_event_read;
sys/dev/drm/i915/i915_pmu.c
1058
i915->pmu.base.event_idx = i915_pmu_event_event_idx;
sys/dev/drm/i915/i915_pmu.c
1064
ret = perf_pmu_register(&i915->pmu.base, "i915", -1);
sys/dev/drm/i915/i915_pmu.c
1075
perf_pmu_unregister(&i915->pmu.base);
sys/dev/drm/i915/i915_pmu.c
1077
i915->pmu.base.event_init = NULL;
sys/dev/drm/i915/i915_pmu.c
1084
if (!i915->pmu.base.event_init)
sys/dev/drm/i915/i915_pmu.c
1093
perf_pmu_unregister(&i915->pmu.base);
sys/dev/drm/i915/i915_pmu.c
1094
i915->pmu.base.event_init = NULL;
sys/dev/drm/i915/i915_pmu.c
115
if (!i915->pmu.base.event_init)
sys/dev/drm/i915/i915_pmu.c
140
if (!i915->pmu.base.event_init)
sys/dev/drm/i915/i915_pmu.c
298
container_of(event->pmu, typeof(*i915), pmu.base);
sys/dev/drm/i915/i915_pmu.c
368
container_of(event->pmu, typeof(*i915), pmu.base);
sys/dev/drm/i915/i915_pmu.c
392
container_of(event->pmu, typeof(*i915), pmu.base);
sys/dev/drm/i915/i915_pmu.c
526
container_of(event->pmu, typeof(*i915), pmu.base);
sys/dev/drm/i915/i915_pmu.c
587
container_of(event->pmu, typeof(*i915), pmu.base);
sys/dev/drm/i915/i915_pmu.c
639
container_of(event->pmu, typeof(*i915), pmu.base);
sys/dev/drm/i915/i915_pmu.c
975
GEM_BUG_ON(!pmu->base.event_init);
sys/dev/drm/i915/i915_pmu.c
989
GEM_BUG_ON(!pmu->base.event_init);
sys/dev/drm/i915/i915_pmu.c
996
perf_pmu_migrate_context(&pmu->base, cpu, target);
sys/dev/drm/i915/i915_pmu.h
46
struct pmu base;
sys/dev/drm/i915/i915_pvinfo.h
75
u32 base;
sys/dev/drm/i915/i915_pvinfo.h
80
u32 base;
sys/dev/drm/i915/i915_reg.h
2324
#define RING_TAIL(base) _MMIO((base) + 0x30)
sys/dev/drm/i915/i915_reg.h
2325
#define RING_HEAD(base) _MMIO((base) + 0x34)
sys/dev/drm/i915/i915_reg.h
2326
#define RING_START(base) _MMIO((base) + 0x38)
sys/dev/drm/i915/i915_reg.h
2327
#define RING_CTL(base) _MMIO((base) + 0x3c)
sys/dev/drm/i915/i915_reg.h
2329
#define RING_SYNC_0(base) _MMIO((base) + 0x40)
sys/dev/drm/i915/i915_reg.h
2330
#define RING_SYNC_1(base) _MMIO((base) + 0x44)
sys/dev/drm/i915/i915_reg.h
2331
#define RING_SYNC_2(base) _MMIO((base) + 0x48)
sys/dev/drm/i915/i915_reg.h
2345
#define RING_PSMI_CTL(base) _MMIO((base) + 0x50)
sys/dev/drm/i915/i915_reg.h
2346
#define RING_MAX_IDLE(base) _MMIO((base) + 0x54)
sys/dev/drm/i915/i915_reg.h
2347
#define RING_HWS_PGA(base) _MMIO((base) + 0x80)
sys/dev/drm/i915/i915_reg.h
2348
#define RING_HWS_PGA_GEN6(base) _MMIO((base) + 0x2080)
sys/dev/drm/i915/i915_reg.h
2349
#define RING_RESET_CTL(base) _MMIO((base) + 0xd0)
sys/dev/drm/i915/i915_reg.h
2352
#define RING_SEMA_WAIT_POLL(base) _MMIO((base) + 0x24c)
sys/dev/drm/i915/i915_reg.h
2387
#define RING_ACTHD(base) _MMIO((base) + 0x74)
sys/dev/drm/i915/i915_reg.h
2388
#define RING_ACTHD_UDW(base) _MMIO((base) + 0x5c)
sys/dev/drm/i915/i915_reg.h
2389
#define RING_NOPID(base) _MMIO((base) + 0x94)
sys/dev/drm/i915/i915_reg.h
2390
#define RING_IMR(base) _MMIO((base) + 0xa8)
sys/dev/drm/i915/i915_reg.h
2391
#define RING_HWSTAM(base) _MMIO((base) + 0x98)
sys/dev/drm/i915/i915_reg.h
2392
#define RING_TIMESTAMP(base) _MMIO((base) + 0x358)
sys/dev/drm/i915/i915_reg.h
2393
#define RING_TIMESTAMP_UDW(base) _MMIO((base) + 0x358 + 4)
sys/dev/drm/i915/i915_reg.h
2410
#define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
sys/dev/drm/i915/i915_reg.h
2450
#define RING_IPEIR(base) _MMIO((base) + 0x64)
sys/dev/drm/i915/i915_reg.h
2451
#define RING_IPEHR(base) _MMIO((base) + 0x68)
sys/dev/drm/i915/i915_reg.h
2457
#define RING_INSTDONE(base) _MMIO((base) + 0x6c)
sys/dev/drm/i915/i915_reg.h
2458
#define RING_INSTPS(base) _MMIO((base) + 0x70)
sys/dev/drm/i915/i915_reg.h
2459
#define RING_DMA_FADD(base) _MMIO((base) + 0x78)
sys/dev/drm/i915/i915_reg.h
2460
#define RING_DMA_FADD_UDW(base) _MMIO((base) + 0x60) /* gen8+ */
sys/dev/drm/i915/i915_reg.h
2461
#define RING_INSTPM(base) _MMIO((base) + 0xc0)
sys/dev/drm/i915/i915_reg.h
2462
#define RING_MI_MODE(base) _MMIO((base) + 0x9c)
sys/dev/drm/i915/i915_reg.h
2477
#define RING_BBSTATE(base) _MMIO((base) + 0x110)
sys/dev/drm/i915/i915_reg.h
2479
#define RING_SBBADDR(base) _MMIO((base) + 0x114) /* hsw+ */
sys/dev/drm/i915/i915_reg.h
2480
#define RING_SBBSTATE(base) _MMIO((base) + 0x118) /* hsw+ */
sys/dev/drm/i915/i915_reg.h
2481
#define RING_SBBADDR_UDW(base) _MMIO((base) + 0x11c) /* gen8+ */
sys/dev/drm/i915/i915_reg.h
2482
#define RING_BBADDR(base) _MMIO((base) + 0x140)
sys/dev/drm/i915/i915_reg.h
2483
#define RING_BBADDR_UDW(base) _MMIO((base) + 0x168) /* gen8+ */
sys/dev/drm/i915/i915_reg.h
2484
#define RING_BB_PER_CTX_PTR(base) _MMIO((base) + 0x1c0) /* gen8+ */
sys/dev/drm/i915/i915_reg.h
2485
#define RING_INDIRECT_CTX(base) _MMIO((base) + 0x1c4) /* gen8+ */
sys/dev/drm/i915/i915_reg.h
2486
#define RING_INDIRECT_CTX_OFFSET(base) _MMIO((base) + 0x1c8) /* gen8+ */
sys/dev/drm/i915/i915_reg.h
2487
#define RING_CTX_TIMESTAMP(base) _MMIO((base) + 0x3a8) /* gen8+ */
sys/dev/drm/i915/i915_sw_fence.c
366
struct dma_fence_cb base;
sys/dev/drm/i915/i915_sw_fence.c
371
struct i915_sw_dma_fence_cb base;
sys/dev/drm/i915/i915_sw_fence.c
381
struct i915_sw_dma_fence_cb *cb = container_of(data, typeof(*cb), base);
sys/dev/drm/i915/i915_sw_fence.c
392
fence = xchg(&cb->base.fence, NULL);
sys/dev/drm/i915/i915_sw_fence.c
409
container_of(data, typeof(*cb), base.base);
sys/dev/drm/i915/i915_sw_fence.c
412
fence = xchg(&cb->base.fence, NULL);
sys/dev/drm/i915/i915_sw_fence.c
463
container_of(cb, typeof(*timer), base);
sys/dev/drm/i915/i915_sw_fence.c
475
ret = dma_fence_add_callback(dma, &cb->base, func);
sys/dev/drm/i915/i915_sw_fence.c
479
func(dma, &cb->base);
sys/dev/drm/i915/i915_trace.h
108
#define trace_i915_ppgtt_create(base)
sys/dev/drm/i915/i915_trace.h
109
#define trace_i915_ppgtt_release(base)
sys/dev/drm/i915/i915_vgpu.c
209
mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
sys/dev/drm/i915/i915_vgpu.c
211
unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
sys/dev/drm/i915/i915_vma.c
1009
if (i915_gem_active_isset(&active->base)) {
sys/dev/drm/i915/i915_vma.c
1011
__list_del_entry(&active->base.link);
sys/dev/drm/i915/i915_vma.c
1016
list_replace_init(&vma->last_active.link, &active->base.link);
sys/dev/drm/i915/i915_vma.c
1017
active->base.request = fetch_and_zero(&vma->last_active.request);
sys/dev/drm/i915/i915_vma.c
1107
ret = i915_gem_active_retire(&active->base,
sys/dev/drm/i915/i915_vma.c
114
i915_vma_retire(struct i915_gem_active *base, struct i915_request *rq)
sys/dev/drm/i915/i915_vma.c
117
container_of(base, typeof(*active), base);
sys/dev/drm/i915/i915_vma.c
123
i915_vma_last_retire(struct i915_gem_active *base, struct i915_request *rq)
sys/dev/drm/i915/i915_vma.c
125
__i915_vma_retire(container_of(base, struct i915_vma, last_active), rq);
sys/dev/drm/i915/i915_vma.c
151
vma->size = obj->base.size;
sys/dev/drm/i915/i915_vma.c
160
obj->base.size >> PAGE_SHIFT));
sys/dev/drm/i915/i915_vma.c
163
GEM_BUG_ON(vma->size > obj->base.size);
sys/dev/drm/i915/i915_vma.c
275
lockdep_assert_held(&obj->base.dev->struct_mutex);
sys/dev/drm/i915/i915_vma.c
67
struct i915_gem_active base;
sys/dev/drm/i915/i915_vma.c
813
GEM_BUG_ON(i915_gem_active_isset(&iter->base));
sys/dev/drm/i915/i915_vma.c
867
node,struct drm_i915_gem_object, base.vma_node);
sys/dev/drm/i915/i915_vma.c
874
page_count = OFF_TO_IDX(obj->base.size);
sys/dev/drm/i915/i915_vma.c
894
struct drm_vma_offset_node *node = &vma->obj->base.vma_node;
sys/dev/drm/i915/i915_vma.c
994
init_request_active(&active->base, i915_vma_retire);
sys/dev/drm/i915/icl_dsi.c
32
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/icl_dsi.c
33
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/icl_dsi.c
59
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/icl_dsi.c
60
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/icl_dsi.c
79
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/icl_dsi.c
80
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/intel_atomic.c
100
property->base.id, property->name);
sys/dev/drm/i915/intel_atomic.c
128
new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
sys/dev/drm/i915/intel_atomic.c
129
new_conn_state->base.content_type != old_conn_state->base.content_type ||
sys/dev/drm/i915/intel_atomic.c
130
new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode)
sys/dev/drm/i915/intel_atomic.c
154
__drm_atomic_helper_connector_duplicate_state(connector, &state->base);
sys/dev/drm/i915/intel_atomic.c
155
return &state->base;
sys/dev/drm/i915/intel_atomic.c
176
__drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
sys/dev/drm/i915/intel_atomic.c
188
return &crtc_state->base;
sys/dev/drm/i915/intel_atomic.c
232
struct drm_atomic_state *drm_state = crtc_state->base.state;
sys/dev/drm/i915/intel_atomic.c
270
idx = intel_crtc->base.base.id;
sys/dev/drm/i915/intel_atomic.c
291
plane->base.id);
sys/dev/drm/i915/intel_atomic.c
300
crtc_state->base.planes_changed = true;
sys/dev/drm/i915/intel_atomic.c
304
idx = plane->base.id;
sys/dev/drm/i915/intel_atomic.c
336
plane_state && plane_state->base.fb &&
sys/dev/drm/i915/intel_atomic.c
337
plane_state->base.fb->format->format ==
sys/dev/drm/i915/intel_atomic.c
370
if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
sys/dev/drm/i915/intel_atomic.c
375
return &state->base;
sys/dev/drm/i915/intel_atomic.c
381
drm_atomic_state_default_clear(&state->base);
sys/dev/drm/i915/intel_atomic.c
63
property->base.id, property->name);
sys/dev/drm/i915/intel_atomic_plane.c
115
struct drm_plane *plane = intel_state->base.plane;
sys/dev/drm/i915/intel_atomic_plane.c
116
struct drm_plane_state *state = &intel_state->base;
sys/dev/drm/i915/intel_atomic_plane.c
120
if (!intel_state->base.crtc && !old_plane_state->base.crtc)
sys/dev/drm/i915/intel_atomic_plane.c
123
intel_state->base.visible = false;
sys/dev/drm/i915/intel_atomic_plane.c
140
&crtc_state->base,
sys/dev/drm/i915/intel_atomic_plane.c
174
struct drm_crtc *crtc = new_plane_state->base.crtc ?: old_state->crtc;
sys/dev/drm/i915/intel_atomic_plane.c
176
if (new_plane_state->base.visible) {
sys/dev/drm/i915/intel_atomic_plane.c
218
property->base.id, property->name);
sys/dev/drm/i915/intel_atomic_plane.c
241
property->base.id, property->name);
sys/dev/drm/i915/intel_atomic_plane.c
57
state->base.plane = plane;
sys/dev/drm/i915/intel_atomic_plane.c
58
state->base.rotation = DRM_MODE_ROTATE_0;
sys/dev/drm/i915/intel_atomic_plane.c
83
state = &intel_state->base;
sys/dev/drm/i915/intel_audio.c
190
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_audio.c
215
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_audio.c
258
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
279
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
319
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
321
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_audio.c
367
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
369
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_audio.c
420
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
421
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_audio.c
452
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
453
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_audio.c
503
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
504
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_audio.c
549
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
550
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_audio.c
637
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
639
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_audio.c
642
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_audio.c
650
connector->base.id,
sys/dev/drm/i915/intel_audio.c
652
connector->encoder->base.id,
sys/dev/drm/i915/intel_audio.c
669
if (acomp && acomp->base.audio_ops &&
sys/dev/drm/i915/intel_audio.c
670
acomp->base.audio_ops->pin_eld_notify) {
sys/dev/drm/i915/intel_audio.c
674
acomp->base.audio_ops->pin_eld_notify(acomp->base.audio_ops->audio_ptr,
sys/dev/drm/i915/intel_audio.c
696
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_audio.c
698
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_audio.c
712
if (acomp && acomp->base.audio_ops &&
sys/dev/drm/i915/intel_audio.c
713
acomp->base.audio_ops->pin_eld_notify) {
sys/dev/drm/i915/intel_audio.c
717
acomp->base.audio_ops->pin_eld_notify(acomp->base.audio_ops->audio_ptr,
sys/dev/drm/i915/intel_audio.c
864
if (!encoder || !encoder->base.crtc) {
sys/dev/drm/i915/intel_audio.c
870
crtc = to_intel_crtc(encoder->base.crtc);
sys/dev/drm/i915/intel_audio.c
930
if (WARN_ON(acomp->base.ops || acomp->base.dev))
sys/dev/drm/i915/intel_audio.c
934
acomp->base.ops = &i915_audio_component_ops;
sys/dev/drm/i915/intel_audio.c
935
acomp->base.dev = i915_kdev;
sys/dev/drm/i915/intel_audio.c
952
acomp->base.ops = NULL;
sys/dev/drm/i915/intel_audio.c
953
acomp->base.dev = NULL;
sys/dev/drm/i915/intel_bios.c
100
return base + index;
sys/dev/drm/i915/intel_bios.c
81
const u8 *base = _bdb;
sys/dev/drm/i915/intel_bios.c
92
current_id = *(base + index);
sys/dev/drm/i915/intel_bios.c
93
current_size = _get_blocksize(base + index);
sys/dev/drm/i915/intel_cdclk.c
2155
to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_cdclk.c
2158
if (!crtc_state->base.enable)
sys/dev/drm/i915/intel_cdclk.c
2258
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
sys/dev/drm/i915/intel_cdclk.c
2269
if (crtc_state->base.enable)
sys/dev/drm/i915/intel_cdclk.c
2349
struct drm_i915_private *dev_priv = to_i915(intel_state->base.dev);
sys/dev/drm/i915/intel_cdclk.c
2359
if (!crtc_state->base.enable)
sys/dev/drm/i915/intel_color.c
114
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
sys/dev/drm/i915/intel_crt.c
1000
crt->base.hotplug = intel_encoder_hotplug;
sys/dev/drm/i915/intel_crt.c
1004
crt->base.port = PORT_E;
sys/dev/drm/i915/intel_crt.c
1005
crt->base.get_config = hsw_crt_get_config;
sys/dev/drm/i915/intel_crt.c
1006
crt->base.get_hw_state = intel_ddi_get_hw_state;
sys/dev/drm/i915/intel_crt.c
1007
crt->base.compute_config = hsw_crt_compute_config;
sys/dev/drm/i915/intel_crt.c
1008
crt->base.pre_pll_enable = hsw_pre_pll_enable_crt;
sys/dev/drm/i915/intel_crt.c
1009
crt->base.pre_enable = hsw_pre_enable_crt;
sys/dev/drm/i915/intel_crt.c
1010
crt->base.enable = hsw_enable_crt;
sys/dev/drm/i915/intel_crt.c
1011
crt->base.disable = hsw_disable_crt;
sys/dev/drm/i915/intel_crt.c
1012
crt->base.post_disable = hsw_post_disable_crt;
sys/dev/drm/i915/intel_crt.c
1015
crt->base.compute_config = pch_crt_compute_config;
sys/dev/drm/i915/intel_crt.c
1016
crt->base.disable = pch_disable_crt;
sys/dev/drm/i915/intel_crt.c
1017
crt->base.post_disable = pch_post_disable_crt;
sys/dev/drm/i915/intel_crt.c
1019
crt->base.compute_config = intel_crt_compute_config;
sys/dev/drm/i915/intel_crt.c
102
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
1020
crt->base.disable = intel_disable_crt;
sys/dev/drm/i915/intel_crt.c
1022
crt->base.port = PORT_NONE;
sys/dev/drm/i915/intel_crt.c
1023
crt->base.get_config = intel_crt_get_config;
sys/dev/drm/i915/intel_crt.c
1024
crt->base.get_hw_state = intel_crt_get_hw_state;
sys/dev/drm/i915/intel_crt.c
1025
crt->base.enable = intel_enable_crt;
sys/dev/drm/i915/intel_crt.c
1051
intel_crt_reset(&crt->base.base);
sys/dev/drm/i915/intel_crt.c
126
pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
sys/dev/drm/i915/intel_crt.c
128
pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
sys/dev/drm/i915/intel_crt.c
134
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
138
pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
sys/dev/drm/i915/intel_crt.c
142
pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
sys/dev/drm/i915/intel_crt.c
144
pipe_config->base.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv);
sys/dev/drm/i915/intel_crt.c
153
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
155
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_crt.c
156
const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_crt.c
222
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
233
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
253
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
264
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
265
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_crt.c
281
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
282
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_crt.c
352
&pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_crt.c
365
&pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_crt.c
379
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
381
&pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_crt.c
478
reenable_hpd = intel_hpd_disable(dev_priv, crt->base.hpd_pin);
sys/dev/drm/i915/intel_crt.c
48
struct intel_encoder base;
sys/dev/drm/i915/intel_crt.c
505
intel_hpd_enable(dev_priv, crt->base.hpd_pin);
sys/dev/drm/i915/intel_crt.c
58
return container_of(encoder, struct intel_crt, base);
sys/dev/drm/i915/intel_crt.c
595
struct drm_i915_private *dev_priv = to_i915(crt->base.base.dev);
sys/dev/drm/i915/intel_crt.c
600
BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
sys/dev/drm/i915/intel_crt.c
631
struct drm_device *dev = crt->base.base.dev;
sys/dev/drm/i915/intel_crt.c
776
struct intel_encoder *intel_encoder = &crt->base;
sys/dev/drm/i915/intel_crt.c
781
connector->base.id, connector->name,
sys/dev/drm/i915/intel_crt.c
85
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_crt.c
863
struct intel_encoder *intel_encoder = &crt->base;
sys/dev/drm/i915/intel_crt.c
970
connector = &intel_connector->base;
sys/dev/drm/i915/intel_crt.c
972
drm_connector_init(&dev_priv->drm, &intel_connector->base,
sys/dev/drm/i915/intel_crt.c
975
drm_encoder_init(&dev_priv->drm, &crt->base.base, &intel_crt_enc_funcs,
sys/dev/drm/i915/intel_crt.c
978
intel_connector_attach_encoder(intel_connector, &crt->base);
sys/dev/drm/i915/intel_crt.c
980
crt->base.type = INTEL_OUTPUT_ANALOG;
sys/dev/drm/i915/intel_crt.c
981
crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
sys/dev/drm/i915/intel_crt.c
983
crt->base.crtc_mask = (1 << 0);
sys/dev/drm/i915/intel_crt.c
985
crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
sys/dev/drm/i915/intel_crt.c
995
crt->base.power_domain = POWER_DOMAIN_PORT_CRT;
sys/dev/drm/i915/intel_crt.c
999
crt->base.hpd_pin = HPD_CRT;
sys/dev/drm/i915/intel_ddi.c
1002
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
1065
struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
sys/dev/drm/i915/intel_ddi.c
1110
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_ddi.c
1115
for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
sys/dev/drm/i915/intel_ddi.c
1241
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
1243
enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
1253
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_ddi.c
1257
for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
sys/dev/drm/i915/intel_ddi.c
1526
pipe_config->base.adjusted_mode.crtc_clock = dotclock;
sys/dev/drm/i915/intel_ddi.c
1532
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
1558
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
1612
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
1661
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
1738
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
1754
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_ddi.c
1755
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_ddi.c
1793
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_ddi.c
1794
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_ddi.c
1808
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_ddi.c
1810
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_ddi.c
1837
if (crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_PVSYNC)
sys/dev/drm/i915/intel_ddi.c
1839
if (crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_PHSYNC)
sys/dev/drm/i915/intel_ddi.c
1894
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_ddi.c
1895
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_ddi.c
1915
struct drm_device *dev = intel_encoder->base.dev;
sys/dev/drm/i915/intel_ddi.c
1943
struct drm_device *dev = intel_connector->base.dev;
sys/dev/drm/i915/intel_ddi.c
1946
int type = intel_connector->base.connector_type;
sys/dev/drm/i915/intel_ddi.c
2004
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_ddi.c
2110
dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
2125
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_ddi.c
2126
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_ddi.c
2138
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_ddi.c
2163
struct intel_digital_port *intel_dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
2164
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2207
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2233
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2292
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2356
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2365
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
2482
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2493
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
2552
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2672
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2708
struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
sys/dev/drm/i915/intel_ddi.c
2709
struct intel_encoder *encoder = &dport->base;
sys/dev/drm/i915/intel_ddi.c
2726
struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
sys/dev/drm/i915/intel_ddi.c
2727
struct intel_encoder *encoder = &dport->base;
sys/dev/drm/i915/intel_ddi.c
2819
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2867
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2888
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
2889
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2891
struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
2939
struct intel_digital_port *intel_dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
2941
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
2944
struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
2966
intel_dig_port->set_infoframes(&encoder->base,
sys/dev/drm/i915/intel_ddi.c
2975
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_ddi.c
2976
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_ddi.c
3004
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3029
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3030
struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
3061
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3062
struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
3065
dig_port->set_infoframes(&encoder->base, false,
sys/dev/drm/i915/intel_ddi.c
3108
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3142
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3143
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
3161
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3162
struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
3170
connector->base.id, connector->name);
sys/dev/drm/i915/intel_ddi.c
3244
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
3270
connector->base.id, connector->name);
sys/dev/drm/i915/intel_ddi.c
3298
to_i915(intel_dig_port->base.base.dev);
sys/dev/drm/i915/intel_ddi.c
3299
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_ddi.c
3365
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3366
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_ddi.c
3385
pipe_config->base.adjusted_mode.flags |= flags;
sys/dev/drm/i915/intel_ddi.c
3407
intel_dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
3409
if (intel_dig_port->infoframe_enabled(&encoder->base, pipe_config))
sys/dev/drm/i915/intel_ddi.c
3498
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3529
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_ddi.c
3588
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_ddi.c
3589
struct intel_hdmi *hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_ddi.c
3599
if (!connector || connector->base.status != connector_status_connected)
sys/dev/drm/i915/intel_ddi.c
3607
conn_state = connector->base.state;
sys/dev/drm/i915/intel_ddi.c
3613
ret = drm_modeset_lock(&crtc->base.mutex, ctx);
sys/dev/drm/i915/intel_ddi.c
3617
crtc_state = to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_ddi.c
3621
if (!crtc_state->base.active)
sys/dev/drm/i915/intel_ddi.c
3653
return modeset_pipe(&crtc->base, ctx);
sys/dev/drm/i915/intel_ddi.c
3668
if (connector->base.connector_type == DRM_MODE_CONNECTOR_HDMIA)
sys/dev/drm/i915/intel_ddi.c
3692
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_ddi.c
3706
struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
sys/dev/drm/i915/intel_ddi.c
3708
if (dport->base.port != PORT_A)
sys/dev/drm/i915/intel_ddi.c
3735
struct drm_i915_private *dev_priv = to_i915(intel_dport->base.base.dev);
sys/dev/drm/i915/intel_ddi.c
3736
enum port port = intel_dport->base.port;
sys/dev/drm/i915/intel_ddi.c
3798
intel_encoder = &intel_dig_port->base;
sys/dev/drm/i915/intel_ddi.c
3799
encoder = &intel_encoder->base;
sys/dev/drm/i915/intel_ddi.c
965
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_display.c
10011
return plane->base.dev->mode_config.cursor_width * 4;
sys/dev/drm/i915/intel_display.c
10018
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_display.c
10019
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
10035
switch (plane_state->base.crtc_w) {
sys/dev/drm/i915/intel_display.c
10046
MISSING_CASE(plane_state->base.crtc_w);
sys/dev/drm/i915/intel_display.c
10050
if (plane_state->base.rotation & DRM_MODE_ROTATE_180)
sys/dev/drm/i915/intel_display.c
10059
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_display.c
10060
int width = plane_state->base.crtc_w;
sys/dev/drm/i915/intel_display.c
10061
int height = plane_state->base.crtc_h;
sys/dev/drm/i915/intel_display.c
10083
plane_state->base.rotation & DRM_MODE_ROTATE_0) {
sys/dev/drm/i915/intel_display.c
10097
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_display.c
10098
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
10099
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
10114
plane_state->base.crtc_w,
sys/dev/drm/i915/intel_display.c
10115
plane_state->base.crtc_h);
sys/dev/drm/i915/intel_display.c
10119
WARN_ON(plane_state->base.visible &&
sys/dev/drm/i915/intel_display.c
10122
if (fb->pitches[0] != plane_state->base.crtc_w * fb->format->cpp[0]) {
sys/dev/drm/i915/intel_display.c
10124
fb->pitches[0], plane_state->base.crtc_w);
sys/dev/drm/i915/intel_display.c
10139
plane_state->base.visible && plane_state->base.crtc_x < 0) {
sys/dev/drm/i915/intel_display.c
10153
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
10155
u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0;
sys/dev/drm/i915/intel_display.c
10158
if (plane_state && plane_state->base.visible) {
sys/dev/drm/i915/intel_display.c
10161
if (plane_state->base.crtc_h != plane_state->base.crtc_w)
sys/dev/drm/i915/intel_display.c
10162
fbc_ctl = CUR_FBC_CTL_EN | (plane_state->base.crtc_h - 1);
sys/dev/drm/i915/intel_display.c
10164
base = intel_cursor_base(plane_state);
sys/dev/drm/i915/intel_display.c
10188
if (plane->cursor.base != base ||
sys/dev/drm/i915/intel_display.c
10195
I915_WRITE_FW(CURBASE(pipe), base);
sys/dev/drm/i915/intel_display.c
10197
plane->cursor.base = base;
sys/dev/drm/i915/intel_display.c
10202
I915_WRITE_FW(CURBASE(pipe), base);
sys/dev/drm/i915/intel_display.c
10219
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
10269
return &intel_fb->base;
sys/dev/drm/i915/intel_display.c
10310
struct drm_encoder *encoder = &intel_encoder->base;
sys/dev/drm/i915/intel_display.c
10321
connector->base.id, connector->name,
sys/dev/drm/i915/intel_display.c
10322
encoder->base.id, encoder->name);
sys/dev/drm/i915/intel_display.c
1033
return crtc->active && crtc->base.primary->state->fb &&
sys/dev/drm/i915/intel_display.c
1034
crtc->config->base.adjusted_mode.crtc_clock;
sys/dev/drm/i915/intel_display.c
10407
crtc_state->base.active = crtc_state->base.enable = true;
sys/dev/drm/i915/intel_display.c
10412
ret = drm_atomic_set_mode_for_crtc(&crtc_state->base, mode);
sys/dev/drm/i915/intel_display.c
10465
struct drm_encoder *encoder = &intel_encoder->base;
sys/dev/drm/i915/intel_display.c
10470
connector->base.id, connector->name,
sys/dev/drm/i915/intel_display.c
10471
encoder->base.id, encoder->name);
sys/dev/drm/i915/intel_display.c
10502
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
10610
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
10620
pipe_config->base.adjusted_mode.crtc_clock =
sys/dev/drm/i915/intel_display.c
10629
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_display.c
10650
crtc_state->base.crtc = &crtc->base;
sys/dev/drm/i915/intel_display.c
1066
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
10692
if (new->base.visible != cur->base.visible)
sys/dev/drm/i915/intel_display.c
10695
if (!cur->base.fb || !new->base.fb)
sys/dev/drm/i915/intel_display.c
10698
if (cur->base.fb->modifier != new->base.fb->modifier ||
sys/dev/drm/i915/intel_display.c
10699
cur->base.rotation != new->base.rotation ||
sys/dev/drm/i915/intel_display.c
10700
drm_rect_width(&new->base.src) != drm_rect_width(&cur->base.src) ||
sys/dev/drm/i915/intel_display.c
10701
drm_rect_height(&new->base.src) != drm_rect_height(&cur->base.src) ||
sys/dev/drm/i915/intel_display.c
10702
drm_rect_width(&new->base.dst) != drm_rect_width(&cur->base.dst) ||
sys/dev/drm/i915/intel_display.c
10703
drm_rect_height(&new->base.dst) != drm_rect_height(&cur->base.dst))
sys/dev/drm/i915/intel_display.c
10711
int src_w = drm_rect_width(&state->base.src) >> 16;
sys/dev/drm/i915/intel_display.c
10712
int src_h = drm_rect_height(&state->base.src) >> 16;
sys/dev/drm/i915/intel_display.c
10713
int dst_w = drm_rect_width(&state->base.dst);
sys/dev/drm/i915/intel_display.c
10714
int dst_h = drm_rect_height(&state->base.dst);
sys/dev/drm/i915/intel_display.c
10731
bool was_crtc_enabled = old_crtc_state->base.active;
sys/dev/drm/i915/intel_display.c
10745
was_visible = old_plane_state->base.visible;
sys/dev/drm/i915/intel_display.c
10769
if (fb != old_plane_state->base.fb)
sys/dev/drm/i915/intel_display.c
10776
intel_crtc->base.base.id, intel_crtc->base.name,
sys/dev/drm/i915/intel_display.c
10777
plane->base.base.id, plane->base.name,
sys/dev/drm/i915/intel_display.c
10778
fb ? fb->base.id : -1);
sys/dev/drm/i915/intel_display.c
10781
plane->base.base.id, plane->base.name,
sys/dev/drm/i915/intel_display.c
10799
} else if (intel_wm_need_update(&plane->base, plane_state)) {
sys/dev/drm/i915/intel_display.c
10842
if (connector_state->crtc != &crtc->base)
sys/dev/drm/i915/intel_display.c
1088
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
1089
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
10952
if (connector->base.state->crtc)
sys/dev/drm/i915/intel_display.c
10953
drm_connector_put(&connector->base);
sys/dev/drm/i915/intel_display.c
10955
if (connector->base.encoder) {
sys/dev/drm/i915/intel_display.c
10956
connector->base.state->best_encoder =
sys/dev/drm/i915/intel_display.c
10957
connector->base.encoder;
sys/dev/drm/i915/intel_display.c
10958
connector->base.state->crtc =
sys/dev/drm/i915/intel_display.c
10959
connector->base.encoder->crtc;
sys/dev/drm/i915/intel_display.c
10961
drm_connector_get(&connector->base);
sys/dev/drm/i915/intel_display.c
10963
connector->base.state->best_encoder = NULL;
sys/dev/drm/i915/intel_display.c
10964
connector->base.state->crtc = NULL;
sys/dev/drm/i915/intel_display.c
10974
const struct drm_display_info *info = &connector->base.display_info;
sys/dev/drm/i915/intel_display.c
10978
connector->base.base.id,
sys/dev/drm/i915/intel_display.c
10979
connector->base.name);
sys/dev/drm/i915/intel_display.c
11000
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
11017
state = pipe_config->base.state;
sys/dev/drm/i915/intel_display.c
11021
if (connector_state->crtc != &crtc->base)
sys/dev/drm/i915/intel_display.c
11102
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
11111
crtc->base.base.id, crtc->base.name, context);
sys/dev/drm/i915/intel_display.c
11142
drm_mode_debug_printmodeline(&pipe_config->base.mode);
sys/dev/drm/i915/intel_display.c
11144
drm_mode_debug_printmodeline(&pipe_config->base.adjusted_mode);
sys/dev/drm/i915/intel_display.c
11145
intel_dump_crtc_timings(&pipe_config->base.adjusted_mode);
sys/dev/drm/i915/intel_display.c
11181
fb = state->base.fb;
sys/dev/drm/i915/intel_display.c
11184
plane->base.id, plane->name, state->scaler_id);
sys/dev/drm/i915/intel_display.c
11189
plane->base.id, plane->name,
sys/dev/drm/i915/intel_display.c
11190
fb->base.id, fb->width, fb->height,
sys/dev/drm/i915/intel_display.c
11195
state->base.src.x1 >> 16,
sys/dev/drm/i915/intel_display.c
11196
state->base.src.y1 >> 16,
sys/dev/drm/i915/intel_display.c
11197
drm_rect_width(&state->base.src) >> 16,
sys/dev/drm/i915/intel_display.c
11198
drm_rect_height(&state->base.src) >> 16,
sys/dev/drm/i915/intel_display.c
11199
state->base.dst.x1, state->base.dst.y1,
sys/dev/drm/i915/intel_display.c
11200
drm_rect_width(&state->base.dst),
sys/dev/drm/i915/intel_display.c
11201
drm_rect_height(&state->base.dst));
sys/dev/drm/i915/intel_display.c
11273
to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_display.c
11295
BUILD_BUG_ON(offsetof(struct intel_crtc_state, base));
sys/dev/drm/i915/intel_display.c
11296
memset(&crtc_state->base + 1, 0,
sys/dev/drm/i915/intel_display.c
11297
sizeof(*crtc_state) - sizeof(crtc_state->base));
sys/dev/drm/i915/intel_display.c
11313
struct drm_atomic_state *state = pipe_config->base.state;
sys/dev/drm/i915/intel_display.c
11331
if (!(pipe_config->base.adjusted_mode.flags &
sys/dev/drm/i915/intel_display.c
11333
pipe_config->base.adjusted_mode.flags |= DRM_MODE_FLAG_NHSYNC;
sys/dev/drm/i915/intel_display.c
11335
if (!(pipe_config->base.adjusted_mode.flags &
sys/dev/drm/i915/intel_display.c
11337
pipe_config->base.adjusted_mode.flags |= DRM_MODE_FLAG_NVSYNC;
sys/dev/drm/i915/intel_display.c
11352
drm_mode_get_hv_timing(&pipe_config->base.mode,
sys/dev/drm/i915/intel_display.c
11385
drm_mode_set_crtcinfo(&pipe_config->base.adjusted_mode,
sys/dev/drm/i915/intel_display.c
11407
pipe_config->port_clock = pipe_config->base.adjusted_mode.crtc_clock
sys/dev/drm/i915/intel_display.c
11536
(current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
sys/dev/drm/i915/intel_display.c
11537
!(pipe_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED);
sys/dev/drm/i915/intel_display.c
11693
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);
sys/dev/drm/i915/intel_display.c
11694
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal);
sys/dev/drm/i915/intel_display.c
11695
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start);
sys/dev/drm/i915/intel_display.c
11696
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end);
sys/dev/drm/i915/intel_display.c
11697
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start);
sys/dev/drm/i915/intel_display.c
11698
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end);
sys/dev/drm/i915/intel_display.c
11700
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay);
sys/dev/drm/i915/intel_display.c
11701
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal);
sys/dev/drm/i915/intel_display.c
11702
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_start);
sys/dev/drm/i915/intel_display.c
11703
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_end);
sys/dev/drm/i915/intel_display.c
11704
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_start);
sys/dev/drm/i915/intel_display.c
11705
PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_end);
sys/dev/drm/i915/intel_display.c
11720
PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
sys/dev/drm/i915/intel_display.c
11724
PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
sys/dev/drm/i915/intel_display.c
11726
PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
sys/dev/drm/i915/intel_display.c
11728
PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
sys/dev/drm/i915/intel_display.c
11730
PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
sys/dev/drm/i915/intel_display.c
11795
PIPE_CONF_CHECK_CLOCK_FUZZY(base.adjusted_mode.crtc_clock);
sys/dev/drm/i915/intel_display.c
11818
int dotclock = pipe_config->base.adjusted_mode.crtc_clock;
sys/dev/drm/i915/intel_display.c
11991
encoder->base.base.id,
sys/dev/drm/i915/intel_display.c
11992
encoder->base.name);
sys/dev/drm/i915/intel_display.c
11996
if (old_conn_state->best_encoder == &encoder->base)
sys/dev/drm/i915/intel_display.c
11999
if (new_conn_state->best_encoder != &encoder->base)
sys/dev/drm/i915/intel_display.c
12004
encoder->base.crtc,
sys/dev/drm/i915/intel_display.c
12011
I915_STATE_WARN(!!encoder->base.crtc != enabled,
sys/dev/drm/i915/intel_display.c
12014
!!encoder->base.crtc, enabled);
sys/dev/drm/i915/intel_display.c
12016
if (!encoder->base.crtc) {
sys/dev/drm/i915/intel_display.c
12044
pipe_config->base.crtc = crtc;
sys/dev/drm/i915/intel_display.c
12045
pipe_config->base.state = old_state;
sys/dev/drm/i915/intel_display.c
12047
DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);
sys/dev/drm/i915/intel_display.c
12069
encoder->base.base.id, active, new_crtc_state->active);
sys/dev/drm/i915/intel_display.c
12106
assert_plane(plane, plane_state->base.visible);
sys/dev/drm/i915/intel_display.c
12227
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
12257
const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
sys/dev/drm/i915/intel_display.c
12346
if (!pipe_config->base.active ||
sys/dev/drm/i915/intel_display.c
12347
needs_modeset(&pipe_config->base))
sys/dev/drm/i915/intel_display.c
12596
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
12599
return (u32)drm_crtc_accurate_vblank_count(&crtc->base);
sys/dev/drm/i915/intel_display.c
12693
if (updated & cmask || !cstate->base.active)
sys/dev/drm/i915/intel_display.c
12739
drm_atomic_state_put(&state->base);
sys/dev/drm/i915/intel_display.c
12753
struct drm_i915_private *dev_priv = to_i915(intel_state->base.dev);
sys/dev/drm/i915/intel_display.c
1295
plane->base.name, onoff(state), onoff(cur_state));
sys/dev/drm/i915/intel_display.c
12976
&to_i915(state->base.dev)->atomic_helper;
sys/dev/drm/i915/intel_display.c
1303
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
13172
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_display.c
13173
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
13174
struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
13370
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
13371
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
13375
if (!crtc_state->base.enable)
sys/dev/drm/i915/intel_display.c
13378
crtc_clock = crtc_state->base.adjusted_mode.crtc_clock;
sys/dev/drm/i915/intel_display.c
13379
max_dotclk = to_intel_atomic_state(crtc_state->base.state)->cdclk.logical.cdclk;
sys/dev/drm/i915/intel_display.c
13413
bool modeset = needs_modeset(&intel_cstate->base);
sys/dev/drm/i915/intel_display.c
13416
(intel_cstate->base.color_mgmt_changed ||
sys/dev/drm/i915/intel_display.c
13418
intel_color_set_csc(&intel_cstate->base);
sys/dev/drm/i915/intel_display.c
13419
intel_color_load_luts(&intel_cstate->base);
sys/dev/drm/i915/intel_display.c
13442
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
13467
!needs_modeset(&new_crtc_state->base) &&
sys/dev/drm/i915/intel_display.c
13814
state = intel_create_plane_state(&primary->base);
sys/dev/drm/i915/intel_display.c
13820
primary->base.state = &state->base;
sys/dev/drm/i915/intel_display.c
13901
ret = drm_universal_plane_init(&dev_priv->drm, &primary->base,
sys/dev/drm/i915/intel_display.c
13908
ret = drm_universal_plane_init(&dev_priv->drm, &primary->base,
sys/dev/drm/i915/intel_display.c
13915
ret = drm_universal_plane_init(&dev_priv->drm, &primary->base,
sys/dev/drm/i915/intel_display.c
1392
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
13946
drm_plane_create_rotation_property(&primary->base,
sys/dev/drm/i915/intel_display.c
13951
drm_plane_create_color_properties(&primary->base,
sys/dev/drm/i915/intel_display.c
13959
drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);
sys/dev/drm/i915/intel_display.c
13984
state = intel_create_plane_state(&cursor->base);
sys/dev/drm/i915/intel_display.c
13990
cursor->base.state = &state->base;
sys/dev/drm/i915/intel_display.c
14011
cursor->cursor.base = ~0;
sys/dev/drm/i915/intel_display.c
14017
ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,
sys/dev/drm/i915/intel_display.c
14028
drm_plane_create_rotation_property(&cursor->base,
sys/dev/drm/i915/intel_display.c
14036
drm_plane_helper_add(&cursor->base, &intel_plane_helper_funcs);
sys/dev/drm/i915/intel_display.c
14052
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
14087
intel_crtc->base.state = &crtc_state->base;
sys/dev/drm/i915/intel_display.c
14088
crtc_state->base.crtc = &intel_crtc->base;
sys/dev/drm/i915/intel_display.c
1410
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
14115
ret = drm_crtc_init_with_planes(&dev_priv->drm, &intel_crtc->base,
sys/dev/drm/i915/intel_display.c
14116
&primary->base, &cursor->base,
sys/dev/drm/i915/intel_display.c
14139
drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
sys/dev/drm/i915/intel_display.c
14141
intel_color_init(&intel_crtc->base);
sys/dev/drm/i915/intel_display.c
14143
WARN_ON(drm_crtc_index(&intel_crtc->base) != intel_crtc->pipe);
sys/dev/drm/i915/intel_display.c
14160
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_display.c
14164
if (!connector->base.state->crtc)
sys/dev/drm/i915/intel_display.c
14167
return to_intel_crtc(connector->base.state->crtc)->pipe;
sys/dev/drm/i915/intel_display.c
14189
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_display.c
1429
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
14466
encoder->base.possible_crtcs = encoder->crtc_mask;
sys/dev/drm/i915/intel_display.c
14467
encoder->base.possible_clones =
sys/dev/drm/i915/intel_display.c
14503
return drm_gem_handle_create(file, &obj->base, handle);
sys/dev/drm/i915/intel_display.c
14538
plane = to_intel_plane(crtc->base.primary);
sys/dev/drm/i915/intel_display.c
14548
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/intel_display.c
14549
struct drm_framebuffer *fb = &intel_fb->base;
sys/dev/drm/i915/intel_display.c
1461
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
14748
fb->obj[i] = &obj->base;
sys/dev/drm/i915/intel_display.c
1501
count += crtc->base.state->active &&
sys/dev/drm/i915/intel_display.c
1511
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
15580
to_intel_plane(crtc->base.primary);
sys/dev/drm/i915/intel_display.c
15591
plane->base.name);
sys/dev/drm/i915/intel_display.c
15600
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
15603
for_each_encoder_on_crtc(dev, &crtc->base, encoder)
sys/dev/drm/i915/intel_display.c
15611
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_display.c
15614
for_each_connector_on_encoder(dev, &encoder->base, connector)
sys/dev/drm/i915/intel_display.c
15630
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
15648
to_intel_plane_state(plane->base.state);
sys/dev/drm/i915/intel_display.c
15650
if (plane_state->base.visible &&
sys/dev/drm/i915/intel_display.c
15651
plane->base.type != DRM_PLANE_TYPE_PRIMARY)
sys/dev/drm/i915/intel_display.c
15659
intel_crtc_disable_noatomic(&crtc->base, ctx);
sys/dev/drm/i915/intel_display.c
15692
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_display.c
1570
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
15705
crtc_state->base.active &&
sys/dev/drm/i915/intel_display.c
15713
struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
sys/dev/drm/i915/intel_display.c
15715
to_intel_crtc_state(crtc->base.state) : NULL;
sys/dev/drm/i915/intel_display.c
15721
crtc_state->base.active;
sys/dev/drm/i915/intel_display.c
15732
encoder->base.base.id,
sys/dev/drm/i915/intel_display.c
15733
encoder->base.name);
sys/dev/drm/i915/intel_display.c
15742
encoder->base.base.id,
sys/dev/drm/i915/intel_display.c
15743
encoder->base.name);
sys/dev/drm/i915/intel_display.c
15746
best_encoder = connector->base.state->best_encoder;
sys/dev/drm/i915/intel_display.c
15747
connector->base.state->best_encoder = &encoder->base;
sys/dev/drm/i915/intel_display.c
15751
connector->base.state);
sys/dev/drm/i915/intel_display.c
15754
connector->base.state);
sys/dev/drm/i915/intel_display.c
15756
connector->base.state->best_encoder = best_encoder;
sys/dev/drm/i915/intel_display.c
15758
encoder->base.crtc = NULL;
sys/dev/drm/i915/intel_display.c
15765
connector->base.dpms = DRM_MODE_DPMS_OFF;
sys/dev/drm/i915/intel_display.c
15766
connector->base.encoder = NULL;
sys/dev/drm/i915/intel_display.c
15808
to_intel_plane_state(plane->base.state);
sys/dev/drm/i915/intel_display.c
15816
crtc_state = to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_display.c
15823
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_display.c
15843
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_display.c
15845
__drm_atomic_helper_crtc_destroy_state(&crtc_state->base);
sys/dev/drm/i915/intel_display.c
15847
crtc_state->base.crtc = &crtc->base;
sys/dev/drm/i915/intel_display.c
15849
crtc_state->base.active = crtc_state->base.enable =
sys/dev/drm/i915/intel_display.c
15852
crtc->base.enabled = crtc_state->base.enable;
sys/dev/drm/i915/intel_display.c
15853
crtc->active = crtc_state->base.active;
sys/dev/drm/i915/intel_display.c
15855
if (crtc_state->base.active)
sys/dev/drm/i915/intel_display.c
15859
crtc->base.base.id, crtc->base.name,
sys/dev/drm/i915/intel_display.c
15860
enableddisabled(crtc_state->base.active));
sys/dev/drm/i915/intel_display.c
15873
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_display.c
15875
if (crtc_state->base.active &&
sys/dev/drm/i915/intel_display.c
15892
crtc_state = to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_display.c
15894
encoder->base.crtc = &crtc->base;
sys/dev/drm/i915/intel_display.c
15897
encoder->base.crtc = NULL;
sys/dev/drm/i915/intel_display.c
15901
encoder->base.base.id, encoder->base.name,
sys/dev/drm/i915/intel_display.c
15902
enableddisabled(encoder->base.crtc),
sys/dev/drm/i915/intel_display.c
15909
connector->base.dpms = DRM_MODE_DPMS_ON;
sys/dev/drm/i915/intel_display.c
15912
connector->base.encoder = &encoder->base;
sys/dev/drm/i915/intel_display.c
15914
if (encoder->base.crtc &&
sys/dev/drm/i915/intel_display.c
15915
encoder->base.crtc->state->active) {
sys/dev/drm/i915/intel_display.c
15921
encoder->base.crtc->state->connector_mask |=
sys/dev/drm/i915/intel_display.c
15922
drm_connector_mask(&connector->base);
sys/dev/drm/i915/intel_display.c
15923
encoder->base.crtc->state->encoder_mask |=
sys/dev/drm/i915/intel_display.c
15924
drm_encoder_mask(&encoder->base);
sys/dev/drm/i915/intel_display.c
15928
connector->base.dpms = DRM_MODE_DPMS_OFF;
sys/dev/drm/i915/intel_display.c
15929
connector->base.encoder = NULL;
sys/dev/drm/i915/intel_display.c
15932
connector->base.base.id, connector->base.name,
sys/dev/drm/i915/intel_display.c
15933
enableddisabled(connector->base.encoder));
sys/dev/drm/i915/intel_display.c
15939
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_display.c
15942
memset(&crtc->base.mode, 0, sizeof(crtc->base.mode));
sys/dev/drm/i915/intel_display.c
15943
if (crtc_state->base.active) {
sys/dev/drm/i915/intel_display.c
15944
intel_mode_from_pipe_config(&crtc->base.mode, crtc_state);
sys/dev/drm/i915/intel_display.c
15945
crtc->base.mode.hdisplay = crtc_state->pipe_src_w;
sys/dev/drm/i915/intel_display.c
15946
crtc->base.mode.vdisplay = crtc_state->pipe_src_h;
sys/dev/drm/i915/intel_display.c
15947
intel_mode_from_pipe_config(&crtc_state->base.adjusted_mode, crtc_state);
sys/dev/drm/i915/intel_display.c
15948
WARN_ON(drm_atomic_set_mode_for_crtc(crtc->base.state, &crtc->base.mode));
sys/dev/drm/i915/intel_display.c
15959
crtc_state->base.mode.private_flags = I915_MODE_FLAG_INHERITED;
sys/dev/drm/i915/intel_display.c
15969
drm_calc_timestamping_constants(&crtc->base,
sys/dev/drm/i915/intel_display.c
15970
&crtc_state->base.adjusted_mode);
sys/dev/drm/i915/intel_display.c
15999
if (!encoder->base.crtc)
sys/dev/drm/i915/intel_display.c
16002
crtc_state = to_intel_crtc_state(encoder->base.crtc->state);
sys/dev/drm/i915/intel_display.c
16051
drm_crtc_vblank_reset(&crtc->base);
sys/dev/drm/i915/intel_display.c
16054
drm_crtc_vblank_on(&crtc->base);
sys/dev/drm/i915/intel_display.c
16098
put_domains = modeset_get_crtc_power_domains(&crtc->base, crtc->config);
sys/dev/drm/i915/intel_display.c
16228
drm_connector_attach_encoder(&connector->base, &encoder->base);
sys/dev/drm/i915/intel_display.c
16271
u32 base;
sys/dev/drm/i915/intel_display.c
16337
error->cursor[i].base = I915_READ(CURBASE(i));
sys/dev/drm/i915/intel_display.c
16426
err_printf(m, " BASE: %08x\n", error->cursor[i].base);
sys/dev/drm/i915/intel_display.c
1643
switch (dport->base.port) {
sys/dev/drm/i915/intel_display.c
1665
port_name(dport->base.port),
sys/dev/drm/i915/intel_display.c
1812
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
1822
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
1823
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
1878
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
1879
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
2075
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_display.c
2076
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
2201
const struct drm_framebuffer *fb = state->base.fb;
sys/dev/drm/i915/intel_display.c
2218
const struct intel_framebuffer *intel_fb = to_intel_framebuffer(state->base.fb);
sys/dev/drm/i915/intel_display.c
2219
unsigned int rotation = state->base.rotation;
sys/dev/drm/i915/intel_display.c
2305
return intel_adjust_aligned_offset(x, y, state->base.fb, color_plane,
sys/dev/drm/i915/intel_display.c
2306
state->base.rotation,
sys/dev/drm/i915/intel_display.c
2381
struct intel_plane *intel_plane = to_intel_plane(state->base.plane);
sys/dev/drm/i915/intel_display.c
2382
struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
sys/dev/drm/i915/intel_display.c
2383
const struct drm_framebuffer *fb = state->base.fb;
sys/dev/drm/i915/intel_display.c
2384
unsigned int rotation = state->base.rotation;
sys/dev/drm/i915/intel_display.c
2643
if (mul_u32_u32(max_size, tile_size) > obj->base.size) {
sys/dev/drm/i915/intel_display.c
2645
mul_u32_u32(max_size, tile_size), obj->base.size);
sys/dev/drm/i915/intel_display.c
2705
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
2709
struct drm_framebuffer *fb = &plane_config->fb->base;
sys/dev/drm/i915/intel_display.c
2710
u32 base_aligned = round_down(plane_config->base, PAGE_SIZE);
sys/dev/drm/i915/intel_display.c
2711
u32 size_aligned = round_up(plane_config->base + plane_config->size,
sys/dev/drm/i915/intel_display.c
2783
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_display.c
2785
plane_state->base.visible = visible;
sys/dev/drm/i915/intel_display.c
2788
crtc_state->base.plane_mask |= drm_plane_mask(&plane->base);
sys/dev/drm/i915/intel_display.c
2790
crtc_state->base.plane_mask &= ~drm_plane_mask(&plane->base);
sys/dev/drm/i915/intel_display.c
2793
crtc_state->base.crtc->name,
sys/dev/drm/i915/intel_display.c
2799
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_display.c
2810
crtc_state->base.plane_mask)
sys/dev/drm/i915/intel_display.c
2818
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_display.c
2820
to_intel_plane_state(plane->base.state);
sys/dev/drm/i915/intel_display.c
2826
intel_pre_disable_primary_noatomic(&crtc->base);
sys/dev/drm/i915/intel_display.c
2828
trace_intel_disable_plane(&plane->base, crtc);
sys/dev/drm/i915/intel_display.c
2836
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_display.c
2840
struct drm_plane *primary = intel_crtc->base.primary;
sys/dev/drm/i915/intel_display.c
2851
fb = &plane_config->fb->base;
sys/dev/drm/i915/intel_display.c
2864
if (c == &intel_crtc->base)
sys/dev/drm/i915/intel_display.c
2874
if (intel_plane_ggtt_offset(state) == plane_config->base) {
sys/dev/drm/i915/intel_display.c
2875
fb = state->base.fb;
sys/dev/drm/i915/intel_display.c
2893
intel_state->base.rotation = plane_config->rotation;
sys/dev/drm/i915/intel_display.c
2895
intel_state->base.rotation);
sys/dev/drm/i915/intel_display.c
2897
intel_fb_pitch(fb, 0, intel_state->base.rotation);
sys/dev/drm/i915/intel_display.c
2928
intel_state->base.src = drm_plane_state_src(plane_state);
sys/dev/drm/i915/intel_display.c
2929
intel_state->base.dst = drm_plane_state_dest(plane_state);
sys/dev/drm/i915/intel_display.c
2935
plane_state->crtc = &intel_crtc->base;
sys/dev/drm/i915/intel_display.c
2990
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3027
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3028
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_display.c
3029
int x = plane_state->base.src.x1 >> 16;
sys/dev/drm/i915/intel_display.c
3030
int y = plane_state->base.src.y1 >> 16;
sys/dev/drm/i915/intel_display.c
3031
int w = drm_rect_width(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_display.c
3032
int h = drm_rect_height(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_display.c
3106
if (plane_state->base.rotation !=
sys/dev/drm/i915/intel_display.c
3108
plane_state->base.rotation != DRM_MODE_ROTATE_270)
sys/dev/drm/i915/intel_display.c
3115
if (((drm_rect_height(&plane_state->base.src) >> 16) % 4) != 0) {
sys/dev/drm/i915/intel_display.c
3126
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3127
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_display.c
3130
int x = plane_state->base.src.x1 >> 17;
sys/dev/drm/i915/intel_display.c
3131
int y = plane_state->base.src.y1 >> 17;
sys/dev/drm/i915/intel_display.c
3132
int w = drm_rect_width(&plane_state->base.src) >> 17;
sys/dev/drm/i915/intel_display.c
3133
int h = drm_rect_height(&plane_state->base.src) >> 17;
sys/dev/drm/i915/intel_display.c
3155
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3156
int src_x = plane_state->base.src.x1 >> 16;
sys/dev/drm/i915/intel_display.c
3157
int src_y = plane_state->base.src.y1 >> 16;
sys/dev/drm/i915/intel_display.c
3176
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3177
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_display.c
3188
if (!plane_state->base.visible)
sys/dev/drm/i915/intel_display.c
3193
drm_rect_rotate(&plane_state->base.src,
sys/dev/drm/i915/intel_display.c
3230
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
3256
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_display.c
3257
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
3258
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3259
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_display.c
3317
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_display.c
3318
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3319
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_display.c
3320
int src_x = plane_state->base.src.x1 >> 16;
sys/dev/drm/i915/intel_display.c
3321
int src_y = plane_state->base.src.y1 >> 16;
sys/dev/drm/i915/intel_display.c
3342
int src_w = drm_rect_width(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_display.c
3343
int src_h = drm_rect_height(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_display.c
3370
ret = drm_atomic_helper_check_plane_state(&plane_state->base,
sys/dev/drm/i915/intel_display.c
3371
&crtc_state->base,
sys/dev/drm/i915/intel_display.c
3378
if (!plane_state->base.visible)
sys/dev/drm/i915/intel_display.c
3398
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
3460
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
3479
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
3520
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_display.c
3548
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3549
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_display.c
3691
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_display.c
3692
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3693
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_display.c
3706
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
sys/dev/drm/i915/intel_display.c
3709
if (plane_state->base.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
sys/dev/drm/i915/intel_display.c
3733
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_display.c
3734
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
3745
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
sys/dev/drm/i915/intel_display.c
3750
if (plane_state->base.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
sys/dev/drm/i915/intel_display.c
3915
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
3916
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
3919
crtc->base.mode = new_crtc_state->base.mode;
sys/dev/drm/i915/intel_display.c
3950
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
3993
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
4094
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
4227
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
4345
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_display.c
4382
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_display.c
4506
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
4507
int clock = crtc->config->base.adjusted_mode.crtc_clock;
sys/dev/drm/i915/intel_display.c
4621
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
4665
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_display.c
4694
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
4701
for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
sys/dev/drm/i915/intel_display.c
4702
if (connector_state->crtc != &crtc->base)
sys/dev/drm/i915/intel_display.c
4726
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
4727
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
4780
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_display.c
4810
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
4811
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
4913
to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
4914
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
sys/dev/drm/i915/intel_display.c
4916
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_display.c
4939
if (INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
sys/dev/drm/i915/intel_display.c
5011
const struct drm_display_mode *adjusted_mode = &state->base.adjusted_mode;
sys/dev/drm/i915/intel_display.c
5013
return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX,
sys/dev/drm/i915/intel_display.c
5034
to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_display.c
5035
struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
5038
bool force_detach = !fb || !plane_state->base.visible;
sys/dev/drm/i915/intel_display.c
5041
drm_plane_index(&intel_plane->base),
sys/dev/drm/i915/intel_display.c
5043
drm_rect_width(&plane_state->base.src) >> 16,
sys/dev/drm/i915/intel_display.c
5044
drm_rect_height(&plane_state->base.src) >> 16,
sys/dev/drm/i915/intel_display.c
5045
drm_rect_width(&plane_state->base.dst),
sys/dev/drm/i915/intel_display.c
5046
drm_rect_height(&plane_state->base.dst),
sys/dev/drm/i915/intel_display.c
5055
intel_plane->base.base.id,
sys/dev/drm/i915/intel_display.c
5056
intel_plane->base.name);
sys/dev/drm/i915/intel_display.c
5077
intel_plane->base.base.id, intel_plane->base.name,
sys/dev/drm/i915/intel_display.c
5078
fb->base.id, fb->format->format);
sys/dev/drm/i915/intel_display.c
5095
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
5132
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
5153
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
5154
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
5193
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
5194
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
5225
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_display.c
5310
if (needs_modeset(&new_crtc_state->base))
sys/dev/drm/i915/intel_display.c
5322
if (needs_modeset(&new_crtc_state->base))
sys/dev/drm/i915/intel_display.c
5330
old_crtc_state->base.adjusted_mode.private_flags & I915_MODE_FLAG_INHERITED)
sys/dev/drm/i915/intel_display.c
5354
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
5355
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
5357
struct drm_atomic_state *old_state = old_crtc_state->base.state;
sys/dev/drm/i915/intel_display.c
5361
struct drm_plane *primary = crtc->base.primary;
sys/dev/drm/i915/intel_display.c
5365
intel_frontbuffer_flip(to_i915(crtc->base.dev), pipe_config->fb_bits);
sys/dev/drm/i915/intel_display.c
5367
if (pipe_config->update_wm_post && pipe_config->base.active)
sys/dev/drm/i915/intel_display.c
5380
(needs_modeset(&pipe_config->base) ||
sys/dev/drm/i915/intel_display.c
5382
intel_post_enable_primary(&crtc->base, pipe_config);
sys/dev/drm/i915/intel_display.c
5396
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
5397
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
5399
struct drm_atomic_state *old_state = old_crtc_state->base.state;
sys/dev/drm/i915/intel_display.c
5400
struct drm_plane *primary = crtc->base.primary;
sys/dev/drm/i915/intel_display.c
5403
bool modeset = needs_modeset(&pipe_config->base);
sys/dev/drm/i915/intel_display.c
5421
(modeset || !new_primary_state->base.visible))
sys/dev/drm/i915/intel_display.c
5441
if (HAS_GMCH_DISPLAY(dev_priv) && old_crtc_state->base.active &&
sys/dev/drm/i915/intel_display.c
5459
if (needs_modeset(&pipe_config->base))
sys/dev/drm/i915/intel_display.c
5626
struct drm_crtc *crtc = pipe_config->base.crtc;
sys/dev/drm/i915/intel_display.c
5686
intel_color_load_luts(&pipe_config->base);
sys/dev/drm/i915/intel_display.c
5720
return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A;
sys/dev/drm/i915/intel_display.c
5739
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
5754
struct drm_crtc *crtc = pipe_config->base.crtc;
sys/dev/drm/i915/intel_display.c
5801
intel_color_set_csc(&pipe_config->base);
sys/dev/drm/i915/intel_display.c
5820
intel_color_load_luts(&pipe_config->base);
sys/dev/drm/i915/intel_display.c
5874
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
5890
struct drm_crtc *crtc = old_crtc_state->base.crtc;
sys/dev/drm/i915/intel_display.c
5949
struct drm_crtc *crtc = old_crtc_state->base.crtc;
sys/dev/drm/i915/intel_display.c
5982
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
6063
if (!crtc_state->base.active)
sys/dev/drm/i915/intel_display.c
6072
drm_for_each_encoder_mask(encoder, dev, crtc_state->base.encoder_mask) {
sys/dev/drm/i915/intel_display.c
6122
struct drm_crtc *crtc = pipe_config->base.crtc;
sys/dev/drm/i915/intel_display.c
6146
intel_color_set_csc(&pipe_config->base);
sys/dev/drm/i915/intel_display.c
6166
intel_color_load_luts(&pipe_config->base);
sys/dev/drm/i915/intel_display.c
6180
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
6192
struct drm_crtc *crtc = pipe_config->base.crtc;
sys/dev/drm/i915/intel_display.c
6222
intel_color_load_luts(&pipe_config->base);
sys/dev/drm/i915/intel_display.c
6239
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
6255
struct drm_crtc *crtc = old_crtc_state->base.crtc;
sys/dev/drm/i915/intel_display.c
6319
to_intel_plane_state(plane->base.state);
sys/dev/drm/i915/intel_display.c
6321
if (plane_state->base.visible)
sys/dev/drm/i915/intel_display.c
6328
crtc->base.id, crtc->name);
sys/dev/drm/i915/intel_display.c
6345
crtc->base.id, crtc->name);
sys/dev/drm/i915/intel_display.c
6355
encoder->base.crtc = NULL;
sys/dev/drm/i915/intel_display.c
6406
connector->base.base.id,
sys/dev/drm/i915/intel_display.c
6407
connector->base.name);
sys/dev/drm/i915/intel_display.c
6424
I915_STATE_WARN(conn_state->best_encoder != &encoder->base,
sys/dev/drm/i915/intel_display.c
6427
I915_STATE_WARN(conn_state->crtc != encoder->base.crtc,
sys/dev/drm/i915/intel_display.c
6451
__drm_atomic_helper_connector_reset(&connector->base,
sys/dev/drm/i915/intel_display.c
6452
&conn_state->base);
sys/dev/drm/i915/intel_display.c
6482
kfree(to_intel_digital_connector_state(connector->base.state));
sys/dev/drm/i915/intel_display.c
6499
if (crtc_state->base.enable && crtc_state->has_pch_encoder)
sys/dev/drm/i915/intel_display.c
6509
struct drm_atomic_state *state = pipe_config->base.state;
sys/dev/drm/i915/intel_display.c
652
struct drm_device *dev = crtc_state->base.crtc->dev;
sys/dev/drm/i915/intel_display.c
6581
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_display.c
6582
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_display.c
6625
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
6626
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
6655
to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_display.c
6657
to_intel_atomic_state(crtc_state->base.state);
sys/dev/drm/i915/intel_display.c
6679
const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
6690
pixel_rate = pipe_config->base.adjusted_mode.crtc_clock;
sys/dev/drm/i915/intel_display.c
6723
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_display.c
6728
crtc_state->base.adjusted_mode.crtc_clock;
sys/dev/drm/i915/intel_display.c
6737
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
6739
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_display.c
6763
if (pipe_config->ycbcr420 && pipe_config->base.ctm) {
sys/dev/drm/i915/intel_display.c
6877
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
688
struct drm_device *dev = crtc_state->base.crtc->dev;
sys/dev/drm/i915/intel_display.c
6932
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
6946
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
7036
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7135
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7257
pipe_config->base.crtc = &crtc->base;
sys/dev/drm/i915/intel_display.c
7296
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
7369
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7405
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
sys/dev/drm/i915/intel_display.c
7408
const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;
sys/dev/drm/i915/intel_display.c
746
struct drm_device *dev = crtc_state->base.crtc->dev;
sys/dev/drm/i915/intel_display.c
7466
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7481
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7487
pipe_config->base.adjusted_mode.crtc_hdisplay = (tmp & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7488
pipe_config->base.adjusted_mode.crtc_htotal = ((tmp >> 16) & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7490
pipe_config->base.adjusted_mode.crtc_hblank_start = (tmp & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7491
pipe_config->base.adjusted_mode.crtc_hblank_end = ((tmp >> 16) & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7493
pipe_config->base.adjusted_mode.crtc_hsync_start = (tmp & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7494
pipe_config->base.adjusted_mode.crtc_hsync_end = ((tmp >> 16) & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7497
pipe_config->base.adjusted_mode.crtc_vdisplay = (tmp & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7498
pipe_config->base.adjusted_mode.crtc_vtotal = ((tmp >> 16) & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7500
pipe_config->base.adjusted_mode.crtc_vblank_start = (tmp & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7501
pipe_config->base.adjusted_mode.crtc_vblank_end = ((tmp >> 16) & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7503
pipe_config->base.adjusted_mode.crtc_vsync_start = (tmp & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7504
pipe_config->base.adjusted_mode.crtc_vsync_end = ((tmp >> 16) & 0xffff) + 1;
sys/dev/drm/i915/intel_display.c
7507
pipe_config->base.adjusted_mode.flags |= DRM_MODE_FLAG_INTERLACE;
sys/dev/drm/i915/intel_display.c
7508
pipe_config->base.adjusted_mode.crtc_vtotal += 1;
sys/dev/drm/i915/intel_display.c
7509
pipe_config->base.adjusted_mode.crtc_vblank_end += 1;
sys/dev/drm/i915/intel_display.c
7516
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7524
pipe_config->base.mode.vdisplay = pipe_config->pipe_src_h;
sys/dev/drm/i915/intel_display.c
7525
pipe_config->base.mode.hdisplay = pipe_config->pipe_src_w;
sys/dev/drm/i915/intel_display.c
7531
mode->hdisplay = pipe_config->base.adjusted_mode.crtc_hdisplay;
sys/dev/drm/i915/intel_display.c
7532
mode->htotal = pipe_config->base.adjusted_mode.crtc_htotal;
sys/dev/drm/i915/intel_display.c
7533
mode->hsync_start = pipe_config->base.adjusted_mode.crtc_hsync_start;
sys/dev/drm/i915/intel_display.c
7534
mode->hsync_end = pipe_config->base.adjusted_mode.crtc_hsync_end;
sys/dev/drm/i915/intel_display.c
7536
mode->vdisplay = pipe_config->base.adjusted_mode.crtc_vdisplay;
sys/dev/drm/i915/intel_display.c
7537
mode->vtotal = pipe_config->base.adjusted_mode.crtc_vtotal;
sys/dev/drm/i915/intel_display.c
7538
mode->vsync_start = pipe_config->base.adjusted_mode.crtc_vsync_start;
sys/dev/drm/i915/intel_display.c
7539
mode->vsync_end = pipe_config->base.adjusted_mode.crtc_vsync_end;
sys/dev/drm/i915/intel_display.c
7541
mode->flags = pipe_config->base.adjusted_mode.flags;
sys/dev/drm/i915/intel_display.c
7544
mode->clock = pipe_config->base.adjusted_mode.crtc_clock;
sys/dev/drm/i915/intel_display.c
7553
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
sys/dev/drm/i915/intel_display.c
7589
if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) {
sys/dev/drm/i915/intel_display.c
7609
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7645
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7688
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7722
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7798
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
7825
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7853
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7855
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
sys/dev/drm/i915/intel_display.c
7858
u32 val, base, offset;
sys/dev/drm/i915/intel_display.c
7875
fb = &intel_fb->base;
sys/dev/drm/i915/intel_display.c
7901
base = I915_READ(DSPSURF(i9xx_plane)) & 0xfffff000;
sys/dev/drm/i915/intel_display.c
7907
base = I915_READ(DSPSURF(i9xx_plane)) & 0xfffff000;
sys/dev/drm/i915/intel_display.c
7909
base = I915_READ(DSPADDR(i9xx_plane));
sys/dev/drm/i915/intel_display.c
7911
plane_config->base = base;
sys/dev/drm/i915/intel_display.c
7925
crtc->base.name, plane->base.name, fb->width, fb->height,
sys/dev/drm/i915/intel_display.c
7926
fb->format->cpp[0] * 8, base, fb->pitches[0],
sys/dev/drm/i915/intel_display.c
7935
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
7969
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
802
struct drm_device *dev = crtc_state->base.crtc->dev;
sys/dev/drm/i915/intel_display.c
8069
pipe_config->base.adjusted_mode.crtc_clock =
sys/dev/drm/i915/intel_display.c
8539
if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
sys/dev/drm/i915/intel_display.c
8561
if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
sys/dev/drm/i915/intel_display.c
8630
struct drm_crtc *crtc = &intel_crtc->base;
sys/dev/drm/i915/intel_display.c
8731
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
8786
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
8804
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
8861
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
8892
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
8894
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
sys/dev/drm/i915/intel_display.c
8897
u32 val, base, offset, stride_mult, tiling, alpha;
sys/dev/drm/i915/intel_display.c
8914
fb = &intel_fb->base;
sys/dev/drm/i915/intel_display.c
896
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
897
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
8986
base = I915_READ(PLANE_SURF(pipe, plane_id)) & 0xfffff000;
sys/dev/drm/i915/intel_display.c
8987
plane_config->base = base;
sys/dev/drm/i915/intel_display.c
9004
crtc->base.name, plane->base.name, fb->width, fb->height,
sys/dev/drm/i915/intel_display.c
9005
fb->format->cpp[0] * 8, base, fb->pitches[0],
sys/dev/drm/i915/intel_display.c
9018
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
9042
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
9360
to_intel_atomic_state(crtc_state->base.state);
sys/dev/drm/i915/intel_display.c
9510
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
956
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_display.c
9562
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
957
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_display.c
9609
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
9655
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_display.c
9747
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_display.c
9748
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
9750
u32 base;
sys/dev/drm/i915/intel_display.c
9753
base = obj->phys_handle->busaddr;
sys/dev/drm/i915/intel_display.c
9755
base = intel_plane_ggtt_offset(plane_state);
sys/dev/drm/i915/intel_display.c
9757
base += plane_state->color_plane[0].offset;
sys/dev/drm/i915/intel_display.c
9761
plane_state->base.rotation & DRM_MODE_ROTATE_180)
sys/dev/drm/i915/intel_display.c
9762
base += (plane_state->base.crtc_h *
sys/dev/drm/i915/intel_display.c
9763
plane_state->base.crtc_w - 1) * fb->format->cpp[0];
sys/dev/drm/i915/intel_display.c
9765
return base;
sys/dev/drm/i915/intel_display.c
9770
int x = plane_state->base.crtc_x;
sys/dev/drm/i915/intel_display.c
9771
int y = plane_state->base.crtc_y;
sys/dev/drm/i915/intel_display.c
9792
&plane_state->base.plane->dev->mode_config;
sys/dev/drm/i915/intel_display.c
9793
int width = plane_state->base.crtc_w;
sys/dev/drm/i915/intel_display.c
9794
int height = plane_state->base.crtc_h;
sys/dev/drm/i915/intel_display.c
9802
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
9803
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_display.c
9815
src_x = plane_state->base.src_x >> 16;
sys/dev/drm/i915/intel_display.c
9816
src_y = plane_state->base.src_y >> 16;
sys/dev/drm/i915/intel_display.c
9835
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
9843
ret = drm_atomic_helper_check_plane_state(&plane_state->base,
sys/dev/drm/i915/intel_display.c
9844
&crtc_state->base,
sys/dev/drm/i915/intel_display.c
9851
if (!plane_state->base.visible)
sys/dev/drm/i915/intel_display.c
9884
int width = plane_state->base.crtc_w;
sys/dev/drm/i915/intel_display.c
9896
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_display.c
9910
plane_state->base.crtc_w,
sys/dev/drm/i915/intel_display.c
9911
plane_state->base.crtc_h);
sys/dev/drm/i915/intel_display.c
9915
WARN_ON(plane_state->base.visible &&
sys/dev/drm/i915/intel_display.c
9939
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.c
9940
u32 cntl = 0, base = 0, pos = 0, size = 0;
sys/dev/drm/i915/intel_display.c
9943
if (plane_state && plane_state->base.visible) {
sys/dev/drm/i915/intel_display.c
9944
unsigned int width = plane_state->base.crtc_w;
sys/dev/drm/i915/intel_display.c
9945
unsigned int height = plane_state->base.crtc_h;
sys/dev/drm/i915/intel_display.c
9950
base = intel_cursor_base(plane_state);
sys/dev/drm/i915/intel_display.c
9959
if (plane->cursor.base != base ||
sys/dev/drm/i915/intel_display.c
9963
I915_WRITE_FW(CURBASE(PIPE_A), base);
sys/dev/drm/i915/intel_display.c
9968
plane->cursor.base = base;
sys/dev/drm/i915/intel_display.c
9989
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_display.h
310
base.head)
sys/dev/drm/i915/intel_display.h
315
base.head) \
sys/dev/drm/i915/intel_display.h
317
drm_plane_mask(&intel_plane->base)))
sys/dev/drm/i915/intel_display.h
322
base.head) \
sys/dev/drm/i915/intel_display.h
328
base.head)
sys/dev/drm/i915/intel_display.h
333
base.head) \
sys/dev/drm/i915/intel_display.h
334
for_each_if((crtc_mask) & drm_crtc_mask(&intel_crtc->base))
sys/dev/drm/i915/intel_display.h
339
base.head)
sys/dev/drm/i915/intel_display.h
349
list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
sys/dev/drm/i915/intel_display.h
350
for_each_if((intel_encoder)->base.crtc == (__crtc))
sys/dev/drm/i915/intel_display.h
353
list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \
sys/dev/drm/i915/intel_display.h
354
for_each_if((intel_connector)->base.encoder == (__encoder))
sys/dev/drm/i915/intel_display.h
382
(__i) < (__state)->base.dev->mode_config.num_total_plane && \
sys/dev/drm/i915/intel_display.h
383
((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \
sys/dev/drm/i915/intel_display.h
384
(new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
sys/dev/drm/i915/intel_display.h
390
(__i) < (__state)->base.dev->mode_config.num_crtc && \
sys/dev/drm/i915/intel_display.h
391
((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
sys/dev/drm/i915/intel_display.h
392
(new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
sys/dev/drm/i915/intel_display.h
398
(__i) < (__state)->base.dev->mode_config.num_total_plane && \
sys/dev/drm/i915/intel_display.h
399
((plane) = to_intel_plane((__state)->base.planes[__i].ptr), \
sys/dev/drm/i915/intel_display.h
400
(old_plane_state) = to_intel_plane_state((__state)->base.planes[__i].old_state), \
sys/dev/drm/i915/intel_display.h
401
(new_plane_state) = to_intel_plane_state((__state)->base.planes[__i].new_state), 1); \
sys/dev/drm/i915/intel_dp.c
108
return intel_dig_port->base.type == INTEL_OUTPUT_EDP;
sys/dev/drm/i915/intel_dp.c
113
return enc_to_intel_dp(&intel_attached_encoder(connector)->base);
sys/dev/drm/i915/intel_dp.c
1210
to_i915(intel_dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
1265
to_i915(intel_dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
1512
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
1513
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
1696
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
1752
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
176
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
177
enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
sys/dev/drm/i915/intel_dp.c
1875
if (intel_connector->base.display_info.bpc == 0 &&
sys/dev/drm/i915/intel_dp.c
1928
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_dp.c
1962
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_dp.c
1963
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
2027
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
2028
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_dp.c
2029
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
2031
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_dp.c
2135
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
2136
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
2138
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_dp.c
2139
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_dp.c
230
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
2348
port_name(intel_dig_port->base.port));
sys/dev/drm/i915/intel_dp.c
2368
port_name(intel_dig_port->base.port));
sys/dev/drm/i915/intel_dp.c
2394
port_name(dp_to_dig_port(intel_dp)->base.port));
sys/dev/drm/i915/intel_dp.c
2413
port_name(intel_dig_port->base.port));
sys/dev/drm/i915/intel_dp.c
2473
port_name(dp_to_dig_port(intel_dp)->base.port));
sys/dev/drm/i915/intel_dp.c
2495
port_name(dp_to_dig_port(intel_dp)->base.port));
sys/dev/drm/i915/intel_dp.c
2499
port_name(dp_to_dig_port(intel_dp)->base.port)))
sys/dev/drm/i915/intel_dp.c
2553
port_name(dp_to_dig_port(intel_dp)->base.port));
sys/dev/drm/i915/intel_dp.c
2556
port_name(dp_to_dig_port(intel_dp)->base.port));
sys/dev/drm/i915/intel_dp.c
2678
struct intel_dp *intel_dp = intel_attached_dp(&connector->base);
sys/dev/drm/i915/intel_dp.c
2700
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
2705
port_name(dig_port->base.port),
sys/dev/drm/i915/intel_dp.c
2724
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_dp.c
2725
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_dp.c
2764
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_dp.c
2765
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_dp.c
2883
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
2884
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
2902
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
2903
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
2906
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_dp.c
294
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
2941
pipe_config->base.adjusted_mode.flags |= flags;
sys/dev/drm/i915/intel_dp.c
295
enum port port = dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
2958
pipe_config->base.adjusted_mode.crtc_clock =
sys/dev/drm/i915/intel_dp.c
2987
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
3021
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
3048
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
3067
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
3171
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
3172
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
3173
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_dp.c
3233
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
3246
struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
3267
pipe_name(pipe), port_name(intel_dig_port->base.port));
sys/dev/drm/i915/intel_dp.c
327
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
328
enum port port = dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
3282
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
3303
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
3304
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
3305
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_dp.c
3405
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
3424
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
3468
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
3554
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
3737
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
374
struct intel_encoder *encoder = &intel_dig_port->base;
sys/dev/drm/i915/intel_dp.c
375
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
3782
to_i915(intel_dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
3794
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
3826
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
3827
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
3828
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_dp.c
3911
to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
sys/dev/drm/i915/intel_dp.c
396
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
397
enum port port = dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
419
enum port port = dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
4192
struct drm_connector *connector = &intel_connector->base;
sys/dev/drm/i915/intel_dp.c
4334
drm_kms_helper_hotplug_event(intel_dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
4366
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4367
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
4376
if (!connector || connector->base.status != connector_status_connected)
sys/dev/drm/i915/intel_dp.c
4384
conn_state = connector->base.state;
sys/dev/drm/i915/intel_dp.c
4390
ret = drm_modeset_lock(&crtc->base.mutex, ctx);
sys/dev/drm/i915/intel_dp.c
4394
crtc_state = to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_dp.c
4398
if (!crtc_state->base.active)
sys/dev/drm/i915/intel_dp.c
447
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp.c
449
&dev_priv->vbt.ddi_port_info[dig_port->base.port];
sys/dev/drm/i915/intel_dp.c
4605
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4628
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4651
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4670
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4693
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4716
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4726
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4736
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4746
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4756
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4780
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
4789
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
4841
enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
sys/dev/drm/i915/intel_dp.c
4887
enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
sys/dev/drm/i915/intel_dp.c
4918
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
4949
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
4950
struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_dp.c
4980
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
5018
return drm_get_edid(&intel_connector->base,
sys/dev/drm/i915/intel_dp.c
5052
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_dp.c
5053
struct intel_dp *intel_dp = intel_attached_dp(&connector->base);
sys/dev/drm/i915/intel_dp.c
5064
else if (intel_digital_port_connected(&dp_to_dig_port(intel_dp)->base))
sys/dev/drm/i915/intel_dp.c
5116
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
5166
connector->base.id, connector->name);
sys/dev/drm/i915/intel_dp.c
5192
struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
5193
struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
sys/dev/drm/i915/intel_dp.c
5196
connector->base.id, connector->name);
sys/dev/drm/i915/intel_dp.c
5322
struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base);
sys/dev/drm/i915/intel_dp.c
5341
struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
sys/dev/drm/i915/intel_dp.c
5593
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
sys/dev/drm/i915/intel_dp.c
5662
if (long_hpd && intel_dig_port->base.type == INTEL_OUTPUT_EDP) {
sys/dev/drm/i915/intel_dp.c
5670
port_name(intel_dig_port->base.port));
sys/dev/drm/i915/intel_dp.c
5675
port_name(intel_dig_port->base.port),
sys/dev/drm/i915/intel_dp.c
5744
enum port port = dp_to_dig_port(intel_dp)->base.port;
sys/dev/drm/i915/intel_dp.c
5940
enum port port = dp_to_dig_port(intel_dp)->base.port;
sys/dev/drm/i915/intel_dp.c
6062
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_dp.c
6076
encoder = &dig_port->base;
sys/dev/drm/i915/intel_dp.c
6098
if (!crtc_state->base.active) {
sys/dev/drm/i915/intel_dp.c
6227
struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc;
sys/dev/drm/i915/intel_dp.c
6264
crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc;
sys/dev/drm/i915/intel_dp.c
6307
crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc;
sys/dev/drm/i915/intel_dp.c
6382
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_dp.c
6399
&connector->base);
sys/dev/drm/i915/intel_dp.c
6418
struct drm_connector *connector = &intel_connector->base;
sys/dev/drm/i915/intel_dp.c
6543
connector = &intel_connector->base;
sys/dev/drm/i915/intel_dp.c
6544
DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
sys/dev/drm/i915/intel_dp.c
6563
struct drm_connector *connector = &intel_connector->base;
sys/dev/drm/i915/intel_dp.c
6565
struct intel_encoder *intel_encoder = &intel_dig_port->base;
sys/dev/drm/i915/intel_dp.c
6566
struct drm_device *dev = intel_encoder->base.dev;
sys/dev/drm/i915/intel_dp.c
6646
intel_connector->base.base.id);
sys/dev/drm/i915/intel_dp.c
6696
intel_encoder = &intel_dig_port->base;
sys/dev/drm/i915/intel_dp.c
6697
encoder = &intel_encoder->base;
sys/dev/drm/i915/intel_dp.c
6699
if (drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
sys/dev/drm/i915/intel_dp.c
6774
intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
6795
intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
721
pipe_name(pipe), port_name(intel_dig_port->base.port)))
sys/dev/drm/i915/intel_dp.c
725
pipe_name(pipe), port_name(intel_dig_port->base.port));
sys/dev/drm/i915/intel_dp.c
791
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp.c
845
port_name(intel_dig_port->base.port));
sys/dev/drm/i915/intel_dp.c
934
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp.c
984
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dp_aux_backlight.c
111
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_dp_aux_backlight.c
112
struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
sys/dev/drm/i915/intel_dp_aux_backlight.c
180
struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
sys/dev/drm/i915/intel_dp_aux_backlight.c
230
struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
sys/dev/drm/i915/intel_dp_aux_backlight.c
249
struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
sys/dev/drm/i915/intel_dp_aux_backlight.c
59
struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
sys/dev/drm/i915/intel_dp_aux_backlight.c
84
struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base);
sys/dev/drm/i915/intel_dp_link_training.c
364
intel_connector->base.base.id,
sys/dev/drm/i915/intel_dp_link_training.c
365
intel_connector->base.name,
sys/dev/drm/i915/intel_dp_link_training.c
371
intel_connector->base.base.id,
sys/dev/drm/i915/intel_dp_link_training.c
372
intel_connector->base.name,
sys/dev/drm/i915/intel_dp_mst.c
145
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
sys/dev/drm/i915/intel_dp_mst.c
169
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
sys/dev/drm/i915/intel_dp_mst.c
196
intel_dig_port->base.post_disable(&intel_dig_port->base,
sys/dev/drm/i915/intel_dp_mst.c
207
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
sys/dev/drm/i915/intel_dp_mst.c
212
intel_dig_port->base.pre_pll_enable)
sys/dev/drm/i915/intel_dp_mst.c
213
intel_dig_port->base.pre_pll_enable(&intel_dig_port->base,
sys/dev/drm/i915/intel_dp_mst.c
221
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
sys/dev/drm/i915/intel_dp_mst.c
224
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp_mst.c
225
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp_mst.c
245
intel_dig_port->base.pre_enable(&intel_dig_port->base,
sys/dev/drm/i915/intel_dp_mst.c
268
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
sys/dev/drm/i915/intel_dp_mst.c
271
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp_mst.c
272
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp_mst.c
293
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
sys/dev/drm/i915/intel_dp_mst.c
303
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
sys/dev/drm/i915/intel_dp_mst.c
306
intel_ddi_get_config(&intel_dig_port->base, pipe_config);
sys/dev/drm/i915/intel_dp_mst.c
37
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dp_mst.c
38
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
sys/dev/drm/i915/intel_dp_mst.c
407
return &intel_dp->mst_encoders[crtc->pipe]->base.base;
sys/dev/drm/i915/intel_dp_mst.c
43
struct drm_atomic_state *state = pipe_config->base.state;
sys/dev/drm/i915/intel_dp_mst.c
431
if (connector->encoder && connector->base.state->crtc) {
sys/dev/drm/i915/intel_dp_mst.c
444
struct drm_device *dev = intel_dig_port->base.base.dev;
sys/dev/drm/i915/intel_dp_mst.c
459
connector = &intel_connector->base;
sys/dev/drm/i915/intel_dp_mst.c
46
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_dp_mst.c
471
&intel_dp->mst_encoders[pipe]->base.base;
sys/dev/drm/i915/intel_dp_mst.c
473
ret = drm_connector_attach_encoder(&intel_connector->base, enc);
sys/dev/drm/i915/intel_dp_mst.c
478
drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
sys/dev/drm/i915/intel_dp_mst.c
479
drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
sys/dev/drm/i915/intel_dp_mst.c
508
DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, connector->name);
sys/dev/drm/i915/intel_dp_mst.c
522
struct drm_device *dev = intel_dig_port->base.base.dev;
sys/dev/drm/i915/intel_dp_mst.c
539
struct drm_device *dev = intel_dig_port->base.base.dev;
sys/dev/drm/i915/intel_dp_mst.c
547
intel_encoder = &intel_mst->base;
sys/dev/drm/i915/intel_dp_mst.c
550
drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
sys/dev/drm/i915/intel_dp_mst.c
554
intel_encoder->power_domain = intel_dig_port->base.power_domain;
sys/dev/drm/i915/intel_dp_mst.c
555
intel_encoder->port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_dp_mst.c
576
struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
sys/dev/drm/i915/intel_dp_mst.c
588
struct drm_device *dev = intel_dig_port->base.base.dev;
sys/dev/drm/i915/intel_dpio_phy.c
1013
struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_dpio_phy.c
1014
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
1015
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_dpio_phy.c
1040
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dpio_phy.c
1042
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
1043
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_dpio_phy.c
1070
struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_dpio_phy.c
1071
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
1072
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_dpio_phy.c
590
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
616
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
641
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
642
struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_dpio_phy.c
643
struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
sys/dev/drm/i915/intel_dpio_phy.c
738
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
739
enum dpio_channel ch = vlv_dport_to_channel(enc_to_dig_port(&encoder->base));
sys/dev/drm/i915/intel_dpio_phy.c
740
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_dpio_phy.c
782
struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_dpio_phy.c
783
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
784
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_dpio_phy.c
862
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
sys/dev/drm/i915/intel_dpio_phy.c
864
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
865
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_dpio_phy.c
941
struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_dpio_phy.c
942
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
953
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
954
enum i915_pipe pipe = to_intel_crtc(old_crtc_state->base.crtc)->pipe;
sys/dev/drm/i915/intel_dpio_phy.c
988
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpio_phy.c
989
struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
sys/dev/drm/i915/intel_dpio_phy.c
990
struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_dpll_mgr.c
136
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_dpll_mgr.c
163
struct drm_device *dev = crtc->base.dev;
sys/dev/drm/i915/intel_dpll_mgr.c
166
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
sys/dev/drm/i915/intel_dpll_mgr.c
1823
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_dpll_mgr.c
183
crtc->base.base.id);
sys/dev/drm/i915/intel_dpll_mgr.c
1846
crtc->base.base.id, crtc->base.name, pll->info->name);
sys/dev/drm/i915/intel_dpll_mgr.c
208
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_dpll_mgr.c
210
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
sys/dev/drm/i915/intel_dpll_mgr.c
225
crtc->base.base.id);
sys/dev/drm/i915/intel_dpll_mgr.c
2280
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_dpll_mgr.c
248
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_dpll_mgr.c
2526
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpll_mgr.c
253
shared_dpll = intel_atomic_get_shared_dpll_state(crtc_state->base.state);
sys/dev/drm/i915/intel_dpll_mgr.c
266
crtc->base.base.id, crtc->base.name,
sys/dev/drm/i915/intel_dpll_mgr.c
2714
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dpll_mgr.c
279
crtc->base.base.id, crtc->base.name,
sys/dev/drm/i915/intel_dpll_mgr.c
2878
enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_dpll_mgr.c
293
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_dpll_mgr.c
296
shared_dpll = intel_atomic_get_shared_dpll_state(crtc_state->base.state);
sys/dev/drm/i915/intel_dpll_mgr.c
3292
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_dpll_mgr.c
430
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_dpll_mgr.c
440
crtc->base.base.id, crtc->base.name,
sys/dev/drm/i915/intel_dpll_mgr.c
792
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_drv.h
1015
#define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)
sys/dev/drm/i915/intel_drv.h
1016
#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
sys/dev/drm/i915/intel_drv.h
1017
#define to_intel_crtc_state(x) container_of(x, struct intel_crtc_state, base)
sys/dev/drm/i915/intel_drv.h
1018
#define to_intel_connector(x) container_of(x, struct intel_connector, base)
sys/dev/drm/i915/intel_drv.h
1019
#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
sys/dev/drm/i915/intel_drv.h
1020
#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
sys/dev/drm/i915/intel_drv.h
1021
#define to_intel_plane(x) container_of(x, struct intel_plane, base)
sys/dev/drm/i915/intel_drv.h
1022
#define to_intel_plane_state(x) container_of(x, struct intel_plane_state, base)
sys/dev/drm/i915/intel_drv.h
110
if (now - base >= timeout) { \
sys/dev/drm/i915/intel_drv.h
1178
struct intel_encoder base;
sys/dev/drm/i915/intel_drv.h
118
timeout -= now - base; \
sys/dev/drm/i915/intel_drv.h
120
base = local_clock(); \
sys/dev/drm/i915/intel_drv.h
1202
struct intel_encoder base;
sys/dev/drm/i915/intel_drv.h
1211
switch (dport->base.port) {
sys/dev/drm/i915/intel_drv.h
1225
switch (dport->base.port) {
sys/dev/drm/i915/intel_drv.h
1292
base.base);
sys/dev/drm/i915/intel_drv.h
1300
return container_of(encoder, struct intel_dp_mst_encoder, base.base);
sys/dev/drm/i915/intel_drv.h
1316
return i915_mmio_reg_valid(enc_to_intel_dp(&encoder->base)->output_reg);
sys/dev/drm/i915/intel_drv.h
1337
return to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
sys/dev/drm/i915/intel_drv.h
1350
return to_intel_plane_state(drm_atomic_get_new_plane_state(&state->base,
sys/dev/drm/i915/intel_drv.h
1351
&plane->base));
sys/dev/drm/i915/intel_drv.h
1358
return to_intel_crtc_state(drm_atomic_get_old_crtc_state(&state->base,
sys/dev/drm/i915/intel_drv.h
1359
&crtc->base));
sys/dev/drm/i915/intel_drv.h
1366
return to_intel_crtc_state(drm_atomic_get_new_crtc_state(&state->base,
sys/dev/drm/i915/intel_drv.h
1367
&crtc->base));
sys/dev/drm/i915/intel_drv.h
193
struct drm_framebuffer base;
sys/dev/drm/i915/intel_drv.h
2191
crtc_state = drm_atomic_get_crtc_state(state, &crtc->base);
sys/dev/drm/i915/intel_drv.h
227
struct drm_encoder base;
sys/dev/drm/i915/intel_drv.h
397
struct drm_connector base;
sys/dev/drm/i915/intel_drv.h
436
struct drm_connector_state base;
sys/dev/drm/i915/intel_drv.h
442
#define to_intel_digital_connector_state(x) container_of(x, struct intel_digital_connector_state, base)
sys/dev/drm/i915/intel_drv.h
457
struct drm_atomic_state base;
sys/dev/drm/i915/intel_drv.h
511
struct drm_plane_state base;
sys/dev/drm/i915/intel_drv.h
561
u32 base;
sys/dev/drm/i915/intel_drv.h
729
struct drm_crtc_state base;
sys/dev/drm/i915/intel_drv.h
920
struct drm_crtc base;
sys/dev/drm/i915/intel_drv.h
93
u64 base; \
sys/dev/drm/i915/intel_drv.h
965
struct drm_plane base;
sys/dev/drm/i915/intel_drv.h
974
u32 base, cntl, size;
sys/dev/drm/i915/intel_drv.h
99
base = local_clock(); \
sys/dev/drm/i915/intel_dsi.h
112
struct mipi_dsi_host base;
sys/dev/drm/i915/intel_dsi.h
122
return container_of(h, struct intel_dsi_host, base);
sys/dev/drm/i915/intel_dsi.h
129
return container_of(encoder, struct intel_dsi, base.base);
sys/dev/drm/i915/intel_dsi.h
40
struct intel_encoder base;
sys/dev/drm/i915/intel_dsi_dcs_backlight.c
159
struct drm_device *dev = intel_connector->base.dev;
sys/dev/drm/i915/intel_dsi_dcs_backlight.c
47
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/intel_dsi_vbt.c
327
struct drm_device *dev = intel_dsi->base.base.dev;
sys/dev/drm/i915/intel_dsi_vbt.c
421
struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
sys/dev/drm/i915/intel_dsi_vbt.c
487
struct drm_device *dev = intel_dsi->base.base.dev;
sys/dev/drm/i915/intel_dsi_vbt.c
497
drm_mode_probed_add(&connector->base, mode);
sys/dev/drm/i915/intel_dsi_vbt.c
504
struct drm_device *dev = intel_dsi->base.base.dev;
sys/dev/drm/i915/intel_dvo.c
103
struct intel_encoder base;
sys/dev/drm/i915/intel_dvo.c
114
return container_of(encoder, struct intel_dvo, base);
sys/dev/drm/i915/intel_dvo.c
124
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_dvo.c
126
struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
sys/dev/drm/i915/intel_dvo.c
140
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dvo.c
154
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dvo.c
170
pipe_config->base.adjusted_mode.flags |= flags;
sys/dev/drm/i915/intel_dvo.c
172
pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
sys/dev/drm/i915/intel_dvo.c
179
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dvo.c
193
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dvo.c
199
&pipe_config->base.mode,
sys/dev/drm/i915/intel_dvo.c
200
&pipe_config->base.adjusted_mode);
sys/dev/drm/i915/intel_dvo.c
245
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_dvo.c
266
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_dvo.c
267
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_dvo.c
268
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_dvo.c
303
connector->base.id, connector->name);
sys/dev/drm/i915/intel_dvo.c
423
intel_encoder = &intel_dvo->base;
sys/dev/drm/i915/intel_dvo.c
435
struct drm_connector *connector = &intel_connector->base;
sys/dev/drm/i915/intel_dvo.c
495
drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
sys/dev/drm/i915/intel_engine_cs.c
103
{ .gen = 1, .base = RENDER_RING_BASE }
sys/dev/drm/i915/intel_engine_cs.c
112
{ .gen = 6, .base = BLT_RING_BASE }
sys/dev/drm/i915/intel_engine_cs.c
121
{ .gen = 11, .base = GEN11_BSD_RING_BASE },
sys/dev/drm/i915/intel_engine_cs.c
122
{ .gen = 6, .base = GEN6_BSD_RING_BASE },
sys/dev/drm/i915/intel_engine_cs.c
123
{ .gen = 4, .base = BSD_RING_BASE }
sys/dev/drm/i915/intel_engine_cs.c
132
{ .gen = 11, .base = GEN11_BSD2_RING_BASE },
sys/dev/drm/i915/intel_engine_cs.c
133
{ .gen = 8, .base = GEN8_BSD2_RING_BASE }
sys/dev/drm/i915/intel_engine_cs.c
142
{ .gen = 11, .base = GEN11_BSD3_RING_BASE }
sys/dev/drm/i915/intel_engine_cs.c
151
{ .gen = 11, .base = GEN11_BSD4_RING_BASE }
sys/dev/drm/i915/intel_engine_cs.c
160
{ .gen = 11, .base = GEN11_VEBOX_RING_BASE },
sys/dev/drm/i915/intel_engine_cs.c
161
{ .gen = 7, .base = VEBOX_RING_BASE }
sys/dev/drm/i915/intel_engine_cs.c
170
{ .gen = 11, .base = GEN11_VEBOX2_RING_BASE }
sys/dev/drm/i915/intel_engine_cs.c
252
GEM_BUG_ON(!bases[i].base);
sys/dev/drm/i915/intel_engine_cs.c
254
return bases[i].base;
sys/dev/drm/i915/intel_engine_cs.c
718
const u32 base = engine->mmio_base;
sys/dev/drm/i915/intel_engine_cs.c
719
const i915_reg_t mode = RING_MI_MODE(base);
sys/dev/drm/i915/intel_engine_cs.c
92
u32 base : 24;
sys/dev/drm/i915/intel_fbc.c
1036
struct intel_crtc *crtc = to_intel_crtc(plane_state->base.crtc);
sys/dev/drm/i915/intel_fbc.c
1041
if (!plane_state->base.visible)
sys/dev/drm/i915/intel_fbc.c
1073
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
1119
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
1253
crtc->base.primary->state->visible)
sys/dev/drm/i915/intel_fbc.c
418
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
426
if (plane_state->base.visible)
sys/dev/drm/i915/intel_fbc.c
485
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
629
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
656
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
659
struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_fbc.c
664
cache->crtc.mode_flags = crtc_state->base.adjusted_mode.flags;
sys/dev/drm/i915/intel_fbc.c
668
cache->plane.rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_fbc.c
674
cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_fbc.c
675
cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_fbc.c
676
cache->plane.visible = plane_state->base.visible;
sys/dev/drm/i915/intel_fbc.c
679
cache->plane.y = plane_state->base.src.y1 >> 16;
sys/dev/drm/i915/intel_fbc.c
695
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
817
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
830
params->crtc.i9xx_plane = to_intel_plane(crtc->base.primary)->i9xx_plane;
sys/dev/drm/i915/intel_fbc.c
847
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
899
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
931
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fbc.c
945
return to_intel_plane(fbc->crtc->base.primary)->frontbuffer_bit;
sys/dev/drm/i915/intel_fbdev.c
197
(sizes->fb_width > intel_fb->base.width ||
sys/dev/drm/i915/intel_fbdev.c
198
sizes->fb_height > intel_fb->base.height)) {
sys/dev/drm/i915/intel_fbdev.c
201
intel_fb->base.width, intel_fb->base.height,
sys/dev/drm/i915/intel_fbdev.c
203
drm_framebuffer_put(&intel_fb->base);
sys/dev/drm/i915/intel_fbdev.c
206
if (!intel_fb || WARN_ON(!intel_fb_obj(&intel_fb->base))) {
sys/dev/drm/i915/intel_fbdev.c
215
sizes->fb_width = intel_fb->base.width;
sys/dev/drm/i915/intel_fbdev.c
216
sizes->fb_height = intel_fb->base.height;
sys/dev/drm/i915/intel_fbdev.c
226
vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base,
sys/dev/drm/i915/intel_fbdev.c
233
fb = &ifbdev->fb->base;
sys/dev/drm/i915/intel_fbdev.c
263
info->apertures->ranges[0].base = dev->mode_config.fb_base;
sys/dev/drm/i915/intel_fbdev.c
492
connector->state->crtc->base.id,
sys/dev/drm/i915/intel_fbdev.c
50
struct drm_i915_gem_object *obj = intel_fb_obj(&ifbdev->fb->base);
sys/dev/drm/i915/intel_fbdev.c
554
drm_framebuffer_remove(&ifbdev->fb->base);
sys/dev/drm/i915/intel_fbdev.c
588
if (obj->base.size > max_size) {
sys/dev/drm/i915/intel_fbdev.c
592
max_size = obj->base.size;
sys/dev/drm/i915/intel_fbdev.c
621
cur_size = intel_crtc->config->base.adjusted_mode.crtc_hdisplay;
sys/dev/drm/i915/intel_fbdev.c
622
cur_size = cur_size * fb->base.format->cpp[0];
sys/dev/drm/i915/intel_fbdev.c
623
if (fb->base.pitches[0] < cur_size) {
sys/dev/drm/i915/intel_fbdev.c
626
cur_size, fb->base.pitches[0]);
sys/dev/drm/i915/intel_fbdev.c
631
cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay;
sys/dev/drm/i915/intel_fbdev.c
632
cur_size = intel_fb_align_height(&fb->base, 0, cur_size);
sys/dev/drm/i915/intel_fbdev.c
633
cur_size *= fb->base.pitches[0];
sys/dev/drm/i915/intel_fbdev.c
636
intel_crtc->config->base.adjusted_mode.crtc_hdisplay,
sys/dev/drm/i915/intel_fbdev.c
637
intel_crtc->config->base.adjusted_mode.crtc_vdisplay,
sys/dev/drm/i915/intel_fbdev.c
638
fb->base.format->cpp[0] * 8,
sys/dev/drm/i915/intel_fbdev.c
659
ifbdev->preferred_bpp = fb->base.format->cpp[0] * 8;
sys/dev/drm/i915/intel_fbdev.c
662
drm_framebuffer_get(&ifbdev->fb->base);
sys/dev/drm/i915/intel_fbdev.c
673
crtc->base.id);
sys/dev/drm/i915/intel_fbdev.c
848
intel_fb_obj(&ifbdev->fb->base)->stolen)
sys/dev/drm/i915/intel_fifo_underrun.c
141
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fifo_underrun.c
207
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_fifo_underrun.c
89
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_frontbuffer.c
122
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/intel_frontbuffer.c
73
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
sys/dev/drm/i915/intel_guc.c
282
u32 ctxnum, base;
sys/dev/drm/i915/intel_guc.c
284
base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
sys/dev/drm/i915/intel_guc.c
287
base >>= PAGE_SHIFT;
sys/dev/drm/i915/intel_guc.c
288
flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
sys/dev/drm/i915/intel_guc.c
43
GEM_BUG_ON(!guc->send_regs.base);
sys/dev/drm/i915/intel_guc.c
47
return _MMIO(guc->send_regs.base + 4 * i);
sys/dev/drm/i915/intel_guc.c
56
guc->send_regs.base = i915_mmio_reg_offset(SOFT_SCRATCH(0));
sys/dev/drm/i915/intel_guc.h
79
u32 base;
sys/dev/drm/i915/intel_guc_ads.c
139
base = intel_guc_ggtt_offset(guc, vma);
sys/dev/drm/i915/intel_guc_ads.c
140
blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
sys/dev/drm/i915/intel_guc_ads.c
141
blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
sys/dev/drm/i915/intel_guc_ads.c
142
blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
sys/dev/drm/i915/intel_guc_ads.c
91
u32 base;
sys/dev/drm/i915/intel_guc_ct.c
223
u32 base;
sys/dev/drm/i915/intel_guc_ct.c
238
base = intel_guc_ggtt_offset(guc, ctch->vma);
sys/dev/drm/i915/intel_guc_ct.c
246
base + PAGE_SIZE/4 * i + PAGE_SIZE/2,
sys/dev/drm/i915/intel_guc_ct.c
255
base + PAGE_SIZE/4 * CTB_RECV,
sys/dev/drm/i915/intel_guc_ct.c
261
base + PAGE_SIZE/4 * CTB_SEND,
sys/dev/drm/i915/intel_guc_log.c
172
relay_reserve(log->relay.channel, log->vma->obj->base.size);
sys/dev/drm/i915/intel_guc_submission.c
169
struct guc_stage_desc *base = client->guc->stage_desc_pool_vaddr;
sys/dev/drm/i915/intel_guc_submission.c
171
return &base[client->stage_id];
sys/dev/drm/i915/intel_hdcp.c
151
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_hdcp.c
191
dev_priv = intel_dig_port->base.base.dev->dev_private;
sys/dev/drm/i915/intel_hdcp.c
487
dev_priv = intel_dig_port->base.base.dev->dev_private;
sys/dev/drm/i915/intel_hdcp.c
489
port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_hdcp.c
624
return enc_to_dig_port(&intel_attached_encoder(&connector->base)->base);
sys/dev/drm/i915/intel_hdcp.c
629
struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
sys/dev/drm/i915/intel_hdcp.c
631
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_hdcp.c
635
connector->base.name, connector->base.base.id);
sys/dev/drm/i915/intel_hdcp.c
656
struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
sys/dev/drm/i915/intel_hdcp.c
660
connector->base.name, connector->base.base.id);
sys/dev/drm/i915/intel_hdcp.c
710
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_hdcp.c
722
state = connector->base.state;
sys/dev/drm/i915/intel_hdcp.c
743
&connector->base);
sys/dev/drm/i915/intel_hdcp.c
831
struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
sys/dev/drm/i915/intel_hdcp.c
833
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_hdcp.c
846
connector->base.name, connector->base.base.id,
sys/dev/drm/i915/intel_hdcp.c
865
connector->base.name, connector->base.base.id);
sys/dev/drm/i915/intel_hdmi.c
1086
ret = intel_ddi_toggle_hdcp_signalling(&intel_dig_port->base, enable);
sys/dev/drm/i915/intel_hdmi.c
1099
intel_dig_port->base.base.dev->dev_private;
sys/dev/drm/i915/intel_hdmi.c
1100
enum port port = intel_dig_port->base.port;
sys/dev/drm/i915/intel_hdmi.c
1139
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
1141
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
1142
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1143
const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_hdmi.c
1178
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_hdmi.c
1179
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1196
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1198
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
1220
if (intel_dig_port->infoframe_enabled(&encoder->base, pipe_config))
sys/dev/drm/i915/intel_hdmi.c
1230
pipe_config->base.adjusted_mode.flags |= flags;
sys/dev/drm/i915/intel_hdmi.c
1240
pipe_config->base.adjusted_mode.crtc_clock = dotclock;
sys/dev/drm/i915/intel_hdmi.c
1249
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
1261
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
1263
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1283
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
1285
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1333
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
1335
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
1336
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1394
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
1396
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1399
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
1441
intel_dig_port->set_infoframes(&encoder->base, false,
sys/dev/drm/i915/intel_hdmi.c
1476
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_hdmi.c
1500
struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
sys/dev/drm/i915/intel_hdmi.c
1505
const struct drm_display_info *info = &connector->base.display_info;
sys/dev/drm/i915/intel_hdmi.c
1596
to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_hdmi.c
1597
struct drm_atomic_state *state = crtc_state->base.state;
sys/dev/drm/i915/intel_hdmi.c
1624
if (connector_state->crtc != crtc_state->base.crtc)
sys/dev/drm/i915/intel_hdmi.c
1648
crtc_state->base.adjusted_mode.htotal > 5460)
sys/dev/drm/i915/intel_hdmi.c
1660
struct intel_crtc *intel_crtc = to_intel_crtc(config->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
1690
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1691
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_hdmi.c
1692
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_hdmi.c
1697
int clock_8bpc = pipe_config->base.adjusted_mode.crtc_clock;
sys/dev/drm/i915/intel_hdmi.c
1827
enum port port = hdmi_to_dig_port(hdmi)->base.port;
sys/dev/drm/i915/intel_hdmi.c
1919
struct intel_encoder *encoder = &hdmi_to_dig_port(intel_hdmi)->base;
sys/dev/drm/i915/intel_hdmi.c
1922
connector->base.id, connector->name);
sys/dev/drm/i915/intel_hdmi.c
1950
connector->base.id, connector->name);
sys/dev/drm/i915/intel_hdmi.c
1976
enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
1980
intel_dig_port->set_infoframes(&encoder->base,
sys/dev/drm/i915/intel_hdmi.c
1989
struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
199
if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(intel_dig_port->base.port))
sys/dev/drm/i915/intel_hdmi.c
1990
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_hdmi.c
1998
dport->set_infoframes(&encoder->base,
sys/dev/drm/i915/intel_hdmi.c
2044
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
2059
struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
2060
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
2069
dport->set_infoframes(&encoder->base,
sys/dev/drm/i915/intel_hdmi.c
214
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
2148
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_hdmi.c
2149
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
sys/dev/drm/i915/intel_hdmi.c
2159
connector->base.id, connector->name,
sys/dev/drm/i915/intel_hdmi.c
2322
to_i915(intel_dig_port->base.base.dev);
sys/dev/drm/i915/intel_hdmi.c
2350
struct drm_connector *connector = &intel_connector->base;
sys/dev/drm/i915/intel_hdmi.c
2352
struct intel_encoder *intel_encoder = &intel_dig_port->base;
sys/dev/drm/i915/intel_hdmi.c
2353
struct drm_device *dev = intel_encoder->base.dev;
sys/dev/drm/i915/intel_hdmi.c
2433
intel_encoder = &intel_dig_port->base;
sys/dev/drm/i915/intel_hdmi.c
2435
drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
sys/dev/drm/i915/intel_hdmi.c
251
enum i915_pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe;
sys/dev/drm/i915/intel_hdmi.c
258
if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(intel_dig_port->base.port))
sys/dev/drm/i915/intel_hdmi.c
274
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
313
enum i915_pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe;
sys/dev/drm/i915/intel_hdmi.c
332
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
369
enum i915_pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe;
sys/dev/drm/i915/intel_hdmi.c
375
if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(intel_dig_port->base.port))
sys/dev/drm/i915/intel_hdmi.c
46
return hdmi_to_dig_port(intel_hdmi)->base.base.dev;
sys/dev/drm/i915/intel_hdmi.c
475
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_hdmi.c
476
struct drm_connector *connector = &intel_hdmi->attached_connector->base;
sys/dev/drm/i915/intel_hdmi.c
535
&crtc_state->base.adjusted_mode);
sys/dev/drm/i915/intel_hdmi.c
552
u32 port = VIDEO_DIP_PORT(intel_dig_port->base.port);
sys/dev/drm/i915/intel_hdmi.c
665
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
684
&crtc_state->base.adjusted_mode))
sys/dev/drm/i915/intel_hdmi.c
698
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
703
u32 port = VIDEO_DIP_PORT(intel_dig_port->base.port);
sys/dev/drm/i915/intel_hdmi.c
74
container_of(encoder, struct intel_digital_port, base.base);
sys/dev/drm/i915/intel_hdmi.c
751
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
795
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_hdmi.c
799
u32 port = VIDEO_DIP_PORT(intel_dig_port->base.port);
sys/dev/drm/i915/intel_hdmi.c
80
return enc_to_intel_hdmi(&intel_attached_encoder(connector)->base);
sys/dev/drm/i915/intel_hdmi.c
895
intel_dig_port->base.base.dev->dev_private;
sys/dev/drm/i915/intel_hdmi.c
925
intel_dig_port->base.base.dev->dev_private;
sys/dev/drm/i915/intel_hdmi.c
960
intel_dig_port->base.base.dev->dev_private;
sys/dev/drm/i915/intel_hotplug.c
254
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_hotplug.c
258
old_status = connector->base.status;
sys/dev/drm/i915/intel_hotplug.c
260
connector->base.status =
sys/dev/drm/i915/intel_hotplug.c
261
drm_helper_probe_detect(&connector->base, NULL, false);
sys/dev/drm/i915/intel_hotplug.c
263
if (old_status == connector->base.status)
sys/dev/drm/i915/intel_hotplug.c
267
connector->base.base.id,
sys/dev/drm/i915/intel_hotplug.c
268
connector->base.name,
sys/dev/drm/i915/intel_hotplug.c
270
drm_get_connector_status_name(connector->base.status));
sys/dev/drm/i915/intel_hotplug.c
278
enc_to_dig_port(&encoder->base)->hpd_pulse != NULL;
sys/dev/drm/i915/intel_hotplug.c
311
dig_port = enc_to_dig_port(&encoder->base);
sys/dev/drm/i915/intel_lrc.c
2663
u32 base = engine->mmio_base;
sys/dev/drm/i915/intel_lrc.c
2684
CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
sys/dev/drm/i915/intel_lrc.c
2685
CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
sys/dev/drm/i915/intel_lrc.c
2686
CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
sys/dev/drm/i915/intel_lrc.c
2687
CTX_REG(regs, CTX_RING_BUFFER_CONTROL, RING_CTL(base),
sys/dev/drm/i915/intel_lrc.c
2689
CTX_REG(regs, CTX_BB_HEAD_U, RING_BBADDR_UDW(base), 0);
sys/dev/drm/i915/intel_lrc.c
2690
CTX_REG(regs, CTX_BB_HEAD_L, RING_BBADDR(base), 0);
sys/dev/drm/i915/intel_lrc.c
2691
CTX_REG(regs, CTX_BB_STATE, RING_BBSTATE(base), RING_BB_PPGTT);
sys/dev/drm/i915/intel_lrc.c
2692
CTX_REG(regs, CTX_SECOND_BB_HEAD_U, RING_SBBADDR_UDW(base), 0);
sys/dev/drm/i915/intel_lrc.c
2693
CTX_REG(regs, CTX_SECOND_BB_HEAD_L, RING_SBBADDR(base), 0);
sys/dev/drm/i915/intel_lrc.c
2694
CTX_REG(regs, CTX_SECOND_BB_STATE, RING_SBBSTATE(base), 0);
sys/dev/drm/i915/intel_lrc.c
2698
CTX_REG(regs, CTX_RCS_INDIRECT_CTX, RING_INDIRECT_CTX(base), 0);
sys/dev/drm/i915/intel_lrc.c
2700
RING_INDIRECT_CTX_OFFSET(base), 0);
sys/dev/drm/i915/intel_lrc.c
2712
CTX_REG(regs, CTX_BB_PER_CTX_PTR, RING_BB_PER_CTX_PTR(base), 0);
sys/dev/drm/i915/intel_lrc.c
2723
CTX_REG(regs, CTX_CTX_TIMESTAMP, RING_CTX_TIMESTAMP(base), 0);
sys/dev/drm/i915/intel_lspcon.c
173
if (intel_digital_port_connected(&dig_port->base)) {
sys/dev/drm/i915/intel_lspcon.c
217
struct drm_device *dev = intel_dig_port->base.base.dev;
sys/dev/drm/i915/intel_lvds.c
1012
lvds_connector->base.edid = edid;
sys/dev/drm/i915/intel_lvds.c
106
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_lvds.c
107
struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
sys/dev/drm/i915/intel_lvds.c
124
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_lvds.c
125
struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
sys/dev/drm/i915/intel_lvds.c
140
pipe_config->base.adjusted_mode.flags |= flags;
sys/dev/drm/i915/intel_lvds.c
153
pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
sys/dev/drm/i915/intel_lvds.c
237
struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
sys/dev/drm/i915/intel_lvds.c
238
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_lvds.c
239
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_lvds.c
240
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_lvds.c
318
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_lvds.c
319
struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
sys/dev/drm/i915/intel_lvds.c
337
struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
sys/dev/drm/i915/intel_lvds.c
338
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_lvds.c
396
struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
sys/dev/drm/i915/intel_lvds.c
398
to_lvds_encoder(&intel_encoder->base);
sys/dev/drm/i915/intel_lvds.c
400
&lvds_encoder->attached_connector->base;
sys/dev/drm/i915/intel_lvds.c
401
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_lvds.c
402
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_lvds.c
47
struct intel_connector base;
sys/dev/drm/i915/intel_lvds.c
470
if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
sys/dev/drm/i915/intel_lvds.c
471
return drm_add_edid_modes(connector, lvds_connector->base.edid);
sys/dev/drm/i915/intel_lvds.c
473
mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
sys/dev/drm/i915/intel_lvds.c
493
if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
sys/dev/drm/i915/intel_lvds.c
494
kfree(lvds_connector->base.edid);
sys/dev/drm/i915/intel_lvds.c
496
intel_panel_fini(&lvds_connector->base.panel);
sys/dev/drm/i915/intel_lvds.c
65
struct intel_encoder base;
sys/dev/drm/i915/intel_lvds.c
79
return container_of(encoder, struct intel_lvds_encoder, base.base);
sys/dev/drm/i915/intel_lvds.c
792
return encoder && to_lvds_encoder(&encoder->base)->is_dual_link;
sys/dev/drm/i915/intel_lvds.c
797
struct drm_device *dev = lvds_encoder->base.base.dev;
sys/dev/drm/i915/intel_lvds.c
806
if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
sys/dev/drm/i915/intel_lvds.c
84
return container_of(connector, struct intel_lvds_connector, base.base);
sys/dev/drm/i915/intel_lvds.c
921
if (intel_connector_init(&lvds_connector->base) < 0) {
sys/dev/drm/i915/intel_lvds.c
929
intel_encoder = &lvds_encoder->base;
sys/dev/drm/i915/intel_lvds.c
930
encoder = &intel_encoder->base;
sys/dev/drm/i915/intel_lvds.c
931
intel_connector = &lvds_connector->base;
sys/dev/drm/i915/intel_lvds.c
932
connector = &intel_connector->base;
sys/dev/drm/i915/intel_lvds.c
933
drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
sys/dev/drm/i915/intel_lvds.c
936
drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
sys/dev/drm/i915/intel_modes.c
125
drm_object_attach_property(&connector->base, prop, 0);
sys/dev/drm/i915/intel_modes.c
132
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_modes.c
97
drm_object_attach_property(&connector->base, prop, 0);
sys/dev/drm/i915/intel_opregion.c
1004
opregion->acpi = base + OPREGION_ACPI_OFFSET;
sys/dev/drm/i915/intel_opregion.c
1009
opregion->swsci = base + OPREGION_SWSCI_OFFSET;
sys/dev/drm/i915/intel_opregion.c
1015
opregion->asle = base + OPREGION_ASLE_OFFSET;
sys/dev/drm/i915/intel_opregion.c
1045
vbt = base + OPREGION_VBT_OFFSET;
sys/dev/drm/i915/intel_opregion.c
1068
iounmap(base);
sys/dev/drm/i915/intel_opregion.c
364
struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
sys/dev/drm/i915/intel_opregion.c
473
intel_panel_set_backlight_acpi(connector->base.state, bclp, 255);
sys/dev/drm/i915/intel_opregion.c
670
switch (connector->base.connector_type) {
sys/dev/drm/i915/intel_opregion.c
699
MISSING_CASE(connector->base.connector_type);
sys/dev/drm/i915/intel_opregion.c
968
void *base;
sys/dev/drm/i915/intel_opregion.c
987
base = (void *)pmap_mapbios(asls, OPREGION_SIZE);
sys/dev/drm/i915/intel_opregion.c
988
if (!base)
sys/dev/drm/i915/intel_opregion.c
991
memcpy(buf, base, sizeof(buf));
sys/dev/drm/i915/intel_opregion.c
998
opregion->header = base;
sys/dev/drm/i915/intel_opregion.c
999
opregion->lid_state = base + ACPI_CLID;
sys/dev/drm/i915/intel_overlay.c
1034
if (rec->offset_Y + tmp > new_bo->base.size)
sys/dev/drm/i915/intel_overlay.c
1045
if (rec->offset_Y + tmp > new_bo->base.size)
sys/dev/drm/i915/intel_overlay.c
1049
if (rec->offset_U + tmp > new_bo->base.size ||
sys/dev/drm/i915/intel_overlay.c
1050
rec->offset_V + tmp > new_bo->base.size)
sys/dev/drm/i915/intel_overlay.c
1416
unsigned long base;
sys/dev/drm/i915/intel_overlay.c
1436
error->base = overlay->flip_addr;
sys/dev/drm/i915/intel_overlay.c
1450
error->base);
sys/dev/drm/i915/intel_overlay.c
668
to_intel_plane_state(overlay->crtc->base.primary->state);
sys/dev/drm/i915/intel_overlay.c
676
if (state->base.visible)
sys/dev/drm/i915/intel_overlay.c
677
format = state->base.fb->format->format;
sys/dev/drm/i915/intel_panel.c
1005
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1007
enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
sys/dev/drm/i915/intel_panel.c
1053
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
108
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_panel.c
1094
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1096
enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
sys/dev/drm/i915/intel_panel.c
1129
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1152
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1177
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_panel.c
1182
intel_panel_set_backlight(connector->base.state, bd->props.brightness,
sys/dev/drm/i915/intel_panel.c
1208
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_panel.c
1268
connector->base.kdev,
sys/dev/drm/i915/intel_panel.c
1280
connector->base.name);
sys/dev/drm/i915/intel_panel.c
1305
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1343
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1366
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1381
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1399
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1417
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1436
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1469
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1494
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1531
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1563
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1602
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1636
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1670
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1710
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1748
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_panel.c
1796
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_panel.c
1815
const struct drm_connector_state *conn_state = connector->base.state;
sys/dev/drm/i915/intel_panel.c
1816
struct drm_device *dev = connector->base.dev;
sys/dev/drm/i915/intel_panel.c
1918
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
1920
if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
sys/dev/drm/i915/intel_panel.c
1924
if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
sys/dev/drm/i915/intel_panel.c
1961
if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
sys/dev/drm/i915/intel_panel.c
2010
drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
sys/dev/drm/i915/intel_panel.c
2013
drm_mode_destroy(intel_connector->base.dev,
sys/dev/drm/i915/intel_panel.c
230
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_panel.c
251
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_panel.c
308
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
sys/dev/drm/i915/intel_panel.c
310
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_panel.c
447
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
465
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
472
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
479
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
507
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
515
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
533
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
542
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
552
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
580
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
591
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
624
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
659
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
685
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
716
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
729
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
749
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
774
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
805
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
855
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
901
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
940
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
975
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/intel_panel.c
977
enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
sys/dev/drm/i915/intel_pm.c
1094
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_pm.c
1095
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_pm.c
1097
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
1122
cpp = plane_state->base.fb->format->cpp[0];
sys/dev/drm/i915/intel_pm.c
1128
width = plane_state->base.crtc_w;
sys/dev/drm/i915/intel_pm.c
1130
width = drm_rect_width(&plane_state->base.dst);
sys/dev/drm/i915/intel_pm.c
1157
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
1173
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
1196
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_pm.c
1197
int num_levels = intel_wm_num_levels(to_i915(plane->base.dev));
sys/dev/drm/i915/intel_pm.c
1250
plane->base.name,
sys/dev/drm/i915/intel_pm.c
1275
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
1313
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
1315
to_intel_atomic_state(crtc_state->base.state);
sys/dev/drm/i915/intel_pm.c
1330
if (new_plane_state->base.crtc != &crtc->base &&
sys/dev/drm/i915/intel_pm.c
1331
old_plane_state->base.crtc != &crtc->base)
sys/dev/drm/i915/intel_pm.c
1407
to_intel_atomic_state(new_crtc_state->base.state);
sys/dev/drm/i915/intel_pm.c
1413
if (!new_crtc_state->base.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) {
sys/dev/drm/i915/intel_pm.c
1545
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
1546
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
1557
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
1558
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
1604
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_pm.c
1605
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_pm.c
1607
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
1616
cpp = plane_state->base.fb->format->cpp[0];
sys/dev/drm/i915/intel_pm.c
1645
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
1729
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
1757
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
1774
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_pm.c
1776
int num_levels = intel_wm_num_levels(to_i915(plane->base.dev));
sys/dev/drm/i915/intel_pm.c
1803
plane->base.name,
sys/dev/drm/i915/intel_pm.c
1832
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
1833
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
1835
to_intel_atomic_state(crtc_state->base.state);
sys/dev/drm/i915/intel_pm.c
1841
bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->base);
sys/dev/drm/i915/intel_pm.c
1852
if (new_plane_state->base.crtc != &crtc->base &&
sys/dev/drm/i915/intel_pm.c
1853
old_plane_state->base.crtc != &crtc->base)
sys/dev/drm/i915/intel_pm.c
1940
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
1941
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
2040
to_intel_atomic_state(new_crtc_state->base.state);
sys/dev/drm/i915/intel_pm.c
2046
if (!new_crtc_state->base.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) {
sys/dev/drm/i915/intel_pm.c
2164
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
2165
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
2176
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
2177
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
2190
struct drm_i915_private *dev_priv = to_i915(unused_crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
2202
&crtc->config->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
2204
crtc->base.primary->state->fb;
sys/dev/drm/i915/intel_pm.c
2222
crtc->base.cursor->state->crtc_w, 4,
sys/dev/drm/i915/intel_pm.c
2263
struct drm_i915_private *dev_priv = to_i915(unused_crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
2283
&crtc->config->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
2285
crtc->base.primary->state->fb;
sys/dev/drm/i915/intel_pm.c
2310
&crtc->config->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
2312
crtc->base.primary->state->fb;
sys/dev/drm/i915/intel_pm.c
2338
obj = intel_fb_obj(enabled->base.primary->state->fb);
sys/dev/drm/i915/intel_pm.c
2358
&enabled->config->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
2360
enabled->base.primary->state->fb;
sys/dev/drm/i915/intel_pm.c
2406
struct drm_i915_private *dev_priv = to_i915(unused_crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
2416
adjusted_mode = &crtc->config->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
2500
cpp = pstate->base.fb->format->cpp[0];
sys/dev/drm/i915/intel_pm.c
2508
cstate->base.adjusted_mode.crtc_htotal,
sys/dev/drm/i915/intel_pm.c
2509
drm_rect_width(&pstate->base.dst),
sys/dev/drm/i915/intel_pm.c
2532
cpp = pstate->base.fb->format->cpp[0];
sys/dev/drm/i915/intel_pm.c
2536
cstate->base.adjusted_mode.crtc_htotal,
sys/dev/drm/i915/intel_pm.c
2537
drm_rect_width(&pstate->base.dst),
sys/dev/drm/i915/intel_pm.c
2558
cpp = pstate->base.fb->format->cpp[0];
sys/dev/drm/i915/intel_pm.c
2561
cstate->base.adjusted_mode.crtc_htotal,
sys/dev/drm/i915/intel_pm.c
2562
pstate->base.crtc_w, cpp, mem_value);
sys/dev/drm/i915/intel_pm.c
2575
cpp = pstate->base.fb->format->cpp[0];
sys/dev/drm/i915/intel_pm.c
2577
return ilk_wm_fbc(pri_val, drm_rect_width(&pstate->base.dst), cpp);
sys/dev/drm/i915/intel_pm.c
2783
to_intel_atomic_state(cstate->base.state);
sys/dev/drm/i915/intel_pm.c
2785
&cstate->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
2788
if (!cstate->base.active)
sys/dev/drm/i915/intel_pm.c
3100
struct drm_atomic_state *state = cstate->base.state;
sys/dev/drm/i915/intel_pm.c
3101
struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
sys/dev/drm/i915/intel_pm.c
3115
drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, &cstate->base) {
sys/dev/drm/i915/intel_pm.c
3126
pipe_wm->pipe_enabled = cstate->base.active;
sys/dev/drm/i915/intel_pm.c
3128
pipe_wm->sprites_enabled = sprstate->base.visible;
sys/dev/drm/i915/intel_pm.c
3129
pipe_wm->sprites_scaled = sprstate->base.visible &&
sys/dev/drm/i915/intel_pm.c
3130
(drm_rect_width(&sprstate->base.dst) != drm_rect_width(&sprstate->base.src) >> 16 ||
sys/dev/drm/i915/intel_pm.c
3131
drm_rect_height(&sprstate->base.dst) != drm_rect_height(&sprstate->base.src) >> 16);
sys/dev/drm/i915/intel_pm.c
3187
to_intel_atomic_state(newstate->base.state);
sys/dev/drm/i915/intel_pm.c
3199
if (!newstate->base.active || drm_atomic_crtc_needs_modeset(&newstate->base))
sys/dev/drm/i915/intel_pm.c
3640
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
sys/dev/drm/i915/intel_pm.c
3784
cstate = to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_pm.c
3786
if (crtc->base.state->adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
sys/dev/drm/i915/intel_pm.c
3805
plane->base.state->fb->modifier ==
sys/dev/drm/i915/intel_pm.c
3836
adjusted_mode = &cstate->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
3860
struct drm_atomic_state *state = cstate->base.state;
sys/dev/drm/i915/intel_pm.c
3863
struct drm_crtc *for_crtc = cstate->base.crtc;
sys/dev/drm/i915/intel_pm.c
3871
if (WARN_ON(!state) || !cstate->base.active) {
sys/dev/drm/i915/intel_pm.c
4048
struct intel_plane *plane = to_intel_plane(pstate->base.plane);
sys/dev/drm/i915/intel_pm.c
4062
src_w = pstate->base.src_w >> 16;
sys/dev/drm/i915/intel_pm.c
4063
src_h = pstate->base.src_h >> 16;
sys/dev/drm/i915/intel_pm.c
4064
dst_w = pstate->base.crtc_w;
sys/dev/drm/i915/intel_pm.c
4065
dst_h = pstate->base.crtc_h;
sys/dev/drm/i915/intel_pm.c
4072
src_w = drm_rect_width(&pstate->base.src) >> 16;
sys/dev/drm/i915/intel_pm.c
4073
src_h = drm_rect_height(&pstate->base.src) >> 16;
sys/dev/drm/i915/intel_pm.c
4074
dst_w = drm_rect_width(&pstate->base.dst);
sys/dev/drm/i915/intel_pm.c
4075
dst_h = drm_rect_height(&pstate->base.dst);
sys/dev/drm/i915/intel_pm.c
4091
if (!crtc_state->base.enable)
sys/dev/drm/i915/intel_pm.c
4122
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
4123
struct drm_crtc_state *crtc_state = &cstate->base;
sys/dev/drm/i915/intel_pm.c
4133
if (!cstate->base.enable)
sys/dev/drm/i915/intel_pm.c
4191
if (!intel_pstate->base.visible)
sys/dev/drm/i915/intel_pm.c
4207
width = drm_rect_width(&intel_pstate->base.src) >> 16;
sys/dev/drm/i915/intel_pm.c
4208
height = drm_rect_height(&intel_pstate->base.src) >> 16;
sys/dev/drm/i915/intel_pm.c
4233
struct drm_crtc_state *cstate = &intel_cstate->base;
sys/dev/drm/i915/intel_pm.c
4293
src_w = drm_rect_width(&intel_pstate->base.src) >> 16;
sys/dev/drm/i915/intel_pm.c
4294
src_h = drm_rect_height(&intel_pstate->base.src) >> 16;
sys/dev/drm/i915/intel_pm.c
4335
drm_atomic_crtc_state_for_each_plane_state(plane, pstate, &cstate->base) {
sys/dev/drm/i915/intel_pm.c
4355
struct drm_atomic_state *state = cstate->base.state;
sys/dev/drm/i915/intel_pm.c
4356
struct drm_crtc *crtc = cstate->base.crtc;
sys/dev/drm/i915/intel_pm.c
4378
if (!cstate->base.active) {
sys/dev/drm/i915/intel_pm.c
4521
if (!cstate->base.active)
sys/dev/drm/i915/intel_pm.c
4529
crtc_htotal = cstate->base.adjusted_mode.crtc_htotal;
sys/dev/drm/i915/intel_pm.c
4563
struct intel_plane *plane = to_intel_plane(intel_pstate->base.plane);
sys/dev/drm/i915/intel_pm.c
4564
const struct drm_plane_state *pstate = &intel_pstate->base;
sys/dev/drm/i915/intel_pm.c
4568
to_intel_atomic_state(cstate->base.state);
sys/dev/drm/i915/intel_pm.c
4590
wp->width = intel_pstate->base.crtc_w;
sys/dev/drm/i915/intel_pm.c
4597
wp->width = drm_rect_width(&intel_pstate->base.src) >> 16;
sys/dev/drm/i915/intel_pm.c
4674
const struct drm_plane_state *pstate = &intel_pstate->base;
sys/dev/drm/i915/intel_pm.c
4680
to_intel_atomic_state(cstate->base.state);
sys/dev/drm/i915/intel_pm.c
4702
cstate->base.adjusted_mode.crtc_htotal,
sys/dev/drm/i915/intel_pm.c
4709
if ((wp->cpp * cstate->base.adjusted_mode.crtc_htotal /
sys/dev/drm/i915/intel_pm.c
474
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_pm.c
475
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
4789
plane->base.id, plane->name,
sys/dev/drm/i915/intel_pm.c
4823
struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
sys/dev/drm/i915/intel_pm.c
4824
struct drm_plane *plane = intel_pstate->base.plane;
sys/dev/drm/i915/intel_pm.c
4832
if (WARN_ON(!intel_pstate->base.fb))
sys/dev/drm/i915/intel_pm.c
4862
if (intel_pstate->base.fb->format->format == DRM_FORMAT_NV12)
sys/dev/drm/i915/intel_pm.c
4871
struct drm_atomic_state *state = cstate->base.state;
sys/dev/drm/i915/intel_pm.c
4897
struct drm_device *dev = cstate->base.crtc->dev;
sys/dev/drm/i915/intel_pm.c
4903
if (!cstate->base.active)
sys/dev/drm/i915/intel_pm.c
4950
struct drm_device *dev = cstate->base.crtc->dev;
sys/dev/drm/i915/intel_pm.c
4951
struct drm_crtc_state *crtc_state = &cstate->base;
sys/dev/drm/i915/intel_pm.c
4969
enum i915_pipe pipe = to_intel_crtc(cstate->base.crtc)->pipe;
sys/dev/drm/i915/intel_pm.c
5042
struct drm_crtc *crtc = &intel_crtc->base;
sys/dev/drm/i915/intel_pm.c
5079
struct drm_crtc *crtc = &intel_crtc->base;
sys/dev/drm/i915/intel_pm.c
5168
struct drm_atomic_state *state = cstate->base.state;
sys/dev/drm/i915/intel_pm.c
5170
struct drm_crtc *crtc = cstate->base.crtc;
sys/dev/drm/i915/intel_pm.c
5180
drm_for_each_plane_mask(plane, dev, cstate->base.plane_mask) {
sys/dev/drm/i915/intel_pm.c
5251
intel_plane->base.base.id,
sys/dev/drm/i915/intel_pm.c
5252
intel_plane->base.name,
sys/dev/drm/i915/intel_pm.c
5411
struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc);
sys/dev/drm/i915/intel_pm.c
5412
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
sys/dev/drm/i915/intel_pm.c
5418
if (!(state->wm_results.dirty_pipes & drm_crtc_mask(&crtc->base)))
sys/dev/drm/i915/intel_pm.c
5436
struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
sys/dev/drm/i915/intel_pm.c
5437
struct drm_device *dev = intel_crtc->base.dev;
sys/dev/drm/i915/intel_pm.c
5443
if ((results->dirty_pipes & drm_crtc_mask(&intel_crtc->base)) == 0)
sys/dev/drm/i915/intel_pm.c
5448
if (cstate->base.active_changed)
sys/dev/drm/i915/intel_pm.c
5513
struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
5514
struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
sys/dev/drm/i915/intel_pm.c
5525
struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
sys/dev/drm/i915/intel_pm.c
5526
struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
sys/dev/drm/i915/intel_pm.c
5787
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_pm.c
5871
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_pm.c
5873
to_intel_plane_state(plane->base.state);
sys/dev/drm/i915/intel_pm.c
5878
if (plane_state->base.visible)
sys/dev/drm/i915/intel_pm.c
5904
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_pm.c
5964
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_pm.c
6025
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_pm.c
6027
to_intel_plane_state(plane->base.state);
sys/dev/drm/i915/intel_pm.c
6034
if (plane_state->base.visible)
sys/dev/drm/i915/intel_pm.c
6051
to_intel_crtc_state(crtc->base.state);
sys/dev/drm/i915/intel_pm.c
6146
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
805
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_pm.c
808
if (!crtc_state->base.active)
sys/dev/drm/i915/intel_pm.c
820
return plane_state->base.fb != NULL;
sys/dev/drm/i915/intel_pm.c
822
return plane_state->base.visible;
sys/dev/drm/i915/intel_pm.c
842
struct drm_i915_private *dev_priv = to_i915(unused_crtc->base.dev);
sys/dev/drm/i915/intel_pm.c
861
&crtc->config->base.adjusted_mode;
sys/dev/drm/i915/intel_pm.c
863
crtc->base.primary->state->fb;
sys/dev/drm/i915/intel_psr.c
1021
crtc = dp_to_dig_port(dev_priv->psr.dp)->base.base.crtc;
sys/dev/drm/i915/intel_psr.c
220
to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
sys/dev/drm/i915/intel_psr.c
297
intel_dig_port->write_infoframe(&intel_dig_port->base.base, crtc_state,
sys/dev/drm/i915/intel_psr.c
449
int crtc_hdisplay = crtc_state->base.adjusted_mode.crtc_hdisplay;
sys/dev/drm/i915/intel_psr.c
450
int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;
sys/dev/drm/i915/intel_psr.c
485
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_psr.c
501
if (dig_port->base.port != PORT_A) {
sys/dev/drm/i915/intel_psr.c
762
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
sys/dev/drm/i915/intel_psr.c
763
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_psr.c
856
conn_state = dp->attached_connector->base.state;
sys/dev/drm/i915/intel_psr.c
864
commit = crtc_state->base.commit;
sys/dev/drm/i915/intel_psr.c
978
crtc = dp_to_dig_port(dev_priv->psr.dp)->base.base.crtc;
sys/dev/drm/i915/intel_ringbuffer.c
1531
*cs++ = ppgtt->pd.base.ggtt_offset << 10;
sys/dev/drm/i915/intel_runtime_pm.c
1025
intel_crt_reset(&encoder->base);
sys/dev/drm/i915/intel_runtime_pm.c
1404
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_runtime_pm.c
1406
enum dpio_phy phy = vlv_dport_to_phy(enc_to_dig_port(&encoder->base));
sys/dev/drm/i915/intel_runtime_pm.c
1407
enum dpio_channel ch = vlv_dport_to_channel(enc_to_dig_port(&encoder->base));
sys/dev/drm/i915/intel_sdvo.c
1121
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_sdvo.c
1122
struct drm_display_mode *mode = &pipe_config->base.mode;
sys/dev/drm/i915/intel_sdvo.c
1127
if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
sys/dev/drm/i915/intel_sdvo.c
1166
if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
sys/dev/drm/i915/intel_sdvo.c
1169
if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
sys/dev/drm/i915/intel_sdvo.c
1170
(intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
sys/dev/drm/i915/intel_sdvo.c
1173
if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
sys/dev/drm/i915/intel_sdvo.c
1185
intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
sys/dev/drm/i915/intel_sdvo.c
1209
const struct drm_connector_state *conn_state = &sdvo_state->base.base;
sys/dev/drm/i915/intel_sdvo.c
123
struct intel_connector base;
sys/dev/drm/i915/intel_sdvo.c
1268
struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
sys/dev/drm/i915/intel_sdvo.c
1269
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/intel_sdvo.c
1270
const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_sdvo.c
1275
const struct drm_display_mode *mode = &crtc_state->base.mode;
sys/dev/drm/i915/intel_sdvo.c
1395
to_intel_sdvo_connector(&connector->base);
sys/dev/drm/i915/intel_sdvo.c
1396
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
sys/dev/drm/i915/intel_sdvo.c
1425
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_sdvo.c
1440
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_sdvo.c
1474
pipe_config->base.adjusted_mode.flags |= flags;
sys/dev/drm/i915/intel_sdvo.c
1494
pipe_config->base.adjusted_mode.crtc_clock = dotclock;
sys/dev/drm/i915/intel_sdvo.c
1533
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_sdvo.c
1535
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
sys/dev/drm/i915/intel_sdvo.c
1591
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_sdvo.c
1594
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_sdvo.c
165
struct intel_digital_connector_state base;
sys/dev/drm/i915/intel_sdvo.c
1696
struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
sys/dev/drm/i915/intel_sdvo.c
176
return container_of(encoder, struct intel_sdvo, base);
sys/dev/drm/i915/intel_sdvo.c
1836
connector->base.id, connector->name);
sys/dev/drm/i915/intel_sdvo.c
187
return container_of(connector, struct intel_sdvo_connector, base.base);
sys/dev/drm/i915/intel_sdvo.c
1887
connector->base.id, connector->name);
sys/dev/drm/i915/intel_sdvo.c
191
container_of((conn_state), struct intel_sdvo_connector_state, base.base)
sys/dev/drm/i915/intel_sdvo.c
1986
connector->base.id, connector->name);
sys/dev/drm/i915/intel_sdvo.c
2024
connector->base.id, connector->name);
sys/dev/drm/i915/intel_sdvo.c
210
struct drm_device *dev = intel_sdvo->base.base.dev;
sys/dev/drm/i915/intel_sdvo.c
2222
__drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
sys/dev/drm/i915/intel_sdvo.c
2223
return &state->base.base;
sys/dev/drm/i915/intel_sdvo.c
2437
drm_connector = &connector->base.base;
sys/dev/drm/i915/intel_sdvo.c
2438
ret = drm_connector_init(encoder->base.base.dev,
sys/dev/drm/i915/intel_sdvo.c
2441
connector->base.base.connector_type);
sys/dev/drm/i915/intel_sdvo.c
2448
connector->base.base.interlace_allowed = 1;
sys/dev/drm/i915/intel_sdvo.c
2449
connector->base.base.doublescan_allowed = 0;
sys/dev/drm/i915/intel_sdvo.c
2450
connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
sys/dev/drm/i915/intel_sdvo.c
2451
connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
sys/dev/drm/i915/intel_sdvo.c
2453
intel_connector_attach_encoder(&connector->base, &encoder->base);
sys/dev/drm/i915/intel_sdvo.c
2462
struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
sys/dev/drm/i915/intel_sdvo.c
2464
intel_attach_force_audio_property(&connector->base.base);
sys/dev/drm/i915/intel_sdvo.c
2466
intel_attach_broadcast_rgb_property(&connector->base.base);
sys/dev/drm/i915/intel_sdvo.c
2468
intel_attach_aspect_ratio_property(&connector->base.base);
sys/dev/drm/i915/intel_sdvo.c
2469
connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
sys/dev/drm/i915/intel_sdvo.c
2487
__drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
sys/dev/drm/i915/intel_sdvo.c
2488
&conn_state->base.base);
sys/dev/drm/i915/intel_sdvo.c
2496
struct drm_encoder *encoder = &intel_sdvo->base.base;
sys/dev/drm/i915/intel_sdvo.c
2517
intel_connector = &intel_sdvo_connector->base;
sys/dev/drm/i915/intel_sdvo.c
2518
connector = &intel_connector->base;
sys/dev/drm/i915/intel_sdvo.c
2555
struct drm_encoder *encoder = &intel_sdvo->base.base;
sys/dev/drm/i915/intel_sdvo.c
2566
intel_connector = &intel_sdvo_connector->base;
sys/dev/drm/i915/intel_sdvo.c
2567
connector = &intel_connector->base;
sys/dev/drm/i915/intel_sdvo.c
2595
struct drm_encoder *encoder = &intel_sdvo->base.base;
sys/dev/drm/i915/intel_sdvo.c
2606
intel_connector = &intel_sdvo_connector->base;
sys/dev/drm/i915/intel_sdvo.c
2607
connector = &intel_connector->base;
sys/dev/drm/i915/intel_sdvo.c
2631
struct drm_encoder *encoder = &intel_sdvo->base.base;
sys/dev/drm/i915/intel_sdvo.c
2643
intel_connector = &intel_sdvo_connector->base;
sys/dev/drm/i915/intel_sdvo.c
2644
connector = &intel_connector->base;
sys/dev/drm/i915/intel_sdvo.c
2736
intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
sys/dev/drm/i915/intel_sdvo.c
2743
struct drm_device *dev = intel_sdvo->base.base.dev;
sys/dev/drm/i915/intel_sdvo.c
2748
if (intel_attached_encoder(connector) == &intel_sdvo->base) {
sys/dev/drm/i915/intel_sdvo.c
2759
struct drm_device *dev = intel_sdvo->base.base.dev;
sys/dev/drm/i915/intel_sdvo.c
2793
intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
sys/dev/drm/i915/intel_sdvo.c
2794
drm_object_attach_property(&intel_sdvo_connector->base.base.base,
sys/dev/drm/i915/intel_sdvo.c
2809
drm_object_attach_property(&connector->base, \
sys/dev/drm/i915/intel_sdvo.c
2823
struct drm_device *dev = intel_sdvo->base.base.dev;
sys/dev/drm/i915/intel_sdvo.c
2824
struct drm_connector *connector = &intel_sdvo_connector->base.base;
sys/dev/drm/i915/intel_sdvo.c
2850
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_sdvo.c
2858
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_sdvo.c
2885
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_sdvo.c
2894
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_sdvo.c
2924
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_sdvo.c
2937
struct drm_device *dev = intel_sdvo->base.base.dev;
sys/dev/drm/i915/intel_sdvo.c
2938
struct drm_connector *connector = &intel_sdvo_connector->base.base;
sys/dev/drm/i915/intel_sdvo.c
3074
intel_encoder = &intel_sdvo->base;
sys/dev/drm/i915/intel_sdvo.c
3078
drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
sys/dev/drm/i915/intel_sdvo.c
3136
intel_sdvo->base.cloneable = 0;
sys/dev/drm/i915/intel_sdvo.c
3171
drm_encoder_cleanup(&intel_encoder->base);
sys/dev/drm/i915/intel_sdvo.c
69
struct intel_encoder base;
sys/dev/drm/i915/intel_sdvo.c
993
&pipe_config->base.adjusted_mode,
sys/dev/drm/i915/intel_sprite.c
100
if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
sys/dev/drm/i915/intel_sprite.c
1020
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
1040
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
1061
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
1062
const struct drm_rect *src = &plane_state->base.src;
sys/dev/drm/i915/intel_sprite.c
1063
const struct drm_rect *dst = &plane_state->base.dst;
sys/dev/drm/i915/intel_sprite.c
1066
&crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_sprite.c
1122
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_sprite.c
1123
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
1138
ret = drm_atomic_helper_check_plane_state(&plane_state->base,
sys/dev/drm/i915/intel_sprite.c
1139
&crtc_state->base,
sys/dev/drm/i915/intel_sprite.c
1145
if (!plane_state->base.visible)
sys/dev/drm/i915/intel_sprite.c
1170
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_sprite.c
1171
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
1172
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_sprite.c
1195
ret = drm_atomic_helper_check_plane_state(&plane_state->base,
sys/dev/drm/i915/intel_sprite.c
1196
&crtc_state->base,
sys/dev/drm/i915/intel_sprite.c
1203
if (!plane_state->base.visible)
sys/dev/drm/i915/intel_sprite.c
1222
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
1223
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_sprite.c
1267
if (crtc_state->base.enable &&
sys/dev/drm/i915/intel_sprite.c
1268
crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE &&
sys/dev/drm/i915/intel_sprite.c
1284
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_sprite.c
1285
int crtc_x = plane_state->base.dst.x1;
sys/dev/drm/i915/intel_sprite.c
1286
int crtc_w = drm_rect_width(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
1313
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_sprite.c
1314
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
1324
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
1334
ret = drm_atomic_helper_check_plane_state(&plane_state->base,
sys/dev/drm/i915/intel_sprite.c
1335
&crtc_state->base,
sys/dev/drm/i915/intel_sprite.c
1341
if (!plane_state->base.visible)
sys/dev/drm/i915/intel_sprite.c
1373
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_sprite.c
1374
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
145
drm_crtc_vblank_put(&crtc->base);
sys/dev/drm/i915/intel_sprite.c
1460
crtc->base.primary);
sys/dev/drm/i915/intel_sprite.c
1779
state = intel_create_plane_state(&intel_plane->base);
sys/dev/drm/i915/intel_sprite.c
1784
intel_plane->base.state = &state->base;
sys/dev/drm/i915/intel_sprite.c
186
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
sys/dev/drm/i915/intel_sprite.c
1879
ret = drm_universal_plane_init(&dev_priv->drm, &intel_plane->base,
sys/dev/drm/i915/intel_sprite.c
1886
ret = drm_universal_plane_init(&dev_priv->drm, &intel_plane->base,
sys/dev/drm/i915/intel_sprite.c
1895
drm_plane_create_rotation_property(&intel_plane->base,
sys/dev/drm/i915/intel_sprite.c
1899
drm_plane_create_color_properties(&intel_plane->base,
sys/dev/drm/i915/intel_sprite.c
1907
drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
sys/dev/drm/i915/intel_sprite.c
191
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_sprite.c
199
if (new_crtc_state->base.event) {
sys/dev/drm/i915/intel_sprite.c
200
WARN_ON(drm_crtc_vblank_get(&crtc->base) != 0);
sys/dev/drm/i915/intel_sprite.c
202
lockmgr(&crtc->base.dev->event_lock, LK_EXCLUSIVE);
sys/dev/drm/i915/intel_sprite.c
203
drm_crtc_arm_vblank_event(&crtc->base, new_crtc_state->base.event);
sys/dev/drm/i915/intel_sprite.c
204
lockmgr(&crtc->base.dev->event_lock, LK_RELEASE);
sys/dev/drm/i915/intel_sprite.c
206
new_crtc_state->base.event = NULL;
sys/dev/drm/i915/intel_sprite.c
235
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_sprite.c
236
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
237
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_sprite.c
247
fb->base.id, stride,
sys/dev/drm/i915/intel_sprite.c
248
plane->base.base.id, plane->base.name, max_stride);
sys/dev/drm/i915/intel_sprite.c
257
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
258
struct drm_rect *src = &plane_state->base.src;
sys/dev/drm/i915/intel_sprite.c
310
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
315
int crtc_x = plane_state->base.dst.x1;
sys/dev/drm/i915/intel_sprite.c
316
int crtc_y = plane_state->base.dst.y1;
sys/dev/drm/i915/intel_sprite.c
317
uint32_t crtc_w = drm_rect_width(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
318
uint32_t crtc_h = drm_rect_height(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
323
hscale = drm_rect_calc_hscale(&plane_state->base.src,
sys/dev/drm/i915/intel_sprite.c
324
&plane_state->base.dst,
sys/dev/drm/i915/intel_sprite.c
326
vscale = drm_rect_calc_vscale(&plane_state->base.src,
sys/dev/drm/i915/intel_sprite.c
327
&plane_state->base.dst,
sys/dev/drm/i915/intel_sprite.c
331
if (plane_state->base.fb->format->format == DRM_FORMAT_NV12) {
sys/dev/drm/i915/intel_sprite.c
363
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
371
int crtc_x = plane_state->base.dst.x1;
sys/dev/drm/i915/intel_sprite.c
372
int crtc_y = plane_state->base.dst.y1;
sys/dev/drm/i915/intel_sprite.c
375
uint32_t src_w = drm_rect_width(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_sprite.c
376
uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_sprite.c
423
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
442
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
463
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_sprite.c
464
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
465
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
491
const s16 *csc = csc_matrix[plane_state->base.color_encoding];
sys/dev/drm/i915/intel_sprite.c
522
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
sys/dev/drm/i915/intel_sprite.c
523
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
524
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
530
plane_state->base.color_range == DRM_COLOR_YCBCR_LIMITED_RANGE) {
sys/dev/drm/i915/intel_sprite.c
561
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
562
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_sprite.c
607
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
sys/dev/drm/i915/intel_sprite.c
630
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
631
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
638
int crtc_x = plane_state->base.dst.x1;
sys/dev/drm/i915/intel_sprite.c
639
int crtc_y = plane_state->base.dst.y1;
sys/dev/drm/i915/intel_sprite.c
640
uint32_t crtc_w = drm_rect_width(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
641
uint32_t crtc_h = drm_rect_height(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
687
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
706
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
728
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_sprite.c
729
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
730
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_sprite.c
766
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
sys/dev/drm/i915/intel_sprite.c
769
if (plane_state->base.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
sys/dev/drm/i915/intel_sprite.c
77
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
sys/dev/drm/i915/intel_sprite.c
78
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
sys/dev/drm/i915/intel_sprite.c
79
const struct drm_display_mode *adjusted_mode = &new_crtc_state->base.adjusted_mode;
sys/dev/drm/i915/intel_sprite.c
791
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
792
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
798
int crtc_x = plane_state->base.dst.x1;
sys/dev/drm/i915/intel_sprite.c
799
int crtc_y = plane_state->base.dst.y1;
sys/dev/drm/i915/intel_sprite.c
800
uint32_t crtc_w = drm_rect_width(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
801
uint32_t crtc_h = drm_rect_height(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
804
uint32_t src_w = drm_rect_width(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_sprite.c
805
uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_sprite.c
82
wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
sys/dev/drm/i915/intel_sprite.c
853
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
874
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
903
to_i915(plane_state->base.plane->dev);
sys/dev/drm/i915/intel_sprite.c
904
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
905
unsigned int rotation = plane_state->base.rotation;
sys/dev/drm/i915/intel_sprite.c
938
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
sys/dev/drm/i915/intel_sprite.c
941
if (plane_state->base.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
sys/dev/drm/i915/intel_sprite.c
963
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
sys/dev/drm/i915/intel_sprite.c
964
const struct drm_framebuffer *fb = plane_state->base.fb;
sys/dev/drm/i915/intel_sprite.c
970
int crtc_x = plane_state->base.dst.x1;
sys/dev/drm/i915/intel_sprite.c
971
int crtc_y = plane_state->base.dst.y1;
sys/dev/drm/i915/intel_sprite.c
972
uint32_t crtc_w = drm_rect_width(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
973
uint32_t crtc_h = drm_rect_height(&plane_state->base.dst);
sys/dev/drm/i915/intel_sprite.c
976
uint32_t src_w = drm_rect_width(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_sprite.c
977
uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16;
sys/dev/drm/i915/intel_tv.c
1263
connector->base.id, connector->name,
sys/dev/drm/i915/intel_tv.c
1487
intel_encoder = &intel_tv->base;
sys/dev/drm/i915/intel_tv.c
1488
connector = &intel_connector->base;
sys/dev/drm/i915/intel_tv.c
1506
drm_encoder_init(dev, &intel_encoder->base, &intel_tv_enc_funcs,
sys/dev/drm/i915/intel_tv.c
1524
intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << 1));
sys/dev/drm/i915/intel_tv.c
1546
drm_object_attach_property(&connector->base, dev->mode_config.tv_mode_property,
sys/dev/drm/i915/intel_tv.c
1548
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_tv.c
1551
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_tv.c
1554
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_tv.c
1557
drm_object_attach_property(&connector->base,
sys/dev/drm/i915/intel_tv.c
47
struct intel_encoder base;
sys/dev/drm/i915/intel_tv.c
790
return container_of(encoder, struct intel_tv, base);
sys/dev/drm/i915/intel_tv.c
801
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_tv.c
814
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_tv.c
819
to_intel_crtc(pipe_config->base.crtc)->pipe);
sys/dev/drm/i915/intel_tv.c
829
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/intel_tv.c
870
pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
sys/dev/drm/i915/intel_tv.c
880
&pipe_config->base.adjusted_mode;
sys/dev/drm/i915/intel_tv.c
986
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/intel_tv.c
987
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/intel_uc_fw.c
225
ggtt_pin_bias = to_i915(uc_fw->obj->base.dev)->ggtt.pin_bias;
sys/dev/drm/i915/intel_uncore.c
1720
const u32 base = engine->mmio_base;
sys/dev/drm/i915/intel_uncore.c
1725
I915_WRITE_FW(RING_HEAD(base), I915_READ_FW(RING_TAIL(base)));
sys/dev/drm/i915/intel_uncore.c
1726
POSTING_READ_FW(RING_HEAD(base)); /* paranoia */
sys/dev/drm/i915/intel_uncore.c
1728
I915_WRITE_FW(RING_HEAD(base), 0);
sys/dev/drm/i915/intel_uncore.c
1729
I915_WRITE_FW(RING_TAIL(base), 0);
sys/dev/drm/i915/intel_uncore.c
1730
POSTING_READ_FW(RING_TAIL(base));
sys/dev/drm/i915/intel_uncore.c
1733
I915_WRITE_FW(RING_CTL(base), 0);
sys/dev/drm/i915/intel_uncore.c
1736
if (I915_READ_FW(RING_HEAD(base)) != 0)
sys/dev/drm/i915/intel_uncore.c
830
#define BSEARCH(key, base, num, cmp) ({ \
sys/dev/drm/i915/intel_uncore.c
832
typeof(base) result__ = NULL; \
sys/dev/drm/i915/intel_uncore.c
835
int ret__ = (cmp)((key), (base) + mid__); \
sys/dev/drm/i915/intel_uncore.c
841
result__ = (base) + mid__; \
sys/dev/drm/i915/intel_uncore.h
214
#define raw_reg_read(base, reg) \
sys/dev/drm/i915/intel_uncore.h
215
readl(base + i915_mmio_reg_offset(reg))
sys/dev/drm/i915/intel_uncore.h
216
#define raw_reg_write(base, reg, value) \
sys/dev/drm/i915/intel_uncore.h
217
writel(value, base + i915_mmio_reg_offset(reg))
sys/dev/drm/i915/intel_wopcm.c
213
wopcm->guc.base = guc_wopcm_base;
sys/dev/drm/i915/intel_wopcm.c
256
GEM_BUG_ON(!wopcm->guc.base);
sys/dev/drm/i915/intel_wopcm.c
267
wopcm->guc.base | huc_agent, mask,
sys/dev/drm/i915/intel_wopcm.h
22
u32 base;
sys/dev/drm/i915/intel_workarounds.c
1103
const u32 base = engine->mmio_base;
sys/dev/drm/i915/intel_workarounds.c
1112
I915_WRITE_FW(RING_FORCE_TO_NONPRIV(base, i),
sys/dev/drm/i915/intel_workarounds.c
1117
I915_WRITE_FW(RING_FORCE_TO_NONPRIV(base, i), w->nopid);
sys/dev/drm/i915/vlv_dsi.c
1021
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
1022
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
1093
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/vlv_dsi.c
1096
&pipe_config->base.adjusted_mode;
sys/dev/drm/i915/vlv_dsi.c
1098
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/vlv_dsi.c
1099
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
1109
adjusted_mode_sw = &crtc->config->base.adjusted_mode;
sys/dev/drm/i915/vlv_dsi.c
122
struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev;
sys/dev/drm/i915/vlv_dsi.c
1254
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
1270
pipe_config->base.adjusted_mode.crtc_clock = pclk;
sys/dev/drm/i915/vlv_dsi.c
1403
struct drm_encoder *encoder = &intel_encoder->base;
sys/dev/drm/i915/vlv_dsi.c
1406
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/vlv_dsi.c
1408
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/vlv_dsi.c
1596
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
1597
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
1689
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/vlv_dsi.c
1710
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
sys/dev/drm/i915/vlv_dsi.c
1719
drm_connector_attach_scaling_mode_property(&connector->base,
sys/dev/drm/i915/vlv_dsi.c
1722
connector->base.state->scaling_mode = DRM_MODE_SCALE_ASPECT;
sys/dev/drm/i915/vlv_dsi.c
1724
connector->base.display_info.panel_orientation =
sys/dev/drm/i915/vlv_dsi.c
1727
&connector->base,
sys/dev/drm/i915/vlv_dsi.c
1765
intel_encoder = &intel_dsi->base;
sys/dev/drm/i915/vlv_dsi.c
1766
encoder = &intel_encoder->base;
sys/dev/drm/i915/vlv_dsi.c
1769
connector = &intel_connector->base;
sys/dev/drm/i915/vlv_dsi.c
1876
drm_encoder_cleanup(&intel_encoder->base);
sys/dev/drm/i915/vlv_dsi.c
219
host->base.ops = &intel_dsi_host_ops;
sys/dev/drm/i915/vlv_dsi.c
236
device->host = &host->base;
sys/dev/drm/i915/vlv_dsi.c
250
struct drm_encoder *encoder = &intel_dsi->base.base;
sys/dev/drm/i915/vlv_dsi.c
307
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
309
base);
sys/dev/drm/i915/vlv_dsi.c
311
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
sys/dev/drm/i915/vlv_dsi.c
313
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
sys/dev/drm/i915/vlv_dsi.c
362
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
363
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
411
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
412
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
485
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
486
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
512
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
513
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
551
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
563
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
564
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
595
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
596
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
629
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
630
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
675
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
676
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
sys/dev/drm/i915/vlv_dsi.c
677
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
727
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/i915/vlv_dsi.c
729
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
74
struct drm_encoder *encoder = &intel_dsi->base.base;
sys/dev/drm/i915/vlv_dsi.c
750
struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
sys/dev/drm/i915/vlv_dsi.c
800
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
801
struct drm_crtc *crtc = pipe_config->base.crtc;
sys/dev/drm/i915/vlv_dsi.c
916
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi.c
939
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
951
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi.c
952
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi_pll.c
117
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
118
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi_pll.c
148
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
180
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
234
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
267
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
268
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi_pll.c
336
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi_pll.c
337
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
363
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
364
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi_pll.c
477
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
478
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi_pll.c
525
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
sys/dev/drm/i915/vlv_dsi_pll.c
526
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
sys/dev/drm/i915/vlv_dsi_pll.c
539
bxt_dsi_program_clocks(encoder->base.dev, port, config);
sys/dev/drm/i915/vlv_dsi_pll.c
541
glk_dsi_program_esc_clock(encoder->base.dev, config);
sys/dev/drm/i915/vlv_dsi_pll.c
565
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/include/drm/drm_agpsupport.h
30
unsigned long base;
sys/dev/drm/include/drm/drm_connector.h
1130
#define obj_to_connector(x) container_of(x, struct drm_connector, base)
sys/dev/drm/include/drm/drm_connector.h
1179
drm_mode_object_get(&connector->base);
sys/dev/drm/include/drm/drm_connector.h
1191
drm_mode_object_put(&connector->base);
sys/dev/drm/include/drm/drm_connector.h
848
struct drm_mode_object base;
sys/dev/drm/include/drm/drm_crtc.h
1108
#define obj_to_crtc(x) container_of(x, struct drm_crtc, base)
sys/dev/drm/include/drm/drm_crtc.h
883
struct drm_mode_object base;
sys/dev/drm/include/drm/drm_displayid.h
68
struct displayid_block base;
sys/dev/drm/include/drm/drm_displayid.h
90
struct displayid_block base;
sys/dev/drm/include/drm/drm_dp_mst_helper.h
407
#define to_dp_mst_topology_state(x) container_of(x, struct drm_dp_mst_topology_state, base)
sys/dev/drm/include/drm/drm_dp_mst_helper.h
410
struct drm_private_state base;
sys/dev/drm/include/drm/drm_dp_mst_helper.h
416
#define to_dp_mst_topology_mgr(x) container_of(x, struct drm_dp_mst_topology_mgr, base)
sys/dev/drm/include/drm/drm_dp_mst_helper.h
429
struct drm_private_obj base;
sys/dev/drm/include/drm/drm_encoder.h
103
struct drm_mode_object base;
sys/dev/drm/include/drm/drm_encoder.h
180
#define obj_to_encoder(x) container_of(x, struct drm_encoder, base)
sys/dev/drm/include/drm/drm_encoder_slave.h
103
#define to_encoder_slave(x) container_of((x), struct drm_encoder_slave, base)
sys/dev/drm/include/drm/drm_encoder_slave.h
97
struct drm_encoder base;
sys/dev/drm/include/drm/drm_framebuffer.h
124
struct drm_mode_object base;
sys/dev/drm/include/drm/drm_framebuffer.h
209
#define obj_to_fb(x) container_of(x, struct drm_framebuffer, base)
sys/dev/drm/include/drm/drm_framebuffer.h
229
drm_mode_object_get(&fb->base);
sys/dev/drm/include/drm/drm_framebuffer.h
241
drm_mode_object_put(&fb->base);
sys/dev/drm/include/drm/drm_framebuffer.h
276
return kref_read(&fb->base.refcount);
sys/dev/drm/include/drm/drm_gem_cma_helper.h
17
struct drm_gem_object base;
sys/dev/drm/include/drm/drm_gem_cma_helper.h
26
container_of(gem_obj, struct drm_gem_cma_object, base)
sys/dev/drm/include/drm/drm_modes.h
140
.base.type = DRM_MODE_OBJECT_MODE
sys/dev/drm/include/drm/drm_modes.h
228
struct drm_mode_object base;
sys/dev/drm/include/drm/drm_modes.h
439
(m)->base.id, (m)->name, (m)->vrefresh, (m)->clock, \
sys/dev/drm/include/drm/drm_modes.h
444
#define obj_to_mode(x) container_of(x, struct drm_display_mode, base)
sys/dev/drm/include/drm/drm_plane.h
574
struct drm_mode_object base;
sys/dev/drm/include/drm/drm_plane.h
700
#define obj_to_plane(x) container_of(x, struct drm_plane, base)
sys/dev/drm/include/drm/drm_property.h
209
struct drm_mode_object base;
sys/dev/drm/include/drm/drm_property.h
222
#define obj_to_property(x) container_of(x, struct drm_property, base)
sys/dev/drm/include/drm/drm_property.h
223
#define obj_to_blob(x) container_of(x, struct drm_property_blob, base)
sys/dev/drm/include/drm/drm_property.h
82
struct drm_mode_object base;
sys/dev/drm/include/drm/drm_vblank.h
45
struct drm_pending_event base;
sys/dev/drm/include/drm/drm_vblank.h
61
struct drm_event base;
sys/dev/drm/include/drm/drm_writeback.h
20
return container_of(connector, struct drm_writeback_connector, base);
sys/dev/drm/include/drm/drm_writeback.h
9
struct drm_connector base;
sys/dev/drm/include/drm/i915_component.h
41
struct drm_audio_component base;
sys/dev/drm/include/drm/ttm/ttm_bo_api.h
72
phys_addr_t base;
sys/dev/drm/include/linux/dma-fence-array.h
43
struct dma_fence base;
sys/dev/drm/include/linux/dma-fence-array.h
89
return container_of(fence, struct dma_fence_array, base);
sys/dev/drm/include/linux/fb.h
50
resource_size_t base;
sys/dev/drm/include/linux/io-mapping.h
100
resource_size_t base,
sys/dev/drm/include/linux/io-mapping.h
103
iomap->base = base;
sys/dev/drm/include/linux/io-mapping.h
105
iomap->vaddr = ioremap_wc(base, size);
sys/dev/drm/include/linux/io-mapping.h
39
resource_size_t base;
sys/dev/drm/include/linux/io-mapping.h
46
io_mapping_create_wc(resource_size_t base, unsigned long size)
sys/dev/drm/include/linux/io-mapping.h
51
map->base = base;
sys/dev/drm/include/linux/io-mapping.h
55
map->vaddr = pmap_mapdev_attr(base, size,
sys/dev/drm/include/linux/io-mapping.h
66
pmap_mapdev_attr(mapping->base, mapping->size, VM_MEMATTR_WRITE_BACK);
sys/dev/drm/include/linux/io-mapping.h
77
return ioremap_wc(mapping->base + offset, size);
sys/dev/drm/include/linux/io-mapping.h
83
return ioremap_wc(mapping->base + offset, PAGE_SIZE);
sys/dev/drm/include/linux/io.h
36
arch_phys_wc_add(unsigned long base, unsigned long size)
sys/dev/drm/include/linux/kernel.h
155
kstrtouint(const char *s, unsigned int base, unsigned int *res)
sys/dev/drm/include/linux/kernel.h
157
*(res) = strtol(s,0,base);
sys/dev/drm/include/linux/kernel.h
216
kstrtol(const char *cp, unsigned int base, long *res)
sys/dev/drm/include/linux/kernel.h
220
*res = strtol(cp, &end, base);
sys/dev/drm/include/linux/math64.h
36
#define do_div(n, base) ({ \
sys/dev/drm/include/linux/math64.h
37
uint32_t __base = (base); \
sys/dev/drm/include/linux/pci.h
301
resource_size_t base, size;
sys/dev/drm/include/linux/pci.h
303
base = pci_resource_start(dev, bar);
sys/dev/drm/include/linux/pci.h
306
if (base == 0)
sys/dev/drm/include/linux/pci.h
312
return ioremap(base, size);
sys/dev/drm/include/linux/reservation.h
82
#define reservation_object_held(obj) lockdep_is_held(&(obj)->lock.base)
sys/dev/drm/include/linux/reservation.h
84
lockdep_assert_held(&(obj)->lock.base)
sys/dev/drm/include/linux/sort.h
33
sort(void *base, size_t num, size_t size,
sys/dev/drm/include/linux/ww_mutex.h
105
return (lockmgr(&ww->base, LK_EXCLUSIVE|LK_NOWAIT) == 0);
sys/dev/drm/include/linux/ww_mutex.h
61
struct lock base;
sys/dev/drm/include/linux/ww_mutex.h
94
return (lockstatus(&ww->base, NULL) != 0);
sys/dev/drm/include/uapi/drm/drm.h
957
struct drm_event base;
sys/dev/drm/include/uapi/drm/drm.h
969
struct drm_event base;
sys/dev/drm/linux_fence-array.c
102
dma_fence_get(&array->base);
sys/dev/drm/linux_fence-array.c
108
dma_fence_put(&array->base);
sys/dev/drm/linux_fence-array.c
182
dma_fence_init(&array->base, &dma_fence_array_ops, &array->lock,
sys/dev/drm/linux_fence-array.c
190
array->base.error = PENDING_ERROR;
sys/dev/drm/linux_fence-array.c
52
cmpxchg(&array->base.error, PENDING_ERROR, error);
sys/dev/drm/linux_fence-array.c
58
cmpxchg(&array->base.error, PENDING_ERROR, 0);
sys/dev/drm/linux_fence-array.c
67
dma_fence_signal(&array->base);
sys/dev/drm/linux_fence-array.c
68
dma_fence_put(&array->base);
sys/dev/drm/linux_fence-array.c
83
dma_fence_put(&array->base);
sys/dev/drm/linux_fence.c
120
cb.base.func = dma_fence_default_wait_cb;
sys/dev/drm/linux_fence.c
122
list_add(&cb.base.node, &fence->cb_list);
sys/dev/drm/linux_fence.c
145
if (!list_empty(&cb.base.node))
sys/dev/drm/linux_fence.c
146
list_del(&cb.base.node);
sys/dev/drm/linux_fence.c
198
if (dma_fence_add_callback(fence, &cb[i].base,
sys/dev/drm/linux_fence.c
219
dma_fence_remove_callback(fences[i], &cb[i].base);
sys/dev/drm/linux_fence.c
74
struct dma_fence_cb base;
sys/dev/drm/linux_fence.c
82
container_of(cb, struct default_wait_cb, base);
sys/dev/drm/linux_sort.c
32
sort(void *base, size_t num, size_t size,
sys/dev/drm/linux_sort.c
36
kqsort(base, num, size, cmp_func);
sys/dev/drm/linux_wwmutex.c
115
error = lockmgr(&ww->base, flags);
sys/dev/drm/linux_wwmutex.c
200
lockmgr(&ww->base, LK_RELEASE);
sys/dev/drm/linux_wwmutex.c
62
lockinit(&ww->base, ww_class->name, 0, LK_CANRECURSE);
sys/dev/drm/linux_wwmutex.c
71
lockuninit(&ww->base);
sys/dev/drm/linux_wwmutex.c
95
error = lockmgr(&ww->base, flags);
sys/dev/drm/radeon/atom.c
102
static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
sys/dev/drm/radeon/atom.c
109
switch (CU8(base)) {
sys/dev/drm/radeon/atom.c
111
base++;
sys/dev/drm/radeon/atom.c
114
temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
sys/dev/drm/radeon/atom.c
115
base += 3;
sys/dev/drm/radeon/atom.c
1165
int base = CU16(ctx->cmd_table + 4 + 2 * index);
sys/dev/drm/radeon/atom.c
1171
if (!base)
sys/dev/drm/radeon/atom.c
1174
len = CU16(base + ATOM_CT_SIZE_PTR);
sys/dev/drm/radeon/atom.c
1175
ws = CU8(base + ATOM_CT_WS_PTR);
sys/dev/drm/radeon/atom.c
1176
ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
sys/dev/drm/radeon/atom.c
1177
ptr = base + ATOM_CT_CODE_PTR;
sys/dev/drm/radeon/atom.c
1179
ATOM_SDEBUG_PRINT(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
sys/dev/drm/radeon/atom.c
1183
ectx.start = base;
sys/dev/drm/radeon/atom.c
119
(void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
sys/dev/drm/radeon/atom.c
120
ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
sys/dev/drm/radeon/atom.c
1201
base, len, ws, ps, ptr - 1);
sys/dev/drm/radeon/atom.c
121
base += 3;
sys/dev/drm/radeon/atom.c
125
~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
sys/dev/drm/radeon/atom.c
1256
static void atom_index_iio(struct atom_context *ctx, int base)
sys/dev/drm/radeon/atom.c
126
CU8(base + 2));
sys/dev/drm/radeon/atom.c
1261
while (CU8(base) == ATOM_IIO_START) {
sys/dev/drm/radeon/atom.c
1262
ctx->iio[CU8(base + 1)] = base + 2;
sys/dev/drm/radeon/atom.c
1263
base += 2;
sys/dev/drm/radeon/atom.c
1264
while (CU8(base) != ATOM_IIO_END)
sys/dev/drm/radeon/atom.c
1265
base += atom_iio_len[CU8(base)];
sys/dev/drm/radeon/atom.c
1266
base += 3;
sys/dev/drm/radeon/atom.c
127
base += 3;
sys/dev/drm/radeon/atom.c
1272
int base;
sys/dev/drm/radeon/atom.c
1298
base = CU16(ATOM_ROM_TABLE_PTR);
sys/dev/drm/radeon/atom.c
1300
(CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
sys/dev/drm/radeon/atom.c
1307
ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
sys/dev/drm/radeon/atom.c
1308
ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
sys/dev/drm/radeon/atom.c
131
(0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
sys/dev/drm/radeon/atom.c
1315
str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
sys/dev/drm/radeon/atom.c
133
base += 3;
sys/dev/drm/radeon/atom.c
137
~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
sys/dev/drm/radeon/atom.c
138
CU8(base + 3));
sys/dev/drm/radeon/atom.c
140
((index >> CU8(base + 2)) &
sys/dev/drm/radeon/atom.c
141
(0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
sys/dev/drm/radeon/atom.c
143
base += 4;
sys/dev/drm/radeon/atom.c
147
~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
sys/dev/drm/radeon/atom.c
148
CU8(base + 3));
sys/dev/drm/radeon/atom.c
150
((data >> CU8(base + 2)) &
sys/dev/drm/radeon/atom.c
151
(0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
sys/dev/drm/radeon/atom.c
153
base += 4;
sys/dev/drm/radeon/atom.c
157
~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
sys/dev/drm/radeon/atom.c
158
CU8(base + 3));
sys/dev/drm/radeon/atom.c
161
io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
sys/dev/drm/radeon/atom.c
163
(base
sys/dev/drm/radeon/atom.c
166
<< CU8(base + 3);
sys/dev/drm/radeon/atom.c
167
base += 4;
sys/dev/drm/radeon/atombios_crtc.c
2247
drm_crtc_helper_add(&radeon_crtc->base, &atombios_helper_funcs);
sys/dev/drm/radeon/atombios_crtc.c
760
SET_PIXEL_CLOCK_PS_ALLOCATION base;
sys/dev/drm/radeon/atombios_dp.c
103
base = (unsigned char *)(rdev->mode_info.atom_context->scratch + 1);
sys/dev/drm/radeon/atombios_dp.c
105
radeon_atom_copy_swap(base, send, send_bytes, true);
sys/dev/drm/radeon/atombios_dp.c
145
radeon_atom_copy_swap(recv, base + 16, recv_bytes, false);
sys/dev/drm/radeon/atombios_dp.c
229
struct drm_device *dev = radeon_connector->base.dev;
sys/dev/drm/radeon/atombios_dp.c
234
radeon_connector->ddc_bus->aux.dev = radeon_connector->base.kdev;
sys/dev/drm/radeon/atombios_dp.c
362
struct drm_device *dev = radeon_connector->base.dev;
sys/dev/drm/radeon/atombios_dp.c
94
unsigned char *base;
sys/dev/drm/radeon/atombios_encoders.c
1445
struct drm_device *dev = radeon_connector->base.dev;
sys/dev/drm/radeon/atombios_encoders.c
169
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/atombios_encoders.c
223
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/atombios_encoders.c
2745
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/atombios_encoders.c
2802
encoder = &radeon_encoder->base;
sys/dev/drm/radeon/atombios_encoders.c
314
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/atombios_encoders.c
77
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/atombios_encoders.c
89
struct drm_encoder *encoder = &radeon_encoder->base;
sys/dev/drm/radeon/atombios_encoders.c
90
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/atombios_i2c.c
44
unsigned char *base;
sys/dev/drm/radeon/atombios_i2c.c
53
base = (unsigned char *)rdev->mode_info.atom_context->scratch;
sys/dev/drm/radeon/atombios_i2c.c
96
radeon_atom_copy_swap(buf, base, num, false);
sys/dev/drm/radeon/cik.c
8848
if (radeon_crtc->base.enabled && mode) {
sys/dev/drm/radeon/cik.c
8880
if (radeon_crtc->base.enabled && mode) {
sys/dev/drm/radeon/cik.c
9267
struct drm_display_mode *mode = &radeon_crtc->base.mode;
sys/dev/drm/radeon/cik.c
9274
if (radeon_crtc->base.enabled && num_heads && mode) {
sys/dev/drm/radeon/cik.c
9411
if (rdev->mode_info.crtcs[i]->base.enabled)
sys/dev/drm/radeon/cik.c
9415
mode = &rdev->mode_info.crtcs[i]->base.mode;
sys/dev/drm/radeon/evergreen.c
1833
if (radeon_crtc->base.enabled && mode) {
sys/dev/drm/radeon/evergreen.c
1862
if (radeon_crtc->base.enabled && mode) {
sys/dev/drm/radeon/evergreen.c
2138
struct drm_display_mode *mode = &radeon_crtc->base.mode;
sys/dev/drm/radeon/evergreen.c
2151
if (radeon_crtc->base.enabled && num_heads && mode) {
sys/dev/drm/radeon/evergreen.c
2316
if (rdev->mode_info.crtcs[i]->base.enabled)
sys/dev/drm/radeon/evergreen.c
2320
mode0 = &rdev->mode_info.crtcs[i]->base.mode;
sys/dev/drm/radeon/evergreen.c
2321
mode1 = &rdev->mode_info.crtcs[i+1]->base.mode;
sys/dev/drm/radeon/r100.c
2839
u64 base;
sys/dev/drm/radeon/r100.c
2843
base = rdev->mc.aper_base;
sys/dev/drm/radeon/r100.c
2845
base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
sys/dev/drm/radeon/r100.c
2846
radeon_vram_location(rdev, &rdev->mc, base);
sys/dev/drm/radeon/r100.c
3237
if (rdev->mode_info.crtcs[0]->base.enabled) {
sys/dev/drm/radeon/r100.c
3239
rdev->mode_info.crtcs[0]->base.primary->fb;
sys/dev/drm/radeon/r100.c
3241
mode1 = &rdev->mode_info.crtcs[0]->base.mode;
sys/dev/drm/radeon/r100.c
3245
if (rdev->mode_info.crtcs[1]->base.enabled) {
sys/dev/drm/radeon/r100.c
3247
rdev->mode_info.crtcs[1]->base.primary->fb;
sys/dev/drm/radeon/r100.c
3249
mode2 = &rdev->mode_info.crtcs[1]->base.mode;
sys/dev/drm/radeon/r300.c
468
u64 base;
sys/dev/drm/radeon/r300.c
482
base = rdev->mc.aper_base;
sys/dev/drm/radeon/r300.c
484
base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
sys/dev/drm/radeon/r300.c
485
radeon_vram_location(rdev, &rdev->mc, base);
sys/dev/drm/radeon/r600.c
1413
u64 base = 0;
sys/dev/drm/radeon/r600.c
1415
base = RREG32(MC_VM_FB_LOCATION) & 0xFFFF;
sys/dev/drm/radeon/r600.c
1416
base <<= 24;
sys/dev/drm/radeon/r600.c
1418
radeon_vram_location(rdev, &rdev->mc, base);
sys/dev/drm/radeon/radeon.h
2521
struct radeon_fence *__f = container_of(f, struct radeon_fence, base);
sys/dev/drm/radeon/radeon.h
2523
if (__f->base.ops == &radeon_fence_ops)
sys/dev/drm/radeon/radeon.h
2786
#define radeon_page_flip(rdev, crtc, base, async) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base), (async))
sys/dev/drm/radeon/radeon.h
2838
extern void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base);
sys/dev/drm/radeon/radeon.h
376
struct dma_fence base;
sys/dev/drm/radeon/radeon.h
730
resource_size_t base;
sys/dev/drm/radeon/radeon.h
750
uint64_t base;
sys/dev/drm/radeon/radeon_atombios.c
1332
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_atombios.c
1621
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_atombios.c
1761
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_atombios.c
1947
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_combios.c
1009
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_combios.c
1168
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_combios.c
1313
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_combios.c
1329
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_combios.c
1382
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_combios.c
1406
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_combios.c
858
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_connectors.c
1306
radeon_connector->base.null_edid_counter) {
sys/dev/drm/radeon/radeon_connectors.c
1940
connector = &radeon_connector->base;
sys/dev/drm/radeon/radeon_connectors.c
1972
drm_connector_init(dev, &radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
1974
drm_connector_helper_add(&radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
1979
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
1982
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
1986
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
1995
drm_connector_init(dev, &radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
1997
drm_connector_helper_add(&radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
1999
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2002
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2005
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2009
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2013
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2018
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2024
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2036
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2043
drm_connector_init(dev, &radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
2045
drm_connector_helper_add(&radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
2047
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2058
drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2059
drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2066
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2070
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2074
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2083
drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2084
drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2091
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2095
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2099
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2114
drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2115
drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2122
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2126
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2129
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2132
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2135
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2138
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2143
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2150
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2155
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2171
drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2172
drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2178
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2182
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2185
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2188
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2191
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2194
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2199
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2205
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2221
drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2222
drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2231
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2235
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2238
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2241
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2244
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2247
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2252
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2258
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2271
drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2272
drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2280
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2290
drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2291
drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2293
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2296
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2310
drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2311
drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2317
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2385
connector = &radeon_connector->base;
sys/dev/drm/radeon/radeon_connectors.c
2394
drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2395
drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2402
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2411
drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2412
drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2419
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2429
drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2430
drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2438
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2452
drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2453
drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2462
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2465
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
2474
drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
sys/dev/drm/radeon/radeon_connectors.c
2475
drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
sys/dev/drm/radeon/radeon_connectors.c
2481
drm_object_attach_property(&radeon_connector->base.base,
sys/dev/drm/radeon/radeon_connectors.c
321
radeon_connector->edid = drm_get_edid(&radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
324
radeon_connector->edid = drm_get_edid(&radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
329
radeon_connector->edid = drm_get_edid_switcheroo(&radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
332
radeon_connector->edid = drm_get_edid(&radeon_connector->base,
sys/dev/drm/radeon/radeon_connectors.c
580
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
595
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
610
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
624
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
638
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
652
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
677
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
713
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
742
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_connectors.c
977
radeon_property_change_mode(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_cs.c
429
&parser->ib.fence->base);
sys/dev/drm/radeon/radeon_device.c
333
rdev->doorbell.base = pci_resource_start(rdev->pdev, 2);
sys/dev/drm/radeon/radeon_device.c
340
rdev->doorbell.ptr = ioremap(rdev->doorbell.base, rdev->doorbell.num_doorbells * sizeof(u32));
sys/dev/drm/radeon/radeon_device.c
344
DRM_INFO("doorbell mmio base: 0x%08X\n", (uint32_t)rdev->doorbell.base);
sys/dev/drm/radeon/radeon_device.c
561
void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base)
sys/dev/drm/radeon/radeon_device.c
565
mc->vram_start = base;
sys/dev/drm/radeon/radeon_device.c
566
if (mc->mc_vram_size > (rdev->mc.mc_mask - base + 1)) {
sys/dev/drm/radeon/radeon_display.c
336
&rdev->mode_info.crtcs[crtc_id]->base.hwmode)) &&
sys/dev/drm/radeon/radeon_display.c
386
drm_crtc_send_vblank_event(&radeon_crtc->base, work->event);
sys/dev/drm/radeon/radeon_display.c
390
drm_crtc_vblank_put(&radeon_crtc->base);
sys/dev/drm/radeon/radeon_display.c
410
struct drm_crtc *crtc = &radeon_crtc->base;
sys/dev/drm/radeon/radeon_display.c
467
radeon_page_flip(rdev, radeon_crtc->crtc_id, work->base, work->async);
sys/dev/drm/radeon/radeon_display.c
488
uint64_t base;
sys/dev/drm/radeon/radeon_display.c
525
ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, (u64 *)&base);
sys/dev/drm/radeon/radeon_display.c
538
base -= radeon_crtc->legacy_display_base_addr;
sys/dev/drm/radeon/radeon_display.c
543
base &= ~0x7ff;
sys/dev/drm/radeon/radeon_display.c
547
base += tile_addr + ((crtc->x << byteshift) % 256) + ((crtc->y % 8) << 8);
sys/dev/drm/radeon/radeon_display.c
567
base += offset;
sys/dev/drm/radeon/radeon_display.c
569
base &= ~7;
sys/dev/drm/radeon/radeon_display.c
571
work->base = base;
sys/dev/drm/radeon/radeon_display.c
679
drm_crtc_init(dev, &radeon_crtc->base, &radeon_crtc_funcs);
sys/dev/drm/radeon/radeon_display.c
681
drm_mode_crtc_set_gamma_size(&radeon_crtc->base, 256);
sys/dev/drm/radeon/radeon_display.c
697
radeon_crtc->mode_set.crtc = &radeon_crtc->base;
sys/dev/drm/radeon/radeon_dp_mst.c
113
struct drm_device *dev = mst_conn->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
163
struct drm_device *dev = mst->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
197
drm_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
sys/dev/drm/radeon/radeon_dp_mst.c
198
ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
sys/dev/drm/radeon/radeon_dp_mst.c
201
drm_connector_update_edid_property(&radeon_connector->base, NULL);
sys/dev/drm/radeon/radeon_dp_mst.c
230
return &radeon_connector->mst_encoder->base;
sys/dev/drm/radeon/radeon_dp_mst.c
254
drm_encoder_cleanup(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_dp_mst.c
272
struct drm_device *dev = master->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
281
connector = &radeon_connector->base;
sys/dev/drm/radeon/radeon_dp_mst.c
29
struct drm_device *dev = primary->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
290
drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
sys/dev/drm/radeon/radeon_dp_mst.c
291
drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
sys/dev/drm/radeon/radeon_dp_mst.c
311
struct drm_device *dev = master->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
325
struct drm_device *dev = master->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
364
struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base);
sys/dev/drm/radeon/radeon_dp_mst.c
370
if (radeon_connector->base.display_info.bpc)
sys/dev/drm/radeon/radeon_dp_mst.c
371
radeon_crtc->bpc = radeon_connector->base.display_info.bpc;
sys/dev/drm/radeon/radeon_dp_mst.c
428
atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0);
sys/dev/drm/radeon/radeon_dp_mst.c
429
atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE,
sys/dev/drm/radeon/radeon_dp_mst.c
434
radeon_dp_link_train(&primary->base, &mst_enc->connector->base);
sys/dev/drm/radeon/radeon_dp_mst.c
466
atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0,
sys/dev/drm/radeon/radeon_dp_mst.c
495
atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0,
sys/dev/drm/radeon/radeon_dp_mst.c
528
mst_enc->connector->devices, mst_enc->primary->base.encoder_type);
sys/dev/drm/radeon/radeon_dp_mst.c
565
dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1);
sys/dev/drm/radeon/radeon_dp_mst.c
609
struct drm_device *dev = connector->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
614
const struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private;
sys/dev/drm/radeon/radeon_dp_mst.c
615
struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base);
sys/dev/drm/radeon/radeon_dp_mst.c
627
encoder = &radeon_encoder->base;
sys/dev/drm/radeon/radeon_dp_mst.c
644
drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
sys/dev/drm/radeon/radeon_dp_mst.c
658
struct drm_device *dev = radeon_connector->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
666
radeon_connector->base.base.id);
sys/dev/drm/radeon/radeon_dp_mst.c
67
struct drm_device *dev = primary->base.dev;
sys/dev/drm/radeon/radeon_dp_mst.c
673
struct drm_device *dev = radeon_connector->base.dev;
sys/dev/drm/radeon/radeon_drv.c
369
ap->ranges[0].base = pci_resource_start(pdev, 0);
sys/dev/drm/radeon/radeon_encoders.c
157
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_fb.c
303
info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
sys/dev/drm/radeon/radeon_fence.c
1055
return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->base.flags);
sys/dev/drm/radeon/radeon_fence.c
1059
struct dma_fence_cb base;
sys/dev/drm/radeon/radeon_fence.c
1067
container_of(cb, struct radeon_wait_cb, base);
sys/dev/drm/radeon/radeon_fence.c
1081
if (dma_fence_add_callback(f, &cb.base, radeon_fence_wait_cb))
sys/dev/drm/radeon/radeon_fence.c
1109
dma_fence_remove_callback(f, &cb.base);
sys/dev/drm/radeon/radeon_fence.c
143
dma_fence_init(&(*fence)->base, &radeon_fence_ops,
sys/dev/drm/radeon/radeon_fence.c
173
int ret = dma_fence_signal_locked(&fence->base);
sys/dev/drm/radeon/radeon_fence.c
176
DMA_FENCE_TRACE(&fence->base, "signaled from irq context\n");
sys/dev/drm/radeon/radeon_fence.c
178
DMA_FENCE_TRACE(&fence->base, "was already signaled\n");
sys/dev/drm/radeon/radeon_fence.c
182
dma_fence_put(&fence->base);
sys/dev/drm/radeon/radeon_fence.c
184
DMA_FENCE_TRACE(&fence->base, "pending\n");
sys/dev/drm/radeon/radeon_fence.c
420
DMA_FENCE_TRACE(&fence->base, "armed on ring %i!\n", fence->ring);
sys/dev/drm/radeon/radeon_fence.c
440
ret = dma_fence_signal(&fence->base);
sys/dev/drm/radeon/radeon_fence.c
442
DMA_FENCE_TRACE(&fence->base, "signaled from radeon_fence_signaled\n");
sys/dev/drm/radeon/radeon_fence.c
555
if (WARN_ON_ONCE(!to_radeon_fence(&fence->base)))
sys/dev/drm/radeon/radeon_fence.c
556
return dma_fence_wait(&fence->base, intr);
sys/dev/drm/radeon/radeon_fence.c
564
r_sig = dma_fence_signal(&fence->base);
sys/dev/drm/radeon/radeon_fence.c
566
DMA_FENCE_TRACE(&fence->base, "signaled from fence_wait\n");
sys/dev/drm/radeon/radeon_fence.c
701
dma_fence_get(&fence->base);
sys/dev/drm/radeon/radeon_fence.c
718
dma_fence_put(&tmp->base);
sys/dev/drm/radeon/radeon_kms.c
260
if (crtc && crtc->base.id == *value) {
sys/dev/drm/radeon/radeon_kms.c
794
&rdev->mode_info.crtcs[pipe]->base.hwmode);
sys/dev/drm/radeon/radeon_legacy_crtc.c
1120
drm_crtc_helper_add(&radeon_crtc->base, &legacy_helper_funcs);
sys/dev/drm/radeon/radeon_legacy_crtc.c
380
uint64_t base;
sys/dev/drm/radeon/radeon_legacy_crtc.c
429
(u64 *)&base);
sys/dev/drm/radeon/radeon_legacy_crtc.c
470
base -= radeon_crtc->legacy_display_base_addr;
sys/dev/drm/radeon/radeon_legacy_crtc.c
499
base &= ~0x7ff;
sys/dev/drm/radeon/radeon_legacy_crtc.c
503
base += tile_addr + ((x << byteshift) % 256) + ((y % 8) << 8);
sys/dev/drm/radeon/radeon_legacy_crtc.c
525
base += offset;
sys/dev/drm/radeon/radeon_legacy_crtc.c
528
base &= ~7;
sys/dev/drm/radeon/radeon_legacy_crtc.c
541
crtc_offset = (u32)base;
sys/dev/drm/radeon/radeon_legacy_encoders.c
1700
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_encoders.c
1723
struct drm_device *dev = encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_encoders.c
1766
encoder = &radeon_encoder->base;
sys/dev/drm/radeon/radeon_legacy_encoders.c
273
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_encoders.c
286
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_encoders.c
308
radeon_legacy_lvds_update(&radeon_encoder->base, dpms_mode);
sys/dev/drm/radeon/radeon_legacy_encoders.c
348
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_encoders.c
368
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_encoders.c
459
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_tv.c
237
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_tv.c
244
radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc);
sys/dev/drm/radeon/radeon_legacy_tv.c
301
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_tv.c
323
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_tv.c
386
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_tv.c
413
struct drm_device *dev = radeon_encoder->base.dev;
sys/dev/drm/radeon/radeon_legacy_tv.c
436
radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc);
sys/dev/drm/radeon/radeon_mode.h
328
struct drm_crtc base;
sys/dev/drm/radeon/radeon_mode.h
46
#define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
sys/dev/drm/radeon/radeon_mode.h
463
struct drm_encoder base;
sys/dev/drm/radeon/radeon_mode.h
47
#define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
sys/dev/drm/radeon/radeon_mode.h
48
#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
sys/dev/drm/radeon/radeon_mode.h
545
struct drm_connector base;
sys/dev/drm/radeon/radeon_object.c
609
lockdep_assert_held(&bo->tbo.resv->lock.base);
sys/dev/drm/radeon/radeon_object.c
735
lockdep_assert_held(&bo->tbo.resv->lock.base);
sys/dev/drm/radeon/radeon_object.c
747
lockdep_assert_held(&bo->tbo.resv->lock.base);
sys/dev/drm/radeon/radeon_object.c
872
reservation_object_add_shared_fence(resv, &fence->base);
sys/dev/drm/radeon/radeon_object.c
874
reservation_object_add_excl_fence(resv, &fence->base);
sys/dev/drm/radeon/radeon_pm.c
1877
&rdev->mode_info.crtcs[crtc]->base.hwmode);
sys/dev/drm/radeon/radeon_ttm.c
306
r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, new_mem);
sys/dev/drm/radeon/radeon_ttm.c
469
mem->bus.base = 0;
sys/dev/drm/radeon/radeon_ttm.c
482
mem->bus.base = rdev->mc.agp_base;
sys/dev/drm/radeon/radeon_ttm.c
492
mem->bus.base = rdev->mc.aper_base;
sys/dev/drm/radeon/radeon_ttm.c
501
ioremap_wc(mem->bus.base + mem->bus.offset,
sys/dev/drm/radeon/radeon_ttm.c
505
ioremap_nocache(mem->bus.base + mem->bus.offset,
sys/dev/drm/radeon/radeon_ttm.c
516
mem->bus.base = (mem->bus.base & 0x0ffffffffUL) +
sys/dev/drm/radeon/rs400.c
263
u64 base;
sys/dev/drm/radeon/rs400.c
271
base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
sys/dev/drm/radeon/rs400.c
272
radeon_vram_location(rdev, &rdev->mc, base);
sys/dev/drm/radeon/rs600.c
869
u64 base;
sys/dev/drm/radeon/rs600.c
879
base = RREG32_MC(R_000004_MC_FB_LOCATION);
sys/dev/drm/radeon/rs600.c
880
base = G_000004_MC_FB_START(base) << 16;
sys/dev/drm/radeon/rs600.c
881
radeon_vram_location(rdev, &rdev->mc, base);
sys/dev/drm/radeon/rs600.c
899
if (rdev->mode_info.crtcs[0]->base.enabled)
sys/dev/drm/radeon/rs600.c
900
mode0 = &rdev->mode_info.crtcs[0]->base.mode;
sys/dev/drm/radeon/rs600.c
901
if (rdev->mode_info.crtcs[1]->base.enabled)
sys/dev/drm/radeon/rs600.c
902
mode1 = &rdev->mode_info.crtcs[1]->base.mode;
sys/dev/drm/radeon/rs690.c
150
u64 base;
sys/dev/drm/radeon/rs690.c
162
base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
sys/dev/drm/radeon/rs690.c
163
base = G_000100_MC_FB_START(base) << 16;
sys/dev/drm/radeon/rs690.c
171
base += 128 * 1024 * 1024;
sys/dev/drm/radeon/rs690.c
197
radeon_vram_location(rdev, &rdev->mc, base);
sys/dev/drm/radeon/rs690.c
275
struct drm_display_mode *mode = &crtc->base.mode;
sys/dev/drm/radeon/rs690.c
283
if (!crtc->base.enabled) {
sys/dev/drm/radeon/rs690.c
350
a.full = dfixed_const(crtc->base.mode.crtc_htotal);
sys/dev/drm/radeon/rs690.c
358
a.full = dfixed_const(crtc->base.mode.crtc_htotal);
sys/dev/drm/radeon/rs690.c
359
b.full = dfixed_const(crtc->base.mode.crtc_hdisplay);
sys/dev/drm/radeon/rs690.c
442
wm->priority_mark_max.full = dfixed_const(crtc->base.mode.crtc_hdisplay);
sys/dev/drm/radeon/rs690.c
449
if (dfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {
sys/dev/drm/radeon/rs690.c
598
if (rdev->mode_info.crtcs[0]->base.enabled)
sys/dev/drm/radeon/rs690.c
599
mode0 = &rdev->mode_info.crtcs[0]->base.mode;
sys/dev/drm/radeon/rs690.c
600
if (rdev->mode_info.crtcs[1]->base.enabled)
sys/dev/drm/radeon/rs690.c
601
mode1 = &rdev->mode_info.crtcs[1]->base.mode;
sys/dev/drm/radeon/rv515.c
1025
a.full = dfixed_const(crtc->base.mode.crtc_htotal);
sys/dev/drm/radeon/rv515.c
1033
a.full = dfixed_const(crtc->base.mode.crtc_htotal);
sys/dev/drm/radeon/rv515.c
1034
b.full = dfixed_const(crtc->base.mode.crtc_hdisplay);
sys/dev/drm/radeon/rv515.c
1088
wm->priority_mark_max.full = dfixed_const(crtc->base.mode.crtc_hdisplay);
sys/dev/drm/radeon/rv515.c
1095
if (dfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {
sys/dev/drm/radeon/rv515.c
1239
if (rdev->mode_info.crtcs[0]->base.enabled)
sys/dev/drm/radeon/rv515.c
1240
mode0 = &rdev->mode_info.crtcs[0]->base.mode;
sys/dev/drm/radeon/rv515.c
1241
if (rdev->mode_info.crtcs[1]->base.enabled)
sys/dev/drm/radeon/rv515.c
1242
mode1 = &rdev->mode_info.crtcs[1]->base.mode;
sys/dev/drm/radeon/rv515.c
1281
if (rdev->mode_info.crtcs[0]->base.enabled)
sys/dev/drm/radeon/rv515.c
1282
mode0 = &rdev->mode_info.crtcs[0]->base.mode;
sys/dev/drm/radeon/rv515.c
1283
if (rdev->mode_info.crtcs[1]->base.enabled)
sys/dev/drm/radeon/rv515.c
1284
mode1 = &rdev->mode_info.crtcs[1]->base.mode;
sys/dev/drm/radeon/rv515.c
954
struct drm_display_mode *mode = &crtc->base.mode;
sys/dev/drm/radeon/rv515.c
961
if (!crtc->base.enabled) {
sys/dev/drm/radeon/si.c
1977
if (radeon_crtc->base.enabled && mode) {
sys/dev/drm/radeon/si.c
2002
if (radeon_crtc->base.enabled && mode) {
sys/dev/drm/radeon/si.c
2288
struct drm_display_mode *mode = &radeon_crtc->base.mode;
sys/dev/drm/radeon/si.c
2300
if (radeon_crtc->base.enabled && num_heads && mode) {
sys/dev/drm/radeon/si.c
2463
if (rdev->mode_info.crtcs[i]->base.enabled)
sys/dev/drm/radeon/si.c
2467
mode0 = &rdev->mode_info.crtcs[i]->base.mode;
sys/dev/drm/radeon/si.c
2468
mode1 = &rdev->mode_info.crtcs[i+1]->base.mode;
sys/dev/drm/ttm/ttm_bo_util.c
222
addr = ioremap_wc(mem->bus.base + mem->bus.offset, mem->bus.size);
sys/dev/drm/ttm/ttm_bo_util.c
224
addr = ioremap_nocache(mem->bus.base + mem->bus.offset, mem->bus.size);
sys/dev/drm/ttm/ttm_bo_util.c
43
struct ttm_buffer_object base;
sys/dev/drm/ttm/ttm_bo_util.c
445
fbo = container_of(bo, struct ttm_transfer_obj, base);
sys/dev/drm/ttm/ttm_bo_util.c
475
fbo->base = *bo;
sys/dev/drm/ttm/ttm_bo_util.c
476
fbo->base.mem.placement |= TTM_PL_FLAG_NO_EVICT;
sys/dev/drm/ttm/ttm_bo_util.c
487
INIT_LIST_HEAD(&fbo->base.ddestroy);
sys/dev/drm/ttm/ttm_bo_util.c
488
INIT_LIST_HEAD(&fbo->base.lru);
sys/dev/drm/ttm/ttm_bo_util.c
489
INIT_LIST_HEAD(&fbo->base.swap);
sys/dev/drm/ttm/ttm_bo_util.c
490
INIT_LIST_HEAD(&fbo->base.io_reserve_lru);
sys/dev/drm/ttm/ttm_bo_util.c
491
lockinit(&fbo->base.wu_mutex, "dtfbwm", 0, LK_CANRECURSE);
sys/dev/drm/ttm/ttm_bo_util.c
492
fbo->base.moving = NULL;
sys/dev/drm/ttm/ttm_bo_util.c
493
drm_vma_node_reset(&fbo->base.vma_node);
sys/dev/drm/ttm/ttm_bo_util.c
494
atomic_set(&fbo->base.cpu_writers, 0);
sys/dev/drm/ttm/ttm_bo_util.c
496
kref_init(&fbo->base.list_kref);
sys/dev/drm/ttm/ttm_bo_util.c
497
kref_init(&fbo->base.kref);
sys/dev/drm/ttm/ttm_bo_util.c
498
fbo->base.destroy = &ttm_transfered_destroy;
sys/dev/drm/ttm/ttm_bo_util.c
499
fbo->base.acc_size = 0;
sys/dev/drm/ttm/ttm_bo_util.c
500
fbo->base.resv = &fbo->base.ttm_resv;
sys/dev/drm/ttm/ttm_bo_util.c
501
reservation_object_init(fbo->base.resv);
sys/dev/drm/ttm/ttm_bo_util.c
502
ret = ww_mutex_trylock(&fbo->base.resv->lock);
sys/dev/drm/ttm/ttm_bo_util.c
505
*new_obj = &fbo->base;
sys/dev/drm/ttm/ttm_bo_util.c
548
map->virtual = ioremap_wc(bo->mem.bus.base + bo->mem.bus.offset + offset,
sys/dev/drm/ttm/ttm_bo_util.c
551
map->virtual = ioremap_nocache(bo->mem.bus.base + bo->mem.bus.offset + offset,
sys/dev/drm/ttm/ttm_bo_vm.c
667
m = vm_phys_fictitious_to_vm_page(bo->mem.bus.base +
sys/dev/misc/syscons/scvgarndr.c
194
vga_txtcursor_shape(scr_stat *scp, int base, int height, int blink)
sys/dev/misc/syscons/scvgarndr.c
196
if (base < 0 || base >= scp->font_height)
sys/dev/misc/syscons/scvgarndr.c
201
scp->cursor_base = base;
sys/dev/misc/syscons/scvgarndr.c
205
base, height,
sys/dev/misc/syscons/scvgarndr.c
766
vga_pxlcursor_shape(scr_stat *scp, int base, int height, int blink)
sys/dev/misc/syscons/scvgarndr.c
768
if (base < 0 || base >= scp->font_height)
sys/dev/misc/syscons/scvgarndr.c
772
scp->cursor_base = base;
sys/dev/misc/syscons/syscons.c
4268
int base, int count)
sys/dev/misc/syscons/syscons.c
4274
(*vidsw[sc->adapter]->load_font)(sc->adp, page, size, buf, base, count);
sys/dev/misc/syscons/syscons.c
4280
int base, int count)
sys/dev/misc/syscons/syscons.c
4286
(*vidsw[sc->adapter]->save_font)(sc->adp, page, size, buf, base, count);
sys/dev/misc/syscons/syscons.h
423
typedef void vr_set_cursor_t(scr_stat *scp, int base, int height, int blink);
sys/dev/misc/syscons/syscons.h
522
int base, int count);
sys/dev/misc/syscons/syscons.h
524
int base, int count);
sys/dev/netif/alc/if_alc.c
1345
int base, error;
sys/dev/netif/alc/if_alc.c
1445
if (pci_find_extcap(dev, PCIY_EXPRESS, &base) == 0) {
sys/dev/netif/alc/if_alc.c
1447
sc->alc_expcap = base;
sys/dev/netif/alc/if_alc.c
1448
burst = CSR_READ_2(sc, base + PCIER_DEVICE_CTL);
sys/dev/netif/alc/if_alc.c
1514
sc->alc_pmcap = base;
sys/dev/netif/ath/ath_hal/ah_internal.h
158
HAL_NFCAL_BASE base;
sys/dev/netif/ath/ath_hal/ah_internal.h
163
HAL_NFCAL_BASE base;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
40
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
740
priv->base.rfDetach = ar2316RfDetach;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
741
priv->base.writeRegs = ar2316WriteRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
742
priv->base.getRfBank = ar2316GetRfBank;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
743
priv->base.setChannel = ar2316SetChannel;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
744
priv->base.setRfRegs = ar2316SetRfRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
745
priv->base.setPowerTable = ar2316SetPowerTable;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
746
priv->base.getChannelMaxMinPower = ar2316GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
747
priv->base.getNfAdjust = ar5212GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
751
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
40
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
720
priv->base.rfDetach = ar2317RfDetach;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
721
priv->base.writeRegs = ar2317WriteRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
722
priv->base.getRfBank = ar2317GetRfBank;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
723
priv->base.setChannel = ar2317SetChannel;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
724
priv->base.setRfRegs = ar2317SetRfRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
725
priv->base.setPowerTable = ar2317SetPowerTable;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
726
priv->base.getChannelMaxMinPower = ar2317GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
727
priv->base.getNfAdjust = ar5212GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
731
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
36
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
738
priv->base.rfDetach = ar2413RfDetach;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
739
priv->base.writeRegs = ar2413WriteRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
740
priv->base.getRfBank = ar2413GetRfBank;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
741
priv->base.setChannel = ar2413SetChannel;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
742
priv->base.setRfRegs = ar2413SetRfRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
743
priv->base.setPowerTable = ar2413SetPowerTable;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
744
priv->base.getChannelMaxMinPower = ar2413GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
745
priv->base.getNfAdjust = ar5212GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
749
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
37
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
701
priv->base.rfDetach = ar2425RfDetach;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
702
priv->base.writeRegs = ar2425WriteRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
703
priv->base.getRfBank = ar2425GetRfBank;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
704
priv->base.setChannel = ar2425SetChannel;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
705
priv->base.setRfRegs = ar2425SetRfRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
706
priv->base.setPowerTable = ar2425SetPowerTable;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
707
priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
708
priv->base.getNfAdjust = ar5212GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
712
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
36
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
699
priv->base.rfDetach = ar5111RfDetach;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
700
priv->base.writeRegs = ar5111WriteRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
701
priv->base.getRfBank = ar5111GetRfBank;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
702
priv->base.setChannel = ar5111SetChannel;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
703
priv->base.setRfRegs = ar5111SetRfRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
704
priv->base.setPowerTable = ar5111SetPowerTable;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
705
priv->base.getChannelMaxMinPower = ar5111GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
706
priv->base.getNfAdjust = ar5111GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar5212/ar5111.c
710
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
36
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
868
priv->base.rfDetach = ar5112RfDetach;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
869
priv->base.writeRegs = ar5112WriteRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
870
priv->base.getRfBank = ar5112GetRfBank;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
871
priv->base.setChannel = ar5112SetChannel;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
872
priv->base.setRfRegs = ar5112SetRfRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
873
priv->base.setPowerTable = ar5112SetPowerTable;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
874
priv->base.getChannelMaxMinPower = ar5112GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
875
priv->base.getNfAdjust = ar5212GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar5212/ar5112.c
879
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
36
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
784
priv->base.rfDetach = ar5413RfDetach;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
785
priv->base.writeRegs = ar5413WriteRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
786
priv->base.getRfBank = ar5413GetRfBank;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
787
priv->base.setChannel = ar5413SetChannel;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
788
priv->base.setRfRegs = ar5413SetRfRegs;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
789
priv->base.setPowerTable = ar5413SetPowerTable;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
790
priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
791
priv->base.getNfAdjust = ar5212GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
795
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
33
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
551
priv->base.rfDetach = ar2133RfDetach;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
552
priv->base.writeRegs = ar2133WriteRegs;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
553
priv->base.getRfBank = ar2133GetRfBank;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
554
priv->base.setChannel = ar2133SetChannel;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
555
priv->base.setRfRegs = ar2133SetRfRegs;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
556
priv->base.setPowerTable = ar2133SetPowerTable;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
557
priv->base.getChannelMaxMinPower = ar2133GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
558
priv->base.getNfAdjust = ar2133GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
570
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar5416/ar2133.c
575
AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
36
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
430
priv->base.rfDetach = ar9280RfDetach;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
431
priv->base.writeRegs = ar9280WriteRegs;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
432
priv->base.getRfBank = ar9280GetRfBank;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
433
priv->base.setChannel = ar9280SetChannel;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
434
priv->base.setRfRegs = ar9280SetRfRegs;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
435
priv->base.setPowerTable = ar9280SetPowerTable;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
436
priv->base.getChannelMaxMinPower = ar9280GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
437
priv->base.getNfAdjust = ar9280GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
441
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar9002/ar9280.c
446
AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
36
RF_HAL_FUNCS base; /* public state, must be first */
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
372
priv->base.rfDetach = ar9287RfDetach;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
373
priv->base.writeRegs = ar9287WriteRegs;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
374
priv->base.getRfBank = ar9287GetRfBank;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
375
priv->base.setChannel = ar9287SetChannel;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
376
priv->base.setRfRegs = ar9287SetRfRegs;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
377
priv->base.setPowerTable = ar9287SetPowerTable;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
378
priv->base.getChannelMaxMinPower = ar9287GetChannelMaxMinPower;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
379
priv->base.getNfAdjust = ar9287GetNfAdjust;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
383
ahp->ah_rfHal = &priv->base;
sys/dev/netif/ath/ath_hal/ar9002/ar9287.c
388
AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
sys/dev/netif/bce/if_bce.c
3751
uint32_t base;
sys/dev/netif/bce/if_bce.c
3753
base = ((i - 1) * BCE_HC_SB_CONFIG_SIZE) + BCE_HC_SB_CONFIG_1;
sys/dev/netif/bce/if_bce.c
3754
KKASSERT(base <= BCE_HC_SB_CONFIG_8);
sys/dev/netif/bce/if_bce.c
3756
REG_WR(sc, base,
sys/dev/netif/bce/if_bce.c
3761
REG_WR(sc, base + BCE_HC_TX_QUICK_CONS_TRIP_OFF,
sys/dev/netif/bce/if_bce.c
3764
REG_WR(sc, base + BCE_HC_RX_QUICK_CONS_TRIP_OFF,
sys/dev/netif/bce/if_bce.c
3767
REG_WR(sc, base + BCE_HC_TX_TICKS_OFF,
sys/dev/netif/bce/if_bce.c
3769
REG_WR(sc, base + BCE_HC_RX_TICKS_OFF,
sys/dev/netif/bce/if_bce.c
6524
uint32_t base;
sys/dev/netif/bce/if_bce.c
6526
base = ((i - 1) * BCE_HC_SB_CONFIG_SIZE) +
sys/dev/netif/bce/if_bce.c
6528
REG_WR(sc, base + BCE_HC_TX_QUICK_CONS_TRIP_OFF,
sys/dev/netif/bce/if_bce.c
6544
uint32_t base;
sys/dev/netif/bce/if_bce.c
6546
base = ((i - 1) * BCE_HC_SB_CONFIG_SIZE) +
sys/dev/netif/bce/if_bce.c
6548
REG_WR(sc, base + BCE_HC_TX_TICKS_OFF,
sys/dev/netif/bce/if_bce.c
6563
uint32_t base;
sys/dev/netif/bce/if_bce.c
6565
base = ((i - 1) * BCE_HC_SB_CONFIG_SIZE) +
sys/dev/netif/bce/if_bce.c
6567
REG_WR(sc, base + BCE_HC_RX_QUICK_CONS_TRIP_OFF,
sys/dev/netif/bce/if_bce.c
6583
uint32_t base;
sys/dev/netif/bce/if_bce.c
6585
base = ((i - 1) * BCE_HC_SB_CONFIG_SIZE) +
sys/dev/netif/bce/if_bce.c
6587
REG_WR(sc, base + BCE_HC_RX_TICKS_OFF,
sys/dev/netif/bwn/bwn/if_bwn.c
2618
uint16_t base;
sys/dev/netif/bwn/bwn/if_bwn.c
2621
base = bwn_dma_base(type, idx);
sys/dev/netif/bwn/bwn/if_bwn.c
2623
ctl = BWN_READ_4(mac, base + BWN_DMA64_RXCTL);
sys/dev/netif/bwn/bwn/if_bwn.c
2627
BWN_WRITE_4(mac, base + BWN_DMA64_RXCTL, ctl);
sys/dev/netif/bwn/bwn/if_bwn.c
2629
ctl = BWN_READ_4(mac, base + BWN_DMA32_RXCTL);
sys/dev/netif/bwn/bwn/if_bwn.c
2633
BWN_WRITE_4(mac, base + BWN_DMA32_RXCTL, ctl);
sys/dev/netif/bwn/bwn/if_bwn.c
2641
uint16_t base;
sys/dev/netif/bwn/bwn/if_bwn.c
2646
base = bwn_dma_base(0, 0);
sys/dev/netif/bwn/bwn/if_bwn.c
2647
BWN_WRITE_4(mac, base + BWN_DMA32_TXCTL, BWN_DMA32_TXADDREXT_MASK);
sys/dev/netif/bwn/bwn/if_bwn.c
2648
tmp = BWN_READ_4(mac, base + BWN_DMA32_TXCTL);
sys/dev/netif/bwn/bwn/if_bwn.c
3299
bwn_dma_tx_reset(struct bwn_mac *mac, uint16_t base,
sys/dev/netif/bwn/bwn/if_bwn.c
3310
value = BWN_READ_4(mac, base + offset);
sys/dev/netif/bwn/bwn/if_bwn.c
3327
BWN_WRITE_4(mac, base + offset, 0);
sys/dev/netif/bwn/bwn/if_bwn.c
3331
value = BWN_READ_4(mac, base + offset);
sys/dev/netif/bwn/bwn/if_bwn.c
3357
bwn_dma_rx_reset(struct bwn_mac *mac, uint16_t base,
sys/dev/netif/bwn/bwn/if_bwn.c
3366
BWN_WRITE_4(mac, base + offset, 0);
sys/dev/netif/bwn/bwn/if_bwn.c
3370
value = BWN_READ_4(mac, base + offset);
sys/dev/netif/bwn/bwn/if_bwn.c
3696
uint16_t base;
sys/dev/netif/bwn/bwn/if_bwn.c
3701
base = bwn_dma_base(0, 0);
sys/dev/netif/bwn/bwn/if_bwn.c
3702
BWN_WRITE_4(mac, base + BWN_DMA32_TXCTL, BWN_DMA32_TXADDREXT_MASK);
sys/dev/netif/bwn/bwn/if_bwn.c
3703
tmp = BWN_READ_4(mac, base + BWN_DMA32_TXCTL);
sys/dev/netif/bwn/siba/siba_core.c
289
int base, dev_i = 0, error, i, is_pcie, n_80211 = 0, n_cc = 0,
sys/dev/netif/bwn/siba/siba_core.c
374
&base);
sys/dev/netif/bwn/siba/siba_core.c
377
&base);
sys/dev/netif/iwm/if_iwm.c
5242
uint32_t base;
sys/dev/netif/iwm/if_iwm.c
5244
base = sc->umac_error_event_table;
sys/dev/netif/iwm/if_iwm.c
5246
if (base < 0x800000) {
sys/dev/netif/iwm/if_iwm.c
5248
base);
sys/dev/netif/iwm/if_iwm.c
5252
if (iwm_read_mem(sc, base, &table, sizeof(table)/sizeof(uint32_t))) {
sys/dev/netif/iwm/if_iwm.c
5296
uint32_t base;
sys/dev/netif/iwm/if_iwm.c
5299
base = sc->error_event_table[0];
sys/dev/netif/iwm/if_iwm.c
5300
if (base < 0x800000) {
sys/dev/netif/iwm/if_iwm.c
5302
"Invalid error log pointer 0x%08x\n", base);
sys/dev/netif/iwm/if_iwm.c
5306
if (iwm_read_mem(sc, base, &table, sizeof(table)/sizeof(uint32_t))) {
sys/dev/netif/iwn/if_iwn.c
1678
uint16_t prev, base, next;
sys/dev/netif/iwn/if_iwn.c
1711
base = prev = 0;
sys/dev/netif/iwn/if_iwn.c
1714
error = iwn_read_prom_data(sc, base, &next, 2);
sys/dev/netif/iwn/if_iwn.c
1719
prev = base;
sys/dev/netif/iwn/if_iwn.c
1720
base = le16toh(next);
sys/dev/netif/iwn/if_iwn.c
2374
uint32_t base, addr;
sys/dev/netif/iwn/if_iwn.c
2382
base = le16toh(val);
sys/dev/netif/iwn/if_iwn.c
2383
iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
sys/dev/netif/iwn/if_iwn.c
2388
addr = base + sc->base_params->regulatory_bands[i];
sys/dev/netif/iwn/if_iwn.c
2397
base = le16toh(val);
sys/dev/netif/iwn/if_iwn.c
2398
iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
sys/dev/netif/iwn/if_iwn.c
2406
iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
sys/dev/netif/iwn/if_iwn.c
2408
iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
sys/dev/netif/iwn/if_iwn.c
2414
iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
sys/dev/netif/iwn/if_iwn.c
2416
iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
sys/dev/netif/iwn/if_iwn.c
2423
iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
sys/dev/netif/iwn/if_iwn.c
2657
uint16_t val, base;
sys/dev/netif/iwn/if_iwn.c
2665
base = le16toh(val);
sys/dev/netif/iwn/if_iwn.c
2666
iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
sys/dev/netif/mxge/if_mxge.c
302
unsigned long base, off;
sys/dev/netif/mxge/if_mxge.c
323
base = 0;
sys/dev/netif/mxge/if_mxge.c
327
base = 0xe0000000UL;
sys/dev/netif/mxge/if_mxge.c
335
base = ((unsigned long)word & 0x7ffeU) << 25;
sys/dev/netif/mxge/if_mxge.c
338
if (!base)
sys/dev/netif/mxge/if_mxge.c
381
off = base + 0x00100000UL * (unsigned long)bus +
sys/dev/netif/ral/rt2860.c
3235
bus_size_t base;
sys/dev/netif/ral/rt2860.c
3264
base = RT2860_SKEY(0, k->k_id);
sys/dev/netif/ral/rt2860.c
3267
base = RT2860_PKEY(wcid);
sys/dev/netif/ral/rt2860.c
3271
RAL_WRITE_REGION_1(sc, base, k->k_key, 16);
sys/dev/netif/ral/rt2860.c
3274
RAL_WRITE_REGION_1(sc, base + 16, &k->k_key[16], 8);
sys/dev/netif/ral/rt2860.c
3275
RAL_WRITE_REGION_1(sc, base + 24, &k->k_key[24], 8);
sys/dev/netif/ral/rt2860.c
3279
RAL_WRITE_REGION_1(sc, base + 16, &k->k_key[24], 8);
sys/dev/netif/ral/rt2860.c
3280
RAL_WRITE_REGION_1(sc, base + 24, &k->k_key[16], 8);
sys/dev/netif/ral/rt2860.c
3283
RAL_WRITE_REGION_1(sc, base, k->k_key, k->k_len);
sys/dev/netif/sk/if_sk.c
561
int base;
sys/dev/netif/sk/if_sk.c
563
base = XM_RXFILT_ENTRY(slot);
sys/dev/netif/sk/if_sk.c
565
SK_XM_WRITE_2(sc_if, base, *(uint16_t *)(&addr[0]));
sys/dev/netif/sk/if_sk.c
566
SK_XM_WRITE_2(sc_if, base + 2, *(uint16_t *)(&addr[2]));
sys/dev/netif/sk/if_sk.c
567
SK_XM_WRITE_2(sc_if, base + 4, *(uint16_t *)(&addr[4]));
sys/dev/netif/txp/if_txp.c
1360
cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
sys/dev/netif/txp/if_txp.c
1377
ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
sys/dev/netif/txp/if_txp.c
1419
rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
sys/dev/netif/txp/if_txp.c
1473
src = sc->sc_rspring.base;
sys/dev/netif/txp/if_txp.c
929
sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring;
sys/dev/netif/txp/if_txp.c
938
sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring;
sys/dev/netif/txp/if_txpreg.h
547
struct txp_cmd_desc *base;
sys/dev/netif/txp/if_txpreg.h
553
struct txp_rsp_desc *base;
sys/dev/powermng/alpm/alpm.c
120
int base;
sys/dev/powermng/amdpm/amdpm.c
120
int base;
sys/dev/powermng/amdpm/amdpm.c
145
u_long base;
sys/dev/powermng/amdpm/amdpm.c
162
base = pci_read_config(dev, AMDPCI_PMBASE, 4);
sys/dev/powermng/amdpm/amdpm.c
163
base &= 0xff00;
sys/dev/powermng/amdpm/amdpm.c
165
base+0xe0, 32, -1);
sys/dev/powermng/amdpm/amdpm.c
177
base = pci_read_config(dev, NFPCI_PMBASE, 4);
sys/dev/powermng/amdpm/amdpm.c
178
base &= 0xff00;
sys/dev/powermng/amdpm/amdpm.c
180
base, 32, -1);
sys/dev/powermng/viapm/viapm.c
211
viapm->base = pci_read_config(dev, viapm->iorid, 4) &
sys/dev/powermng/viapm/viapm.c
219
viapm->base, 256, -1)) {
sys/dev/powermng/viapm/viapm.c
290
viapm->base = pci_read_config(dev, base_cfgreg, 4) & VIAPM_PRO_BA_MASK;
sys/dev/powermng/viapm/viapm.c
298
viapm->base, 16, -1)) {
sys/dev/powermng/viapm/viapm.c
300
viapm->base);
sys/dev/powermng/viapm/viapm.c
305
device_printf(dev, "SMBus I/O base at 0x%x\n", viapm->base);
sys/dev/powermng/viapm/viapm.c
79
u_int32_t base;
sys/dev/raid/asr/asr.c
1528
int next, base, span;
sys/dev/raid/asr/asr.c
1531
next = base = KVTOPHYS(v);
sys/dev/raid/asr/asr.c
1532
I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
sys/dev/raid/asr/asr.c
1535
while ((len > 0) && (base == next)) {
sys/dev/raid/asr/asr.c
1538
next = trunc_page(base) + PAGE_SIZE;
sys/dev/raid/asr/asr.c
1539
size = next - base;
sys/dev/raid/asr/asr.c
1546
base = KVTOPHYS(v);
sys/dev/raid/asr/asr.c
1710
int next, span, base, rw;
sys/dev/raid/asr/asr.c
1815
next = base = KVTOPHYS(v);
sys/dev/raid/asr/asr.c
1816
I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
sys/dev/raid/asr/asr.c
1819
while ((len > 0) && (base == next)) {
sys/dev/raid/asr/asr.c
1820
next = trunc_page(base) + PAGE_SIZE;
sys/dev/raid/asr/asr.c
1821
size = next - base;
sys/dev/raid/asr/asr.c
1828
base = KVTOPHYS(v);
sys/dev/raid/asr/asr.c
3368
int next, base, span;
sys/dev/raid/asr/asr.c
3371
next = base = KVTOPHYS(v);
sys/dev/raid/asr/asr.c
3373
base);
sys/dev/raid/asr/asr.c
3376
while ((len > 0) && (base == next)) {
sys/dev/raid/asr/asr.c
3379
next = trunc_page(base) + PAGE_SIZE;
sys/dev/raid/asr/asr.c
3380
size = next - base;
sys/dev/raid/asr/asr.c
3387
base = KVTOPHYS(v);
sys/dev/raid/asr/osd_unix.h
438
int base; /* Base I/O address */
sys/dev/raid/asr/osd_unix.h
466
uLONG base; /* Base I/O address */
sys/dev/raid/asr/osd_unix.h
493
int base; /* Base I/O Address */
sys/dev/raid/dpt/dpt_scsi.c
183
dpt_pio_wait (u_int32_t base, u_int reg, u_int bits, u_int state)
sys/dev/raid/dpt/dpt_scsi.c
189
c = inb(base + reg) & bits;
sys/dev/raid/dpt/dpt_scsi.c
382
dpt_pio_get_conf (u_int32_t base)
sys/dev/raid/dpt/dpt_scsi.c
402
outb((base + HA_WCOMMAND), EATA_CMD_RESET);
sys/dev/raid/dpt/dpt_scsi.c
409
if (dpt_pio_wait(base, HA_RSTATUS, HA_SBUSY, 0)) {
sys/dev/raid/dpt/dpt_scsi.c
414
if (dpt_pio_wait(base, HA_RAUXSTAT, HA_ABUSY, 0)) {
sys/dev/raid/dpt/dpt_scsi.c
422
outb((base + HA_WCOMMAND), EATA_CMD_PIO_READ_CONFIG);
sys/dev/raid/dpt/dpt_scsi.c
430
if (dpt_pio_wait(base, HA_RSTATUS, HA_SDRQ, 0)) {
sys/dev/raid/dpt/dpt_scsi.c
435
(*p) = inw(base + HA_RDATA);
sys/dev/raid/dpt/dpt_scsi.c
439
if (inb(base + HA_RSTATUS) & HA_SERROR) {
sys/dev/raid/dpt/dpt_scsi.c
453
while (inb(base + HA_RSTATUS) & HA_SDRQ) {
sys/dev/raid/dpt/dpt_scsi.c
454
inw(base + HA_RDATA);
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
106
HPT_U32 base;
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
109
base = pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4);
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
111
if (base & 1) {
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
115
hba->pcibar[index].base = (void *)(unsigned long)(base & ~0x1);
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
120
hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset;
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
123
return hba->pcibar[index].base;
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
126
void os_unmap_pci_bar(void *osext, void *base)
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
132
if (hba->pcibar[index].base==base) {
sys/dev/raid/hpt27xx/hpt27xx_os_bsd.c
135
hba->pcibar[index].base = 0;
sys/dev/raid/hpt27xx/os_bsd.h
141
void *base;
sys/dev/raid/hpt27xx/osm.h
171
void os_unmap_pci_bar(void *osext, void *base);
sys/dev/raid/hptmv/command.h
179
LBA_T base;
sys/dev/raid/hptmv/mv.c
46
MV_REG_WRITE_BYTE(MV_BUS_ADDR_T base, MV_U32 offset, MV_U8 val)
sys/dev/raid/hptmv/mv.c
48
writeb((void *)((ULONG_PTR)base + offset), val);
sys/dev/raid/hptmv/mv.c
52
MV_REG_WRITE_WORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U16 val)
sys/dev/raid/hptmv/mv.c
54
writew((void *)((ULONG_PTR)base + offset), val);
sys/dev/raid/hptmv/mv.c
58
MV_REG_WRITE_DWORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U32 val)
sys/dev/raid/hptmv/mv.c
60
writel((void *)((ULONG_PTR)base + offset), val);
sys/dev/raid/hptmv/mv.c
64
MV_REG_READ_BYTE(MV_BUS_ADDR_T base, MV_U32 offset)
sys/dev/raid/hptmv/mv.c
66
return readb((void *)((ULONG_PTR)base + offset));
sys/dev/raid/hptmv/mv.c
70
MV_REG_READ_WORD(MV_BUS_ADDR_T base, MV_U32 offset)
sys/dev/raid/hptmv/mv.c
72
return readw((void *)((ULONG_PTR)base + offset));
sys/dev/raid/hptmv/mv.c
76
MV_REG_READ_DWORD(MV_BUS_ADDR_T base, MV_U32 offset)
sys/dev/raid/hptmv/mv.c
78
return readl((void *)((ULONG_PTR)base + offset));
sys/dev/raid/hptmv/mvOs.h
100
extern void HPTLIBAPI MV_REG_WRITE_DWORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U32 val);
sys/dev/raid/hptmv/mvOs.h
101
extern MV_U8 HPTLIBAPI MV_REG_READ_BYTE(MV_BUS_ADDR_T base, MV_U32 offset);
sys/dev/raid/hptmv/mvOs.h
102
extern MV_U16 HPTLIBAPI MV_REG_READ_WORD(MV_BUS_ADDR_T base, MV_U32 offset);
sys/dev/raid/hptmv/mvOs.h
103
extern MV_U32 HPTLIBAPI MV_REG_READ_DWORD(MV_BUS_ADDR_T base, MV_U32 offset);
sys/dev/raid/hptmv/mvOs.h
98
extern void HPTLIBAPI MV_REG_WRITE_BYTE(MV_BUS_ADDR_T base, MV_U32 offset, MV_U8 val);
sys/dev/raid/hptmv/mvOs.h
99
extern void HPTLIBAPI MV_REG_WRITE_WORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U16 val);
sys/dev/raid/hptrr/hptrr_os_bsd.c
104
hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset;
sys/dev/raid/hptrr/hptrr_os_bsd.c
105
return hba->pcibar[index].base;
sys/dev/raid/hptrr/hptrr_os_bsd.c
108
void os_unmap_pci_bar(void *osext, void *base)
sys/dev/raid/hptrr/hptrr_os_bsd.c
114
if (hba->pcibar[index].base==base) {
sys/dev/raid/hptrr/hptrr_os_bsd.c
117
hba->pcibar[index].base = 0;
sys/dev/raid/hptrr/os_bsd.h
142
void *base;
sys/dev/raid/hptrr/osm.h
137
void os_unmap_pci_bar(void *osext, void *base);
sys/dev/sound/pci/aureal.c
579
printf("at 0x%x...", config_id->map[i].base);
sys/dev/sound/pci/cmi.c
254
cmi_dma_prog(struct sc_info *sc, struct sc_chinfo *ch, u_int32_t base)
sys/dev/sound/pci/cmi.c
260
cmi_wr(sc, base, ch->phys_buf, 4);
sys/dev/sound/pci/cmi.c
264
cmi_wr(sc, base + 4, s, 2);
sys/dev/sound/pci/cmi.c
267
cmi_wr(sc, base + 6, i, 2);
sys/dev/sound/pci/emuxkireg.h
604
#define EMU_DSP_IOL(base, num) (base + (num << 1))
sys/dev/sound/pci/emuxkireg.h
605
#define EMU_DSP_IOR(base, num) (EMU_DSP_IOL(base, num) + 1)
sys/dev/sound/pci/hda/hdaa.c
123
uint16_t base;
sys/dev/sound/pci/hda/hdaa.c
1850
fmt |= hda_rate_tab[i].base;
sys/dev/sound/pci/ich.c
301
uint32_t base;
sys/dev/sound/pci/ich.c
304
base = sndbuf_getbufaddr(ch->buffer);
sys/dev/sound/pci/ich.c
315
ch->dtbl[i].buffer = base + (ch->blksz * (i % ch->blkcnt));
sys/dev/sound/pci/maestro.c
1092
cur -= 0xffff & ((ch->srcphys - ch->base) >> 1);
sys/dev/sound/pci/maestro.c
1131
cur -= 0xffff & ((ch->phys - ch->base) >> 1);
sys/dev/sound/pci/maestro.c
114
bus_addr_t base; /* channel buffer segment base */
sys/dev/sound/pci/maestro.c
1307
ch->base = physaddr & ((~(bus_addr_t)0) << WAVCACHE_BASEADDR_SHIFT);
sys/dev/sound/pci/maestro.c
1322
bus_addr_t base;
sys/dev/sound/pci/maestro.c
1338
base = pchs[0]->base;
sys/dev/sound/pci/maestro.c
1340
if (pchs[i]->phys + size - base >= 1 << BASE_SHIFT)
sys/dev/sound/pci/maestro.c
1342
base = (pchs[i]->base -= k++ << BASE_SHIFT);
sys/dev/sound/pci/maestro.c
1344
pchs[i]->base = base;
sys/dev/sound/pci/maestro.c
135
bus_addr_t base; /* channel buffer segment base */
sys/dev/sound/pci/maestro.c
1354
chans[i].base) >> 1);
sys/dev/sound/pci/maestro.c
1454
? (cp << 2) - ((0xffff << 2) & (ch->phys - ch->base))
sys/dev/sound/pci/maestro.c
1455
: (cp << 1) - ((0xffff << 1) & (ch->phys - ch->base));
sys/dev/sound/pci/maestro.c
1513
ch->base = ess->phys;
sys/dev/sound/pci/maestro.c
856
wpwa = (ch->phys - ch->base) >> 1;
sys/dev/sound/pci/maestro.c
894
ch->base >> WAVCACHE_BASEADDR_SHIFT);
sys/dev/sound/pci/maestro.c
896
ch->base >> WAVCACHE_BASEADDR_SHIFT);
sys/dev/sound/pci/maestro.c
899
ch->base >> WAVCACHE_BASEADDR_SHIFT);
sys/dev/sound/pci/maestro.c
901
ch->base >> WAVCACHE_BASEADDR_SHIFT);
sys/dev/sound/pci/maestro.c
970
wpwa = (ch->srcphys - ch->base) >> 1;
sys/dev/sound/pci/maestro.c
971
wpwa2 = (ch->srcphys + ch->parent->bufsz/2 - ch->base) >> 1;
sys/dev/sound/pci/maestro.c
973
wcreg2 = (ch->base - 16) & WAVCACHE_CHCTL_ADDRTAG_MASK;
sys/dev/sound/pci/maestro.c
976
wpwa = (ch->phys - ch->base) >> 1;
sys/dev/sound/pci/maestro.c
977
wpwa2 = (ch->srcphys - ch->base) >> 1;
sys/dev/sound/pci/maestro.c
979
wcreg2 = (ch->base - 16) & WAVCACHE_CHCTL_ADDRTAG_MASK;
sys/dev/sound/pci/neomagic.c
326
u_int32_t base;
sys/dev/sound/pci/neomagic.c
343
base = (ch->dir == PCMDIR_PLAY)? NM_PLAYBACK_REG_OFFSET : NM_RECORD_REG_OFFSET;
sys/dev/sound/pci/neomagic.c
344
nm_wr(sc, base + NM_RATE_REG_OFFSET, x, 1);
sys/dev/sound/pci/solo.c
137
static int ess_dmasetup(struct ess_info *sc, int ch, u_int32_t base, u_int16_t cnt, int dir);
sys/dev/sound/pci/solo.c
769
ess_dmasetup(struct ess_info *sc, int ch, u_int32_t base, u_int16_t cnt, int dir)
sys/dev/sound/pci/solo.c
778
port_wr(sc->vc, 0x0, base, 4);
sys/dev/sound/pci/solo.c
783
port_wr(sc->io, 0x0, base, 4);
sys/dev/sound/pci/via82c686.c
255
ch->base = VIA_PLAY_DMAOPS_BASE;
sys/dev/sound/pci/via82c686.c
263
ch->base = VIA_RECORD_DMAOPS_BASE;
sys/dev/sound/pci/via82c686.c
358
via_wr(via, ch->base, sgd_addr, 4);
sys/dev/sound/pci/via82c686.c
375
u_int32_t ptr, base, base1, len, seg;
sys/dev/sound/pci/via82c686.c
379
base1 = via_rd(via, ch->base, 4);
sys/dev/sound/pci/via82c686.c
381
base = via_rd(via, ch->base, 4);
sys/dev/sound/pci/via82c686.c
382
if (base != base1) /* Avoid race hazard */
sys/dev/sound/pci/via82c686.c
386
DEB(printf("viachan_getptr: len / base = %x / %x\n", len, base));
sys/dev/sound/pci/via82c686.c
391
seg = (base - sgd_addr) / sizeof(struct via_dma_op);
sys/dev/sound/pci/via82c686.c
72
int base, count, mode, ctrl;
sys/dev/sound/pci/vibes.c
171
u_int32_t base, u_int32_t count, u_int8_t mode)
sys/dev/sound/pci/vibes.c
173
bus_space_write_4(st, sh, SV_DMA_ADDR, base);
sys/dev/sound/pci/vibes.c
178
base, count, mode));
sys/dev/video/fb/fbreg.h
63
typedef int vi_set_hw_cursor_shape_t(video_adapter_t *adp, int base,
sys/dev/video/fb/vga.c
1339
vga_save_palette2(video_adapter_t *adp, int base, int count,
sys/dev/video/fb/vga.c
1346
outb(PALRADR, base);
sys/dev/video/fb/vga.c
1379
vga_load_palette2(video_adapter_t *adp, int base, int count,
sys/dev/video/fb/vga.c
1387
outb(PALWADR, base);
sys/dev/video/fb/vga.c
1639
vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height,
sys/dev/video/fb/vga.c
1654
outb(CRTC + 1, celsize - base - height);
sys/dev/video/fb/vga.c
1656
outb(CRTC + 1, celsize - base - 1);
sys/dev/video/fb/vga.c
1846
get_palette(video_adapter_t *adp, int base, int count,
sys/dev/video/fb/vga.c
1853
if (count < 0 || base < 0 || count > 256 || base > 256 ||
sys/dev/video/fb/vga.c
1854
base + count > 256)
sys/dev/video/fb/vga.c
1860
if (vga_save_palette2(adp, base, count, r, g, b)) {
sys/dev/video/fb/vga.c
1877
set_palette(video_adapter_t *adp, int base, int count,
sys/dev/video/fb/vga.c
1885
if (count < 0 || base < 0 || count > 256 || base > 256 ||
sys/dev/video/fb/vga.c
1886
base + count > 256)
sys/dev/video/fb/vga.c
1898
err = vga_load_palette2(adp, base, count, r, g, b);
sys/dev/virtual/amazon/ena/ena-com/ena_defs/ena_eth_io_defs.h
276
struct ena_eth_io_rx_cdesc_base base;
sys/dev/virtual/amazon/ena/ena-com/ena_eth_io_defs.h
277
struct ena_eth_io_rx_cdesc_base base;
sys/dev/virtual/hyperv/hyperv.c
115
timer->base = 0;
sys/dev/virtual/hyperv/hyperv.c
116
timer->base = oldclock - timer->count();
sys/dev/virtual/hyperv/hyperv.c
125
return (val + hyperv_cputimer.base);
sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c
137
return (val + hyperv_tsc_cputimer.base);
sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c
146
return (val + hyperv_tsc_cputimer.base);
sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c
152
timer->base = 0;
sys/dev/virtual/hyperv/x86_64/hyperv_machdep.c
153
timer->base = oldclock - timer->count();
sys/dev/virtual/nvmm/x86/nvmm_x86.c
102
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
112
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
122
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
132
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
42
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
52
.base = 0xFFFF0000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
62
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
72
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
82
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.c
92
.base = 0x00000000,
sys/dev/virtual/nvmm/x86/nvmm_x86.h
244
uint64_t base; /* hidden */
sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c
1867
vseg->base = seg->base;
sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c
1884
seg->base = vseg->base;
sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c
421
uint64_t base; /* hidden */
sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c
2550
vmx_vmwrite(vmx_guest_segs[idx].base, segs[idx].base);
sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c
2556
uint64_t selector = 0, attrib = 0, base, limit;
sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c
2563
base = vmx_vmread(vmx_guest_segs[idx].base);
sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c
2567
segs[idx].base = base;
sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c
882
uint64_t base;
sys/kern/imgact_elf.c
1921
u_long base;
sys/kern/imgact_elf.c
1924
base = vm_map_hint(p, 0, VM_PROT_READ | VM_PROT_EXECUTE, 0);
sys/kern/imgact_elf.c
1926
base = ET_DYN_LOAD_ADDR;
sys/kern/imgact_elf.c
1927
return base;
sys/kern/imgact_elf.c
861
elf_auxargs->base = addr;
sys/kern/imgact_elf.c
876
Elf_Addr *base;
sys/kern/imgact_elf.c
879
base = (Elf_Addr *)*stack_base;
sys/kern/imgact_elf.c
880
pos = base + (imgp->args->argc + imgp->args->envc + 2);
sys/kern/imgact_elf.c
890
AUXARGS_ENTRY(pos, AT_BASE, args->base);
sys/kern/imgact_elf.c
899
base--;
sys/kern/imgact_elf.c
900
suword64(base, (long)imgp->args->argc);
sys/kern/imgact_elf.c
901
*stack_base = (register_t *)base;
sys/kern/kern_caps.c
114
syscap_base_t base;
sys/kern/kern_caps.c
116
base.res = SYSCAP_RESOURCE_EOF;
sys/kern/kern_caps.c
117
base.len = sizeof(base);
sys/kern/kern_caps.c
118
error = copyout(&base, uap->data, sizeof(base));
sys/kern/kern_cputimer.c
215
return(++dummy_cputimer.base);
sys/kern/kern_cputimer.c
221
cputimer->base = oldclock;
sys/kern/kern_kmalloc.c
368
struct kmalloc_slab *base;
sys/kern/kern_kmalloc.c
379
base = NULL;
sys/kern/kern_kmalloc.c
380
basep = &base;
sys/kern/kern_kmalloc.c
404
if (base == NULL)
sys/kern/kern_kmalloc.c
406
base = gslab_cache(base);
sys/kern/kern_kmalloc.c
411
while ((slab = base) != NULL) {
sys/kern/kern_kmalloc.c
412
base = slab->next;
sys/kern/kern_kmalloc.c
519
struct kmalloc_slab *base;
sys/kern/kern_kmalloc.c
546
base = NULL;
sys/kern/kern_kmalloc.c
547
basep = &base;
sys/kern/kern_kmalloc.c
605
base = gslab_cache(base);
sys/kern/kern_kmalloc.c
606
while ((slab = base) != NULL) {
sys/kern/kern_kmalloc.c
607
base = base->next;
sys/kern/kern_proc.c
1073
pid_t base;
sys/kern/kern_proc.c
1085
base = atomic_fetchadd_int(&nextpid, 1) + random_offset;
sys/kern/kern_proc.c
1086
if (base <= 0 || base >= PID_MAX) {
sys/kern/kern_proc.c
1087
base = base % PID_MAX;
sys/kern/kern_proc.c
1088
if (base < 0)
sys/kern/kern_proc.c
1089
base = 100;
sys/kern/kern_proc.c
1090
if (base < 100)
sys/kern/kern_proc.c
1091
base += 100;
sys/kern/kern_proc.c
1092
nextpid = base; /* reset (SMP race ok) */
sys/kern/kern_proc.c
1105
if (base >= 100) {
sys/kern/kern_proc.c
1107
(int8_t)pid_doms[base % PIDSEL_DOMAINS];
sys/kern/kern_proc.c
1121
n = ALLPROC_HASH(base);
sys/kern/kern_proc.c
1127
if (ps->p_pid == base) {
sys/kern/kern_proc.c
1128
base += ALLPROC_HSIZE;
sys/kern/kern_proc.c
1129
if (base >= PID_MAX) {
sys/kern/kern_proc.c
1138
if (pg->pg_id == base) {
sys/kern/kern_proc.c
1139
base += ALLPROC_HSIZE;
sys/kern/kern_proc.c
1140
if (base >= PID_MAX) {
sys/kern/kern_proc.c
1149
if (sess->s_sid == base) {
sys/kern/kern_proc.c
1150
base += ALLPROC_HSIZE;
sys/kern/kern_proc.c
1151
if (base >= PID_MAX) {
sys/kern/kern_proc.c
1163
p->p_pid = base;
sys/kern/kern_proc.c
1914
char *base;
sys/kern/kern_proc.c
1916
base = lp->lwp_lpmap->thread_title;
sys/kern/kern_proc.c
1918
if (base[n] == 0)
sys/kern/kern_proc.c
1921
error = SYSCTL_OUT(req, base, n);
sys/kern/kern_proc.c
1933
char *base;
sys/kern/kern_proc.c
1935
base = p->p_upmap->proc_title;
sys/kern/kern_proc.c
1937
if (base[n] == 0)
sys/kern/kern_proc.c
1940
error = SYSCTL_OUT(req, base, n);
sys/kern/kern_spinlock.c
190
info.base = 0; /* avoid improper gcc warning */
sys/kern/link_elf.c
184
caddr_t ssym, esym, base;
sys/kern/link_elf.c
201
base = ssym;
sys/kern/link_elf.c
203
symcnt = *(long *)base;
sys/kern/link_elf.c
204
base += sizeof(long);
sys/kern/link_elf.c
205
symtab = (Elf_Sym *)base;
sys/kern/link_elf.c
206
base += roundup(symcnt, sizeof(long));
sys/kern/link_elf.c
208
if (base > esym || base < ssym) {
sys/kern/link_elf.c
213
strcnt = *(long *)base;
sys/kern/link_elf.c
214
base += sizeof(long);
sys/kern/link_elf.c
215
strtab = base;
sys/kern/link_elf.c
216
base += roundup(strcnt, sizeof(long));
sys/kern/link_elf.c
218
if (base > esym || base < ssym) {
sys/kern/link_elf_obj.c
1002
base = findbase(ef, ef->relatab[i].sec);
sys/kern/link_elf_obj.c
1003
if (base == 0)
sys/kern/link_elf_obj.c
1013
if (elf_reloc(lf, base, rela, ELF_RELOC_RELA,
sys/kern/link_elf_obj.c
1231
Elf_Addr base;
sys/kern/link_elf_obj.c
1243
base = findbase(ef, ef->reltab[i].sec);
sys/kern/link_elf_obj.c
1244
if (base == 0)
sys/kern/link_elf_obj.c
1254
elf_reloc_local(lf, base, rel, ELF_RELOC_REL,
sys/kern/link_elf_obj.c
1265
base = findbase(ef, ef->relatab[i].sec);
sys/kern/link_elf_obj.c
1266
if (base == 0)
sys/kern/link_elf_obj.c
1276
elf_reloc_local(lf, base, rela, ELF_RELOC_RELA,
sys/kern/link_elf_obj.c
944
Elf_Addr base = 0;
sys/kern/link_elf_obj.c
948
base = (Elf_Addr)ef->progtab[i].addr;
sys/kern/link_elf_obj.c
952
return base;
sys/kern/link_elf_obj.c
967
Elf_Addr base;
sys/kern/link_elf_obj.c
975
base = findbase(ef, ef->reltab[i].sec);
sys/kern/link_elf_obj.c
976
if (base == 0)
sys/kern/link_elf_obj.c
986
if (elf_reloc(lf, base, rel, ELF_RELOC_REL,
sys/kern/subr_module.c
127
preload_search_next_name(caddr_t base)
sys/kern/subr_module.c
136
if (base) {
sys/kern/subr_module.c
138
curp = base;
sys/kern/subr_prf.c
101
static char *ksprintn (char *nbuf, uintmax_t num, int base, int *lenp,
sys/kern/subr_prf.c
511
ksprintn(char *nbuf, uintmax_t num, int base, int *lenp, int upper)
sys/kern/subr_prf.c
518
c = hex2ascii(num % base);
sys/kern/subr_prf.c
520
} while (num /= base);
sys/kern/subr_prf.c
559
int base, tmp, width, ladjust, sharpflag, spaceflag, neg, sign, dot;
sys/kern/subr_prf.c
668
base = 10;
sys/kern/subr_prf.c
703
base = 8;
sys/kern/subr_prf.c
733
base = 16;
sys/kern/subr_prf.c
775
base = 10;
sys/kern/subr_prf.c
781
base = 16;
sys/kern/subr_prf.c
827
p = ksprintn(nbuf, num, base, &n, upper);
sys/kern/subr_prf.c
830
if (base == 8)
sys/kern/subr_prf.c
832
else if (base == 16)
sys/kern/subr_prf.c
851
if (base == 8) {
sys/kern/subr_prf.c
853
} else if (base == 16) {
sys/kern/subr_scanf.c
114
int base; /* base argument to strtoq/strtouq */
sys/kern/subr_scanf.c
128
base = 0; /* XXX just to keep gcc happy */
sys/kern/subr_scanf.c
188
base = 10;
sys/kern/subr_scanf.c
194
base = 0;
sys/kern/subr_scanf.c
200
base = 8;
sys/kern/subr_scanf.c
206
base = 10;
sys/kern/subr_scanf.c
213
base = 16;
sys/kern/subr_scanf.c
235
base = 16;
sys/kern/subr_scanf.c
423
if (base == 0) {
sys/kern/subr_scanf.c
424
base = 8;
sys/kern/subr_scanf.c
436
base = basefix[base];
sys/kern/subr_scanf.c
442
base = basefix[base];
sys/kern/subr_scanf.c
443
if (base <= 8)
sys/kern/subr_scanf.c
454
if (base <= 10)
sys/kern/subr_scanf.c
470
base = 16; /* if %i */
sys/kern/subr_scanf.c
515
res = (*ccfn)(buf, NULL, base);
sys/kern/sysv_shm.c
668
struct shmmap_state *base, *shm;
sys/kern/sysv_shm.c
671
if ((base = (struct shmmap_state *)vm->vm_shm) != NULL) {
sys/kern/sysv_shm.c
674
for (i = 0, shm = base; i < shminfo.shmseg; i++, shm++) {
sys/kern/sysv_shm.c
678
kfree(base, M_SHM);
sys/kern/uipc_msg.c
101
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
105
return lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
114
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
118
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
128
netmsg_init(&msg.base, so, &netisr_adone_rport, 0, func);
sys/kern/uipc_msg.c
129
msg.base.lmsg.ms_flags &= ~(MSGF_REPLY | MSGF_DONE);
sys/kern/uipc_msg.c
130
msg.base.lmsg.ms_flags |= MSGF_SYNC;
sys/kern/uipc_msg.c
134
KKASSERT(msg.base.lmsg.ms_flags & MSGF_DONE);
sys/kern/uipc_msg.c
135
return(msg.base.lmsg.ms_error);
sys/kern/uipc_msg.c
157
netmsg_init(&msg->base, so, &netisr_afree_rport, 0,
sys/kern/uipc_msg.c
162
lwkt_sendmsg_oncpu(so->so_port, &msg->base.lmsg);
sys/kern/uipc_msg.c
164
lwkt_sendmsg(so->so_port, &msg->base.lmsg);
sys/kern/uipc_msg.c
178
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
183
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
193
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
200
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
236
netmsg_init(&msg->base, so, &netisr_afree_rport, 0,
sys/kern/uipc_msg.c
245
lwkt_sendmsg_oncpu(so->so_port, &msg->base.lmsg);
sys/kern/uipc_msg.c
247
lwkt_sendmsg(so->so_port, &msg->base.lmsg);
sys/kern/uipc_msg.c
257
netmsg_init(&msg.base, so1, &curthread->td_msgport,
sys/kern/uipc_msg.c
262
error = lwkt_domsg(so1->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
277
netmsg_init(&msg.base, so, &netisr_adone_rport, 0, func);
sys/kern/uipc_msg.c
278
msg.base.lmsg.ms_flags &= ~(MSGF_REPLY | MSGF_DONE);
sys/kern/uipc_msg.c
279
msg.base.lmsg.ms_flags |= MSGF_SYNC;
sys/kern/uipc_msg.c
285
KKASSERT(msg.base.lmsg.ms_flags & MSGF_DONE);
sys/kern/uipc_msg.c
286
return(msg.base.lmsg.ms_error);
sys/kern/uipc_msg.c
295
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
297
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
307
netmsg_init(&msg.base, so, &netisr_adone_rport, 0, func);
sys/kern/uipc_msg.c
308
msg.base.lmsg.ms_flags &= ~(MSGF_REPLY | MSGF_DONE);
sys/kern/uipc_msg.c
309
msg.base.lmsg.ms_flags |= MSGF_SYNC;
sys/kern/uipc_msg.c
311
KKASSERT(msg.base.lmsg.ms_flags & MSGF_DONE);
sys/kern/uipc_msg.c
312
return(msg.base.lmsg.ms_error);
sys/kern/uipc_msg.c
321
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
323
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
333
netmsg_init(&msg.base, so, &netisr_adone_rport, 0, func);
sys/kern/uipc_msg.c
334
msg.base.lmsg.ms_flags &= ~(MSGF_REPLY | MSGF_DONE);
sys/kern/uipc_msg.c
335
msg.base.lmsg.ms_flags |= MSGF_SYNC;
sys/kern/uipc_msg.c
337
KKASSERT(msg.base.lmsg.ms_flags & MSGF_DONE);
sys/kern/uipc_msg.c
346
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
350
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
360
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
363
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
373
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
377
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
384
lwkt_msg_t lmsg = &so->so_rcvd_msg.base.lmsg;
sys/kern/uipc_msg.c
416
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
420
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
434
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
441
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
486
netmsg_init(&msg->base, so, &netisr_apanic_rport,
sys/kern/uipc_msg.c
494
lwkt_sendmsg_oncpu(so->so_port, &msg->base.lmsg);
sys/kern/uipc_msg.c
496
lwkt_sendmsg(so->so_port, &msg->base.lmsg);
sys/kern/uipc_msg.c
505
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
508
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
518
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
520
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
530
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
533
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
551
netmsg_init(&amsg->base, so, &netisr_afree_rport, 0,
sys/kern/uipc_msg.c
556
&amsg->base.lmsg);
sys/kern/uipc_msg.c
558
lwkt_sendmsg(so->so_port, &amsg->base.lmsg);
sys/kern/uipc_msg.c
565
netmsg_init(&msg.base, so, &curthread->td_msgport,
sys/kern/uipc_msg.c
569
error = lwkt_domsg(so->so_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
604
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/kern/uipc_msg.c
610
lwkt_domsg(port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
629
netmsg_init(&msg.base, NULL, &netisr_adone_rport, 0, func);
sys/kern/uipc_msg.c
630
msg.base.lmsg.ms_flags &= ~(MSGF_REPLY | MSGF_DONE);
sys/kern/uipc_msg.c
631
msg.base.lmsg.ms_flags |= MSGF_SYNC;
sys/kern/uipc_msg.c
637
KKASSERT(msg.base.lmsg.ms_flags & MSGF_DONE);
sys/kern/uipc_msg.c
654
struct socket *so = msg->base.nm_so;
sys/kern/uipc_msg.c
672
lwkt_replymsg(&msg->base.lmsg,
sys/kern/uipc_msg.c
673
msg->base.lmsg.ms_error);
sys/kern/uipc_msg.c
710
netmsg_init(&msg.base, nmsg->nm_so, &curthread->td_msgport,
sys/kern/uipc_msg.c
713
lwkt_domsg(lmsg->ms_target_port, &msg.base.lmsg, 0);
sys/kern/uipc_msg.c
72
netmsg_init(&msg->base, so, &netisr_afree_free_so_rport,
sys/kern/uipc_msg.c
74
lwkt_sendmsg(so->so_port, &msg->base.lmsg);
sys/kern/uipc_msg.c
744
lwkt_getpooltoken(nmsg->base.nm_so);
sys/kern/uipc_msg.c
745
if ((nmsg->base.lmsg.ms_flags & (MSGF_DONE | MSGF_REPLY)) == 0) {
sys/kern/uipc_msg.c
747
&nmsg->base.nm_so->so_rcv :
sys/kern/uipc_msg.c
748
&nmsg->base.nm_so->so_snd;
sys/kern/uipc_msg.c
750
lwkt_relpooltoken(nmsg->base.nm_so);
sys/kern/uipc_msg.c
751
lwkt_replymsg(&nmsg->base.lmsg, EINTR);
sys/kern/uipc_msg.c
753
lwkt_relpooltoken(nmsg->base.nm_so);
sys/kern/uipc_msg.c
759
lwkt_replymsg(&abrtmsg->base.lmsg, 0);
sys/kern/uipc_msg.c
769
lwkt_replymsg(&so->so_rcvd_msg.base.lmsg, 0);
sys/kern/uipc_msg.c
776
lwkt_msg_t lmsg = &so->so_rcvd_msg.base.lmsg;
sys/kern/uipc_msg.c
88
netmsg_init(&msg.base, so, &netisr_adone_rport, 0, func);
sys/kern/uipc_msg.c
89
msg.base.lmsg.ms_flags &= ~(MSGF_REPLY | MSGF_DONE);
sys/kern/uipc_msg.c
90
msg.base.lmsg.ms_flags |= MSGF_SYNC;
sys/kern/uipc_msg.c
92
KKASSERT(msg.base.lmsg.ms_flags & MSGF_DONE);
sys/kern/uipc_msg.c
93
sofree(msg.base.nm_so);
sys/kern/uipc_socket.c
190
netmsg_init(&so->so_rcvd_msg.base, so, &netisr_adone_rport,
sys/kern/uipc_socket.c
599
struct socket *so = msg->base.nm_so;
sys/kern/uipc_socket.c
628
struct netmsg_base *base = &so->so_clomsg;
sys/kern/uipc_socket.c
630
netmsg_init(base, so, &netisr_apanic_rport, 0,
sys/kern/uipc_socket.c
633
lwkt_sendmsg_oncpu(so->so_port, &base->lmsg);
sys/kern/uipc_socket.c
635
lwkt_sendmsg(so->so_port, &base->lmsg);
sys/kern/uipc_socket2.c
623
lwkt_replymsg(&msg->base.lmsg,
sys/kern/uipc_socket2.c
624
msg->base.lmsg.ms_error);
sys/kern/uipc_socket2.c
799
msg->sense.nm_stat->st_blksize = msg->base.nm_so->so_snd.ssb_hiwat;
sys/kern/uipc_syscalls.c
235
struct socket *head = msg->base.nm_so;
sys/kern/uipc_syscalls.c
239
msg->base.lmsg.ms_error = head->so_error;
sys/kern/uipc_syscalls.c
260
msg->base.lmsg.ms_error = 0;
sys/kern/uipc_syscalls.c
261
msg->base.nm_so = so;
sys/kern/uipc_syscalls.c
266
msg->base.lmsg.ms_error = ECONNABORTED;
sys/kern/uipc_syscalls.c
270
msg->base.lmsg.ms_error = EWOULDBLOCK;
sys/kern/uipc_syscalls.c
328
netmsg_init(&msg.base, head, &netisr_apanic_rport, 0, NULL);
sys/kern/uipc_syscalls.c
336
error = msg.base.lmsg.ms_error;
sys/kern/uipc_syscalls.c
345
netmsg_init_abortable(&msg.base, head, &curthread->td_msgport,
sys/kern/uipc_syscalls.c
350
error = lwkt_domsg(head->so_port, &msg.base.lmsg, PCATCH);
sys/kern/uipc_syscalls.c
361
so = msg.base.nm_so;
sys/kern/uipc_syscalls.c
559
struct socket *so = msg->base.nm_so;
sys/kern/uipc_syscalls.c
563
msg->base.lmsg.ms_error = so->so_error;
sys/kern/uipc_syscalls.c
604
netmsg_init_abortable(&msg.base, so,
sys/kern/uipc_syscalls.c
611
error = lwkt_domsg(so->so_port, &msg.base.lmsg, PCATCH);
sys/kern/uipc_usrreq.c
333
unp = unp_getsocktoken(msg->base.nm_so);
sys/kern/uipc_usrreq.c
355
unp = unp_getsocktoken(msg->base.nm_so);
sys/kern/uipc_usrreq.c
391
KASSERT(msg->base.nm_so->so_pcb == NULL, ("double unp attach"));
sys/kern/uipc_usrreq.c
392
error = unp_attach(msg->base.nm_so, msg->attach.nm_ai);
sys/kern/uipc_usrreq.c
405
unp = unp_getsocktoken(msg->base.nm_so);
sys/kern/uipc_usrreq.c
423
error = unp_connect(msg->base.nm_so, msg->connect.nm_nam,
sys/kern/uipc_usrreq.c
447
unp = unp_getsocktoken(msg->base.nm_so);
sys/kern/uipc_usrreq.c
469
unp = unp_getsocktoken(msg->base.nm_so);
sys/kern/uipc_usrreq.c
491
unp = unp_getsocktoken(msg->base.nm_so);
sys/kern/uipc_usrreq.c
511
unp = unp_getsocktoken(msg->base.nm_so);
sys/kern/uipc_usrreq.c
551
so = msg->base.nm_so;
sys/kern/uipc_usrreq.c
613
so = msg->base.nm_so;
sys/kern/uipc_usrreq.c
621
so = msg->base.nm_so;
sys/kern/uipc_usrreq.c
831
so = msg->base.nm_so;
sys/kern/uipc_usrreq.c
864
so = msg->base.nm_so;
sys/kern/uipc_usrreq.c
889
unp = unp_getsocktoken(msg->base.nm_so);
sys/kern/uipc_usrreq.c
935
so = msg->base.nm_so;
sys/kern/vfs_bio.c
376
int base = (foff + off) & PAGE_MASK;
sys/kern/vfs_bio.c
377
if (vm_page_is_valid(m, base, size) == 0)
sys/kern/vfs_journal.c
1219
char *base;
sys/kern/vfs_journal.c
1240
base = buf;
sys/kern/vfs_journal.c
1242
base = kmalloc(pathlen, M_TEMP, M_INTWAIT);
sys/kern/vfs_journal.c
1252
if (base != buf)
sys/kern/vfs_journal.c
1253
kfree(base, M_TEMP);
sys/kern/vfs_journal.c
1257
base[--index] = 0;
sys/kern/vfs_journal.c
1259
base[--index] = '/';
sys/kern/vfs_journal.c
1261
bcopy(scan->nc_name, base + index, scan->nc_nlen);
sys/kern/vfs_journal.c
1263
jrecord_leaf(jrec, rectype, base + index, pathlen - index);
sys/kern/vfs_journal.c
1264
if (base != buf)
sys/kern/vfs_journal.c
1265
kfree(base, M_TEMP);
sys/kern/vfs_syscalls.c
4672
long base;
sys/kern/vfs_syscalls.c
4675
error = kern_getdirentries(uap->fd, uap->buf, uap->count, &base,
sys/kern/vfs_syscalls.c
4679
error = copyout(&base, uap->basep, sizeof(*uap->basep));
sys/kern/vfs_vnops.c
634
vn_rdwr(enum uio_rw rw, struct vnode *vp, caddr_t base, int len,
sys/kern/vfs_vnops.c
646
aiov.iov_base = base;
sys/kern/vfs_vnops.c
679
vn_rdwr_inchunks(enum uio_rw rw, struct vnode *vp, caddr_t base, int len,
sys/kern/vfs_vnops.c
708
error = vn_rdwr(rw, vp, base, chunk, offset, segflg,
sys/kern/vfs_vnops.c
714
base += chunk;
sys/libkern/bsearch.c
57
const char *base = base0;
sys/libkern/bsearch.c
63
p = base + (lim >> 1) * size;
sys/libkern/bsearch.c
68
base = (const char *)p + size;
sys/libkern/inet_ntop.c
100
struct { int base, len; } best, cur;
sys/libkern/inet_ntop.c
114
best.base = -1;
sys/libkern/inet_ntop.c
116
cur.base = -1;
sys/libkern/inet_ntop.c
120
if (cur.base == -1)
sys/libkern/inet_ntop.c
121
cur.base = i, cur.len = 1;
sys/libkern/inet_ntop.c
125
if (cur.base != -1) {
sys/libkern/inet_ntop.c
126
if (best.base == -1 || cur.len > best.len)
sys/libkern/inet_ntop.c
128
cur.base = -1;
sys/libkern/inet_ntop.c
132
if (cur.base != -1) {
sys/libkern/inet_ntop.c
133
if (best.base == -1 || cur.len > best.len)
sys/libkern/inet_ntop.c
136
if (best.base != -1 && best.len < 2)
sys/libkern/inet_ntop.c
137
best.base = -1;
sys/libkern/inet_ntop.c
145
if (best.base != -1 && i >= best.base &&
sys/libkern/inet_ntop.c
146
i < (best.base + best.len)) {
sys/libkern/inet_ntop.c
147
if (i == best.base)
sys/libkern/inet_ntop.c
155
if (i == 6 && best.base == 0 && (best.len == 6 ||
sys/libkern/inet_ntop.c
166
if (best.base != -1 && (best.base + best.len) ==
sys/libkern/strtol.c
108
if (c >= base)
sys/libkern/strtol.c
114
acc *= base;
sys/libkern/strtol.c
49
strtol(const char *nptr, char **endptr, int base)
sys/libkern/strtol.c
70
if ((base == 0 || base == 16) &&
sys/libkern/strtol.c
74
base = 16;
sys/libkern/strtol.c
76
if (base == 0)
sys/libkern/strtol.c
77
base = c == '0' ? 8 : 10;
sys/libkern/strtol.c
97
cutlim = cutoff % (unsigned long)base;
sys/libkern/strtol.c
98
cutoff /= (unsigned long)base;
sys/libkern/strtoq.c
112
if (c >= base)
sys/libkern/strtoq.c
47
strtoq(const char *nptr, char **endptr, int base)
sys/libkern/strtoq.c
72
if ((base == 0 || base == 16) &&
sys/libkern/strtoq.c
76
base = 16;
sys/libkern/strtoq.c
78
if (base == 0)
sys/libkern/strtoq.c
79
base = c == '0' ? 8 : 10;
sys/libkern/strtoq.c
99
qbase = (unsigned)base;
sys/libkern/strtoul.c
49
strtoul(const char *nptr, char **endptr, int base)
sys/libkern/strtoul.c
68
if ((base == 0 || base == 16) &&
sys/libkern/strtoul.c
72
base = 16;
sys/libkern/strtoul.c
74
if (base == 0)
sys/libkern/strtoul.c
75
base = c == '0' ? 8 : 10;
sys/libkern/strtoul.c
76
cutoff = (unsigned long)ULONG_MAX / (unsigned long)base;
sys/libkern/strtoul.c
77
cutlim = (unsigned long)ULONG_MAX % (unsigned long)base;
sys/libkern/strtoul.c
87
if (c >= base)
sys/libkern/strtoul.c
93
acc *= base;
sys/libkern/strtouq.c
47
strtouq(const char *nptr, char **endptr, int base)
sys/libkern/strtouq.c
70
if ((base == 0 || base == 16) &&
sys/libkern/strtouq.c
74
base = 16;
sys/libkern/strtouq.c
76
if (base == 0)
sys/libkern/strtouq.c
77
base = c == '0' ? 8 : 10;
sys/libkern/strtouq.c
78
qbase = (unsigned)base;
sys/libkern/strtouq.c
90
if (c >= base)
sys/libprop/prop_dictionary.c
878
unsigned int base, idx, distance;
sys/libprop/prop_dictionary.c
885
for (idx = 0, base = 0, distance = pd->pd_count; distance != 0;
sys/libprop/prop_dictionary.c
887
idx = base + (distance >> 1);
sys/libprop/prop_dictionary.c
897
base = idx + 1;
sys/net/bpf.c
652
netmsg_init(&bmsg.base, NULL, &curthread->td_msgport,
sys/net/bpf.c
663
ret = lwkt_domsg(netisr_cpuport(0), &bmsg.base.lmsg, 0);
sys/net/bpf.c
88
struct netmsg_base base;
sys/net/bridge/if_bridge.c
1992
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport,
sys/net/bridge/if_bridge.c
1995
nmp->base.lmsg.u.ms_resultp = dst_ifp;
sys/net/bridge/if_bridge.c
1997
lwkt_sendmsg_oncpu(netisr_cpuport(mycpuid), &nmp->base.lmsg);
sys/net/bridge/if_bridge.c
319
struct netmsg_base base;
sys/net/bridge/if_bridge.c
326
struct netmsg_base base;
sys/net/bridge/if_bridge.c
3288
netisr_forwardmsg(&msg->base, mycpuid + 1);
sys/net/bridge/if_bridge.c
336
struct netmsg_base base;
sys/net/bridge/if_bridge.c
3388
netisr_replymsg(&brmsg->base, error);
sys/net/bridge/if_bridge.c
3393
netisr_replymsg(&brmsg->base, 0);
sys/net/bridge/if_bridge.c
3396
netisr_forwardmsg(&brmsg->base, mycpuid + 1);
sys/net/bridge/if_bridge.c
3424
netmsg_init(&brmsg->base, NULL, &netisr_afree_rport,
sys/net/bridge/if_bridge.c
343
struct netmsg_base base;
sys/net/bridge/if_bridge.c
3433
netisr_sendmsg(&brmsg->base, 0);
sys/net/bridge/if_bridge.c
3449
netmsg_init(&brmsg.base, NULL, &curthread->td_msgport,
sys/net/bridge/if_bridge.c
3458
return netisr_domsg(&brmsg.base, 0);
sys/net/bridge/if_bridge.c
3486
netisr_forwardmsg(&msg->base, mycpuid + 1);
sys/net/bridge/if_bridge.c
350
struct netmsg_base base;
sys/net/bridge/if_bridge.c
4427
dst_ifp = nmp->base.lmsg.u.ms_resultp;
sys/net/bridge/if_bridge.c
4494
lwkt_replymsg(&bc_msg->base.lmsg, error);
sys/net/bridge/if_bridge.c
4509
netmsg_init(&bc_msg.base, NULL, &curthread->td_msgport,
sys/net/bridge/if_bridge.c
4516
error = lwkt_domsg(BRIDGE_CFGPORT, &bc_msg.base.lmsg, 0);
sys/net/bridge/if_bridge.c
4542
netisr_forwardmsg(&amsg->base, mycpuid + 1);
sys/net/bridge/if_bridge.c
4553
netmsg_init(&amsg.base, NULL, &curthread->td_msgport,
sys/net/bridge/if_bridge.c
4559
netisr_domsg(&amsg.base, 0);
sys/net/bridge/if_bridge.c
4585
netisr_forwardmsg(&dmsg->base, mycpuid + 1);
sys/net/bridge/if_bridge.c
4596
netmsg_init(&dmsg.base, NULL, &curthread->td_msgport,
sys/net/bridge/if_bridge.c
4602
netisr_domsg(&dmsg.base, 0);
sys/net/dummynet/ip_dummynet_glue.c
112
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport,
sys/net/dummynet/ip_dummynet_glue.c
116
lwkt_sendmsg(pkt->msgport, &nmp->base.lmsg);
sys/net/dummynet/ip_dummynet_glue.c
148
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport, 0, dispatch);
sys/net/dummynet/ip_dummynet_glue.c
151
lwkt_sendmsg(pkt->msgport, &nmp->base.lmsg);
sys/net/dummynet/ip_dummynet_glue.c
93
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport,
sys/net/dummynet/ip_dummynet_glue.c
98
lwkt_sendmsg(port, &nmp->base.lmsg);
sys/net/dummynet3/ip_dummynet3_glue.c
112
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport,
sys/net/dummynet3/ip_dummynet3_glue.c
116
lwkt_sendmsg(pkt->msgport, &nmp->base.lmsg);
sys/net/dummynet3/ip_dummynet3_glue.c
148
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport, 0, dispatch);
sys/net/dummynet3/ip_dummynet3_glue.c
151
lwkt_sendmsg(pkt->msgport, &nmp->base.lmsg);
sys/net/dummynet3/ip_dummynet3_glue.c
93
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport,
sys/net/dummynet3/ip_dummynet3_glue.c
98
lwkt_sendmsg(port, &nmp->base.lmsg);
sys/net/gre/if_gre.c
773
struct gre_softc *sc = msg->base.lmsg.u.ms_resultp;
sys/net/gre/if_gre.c
786
netisr_replymsg(&msg->base, error);
sys/net/if.c
1067
netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/if.c
1070
netisr_domsg_global(&msg.base);
sys/net/if.c
1722
struct netmsg_base base;
sys/net/if.c
1764
netisr_replymsg(&nmsg->base, 0);
sys/net/if.c
1805
netisr_replymsg(&nmsg->base, 0);
sys/net/if.c
1823
netmsg_init(&msg.base, NULL, &curthread->td_msgport, 0,
sys/net/if.c
1826
netisr_domsg(&msg.base, 0);
sys/net/if.c
1840
netmsg_init(&msg.base, NULL, &curthread->td_msgport, 0,
sys/net/if.c
1843
netisr_domsg(&msg.base, 0);
sys/net/if.c
350
struct lwkt_msg *lmsg = &msg->base.lmsg;
sys/net/if.c
3518
netisr_forwardmsg_all(&nmsg->base, cpu + 1);
sys/net/if.c
3526
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/if.c
3532
netisr_domsg(&msg.base, 0);
sys/net/if.c
3556
netisr_forwardmsg_all(&nmsg->base, cpu + 1);
sys/net/if.c
3564
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/if.c
3569
netisr_domsg(&msg.base, 0);
sys/net/if.c
3578
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/if.c
3586
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/if.c
3590
netisr_domsg(&msg.base, 0);
sys/net/if.c
875
netisr_replymsg(&nmsg->base, 0);
sys/net/if.c
908
struct netmsg_base base;
sys/net/if.c
911
netmsg_init(&base, NULL, &curthread->td_msgport, 0,
sys/net/if.c
913
base.lmsg.u.ms_resultp = ifq;
sys/net/if.c
917
lwkt_domsg(netisr_cpuport(cpu), &base.lmsg, 0);
sys/net/if.c
921
struct netmsg_base base;
sys/net/if.c
94
struct netmsg_base base;
sys/net/if.c
941
netisr_forwardmsg(&msg->base, cpu + 1);
sys/net/if_ethersubr.c
1456
netmsg_init(&pmsg->base, NULL, &netisr_apanic_rport,
sys/net/if_ethersubr.c
1459
pmsg->base.lmsg.u.ms_result = isr;
sys/net/if_ethersubr.c
1467
&pmsg->base.lmsg);
sys/net/if_ethersubr.c
1471
&pmsg->base.lmsg);
sys/net/if_ethersubr.c
1673
netmsg_init(&pmsg->base, NULL, &netisr_apanic_rport,
sys/net/if_ethersubr.c
1676
pmsg->base.lmsg.u.ms_result = isr;
sys/net/if_ethersubr.c
1678
lwkt_sendmsg(netisr_hashport(m->m_pkthdr.hash), &pmsg->base.lmsg);
sys/net/if_poll.c
1070
netisr_replymsg(&msg->base, 0);
sys/net/if_poll.c
1168
netisr_replymsg(&nmsg->base, 0);
sys/net/if_poll.c
1188
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/if_poll.c
1190
msg.base.lmsg.u.ms_result = burst_max;
sys/net/if_poll.c
1193
return netisr_domsg(&msg.base, io_ctx->poll_cpuid);
sys/net/if_poll.c
1213
netisr_replymsg(&nmsg->base, 0);
sys/net/if_poll.c
1229
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/if_poll.c
1231
msg.base.lmsg.u.ms_result = each_burst;
sys/net/if_poll.c
1234
return netisr_domsg(&msg.base, io_ctx->poll_cpuid);
sys/net/if_poll.c
1481
netisr_replymsg(&nmsg->base, 0);
sys/net/if_poll.c
1521
netisr_replymsg(&nmsg->base, 0);
sys/net/if_poll.c
1559
netisr_replymsg(&nmsg->base, 0);
sys/net/if_poll.c
199
struct netmsg_base base;
sys/net/if_poll.c
311
netisr_sendmsg_oncpu(&msg->base);
sys/net/if_poll.c
364
netisr_forwardmsg(&msg->base, cpu + 1);
sys/net/if_poll.c
488
netisr_forwardmsg(&nmsg->base, cpuid + 1);
sys/net/if_poll.c
491
netisr_replymsg(&nmsg->base, error);
sys/net/if_poll.c
512
netisr_forwardmsg(&nmsg->base, cpuid + 1);
sys/net/if_poll.c
552
netisr_replymsg(&msg->base, 0);
sys/net/if_poll.c
836
netisr_replymsg(&msg->base, 0);
sys/net/if_poll.c
930
netisr_replymsg(&msg->base, 0);
sys/net/if_poll.c
999
netisr_replymsg(&msg->base, 0);
sys/net/ipfw/ip_fw2.c
1946
netisr_replymsg(&nm->base, 0);
sys/net/ipfw/ip_fw2.c
1996
netisr_replymsg(&nm->base, 0);
sys/net/ipfw/ip_fw2.c
2486
netisr_replymsg(&nm->base, 0);
sys/net/ipfw/ip_fw2.c
2507
netisr_replymsg(&nm->base, 0);
sys/net/ipfw/ip_fw2.c
287
struct netmsg_base base;
sys/net/ipfw/ip_fw2.c
297
struct netmsg_base base;
sys/net/ipfw/ip_fw2.c
306
struct netmsg_base base;
sys/net/ipfw/ip_fw2.c
313
struct netmsg_base base;
sys/net/ipfw/ip_fw2.c
320
struct netmsg_base base;
sys/net/ipfw/ip_fw2.c
3276
netmsg_init(&nm->base, NULL, &netisr_apanic_rport, 0,
sys/net/ipfw/ip_fw2.c
328
struct netmsg_base base;
sys/net/ipfw/ip_fw2.c
3283
netisr_sendmsg(&nm->base, cpuid);
sys/net/ipfw/ip_fw2.c
334
struct netmsg_base base;
sys/net/ipfw/ip_fw2.c
4589
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
4607
netisr_forwardmsg(&fwmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
4667
netmsg_init(&fwmsg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/ipfw/ip_fw2.c
4679
netisr_domsg_global(&fwmsg.base);
sys/net/ipfw/ip_fw2.c
4682
rule = fwmsg.base.lmsg.u.ms_resultp;
sys/net/ipfw/ip_fw2.c
4686
netmsg_init(&fwmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw/ip_fw2.c
4689
netisr_domsg_global(&fwmsg.base);
sys/net/ipfw/ip_fw2.c
4785
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
4897
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
4923
netmsg_init(&dmsg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/ipfw/ip_fw2.c
4929
netisr_domsg_global(&dmsg.base);
sys/net/ipfw/ip_fw2.c
4971
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5001
netmsg_init(&dmsg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/ipfw/ip_fw2.c
5004
netisr_domsg_global(&dmsg.base);
sys/net/ipfw/ip_fw2.c
5031
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5056
nmsg = &dmsg.base;
sys/net/ipfw/ip_fw2.c
5081
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5093
nmsg = &dmsg.base;
sys/net/ipfw/ip_fw2.c
5118
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5130
nmsg = &dmsg.base;
sys/net/ipfw/ip_fw2.c
5252
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5272
nmsg = &zmsg.base;
sys/net/ipfw/ip_fw2.c
5776
netisr_replymsg(&nm->base, 0);
sys/net/ipfw/ip_fw2.c
5778
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5826
netmsg_init(&nm.base, NULL, &curthread->td_msgport,
sys/net/ipfw/ip_fw2.c
5831
netisr_domsg_global(&nm.base);
sys/net/ipfw/ip_fw2.c
5856
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5891
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5955
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5979
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
5996
netmsg_init(&nm.base, NULL, &curthread->td_msgport,
sys/net/ipfw/ip_fw2.c
5998
netisr_domsg_global(&nm.base);
sys/net/ipfw/ip_fw2.c
6008
netmsg_init(&nm.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/ipfw/ip_fw2.c
6014
netisr_domsg_global(&nm.base);
sys/net/ipfw/ip_fw2.c
6165
netisr_replymsg(&nm->base, EEXIST);
sys/net/ipfw/ip_fw2.c
6176
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
6193
netisr_replymsg(&nm->base, ESRCH);
sys/net/ipfw/ip_fw2.c
6200
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
6244
netmsg_init(&nm.base, NULL, &curthread->td_msgport,
sys/net/ipfw/ip_fw2.c
6247
netmsg_init(&nm.base, NULL, &curthread->td_msgport,
sys/net/ipfw/ip_fw2.c
6254
return (netisr_domsg_global(&nm.base));
sys/net/ipfw/ip_fw2.c
6278
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
6295
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
6364
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
6389
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
6454
netmsg_init(&nm.base, NULL, &curthread->td_msgport,
sys/net/ipfw/ip_fw2.c
6457
netisr_domsg_global(&nm.base);
sys/net/ipfw/ip_fw2.c
6477
netmsg_init(&nm.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/ipfw/ip_fw2.c
6480
netisr_domsg_global(&nm.base);
sys/net/ipfw/ip_fw2.c
6497
netisr_replymsg(&nmsg->base, 0);
sys/net/ipfw/ip_fw2.c
6780
netisr_replymsg(&nm->base, 0);
sys/net/ipfw/ip_fw2.c
6808
netisr_replymsg(&nm->base, 0);
sys/net/ipfw/ip_fw2.c
6887
netmsg_init(&nm->base, NULL, &netisr_apanic_rport, 0,
sys/net/ipfw/ip_fw2.c
6891
netisr_sendmsg(&nm->base, cpuid);
sys/net/ipfw/ip_fw2.c
7159
netisr_replymsg(&nmsg->base, 0);
sys/net/ipfw/ip_fw2.c
7289
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
7298
netisr_replymsg(&nmsg->base, 0);
sys/net/ipfw/ip_fw2.c
7344
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
7389
netmsg_init(&fwmsg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/ipfw/ip_fw2.c
7391
netisr_domsg_global(&fwmsg.base);
sys/net/ipfw/ip_fw2.c
7435
netisr_replymsg(&nmsg->base, error);
sys/net/ipfw/ip_fw2.c
7474
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/net/ipfw/ip_fw2.c
7521
netisr_replymsg(&nmsg->base, error);
sys/net/ipfw/ip_fw2.c
7530
netisr_replymsg(&nmsg->base, 0);
sys/net/ipfw3/ip_fw3.c
103
struct netmsg_base base;
sys/net/ipfw3/ip_fw3.c
112
struct netmsg_base base;
sys/net/ipfw3/ip_fw3.c
124
struct netmsg_base base;
sys/net/ipfw3/ip_fw3.c
1445
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3.c
1460
netmsg_init(&fwmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3/ip_fw3.c
1462
netisr_domsg(&fwmsg.base, 0);
sys/net/ipfw3/ip_fw3.c
692
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3.c
736
nmsg = &fwmsg.base;
sys/net/ipfw3/ip_fw3.c
790
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3.c
814
netmsg_init(&dmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3/ip_fw3.c
817
netisr_domsg(&dmsg.base, 0);
sys/net/ipfw3/ip_fw3.c
840
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3.c
857
nmsg = &dmsg.base;
sys/net/ipfw3/ip_fw3.c
894
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3.c
912
nmsg = &zmsg.base;
sys/net/ipfw3/ip_fw3_set.c
109
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3/ip_fw3_set.c
114
netisr_domsg(&msg.base, 0);
sys/net/ipfw3/ip_fw3_set.c
129
netisr_forwardmsg_all(&smsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3_set.c
144
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3/ip_fw3_set.c
148
netisr_domsg(&msg.base, 0);
sys/net/ipfw3/ip_fw3_set.c
166
netisr_forwardmsg_all(&smsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3_set.c
181
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3/ip_fw3_set.c
186
netisr_domsg(&msg.base, 0);
sys/net/ipfw3/ip_fw3_set.c
234
netisr_forwardmsg_all(&smsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3_set.c
246
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3/ip_fw3_set.c
250
netisr_domsg(&msg.base, 0);
sys/net/ipfw3/ip_fw3_set.c
94
netisr_forwardmsg_all(&smsg->base, mycpuid + 1);
sys/net/ipfw3/ip_fw3_set.h
41
struct netmsg_base base;
sys/net/ipfw3_basic/ip_fw3_state.c
339
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_state.c
345
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_state.c
402
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_state.c
581
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_state.c
631
netisr_forwardmsg_all(&msg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_state.c
678
netisr_forwardmsg_all(&msg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_sync.h
108
struct netmsg_base base;
sys/net/ipfw3_basic/ip_fw3_table.c
111
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_table.c
133
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_table.c
187
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_table.c
224
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_table.c
249
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_table.c
267
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_table.c
307
netmsg_init(&tbmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3_basic/ip_fw3_table.c
309
netisr_domsg(&tbmsg.base, 0);
sys/net/ipfw3_basic/ip_fw3_table.c
322
netmsg_init(&tbmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3_basic/ip_fw3_table.c
324
netisr_domsg(&tbmsg.base, 0);
sys/net/ipfw3_basic/ip_fw3_table.c
469
netmsg_init(&tbmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3_basic/ip_fw3_table.c
471
netisr_domsg(&tbmsg.base, 0);
sys/net/ipfw3_basic/ip_fw3_table.c
484
netmsg_init(&tbmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3_basic/ip_fw3_table.c
486
netisr_domsg(&tbmsg.base, 0);
sys/net/ipfw3_basic/ip_fw3_table.c
499
netmsg_init(&tbmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3_basic/ip_fw3_table.c
501
netisr_domsg(&tbmsg.base, 0);
sys/net/ipfw3_basic/ip_fw3_table.c
514
netmsg_init(&tbmsg.base, NULL, &curthread->td_msgport,
sys/net/ipfw3_basic/ip_fw3_table.c
516
netisr_domsg(&tbmsg.base, 0);
sys/net/ipfw3_basic/ip_fw3_table.c
572
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_table.c
588
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_basic/ip_fw3_table.h
83
struct netmsg_base base;
sys/net/ipfw3_nat/ip_fw3_nat.c
1046
netmsg_init(&msg1->base, NULL, &curthread->td_msgport,
sys/net/ipfw3_nat/ip_fw3_nat.c
1049
netisr_domsg(&msg1->base, 0);
sys/net/ipfw3_nat/ip_fw3_nat.c
387
netmsg_init(&msg->base, NULL, &curthread->td_msgport,
sys/net/ipfw3_nat/ip_fw3_nat.c
407
netisr_sendmsg(&msg->base, nextcpu);
sys/net/ipfw3_nat/ip_fw3_nat.c
766
netisr_forwardmsg_all(&msg->base, mycpuid + 1);
sys/net/ipfw3_nat/ip_fw3_nat.c
779
netmsg_init(&msg->base, NULL, &curthread->td_msgport, 0,
sys/net/ipfw3_nat/ip_fw3_nat.c
781
netisr_domsg(&msg->base, 0);
sys/net/ipfw3_nat/ip_fw3_nat.c
849
netisr_forwardmsg_all(&nat_del_msg->base, mycpuid + 1);
sys/net/ipfw3_nat/ip_fw3_nat.c
858
netmsg_init(&msg->base, NULL, &curthread->td_msgport,
sys/net/ipfw3_nat/ip_fw3_nat.c
861
netisr_domsg(&msg->base, 0);
sys/net/ipfw3_nat/ip_fw3_nat.c
872
netmsg_init(&msg->base, NULL, &curthread->td_msgport,
sys/net/ipfw3_nat/ip_fw3_nat.c
875
netisr_domsg(&msg->base, 0);
sys/net/ipfw3_nat/ip_fw3_nat.c
915
netisr_forwardmsg_all(&msg->base, mycpuid + 1);
sys/net/ipfw3_nat/ip_fw3_nat.c
922
netisr_forwardmsg_all(&msg->base, mycpuid + 1);
sys/net/ipfw3_nat/ip_fw3_nat.c
998
netisr_forwardmsg_all(&nmsg->base, mycpuid + 1);
sys/net/ipfw3_nat/ip_fw3_nat.h
143
struct netmsg_base base;
sys/net/ipfw3_nat/ip_fw3_nat.h
148
struct netmsg_base base;
sys/net/ipfw3_nat/ip_fw3_nat.h
153
struct netmsg_base base;
sys/net/lagg/if_lagg.c
1786
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport,
sys/net/lagg/if_lagg.c
1789
nmp->base.lmsg.u.ms_resultp = ifp_p;
sys/net/lagg/if_lagg.c
1791
lwkt_sendmsg(p_port, &nmp->base.lmsg);
sys/net/netisr.c
147
sofree(((netmsg_t)msg)->base.nm_so);
sys/net/netisr.c
434
netmsg_init(&pmsg->base, NULL, &netisr_apanic_rport,
sys/net/netisr.c
437
pmsg->base.lmsg.u.ms_result = num;
sys/net/netisr.c
438
lwkt_sendmsg(port, &pmsg->base.lmsg);
sys/net/netisr.c
474
netmsg_init(&pmsg->base, NULL, &netisr_apanic_rport,
sys/net/netisr.c
477
pmsg->base.lmsg.u.ms_result = num;
sys/net/netisr.c
478
ni->ni_handler((netmsg_t)&pmsg->base);
sys/net/netisr.c
594
netisr_forwardmsg_all(&nm->base, cpuid + 1);
sys/net/netisr.c
602
netmsg_init(&nm.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/netisr.c
607
netisr_domsg_global(&nm.base);
sys/net/netisr.c
631
netisr_forwardmsg_all(&nm->base, cpuid + 1);
sys/net/netisr.c
639
netmsg_init(&nm.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/netisr.c
642
netisr_domsg_global(&nm.base);
sys/net/netisr.c
775
netmsg_init(&msg->base, NULL, &netisr_afree_rport, 0,
sys/net/netisr.c
787
lwkt_sendmsg(netisr_cpuport(i), &br->br_msgs[i]->base.lmsg);
sys/net/netisr.c
79
struct netmsg_base base;
sys/net/netisr.c
86
struct netmsg_base base;
sys/net/netmap/netmap_mem2.c
1031
ssize_t base; /* handy for relative offsets between rings and nifp */
sys/net/netmap/netmap_mem2.c
1065
base = netmap_if_offset(na->nm_mem, nifp);
sys/net/netmap/netmap_mem2.c
1068
netmap_ring_offset(na->nm_mem, na->tx_rings[i].ring) - base;
sys/net/netmap/netmap_mem2.c
1072
netmap_ring_offset(na->nm_mem, na->rx_rings[i].ring) - base;
sys/net/netmap/netmap_mem2.c
234
const char *base = p->lut[i].vaddr;
sys/net/netmap/netmap_mem2.c
235
ssize_t relofs = (const char *) vaddr - base;
sys/net/netmap/netmap_mem2.c
346
void *base = p->lut[i * p->_clustentries].vaddr;
sys/net/netmap/netmap_mem2.c
347
ssize_t relofs = (ssize_t) vaddr - (ssize_t) base;
sys/net/netmap/netmap_mem2.c
350
if (vaddr < base || relofs >= p->_clustsize)
sys/net/netmsg.h
105
struct netmsg_base base;
sys/net/netmsg.h
112
struct netmsg_base base;
sys/net/netmsg.h
118
struct netmsg_base base;
sys/net/netmsg.h
125
struct netmsg_base base;
sys/net/netmsg.h
133
struct netmsg_base base;
sys/net/netmsg.h
144
struct netmsg_base base;
sys/net/netmsg.h
148
struct netmsg_base base;
sys/net/netmsg.h
153
struct netmsg_base base;
sys/net/netmsg.h
159
struct netmsg_base base;
sys/net/netmsg.h
168
struct netmsg_base base;
sys/net/netmsg.h
183
struct netmsg_base base;
sys/net/netmsg.h
190
struct netmsg_base base;
sys/net/netmsg.h
198
struct netmsg_base base;
sys/net/netmsg.h
202
struct netmsg_base base;
sys/net/netmsg.h
206
struct netmsg_base base;
sys/net/netmsg.h
214
struct netmsg_base base;
sys/net/netmsg.h
219
struct netmsg_base base;
sys/net/netmsg.h
228
struct netmsg_base base;
sys/net/netmsg.h
234
struct netmsg_base base;
sys/net/netmsg.h
253
struct netmsg_base base;
sys/net/netmsg.h
258
struct netmsg_base base;
sys/net/netmsg.h
262
struct netmsg_base base;
sys/net/netmsg.h
267
struct netmsg_base base;
sys/net/netmsg.h
277
struct netmsg_base base;
sys/net/netmsg.h
287
struct netmsg_base base;
sys/net/netmsg.h
295
struct netmsg_base base;
sys/net/netmsg.h
309
struct netmsg_base base; /* base embedded */
sys/net/netmsg.h
83
struct netmsg_base base;
sys/net/netmsg.h
89
struct netmsg_base base;
sys/net/netmsg.h
97
struct netmsg_base base;
sys/net/pf/if_pfsync.c
1702
netmsg_init(&msg->base, NULL, &netisr_apanic_rport, 0,
sys/net/pf/if_pfsync.c
1706
netisr_sendmsg(&msg->base, 0);
sys/net/pf/pf.c
3331
struct netmsg_base base;
sys/net/pf/pf.c
3357
lwkt_replymsg(&rmsg->base.lmsg, 0);
sys/net/pf/pf.c
3422
netmsg_init(&msg->base, NULL, &curthread->td_msgport,
sys/net/pf/pf.c
3482
&msg->base.lmsg, 0);
sys/net/pf/pf_if.c
532
struct netmsg_base base;
sys/net/pf/pf_if.c
616
netisr_replymsg(&nmsg->base, 0);
sys/net/pf/pf_if.c
624
netmsg_init(&msg.base, NULL, &curthread->td_msgport, 0,
sys/net/pf/pf_if.c
629
netisr_domsg(&msg.base, 0);
sys/net/pfil.c
249
lwkt_replymsg(&nmsg->base.lmsg, err);
sys/net/pfil.c
266
nmsg = &pfilmsg.base;
sys/net/pfil.c
356
lwkt_replymsg(&nmsg->base.lmsg, err);
sys/net/pfil.c
369
nmsg = &pfilmsg.base;
sys/net/pfil.c
61
struct netmsg_base base;
sys/net/radix.c
1079
struct radix_node *rn, *base, *next, *last;
sys/net/radix.c
1130
base = rn;
sys/net/radix.c
1148
while ((rn = base) != NULL) {
sys/net/radix.c
1149
base = rn->rn_dupedkey;
sys/net/radix.c
1169
struct radix_node *rn, *base, *next;
sys/net/radix.c
1190
base = rn;
sys/net/radix.c
1200
while ((rn = base)) {
sys/net/radix.c
1201
base = rn->rn_dupedkey;
sys/net/radix.c
1372
netisr_forwardmsg(&msg->base, cpu + 1);
sys/net/raw_usrreq.c
165
struct rawcb *rp = sotorawcb(msg->base.nm_so);
sys/net/raw_usrreq.c
172
soisdisconnected(msg->base.nm_so);
sys/net/raw_usrreq.c
185
struct socket *so = msg->base.nm_so;
sys/net/raw_usrreq.c
225
struct rawcb *rp = sotorawcb(msg->base.nm_so);
sys/net/raw_usrreq.c
242
struct socket *so = msg->base.nm_so;
sys/net/raw_usrreq.c
268
struct rawcb *rp = sotorawcb(msg->base.nm_so);
sys/net/raw_usrreq.c
290
struct socket *so = msg->base.nm_so;
sys/net/raw_usrreq.c
340
struct rawcb *rp = sotorawcb(msg->base.nm_so);
sys/net/raw_usrreq.c
346
socantsendmore(msg->base.nm_so);
sys/net/raw_usrreq.c
357
struct rawcb *rp = sotorawcb(msg->base.nm_so);
sys/net/route.c
159
netisr_forwardmsg(&msg->base, cpu + 1);
sys/net/route.c
1636
struct netmsg_base base;
sys/net/route.c
1655
netmsg_init(&msg.base, NULL, &curthread->td_msgport, flags,
sys/net/route.c
1663
return (netisr_domsg_global(&msg.base));
sys/net/route.c
1691
netisr_replymsg(&rmsg->base, EAFNOSUPPORT);
sys/net/route.c
1732
netisr_replymsg(&rmsg->base, 0);
sys/net/route.c
1751
netisr_replymsg(&rmsg->base, error);
sys/net/route.c
1757
netisr_forwardmsg_error(&rmsg->base, mycpuid + 1, error);
sys/net/route.c
1802
netisr_replymsg(&msg->base, ENOBUFS);
sys/net/route.c
1805
netisr_forwardmsg(&msg->base, mycpuid + 1);
sys/net/route.c
1856
struct netmsg_base base;
sys/net/route.c
1896
netisr_forwardmsg(&rmsg->base, cpu + 1);
sys/net/route.c
1911
netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/net/route.c
1916
netisr_domsg_global(&msg.base);
sys/net/route.c
317
netisr_replymsg(&msg->base, 0);
sys/net/route.c
445
struct netmsg_base base;
sys/net/route.c
467
netmsg_init(&msg.base, NULL, &curthread->td_msgport,
sys/net/route.c
474
error = netisr_domsg_global(&msg.base);
sys/net/route.c
491
netisr_forwardmsg(&msg->base, mycpuid + 1);
sys/net/route.c
701
struct netmsg_base base;
sys/net/route.c
717
netmsg_init(&msg.base, NULL, &curthread->td_msgport, flags,
sys/net/route.c
719
msg.base.lmsg.ms_error = -1;
sys/net/route.c
724
return (netisr_domsg_global(&msg.base));
sys/net/route.c
760
if (rmsg->base.lmsg.ms_error < 0 || error == 0)
sys/net/route.c
761
rmsg->base.lmsg.ms_error = error;
sys/net/route.c
769
netisr_replymsg(&rmsg->base, error);
sys/net/route.c
771
netisr_forwardmsg_error(&rmsg->base, mycpuid + 1,
sys/net/route.c
772
rmsg->base.lmsg.ms_error);
sys/net/rtsock.c
139
struct netmsg_base base;
sys/net/rtsock.c
1818
lwkt_replymsg(&nmsg->base.lmsg, error);
sys/net/rtsock.c
1839
netmsg_init(&nmsg.base, NULL,
sys/net/rtsock.c
1848
&nmsg.base.lmsg, 0);
sys/net/rtsock.c
249
struct socket *so = msg->base.nm_so;
sys/net/rtsock.c
323
struct socket *so = msg->base.nm_so;
sys/net/rtsock.c
443
family = pmsg->base.lmsg.u.ms_result;
sys/net/rtsock.c
466
netmsg_init(&pmsg->base, NULL, &netisr_apanic_rport,
sys/net/rtsock.c
469
pmsg->base.lmsg.u.ms_result = family;
sys/net/rtsock.c
471
lwkt_sendmsg(port, &pmsg->base.lmsg);
sys/net/rtsock.c
483
struct socket *so = msg->ctloutput.base.nm_so;
sys/net/rtsock.c
572
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/net/vlan/if_vlan.c
1061
lwkt_replymsg(&vmsg->base.lmsg, error);
sys/net/vlan/if_vlan.c
1073
netmsg_init(&vmsg.base, NULL, &curthread->td_msgport,
sys/net/vlan/if_vlan.c
1077
return lwkt_domsg(netisr_cpuport(0), &vmsg.base.lmsg, 0);
sys/net/vlan/if_vlan.c
1093
lwkt_replymsg(&vmsg->base.lmsg, error);
sys/net/vlan/if_vlan.c
1105
netmsg_init(&vmsg.base, NULL, &curthread->td_msgport,
sys/net/vlan/if_vlan.c
1109
return lwkt_domsg(netisr_cpuport(0), &vmsg.base.lmsg, 0);
sys/net/vlan/if_vlan.c
166
struct netmsg_base base;
sys/net/vlan/if_vlan.c
428
lwkt_replymsg(&vmsg->base.lmsg, 0);
sys/net/vlan/if_vlan.c
440
netmsg_init(&vmsg.base, NULL, &curthread->td_msgport,
sys/net/vlan/if_vlan.c
444
lwkt_domsg(netisr_cpuport(0), &vmsg.base.lmsg, 0);
sys/net/vlan/if_vlan.c
569
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport,
sys/net/vlan/if_vlan.c
572
nmp->base.lmsg.u.ms_resultp = ifp_p;
sys/net/vlan/if_vlan.c
574
lwkt_sendmsg(p_port, &nmp->base.lmsg);
sys/net/vlan/if_vlan.c
657
netisr_forwardmsg(&vmsg->base, cpu + 1);
sys/net/vlan/if_vlan.c
683
netmsg_init(&vmsg.base, NULL, &curthread->td_msgport,
sys/net/vlan/if_vlan.c
688
netisr_domsg(&vmsg.base, 0);
sys/net/vlan/if_vlan.c
779
lwkt_replymsg(&vmsg->base.lmsg, error);
sys/net/vlan/if_vlan.c
791
netmsg_init(&vmsg.base, NULL, &curthread->td_msgport,
sys/net/vlan/if_vlan.c
797
return lwkt_domsg(netisr_cpuport(0), &vmsg.base.lmsg, 0);
sys/net/vlan/if_vlan.c
816
netisr_forwardmsg(&vmsg->base, cpu + 1);
sys/net/vlan/if_vlan.c
833
netmsg_init(&vmsg.base, NULL, &curthread->td_msgport,
sys/net/vlan/if_vlan.c
838
netisr_domsg(&vmsg.base, 0);
sys/net/vlan/if_vlan.c
919
lwkt_replymsg(&vmsg->base.lmsg, error);
sys/net/vlan/if_vlan.c
931
netmsg_init(&vmsg.base, NULL, &curthread->td_msgport,
sys/net/vlan/if_vlan.c
935
return lwkt_domsg(netisr_cpuport(0), &vmsg.base.lmsg, 0);
sys/net/zlib.c
2252
int base = desc->stat_desc->extra_base;
sys/net/zlib.c
2279
if (n >= base) xbits = extra[n-base];
sys/net/zlib.c
4376
r.base = *p++; /* simple code is just the value */
sys/net/zlib.c
4381
r.base = d[*p++ - s];
sys/net/zlib.c
4753
c->sub.lit = t->base;
sys/net/zlib.c
4754
Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
sys/net/zlib.c
4756
"inflate: literal 0x%02x\n", t->base));
sys/net/zlib.c
4763
c->len = t->base;
sys/net/zlib.c
4801
c->sub.copy.dist = t->base;
sys/net/zlib.c
5034
Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
sys/net/zlib.c
5036
"inflate: * literal 0x%02x\n", t->base));
sys/net/zlib.c
5037
*q++ = (Byte)t->base;
sys/net/zlib.c
5047
c = t->base + ((uInt)b & inflate_mask[e]);
sys/net/zlib.c
5061
d = t->base + ((uInt)b & inflate_mask[e]);
sys/net/zlib.c
5108
Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
sys/net/zlib.c
5110
"inflate: * literal 0x%02x\n", t->base));
sys/net/zlib.c
5111
*q++ = (Byte)t->base;
sys/netbt/hci_socket.c
555
soisdisconnected(msg->abort.base.nm_so);
sys/netbt/hci_socket.c
563
struct socket *so = msg->detach.base.nm_so;
sys/netbt/hci_socket.c
580
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netbt/hci_socket.c
586
struct socket *so = msg->disconnect.base.nm_so;
sys/netbt/hci_socket.c
604
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netbt/hci_socket.c
615
lwkt_replymsg(&msg->control.base.lmsg, error);
sys/netbt/hci_socket.c
621
struct socket *so = msg->attach.base.nm_so;
sys/netbt/hci_socket.c
660
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netbt/hci_socket.c
666
struct socket *so = msg->bind.base.nm_so;
sys/netbt/hci_socket.c
693
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netbt/hci_socket.c
699
struct socket *so = msg->connect.base.nm_so;
sys/netbt/hci_socket.c
726
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netbt/hci_socket.c
732
struct socket *so = msg->peeraddr.base.nm_so;
sys/netbt/hci_socket.c
745
lwkt_replymsg(&msg->connect.base.lmsg, 0);
sys/netbt/hci_socket.c
751
struct socket *so = msg->sockaddr.base.nm_so;
sys/netbt/hci_socket.c
764
lwkt_replymsg(&msg->connect.base.lmsg, 0);
sys/netbt/hci_socket.c
770
struct socket *so = msg->shutdown.base.nm_so;
sys/netbt/hci_socket.c
773
lwkt_replymsg(&msg->connect.base.lmsg, 0);
sys/netbt/hci_socket.c
779
struct socket *so = msg->send.base.nm_so;
sys/netbt/hci_socket.c
815
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netbt/hci_socket.c
824
struct socket *so = msg->ctloutput.base.nm_so;
sys/netbt/hci_socket.c
907
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netbt/l2cap_socket.c
143
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netbt/l2cap_socket.c
251
struct socket *so = msg->detach.base.nm_so;
sys/netbt/l2cap_socket.c
255
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netbt/l2cap_socket.c
265
struct socket *so = msg->abort.base.nm_so;
sys/netbt/l2cap_socket.c
278
struct socket *so = msg->disconnect.base.nm_so;
sys/netbt/l2cap_socket.c
285
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netbt/l2cap_socket.c
291
lwkt_replymsg(&msg->control.base.lmsg, EPASSTHROUGH);
sys/netbt/l2cap_socket.c
297
struct socket *so = msg->attach.base.nm_so;
sys/netbt/l2cap_socket.c
316
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netbt/l2cap_socket.c
322
struct socket *so = msg->bind.base.nm_so;
sys/netbt/l2cap_socket.c
338
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netbt/l2cap_socket.c
344
struct socket *so = msg->connect.base.nm_so;
sys/netbt/l2cap_socket.c
361
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netbt/l2cap_socket.c
367
struct socket *so = msg->peeraddr.base.nm_so;
sys/netbt/l2cap_socket.c
380
lwkt_replymsg(&msg->peeraddr.base.lmsg, error);
sys/netbt/l2cap_socket.c
386
struct socket *so = msg->sockaddr.base.nm_so;
sys/netbt/l2cap_socket.c
399
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netbt/l2cap_socket.c
405
struct socket *so = msg->shutdown.base.nm_so;
sys/netbt/l2cap_socket.c
409
lwkt_replymsg(&msg->shutdown.base.lmsg, 0);
sys/netbt/l2cap_socket.c
415
struct socket *so = msg->send.base.nm_so;
sys/netbt/l2cap_socket.c
459
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netbt/l2cap_socket.c
465
struct socket *so = msg->accept.base.nm_so;
sys/netbt/l2cap_socket.c
480
lwkt_replymsg(&msg->accept.base.lmsg, error);
sys/netbt/l2cap_socket.c
486
struct socket *so = msg->listen.base.nm_so;
sys/netbt/l2cap_socket.c
491
lwkt_replymsg(&msg->accept.base.lmsg, error);
sys/netbt/l2cap_socket.c
98
struct socket *so = msg->ctloutput.base.nm_so;
sys/netbt/rfcomm_socket.c
139
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netbt/rfcomm_socket.c
260
struct socket *so = msg->detach.base.nm_so;
sys/netbt/rfcomm_socket.c
264
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netbt/rfcomm_socket.c
274
struct socket *so = msg->abort.base.nm_so;
sys/netbt/rfcomm_socket.c
286
struct socket *so = msg->abort.base.nm_so;
sys/netbt/rfcomm_socket.c
292
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netbt/rfcomm_socket.c
298
lwkt_replymsg(&msg->control.base.lmsg, EPASSTHROUGH);
sys/netbt/rfcomm_socket.c
304
struct socket *so = msg->attach.base.nm_so;
sys/netbt/rfcomm_socket.c
330
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netbt/rfcomm_socket.c
336
struct socket *so = msg->bind.base.nm_so;
sys/netbt/rfcomm_socket.c
352
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netbt/rfcomm_socket.c
358
struct socket *so = msg->connect.base.nm_so;
sys/netbt/rfcomm_socket.c
375
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netbt/rfcomm_socket.c
381
struct socket *so = msg->peeraddr.base.nm_so;
sys/netbt/rfcomm_socket.c
394
lwkt_replymsg(&msg->peeraddr.base.lmsg, error);
sys/netbt/rfcomm_socket.c
400
struct socket *so = msg->sockaddr.base.nm_so;
sys/netbt/rfcomm_socket.c
413
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netbt/rfcomm_socket.c
419
struct socket *so = msg->shutdown.base.nm_so;
sys/netbt/rfcomm_socket.c
422
lwkt_replymsg(&msg->shutdown.base.lmsg, 0);
sys/netbt/rfcomm_socket.c
428
struct socket *so = msg->send.base.nm_so;
sys/netbt/rfcomm_socket.c
450
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netbt/rfcomm_socket.c
456
struct socket *so = msg->accept.base.nm_so;
sys/netbt/rfcomm_socket.c
469
lwkt_replymsg(&msg->accept.base.lmsg, error);
sys/netbt/rfcomm_socket.c
475
struct socket *so = msg->listen.base.nm_so;
sys/netbt/rfcomm_socket.c
480
lwkt_replymsg(&msg->listen.base.lmsg, error);
sys/netbt/rfcomm_socket.c
486
struct socket *so = msg->rcvd.base.nm_so;
sys/netbt/rfcomm_socket.c
491
lwkt_replymsg(&msg->rcvd.base.lmsg, error);
sys/netbt/rfcomm_socket.c
95
struct socket *so = msg->ctloutput.base.nm_so;
sys/netbt/sco_socket.c
142
lwkt_replymsg(&msg->ctloutput.base.lmsg, err);
sys/netbt/sco_socket.c
236
struct socket *so = msg->detach.base.nm_so;
sys/netbt/sco_socket.c
240
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netbt/sco_socket.c
250
struct socket *so = msg->abort.base.nm_so;
sys/netbt/sco_socket.c
262
struct socket *so = msg->abort.base.nm_so;
sys/netbt/sco_socket.c
269
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netbt/sco_socket.c
275
struct socket *so = msg->attach.base.nm_so;
sys/netbt/sco_socket.c
288
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netbt/sco_socket.c
294
struct socket *so = msg->bind.base.nm_so;
sys/netbt/sco_socket.c
310
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netbt/sco_socket.c
316
struct socket *so = msg->connect.base.nm_so;
sys/netbt/sco_socket.c
333
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netbt/sco_socket.c
339
struct socket *so = msg->peeraddr.base.nm_so;
sys/netbt/sco_socket.c
351
lwkt_replymsg(&msg->peeraddr.base.lmsg, error);
sys/netbt/sco_socket.c
357
struct socket *so = msg->sockaddr.base.nm_so;
sys/netbt/sco_socket.c
370
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netbt/sco_socket.c
376
socantsendmore(msg->shutdown.base.nm_so);
sys/netbt/sco_socket.c
377
lwkt_replymsg(&msg->shutdown.base.lmsg, 0);
sys/netbt/sco_socket.c
383
struct socket *so = msg->send.base.nm_so;
sys/netbt/sco_socket.c
419
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netbt/sco_socket.c
425
struct socket *so = msg->accept.base.nm_so;
sys/netbt/sco_socket.c
438
lwkt_replymsg(&msg->accept.base.lmsg, error);
sys/netbt/sco_socket.c
444
struct socket *so = msg->listen.base.nm_so;
sys/netbt/sco_socket.c
449
lwkt_replymsg(&msg->accept.base.lmsg, error);
sys/netbt/sco_socket.c
89
struct socket *so = msg->ctloutput.base.nm_so;
sys/netgraph/socket/ng_socket.c
167
struct socket *so = msg->attach.base.nm_so;
sys/netgraph/socket/ng_socket.c
181
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
187
struct socket *so = msg->detach.base.nm_so;
sys/netgraph/socket/ng_socket.c
197
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
203
struct socket *so = msg->send.base.nm_so;
sys/netgraph/socket/ng_socket.c
272
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
278
struct socket *so = msg->bind.base.nm_so;
sys/netgraph/socket/ng_socket.c
287
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
293
struct socket *so = msg->connect.base.nm_so;
sys/netgraph/socket/ng_socket.c
302
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
312
struct socket *so = msg->attach.base.nm_so;
sys/netgraph/socket/ng_socket.c
320
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
326
struct socket *so = msg->detach.base.nm_so;
sys/netgraph/socket/ng_socket.c
336
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
342
struct socket *so = msg->send.base.nm_so;
sys/netgraph/socket/ng_socket.c
407
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
413
struct socket *so = msg->connect.base.nm_so;
sys/netgraph/socket/ng_socket.c
423
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph/socket/ng_socket.c
432
struct socket *so = msg->sockaddr.base.nm_so;
sys/netgraph/socket/ng_socket.c
466
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1002
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1012
struct socket *so = msg->connect.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1057
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1067
struct socket *so = msg->control.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1443
lwkt_replymsg(&msg->control.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1453
struct socket *so = msg->ctloutput.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1528
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1538
struct socket *so = msg->detach.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1563
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1573
struct socket *so = msg->disconnect.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1591
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1611
struct socket *so = msg->send.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1692
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1702
struct socket *so = msg->sockaddr.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
1731
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
898
struct socket *so = msg->attach.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
955
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_hci_raw.c
965
struct socket *so = msg->bind.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
1870
struct socket *so = msg->abort.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
1905
lwkt_replymsg(&msg->accept.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
1915
struct socket *so = msg->attach.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2029
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2039
struct socket *so = msg->bind.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2095
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2105
struct socket *so = msg->connect.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2209
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2219
lwkt_replymsg(&msg->control.base.lmsg, EINVAL);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2229
struct socket *so = msg->ctloutput.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2331
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2341
struct socket *so = msg->detach.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2377
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2387
struct socket *so = msg->disconnect.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2427
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2437
struct socket *so = msg->listen.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2463
lwkt_replymsg(&msg->listen.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2473
struct socket *so = msg->peeraddr.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2499
lwkt_replymsg(&msg->peeraddr.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2509
struct socket *so = msg->send.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2576
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2639
struct socket *so = msg->sockaddr.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap.c
2665
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1151
lwkt_replymsg(&msg->control.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1161
struct socket *so = msg->detach.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1185
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1195
struct socket *so = msg->disconnect.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1214
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1224
struct socket *so = msg->peeraddr.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1253
lwkt_replymsg(&msg->peeraddr.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1269
lwkt_replymsg(&msg->send.base.lmsg, EOPNOTSUPP);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1279
struct socket *so = msg->sockaddr.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
1308
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
601
struct socket *so = msg->attach.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
651
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
661
struct socket *so = msg->bind.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
718
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
728
struct socket *so = msg->connect.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
807
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_l2cap_raw.c
817
struct socket *so = msg->control.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
1018
lwkt_replymsg(&msg->peeraddr.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
1028
struct socket *so = msg->send.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
1063
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
1073
struct socket *so = msg->sockaddr.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
1095
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
1717
netmsg_init(&msg.base, s->l2so, &curthread->td_msgport,
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
1724
error = lwkt_domsg(s->l2so->so_port, &msg.base.lmsg, 0);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
349
struct socket *so = msg->abort.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
382
struct socket *so = msg->attach.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
445
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
455
struct socket *so = msg->bind.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
510
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
520
struct socket *so = msg->connect.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
665
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
676
lwkt_replymsg(&msg->control.base.lmsg, EINVAL);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
686
struct socket *so = msg->ctloutput.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
742
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
752
struct socket *so = msg->detach.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
806
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
816
struct socket *so = msg->disconnect.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
866
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
876
struct socket *so = msg->listen.base.nm_so;
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
986
lwkt_replymsg(&msg->listen.base.lmsg, error);
sys/netgraph7/bluetooth/socket/ng_btsocket_rfcomm.c
996
struct socket *so = msg->peeraddr.base.nm_so;
sys/netgraph7/socket/ng_socket.c
177
struct socket *so = msg->attach.base.nm_so;
sys/netgraph7/socket/ng_socket.c
191
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netgraph7/socket/ng_socket.c
197
struct socket *so = msg->detach.base.nm_so;
sys/netgraph7/socket/ng_socket.c
202
lwkt_replymsg(&msg->detach.base.lmsg, 0);
sys/netgraph7/socket/ng_socket.c
208
struct socket *so = netmsg->send.base.nm_so;
sys/netgraph7/socket/ng_socket.c
339
apply->context = &netmsg->send.base.lmsg;
sys/netgraph7/socket/ng_socket.c
353
lwkt_replymsg(&netmsg->send.base.lmsg, error);
sys/netgraph7/socket/ng_socket.c
359
struct socket *so = msg->connect.base.nm_so;
sys/netgraph7/socket/ng_socket.c
368
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph7/socket/ng_socket.c
379
lwkt_replymsg(&msg->connect.base.lmsg, EINVAL);
sys/netgraph7/socket/ng_socket.c
389
struct socket *so = msg->attach.base.nm_so;
sys/netgraph7/socket/ng_socket.c
397
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph7/socket/ng_socket.c
403
struct socket *so = msg->detach.base.nm_so;
sys/netgraph7/socket/ng_socket.c
408
lwkt_replymsg(&msg->detach.base.lmsg, 0);
sys/netgraph7/socket/ng_socket.c
414
struct socket *so = msg->send.base.nm_so;
sys/netgraph7/socket/ng_socket.c
481
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netgraph7/socket/ng_socket.c
487
struct socket *so = msg->connect.base.nm_so;
sys/netgraph7/socket/ng_socket.c
496
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netgraph7/socket/ng_socket.c
505
struct socket *so = msg->sockaddr.base.nm_so;
sys/netgraph7/socket/ng_socket.c
545
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netinet/if_ether.c
1088
netmsg_init(&msg->base, NULL, &netisr_apanic_rport,
sys/netinet/if_ether.c
1094
lwkt_sendmsg(netisr_cpuport(1), &msg->base.lmsg);
sys/netinet/if_ether.c
1137
lwkt_forwardmsg(netisr_cpuport(nextcpu), &rmsg->base.lmsg);
sys/netinet/if_ether.c
1149
netmsg_init(&rmsg->base, NULL, &netisr_apanic_rport,
sys/netinet/if_ether.c
1155
lwkt_sendmsg(netisr_cpuport(0), &rmsg->base.lmsg);
sys/netinet/if_ether.c
1413
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/netinet/if_ether.c
193
netisr_replymsg(&nmsg->base, 0);
sys/netinet/if_ether.c
485
netmsg_init(&pmsg->base, NULL, &netisr_apanic_rport,
sys/netinet/if_ether.c
488
pmsg->base.lmsg.u.ms_resultp = ifp;
sys/netinet/if_ether.c
494
lwkt_sendmsg(netisr_cpuport(cpu), &pmsg->base.lmsg);
sys/netinet/igmp.c
422
netisr_replymsg(&nmsg->base, 0); /* reply ASAP */
sys/netinet/igmp.c
471
netisr_replymsg(&nmsg->base, 0); /* reply ASAP */
sys/netinet/in.c
242
netmsg_init(&msg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/in.c
248
lwkt_domsg(netisr_cpuport(0), &msg.base.lmsg, 0);
sys/netinet/in.c
249
return msg.base.lmsg.ms_error;
sys/netinet/in.c
277
netisr_forwardmsg_all(&msg->base, cpu + 1);
sys/netinet/in.c
301
netisr_forwardmsg_all(&msg->base, cpu + 1);
sys/netinet/in.c
326
netisr_forwardmsg_all(&msg->base, cpu + 1);
sys/netinet/in.c
350
netisr_forwardmsg_all(&msg->base, cpu + 1);
sys/netinet/in_pcb.c
1258
error = in_setsockaddr(msg->base.nm_so, msg->peeraddr.nm_nam);
sys/netinet/in_pcb.c
1292
error = in_setpeeraddr(msg->base.nm_so, msg->peeraddr.nm_nam);
sys/netinet/in_rmx.c
555
struct netmsg_base base;
sys/netinet/in_rmx.c
578
netisr_forwardmsg(&msg->base, cpu + 1);
sys/netinet/in_rmx.c
596
netmsg_init(&msg.base, NULL, &curthread->td_msgport, MSGF_PRIORITY,
sys/netinet/in_rmx.c
600
netisr_domsg_global(&msg.base);
sys/netinet/ip_carp.c
1300
if (cmsg->base.lmsg.ms_flags & MSGF_DONE)
sys/netinet/ip_carp.c
1301
lwkt_sendmsg_oncpu(netisr_cpuport(0), &cmsg->base.lmsg);
sys/netinet/ip_carp.c
1313
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
1717
if (cmsg->base.lmsg.ms_flags & MSGF_DONE)
sys/netinet/ip_carp.c
1718
lwkt_sendmsg_oncpu(netisr_cpuport(0), &cmsg->base.lmsg);
sys/netinet/ip_carp.c
1730
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
1935
lwkt_replymsg(&cmsg->base.lmsg, error);
sys/netinet/ip_carp.c
1949
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
1954
error = lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_carp.c
2384
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
2398
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
2402
lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_carp.c
2486
lwkt_replymsg(&cmsg->base.lmsg, error);
sys/netinet/ip_carp.c
2510
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
2515
error = lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_carp.c
2554
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
2567
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
2572
lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_carp.c
2590
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
2605
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
2610
lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_carp.c
2634
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
2653
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
2658
lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_carp.c
266
struct netmsg_base base;
sys/netinet/ip_carp.c
2677
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
2692
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
2696
lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_carp.c
642
netmsg_init(&sc->sc_ad_msg.base, NULL, &netisr_adone_rport,
sys/netinet/ip_carp.c
648
netmsg_init(&sc->sc_md_msg.base, NULL, &netisr_adone_rport,
sys/netinet/ip_carp.c
695
lwkt_dropmsg(&sc->sc_ad_msg.base.lmsg);
sys/netinet/ip_carp.c
696
lwkt_dropmsg(&sc->sc_md_msg.base.lmsg);
sys/netinet/ip_carp.c
699
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
709
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
713
lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_carp.c
903
lwkt_replymsg(&cmsg->base.lmsg, 0);
sys/netinet/ip_carp.c
915
netmsg_init(&cmsg.base, NULL, &curthread->td_msgport, 0,
sys/netinet/ip_carp.c
919
lwkt_domsg(netisr_cpuport(0), &cmsg.base.lmsg, 0);
sys/netinet/ip_divert.c
294
netmsg_init(&nmp->base, NULL, &netisr_apanic_rport,
sys/netinet/ip_divert.c
298
nmp->base.lmsg.u.ms_result32 = port; /* port is 16bits */
sys/netinet/ip_divert.c
300
nmp->base.lmsg.u.ms_result32 |= DIV_INPUT;
sys/netinet/ip_divert.c
302
nmp->base.lmsg.u.ms_result32 |= DIV_OUTPUT;
sys/netinet/ip_divert.c
304
lwkt_sendmsg(netisr_cpuport(0), &nmp->base.lmsg);
sys/netinet/ip_divert.c
378
struct socket *so = msg->attach.base.nm_so;
sys/netinet/ip_divert.c
410
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netinet/ip_divert.c
416
struct socket *so = msg->detach.base.nm_so;
sys/netinet/ip_divert.c
425
lwkt_replymsg(&msg->detach.base.lmsg, 0);
sys/netinet/ip_divert.c
441
struct socket *so = msg->disconnect.base.nm_so;
sys/netinet/ip_divert.c
452
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netinet/ip_divert.c
458
struct socket *so = msg->bind.base.nm_so;
sys/netinet/ip_divert.c
478
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netinet/ip_divert.c
484
struct socket *so = msg->shutdown.base.nm_so;
sys/netinet/ip_divert.c
490
lwkt_replymsg(&msg->shutdown.base.lmsg, 0);
sys/netinet/ip_divert.c
496
struct socket *so = msg->send.base.nm_so;
sys/netinet/ip_divert.c
507
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netinet/ip_flow.c
374
netisr_replymsg(&nmsg->base, 0); /* reply ASAP */
sys/netinet/ip_flow.c
489
netisr_forwardmsg(&nmsg->base, mycpuid + 1);
sys/netinet/ip_flow.c
511
netmsg_init(&amsg.base, NULL, &curthread->td_msgport,
sys/netinet/ip_flow.c
515
netisr_domsg_global(&amsg.base);
sys/netinet/ip_flow.c
540
netisr_forwardmsg(&nm->base, cpuid + 1);
sys/netinet/ip_flow.c
76
struct netmsg_base base;
sys/netinet/ip_icmp.c
253
netmsg_init(&msg->base, NULL, &netisr_apanic_rport, 0,
sys/netinet/ip_icmp.c
255
lwkt_sendmsg(netisr_cpuport(0), &msg->base.lmsg);
sys/netinet/ip_icmp.c
328
lwkt_forwardmsg(netisr_cpuport(nextcpu), &msg->base.lmsg);
sys/netinet/ip_icmp.c
348
netmsg_init(&msg->base, NULL, &netisr_apanic_rport, 0,
sys/netinet/ip_icmp.c
355
lwkt_sendmsg(netisr_cpuport(1), &msg->base.lmsg);
sys/netinet/ip_icmp.c
399
netmsg_init(&msg->base, NULL, &netisr_apanic_rport, 0,
sys/netinet/ip_icmp.c
406
lwkt_sendmsg(port, &msg->base.lmsg);
sys/netinet/ip_icmp.c
421
lwkt_forwardmsg(netisr_cpuport(nextcpu), &msg->base.lmsg);
sys/netinet/ip_icmp.c
437
netmsg_init(&msg->base, NULL, &netisr_apanic_rport, 0,
sys/netinet/ip_icmp.c
444
lwkt_sendmsg(netisr_cpuport(1), &msg->base.lmsg);
sys/netinet/ip_icmp.c
526
netmsg_init(&msg->base, NULL, &netisr_apanic_rport, 0,
sys/netinet/ip_icmp.c
528
lwkt_sendmsg(netisr_cpuport(0), &msg->base.lmsg);
sys/netinet/ip_icmp.c
544
lwkt_forwardmsg(netisr_cpuport(nextcpu), &msg->base.lmsg);
sys/netinet/ip_icmp.c
565
netmsg_init(&msg->base, NULL, &netisr_apanic_rport, 0,
sys/netinet/ip_icmp.c
572
lwkt_sendmsg(netisr_cpuport(1), &msg->base.lmsg);
sys/netinet/ip_id.c
75
netisr_replymsg(&msg->base, 0);
sys/netinet/ip_input.c
1389
netisr_replymsg(&nmsg->base, 0); /* reply ASAP */
sys/netinet/ip_input.c
427
hlen = pmsg->base.lmsg.u.ms_result;
sys/netinet/ip_input.c
928
netmsg_init(&pmsg->base, NULL, &netisr_apanic_rport,
sys/netinet/ip_input.c
931
pmsg->base.lmsg.u.ms_result = hlen;
sys/netinet/ip_input.c
932
lwkt_sendmsg(port, &pmsg->base.lmsg);
sys/netinet/ip_input.c
964
netmsg_init(&fmsg->base, NULL, &netisr_apanic_rport,
sys/netinet/ip_input.c
968
lwkt_sendmsg(port, &fmsg->base.lmsg);
sys/netinet/ip_output.c
1054
struct socket *so = msg->base.nm_so;
sys/netinet/raw_ip.c
303
struct socket *so = msg->base.nm_so;
sys/netinet/raw_ip.c
462
struct socket *so = msg->base.nm_so;
sys/netinet/raw_ip.c
495
struct socket *so = msg->base.nm_so;
sys/netinet/raw_ip.c
526
struct socket *so = msg->base.nm_so;
sys/netinet/raw_ip.c
543
struct socket *so = msg->base.nm_so;
sys/netinet/raw_ip.c
571
struct socket *so = msg->base.nm_so;
sys/netinet/raw_ip.c
601
socantsendmore(msg->base.nm_so);
sys/netinet/raw_ip.c
608
struct socket *so = msg->base.nm_so;
sys/netinet/tcp_subr.c
1399
struct netmsg_base base;
sys/netinet/tcp_subr.c
1418
lwkt_forwardmsg(netisr_cpuport(nextcpu), &nm->base.lmsg);
sys/netinet/tcp_subr.c
1420
lwkt_replymsg(&nm->base.lmsg, 0);
sys/netinet/tcp_subr.c
1534
netmsg_init(&nm->base, NULL, &netisr_afree_rport,
sys/netinet/tcp_subr.c
1540
lwkt_sendmsg(netisr_cpuport(0), &nm->base.lmsg);
sys/netinet/tcp_subr.c
1643
lwkt_replymsg(&msg->ctlinput.base.lmsg, 0);
sys/netinet/tcp_subr.c
813
struct netmsg_base base;
sys/netinet/tcp_subr.c
834
lwkt_forwardmsg(netisr_cpuport(nextcpu), &nmsg->base.lmsg);
sys/netinet/tcp_subr.c
836
lwkt_replymsg(&nmsg->base.lmsg, 0);
sys/netinet/tcp_subr.c
905
netmsg_init(&nmsg.base, NULL, &curthread->td_msgport,
sys/netinet/tcp_subr.c
909
lwkt_domsg(netisr_cpuport(1), &nmsg.base.lmsg, 0);
sys/netinet/tcp_syncache.c
323
netisr_forwardmsg(&nm->base, mycpuid + 1);
sys/netinet/tcp_syncache.c
514
netisr_replymsg(&msg->base, 0);
sys/netinet/tcp_usrreq.c
1130
struct socket *so = msg->connect.base.nm_so;
sys/netinet/tcp_usrreq.c
1221
lwkt_msg_t lmsg = &msg->connect.base.lmsg;
sys/netinet/tcp_usrreq.c
1237
msg->connect.base.nm_dispatch = tcp_connect;
sys/netinet/tcp_usrreq.c
1304
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netinet/tcp_usrreq.c
1314
struct socket *so = msg->connect.base.nm_so;
sys/netinet/tcp_usrreq.c
1355
lwkt_msg_t lmsg = &msg->connect.base.lmsg;
sys/netinet/tcp_usrreq.c
1366
msg->connect.base.nm_dispatch = tcp6_connect;
sys/netinet/tcp_usrreq.c
1384
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netinet/tcp_usrreq.c
1471
struct socket *so = msg->base.nm_so;
sys/netinet/tcp_usrreq.c
202
struct socket *so = msg->base.nm_so;
sys/netinet/tcp_usrreq.c
235
struct socket *so = msg->base.nm_so;
sys/netinet/tcp_usrreq.c
301
struct socket *so = msg->bind.base.nm_so;
sys/netinet/tcp_usrreq.c
355
lwkt_msg_t lmsg = &msg->bind.base.lmsg;
sys/netinet/tcp_usrreq.c
392
struct socket *so = msg->bind.base.nm_so;
sys/netinet/tcp_usrreq.c
420
struct netmsg_base base;
sys/netinet/tcp_usrreq.c
434
lwkt_forwardmsg(netisr_cpuport(nextcpu), &nm->base.lmsg);
sys/netinet/tcp_usrreq.c
436
lwkt_replymsg(&nm->base.lmsg, 0);
sys/netinet/tcp_usrreq.c
445
struct socket *so = msg->listen.base.nm_so;
sys/netinet/tcp_usrreq.c
456
lwkt_msg_t lmsg = &msg->listen.base.lmsg;
sys/netinet/tcp_usrreq.c
508
netmsg_init(&nm.base, NULL, &curthread->td_msgport,
sys/netinet/tcp_usrreq.c
511
lwkt_domsg(netisr_cpuport(1), &nm.base.lmsg, 0);
sys/netinet/tcp_usrreq.c
522
struct socket *so = msg->listen.base.nm_so;
sys/netinet/tcp_usrreq.c
562
netmsg_init(&nm.base, NULL, &curthread->td_msgport,
sys/netinet/tcp_usrreq.c
565
lwkt_domsg(netisr_cpuport(1), &nm.base.lmsg, 0);
sys/netinet/tcp_usrreq.c
582
struct socket *so = msg->connect.base.nm_so;
sys/netinet/tcp_usrreq.c
625
struct socket *so = msg->connect.base.nm_so;
sys/netinet/tcp_usrreq.c
686
struct socket *so = msg->disconnect.base.nm_so;
sys/netinet/tcp_usrreq.c
704
struct socket *so = msg->accept.base.nm_so;
sys/netinet/tcp_usrreq.c
731
struct socket *so = msg->accept.base.nm_so;
sys/netinet/tcp_usrreq.c
761
struct socket *so = msg->shutdown.base.nm_so;
sys/netinet/tcp_usrreq.c
780
struct socket *so = msg->rcvd.base.nm_so;
sys/netinet/tcp_usrreq.c
806
struct socket *so = msg->send.base.nm_so;
sys/netinet/tcp_usrreq.c
903
struct socket *so = msg->abort.base.nm_so;
sys/netinet/tcp_usrreq.c
919
struct socket *so = msg->rcvoob.base.nm_so;
sys/netinet/udp_usrreq.c
1183
smsg->base.lmsg.ms_flags |= MSGF_IGNSOPORT;
sys/netinet/udp_usrreq.c
1184
smsg->base.nm_dispatch = udp_send_redispatch;
sys/netinet/udp_usrreq.c
1185
lwkt_forwardmsg(port, &smsg->base.lmsg);
sys/netinet/udp_usrreq.c
1196
netmsg_init(&smsg->base, so, &netisr_apanic_rport,
sys/netinet/udp_usrreq.c
1202
lwkt_sendmsg(port, &smsg->base.lmsg);
sys/netinet/udp_usrreq.c
1227
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netinet/udp_usrreq.c
1266
struct socket *so = msg->attach.base.nm_so;
sys/netinet/udp_usrreq.c
1290
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netinet/udp_usrreq.c
1310
in_pcblink_flags(msg->base.nm_so->so_pcb, &udbinfo[mycpuid], 0);
sys/netinet/udp_usrreq.c
1376
struct inpcb *inp = msg->base.nm_so->so_pcb;
sys/netinet/udp_usrreq.c
1384
forwarded = udp_inswildcardhash_oncpu(inp, &msg->base);
sys/netinet/udp_usrreq.c
1436
struct socket *so = msg->bind.base.nm_so;
sys/netinet/udp_usrreq.c
1475
lwkt_msg_t lmsg = &msg->bind.base.lmsg;
sys/netinet/udp_usrreq.c
1509
&msg->bind.base, 0);
sys/netinet/udp_usrreq.c
1522
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netinet/udp_usrreq.c
1536
struct socket *so = msg->connect.base.nm_so;
sys/netinet/udp_usrreq.c
1587
lwkt_msg_t lmsg = &msg->connect.base.lmsg;
sys/netinet/udp_usrreq.c
1668
forwarded = udp_inswildcardhash(inp, &msg->connect.base,
sys/netinet/udp_usrreq.c
1678
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netinet/udp_usrreq.c
1751
udp_detach2(msg->base.nm_so);
sys/netinet/udp_usrreq.c
1757
struct netmsg_base *clomsg = &msg->base;
sys/netinet/udp_usrreq.c
1800
struct netmsg_base *clomsg = &msg->base;
sys/netinet/udp_usrreq.c
1815
struct socket *so = msg->detach.base.nm_so;
sys/netinet/udp_usrreq.c
1821
lwkt_replymsg(&msg->detach.base.lmsg, EINVAL);
sys/netinet/udp_usrreq.c
1829
lwkt_replymsg(&msg->detach.base.lmsg, EJUSTRETURN);
sys/netinet/udp_usrreq.c
1889
struct socket *so = msg->disconnect.base.nm_so;
sys/netinet/udp_usrreq.c
1926
forwarded = udp_inswildcardhash(inp, &msg->disconnect.base, 0);
sys/netinet/udp_usrreq.c
1935
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netinet/udp_usrreq.c
1941
struct socket *so = msg->shutdown.base.nm_so;
sys/netinet/udp_usrreq.c
1952
lwkt_replymsg(&msg->shutdown.base.lmsg, error);
sys/netinet/udp_usrreq.c
256
struct socket *so = msg->base.nm_so;
sys/netinet/udp_usrreq.c
697
struct netmsg_base base;
sys/netinet/udp_usrreq.c
715
lwkt_forwardmsg(netisr_cpuport(nextcpu), &nm->base.lmsg);
sys/netinet/udp_usrreq.c
717
lwkt_replymsg(&nm->base.lmsg, 0);
sys/netinet/udp_usrreq.c
798
netmsg_init(&nm->base, NULL, &netisr_afree_rport,
sys/netinet/udp_usrreq.c
803
lwkt_sendmsg(netisr_cpuport(0), &nm->base.lmsg);
sys/netinet/udp_usrreq.c
858
struct inpcb *inp = msg->send.base.nm_so->so_pcb;
sys/netinet/udp_usrreq.c
874
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netinet/udp_usrreq.c
887
struct socket *so = msg->send.base.nm_so;
sys/netinet/udp_usrreq.c
928
msg->send.base.lmsg.ms_flags |= MSGF_UDP_SEND;
sys/netinet/udp_usrreq.c
929
forwarded = udp_inswildcardhash(inp, &msg->send.base, 0);
sys/netinet6/frag6.c
638
netisr_replymsg(&nmsg->base, 0);
sys/netinet6/frag6.c
722
netisr_replymsg(&nmsg->base, 0);
sys/netinet6/icmp6.c
2125
netisr_replymsg(&nmsg->base, 0);
sys/netinet6/icmp6.c
2641
struct socket *so = msg->ctloutput.base.nm_so;
sys/netinet6/icmp6.c
2705
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netinet6/in6.c
2410
netisr_replymsg(&nmsg->base, 0);
sys/netinet6/in6.c
378
lwkt_replymsg(&msg->control.base.lmsg, error);
sys/netinet6/in6.c
450
netmsg_init(&msg.base, NULL, &curthread->td_msgport, 0,
sys/netinet6/in6.c
456
lwkt_domsg(netisr_cpuport(0), &msg.base.lmsg, 0);
sys/netinet6/in6.c
457
return msg.base.lmsg.ms_error;
sys/netinet6/in6_pcb.c
455
error = in6_setsockaddr(msg->sockaddr.base.nm_so, msg->sockaddr.nm_nam);
sys/netinet6/in6_pcb.c
456
lwkt_replymsg(&msg->sockaddr.base.lmsg, error);
sys/netinet6/in6_pcb.c
464
error = in6_setpeeraddr(msg->peeraddr.base.nm_so, msg->peeraddr.nm_nam);
sys/netinet6/in6_pcb.c
465
lwkt_replymsg(&msg->peeraddr.base.lmsg, error);
sys/netinet6/ip6_input.c
749
netmsg_init(&pmsg->base, NULL,
sys/netinet6/ip6_input.c
754
pmsg->base.lmsg.u.ms_result = off;
sys/netinet6/ip6_input.c
755
lwkt_sendmsg(port, &pmsg->base.lmsg);
sys/netinet6/ip6_input.c
785
hlen = pmsg->base.lmsg.u.ms_result;
sys/netinet6/ip6_output.c
1125
error = ip6_ctloutput(msg->ctloutput.base.nm_so,
sys/netinet6/ip6_output.c
1127
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netinet6/nd6_nbr.c
1075
struct netmsg_base base;
sys/netinet6/nd6_nbr.c
1218
netmsg_init(&dm->base, NULL, &netisr_adone_rport,
sys/netinet6/nd6_nbr.c
1236
struct lwkt_msg *lmsg = &dp->dad_nmsg.base.lmsg;
sys/netinet6/nd6_nbr.c
1257
struct lwkt_msg *lmsg = &dp->dad_nmsg.base.lmsg;
sys/netinet6/nd6_nbr.c
1279
lwkt_replymsg(&dm->base.lmsg, 0);
sys/netinet6/raw_ip6.c
262
lwkt_replymsg(&msg->ctlinput.base.lmsg, 0);
sys/netinet6/raw_ip6.c
453
struct socket *so = msg->ctloutput.base.nm_so;
sys/netinet6/raw_ip6.c
515
lwkt_replymsg(&msg->ctloutput.base.lmsg, error);
sys/netinet6/raw_ip6.c
521
struct socket *so = msg->attach.base.nm_so;
sys/netinet6/raw_ip6.c
553
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netinet6/raw_ip6.c
559
struct socket *so = msg->detach.base.nm_so;
sys/netinet6/raw_ip6.c
573
lwkt_replymsg(&msg->detach.base.lmsg, 0);
sys/netinet6/raw_ip6.c
583
soisdisconnected(msg->abort.base.nm_so);
sys/netinet6/raw_ip6.c
591
struct socket *so = msg->disconnect.base.nm_so;
sys/netinet6/raw_ip6.c
602
lwkt_replymsg(&msg->disconnect.base.lmsg, ENOTCONN);
sys/netinet6/raw_ip6.c
608
struct socket *so = msg->bind.base.nm_so;
sys/netinet6/raw_ip6.c
647
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netinet6/raw_ip6.c
653
struct socket *so = msg->connect.base.nm_so;
sys/netinet6/raw_ip6.c
701
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netinet6/raw_ip6.c
707
socantsendmore(msg->shutdown.base.nm_so);
sys/netinet6/raw_ip6.c
708
lwkt_replymsg(&msg->shutdown.base.lmsg, 0);
sys/netinet6/raw_ip6.c
714
struct socket *so = msg->send.base.nm_so;
sys/netinet6/raw_ip6.c
753
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netinet6/udp6_usrreq.c
449
lwkt_replymsg(&msg->ctlinput.base.lmsg, 0);
sys/netinet6/udp6_usrreq.c
498
struct socket *so = msg->abort.base.nm_so;
sys/netinet6/udp6_usrreq.c
511
lwkt_replymsg(&msg->abort.base.lmsg, error);
sys/netinet6/udp6_usrreq.c
517
struct socket *so = msg->attach.base.nm_so;
sys/netinet6/udp6_usrreq.c
551
lwkt_replymsg(&msg->attach.base.lmsg, error);
sys/netinet6/udp6_usrreq.c
557
struct socket *so =msg->bind.base.nm_so;
sys/netinet6/udp6_usrreq.c
577
lwkt_replymsg(&msg->bind.base.lmsg, error);
sys/netinet6/udp6_usrreq.c
583
struct socket *so = msg->connect.base.nm_so;
sys/netinet6/udp6_usrreq.c
622
lwkt_replymsg(&msg->connect.base.lmsg, error);
sys/netinet6/udp6_usrreq.c
628
struct socket *so = msg->detach.base.nm_so;
sys/netinet6/udp6_usrreq.c
639
lwkt_replymsg(&msg->detach.base.lmsg, error);
sys/netinet6/udp6_usrreq.c
645
struct socket *so = msg->disconnect.base.nm_so;
sys/netinet6/udp6_usrreq.c
663
lwkt_replymsg(&msg->disconnect.base.lmsg, error);
sys/netinet6/udp6_usrreq.c
669
struct socket *so = msg->send.base.nm_so;
sys/netinet6/udp6_usrreq.c
703
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netinet6/udp6_usrreq.c
707
lwkt_replymsg(&msg->send.base.lmsg, error);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1202
ieee80211_ies_expand(&se->base.se_ies);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1269
chan = selbs->base.se_chan;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1272
if (!ieee80211_sta_join(vap, chan, &selbs->base))
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1291
if (IEEE80211_ADDR_EQ(se->base.se_macaddr, macaddr))
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1352
se->base.se_rssi = curRssi;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1363
chan = selbs->base.se_chan;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1366
(void) ieee80211_sta_join(vap, chan, &selbs->base);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1419
se->base.se_age = ticks - se->se_lastupdate;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1421
(*f)(arg, &se->base);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1556
if (se->base.se_chan != c)
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1558
if (se->base.se_rssi > maxrssi)
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1559
maxrssi = se->base.se_rssi;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1658
chan = selbs->base.se_chan;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1669
if (!ieee80211_sta_join(vap, chan, &selbs->base))
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1688
ieee80211_ies_cleanup(&se->base.se_ies);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1920
chan = selbs->base.se_chan;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
1923
if (!ieee80211_sta_join(vap, chan, &selbs->base))
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
227
ieee80211_ies_cleanup(&se->base.se_ies);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
261
if (IEEE80211_ADDR_EQ(se->base.se_macaddr, macaddr))
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
276
IEEE80211_ADDR_COPY(se->base.se_macaddr, macaddr);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
280
ise = &se->base;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
79
struct ieee80211_scan_entry base;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
843
PREFER(a->base.se_capinfo, b->base.se_capinfo,
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
859
rssia = MIN(a->base.se_rssi, STA_RSSI_MAX);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
860
rssib = MIN(b->base.se_rssi, STA_RSSI_MAX);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
863
maxa = maxrate(&a->base);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
864
maxb = maxrate(&b->base);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
869
PREFER(IEEE80211_IS_CHAN_5GHZ(a->base.se_chan),
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
870
IEEE80211_IS_CHAN_5GHZ(b->base.se_chan), 1);
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
873
return a->base.se_rssi - b->base.se_rssi;
sys/netproto/802_11/wlan/ieee80211_scan_sta.c
981
struct ieee80211_scan_entry *se = &se0->base;
sys/netproto/802_11/wlan/ieee80211_scan_sw.c
1026
ic->ic_scan = &ss->base;
sys/netproto/802_11/wlan/ieee80211_scan_sw.c
1027
ss->base.ss_ic = ic;
sys/netproto/802_11/wlan/ieee80211_scan_sw.c
55
struct ieee80211_scan_state base; /* public state */
sys/platform/pc64/include/md_var.h
100
void fillw(int /*u_short*/ pat, void *base, size_t cnt);
sys/platform/pc64/include/pc/bios.h
48
uint64_t base;
sys/platform/pc64/isa/clock.c
1075
inittodr(time_t base)
sys/platform/pc64/isa/clock.c
1082
if (base) {
sys/platform/pc64/isa/clock.c
1083
ts.tv_sec = base;
sys/platform/pc64/isa/clock.c
1207
sysclock_t base;
sys/platform/pc64/isa/clock.c
1226
base = sys_cputimer->count();
sys/platform/pc64/isa/clock.c
1227
while (sys_cputimer->count() - base < sys_cputimer->freq / 100)
sys/platform/pc64/isa/clock.c
301
i8254_cputimer.base += 0x00010000U;
sys/platform/pc64/isa/clock.c
302
ret = i8254_cputimer.base | count;
sys/platform/pc64/isa/clock.c
709
timer->base = (oldclock + 0xFFFF) & 0xFFFFFFFFFFFF0000LU;
sys/platform/pc64/x86_64/amd64_mem.c
62
#define mrvalid(base, len) \
sys/platform/pc64/x86_64/amd64_mem.c
63
((!(base & ((1 << 12) - 1))) && /* base is multiple of 4k */ \
sys/platform/pc64/x86_64/amd64_mem.c
66
!((base) & ((len) - 1))) /* range is not discontiuous */
sys/platform/pc64/x86_64/machdep.c
1989
smap->type, smap->base, smap->length);
sys/platform/pc64/x86_64/machdep.c
1998
if (smap->base < physmap[i + 1]) {
sys/platform/pc64/x86_64/machdep.c
2016
if (smap->base == physmap[*physmap_idx + 1]) {
sys/platform/pc64/x86_64/machdep.c
2027
physmap[*physmap_idx] = smap->base;
sys/platform/pc64/x86_64/machdep.c
2028
physmap[*physmap_idx + 1] = smap->base + smap->length;
sys/platform/pc64/x86_64/nexus.c
683
smap->base, smap->length, -1);
sys/platform/pc64/x86_64/nexus.c
693
(intmax_t)smap->base,
sys/platform/pc64/x86_64/pmap.c
1452
static void pmap_init_iso_range(vm_offset_t base, size_t bytes);
sys/platform/pc64/x86_64/pmap.c
1455
static void dump_pmap(pmap_t pmap, pt_entry_t pte, int level, vm_offset_t base);
sys/platform/pc64/x86_64/pmap.c
1596
pmap_init_iso_range(vm_offset_t base, size_t bytes)
sys/platform/pc64/x86_64/pmap.c
1606
base, base + bytes, bytes);
sys/platform/pc64/x86_64/pmap.c
1608
va = base & ~(vm_offset_t)PAGE_MASK;
sys/platform/pc64/x86_64/pmap.c
1609
while (va < base + bytes) {
sys/platform/pc64/x86_64/pmap.c
1610
if ((va & PDRMASK) == 0 && va + NBPDR <= base + bytes &&
sys/platform/pc64/x86_64/pmap.c
1646
dump_pmap(pmap_t pmap, pt_entry_t pte, int level, vm_offset_t base)
sys/platform/pc64/x86_64/pmap.c
1671
kprintf("cr3 %016jx @ va=%016jx\n", pte, base);
sys/platform/pc64/x86_64/pmap.c
1675
base += 0xFFFF000000000000LLU;
sys/platform/pc64/x86_64/pmap.c
1680
base, i, ptp[i]);
sys/platform/pc64/x86_64/pmap.c
1683
base, i, ptp[i]);
sys/platform/pc64/x86_64/pmap.c
1686
base, i, ptp[i]);
sys/platform/pc64/x86_64/pmap.c
1689
base, i, ptp[i]);
sys/platform/pc64/x86_64/pmap.c
1690
dump_pmap(pmap, ptp[i], level + 1, base);
sys/platform/pc64/x86_64/pmap.c
1693
base += incr;
sys/platform/pc64/x86_64/pmap.c
341
extern int std_fubyte (const uint8_t *base);
sys/platform/pc64/x86_64/pmap.c
342
extern int std_subyte (uint8_t *base, uint8_t byte);
sys/platform/pc64/x86_64/pmap.c
343
extern int32_t std_fuword32 (const uint32_t *base);
sys/platform/pc64/x86_64/pmap.c
344
extern int64_t std_fuword64 (const uint64_t *base);
sys/platform/pc64/x86_64/pmap.c
345
extern int std_suword64 (uint64_t *base, uint64_t word);
sys/platform/pc64/x86_64/pmap.c
346
extern int std_suword32 (uint32_t *base, int word);
sys/platform/pc64/x86_64/pmap.c
347
extern uint32_t std_swapu32 (volatile uint32_t *base, uint32_t v);
sys/platform/pc64/x86_64/pmap.c
348
extern uint64_t std_swapu64 (volatile uint64_t *base, uint64_t v);
sys/platform/pc64/x86_64/pmap.c
349
extern uint32_t std_fuwordadd32 (volatile uint32_t *base, uint32_t v);
sys/platform/pc64/x86_64/pmap.c
350
extern uint64_t std_fuwordadd64 (volatile uint64_t *base, uint64_t v);
sys/platform/pc64/x86_64/pmap.c
6225
vm_offset_t base, offset;
sys/platform/pc64/x86_64/pmap.c
6227
base = va & ~PAGE_MASK;
sys/platform/pc64/x86_64/pmap.c
6231
kmem_free(kernel_map, base, size);
sys/platform/pc64/x86_64/pmap.c
6265
vm_offset_t base;
sys/platform/pc64/x86_64/pmap.c
6270
base = trunc_page(va);
sys/platform/pc64/x86_64/pmap.c
6305
pmap_invalidate_range(kernel_pmap, base, va);
sys/platform/pc64/x86_64/pmap.c
6306
pmap_invalidate_cache_range(base, va);
sys/platform/pc64/x86_64/tls.c
163
td->td_pcb->pcb_fsbase = (register_t)td->td_tls.info[0].base;
sys/platform/pc64/x86_64/tls.c
164
td->td_pcb->pcb_gsbase = (register_t)td->td_tls.info[1].base;
sys/platform/pc64/x86_64/uwrapper.c
28
fubyte(const uint8_t *base)
sys/platform/pc64/x86_64/uwrapper.c
30
return curthread->td_proc->p_vmspace->vm_pmap.fubyte(base);
sys/platform/pc64/x86_64/uwrapper.c
34
subyte(uint8_t *base, uint8_t byte)
sys/platform/pc64/x86_64/uwrapper.c
36
return curthread->td_proc->p_vmspace->vm_pmap.subyte(base, byte);
sys/platform/pc64/x86_64/uwrapper.c
40
fuword32(const uint32_t *base)
sys/platform/pc64/x86_64/uwrapper.c
42
return curthread->td_proc->p_vmspace->vm_pmap.fuword32(base);
sys/platform/pc64/x86_64/uwrapper.c
46
fuword64(const uint64_t *base)
sys/platform/pc64/x86_64/uwrapper.c
48
return curthread->td_proc->p_vmspace->vm_pmap.fuword64(base);
sys/platform/pc64/x86_64/uwrapper.c
52
suword64(uint64_t *base, uint64_t word)
sys/platform/pc64/x86_64/uwrapper.c
54
return curthread->td_proc->p_vmspace->vm_pmap.suword64(base, word);
sys/platform/pc64/x86_64/uwrapper.c
58
suword32(uint32_t *base, int word)
sys/platform/pc64/x86_64/uwrapper.c
60
return curthread->td_proc->p_vmspace->vm_pmap.suword32(base, word);
sys/platform/pc64/x86_64/uwrapper.c
64
swapu32(volatile uint32_t *base, uint32_t v)
sys/platform/pc64/x86_64/uwrapper.c
66
return curthread->td_proc->p_vmspace->vm_pmap.swapu32(base, v);
sys/platform/pc64/x86_64/uwrapper.c
70
swapu64(volatile uint64_t *base, uint64_t v)
sys/platform/pc64/x86_64/uwrapper.c
72
return curthread->td_proc->p_vmspace->vm_pmap.swapu64(base, v);
sys/platform/pc64/x86_64/uwrapper.c
76
fuwordadd32(volatile uint32_t *base, uint32_t v)
sys/platform/pc64/x86_64/uwrapper.c
78
return curthread->td_proc->p_vmspace->vm_pmap.fuwordadd32(base, v);
sys/platform/pc64/x86_64/uwrapper.c
82
fuwordadd64(volatile uint64_t *base, uint64_t v)
sys/platform/pc64/x86_64/uwrapper.c
84
return curthread->td_proc->p_vmspace->vm_pmap.fuwordadd64(base, v);
sys/platform/vkernel64/platform/copyio.c
393
fubyte(const uint8_t *base)
sys/platform/vkernel64/platform/copyio.c
397
if (copyin(base, &c, 1) == 0)
sys/platform/vkernel64/platform/copyio.c
406
subyte(uint8_t *base, uint8_t byte)
sys/platform/vkernel64/platform/copyio.c
410
if (copyout(&c, base, 1) == 0)
sys/platform/vkernel64/platform/copyio.c
419
fuword32(const uint32_t *base)
sys/platform/vkernel64/platform/copyio.c
423
if (copyin(base, &v, sizeof(v)) == 0)
sys/platform/vkernel64/platform/copyio.c
432
fuword64(const uint64_t *base)
sys/platform/vkernel64/platform/copyio.c
436
if (copyin(base, &v, sizeof(v)) == 0)
sys/platform/vkernel64/platform/copyio.c
445
suword64(uint64_t *base, uint64_t word)
sys/platform/vkernel64/platform/copyio.c
447
if (copyout(&word, base, sizeof(word)) == 0)
sys/platform/vkernel64/platform/copyio.c
453
suword32(uint32_t *base, int word)
sys/platform/vkernel64/platform/copyio.c
455
if (copyout(&word, base, sizeof(word)) == 0)
sys/platform/vkernel64/platform/init.c
1541
vkernel_module_memory_free(vm_offset_t base, size_t bytes)
sys/platform/vkernel64/platform/init.c
1545
munmap((void *)base, bytes);
sys/platform/vkernel64/platform/init.c
592
void *base;
sys/platform/vkernel64/platform/init.c
609
base = mmap((void*)KERNEL_KVA_START, KERNEL_KVA_SIZE,
sys/platform/vkernel64/platform/init.c
614
if (base == MAP_FAILED) {
sys/platform/vkernel64/platform/init.c
618
madvise(base, KERNEL_KVA_SIZE, MADV_NOSYNC);
sys/platform/vkernel64/platform/init.c
619
KvaStart = (vm_offset_t)base;
sys/platform/vkernel64/platform/init.c
647
pmap_bootstrap((vm_paddr_t *)&firstfree, (int64_t)base);
sys/platform/vkernel64/platform/init.c
649
mcontrol(base, KERNEL_KVA_SIZE, MADV_SETMAP,
sys/platform/vkernel64/platform/systimer.c
144
timer->base = 0;
sys/platform/vkernel64/platform/systimer.c
145
timer->base = oclock - vkernel_timer_get_timecount();
sys/platform/vkernel64/platform/systimer.c
327
inittodr(time_t base)
sys/sys/imgact_elf.h
55
Elf_Size base;
sys/sys/indefinite.h
49
tsc_uclock_t base;
sys/sys/indefinite2.h
109
delta = rdtsc() - info->base;
sys/sys/indefinite2.h
111
delta = ticks - info->base;
sys/sys/indefinite2.h
128
info->base += delta;
sys/sys/indefinite2.h
135
info->base += delta;
sys/sys/indefinite2.h
205
delta = rdtsc() - info->base;
sys/sys/indefinite2.h
209
delta = ticks - info->base;
sys/sys/indefinite2.h
65
info->base = 0;
sys/sys/indefinite2.h
94
info->base = rdtsc();
sys/sys/indefinite2.h
96
info->base = ticks;
sys/sys/kinfo.h
166
#define __KP_SYSCAP_GET(base, cap) \
sys/sys/kinfo.h
167
(((base)[__SYSCAP_INDEX(cap)] >> \
sys/sys/kinfo.h
170
#define __KP_SYSCAP_GET_SELF(base, cap) \
sys/sys/kinfo.h
171
(__KP_SYSCAP_GET(base, cap) & __SYSCAP_SELF)
sys/sys/libkern.h
117
void kqsort(void *base, size_t nmemb, size_t size,
sys/sys/libkern.h
119
void kqsort_r(void *base, size_t nmemb, size_t size, void *thunk,
sys/sys/systimer.h
131
sysclock_t base; /* (implementation dependant) */
sys/sys/systm.h
310
int fubyte (const uint8_t *base);
sys/sys/systm.h
311
int subyte (uint8_t *base, uint8_t byte);
sys/sys/systm.h
312
int32_t fuword32 (const uint32_t *base);
sys/sys/systm.h
313
int64_t fuword64 (const uint64_t *base);
sys/sys/systm.h
314
int suword32 (uint32_t *base, int word);
sys/sys/systm.h
315
int suword64 (uint64_t *base, uint64_t word);
sys/sys/systm.h
357
void inittodr (time_t base);
sys/sys/tls.h
40
void *base;
sys/sys/vnode.h
512
int vn_rdwr (enum uio_rw rw, struct vnode *vp, caddr_t base,
sys/sys/vnode.h
515
int vn_rdwr_inchunks (enum uio_rw rw, struct vnode *vp, caddr_t base,
sys/vfs/dirfs/dirfs_vnops.c
1221
long base;
sys/vfs/dirfs/dirfs_vnops.c
1241
base = 0;
sys/vfs/dirfs/dirfs_vnops.c
1261
bytes = getdirentries(dnp->dn_fd, buf, bufsiz, &base);
sys/vfs/dirfs/dirfs_vnops.c
1263
(intmax_t)startoff, (intmax_t)base,
sys/vfs/fuse/fuse_abi.h
681
uint64_t base;
sys/vfs/hammer/hammer.h
1200
hammer_off_t zone_offset, void *base, int len);
sys/vfs/hammer/hammer.h
1203
void *base, int len);
sys/vfs/hammer/hammer.h
1208
void hammer_format_undo(hammer_mount_t hmp, void *base, uint32_t seqno);
sys/vfs/hammer/hammer.h
1333
void *base, int len);
sys/vfs/hammer/hammer.h
1335
void *base, int len);
sys/vfs/hammer/hammer.h
1456
void *base, int len)
sys/vfs/hammer/hammer.h
1458
KKASSERT((char *)base >= (char *)node->ondisk &&
sys/vfs/hammer/hammer.h
1459
(char *)base + len <=
sys/vfs/hammer/hammer.h
1466
hammer_modify_buffer(trans, node->buffer, base, len);
sys/vfs/hammer/hammer_btree.c
1093
r = hammer_btree_cmp(&cursor->key_beg, &elm->base);
sys/vfs/hammer/hammer_btree.c
1101
KKASSERT(elm->base.create_tid != 1);
sys/vfs/hammer/hammer_btree.c
1102
cursor->create_check = elm->base.create_tid - 1;
sys/vfs/hammer/hammer_btree.c
1158
save = node->elms[0].base.btype;
sys/vfs/hammer/hammer_btree.c
1159
node->elms[0].base = *cursor->left_bound;
sys/vfs/hammer/hammer_btree.c
1160
node->elms[0].base.btype = save;
sys/vfs/hammer/hammer_btree.c
1196
&elm->base, sizeof(elm->base));
sys/vfs/hammer/hammer_btree.c
1197
elm->base = *cursor->right_bound;
sys/vfs/hammer/hammer_btree.c
1294
r = hammer_btree_cmp(&cursor->key_beg, &elm->leaf.base);
sys/vfs/hammer/hammer_btree.c
1305
KKASSERT (elm->leaf.base.btype == HAMMER_BTREE_TYPE_RECORD);
sys/vfs/hammer/hammer_btree.c
1319
&node->elms[i].base) != 0) {
sys/vfs/hammer/hammer_btree.c
1405
r = hammer_btree_cmp(elm, &node->elms[i].leaf.base);
sys/vfs/hammer/hammer_btree.c
1505
ondisk->elms[0].base = hmp->root_btree_beg;
sys/vfs/hammer/hammer_btree.c
1506
ondisk->elms[0].base.btype = node->ondisk->type;
sys/vfs/hammer/hammer_btree.c
1509
ondisk->elms[1].base = hmp->root_btree_end;
sys/vfs/hammer/hammer_btree.c
1566
elm->base.btype = HAMMER_BTREE_TYPE_NONE;
sys/vfs/hammer/hammer_btree.c
1587
parent_elm->internal.base = elm->base; /* separator P */
sys/vfs/hammer/hammer_btree.c
1588
parent_elm->internal.base.btype = new_node->ondisk->type;
sys/vfs/hammer/hammer_btree.c
1661
cursor->left_bound = &parent_elm[0].internal.base;
sys/vfs/hammer/hammer_btree.c
1662
cursor->right_bound = &parent_elm[1].internal.base;
sys/vfs/hammer/hammer_btree.c
1664
&cursor->node->ondisk->elms[0].internal.base) <= 0);
sys/vfs/hammer/hammer_btree.c
1666
&cursor->node->ondisk->elms[cursor->node->ondisk->count].internal.base) >= 0);
sys/vfs/hammer/hammer_btree.c
1700
&cursor->node->ondisk->elms[0].leaf.base) <= 0);
sys/vfs/hammer/hammer_btree.c
1702
&cursor->node->ondisk->elms[cursor->node->ondisk->count-1].leaf.base) > 0);
sys/vfs/hammer/hammer_btree.c
1737
KKASSERT(hammer_btree_cmp(cursor->left_bound, &elm[-1].leaf.base) <= 0);
sys/vfs/hammer/hammer_btree.c
1738
KKASSERT(hammer_btree_cmp(cursor->left_bound, &elm->leaf.base) <= 0);
sys/vfs/hammer/hammer_btree.c
1739
KKASSERT(hammer_btree_cmp(cursor->right_bound, &elm->leaf.base) > 0);
sys/vfs/hammer/hammer_btree.c
1740
KKASSERT(hammer_btree_cmp(cursor->right_bound, &elm[1].leaf.base) > 0);
sys/vfs/hammer/hammer_btree.c
1758
ondisk->elms[0].base = hmp->root_btree_beg;
sys/vfs/hammer/hammer_btree.c
1759
ondisk->elms[0].base.btype = leaf->ondisk->type;
sys/vfs/hammer/hammer_btree.c
1762
ondisk->elms[1].base = hmp->root_btree_end;
sys/vfs/hammer/hammer_btree.c
1842
hammer_make_separator(&elm[-1].base, &elm[0].base, &parent_elm->base);
sys/vfs/hammer/hammer_btree.c
1843
parent_elm->internal.base.btype = new_leaf->ondisk->type;
sys/vfs/hammer/hammer_btree.c
1846
mid_boundary = &parent_elm->base;
sys/vfs/hammer/hammer_btree.c
1902
cursor->left_bound = &parent_elm[0].internal.base;
sys/vfs/hammer/hammer_btree.c
1903
cursor->right_bound = &parent_elm[1].internal.base;
sys/vfs/hammer/hammer_btree.c
1909
&cursor->node->ondisk->elms[0].leaf.base) <= 0);
sys/vfs/hammer/hammer_btree.c
1911
&cursor->node->ondisk->elms[cursor->node->ondisk->count-1].leaf.base) > 0);
sys/vfs/hammer/hammer_btree.c
216
r = hammer_btree_cmp(&cursor->key_end, &elm[0].base);
sys/vfs/hammer/hammer_btree.c
217
s = hammer_btree_cmp(&cursor->key_beg, &elm[1].base);
sys/vfs/hammer/hammer_btree.c
2273
i = hammer_btree_search_node(&node->ondisk->elms[0].base,
sys/vfs/hammer/hammer_btree.c
2478
if (depth > 1 && elm->base.btype == HAMMER_BTREE_TYPE_INTERNAL) {
sys/vfs/hammer/hammer_btree.c
2645
hammer_btree_chkts(hammer_tid_t asof, hammer_base_elm_t base)
sys/vfs/hammer/hammer_btree.c
2648
if (base->delete_tid)
sys/vfs/hammer/hammer_btree.c
2652
if (asof < base->create_tid)
sys/vfs/hammer/hammer_btree.c
2654
if (base->delete_tid && asof >= base->delete_tid)
sys/vfs/hammer/hammer_btree.c
2758
kprintf("\tobj_id = %016jx\n", (intmax_t)elm->base.obj_id);
sys/vfs/hammer/hammer_btree.c
2759
kprintf("\tkey = %016jx\n", (intmax_t)elm->base.key);
sys/vfs/hammer/hammer_btree.c
2760
kprintf("\tcreate_tid = %016jx\n", (intmax_t)elm->base.create_tid);
sys/vfs/hammer/hammer_btree.c
2761
kprintf("\tdelete_tid = %016jx\n", (intmax_t)elm->base.delete_tid);
sys/vfs/hammer/hammer_btree.c
2762
kprintf("\trec_type = %04x\n", elm->base.rec_type);
sys/vfs/hammer/hammer_btree.c
2763
kprintf("\tobj_type = %02x\n", elm->base.obj_type);
sys/vfs/hammer/hammer_btree.c
2764
kprintf("\tbtype = %02x (%c)\n", elm->base.btype,
sys/vfs/hammer/hammer_btree.c
2766
kprintf("\tlocalization = %08x\n", elm->base.localization);
sys/vfs/hammer/hammer_btree.c
277
r = hammer_btree_cmp(&cursor->key_end, &elm->base);
sys/vfs/hammer/hammer_btree.c
2791
elm->base.localization,
sys/vfs/hammer/hammer_btree.c
2792
(intmax_t)elm->base.obj_id,
sys/vfs/hammer/hammer_btree.c
2793
elm->base.rec_type,
sys/vfs/hammer/hammer_btree.c
2794
(intmax_t)elm->base.key,
sys/vfs/hammer/hammer_btree.c
2795
(intmax_t)elm->base.create_tid,
sys/vfs/hammer/hammer_btree.c
2814
(intmax_t)elm->internal.base.obj_id,
sys/vfs/hammer/hammer_btree.c
2816
(intmax_t)(elm + 1)->internal.base.obj_id,
sys/vfs/hammer/hammer_btree.c
304
&elm->base);
sys/vfs/hammer/hammer_btree.c
317
switch(elm->leaf.base.btype) {
sys/vfs/hammer/hammer_btree.c
320
hammer_btree_chkts(cursor->asof, &elm->base)) {
sys/vfs/hammer/hammer_btree.c
370
cmirror->skip_beg = elm->internal.base;
sys/vfs/hammer/hammer_btree.c
380
cmirror->skip_end = elm->internal.base;
sys/vfs/hammer/hammer_btree.c
466
r = hammer_btree_cmp(&cursor->key_end, &elm[0].base);
sys/vfs/hammer/hammer_btree.c
467
s = hammer_btree_cmp(&cursor->key_beg, &elm[1].base);
sys/vfs/hammer/hammer_btree.c
501
s = hammer_btree_cmp(&cursor->key_beg, &elm->base);
sys/vfs/hammer/hammer_btree.c
519
switch(elm->leaf.base.btype) {
sys/vfs/hammer/hammer_btree.c
522
hammer_btree_chkts(cursor->asof, &elm->base)) {
sys/vfs/hammer/hammer_btree.c
726
if (elm->leaf.base.btype != HAMMER_BTREE_TYPE_RECORD)
sys/vfs/hammer/hammer_btree.c
746
switch(elm->leaf.base.rec_type) {
sys/vfs/hammer/hammer_btree.c
816
KKASSERT(elm->base.btype != 0);
sys/vfs/hammer/hammer_btree.c
831
if (node->mirror_tid < elm->base.delete_tid) {
sys/vfs/hammer/hammer_btree.c
832
node->mirror_tid = elm->base.delete_tid;
sys/vfs/hammer/hammer_btree.c
835
if (node->mirror_tid < elm->base.create_tid) {
sys/vfs/hammer/hammer_btree.c
836
node->mirror_tid = elm->base.create_tid;
sys/vfs/hammer/hammer_btree.c
844
KKASSERT(hammer_btree_cmp(cursor->left_bound, &elm->base) <= 0);
sys/vfs/hammer/hammer_btree.c
845
KKASSERT(hammer_btree_cmp(cursor->right_bound, &elm->base) > 0);
sys/vfs/hammer/hammer_btree.c
847
KKASSERT(hammer_btree_cmp(&node->elms[i-1].leaf.base, &elm->base) < 0);
sys/vfs/hammer/hammer_btree.c
850
KKASSERT(hammer_btree_cmp(&node->elms[i+1].leaf.base, &elm->base) > 0);
sys/vfs/hammer/hammer_btree.h
156
struct hammer_base_elm base;
sys/vfs/hammer/hammer_btree.h
171
struct hammer_base_elm base;
sys/vfs/hammer/hammer_btree.h
183
struct hammer_base_elm base;
sys/vfs/hammer/hammer_btree.h
258
switch (elm->base.btype) {
sys/vfs/hammer/hammer_btree.h
274
switch (elm->base.btype) {
sys/vfs/hammer/hammer_btree.h
298
switch(elm->base.btype) {
sys/vfs/hammer/hammer_btree.h
303
return(elm->base.btype); /* ascii */
sys/vfs/hammer/hammer_crc.h
267
switch(leaf->base.rec_type) {
sys/vfs/hammer/hammer_crc.h
285
if (leaf->data_len && leaf->base.rec_type == HAMMER_RECTYPE_INODE)
sys/vfs/hammer/hammer_cursor.c
510
cursor->left_bound = &elm[0].internal.base;
sys/vfs/hammer/hammer_cursor.c
511
cursor->right_bound = &elm[1].internal.base;
sys/vfs/hammer/hammer_cursor.c
646
cursor->left_bound = &elm[0].internal.base;
sys/vfs/hammer/hammer_cursor.c
647
cursor->right_bound = &elm[1].internal.base;
sys/vfs/hammer/hammer_cursor.c
651
KASSERT(elm->base.btype == node->ondisk->type,
sys/vfs/hammer/hammer_cursor.c
653
elm->base.btype, node->ondisk->type, node));
sys/vfs/hammer/hammer_inode.c
1107
record->leaf.base.localization = ip->obj_localization |
sys/vfs/hammer/hammer_inode.c
1109
record->leaf.base.rec_type = HAMMER_RECTYPE_PFS;
sys/vfs/hammer/hammer_inode.c
1110
record->leaf.base.key = pfsm->localization;
sys/vfs/hammer/hammer_inode.c
1309
record->leaf.base.create_tid = trans->tid;
sys/vfs/hammer/hammer_inode.c
2838
record->leaf.base.create_tid = trans->tid;
sys/vfs/hammer/hammer_inode.c
2857
record->leaf.base.key -
sys/vfs/hammer/hammer_inode.c
3119
ip->ino_leaf.base.delete_tid = trans->tid;
sys/vfs/hammer/hammer_inode.c
3120
ip->sync_ino_leaf.base.delete_tid = trans->tid;
sys/vfs/hammer/hammer_inode.c
3199
ip->ino_leaf.base.create_tid = trans->tid;
sys/vfs/hammer/hammer_inode.c
3201
ip->sync_ino_leaf.base.create_tid = trans->tid;
sys/vfs/hammer/hammer_inode.c
833
ip->ino_leaf.base.btype = HAMMER_BTREE_TYPE_RECORD;
sys/vfs/hammer/hammer_inode.c
834
ip->ino_leaf.base.localization = ip->obj_localization |
sys/vfs/hammer/hammer_inode.c
836
ip->ino_leaf.base.obj_id = ip->obj_id;
sys/vfs/hammer/hammer_inode.c
837
ip->ino_leaf.base.key = 0;
sys/vfs/hammer/hammer_inode.c
838
ip->ino_leaf.base.create_tid = 0;
sys/vfs/hammer/hammer_inode.c
839
ip->ino_leaf.base.delete_tid = 0;
sys/vfs/hammer/hammer_inode.c
840
ip->ino_leaf.base.rec_type = HAMMER_RECTYPE_INODE;
sys/vfs/hammer/hammer_inode.c
841
ip->ino_leaf.base.obj_type = hammer_get_obj_type(vap->va_type);
sys/vfs/hammer/hammer_inode.c
843
ip->ino_data.obj_type = ip->ino_leaf.base.obj_type;
sys/vfs/hammer/hammer_inode.c
853
if (ip->ino_leaf.base.obj_type == HAMMER_OBJTYPE_DIRECTORY) {
sys/vfs/hammer/hammer_inode.c
859
if (ip->ino_leaf.base.obj_type == HAMMER_OBJTYPE_DIRECTORY) {
sys/vfs/hammer/hammer_inode.c
871
ip->ino_data.parent_obj_id = dip->ino_leaf.base.obj_id;
sys/vfs/hammer/hammer_inode.c
873
switch(ip->ino_leaf.base.obj_type) {
sys/vfs/hammer/hammer_io.c
1922
if (leaf->base.rec_type != HAMMER_RECTYPE_DATA)
sys/vfs/hammer/hammer_io.c
1927
iinfo.obj_id = leaf->base.obj_id;
sys/vfs/hammer/hammer_io.c
1929
iinfo.obj_localization = leaf->base.localization &
sys/vfs/hammer/hammer_io.c
1948
file_offset = iinfo->u.leaf->base.key - iinfo->u.leaf->data_len;
sys/vfs/hammer/hammer_io.c
902
void *base, int len)
sys/vfs/hammer/hammer_io.c
908
intptr_t rel_offset = (intptr_t)base - (intptr_t)volume->ondisk;
sys/vfs/hammer/hammer_io.c
912
base, len);
sys/vfs/hammer/hammer_io.c
924
void *base, int len)
sys/vfs/hammer/hammer_io.c
930
intptr_t rel_offset = (intptr_t)base - (intptr_t)buffer->ondisk;
sys/vfs/hammer/hammer_io.c
934
base, len);
sys/vfs/hammer/hammer_ioctl.c
1012
leaf.base.obj_id = HAMMER_OBJID_ROOT;
sys/vfs/hammer/hammer_ioctl.c
1013
leaf.base.rec_type = HAMMER_RECTYPE_CONFIG;
sys/vfs/hammer/hammer_ioctl.c
1014
leaf.base.create_tid = hammer_alloc_tid(hmp, 1);
sys/vfs/hammer/hammer_ioctl.c
1015
leaf.base.btype = HAMMER_BTREE_TYPE_RECORD;
sys/vfs/hammer/hammer_ioctl.c
1016
leaf.base.localization = ip->obj_localization | HAMMER_LOCALIZE_INODE;
sys/vfs/hammer/hammer_ioctl.c
1017
leaf.base.key = 0; /* page 0 */
sys/vfs/hammer/hammer_ioctl.c
1020
cursor.key_beg = leaf.base;
sys/vfs/hammer/hammer_ioctl.c
1044
cursor.key_beg = leaf.base;
sys/vfs/hammer/hammer_ioctl.c
417
if (elm->base.btype != HAMMER_BTREE_TYPE_RECORD)
sys/vfs/hammer/hammer_ioctl.c
424
if (hist->nxt_key > elm->leaf.base.key - elm->leaf.data_len &&
sys/vfs/hammer/hammer_ioctl.c
425
hist->key < elm->leaf.base.key - elm->leaf.data_len) {
sys/vfs/hammer/hammer_ioctl.c
426
hist->nxt_key = elm->leaf.base.key - elm->leaf.data_len;
sys/vfs/hammer/hammer_ioctl.c
428
if (hist->nxt_key > elm->leaf.base.key)
sys/vfs/hammer/hammer_ioctl.c
429
hist->nxt_key = elm->leaf.base.key;
sys/vfs/hammer/hammer_ioctl.c
435
if (elm->leaf.base.key >= MAXPHYS &&
sys/vfs/hammer/hammer_ioctl.c
436
elm->leaf.base.key - MAXPHYS > hist->key) {
sys/vfs/hammer/hammer_ioctl.c
443
if (elm->leaf.base.key - elm->leaf.data_len > hist->key)
sys/vfs/hammer/hammer_ioctl.c
450
if (hist->nxt_key > elm->leaf.base.key &&
sys/vfs/hammer/hammer_ioctl.c
451
hist->key < elm->leaf.base.key) {
sys/vfs/hammer/hammer_ioctl.c
452
hist->nxt_key = elm->leaf.base.key;
sys/vfs/hammer/hammer_ioctl.c
458
if (elm->leaf.base.key > hist->key)
sys/vfs/hammer/hammer_ioctl.c
467
elm->leaf.base.create_tid != hist->hist_ary[i - 1].tid) &&
sys/vfs/hammer/hammer_ioctl.c
468
elm->leaf.base.create_tid >= hist->beg_tid &&
sys/vfs/hammer/hammer_ioctl.c
469
elm->leaf.base.create_tid < hist->end_tid) {
sys/vfs/hammer/hammer_ioctl.c
471
hist->nxt_tid = elm->leaf.base.create_tid;
sys/vfs/hammer/hammer_ioctl.c
475
hist->hist_ary[i].tid = elm->leaf.base.create_tid;
sys/vfs/hammer/hammer_ioctl.c
490
if (elm->leaf.base.delete_tid &&
sys/vfs/hammer/hammer_ioctl.c
491
elm->leaf.base.delete_tid >= hist->beg_tid &&
sys/vfs/hammer/hammer_ioctl.c
492
elm->leaf.base.delete_tid < hist->end_tid) {
sys/vfs/hammer/hammer_ioctl.c
494
hist->nxt_tid = elm->leaf.base.delete_tid;
sys/vfs/hammer/hammer_ioctl.c
498
hist->hist_ary[i].tid = elm->leaf.base.delete_tid;
sys/vfs/hammer/hammer_ioctl.c
743
leaf.base.obj_id = HAMMER_OBJID_ROOT;
sys/vfs/hammer/hammer_ioctl.c
744
leaf.base.rec_type = HAMMER_RECTYPE_SNAPSHOT;
sys/vfs/hammer/hammer_ioctl.c
745
leaf.base.create_tid = hammer_alloc_tid(hmp, 1);
sys/vfs/hammer/hammer_ioctl.c
746
leaf.base.btype = HAMMER_BTREE_TYPE_RECORD;
sys/vfs/hammer/hammer_ioctl.c
747
leaf.base.localization = ip->obj_localization | HAMMER_LOCALIZE_INODE;
sys/vfs/hammer/hammer_ioctl.c
751
leaf.base.key = (int64_t)snap->snaps[snap->index].tid;
sys/vfs/hammer/hammer_ioctl.c
752
cursor.key_beg = leaf.base;
sys/vfs/hammer/hammer_ioctl.c
765
cursor.key_beg = leaf.base;
sys/vfs/hammer/hammer_ioctl.c
908
if (cursor.leaf->base.rec_type == HAMMER_RECTYPE_SNAPSHOT) {
sys/vfs/hammer/hammer_ioctl.c
921
(hammer_tid_t)cursor.leaf->base.key) {
sys/vfs/hammer/hammer_ioctl.c
926
cursor.leaf->base.key);
sys/vfs/hammer/hammer_ioctl.c
931
cursor.leaf->base.key;
sys/vfs/hammer/hammer_mirror.c
186
mirror->key_cur = elm->base;
sys/vfs/hammer/hammer_mirror.c
192
if (elm->base.create_tid > mirror->tid_end) {
sys/vfs/hammer/hammer_mirror.c
212
if (elm->base.create_tid < mirror->tid_beg) {
sys/vfs/hammer/hammer_mirror.c
276
if (elm->base.delete_tid > mirror->tid_end)
sys/vfs/hammer/hammer_mirror.c
277
mrec.rec.leaf.base.delete_tid = 0;
sys/vfs/hammer/hammer_mirror.c
585
mrec->leaf.base.localization &= HAMMER_LOCALIZE_MASK;
sys/vfs/hammer/hammer_mirror.c
586
mrec->leaf.base.localization |= localization;
sys/vfs/hammer/hammer_mirror.c
592
cursor->key_end = mrec->leaf.base;
sys/vfs/hammer/hammer_mirror.c
60
static int hammer_mirror_nomirror(hammer_base_elm_t base);
sys/vfs/hammer/hammer_mirror.c
600
if (error == 0 && hammer_mirror_nomirror(&mrec->leaf.base))
sys/vfs/hammer/hammer_mirror.c
619
cursor->key_beg = mrec->leaf.base;
sys/vfs/hammer/hammer_mirror.c
628
if (mrec->leaf.base.create_tid >= mirror->tid_beg) {
sys/vfs/hammer/hammer_mirror.c
637
mirror->key_cur = mrec->leaf.base;
sys/vfs/hammer/hammer_mirror.c
666
mrec->leaf.base.localization &= HAMMER_LOCALIZE_MASK;
sys/vfs/hammer/hammer_mirror.c
667
mrec->leaf.base.localization |= localization;
sys/vfs/hammer/hammer_mirror.c
673
cursor->key_end = mrec->leaf.base;
sys/vfs/hammer/hammer_mirror.c
681
if (hammer_mirror_nomirror(&mrec->leaf.base))
sys/vfs/hammer/hammer_mirror.c
690
mirror->key_cur = mrec->leaf.base;
sys/vfs/hammer/hammer_mirror.c
691
cursor->key_beg = mrec->leaf.base;
sys/vfs/hammer/hammer_mirror.c
737
KKASSERT(elm->base.btype == HAMMER_BTREE_TYPE_RECORD);
sys/vfs/hammer/hammer_mirror.c
743
if (hammer_mirror_nomirror(&elm->base)) {
sys/vfs/hammer/hammer_mirror.c
752
if (elm->base.delete_tid == 0 &&
sys/vfs/hammer/hammer_mirror.c
753
elm->base.create_tid < mirror->tid_end) {
sys/vfs/hammer/hammer_mirror.c
781
if (leaf->base.delete_tid != mrec->leaf.base.delete_tid) {
sys/vfs/hammer/hammer_mirror.c
782
if (mrec->leaf.base.delete_tid != 0)
sys/vfs/hammer/hammer_mirror.c
796
hammer_mirror_nomirror(hammer_base_elm_t base)
sys/vfs/hammer/hammer_mirror.c
802
if (base->rec_type == HAMMER_RECTYPE_CONFIG)
sys/vfs/hammer/hammer_mirror.c
822
if (mrec->leaf.base.delete_tid == 0)
sys/vfs/hammer/hammer_mirror.c
829
mrec->leaf.base.delete_tid,
sys/vfs/hammer/hammer_object.c
106
if (elm->rec_type < rec->leaf.base.rec_type)
sys/vfs/hammer/hammer_object.c
108
if (elm->rec_type > rec->leaf.base.rec_type)
sys/vfs/hammer/hammer_object.c
1102
file_offset = record->leaf.base.key;
sys/vfs/hammer/hammer_object.c
1104
file_offset = record->leaf.base.key - record->leaf.data_len;
sys/vfs/hammer/hammer_object.c
1107
if (ip->save_trunc_off <= record->leaf.base.key)
sys/vfs/hammer/hammer_object.c
1108
ip->save_trunc_off = record->leaf.base.key + 1;
sys/vfs/hammer/hammer_object.c
111
if (elm->key < rec->leaf.base.key)
sys/vfs/hammer/hammer_object.c
1110
if (ip->save_trunc_off < record->leaf.base.key)
sys/vfs/hammer/hammer_object.c
1111
ip->save_trunc_off = record->leaf.base.key;
sys/vfs/hammer/hammer_object.c
113
if (elm->key > rec->leaf.base.key)
sys/vfs/hammer/hammer_object.c
1132
KKASSERT(record->leaf.base.localization != 0);
sys/vfs/hammer/hammer_object.c
1163
file_offset = record->leaf.base.key - record->leaf.data_len;
sys/vfs/hammer/hammer_object.c
1188
cursor->key_beg = record->leaf.base;
sys/vfs/hammer/hammer_object.c
1233
(intmax_t)record->leaf.base.key);
sys/vfs/hammer/hammer_object.c
1265
record->leaf.base.rec_type,
sys/vfs/hammer/hammer_object.c
1289
(intmax_t)record->leaf.base.key);
sys/vfs/hammer/hammer_object.c
1316
KKASSERT(record->ip->obj_id == record->leaf.base.obj_id);
sys/vfs/hammer/hammer_object.c
143
if (rec->leaf.base.rec_type < leaf->base.rec_type)
sys/vfs/hammer/hammer_object.c
145
if (rec->leaf.base.rec_type > leaf->base.rec_type)
sys/vfs/hammer/hammer_object.c
1491
cursor->key_beg = cursor->iprec->leaf.base;
sys/vfs/hammer/hammer_object.c
1505
r = hammer_btree_cmp(&elm->base, &cursor->iprec->leaf.base);
sys/vfs/hammer/hammer_object.c
151
if (leaf->base.rec_type == HAMMER_RECTYPE_DATA) {
sys/vfs/hammer/hammer_object.c
153
if (rec->leaf.base.key - rec->leaf.data_len >= leaf->base.key)
sys/vfs/hammer/hammer_object.c
156
if (rec->leaf.base.key <= leaf->base.key - leaf->data_len)
sys/vfs/hammer/hammer_object.c
159
if (rec->leaf.base.key < leaf->base.key)
sys/vfs/hammer/hammer_object.c
161
if (rec->leaf.base.key > leaf->base.key)
sys/vfs/hammer/hammer_object.c
1650
r = hammer_btree_cmp(&elm->base,
sys/vfs/hammer/hammer_object.c
1651
&cursor->iprec->leaf.base);
sys/vfs/hammer/hammer_object.c
1735
r = hammer_btree_cmp(&elm->base, &cursor->iprec->leaf.base);
sys/vfs/hammer/hammer_object.c
1746
int64_t base1 = elm->leaf.base.key - elm->leaf.data_len;
sys/vfs/hammer/hammer_object.c
1747
int64_t base2 = cursor->iprec->leaf.base.key -
sys/vfs/hammer/hammer_object.c
1875
KKASSERT(record->leaf.base.rec_type ==
sys/vfs/hammer/hammer_object.c
1980
KKASSERT(leaf->base.delete_tid == 0);
sys/vfs/hammer/hammer_object.c
1981
KKASSERT(leaf->base.obj_id == ip->obj_id);
sys/vfs/hammer/hammer_object.c
1991
if (leaf->base.rec_type == HAMMER_RECTYPE_DATA) {
sys/vfs/hammer/hammer_object.c
1992
off = leaf->base.key - leaf->data_len;
sys/vfs/hammer/hammer_object.c
1997
if (off < ran_beg && leaf->base.key > ran_beg) {
sys/vfs/hammer/hammer_object.c
1999
(intmax_t)leaf->base.key,
sys/vfs/hammer/hammer_object.c
2016
if (leaf->base.key - 1 > ran_end) {
sys/vfs/hammer/hammer_object.c
2017
if (leaf->base.key - leaf->data_len > ran_end)
sys/vfs/hammer/hammer_object.c
2022
off = leaf->base.key;
sys/vfs/hammer/hammer_object.c
2090
cursor->key_beg = leaf->base;
sys/vfs/hammer/hammer_object.c
2153
KKASSERT(leaf->base.delete_tid == 0);
sys/vfs/hammer/hammer_object.c
223
if (rec->leaf.base.rec_type < info->rec_type)
sys/vfs/hammer/hammer_object.c
225
if (rec->leaf.base.rec_type > info->rec_type)
sys/vfs/hammer/hammer_object.c
228
switch(rec->leaf.base.rec_type) {
sys/vfs/hammer/hammer_object.c
2300
leaf->base.rec_type,
sys/vfs/hammer/hammer_object.c
233
if (rec->leaf.base.key < info->trunc_off)
sys/vfs/hammer/hammer_object.c
2367
leaf->base.rec_type == HAMMER_RECTYPE_INODE &&
sys/vfs/hammer/hammer_object.c
2368
leaf->base.delete_tid == 0) {
sys/vfs/hammer/hammer_object.c
2379
high_tid = leaf->base.create_tid;
sys/vfs/hammer/hammer_object.c
2380
if (high_tid < leaf->base.delete_tid)
sys/vfs/hammer/hammer_object.c
2381
high_tid = leaf->base.delete_tid;
sys/vfs/hammer/hammer_object.c
241
if (rec->leaf.base.key - rec->leaf.data_len < info->trunc_off)
sys/vfs/hammer/hammer_object.c
2448
KKASSERT(elm->base.btype == HAMMER_BTREE_TYPE_RECORD);
sys/vfs/hammer/hammer_object.c
2460
if (elm->base.rec_type == HAMMER_RECTYPE_INODE) {
sys/vfs/hammer/hammer_object.c
2461
if (elm->leaf.base.delete_tid == 0 && delete_tid)
sys/vfs/hammer/hammer_object.c
2463
if (elm->leaf.base.delete_tid && delete_tid == 0)
sys/vfs/hammer/hammer_object.c
2468
elm->leaf.base.delete_tid = delete_tid;
sys/vfs/hammer/hammer_object.c
2472
if (elm->leaf.base.delete_tid > node->ondisk->mirror_tid) {
sys/vfs/hammer/hammer_object.c
2474
node->ondisk->mirror_tid = elm->leaf.base.delete_tid;
sys/vfs/hammer/hammer_object.c
2479
(intmax_t)elm->leaf.base.delete_tid,
sys/vfs/hammer/hammer_object.c
2501
KKASSERT(elm->leaf.base.delete_tid !=
sys/vfs/hammer/hammer_object.c
2502
elm->leaf.base.create_tid);
sys/vfs/hammer/hammer_object.c
2518
if (elm->base.rec_type == HAMMER_RECTYPE_INODE &&
sys/vfs/hammer/hammer_object.c
2519
elm->leaf.base.delete_tid == 0) {
sys/vfs/hammer/hammer_object.c
2652
if (leaf->base.rec_type == HAMMER_RECTYPE_DIRENTRY) {
sys/vfs/hammer/hammer_object.c
2653
localization = leaf->base.localization &
sys/vfs/hammer/hammer_object.c
275
record->leaf.base.btype = HAMMER_BTREE_TYPE_RECORD;
sys/vfs/hammer/hammer_object.c
557
if (cursor->asof < rec->leaf.base.create_tid)
sys/vfs/hammer/hammer_object.c
559
if (rec->leaf.base.delete_tid &&
sys/vfs/hammer/hammer_object.c
560
cursor->asof >= rec->leaf.base.delete_tid) {
sys/vfs/hammer/hammer_object.c
64
if (rec1->leaf.base.rec_type < rec2->leaf.base.rec_type)
sys/vfs/hammer/hammer_object.c
66
if (rec1->leaf.base.rec_type > rec2->leaf.base.rec_type)
sys/vfs/hammer/hammer_object.c
673
record->leaf.base.localization = dip->obj_localization |
sys/vfs/hammer/hammer_object.c
675
record->leaf.base.obj_id = dip->obj_id;
sys/vfs/hammer/hammer_object.c
676
record->leaf.base.key = hammer_direntry_namekey(dip, name, bytes,
sys/vfs/hammer/hammer_object.c
678
record->leaf.base.rec_type = HAMMER_RECTYPE_DIRENTRY;
sys/vfs/hammer/hammer_object.c
679
record->leaf.base.obj_type = ip->ino_leaf.base.obj_type;
sys/vfs/hammer/hammer_object.c
69
if (rec1->leaf.base.key < rec2->leaf.base.key)
sys/vfs/hammer/hammer_object.c
702
cursor.key_beg = record->leaf.base;
sys/vfs/hammer/hammer_object.c
708
++record->leaf.base.key;
sys/vfs/hammer/hammer_object.c
709
KKASSERT(record->leaf.base.key > 0);
sys/vfs/hammer/hammer_object.c
71
if (rec1->leaf.base.key > rec2->leaf.base.key)
sys/vfs/hammer/hammer_object.c
710
cursor.key_beg.key = record->leaf.base.key;
sys/vfs/hammer/hammer_object.c
805
record->leaf.base = cursor->leaf->base;
sys/vfs/hammer/hammer_object.c
806
KKASSERT(dip->obj_id == record->leaf.base.obj_id);
sys/vfs/hammer/hammer_object.c
894
KKASSERT(record->leaf.base.localization != 0);
sys/vfs/hammer/hammer_object.c
895
record->leaf.base.obj_id = ip->obj_id;
sys/vfs/hammer/hammer_object.c
896
record->leaf.base.obj_type = ip->ino_leaf.base.obj_type;
sys/vfs/hammer/hammer_object.c
980
record->leaf.base.rec_type = HAMMER_RECTYPE_DATA;
sys/vfs/hammer/hammer_object.c
981
record->leaf.base.obj_type = ip->ino_leaf.base.obj_type;
sys/vfs/hammer/hammer_object.c
982
record->leaf.base.obj_id = ip->obj_id;
sys/vfs/hammer/hammer_object.c
983
record->leaf.base.key = file_offset + bytes;
sys/vfs/hammer/hammer_object.c
984
record->leaf.base.localization = ip->obj_localization |
sys/vfs/hammer/hammer_pfs.c
364
localization = cursor.leaf->base.key;
sys/vfs/hammer/hammer_pfs.c
476
key_cur = cursor.node->ondisk->elms[cursor.index].base;
sys/vfs/hammer/hammer_pfs.c
514
if (elm->base.create_tid < trunc_tid &&
sys/vfs/hammer/hammer_pfs.c
515
elm->base.delete_tid < trunc_tid) {
sys/vfs/hammer/hammer_pfs.c
519
if (elm->base.create_tid >= trunc_tid) {
sys/vfs/hammer/hammer_pfs.c
524
} else if (elm->base.delete_tid >= trunc_tid) {
sys/vfs/hammer/hammer_prune.c
154
prune->key_cur = elm->base;
sys/vfs/hammer/hammer_prune.c
170
if (prune->stat_oldest_tid > elm->base.create_tid)
sys/vfs/hammer/hammer_prune.c
171
prune->stat_oldest_tid = elm->base.create_tid;
sys/vfs/hammer/hammer_prune.c
175
(intmax_t)elm->base.obj_id,
sys/vfs/hammer/hammer_prune.c
176
(intmax_t)elm->base.key,
sys/vfs/hammer/hammer_prune.c
177
(intmax_t)elm->base.create_tid,
sys/vfs/hammer/hammer_prune.c
178
(intmax_t)elm->base.delete_tid);
sys/vfs/hammer/hammer_prune.c
184
(intmax_t)elm->base.obj_id,
sys/vfs/hammer/hammer_prune.c
185
(intmax_t)elm->base.key);
sys/vfs/hammer/hammer_prune.c
198
isdir = (elm->base.rec_type == HAMMER_RECTYPE_DIRENTRY);
sys/vfs/hammer/hammer_prune.c
231
(intmax_t)elm->base.obj_id,
sys/vfs/hammer/hammer_prune.c
232
(intmax_t)elm->base.key);
sys/vfs/hammer/hammer_prune.c
283
if (elm->base.delete_tid != 0)
sys/vfs/hammer/hammer_prune.c
294
if (elm->base.create_tid >= scan->end_tid ||
sys/vfs/hammer/hammer_prune.c
295
elm->base.delete_tid > scan->end_tid) {
sys/vfs/hammer/hammer_prune.c
302
if (elm->base.delete_tid &&
sys/vfs/hammer/hammer_prune.c
303
elm->base.create_tid >= scan->beg_tid &&
sys/vfs/hammer/hammer_prune.c
304
elm->base.delete_tid <= scan->end_tid &&
sys/vfs/hammer/hammer_prune.c
305
(elm->base.create_tid - scan->beg_tid) / scan->mod_tid ==
sys/vfs/hammer/hammer_prune.c
306
(elm->base.delete_tid - scan->beg_tid) / scan->mod_tid) {
sys/vfs/hammer/hammer_prune.c
326
if (elm->base.rec_type != HAMMER_RECTYPE_INODE)
sys/vfs/hammer/hammer_prune.c
328
if (elm->base.delete_tid != 0)
sys/vfs/hammer/hammer_prune.c
335
ip = hammer_get_inode(cursor->trans, NULL, elm->base.obj_id,
sys/vfs/hammer/hammer_prune.c
337
elm->base.localization & HAMMER_LOCALIZE_PSEUDOFS_MASK,
sys/vfs/hammer/hammer_prune.c
342
(intmax_t)elm->base.obj_id);
sys/vfs/hammer/hammer_prune.c
348
(intmax_t)elm->base.obj_id);
sys/vfs/hammer/hammer_rebalance.c
195
rebal->key_cur = elm->base;
sys/vfs/hammer/hammer_rebalance.c
569
elm->base.btype) {
sys/vfs/hammer/hammer_rebalance.c
573
base_elm->base.btype = 0;
sys/vfs/hammer/hammer_rebalance.c
590
if (bcmp(&rbound_elm->base, &elm->base, sizeof(elm->base)) != 0) {
sys/vfs/hammer/hammer_rebalance.c
591
save = rbound_elm->base.btype;
sys/vfs/hammer/hammer_rebalance.c
592
rbound_elm->base = elm->base;
sys/vfs/hammer/hammer_rebalance.c
593
rbound_elm->base.btype = save;
sys/vfs/hammer/hammer_reblock.c
148
reblock->key_cur.obj_id = elm->base.obj_id;
sys/vfs/hammer/hammer_reblock.c
149
reblock->key_cur.localization = elm->base.localization;
sys/vfs/hammer/hammer_reblock.c
281
if (elm->leaf.base.btype != HAMMER_BTREE_TYPE_RECORD)
sys/vfs/hammer/hammer_reblock.c
299
switch(elm->leaf.base.rec_type) {
sys/vfs/hammer/hammer_reblock.c
468
elm->leaf.base.rec_type,
sys/vfs/hammer/hammer_reblock.c
505
(elm ? elm->base.localization : -1),
sys/vfs/hammer/hammer_reblock.c
555
(elm ? elm->base.localization : -1),
sys/vfs/hammer/hammer_reblock.c
615
(elm ? elm->base.localization : -1),
sys/vfs/hammer/hammer_redo.c
199
if (base == NULL) {
sys/vfs/hammer/hammer_redo.c
224
if (base) {
sys/vfs/hammer/hammer_redo.c
226
bcopy(base, redo + 1, n);
sys/vfs/hammer/hammer_redo.c
228
base = (char *)base + n;
sys/vfs/hammer/hammer_redo.c
62
void *base, int len)
sys/vfs/hammer/hammer_undo.c
234
bcopy(base, undo + 1, n);
sys/vfs/hammer/hammer_undo.c
280
base = (char *)base + n;
sys/vfs/hammer/hammer_undo.c
305
hammer_format_undo(hammer_mount_t hmp, void *base, uint32_t seqno)
sys/vfs/hammer/hammer_undo.c
312
bzero(base, HAMMER_BUFSIZE);
sys/vfs/hammer/hammer_undo.c
315
head = (void *)((char *)base + i);
sys/vfs/hammer/hammer_undo.c
95
hammer_off_t zone_off, void *base, int len)
sys/vfs/hammer/hammer_vnops.c
1031
vap->va_fileid = ip->ino_leaf.base.obj_id;
sys/vfs/hammer/hammer_vnops.c
1634
hammer_base_elm_t base;
sys/vfs/hammer/hammer_vnops.c
1726
base = &cursor.leaf->base;
sys/vfs/hammer/hammer_vnops.c
1727
saveoff = base->key;
sys/vfs/hammer/hammer_vnops.c
1730
if (base->obj_id != ip->obj_id)
sys/vfs/hammer/hammer_vnops.c
1733
dtype = hammer_get_dtype(cursor.leaf->base.obj_type);
sys/vfs/hammer/hammer_vnops.c
1743
cookies[cookie_index] = base->key;
sys/vfs/hammer/hammer_vnops.c
2440
record->leaf.base.localization = nip->obj_localization |
sys/vfs/hammer/hammer_vnops.c
2442
record->leaf.base.key = HAMMER_FIXKEY_SYMLINK;
sys/vfs/hammer/hammer_vnops.c
2443
record->leaf.base.rec_type = HAMMER_RECTYPE_FIX;
sys/vfs/hammer/hammer_vnops.c
2645
hammer_base_elm_t base;
sys/vfs/hammer/hammer_vnops.c
2760
base = &cursor.leaf->base;
sys/vfs/hammer/hammer_vnops.c
2761
rec_offset = base->key - cursor.leaf->data_len;
sys/vfs/hammer/hammer_vnops.c
2963
hammer_base_elm_t base;
sys/vfs/hammer/hammer_vnops.c
3049
base = &cursor.leaf->base;
sys/vfs/hammer/hammer_vnops.c
3050
rec_offset = base->key - cursor.leaf->data_len;
sys/vfs/hammer2/hammer2.h
1593
hammer2_blockref_t *base, int count);
sys/vfs/hammer2/hammer2.h
1603
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2.h
1607
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2.h
301
struct hammer2_io *base;
sys/vfs/hammer2/hammer2.h
316
struct hammer2_inode *base;
sys/vfs/hammer2/hammer2_chain.c
1211
hammer2_blockref_t *base;
sys/vfs/hammer2/hammer2_chain.c
1215
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
1241
base = &parent->data->ipdata.u.blockset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
1246
base = &parent->data->npdata[0];
sys/vfs/hammer2/hammer2_chain.c
1250
base = &parent->data->voldata.
sys/vfs/hammer2/hammer2_chain.c
1255
base = &parent->data->blkset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
1262
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
1269
return base;
sys/vfs/hammer2/hammer2_chain.c
1291
hammer2_blockref_t *base, int count)
sys/vfs/hammer2/hammer2_chain.c
1295
if (base) {
sys/vfs/hammer2/hammer2_chain.c
1297
if (base[count].type != HAMMER2_BREF_TYPE_EMPTY)
sys/vfs/hammer2/hammer2_chain.c
1302
if (base[count].type != HAMMER2_BREF_TYPE_EMPTY)
sys/vfs/hammer2/hammer2_chain.c
2393
hammer2_blockref_t *base;
sys/vfs/hammer2/hammer2_chain.c
2509
base = &parent->data->ipdata.u.blockset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
2522
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
2530
base = &parent->data->npdata[0];
sys/vfs/hammer2/hammer2_chain.c
2535
base = &parent->data->voldata.sroot_blockset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
2539
base = &parent->data->blkset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
2546
base = NULL; /* safety */
sys/vfs/hammer2/hammer2_chain.c
2561
hammer2_chain_countbrefs(parent, base, count);
sys/vfs/hammer2/hammer2_chain.c
2567
chain = hammer2_combined_find(parent, base, count,
sys/vfs/hammer2/hammer2_chain.c
2825
hammer2_blockref_t *base;
sys/vfs/hammer2/hammer2_chain.c
2901
base = &parent->data->ipdata.u.blockset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
2911
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
2915
base = &parent->data->npdata[0];
sys/vfs/hammer2/hammer2_chain.c
2920
base = &parent->data->voldata.sroot_blockset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
2924
base = &parent->data->blkset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
2930
base = NULL; /* safety */
sys/vfs/hammer2/hammer2_chain.c
2945
hammer2_chain_countbrefs(parent, base, count);
sys/vfs/hammer2/hammer2_chain.c
2950
chain = hammer2_combined_find(parent, base, count,
sys/vfs/hammer2/hammer2_chain.c
3099
hammer2_blockref_t *base;
sys/vfs/hammer2/hammer2_chain.c
3238
base = &parent->data->ipdata.u.blockset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
3244
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
3246
base = &parent->data->npdata[0];
sys/vfs/hammer2/hammer2_chain.c
3251
base = &parent->data->voldata.sroot_blockset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
3256
base = &parent->data->blkset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
3262
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
3271
hammer2_chain_countbrefs(parent, base, count);
sys/vfs/hammer2/hammer2_chain.c
3536
hammer2_blockref_t *base;
sys/vfs/hammer2/hammer2_chain.c
3571
base =
sys/vfs/hammer2/hammer2_chain.c
3574
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
3581
base = &parent->data->npdata[0];
sys/vfs/hammer2/hammer2_chain.c
3583
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
3587
base = &parent->data->voldata.
sys/vfs/hammer2/hammer2_chain.c
3592
base = &parent->data->blkset.blockref[0];
sys/vfs/hammer2/hammer2_chain.c
3596
base = NULL;
sys/vfs/hammer2/hammer2_chain.c
3607
if (base) {
sys/vfs/hammer2/hammer2_chain.c
3608
hammer2_base_delete(parent, base, count, chain, obref);
sys/vfs/hammer2/hammer2_chain.c
3685
hammer2_blockref_t *base, int count);
sys/vfs/hammer2/hammer2_chain.c
3688
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
3692
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
3701
hammer2_blockref_t *base;
sys/vfs/hammer2/hammer2_chain.c
3745
base = hammer2_chain_base_and_count(parent, &count);
sys/vfs/hammer2/hammer2_chain.c
3809
base, count);
sys/vfs/hammer2/hammer2_chain.c
3813
base, count, ncount);
sys/vfs/hammer2/hammer2_chain.c
3818
base, count, ncount);
sys/vfs/hammer2/hammer2_chain.c
3889
base = hammer2_chain_base_and_count(parent, &count);
sys/vfs/hammer2/hammer2_chain.c
3894
reason, parent, base, count, key_next);
sys/vfs/hammer2/hammer2_chain.c
3903
chain = hammer2_combined_find(parent, base, count,
sys/vfs/hammer2/hammer2_chain.c
3998
base = NULL; /* safety */
sys/vfs/hammer2/hammer2_chain.c
4023
base = NULL; /* safety, parent modify may change address */
sys/vfs/hammer2/hammer2_chain.c
4069
hammer2_blockref_t *base;
sys/vfs/hammer2/hammer2_chain.c
4086
base = &chain->data->npdata[0];
sys/vfs/hammer2/hammer2_chain.c
4088
hammer2_chain_countbrefs(chain, base, count);
sys/vfs/hammer2/hammer2_chain.c
4103
base = hammer2_chain_base_and_count(parent, &count);
sys/vfs/hammer2/hammer2_chain.c
4107
hammer2_chain_countbrefs(parent, base, count);
sys/vfs/hammer2/hammer2_chain.c
4249
int keybits, hammer2_blockref_t *base, int count)
sys/vfs/hammer2/hammer2_chain.c
4273
parent, base, count);
sys/vfs/hammer2/hammer2_chain.c
4275
chain = hammer2_combined_find(parent, base, count,
sys/vfs/hammer2/hammer2_chain.c
4362
int keybits, hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
4390
parent, base, count);
sys/vfs/hammer2/hammer2_chain.c
4392
chain = hammer2_combined_find(parent, base, count,
sys/vfs/hammer2/hammer2_chain.c
4482
int keybits, hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
4517
parent, base, count);
sys/vfs/hammer2/hammer2_chain.c
4519
chain = hammer2_combined_find(parent, base, count,
sys/vfs/hammer2/hammer2_chain.c
4652
int keybits, hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
4690
parent, base, count);
sys/vfs/hammer2/hammer2_chain.c
4692
chain = hammer2_combined_find(parent, base, count,
sys/vfs/hammer2/hammer2_chain.c
4922
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
4940
if (count == 0 || base == NULL)
sys/vfs/hammer2/hammer2_chain.c
4962
scan = &base[i];
sys/vfs/hammer2/hammer2_chain.c
5022
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
5035
i = hammer2_base_find(parent, base, count, key_nextp,
sys/vfs/hammer2/hammer2_chain.c
5059
bref = &base[i];
sys/vfs/hammer2/hammer2_chain.c
5070
if ((chain->bref.key <= key_beg && base[i].key <= key_beg) ||
sys/vfs/hammer2/hammer2_chain.c
5071
chain->bref.key == base[i].key) {
sys/vfs/hammer2/hammer2_chain.c
5072
KKASSERT(chain->bref.key == base[i].key);
sys/vfs/hammer2/hammer2_chain.c
5080
if (chain->bref.key < base[i].key) {
sys/vfs/hammer2/hammer2_chain.c
5083
bref = &base[i];
sys/vfs/hammer2/hammer2_chain.c
5111
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
5127
i = hammer2_base_find(parent, base, count, &key_next,
sys/vfs/hammer2/hammer2_chain.c
5129
scan = &base[i];
sys/vfs/hammer2/hammer2_chain.c
5136
base, i, count, elm);
sys/vfs/hammer2/hammer2_chain.c
5201
while (--i >= 0 && base[i].type == HAMMER2_BREF_TYPE_EMPTY)
sys/vfs/hammer2/hammer2_chain.c
5224
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_chain.c
5243
i = hammer2_base_find(parent, base, count, &key_next,
sys/vfs/hammer2/hammer2_chain.c
5303
base[i] = *elm;
sys/vfs/hammer2/hammer2_chain.c
5308
if (i != count && (base[i].key < elm->key || xkey >= base[i].key)) {
sys/vfs/hammer2/hammer2_chain.c
5311
base, i, elm);
sys/vfs/hammer2/hammer2_chain.c
5321
if (j >= 0 && base[j].type == HAMMER2_BREF_TYPE_EMPTY) {
sys/vfs/hammer2/hammer2_chain.c
5323
base[j] = *elm;
sys/vfs/hammer2/hammer2_chain.c
5325
bcopy(&base[j+1], &base[j],
sys/vfs/hammer2/hammer2_chain.c
5326
(i - j - 1) * sizeof(*base));
sys/vfs/hammer2/hammer2_chain.c
5327
base[i - 1] = *elm;
sys/vfs/hammer2/hammer2_chain.c
5332
if (k < count && base[k].type == HAMMER2_BREF_TYPE_EMPTY) {
sys/vfs/hammer2/hammer2_chain.c
5333
bcopy(&base[i], &base[i+1],
sys/vfs/hammer2/hammer2_chain.c
5335
base[i] = *elm;
sys/vfs/hammer2/hammer2_chain.c
5355
if (base[l].type != HAMMER2_BREF_TYPE_EMPTY) {
sys/vfs/hammer2/hammer2_chain.c
5356
key_next = base[l].key +
sys/vfs/hammer2/hammer2_chain.c
5357
((hammer2_key_t)1 << base[l].keybits) - 1;
sys/vfs/hammer2/hammer2_chain.c
5362
if (base[l].type != HAMMER2_BREF_TYPE_EMPTY) {
sys/vfs/hammer2/hammer2_chain.c
5363
if (base[l].key <= key_next)
sys/vfs/hammer2/hammer2_chain.c
5364
panic("base_insert %d %d,%d,%d fail %p:%d", u, i, j, k, base, l);
sys/vfs/hammer2/hammer2_chain.c
5365
key_next = base[l].key +
sys/vfs/hammer2/hammer2_chain.c
5366
((hammer2_key_t)1 << base[l].keybits) - 1;
sys/vfs/hammer2/hammer2_chain.c
76
hammer2_blockref_t *base, int count,
sys/vfs/hammer2/hammer2_flush.c
1081
base = &parent->data->
sys/vfs/hammer2/hammer2_flush.c
1084
base = NULL;
sys/vfs/hammer2/hammer2_flush.c
1091
base = &parent->data->npdata[0];
sys/vfs/hammer2/hammer2_flush.c
1093
base = NULL;
sys/vfs/hammer2/hammer2_flush.c
1097
base = &chain->hmp->voldata.sroot_blockset.blockref[0];
sys/vfs/hammer2/hammer2_flush.c
1101
base = &parent->data->npdata[0];
sys/vfs/hammer2/hammer2_flush.c
1105
base = NULL;
sys/vfs/hammer2/hammer2_flush.c
1116
if (base && (chain->flags & HAMMER2_CHAIN_BLKMAPUPD)) {
sys/vfs/hammer2/hammer2_flush.c
1119
hammer2_base_delete(parent, base, count, chain,
sys/vfs/hammer2/hammer2_flush.c
1128
if (base && (chain->flags & HAMMER2_CHAIN_BLKMAPPED) == 0) {
sys/vfs/hammer2/hammer2_flush.c
1130
hammer2_base_insert(parent, base, count,
sys/vfs/hammer2/hammer2_flush.c
999
hammer2_blockref_t *base;
sys/vfs/hammer2/hammer2_inode.c
560
for (ip = hash->base; ip; ip = ip->next) {
sys/vfs/hammer2/hammer2_inode.c
623
xipp = &hash->base;
sys/vfs/hammer2/hammer2_inode.c
961
for (xipp = &hash->base;
sys/vfs/hammer2/hammer2_io.c
811
for (dio = hash->base; dio; dio = dio->next) {
sys/vfs/hammer2/hammer2_io.c
841
for (xiop = &hash->base; (xio = *xiop) != NULL; xiop = &xio->next) {
sys/vfs/hammer2/hammer2_io.c
884
diop = &hash->base;
sys/vfs/hammer2/hammer2_io.c
947
while ((dio = hash->base) != NULL) {
sys/vfs/hammer2/hammer2_io.c
948
hash->base = dio->next;
sys/vfs/hammer2/hammer2_lz4.c
196
# define INITBASE(base) BYTE* base = ip
sys/vfs/hammer2/hammer2_lz4.c
205
# define INITBASE(base) int base = 0
sys/vfs/hammer2/hammer2_lz4_encoder.h
117
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
141
ref = base + HashTable[h];
sys/vfs/hammer2/hammer2_lz4_encoder.h
142
HashTable[h] = (CURRENT_H_TYPE)(ip - base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
231
HashTable[LZ4_HASHVALUE(ip-2)] = (CURRENT_H_TYPE)(ip - 2 - base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
234
ref = base + HashTable[LZ4_HASHVALUE(ip)];
sys/vfs/hammer2/hammer2_lz4_encoder.h
235
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
282
CURRENTBASE(base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
302
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
326
ref = base + HashTable[h];
sys/vfs/hammer2/hammer2_lz4_encoder.h
327
HashTable[h] = (CURRENT_H_TYPE)(ip - base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
416
HashTable[LZ4_HASHVALUE(ip-2)] = (CURRENT_H_TYPE)(ip - 2 - base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
419
ref = base + HashTable[LZ4_HASHVALUE(ip)];
sys/vfs/hammer2/hammer2_lz4_encoder.h
420
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
sys/vfs/hammer2/hammer2_lz4_encoder.h
69
# define CURRENTBASE(base) BYTE* base = ip
sys/vfs/hammer2/hammer2_lz4_encoder.h
73
# define CURRENTBASE(base) INITBASE(base)
sys/vfs/hammer2/hammer2_lz4_encoder.h
97
CURRENTBASE(base);
sys/vfs/hammer2/hammer2_synchro.c
188
error, list.base);
sys/vfs/hammer2/hammer2_synchro.c
192
while ((defer = list.base) != NULL) {
sys/vfs/hammer2/hammer2_synchro.c
214
if (defer == list.base) {
sys/vfs/hammer2/hammer2_synchro.c
216
list.base = defer->next;
sys/vfs/hammer2/hammer2_synchro.c
230
while ((defer = list.base) != NULL) {
sys/vfs/hammer2/hammer2_synchro.c
233
list.base = defer->next;
sys/vfs/hammer2/hammer2_synchro.c
58
hammer2_deferred_ip_t *base;
sys/vfs/hammer2/hammer2_synchro.c
610
defer->next = list->base;
sys/vfs/hammer2/hammer2_synchro.c
612
list->base = defer;
sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c
181
base = extra = work; /* dummy value--not used */
sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c
185
base = lbase;
sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c
186
base -= 257;
sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c
192
base = dbase;
sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c
223
here.val = base[work[sym]];
sys/vfs/hammer2/zlib/hammer2_zlib_inftrees.c
53
const unsigned short FAR *base; /* base value table to use */
sys/vfs/hammer2/zlib/hammer2_zlib_trees.c
499
int base = desc->stat_desc->extra_base;
sys/vfs/hammer2/zlib/hammer2_zlib_trees.c
526
if (n >= base) xbits = extra[n-base];
sys/vfs/mfs/mfs_vfsops.c
338
mfsp->mfs_baseoff = args.base;
sys/vfs/mfs/mfs_vfsops.c
539
caddr_t base = mfsp->mfs_baseoff + bio->bio_offset;
sys/vfs/mfs/mfs_vfsops.c
553
if ((vm_offset_t)base & PAGE_MASK) {
sys/vfs/mfs/mfs_vfsops.c
554
int n = PAGE_SIZE - ((vm_offset_t)base & PAGE_MASK);
sys/vfs/mfs/mfs_vfsops.c
556
base += n;
sys/vfs/mfs/mfs_vfsops.c
567
uap.addr = base;
sys/vfs/mfs/mfs_vfsops.c
579
bp->b_error = copyin(base, bp->b_data, bp->b_bcount);
sys/vfs/mfs/mfs_vfsops.c
585
bp->b_error = copyout(bp->b_data, base, bp->b_bcount);
sys/vfs/ufs/ffs_softdep.c
2432
softdep_change_directoryentry_offset(struct inode *dp, caddr_t base,
sys/vfs/ufs/ffs_softdep.c
2446
oldoffset = offset + (oldloc - base);
sys/vfs/ufs/ffs_softdep.c
2447
newoffset = offset + (newloc - base);
sys/vfs/ufs/ffs_softdep_stub.c
131
softdep_change_directoryentry_offset(struct inode *dp, caddr_t base,
sys/vfs/ufs/ufsmount.h
50
caddr_t base; /* base of filesystem in memory */
sys/vm/swap_pager.h
120
void swapacctspace(swblk_t base, swblk_t count);
sys/vm/vm_page.c
3906
vm_page_bits(int base, int size)
sys/vm/vm_page.c
3912
base + size <= PAGE_SIZE,
sys/vm/vm_page.c
3913
("vm_page_bits: illegal base/size %d/%d", base, size)
sys/vm/vm_page.c
3919
first_bit = base >> DEV_BSHIFT;
sys/vm/vm_page.c
3920
last_bit = (base + size - 1) >> DEV_BSHIFT;
sys/vm/vm_page.c
3941
_vm_page_zero_valid(vm_page_t m, int base, int size)
sys/vm/vm_page.c
3955
if ((frag = rounddown2(base, DEV_BSIZE)) != base &&
sys/vm/vm_page.c
3956
(m->valid & (1 << (base >> DEV_BSHIFT))) == 0
sys/vm/vm_page.c
3961
base - frag
sys/vm/vm_page.c
3971
endoff = base + size;
sys/vm/vm_page.c
3999
vm_page_set_valid(vm_page_t m, int base, int size)
sys/vm/vm_page.c
4001
_vm_page_zero_valid(m, base, size);
sys/vm/vm_page.c
4002
m->valid |= vm_page_bits(base, size);
sys/vm/vm_page.c
4018
vm_page_set_validclean(vm_page_t m, int base, int size)
sys/vm/vm_page.c
4022
_vm_page_zero_valid(m, base, size);
sys/vm/vm_page.c
4023
pagebits = vm_page_bits(base, size);
sys/vm/vm_page.c
4026
if (base == 0 && size == PAGE_SIZE) {
sys/vm/vm_page.c
4038
vm_page_set_validdirty(vm_page_t m, int base, int size)
sys/vm/vm_page.c
4042
pagebits = vm_page_bits(base, size);
sys/vm/vm_page.c
4060
vm_page_clear_dirty(vm_page_t m, int base, int size)
sys/vm/vm_page.c
4062
m->dirty &= ~vm_page_bits(base, size);
sys/vm/vm_page.c
4063
if (base == 0 && size == PAGE_SIZE) {
sys/vm/vm_page.c
4102
vm_page_set_invalid(vm_page_t m, int base, int size)
sys/vm/vm_page.c
4106
bits = vm_page_bits(base, size);
sys/vm/vm_page.c
4169
vm_page_is_valid(vm_page_t m, int base, int size)
sys/vm/vm_page.c
4171
int bits = vm_page_bits(base, size);
sys/vm/vm_page2.h
367
vm_page_clear_dirty_end_nonincl(vm_page_t m, int base, int size)
sys/vm/vm_page2.h
369
size = (base + size) & ~DEV_BMASK;
sys/vm/vm_page2.h
370
if (base < size)
sys/vm/vm_page2.h
371
vm_page_clear_dirty(m, base, size - base);
sys/vm/vm_page2.h
386
vm_page_clear_dirty_beg_nonincl(vm_page_t m, int base, int size)
sys/vm/vm_page2.h
388
size += base;
sys/vm/vm_page2.h
389
base = (base + DEV_BMASK) & ~DEV_BMASK;
sys/vm/vm_page2.h
390
if (base < size)
sys/vm/vm_page2.h
391
vm_page_clear_dirty(m, base, size - base);
sys/vm/vm_swap.c
592
swapacctspace(swblk_t base, swblk_t count)
sys/vm/vm_swap.c
598
seg = base / SWB_DMMAX;
sys/vm/vm_unix.c
103
sysmsg->sysmsg_resultp = (void *)base;
sys/vm/vm_unix.c
111
base_end = base + incr;
sys/vm/vm_unix.c
116
if (base_end < base ||
sys/vm/vm_unix.c
126
if ((base & PAGE_MASK) != 0 &&
sys/vm/vm_unix.c
127
((base ^ (base_end - 1)) & ~(vm_offset_t)PAGE_MASK) == 0) {
sys/vm/vm_unix.c
128
sysmsg->sysmsg_resultp = (void *)base;
sys/vm/vm_unix.c
136
nbase = round_page(base);
sys/vm/vm_unix.c
151
vm_map_kernel_wiring(&vm->vm_map, base, base_end, 0);
sys/vm/vm_unix.c
179
vm_offset_t new, old, base;
sys/vm/vm_unix.c
187
base = round_page((vm_offset_t)vm->vm_daddr);
sys/vm/vm_unix.c
189
old = base + round_page(vm->vm_dsize);
sys/vm/vm_unix.c
191
if (new > base) {
sys/vm/vm_unix.c
197
(new - base) > (vm_offset_t) p->p_rlimit[RLIMIT_DATA].rlim_cur) {
sys/vm/vm_unix.c
205
} else if (new < base) {
sys/vm/vm_unix.c
72
vm_offset_t base;
sys/vm/vm_unix.c
85
base = round_page((vm_offset_t)vm->vm_daddr) + vm->vm_dsize;
sys/vm/vnode_pager.c
348
int base = (int)nsize & PAGE_MASK;
sys/vm/vnode_pager.c
349
int size = PAGE_SIZE - base;
sys/vm/vnode_pager.c
361
bzero((caddr_t)kva + base, size);
sys/vm/vnode_pager.c
395
vm_page_clear_dirty_beg_nonincl(m, base, size);
test/debug/checkhammer.c
111
long long base;
test/debug/checkhammer.c
115
if (sscanf(buf, " NODE 8%llx", &base) == 1) {
test/debug/checkhammer.c
116
base &= 0x0FFFFFFFFF800000LLU;
test/debug/checkhammer.c
117
map = RB_LOOKUP(rbmap_tree, &rbroot, base);
test/debug/checkhammer.c
125
&base, &bytes) == 2) {
test/debug/checkhammer.c
126
base &= 0x0FFFFFFFFF800000LLU;
test/debug/checkhammer.c
127
map = RB_LOOKUP(rbmap_tree, &rbroot, base);
test/debug/checkhammer.c
165
map->base,
test/debug/checkhammer.c
30
hammer_off_t base;
test/debug/checkhammer.c
37
RB_GENERATE2(rbmap_tree, rbmap, rbentry, rbmap_cmp, hammer_off_t, base);
test/debug/checkhammer.c
45
if (rb1->base < rb2->base)
test/debug/checkhammer.c
47
if (rb1->base > rb2->base)
test/debug/checkhammer.c
86
long long base;
test/debug/checkhammer.c
92
&base, &zone, &app, &free) != 4)
test/debug/checkhammer.c
94
if (RB_LOOKUP(rbmap_tree, &rbroot, (hammer_off_t)base))
test/debug/checkhammer.c
97
map->base = (hammer_off_t)base;
test/debug/h2chains.c
108
base = strtoul(av[0], NULL, 0);
test/debug/h2chains.c
110
kkread(kd, base, &hmp, sizeof(hmp));
test/debug/h2chains.c
115
base + offsetof(struct hammer2_dev, vchain),
test/debug/h2chains.c
123
base + offsetof(struct hammer2_dev, fchain),
test/debug/h2chains.c
75
uintptr_t base;
test/debug/h2dio.c
107
base = strtoul(av[0], NULL, 0);
test/debug/h2dio.c
109
kkread(kd, base, &hmp, sizeof(hmp));
test/debug/h2dio.c
74
uintptr_t base;
test/debug/h2inodes.c
107
base = strtoul(av[0], NULL, 0);
test/debug/h2inodes.c
109
kkread(kd, base, &pmp, sizeof(pmp));
test/debug/h2inodes.c
74
uintptr_t base;
test/debug/ncptrace.c
261
getncppath(kvm_t *kd, struct nchandle *nch, char *base, int bytes)
test/debug/ncptrace.c
272
kkread(kd, (long)ncp.nc_name, base + bytes - ncp.nc_nlen, ncp.nc_nlen);
test/debug/ncptrace.c
275
base[--bytes] = '/';
test/debug/ncptrace.c
282
return(getncppath(kd, &mntinfo.mnt_ncmounton, base, bytes));
test/debug/ncptrace.c
283
} else if (base[bytes] == 0) {
test/debug/ncptrace.c
284
base[--bytes] = '/';
test/debug/ncptrace.c
286
return(base + bytes);
test/debug/seekbench.c
35
off_t base;
test/debug/seekbench.c
58
for (base = skip; base < bytes && count < 100; base += skip) {
test/debug/seekbench.c
59
lseek(fd, base, 0);
test/nvmm/demo/smallkern/main.c
166
setregion(struct region_descriptor *rd, void *base, uint16_t limit)
test/nvmm/demo/smallkern/main.c
169
rd->rd_base = (uint64_t)base;
test/nvmm/demo/smallkern/main.c
192
set_sys_segment(struct sys_segment_descriptor *sd, void *base, size_t limit,
test/nvmm/demo/smallkern/main.c
197
sd->sd_lobase = (uint64_t)base;
test/nvmm/demo/smallkern/main.c
203
sd->sd_hibase = (uint64_t)base >> 24;
test/nvmm/demo/smallkern/main.c
207
set_sys_gdt(int slotoff, void *base, size_t limit, int type, int dpl, int gran)
test/nvmm/demo/smallkern/main.c
211
set_sys_segment(&sd, base, limit, type, dpl, gran);
test/nvmm/demo/toyvirt/elf.c
103
char *base = NULL;
test/nvmm/demo/toyvirt/elf.c
111
base = malloc(st.st_size);
test/nvmm/demo/toyvirt/elf.c
112
pread(fd, base, st.st_size, 0);
test/nvmm/demo/toyvirt/elf.c
114
*rip = elf_parse(mach, base);
test/nvmm/demo/toyvirt/elf.c
119
free(base);
test/nvmm/demo/toyvirt/elf.c
62
elf_parse(struct nvmm_machine *mach, char *base)
test/nvmm/demo/toyvirt/elf.c
64
Elf_Ehdr *ehdr = (Elf_Ehdr *)base;
test/nvmm/demo/toyvirt/elf.c
87
memcpy((void *)hva, base + phdr[i].p_offset, phdr[i].p_filesz);
test/nvmm/demo/toyvirt/main.c
191
seg->base = 0x00000000;
test/stress/eattls.c
42
info.base = buf;
test/stress/webstress/webstress.c
234
const char *base;
test/stress/webstress/webstress.c
243
base = url;
test/stress/webstress/webstress.c
245
base += 7;
test/stress/webstress/webstress.c
246
if ((ptr = strchr(base, '/')) == NULL) {
test/stress/webstress/webstress.c
247
fprintf(stderr, "malformed URL: %s\n", base);
test/stress/webstress/webstress.c
251
hostname = malloc(ptr - base + 1);
test/stress/webstress/webstress.c
252
bcopy(base, hostname, ptr - base);
test/stress/webstress/webstress.c
253
hostname[ptr - base] = 0;
test/stress/webstress/webstress.c
254
base = ptr + 1;
test/stress/webstress/webstress.c
282
node->url_path = strdup(base);
test/testcases/libnvmm/h_io_assist.c
79
seg->base = 0x00000000;
test/testcases/libnvmm/h_mem_assist.c
228
seg->base = 0x00000000;
test/testcases/libnvmm/h_mem_assist.c
425
state->segs[NVMM_X64_SEG_CS].base = 0;
tools/tools/ath/athstats/athstats.c
1005
wf->base.setifname = ath_setifname;
tools/tools/ath/athstats/athstats.c
1007
wf->base.setstamac = wlan_setstamac;
tools/tools/ath/athstats/athstats.c
1009
wf->base.zerostats = ath_zerostats;
tools/tools/ath/athstats/athstats.c
1014
ath_setifname(&wf->base, ifname);
tools/tools/ath/athstats/athstats.c
1015
wf->base.setfmt(&wf->base, fmtstring);
tools/tools/ath/athstats/athstats.c
1017
return &wf->base;
tools/tools/ath/athstats/athstats.c
417
struct athstatfoo base;
tools/tools/ath/athstats/athstats.c
992
statfoo_init(&wf->base.base, "athstats", athstats, N(athstats));
tools/tools/ath/athstats/athstats.c
994
wf->base.base.collect_cur = ath_collect_cur;
tools/tools/ath/athstats/athstats.c
995
wf->base.base.collect_tot = ath_collect_tot;
tools/tools/ath/athstats/athstats.c
996
wf->base.base.get_curstat = ath_get_curstat;
tools/tools/ath/athstats/athstats.c
997
wf->base.base.get_totstat = ath_get_totstat;
tools/tools/ath/athstats/athstats.c
998
wf->base.base.update_tot = ath_update_tot;
tools/tools/ath/athstats/athstats.c
999
wf->base.base.print_verbose = ath_print_verbose;
tools/tools/ath/athstats/athstats.h
41
struct statfoo base;
tools/tools/ath/athstats/statfoo.h
100
{ return wf->base.get_curstat(&wf->base, s, b, bs); } \
tools/tools/ath/athstats/statfoo.h
102
{ return wf->base.get_totstat(&wf->base, s, b, bs); } \
tools/tools/ath/athstats/statfoo.h
104
{ wf->base.print_header(&wf->base, fd); } \
tools/tools/ath/athstats/statfoo.h
106
{ wf->base.print_current(&wf->base, fd); } \
tools/tools/ath/athstats/statfoo.h
108
{ wf->base.print_total(&wf->base, fd); } \
tools/tools/ath/athstats/statfoo.h
110
{ wf->base.print_verbose(&wf->base, fd); } \
tools/tools/ath/athstats/statfoo.h
112
{ wf->base.print_fields(&wf->base, fd); }
tools/tools/ath/athstats/statfoo.h
115
_p->base.setfmt = _t##_setfmt; \
tools/tools/ath/athstats/statfoo.h
116
_p->base.collect_cur = _t##_collect_cur; \
tools/tools/ath/athstats/statfoo.h
117
_p->base.collect_tot = _t##_collect_tot; \
tools/tools/ath/athstats/statfoo.h
118
_p->base.update_tot = _t##_update_tot; \
tools/tools/ath/athstats/statfoo.h
119
_p->base.get_curstat = _t##_get_curstat; \
tools/tools/ath/athstats/statfoo.h
120
_p->base.get_totstat = _t##_get_totstat; \
tools/tools/ath/athstats/statfoo.h
121
_p->base.print_header = _t##_print_header; \
tools/tools/ath/athstats/statfoo.h
122
_p->base.print_current = _t##_print_current; \
tools/tools/ath/athstats/statfoo.h
123
_p->base.print_total = _t##_print_total; \
tools/tools/ath/athstats/statfoo.h
124
_p->base.print_verbose = _t##_print_verbose; \
tools/tools/ath/athstats/statfoo.h
125
_p->base.print_fields = _t##_print_fields; \
tools/tools/ath/athstats/statfoo.h
92
{ wf->base.setfmt(&wf->base, fmt0); } \
tools/tools/ath/athstats/statfoo.h
94
{ wf->base.collect_cur(&wf->base); } \
tools/tools/ath/athstats/statfoo.h
96
{ wf->base.collect_tot(&wf->base); } \
tools/tools/ath/athstats/statfoo.h
98
{ wf->base.update_tot(&wf->base); } \
tools/tools/net80211/wlanstats/statfoo.h
101
{ return wf->base.get_curstat(&wf->base, s, b, bs); } \
tools/tools/net80211/wlanstats/statfoo.h
103
{ return wf->base.get_totstat(&wf->base, s, b, bs); } \
tools/tools/net80211/wlanstats/statfoo.h
105
{ wf->base.print_header(&wf->base, fd); } \
tools/tools/net80211/wlanstats/statfoo.h
107
{ wf->base.print_current(&wf->base, fd); } \
tools/tools/net80211/wlanstats/statfoo.h
109
{ wf->base.print_total(&wf->base, fd); } \
tools/tools/net80211/wlanstats/statfoo.h
111
{ wf->base.print_verbose(&wf->base, fd); } \
tools/tools/net80211/wlanstats/statfoo.h
113
{ wf->base.print_fields(&wf->base, fd); }
tools/tools/net80211/wlanstats/statfoo.h
116
_p->base.setfmt = _t##_setfmt; \
tools/tools/net80211/wlanstats/statfoo.h
117
_p->base.collect_cur = _t##_collect_cur; \
tools/tools/net80211/wlanstats/statfoo.h
118
_p->base.collect_tot = _t##_collect_tot; \
tools/tools/net80211/wlanstats/statfoo.h
119
_p->base.update_tot = _t##_update_tot; \
tools/tools/net80211/wlanstats/statfoo.h
120
_p->base.get_curstat = _t##_get_curstat; \
tools/tools/net80211/wlanstats/statfoo.h
121
_p->base.get_totstat = _t##_get_totstat; \
tools/tools/net80211/wlanstats/statfoo.h
122
_p->base.print_header = _t##_print_header; \
tools/tools/net80211/wlanstats/statfoo.h
123
_p->base.print_current = _t##_print_current; \
tools/tools/net80211/wlanstats/statfoo.h
124
_p->base.print_total = _t##_print_total; \
tools/tools/net80211/wlanstats/statfoo.h
125
_p->base.print_verbose = _t##_print_verbose; \
tools/tools/net80211/wlanstats/statfoo.h
126
_p->base.print_fields = _t##_print_fields; \
tools/tools/net80211/wlanstats/statfoo.h
93
{ wf->base.setfmt(&wf->base, fmt0); } \
tools/tools/net80211/wlanstats/statfoo.h
95
{ wf->base.collect_cur(&wf->base); } \
tools/tools/net80211/wlanstats/statfoo.h
97
{ wf->base.collect_tot(&wf->base); } \
tools/tools/net80211/wlanstats/statfoo.h
99
{ wf->base.update_tot(&wf->base); } \
tools/tools/net80211/wlanstats/wlanstats.c
1003
wf->base.setifname = wlan_setifname;
tools/tools/net80211/wlanstats/wlanstats.c
1004
wf->base.getifname = wlan_getifname;
tools/tools/net80211/wlanstats/wlanstats.c
1005
wf->base.getopmode = wlan_getopmode;
tools/tools/net80211/wlanstats/wlanstats.c
1006
wf->base.setstamac = wlan_setstamac;
tools/tools/net80211/wlanstats/wlanstats.c
1013
wlan_setifname(&wf->base, ifname);
tools/tools/net80211/wlanstats/wlanstats.c
1014
wf->base.setfmt(&wf->base, fmtstring);
tools/tools/net80211/wlanstats/wlanstats.c
1016
return &wf->base;
tools/tools/net80211/wlanstats/wlanstats.c
376
struct wlanstatfoo base;
tools/tools/net80211/wlanstats/wlanstats.c
991
statfoo_init(&wf->base.base, "wlanstats", wlanstats, N(wlanstats));
tools/tools/net80211/wlanstats/wlanstats.c
993
wf->base.base.collect_cur = wlan_collect_cur;
tools/tools/net80211/wlanstats/wlanstats.c
994
wf->base.base.collect_tot = wlan_collect_tot;
tools/tools/net80211/wlanstats/wlanstats.c
995
wf->base.base.get_curstat = wlan_get_curstat;
tools/tools/net80211/wlanstats/wlanstats.c
996
wf->base.base.get_totstat = wlan_get_totstat;
tools/tools/net80211/wlanstats/wlanstats.c
997
wf->base.base.update_tot = wlan_update_tot;
tools/tools/net80211/wlanstats/wlanstats.h
41
struct statfoo base;
usr.bin/chat/chat.c
1351
int base, len, neg, quoted;
usr.bin/chat/chat.c
1404
base = 0;
usr.bin/chat/chat.c
1415
base = 10;
usr.bin/chat/chat.c
1419
base = 8;
usr.bin/chat/chat.c
1423
base = 16;
usr.bin/chat/chat.c
1427
base = 16;
usr.bin/chat/chat.c
1494
if (base != 0) {
usr.bin/chat/chat.c
1498
*--str = hexchars[val % base];
usr.bin/chat/chat.c
1499
val = val / base;
usr.bin/column/column.c
174
int base, chcnt, cnt, col, endcol, numcols, numrows, row;
usr.bin/column/column.c
183
for (base = row, chcnt = col = 0; col < numcols; ++col) {
usr.bin/column/column.c
184
wprintf(L"%ls", list[base]);
usr.bin/column/column.c
185
chcnt += width(list[base]);
usr.bin/column/column.c
186
if ((base += numrows) >= entries)
usr.bin/dc/bcode.c
603
u_long base;
usr.bin/dc/bcode.c
607
base = get_ulong(n);
usr.bin/dc/bcode.c
608
if (base != BN_MASK2 && base > 1 && base <= UINT_MAX)
usr.bin/dc/bcode.c
609
bmachine.obase = (u_int)base;
usr.bin/dc/bcode.c
630
u_long base;
usr.bin/dc/bcode.c
634
base = get_ulong(n);
usr.bin/dc/bcode.c
635
if (base != BN_MASK2 && 2 <= base && base <= 16)
usr.bin/dc/bcode.c
636
bmachine.ibase = (u_int)base;
usr.bin/dc/extern.h
62
u_int base);
usr.bin/dc/inout.c
182
readnumber(struct source *src, u_int base)
usr.bin/dc/inout.c
214
bn_check(BN_mul_word(n->number, base));
usr.bin/dc/inout.c
266
get_digit(u_long num, int digits, u_int base)
usr.bin/dc/inout.c
270
if (base <= 16) {
usr.bin/dc/inout.c
282
printnumber(FILE *f, const struct number *b, u_int base)
usr.bin/dc/inout.c
301
if (base <= 16)
usr.bin/dc/inout.c
304
digits = snprintf(buf, sizeof(buf), "%u", base-1);
usr.bin/dc/inout.c
311
BN_ULONG rem = BN_div_word(int_part->number, base);
usr.bin/dc/inout.c
312
stack_pushstring(&stack, get_digit(rem, digits, base));
usr.bin/dc/inout.c
320
if (base > 16)
usr.bin/dc/inout.c
332
bn_check(BN_set_word(num_base->number, base));
usr.bin/dc/inout.c
343
if (i && base > 16)
usr.bin/dc/inout.c
351
p = get_digit(rem, digits, base);
usr.bin/dc/inout.c
358
bn_check(BN_mul_word(mult, base));
usr.bin/dc/inout.c
370
print_value(FILE *f, const struct value *value, const char *prefix, u_int base)
usr.bin/dc/inout.c
379
printnumber(f, value->u.num, base);
usr.bin/dc/stack.c
254
stack_print(FILE *f, const struct stack *stack, const char *prefix, u_int base)
usr.bin/dc/stack.c
259
print_value(f, &stack->stack[i], prefix, base);
usr.bin/dsynth/config.c
679
char *base;
usr.bin/dsynth/config.c
693
(base = fgetln(fp, &size)) != NULL && size) {
usr.bin/dsynth/config.c
694
base[--size] = 0;
usr.bin/dsynth/config.c
695
if (strncmp(base, " 0x", 3) != 0)
usr.bin/dsynth/config.c
697
r = sscanf(base, "%x %x %x %x %x",
usr.bin/dsynth/pkglist.c
247
char *base;
usr.bin/dsynth/pkglist.c
262
while ((base = fgetln(fp, &len)) != NULL) {
usr.bin/dsynth/pkglist.c
263
if (len == 0 || base[len-1] != '\n')
usr.bin/dsynth/pkglist.c
265
base[--len] = 0;
usr.bin/dsynth/pkglist.c
266
l1 = strtok(base, " \t\r\n");
usr.bin/dsynth/pkglist.c
268
printf("Badly formatted pkg info line: %s\n", base);
usr.bin/dsynth/pkglist.c
296
char *base;
usr.bin/dsynth/pkglist.c
321
while ((base = fgetln(fp, &len)) != NULL) {
usr.bin/dsynth/pkglist.c
322
if (len == 0 || base[len-1] != '\n')
usr.bin/dsynth/pkglist.c
324
base[--len] = 0;
usr.bin/dsynth/pkglist.c
326
data = strchr(base, ':');
usr.bin/dsynth/pkglist.c
331
base = strtok(base, " \t\r");
usr.bin/dsynth/pkglist.c
334
if (base == NULL || data == NULL)
usr.bin/dsynth/pkglist.c
337
if (strcmp(base, "Origin") == 0) {
usr.bin/dsynth/pkglist.c
370
if (state == 1 && strcmp(base, "flavor") == 0) {
usr.bin/evtranalyze/plotter.c
36
ploticus_init(const char *base)
usr.bin/evtranalyze/plotter.c
42
if (!(ctx->basepath = strdup(base)))
usr.bin/fstat/hammer.c
68
fsp->fileid = (long)ino.ino_leaf.base.obj_id;
usr.bin/hexdump/odsyntax.c
190
int base;
usr.bin/hexdump/odsyntax.c
210
base = 0;
usr.bin/hexdump/odsyntax.c
219
base = 16;
usr.bin/hexdump/odsyntax.c
222
base = 16;
usr.bin/hexdump/odsyntax.c
226
if (base == 16)
usr.bin/hexdump/odsyntax.c
237
if (base)
usr.bin/hexdump/odsyntax.c
239
base = 10;
usr.bin/hexdump/odsyntax.c
242
skip = strtoll(num, (char **)&end, base ? base : 8);
usr.bin/hexdump/odsyntax.c
269
if (base == 16) {
usr.bin/hexdump/odsyntax.c
272
} else if (base == 10) {
usr.bin/m4/eval.c
179
int base = 10;
usr.bin/m4/eval.c
184
base = strtonum(argv[3], 2, 36, &errstr);
usr.bin/m4/eval.c
196
pbnumbase(expr(argv[2]), base, maxdigits);
usr.bin/m4/manual_tokenizer.c
1518
YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
usr.bin/m4/manual_tokenizer.c
1523
base[size-2] != YY_END_OF_BUFFER_CHAR ||
usr.bin/m4/manual_tokenizer.c
1524
base[size-1] != YY_END_OF_BUFFER_CHAR )
usr.bin/m4/manual_tokenizer.c
1533
b->yy_buf_pos = b->yy_ch_buf = base;
usr.bin/m4/manual_tokenizer.c
1824
long base;
usr.bin/m4/manual_tokenizer.c
1830
base = strtol(yytext + 2, &next, 0);
usr.bin/m4/manual_tokenizer.c
1831
if (base > 36 || next == NULL) {
usr.bin/m4/manual_tokenizer.c
1844
if (d >= base) {
usr.bin/m4/manual_tokenizer.c
1849
l = base * l + d;
usr.bin/m4/manual_tokenizer.c
301
YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size );
usr.bin/m4/misc.c
120
pbnumbase(int n, int base, int d)
usr.bin/m4/misc.c
126
if (base > 36)
usr.bin/m4/misc.c
127
m4errx(1, "base %d > 36: not supported.", base);
usr.bin/m4/misc.c
129
if (base < 2)
usr.bin/m4/misc.c
130
m4errx(1, "bad base %d for conversion.", base);
usr.bin/m4/misc.c
134
pushback(digits[num % base]);
usr.bin/m4/misc.c
137
while ((num /= base) > 0);
usr.bin/newkey/generic.c
100
BIGNUM *pk, *sk, *tmp, *base, *root, *modulus;
usr.bin/newkey/generic.c
105
base = itobn(BASE);
usr.bin/newkey/generic.c
121
BN_mul(sk, base, sk, ctx);
usr.bin/newkey/generic.c
140
BN_free(base);
usr.bin/patch/backupfile.c
144
version_number(const char *base, const char *backup, size_t base_length)
usr.bin/patch/backupfile.c
150
if (!strncmp(base, backup, base_length) && ISDIGIT(backup[base_length])) {
usr.bin/patch/patch.c
1076
patch_match(LINENUM base, LINENUM offset, LINENUM fuzz)
usr.bin/patch/patch.c
1088
for (iline = base + offset + fuzz; pline <= pat_lines; pline++, iline++) {
usr.bin/sort/radixsort.c
643
run_sort(struct sort_list_item **base, size_t nmemb)
usr.bin/sort/radixsort.c
671
sl->tosort = base;
usr.bin/sort/radixsort.c
693
rxsort(struct sort_list_item **base, size_t nmemb)
usr.bin/sort/radixsort.c
696
run_sort(base, nmemb);
usr.bin/sort/radixsort.h
36
void rxsort(struct sort_list_item **base, size_t nmemb);
usr.sbin/asf/asf.c
247
long long base;
usr.sbin/asf/asf.c
255
base = strtoll(token[2], NULL, 16);
usr.sbin/asf/asf.c
289
textaddr = strtoll(octoken[3], NULL, 16) + base;
usr.sbin/asf/asf.c
291
dataaddr = strtoll(octoken[3], NULL, 16) + base;
usr.sbin/asf/asf.c
293
bssaddr = strtoll(octoken[3], NULL, 16) + base;
usr.sbin/keyserv/setkey.c
286
BN_ULONG r, base = (1 << 8);
usr.sbin/keyserv/setkey.c
293
r = BN_div_word(a, base);
usr.sbin/keyserv/setkey.c
297
r = BN_div_word(a, base);
usr.sbin/lpr/pac/pac.c
243
struct hent **base;
usr.sbin/lpr/pac/pac.c
251
base = (struct hent **) calloc(sizeof hp, hcount);
usr.sbin/lpr/pac/pac.c
252
for (ap = base, c = hcount; c--; ap++) {
usr.sbin/lpr/pac/pac.c
258
qsort(base, hcount, sizeof hp, qucmp);
usr.sbin/lpr/pac/pac.c
262
for (ap = base, c = hcount; c--; ap++) {
usr.sbin/makefs/hammer2/hammer2.h
1641
hammer2_blockref_t *base, int count);
usr.sbin/makefs/hammer2/hammer2.h
1651
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2.h
1655
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2.h
340
struct hammer2_io *base;
usr.sbin/makefs/hammer2/hammer2.h
355
struct hammer2_inode *base;
usr.sbin/makefs/hammer2/hammer2_chain.c
1217
hammer2_blockref_t *base;
usr.sbin/makefs/hammer2/hammer2_chain.c
1221
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
1247
base = &parent->data->ipdata.u.blockset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
1252
base = &parent->data->npdata[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
1256
base = &parent->data->voldata.
usr.sbin/makefs/hammer2/hammer2_chain.c
1261
base = &parent->data->blkset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
1268
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
1275
return base;
usr.sbin/makefs/hammer2/hammer2_chain.c
1297
hammer2_blockref_t *base, int count)
usr.sbin/makefs/hammer2/hammer2_chain.c
1301
if (base) {
usr.sbin/makefs/hammer2/hammer2_chain.c
1303
if (base[count].type != HAMMER2_BREF_TYPE_EMPTY)
usr.sbin/makefs/hammer2/hammer2_chain.c
1308
if (base[count].type != HAMMER2_BREF_TYPE_EMPTY)
usr.sbin/makefs/hammer2/hammer2_chain.c
2399
hammer2_blockref_t *base;
usr.sbin/makefs/hammer2/hammer2_chain.c
2515
base = &parent->data->ipdata.u.blockset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
2528
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
2536
base = &parent->data->npdata[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
2541
base = &parent->data->voldata.sroot_blockset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
2545
base = &parent->data->blkset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
2552
base = NULL; /* safety */
usr.sbin/makefs/hammer2/hammer2_chain.c
2567
hammer2_chain_countbrefs(parent, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
2573
chain = hammer2_combined_find(parent, base, count,
usr.sbin/makefs/hammer2/hammer2_chain.c
2831
hammer2_blockref_t *base;
usr.sbin/makefs/hammer2/hammer2_chain.c
2907
base = &parent->data->ipdata.u.blockset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
2917
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
2921
base = &parent->data->npdata[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
2926
base = &parent->data->voldata.sroot_blockset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
2930
base = &parent->data->blkset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
2936
base = NULL; /* safety */
usr.sbin/makefs/hammer2/hammer2_chain.c
2951
hammer2_chain_countbrefs(parent, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
2956
chain = hammer2_combined_find(parent, base, count,
usr.sbin/makefs/hammer2/hammer2_chain.c
3105
hammer2_blockref_t *base;
usr.sbin/makefs/hammer2/hammer2_chain.c
3244
base = &parent->data->ipdata.u.blockset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
3250
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
3252
base = &parent->data->npdata[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
3257
base = &parent->data->voldata.sroot_blockset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
3262
base = &parent->data->blkset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
3268
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
3277
hammer2_chain_countbrefs(parent, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
3542
hammer2_blockref_t *base;
usr.sbin/makefs/hammer2/hammer2_chain.c
3577
base =
usr.sbin/makefs/hammer2/hammer2_chain.c
3580
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
3587
base = &parent->data->npdata[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
3589
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
3593
base = &parent->data->voldata.
usr.sbin/makefs/hammer2/hammer2_chain.c
3598
base = &parent->data->blkset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
3602
base = NULL;
usr.sbin/makefs/hammer2/hammer2_chain.c
3613
if (base) {
usr.sbin/makefs/hammer2/hammer2_chain.c
3614
hammer2_base_delete(parent, base, count, chain, obref);
usr.sbin/makefs/hammer2/hammer2_chain.c
3691
hammer2_blockref_t *base, int count);
usr.sbin/makefs/hammer2/hammer2_chain.c
3694
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
3698
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
3707
hammer2_blockref_t *base;
usr.sbin/makefs/hammer2/hammer2_chain.c
3751
base = hammer2_chain_base_and_count(parent, &count);
usr.sbin/makefs/hammer2/hammer2_chain.c
3815
base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
3819
base, count, ncount);
usr.sbin/makefs/hammer2/hammer2_chain.c
3824
base, count, ncount);
usr.sbin/makefs/hammer2/hammer2_chain.c
3895
base = hammer2_chain_base_and_count(parent, &count);
usr.sbin/makefs/hammer2/hammer2_chain.c
3900
reason, parent, base, count, key_next);
usr.sbin/makefs/hammer2/hammer2_chain.c
3909
chain = hammer2_combined_find(parent, base, count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4004
base = NULL; /* safety */
usr.sbin/makefs/hammer2/hammer2_chain.c
4029
base = NULL; /* safety, parent modify may change address */
usr.sbin/makefs/hammer2/hammer2_chain.c
4075
hammer2_blockref_t *base;
usr.sbin/makefs/hammer2/hammer2_chain.c
4092
base = &chain->data->npdata[0];
usr.sbin/makefs/hammer2/hammer2_chain.c
4094
hammer2_chain_countbrefs(chain, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
4109
base = hammer2_chain_base_and_count(parent, &count);
usr.sbin/makefs/hammer2/hammer2_chain.c
4113
hammer2_chain_countbrefs(parent, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
4255
int keybits, hammer2_blockref_t *base, int count)
usr.sbin/makefs/hammer2/hammer2_chain.c
4279
parent, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
4281
chain = hammer2_combined_find(parent, base, count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4368
int keybits, hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4396
parent, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
4398
chain = hammer2_combined_find(parent, base, count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4488
int keybits, hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4523
parent, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
4525
chain = hammer2_combined_find(parent, base, count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4658
int keybits, hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4696
parent, base, count);
usr.sbin/makefs/hammer2/hammer2_chain.c
4698
chain = hammer2_combined_find(parent, base, count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4928
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
4946
if (count == 0 || base == NULL)
usr.sbin/makefs/hammer2/hammer2_chain.c
4968
scan = &base[i];
usr.sbin/makefs/hammer2/hammer2_chain.c
5028
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
5041
i = hammer2_base_find(parent, base, count, key_nextp,
usr.sbin/makefs/hammer2/hammer2_chain.c
5065
bref = &base[i];
usr.sbin/makefs/hammer2/hammer2_chain.c
5076
if ((chain->bref.key <= key_beg && base[i].key <= key_beg) ||
usr.sbin/makefs/hammer2/hammer2_chain.c
5077
chain->bref.key == base[i].key) {
usr.sbin/makefs/hammer2/hammer2_chain.c
5078
KKASSERT(chain->bref.key == base[i].key);
usr.sbin/makefs/hammer2/hammer2_chain.c
5086
if (chain->bref.key < base[i].key) {
usr.sbin/makefs/hammer2/hammer2_chain.c
5089
bref = &base[i];
usr.sbin/makefs/hammer2/hammer2_chain.c
5117
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
5133
i = hammer2_base_find(parent, base, count, &key_next,
usr.sbin/makefs/hammer2/hammer2_chain.c
5135
scan = &base[i];
usr.sbin/makefs/hammer2/hammer2_chain.c
5142
base, i, count, elm);
usr.sbin/makefs/hammer2/hammer2_chain.c
5207
while (--i >= 0 && base[i].type == HAMMER2_BREF_TYPE_EMPTY)
usr.sbin/makefs/hammer2/hammer2_chain.c
5230
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_chain.c
5249
i = hammer2_base_find(parent, base, count, &key_next,
usr.sbin/makefs/hammer2/hammer2_chain.c
5309
base[i] = *elm;
usr.sbin/makefs/hammer2/hammer2_chain.c
5314
if (i != count && (base[i].key < elm->key || xkey >= base[i].key)) {
usr.sbin/makefs/hammer2/hammer2_chain.c
5317
base, i, elm);
usr.sbin/makefs/hammer2/hammer2_chain.c
5327
if (j >= 0 && base[j].type == HAMMER2_BREF_TYPE_EMPTY) {
usr.sbin/makefs/hammer2/hammer2_chain.c
5329
base[j] = *elm;
usr.sbin/makefs/hammer2/hammer2_chain.c
5331
bcopy(&base[j+1], &base[j],
usr.sbin/makefs/hammer2/hammer2_chain.c
5332
(i - j - 1) * sizeof(*base));
usr.sbin/makefs/hammer2/hammer2_chain.c
5333
base[i - 1] = *elm;
usr.sbin/makefs/hammer2/hammer2_chain.c
5338
if (k < count && base[k].type == HAMMER2_BREF_TYPE_EMPTY) {
usr.sbin/makefs/hammer2/hammer2_chain.c
5339
bcopy(&base[i], &base[i+1],
usr.sbin/makefs/hammer2/hammer2_chain.c
5341
base[i] = *elm;
usr.sbin/makefs/hammer2/hammer2_chain.c
5361
if (base[l].type != HAMMER2_BREF_TYPE_EMPTY) {
usr.sbin/makefs/hammer2/hammer2_chain.c
5362
key_next = base[l].key +
usr.sbin/makefs/hammer2/hammer2_chain.c
5363
((hammer2_key_t)1 << base[l].keybits) - 1;
usr.sbin/makefs/hammer2/hammer2_chain.c
5368
if (base[l].type != HAMMER2_BREF_TYPE_EMPTY) {
usr.sbin/makefs/hammer2/hammer2_chain.c
5369
if (base[l].key <= key_next)
usr.sbin/makefs/hammer2/hammer2_chain.c
5370
panic("base_insert %d %d,%d,%d fail %p:%d", u, i, j, k, base, l);
usr.sbin/makefs/hammer2/hammer2_chain.c
5371
key_next = base[l].key +
usr.sbin/makefs/hammer2/hammer2_chain.c
5372
((hammer2_key_t)1 << base[l].keybits) - 1;
usr.sbin/makefs/hammer2/hammer2_chain.c
80
hammer2_blockref_t *base, int count,
usr.sbin/makefs/hammer2/hammer2_flush.c
1003
hammer2_blockref_t *base;
usr.sbin/makefs/hammer2/hammer2_flush.c
1085
base = &parent->data->
usr.sbin/makefs/hammer2/hammer2_flush.c
1088
base = NULL;
usr.sbin/makefs/hammer2/hammer2_flush.c
1095
base = &parent->data->npdata[0];
usr.sbin/makefs/hammer2/hammer2_flush.c
1097
base = NULL;
usr.sbin/makefs/hammer2/hammer2_flush.c
1101
base = &chain->hmp->voldata.sroot_blockset.blockref[0];
usr.sbin/makefs/hammer2/hammer2_flush.c
1105
base = &parent->data->npdata[0];
usr.sbin/makefs/hammer2/hammer2_flush.c
1109
base = NULL;
usr.sbin/makefs/hammer2/hammer2_flush.c
1120
if (base && (chain->flags & HAMMER2_CHAIN_BLKMAPUPD)) {
usr.sbin/makefs/hammer2/hammer2_flush.c
1123
hammer2_base_delete(parent, base, count, chain,
usr.sbin/makefs/hammer2/hammer2_flush.c
1132
if (base && (chain->flags & HAMMER2_CHAIN_BLKMAPPED) == 0) {
usr.sbin/makefs/hammer2/hammer2_flush.c
1134
hammer2_base_insert(parent, base, count,
usr.sbin/makefs/hammer2/hammer2_inode.c
1858
for (ip = hash->base; ip; ip = ip->next)
usr.sbin/makefs/hammer2/hammer2_inode.c
1861
for (ip = hash->base; ip;) {
usr.sbin/makefs/hammer2/hammer2_inode.c
1878
for (ip = hash->base; ip; ip = ip->next)
usr.sbin/makefs/hammer2/hammer2_inode.c
566
for (ip = hash->base; ip; ip = ip->next) {
usr.sbin/makefs/hammer2/hammer2_inode.c
629
xipp = &hash->base;
usr.sbin/makefs/hammer2/hammer2_inode.c
968
for (xipp = &hash->base;
usr.sbin/makefs/hammer2/hammer2_io.c
830
for (dio = hash->base; dio; dio = dio->next) {
usr.sbin/makefs/hammer2/hammer2_io.c
860
for (xiop = &hash->base; (xio = *xiop) != NULL; xiop = &xio->next) {
usr.sbin/makefs/hammer2/hammer2_io.c
903
diop = &hash->base;
usr.sbin/makefs/hammer2/hammer2_io.c
966
while ((dio = hash->base) != NULL) {
usr.sbin/makefs/hammer2/hammer2_io.c
967
hash->base = dio->next;
usr.sbin/makefs/hammer2/hammer2_lz4.c
198
# define INITBASE(base) BYTE* base = ip
usr.sbin/makefs/hammer2/hammer2_lz4.c
207
# define INITBASE(base) int base = 0
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
117
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
141
ref = base + HashTable[h];
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
142
HashTable[h] = (CURRENT_H_TYPE)(ip - base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
231
HashTable[LZ4_HASHVALUE(ip-2)] = (CURRENT_H_TYPE)(ip - 2 - base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
234
ref = base + HashTable[LZ4_HASHVALUE(ip)];
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
235
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
282
CURRENTBASE(base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
302
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
326
ref = base + HashTable[h];
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
327
HashTable[h] = (CURRENT_H_TYPE)(ip - base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
416
HashTable[LZ4_HASHVALUE(ip-2)] = (CURRENT_H_TYPE)(ip - 2 - base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
419
ref = base + HashTable[LZ4_HASHVALUE(ip)];
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
420
HashTable[LZ4_HASHVALUE(ip)] = (CURRENT_H_TYPE)(ip - base);
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
69
# define CURRENTBASE(base) BYTE* base = ip
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
73
# define CURRENTBASE(base) INITBASE(base)
usr.sbin/makefs/hammer2/hammer2_lz4_encoder.h
97
CURRENTBASE(base);
usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c
181
base = extra = work; /* dummy value--not used */
usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c
185
base = lbase;
usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c
186
base -= 257;
usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c
192
base = dbase;
usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c
223
here.val = base[work[sym]];
usr.sbin/makefs/hammer2/zlib/hammer2_zlib_inftrees.c
53
const unsigned short FAR *base; /* base value table to use */
usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c
499
int base = desc->stat_desc->extra_base;
usr.sbin/makefs/hammer2/zlib/hammer2_zlib_trees.c
526
if (n >= base) xbits = extra[n-base];
usr.sbin/makefs/mtree.c
194
const char *base, *p, *v;
usr.sbin/makefs/mtree.c
222
base = spec + 1;
usr.sbin/makefs/mtree.c
226
p = strchr(base, '$');
usr.sbin/makefs/mtree.c
228
sbuf_bcat(sb, base, len);
usr.sbin/makefs/mtree.c
229
base += len;
usr.sbin/makefs/mtree.c
236
if (base != p) {
usr.sbin/makefs/mtree.c
237
sbuf_bcat(sb, base, p - base);
usr.sbin/makefs/mtree.c
238
len -= p - base;
usr.sbin/makefs/mtree.c
239
base = p;
usr.sbin/makefs/mtree.c
243
base += 2;
usr.sbin/makefs/mtree.c
248
base++;
usr.sbin/makefs/mtree.c
251
v = base;
usr.sbin/makefs/mtree.c
252
if (*base == '{') {
usr.sbin/makefs/mtree.c
258
len -= (p + 1) - base;
usr.sbin/makefs/mtree.c
259
base = p + 1;
usr.sbin/makefs/mtree.c
463
read_number(const char *tok, u_int base, intmax_t *res, intmax_t min,
usr.sbin/makefs/mtree.c
469
val = strtoimax(tok, &end, base);
usr.sbin/mfiutil/mfi_evt.c
242
static time_t base;
usr.sbin/mfiutil/mfi_evt.c
252
if (base == 0) {
usr.sbin/mfiutil/mfi_evt.c
257
base = mktime(&tm);
usr.sbin/mfiutil/mfi_evt.c
259
if (base == -1) {
usr.sbin/mfiutil/mfi_evt.c
263
t = base + timestamp;
usr.sbin/newsyslog/newsyslog.c
1551
const char *base, *dir;
usr.sbin/newsyslog/newsyslog.c
1573
base = basename(basebuf);
usr.sbin/newsyslog/newsyslog.c
1574
if (strcmp(base, "/") == 0)
usr.sbin/newsyslog/newsyslog.c
1585
if (validate_old_timelog(dir_fd, dp, base, &tm) == 0)
usr.sbin/pciconf/pciconf.c
257
print_window(int reg, const char *type, int range, uint64_t base,
usr.sbin/pciconf/pciconf.c
262
reg, type, range, (uintmax_t)base, (uintmax_t)limit,
usr.sbin/pciconf/pciconf.c
263
base < limit ? "enabled" : "disabled");
usr.sbin/pciconf/pciconf.c
291
uint64_t base, limit;
usr.sbin/pciconf/pciconf.c
306
base = PCI_PPBIOBASE(
usr.sbin/pciconf/pciconf.c
314
base = PCI_PPBIOBASE(0, val);
usr.sbin/pciconf/pciconf.c
319
print_window(PCIR_IOBASEL_1, "I/O Port", range, base, limit);
usr.sbin/pciconf/pciconf.c
322
base = PCI_PPBMEMBASE(0,
usr.sbin/pciconf/pciconf.c
326
print_window(PCIR_MEMBASE_1, "Memory", 32, base, limit);
usr.sbin/pciconf/pciconf.c
331
base = PCI_PPBMEMBASE(
usr.sbin/pciconf/pciconf.c
339
base = PCI_PPBMEMBASE(0, val);
usr.sbin/pciconf/pciconf.c
344
print_window(PCIR_PMBASEL_1, "Prefetchable Memory", range, base,
usr.sbin/pciconf/pciconf.c
380
uint32_t base, limit;
usr.sbin/pciconf/pciconf.c
386
base = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, basereg, 4));
usr.sbin/pciconf/pciconf.c
390
base = PCI_CBBIOBASE(val);
usr.sbin/pciconf/pciconf.c
394
print_window(basereg, "I/O Port", range, base, limit);
usr.sbin/pciconf/pciconf.c
433
uint64_t base;
usr.sbin/pciconf/pciconf.c
459
base = bar.pbi_base & PCIM_BAR_IO_BASE;
usr.sbin/pciconf/pciconf.c
478
base = bar.pbi_base & ~((uint64_t)0xf);
usr.sbin/pciconf/pciconf.c
481
PCIR_BAR(i), type, range, (uintmax_t)base);
usr.sbin/ppp/exec.c
168
log_Printf(LogDEBUG, "Exec'ing ``%s''\n", p->name.base);
usr.sbin/ppp/exec.c
170
if ((argc = MakeArgs(p->name.base, argv, VECSIZE(argv),
usr.sbin/ppp/exec.c
217
log_Printf(LogWARN, "Cannot exec \"%s\": %s\n", p->name.base,
usr.sbin/ppp/nat_cmd.c
448
long base, count;
usr.sbin/ppp/nat_cmd.c
458
base = strtol(arg->argv[arg->argn], &end, 10);
usr.sbin/ppp/nat_cmd.c
459
if (*end != '\0' || base < 0)
usr.sbin/ppp/nat_cmd.c
466
PacketAliasSetFWBase(base, count);
usr.sbin/ppp/physical.c
190
p->name.base = p->name.full;
usr.sbin/ppp/physical.c
298
(res = ID0uu_lock(p->name.base)) != UU_LOCK_OK) {
usr.sbin/ppp/physical.c
314
ID0uu_unlock(p->name.base) == -1)
usr.sbin/ppp/physical.c
316
p->name.base);
usr.sbin/ppp/physical.c
362
snprintf(fn, sizeof fn, "%s%s.if", _PATH_VARRUN, p->name.base);
usr.sbin/ppp/physical.c
371
p->name.base = p->name.full;
usr.sbin/ppp/physical.c
733
return p->name.base;
usr.sbin/ppp/physical.c
744
if ((res = ID0uu_lock_txfr(p->name.base, newpid)) != UU_LOCK_OK)
usr.sbin/ppp/physical.c
894
if (p->type == PHYS_DIRECT && *p->name.base && !p->Utmp) {
usr.sbin/ppp/physical.c
906
strncpy(ut.ut_host, p->name.base, sizeof ut.ut_host);
usr.sbin/ppp/physical.c
911
strncpy(ut.ut_line, p->name.base, sizeof ut.ut_line);
usr.sbin/ppp/physical.c
954
p->name.base = *p->name.full == '!' ? p->name.full + 1 :
usr.sbin/ppp/physical.c
966
snprintf(fn, sizeof fn, "%s%s.if", _PATH_VARRUN, p->name.base);
usr.sbin/ppp/physical.h
96
char *base;
usr.sbin/ppp/tcp.c
201
p->name.base = p->name.full;
usr.sbin/ppp/tty.c
573
if (!strcmp(ttyp->ty_name, p->name.base)) {
usr.sbin/ppp/udp.c
126
p->name.base = p->name.full;
usr.sbin/rtadvd/advcap.c
302
int base;
usr.sbin/rtadvd/advcap.c
317
base = 10;
usr.sbin/rtadvd/advcap.c
319
base = 8;
usr.sbin/rtadvd/advcap.c
322
i *= base, i += *bp++ - '0';
usr.sbin/trpt/trpt.c
454
klseek(int fd, off_t base, int off)
usr.sbin/trpt/trpt.c
456
lseek(fd, base, off);
usr.sbin/zic/zic.c
676
int base, out;
usr.sbin/zic/zic.c
712
for (base = 0; base < nrules; base = out) {
usr.sbin/zic/zic.c
713
rp = &rules[base];
usr.sbin/zic/zic.c
714
for (out = base + 1; out < nrules; ++out)
usr.sbin/zic/zic.c
722
zp->z_nrules = out - base;
