Symbol: zs_write_reg
sys/arch/alpha/include/z8530var.h
112
void zs_write_reg(struct zs_chanstate *cs, u_int reg, u_int val);
sys/arch/cesfic/dev/zs.c
160
zs_write_reg(cs, 9, 0);
sys/arch/cesfic/dev/zs.c
173
zs_write_reg(cs, 9, reset);
sys/arch/cesfic/dev/zs.c
454
zs_write_reg(cs, 9, 0);
sys/arch/cesfic/dev/zs.c
457
zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
sys/arch/cesfic/dev/zs_pcc.c
100
zs_write_reg(zsc->zsc_cs[0], 9, ZSWR9_MASTER_IE);
sys/arch/cesfic/dev/zs_pcc.c
99
zs_write_reg(zsc->zsc_cs[0], 2, 0x18 + ZSHARD_PRI);
sys/arch/cesfic/include/z8530var.h
16
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/cobalt/dev/zs.c
217
zs_write_reg(cs, 9, 0);
sys/arch/cobalt/dev/zs.c
231
zs_write_reg(cs, 9, reset);
sys/arch/cobalt/dev/zs.c
250
zs_write_reg(cs, 2, 0);
sys/arch/cobalt/dev/zs.c
252
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/cobalt/dev/zs.c
532
zs_write_reg(cs, 9, 0);
sys/arch/cobalt/dev/zs.c
535
zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
sys/arch/cobalt/include/z8530var.h
108
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/cobalt/stand/boot/zs.c
100
zs_write_reg(dev, 6, 0);
sys/arch/cobalt/stand/boot/zs.c
101
zs_write_reg(dev, 7, 0);
sys/arch/cobalt/stand/boot/zs.c
104
zs_write_reg(dev, 14, ZSWR14_BAUD_FROM_PCLK);
sys/arch/cobalt/stand/boot/zs.c
106
zs_write_reg(dev, 11, ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD);
sys/arch/cobalt/stand/boot/zs.c
108
zs_write_reg(dev, 12, BPS_TO_TCONST(ZSCLOCK / 16, ZSSPEED));
sys/arch/cobalt/stand/boot/zs.c
109
zs_write_reg(dev, 13, 0);
sys/arch/cobalt/stand/boot/zs.c
112
zs_write_reg(dev, 14, ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA);
sys/arch/cobalt/stand/boot/zs.c
114
zs_write_reg(dev, 15, 0);
sys/arch/cobalt/stand/boot/zs.c
121
zs_write_reg(dev, 3, ZSWR3_RX_8 | ZSWR3_RX_ENABLE);
sys/arch/cobalt/stand/boot/zs.c
122
zs_write_reg(dev, 5,
sys/arch/cobalt/stand/boot/zs.c
48
static void zs_write_reg(void *, uint8_t, uint8_t);
sys/arch/cobalt/stand/boot/zs.c
85
zs_write_reg(dev, 9, 0);
sys/arch/cobalt/stand/boot/zs.c
87
zs_write_reg(dev, 9, ZSWR9_HARD_RESET);
sys/arch/cobalt/stand/boot/zs.c
91
zs_write_reg(dev, 1, 0);
sys/arch/cobalt/stand/boot/zs.c
94
zs_write_reg(dev, 4, ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP);
sys/arch/cobalt/stand/boot/zs.c
95
zs_write_reg(dev, 10, ZSWR10_NRZ);
sys/arch/cobalt/stand/boot/zs.c
96
zs_write_reg(dev, 3, ZSWR3_RX_8);
sys/arch/cobalt/stand/boot/zs.c
97
zs_write_reg(dev, 5, ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_RTS);
sys/arch/ews4800mips/dev/ewskbd.c
264
zs_write_reg(cs, 9, ZSWR9_B_RESET);
sys/arch/ews4800mips/dev/ewskbd.c
266
zs_write_reg(cs, 9, ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR);
sys/arch/ews4800mips/dev/ewskbd.c
330
zs_write_reg(cs, 0, ZSWR0_RESET_TXINT);
sys/arch/ews4800mips/dev/ewsms.c
200
zs_write_reg(cs, 9, ZSWR9_A_RESET);
sys/arch/ews4800mips/dev/ewsms.c
243
zs_write_reg(cs, 0, ZSWR0_RESET_TXINT);
sys/arch/ews4800mips/include/z8530var.h
101
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/ews4800mips/sbd/zs_sbdio.c
171
zs_write_reg(cs, 9, 0);
sys/arch/ews4800mips/sbd/zs_sbdio.c
184
zs_write_reg(cs, 9, reset);
sys/arch/ews4800mips/sbd/zs_sbdio.c
200
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/ews4800mips/sbd/zs_sbdio.c
202
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/ews4800mips/sbd/zs_sbdio.c
255
zs_write_reg(cs, 9, 0);
sys/arch/ews4800mips/sbd/zs_sbdio.c
258
zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
sys/arch/mac68k/dev/zs.c
342
zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
sys/arch/mac68k/dev/zs.c
343
zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
sys/arch/mac68k/dev/zs.c
372
zs_write_reg(cs, 9, reset);
sys/arch/mac68k/dev/zs.c
395
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/mac68k/dev/zs.c
397
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/mac68k/include/z8530var.h
158
void zs_write_reg(struct zs_chanstate *, uint8_t, uint8_t);
sys/arch/macppc/dev/zs.c
372
zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
sys/arch/macppc/dev/zs.c
373
zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
sys/arch/macppc/dev/zs.c
400
zs_write_reg(cs, 9, reset);
sys/arch/macppc/dev/zs.c
429
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/macppc/dev/zs.c
431
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/macppc/include/z8530var.h
162
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg,uint8_t val);
sys/arch/mipsco/include/z8530var.h
115
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/mipsco/obio/zs.c
264
zs_write_reg(cs, 9, 0);
sys/arch/mipsco/obio/zs.c
277
zs_write_reg(cs, 9, reset);
sys/arch/mipsco/obio/zs.c
296
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/mipsco/obio/zs.c
298
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/mvme68k/dev/zs.c
190
zs_write_reg(cs, 9, 0);
sys/arch/mvme68k/dev/zs.c
191
zs_write_reg(cs, 2, vector);
sys/arch/mvme68k/dev/zs.c
204
zs_write_reg(cs, 9, reset);
sys/arch/mvme68k/dev/zs.c
531
zs_write_reg(cs, 9, 0);
sys/arch/mvme68k/dev/zs.c
534
zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
sys/arch/mvme68k/dev/zs_pcc.c
160
zs_write_reg(zsc->zsc_cs[0], 2, PCC_VECBASE + PCCV_ZS);
sys/arch/mvme68k/dev/zs_pcc.c
161
zs_write_reg(zsc->zsc_cs[0], 9, zs_init_reg[9]);
sys/arch/mvme68k/dev/zs_pcctwo.c
143
zs_write_reg(zsc->zsc_cs[0], 9, zs_init_reg[9]);
sys/arch/mvme68k/include/z8530var.h
109
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/news68k/dev/zs.c
249
zs_write_reg(cs, 9, 0);
sys/arch/news68k/dev/zs.c
263
zs_write_reg(cs, 9, reset);
sys/arch/news68k/dev/zs.c
282
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/news68k/dev/zs.c
284
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/news68k/dev/zs.c
584
zs_write_reg(cs, 9, 0);
sys/arch/news68k/dev/zs.c
587
zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
sys/arch/news68k/include/z8530var.h
108
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/newsmips/apbus/zs_ap.c
376
zs_write_reg(cs, 9, 0);
sys/arch/newsmips/apbus/zs_ap.c
389
zs_write_reg(cs, 9, reset);
sys/arch/newsmips/apbus/zs_ap.c
427
zs_write_reg(cs, 15, x | ZSWR15_ENABLE_ENHANCED);
sys/arch/newsmips/apbus/zs_ap.c
430
zs_write_reg(cs, 7, ZSWR7P_EXTEND_READ | ZSWR7P_TX_FIFO);
sys/arch/newsmips/apbus/zs_ap.c
442
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/newsmips/apbus/zs_ap.c
444
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/newsmips/apbus/zs_ap.c
569
zs_write_reg(cs, 9, 0);
sys/arch/newsmips/apbus/zs_ap.c
572
zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
sys/arch/newsmips/dev/zs_hb.c
266
zs_write_reg(cs, 9, 0);
sys/arch/newsmips/dev/zs_hb.c
279
zs_write_reg(cs, 9, reset);
sys/arch/newsmips/dev/zs_hb.c
301
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/newsmips/dev/zs_hb.c
303
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/newsmips/include/z8530var.h
108
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/next68k/dev/zs.c
253
zs_write_reg(cs, 9, 0);
sys/arch/next68k/dev/zs.c
266
zs_write_reg(cs, 9, reset);
sys/arch/next68k/dev/zs.c
283
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/next68k/dev/zs.c
285
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/next68k/include/z8530var.h
65
void zs_write_reg(struct zs_chanstate *, uint8_t, uint8_t);
sys/arch/pmax/include/z8530var.h
74
void zs_write_reg(struct zs_chanstate *cs, u_int reg, u_int val);
sys/arch/sgimips/dev/zs.c
314
zs_write_reg(cs, 9, 0);
sys/arch/sgimips/dev/zs.c
327
zs_write_reg(cs, 9, reset);
sys/arch/sgimips/dev/zs.c
346
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/sgimips/dev/zs.c
348
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/sgimips/dev/zs_kbd.c
234
zs_write_reg(cs, 9, (channel == 0) ? ZSWR9_A_RESET : ZSWR9_B_RESET);
sys/arch/sgimips/dev/zs_kbd.c
292
zs_write_reg(cs, 0, ZSWR0_RESET_TXINT);
sys/arch/sgimips/dev/zs_ms.c
164
zs_write_reg(cs, 9, (channel == 0) ? ZSWR9_A_RESET : ZSWR9_B_RESET);
sys/arch/sgimips/dev/zs_ms.c
202
zs_write_reg(cs, 0, ZSWR0_RESET_TXINT);
sys/arch/sgimips/include/z8530var.h
115
void zs_write_reg (struct zs_chanstate *, uint8_t, uint8_t);
sys/arch/sgimips/stand/common/iris_zs.c
111
zs_write_reg(dev, 9, 0);
sys/arch/sgimips/stand/common/iris_zs.c
113
zs_write_reg(dev, 9, ZSWR9_HARD_RESET);
sys/arch/sgimips/stand/common/iris_zs.c
117
zs_write_reg(dev, 1, 0);
sys/arch/sgimips/stand/common/iris_zs.c
120
zs_write_reg(dev, 4, ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP);
sys/arch/sgimips/stand/common/iris_zs.c
121
zs_write_reg(dev, 10, ZSWR10_NRZ);
sys/arch/sgimips/stand/common/iris_zs.c
122
zs_write_reg(dev, 3, ZSWR3_RX_8);
sys/arch/sgimips/stand/common/iris_zs.c
123
zs_write_reg(dev, 5, ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_RTS);
sys/arch/sgimips/stand/common/iris_zs.c
126
zs_write_reg(dev, 6, 0);
sys/arch/sgimips/stand/common/iris_zs.c
127
zs_write_reg(dev, 7, 0);
sys/arch/sgimips/stand/common/iris_zs.c
130
zs_write_reg(dev, 11,
sys/arch/sgimips/stand/common/iris_zs.c
134
zs_write_reg(dev, 12, BPS_TO_TCONST(ZSCLOCK / 16, ZS_DEFSPEED));
sys/arch/sgimips/stand/common/iris_zs.c
135
zs_write_reg(dev, 13, 0);
sys/arch/sgimips/stand/common/iris_zs.c
138
zs_write_reg(dev, 14, ZSWR14_BAUD_ENA);
sys/arch/sgimips/stand/common/iris_zs.c
141
zs_write_reg(dev, 15, 0);
sys/arch/sgimips/stand/common/iris_zs.c
148
zs_write_reg(dev, 3, ZSWR3_RX_8 | ZSWR3_RX_ENABLE);
sys/arch/sgimips/stand/common/iris_zs.c
149
zs_write_reg(dev, 5,
sys/arch/sgimips/stand/common/iris_zs.c
80
static void zs_write_reg(void *, uint8_t, uint8_t);
sys/arch/sparc/dev/zs.c
500
zs_write_reg(cs, 9, 0);
sys/arch/sparc/dev/zs.c
515
zs_write_reg(cs, 9, reset);
sys/arch/sparc/dev/zs.c
578
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/sparc/dev/zs.c
580
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/sparc/include/z8530var.h
78
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/sparc64/dev/zs.c
405
zs_write_reg(cs, 9, 0);
sys/arch/sparc64/dev/zs.c
419
zs_write_reg(cs, 9, reset);
sys/arch/sparc64/dev/zs.c
477
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/sparc64/dev/zs.c
479
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/sparc64/include/z8530var.h
92
void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
sys/arch/sun2/dev/zs.c
230
zs_write_reg(cs, 9, 0);
sys/arch/sun2/dev/zs.c
243
zs_write_reg(cs, 9, reset);
sys/arch/sun2/dev/zs.c
316
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/sun2/dev/zs.c
318
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/sun2/dev/zsvar.h
103
void zs_write_reg(struct zs_chanstate *, uint8_t, uint8_t);
sys/arch/sun3/dev/zs.c
315
zs_write_reg(cs, 9, 0);
sys/arch/sun3/dev/zs.c
328
zs_write_reg(cs, 9, reset);
sys/arch/sun3/dev/zs.c
348
zs_write_reg(cs, 2, zs_init_reg[2]);
sys/arch/sun3/dev/zs.c
350
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/sun3/include/z8530var.h
108
void zs_write_reg(struct zs_chanstate *, uint8_t, uint8_t);
sys/arch/x68k/dev/ms.c
232
zs_write_reg(cs, 9, reset);
sys/arch/x68k/dev/ms.c
651
zs_write_reg(cs, 5, cs->cs_preg[5]);
sys/arch/x68k/dev/zs.c
245
zs_write_reg(cs, 9, 0);
sys/arch/x68k/dev/zs.c
266
zs_write_reg(cs, 9, reset);
sys/arch/x68k/dev/zs.c
287
zs_write_reg(cs, 2, ia->ia_intr);
sys/arch/x68k/dev/zs.c
289
zs_write_reg(cs, 9, zs_init_reg[9]);
sys/arch/x68k/dev/zs.c
590
zs_write_reg(&zscn_cs, 9, 0);
sys/arch/x68k/dev/zs.c
591
zs_write_reg(&zscn_cs, 9, ZSWR9_HARD_RESET);
sys/arch/x68k/include/z8530var.h
156
void zs_write_reg(struct zs_chanstate *, uint8_t, uint8_t);
sys/dev/ic/z8530sc.c
122
zs_write_reg(cs, 5, cs->cs_creg[5]);
sys/dev/ic/z8530sc.c
195
zs_write_reg(cs, 1, reg[1] & ~ZSWR1_IMASK);
sys/dev/ic/z8530sc.c
198
zs_write_reg(cs, 4, reg[4]);
sys/dev/ic/z8530sc.c
201
zs_write_reg(cs, 10, reg[10]);
sys/dev/ic/z8530sc.c
204
zs_write_reg(cs, 3, reg[3] & ~ZSWR3_RX_ENABLE);
sys/dev/ic/z8530sc.c
205
zs_write_reg(cs, 5, reg[5] & ~ZSWR5_TX_ENABLE);
sys/dev/ic/z8530sc.c
208
zs_write_reg(cs, 6, reg[6]);
sys/dev/ic/z8530sc.c
209
zs_write_reg(cs, 7, reg[7]);
sys/dev/ic/z8530sc.c
220
zs_write_reg(cs, 2, reg[2]);
sys/dev/ic/z8530sc.c
222
zs_write_reg(cs, 9, reg[9]);
sys/dev/ic/z8530sc.c
226
zs_write_reg(cs, 14, reg[14] & ~ZSWR14_BAUD_ENA);
sys/dev/ic/z8530sc.c
234
zs_write_reg(cs, 11, reg[11]);
sys/dev/ic/z8530sc.c
237
zs_write_reg(cs, 12, reg[12]);
sys/dev/ic/z8530sc.c
238
zs_write_reg(cs, 13, reg[13]);
sys/dev/ic/z8530sc.c
241
zs_write_reg(cs, 14, reg[14]);
sys/dev/ic/z8530sc.c
244
zs_write_reg(cs, 15, reg[15]);
sys/dev/ic/z8530sc.c
256
zs_write_reg(cs, 3, reg[3]);
sys/dev/ic/z8530sc.c
257
zs_write_reg(cs, 5, reg[5]);
sys/dev/ic/z8530sc.c
263
zs_write_reg(cs->cs_ctl_chan, 5, v);
sys/dev/ic/z8530sc.c
267
zs_write_reg(cs, 1, reg[1]);
sys/dev/ic/z8530sc.c
433
zs_write_reg(cs, 1, 0);
sys/dev/ic/z8530sc.c
434
zs_write_reg(cs, 15, 0);
sys/dev/ic/z8530tty.c
1329
zs_write_reg(ccs, 5, ccs->cs_creg[5]);
sys/dev/ic/z8530tty.c
1416
zs_write_reg(cs, 1, cs->cs_creg[1]);
sys/dev/ic/z8530tty.c
1626
zs_write_reg(cs, 1, cs->cs_creg[1]);
sys/dev/ic/z8530tty.c
463
zs_write_reg(cs, 9, resetbit);
sys/dev/ic/z8530tty.c
521
zs_write_reg(cs, 1, cs->cs_creg[1]);
sys/dev/sun/kbd_zs.c
174
zs_write_reg(cs, 9, reset);
sys/dev/sun/ms_zs.c
151
zs_write_reg(cs, 9, reset);
sys/dev/tc/zs_ioasic.c
292
zs_write_reg(cs, 9, 0);
sys/dev/tc/zs_ioasic.c
318
zs_write_reg(cs, 9, reset);
sys/dev/tc/zs_ioasic.c
340
zs_write_reg(zs->zsc_cs[0], 2, zs_ioasic_init_reg[2]);
sys/dev/tc/zs_ioasic.c
341
zs_write_reg(zs->zsc_cs[1], 2, zs_ioasic_init_reg[2]);
sys/dev/tc/zs_ioasic.c
344
zs_write_reg(zs->zsc_cs[0], 9, zs_ioasic_init_reg[9]);
sys/dev/tc/zs_ioasic.c
345
zs_write_reg(zs->zsc_cs[1], 9, zs_ioasic_init_reg[9]);
sys/dev/tc/zs_ioasic.c
756
zs_write_reg(cs, 9, 0);
sys/dev/tc/zs_ioasic.c
759
zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
sys/dev/tc/zskbd.c
214
zs_write_reg(cs, 9, ZSWR9_A_RESET);
sys/dev/tc/zsms.c
167
zs_write_reg(cs, 9, ZSWR9_A_RESET);