sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1655

if (READ_ONCE((*bo)->tbo.resv->lock.ctx) != &parser->ticket)

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

297

uint64_t seq = READ_ONCE(ring->fence_drv.sync_seq);

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

361

emitted += READ_ONCE(ring->fence_drv.sync_seq);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

816

pin_count = READ_ONCE(bo->pin_count);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

820

dma_buf = READ_ONCE(bo->gem_base.dma_buf);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

821

attachment = READ_ONCE(bo->gem_base.import_attach);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2802

if (READ_ONCE(bo->tbo.resv->lock.ctx) != ticket)

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

368

wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs]));

sys/dev/drm/drm_dp_mst_topology.c

797

state = READ_ONCE(txmsg->state);

sys/dev/drm/drm_fb_helper.c

2009

if (!fb_helper->deferred_setup && !READ_ONCE(fb_helper->dev->master))

sys/dev/drm/drm_fb_helper.c

541

if (READ_ONCE(fb_helper->deferred_setup))

sys/dev/drm/drm_fb_helper.c

569

if (READ_ONCE(dev->master))

sys/dev/drm/drm_vblank.c

1439

if (!READ_ONCE(vblank->enabled)) {

sys/dev/drm/drm_vblank.c

1583

READ_ONCE(vblank->enabled)) {

sys/dev/drm/drm_vblank.c

1629

!READ_ONCE(vblank->enabled));

sys/dev/drm/drm_vblank.c

1786

vblank_enabled = dev->vblank_disable_immediate && READ_ONCE(vblank->enabled);

sys/dev/drm/drm_vblank.c

1883

if (!READ_ONCE(vblank->enabled)) {

sys/dev/drm/drm_vblank.c

404

WARN_ON(READ_ONCE(vblank->enabled) &&

sys/dev/drm/i915/i915_drv.h

3058

return !IS_ERR_OR_NULL(READ_ONCE(obj->mm.pages));

sys/dev/drm/i915/i915_drv.h

3199

return READ_ONCE(error->reset_count);

sys/dev/drm/i915/i915_drv.h

3205

return READ_ONCE(error->reset_engine_count[engine->id]);

sys/dev/drm/i915/i915_gem.c

3842

if (READ_ONCE(dev_priv->gt.awake))

sys/dev/drm/i915/i915_gem.c

3880

return epoch == READ_ONCE(i915->gt.epoch);

sys/dev/drm/i915/i915_gem.c

3910

return (READ_ONCE(i915->gt.active_requests) ||

sys/dev/drm/i915/i915_gem.c

3938

if (!READ_ONCE(dev_priv->gt.awake))

sys/dev/drm/i915/i915_gem.c

3941

if (READ_ONCE(dev_priv->gt.active_requests))

sys/dev/drm/i915/i915_gem.c

3957

READ_ONCE(dev_priv->gt.active_requests));

sys/dev/drm/i915/i915_gem.c

4199

if (!READ_ONCE(i915->gt.awake))

sys/dev/drm/i915/i915_gem.c

4263

if (!READ_ONCE(obj->pin_global))

sys/dev/drm/i915/i915_gem.c

6542

if (n < READ_ONCE(iter->sg_idx))

sys/dev/drm/i915/i915_gem_object.h

422

return READ_ONCE(obj->framebuffer_references);

sys/dev/drm/i915/i915_gem_shrinker.c

103

if (READ_ONCE(obj->pin_global))

sys/dev/drm/i915/i915_gem_tiling.c

427

READ_ONCE(obj->tiling_and_stride) & TILING_MASK;

sys/dev/drm/i915/i915_gpu_error.c

1869

if (READ_ONCE(i915->gpu_error.first_error))

sys/dev/drm/i915/i915_irq.c

490

if (READ_ONCE(rps->interrupts_enabled))

sys/dev/drm/i915/i915_irq.c

511

if (!READ_ONCE(rps->interrupts_enabled))

sys/dev/drm/i915/i915_pmu.c

258

if (!READ_ONCE(i915->pmu.timer_enabled))

sys/dev/drm/i915/i915_request.c

1223

irq = READ_ONCE(engine->breadcrumbs.irq_count);

sys/dev/drm/i915/i915_request.c

1235

if (READ_ONCE(engine->breadcrumbs.irq_count) != irq)

sys/dev/drm/i915/i915_request.c

325

tail = READ_ONCE(request->tail);

sys/dev/drm/i915/i915_request.h

256

return READ_ONCE(request->global_seqno);

sys/dev/drm/i915/intel_breadcrumbs.c

106

irq_count = READ_ONCE(b->irq_count);

sys/dev/drm/i915/intel_breadcrumbs.c

285

return READ_ONCE(b->irq_count) == b->hangcheck_interrupts;

sys/dev/drm/i915/intel_breadcrumbs.c

600

GEM_BUG_ON(READ_ONCE(b->irq_wait) == wait);

sys/dev/drm/i915/intel_breadcrumbs.c

801

if (!READ_ONCE(request->signaling.wait.seqno))

sys/dev/drm/i915/intel_breadcrumbs.c

886

WARN_ON(READ_ONCE(b->irq_wait));

sys/dev/drm/i915/intel_engine_cs.c

1354

write = READ_ONCE(*execlists->csb_write);

sys/dev/drm/i915/intel_engine_cs.c

941

if (READ_ONCE(engine->execlists.active)) {

sys/dev/drm/i915/intel_engine_cs.c

956

if (READ_ONCE(engine->execlists.active))

sys/dev/drm/i915/intel_fbc.c

1229

if (READ_ONCE(fbc->underrun_detected))

sys/dev/drm/i915/intel_guc_ct.c

410

#define done (READ_ONCE(desc->fence) == fence)

sys/dev/drm/i915/intel_guc_ct.c

456

#define done INTEL_GUC_MSG_IS_RESPONSE(READ_ONCE(req->status))

sys/dev/drm/i915/intel_guc_submission.c

463

wq_off = READ_ONCE(desc->tail);

sys/dev/drm/i915/intel_guc_submission.c

464

GEM_BUG_ON(CIRC_SPACE(wq_off, READ_ONCE(desc->head),

sys/dev/drm/i915/intel_guc_submission.c

511

cookie = READ_ONCE(db->cookie);

sys/dev/drm/i915/intel_hangcheck.c

421

if (!READ_ONCE(dev_priv->gt.awake))

sys/dev/drm/i915/intel_hdmi.c

1555

READ_ONCE(to_intel_digital_connector_state(connector->state)->force_audio) == HDMI_AUDIO_OFF_DVI;

sys/dev/drm/i915/intel_hotplug.c

552

enabled = READ_ONCE(dev_priv->hotplug.poll_enabled);

sys/dev/drm/i915/intel_lrc.c

1190

if (prio <= READ_ONCE(request->sched.attr.priority))

sys/dev/drm/i915/intel_lrc.c

1233

if (prio > READ_ONCE(p->signaler->attr.priority))

sys/dev/drm/i915/intel_lrc.c

935

tail = READ_ONCE(*execlists->csb_write);

sys/dev/drm/i915/intel_pm.c

6466

if (!rps->power.interactive++ && READ_ONCE(i915->gt.awake))

sys/dev/drm/i915/intel_pm.c

6670

if (READ_ONCE(rps->cur_freq) < rps->boost_freq)

sys/dev/drm/i915/intel_psr.c

769

if (READ_ONCE(dev_priv->psr.psr2_enabled))

sys/dev/drm/i915/intel_psr.c

855

dp = READ_ONCE(dev_priv->psr.dp);

sys/dev/drm/i915/intel_ringbuffer.h

1033

return READ_ONCE(engine->breadcrumbs.irq_wait);

sys/dev/drm/i915/intel_ringbuffer.h

1126

if (READ_ONCE(engine->stats.enabled) == 0)

sys/dev/drm/i915/intel_ringbuffer.h

1144

if (READ_ONCE(engine->stats.enabled) == 0)

sys/dev/drm/i915/intel_ringbuffer.h

748

return READ_ONCE(engine->status_page.page_addr[reg]);

sys/dev/drm/i915/intel_ringbuffer.h

922

return READ_ONCE(engine->timeline.seqno);

sys/dev/drm/include/drm/drm_connector.h

1232

return READ_ONCE(connector->registration_state) ==

sys/dev/drm/include/drm/spsc_queue.h

101

next = READ_ONCE(node->next);

sys/dev/drm/include/drm/spsc_queue.h

112

} while (unlikely(!(queue->head = READ_ONCE(node->next))));

sys/dev/drm/include/drm/spsc_queue.h

96

node = READ_ONCE(queue->head);

sys/dev/drm/include/linux/atomic.h

101

return READ_ONCE(v->counter);

sys/dev/drm/include/linux/atomic.h

208

int val = READ_ONCE(v->counter);

sys/dev/drm/include/linux/completion.h

147

if (READ_ONCE(c->done) == 0)

sys/dev/drm/include/linux/rcupdate.h

63

typeof(*(p)) *__rcu_dereference_tmp = READ_ONCE(p); \

sys/dev/drm/include/linux/rcupdate.h

68

((__typeof(*p) *)READ_ONCE(p))

sys/dev/drm/include/linux/rcupdate.h

90

#define rcu_access_pointer(p) ((typeof(*p) *)READ_ONCE(p))

sys/dev/drm/include/linux/seqlock.h

119

ret = READ_ONCE(s->sequence);

sys/dev/drm/include/linux/seqlock.h

167

unsigned int value = READ_ONCE(s->sequence);

sys/dev/drm/include/linux/seqlock.h

93

return READ_ONCE(sl->sequence);

sys/dev/drm/radeon/radeon_gem.c

462

cur_placement = READ_ONCE(robj->tbo.mem.mem_type);

sys/dev/drm/radeon/radeon_gem.c

492

cur_placement = READ_ONCE(robj->tbo.mem.mem_type);

sys/dev/drm/scheduler/sched_entity.c

112

if (READ_ONCE(entity->dependency))

sys/dev/drm/scheduler/sched_entity.c

474

fence = READ_ONCE(entity->last_scheduled);

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

248

last = (READ_ONCE(cdesc->status) & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >>

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

49

desc_phase = (READ_ONCE(cdesc->status) & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK) >>

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

610

cdesc_phase = READ_ONCE(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

621

*req_id = READ_ONCE(cdesc->req_id);