lib/i18n_module/UTF7/citrus_utf7.c

153

uint16_t * __restrict u16, char ** __restrict s, size_t n,

lib/i18n_module/UTF7/citrus_utf7.c

181

*u16 = (uint16_t)psenc->ch[i];

lib/i18n_module/UTF7/citrus_utf7.c

188

*u16 = (uint16_t)BASE64_IN;

lib/i18n_module/UTF7/citrus_utf7.c

201

*u16 = (uint16_t)psenc->ch[i];

lib/i18n_module/UTF7/citrus_utf7.c

216

*u16 = (psenc->cache >> psenc->bits) &

lib/i18n_module/UTF7/citrus_utf7.c

230

*nresult = (size_t)((*u16 == 0) ? 0 : s0 - *s);

lib/i18n_module/UTF7/citrus_utf7.c

298

char * __restrict s, size_t n __unused, uint16_t u16,

lib/i18n_module/UTF7/citrus_utf7.c

306

if (ISSAFE(ei, u16)) {

lib/i18n_module/UTF7/citrus_utf7.c

314

if (u16 == BASE64_OUT || FINDLEN(ei, u16) >= 0)

lib/i18n_module/UTF7/citrus_utf7.c

320

psenc->ch[psenc->chlen++] = (char)u16;

lib/i18n_module/UTF7/citrus_utf7.c

321

if (u16 == BASE64_IN)

lib/i18n_module/UTF7/citrus_utf7.c

330

psenc->cache = (psenc->cache << UTF16_BIT) | u16;

lib/i18n_module/UTF7/citrus_utf7.c

351

uint16_t u16[2];

lib/i18n_module/UTF7/citrus_utf7.c

357

u16[0] = (uint16_t)u32;

lib/i18n_module/UTF7/citrus_utf7.c

361

u16[0] = (u32 >> 10) + HISRG_MIN;

lib/i18n_module/UTF7/citrus_utf7.c

362

u16[1] = ((uint16_t)(u32 & UINT32_C(0x3ff))) + LOSRG_MIN;

lib/i18n_module/UTF7/citrus_utf7.c

370

err = _citrus_UTF7_utf16tomb(ei, s, n, u16[i], psenc, &nr);

sys/dev/disk/sym/sym_defs.h

420

/*40*/ u16 nc_sien; /* -->: interrupt enable */

sys/dev/disk/sym/sym_defs.h

421

/*42*/ u16 nc_sist; /* <--: interrupt status */

sys/dev/disk/sym/sym_defs.h

441

/*4a*/ u16 nc_respid; /* sta: Reselect-IDs */

sys/dev/disk/sym/sym_defs.h

460

/*50*/ u16 nc_sidl; /* Lowlevel: latched from scsi data */

sys/dev/disk/sym/sym_defs.h

470

/*54*/ u16 nc_sodl; /* Lowlevel: data out to scsi data */

sys/dev/disk/sym/sym_defs.h

486

/*58*/ u16 nc_sbdl; /* Lowlevel: data from scsi data */

sys/dev/disk/sym/sym_defs.h

487

/*5a*/ u16 nc_5a_;

sys/dev/disk/sym/sym_defs.h

502

/*bc*/ u16 nc_scntl4; /* C1010 only */

sys/dev/disk/sym/sym_defs.h

532

/*e0*/ u16 nc_crcpad; /* CRC Value */

sys/dev/disk/sym/sym_defs.h

539

/*f0*/ u16 nc_dfbc; /* DMA FIFO byte count */

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

199

size = *(u16 *) info->Buffer.Pointer;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

276

size = *(u16 *) info->Buffer.Pointer;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

336

size = *(u16 *)info->Buffer.Pointer;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

533

size = *(u16 *) info->Buffer.Pointer;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

659

size = *(u16 *) info->Buffer.Pointer;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1173

u16 *vddc, u16 *vddci, u16 *mvdd)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1178

u16 data_offset;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1206

u16 voltage_id, u16 *voltage)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1245

u16 *voltage,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1246

u16 leakage_idx)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1252

u16 *leakage_id)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1281

u16 *vddc, u16 *vddci,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1282

u16 virtual_voltage_id,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1283

u16 vbios_voltage_id)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1287

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1290

u16 *leakage_bin, *vddc_id_buf, *vddc_buf, *vddci_id_buf, *vddci_buf;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1310

leakage_bin = (u16 *)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1313

vddc_id_buf = (u16 *)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1316

vddc_buf = (u16 *)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1319

vddci_id_buf = (u16 *)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1322

vddci_buf = (u16 *)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1372

u16 virtual_voltage_id,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1373

u16 *voltage)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1438

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1482

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1518

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1590

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1612

((u8 *)reg_block + (2 * sizeof(u16)) +

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1623

(u16)(le16_to_cpu(format->usRegIndex));

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1678

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

168

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

269

u16 size, data_offset;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

296

u16 size, data_offset;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

305

u16 conn_id, connector_object_id;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

390

u16 encoder_obj = le16_to_cpu(enc_obj->asObjects[k].usObjectID);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

396

u16 caps = 0;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

418

u16 router_obj_id = le16_to_cpu(router_obj->asObjects[k].usObjectID);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

434

u16 *dst_objs = (u16 *)(num_dst_objs + 1);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

771

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

798

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

801

u16 percentage = 0, rate = 0;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

108

u16 s1;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

123

u16 value;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

172

u16 *leakage_id);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

175

u16 *vddc, u16 *vddci,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

176

u16 virtual_voltage_id,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

177

u16 vbios_voltage_id);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

180

u16 virtual_voltage_id,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

181

u16 *voltage);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

204

u16 voltage_id, u16 *voltage);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

206

u16 *voltage,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

207

u16 leakage_idx);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.h

209

u16 *vddc, u16 *vddci, u16 *mvdd);

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

133

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

200

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1277

u16 amdgpu_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)

sys/dev/drm/amd/amdgpu/amdgpu_connectors.h

30

u16 amdgpu_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

674

u16 cmd;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

312

u16 data_offset;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

344

u16 data_offset;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

824

u16 data_offset;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

952

u16 amdgpu_get_pcie_lane_support(struct amdgpu_device *adev,

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

953

u16 asic_lanes,

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

954

u16 default_lanes)

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

100

u16 vddc;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

101

u16 vddci;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

111

u16 v;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

121

u16 vddc;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

125

u16 vddc1;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

126

u16 vddc2;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

127

u16 vddc3;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

137

u16 voltage;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

150

u16 v;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

161

u16 v;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

171

u16 cpu_core_number;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

183

u16 tdp;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

184

u16 configurable_tdp;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

185

u16 tdc;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

186

u16 battery_power_limit;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

187

u16 small_power_limit;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

188

u16 low_cac_leakage;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

189

u16 high_cac_leakage;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

190

u16 maximum_power_delivery_limit;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

210

u16 vddc_vddci_delta;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

211

u16 min_vddc_for_pcie_gen2;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

219

u16 t_min;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

220

u16 t_med;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

221

u16 t_high;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

222

u16 pwm_min;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

223

u16 pwm_med;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

224

u16 pwm_high;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

227

u16 t_max;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

229

u16 default_max_fan_pwm;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

230

u16 default_fan_output_sensitivity;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

231

u16 fan_output_sensitivity;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

402

u16 tdp_od_limit;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

404

u16 load_line_slope;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

500

u16 amdgpu_get_pcie_lane_support(struct amdgpu_device *adev,

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

501

u16 asic_lanes,

sys/dev/drm/amd/amdgpu/amdgpu_dpm.h

502

u16 default_lanes);

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

130

u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)

sys/dev/drm/amd/amdgpu/amdgpu_mode.h

289

u16 caps);

sys/dev/drm/amd/amdgpu/amdgpu_mode.h

351

u16 firmware_flags;

sys/dev/drm/amd/amdgpu/amdgpu_mode.h

478

u16 caps;

sys/dev/drm/amd/amdgpu/amdgpu_mode.h

598

u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

76

#define AMDGIM_GET_STRUCTURE_RESERVED_SIZE(total, u8, u16, u32, u64) \

sys/dev/drm/amd/amdgpu/amdgpu_virt.h

77

(total - (((u8)+3) / 4 + ((u16)+1) / 2 + (u32) + (u64)*2))

sys/dev/drm/amd/amdgpu/atom.c

1302

u16 idx;

sys/dev/drm/amd/amdgpu/atom.c

1390

u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);

sys/dev/drm/amd/amdgpu/atom.c

1410

u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);

sys/dev/drm/amd/amdgpu/atombios_crtc.c

198

u16 misc = 0;

sys/dev/drm/amd/amdgpu/atombios_dp.c

366

u16 dp_bridge = amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector);

sys/dev/drm/amd/amdgpu/atombios_dp.c

78

args.v2.lpAuxRequest = cpu_to_le16((u16)(0 + 4));

sys/dev/drm/amd/amdgpu/atombios_dp.c

79

args.v2.lpDataOut = cpu_to_le16((u16)(16 + 4));

sys/dev/drm/amd/amdgpu/atombios_i2c.c

47

u16 out = cpu_to_le16(0);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1100

u16 fdo_min, slope1, slope2;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1120

fdo_min = (u16)tmp64;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1128

slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1129

slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1153

fan_table.FdoMax = cpu_to_be16((u16)duty100);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1435

u16 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

1445

u16 reg_offset, u32 value)

sys/dev/drm/amd/amdgpu/ci_dpm.c

1460

u16 tmp;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1493

u16 leakage_id, virtual_voltage_id;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1494

u16 vddc, vddci;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2469

u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd)

sys/dev/drm/amd/amdgpu/ci_dpm.c

2471

u16 v_index, idx;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2841

(u16)adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3061

memory_level->ActivityLevel = (u16)pi->mclk_activity_target;

sys/dev/drm/amd/amdgpu/ci_dpm.c

307

u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd);

sys/dev/drm/amd/amdgpu/ci_dpm.c

3237

cpu_to_be16((u16)pi->mclk_activity_target);

sys/dev/drm/amd/amdgpu/ci_dpm.c

3270

u16 ulv_voltage = adev->pm.dpm.backbias_response_time;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3361

u16 sclk_activity_level_t,

sys/dev/drm/amd/amdgpu/ci_dpm.c

3435

(u16)pi->activity_target[i],

sys/dev/drm/amd/amdgpu/ci_dpm.c

3801

table->TemperatureLimitHigh = (u16)((pi->thermal_temp_setting.temperature_high *

sys/dev/drm/amd/amdgpu/ci_dpm.c

3803

table->TemperatureLimitLow = (u16)((pi->thermal_temp_setting.temperature_low *

sys/dev/drm/amd/amdgpu/ci_dpm.c

393

static u8 ci_convert_to_vid(u16 vddc)

sys/dev/drm/amd/amdgpu/ci_dpm.c

421

hi_vid[i] = ci_convert_to_vid((u16)adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4556

static bool ci_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/drm/amd/amdgpu/ci_dpm.c

459

u16 tdc_limit;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4647

u16 address;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4951

u16 pcie_speed, max_speed = 0;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4962

static u16 ci_get_current_pcie_speed(struct amdgpu_device *adev)

sys/dev/drm/amd/amdgpu/ci_dpm.c

4970

return (u16)speed_cntl;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5106

static void ci_patch_with_vddc_leakage(struct amdgpu_device *adev, u16 *vddc)

sys/dev/drm/amd/amdgpu/ci_dpm.c

5120

static void ci_patch_with_vddci_leakage(struct amdgpu_device *adev, u16 *vddci)

sys/dev/drm/amd/amdgpu/ci_dpm.c

5193

ci_patch_with_vddc_leakage(adev, (u16 *)&table->vddc);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5194

ci_patch_with_vddci_leakage(adev, (u16 *)&table->vddci);

sys/dev/drm/amd/amdgpu/ci_dpm.c

540

u16 hi_sidd = pi->smc_powertune_table.BapmVddCBaseLeakageHiSidd;

sys/dev/drm/amd/amdgpu/ci_dpm.c

541

u16 lo_sidd = pi->smc_powertune_table.BapmVddCBaseLeakageLoSidd;

sys/dev/drm/amd/amdgpu/ci_dpm.c

563

const u16 *def1;

sys/dev/drm/amd/amdgpu/ci_dpm.c

564

const u16 *def2;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5660

u16 data_offset;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5747

u16 data_offset;

sys/dev/drm/amd/amdgpu/ci_dpm.c

577

dpm_table->PPM_PkgPwrLimit = cpu_to_be16((u16)ppm->dgpu_tdp * 256 / 1000);

sys/dev/drm/amd/amdgpu/ci_dpm.c

578

dpm_table->PPM_TemperatureLimit = cpu_to_be16((u16)ppm->tj_max * 256);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5838

u16 data_offset, size;

sys/dev/drm/amd/amdgpu/ci_dpm.h

101

u16 count;

sys/dev/drm/amd/amdgpu/ci_dpm.h

102

u16 leakage_id[CISLANDS_MAX_LEAKAGE_COUNT];

sys/dev/drm/amd/amdgpu/ci_dpm.h

103

u16 actual_voltage[CISLANDS_MAX_LEAKAGE_COUNT];

sys/dev/drm/amd/amdgpu/ci_dpm.h

118

u16 mvdd_bootup_value;

sys/dev/drm/amd/amdgpu/ci_dpm.h

119

u16 vddc_bootup_value;

sys/dev/drm/amd/amdgpu/ci_dpm.h

120

u16 vddci_bootup_value;

sys/dev/drm/amd/amdgpu/ci_dpm.h

123

u16 pcie_gen_bootup_value;

sys/dev/drm/amd/amdgpu/ci_dpm.h

124

u16 pcie_lane_bootup_value;

sys/dev/drm/amd/amdgpu/ci_dpm.h

152

u16 max;

sys/dev/drm/amd/amdgpu/ci_dpm.h

153

u16 min;

sys/dev/drm/amd/amdgpu/ci_dpm.h

185

u16 bapmti_r[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/drm/amd/amdgpu/ci_dpm.h

186

u16 bapmti_rc[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/drm/amd/amdgpu/ci_dpm.h

202

u16 acpi_vddc;

sys/dev/drm/amd/amdgpu/ci_dpm.h

203

u16 acpi_vddci;

sys/dev/drm/amd/amdgpu/ci_dpm.h

208

u16 max_vddc_in_pp_table;

sys/dev/drm/amd/amdgpu/ci_dpm.h

209

u16 min_vddc_in_pp_table;

sys/dev/drm/amd/amdgpu/ci_dpm.h

210

u16 max_vddci_in_pp_table;

sys/dev/drm/amd/amdgpu/ci_dpm.h

211

u16 min_vddci_in_pp_table;

sys/dev/drm/amd/amdgpu/ci_dpm.h

43

u16 pcie_lane;

sys/dev/drm/amd/amdgpu/ci_dpm.h

47

u16 performance_level_count;

sys/dev/drm/amd/amdgpu/ci_dpm.h

85

u16 valid_flag;

sys/dev/drm/amd/amdgpu/cik.c

1383

u16 tmp16;

sys/dev/drm/amd/amdgpu/cik.c

1428

u16 bridge_cfg, gpu_cfg;

sys/dev/drm/amd/amdgpu/cik.c

1429

u16 bridge_cfg2, gpu_cfg2;

sys/dev/drm/amd/amdgpu/cik_ih.c

241

u16 pasid;

sys/dev/drm/amd/amdgpu/cz_ih.c

220

u16 pasid;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1317

static const u16 eld_reg_to_type[][2] = {

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2090

u16 *r, *g, *b;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2448

static int dce_v10_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2449

u16 *blue, uint32_t size,

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3456

u16 caps)

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1343

static const u16 eld_reg_to_type[][2] = {

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2132

u16 *r, *g, *b;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2527

static int dce_v11_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2528

u16 *blue, uint32_t size,

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3582

u16 caps)

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1268

static const u16 eld_reg_to_type[][2] = {

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1997

u16 *r, *g, *b;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2349

static int dce_v8_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2350

u16 *blue, uint32_t size,

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3344

u16 caps)

sys/dev/drm/amd/amdgpu/dce_virtual.c

102

static int dce_virtual_crtc_gamma_set(struct drm_crtc *crtc, u16 *red,

sys/dev/drm/amd/amdgpu/dce_virtual.c

103

u16 *green, u16 *blue, uint32_t size,

sys/dev/drm/amd/amdgpu/iceland_ih.c

220

u16 pasid;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1405

u16 reg_offset, u32 value)

sys/dev/drm/amd/amdgpu/kv_dpm.c

1410

(u8 *)&value, sizeof(u16), pi->sram_end);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1414

u16 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/kv_dpm.c

1436

u16 tmp;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1444

sizeof(u16), pi->sram_end);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1453

sizeof(u16), pi->sram_end);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2566

u16 data_offset;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2714

u16 data_offset;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2875

u16 vddc;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2884

vddc = kv_convert_8bit_index_to_voltage(adev, (u16)tmp);

sys/dev/drm/amd/amdgpu/kv_dpm.c

680

static u16 kv_convert_8bit_index_to_voltage(struct amdgpu_device *adev,

sys/dev/drm/amd/amdgpu/kv_dpm.c

681

u16 voltage)

sys/dev/drm/amd/amdgpu/kv_dpm.c

686

static u16 kv_convert_2bit_index_to_voltage(struct amdgpu_device *adev,

sys/dev/drm/amd/amdgpu/kv_dpm.c

694

return kv_convert_8bit_index_to_voltage(adev, (u16)vid_8bit);

sys/dev/drm/amd/amdgpu/kv_dpm.c

713

pi->graphics_level[index].AT = cpu_to_be16((u16)at);

sys/dev/drm/amd/amdgpu/kv_dpm.h

124

u16 bootup_nb_voltage_index;

sys/dev/drm/amd/amdgpu/kv_dpm.h

143

u16 high_voltage_t;

sys/dev/drm/amd/amdgpu/kv_dpm.h

156

u16 fps_high_t;

sys/dev/drm/amd/amdgpu/kv_dpm.h

38

u16 vid_2bit;

sys/dev/drm/amd/amdgpu/kv_dpm.h

39

u16 vid_7bit;

sys/dev/drm/amd/amdgpu/kv_dpm.h

49

u16 vid_2bit;

sys/dev/drm/amd/amdgpu/kv_dpm.h

50

u16 rsv;

sys/dev/drm/amd/amdgpu/si_dpm.c

1838

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage);

sys/dev/drm/amd/amdgpu/si_dpm.c

1841

u16 *std_voltage);

sys/dev/drm/amd/amdgpu/si_dpm.c

1843

u16 reg_offset, u32 value);

sys/dev/drm/amd/amdgpu/si_dpm.c

1862

u16 v, s32 t, u32 ileakage, u32 *leakage)

sys/dev/drm/amd/amdgpu/si_dpm.c

1890

u16 v,

sys/dev/drm/amd/amdgpu/si_dpm.c

1899

const u32 fixed_kt, u16 v,

sys/dev/drm/amd/amdgpu/si_dpm.c

1919

u16 v,

sys/dev/drm/amd/amdgpu/si_dpm.c

2342

static u16 si_calculate_power_efficiency_ratio(struct amdgpu_device *adev,

sys/dev/drm/amd/amdgpu/si_dpm.c

2343

const u16 prev_std_vddc,

sys/dev/drm/amd/amdgpu/si_dpm.c

2344

const u16 curr_std_vddc)

sys/dev/drm/amd/amdgpu/si_dpm.c

2361

return (u16)pwr_efficiency_ratio;

sys/dev/drm/amd/amdgpu/si_dpm.c

2394

u16 prev_std_vddc;

sys/dev/drm/amd/amdgpu/si_dpm.c

2395

u16 curr_std_vddc;

sys/dev/drm/amd/amdgpu/si_dpm.c

2397

u16 pwr_efficiency_ratio;

sys/dev/drm/amd/amdgpu/si_dpm.c

2631

u16 *max, u16 *min)

sys/dev/drm/amd/amdgpu/si_dpm.c

2660

*min = (u16)v0_loadline;

sys/dev/drm/amd/amdgpu/si_dpm.c

2668

static u16 si_get_cac_std_voltage_step(u16 max, u16 min)

sys/dev/drm/amd/amdgpu/si_dpm.c

2676

u16 vddc_max, u16 vddc_min, u16 vddc_step,

sys/dev/drm/amd/amdgpu/si_dpm.c

2677

u16 t0, u16 t_step)

sys/dev/drm/amd/amdgpu/si_dpm.c

2685

u16 voltage;

sys/dev/drm/amd/amdgpu/si_dpm.c

2708

cpu_to_be16((u16)smc_leakage);

sys/dev/drm/amd/amdgpu/si_dpm.c

2716

u16 vddc_max, u16 vddc_min, u16 vddc_step)

sys/dev/drm/amd/amdgpu/si_dpm.c

2723

u16 voltage;

sys/dev/drm/amd/amdgpu/si_dpm.c

2744

cpu_to_be16((u16)smc_leakage);

sys/dev/drm/amd/amdgpu/si_dpm.c

2754

u16 vddc_max, vddc_min, vddc_step;

sys/dev/drm/amd/amdgpu/si_dpm.c

2755

u16 t0, t_step;

sys/dev/drm/amd/amdgpu/si_dpm.c

3015

static u16 si_get_lower_of_leakage_and_vce_voltage(struct amdgpu_device *adev,

sys/dev/drm/amd/amdgpu/si_dpm.c

3016

u16 vce_voltage)

sys/dev/drm/amd/amdgpu/si_dpm.c

3018

u16 highest_leakage = 0;

sys/dev/drm/amd/amdgpu/si_dpm.c

3034

u32 evclk, u32 ecclk, u16 *voltage)

sys/dev/drm/amd/amdgpu/si_dpm.c

3206

static u16 btc_find_voltage(struct atom_voltage_table *table, u16 voltage)

sys/dev/drm/amd/amdgpu/si_dpm.c

3266

u32 clock, u16 max_voltage, u16 *voltage)

sys/dev/drm/amd/amdgpu/si_dpm.c

3276

*voltage = (u16)((table->entries[i].v < max_voltage) ?

sys/dev/drm/amd/amdgpu/si_dpm.c

3313

u16 max_vddc, u16 max_vddci,

sys/dev/drm/amd/amdgpu/si_dpm.c

3314

u16 *vddc, u16 *vddci)

sys/dev/drm/amd/amdgpu/si_dpm.c

3317

u16 new_voltage;

sys/dev/drm/amd/amdgpu/si_dpm.c

3400

u16 vddc;

sys/dev/drm/amd/amdgpu/si_dpm.c

3433

u16 vddc, vddci, min_vce_voltage = 0;

sys/dev/drm/amd/amdgpu/si_dpm.c

3642

u16 reg_offset, u32 *value)

sys/dev/drm/amd/amdgpu/si_dpm.c

3653

u16 reg_offset, u32 value)

sys/dev/drm/amd/amdgpu/si_dpm.c

3693

u16 vddc, count = 0;

sys/dev/drm/amd/amdgpu/si_dpm.c

3710

u32 index, u16 *leakage_voltage)

sys/dev/drm/amd/amdgpu/si_dpm.c

4574

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage)

sys/dev/drm/amd/amdgpu/si_dpm.c

4611

u16 *std_voltage)

sys/dev/drm/amd/amdgpu/si_dpm.c

4613

u16 v_index;

sys/dev/drm/amd/amdgpu/si_dpm.c

4624

(u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {

sys/dev/drm/amd/amdgpu/si_dpm.c

4639

(u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {

sys/dev/drm/amd/amdgpu/si_dpm.c

4661

u16 value, u8 index,

sys/dev/drm/amd/amdgpu/si_dpm.c

4672

u16 voltage, u32 sclk, u32 mclk,

sys/dev/drm/amd/amdgpu/si_dpm.c

4888

u16 std_vddc;

sys/dev/drm/amd/amdgpu/si_dpm.c

4978

u16 std_vddc;

sys/dev/drm/amd/amdgpu/si_dpm.c

5001

u16 std_vddc;

sys/dev/drm/amd/amdgpu/si_dpm.c

5447

u16 std_vddc;

sys/dev/drm/amd/amdgpu/si_dpm.c

5880

static bool si_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/drm/amd/amdgpu/si_dpm.c

5951

u16 address;

sys/dev/drm/amd/amdgpu/si_dpm.c

6175

u16 pcie_speed, max_speed = 0;

sys/dev/drm/amd/amdgpu/si_dpm.c

6185

static u16 si_get_current_pcie_speed(struct amdgpu_device *adev)

sys/dev/drm/amd/amdgpu/si_dpm.c

6192

return (u16)speed_cntl;

sys/dev/drm/amd/amdgpu/si_dpm.c

6324

u16 leakage_voltage;

sys/dev/drm/amd/amdgpu/si_dpm.c

6468

u16 fdo_min, slope1, slope2;

sys/dev/drm/amd/amdgpu/si_dpm.c

6487

fdo_min = (u16)tmp64;

sys/dev/drm/amd/amdgpu/si_dpm.c

6495

slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100);

sys/dev/drm/amd/amdgpu/si_dpm.c

6496

slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100);

sys/dev/drm/amd/amdgpu/si_dpm.c

6512

fan_table.fdo_max = cpu_to_be16((u16)duty100);

sys/dev/drm/amd/amdgpu/si_dpm.c

7137

u16 leakage_voltage;

sys/dev/drm/amd/amdgpu/si_dpm.c

7187

u16 vddc, vddci, mvdd;

sys/dev/drm/amd/amdgpu/si_dpm.c

7222

u16 data_offset;

sys/dev/drm/amd/amdgpu/si_dpm.h

277

u16 valid_flag;

sys/dev/drm/amd/amdgpu/si_dpm.h

489

u16 vddc;

sys/dev/drm/amd/amdgpu/si_dpm.h

559

u16 max_vddc;

sys/dev/drm/amd/amdgpu/si_dpm.h

560

u16 max_vddc_in_table;

sys/dev/drm/amd/amdgpu/si_dpm.h

561

u16 min_vddc_in_table;

sys/dev/drm/amd/amdgpu/si_dpm.h

570

u16 acpi_vddc;

sys/dev/drm/amd/amdgpu/si_dpm.h

591

u16 state_table_start;

sys/dev/drm/amd/amdgpu/si_dpm.h

592

u16 soft_regs_start;

sys/dev/drm/amd/amdgpu/si_dpm.h

593

u16 sram_end;

sys/dev/drm/amd/amdgpu/si_dpm.h

601

u16 vddc;

sys/dev/drm/amd/amdgpu/si_dpm.h

602

u16 vddci; /* eg+ only */

sys/dev/drm/amd/amdgpu/si_dpm.h

615

u16 performance_level_count;

sys/dev/drm/amd/amdgpu/si_dpm.h

623

u16 valid_flag;

sys/dev/drm/amd/amdgpu/si_dpm.h

663

u16 acpi_vddci;

sys/dev/drm/amd/amdgpu/si_dpm.h

674

u16 mc_reg_table_start;

sys/dev/drm/amd/amdgpu/si_dpm.h

835

u16 arb_table_start;

sys/dev/drm/amd/amdgpu/si_dpm.h

836

u16 fan_table_start;

sys/dev/drm/amd/amdgpu/si_dpm.h

837

u16 cac_table_start;

sys/dev/drm/amd/amdgpu/si_dpm.h

838

u16 spll_table_start;

sys/dev/drm/amd/amdgpu/si_dpm.h

931

u16 valid_flag;

sys/dev/drm/amd/amdgpu/si_dpm.h

938

u16 voltage;

sys/dev/drm/amd/amdgpu/si_dpm.h

939

u16 leakage_index;

sys/dev/drm/amd/amdgpu/si_dpm.h

944

u16 count;

sys/dev/drm/amd/amdgpu/si_dpm.h

966

u16 mvdd_bootup_value;

sys/dev/drm/amd/amdgpu/tonga_ih.c

231

u16 pasid;

sys/dev/drm/amd/amdgpu/vega10_ih.c

233

u16 pasid;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h

80

u16 display_indexes_num;

sys/dev/drm/amd/include/amd_acpi.h

30

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/amd/include/amd_acpi.h

31

u16 version; /* version */

sys/dev/drm/amd/include/amd_acpi.h

37

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/amd/include/amd_acpi.h

44

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/amd/include/amd_acpi.h

61

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/amd/include/amd_acpi.h

62

u16 version; /* version */

sys/dev/drm/amd/include/amd_acpi.h

69

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/amd/include/amd_acpi.h

70

u16 client_id; /* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */

sys/dev/drm/amd/include/amd_acpi.h

71

u16 valid_flags_mask; /* valid flags mask */

sys/dev/drm/amd/include/amd_acpi.h

72

u16 flags; /* flags */

sys/dev/drm/amd/include/amd_acpi.h

78

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1170

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1202

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1366

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

142

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1480

u16 *leakage_bin, *vddc_id_buf, *vddc_buf, *vddci_id_buf, *vddci_buf;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1498

leakage_bin = (u16 *)((char *)profile + profile->usLeakageBinArrayOffset);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1499

vddc_id_buf = (u16 *)((char *)profile + profile->usElbVDDC_IdArrayOffset);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1500

vddc_buf = (u16 *)((char *)profile + profile->usElbVDDC_LevelArrayOffset);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1515

vddci_id_buf = (u16 *)((char *)profile + profile->usElbVDDCI_IdArrayOffset);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1516

vddci_buf = (u16 *)((char *)profile + profile->usElbVDDCI_LevelArrayOffset);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

206

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

486

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

606

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

105

u16 usSclk_fcw_frac;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

106

u16 usSclk_fcw_int;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

111

u16 usSsc_fcw1_frac;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

112

u16 usSsc_fcw1_int;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

113

u16 usReserved;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

114

u16 usPcc_fcw_int;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

115

u16 usSsc_fcw_slew_frac;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.h

116

u16 usPcc_fcw_slew_frac;

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

138

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1721

vddgfx = smu8_convert_8Bit_index_to_voltage(hwmgr, (u16)tmp) / 4;

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

50

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/vega12_processpptables.c

48

u16 size;

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

48

u16 size;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.h

44

u16 bapmti_r[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.h

45

u16 bapmti_rc[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/drm/drm_atomic_helper.c

3953

u16 *red, u16 *green, u16 *blue,

sys/dev/drm/drm_dp_helper.c

1189

static const u16 psr_setup_time_us[] = {

sys/dev/drm/drm_dp_mst_topology.c

110

u16 remainder = 0;

sys/dev/drm/drm_edid.c

3425

static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,

sys/dev/drm/drm_edid.c

3481

u16 mask;

sys/dev/drm/drm_edid.c

3482

u16 structure_all;

sys/dev/drm/drm_edid.c

5107

u16 w, h;

sys/dev/drm/drm_fb_helper.c

1346

u16 red = cmap->red[i];

sys/dev/drm/drm_fb_helper.c

1347

u16 green = cmap->green[i];

sys/dev/drm/drm_fb_helper.c

1348

u16 blue = cmap->blue[i];

sys/dev/drm/drm_fb_helper.c

1373

u16 *r, *g, *b;

sys/dev/drm/drm_fb_helper.c

1421

u16 *r = crtc->gamma_store;

sys/dev/drm/drm_fb_helper.c

1422

u16 *g = r + crtc->gamma_size;

sys/dev/drm/drm_fb_helper.c

1423

u16 *b = g + crtc->gamma_size;

sys/dev/drm/drm_fb_helper.c

1455

u16 *r, *g, *b;

sys/dev/drm/drm_mipi_dsi.c

1039

int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline)

sys/dev/drm/drm_mipi_dsi.c

1062

u16 brightness)

sys/dev/drm/drm_mipi_dsi.c

1085

u16 *brightness)

sys/dev/drm/drm_mipi_dsi.c

541

u16 value)

sys/dev/drm/drm_mipi_dsi.c

929

int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,

sys/dev/drm/drm_mipi_dsi.c

930

u16 end)

sys/dev/drm/drm_mipi_dsi.c

953

int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,

sys/dev/drm/drm_mipi_dsi.c

954

u16 end)

sys/dev/drm/i915/dvo_ivch.c

164

static const u16 backup_addresses[] = {

sys/dev/drm/i915/dvo_ivch.c

177

u16 width, height;

sys/dev/drm/i915/dvo_ivch.c

181

u16 reg_backup[ARRAY_SIZE(backup_addresses)];

sys/dev/drm/i915/dvo_ivch.c

191

static bool ivch_read(struct intel_dvo_device *dvo, int addr, u16 *data)

sys/dev/drm/i915/dvo_ivch.c

234

static bool ivch_write(struct intel_dvo_device *dvo, int addr, u16 data)

sys/dev/drm/i915/dvo_ivch.c

266

u16 temp;

sys/dev/drm/i915/dvo_ivch.c

345

u16 vr01, vr30, backlight;

sys/dev/drm/i915/dvo_ivch.c

382

u16 vr01;

sys/dev/drm/i915/dvo_ivch.c

401

u16 vr40 = 0;

sys/dev/drm/i915/dvo_ivch.c

402

u16 vr01 = 0;

sys/dev/drm/i915/dvo_ivch.c

403

u16 vr10;

sys/dev/drm/i915/dvo_ivch.c

419

u16 x_ratio, y_ratio;

sys/dev/drm/i915/dvo_ivch.c

441

u16 val;

sys/dev/drm/i915/dvo_ns2501.c

210

u16 pll_b; /* PLL configuration, register B, 1C/1D */

sys/dev/drm/i915/dvo_ns2501.c

211

u16 hstart; /* horizontal start, registers C1/C2 */

sys/dev/drm/i915/dvo_ns2501.c

212

u16 hstop; /* horizontal total, registers C3/C4 */

sys/dev/drm/i915/dvo_ns2501.c

213

u16 vstart; /* vertical start, registers C5/C6 */

sys/dev/drm/i915/dvo_ns2501.c

214

u16 vstop; /* vertical total, registers C7/C8 */

sys/dev/drm/i915/dvo_ns2501.c

215

u16 vsync; /* manual vertical sync start, 80/81 */

sys/dev/drm/i915/dvo_ns2501.c

216

u16 vtotal; /* number of lines generated, 82/83 */

sys/dev/drm/i915/dvo_ns2501.c

217

u16 hpos; /* horizontal position + 256, 98/99 */

sys/dev/drm/i915/dvo_ns2501.c

218

u16 vpos; /* vertical position, 8e/8f */

sys/dev/drm/i915/dvo_ns2501.c

219

u16 voffs; /* vertical output offset, 9c/9d */

sys/dev/drm/i915/dvo_ns2501.c

220

u16 hscale; /* horizontal scaling factor, b8/b9 */

sys/dev/drm/i915/dvo_ns2501.c

221

u16 vscale; /* vertical scaling factor, 10/11 */

sys/dev/drm/i915/gvt/gvt.h

385

(*(u16 *)(vgpu->mmio.vreg + INTEL_GVT_MMIO_OFFSET(reg)))

sys/dev/drm/i915/gvt/gvt.h

393

(*(u16 *)(vgpu->mmio.sreg + INTEL_GVT_MMIO_OFFSET(reg)))

sys/dev/drm/i915/gvt/hypercall.h

45

int (*inject_msi)(unsigned long handle, u32 addr, u16 data);

sys/dev/drm/i915/gvt/mpt.h

121

u16 control, data;

sys/dev/drm/i915/gvt/mpt.h

125

control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset));

sys/dev/drm/i915/gvt/mpt.h

127

data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset));

sys/dev/drm/i915/i915_drv.h

1127

u16 pwm_freq_hz;

sys/dev/drm/i915/i915_drv.h

1137

u16 panel_id;

sys/dev/drm/i915/i915_drv.h

1140

u16 bl_ports;

sys/dev/drm/i915/i915_drv.h

1141

u16 cabc_ports;

sys/dev/drm/i915/i915_drv.h

1821

u16 orig_clock;

sys/dev/drm/i915/i915_drv.h

3546

u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,

sys/dev/drm/i915/i915_drv.h

3548

void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,

sys/dev/drm/i915/i915_drv.h

687

u16 saveGCDGMBUS;

sys/dev/drm/i915/i915_drv.h

790

u16 gpll_ref_freq; /* vlv/chv GPLL reference frequency */

sys/dev/drm/i915/i915_gem_gtt.c

1021

u16 pml4e;

sys/dev/drm/i915/i915_gem_gtt.c

1022

u16 pdpe;

sys/dev/drm/i915/i915_gem_gtt.c

1023

u16 pde;

sys/dev/drm/i915/i915_gem_gtt.c

1024

u16 pte;

sys/dev/drm/i915/i915_gem_gtt.c

1127

u16 index, max;

sys/dev/drm/i915/i915_gem_gtt.c

1212

u16 i;

sys/dev/drm/i915/i915_gem_gtt.c

3031

static unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)

sys/dev/drm/i915/i915_gem_gtt.c

3038

static unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)

sys/dev/drm/i915/i915_gem_gtt.c

3054

static unsigned int chv_get_total_gtt_size(u16 gmch_ctrl)

sys/dev/drm/i915/i915_gem_gtt.c

3400

u16 snb_gmch_ctl;

sys/dev/drm/i915/i915_gem_gtt.c

3460

u16 snb_gmch_ctl;

sys/dev/drm/i915/i915_gem_object.h

158

u16 read_domains;

sys/dev/drm/i915/i915_gem_object.h

163

u16 write_domain;

sys/dev/drm/i915/i915_irq.c

187

u16 val = I915_READ16(reg);

sys/dev/drm/i915/i915_irq.c

1940

u16 iir, u32 pipe_stats[I915_MAX_PIPES])

sys/dev/drm/i915/i915_irq.c

3004

const u8 instance, const u16 iir)

sys/dev/drm/i915/i915_irq.c

3015

const u8 class, const u8 instance, const u16 iir)

sys/dev/drm/i915/i915_irq.c

3037

const u16 intr = GEN11_INTR_ENGINE_INTR(identity);

sys/dev/drm/i915/i915_irq.c

4352

u16 enable_mask;

sys/dev/drm/i915/i915_irq.c

4382

u16 *eir, u16 *eir_stuck)

sys/dev/drm/i915/i915_irq.c

4384

u16 emr;

sys/dev/drm/i915/i915_irq.c

4411

u16 eir, u16 eir_stuck)

sys/dev/drm/i915/i915_irq.c

4470

u16 eir = 0, eir_stuck = 0;

sys/dev/drm/i915/i915_irq.c

4471

u16 iir;

sys/dev/drm/i915/i915_pvinfo.h

61

u16 version_major;

sys/dev/drm/i915/i915_pvinfo.h

62

u16 version_minor;

sys/dev/drm/i915/i915_vgpu.c

64

u16 version_major;

sys/dev/drm/i915/intel_audio.c

70

u16 m;

sys/dev/drm/i915/intel_audio.c

71

u16 n;

sys/dev/drm/i915/intel_bios.c

1487

u16 block_size;

sys/dev/drm/i915/intel_bios.c

190

u16 data_size = ((const u16 *)data)[-1]; /* stored in header */

sys/dev/drm/i915/intel_bios.c

1902

u16 dp, hdmi;

sys/dev/drm/i915/intel_bios.c

1973

u16 dp, hdmi;

sys/dev/drm/i915/intel_bios.c

68

return *((const u16 *)(block_base + 1));

sys/dev/drm/i915/intel_bios.c

760

u16 version, enum port port)

sys/dev/drm/i915/intel_bios.c

862

u16 panel_id, u32 *seq_size)

sys/dev/drm/i915/intel_bios.c

886

current_size = *((const u16 *)(data + index + 1));

sys/dev/drm/i915/intel_bios.c

910

u16 len;

sys/dev/drm/i915/intel_bios.c

924

len = *((const u16 *)(data + index + 2)) + 4;

sys/dev/drm/i915/intel_bios.c

949

u16 len;

sys/dev/drm/i915/intel_bios.h

127

u16 dual_link:2;

sys/dev/drm/i915/intel_bios.h

128

u16 lane_cnt:2;

sys/dev/drm/i915/intel_bios.h

129

u16 pixel_overlap:3;

sys/dev/drm/i915/intel_bios.h

130

u16 rgb_flip:1;

sys/dev/drm/i915/intel_bios.h

134

u16 dl_dcs_cabc_ports:2;

sys/dev/drm/i915/intel_bios.h

135

u16 dl_dcs_backlight_ports:2;

sys/dev/drm/i915/intel_bios.h

136

u16 rsvd3:4;

sys/dev/drm/i915/intel_bios.h

138

u16 rsvd4;

sys/dev/drm/i915/intel_bios.h

153

u16 dphy_param_valid:1;

sys/dev/drm/i915/intel_bios.h

154

u16 eot_pkt_disabled:1;

sys/dev/drm/i915/intel_bios.h

155

u16 enable_clk_stop:1;

sys/dev/drm/i915/intel_bios.h

156

u16 rsvd7:13;

sys/dev/drm/i915/intel_bios.h

189

u16 tclk_prepare_clkzero;

sys/dev/drm/i915/intel_bios.h

195

u16 ths_prepare_hszero;

sys/dev/drm/i915/intel_bios.h

216

u16 panel_on_delay;

sys/dev/drm/i915/intel_bios.h

217

u16 bl_enable_delay;

sys/dev/drm/i915/intel_bios.h

218

u16 bl_disable_delay;

sys/dev/drm/i915/intel_bios.h

219

u16 panel_off_delay;

sys/dev/drm/i915/intel_bios.h

220

u16 panel_power_cycle_delay;

sys/dev/drm/i915/intel_bios.h

42

u16 t1_t3;

sys/dev/drm/i915/intel_bios.h

43

u16 t8;

sys/dev/drm/i915/intel_bios.h

44

u16 t9;

sys/dev/drm/i915/intel_bios.h

45

u16 t10;

sys/dev/drm/i915/intel_bios.h

46

u16 t11_t12;

sys/dev/drm/i915/intel_bios.h

87

u16 panel_id;

sys/dev/drm/i915/intel_cdclk.c

136

u16 gcfgc = 0;

sys/dev/drm/i915/intel_cdclk.c

160

u16 gcfgc = 0;

sys/dev/drm/i915/intel_cdclk.c

300

u16 gcfgc = 0;

sys/dev/drm/i915/intel_cdclk.c

94

u16 hpllcc = 0;

sys/dev/drm/i915/intel_device_info.c

143

u16 enabled_eus = sseu_get_eus(sseu, s, ss);

sys/dev/drm/i915/intel_device_info.c

151

static u16 compute_eu_total(const struct sseu_dev_info *sseu)

sys/dev/drm/i915/intel_device_info.c

153

u16 i, total = 0;

sys/dev/drm/i915/intel_device_info.h

122

u16 eu_total;

sys/dev/drm/i915/intel_device_info.h

146

u16 device_id;

sys/dev/drm/i915/intel_device_info.h

147

u16 gen_mask;

sys/dev/drm/i915/intel_device_info.h

168

u16 ddb_size; /* in blocks */

sys/dev/drm/i915/intel_device_info.h

182

u16 degamma_lut_size;

sys/dev/drm/i915/intel_device_info.h

183

u16 gamma_lut_size;

sys/dev/drm/i915/intel_device_info.h

212

static inline u16 sseu_get_eus(const struct sseu_dev_info *sseu,

sys/dev/drm/i915/intel_device_info.h

216

u16 eu_mask = 0;

sys/dev/drm/i915/intel_device_info.h

220

eu_mask |= ((u16) sseu->eu_mask[offset + i]) <<

sys/dev/drm/i915/intel_device_info.h

228

int slice, int subslice, u16 eu_mask)

sys/dev/drm/i915/intel_display.c

16237

u16 gmch_ctrl;

sys/dev/drm/i915/intel_display.c

4878

u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_cosited)

sys/dev/drm/i915/intel_display.c

4881

u16 trip = 0;

sys/dev/drm/i915/intel_display.c

5102

u16 uv_rgb_hphase, uv_rgb_vphase;

sys/dev/drm/i915/intel_dp.c

5864

vbt.t11_t12 = max_t(u16, vbt.t11_t12, 1300 * 10);

sys/dev/drm/i915/intel_dp_aux_backlight.c

61

u16 level = 0;

sys/dev/drm/i915/intel_drv.h

1007

u16 fsb_freq;

sys/dev/drm/i915/intel_drv.h

1008

u16 mem_freq;

sys/dev/drm/i915/intel_drv.h

1009

u16 display_sr;

sys/dev/drm/i915/intel_drv.h

1010

u16 display_hpll_disable;

sys/dev/drm/i915/intel_drv.h

1011

u16 cursor_sr;

sys/dev/drm/i915/intel_drv.h

1012

u16 cursor_hpll_disable;

sys/dev/drm/i915/intel_drv.h

1664

u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_center);

sys/dev/drm/i915/intel_drv.h

654

u16 plane[I915_MAX_PLANES];

sys/dev/drm/i915/intel_drv.h

997

u16 fifo_size;

sys/dev/drm/i915/intel_drv.h

998

u16 max_wm;

sys/dev/drm/i915/intel_dsi.h

101

u16 burst_mode_ratio;

sys/dev/drm/i915/intel_dsi.h

104

u16 backlight_off_delay;

sys/dev/drm/i915/intel_dsi.h

105

u16 backlight_on_delay;

sys/dev/drm/i915/intel_dsi.h

106

u16 panel_on_delay;

sys/dev/drm/i915/intel_dsi.h

107

u16 panel_off_delay;

sys/dev/drm/i915/intel_dsi.h

108

u16 panel_pwr_cycle_delay;

sys/dev/drm/i915/intel_dsi.h

157

bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);

sys/dev/drm/i915/intel_dsi.h

50

u16 ports;

sys/dev/drm/i915/intel_dsi.h

59

u16 operation_mode;

sys/dev/drm/i915/intel_dsi.h

81

u16 dcs_backlight_ports;

sys/dev/drm/i915/intel_dsi.h

82

u16 dcs_cabc_ports;

sys/dev/drm/i915/intel_dsi.h

89

u16 lp_byte_clk;

sys/dev/drm/i915/intel_dsi.h

92

u16 lp_rx_timeout;

sys/dev/drm/i915/intel_dsi.h

93

u16 turn_arnd_val;

sys/dev/drm/i915/intel_dsi.h

94

u16 rst_timer_val;

sys/dev/drm/i915/intel_dsi.h

95

u16 hs_to_lp_count;

sys/dev/drm/i915/intel_dsi.h

96

u16 clk_lp_to_hs_count;

sys/dev/drm/i915/intel_dsi.h

97

u16 clk_hs_to_lp_count;

sys/dev/drm/i915/intel_dsi.h

99

u16 init_count;

sys/dev/drm/i915/intel_dsi_vbt.c

116

u16 len;

sys/dev/drm/i915/intel_dsi_vbt.c

124

len = *((u16 *) data);

sys/dev/drm/i915/intel_dsi_vbt.c

208

u16 pconf0, padval;

sys/dev/drm/i915/intel_dsi_vbt.c

252

u16 cfg0, cfg1;

sys/dev/drm/i915/intel_dsi_vbt.c

253

u16 family_num;

sys/dev/drm/i915/intel_dsi_vbt.c

502

bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)

sys/dev/drm/i915/intel_dsi_vbt.c

518

u16 burst_mode_ratio;

sys/dev/drm/i915/intel_dsi_vbt.c

69

u16 base_offset;

sys/dev/drm/i915/intel_guc_fwif.h

188

u16 year;

sys/dev/drm/i915/intel_guc_fwif.h

200

u16 sec;

sys/dev/drm/i915/intel_guc_fwif.h

280

u16 pagefault_count;

sys/dev/drm/i915/intel_guc_fwif.h

281

u16 engine_submit_queue_count;

sys/dev/drm/i915/intel_guc_fwif.h

301

u16 db_id;

sys/dev/drm/i915/intel_guc_submission.c

181

static void __update_doorbell_desc(struct intel_guc_client *client, u16 new_id)

sys/dev/drm/i915/intel_guc_submission.c

208

u16 db_id = client->doorbell_id;

sys/dev/drm/i915/intel_guc_submission.c

878

static bool doorbell_ok(struct intel_guc *guc, u16 db_id)

sys/dev/drm/i915/intel_guc_submission.c

900

u16 db_id;

sys/dev/drm/i915/intel_guc_submission.c

99

u16 id;

sys/dev/drm/i915/intel_guc_submission.h

68

u16 doorbell_id;

sys/dev/drm/i915/intel_mocs.c

30

u16 l3cc_value;

sys/dev/drm/i915/intel_mocs.c

315

u16 low,

sys/dev/drm/i915/intel_mocs.c

316

u16 high)

sys/dev/drm/i915/intel_opregion.c

114

u16 bclm[20]; /* backlight level duty cycle mapping table */

sys/dev/drm/i915/intel_opregion.c

273

u16 swsci_val;

sys/dev/drm/i915/intel_overlay.c

161

u16 Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES]; /* 0x200 */

sys/dev/drm/i915/intel_overlay.c

162

u16 RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES];

sys/dev/drm/i915/intel_overlay.c

163

u16 Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES]; /* 0x300 */

sys/dev/drm/i915/intel_overlay.c

164

u16 RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES];

sys/dev/drm/i915/intel_overlay.c

165

u16 UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES]; /* 0x500 */

sys/dev/drm/i915/intel_overlay.c

166

u16 RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES];

sys/dev/drm/i915/intel_overlay.c

167

u16 UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES]; /* 0x600 */

sys/dev/drm/i915/intel_overlay.c

168

u16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];

sys/dev/drm/i915/intel_overlay.c

557

static const u16 y_static_hcoeffs[N_PHASES][N_HORIZ_Y_TAPS] = {

sys/dev/drm/i915/intel_overlay.c

577

static const u16 uv_static_hcoeffs[N_PHASES][N_HORIZ_UV_TAPS] = {

sys/dev/drm/i915/intel_panel.c

1438

u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;

sys/dev/drm/i915/intel_pm.c

1155

int level, enum plane_id plane_id, u16 value)

sys/dev/drm/i915/intel_pm.c

1171

int level, u16 value)

sys/dev/drm/i915/intel_pm.c

1742

static u16 vlv_invert_wm_value(u16 wm, u16 fifo_size)

sys/dev/drm/i915/intel_pm.c

1755

int level, enum plane_id plane_id, u16 value)

sys/dev/drm/i915/intel_pm.c

181

u16 ddrpll, csipll;

sys/dev/drm/i915/intel_pm.c

3821

static u16 intel_get_ddb_size(struct drm_i915_private *dev_priv,

sys/dev/drm/i915/intel_pm.c

3829

u16 ddb_size = INTEL_INFO(dev_priv)->ddb_size;

sys/dev/drm/i915/intel_pm.c

3868

u16 ddb_size;

sys/dev/drm/i915/intel_pm.c

3942

u16 mask;

sys/dev/drm/i915/intel_pm.c

6196

u16 rgvswctl;

sys/dev/drm/i915/intel_pm.c

6288

u16 rgvswctl;

sys/dev/drm/i915/intel_pm.c

7773

u16 i;

sys/dev/drm/i915/intel_pm.c

7774

u16 t;

sys/dev/drm/i915/intel_pm.c

7775

u16 m;

sys/dev/drm/i915/intel_pm.c

7776

u16 c;

sys/dev/drm/i915/intel_sdvo.c

1397

u16 active_outputs = 0;

sys/dev/drm/i915/intel_sdvo.c

1427

u16 active_outputs = 0;

sys/dev/drm/i915/intel_sdvo.c

653

u16 outputs)

sys/dev/drm/i915/intel_sdvo.c

661

u16 *outputs)

sys/dev/drm/i915/intel_sdvo.c

711

u16 outputs)

sys/dev/drm/i915/intel_sdvo_regs.h

100

u16 min; /* pixel clock, in 10kHz units */

sys/dev/drm/i915/intel_sdvo_regs.h

101

u16 max; /* pixel clock, in 10kHz units */

sys/dev/drm/i915/intel_sdvo_regs.h

105

u16 clock;

sys/dev/drm/i915/intel_sdvo_regs.h

106

u16 width;

sys/dev/drm/i915/intel_sdvo_regs.h

107

u16 height;

sys/dev/drm/i915/intel_sdvo_regs.h

185

u16 in0, in1;

sys/dev/drm/i915/intel_sdvo_regs.h

218

u16 interrupt_status;

sys/dev/drm/i915/intel_sdvo_regs.h

573

u16 trip_low;

sys/dev/drm/i915/intel_sdvo_regs.h

574

u16 trip_high;

sys/dev/drm/i915/intel_sdvo_regs.h

575

u16 value;

sys/dev/drm/i915/intel_sdvo_regs.h

579

u16 trip_low;

sys/dev/drm/i915/intel_sdvo_regs.h

580

u16 trip_high;

sys/dev/drm/i915/intel_sdvo_regs.h

61

u16 output_flags;

sys/dev/drm/i915/intel_sdvo_regs.h

631

u16 max_value;

sys/dev/drm/i915/intel_sdvo_regs.h

632

u16 default_value;

sys/dev/drm/i915/intel_sdvo_regs.h

673

u16 value;

sys/dev/drm/i915/intel_sdvo_regs.h

72

u16 clock; /* pixel clock, in 10kHz units */

sys/dev/drm/i915/intel_sideband.c

205

u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,

sys/dev/drm/i915/intel_sideband.c

244

void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,

sys/dev/drm/i915/intel_sprite.c

319

u16 y_hphase, uv_rgb_hphase;

sys/dev/drm/i915/intel_sprite.c

320

u16 y_vphase, uv_rgb_vphase;

sys/dev/drm/i915/intel_tv.c

309

u16 refresh; /* in millihertz (for precision) */

sys/dev/drm/i915/intel_tv.c

312

u16 hblank_start, hblank_end, htotal;

sys/dev/drm/i915/intel_tv.c

318

u16 nbr_end;

sys/dev/drm/i915/intel_tv.c

322

u16 vburst_end_f1;

sys/dev/drm/i915/intel_tv.c

324

u16 vburst_end_f2;

sys/dev/drm/i915/intel_tv.c

326

u16 vburst_end_f3;

sys/dev/drm/i915/intel_tv.c

328

u16 vburst_end_f4;

sys/dev/drm/i915/intel_tv.c

332

u16 dda2_size, dda3_size;

sys/dev/drm/i915/intel_tv.c

334

u16 dda2_inc, dda3_inc;

sys/dev/drm/i915/intel_tv.c

343

u16 max_srcw;

sys/dev/drm/i915/intel_tv.c

53

u16 blank, black;

sys/dev/drm/i915/intel_tv.c

58

u16 ry, gy, by, ay;

sys/dev/drm/i915/intel_tv.c

59

u16 ru, gu, bu, au;

sys/dev/drm/i915/intel_tv.c

60

u16 rv, gv, bv, av;

sys/dev/drm/i915/intel_uc_fw.h

63

u16 major_ver_wanted;

sys/dev/drm/i915/intel_uc_fw.h

64

u16 minor_ver_wanted;

sys/dev/drm/i915/intel_uc_fw.h

65

u16 major_ver_found;

sys/dev/drm/i915/intel_uc_fw.h

66

u16 minor_ver_found;

sys/dev/drm/i915/intel_uncore.c

1658

u16 gen_mask;

sys/dev/drm/i915/intel_uncore.h

72

u16 (*mmio_readw)(struct drm_i915_private *dev_priv,

sys/dev/drm/i915/intel_uncore.h

82

i915_reg_t r, u16 val, bool trace);

sys/dev/drm/i915/intel_vbt_defs.h

353

u16 handle;

sys/dev/drm/i915/intel_vbt_defs.h

354

u16 device_type; /* See DEVICE_TYPE_* above */

sys/dev/drm/i915/intel_vbt_defs.h

364

u16 dtd_buf_ptr; /* 161 */

sys/dev/drm/i915/intel_vbt_defs.h

377

u16 addin_offset;

sys/dev/drm/i915/intel_vbt_defs.h

382

u16 edid_ptr;

sys/dev/drm/i915/intel_vbt_defs.h

420

u16 extended_type;

sys/dev/drm/i915/intel_vbt_defs.h

427

u16 dp_gpio_pin_num; /* 195 */

sys/dev/drm/i915/intel_vbt_defs.h

480

u16 ssc_bits;

sys/dev/drm/i915/intel_vbt_defs.h

481

u16 ssc_freq;

sys/dev/drm/i915/intel_vbt_defs.h

482

u16 ssc_ddt;

sys/dev/drm/i915/intel_vbt_defs.h

484

u16 panel_color_depth;

sys/dev/drm/i915/intel_vbt_defs.h

493

u16 fp_timing_offset; /* offsets are from start of bdb */

sys/dev/drm/i915/intel_vbt_defs.h

495

u16 dvo_timing_offset;

sys/dev/drm/i915/intel_vbt_defs.h

497

u16 panel_pnp_id_offset;

sys/dev/drm/i915/intel_vbt_defs.h

508

u16 x_res;

sys/dev/drm/i915/intel_vbt_defs.h

509

u16 y_res;

sys/dev/drm/i915/intel_vbt_defs.h

520

u16 terminator;

sys/dev/drm/i915/intel_vbt_defs.h

524

u16 clock; /**< In 10khz */

sys/dev/drm/i915/intel_vbt_defs.h

55

u16 version;

sys/dev/drm/i915/intel_vbt_defs.h

555

u16 mfg_name;

sys/dev/drm/i915/intel_vbt_defs.h

556

u16 product_code;

sys/dev/drm/i915/intel_vbt_defs.h

56

u16 header_size;

sys/dev/drm/i915/intel_vbt_defs.h

57

u16 vbt_size;

sys/dev/drm/i915/intel_vbt_defs.h

579

u16 pwm_freq_hz;

sys/dev/drm/i915/intel_vbt_defs.h

600

u16 aimdb_version;

sys/dev/drm/i915/intel_vbt_defs.h

601

u16 aimdb_header_size;

sys/dev/drm/i915/intel_vbt_defs.h

602

u16 aimdb_size;

sys/dev/drm/i915/intel_vbt_defs.h

607

u16 aimdb_size;

sys/dev/drm/i915/intel_vbt_defs.h

611

u16 fp_timing_offset;

sys/dev/drm/i915/intel_vbt_defs.h

613

u16 dvo_timing_offset;

sys/dev/drm/i915/intel_vbt_defs.h

615

u16 text_fitting_offset;

sys/dev/drm/i915/intel_vbt_defs.h

617

u16 graphics_fitting_offset;

sys/dev/drm/i915/intel_vbt_defs.h

631

u16 als_low_trip;

sys/dev/drm/i915/intel_vbt_defs.h

632

u16 als_high_trip;

sys/dev/drm/i915/intel_vbt_defs.h

658

u16 boot_mode_x;

sys/dev/drm/i915/intel_vbt_defs.h

659

u16 boot_mode_y;

sys/dev/drm/i915/intel_vbt_defs.h

663

u16 enable_lfp_primary:1;

sys/dev/drm/i915/intel_vbt_defs.h

664

u16 selective_mode_pruning:1;

sys/dev/drm/i915/intel_vbt_defs.h

665

u16 dual_frequency:1;

sys/dev/drm/i915/intel_vbt_defs.h

666

u16 render_clock_freq:1; /* 0: high freq; 1: low freq */

sys/dev/drm/i915/intel_vbt_defs.h

667

u16 nt_clone_support:1;

sys/dev/drm/i915/intel_vbt_defs.h

668

u16 power_scheme_ui:1; /* 0: CUI; 1: 3rd party */

sys/dev/drm/i915/intel_vbt_defs.h

669

u16 sprite_display_assign:1; /* 0: secondary; 1: primary */

sys/dev/drm/i915/intel_vbt_defs.h

670

u16 cui_aspect_scaling:1;

sys/dev/drm/i915/intel_vbt_defs.h

671

u16 preserve_aspect_ratio:1;

sys/dev/drm/i915/intel_vbt_defs.h

672

u16 sdvo_device_power_down:1;

sys/dev/drm/i915/intel_vbt_defs.h

673

u16 crt_hotplug:1;

sys/dev/drm/i915/intel_vbt_defs.h

674

u16 lvds_config:2;

sys/dev/drm/i915/intel_vbt_defs.h

675

u16 tv_hotplug:1;

sys/dev/drm/i915/intel_vbt_defs.h

676

u16 hdmi_config:2;

sys/dev/drm/i915/intel_vbt_defs.h

680

u16 legacy_crt_max_x;

sys/dev/drm/i915/intel_vbt_defs.h

681

u16 legacy_crt_max_y;

sys/dev/drm/i915/intel_vbt_defs.h

687

u16 rmpm_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

688

u16 s2ddt_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

689

u16 dpst_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

690

u16 bltclt_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

691

u16 adb_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

692

u16 drrs_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

693

u16 grs_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

694

u16 gpmt_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

695

u16 tbt_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

696

u16 psr_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

697

u16 ips_enabled:1;

sys/dev/drm/i915/intel_vbt_defs.h

698

u16 reserved3:4;

sys/dev/drm/i915/intel_vbt_defs.h

699

u16 pc_feature_valid:1;

sys/dev/drm/i915/intel_vbt_defs.h

728

u16 pwm_on_to_backlight_enable;

sys/dev/drm/i915/intel_vbt_defs.h

729

u16 backlight_disable_to_pwm_off;

sys/dev/drm/i915/intel_vbt_defs.h

73

u16 version;

sys/dev/drm/i915/intel_vbt_defs.h

74

u16 header_size;

sys/dev/drm/i915/intel_vbt_defs.h

744

u16 edp_s3d_feature; /* 162 */

sys/dev/drm/i915/intel_vbt_defs.h

745

u16 edp_t3_optimization; /* 165 */

sys/dev/drm/i915/intel_vbt_defs.h

747

u16 fast_link_training; /* 182 */

sys/dev/drm/i915/intel_vbt_defs.h

748

u16 dpcd_600h_write_required; /* 185 */

sys/dev/drm/i915/intel_vbt_defs.h

75

u16 bdb_size;

sys/dev/drm/i915/intel_vbt_defs.h

750

u16 full_link_params_provided; /* 199 */

sys/dev/drm/i915/intel_vbt_defs.h

766

u16 tp1_wakeup_time;

sys/dev/drm/i915/intel_vbt_defs.h

767

u16 tp2_tp3_wakeup_time;

sys/dev/drm/i915/intel_vbt_defs.h

89

u16 code_segment;

sys/dev/drm/i915/vlv_dsi.c

1103

u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;

sys/dev/drm/i915/vlv_dsi.c

1104

u16 hfp_sw, hsync_sw, hbp_sw;

sys/dev/drm/i915/vlv_dsi.c

1105

u16 crtc_htotal_sw, crtc_hsync_start_sw, crtc_hsync_end_sw,

sys/dev/drm/i915/vlv_dsi.c

1301

static u16 txclkesc(u32 divider, unsigned int us)

sys/dev/drm/i915/vlv_dsi.c

1324

u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;

sys/dev/drm/i915/vlv_dsi.c

1412

u16 mode_hdisplay;

sys/dev/drm/i915/vlv_dsi.c

39

static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count,

sys/dev/drm/i915/vlv_dsi.c

40

u16 burst_mode_ratio)

sys/dev/drm/i915/vlv_dsi.c

47

static u16 pixels_from_txbyteclkhs(u16 clk_hs, int bpp, int lane_count,

sys/dev/drm/i915/vlv_dsi.c

48

u16 burst_mode_ratio)

sys/dev/drm/i915/vlv_dsi_pll.c

33

static const u16 lfsr_converts[] = {

sys/dev/drm/include/asm/io.h

46

static inline u16

sys/dev/drm/include/asm/io.h

49

return *(const volatile u16*)addr;

sys/dev/drm/include/asm/io.h

68

writew(u16 value, volatile void __iomem *addr)

sys/dev/drm/include/asm/processor.h

48

u16 x86_clflush_size;

sys/dev/drm/include/drm/drm_atomic_helper.h

187

u16 *red, u16 *green, u16 *blue,

sys/dev/drm/include/drm/drm_crtc.h

459

int (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,

sys/dev/drm/include/drm/drm_dp_mst_helper.h

232

u16 pbn;

sys/dev/drm/include/drm/drm_dp_mst_helper.h

239

u16 allocated_pbn;

sys/dev/drm/include/drm/drm_dp_mst_helper.h

294

u16 full_payload_bw_number;

sys/dev/drm/include/drm/drm_dp_mst_helper.h

295

u16 avail_payload_bw_number;

sys/dev/drm/include/drm/drm_dp_mst_helper.h

311

u16 available_pbn;

sys/dev/drm/include/drm/drm_mipi_dsi.h

225

u16 value);

sys/dev/drm/include/drm/drm_mipi_dsi.h

264

int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,

sys/dev/drm/include/drm/drm_mipi_dsi.h

265

u16 end);

sys/dev/drm/include/drm/drm_mipi_dsi.h

266

int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,

sys/dev/drm/include/drm/drm_mipi_dsi.h

267

u16 end);

sys/dev/drm/include/drm/drm_mipi_dsi.h

272

int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline);

sys/dev/drm/include/drm/drm_mipi_dsi.h

274

u16 brightness);

sys/dev/drm/include/drm/drm_mipi_dsi.h

276

u16 *brightness);

sys/dev/drm/include/drm/drm_mipi_dsi.h

38

u16 flags;

sys/dev/drm/include/drm/drm_plane.h

122

u16 alpha;

sys/dev/drm/include/linux/kernel.h

49

#define U16_MAX ((u16)~0U)

sys/dev/drm/include/linux/pci.h

129

pci_read_config_word(struct pci_dev *pdev, int where, u16 *val)

sys/dev/drm/include/linux/pci.h

131

*val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);

sys/dev/drm/include/linux/pci.h

150

pci_write_config_word(struct pci_dev *pdev, int where, u16 val)

sys/dev/drm/include/linux/pci.h

167

u16 ctl;

sys/dev/drm/include/linux/pci.h

183

u16 ctl;

sys/dev/drm/include/linux/pci.h

325

pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val)

sys/dev/drm/include/linux/pci.h

329

*val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);

sys/dev/drm/include/linux/pci.h

420

static inline u16 pcie_flags_reg(struct pci_dev *dev)

sys/dev/drm/include/linux/pci.h

423

u16 reg16;

sys/dev/drm/radeon/atom.c

1372

u16 *mdt = (u16 *)((char *)ctx->bios + ctx->data_table + 4);

sys/dev/drm/radeon/atom.c

1392

u16 *mct = (u16 *)((char *)ctx->bios + ctx->cmd_table + 4);

sys/dev/drm/radeon/atombios_crtc.c

308

u16 misc = 0;

sys/dev/drm/radeon/atombios_crtc.c

355

u16 misc = 0;

sys/dev/drm/radeon/atombios_dp.c

107

args.v1.lpAuxRequest = cpu_to_le16((u16)(0 + 4));

sys/dev/drm/radeon/atombios_dp.c

108

args.v1.lpDataOut = cpu_to_le16((u16)(16 + 4));

sys/dev/drm/radeon/atombios_dp.c

417

u16 dp_bridge = radeon_connector_encoder_get_dp_bridge_encoder_id(connector);

sys/dev/drm/radeon/atombios_encoders.c

2781

u16 caps)

sys/dev/drm/radeon/atombios_i2c.c

45

u16 out = cpu_to_le16(0);

sys/dev/drm/radeon/btc_dpm.c

1189

u32 clock, u16 max_voltage, u16 *voltage)

sys/dev/drm/radeon/btc_dpm.c

1199

*voltage = (u16)((table->entries[i].v < max_voltage) ?

sys/dev/drm/radeon/btc_dpm.c

1293

static u16 btc_find_voltage(struct atom_voltage_table *table, u16 voltage)

sys/dev/drm/radeon/btc_dpm.c

1306

u16 max_vddc, u16 max_vddci,

sys/dev/drm/radeon/btc_dpm.c

1307

u16 *vddc, u16 *vddci)

sys/dev/drm/radeon/btc_dpm.c

1310

u16 new_voltage;

sys/dev/drm/radeon/btc_dpm.c

1852

static bool btc_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/drm/radeon/btc_dpm.c

1978

u16 address;

sys/dev/drm/radeon/btc_dpm.c

2099

u16 vddc, vddci;

sys/dev/drm/radeon/btc_dpm.h

48

u32 clock, u16 max_voltage, u16 *voltage);

sys/dev/drm/radeon/btc_dpm.h

52

u16 max_vddc, u16 max_vddci,

sys/dev/drm/radeon/btc_dpm.h

53

u16 *vddc, u16 *vddci);

sys/dev/drm/radeon/ci_dpm.c

1016

fdo_min = (u16)tmp64;

sys/dev/drm/radeon/ci_dpm.c

1024

slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100);

sys/dev/drm/radeon/ci_dpm.c

1025

slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100);

sys/dev/drm/radeon/ci_dpm.c

1049

fan_table.FdoMax = cpu_to_be16((u16)duty100);

sys/dev/drm/radeon/ci_dpm.c

1316

u16 reg_offset, u32 *value)

sys/dev/drm/radeon/ci_dpm.c

1327

u16 reg_offset, u32 value)

sys/dev/drm/radeon/ci_dpm.c

1342

u16 tmp;

sys/dev/drm/radeon/ci_dpm.c

1375

u16 leakage_id, virtual_voltage_id;

sys/dev/drm/radeon/ci_dpm.c

1376

u16 vddc, vddci;

sys/dev/drm/radeon/ci_dpm.c

175

u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd);

sys/dev/drm/radeon/ci_dpm.c

2364

u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd)

sys/dev/drm/radeon/ci_dpm.c

2366

u16 v_index, idx;

sys/dev/drm/radeon/ci_dpm.c

262

static u8 ci_convert_to_vid(u16 vddc)

sys/dev/drm/radeon/ci_dpm.c

2739

(u16)rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;

sys/dev/drm/radeon/ci_dpm.c

290

hi_vid[i] = ci_convert_to_vid((u16)rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage);

sys/dev/drm/radeon/ci_dpm.c

2953

memory_level->ActivityLevel = (u16)pi->mclk_activity_target;

sys/dev/drm/radeon/ci_dpm.c

3127

cpu_to_be16((u16)pi->mclk_activity_target);

sys/dev/drm/radeon/ci_dpm.c

3160

u16 ulv_voltage = rdev->pm.dpm.backbias_response_time;

sys/dev/drm/radeon/ci_dpm.c

3251

u16 sclk_activity_level_t,

sys/dev/drm/radeon/ci_dpm.c

328

u16 tdc_limit;

sys/dev/drm/radeon/ci_dpm.c

3326

(u16)pi->activity_target[i],

sys/dev/drm/radeon/ci_dpm.c

3690

table->TemperatureLimitHigh = (u16)((pi->thermal_temp_setting.temperature_high *

sys/dev/drm/radeon/ci_dpm.c

3692

table->TemperatureLimitLow = (u16)((pi->thermal_temp_setting.temperature_low *

sys/dev/drm/radeon/ci_dpm.c

409

u16 hi_sidd = pi->smc_powertune_table.BapmVddCBaseLeakageHiSidd;

sys/dev/drm/radeon/ci_dpm.c

410

u16 lo_sidd = pi->smc_powertune_table.BapmVddCBaseLeakageLoSidd;

sys/dev/drm/radeon/ci_dpm.c

432

const u16 *def1;

sys/dev/drm/radeon/ci_dpm.c

433

const u16 *def2;

sys/dev/drm/radeon/ci_dpm.c

4441

static bool ci_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/drm/radeon/ci_dpm.c

446

dpm_table->PPM_PkgPwrLimit = cpu_to_be16((u16)ppm->dgpu_tdp * 256 / 1000);

sys/dev/drm/radeon/ci_dpm.c

447

dpm_table->PPM_TemperatureLimit = cpu_to_be16((u16)ppm->tj_max * 256);

sys/dev/drm/radeon/ci_dpm.c

4532

u16 address;

sys/dev/drm/radeon/ci_dpm.c

4836

u16 pcie_speed, max_speed = 0;

sys/dev/drm/radeon/ci_dpm.c

4847

static u16 ci_get_current_pcie_speed(struct radeon_device *rdev)

sys/dev/drm/radeon/ci_dpm.c

4854

return (u16)speed_cntl;

sys/dev/drm/radeon/ci_dpm.c

4992

static void ci_patch_with_vddc_leakage(struct radeon_device *rdev, u16 *vddc)

sys/dev/drm/radeon/ci_dpm.c

5006

static void ci_patch_with_vddci_leakage(struct radeon_device *rdev, u16 *vddci)

sys/dev/drm/radeon/ci_dpm.c

5079

ci_patch_with_vddc_leakage(rdev, (u16 *)&table->vddc);

sys/dev/drm/radeon/ci_dpm.c

5080

ci_patch_with_vddci_leakage(rdev, (u16 *)&table->vddci);

sys/dev/drm/radeon/ci_dpm.c

5587

u16 data_offset;

sys/dev/drm/radeon/ci_dpm.c

5683

u16 data_offset;

sys/dev/drm/radeon/ci_dpm.c

5721

u16 data_offset, size;

sys/dev/drm/radeon/ci_dpm.c

997

u16 fdo_min, slope1, slope2;

sys/dev/drm/radeon/ci_dpm.h

100

u16 count;

sys/dev/drm/radeon/ci_dpm.h

101

u16 leakage_id[CISLANDS_MAX_LEAKAGE_COUNT];

sys/dev/drm/radeon/ci_dpm.h

102

u16 actual_voltage[CISLANDS_MAX_LEAKAGE_COUNT];

sys/dev/drm/radeon/ci_dpm.h

117

u16 mvdd_bootup_value;

sys/dev/drm/radeon/ci_dpm.h

118

u16 vddc_bootup_value;

sys/dev/drm/radeon/ci_dpm.h

119

u16 vddci_bootup_value;

sys/dev/drm/radeon/ci_dpm.h

122

u16 pcie_gen_bootup_value;

sys/dev/drm/radeon/ci_dpm.h

123

u16 pcie_lane_bootup_value;

sys/dev/drm/radeon/ci_dpm.h

151

u16 max;

sys/dev/drm/radeon/ci_dpm.h

152

u16 min;

sys/dev/drm/radeon/ci_dpm.h

184

u16 bapmti_r[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/drm/radeon/ci_dpm.h

185

u16 bapmti_rc[SMU7_DTE_ITERATIONS * SMU7_DTE_SOURCES * SMU7_DTE_SINKS];

sys/dev/drm/radeon/ci_dpm.h

200

u16 acpi_vddc;

sys/dev/drm/radeon/ci_dpm.h

201

u16 acpi_vddci;

sys/dev/drm/radeon/ci_dpm.h

206

u16 max_vddc_in_pp_table;

sys/dev/drm/radeon/ci_dpm.h

207

u16 min_vddc_in_pp_table;

sys/dev/drm/radeon/ci_dpm.h

208

u16 max_vddci_in_pp_table;

sys/dev/drm/radeon/ci_dpm.h

209

u16 min_vddci_in_pp_table;

sys/dev/drm/radeon/ci_dpm.h

42

u16 pcie_lane;

sys/dev/drm/radeon/ci_dpm.h

46

u16 performance_level_count;

sys/dev/drm/radeon/ci_dpm.h

84

u16 valid_flag;

sys/dev/drm/radeon/cik.c

9523

u16 tmp16;

sys/dev/drm/radeon/cik.c

9575

u16 bridge_cfg, gpu_cfg;

sys/dev/drm/radeon/cik.c

9576

u16 bridge_cfg2, gpu_cfg2;

sys/dev/drm/radeon/cypress_dpm.c

1709

pi->state_table_start = (u16)tmp;

sys/dev/drm/radeon/cypress_dpm.c

1718

pi->soft_regs_start = (u16)tmp;

sys/dev/drm/radeon/cypress_dpm.c

1727

eg_pi->mc_reg_table_start = (u16)tmp;

sys/dev/drm/radeon/cypress_dpm.c

405

u16 value, RV770_SMC_VOLTAGE_VALUE *voltage)

sys/dev/drm/radeon/cypress_dpm.c

874

u16 address = pi->state_table_start +

sys/dev/drm/radeon/cypress_dpm.c

894

u16 address;

sys/dev/drm/radeon/cypress_dpm.c

899

(u16)offsetof(SMC_Evergreen_MCRegisters, data[2]);

sys/dev/drm/radeon/cypress_dpm.h

37

u16 valid_flag;

sys/dev/drm/radeon/cypress_dpm.h

79

u16 acpi_vddci;

sys/dev/drm/radeon/cypress_dpm.h

90

u16 mc_reg_table_start;

sys/dev/drm/radeon/dce3_1_afmt.c

77

static const u16 eld_reg_to_type[][2] = {

sys/dev/drm/radeon/dce6_afmt.c

222

static const u16 eld_reg_to_type[][2] = {

sys/dev/drm/radeon/evergreen.c

1266

u16 v;

sys/dev/drm/radeon/evergreen_hdmi.c

173

static const u16 eld_reg_to_type[][2] = {

sys/dev/drm/radeon/kv_dpm.c

1331

u16 reg_offset, u32 value)

sys/dev/drm/radeon/kv_dpm.c

1336

(u8 *)&value, sizeof(u16), pi->sram_end);

sys/dev/drm/radeon/kv_dpm.c

1340

u16 reg_offset, u32 *value)

sys/dev/drm/radeon/kv_dpm.c

1362

u16 tmp;

sys/dev/drm/radeon/kv_dpm.c

1370

sizeof(u16), pi->sram_end);

sys/dev/drm/radeon/kv_dpm.c

1379

sizeof(u16), pi->sram_end);

sys/dev/drm/radeon/kv_dpm.c

2492

u16 data_offset;

sys/dev/drm/radeon/kv_dpm.c

2640

u16 data_offset;

sys/dev/drm/radeon/kv_dpm.c

2804

u16 vddc;

sys/dev/drm/radeon/kv_dpm.c

2812

vddc = kv_convert_8bit_index_to_voltage(rdev, (u16)tmp);

sys/dev/drm/radeon/kv_dpm.c

594

static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev,

sys/dev/drm/radeon/kv_dpm.c

595

u16 voltage)

sys/dev/drm/radeon/kv_dpm.c

600

static u16 kv_convert_2bit_index_to_voltage(struct radeon_device *rdev,

sys/dev/drm/radeon/kv_dpm.c

608

return kv_convert_8bit_index_to_voltage(rdev, (u16)vid_8bit);

sys/dev/drm/radeon/kv_dpm.c

627

pi->graphics_level[index].AT = cpu_to_be16((u16)at);

sys/dev/drm/radeon/kv_dpm.h

117

u16 high_voltage_t;

sys/dev/drm/radeon/kv_dpm.h

130

u16 fps_high_t;

sys/dev/drm/radeon/kv_dpm.h

98

u16 bootup_nb_voltage_index;

sys/dev/drm/radeon/ni_dpm.c

1113

pi->state_table_start = (u16)tmp;

sys/dev/drm/radeon/ni_dpm.c

1123

pi->soft_regs_start = (u16)tmp;

sys/dev/drm/radeon/ni_dpm.c

1133

eg_pi->mc_reg_table_start = (u16)tmp;

sys/dev/drm/radeon/ni_dpm.c

1143

ni_pi->fan_table_start = (u16)tmp;

sys/dev/drm/radeon/ni_dpm.c

1153

ni_pi->arb_table_start = (u16)tmp;

sys/dev/drm/radeon/ni_dpm.c

1163

ni_pi->cac_table_start = (u16)tmp;

sys/dev/drm/radeon/ni_dpm.c

1173

ni_pi->spll_table_start = (u16)tmp;

sys/dev/drm/radeon/ni_dpm.c

1301

u16 value,

sys/dev/drm/radeon/ni_dpm.c

1344

u16 *std_voltage)

sys/dev/drm/radeon/ni_dpm.c

1356

u16 value, u8 index,

sys/dev/drm/radeon/ni_dpm.c

1393

u16 std_vddc_med;

sys/dev/drm/radeon/ni_dpm.c

1394

u16 std_vddc_high;

sys/dev/drm/radeon/ni_dpm.c

1493

(u16)(pi->state_table_start + offsetof(NISLANDS_SMC_STATETABLE, dpm2Params) +

sys/dev/drm/radeon/ni_dpm.c

1651

(u16)(ni_pi->arb_table_start +

sys/dev/drm/radeon/ni_dpm.c

1655

(u16)sizeof(SMC_NIslands_MCArbDramTimingRegisterSet),

sys/dev/drm/radeon/ni_dpm.c

1732

u16 std_vddc;

sys/dev/drm/radeon/ni_dpm.c

1818

u16 std_vddc;

sys/dev/drm/radeon/ni_dpm.c

1842

u16 std_vddc;

sys/dev/drm/radeon/ni_dpm.c

2320

u16 std_vddc;

sys/dev/drm/radeon/ni_dpm.c

2689

u16 address = pi->state_table_start +

sys/dev/drm/radeon/ni_dpm.c

2691

u16 state_size = sizeof(NISLANDS_SMC_SWSTATE) +

sys/dev/drm/radeon/ni_dpm.c

2768

static bool ni_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/drm/radeon/ni_dpm.c

2837

u16 address;

sys/dev/drm/radeon/ni_dpm.c

3031

u16 address;

sys/dev/drm/radeon/ni_dpm.c

3038

(u16)offsetof(SMC_NIslands_MCRegisters, data[NISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT]);

sys/dev/drm/radeon/ni_dpm.c

3968

u16 vddc, vddci, mvdd;

sys/dev/drm/radeon/ni_dpm.c

3994

u16 data_offset;

sys/dev/drm/radeon/ni_dpm.c

741

u16 v, s32 t,

sys/dev/drm/radeon/ni_dpm.c

763

u16 v,

sys/dev/drm/radeon/ni_dpm.c

792

u16 vddci;

sys/dev/drm/radeon/ni_dpm.h

173

u16 performance_level_count;

sys/dev/drm/radeon/ni_dpm.h

195

u16 arb_table_start;

sys/dev/drm/radeon/ni_dpm.h

196

u16 fan_table_start;

sys/dev/drm/radeon/ni_dpm.h

197

u16 cac_table_start;

sys/dev/drm/radeon/ni_dpm.h

198

u16 spll_table_start;

sys/dev/drm/radeon/ni_dpm.h

55

u16 valid_flag;

sys/dev/drm/radeon/r600.c

4505

u16 link_cntl2;

sys/dev/drm/radeon/r600_dpm.c

1340

u16 r600_get_pcie_lane_support(struct radeon_device *rdev,

sys/dev/drm/radeon/r600_dpm.c

1341

u16 asic_lanes,

sys/dev/drm/radeon/r600_dpm.c

1342

u16 default_lanes)

sys/dev/drm/radeon/r600_dpm.c

851

u16 data_offset;

sys/dev/drm/radeon/r600_dpm.c

881

u16 data_offset;

sys/dev/drm/radeon/r600_dpm.h

231

u16 r600_get_pcie_lane_support(struct radeon_device *rdev,

sys/dev/drm/radeon/r600_dpm.h

232

u16 asic_lanes,

sys/dev/drm/radeon/r600_dpm.h

233

u16 default_lanes);

sys/dev/drm/radeon/radeon.h

1278

u16 voltage;

sys/dev/drm/radeon/radeon.h

1280

u16 vddci;

sys/dev/drm/radeon/radeon.h

1385

u16 vddc;

sys/dev/drm/radeon/radeon.h

1386

u16 vddci;

sys/dev/drm/radeon/radeon.h

1396

u16 v;

sys/dev/drm/radeon/radeon.h

1406

u16 vddc;

sys/dev/drm/radeon/radeon.h

1410

u16 vddc1;

sys/dev/drm/radeon/radeon.h

1411

u16 vddc2;

sys/dev/drm/radeon/radeon.h

1412

u16 vddc3;

sys/dev/drm/radeon/radeon.h

1422

u16 voltage;

sys/dev/drm/radeon/radeon.h

1435

u16 v;

sys/dev/drm/radeon/radeon.h

1446

u16 v;

sys/dev/drm/radeon/radeon.h

1456

u16 cpu_core_number;

sys/dev/drm/radeon/radeon.h

1468

u16 tdp;

sys/dev/drm/radeon/radeon.h

1469

u16 configurable_tdp;

sys/dev/drm/radeon/radeon.h

1470

u16 tdc;

sys/dev/drm/radeon/radeon.h

1471

u16 battery_power_limit;

sys/dev/drm/radeon/radeon.h

1472

u16 small_power_limit;

sys/dev/drm/radeon/radeon.h

1473

u16 low_cac_leakage;

sys/dev/drm/radeon/radeon.h

1474

u16 high_cac_leakage;

sys/dev/drm/radeon/radeon.h

1475

u16 maximum_power_delivery_limit;

sys/dev/drm/radeon/radeon.h

1494

u16 vddc_vddci_delta;

sys/dev/drm/radeon/radeon.h

1495

u16 min_vddc_for_pcie_gen2;

sys/dev/drm/radeon/radeon.h

1503

u16 t_min;

sys/dev/drm/radeon/radeon.h

1504

u16 t_med;

sys/dev/drm/radeon/radeon.h

1505

u16 t_high;

sys/dev/drm/radeon/radeon.h

1506

u16 pwm_min;

sys/dev/drm/radeon/radeon.h

1507

u16 pwm_med;

sys/dev/drm/radeon/radeon.h

1508

u16 pwm_high;

sys/dev/drm/radeon/radeon.h

1511

u16 t_max;

sys/dev/drm/radeon/radeon.h

1513

u16 default_max_fan_pwm;

sys/dev/drm/radeon/radeon.h

1514

u16 default_fan_output_sensitivity;

sys/dev/drm/radeon/radeon.h

1515

u16 fan_output_sensitivity;

sys/dev/drm/radeon/radeon.h

1577

u16 tdp_od_limit;

sys/dev/drm/radeon/radeon.h

1579

u16 load_line_slope;

sys/dev/drm/radeon/radeon.h

1628

u16 current_vddc;

sys/dev/drm/radeon/radeon.h

1629

u16 current_vddci;

sys/dev/drm/radeon/radeon.h

1632

u16 default_vddc;

sys/dev/drm/radeon/radeon.h

1633

u16 default_vddci;

sys/dev/drm/radeon/radeon.h

2965

uint32_t supported_device, u16 caps);

sys/dev/drm/radeon/radeon.h

305

void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type);

sys/dev/drm/radeon/radeon.h

307

u16 voltage_level, u8 voltage_type,

sys/dev/drm/radeon/radeon.h

312

u8 voltage_type, u16 *voltage_step);

sys/dev/drm/radeon/radeon.h

314

u16 voltage_id, u16 *voltage);

sys/dev/drm/radeon/radeon.h

316

u16 *voltage,

sys/dev/drm/radeon/radeon.h

317

u16 leakage_idx);

sys/dev/drm/radeon/radeon.h

319

u16 *leakage_id);

sys/dev/drm/radeon/radeon.h

321

u16 *vddc, u16 *vddci,

sys/dev/drm/radeon/radeon.h

322

u16 virtual_voltage_id,

sys/dev/drm/radeon/radeon.h

323

u16 vbios_voltage_id);

sys/dev/drm/radeon/radeon.h

325

u16 virtual_voltage_id,

sys/dev/drm/radeon/radeon.h

326

u16 *voltage);

sys/dev/drm/radeon/radeon.h

329

u16 nominal_voltage,

sys/dev/drm/radeon/radeon.h

330

u16 *true_voltage);

sys/dev/drm/radeon/radeon.h

332

u8 voltage_type, u16 *min_voltage);

sys/dev/drm/radeon/radeon.h

334

u8 voltage_type, u16 *max_voltage);

sys/dev/drm/radeon/radeon_acpi.c

212

size = *(u16 *) info->Buffer.Pointer;

sys/dev/drm/radeon/radeon_acpi.c

259

size = *(u16 *) info->Buffer.Pointer;

sys/dev/drm/radeon/radeon_acpi.c

318

size = *(u16 *)info->Buffer.Pointer;

sys/dev/drm/radeon/radeon_acpi.c

39

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/radeon/radeon_acpi.c

40

u16 version; /* version */

sys/dev/drm/radeon/radeon_acpi.c

46

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/radeon/radeon_acpi.c

494

size = *(u16 *) info->Buffer.Pointer;

sys/dev/drm/radeon/radeon_acpi.c

53

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/radeon/radeon_acpi.c

621

size = *(u16 *) info->buffer.pointer;

sys/dev/drm/radeon/radeon_acpi.c

70

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/radeon/radeon_acpi.c

71

u16 version; /* version */

sys/dev/drm/radeon/radeon_acpi.c

78

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/radeon/radeon_acpi.c

79

u16 client_id; /* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */

sys/dev/drm/radeon/radeon_acpi.c

80

u16 valid_flags_mask; /* valid flags mask */

sys/dev/drm/radeon/radeon_acpi.c

81

u16 flags; /* flags */

sys/dev/drm/radeon/radeon_acpi.c

87

u16 size; /* structure size in bytes (includes size field) */

sys/dev/drm/radeon/radeon_atombios.c

1115

u16 data_offset;

sys/dev/drm/radeon/radeon_atombios.c

1302

u16 data_offset;

sys/dev/drm/radeon/radeon_atombios.c

1424

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

1427

u16 percentage = 0, rate = 0;

sys/dev/drm/radeon/radeon_atombios.c

1798

u16 data_offset, misc;

sys/dev/drm/radeon/radeon_atombios.c

199

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

2090

u16 data_offset;

sys/dev/drm/radeon/radeon_atombios.c

2373

u16 *vddc, u16 *vddci, u16 *mvdd)

sys/dev/drm/radeon/radeon_atombios.c

2378

u16 data_offset;

sys/dev/drm/radeon/radeon_atombios.c

2405

u16 vddc, vddci, mvdd;

sys/dev/drm/radeon/radeon_atombios.c

2450

u16 max_vddci = 0;

sys/dev/drm/radeon/radeon_atombios.c

2478

u16 vddc;

sys/dev/drm/radeon/radeon_atombios.c

2581

u16 data_offset;

sys/dev/drm/radeon/radeon_atombios.c

2672

u16 data_offset;

sys/dev/drm/radeon/radeon_atombios.c

2757

u16 data_offset;

sys/dev/drm/radeon/radeon_atombios.c

3097

void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type)

sys/dev/drm/radeon/radeon_atombios.c

3135

u16 voltage_id, u16 *voltage)

sys/dev/drm/radeon/radeon_atombios.c

3174

u16 *voltage,

sys/dev/drm/radeon/radeon_atombios.c

3175

u16 leakage_idx)

sys/dev/drm/radeon/radeon_atombios.c

3181

u16 *leakage_id)

sys/dev/drm/radeon/radeon_atombios.c

3210

u16 *vddc, u16 *vddci,

sys/dev/drm/radeon/radeon_atombios.c

3211

u16 virtual_voltage_id,

sys/dev/drm/radeon/radeon_atombios.c

3212

u16 vbios_voltage_id)

sys/dev/drm/radeon/radeon_atombios.c

3216

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3219

u16 *leakage_bin, *vddc_id_buf, *vddc_buf, *vddci_id_buf, *vddci_buf;

sys/dev/drm/radeon/radeon_atombios.c

3239

leakage_bin = (u16 *)

sys/dev/drm/radeon/radeon_atombios.c

3242

vddc_id_buf = (u16 *)

sys/dev/drm/radeon/radeon_atombios.c

3245

vddc_buf = (u16 *)

sys/dev/drm/radeon/radeon_atombios.c

3248

vddci_id_buf = (u16 *)

sys/dev/drm/radeon/radeon_atombios.c

3251

vddci_buf = (u16 *)

sys/dev/drm/radeon/radeon_atombios.c

3301

u16 virtual_voltage_id,

sys/dev/drm/radeon/radeon_atombios.c

3302

u16 *voltage)

sys/dev/drm/radeon/radeon_atombios.c

3332

u16 voltage_level, u8 voltage_type,

sys/dev/drm/radeon/radeon_atombios.c

3439

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3498

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3537

u8 voltage_type, u16 *max_voltage)

sys/dev/drm/radeon/radeon_atombios.c

3541

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3596

u8 voltage_type, u16 *min_voltage)

sys/dev/drm/radeon/radeon_atombios.c

3600

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3646

u8 voltage_type, u16 *voltage_step)

sys/dev/drm/radeon/radeon_atombios.c

3650

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3688

u16 nominal_voltage,

sys/dev/drm/radeon/radeon_atombios.c

3689

u16 *true_voltage)

sys/dev/drm/radeon/radeon_atombios.c

3691

u16 min_voltage, max_voltage, voltage_step;

sys/dev/drm/radeon/radeon_atombios.c

3718

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3818

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3908

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

3982

u16 data_offset, size;

sys/dev/drm/radeon/radeon_atombios.c

4004

((u8 *)reg_block + (2 * sizeof(u16)) +

sys/dev/drm/radeon/radeon_atombios.c

4015

(u16)(le16_to_cpu(format->usRegIndex));

sys/dev/drm/radeon/radeon_atombios.c

515

u16 size, data_offset;

sys/dev/drm/radeon/radeon_atombios.c

524

u16 igp_lane_info, conn_id, connector_object_id;

sys/dev/drm/radeon/radeon_atombios.c

652

u16 encoder_obj = le16_to_cpu(enc_obj->asObjects[k].usObjectID);

sys/dev/drm/radeon/radeon_atombios.c

658

u16 caps = 0;

sys/dev/drm/radeon/radeon_atombios.c

683

u16 router_obj_id = le16_to_cpu(router_obj->asObjects[k].usObjectID);

sys/dev/drm/radeon/radeon_atombios.c

699

u16 *dst_objs = (u16 *)(num_dst_objs + 1);

sys/dev/drm/radeon/radeon_combios.c

1197

lvds->panel_vcc_delay = min_t(u16, lvds->panel_vcc_delay, 2000);

sys/dev/drm/radeon/radeon_combios.c

2633

u16 offset, misc, misc2 = 0;

sys/dev/drm/radeon/radeon_combios.c

2755

u16 voltage_table_offset = RBIOS16(offset + 0x5 + 0xc);

sys/dev/drm/radeon/radeon_combios.c

642

u16 offset;

sys/dev/drm/radeon/radeon_combios.c

811

u16 igp_info;

sys/dev/drm/radeon/radeon_connectors.c

1613

u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)

sys/dev/drm/radeon/radeon_display.c

119

u16 *r, *g, *b;

sys/dev/drm/radeon/radeon_display.c

191

u16 *r, *g, *b;

sys/dev/drm/radeon/radeon_display.c

232

static int radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,

sys/dev/drm/radeon/radeon_display.c

233

u16 *blue, uint32_t size,

sys/dev/drm/radeon/radeon_display.c

47

u16 *r, *g, *b;

sys/dev/drm/radeon/radeon_display.c

85

u16 *r, *g, *b;

sys/dev/drm/radeon/radeon_encoders.c

294

u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)

sys/dev/drm/radeon/radeon_legacy_tv.c

431

u16 p1, p2, h_inc;

sys/dev/drm/radeon/radeon_legacy_tv.c

471

p1 = (u16)((int)p1 + h_offset);

sys/dev/drm/radeon/radeon_legacy_tv.c

472

p2 = (u16)((int)p2 - h_offset);

sys/dev/drm/radeon/radeon_legacy_tv.c

517

h_inc = (u16)((int)(const_ptr->hor_resolution * 4096 * NTSC_TV_CLOCK_T) /

sys/dev/drm/radeon/radeon_legacy_tv.c

520

h_inc = (u16)((int)(const_ptr->hor_resolution * 4096 * PAL_TV_CLOCK_T) /

sys/dev/drm/radeon/radeon_mode.h

274

u16 firmware_flags;

sys/dev/drm/radeon/radeon_mode.h

330

u16 lut_r[256], lut_g[256], lut_b[256];

sys/dev/drm/radeon/radeon_mode.h

478

u16 caps;

sys/dev/drm/radeon/radeon_mode.h

660

u16 s1;

sys/dev/drm/radeon/radeon_mode.h

675

u16 value;

sys/dev/drm/radeon/radeon_mode.h

722

u16 *vddc, u16 *vddci, u16 *mvdd);

sys/dev/drm/radeon/radeon_mode.h

740

extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);

sys/dev/drm/radeon/radeon_mode.h

741

extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);

sys/dev/drm/radeon/rs780_dpm.c

378

static void rs780_force_voltage(struct radeon_device *rdev, u16 voltage)

sys/dev/drm/radeon/rs780_dpm.c

798

u16 data_offset;

sys/dev/drm/radeon/rs780_dpm.c

851

u16 data_offset;

sys/dev/drm/radeon/rs780_dpm.h

41

u16 max_voltage;

sys/dev/drm/radeon/rs780_dpm.h

42

u16 min_voltage;

sys/dev/drm/radeon/rs780_dpm.h

43

u16 boot_voltage;

sys/dev/drm/radeon/rs780_dpm.h

44

u16 inter_voltage_low;

sys/dev/drm/radeon/rs780_dpm.h

45

u16 inter_voltage_high;

sys/dev/drm/radeon/rs780_dpm.h

46

u16 num_of_cycles_in_period;

sys/dev/drm/radeon/rv6xx_dpm.c

1205

u16 safe_voltage;

sys/dev/drm/radeon/rv6xx_dpm.c

1274

u16 initial_voltage,

sys/dev/drm/radeon/rv6xx_dpm.c

1275

u16 target_voltage)

sys/dev/drm/radeon/rv6xx_dpm.c

1277

u16 current_voltage;

sys/dev/drm/radeon/rv6xx_dpm.c

1278

u16 true_target_voltage;

sys/dev/drm/radeon/rv6xx_dpm.c

1279

u16 voltage_step;

sys/dev/drm/radeon/rv6xx_dpm.c

1823

u16 vddc;

sys/dev/drm/radeon/rv6xx_dpm.c

1865

u16 vddc, vddci, mvdd;

sys/dev/drm/radeon/rv6xx_dpm.c

1882

u16 data_offset;

sys/dev/drm/radeon/rv6xx_dpm.c

703

u32 entry, u16 voltage)

sys/dev/drm/radeon/rv6xx_dpm.h

40

u16 vddc[R600_PM_NUMBER_OF_VOLTAGE_LEVELS];

sys/dev/drm/radeon/rv6xx_dpm.h

82

u16 vddc;

sys/dev/drm/radeon/rv740_dpm.c

106

data_rate = (u16)(memory_clock * factor / 1000);

sys/dev/drm/radeon/rv740_dpm.c

70

u16 min;

sys/dev/drm/radeon/rv740_dpm.c

71

u16 max;

sys/dev/drm/radeon/rv740_dpm.c

99

u16 data_rate;

sys/dev/drm/radeon/rv770.c

2022

u16 link_cntl2;

sys/dev/drm/radeon/rv770_dpm.c

1239

u16 min, max, step;

sys/dev/drm/radeon/rv770_dpm.c

1256

pi->vddc_table[i].vddc = (u16)(min + i * step);

sys/dev/drm/radeon/rv770_dpm.c

1390

u16 address = pi->state_table_start +

sys/dev/drm/radeon/rv770_dpm.c

1697

u16 vddc;

sys/dev/drm/radeon/rv770_dpm.c

2254

u16 vddc, vddci, mvdd;

sys/dev/drm/radeon/rv770_dpm.c

2280

u16 data_offset;

sys/dev/drm/radeon/rv770_dpm.c

240

u16 reg_offset, u32 *value)

sys/dev/drm/radeon/rv770_dpm.c

251

u16 reg_offset, u32 value)

sys/dev/drm/radeon/rv770_dpm.c

570

int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc,

sys/dev/drm/radeon/rv770_dpm.h

102

u16 max_vddc;

sys/dev/drm/radeon/rv770_dpm.h

103

u16 max_vddc_in_table;

sys/dev/drm/radeon/rv770_dpm.h

104

u16 min_vddc_in_table;

sys/dev/drm/radeon/rv770_dpm.h

113

u16 acpi_vddc;

sys/dev/drm/radeon/rv770_dpm.h

134

u16 state_table_start;

sys/dev/drm/radeon/rv770_dpm.h

135

u16 soft_regs_start;

sys/dev/drm/radeon/rv770_dpm.h

136

u16 sram_end;

sys/dev/drm/radeon/rv770_dpm.h

144

u16 vddc;

sys/dev/drm/radeon/rv770_dpm.h

145

u16 vddci; /* eg+ only */

sys/dev/drm/radeon/rv770_dpm.h

217

int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc,

sys/dev/drm/radeon/rv770_dpm.h

282

u16 reg_offset, u32 value);

sys/dev/drm/radeon/rv770_dpm.h

65

u16 vddc;

sys/dev/drm/radeon/rv770_smc.c

278

u16 smc_address, u16 limit)

sys/dev/drm/radeon/rv770_smc.c

296

u16 smc_start_address, const u8 *src,

sys/dev/drm/radeon/rv770_smc.c

297

u16 byte_count, u16 limit)

sys/dev/drm/radeon/rv770_smc.c

301

u16 addr;

sys/dev/drm/radeon/rv770_smc.c

467

static void rv770_clear_smc_sram(struct radeon_device *rdev, u16 limit)

sys/dev/drm/radeon/rv770_smc.c

470

u16 i;

sys/dev/drm/radeon/rv770_smc.c

481

u16 limit)

sys/dev/drm/radeon/rv770_smc.c

485

u16 int_vect_start_address;

sys/dev/drm/radeon/rv770_smc.c

486

u16 int_vect_size;

sys/dev/drm/radeon/rv770_smc.c

488

u16 ucode_start_address;

sys/dev/drm/radeon/rv770_smc.c

489

u16 ucode_size;

sys/dev/drm/radeon/rv770_smc.c

604

u16 smc_address, u32 *value, u16 limit)

sys/dev/drm/radeon/rv770_smc.c

619

u16 smc_address, u32 value, u16 limit)

sys/dev/drm/radeon/rv770_smc.h

191

u16 smc_start_address, const u8 *src,

sys/dev/drm/radeon/rv770_smc.h

192

u16 byte_count, u16 limit);

sys/dev/drm/radeon/rv770_smc.h

201

u16 smc_address, u32 *value, u16 limit);

sys/dev/drm/radeon/rv770_smc.h

203

u16 smc_address, u32 value, u16 limit);

sys/dev/drm/radeon/rv770_smc.h

205

u16 limit);

sys/dev/drm/radeon/si.c

7088

u16 tmp16;

sys/dev/drm/radeon/si.c

7140

u16 bridge_cfg, gpu_cfg;

sys/dev/drm/radeon/si.c

7141

u16 bridge_cfg2, gpu_cfg2;

sys/dev/drm/radeon/si_dpm.c

1748

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage);

sys/dev/drm/radeon/si_dpm.c

1751

u16 *std_voltage);

sys/dev/drm/radeon/si_dpm.c

1753

u16 reg_offset, u32 value);

sys/dev/drm/radeon/si_dpm.c

1772

u16 v, s32 t, u32 ileakage, u32 *leakage)

sys/dev/drm/radeon/si_dpm.c

1800

u16 v,

sys/dev/drm/radeon/si_dpm.c

1809

const u32 fixed_kt, u16 v,

sys/dev/drm/radeon/si_dpm.c

1829

u16 v,

sys/dev/drm/radeon/si_dpm.c

2253

static u16 si_calculate_power_efficiency_ratio(struct radeon_device *rdev,

sys/dev/drm/radeon/si_dpm.c

2254

const u16 prev_std_vddc,

sys/dev/drm/radeon/si_dpm.c

2255

const u16 curr_std_vddc)

sys/dev/drm/radeon/si_dpm.c

2272

return (u16)pwr_efficiency_ratio;

sys/dev/drm/radeon/si_dpm.c

2298

u16 prev_std_vddc;

sys/dev/drm/radeon/si_dpm.c

2299

u16 curr_std_vddc;

sys/dev/drm/radeon/si_dpm.c

2301

u16 pwr_efficiency_ratio;

sys/dev/drm/radeon/si_dpm.c

2534

u16 *max, u16 *min)

sys/dev/drm/radeon/si_dpm.c

2564

*min = (u16)v0_loadline;

sys/dev/drm/radeon/si_dpm.c

2572

static u16 si_get_cac_std_voltage_step(u16 max, u16 min)

sys/dev/drm/radeon/si_dpm.c

2580

u16 vddc_max, u16 vddc_min, u16 vddc_step,

sys/dev/drm/radeon/si_dpm.c

2581

u16 t0, u16 t_step)

sys/dev/drm/radeon/si_dpm.c

2589

u16 voltage;

sys/dev/drm/radeon/si_dpm.c

2612

cpu_to_be16((u16)smc_leakage);

sys/dev/drm/radeon/si_dpm.c

2620

u16 vddc_max, u16 vddc_min, u16 vddc_step)

sys/dev/drm/radeon/si_dpm.c

2627

u16 voltage;

sys/dev/drm/radeon/si_dpm.c

2648

cpu_to_be16((u16)smc_leakage);

sys/dev/drm/radeon/si_dpm.c

2658

u16 vddc_max, vddc_min, vddc_step;

sys/dev/drm/radeon/si_dpm.c

2659

u16 t0, t_step;

sys/dev/drm/radeon/si_dpm.c

2917

static u16 si_get_lower_of_leakage_and_vce_voltage(struct radeon_device *rdev,

sys/dev/drm/radeon/si_dpm.c

2918

u16 vce_voltage)

sys/dev/drm/radeon/si_dpm.c

2920

u16 highest_leakage = 0;

sys/dev/drm/radeon/si_dpm.c

2936

u32 evclk, u32 ecclk, u16 *voltage)

sys/dev/drm/radeon/si_dpm.c

2975

u16 vddc, vddci, min_vce_voltage = 0;

sys/dev/drm/radeon/si_dpm.c

3187

u16 reg_offset, u32 *value)

sys/dev/drm/radeon/si_dpm.c

3198

u16 reg_offset, u32 value)

sys/dev/drm/radeon/si_dpm.c

3238

u16 vddc, count = 0;

sys/dev/drm/radeon/si_dpm.c

3255

u32 index, u16 *leakage_voltage)

sys/dev/drm/radeon/si_dpm.c

4115

u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage)

sys/dev/drm/radeon/si_dpm.c

4152

u16 *std_voltage)

sys/dev/drm/radeon/si_dpm.c

4154

u16 v_index;

sys/dev/drm/radeon/si_dpm.c

4165

(u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {

sys/dev/drm/radeon/si_dpm.c

4180

(u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {

sys/dev/drm/radeon/si_dpm.c

4202

u16 value, u8 index,

sys/dev/drm/radeon/si_dpm.c

4213

u16 voltage, u32 sclk, u32 mclk,

sys/dev/drm/radeon/si_dpm.c

4427

u16 std_vddc;

sys/dev/drm/radeon/si_dpm.c

4519

u16 std_vddc;

sys/dev/drm/radeon/si_dpm.c

4542

u16 std_vddc;

sys/dev/drm/radeon/si_dpm.c

4988

u16 std_vddc;

sys/dev/drm/radeon/si_dpm.c

5428

static bool si_check_s0_mc_reg_index(u16 in_reg, u16 *out_reg)

sys/dev/drm/radeon/si_dpm.c

5500

u16 address;

sys/dev/drm/radeon/si_dpm.c

5726

u16 pcie_speed, max_speed = 0;

sys/dev/drm/radeon/si_dpm.c

5736

static u16 si_get_current_pcie_speed(struct radeon_device *rdev)

sys/dev/drm/radeon/si_dpm.c

5743

return (u16)speed_cntl;

sys/dev/drm/radeon/si_dpm.c

5875

u16 leakage_voltage;

sys/dev/drm/radeon/si_dpm.c

6036

u16 fdo_min, slope1, slope2;

sys/dev/drm/radeon/si_dpm.c

6055

fdo_min = (u16)tmp64;

sys/dev/drm/radeon/si_dpm.c

6063

slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100);

sys/dev/drm/radeon/si_dpm.c

6064

slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100);

sys/dev/drm/radeon/si_dpm.c

6088

fan_table.fdo_max = cpu_to_be16((u16)duty100);

sys/dev/drm/radeon/si_dpm.c

6740

u16 leakage_voltage;

sys/dev/drm/radeon/si_dpm.c

6790

u16 vddc, vddci, mvdd;

sys/dev/drm/radeon/si_dpm.c

6820

u16 data_offset;

sys/dev/drm/radeon/si_dpm.h

115

u16 valid_flag;

sys/dev/drm/radeon/si_dpm.h

127

u16 voltage;

sys/dev/drm/radeon/si_dpm.h

128

u16 leakage_index;

sys/dev/drm/radeon/si_dpm.h

136

u16 count;

sys/dev/drm/radeon/si_dpm.h

159

u16 mvdd_bootup_value;

sys/dev/drm/radeon/sumo_dpm.c

1467

u16 data_offset;

sys/dev/drm/radeon/sumo_dpm.c

1560

static u16 sumo_convert_voltage_index_to_value(struct radeon_device *rdev,

sys/dev/drm/radeon/sumo_dpm.c

1664

u16 data_offset;

sys/dev/drm/radeon/sumo_dpm.h

60

u16 vid_2bit;

sys/dev/drm/radeon/sumo_dpm.h

61

u16 vid_7bit;

sys/dev/drm/radeon/sumo_dpm.h

71

u16 vid_2bit;

sys/dev/drm/radeon/sumo_dpm.h

72

u16 rsv;

sys/dev/drm/radeon/sumo_dpm.h

84

u16 bootup_nb_voltage_index;

sys/dev/drm/radeon/trinity_dpm.c

1313

static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev,

sys/dev/drm/radeon/trinity_dpm.c

1510

u32 evclk, u32 ecclk, u16 *voltage)

sys/dev/drm/radeon/trinity_dpm.c

1550

u16 min_vce_voltage;

sys/dev/drm/radeon/trinity_dpm.c

1746

u16 data_offset;

sys/dev/drm/radeon/trinity_dpm.c

1857

u16 data_offset;

sys/dev/drm/radeon/trinity_dpm.h

84

u16 nbp_voltage_index[TRINITY_NUM_NBPSTATES];

sys/dev/drm/radeon/trinity_dpm.h

85

u16 bootup_nb_voltage_index;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1046

u16 data;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1193

u16 reg_data;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1250

u16 speed;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1251

u16 duplex;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1278

static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1283

u16 reg_data, reg_data2;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1332

u16 reg_data, reg_data2;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1381

u16 *data)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1400

*data = (u16)kmrnctrlsta;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

1418

u16 data)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

144

u16 size;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

167

size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>

sys/dev/netif/ig_hal/e1000_80003es2lan.c

297

u16 mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

313

u16 mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

330

u16 mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

347

u16 mask;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

402

static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

449

static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

47

u16 *data);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

474

u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

478

u16 temp;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

496

temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

50

u16 data);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

51

static s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_80003es2lan.c

513

if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {

sys/dev/netif/ig_hal/e1000_80003es2lan.c

52

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

545

u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

549

u16 temp;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

56

static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_80003es2lan.c

567

temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

57

u16 *duplex);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

584

if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {

sys/dev/netif/ig_hal/e1000_80003es2lan.c

616

static s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_80003es2lan.c

617

u16 words, u16 *data)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

62

static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

63

static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

665

u16 phy_data;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

67

u16 *data);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

69

u16 data);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

71

static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_80003es2lan.c

761

u16 phy_data, index;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

79

static const u16 e1000_gg82563_cable_length_table[] = {

sys/dev/netif/ig_hal/e1000_80003es2lan.c

793

static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_80003es2lan.c

794

u16 *duplex)

sys/dev/netif/ig_hal/e1000_80003es2lan.c

823

u16 kum_reg_data;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

889

u16 kum_reg_data;

sys/dev/netif/ig_hal/e1000_80003es2lan.c

890

u16 i;

sys/dev/netif/ig_hal/e1000_82540.c

333

u16 i;

sys/dev/netif/ig_hal/e1000_82540.c

415

u16 data;

sys/dev/netif/ig_hal/e1000_82540.c

502

u16 nvm_data;

sys/dev/netif/ig_hal/e1000_82540.c

532

u16 default_page = 0;

sys/dev/netif/ig_hal/e1000_82540.c

533

u16 phy_data;

sys/dev/netif/ig_hal/e1000_82540.c

591

u16 nvm_data;

sys/dev/netif/ig_hal/e1000_82540.c

694

u16 offset, nvm_data, i;

sys/dev/netif/ig_hal/e1000_82541.c

1046

(u16)(dev_spec->spd_default &

sys/dev/netif/ig_hal/e1000_82541.c

1092

u16 phy_saved_data;

sys/dev/netif/ig_hal/e1000_82541.c

1156

u16 fused, fine, coarse;

sys/dev/netif/ig_hal/e1000_82541.c

132

u16 size;

sys/dev/netif/ig_hal/e1000_82541.c

441

static s32 e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_82541.c

442

u16 *duplex)

sys/dev/netif/ig_hal/e1000_82541.c

446

u16 data;

sys/dev/netif/ig_hal/e1000_82541.c

51

static s32 e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_82541.c

52

u16 *duplex);

sys/dev/netif/ig_hal/e1000_82541.c

67

static const u16 e1000_igp_cable_length_table[] = {

sys/dev/netif/ig_hal/e1000_82541.c

672

u16 phy_data, phy_saved_data, speed, duplex, i;

sys/dev/netif/ig_hal/e1000_82541.c

673

u16 ffe_idle_err_timeout = FFE_IDLE_ERR_COUNT_TIMEOUT_20;

sys/dev/netif/ig_hal/e1000_82541.c

674

u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = {

sys/dev/netif/ig_hal/e1000_82541.c

873

u16 i, data;

sys/dev/netif/ig_hal/e1000_82541.c

874

u16 cur_agc_value, agc_value = 0;

sys/dev/netif/ig_hal/e1000_82541.c

875

u16 min_agc_value = IGP01E1000_AGC_LENGTH_TABLE_SIZE;

sys/dev/netif/ig_hal/e1000_82541.c

876

u16 agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] = {IGP01E1000_PHY_AGC_A,

sys/dev/netif/ig_hal/e1000_82541.c

946

u16 data;

sys/dev/netif/ig_hal/e1000_82542.c

249

u16 i;

sys/dev/netif/ig_hal/e1000_82542.c

571

u16 offset, nvm_data, i;

sys/dev/netif/ig_hal/e1000_82543.c

1019

u16 data;

sys/dev/netif/ig_hal/e1000_82543.c

1198

u16 speed, duplex;

sys/dev/netif/ig_hal/e1000_82543.c

1403

u16 phy_data;

sys/dev/netif/ig_hal/e1000_82543.c

483

static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_82543.c

50

u16 *data);

sys/dev/netif/ig_hal/e1000_82543.c

52

u16 data);

sys/dev/netif/ig_hal/e1000_82543.c

539

static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_82543.c

627

u16 count)

sys/dev/netif/ig_hal/e1000_82543.c

678

static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw)

sys/dev/netif/ig_hal/e1000_82543.c

681

u16 data = 0;

sys/dev/netif/ig_hal/e1000_82543.c

72

static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw);

sys/dev/netif/ig_hal/e1000_82543.c

74

u16 count);

sys/dev/netif/ig_hal/e1000_82543.c

766

u16 mii_status_reg;

sys/dev/netif/ig_hal/e1000_82543.c

767

u16 i;

sys/dev/netif/ig_hal/e1000_82543.c

958

u16 i;

sys/dev/netif/ig_hal/e1000_82571.c

1189

u16 i, rar_count = mac->rar_entry_count;

sys/dev/netif/ig_hal/e1000_82571.c

1449

u16 data;

sys/dev/netif/ig_hal/e1000_82571.c

1497

u16 status_1kbt = 0;

sys/dev/netif/ig_hal/e1000_82571.c

1498

u16 receive_errors = 0;

sys/dev/netif/ig_hal/e1000_82571.c

1805

static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)

sys/dev/netif/ig_hal/e1000_82571.c

1893

u16 data;

sys/dev/netif/ig_hal/e1000_82571.c

207

u16 size;

sys/dev/netif/ig_hal/e1000_82571.c

245

size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>

sys/dev/netif/ig_hal/e1000_82571.c

466

u16 phy_id = 0;

sys/dev/netif/ig_hal/e1000_82571.c

55

static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_82571.c

56

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_82571.c

71

static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data);

sys/dev/netif/ig_hal/e1000_82571.c

787

static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_82571.c

788

u16 *data)

sys/dev/netif/ig_hal/e1000_82571.c

824

u16 i;

sys/dev/netif/ig_hal/e1000_82571.c

85

static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_82571.c

86

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_82571.c

905

static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_82571.c

906

u16 words, u16 *data)

sys/dev/netif/ig_hal/e1000_82571.c

984

u16 data;

sys/dev/netif/ig_hal/e1000_82575.c

101

u16 offset);

sys/dev/netif/ig_hal/e1000_82575.c

1052

static s32 e1000_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_82575.c

1104

static void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_82575.c

1170

static s32 e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_82575.c

1171

u16 *duplex)

sys/dev/netif/ig_hal/e1000_82575.c

118

static const u16 e1000_82580_rxpbs_table[] = {

sys/dev/netif/ig_hal/e1000_82575.c

1197

u16 speed, duplex;

sys/dev/netif/ig_hal/e1000_82575.c

1237

u16 data;

sys/dev/netif/ig_hal/e1000_82575.c

1328

u16 *speed, u16 *duplex)

sys/dev/netif/ig_hal/e1000_82575.c

1494

u16 i, rar_count = mac->rar_entry_count;

sys/dev/netif/ig_hal/e1000_82575.c

1638

u16 data;

sys/dev/netif/ig_hal/e1000_82575.c

1924

static s32 e1000_valid_led_default_82575(struct e1000_hw *hw, u16 *data)

sys/dev/netif/ig_hal/e1000_82575.c

2229

u16 pcie_devctl2;

sys/dev/netif/ig_hal/e1000_82575.c

2370

static s32 e1000_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_82575.c

2396

static s32 e1000_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_82575.c

2426

u16 nvm_data = 0;

sys/dev/netif/ig_hal/e1000_82575.c

2464

u16 swmbsw_mask = E1000_SW_SYNCH_MB;

sys/dev/netif/ig_hal/e1000_82575.c

254

u16 data;

sys/dev/netif/ig_hal/e1000_82575.c

2560

u16 e1000_rxpbs_adjust_82580(u32 data)

sys/dev/netif/ig_hal/e1000_82575.c

2562

u16 ret_val = 0;

sys/dev/netif/ig_hal/e1000_82575.c

2579

s32 e1000_validate_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset)

sys/dev/netif/ig_hal/e1000_82575.c

2582

u16 checksum = 0;

sys/dev/netif/ig_hal/e1000_82575.c

2583

u16 i, nvm_data;

sys/dev/netif/ig_hal/e1000_82575.c

2596

if (checksum != (u16) NVM_SUM) {

sys/dev/netif/ig_hal/e1000_82575.c

2616

s32 e1000_update_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset)

sys/dev/netif/ig_hal/e1000_82575.c

2619

u16 checksum = 0;

sys/dev/netif/ig_hal/e1000_82575.c

2620

u16 i, nvm_data;

sys/dev/netif/ig_hal/e1000_82575.c

2632

checksum = (u16) NVM_SUM - checksum;

sys/dev/netif/ig_hal/e1000_82575.c

2653

u16 eeprom_regions_count = 1;

sys/dev/netif/ig_hal/e1000_82575.c

2654

u16 j, nvm_data;

sys/dev/netif/ig_hal/e1000_82575.c

2655

u16 nvm_offset;

sys/dev/netif/ig_hal/e1000_82575.c

2694

u16 j, nvm_data;

sys/dev/netif/ig_hal/e1000_82575.c

2695

u16 nvm_offset;

sys/dev/netif/ig_hal/e1000_82575.c

2738

u16 j;

sys/dev/netif/ig_hal/e1000_82575.c

2739

u16 nvm_offset;

sys/dev/netif/ig_hal/e1000_82575.c

2766

u16 j;

sys/dev/netif/ig_hal/e1000_82575.c

2767

u16 nvm_offset;

sys/dev/netif/ig_hal/e1000_82575.c

2789

static s32 __e1000_access_emi_reg(struct e1000_hw *hw, u16 address,

sys/dev/netif/ig_hal/e1000_82575.c

2790

u16 *data, bool read)

sys/dev/netif/ig_hal/e1000_82575.c

2814

s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data)

sys/dev/netif/ig_hal/e1000_82575.c

3077

u16 phy_data;

sys/dev/netif/ig_hal/e1000_82575.c

3159

u16 phy_data;

sys/dev/netif/ig_hal/e1000_82575.c

3276

u16 swfw_mask = 0;

sys/dev/netif/ig_hal/e1000_82575.c

333

u16 size;

sys/dev/netif/ig_hal/e1000_82575.c

3367

u16 swfw_mask = 0;

sys/dev/netif/ig_hal/e1000_82575.c

337

size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>

sys/dev/netif/ig_hal/e1000_82575.c

551

u16 mask = E1000_SWFW_PHY0_SM;

sys/dev/netif/ig_hal/e1000_82575.c

57

static s32 e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_82575.c

573

u16 mask = E1000_SWFW_PHY0_SM;

sys/dev/netif/ig_hal/e1000_82575.c

58

u16 *duplex);

sys/dev/netif/ig_hal/e1000_82575.c

597

u16 *data)

sys/dev/netif/ig_hal/e1000_82575.c

61

u16 *data);

sys/dev/netif/ig_hal/e1000_82575.c

630

u16 data)

sys/dev/netif/ig_hal/e1000_82575.c

65

u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_82575.c

664

u16 phy_id;

sys/dev/netif/ig_hal/e1000_82575.c

67

u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_82575.c

78

static s32 e1000_valid_led_default_82575(struct e1000_hw *hw, u16 *data);

sys/dev/netif/ig_hal/e1000_82575.c

80

u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_82575.c

814

u16 data;

sys/dev/netif/ig_hal/e1000_82575.c

82

static s32 e1000_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_82575.c

84

u16 *speed, u16 *duplex);

sys/dev/netif/ig_hal/e1000_82575.c

86

static void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_82575.c

99

u16 offset);

sys/dev/netif/ig_hal/e1000_82575.h

493

void e1000_vfta_set_vf(struct e1000_hw *, u16, bool);

sys/dev/netif/ig_hal/e1000_82575.h

494

void e1000_rlpml_set_vf(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_82575.h

497

u16 e1000_rxpbs_adjust_82580(u32 data);

sys/dev/netif/ig_hal/e1000_82575.h

498

s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data);

sys/dev/netif/ig_hal/e1000_api.c

1015

s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_api.c

1032

s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_api.c

1090

s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_api.c

1105

s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_api.c

1316

s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/netif/ig_hal/e1000_api.c

1334

s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/netif/ig_hal/e1000_api.c

661

s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length)

sys/dev/netif/ig_hal/e1000_api.c

722

s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex)

sys/dev/netif/ig_hal/e1000_api.c

942

s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, u16 length,

sys/dev/netif/ig_hal/e1000_api.c

943

u16 offset, u8 *sum)

sys/dev/netif/ig_hal/e1000_api.h

105

s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_api.h

106

s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_api.h

107

s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_api.h

108

s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_api.h

114

s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, u16 length,

sys/dev/netif/ig_hal/e1000_api.h

115

u16 offset, u8 *sum);

sys/dev/netif/ig_hal/e1000_api.h

118

s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);

sys/dev/netif/ig_hal/e1000_api.h

69

s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex);

sys/dev/netif/ig_hal/e1000_api.h

87

s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_api.h

88

s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_hw.h

1011

u16 eee_lp_ability;

sys/dev/netif/ig_hal/e1000_hw.h

1044

u16 device_id;

sys/dev/netif/ig_hal/e1000_hw.h

1045

u16 subsystem_vendor_id;

sys/dev/netif/ig_hal/e1000_hw.h

1046

u16 subsystem_device_id;

sys/dev/netif/ig_hal/e1000_hw.h

1047

u16 vendor_id;

sys/dev/netif/ig_hal/e1000_hw.h

1063

s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_hw.h

1064

s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_hw.h

1065

void e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_hw.h

1066

void e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_hw.h

406

#define __le16 u16

sys/dev/netif/ig_hal/e1000_hw.h

677

u16 vlan_id;

sys/dev/netif/ig_hal/e1000_hw.h

679

u16 reserved2;

sys/dev/netif/ig_hal/e1000_hw.h

702

u16 reserved1;

sys/dev/netif/ig_hal/e1000_hw.h

703

u16 reserved2;

sys/dev/netif/ig_hal/e1000_hw.h

704

u16 command_length;

sys/dev/netif/ig_hal/e1000_hw.h

731

s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);

sys/dev/netif/ig_hal/e1000_hw.h

748

s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_hw.h

749

void (*release_swfw_sync)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_hw.h

777

s32 (*set_page)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_hw.h

778

s32 (*read_reg)(struct e1000_hw *, u32, u16 *);

sys/dev/netif/ig_hal/e1000_hw.h

779

s32 (*read_reg_locked)(struct e1000_hw *, u32, u16 *);

sys/dev/netif/ig_hal/e1000_hw.h

780

s32 (*read_reg_page)(struct e1000_hw *, u32, u16 *);

sys/dev/netif/ig_hal/e1000_hw.h

785

s32 (*write_reg)(struct e1000_hw *, u32, u16);

sys/dev/netif/ig_hal/e1000_hw.h

786

s32 (*write_reg_locked)(struct e1000_hw *, u32, u16);

sys/dev/netif/ig_hal/e1000_hw.h

787

s32 (*write_reg_page)(struct e1000_hw *, u32, u16);

sys/dev/netif/ig_hal/e1000_hw.h

798

s32 (*read)(struct e1000_hw *, u16, u16, u16 *);

sys/dev/netif/ig_hal/e1000_hw.h

802

s32 (*valid_led_default)(struct e1000_hw *, u16 *);

sys/dev/netif/ig_hal/e1000_hw.h

804

s32 (*write)(struct e1000_hw *, u16, u16, u16 *);

sys/dev/netif/ig_hal/e1000_hw.h

822

u16 current_ifs_val;

sys/dev/netif/ig_hal/e1000_hw.h

823

u16 ifs_max_val;

sys/dev/netif/ig_hal/e1000_hw.h

824

u16 ifs_min_val;

sys/dev/netif/ig_hal/e1000_hw.h

825

u16 ifs_ratio;

sys/dev/netif/ig_hal/e1000_hw.h

826

u16 ifs_step_size;

sys/dev/netif/ig_hal/e1000_hw.h

827

u16 mta_reg_count;

sys/dev/netif/ig_hal/e1000_hw.h

828

u16 uta_reg_count;

sys/dev/netif/ig_hal/e1000_hw.h

833

u16 rar_entry_count;

sys/dev/netif/ig_hal/e1000_hw.h

870

u16 autoneg_advertised;

sys/dev/netif/ig_hal/e1000_hw.h

871

u16 autoneg_mask;

sys/dev/netif/ig_hal/e1000_hw.h

872

u16 cable_length;

sys/dev/netif/ig_hal/e1000_hw.h

873

u16 max_cable_length;

sys/dev/netif/ig_hal/e1000_hw.h

874

u16 min_cable_length;

sys/dev/netif/ig_hal/e1000_hw.h

893

u16 word_size;

sys/dev/netif/ig_hal/e1000_hw.h

894

u16 delay_usec;

sys/dev/netif/ig_hal/e1000_hw.h

895

u16 address_bits;

sys/dev/netif/ig_hal/e1000_hw.h

896

u16 opcode_bits;

sys/dev/netif/ig_hal/e1000_hw.h

897

u16 page_size;

sys/dev/netif/ig_hal/e1000_hw.h

905

u16 func;

sys/dev/netif/ig_hal/e1000_hw.h

906

u16 pci_cmd_word;

sys/dev/netif/ig_hal/e1000_hw.h

912

u16 pause_time; /* Flow control pause timer */

sys/dev/netif/ig_hal/e1000_hw.h

913

u16 refresh_time; /* Flow control refresh timer */

sys/dev/netif/ig_hal/e1000_hw.h

923

u16 spd_default;

sys/dev/netif/ig_hal/e1000_hw.h

947

u16 value;

sys/dev/netif/ig_hal/e1000_hw.h

962

s32 (*read)(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_hw.h

963

s32 (*write)(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_hw.h

964

s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_hw.h

965

s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_hw.h

966

s32 (*check_for_msg)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_hw.h

967

s32 (*check_for_ack)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_hw.h

968

s32 (*check_for_rst)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_hw.h

985

u16 size;

sys/dev/netif/ig_hal/e1000_i210.c

140

void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_i210.c

235

s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_i210.c

236

u16 *data)

sys/dev/netif/ig_hal/e1000_i210.c

239

u16 i, count;

sys/dev/netif/ig_hal/e1000_i210.c

280

s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_i210.c

281

u16 *data)

sys/dev/netif/ig_hal/e1000_i210.c

284

u16 i, count;

sys/dev/netif/ig_hal/e1000_i210.c

321

static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_i210.c

322

u16 *data)

sys/dev/netif/ig_hal/e1000_i210.c

376

static s32 e1000_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)

sys/dev/netif/ig_hal/e1000_i210.c

380

u16 i;

sys/dev/netif/ig_hal/e1000_i210.c

41

static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_i210.c

418

static s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_i210.c

419

u16 E1000_UNUSEDARG words, u16 *data)

sys/dev/netif/ig_hal/e1000_i210.c

42

u16 *data);

sys/dev/netif/ig_hal/e1000_i210.c

44

static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data);

sys/dev/netif/ig_hal/e1000_i210.c

509

u16 version = 0;

sys/dev/netif/ig_hal/e1000_i210.c

600

s32 (*read_op_ptr)(struct e1000_hw *, u16, u16, u16 *);

sys/dev/netif/ig_hal/e1000_i210.c

639

u16 checksum = 0;

sys/dev/netif/ig_hal/e1000_i210.c

640

u16 i, nvm_data;

sys/dev/netif/ig_hal/e1000_i210.c

671

checksum = (u16) NVM_SUM - checksum;

sys/dev/netif/ig_hal/e1000_i210.c

820

static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data)

sys/dev/netif/ig_hal/e1000_i210.c

855

static s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,

sys/dev/netif/ig_hal/e1000_i210.c

856

u8 dev_addr, u16 *data, bool read)

sys/dev/netif/ig_hal/e1000_i210.c

88

s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask)

sys/dev/netif/ig_hal/e1000_i210.c

897

s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)

sys/dev/netif/ig_hal/e1000_i210.c

911

s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)

sys/dev/netif/ig_hal/e1000_i210.c

929

u16 nvm_word, phy_word, pci_word, tmp_nvm;

sys/dev/netif/ig_hal/e1000_i210.h

42

s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_i210.h

43

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_i210.h

44

s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_i210.h

45

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_i210.h

48

s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_i210.h

49

void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);

sys/dev/netif/ig_hal/e1000_i210.h

50

s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,

sys/dev/netif/ig_hal/e1000_i210.h

51

u16 *data);

sys/dev/netif/ig_hal/e1000_i210.h

52

s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,

sys/dev/netif/ig_hal/e1000_i210.h

53

u16 data);

sys/dev/netif/ig_hal/e1000_i210.h

64

(u16)(((invm_dword) & 0xFFFF0000) >> 16)

sys/dev/netif/ig_hal/e1000_ich8lan.c

1011

u16 reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

103

u16 *data);

sys/dev/netif/ig_hal/e1000_ich8lan.c

1085

static u64 e1000_ltr2ns(u16 ltr)

sys/dev/netif/ig_hal/e1000_ich8lan.c

1119

u16 lat_enc = 0; /* latency encoded */

sys/dev/netif/ig_hal/e1000_ich8lan.c

112

u16 *speed, u16 *duplex);

sys/dev/netif/ig_hal/e1000_ich8lan.c

1125

u16 speed, duplex, scale = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1126

u16 max_snoop, max_nosnoop;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1127

u16 max_ltr_enc; /* max LTR latency encoded */

sys/dev/netif/ig_hal/e1000_ich8lan.c

1170

lat_enc = (u16)((scale << E1000_LTRV_SCALE_SHIFT) | value);

sys/dev/netif/ig_hal/e1000_ich8lan.c

1261

u16 phy_reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1262

u16 oem_reg = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

128

u8 size, u16 *data);

sys/dev/netif/ig_hal/e1000_ich8lan.c

138

u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_ich8lan.c

1408

u16 phy_reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

153

u16 flcdone:1; /* bit 0 Flash Cycle Done */

sys/dev/netif/ig_hal/e1000_ich8lan.c

154

u16 flcerr:1; /* bit 1 Flash Cycle Error */

sys/dev/netif/ig_hal/e1000_ich8lan.c

155

u16 dael:1; /* bit 2 Direct Access error Log */

sys/dev/netif/ig_hal/e1000_ich8lan.c

1550

u16 emi_addr, emi_val = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1552

u16 phy_reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

156

u16 berasesz:2; /* bit 4:3 Sector Erase Size */

sys/dev/netif/ig_hal/e1000_ich8lan.c

157

u16 flcinprog:1; /* bit 5 flash cycle in Progress */

sys/dev/netif/ig_hal/e1000_ich8lan.c

158

u16 reserved1:2; /* bit 13:6 Reserved */

sys/dev/netif/ig_hal/e1000_ich8lan.c

1583

u16 speed, duplex;

sys/dev/netif/ig_hal/e1000_ich8lan.c

159

u16 reserved2:6; /* bit 13:6 Reserved */

sys/dev/netif/ig_hal/e1000_ich8lan.c

160

u16 fldesvalid:1; /* bit 14 Flash Descriptor Valid */

sys/dev/netif/ig_hal/e1000_ich8lan.c

161

u16 flockdn:1; /* bit 15 Flash Config Lock-Down */

sys/dev/netif/ig_hal/e1000_ich8lan.c

163

u16 regval;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1644

u16 data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

1645

u16 ptr_gap;

sys/dev/netif/ig_hal/e1000_ich8lan.c

170

u16 flcgo:1; /* 0 Flash Cycle Go */

sys/dev/netif/ig_hal/e1000_ich8lan.c

171

u16 flcycle:2; /* 2:1 Flash Cycle */

sys/dev/netif/ig_hal/e1000_ich8lan.c

172

u16 reserved:5; /* 7:3 Reserved */

sys/dev/netif/ig_hal/e1000_ich8lan.c

173

u16 fldbcount:2; /* 9:8 Flash Data Byte Count */

sys/dev/netif/ig_hal/e1000_ich8lan.c

174

u16 flockdn:6; /* 15:10 Reserved */

sys/dev/netif/ig_hal/e1000_ich8lan.c

176

u16 regval;

sys/dev/netif/ig_hal/e1000_ich8lan.c

187

u16 regval;

sys/dev/netif/ig_hal/e1000_ich8lan.c

202

u16 phy_reg = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

205

u16 retry_count;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2153

u16 phy_reg = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2171

(u16)(hw->mac.mta_shadow[i] &

sys/dev/netif/ig_hal/e1000_ich8lan.c

2174

(u16)((hw->mac.mta_shadow[i] >> 16) &

sys/dev/netif/ig_hal/e1000_ich8lan.c

2221

u16 phy_data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2265

u16 word_addr, reg_data, reg_addr, phy_page = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2336

(u16)data);

sys/dev/netif/ig_hal/e1000_ich8lan.c

2344

word_addr = (u16)(cnf_base_addr << 1);

sys/dev/netif/ig_hal/e1000_ich8lan.c

2390

u16 status_reg = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2475

u16 kmrn_reg = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2526

u16 oem_reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2592

u16 data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2615

u16 phy_data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2700

u16 i, phy_reg = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2716

(u16)(mac_reg & 0xFFFF));

sys/dev/netif/ig_hal/e1000_ich8lan.c

2718

(u16)((mac_reg >> 16) & 0xFFFF));

sys/dev/netif/ig_hal/e1000_ich8lan.c

2722

(u16)(mac_reg & 0xFFFF));

sys/dev/netif/ig_hal/e1000_ich8lan.c

2724

(u16)((mac_reg & E1000_RAH_AV)

sys/dev/netif/ig_hal/e1000_ich8lan.c

2761

u16 phy_reg, data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2763

u16 i;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2971

u16 status_reg = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

298

u16 count = 20;

sys/dev/netif/ig_hal/e1000_ich8lan.c

2987

u16 pm_phy_reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3078

u16 reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3180

u16 oem_reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3216

u16 data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3312

u16 data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3400

u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);

sys/dev/netif/ig_hal/e1000_ich8lan.c

3499

static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_ich8lan.c

3500

u16 *data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

3508

u16 offset_to_read;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3509

u16 i;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3548

data[i] = (u16)(dword & 0xFFFF);

sys/dev/netif/ig_hal/e1000_ich8lan.c

3550

data[i] = (u16)((dword >> 16) & 0xFFFF);

sys/dev/netif/ig_hal/e1000_ich8lan.c

3567

data[i] = (u16)(dword & 0xFFFF);

sys/dev/netif/ig_hal/e1000_ich8lan.c

3572

data[i + 1] = (u16)(dword >> 16 & 0xFFFF);

sys/dev/netif/ig_hal/e1000_ich8lan.c

3594

static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_ich8lan.c

3595

u16 *data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

3602

u16 i, word;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3808

u16 *data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

3833

u16 word = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

3861

u8 size, u16 *data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

3904

*data = (u16)(flash_data & 0x0000FFFF);

sys/dev/netif/ig_hal/e1000_ich8lan.c

4014

static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_ich8lan.c

4015

u16 *data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

4019

u16 i;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4220

u16 data = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4367

u16 data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4368

u16 word;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4369

u16 valid_csum_mask;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4418

u8 size, u16 data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

4606

u16 word = (u16)data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4626

u16 program_retries;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4663

u16 program_retries;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4813

static s32 e1000_valid_led_default_ich8lan(struct e1000_hw *hw, u16 *data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

4850

u16 data, i, temp, shift;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4942

u16 kum_cfg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

4945

u16 pci_cfg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5080

u16 i;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5301

u16 reg_data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5417

static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_ich8lan.c

5418

u16 *duplex)

sys/dev/netif/ig_hal/e1000_ich8lan.c

545

u16 i = 0;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5457

u16 i, data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5544

u16 data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5598

u16 reg_data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5647

u16 phy_reg, device_id = hw->device_id;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5665

u16 eee_advert;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5789

u16 phy_reg;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5898

(u16)hw->mac.ledctl_mode1);

sys/dev/netif/ig_hal/e1000_ich8lan.c

5912

(u16)hw->mac.ledctl_default);

sys/dev/netif/ig_hal/e1000_ich8lan.c

5923

u16 data = (u16)hw->mac.ledctl_mode2;

sys/dev/netif/ig_hal/e1000_ich8lan.c

5955

u16 data = (u16)hw->mac.ledctl_mode1;

sys/dev/netif/ig_hal/e1000_ich8lan.c

6066

u16 phy_data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

638

u16 i;

sys/dev/netif/ig_hal/e1000_ich8lan.c

658

nvm->flash_bank_size /= sizeof(u16);

sys/dev/netif/ig_hal/e1000_ich8lan.c

688

nvm->flash_bank_size /= sizeof(u16);

sys/dev/netif/ig_hal/e1000_ich8lan.c

840

static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address,

sys/dev/netif/ig_hal/e1000_ich8lan.c

841

u16 *data, bool read)

sys/dev/netif/ig_hal/e1000_ich8lan.c

869

s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

884

s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data)

sys/dev/netif/ig_hal/e1000_ich8lan.c

909

u16 lpa, pcs_status, adv, adv_addr, lpi_ctrl, data;

sys/dev/netif/ig_hal/e1000_ich8lan.c

93

static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_ich8lan.c

94

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_ich8lan.c

95

static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_ich8lan.c

96

u16 *data);

sys/dev/netif/ig_hal/e1000_ich8lan.c

97

static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_ich8lan.c

98

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_ich8lan.h

342

s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data);

sys/dev/netif/ig_hal/e1000_ich8lan.h

343

s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data);

sys/dev/netif/ig_hal/e1000_mac.c

110

u16 E1000_UNUSEDARG *s, u16 E1000_UNUSEDARG *d)

sys/dev/netif/ig_hal/e1000_mac.c

1362

u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg;

sys/dev/netif/ig_hal/e1000_mac.c

1363

u16 speed, duplex;

sys/dev/netif/ig_hal/e1000_mac.c

1665

s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_mac.c

1666

u16 *duplex)

sys/dev/netif/ig_hal/e1000_mac.c

1705

u16 *speed, u16 *duplex)

sys/dev/netif/ig_hal/e1000_mac.c

1820

s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data)

sys/dev/netif/ig_hal/e1000_mac.c

1850

u16 data, i, temp;

sys/dev/netif/ig_hal/e1000_mac.c

1851

const u16 led_mask = 0x0F;

sys/dev/netif/ig_hal/e1000_mac.c

244

u16 pcie_link_status;

sys/dev/netif/ig_hal/e1000_mac.c

306

u16 pci_header_type;

sys/dev/netif/ig_hal/e1000_mac.c

377

void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count)

sys/dev/netif/ig_hal/e1000_mac.c

411

u16 offset, nvm_alt_mac_addr_offset, nvm_data;

sys/dev/netif/ig_hal/e1000_mac.c

579

(((u16) mc_addr[5]) << bit_shift)));

sys/dev/netif/ig_hal/e1000_mac.c

632

u16 cmd_mmrbc;

sys/dev/netif/ig_hal/e1000_mac.c

633

u16 pcix_cmd;

sys/dev/netif/ig_hal/e1000_mac.c

634

u16 pcix_stat_hi_word;

sys/dev/netif/ig_hal/e1000_mac.c

635

u16 stat_mmrbc;

sys/dev/netif/ig_hal/e1000_mac.c

956

u16 nvm_data;

sys/dev/netif/ig_hal/e1000_mac.c

957

u16 nvm_offset = 0;

sys/dev/netif/ig_hal/e1000_mac.h

42

s32 e1000_null_link_info(struct e1000_hw *hw, u16 *s, u16 *d);

sys/dev/netif/ig_hal/e1000_mac.h

64

s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_mac.h

65

u16 *duplex);

sys/dev/netif/ig_hal/e1000_mac.h

67

u16 *speed, u16 *duplex);

sys/dev/netif/ig_hal/e1000_mac.h

87

void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count);

sys/dev/netif/ig_hal/e1000_manage.c

194

u16 i, length = sizeof(struct e1000_host_mng_command_header);

sys/dev/netif/ig_hal/e1000_manage.c

226

u16 length, u16 offset, u8 *sum)

sys/dev/netif/ig_hal/e1000_manage.c

231

u16 remaining, i, j, prev_bytes;

sys/dev/netif/ig_hal/e1000_manage.c

298

u16 length)

sys/dev/netif/ig_hal/e1000_manage.c

367

u16 data;

sys/dev/netif/ig_hal/e1000_manage.h

42

u16 length, u16 offset, u8 *sum);

sys/dev/netif/ig_hal/e1000_manage.h

46

u8 *buffer, u16 length);

sys/dev/netif/ig_hal/e1000_mbx.c

121

s32 e1000_check_for_msg(struct e1000_hw *hw, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

141

s32 e1000_check_for_ack(struct e1000_hw *hw, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

161

s32 e1000_check_for_rst(struct e1000_hw *hw, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

181

static s32 e1000_poll_for_msg(struct e1000_hw *hw, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

212

static s32 e1000_poll_for_ack(struct e1000_hw *hw, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

246

s32 e1000_read_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

275

s32 e1000_write_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

361

u16 E1000_UNUSEDARG mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

383

u16 E1000_UNUSEDARG mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

405

u16 E1000_UNUSEDARG mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

42

u16 E1000_UNUSEDARG mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

457

static s32 e1000_write_mbx_vf(struct e1000_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ig_hal/e1000_mbx.c

458

u16 E1000_UNUSEDARG mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

461

u16 i;

sys/dev/netif/ig_hal/e1000_mbx.c

498

static s32 e1000_read_mbx_vf(struct e1000_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ig_hal/e1000_mbx.c

499

u16 E1000_UNUSEDARG mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

502

u16 i;

sys/dev/netif/ig_hal/e1000_mbx.c

55

u16 E1000_UNUSEDARG size,

sys/dev/netif/ig_hal/e1000_mbx.c

56

u16 E1000_UNUSEDARG mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

579

static s32 e1000_check_for_msg_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/netif/ig_hal/e1000_mbx.c

600

static s32 e1000_check_for_ack_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/netif/ig_hal/e1000_mbx.c

621

static s32 e1000_check_for_rst_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/netif/ig_hal/e1000_mbx.c

644

static s32 e1000_obtain_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/netif/ig_hal/e1000_mbx.c

679

static s32 e1000_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ig_hal/e1000_mbx.c

680

u16 vf_number)

sys/dev/netif/ig_hal/e1000_mbx.c

683

u16 i;

sys/dev/netif/ig_hal/e1000_mbx.c

72

s32 e1000_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.c

722

static s32 e1000_read_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ig_hal/e1000_mbx.c

723

u16 vf_number)

sys/dev/netif/ig_hal/e1000_mbx.c

726

u16 i;

sys/dev/netif/ig_hal/e1000_mbx.c

98

s32 e1000_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/netif/ig_hal/e1000_mbx.h

100

s32 e1000_check_for_ack(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_mbx.h

101

s32 e1000_check_for_rst(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_mbx.h

95

s32 e1000_read_mbx(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_mbx.h

96

s32 e1000_write_mbx(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_mbx.h

97

s32 e1000_read_posted_mbx(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_mbx.h

98

s32 e1000_write_posted_mbx(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_mbx.h

99

s32 e1000_check_for_msg(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_nvm.c

1001

pba_block_size * sizeof(u16));

sys/dev/netif/ig_hal/e1000_nvm.c

1022

s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ig_hal/e1000_nvm.c

1059

pba->pba_block[0] * sizeof(u16));

sys/dev/netif/ig_hal/e1000_nvm.c

107

u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,

sys/dev/netif/ig_hal/e1000_nvm.c

108

u16 E1000_UNUSEDARG *c)

sys/dev/netif/ig_hal/e1000_nvm.c

1081

s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ig_hal/e1000_nvm.c

1082

u32 eeprom_buf_size, u16 *pba_block_size)

sys/dev/netif/ig_hal/e1000_nvm.c

1085

u16 pba_word[2];

sys/dev/netif/ig_hal/e1000_nvm.c

1086

u16 length;

sys/dev/netif/ig_hal/e1000_nvm.c

1141

u16 i;

sys/dev/netif/ig_hal/e1000_nvm.c

1168

u16 checksum = 0;

sys/dev/netif/ig_hal/e1000_nvm.c

1169

u16 i, nvm_data;

sys/dev/netif/ig_hal/e1000_nvm.c

1182

if (checksum != (u16) NVM_SUM) {

sys/dev/netif/ig_hal/e1000_nvm.c

1201

u16 checksum = 0;

sys/dev/netif/ig_hal/e1000_nvm.c

1202

u16 i, nvm_data;

sys/dev/netif/ig_hal/e1000_nvm.c

1214

checksum = (u16) NVM_SUM - checksum;

sys/dev/netif/ig_hal/e1000_nvm.c

1251

u16 eeprom_verh, eeprom_verl, etrack_test, fw_version;

sys/dev/netif/ig_hal/e1000_nvm.c

1253

u16 comb_verh, comb_verl, comb_offset;

sys/dev/netif/ig_hal/e1000_nvm.c

154

static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)

sys/dev/netif/ig_hal/e1000_nvm.c

201

static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)

sys/dev/netif/ig_hal/e1000_nvm.c

205

u16 data;

sys/dev/netif/ig_hal/e1000_nvm.c

404

u16 timeout = NVM_MAX_RETRY_SPI;

sys/dev/netif/ig_hal/e1000_nvm.c

447

s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/netif/ig_hal/e1000_nvm.c

452

u16 word_in;

sys/dev/netif/ig_hal/e1000_nvm.c

481

e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);

sys/dev/netif/ig_hal/e1000_nvm.c

507

s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_nvm.c

508

u16 *data)

sys/dev/netif/ig_hal/e1000_nvm.c

537

e1000_shift_out_eec_bits(hw, (u16)(offset + i),

sys/dev/netif/ig_hal/e1000_nvm.c

562

s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/netif/ig_hal/e1000_nvm.c

610

s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/netif/ig_hal/e1000_nvm.c

614

u16 widx = 0;

sys/dev/netif/ig_hal/e1000_nvm.c

656

e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),

sys/dev/netif/ig_hal/e1000_nvm.c

661

u16 word_out = data[widx];

sys/dev/netif/ig_hal/e1000_nvm.c

690

s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_nvm.c

691

u16 *data)

sys/dev/netif/ig_hal/e1000_nvm.c

696

u16 words_written = 0;

sys/dev/netif/ig_hal/e1000_nvm.c

697

u16 widx = 0;

sys/dev/netif/ig_hal/e1000_nvm.c

70

u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,

sys/dev/netif/ig_hal/e1000_nvm.c

71

u16 E1000_UNUSEDARG *c)

sys/dev/netif/ig_hal/e1000_nvm.c

719

(u16)(nvm->opcode_bits + 2));

sys/dev/netif/ig_hal/e1000_nvm.c

721

e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));

sys/dev/netif/ig_hal/e1000_nvm.c

729

e1000_shift_out_eec_bits(hw, (u16)(offset + words_written),

sys/dev/netif/ig_hal/e1000_nvm.c

755

(u16)(nvm->opcode_bits + 2));

sys/dev/netif/ig_hal/e1000_nvm.c

757

e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));

sys/dev/netif/ig_hal/e1000_nvm.c

778

u16 nvm_data;

sys/dev/netif/ig_hal/e1000_nvm.c

779

u16 pba_ptr;

sys/dev/netif/ig_hal/e1000_nvm.c

780

u16 offset;

sys/dev/netif/ig_hal/e1000_nvm.c

781

u16 length;

sys/dev/netif/ig_hal/e1000_nvm.c

892

u16 nvm_data;

sys/dev/netif/ig_hal/e1000_nvm.c

893

u16 pba_ptr;

sys/dev/netif/ig_hal/e1000_nvm.c

894

u16 length;

sys/dev/netif/ig_hal/e1000_nvm.c

93

u16 E1000_UNUSEDARG *data)

sys/dev/netif/ig_hal/e1000_nvm.c

953

s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ig_hal/e1000_nvm.c

954

u32 eeprom_buf_size, u16 max_pba_block_size,

sys/dev/netif/ig_hal/e1000_nvm.c

958

u16 pba_block_size;

sys/dev/netif/ig_hal/e1000_nvm.h

39

u16 word[2];

sys/dev/netif/ig_hal/e1000_nvm.h

40

u16 *pba_block;

sys/dev/netif/ig_hal/e1000_nvm.h

45

u16 eep_major;

sys/dev/netif/ig_hal/e1000_nvm.h

46

u16 eep_minor;

sys/dev/netif/ig_hal/e1000_nvm.h

47

u16 eep_build;

sys/dev/netif/ig_hal/e1000_nvm.h

54

u16 or_major;

sys/dev/netif/ig_hal/e1000_nvm.h

55

u16 or_build;

sys/dev/netif/ig_hal/e1000_nvm.h

56

u16 or_patch;

sys/dev/netif/ig_hal/e1000_nvm.h

61

s32 e1000_null_read_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);

sys/dev/netif/ig_hal/e1000_nvm.h

63

s32 e1000_null_led_default(struct e1000_hw *hw, u16 *data);

sys/dev/netif/ig_hal/e1000_nvm.h

64

s32 e1000_null_write_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);

sys/dev/netif/ig_hal/e1000_nvm.h

72

s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ig_hal/e1000_nvm.h

73

u32 eeprom_buf_size, u16 max_pba_block_size,

sys/dev/netif/ig_hal/e1000_nvm.h

75

s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ig_hal/e1000_nvm.h

77

s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ig_hal/e1000_nvm.h

78

u32 eeprom_buf_size, u16 *pba_block_size);

sys/dev/netif/ig_hal/e1000_nvm.h

79

s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_nvm.h

80

s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_nvm.h

81

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_nvm.h

82

s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_nvm.h

83

u16 *data);

sys/dev/netif/ig_hal/e1000_nvm.h

84

s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data);

sys/dev/netif/ig_hal/e1000_nvm.h

86

s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset,

sys/dev/netif/ig_hal/e1000_nvm.h

87

u16 words, u16 *data);

sys/dev/netif/ig_hal/e1000_nvm.h

88

s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/netif/ig_hal/e1000_nvm.h

89

u16 *data);

sys/dev/netif/ig_hal/e1000_osdep.h

79

#define __le16 u16

sys/dev/netif/ig_hal/e1000_phy.c

1003

s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

1017

u16 phy_data;

sys/dev/netif/ig_hal/e1000_phy.c

1057

u16 phy_data;

sys/dev/netif/ig_hal/e1000_phy.c

109

u16 E1000_UNUSEDARG data)

sys/dev/netif/ig_hal/e1000_phy.c

1122

u16 phy_data;

sys/dev/netif/ig_hal/e1000_phy.c

122

u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data)

sys/dev/netif/ig_hal/e1000_phy.c

1274

u16 phy_data;

sys/dev/netif/ig_hal/e1000_phy.c

1370

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

1480

u16 mii_autoneg_adv_reg;

sys/dev/netif/ig_hal/e1000_phy.c

1481

u16 mii_1000t_ctrl_reg = 0;

sys/dev/netif/ig_hal/e1000_phy.c

157

u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data)

sys/dev/netif/ig_hal/e1000_phy.c

1633

u16 phy_ctrl;

sys/dev/netif/ig_hal/e1000_phy.c

1750

u16 phy_data;

sys/dev/netif/ig_hal/e1000_phy.c

1816

u16 phy_data;

sys/dev/netif/ig_hal/e1000_phy.c

1955

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

2019

void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl)

sys/dev/netif/ig_hal/e1000_phy.c

2086

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

2170

u16 phy_data, offset, mask;

sys/dev/netif/ig_hal/e1000_phy.c

2215

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

2242

u16 data, offset, mask;

sys/dev/netif/ig_hal/e1000_phy.c

228

u16 phy_id;

sys/dev/netif/ig_hal/e1000_phy.c

2285

u16 phy_data, offset, mask;

sys/dev/netif/ig_hal/e1000_phy.c

229

u16 retry_count = 0;

sys/dev/netif/ig_hal/e1000_phy.c

2319

u16 i, phy_status;

sys/dev/netif/ig_hal/e1000_phy.c

2358

u16 i, phy_status;

sys/dev/netif/ig_hal/e1000_phy.c

2416

u16 phy_data, index;

sys/dev/netif/ig_hal/e1000_phy.c

2442

u16 phy_data, phy_data2, is_cm;

sys/dev/netif/ig_hal/e1000_phy.c

2443

u16 index, default_page;

sys/dev/netif/ig_hal/e1000_phy.c

2565

u16 phy_data, i, agc_value = 0;

sys/dev/netif/ig_hal/e1000_phy.c

2566

u16 cur_agc_index, max_agc_index = 0;

sys/dev/netif/ig_hal/e1000_phy.c

2567

u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1;

sys/dev/netif/ig_hal/e1000_phy.c

2568

static const u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] = {

sys/dev/netif/ig_hal/e1000_phy.c

2635

u16 phy_data;

sys/dev/netif/ig_hal/e1000_phy.c

2710

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

2772

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

2826

u16 phy_ctrl;

sys/dev/netif/ig_hal/e1000_phy.c

290

s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

3118

s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

3178

s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

3237

s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

3240

u16 page = (u16)(offset >> IGP_PAGE_SHIFT);

sys/dev/netif/ig_hal/e1000_phy.c

3282

s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

3285

u16 page = (u16)(offset >> IGP_PAGE_SHIFT);

sys/dev/netif/ig_hal/e1000_phy.c

3327

s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg)

sys/dev/netif/ig_hal/e1000_phy.c

3330

u16 temp;

sys/dev/netif/ig_hal/e1000_phy.c

336

*data = (u16) mdic;

sys/dev/netif/ig_hal/e1000_phy.c

3385

s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg)

sys/dev/netif/ig_hal/e1000_phy.c

3436

u16 *data, bool read, bool page_set)

sys/dev/netif/ig_hal/e1000_phy.c

3439

u16 reg = BM_PHY_REG_NUM(offset);

sys/dev/netif/ig_hal/e1000_phy.c

3440

u16 page = BM_PHY_REG_PAGE(offset);

sys/dev/netif/ig_hal/e1000_phy.c

3441

u16 phy_reg = 0;

sys/dev/netif/ig_hal/e1000_phy.c

3500

u16 mii_reg = 0;

sys/dev/netif/ig_hal/e1000_phy.c

3518

u16 mii_reg = 0;

sys/dev/netif/ig_hal/e1000_phy.c

3539

static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,

sys/dev/netif/ig_hal/e1000_phy.c

3543

u16 page = BM_PHY_REG_PAGE(offset);

sys/dev/netif/ig_hal/e1000_phy.c

3544

u16 reg = BM_PHY_REG_NUM(offset);

sys/dev/netif/ig_hal/e1000_phy.c

355

s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

3605

s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

3619

s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

3633

s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

3649

static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,

sys/dev/netif/ig_hal/e1000_phy.c

3653

u16 page = BM_PHY_REG_PAGE(offset);

sys/dev/netif/ig_hal/e1000_phy.c

3654

u16 reg = BM_PHY_REG_NUM(offset);

sys/dev/netif/ig_hal/e1000_phy.c

3689

u16 data2 = 0x7EFF;

sys/dev/netif/ig_hal/e1000_phy.c

3731

s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

3745

s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

3759

s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

3791

u16 *data, bool read)

sys/dev/netif/ig_hal/e1000_phy.c

3808

ret_val = e1000_write_phy_reg_mdic(hw, addr_reg, (u16)offset & 0x3F);

sys/dev/netif/ig_hal/e1000_phy.c

3840

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

3889

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

39

u16 *data, bool read, bool page_set);

sys/dev/netif/ig_hal/e1000_phy.c

3913

u16 phy_data;

sys/dev/netif/ig_hal/e1000_phy.c

3962

u16 data;

sys/dev/netif/ig_hal/e1000_phy.c

4025

u16 phy_data, length;

sys/dev/netif/ig_hal/e1000_phy.c

4053

s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

4056

u16 page = offset >> GS40G_PAGE_SHIFT;

sys/dev/netif/ig_hal/e1000_phy.c

4085

s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

4088

u16 page = offset >> GS40G_PAGE_SHIFT;

sys/dev/netif/ig_hal/e1000_phy.c

42

u16 *data, bool read);

sys/dev/netif/ig_hal/e1000_phy.c

421

s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

4241

u16 retry_count = 0;

sys/dev/netif/ig_hal/e1000_phy.c

45

static const u16 e1000_m88_cable_length_table[] = {

sys/dev/netif/ig_hal/e1000_phy.c

468

s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

472

u16 phy_data_swapped;

sys/dev/netif/ig_hal/e1000_phy.c

51

static const u16 e1000_igp_2_cable_length_table[] = {

sys/dev/netif/ig_hal/e1000_phy.c

529

s32 e1000_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data)

sys/dev/netif/ig_hal/e1000_phy.c

584

s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data)

sys/dev/netif/ig_hal/e1000_phy.c

654

s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

684

s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

714

s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page)

sys/dev/netif/ig_hal/e1000_phy.c

736

static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,

sys/dev/netif/ig_hal/e1000_phy.c

755

(u16)offset);

sys/dev/netif/ig_hal/e1000_phy.c

776

s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

790

s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

805

static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,

sys/dev/netif/ig_hal/e1000_phy.c

824

(u16)offset);

sys/dev/netif/ig_hal/e1000_phy.c

844

s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

858

s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.c

874

static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,

sys/dev/netif/ig_hal/e1000_phy.c

900

*data = (u16)kmrnctrlsta;

sys/dev/netif/ig_hal/e1000_phy.c

918

s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

933

s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/netif/ig_hal/e1000_phy.c

949

static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,

sys/dev/netif/ig_hal/e1000_phy.c

989

s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/netif/ig_hal/e1000_phy.h

100

s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

101

s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

102

s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

103

s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

104

s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

105

s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

106

s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

108

s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

109

s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

110

s32 e1000_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data);

sys/dev/netif/ig_hal/e1000_phy.h

111

s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data);

sys/dev/netif/ig_hal/e1000_phy.h

117

s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

118

s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

154

((u16)(((offset) >> PHY_PAGE_SHIFT) & 0xFFFF))

sys/dev/netif/ig_hal/e1000_phy.h

156

((u16)(((offset) & MAX_PHY_REG_ADDRESS) |\

sys/dev/netif/ig_hal/e1000_phy.h

39

s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

42

s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

43

s32 e1000_null_set_page(struct e1000_hw *hw, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

70

void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);

sys/dev/netif/ig_hal/e1000_phy.h

73

s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

74

s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

75

s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page);

sys/dev/netif/ig_hal/e1000_phy.h

76

s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

77

s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

78

s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

81

s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

82

s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

83

s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

84

s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

85

s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

91

s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

92

s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

93

s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg);

sys/dev/netif/ig_hal/e1000_phy.h

94

s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg);

sys/dev/netif/ig_hal/e1000_phy.h

95

s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_phy.h

96

s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/netif/ig_hal/e1000_phy.h

99

s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/netif/ig_hal/e1000_vf.c

221

static s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_vf.c

222

u16 *duplex)

sys/dev/netif/ig_hal/e1000_vf.c

375

(((u16) mc_addr[5]) << bit_shift)));

sys/dev/netif/ig_hal/e1000_vf.c

381

u32 *msg, u16 size)

sys/dev/netif/ig_hal/e1000_vf.c

404

u16 *hash_list = (u16 *)&msgbuf[1];

sys/dev/netif/ig_hal/e1000_vf.c

445

void e1000_vfta_set_vf(struct e1000_hw *hw, u16 vid, bool set)

sys/dev/netif/ig_hal/e1000_vf.c

462

void e1000_rlpml_set_vf(struct e1000_hw *hw, u16 max_size)

sys/dev/netif/ig_hal/e1000_vf.c

47

static s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,

sys/dev/netif/ig_hal/e1000_vf.c

48

u16 *duplex);

sys/dev/netif/ig_hal/e1000_vf.h

103

u16 ip_id; /* IP id */

sys/dev/netif/ig_hal/e1000_vf.h

104

u16 csum; /* Packet Checksum */

sys/dev/netif/ig_hal/e1000_vf.h

110

u16 length; /* Packet length */

sys/dev/netif/ig_hal/e1000_vf.h

111

u16 vlan; /* VLAN tag */

sys/dev/netif/ig_hal/e1000_vf.h

205

s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);

sys/dev/netif/ig_hal/e1000_vf.h

222

u16 mta_reg_count;

sys/dev/netif/ig_hal/e1000_vf.h

223

u16 rar_entry_count;

sys/dev/netif/ig_hal/e1000_vf.h

230

s32 (*read)(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_vf.h

231

s32 (*write)(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_vf.h

232

s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_vf.h

233

s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);

sys/dev/netif/ig_hal/e1000_vf.h

234

s32 (*check_for_msg)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_vf.h

235

s32 (*check_for_ack)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_vf.h

236

s32 (*check_for_rst)(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_vf.h

253

u16 size;

sys/dev/netif/ig_hal/e1000_vf.h

275

u16 device_id;

sys/dev/netif/ig_hal/e1000_vf.h

276

u16 subsystem_vendor_id;

sys/dev/netif/ig_hal/e1000_vf.h

277

u16 subsystem_device_id;

sys/dev/netif/ig_hal/e1000_vf.h

278

u16 vendor_id;

sys/dev/netif/ig_hal/e1000_vf.h

292

s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/netif/ig_hal/e1000_vf.h

293

void e1000_vfta_set_vf(struct e1000_hw *, u16, bool);

sys/dev/netif/ig_hal/e1000_vf.h

294

void e1000_rlpml_set_vf(struct e1000_hw *, u16);

sys/dev/netif/ig_hal/e1000_vf.h

95

u16 pkt_info;

sys/dev/netif/ig_hal/e1000_vf.h

97

u16 hdr_info;

sys/dev/netif/ix/ixgbe_82598.c

1130

u16 sfp_addr = 0;

sys/dev/netif/ix/ixgbe_82598.c

1131

u16 sfp_data = 0;

sys/dev/netif/ix/ixgbe_82598.c

1132

u16 sfp_stat = 0;

sys/dev/netif/ix/ixgbe_82598.c

1133

u16 gssr;

sys/dev/netif/ix/ixgbe_82598.c

1233

u16 ext_ability = 0;

sys/dev/netif/ix/ixgbe_82598.c

1334

u16 pci_gen = 0;

sys/dev/netif/ix/ixgbe_82598.c

1335

u16 pci_ctrl2 = 0;

sys/dev/netif/ix/ixgbe_82598.c

196

u16 list_offset, data_offset;

sys/dev/netif/ix/ixgbe_82598.c

608

u16 an_reg;

sys/dev/netif/ix/ixgbe_82598.c

648

u16 link_reg, adapt_comp_reg;

sys/dev/netif/ix/ixgbe_82598.c

83

u16 pcie_devctl2;

sys/dev/netif/ix/ixgbe_82599.c

1696

IXGBE_NTOHS(((u16)(_value) >> 8) | ((u16)(_value) << 8))

sys/dev/netif/ix/ixgbe_82599.c

176

u16 list_offset, data_offset, data_value;

sys/dev/netif/ix/ixgbe_82599.c

1876

u16 soft_id, u8 queue, bool cloud_mode)

sys/dev/netif/ix/ixgbe_82599.c

1966

u16 soft_id)

sys/dev/netif/ix/ixgbe_82599.c

2015

u16 soft_id, u8 queue, bool cloud_mode)

sys/dev/netif/ix/ixgbe_82599.c

2195

u16 ext_ability = 0;

sys/dev/netif/ix/ixgbe_82599.c

2312

u16 fw_offset, fw_ptp_cfg_offset;

sys/dev/netif/ix/ixgbe_82599.c

2313

u16 fw_version;

sys/dev/netif/ix/ixgbe_82599.c

2373

u16 fw_offset, fw_lesm_param_offset, fw_lesm_state;

sys/dev/netif/ix/ixgbe_82599.c

2418

static s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_82599.c

2419

u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_82599.c

2453

u16 offset, u16 *data)

sys/dev/netif/ix/ixgbe_82599.c

53

u16 offset, u16 *data);

sys/dev/netif/ix/ixgbe_82599.c

54

static s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_82599.c

55

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_82599.c

590

u16 ee_ctrl_2 = 0;

sys/dev/netif/ix/ixgbe_api.c

1140

u8 ver, u16 len, char *driver_ver)

sys/dev/netif/ix/ixgbe_api.c

1498

s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)

sys/dev/netif/ix/ixgbe_api.c

1513

s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)

sys/dev/netif/ix/ixgbe_api.c

1563

s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)

sys/dev/netif/ix/ixgbe_api.c

1578

s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)

sys/dev/netif/ix/ixgbe_api.c

355

s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)

sys/dev/netif/ix/ixgbe_api.c

370

s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,

sys/dev/netif/ix/ixgbe_api.c

371

u16 *wwpn_prefix)

sys/dev/netif/ix/ixgbe_api.c

385

s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)

sys/dev/netif/ix/ixgbe_api.c

509

s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)

sys/dev/netif/ix/ixgbe_api.c

529

u16 *phy_data)

sys/dev/netif/ix/ixgbe_api.c

548

u16 phy_data)

sys/dev/netif/ix/ixgbe_api.c

806

s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/netif/ix/ixgbe_api.c

823

s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,

sys/dev/netif/ix/ixgbe_api.c

824

u16 *data)

sys/dev/netif/ix/ixgbe_api.c

839

s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/netif/ix/ixgbe_api.c

854

s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_api.c

855

u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_api.c

869

s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)

sys/dev/netif/ix/ixgbe_api.h

100

s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/netif/ix/ixgbe_api.h

101

s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_api.h

102

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_api.h

103

s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);

sys/dev/netif/ix/ixgbe_api.h

104

s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_api.h

105

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_api.h

107

s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);

sys/dev/netif/ix/ixgbe_api.h

136

u8 ver, u16 len, char *driver_ver);

sys/dev/netif/ix/ixgbe_api.h

139

u16 *firmware_version);

sys/dev/netif/ix/ixgbe_api.h

161

u16 soft_id, u8 queue, bool cloud_mode);

sys/dev/netif/ix/ixgbe_api.h

164

u16 soft_id);

sys/dev/netif/ix/ixgbe_api.h

168

u16 soft_id,

sys/dev/netif/ix/ixgbe_api.h

180

s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);

sys/dev/netif/ix/ixgbe_api.h

181

s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);

sys/dev/netif/ix/ixgbe_api.h

187

s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);

sys/dev/netif/ix/ixgbe_api.h

188

s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);

sys/dev/netif/ix/ixgbe_api.h

192

s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);

sys/dev/netif/ix/ixgbe_api.h

196

s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,

sys/dev/netif/ix/ixgbe_api.h

197

u16 *wwpn_prefix);

sys/dev/netif/ix/ixgbe_api.h

198

s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);

sys/dev/netif/ix/ixgbe_api.h

70

u16 *phy_data);

sys/dev/netif/ix/ixgbe_api.h

72

u16 phy_data);

sys/dev/netif/ix/ixgbe_common.c

1004

void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status)

sys/dev/netif/ix/ixgbe_common.c

1056

u16 link_status;

sys/dev/netif/ix/ixgbe_common.c

1080

u16 ee_ctrl_4;

sys/dev/netif/ix/ixgbe_common.c

1113

u16 i;

sys/dev/netif/ix/ixgbe_common.c

1253

u16 eeprom_size;

sys/dev/netif/ix/ixgbe_common.c

1277

eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >>

sys/dev/netif/ix/ixgbe_common.c

1304

s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

1305

u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_common.c

1308

u16 i, count;

sys/dev/netif/ix/ixgbe_common.c

1361

static s32 ixgbe_write_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

1362

u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_common.c

1365

u16 word;

sys/dev/netif/ix/ixgbe_common.c

1366

u16 page_size;

sys/dev/netif/ix/ixgbe_common.c

1367

u16 i;

sys/dev/netif/ix/ixgbe_common.c

1404

ixgbe_shift_out_eeprom_bits(hw, (u16)((offset + i) * 2),

sys/dev/netif/ix/ixgbe_common.c

1443

s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/netif/ix/ixgbe_common.c

1471

s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

1472

u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_common.c

1475

u16 i, count;

sys/dev/netif/ix/ixgbe_common.c

1520

static s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

1521

u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_common.c

1524

u16 word_in;

sys/dev/netif/ix/ixgbe_common.c

1526

u16 i;

sys/dev/netif/ix/ixgbe_common.c

1554

ixgbe_shift_out_eeprom_bits(hw, (u16)((offset + i) * 2),

sys/dev/netif/ix/ixgbe_common.c

1577

s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

1578

u16 *data)

sys/dev/netif/ix/ixgbe_common.c

1606

s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

1607

u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_common.c

1658

u16 offset)

sys/dev/netif/ix/ixgbe_common.c

1660

u16 data[IXGBE_EEPROM_PAGE_SIZE_MAX];

sys/dev/netif/ix/ixgbe_common.c

1662

u16 i;

sys/dev/netif/ix/ixgbe_common.c

1700

s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/netif/ix/ixgbe_common.c

1714

s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

1715

u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_common.c

1719

u16 i;

sys/dev/netif/ix/ixgbe_common.c

1769

s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/netif/ix/ixgbe_common.c

1983

u16 i;

sys/dev/netif/ix/ixgbe_common.c

2046

static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,

sys/dev/netif/ix/ixgbe_common.c

2047

u16 count)

sys/dev/netif/ix/ixgbe_common.c

2102

static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count)

sys/dev/netif/ix/ixgbe_common.c

2106

u16 data = 0;

sys/dev/netif/ix/ixgbe_common.c

2213

u16 i;

sys/dev/netif/ix/ixgbe_common.c

2214

u16 j;

sys/dev/netif/ix/ixgbe_common.c

2215

u16 checksum = 0;

sys/dev/netif/ix/ixgbe_common.c

2216

u16 length = 0;

sys/dev/netif/ix/ixgbe_common.c

2217

u16 pointer = 0;

sys/dev/netif/ix/ixgbe_common.c

2218

u16 word = 0;

sys/dev/netif/ix/ixgbe_common.c

2259

checksum = (u16)IXGBE_EEPROM_SUM - checksum;

sys/dev/netif/ix/ixgbe_common.c

2273

u16 *checksum_val)

sys/dev/netif/ix/ixgbe_common.c

2276

u16 checksum;

sys/dev/netif/ix/ixgbe_common.c

2277

u16 read_checksum = 0;

sys/dev/netif/ix/ixgbe_common.c

2295

checksum = (u16)(status & 0xffff);

sys/dev/netif/ix/ixgbe_common.c

2323

u16 checksum;

sys/dev/netif/ix/ixgbe_common.c

2341

checksum = (u16)(status & 0xffff);

sys/dev/netif/ix/ixgbe_common.c

238

u16 reg_cu = 0;

sys/dev/netif/ix/ixgbe_common.c

2659

vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));

sys/dev/netif/ix/ixgbe_common.c

2662

vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));

sys/dev/netif/ix/ixgbe_common.c

2665

vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));

sys/dev/netif/ix/ixgbe_common.c

2668

vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));

sys/dev/netif/ix/ixgbe_common.c

3080

u16 technology_ability_reg = 0;

sys/dev/netif/ix/ixgbe_common.c

3081

u16 lp_technology_ability_reg = 0;

sys/dev/netif/ix/ixgbe_common.c

3222

u16 value;

sys/dev/netif/ix/ixgbe_common.c

3555

u16 *san_mac_offset)

sys/dev/netif/ix/ixgbe_common.c

3588

u16 san_mac_data, san_mac_offset;

sys/dev/netif/ix/ixgbe_common.c

3642

u16 san_mac_data, san_mac_offset;

sys/dev/netif/ix/ixgbe_common.c

3659

san_mac_data = (u16)((u16)(san_mac_addr[i * 2 + 1]) << 8);

sys/dev/netif/ix/ixgbe_common.c

3660

san_mac_data |= (u16)(san_mac_addr[i * 2]);

sys/dev/netif/ix/ixgbe_common.c

3675

u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)

sys/dev/netif/ix/ixgbe_common.c

3677

u16 msix_count = 1;

sys/dev/netif/ix/ixgbe_common.c

3678

u16 max_msix_count;

sys/dev/netif/ix/ixgbe_common.c

3679

u16 pcie_offset;

sys/dev/netif/ix/ixgbe_common.c

397

u16 device_caps;

sys/dev/netif/ix/ixgbe_common.c

4281

s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,

sys/dev/netif/ix/ixgbe_common.c

4282

u16 *wwpn_prefix)

sys/dev/netif/ix/ixgbe_common.c

4284

u16 offset, caps;

sys/dev/netif/ix/ixgbe_common.c

4285

u16 alt_san_mac_blk_offset;

sys/dev/netif/ix/ixgbe_common.c

4336

s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs)

sys/dev/netif/ix/ixgbe_common.c

4338

u16 offset, caps, flags;

sys/dev/netif/ix/ixgbe_common.c

4434

s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps)

sys/dev/netif/ix/ixgbe_common.c

4512

u16 dword_len;

sys/dev/netif/ix/ixgbe_common.c

4591

u16 buf_len;

sys/dev/netif/ix/ixgbe_common.c

46

static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,

sys/dev/netif/ix/ixgbe_common.c

4635

buf_len = (((u16)(resp->cmd_or_resp.ret_status) << 3)

sys/dev/netif/ix/ixgbe_common.c

4681

u8 build, u8 sub, u16 len,

sys/dev/netif/ix/ixgbe_common.c

47

u16 count);

sys/dev/netif/ix/ixgbe_common.c

4795

u16 value;

sys/dev/netif/ix/ixgbe_common.c

48

static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count);

sys/dev/netif/ix/ixgbe_common.c

5104

u16 offset, eeprom_cfg_blkh, eeprom_cfg_blkl;

sys/dev/netif/ix/ixgbe_common.c

5142

u16 rel_num, prod_ver, mod_len, cap, offset;

sys/dev/netif/ix/ixgbe_common.c

5184

u16 etk_id_l, etk_id_h;

sys/dev/netif/ix/ixgbe_common.c

529

u16 i = 0;

sys/dev/netif/ix/ixgbe_common.c

55

u16 *san_mac_offset);

sys/dev/netif/ix/ixgbe_common.c

56

static s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

57

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_common.c

58

static s32 ixgbe_write_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.c

59

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_common.c

61

u16 offset);

sys/dev/netif/ix/ixgbe_common.c

646

u16 data;

sys/dev/netif/ix/ixgbe_common.c

647

u16 pba_ptr;

sys/dev/netif/ix/ixgbe_common.c

648

u16 offset;

sys/dev/netif/ix/ixgbe_common.c

649

u16 length;

sys/dev/netif/ix/ixgbe_common.c

755

u16 data;

sys/dev/netif/ix/ixgbe_common.c

791

s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ix/ixgbe_common.c

792

u32 eeprom_buf_size, u16 max_pba_block_size,

sys/dev/netif/ix/ixgbe_common.c

796

u16 pba_block_size;

sys/dev/netif/ix/ixgbe_common.c

839

pba_block_size * sizeof(u16));

sys/dev/netif/ix/ixgbe_common.c

860

s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ix/ixgbe_common.c

897

pba->pba_block[0] * sizeof(u16));

sys/dev/netif/ix/ixgbe_common.c

919

s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ix/ixgbe_common.c

920

u32 eeprom_buf_size, u16 *pba_block_size)

sys/dev/netif/ix/ixgbe_common.c

923

u16 pba_word[2];

sys/dev/netif/ix/ixgbe_common.c

924

u16 length;

sys/dev/netif/ix/ixgbe_common.c

981

u16 i;

sys/dev/netif/ix/ixgbe_common.h

151

s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,

sys/dev/netif/ix/ixgbe_common.h

152

u16 *wwpn_prefix);

sys/dev/netif/ix/ixgbe_common.h

154

s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs);

sys/dev/netif/ix/ixgbe_common.h

157

s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);

sys/dev/netif/ix/ixgbe_common.h

162

u8 build, u8 ver, u16 len, const char *str);

sys/dev/netif/ix/ixgbe_common.h

168

s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity,

sys/dev/netif/ix/ixgbe_common.h

47

u16 word[2];

sys/dev/netif/ix/ixgbe_common.h

48

u16 *pba_block;

sys/dev/netif/ix/ixgbe_common.h

54

u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);

sys/dev/netif/ix/ixgbe_common.h

63

s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ix/ixgbe_common.h

64

u32 eeprom_buf_size, u16 max_pba_block_size,

sys/dev/netif/ix/ixgbe_common.h

66

s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ix/ixgbe_common.h

68

s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/netif/ix/ixgbe_common.h

69

u32 eeprom_buf_size, u16 *pba_block_size);

sys/dev/netif/ix/ixgbe_common.h

72

void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);

sys/dev/netif/ix/ixgbe_common.h

81

s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/netif/ix/ixgbe_common.h

82

s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.h

83

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_common.h

84

s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);

sys/dev/netif/ix/ixgbe_common.h

85

s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.h

86

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_common.h

87

s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/netif/ix/ixgbe_common.h

88

s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.h

89

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_common.h

90

s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.h

91

u16 *data);

sys/dev/netif/ix/ixgbe_common.h

92

s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_common.h

93

u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_common.h

96

u16 *checksum_val);

sys/dev/netif/ix/ixgbe_dcb.c

100

u16 min_percent = 100;

sys/dev/netif/ix/ixgbe_dcb.c

106

u16 link_percentage = 0;

sys/dev/netif/ix/ixgbe_dcb.c

162

p->data_credits_refill = (u16)credit_refill;

sys/dev/netif/ix/ixgbe_dcb.c

188

(u16)credit_max;

sys/dev/netif/ix/ixgbe_dcb.c

191

p->data_credits_max = (u16)credit_max;

sys/dev/netif/ix/ixgbe_dcb.c

225

u16 *refill)

sys/dev/netif/ix/ixgbe_dcb.c

234

void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *cfg, u16 *max)

sys/dev/netif/ix/ixgbe_dcb.c

464

u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };

sys/dev/netif/ix/ixgbe_dcb.c

465

u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };

sys/dev/netif/ix/ixgbe_dcb.c

506

u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];

sys/dev/netif/ix/ixgbe_dcb.c

507

u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];

sys/dev/netif/ix/ixgbe_dcb.c

52

s32 ixgbe_dcb_calculate_tc_credits(u8 *bw, u16 *refill, u16 *max,

sys/dev/netif/ix/ixgbe_dcb.c

549

u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];

sys/dev/netif/ix/ixgbe_dcb.c

550

u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];

sys/dev/netif/ix/ixgbe_dcb.c

660

u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];

sys/dev/netif/ix/ixgbe_dcb.c

661

u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];

sys/dev/netif/ix/ixgbe_dcb.c

728

s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max,

sys/dev/netif/ix/ixgbe_dcb.c

75

refill[i] = (u16)val;

sys/dev/netif/ix/ixgbe_dcb.h

105

u16 desc_credits_max; /* For Tx Descriptor arbitration */

sys/dev/netif/ix/ixgbe_dcb.h

142

s32 ixgbe_dcb_calculate_tc_credits(u8 *, u16 *, u16 *, int);

sys/dev/netif/ix/ixgbe_dcb.h

165

void ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config *, int, u16 *);

sys/dev/netif/ix/ixgbe_dcb.h

166

void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *, u16 *);

sys/dev/netif/ix/ixgbe_dcb.h

173

s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, u16 *, u16 *, u8 *, u8 *, u8 *);

sys/dev/netif/ix/ixgbe_dcb.h

87

u16 data_credits_refill; /* Credit refill amount in 64B granularity */

sys/dev/netif/ix/ixgbe_dcb.h

88

u16 data_credits_max; /* Max credits for a configured packet buffer

sys/dev/netif/ix/ixgbe_dcb_82598.c

120

s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *hw, u16 *refill,

sys/dev/netif/ix/ixgbe_dcb_82598.c

121

u16 *max, u8 *tsa)

sys/dev/netif/ix/ixgbe_dcb_82598.c

179

u16 *refill, u16 *max, u8 *bwg_id,

sys/dev/netif/ix/ixgbe_dcb_82598.c

226

u16 *refill, u16 *max, u8 *bwg_id,

sys/dev/netif/ix/ixgbe_dcb_82598.c

359

u16 *refill, u16 *max, u8 *bwg_id,

sys/dev/netif/ix/ixgbe_dcb_82598.h

92

s32 ixgbe_dcb_config_tx_desc_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *,

sys/dev/netif/ix/ixgbe_dcb_82598.h

94

s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *,

sys/dev/netif/ix/ixgbe_dcb_82598.h

96

s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *, u8 *);

sys/dev/netif/ix/ixgbe_dcb_82598.h

99

s32 ixgbe_dcb_hw_config_82598(struct ixgbe_hw *, int, u16 *, u16 *, u8 *, u8 *);

sys/dev/netif/ix/ixgbe_dcb_82599.c

121

s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *hw, u16 *refill,

sys/dev/netif/ix/ixgbe_dcb_82599.c

122

u16 *max, u8 *bwg_id, u8 *tsa,

sys/dev/netif/ix/ixgbe_dcb_82599.c

183

s32 ixgbe_dcb_config_tx_desc_arbiter_82599(struct ixgbe_hw *hw, u16 *refill,

sys/dev/netif/ix/ixgbe_dcb_82599.c

184

u16 *max, u8 *bwg_id, u8 *tsa)

sys/dev/netif/ix/ixgbe_dcb_82599.c

232

s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *hw, u16 *refill,

sys/dev/netif/ix/ixgbe_dcb_82599.c

233

u16 *max, u8 *bwg_id, u8 *tsa,

sys/dev/netif/ix/ixgbe_dcb_82599.c

597

u16 *refill, u16 *max, u8 *bwg_id, u8 *tsa,

sys/dev/netif/ix/ixgbe_dcb_82599.h

141

s32 ixgbe_dcb_config_tx_desc_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *,

sys/dev/netif/ix/ixgbe_dcb_82599.h

143

s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *,

sys/dev/netif/ix/ixgbe_dcb_82599.h

145

s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *, u8 *,

sys/dev/netif/ix/ixgbe_dcb_82599.h

152

s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *, int, u16 *, u16 *, u8 *,

sys/dev/netif/ix/ixgbe_mbx.c

117

s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

137

s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

157

static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

189

static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

224

s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

253

s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ix/ixgbe_mbx.c

254

u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

334

static s32 ixgbe_check_for_msg_vf(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

356

static s32 ixgbe_check_for_ack_vf(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

378

static s32 ixgbe_check_for_rst_vf(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

425

static s32 ixgbe_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ix/ixgbe_mbx.c

426

u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

429

u16 i;

sys/dev/netif/ix/ixgbe_mbx.c

467

static s32 ixgbe_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ix/ixgbe_mbx.c

468

u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

47

s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

471

u16 i;

sys/dev/netif/ix/ixgbe_mbx.c

547

static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)

sys/dev/netif/ix/ixgbe_mbx.c

571

static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)

sys/dev/netif/ix/ixgbe_mbx.c

595

static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)

sys/dev/netif/ix/ixgbe_mbx.c

634

static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)

sys/dev/netif/ix/ixgbe_mbx.c

665

static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ix/ixgbe_mbx.c

666

u16 vf_number)

sys/dev/netif/ix/ixgbe_mbx.c

669

u16 i;

sys/dev/netif/ix/ixgbe_mbx.c

708

static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/netif/ix/ixgbe_mbx.c

709

u16 vf_number)

sys/dev/netif/ix/ixgbe_mbx.c

712

u16 i;

sys/dev/netif/ix/ixgbe_mbx.c

73

s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.c

97

s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/netif/ix/ixgbe_mbx.h

155

s32 ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16);

sys/dev/netif/ix/ixgbe_mbx.h

156

s32 ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16);

sys/dev/netif/ix/ixgbe_mbx.h

157

s32 ixgbe_read_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);

sys/dev/netif/ix/ixgbe_mbx.h

158

s32 ixgbe_write_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);

sys/dev/netif/ix/ixgbe_mbx.h

159

s32 ixgbe_check_for_msg(struct ixgbe_hw *, u16);

sys/dev/netif/ix/ixgbe_mbx.h

160

s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16);

sys/dev/netif/ix/ixgbe_mbx.h

161

s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16);

sys/dev/netif/ix/ixgbe_osdep.h

129

#define __le16 u16

sys/dev/netif/ix/ixgbe_osdep.h

132

#define __be16 u16

sys/dev/netif/ix/ixgbe_osdep.h

187

extern u16 ixgbe_read_pci_cfg_vf(struct ixgbe_hw *, u32);

sys/dev/netif/ix/ixgbe_osdep.h

188

extern u16 ixgbe_read_pci_cfg_pf(struct ixgbe_hw *, u32);

sys/dev/netif/ix/ixgbe_osdep.h

190

extern void ixgbe_write_pci_cfg_vf(struct ixgbe_hw *, u32, u16);

sys/dev/netif/ix/ixgbe_osdep.h

191

extern void ixgbe_write_pci_cfg_pf(struct ixgbe_hw *, u32, u16);

sys/dev/netif/ix/ixgbe_osdep_pf.c

47

u16

sys/dev/netif/ix/ixgbe_osdep_pf.c

54

ixgbe_write_pci_cfg_pf(struct ixgbe_hw *hw, u32 reg, u16 value)

sys/dev/netif/ix/ixgbe_phy.c

1042

u16 autoneg_reg = IXGBE_MII_AUTONEG_REG;

sys/dev/netif/ix/ixgbe_phy.c

1117

u16 *firmware_version)

sys/dev/netif/ix/ixgbe_phy.c

113

s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,

sys/dev/netif/ix/ixgbe_phy.c

1136

u16 *firmware_version)

sys/dev/netif/ix/ixgbe_phy.c

114

u16 *val, bool lock)

sys/dev/netif/ix/ixgbe_phy.c

1155

u16 phy_offset, control, eword, edata, block_crc;

sys/dev/netif/ix/ixgbe_phy.c

1157

u16 list_offset, data_offset;

sys/dev/netif/ix/ixgbe_phy.c

1158

u16 phy_data = 0;

sys/dev/netif/ix/ixgbe_phy.c

1312

u16 enforce_sfp = 0;

sys/dev/netif/ix/ixgbe_phy.c

1653

u16 enforce_sfp = 0;

sys/dev/netif/ix/ixgbe_phy.c

1838

u16 *list_offset,

sys/dev/netif/ix/ixgbe_phy.c

1839

u16 *data_offset)

sys/dev/netif/ix/ixgbe_phy.c

1841

u16 sfp_id;

sys/dev/netif/ix/ixgbe_phy.c

1842

u16 sfp_type = hw->phy.sfp_type;

sys/dev/netif/ix/ixgbe_phy.c

191

s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,

sys/dev/netif/ix/ixgbe_phy.c

192

u16 val, bool lock)

sys/dev/netif/ix/ixgbe_phy.c

2656

u16 phy_data = 0;

sys/dev/netif/ix/ixgbe_phy.c

2684

u16 reg;

sys/dev/netif/ix/ixgbe_phy.c

291

static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr)

sys/dev/netif/ix/ixgbe_phy.c

293

u16 ext_ability = 0;

sys/dev/netif/ix/ixgbe_phy.c

329

u16 phy_addr;

sys/dev/netif/ix/ixgbe_phy.c

407

u16 phy_id = 0;

sys/dev/netif/ix/ixgbe_phy.c

432

u16 phy_id_high = 0;

sys/dev/netif/ix/ixgbe_phy.c

433

u16 phy_id_low = 0;

sys/dev/netif/ix/ixgbe_phy.c

503

u16 ctrl = 0;

sys/dev/netif/ix/ixgbe_phy.c

584

u16 *phy_data)

sys/dev/netif/ix/ixgbe_phy.c

652

*phy_data = (u16)(data);

sys/dev/netif/ix/ixgbe_phy.c

666

u32 device_type, u16 *phy_data)

sys/dev/netif/ix/ixgbe_phy.c

692

u32 device_type, u16 phy_data)

sys/dev/netif/ix/ixgbe_phy.c

766

u32 device_type, u16 phy_data)

sys/dev/netif/ix/ixgbe_phy.c

793

u16 autoneg_reg = IXGBE_MII_AUTONEG_REG;

sys/dev/netif/ix/ixgbe_phy.c

929

u16 speed_ability;

sys/dev/netif/ix/ixgbe_phy.c

97

u16 sum = add1 + add2;

sys/dev/netif/ix/ixgbe_phy.c

997

u16 phy_link = 0;

sys/dev/netif/ix/ixgbe_phy.c

998

u16 phy_speed = 0;

sys/dev/netif/ix/ixgbe_phy.c

999

u16 phy_data = 0;

sys/dev/netif/ix/ixgbe_phy.h

166

u16 *phy_data);

sys/dev/netif/ix/ixgbe_phy.h

168

u16 phy_data);

sys/dev/netif/ix/ixgbe_phy.h

170

u32 device_type, u16 *phy_data);

sys/dev/netif/ix/ixgbe_phy.h

172

u32 device_type, u16 phy_data);

sys/dev/netif/ix/ixgbe_phy.h

188

u16 *firmware_version);

sys/dev/netif/ix/ixgbe_phy.h

190

u16 *firmware_version);

sys/dev/netif/ix/ixgbe_phy.h

199

u16 *list_offset,

sys/dev/netif/ix/ixgbe_phy.h

200

u16 *data_offset);

sys/dev/netif/ix/ixgbe_phy.h

215

s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg,

sys/dev/netif/ix/ixgbe_phy.h

216

u16 *val, bool lock);

sys/dev/netif/ix/ixgbe_phy.h

217

s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg,

sys/dev/netif/ix/ixgbe_phy.h

218

u16 val, bool lock);

sys/dev/netif/ix/ixgbe_type.h

2922

#define __le16 u16

sys/dev/netif/ix/ixgbe_type.h

2933

#define __be16 u16

sys/dev/netif/ix/ixgbe_type.h

304

u16 nvm_minor;

sys/dev/netif/ix/ixgbe_type.h

310

u16 oem_release;

sys/dev/netif/ix/ixgbe_type.h

314

u16 or_build;

sys/dev/netif/ix/ixgbe_type.h

3169

u16 pad2; /* end spacing to ensure length is mult. of dword2 */

sys/dev/netif/ix/ixgbe_type.h

3186

u16 length;

sys/dev/netif/ix/ixgbe_type.h

3187

u16 pad2;

sys/dev/netif/ix/ixgbe_type.h

3188

u16 data;

sys/dev/netif/ix/ixgbe_type.h

3189

u16 pad3;

sys/dev/netif/ix/ixgbe_type.h

3195

u16 length;

sys/dev/netif/ix/ixgbe_type.h

3196

u16 pad2;

sys/dev/netif/ix/ixgbe_type.h

3197

u16 data;

sys/dev/netif/ix/ixgbe_type.h

3198

u16 pad3;

sys/dev/netif/ix/ixgbe_type.h

3205

u16 pad3;

sys/dev/netif/ix/ixgbe_type.h

3212

u16 pad;

sys/dev/netif/ix/ixgbe_type.h

3220

u16 rsv1;

sys/dev/netif/ix/ixgbe_type.h

3222

u16 pad;

sys/dev/netif/ix/ixgbe_type.h

3780

u16 func;

sys/dev/netif/ix/ixgbe_type.h

3782

u16 instance_id;

sys/dev/netif/ix/ixgbe_type.h

3789

u16 pause_time; /* Flow Control Pause timer */

sys/dev/netif/ix/ixgbe_type.h

3888

s32 (*read)(struct ixgbe_hw *, u16, u16 *);

sys/dev/netif/ix/ixgbe_type.h

3889

s32 (*read_buffer)(struct ixgbe_hw *, u16, u16, u16 *);

sys/dev/netif/ix/ixgbe_type.h

3890

s32 (*write)(struct ixgbe_hw *, u16, u16);

sys/dev/netif/ix/ixgbe_type.h

3891

s32 (*write_buffer)(struct ixgbe_hw *, u16, u16, u16 *);

sys/dev/netif/ix/ixgbe_type.h

3892

s32 (*validate_checksum)(struct ixgbe_hw *, u16 *);

sys/dev/netif/ix/ixgbe_type.h

3908

s32 (*get_device_caps)(struct ixgbe_hw *, u16 *);

sys/dev/netif/ix/ixgbe_type.h

3909

s32 (*get_wwn_prefix)(struct ixgbe_hw *, u16 *, u16 *);

sys/dev/netif/ix/ixgbe_type.h

3910

s32 (*get_fcoe_boot_status)(struct ixgbe_hw *, u16 *);

sys/dev/netif/ix/ixgbe_type.h

3976

s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8, u16,

sys/dev/netif/ix/ixgbe_type.h

4006

s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *);

sys/dev/netif/ix/ixgbe_type.h

4007

s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16);

sys/dev/netif/ix/ixgbe_type.h

4008

s32 (*read_reg_mdi)(struct ixgbe_hw *, u32, u32, u16 *);

sys/dev/netif/ix/ixgbe_type.h

4009

s32 (*write_reg_mdi)(struct ixgbe_hw *, u32, u32, u16);

sys/dev/netif/ix/ixgbe_type.h

4014

s32 (*get_firmware_version)(struct ixgbe_hw *, u16 *);

sys/dev/netif/ix/ixgbe_type.h

4032

s32 (*read_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 *val);

sys/dev/netif/ix/ixgbe_type.h

4033

s32 (*read_link_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,

sys/dev/netif/ix/ixgbe_type.h

4034

u16 *val);

sys/dev/netif/ix/ixgbe_type.h

4035

s32 (*write_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 val);

sys/dev/netif/ix/ixgbe_type.h

4036

s32 (*write_link_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,

sys/dev/netif/ix/ixgbe_type.h

4037

u16 val);

sys/dev/netif/ix/ixgbe_type.h

4049

u16 word_size;

sys/dev/netif/ix/ixgbe_type.h

4050

u16 address_bits;

sys/dev/netif/ix/ixgbe_type.h

4051

u16 word_page_size;

sys/dev/netif/ix/ixgbe_type.h

4052

u16 ctrl_word_3;

sys/dev/netif/ix/ixgbe_type.h

4063

u16 wwnn_prefix;

sys/dev/netif/ix/ixgbe_type.h

4065

u16 wwpn_prefix;

sys/dev/netif/ix/ixgbe_type.h

4080

u16 max_msix_vectors;

sys/dev/netif/ix/ixgbe_type.h

4118

s32 (*read)(struct ixgbe_hw *, u32 *, u16, u16);

sys/dev/netif/ix/ixgbe_type.h

4119

s32 (*write)(struct ixgbe_hw *, u32 *, u16, u16);

sys/dev/netif/ix/ixgbe_type.h

4120

s32 (*read_posted)(struct ixgbe_hw *, u32 *, u16, u16);

sys/dev/netif/ix/ixgbe_type.h

4121

s32 (*write_posted)(struct ixgbe_hw *, u32 *, u16, u16);

sys/dev/netif/ix/ixgbe_type.h

4122

s32 (*check_for_msg)(struct ixgbe_hw *, u16);

sys/dev/netif/ix/ixgbe_type.h

4123

s32 (*check_for_ack)(struct ixgbe_hw *, u16);

sys/dev/netif/ix/ixgbe_type.h

4124

s32 (*check_for_rst)(struct ixgbe_hw *, u16);

sys/dev/netif/ix/ixgbe_type.h

4142

u16 size;

sys/dev/netif/ix/ixgbe_type.h

4157

u16 device_id;

sys/dev/netif/ix/ixgbe_type.h

4158

u16 vendor_id;

sys/dev/netif/ix/ixgbe_type.h

4159

u16 subsystem_device_id;

sys/dev/netif/ix/ixgbe_type.h

4160

u16 subsystem_vendor_id;

sys/dev/netif/ix/ixgbe_type.h

694

u16 watchdog_timer; /* usec units */

sys/dev/netif/ix/ixgbe_x540.c

340

u16 ext_ability = 0;

sys/dev/netif/ix/ixgbe_x540.c

367

u16 eeprom_size;

sys/dev/netif/ix/ixgbe_x540.c

376

eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >>

sys/dev/netif/ix/ixgbe_x540.c

396

s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/netif/ix/ixgbe_x540.c

422

u16 offset, u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_x540.c

447

s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/netif/ix/ixgbe_x540.c

473

u16 offset, u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_x540.c

502

u16 i, j;

sys/dev/netif/ix/ixgbe_x540.c

503

u16 checksum = 0;

sys/dev/netif/ix/ixgbe_x540.c

504

u16 length = 0;

sys/dev/netif/ix/ixgbe_x540.c

505

u16 pointer = 0;

sys/dev/netif/ix/ixgbe_x540.c

506

u16 word = 0;

sys/dev/netif/ix/ixgbe_x540.c

507

u16 ptr_start = IXGBE_PCIE_ANALOG_PTR;

sys/dev/netif/ix/ixgbe_x540.c

563

checksum = (u16)IXGBE_EEPROM_SUM - checksum;

sys/dev/netif/ix/ixgbe_x540.c

577

u16 *checksum_val)

sys/dev/netif/ix/ixgbe_x540.c

580

u16 checksum;

sys/dev/netif/ix/ixgbe_x540.c

581

u16 read_checksum = 0;

sys/dev/netif/ix/ixgbe_x540.c

602

checksum = (u16)(status & 0xffff);

sys/dev/netif/ix/ixgbe_x540.c

642

u16 checksum;

sys/dev/netif/ix/ixgbe_x540.c

663

checksum = (u16)(status & 0xffff);

sys/dev/netif/ix/ixgbe_x540.h

50

s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);

sys/dev/netif/ix/ixgbe_x540.h

51

s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,

sys/dev/netif/ix/ixgbe_x540.h

52

u16 *data);

sys/dev/netif/ix/ixgbe_x540.h

53

s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/netif/ix/ixgbe_x540.h

54

s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,

sys/dev/netif/ix/ixgbe_x540.h

55

u16 *data);

sys/dev/netif/ix/ixgbe_x540.h

57

s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, u16 *checksum_val);

sys/dev/netif/ix/ixgbe_x550.c

1020

u16 eeprom_size;

sys/dev/netif/ix/ixgbe_x550.c

1029

eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >>

sys/dev/netif/ix/ixgbe_x550.c

114

static s32 ixgbe_read_cs4227(struct ixgbe_hw *hw, u16 reg, u16 *value)

sys/dev/netif/ix/ixgbe_x550.c

127

static s32 ixgbe_write_cs4227(struct ixgbe_hw *hw, u16 reg, u16 value)

sys/dev/netif/ix/ixgbe_x550.c

181

u16 value;

sys/dev/netif/ix/ixgbe_x550.c

1961

u16 reg;

sys/dev/netif/ix/ixgbe_x550.c

2048

u16 reg;

sys/dev/netif/ix/ixgbe_x550.c

254

u16 value = 0;

sys/dev/netif/ix/ixgbe_x550.c

2561

u16 reg;

sys/dev/netif/ix/ixgbe_x550.c

2626

u16 reg_slice, reg_val;

sys/dev/netif/ix/ixgbe_x550.c

2720

u16 reg_phy_ext;

sys/dev/netif/ix/ixgbe_x550.c

2951

u16 autoneg_status;

sys/dev/netif/ix/ixgbe_x550.c

2990

u16 speed;

sys/dev/netif/ix/ixgbe_x550.c

3118

s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/netif/ix/ixgbe_x550.c

3133

buffer.length = IXGBE_CPU_TO_BE16(sizeof(u16));

sys/dev/netif/ix/ixgbe_x550.c

3144

*data = (u16)IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG,

sys/dev/netif/ix/ixgbe_x550.c

3162

u16 offset, u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_x550.c

3167

u16 words_to_read;

sys/dev/netif/ix/ixgbe_x550.c

3210

data[current_word] = (u16)(value & 0xffff);

sys/dev/netif/ix/ixgbe_x550.c

3215

data[current_word] = (u16)(value & 0xffff);

sys/dev/netif/ix/ixgbe_x550.c

3235

s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_x550.c

3236

u16 data)

sys/dev/netif/ix/ixgbe_x550.c

3249

buffer.length = IXGBE_CPU_TO_BE16(sizeof(u16));

sys/dev/netif/ix/ixgbe_x550.c

3268

s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_x550.c

3269

u16 data)

sys/dev/netif/ix/ixgbe_x550.c

3297

u16 offset, u16 words, u16 *data)

sys/dev/netif/ix/ixgbe_x550.c

3338

static s32 ixgbe_checksum_ptr_x550(struct ixgbe_hw *hw, u16 ptr,

sys/dev/netif/ix/ixgbe_x550.c

3339

u16 size, u16 *csum, u16 *buffer,

sys/dev/netif/ix/ixgbe_x550.c

3342

u16 buf[256];

sys/dev/netif/ix/ixgbe_x550.c

3344

u16 length, bufsz, i, start;

sys/dev/netif/ix/ixgbe_x550.c

3345

u16 *local_buffer;

sys/dev/netif/ix/ixgbe_x550.c

3407

s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size)

sys/dev/netif/ix/ixgbe_x550.c

3409

u16 eeprom_ptrs[IXGBE_EEPROM_LAST_WORD + 1];

sys/dev/netif/ix/ixgbe_x550.c

3410

u16 *local_buffer;

sys/dev/netif/ix/ixgbe_x550.c

3412

u16 checksum = 0;

sys/dev/netif/ix/ixgbe_x550.c

3413

u16 pointer, i, size;

sys/dev/netif/ix/ixgbe_x550.c

3477

checksum = (u16)IXGBE_EEPROM_SUM - checksum;

sys/dev/netif/ix/ixgbe_x550.c

3501

s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val)

sys/dev/netif/ix/ixgbe_x550.c

3504

u16 checksum;

sys/dev/netif/ix/ixgbe_x550.c

3505

u16 read_checksum = 0;

sys/dev/netif/ix/ixgbe_x550.c

3523

checksum = (u16)(status & 0xffff);

sys/dev/netif/ix/ixgbe_x550.c

3557

u16 checksum = 0;

sys/dev/netif/ix/ixgbe_x550.c

3575

checksum = (u16)(status & 0xffff);

sys/dev/netif/ix/ixgbe_x550.c

3621

u16 ext_ability = 0;

sys/dev/netif/ix/ixgbe_x550.c

3759

u16 an_10g_cntl_reg, autoneg_reg, speed;

sys/dev/netif/ix/ixgbe_x550.c

3866

u16 an_lp_status;

sys/dev/netif/ix/ixgbe_x550.c

3868

u16 word = hw->eeprom.ctrl_word_3;

sys/dev/netif/ix/ixgbe_x550.c

401

s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,

sys/dev/netif/ix/ixgbe_x550.c

408

u16 retries = FW_PHY_ACT_RETRIES;

sys/dev/netif/ix/ixgbe_x550.c

410

u16 i;

sys/dev/netif/ix/ixgbe_x550.c

4359

u32 device_type, u16 *phy_data)

sys/dev/netif/ix/ixgbe_x550.c

4387

u32 device_type, u16 phy_data)

sys/dev/netif/ix/ixgbe_x550.c

442

u16 fw_speed;

sys/dev/netif/ix/ixgbe_x550.c

4486

u16 i, autoneg_status = 0;

sys/dev/netif/ix/ixgbe_x550.c

4543

u16 phy_data;

sys/dev/netif/ix/ixgbe_x550.c

4568

u16 phy_data;

sys/dev/netif/ix/ixgbe_x550.c

4602

u8 build, u8 sub, u16 len, const char *driver_ver)

sys/dev/netif/ix/ixgbe_x550.c

462

u16 phy_speeds;

sys/dev/netif/ix/ixgbe_x550.c

463

u16 phy_id_lo;

sys/dev/netif/ix/ixgbe_x550.c

465

u16 i;

sys/dev/netif/ix/ixgbe_x550.c

523

u32 device_type, u16 *phy_data)

sys/dev/netif/ix/ixgbe_x550.c

530

u32 device_type, u16 phy_data)

sys/dev/netif/ix/ixgbe_x550.c

546

u16 reg, u16 *val)

sys/dev/netif/ix/ixgbe_x550.c

562

u16 reg, u16 *val)

sys/dev/netif/ix/ixgbe_x550.c

577

u8 addr, u16 reg, u16 val)

sys/dev/netif/ix/ixgbe_x550.c

593

u8 addr, u16 reg, u16 val)

sys/dev/netif/ix/ixgbe_x550.c

704

u16 i;

sys/dev/netif/ix/ixgbe_x550.h

106

u32 device_type, u16 *phy_data);

sys/dev/netif/ix/ixgbe_x550.h

108

u32 device_type, u16 phy_data);

sys/dev/netif/ix/ixgbe_x550.h

48

s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size);

sys/dev/netif/ix/ixgbe_x550.h

49

s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val);

sys/dev/netif/ix/ixgbe_x550.h

52

u16 offset, u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_x550.h

53

s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_x550.h

54

u16 data);

sys/dev/netif/ix/ixgbe_x550.h

56

u16 offset, u16 words, u16 *data);

sys/dev/netif/ix/ixgbe_x550.h

57

s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_x550.h

58

u16 *data);

sys/dev/netif/ix/ixgbe_x550.h

59

s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/netif/ix/ixgbe_x550.h

60

u16 data);

sys/dev/netif/ix/ixgbe_x550.h

70

u8 build, u8 ver, u16 len, const char *str);

sys/dev/raid/asr/osd_util.h

189

uSHORT u16[2];

sys/dev/raid/mpr/mpr.c

2244

u16 sc_status;

sys/dev/raid/mpr/mpr_config.c

1060

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

1192

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

1316

*mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, u16 handle)

sys/dev/raid/mpr/mpr_config.c

1323

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

1448

mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle, u64 *wwid)

sys/dev/raid/mpr/mpr_config.c

1482

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

207

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

366

Mpi2DriverMappingPage0_t *config_page, u16 sz)

sys/dev/raid/mpr/mpr_config.c

373

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

504

Mpi2DriverMappingPage0_t *config_page, u16 entry_idx)

sys/dev/raid/mpr/mpr_config.c

511

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

644

*mpi_reply, Mpi2SasDevicePage0_t *config_page, u32 form, u16 handle)

sys/dev/raid/mpr/mpr_config.c

651

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

75

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

781

*mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle)

sys/dev/raid/mpr/mpr_config.c

788

u16 ioc_status;

sys/dev/raid/mpr/mpr_config.c

918

*mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle)

sys/dev/raid/mpr/mpr_config.c

925

u16 ioc_status;

sys/dev/raid/mpr/mpr_mapping.c

1143

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

1320

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

1467

u16 slots = et_entry->num_slots, map_idx;

sys/dev/raid/mpr/mpr_mapping.c

1495

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

1578

u16 dpm_idx;

sys/dev/raid/mpr/mpr_mapping.c

1584

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

1589

u16 max_num_phy_ids = le16toh(sc->ioc_pg8.MaxNumPhysicalMappedIDs);

sys/dev/raid/mpr/mpr_mapping.c

1835

u16 dpm_idx;

sys/dev/raid/mpr/mpr_mapping.c

1841

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

1846

u16 max_num_phy_ids = le16toh(sc->ioc_pg8.MaxNumPhysicalMappedIDs);

sys/dev/raid/mpr/mpr_mapping.c

2091

u16 entry_num;

sys/dev/raid/mpr/mpr_mapping.c

2210

u16 slot_id, entry_num, num_slots;

sys/dev/raid/mpr/mpr_mapping.c

2215

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

2216

u16 max_num_phy_ids = le16toh(sc->ioc_pg8.MaxNumPhysicalMappedIDs);

sys/dev/raid/mpr/mpr_mapping.c

2401

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

243

u16 volume_mapping_flags;

sys/dev/raid/mpr/mpr_mapping.c

244

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

2662

mpr_mapping_get_tid(struct mpr_softc *sc, uint64_t sas_address, u16 handle)

sys/dev/raid/mpr/mpr_mapping.c

2687

mpr_mapping_get_tid_from_handle(struct mpr_softc *sc, u16 handle)

sys/dev/raid/mpr/mpr_mapping.c

2701

mpr_mapping_get_raid_tid(struct mpr_softc *sc, u64 wwid, u16 volHandle)

sys/dev/raid/mpr/mpr_mapping.c

2727

mpr_mapping_get_raid_tid_from_handle(struct mpr_softc *sc, u16 volHandle)

sys/dev/raid/mpr/mpr_mapping.c

2746

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

289

_mapping_get_enc_idx_from_handle(struct mpr_softc *sc, u16 handle)

sys/dev/raid/mpr/mpr_mapping.c

3001

u16 element_flags;

sys/dev/raid/mpr/mpr_mapping.c

347

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

423

_mapping_get_ir_mt_idx_from_handle(struct mpr_softc *sc, u16 volHandle)

sys/dev/raid/mpr/mpr_mapping.c

445

_mapping_get_mt_idx_from_handle(struct mpr_softc *sc, u16 handle)

sys/dev/raid/mpr/mpr_mapping.c

515

u16 volume_mapping_flags;

sys/dev/raid/mpr/mpr_mapping.c

538

static u16

sys/dev/raid/mpr/mpr_mapping.c

541

u16 entry_num;

sys/dev/raid/mpr/mpr_mapping.c

570

u16 entry_num;

sys/dev/raid/mpr/mpr_mapping.c

572

u16 current_entry = MPR_DPM_BAD_IDX, missing_cnt, high_missing_cnt = 0;

sys/dev/raid/mpr/mpr_mapping.c

650

u16 dpm_idx;

sys/dev/raid/mpr/mpr_mapping.c

756

_mapping_add_to_removal_table(struct mpr_softc *sc, u16 dpm_idx)

sys/dev/raid/mpr/mpr_mapping.c

803

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_mapping.c

918

u16 vol_mapping_flags;

sys/dev/raid/mpr/mpr_mapping.c

920

u16 num_found;

sys/dev/raid/mpr/mpr_mapping.c

925

u16 max_num_phy_ids = le16toh(sc->ioc_pg8.MaxNumPhysicalMappedIDs);

sys/dev/raid/mpr/mpr_mapping.h

120

u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD);

sys/dev/raid/mpr/mpr_sas.c

2237

u16 ioc_status = le16toh(mpi_reply->IOCStatus) &

sys/dev/raid/mpr/mpr_sas.c

2498

u16 alloc_len;

sys/dev/raid/mpr/mpr_sas.c

2771

alloc_len = ((u16)scsi_cdb[3] << 8) + scsi_cdb[4];

sys/dev/raid/mpr/mpr_sas_lsi.c

103

u16 reserved1[10]; /* 0-9 */

sys/dev/raid/mpr/mpr_sas_lsi.c

1033

u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD)

sys/dev/raid/mpr/mpr_sas_lsi.c

104

u16 serial_number[10]; /* 10-19 */

sys/dev/raid/mpr/mpr_sas_lsi.c

105

u16 reserved2[7]; /* 20-26 */

sys/dev/raid/mpr/mpr_sas_lsi.c

106

u16 model_number[20]; /* 27-46*/

sys/dev/raid/mpr/mpr_sas_lsi.c

107

u16 reserved3[170]; /* 47-216 */

sys/dev/raid/mpr/mpr_sas_lsi.c

108

u16 rotational_speed; /* 217 */

sys/dev/raid/mpr/mpr_sas_lsi.c

109

u16 reserved4[38]; /* 218-255 */

sys/dev/raid/mpr/mpr_sas_lsi.c

1127

mprsas_get_sata_identify(struct mpr_softc *sc, u16 handle,

sys/dev/raid/mpr/mpr_sas_lsi.c

116

static int mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate);

sys/dev/raid/mpr/mpr_sas_lsi.c

117

static int mprsas_add_pcie_device(struct mpr_softc *sc, u16 handle,

sys/dev/raid/mpr/mpr_sas_lsi.c

119

static int mprsas_get_sata_identify(struct mpr_softc *sc, u16 handle,

sys/dev/raid/mpr/mpr_sas_lsi.c

124

u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD);

sys/dev/raid/mpr/mpr_sas_lsi.c

126

u16 handle);

sys/dev/raid/mpr/mpr_sas_lsi.c

1266

mprsas_add_pcie_device(struct mpr_softc *sc, u16 handle, u8 linkrate)

sys/dev/raid/mpr/mpr_sas_lsi.c

136

u16 sz;

sys/dev/raid/mpr/mpr_sas_lsi.c

1404

mprsas_volume_add(struct mpr_softc *sc, u16 handle)

sys/dev/raid/mpr/mpr_sas_lsi.c

1598

u16 volume_mapping_flags;

sys/dev/raid/mpr/mpr_sas_lsi.c

1599

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mpr/mpr_sas_lsi.c

279

u16 elementType;

sys/dev/raid/mpr/mpr_sas_lsi.c

799

mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate)

sys/dev/raid/mpr/mpr_sas_lsi.c

86

u16 event;

sys/dev/raid/mpr/mprvar.h

117

u16 dpm_entry_num;

sys/dev/raid/mpr/mprvar.h

118

u16 dev_handle;

sys/dev/raid/mpr/mprvar.h

119

u16 reserved1;

sys/dev/raid/mpr/mprvar.h

120

u16 id;

sys/dev/raid/mpr/mprvar.h

145

u16 dpm_entry_num;

sys/dev/raid/mpr/mprvar.h

146

u16 enc_handle;

sys/dev/raid/mpr/mprvar.h

147

u16 num_slots;

sys/dev/raid/mpr/mprvar.h

148

u16 start_slot;

sys/dev/raid/mpr/mprvar.h

161

u16 dpm_entry_num;

sys/dev/raid/mpr/mprvar.h

162

u16 dev_handle;

sys/dev/raid/mpr/mprvar.h

797

Mpi2SasDevicePage0_t *, u32 , u16 );

sys/dev/raid/mpr/mprvar.h

799

*mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle);

sys/dev/raid/mpr/mprvar.h

801

*mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle);

sys/dev/raid/mpr/mprvar.h

803

Mpi2DriverMappingPage0_t *, u16 );

sys/dev/raid/mpr/mprvar.h

806

u16 handle);

sys/dev/raid/mpr/mprvar.h

807

int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle,

sys/dev/raid/mpr/mprvar.h

826

Mpi2DriverMappingPage0_t *, u16 );

sys/dev/raid/mpr/mprvar.h

830

unsigned int mpr_mapping_get_tid(struct mpr_softc *, uint64_t , u16);

sys/dev/raid/mpr/mprvar.h

832

u16 handle);

sys/dev/raid/mpr/mprvar.h

834

u16 volHandle);

sys/dev/raid/mpr/mprvar.h

836

u16 volHandle);

sys/dev/raid/mps/mps_config.c

1025

u16 ioc_status;

sys/dev/raid/mps/mps_config.c

1138

*mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, u16 handle)

sys/dev/raid/mps/mps_config.c

1145

u16 ioc_status;

sys/dev/raid/mps/mps_config.c

1256

mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle, u64 *wwid)

sys/dev/raid/mps/mps_config.c

1290

u16 ioc_status;

sys/dev/raid/mps/mps_config.c

191

u16 ioc_status;

sys/dev/raid/mps/mps_config.c

530

Mpi2DriverMappingPage0_t *config_page, u16 sz)

sys/dev/raid/mps/mps_config.c

537

u16 ioc_status;

sys/dev/raid/mps/mps_config.c

654

Mpi2DriverMappingPage0_t *config_page, u16 entry_idx)

sys/dev/raid/mps/mps_config.c

661

u16 ioc_status;

sys/dev/raid/mps/mps_config.c

73

u16 ioc_status;

sys/dev/raid/mps/mps_config.c

779

*mpi_reply, Mpi2SasDevicePage0_t *config_page, u32 form, u16 handle)

sys/dev/raid/mps/mps_config.c

786

u16 ioc_status;

sys/dev/raid/mps/mps_config.c

907

u16 ioc_status;

sys/dev/raid/mps/mps_mapping.c

1015

u16 slots = et_entry->num_slots, map_idx;

sys/dev/raid/mps/mps_mapping.c

1042

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

1118

u16 dpm_idx;

sys/dev/raid/mps/mps_mapping.c

1124

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

1129

u16 max_num_phy_ids = le16toh(sc->ioc_pg8.MaxNumPhysicalMappedIDs);

sys/dev/raid/mps/mps_mapping.c

1347

u16 entry_num;

sys/dev/raid/mps/mps_mapping.c

1464

u16 slot_id, entry_num, num_slots;

sys/dev/raid/mps/mps_mapping.c

1468

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

1469

u16 max_num_phy_ids = le16toh(sc->ioc_pg8.MaxNumPhysicalMappedIDs);

sys/dev/raid/mps/mps_mapping.c

1601

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

1821

mps_mapping_get_sas_id(struct mps_softc *sc, uint64_t sas_address, u16 handle)

sys/dev/raid/mps/mps_mapping.c

1846

mps_mapping_get_sas_id_from_handle(struct mps_softc *sc, u16 handle)

sys/dev/raid/mps/mps_mapping.c

1860

mps_mapping_get_raid_id(struct mps_softc *sc, u64 wwid, u16 handle)

sys/dev/raid/mps/mps_mapping.c

1885

mps_mapping_get_raid_id_from_handle(struct mps_softc *sc, u16 volHandle)

sys/dev/raid/mps/mps_mapping.c

1904

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

2098

u16 element_flags;

sys/dev/raid/mps/mps_mapping.c

2152

u16 element_flags;

sys/dev/raid/mps/mps_mapping.c

223

u16 volume_mapping_flags;

sys/dev/raid/mps/mps_mapping.c

224

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

269

_mapping_get_enc_idx_from_handle(struct mps_softc *sc, u16 handle)

sys/dev/raid/mps/mps_mapping.c

327

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

402

_mapping_get_ir_mt_idx_from_handle(struct mps_softc *sc, u16 volHandle)

sys/dev/raid/mps/mps_mapping.c

424

_mapping_get_mt_idx_from_handle(struct mps_softc *sc, u16 handle)

sys/dev/raid/mps/mps_mapping.c

483

u16 volume_mapping_flags;

sys/dev/raid/mps/mps_mapping.c

505

static u16

sys/dev/raid/mps/mps_mapping.c

508

u16 entry_num;

sys/dev/raid/mps/mps_mapping.c

537

u16 entry_num;

sys/dev/raid/mps/mps_mapping.c

563

u16 dpm_idx;

sys/dev/raid/mps/mps_mapping.c

644

_mapping_add_to_removal_table(struct mps_softc *sc, u16 handle,

sys/dev/raid/mps/mps_mapping.c

645

u16 dpm_idx)

sys/dev/raid/mps/mps_mapping.c

649

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

686

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.c

747

u16 vol_mapping_flags;

sys/dev/raid/mps/mps_mapping.c

749

u16 num_found;

sys/dev/raid/mps/mps_mapping.c

754

u16 max_num_phy_ids = le16toh(sc->ioc_pg8.MaxNumPhysicalMappedIDs);

sys/dev/raid/mps/mps_mapping.c

884

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_mapping.h

69

u64 *sas_address, u16 handle, u32 device_info);

sys/dev/raid/mps/mps_sas.c

1793

u16 alloc_len;

sys/dev/raid/mps/mps_sas.c

2039

alloc_len = ((u16)csio->cdb_io.cdb_bytes[3] << 8) +

sys/dev/raid/mps/mps_sas_lsi.c

101

u16 reserved1[10]; /* 0-9 */

sys/dev/raid/mps/mps_sas_lsi.c

102

u16 serial_number[10]; /* 10-19 */

sys/dev/raid/mps/mps_sas_lsi.c

103

u16 reserved2[7]; /* 20-26 */

sys/dev/raid/mps/mps_sas_lsi.c

104

u16 model_number[20]; /* 27-46*/

sys/dev/raid/mps/mps_sas_lsi.c

105

u16 reserved3[209]; /* 47-255*/

sys/dev/raid/mps/mps_sas_lsi.c

114

static int mpssas_add_device(struct mps_softc *sc, u16 handle, u8 linkrate);

sys/dev/raid/mps/mps_sas_lsi.c

115

static int mpssas_get_sata_identify(struct mps_softc *sc, u16 handle,

sys/dev/raid/mps/mps_sas_lsi.c

119

u64 *sas_address, u16 handle, u32 device_info);

sys/dev/raid/mps/mps_sas_lsi.c

121

u16 handle);

sys/dev/raid/mps/mps_sas_lsi.c

128

u16 sz;

sys/dev/raid/mps/mps_sas_lsi.c

580

mpssas_add_device(struct mps_softc *sc, u16 handle, u8 linkrate){

sys/dev/raid/mps/mps_sas_lsi.c

588

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mps_sas_lsi.c

686

u64 *sas_address, u16 handle, u32 device_info)

sys/dev/raid/mps/mps_sas_lsi.c

759

mpssas_get_sata_identify(struct mps_softc *sc, u16 handle,

sys/dev/raid/mps/mps_sas_lsi.c

820

mpssas_volume_add(struct mps_softc *sc, u16 handle)

sys/dev/raid/mps/mps_sas_lsi.c

84

u16 event;

sys/dev/raid/mps/mps_sas_lsi.c

875

u16 volume_mapping_flags;

sys/dev/raid/mps/mps_sas_lsi.c

876

u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags);

sys/dev/raid/mps/mpsvar.h

139

u16 dpm_entry_num;

sys/dev/raid/mps/mpsvar.h

140

u16 dev_handle;

sys/dev/raid/mps/mpsvar.h

143

u16 id;

sys/dev/raid/mps/mpsvar.h

168

u16 dpm_entry_num;

sys/dev/raid/mps/mpsvar.h

169

u16 enc_handle;

sys/dev/raid/mps/mpsvar.h

170

u16 num_slots;

sys/dev/raid/mps/mpsvar.h

171

u16 start_slot;

sys/dev/raid/mps/mpsvar.h

184

u16 dpm_entry_num;

sys/dev/raid/mps/mpsvar.h

185

u16 dev_handle;

sys/dev/raid/mps/mpsvar.h

718

Mpi2SasDevicePage0_t *, u32 , u16 );

sys/dev/raid/mps/mpsvar.h

720

Mpi2DriverMappingPage0_t *, u16 );

sys/dev/raid/mps/mpsvar.h

723

u16 handle);

sys/dev/raid/mps/mpsvar.h

724

int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,

sys/dev/raid/mps/mpsvar.h

743

Mpi2DriverMappingPage0_t *, u16 );

sys/dev/raid/mps/mpsvar.h

747

unsigned int mps_mapping_get_sas_id(struct mps_softc *, uint64_t , u16);

sys/dev/raid/mps/mpsvar.h

749

u16 handle);

sys/dev/raid/mps/mpsvar.h

751

u16 handle);

sys/dev/raid/mps/mpsvar.h

753

u16 volHandle);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1025

u16 log_size)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1057

tbl_size = (1ULL << log_size) * sizeof(u16);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1102

struct ena_com_io_sq *io_sq, u16 cq_idx)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

116

ena_addr->mem_addr_high = (u16)((u64)addr >> 32);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1179

u16 qid;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1200

u16 dev_idx_to_host_tbl[ENA_TOTAL_NUM_QUEUES] = { (u16)-1 };

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1203

u16 i;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1238

u16 intr_delay_resolution)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

124

u16 size = ADMIN_SQ_SIZE(queue->q_depth);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1353

int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1373

u16 i;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1445

u16 depth = ena_dev->aenq.q_depth;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

146

u16 size = ADMIN_CQ_SIZE(queue->q_depth);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1579

u16 size;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

167

u16 size;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1828

void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1928

u16 group)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1949

u16 masked_head, processed = 0;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

215

u16 command_id, bool capture)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

2279

const u8 *key, u16 key_len, u32 init_val)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

2361

u16 *fields)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

243

u16 tail_masked, cmd_id;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

2431

u16 available_fields = 0;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

244

u16 queue_size_mask;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

245

u16 cnt;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

2489

u16 hash_fields)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

2493

u16 supported_fields;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

2525

u16 entry_idx, u16 entry_value)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

2623

int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 indr_tbl_log_size)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

2821

u16 delay_resolution;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

300

u16 i;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

468

u16 cmd_id;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

493

u16 comp_num = 0;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

494

u16 head_masked;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

712

static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset)

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

866

u16 exp_state)

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

1095

u16 size, buffers_num;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

114

u16 len; /**< Buffer length in bytes */

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

118

u16 len;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

119

u16 req_id;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

130

u16 mss;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

131

u16 l3_hdr_len;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

132

u16 l3_hdr_offset;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

133

u16 l4_hdr_len; /* In words */

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

138

u16 desc_stride_ctrl;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

140

u16 desc_list_entry_size;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

141

u16 descs_num_before_header;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

142

u16 descs_per_entry;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

166

u16 cur_rx_pkt_cdesc_count;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

168

u16 cur_rx_pkt_cdesc_start_idx;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

170

u16 q_depth;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

172

u16 qid;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

175

u16 idx;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

176

u16 head;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

177

u16 last_head_update;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

185

u16 next_to_use;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

186

u16 buffer_size;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

187

u16 buffers_num; /* Must be a power of 2 */

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

193

u16 idx;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

194

u16 descs_left_in_line;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

213

u16 q_depth;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

214

u16 qid;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

216

u16 idx;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

217

u16 tail;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

218

u16 next_to_comp;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

219

u16 llq_last_copy_tail;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

231

u16 head;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

242

u16 head;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

243

u16 tail;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

263

u16 q_depth;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

270

u16 curr_cmd_id;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

286

u16 head;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

291

u16 q_depth;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

300

u16 seq_num;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

308

u16 *host_rss_ind_tbl;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

312

u16 tbl_log_size;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

354

u16 stats_func; /* Selected function for extended statistic dump */

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

355

u16 stats_queue; /* Selected queue for extended statistic dump */

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

365

u16 intr_delay_resolution;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

386

u16 queue_size;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

387

u16 qid;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

482

void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

492

int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

662

int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

687

const u8 *key, u16 key_len, u32 init_val);

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

733

u16 hash_fields);

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

760

u16 *fields);

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

787

u16 entry_idx, u16 entry_value);

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

109

u16 header_len)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

114

u16 header_offset;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

226

ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

234

static inline u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

235

u16 *first_cdesc_idx)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

238

u16 count = 0, head_masked;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

377

u16 header_len = ena_tx_ctx->header_len;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

378

u16 num_bufs = ena_tx_ctx->num_bufs;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

379

u16 start_tail = io_sq->tail;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

40

u16 expected_phase, head_masked;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

41

u16 desc_phase;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

514

u16 cdesc_idx = 0;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

515

u16 nb_hw_desc;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

516

u16 i;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

559

u16 req_id)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

593

int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, u16 *req_id)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

597

u16 masked_head;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

69

u16 tail_masked;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

84

u16 dst_tail_mask;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

103

u16 tail, next_to_comp, cnt;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

114

u16 required_buffers)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

133

u16 tail;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

147

u16 unreported_comp, head;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

178

static inline void ena_com_comp_ack(struct ena_com_io_sq *io_sq, u16 elem)

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

53

u16 num_bufs;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

54

u16 req_id;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

58

u16 header_len;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

77

u16 descs;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

91

u16 req_id);

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.h

93

int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, u16 *req_id);

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

452

static __inline u16 RotR1(u16 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

457

static __inline u8 Lo8(u16 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

462

static __inline u8 Hi8(u16 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

467

static __inline u16 Lo16(u32 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

472

static __inline u16 Hi16(u32 val)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

477

static __inline u16 Mk16(u8 hi, u8 lo)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

479

return lo | (((u16) hi) << 8);

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

482

static __inline u16 Mk16_le(const u16 *v)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

487

static const u16 Sbox[256] = {

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

522

static __inline u16 _S_(u16 v)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

524

u16 t = Sbox[Hi8(v)];

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

530

static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

555

static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

556

u16 IV16)

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

560

u16 *PPK = (u16 *) &WEPSeed[4];

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

571

PPK[0] += _S_(PPK[5] ^ Mk16_le((const u16 *) &TK[0]));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

572

PPK[1] += _S_(PPK[0] ^ Mk16_le((const u16 *) &TK[2]));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

573

PPK[2] += _S_(PPK[1] ^ Mk16_le((const u16 *) &TK[4]));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

574

PPK[3] += _S_(PPK[2] ^ Mk16_le((const u16 *) &TK[6]));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

575

PPK[4] += _S_(PPK[3] ^ Mk16_le((const u16 *) &TK[8]));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

576

PPK[5] += _S_(PPK[4] ^ Mk16_le((const u16 *) &TK[10]));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

578

PPK[0] += RotR1(PPK[5] ^ Mk16_le((const u16 *) &TK[12]));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

579

PPK[1] += RotR1(PPK[0] ^ Mk16_le((const u16 *) &TK[14]));

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

590

WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((const u16 *) &TK[0])) >> 1);

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

89

u16 tx_ttak[5];

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

92

u16 rx_ttak[5];

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

950

if ((u16)(key->wk_keytsc) == 0 || key->wk_keytsc == 1) {

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

955

(u16) key->wk_keytsc);

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

973

u16 iv16;

sys/netproto/802_11/wlan_tkip/ieee80211_crypto_tkip.c

980

iv16 = (u16) ctx->rx_rsc;