bin/sh/exec.c

167

hasletter = true;

bin/sh/exec.c

171

return true;

games/adventure/save.c

146

sf->warned = true;

games/adventure/save.c

163

sf->warned = true;

games/adventure/save.c

208

sf->warned = true;

games/adventure/save.c

663

sf = savefile_open(outfile, true);

games/adventure/save.c

782

skipsum = true;

games/cgram/cgram.c

305

return true;

games/cgram/cgram.c

529

return true;

games/cgram/cgram.c

544

keypad(stdscr, true);

games/cribbage/cards.c

94

return (true);

games/cribbage/crib.c

116

playing = true;

games/cribbage/crib.c

201

flag = true;

games/cribbage/crib.c

240

flag = true;

games/cribbage/crib.c

272

iwon = true;

games/cribbage/crib.c

296

return (true);

games/cribbage/crib.c

298

return (true);

games/cribbage/crib.c

302

return (true);

games/cribbage/crib.c

337

prcrib(mycrib, true);

games/cribbage/crib.c

451

last = true; /* enable last flag */

games/cribbage/crib.c

453

prhand(ch, cnum, Compwin, true);

games/cribbage/crib.c

459

mego = true;

games/cribbage/crib.c

468

return (true);

games/cribbage/crib.c

474

played = true;

games/cribbage/crib.c

497

return (true);

games/cribbage/crib.c

505

ugo = true;

games/cribbage/crib.c

515

return (true);

games/cribbage/crib.c

545

return (true);

games/cribbage/crib.c

562

prhand(ch, cnum, Compwin, true);

games/cribbage/crib.c

570

return (true);

games/cribbage/crib.c

575

return (true);

games/cribbage/crib.c

603

return (true);

games/cribbage/crib.c

605

return (true);

games/cribbage/crib.c

608

return (true);

games/cribbage/crib.c

611

return (true);

games/cribbage/crib.c

613

return (true);

games/cribbage/crib.c

615

return (true);

games/cribbage/crib.c

73

explain = true;

games/cribbage/crib.c

76

quiet = true;

games/cribbage/crib.c

79

rflag = true;

games/cribbage/io.c

106

return (true);

games/cribbage/io.c

254

retval = true;

games/cribbage/io.c

288

retval = true;

games/cribbage/io.c

82

return (msgcrd(c, true, NULL, true));

games/cribbage/score.c

115

flag = true;

games/cribbage/score.c

223

run = true;

games/cribbage/score.c

259

run = true;

games/cribbage/score.c

308

got[crd.rank] = true;

games/cribbage/score.c

313

got[tbl[i].rank] = true;

games/cribbage/support.c

259

scorehand(h, d[k], CINHAND, true, false);

games/fortune/fortune/fortune.c

1054

did_noprobs = true;

games/fortune/fortune/fortune.c

1154

fp->read_tbl = true;

games/fortune/fortune/fortune.c

1349

Found_one = true;

games/fortune/fortune/fortune.c

1350

in_file = true;

games/fortune/fortune/fortune.c

164

WriteToDisk = true;

games/fortune/fortune/fortune.c

282

All_forts = true;

games/fortune/fortune/fortune.c

290

Equal_probs = true;

games/fortune/fortune/fortune.c

293

Find_files = true;

games/fortune/fortune/fortune.c

296

Long_only = true;

games/fortune/fortune/fortune.c

300

Offend = true;

games/fortune/fortune/fortune.c

303

Short_only = true;

games/fortune/fortune/fortune.c

307

Wait = true;

games/fortune/fortune/fortune.c

310

Match = true;

games/fortune/fortune/fortune.c

361

Fortunes_only = true;

games/fortune/fortune/fortune.c

439

return (true);

games/fortune/fortune/fortune.c

466

was_malloc = true;

games/fortune/fortune/fortune.c

482

was_malloc = true;

games/fortune/fortune/fortune.c

504

was_malloc = true;

games/fortune/fortune/fortune.c

721

return (true);

games/fortune/fortune/fortune.c

821

return (true);

games/grdc/grdc.c

62

forever = true;

games/grdc/grdc.c

74

scrol = true;

games/grdc/grdc.c

77

t12 = true;

games/hunt/huntd/driver.c

325

int true = 1;

games/hunt/huntd/driver.c

443

if (setsockopt(Server_socket, SOL_SOCKET, SO_REUSEPORT, &true,

games/hunt/huntd/driver.c

444

sizeof true) < 0)

games/phantasia/include.h

24

#define TRUE true

games/robots/extern.c

45

bool Full_clear = true; /* Lots of junk for init_field to clear */

games/robots/init_field.c

45

static bool first = true;

games/robots/main.c

161

return true;

games/robots/main.c

172

return true;

games/robots/main.c

61

Pattern_roll = true;

games/robots/main.c

63

Stand_still = true;

games/robots/main.c

65

Teleport = true;

games/robots/main.c

72

show_only = true;

games/robots/main.c

75

Real_time = true;

games/robots/main.c

81

Jump = true;

games/robots/main.c

84

Teleport = true;

games/robots/main.c

88

bad_arg = true;

games/robots/move.c

144

Running = true;

games/robots/move.c

149

leaveok(stdscr, true);

games/robots/move.c

159

Waiting = true;

games/robots/move.c

160

leaveok(stdscr, true);

games/robots/move.c

204

return true;

games/robots/move.c

221

return true;

games/robots/move.c

251

return true;

games/robots/move.c

257

return true;

games/robots/move.c

276

return true;

games/robots/move.c

99

leaveok(stdscr, true);

games/robots/move_robs.c

81

Dead = true;

games/robots/play_level.c

108

Was_bonus = true;

games/robots/play_level.c

73

Dead = true;

games/robots/play_level.c

97

Was_bonus = true;

games/robots/score.c

101

Newscore = true;

games/robots/score.c

113

Full_clear = true;

games/robots/score.c

124

done_show = true;

games/robots/score.c

94

Newscore = true;

games/sail/main.c

141

randomize = true;

games/sail/main.c

144

longfmt = true;

games/sail/main.c

147

nobells = true;

games/sail/pl_5.c

119

moved = true;

games/sail/pl_7.c

1038

case 2: done = true; break;

games/sail/pl_7.c

1068

ingame = true;

games/sail/pl_7.c

1102

shipselected = true;

games/sail/pl_7.c

1527

case 0: joinactive = true; break;

games/sail/pl_7.c

1528

case 1: startactive = true; break;

games/sail/pl_7.c

1535

optionsactive = true;

games/sail/pl_7.c

445

sc_hasprompt = true;

games/sail/pl_7.c

464

sc_hideprompt = true;

games/sail/pl_7.c

968

done = true;

lib/libc/citrus/citrus_iconv.c

88

isinit = true;

lib/libc/citrus/citrus_prop.c

226

obj->u.boolean = true;

lib/libc/gen/arc4random-compat.c

56

warned = true;

lib/libc/gen/arc4random-compat.c

66

warned = true;

lib/libc/gen/arc4random.c

126

need_init = true;

lib/libc/gen/wordexp.c

113

return (true);

lib/libc/gen/wordexp.c

324

need_sq = true;

lib/libc/gen/wordexp.c

327

have_sq = true;

lib/libc/gen/wordexp.c

331

need_dq = true;

lib/libc/gen/wordexp.c

334

have_dq = true;

lib/libc/gen/wordexp.c

338

need_cmd_old = true;

lib/libc/gen/wordexp.c

341

have_cmd = true;

lib/libc/gen/wordexp.c

349

need_par_end = true;

lib/libc/gen/wordexp.c

350

have_par_begin = true;

lib/libc/gen/wordexp.c

365

need_cmd_new = true;

lib/libc/gen/wordexp.c

366

have_cmd = true;

lib/libc/iconv/iconv.c

217

if (__iconv_get_list(&list, &sz, true))

lib/libc/locale/cXXrtomb_iconv.h

78

handle->cv_shared->ci_discard_ilseq = true;

lib/libc/locale/cXXrtomb_iconv.h

81

cs->initialized = true;

lib/libc/locale/mbrtocXX_iconv.h

80

handle->cv_shared->ci_discard_ilseq = true;

lib/libc/locale/mbrtocXX_iconv.h

83

cs->initialized = true;

lib/libc/stdlib/getenv.c

143

return (true);

lib/libc/stdlib/getenv.c

317

return (true);

lib/libc/stdlib/getenv.c

381

envVars[activeNdx].active = true;

lib/libc/stdlib/getenv.c

392

__clean_env(true);

lib/libc/stdlib/getenv.c

405

__clean_env(true);

lib/libc/stdlib/getenv.c

442

return (__findenv(name, nameLen, &envNdx, true));

lib/libc/stdlib/getenv.c

485

reuse = true;

lib/libc/stdlib/getenv.c

515

envVars[envNdx].active = true;

lib/libc/stdlib/getenv.c

624

if (__findenv(string, nameLen, &envNdx, true) != NULL) {

lib/libc/stdlib/getenv.c

645

envVars[envNdx].putenv = true;

lib/libc/stdlib/getenv.c

646

envVars[envNdx].active = true;

lib/libc/stdlib/getenv.c

678

while (__findenv(name, nameLen, &envNdx, true) != NULL) {

lib/libc/string/strcspn.c

61

charset[*(const unsigned char *)chars] = true;

lib/libc/string/strspn.c

61

charset[*(const unsigned char *)chars] = true;

lib/libc/string/strspn.c

63

for(s = str; charset[*(const unsigned char *)s] == true; s++)

lib/libcrypt/crypt-sha256.c

336

rounds_custom = true;

lib/libcrypt/crypt-sha512.c

367

rounds_custom = true;

lib/libnvmm/libnvmm.c

415

comm->event_commit = true;

lib/libnvmm/libnvmm.c

87

return true;

lib/libnvmm/libnvmm_x86.c

1119

.valid = true,

lib/libnvmm/libnvmm_x86.c

1120

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1121

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1124

.group1 = true,

lib/libnvmm/libnvmm_x86.c

1125

.immediate = true,

lib/libnvmm/libnvmm_x86.c

1130

.valid = true,

lib/libnvmm/libnvmm_x86.c

1131

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1132

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1133

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1135

.group1 = true,

lib/libnvmm/libnvmm_x86.c

1136

.immediate = true,

lib/libnvmm/libnvmm_x86.c

1142

.valid = true,

lib/libnvmm/libnvmm_x86.c

1143

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1144

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1145

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1147

.group1 = true,

lib/libnvmm/libnvmm_x86.c

1148

.immediate = true,

lib/libnvmm/libnvmm_x86.c

1158

.valid = true,

lib/libnvmm/libnvmm_x86.c

1159

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1160

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1163

.group3 = true,

lib/libnvmm/libnvmm_x86.c

1164

.immediate = true,

lib/libnvmm/libnvmm_x86.c

1169

.valid = true,

lib/libnvmm/libnvmm_x86.c

1170

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1171

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1172

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1174

.group3 = true,

lib/libnvmm/libnvmm_x86.c

1175

.immediate = true,

lib/libnvmm/libnvmm_x86.c

1185

.valid = true,

lib/libnvmm/libnvmm_x86.c

1186

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1187

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1190

.group11 = true,

lib/libnvmm/libnvmm_x86.c

1191

.immediate = true,

lib/libnvmm/libnvmm_x86.c

1196

.valid = true,

lib/libnvmm/libnvmm_x86.c

1197

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1198

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1199

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1201

.group11 = true,

lib/libnvmm/libnvmm_x86.c

1202

.immediate = true,

lib/libnvmm/libnvmm_x86.c

1212

.valid = true,

lib/libnvmm/libnvmm_x86.c

1213

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1214

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1221

.valid = true,

lib/libnvmm/libnvmm_x86.c

1222

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1223

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1224

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1230

.valid = true,

lib/libnvmm/libnvmm_x86.c

1231

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1239

.valid = true,

lib/libnvmm/libnvmm_x86.c

1240

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1242

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1252

.valid = true,

lib/libnvmm/libnvmm_x86.c

1253

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1254

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1261

.valid = true,

lib/libnvmm/libnvmm_x86.c

1262

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1263

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1264

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1270

.valid = true,

lib/libnvmm/libnvmm_x86.c

1271

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1279

.valid = true,

lib/libnvmm/libnvmm_x86.c

1280

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1282

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1292

.valid = true,

lib/libnvmm/libnvmm_x86.c

1293

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1294

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1301

.valid = true,

lib/libnvmm/libnvmm_x86.c

1302

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1303

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1304

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1310

.valid = true,

lib/libnvmm/libnvmm_x86.c

1311

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1319

.valid = true,

lib/libnvmm/libnvmm_x86.c

1320

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1322

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1332

.valid = true,

lib/libnvmm/libnvmm_x86.c

1333

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1334

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1341

.valid = true,

lib/libnvmm/libnvmm_x86.c

1342

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1343

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1344

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1350

.valid = true,

lib/libnvmm/libnvmm_x86.c

1351

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1359

.valid = true,

lib/libnvmm/libnvmm_x86.c

1360

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1362

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1372

.valid = true,

lib/libnvmm/libnvmm_x86.c

1373

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1374

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1381

.valid = true,

lib/libnvmm/libnvmm_x86.c

1382

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1383

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1384

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1394

.valid = true,

lib/libnvmm/libnvmm_x86.c

1395

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1396

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1403

.valid = true,

lib/libnvmm/libnvmm_x86.c

1404

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1405

.regtorm = true,

lib/libnvmm/libnvmm_x86.c

1406

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1412

.valid = true,

lib/libnvmm/libnvmm_x86.c

1413

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1421

.valid = true,

lib/libnvmm/libnvmm_x86.c

1422

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1424

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1430

.valid = true,

lib/libnvmm/libnvmm_x86.c

1431

.dmo = true,

lib/libnvmm/libnvmm_x86.c

1439

.valid = true,

lib/libnvmm/libnvmm_x86.c

1440

.dmo = true,

lib/libnvmm/libnvmm_x86.c

1442

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1448

.valid = true,

lib/libnvmm/libnvmm_x86.c

1449

.dmo = true,

lib/libnvmm/libnvmm_x86.c

1450

.todmo = true,

lib/libnvmm/libnvmm_x86.c

1457

.valid = true,

lib/libnvmm/libnvmm_x86.c

1458

.dmo = true,

lib/libnvmm/libnvmm_x86.c

1459

.todmo = true,

lib/libnvmm/libnvmm_x86.c

1460

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1470

.valid = true,

lib/libnvmm/libnvmm_x86.c

1471

.movs = true,

lib/libnvmm/libnvmm_x86.c

1478

.valid = true,

lib/libnvmm/libnvmm_x86.c

1479

.movs = true,

lib/libnvmm/libnvmm_x86.c

1480

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1490

.valid = true,

lib/libnvmm/libnvmm_x86.c

1491

.stos = true,

lib/libnvmm/libnvmm_x86.c

1498

.valid = true,

lib/libnvmm/libnvmm_x86.c

1499

.stos = true,

lib/libnvmm/libnvmm_x86.c

1500

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1510

.valid = true,

lib/libnvmm/libnvmm_x86.c

1511

.lods = true,

lib/libnvmm/libnvmm_x86.c

1518

.valid = true,

lib/libnvmm/libnvmm_x86.c

1519

.lods = true,

lib/libnvmm/libnvmm_x86.c

1520

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1532

.valid = true,

lib/libnvmm/libnvmm_x86.c

1533

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1535

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1542

.valid = true,

lib/libnvmm/libnvmm_x86.c

1543

.regmodrm = true,

lib/libnvmm/libnvmm_x86.c

1545

.szoverride = true,

lib/libnvmm/libnvmm_x86.c

1599

[true] = {

lib/libnvmm/libnvmm_x86.c

1729

[true] = {

lib/libnvmm/libnvmm_x86.c

2146

noindex = true;

lib/libnvmm/libnvmm_x86.c

2152

nobase = true;

lib/libnvmm/libnvmm_x86.c

2598

rexpref->present = true;

lib/libnvmm/libnvmm_x86.c

2773

mem->write = true;

lib/libnvmm/libnvmm_x86.c

2806

mem->write = true;

lib/libnvmm/libnvmm_x86.c

2832

mem->write = true;

lib/libnvmm/libnvmm_x86.c

2864

mem->write = true;

lib/libnvmm/libnvmm_x86.c

2897

mem->write = true;

lib/libnvmm/libnvmm_x86.c

3236

mem.write = true;

lib/libnvmm/libnvmm_x86.c

3246

mem.write = true;

lib/libnvmm/libnvmm_x86.c

674

mem.write = true;

lib/libnvmm/libnvmm_x86.c

776

psld = true;

lib/libnvmm/libnvmm_x86.c

899

.readreg = true,

lib/libnvmm/libnvmm_x86.c

904

.readreg = true,

lib/libnvmm/libnvmm_x86.c

909

.readreg = true,

lib/libnvmm/libnvmm_x86.c

910

.backprop = true,

lib/libnvmm/libnvmm_x86.c

915

.readreg = true,

lib/libnvmm/libnvmm_x86.c

920

.readreg = true,

lib/libnvmm/libnvmm_x86.c

925

.notouch = true,

lib/libnvmm/libnvmm_x86.c

930

.notouch = true,

lib/libssh/openbsd-compat/getrrsetbyname-ldns.c

106

ldns_resolver_set_debug(ldns_res, true);

lib/libssh/openbsd-compat/getrrsetbyname-ldns.c

109

ldns_resolver_set_dnssec(ldns_res, true); /* Use DNSSEC */

lib/libutil/gr_util.c

388

return (true);

lib/libutil/gr_util.c

605

return (true);

libexec/rtld-elf/map_object.c

305

obj->phdr_alloc = true;

libexec/rtld-elf/rtld.c

1159

obj->textrel = true;

libexec/rtld-elf/rtld.c

1163

obj->symbolic = true;

libexec/rtld-elf/rtld.c

1223

obj->z_origin = true;

libexec/rtld-elf/rtld.c

1225

obj->symbolic = true;

libexec/rtld-elf/rtld.c

1227

obj->textrel = true;

libexec/rtld-elf/rtld.c

1229

obj->bind_now = true;

libexec/rtld-elf/rtld.c

1231

obj->static_tls = true;

libexec/rtld-elf/rtld.c

1236

obj->z_noopen = true;

libexec/rtld-elf/rtld.c

1238

obj->z_origin = true;

libexec/rtld-elf/rtld.c

1242

obj->bind_now = true;

libexec/rtld-elf/rtld.c

1244

obj->z_nodelete = true;

libexec/rtld-elf/rtld.c

1246

obj->z_loadfltr = true;

libexec/rtld-elf/rtld.c

1248

obj->z_interpose = true;

libexec/rtld-elf/rtld.c

1250

obj->z_nodeflib = true;

libexec/rtld-elf/rtld.c

1395

obj->note_present = true;

libexec/rtld-elf/rtld.c

1441

obj->crt_no_init = true;

libexec/rtld-elf/rtld.c

1475

return true;

libexec/rtld-elf/rtld.c

1796

skip = true;

libexec/rtld-elf/rtld.c

1853

root->dag_inited = true;

libexec/rtld-elf/rtld.c

1872

elm->obj->ref_nodel = true;

libexec/rtld-elf/rtld.c

1899

objtmp.rtld = true;

libexec/rtld-elf/rtld.c

1915

relocate_objects(&objtmp, true, &objtmp, 0, NULL);

libexec/rtld-elf/rtld.c

1974

obj->init_scanned = true;

libexec/rtld-elf/rtld.c

1997

obj->on_fini_list = true;

libexec/rtld-elf/rtld.c

2053

obj->filtees_loaded = true;

libexec/rtld-elf/rtld.c

2110

obj->z_interpose = true;

libexec/rtld-elf/rtld.c

2443

elm->obj->init_done = true;

libexec/rtld-elf/rtld.c

2635

obj->relocated = true;

libexec/rtld-elf/rtld.c

2647

if (obj->textrel && reloc_textrel_prot(obj, true) != 0)

libexec/rtld-elf/rtld.c

2697

obj->relro_protected = true;

libexec/rtld-elf/rtld.c

3144

obj->z_nodelete = obj->ref_nodel = true;

libexec/rtld-elf/rtld.c

4112

return (true);

libexec/rtld-elf/rtld.c

4125

return (true);

libexec/rtld-elf/rtld.c

4159

return (true);

libexec/rtld-elf/rtld.c

4274

needed->obj->traced = true;

libexec/rtld-elf/rtld.c

4504

obj->static_tls_copied = true;

libexec/rtld-elf/rtld.c

4585

return true;

libexec/rtld-elf/rtld.c

4591

obj->tls_static = true;

libexec/rtld-elf/rtld.c

4592

return true;

libexec/rtld-elf/rtld.c

4614

obj->tls_static = true;

libexec/rtld-elf/rtld.c

4616

return true;

libexec/rtld-elf/rtld.c

4766

obj->ver_checked = true;

libexec/rtld-elf/rtld.c

4967

obj->static_tls_copied = true;

libexec/rtld-elf/rtld.c

532

obj_main->mainprog = true;

libexec/rtld-elf/rtld.c

740

obj_main->crt_no_init = true;

libexec/rtld-elf/rtld.c

796

def = find_symdef(ELF_R_SYM(rel->r_info), obj, &defobj, true, NULL,

libexec/rtld-elf/rtld.c

961

res2 = origin_subst_one(res1, "$OSNAME", uts.sysname, true);

libexec/rtld-elf/rtld.c

962

res3 = origin_subst_one(res2, "$OSREL", uts.release, true);

libexec/rtld-elf/rtld.c

963

res4 = origin_subst_one(res3, "$PLATFORM", uts.machine, true);

libexec/rtld-elf/x86_64/reloc.c

191

obj->non_plt_gnu_ifunc = true;

libexec/rtld-elf/x86_64/reloc.c

307

obj->irelative_nonplt = true;

libexec/rtld-elf/x86_64/reloc.c

346

obj->irelative = true;

libexec/rtld-elf/x86_64/reloc.c

381

obj->gnu_ifunc = true;

libexec/rtld-elf/x86_64/reloc.c

397

obj->jmpslots_done = true;

sbin/dumpon/dumpon.c

61

is_dumpoff = true;

sbin/fsck_hammer2/destroy.c

486

ForceOpt = true;

sbin/fsck_hammer2/destroy.c

97

failed = true;

sbin/fsck_hammer2/reconstruct.c

134

failed = true;

sbin/fsck_hammer2/reconstruct.c

171

found = true;

sbin/fsck_hammer2/reconstruct.c

183

found = true;

sbin/fsck_hammer2/reconstruct.c

195

found = true;

sbin/fsck_hammer2/reconstruct.c

461

found = true;

sbin/fsck_hammer2/reconstruct.c

469

found = true;

sbin/fsck_hammer2/reconstruct.c

484

found = true;

sbin/fsck_hammer2/reconstruct.c

494

found = true;

sbin/fsck_hammer2/reconstruct.c

525

ForceOpt = true;

sbin/fsck_hammer2/reconstruct.c

92

failed = true;

sbin/fsck_hammer2/test.c

1349

failed = true;

sbin/fsck_hammer2/test.c

1355

failed = true;

sbin/fsck_hammer2/test.c

1364

failed = true;

sbin/fsck_hammer2/test.c

1372

failed = true;

sbin/fsck_hammer2/test.c

1378

failed = true;

sbin/fsck_hammer2/test.c

278

failed = true;

sbin/fsck_hammer2/test.c

318

failed = true;

sbin/fsck_hammer2/test.c

320

print_blockref_stats(&bstats, true);

sbin/fsck_hammer2/test.c

355

failed = true;

sbin/fsck_hammer2/test.c

360

failed = true;

sbin/fsck_hammer2/test.c

371

found = true;

sbin/fsck_hammer2/test.c

373

found = true;

sbin/fsck_hammer2/test.c

392

failed = true;

sbin/fsck_hammer2/test.c

394

print_blockref_stats(&bstats, true);

sbin/fsck_hammer2/test.c

401

failed = true;

sbin/fsck_hammer2/test.c

894

failed = true;

sbin/fsck_hammer2/test.c

939

failed = true;

sbin/fsck_hammer2/test.c

949

failed = true;

sbin/fsck_hammer2/test.c

964

failed = true;

sbin/fsck_hammer2/test.c

975

failed = true;

sbin/fsck_msdosfs/fat.c

396

entry->dirty = true;

sbin/fsck_msdosfs/fat.c

427

entry->dirty = true;

sbin/fsck_msdosfs/fat.c

478

p = fat_get_fat32_cached_ptr(fat, cl, true);

sbin/fsck_msdosfs/fat.c

632

fat->is_mmapped = true;

sbin/fsck_msdosfs/fat.c

649

fat->use_cache = true;

sbin/fsck_msdosfs/fat.c

771

true) != FSOK) {

sbin/gpt/add.c

220

*is_sector = true;

sbin/gpt/add.c

229

*is_sector = true;

sbin/gpt/create.c

239

force = true;

sbin/gpt/create.c

242

primary_only = true;

sbin/gpt/create.c

290

with_boot = true;

sbin/gpt/create.c

293

with_trim = true;

sbin/gpt/create.c

296

force = true;

sbin/gpt/create.c

346

destroy(fd, true);

sbin/gpt/destroy.c

91

recoverable = true;

sbin/gpt/gpt.c

668

if (gpt_read_table(true) < 0)

sbin/gpt/gpt.c

767

readonly = true;

sbin/gpt/label.c

180

all = true;

sbin/gpt/migrate.c

470

force = true;

sbin/gpt/migrate.c

478

keep_slice = true;

sbin/gpt/remove.c

150

all = true;

sbin/gpt/show.c

213

show_guid = true;

sbin/gpt/show.c

216

show_label = true;

sbin/gpt/show.c

219

show_uuid = true;

sbin/ifconfig/af_inet6.c

359

newaddr = true;

sbin/ifconfig/ifclone.c

153

printifname = true;

sbin/ifconfig/ifconfig.c

1021

clearaddr = true;

sbin/ifconfig/ifconfig.c

1170

printifname = true;

sbin/ifconfig/ifconfig.c

1246

allfamilies = true;

sbin/ifconfig/ifconfig.c

387

all = true;

sbin/ifconfig/ifconfig.c

390

downonly = true;

sbin/ifconfig/ifconfig.c

401

printkeys = true;

sbin/ifconfig/ifconfig.c

404

namesonly = true;

sbin/ifconfig/ifconfig.c

407

supmedia = true;

sbin/ifconfig/ifconfig.c

410

noload = true;

sbin/ifconfig/ifconfig.c

413

uponly = true;

sbin/ifconfig/ifconfig.c

416

verbose = true;

sbin/ifconfig/ifconfig.c

622

return (true);

sbin/ifconfig/ifconfig.c

654

nomatched = true;

sbin/ifconfig/ifconfig.c

71

bool newaddr = true;

sbin/ifconfig/ifconfig.c

940

setaddr = true;

sbin/ifconfig/ifconfig.c

942

clearaddr = true;

sbin/ifconfig/ifconfig.c

994

setmask = true;

sbin/ifconfig/ifieee80211.c

4245

print_channels(s, chaninfo, true /* allchans */,

sbin/ifconfig/ifieee80211.c

4246

true /* verbose */);

sbin/ifconfig/ifieee80211.c

4305

list_channels(s, true);

sbin/ifconfig/ifieee80211.c

524

print_channels(s, &dc->dc_chaninfo, true /* allchans */,

sbin/ifconfig/ifieee80211.c

525

true /* verbose */);

sbin/ifconfig/ifieee80211.c

545

print_channels(s, &req->chaninfo, true /* allchans */,

sbin/ifconfig/ifieee80211.c

546

true /* verbose */);

sbin/ifconfig/iflagg.c

165

isport = true;

sbin/ifconfig/ifwg.c

108

wg_cb_registered = true; \

sbin/iscontrol/iscontrol.c

106

.dataPDUInOrder = true,

sbin/iscontrol/iscontrol.c

107

.dataSequenceInOrder = true,

sbin/iscontrol/iscontrol.c

109

.initialR2T = true,

sbin/iscontrol/iscontrol.c

110

.immediateData = true,

sbin/mountd/mountd.c

1049

int true = 1;

sbin/mountd/mountd.c

1057

if (!xdr_bool(xdrsp, &true))

sbin/mountd/mountd.c

1067

if (!xdr_bool(xdrsp, &true))

sbin/mountd/mountd.c

1078

if (!xdr_bool(xdrsp, &true))

sbin/mountd/mountd.c

1085

if (!xdr_bool(xdrsp, &true))

sbin/mountd/mountd.c

983

int true = 1;

sbin/mountd/mountd.c

989

if (!xdr_bool(xdrsp, &true))

sbin/newfs_msdos/newfs_msdos.c

92

o.align = true;

sbin/rcorder/rcorder.c

77

#define SET true

sbin/vquota/vquota.c

165

retval = true;

sbin/vquota/vquota.c

483

return true;

sbin/vquota/vquota.c

558

return (rv == true);

share/examples/libusb20/control.c

363

do_request = true;

sys/bus/mmc/mmc.c

1676

ivar->cmd6_time, true);

sys/bus/mmc/mmc.c

1867

changed = true;

sys/bus/mmc/mmc.c

1872

changed = true;

sys/bus/mmc/mmc.c

1875

} while (changed == true);

sys/bus/mmc/mmc.c

711

ivar->cmd6_time, true);

sys/bus/mmc/mmc.c

786

EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));

sys/bus/u4b/storage/umass.c

2756

return (true);

sys/bus/u4b/storage/umass.c

2788

return (true); /* success */

sys/bus/u4b/storage/umass.c

2846

return (true); /* success */

sys/bus/u4b/storage/umass.c

2911

return (true); /* success */

sys/bus/u4b/storage/umass.c

2963

return (true); /* Execute command */

sys/cpu/x86_64/misc/db_disasm.c

1431

db_format_radix(tbuf, 24, (unsigned int)imm, true);

sys/crypto/chachapoly.c

191

ret = true;

sys/crypto/chachapoly.c

213

_chacha20poly1305_init(&ctx, true, nonce, key);

sys/crypto/chachapoly.c

374

_chacha20poly1305_init(&ctx, true, nonce, key);

sys/crypto/cryptoapi/cryptoapi.c

1126

session->cipher->crypt(session->context, data, datalen, iv2, true);

sys/crypto/cryptoapi/cryptoapi.c

382

return true;

sys/dev/acpica/acpi_cpu_cstate.c

494

cpuhelper_assert(sc->cst_cpuid, true);

sys/dev/acpica/acpi_thinkpad/acpi_thinkpad.c

1346

return (acpi_thinkpad_privacyguard_acpi_call(sc, true, &arg));

sys/dev/agp/intel-gtt.c

1694

return true;

sys/dev/apple/smc/smc.c

1117

return (true);

sys/dev/apple/smc/smc.c

1120

return (true);

sys/dev/crypto/tpm/tpm20.c

231

return (tpm20_save_state(dev, true));

sys/dev/crypto/tpm/tpm_crb.c

252

return (true);

sys/dev/crypto/tpm/tpm_crb.c

256

return (true);

sys/dev/crypto/tpm/tpm_crb.c

279

return (true);

sys/dev/crypto/tpm/tpm_crb.c

303

return (true);

sys/dev/crypto/tpm/tpm_tis.c

255

return (true);

sys/dev/crypto/tpm/tpm_tis.c

268

return (true);

sys/dev/crypto/tpm/tpm_tis.c

312

return (true);

sys/dev/crypto/tpm/tpm_tis.c

332

return (true);

sys/dev/crypto/tpm/tpm_tis.c

357

return (true);

sys/dev/crypto/tpm/tpm_tis.c

395

return (true);

sys/dev/disk/dm/dm_ioctl.c

649

if (prop_array_get_uint64(array, i, &tmp) == true)

sys/dev/disk/iscsi/initiator/isc_cam.c

75

xpt_release_devq(sp->cam_path, 1, true);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

140

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

205

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

362

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

380

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

424

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

442

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

485

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

496

return true;

sys/dev/drm/amd/amdgpu/amdgpu_acp.c

519

bool enable = state == AMD_PG_STATE_GATE ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

294

n->enabled = true;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

301

n->enabled = true;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

567

return true;

sys/dev/drm/amd/amdgpu/amdgpu_acpi.c

795

atif->functions.system_params = true;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

300

r = amdgpu_bo_reserve(bo, true);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

347

amdgpu_bo_reserve(bo, true);

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd.c

518

return true;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

438

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

538

retval = true;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

557

return true;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

603

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

632

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

651

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

683

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

551

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

650

retval = true;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

670

return true;

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

709

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

742

while (true) {

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1041

ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1043

ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE) ? false : true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1061

ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1063

ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE) ? false : true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1496

return true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1682

return true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1746

return true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

187

gpio.valid = true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

286

return true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

464

router.ddc_valid = true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

472

router.cd_valid = true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

562

return true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

70

i2c.hw_capable = true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

75

i2c.mm_i2c = true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

82

i2c.valid = true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

938

return true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

960

return true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

987

return true;

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

47

return true;

sys/dev/drm/amd/amdgpu/amdgpu_benchmark.c

145

r = amdgpu_bo_reserve(sobj, true);

sys/dev/drm/amd/amdgpu/amdgpu_benchmark.c

153

r = amdgpu_bo_reserve(dobj, true);

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

120

return true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

149

return true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

189

return true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

219

return true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

309

found = true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

328

found = true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

358

return true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

432

return true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

480

adev->is_atom_fw = (adev->asic_type >= CHIP_VEGA10) ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

481

return true;

sys/dev/drm/amd/amdgpu/amdgpu_bios.c

77

return true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

258

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

274

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

288

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

302

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

306

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

316

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

324

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

336

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

344

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

361

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

365

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

386

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

391

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

408

info->is_kicker = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1010

broken_edid = true; /* defer use_digital to later */

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1054

if ((ret == connector_status_connected) && (amdgpu_connector->use_digital == true))

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1092

amdgpu_connector->detected_by_load = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1097

amdgpu_connector->use_digital = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1130

if (amdgpu_connector->use_digital == true) {

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1156

amdgpu_connector->use_digital = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1308

found = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1321

return true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1383

if (amdgpu_display_ddc_probe(amdgpu_connector, true))

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1532

amdgpu_connector->shared_ddc = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1533

shared_ddc = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1550

is_dp_bridge = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1585

has_aux = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1597

connector->interlace_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1598

connector->doublescan_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1599

amdgpu_connector->dac_load_detect = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1640

connector->interlace_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1642

connector->doublescan_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1646

amdgpu_connector->dac_load_detect = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1676

amdgpu_connector->dac_load_detect = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1685

connector->interlace_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1686

connector->doublescan_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1696

amdgpu_connector->dac_load_detect = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1705

connector->interlace_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1706

connector->doublescan_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1747

amdgpu_connector->dac_load_detect = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1752

connector->interlace_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1754

connector->doublescan_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1795

connector->interlace_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1797

connector->doublescan_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1811

has_aux = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1839

connector->interlace_allowed = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

1853

has_aux = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

226

connected = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

405

mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

488

new_coherent_mode = val ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

574

amdgpu_connector->dac_load_detect = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

915

amdgpu_connector->detected_by_load = true;

sys/dev/drm/amd/amdgpu/amdgpu_connectors.c

959

return true;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1094

true);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1113

r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1241

p->ctx->preamble_presented = true;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1315

reserved_buffers = true;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1367

r = dma_fence_wait_timeout(fence, true, timeout);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1500

r = dma_fence_wait_timeout(fence, true, timeout);

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

1560

r = dma_fence_wait_any_timeout(array, fence_count, true, timeout,

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

398

.interruptible = true,

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

452

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

502

return true;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

528

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

53

p->uf_entry.tv.shared = true;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

553

binding_userptr = true;

sys/dev/drm/amd/amdgpu/amdgpu_cs.c

616

r = ttm_eu_reserve_buffers(&p->ticket, &p->validated, true,

sys/dev/drm/amd/amdgpu/amdgpu_ctx.c

523

r = dma_fence_wait(other, true);

sys/dev/drm/amd/amdgpu/amdgpu_debugfs.c

204

return amdgpu_debugfs_process_reg_op(true, f, buf, size, pos);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

111

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1160

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1264

adev->enable_virtual_display = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1497

r = amdgpu_virt_request_full_gpu(adev, true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1519

adev->ip_blocks[i].status.valid = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1522

adev->ip_blocks[i].status.valid = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1550

adev->ip_blocks[i].status.hw = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1572

adev->ip_blocks[i].status.hw = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1603

adev->ip_blocks[i].status.hw = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1643

adev->ip_blocks[i].status.sw = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1662

adev->ip_blocks[i].status.hw = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1696

amdgpu_virt_release_full_gpu(adev, true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1831

adev->ip_blocks[i].status.late_initialized = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2000

if (!amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, true))

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2001

adev->gfx.gfx_off_state = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2460

adev->pm.ac_power = power_supply_is_system_supplied() > 0 ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2520

runtime = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2625

adev->accel_working = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2658

adev->fictitious_range_registered = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2732

adev->shutdown = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2812

adev->in_suspend = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2835

r = amdgpu_bo_reserve(aobj, true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2848

r = amdgpu_bo_reserve(robj, true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

2947

r = amdgpu_bo_reserve(aobj, true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3023

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3026

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3036

asic_hang = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3085

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3097

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3243

need_full_reset = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3292

need_full_reset = true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3318

r = amdgpu_virt_request_full_gpu(adev, true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3346

amdgpu_virt_release_full_gpu(adev, true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3376

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

3424

r = amdgpu_device_reset_sriov(adev, job ? false : true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

760

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

764

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

770

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

783

return true;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

858

bool is_os_64 = (sizeof(void *) == 8) ? true : false;

sys/dev/drm/amd/amdgpu/amdgpu_device.c

979

amdgpu_device_resume(dev, true, true);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

987

amdgpu_device_suspend(dev, true, true);

sys/dev/drm/amd/amdgpu/amdgpu_display.c

131

r = amdgpu_bo_reserve(work->old_abo, true);

sys/dev/drm/amd/amdgpu/amdgpu_display.c

284

active = true;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

292

adev->have_disp_power_ref = true;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

484

return true;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

63

return true;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

656

return true;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

734

return true;

sys/dev/drm/amd/amdgpu/amdgpu_display.c

781

bool in_vbl = true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

230

return true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

232

return true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

234

return true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

236

return true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

238

return true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

253

return true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

379

adev->pm.dpm.fan.ucode_fan_control = true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

488

adev->pm.dpm.power_control = true;

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

837

adev->pm.no_fan = true;

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1104

return amdgpu_device_suspend(drm_dev, true, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1119

return amdgpu_device_resume(drm_dev, true, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1127

return amdgpu_device_suspend(drm_dev, false, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1135

return amdgpu_device_resume(drm_dev, false, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1143

return amdgpu_device_suspend(drm_dev, true, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

1151

return amdgpu_device_resume(drm_dev, false, true);

sys/dev/drm/amd/amdgpu/amdgpu_drv.c

931

supports_atomic = true;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

211

return true;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

216

return true;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

233

return true;

sys/dev/drm/amd/amdgpu/amdgpu_encoders.c

238

return true;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

120

ret = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

245

info->skip_vt_switch = true;

sys/dev/drm/amd/amdgpu/amdgpu_fb.c

424

return true;

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

267

return true;

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

399

ring->fence_drv.initialized = true;

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

621

return true;

sys/dev/drm/amd/amdgpu/amdgpu_gart.c

178

r = amdgpu_bo_reserve(adev->gart.bo, true);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

172

tv.shared = true;

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

197

amdgpu_bo_fence(bo, fence, true);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

291

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

340

r = amdgpu_bo_reserve(bo, true);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

445

ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true,

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

620

r = ttm_eu_reserve_buffers(&ticket, &list, true, &duplicates);

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

735

amdgpu_vm_bo_invalidate(adev, robj, true);

sys/dev/drm/amd/amdgpu/amdgpu_gfx.c

251

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/amdgpu_gfx.c

299

r = amdgpu_bo_reserve(kiq->eop_obj, true);

sys/dev/drm/amd/amdgpu/amdgpu_ib.c

173

need_pipe_sync = true;

sys/dev/drm/amd/amdgpu/amdgpu_ib.c

294

adev->ib_pool_ready = true;

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

163

reservation_object_wait_timeout_rcu(resv, true, false,

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

240

seqno, true);

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

304

needs_flush = true;

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

365

needs_flush = true;

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

369

needs_flush = true;

sys/dev/drm/amd/amdgpu/amdgpu_ids.c

445

job->vm_needs_flush = true;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

215

return true;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

219

return true;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

250

adev->irq.msi_enabled = true;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

260

adev->ddev->vblank_disable_immediate = true;

sys/dev/drm/amd/amdgpu/amdgpu_irq.c

273

adev->irq.installed = true;

sys/dev/drm/amd/amdgpu/amdgpu_kms.c

1064

BUG_ON(amdgpu_bo_reserve(adev->virt.csa_obj, true));

sys/dev/drm/amd/amdgpu/amdgpu_mn.c

229

true, false, MAX_SCHEDULE_TIMEOUT);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

119

return true;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

267

free = true;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

365

if (likely(amdgpu_bo_reserve(*bo, true) == 0)) {

sys/dev/drm/amd/amdgpu/amdgpu_object.c

395

return true;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

404

return true;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

411

return true;

sys/dev/drm/amd/amdgpu/amdgpu_object.c

656

amdgpu_bo_fence(bo, *fence, true);

sys/dev/drm/amd/amdgpu/amdgpu_object.c

721

true, false);

sys/dev/drm/amd/amdgpu/amdgpu_object.h

212

return true;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1476

adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, true);

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1748

adev->pm.dpm.thermal_active = true;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

1764

true : false;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

2099

adev->pm.sysfs_initialized = true;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

421

adev->pp_force_state_enabled = true;

sys/dev/drm/amd/amdgpu/amdgpu_pm.c

76

adev->pm.ac_power = true;

sys/dev/drm/amd/amdgpu/amdgpu_prime.c

316

ret = amdgpu_bo_reserve(bo, true);

sys/dev/drm/amd/amdgpu/amdgpu_prime.c

362

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_psp.c

537

return true;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

170

return true;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

193

return true;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

200

return true;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

217

return true;

sys/dev/drm/amd/amdgpu/amdgpu_sa.c

270

return true;

sys/dev/drm/amd/amdgpu/amdgpu_sync.c

146

return true;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

142

adev->mman.mem_global_referenced = true;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1429

return true;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1553

return true;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1560

return true;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1797

adev->mman.initialized = true;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

1800

adev->mman.bdev.no_retry = true;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2111

job->vm_needs_flush = true;

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

472

resv, &next, false, true);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

541

r = ttm_bo_move_accel_cleanup(bo, fence, true, new_mem);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

780

mem->bus.is_iomem = true;

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

268

return true;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1035

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1075

true, false,

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1148

return amdgpu_uvd_send_msg(ring, bo, true, fence);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1218

amdgpu_dpm_enable_uvd(adev, true);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

1254

r = amdgpu_uvd_get_destroy_msg(ring, 1, true, &fence);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

274

adev->uvd.address_64_bit = true;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

868

ctx->has_msg_cmd = true;

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1129

r = amdgpu_vce_get_destroy_msg(ring, 1, true, &fence);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

368

amdgpu_dpm_enable_vce(adev, true);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

372

amdgpu_gfx_off_ctrl(adev, true);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

391

amdgpu_dpm_enable_uvd(adev, true);

sys/dev/drm/amd/amdgpu/amdgpu_virt.c

130

adev->enable_virtual_display = true;

sys/dev/drm/amd/amdgpu/amdgpu_virt.c

84

csa_tv.shared = true;

sys/dev/drm/amd/amdgpu/amdgpu_virt.c

89

r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1072

has_compute_vm_bug = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1075

has_compute_vm_bug = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1119

return true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1158

gds_switch_needed = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1159

vm_flush_needed = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1160

pasid_mapping_needed = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1403

r = amdgpu_sync_wait(&sync, true);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1559

amdgpu_bo_fence(root, fence, true);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1766

cursor.entry->huge = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

1925

amdgpu_bo_fence(vm->root.base.bo, f, true);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2283

reservation_object_wait_timeout_rcu(resv, true, false,

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2394

clear = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2623

bool valid = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2893

bo_base->moved = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

305

vm_bo->moved = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3079

vm->pte_support_ats = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3097

r = amdgpu_bo_reserve(root, true);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3175

r = amdgpu_bo_reserve(vm->root.base.bo, true);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3346

r = amdgpu_bo_reserve(root, true);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3380

return true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

3392

return true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

500

return true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

532

return true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

552

return true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

685

entry->tv.shared = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

730

vm->bulk_moveable = true;

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

816

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

889

amdgpu_bo_fence(bo, fence, true);

sys/dev/drm/amd/amdgpu/atom.c

1402

return true;

sys/dev/drm/amd/amdgpu/atom.c

1419

return true;

sys/dev/drm/amd/amdgpu/atom.c

622

ctx->abort = true;

sys/dev/drm/amd/amdgpu/atom.c

746

ctx->abort = true;

sys/dev/drm/amd/amdgpu/atombios_crtc.c

568

return true;

sys/dev/drm/amd/amdgpu/atombios_crtc.c

572

return true;

sys/dev/drm/amd/amdgpu/atombios_dp.c

196

amdgpu_connector->ddc_bus->has_aux = true;

sys/dev/drm/amd/amdgpu/atombios_dp.c

456

return true;

sys/dev/drm/amd/amdgpu/atombios_dp.c

615

clock_recovery = true;

sys/dev/drm/amd/amdgpu/atombios_dp.c

680

channel_eq = true;

sys/dev/drm/amd/amdgpu/atombios_dp.c

738

dp_info.tp3_supported = true;

sys/dev/drm/amd/amdgpu/atombios_dp.c

76

amdgpu_atombios_copy_swap(base, send, send_bytes, true);

sys/dev/drm/amd/amdgpu/atombios_encoders.c

1278

return true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

1284

return true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

1431

amdgpu_dig_connector->edp_on = true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

1814

return true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

2136

lvds->linkb = true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

2197

bad_record = true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

2218

dig->coherent_mode = true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

2222

dig->linkb = true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

348

return true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

385

return true;

sys/dev/drm/amd/amdgpu/atombios_encoders.c

882

is_dp = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1197

pi->fan_is_controlled_by_smc = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1379

pi->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1415

ret = ci_thermal_enable_alert(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

1545

want_thermal_protection = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1549

want_thermal_protection = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1554

want_thermal_protection = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

1702

ret = ci_enable_sclk_mclk_dpm(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

2483

voltage_found = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2500

voltage_found = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2641

patch = ((tmp & 0x0000f00) == 0x300) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3076

memory_level->StutterEnable = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3087

memory_level->EdcReadEnable = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3091

memory_level->EdcWriteEnable = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3094

if (ci_get_mclk_frequency_ratio(memory_clock, true) >=

sys/dev/drm/amd/amdgpu/ci_dpm.c

3096

dll_state_on = ((RREG32(mmMC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3098

dll_state_on = ((RREG32(mmMC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3104

dll_state_on = ((RREG32(mmMC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3531

dpm_table->dpm_levels[index].enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3628

(i == 0) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3641

(i == 0) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3651

pi->dpm_table.vddc_table.dpm_levels[i].enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3660

pi->dpm_table.vddci_table.dpm_levels[i].enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3670

pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

375

pi->caps_power_containment = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

383

pi->caps_cac = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3859

dpm_table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

387

pi->enable_bapm_feature = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

3878

pcie_table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

388

pi->enable_tdc_limit_feature = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

389

pi->enable_pkg_pwr_tracking_feature = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4103

pi->uvd_enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4240

ret = ci_enable_uvd_dpm(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4281

ret = ci_enable_vce_dpm(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

4558

bool result = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

4691

patch = ((tmp & 0x0000f00) == 0x300) ? true : false;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5032

pi->pspp_notify_required = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5314

ci_enable_spread_spectrum(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5316

ci_enable_thermal_protection(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5364

ci_enable_sclk_control(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5365

ret = ci_enable_ulv(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5370

ret = ci_enable_ds_master_switch(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5380

ret = ci_enable_didt(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5385

ret = ci_enable_smc_cac(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5390

ret = ci_enable_power_containment(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5402

ci_enable_auto_throttle_source(adev, AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5404

ret = ci_enable_thermal_based_sclk_dpm(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5427

ci_dpm_powergate_uvd(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5607

pi->ulv.supported = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5622

pi->use_pcie_powersaving_levels = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5633

pi->use_pcie_performance_levels = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5907

pi->caps_sclk_ds = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5922

pi->caps_uvd_dpm = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5923

pi->caps_vce_dpm = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6043

pi->vddc_phase_shed_control = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6054

pi->caps_sclk_ss_support = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6055

pi->caps_mclk_ss_support = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6056

pi->dynamic_ss = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6060

pi->dynamic_ss = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6064

pi->thermal_protection = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6068

pi->caps_dynamic_ac_timing = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6070

pi->uvd_power_gated = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6078

pi->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6238

ret = ci_thermal_enable_alert(adev, true);

sys/dev/drm/amd/amdgpu/ci_dpm.c

6365

adev->pm.dpm_enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6421

adev->pm.dpm_enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6434

return true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6509

queue_thermal = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6513

adev->pm.dpm.thermal.high_to_low = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

6514

queue_thermal = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

835

pi->cac_enabled = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

916

return true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

919

return true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

945

disable_mclk_switching = true;

sys/dev/drm/amd/amdgpu/ci_dpm.c

950

pi->battery_state = true;

sys/dev/drm/amd/amdgpu/ci_smc.c

164

return true;

sys/dev/drm/amd/amdgpu/cik.c

1018

{mmCC_RB_BACKEND_DISABLE, true},

sys/dev/drm/amd/amdgpu/cik.c

1019

{mmGC_USER_RB_BACKEND_DISABLE, true},

sys/dev/drm/amd/amdgpu/cik.c

1021

{mmPA_SC_RASTER_CONFIG, true},

sys/dev/drm/amd/amdgpu/cik.c

1022

{mmPA_SC_RASTER_CONFIG_1, true},

sys/dev/drm/amd/amdgpu/cik.c

1257

adev->has_hw_reset = true;

sys/dev/drm/amd/amdgpu/cik.c

1284

amdgpu_atombios_scratch_regs_engine_hung(adev, true);

sys/dev/drm/amd/amdgpu/cik.c

1636

clk_req_support = true;

sys/dev/drm/amd/amdgpu/cik.c

1745

return true;

sys/dev/drm/amd/amdgpu/cik.c

1948

return true;

sys/dev/drm/amd/amdgpu/cik.c

963

return true;

sys/dev/drm/amd/amdgpu/cik_ih.c

248

return true;

sys/dev/drm/amd/amdgpu/cik_ih.c

252

return true;

sys/dev/drm/amd/amdgpu/cik_ih.c

384

return true;

sys/dev/drm/amd/amdgpu/cik_ih.c

67

adev->irq.ih.enabled = true;

sys/dev/drm/amd/amdgpu/cik_sdma.c

1065

return true;

sys/dev/drm/amd/amdgpu/cik_sdma.c

1229

gate = true;

sys/dev/drm/amd/amdgpu/cik_sdma.c

497

ring->ready = true;

sys/dev/drm/amd/amdgpu/cik_sdma.c

500

cik_sdma_enable(adev, true);

sys/dev/drm/amd/amdgpu/cik_sdma.c

511

amdgpu_ttm_set_buffer_funcs_status(adev, true);

sys/dev/drm/amd/amdgpu/cik_sdma.c

558

adev->sdma.instance[i].burst_nop = true;

sys/dev/drm/amd/amdgpu/cik_sdma.c

589

cik_ctx_switch_enable(adev, true);

sys/dev/drm/amd/amdgpu/cz_ih.c

227

return true;

sys/dev/drm/amd/amdgpu/cz_ih.c

231

return true;

sys/dev/drm/amd/amdgpu/cz_ih.c

363

return true;

sys/dev/drm/amd/amdgpu/cz_ih.c

67

adev->irq.ih.enabled = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1048

wm_high.interlaced = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1073

amdgpu_dpm_get_mclk(adev, true) * 10;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1075

amdgpu_dpm_get_sclk(adev, true) * 10;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1087

wm_low.interlaced = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1179

adev->mode_info.audio.pin[i].connected = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1418

adev->mode_info.audio.enabled = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1721

dce_v10_0_audio_enable(adev, dig->afmt->pin, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1933

bypass_lut = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1944

bypass_lut = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2037

dce_v10_0_grph_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2056

r = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2340

dce_v10_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2395

dce_v10_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2420

ret = amdgpu_bo_reserve(aobj, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2437

dce_v10_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2483

amdgpu_crtc->enabled = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2485

dce_v10_0_vga_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2501

dce_v10_0_vga_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2541

r = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2638

return true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2767

adev->ddev->mode_config.async_page_flip = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2807

adev->mode_info.mode_config_initialized = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

284

connected = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

2903

return true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3311

dce_v10_0_afmt_enable(encoder, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3334

amdgpu_atombios_scratch_regs_lock(adev, true);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

3542

amdgpu_encoder->is_ext_encoder = true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

427

return true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

942

return true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

962

return true;

sys/dev/drm/amd/amdgpu/dce_v10_0.c

997

return true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1023

return true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1074

wm_high.interlaced = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1099

amdgpu_dpm_get_mclk(adev, true) * 10;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1101

amdgpu_dpm_get_sclk(adev, true) * 10;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1113

wm_low.interlaced = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1205

adev->mode_info.audio.pin[i].connected = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1445

adev->mode_info.audio.enabled = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1763

dce_v11_0_audio_enable(adev, dig->afmt->pin, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1975

bypass_lut = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1986

bypass_lut = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2079

dce_v11_0_grph_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2098

r = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2419

dce_v11_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2474

dce_v11_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2499

ret = amdgpu_bo_reserve(aobj, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2516

dce_v11_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2562

amdgpu_crtc->enabled = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2564

dce_v11_0_vga_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2580

dce_v11_0_vga_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2620

r = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2746

return true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2888

adev->ddev->mode_config.async_page_flip = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2929

adev->mode_info.mode_config_initialized = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

302

connected = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3036

return true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3437

dce_v11_0_afmt_enable(encoder, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3460

amdgpu_atombios_scratch_regs_lock(adev, true);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

3674

amdgpu_encoder->is_ext_encoder = true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

443

return true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

968

return true;

sys/dev/drm/amd/amdgpu/dce_v11_0.c

988

return true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1008

amdgpu_dpm_get_mclk(adev, true) * 10;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1010

amdgpu_dpm_get_sclk(adev, true) * 10;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1022

wm_low.interlaced = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1116

adev->mode_info.audio.pin[i].connected = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1372

adev->mode_info.audio.enabled = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1650

dce_v8_0_audio_enable(adev, dig->afmt->pin, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1856

bypass_lut = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1866

bypass_lut = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1946

dce_v8_0_grph_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1965

r = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2241

dce_v8_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

229

connected = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2296

dce_v8_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2321

ret = amdgpu_bo_reserve(aobj, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2338

dce_v8_0_lock_cursor(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2384

amdgpu_crtc->enabled = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2386

dce_v8_0_vga_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2402

dce_v8_0_vga_enable(crtc, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2442

r = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2546

return true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2664

adev->ddev->mode_config.async_page_flip = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2704

adev->mode_info.mode_config_initialized = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

2798

return true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3199

dce_v8_0_afmt_enable(encoder, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3222

amdgpu_atombios_scratch_regs_lock(adev, true);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

3430

amdgpu_encoder->is_ext_encoder = true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

360

return true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

877

return true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

897

return true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

932

return true;

sys/dev/drm/amd/amdgpu/dce_v8_0.c

983

wm_high.interlaced = true;

sys/dev/drm/amd/amdgpu/dce_virtual.c

138

amdgpu_crtc->enabled = true;

sys/dev/drm/amd/amdgpu/dce_virtual.c

175

r = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/amdgpu/dce_virtual.c

206

return true;

sys/dev/drm/amd/amdgpu/dce_virtual.c

410

adev->mode_info.mode_config_initialized = true;

sys/dev/drm/amd/amdgpu/dce_virtual.c

502

return true;

sys/dev/drm/amd/amdgpu/dce_virtual.c

578

return true;

sys/dev/drm/amd/amdgpu/dce_virtual.c

75

return true;

sys/dev/drm/amd/amdgpu/df_v1_7.c

76

adev->df_funcs->enable_broadcast_mode(adev, true);

sys/dev/drm/amd/amdgpu/df_v3_6.c

79

adev->df_funcs->enable_broadcast_mode(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2500

gfx_v7_0_cp_gfx_enable(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2616

ring->ready = true;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3106

gfx_v7_0_cp_compute_enable(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3110

ring->ready = true;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3170

gfx_v7_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3507

gfx_v7_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3598

gfx_v7_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3630

gfx_v7_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3725

gfx_v7_0_enable_mgcg(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3726

gfx_v7_0_enable_cgcg(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3731

gfx_v7_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4120

gfx_v7_0_enable_sclk_slowdown_on_pu(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4121

gfx_v7_0_enable_sclk_slowdown_on_pd(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4124

gfx_v7_0_enable_cp_pg(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4125

gfx_v7_0_enable_gds_pg(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4128

gfx_v7_0_update_gfx_pg(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4480

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4676

return true;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4989

gate = true;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4994

gfx_v7_0_enable_mgcg(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4995

gfx_v7_0_enable_cgcg(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5000

gfx_v7_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

5012

gate = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1073

adev->virt.chained_ib_support = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1999

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2110

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3985

bool new_entry = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3997

new_entry = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4171

gfx_v8_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4247

gfx_v8_0_cp_gfx_enable(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4382

ring->ready = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4786

ring->ready = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4795

gfx_v8_0_cp_compute_enable(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4825

ring->ready = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4853

gfx_v8_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4919

return true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4929

return true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5055

return true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5428

cz_enable_gfx_cg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5430

cz_enable_gfx_pipeline_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5456

cz_enable_sck_slow_down_on_power_up(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5457

cz_enable_sck_slow_down_on_power_down(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5463

cz_enable_cp_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5470

gfx_v8_0_enable_gfx_static_mg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5475

gfx_v8_0_enable_gfx_dynamic_mg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5483

gfx_v8_0_enable_gfx_static_mg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5488

gfx_v8_0_enable_gfx_dynamic_mg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5493

polaris11_enable_gfx_quick_mg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5628

adev->gfx.rlc.in_safe_mode = true;

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5815

gfx_v8_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5851

gfx_v8_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6297

true);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6301

true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1236

r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1531

if (!amdgpu_ngg || adev->gfx.ngg.init == true)

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1581

adev->gfx.ngg.init = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1682

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1771

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2237

if (enable == true) {

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2294

pwr_10_0_gfxip_control_over_cgpg(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2448

gfx_v9_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2522

gfx_v9_0_enable_lbpw(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2616

gfx_v9_0_cp_gfx_enable(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2732

ring->ready = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3254

ring->ready = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3263

gfx_v9_0_cp_compute_enable(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3328

ring->ready = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3334

gfx_v9_0_enable_gui_idle_interrupt(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3463

return true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3638

adev->gfx.rlc.in_safe_mode = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3672

gfx_v9_0_enable_gfx_cg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3674

gfx_v9_0_enable_gfx_pipeline_powergating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3690

gfx_v9_0_enable_gfx_static_mg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3695

gfx_v9_0_enable_gfx_dynamic_mg_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3903

bool enable = (state == AMD_PG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3912

gfx_v9_0_enable_sck_slow_down_on_power_up(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3913

gfx_v9_0_enable_sck_slow_down_on_power_down(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3920

gfx_v9_0_enable_cp_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3931

amdgpu_gfx_off_ctrl(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3938

amdgpu_gfx_off_ctrl(adev, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3962

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4237

true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4241

true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4398

gfx_v9_0_ring_emit_tmz(ring, true);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4740

.support_64bit_ptrs = true,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4791

.support_64bit_ptrs = true,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4826

.support_64bit_ptrs = true,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

548

adev->gfx.me_fw_write_wait = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

552

adev->gfx.mec_fw_write_wait = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

559

adev->gfx.me_fw_write_wait = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

563

adev->gfx.mec_fw_write_wait = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

570

adev->gfx.me_fw_write_wait = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

574

adev->gfx.mec_fw_write_wait = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

581

adev->gfx.me_fw_write_wait = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

585

adev->gfx.mec_fw_write_wait = true;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

673

adev->gfx.rlc.is_rlc_v2_1 = true;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1023

adev->need_dma32 = true;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1174

return true;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1329

info->prot_valid = protections & 0x7 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1330

info->prot_read = protections & 0x8 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1331

info->prot_write = protections & 0x10 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1332

info->prot_exec = protections & 0x20 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1347

gate = true;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

547

adev->gmc.prt_warning = true;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

693

gmc_v7_0_set_fault_enable_default(adev, true);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

705

adev->gart.ready = true;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1149

adev->need_dma32 = true;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1308

return true;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1351

return true;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1513

info->prot_valid = protections & 0x7 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1514

info->prot_read = protections & 0x8 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1515

info->prot_write = protections & 0x10 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1516

info->prot_exec = protections & 0x20 ? true : false;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

774

adev->gmc.prt_warning = true;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

943

gmc_v8_0_set_fault_enable_default(adev, true);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

949

adev->gart.ready = true;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1107

mmhub_v1_0_update_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1132

value = true;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1141

adev->gart.ready = true;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

1220

return true;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

711

return true;

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

986

adev->need_dma32 = true;

sys/dev/drm/amd/amdgpu/iceland_ih.c

227

return true;

sys/dev/drm/amd/amdgpu/iceland_ih.c

231

return true;

sys/dev/drm/amd/amdgpu/iceland_ih.c

363

return true;

sys/dev/drm/amd/amdgpu/iceland_ih.c

67

adev->irq.ih.enabled = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1330

ret = kv_enable_ulv(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1336

ret = kv_enable_didt(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1341

ret = kv_enable_smc_cac(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1572

kv_enable_vce_dpm(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1721

kv_enable_vce_dpm(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1739

kv_update_samu_dpm(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1762

kv_update_acp_dpm(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1867

pi->nb_dpm_enabled = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

1964

kv_enable_nb_dpm(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1977

kv_freeze_sclk_dpm(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

1989

kv_enable_nb_dpm(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2007

sumo_take_smu_control(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2027

kv_freeze_sclk_dpm(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2253

ps->need_dfs_bypass = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2294

pi->battery_state = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2438

kv_dpm_power_level_enabled_for_throttle(adev, i, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2455

kv_dpm_power_level_enabled_for_throttle(adev, i, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2471

kv_dpm_power_level_enable(adev, i, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2595

pi->sys_info.nb_dpm_enable = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2607

pi->caps_enable_dfs_bypass = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2815

pi->enable_nb_dpm = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2817

pi->caps_power_containment = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2818

pi->caps_cac = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2821

pi->caps_sq_ramping = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2822

pi->caps_db_ramping = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2823

pi->caps_td_ramping = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2824

pi->caps_tcp_ramping = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2828

pi->caps_sclk_ds = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2832

pi->enable_auto_thermal_throttling = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2837

pi->bapm_enable = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2841

pi->caps_uvd_pg = (adev->pg_flags & AMD_PG_SUPPORT_UVD) ? true : false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2842

pi->caps_uvd_dpm = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2843

pi->caps_vce_pg = (adev->pg_flags & AMD_PG_SUPPORT_VCE) ? true : false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2844

pi->caps_samu_pg = (adev->pg_flags & AMD_PG_SUPPORT_SAMU) ? true : false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2845

pi->caps_acp_pg = (adev->pg_flags & AMD_PG_SUPPORT_ACP) ? true : false;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2859

pi->enable_dpm = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

2987

kv_dpm_powergate_acp(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2988

kv_dpm_powergate_samu(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

3068

adev->pm.dpm_enabled = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3115

adev->pm.dpm_enabled = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3125

return true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3200

queue_thermal = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3204

adev->pm.dpm.thermal.high_to_low = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

3205

queue_thermal = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

573

pi->cac_enabled = true;

sys/dev/drm/amd/amdgpu/kv_dpm.c

733

amdgpu_kv_smc_dpm_enable(adev, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

813

kv_dpm_power_level_enable(adev, i, true);

sys/dev/drm/amd/amdgpu/kv_dpm.c

827

kv_dpm_power_level_enable(adev, i, true);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

284

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GMC, true);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

533

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

535

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

537

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/mmhub_v1_0.c

539

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/mxgpu_ai.c

150

xgpu_ai_mailbox_set_valid(adev, true);

sys/dev/drm/amd/amdgpu/mxgpu_vi.c

362

xgpu_vi_mailbox_set_valid(adev, true);

sys/dev/drm/amd/amdgpu/psp_v10_0.c

446

return true;

sys/dev/drm/amd/amdgpu/psp_v11_0.c

222

0, true);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

511

return true;

sys/dev/drm/amd/amdgpu/psp_v3_1.c

218

return true;

sys/dev/drm/amd/amdgpu/psp_v3_1.c

226

return true;

sys/dev/drm/amd/amdgpu/psp_v3_1.c

268

0, true);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

566

return true;

sys/dev/drm/amd/amdgpu/psp_v3_1.c

577

return (reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) ? true : false;

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

161

adev->sdma.instance[i].burst_nop = true;

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

474

ring->ready = true;

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

477

sdma_v2_4_enable(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

487

amdgpu_ttm_set_buffer_funcs_status(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

957

return true;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1164

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1168

ring->use_pollmem = true;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1243

return true;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1277

return true;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

319

adev->sdma.instance[i].burst_nop = true;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

742

ring->ready = true;

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

746

sdma_v3_0_enable(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

748

sdma_v3_0_ctx_switch_enable(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

759

amdgpu_ttm_set_buffer_funcs_status(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1321

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1392

amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1423

return true;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1637

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1639

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1655

state == AMD_PG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1705

.support_64bit_ptrs = true,

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

312

adev->sdma.instance[i].burst_nop = true;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

797

ring->ready = true;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

800

sdma_v4_0_ctx_switch_enable(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

801

sdma_v4_0_enable(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

811

amdgpu_ttm_set_buffer_funcs_status(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

874

sdma_v4_1_update_power_gating(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

965

sdma_v4_0_enable(adev, true);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

967

sdma_v4_0_ctx_switch_enable(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

1119

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1155

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1173

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1191

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1646

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1677

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1713

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1731

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1828

true

sys/dev/drm/amd/amdgpu/si_dpm.c

1993

si_pi->dte_data.enable_dte_by_default = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2003

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2007

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2011

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2014

if (si_pi->dte_data.enable_dte_by_default == true)

sys/dev/drm/amd/amdgpu/si_dpm.c

2028

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2033

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2038

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2060

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2108

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2115

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2121

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2125

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2141

update_dte_from_pl2 = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2153

ni_pi->enable_power_containment = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2154

ni_pi->enable_cac = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2156

si_pi->enable_dte = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2161

ni_pi->enable_sq_ramping = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2164

ni_pi->driver_calculate_cac_leakage = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2165

ni_pi->cac_configuration_required = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2168

ni_pi->support_cac_long_term_average = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2371

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2549

ni_pi->pc_enabled = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

2920

ni_pi->cac_enabled = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3073

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

325

true

sys/dev/drm/amd/amdgpu/si_dpm.c

3380

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3382

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3384

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3386

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3388

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3419

pi->dynamic_ss = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3476

disable_mclk_switching = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3479

disable_mclk_switching = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3480

disable_sclk_switching = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

362

true

sys/dev/drm/amd/amdgpu/si_dpm.c

3633

ps->dc_compatible = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3685

ret = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3748

want_thermal_protection = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3752

want_thermal_protection = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

3757

want_thermal_protection = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

381

true

sys/dev/drm/amd/amdgpu/si_dpm.c

3827

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_tdr_is_about_to_happen, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

3927

amdgpu_si_smc_clock(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

399

true

sys/dev/drm/amd/amdgpu/si_dpm.c

417

true

sys/dev/drm/amd/amdgpu/si_dpm.c

4331

strobe_mode = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

435

true

sys/dev/drm/amd/amdgpu/si_dpm.c

4378

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

4625

voltage_found = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

4640

voltage_found = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

5483

if (si_get_mclk_frequency_ratio(pl->mclk, true) >=

sys/dev/drm/amd/amdgpu/si_dpm.c

5485

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5487

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5495

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/amd/amdgpu/si_dpm.c

5633

return true;

sys/dev/drm/amd/amdgpu/si_dpm.c

5668

eg_pi->uvd_enabled = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

5882

bool result = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

6229

si_pi->pspp_notify_required = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

627

true

sys/dev/drm/amd/amdgpu/si_dpm.c

6538

si_pi->fan_is_controlled_by_smc = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

663

true

sys/dev/drm/amd/amdgpu/si_dpm.c

6716

si_pi->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

6751

ret = si_thermal_enable_alert(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

6789

si_enable_voltage_control(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

6805

si_enable_spread_spectrum(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

6807

si_enable_thermal_protection(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

681

true

sys/dev/drm/amd/amdgpu/si_dpm.c

6885

si_enable_sclk_control(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

6888

si_enable_auto_throttle_source(adev, AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

6904

ret = si_thermal_enable_alert(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

699

true

sys/dev/drm/amd/amdgpu/si_dpm.c

7057

ret = si_enable_smc_cac(adev, new_ps, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

7062

ret = si_enable_power_containment(adev, new_ps, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

7423

pi->gfx_clock_gating = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7425

eg_pi->sclk_deep_sleep = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7429

pi->thermal_protection = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7433

eg_pi->dynamic_ac_timing = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7435

eg_pi->light_sleep = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7461

si_pi->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7562

queue_thermal = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7566

adev->pm.dpm.thermal.high_to_low = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7567

queue_thermal = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7591

si_dpm_powergate_uvd(adev, true);

sys/dev/drm/amd/amdgpu/si_dpm.c

7763

adev->pm.dpm_enabled = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7810

adev->pm.dpm_enabled = true;

sys/dev/drm/amd/amdgpu/si_dpm.c

7821

return true;

sys/dev/drm/amd/amdgpu/soc15.c

1003

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1005

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1007

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1009

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1011

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

1013

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

265

return true;

sys/dev/drm/amd/amdgpu/soc15.c

393

amdgpu_atombios_scratch_regs_engine_hung(adev, true);

sys/dev/drm/amd/amdgpu/soc15.c

601

return true;

sys/dev/drm/amd/amdgpu/soc15.c

833

soc15_enable_doorbell_aperture(adev, true);

sys/dev/drm/amd/amdgpu/soc15.c

866

return true;

sys/dev/drm/amd/amdgpu/soc15.c

987

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

989

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

991

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

993

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

995

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

997

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/soc15.c

999

state == AMD_CG_STATE_GATE ? true : false);

sys/dev/drm/amd/amdgpu/tonga_ih.c

238

return true;

sys/dev/drm/amd/amdgpu/tonga_ih.c

242

return true;

sys/dev/drm/amd/amdgpu/tonga_ih.c

320

r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, true);

sys/dev/drm/amd/amdgpu/tonga_ih.c

324

adev->irq.ih.use_doorbell = true;

sys/dev/drm/amd/amdgpu/tonga_ih.c

386

return true;

sys/dev/drm/amd/amdgpu/tonga_ih.c

417

return true;

sys/dev/drm/amd/amdgpu/tonga_ih.c

65

adev->irq.ih.enabled = true;

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

162

uvd_v4_2_enable_mgcg(adev, true);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

165

ring->ready = true;

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

270

uvd_v4_2_set_dcm(adev, true);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

159

uvd_v5_0_enable_mgcg(adev, true);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

161

ring->ready = true;

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

775

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

781

uvd_v5_0_enable_clock_gating(adev, true);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1154

return true;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1228

bool int_handled = true;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1432

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1438

uvd_v6_0_enable_clock_gating(adev, true);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

477

uvd_v6_0_enable_mgcg(adev, true);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

479

ring->ready = true;

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

516

ring->ready = true;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1475

return true;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1703

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

465

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

543

ring->ready = true;

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

585

ring->ready = true;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

388

vce_v2_0_set_sw_cg(adev, true);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

390

vce_v2_0_set_dyn_cg(adev, true);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

465

vce_v2_0_enable_mgcg(adev, true, false);

sys/dev/drm/amd/amdgpu/vce_v2_0.c

474

adev->vce.ring[i].ready = true;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

563

gate = true;

sys/dev/drm/amd/amdgpu/vce_v2_0.c

564

sw_cg = true;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

175

vce_v3_0_override_vce_clock_gating(adev, true);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

473

vce_v3_0_override_vce_clock_gating(adev, true);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

485

adev->vce.ring[i].ready = true;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

644

return true;

sys/dev/drm/amd/amdgpu/vce_v3_0.c

748

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

463

ring->use_doorbell = true;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

530

adev->vce.ring[i].ready = true;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

729

return true;

sys/dev/drm/amd/amdgpu/vce_v4_0.c

812

vce_v4_0_override_vce_clock_gating(adev, true);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

889

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1228

bool enable = (state == AMD_CG_STATE_GATE) ? true : false;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

180

ring->ready = true;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

189

ring->ready = true;

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

198

ring->ready = true;

sys/dev/drm/amd/amdgpu/vega10_ih.c

253

return true;

sys/dev/drm/amd/amdgpu/vega10_ih.c

259

return true;

sys/dev/drm/amd/amdgpu/vega10_ih.c

265

return true;

sys/dev/drm/amd/amdgpu/vega10_ih.c

276

return true;

sys/dev/drm/amd/amdgpu/vega10_ih.c

305

return true;

sys/dev/drm/amd/amdgpu/vega10_ih.c

389

r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 256 * 1024, true);

sys/dev/drm/amd/amdgpu/vega10_ih.c

393

adev->irq.ih.use_doorbell = true;

sys/dev/drm/amd/amdgpu/vega10_ih.c

449

return true;

sys/dev/drm/amd/amdgpu/vega10_ih.c

52

adev->irq.ih.enabled = true;

sys/dev/drm/amd/amdgpu/vi.c

1225

vi_enable_doorbell_aperture(adev, true);

sys/dev/drm/amd/amdgpu/vi.c

1259

return true;

sys/dev/drm/amd/amdgpu/vi.c

447

return true;

sys/dev/drm/amd/amdgpu/vi.c

543

{mmCC_RB_BACKEND_DISABLE, true},

sys/dev/drm/amd/amdgpu/vi.c

544

{mmGC_USER_RB_BACKEND_DISABLE, true},

sys/dev/drm/amd/amdgpu/vi.c

546

{mmPA_SC_RASTER_CONFIG, true},

sys/dev/drm/amd/amdgpu/vi.c

547

{mmPA_SC_RASTER_CONFIG_1, true},

sys/dev/drm/amd/amdgpu/vi.c

683

adev->has_hw_reset = true;

sys/dev/drm/amd/amdgpu/vi.c

704

amdgpu_atombios_scratch_regs_engine_hung(adev, true);

sys/dev/drm/amd/amdgpu/vi.c

935

return true;

sys/dev/drm/amd/amdgpu/vi.c

942

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1585

adev->mode_info.mode_config_initialized = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1596

adev->ddev->mode_config.async_page_flip = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1934

dm->dc->debug.disable_stutter = amdgpu_pp_feature_mask & PP_STUTTER_MODE ? false : true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

220

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2258

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2416

plane_state->visible = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2892

native_mode_found = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2931

stream->ignore_msa_timing_param = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3020

return dm_set_vblank(crtc, true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3297

aconnector->base.override_edid = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3400

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3733

true, MAX_COLOR_LUT_ENTRIES);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3868

mode_existed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3950

link->link_enc->features.ycbcr420_supported ? true : false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3955

link->link_enc->features.ycbcr420_supported ? true : false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4216

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4219

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4222

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4225

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4275

position->enable = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

432

init_data.flags.gpu_vm_support = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

435

init_data.flags.fbc_support = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4409

r = amdgpu_bo_reserve(abo, true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4416

WARN_ON(reservation_object_wait_timeout_rcu(abo->tbo.resv, true, false,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4573

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4644

false : true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4744

bool wait_for_vblank = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4823

acrtc->enabled = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4927

manage_dm_interrupts(adev, acrtc, true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5012

crtc_state->mode_changed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5138

config.vsif_supported = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5240

new_crtc_state->mode_changed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5282

*lock_and_validation_needed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5320

*lock_and_validation_needed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5440

*lock_and_validation_needed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5510

*lock_and_validation_needed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5694

ret = dm_update_crtcs_state(&adev->dm, state, true, &lock_and_validation_needed);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5700

ret = dm_update_planes_state(dc, state, true, &lock_and_validation_needed);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5730

lock_and_validation_needed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5805

capable = (dpcd_data & DP_MSA_TIMING_PAR_IGNORED) ? true:false;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5863

if (edid_check_required == true && (edid->version > 1 ||

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5894

dm_con_state->freesync_capable = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

626

ret = drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

671

need_hotplug = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

712

s3_handle_mst(adev->ddev, true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

883

new_crtc_state->active_changed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

963

if (aconnector->mst_mgr.mst_state == true)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

167

gamma, true, adev->asic_type <= CHIP_RAVEN);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

200

stream->gamut_remap_matrix.enable_remap = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

282

ret = mod_color_calculate_degamma_params(dc_plane_state->in_transfer_func, gamma, true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

71

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

149

drm_crtc_add_crc_entry(crtc, true,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

87

true, true)) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

88

crtc_state->crc_enabled = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

199

valid_input = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

211

valid_input = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

583

valid_test_pattern = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

592

disable_hpd = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

593

valid_test_pattern = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

265

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

304

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

337

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

442

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

448

return (drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, true) == 0);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

465

if (aconnector->mst_mgr.mst_state == true)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

548

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

139

handler_removed = true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

182

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

198

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

384

dc_interrupt_set(adev->dm.dc, src, true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

410

dc_interrupt_set(adev->dm.dc, src, true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

638

true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c

644

true);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

112

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

312

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

365

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

388

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

411

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

450

return true;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

472

return true;

sys/dev/drm/amd/display/dc/basics/vector.c

178

return true;

sys/dev/drm/amd/display/dc/basics/vector.c

233

return true;

sys/dev/drm/amd/display/dc/basics/vector.c

291

return true;

sys/dev/drm/amd/display/dc/basics/vector.c

299

return true;

sys/dev/drm/amd/display/dc/basics/vector.c

50

return true;

sys/dev/drm/amd/display/dc/basics/vector.c

90

return true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1060

info->type.EXTERNAL = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1064

info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1152

ss_info->type.EXTERNAL = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1156

ss_info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1158

ss_info->type.STEP_AND_DELAY_INFO = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1316

info->lcd_timing.misc_info.DOUBLE_CLOCK = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1319

info->lcd_timing.misc_info.RGB888 = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1326

info->lcd_timing.misc_info.SPATIAL = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1329

info->lcd_timing.misc_info.TEMPORAL = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1332

info->lcd_timing.misc_info.API_ENABLED = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1450

info->lcd_timing.misc_info.DOUBLE_CLOCK = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1453

info->lcd_timing.misc_info.RGB888 = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1914

bool rc = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1953

return true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2940

return true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

696

ss_info->type.EXTERNAL = true;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

699

ss_info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1991

return true;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

383

find_valid = true;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

395

info->i2c_hw_assist = (record->i2c_id & I2C_HW_CAP) ? true : false;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

665

ss_info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

673

ss_info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

682

ss_info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

738

ss_info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

746

ss_info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

755

ss_info->type.CENTER_MODE = true;

sys/dev/drm/amd/display/dc/bios/command_table.c

1270

if ((enable == true) && (bp_params->percentage > 0))

sys/dev/drm/amd/display/dc/bios/command_table.c

1321

if ((enable == true) && (bp_params->percentage > 0)) {

sys/dev/drm/amd/display/dc/bios/command_table.c

1391

if (enable == true) {

sys/dev/drm/amd/display/dc/bios/command_table.c

1500

if (bp_params->ss_enable == true)

sys/dev/drm/amd/display/dc/bios/command_table.c

2266

is_input_signal_dp = true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

100

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

220

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

223

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

226

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

229

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

232

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

43

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

47

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

51

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

56

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

79

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

82

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

85

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

88

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

91

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

94

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper.c

97

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

100

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

103

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

106

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

109

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

116

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

197

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

200

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

207

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

210

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

44

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

48

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

52

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

57

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

61

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

67

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

71

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

94

return true;

sys/dev/drm/amd/display/dc/bios/command_table_helper2.c

97

return true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

196

bool result = true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

246

result = true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

250

result = true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

254

result = true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

258

result = true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

262

result = true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

266

result = true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

270

result = true;

sys/dev/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

274

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

193

bool result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

248

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

252

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

256

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

260

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

264

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

268

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

272

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

276

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

337

bool retCode = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

193

bool result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

248

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

252

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

256

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

260

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

264

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

268

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

272

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

276

result = true;

sys/dev/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

337

bool retCode = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

110

bool result = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

69

result = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

73

result = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

77

result = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

81

result = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

85

result = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

89

result = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

93

result = true;

sys/dev/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

97

result = true;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

119

return true;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

179

return true;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

51

return true;

sys/dev/drm/amd/display/dc/calcs/custom_float.c

80

return true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2067

vbios.scatter_gather_enable = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2110

dceip.pre_downscaler_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2111

dceip.underlay_downscale_prefetch_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2137

dceip.limit_excessive_outstanding_dmif_requests = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2183

vbios.scatter_gather_enable = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2204

dceip.argb_compression_support = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2226

dceip.pre_downscaler_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2227

dceip.underlay_downscale_prefetch_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2230

dceip.graphics_lb_nodownscaling_multi_line_prefetching = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2253

dceip.limit_excessive_outstanding_dmif_requests = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2299

vbios.scatter_gather_enable = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2320

dceip.argb_compression_support = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2342

dceip.pre_downscaler_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2343

dceip.underlay_downscale_prefetch_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2346

dceip.graphics_lb_nodownscaling_multi_line_prefetching = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2369

dceip.limit_excessive_outstanding_dmif_requests = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2435

dceip.display_write_back_supported = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2436

dceip.argb_compression_support = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2458

dceip.pre_downscaler_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2459

dceip.underlay_downscale_prefetch_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2462

dceip.graphics_lb_nodownscaling_multi_line_prefetching = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2485

dceip.limit_excessive_outstanding_dmif_requests = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2528

vbios.scatter_gather_enable = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2549

dceip.argb_compression_support = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2571

dceip.pre_downscaler_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2572

dceip.underlay_downscale_prefetch_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2598

dceip.limit_excessive_outstanding_dmif_requests = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2654

dceip.dmif_pipe_en_fbc_chunk_tracker = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2661

dceip.display_write_back_supported = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2662

dceip.argb_compression_support = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2684

dceip.pre_downscaler_enabled = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2688

dceip.graphics_lb_nodownscaling_multi_line_prefetching = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2711

dceip.limit_excessive_outstanding_dmif_requests = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2753

return true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

2770

data->increase_voltage_to_support_mclk_switch = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

3555

calcs_output->nbp_state_change_enable = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

3556

calcs_output->cpuc_state_change_enable = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

3557

calcs_output->cpup_state_change_enable = true;

sys/dev/drm/amd/display/dc/calcs/dce_calcs.c

3558

calcs_output->stutter_mode_enable = true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

1059

if (dc->debug.max_disp_clk == true)

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

1200

return true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

1349

return true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

256

input->src.is_hsplit = true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

258

input->src.is_hsplit = true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

496

true,

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

497

true,

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

625

updated = true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

632

updated = true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

639

updated = true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

646

updated = true;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

654

updated = true;

sys/dev/drm/amd/display/dc/core/dc.c

1023

dc->hwss.set_bandwidth(dc, context, true);

sys/dev/drm/amd/display/dc/core/dc.c

1075

dc->hwss.set_bandwidth(dc, context, true);

sys/dev/drm/amd/display/dc/core/dc.c

1076

return true;

sys/dev/drm/amd/display/dc/core/dc.c

1118

return true;

sys/dev/drm/amd/display/dc/core/dc.c

1551

dc->hwss.pipe_control_lock(dc, top_pipe_to_program, true);

sys/dev/drm/amd/display/dc/core/dc.c

172

return true;

sys/dev/drm/amd/display/dc/core/dc.c

1762

return true;

sys/dev/drm/amd/display/dc/core/dc.c

211

ret = true;

sys/dev/drm/amd/display/dc/core/dc.c

236

ret = true;

sys/dev/drm/amd/display/dc/core/dc.c

376

ret = true;

sys/dev/drm/amd/display/dc/core/dc.c

397

ret = true;

sys/dev/drm/amd/display/dc/core/dc.c

649

dc_ctx->created_bios = true;

sys/dev/drm/amd/display/dc/core/dc.c

684

return true;

sys/dev/drm/amd/display/dc/core/dc.c

706

bool should_disable = true;

sys/dev/drm/amd/display/dc/core/dc.c

889

return true;

sys/dev/drm/amd/display/dc/core/dc.c

893

return true;

sys/dev/drm/amd/display/dc/core/dc.c

905

bool ret = true;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

105

ret = true;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

116

ret = true;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

127

ret = true;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

137

ret = true;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

148

ret = true;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

158

ret = true;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

256

return true;

sys/dev/drm/amd/display/dc/core/dc_hw_sequencer.c

269

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1247

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1307

panel_mode_edp = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1412

skip_video_pattern = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1441

link->dc->hwss.edp_power_control(link, true);

sys/dev/drm/amd/display/dc/core/dc_link.c

1442

link->dc->hwss.edp_wait_for_hpd_ready(link, true);

sys/dev/drm/amd/display/dc/core/dc_link.c

1466

dp_enable_mst_on_sink(link, true);

sys/dev/drm/amd/display/dc/core/dc_link.c

1502

result = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1514

result = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1526

result = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1538

result = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1544

if (result == true) {

sys/dev/drm/amd/display/dc/core/dc_link.c

1584

payload.write = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1589

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

190

result = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

1931

is_over_340mhz = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

2066

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

2075

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

208

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

212

link->dc->hwss.edp_wait_for_hpd_ready(link, true);

sys/dev/drm/amd/display/dc/core/dc_link.c

2128

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

2186

bool use_smooth_brightness = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

2229

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

2242

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

2253

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

231

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

2397

true)) {

sys/dev/drm/amd/display/dc/core/dc_link.c

2439

true);

sys/dev/drm/amd/display/dc/core/dc_link.c

2569

true : false);

sys/dev/drm/amd/display/dc/core/dc_link.c

2678

link->is_hpd_filter_disabled = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

559

boot = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

583

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

587

*converter_disable_audio = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

596

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

623

bool same_dpcd = true;

sys/dev/drm/amd/display/dc/core/dc_link.c

636

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

640

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

711

return true;

sys/dev/drm/amd/display/dc/core/dc_link.c

904

return true;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

242

.i2c_over_aux = true,

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

339

return true;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

407

.write = true,

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

461

is_type2_dongle = true;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

466

is_valid_hdmi_signature = true;

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

504

if (is_valid_hdmi_signature == true) {

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

527

if (is_valid_hdmi_signature == true) {

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

590

payloads, address, write_size, write_buf, true);

sys/dev/drm/amd/display/dc/core/dc_link_ddc.c

616

payloads, address, write_size, write_buf, true);

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1056

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1110

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1146

skip_video_pattern = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1159

success = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1166

success = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1388

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1467

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1495

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1612

sink_status_changed = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1623

return_code = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1703

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1751

dc_link_set_psr_enable(link, false, true);

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1752

dc_link_set_psr_enable(link, true, true);

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1754

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1762

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2065

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2072

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2093

true, LINK_TRAINING_ATTEMPTS);

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2097

*out_link_loss = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2103

status = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2138

mst = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2244

link->dpcd_caps.dongle_caps.extendedCapValid = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2301

dp_receiver_power_ctrl(link, true);

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2322

link->wa_flags.dp_keep_receiver_powered = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2462

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2509

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

258

bool done = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2635

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2662

link->test_pattern_enabled = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

273

bool done = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2736

link->test_pattern_enabled = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2739

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

575

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

628

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

648

req_drv_setting_changed = true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

670

return true;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

677

return true;

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

100

dp_receiver_power_ctrl(link, true);

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

111

return true;

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

133

return true;

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

200

return true;

sys/dev/drm/amd/display/dc/core/dc_link_hwss.c

311

dp_receiver_power_ctrl(link, true);

sys/dev/drm/amd/display/dc/core/dc_resource.c

1421

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1497

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1529

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1554

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1581

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1586

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1595

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1600

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1609

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1615

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1619

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1631

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1648

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1658

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1665

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1680

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

1788

if ((res_ctx->is_audio_acquired[i] == false) && (res_ctx->is_stream_enc_acquired[i] == true)) {

sys/dev/drm/amd/display/dc/core/dc_resource.c

1814

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

185

aud_support->dp_audio = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

191

aud_support->hdmi_audio_on_dongle = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

192

aud_support->hdmi_audio_native = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2030

true);

sys/dev/drm/amd/display/dc/core/dc_resource.c

2046

pipe_ctx->stream_res.audio, true);

sys/dev/drm/amd/display/dc/core/dc_resource.c

2278

itc = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2399

info_packet->valid = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2426

hdmi_vic_mode = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2512

info_packet->valid = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

261

dc->caps.dynamic_audio = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2708

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2711

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2714

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2718

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2721

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2724

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2727

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2730

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

2733

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

276

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

369

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

382

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

414

return true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

506

flip_vert_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

507

flip_horz_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

509

flip_vert_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

511

flip_horz_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

769

flip_vert_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

770

flip_horz_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

772

flip_vert_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

774

flip_horz_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_resource.c

784

flip_vert_scan_dir = true;

sys/dev/drm/amd/display/dc/core/dc_sink.c

61

return true;

sys/dev/drm/amd/display/dc/core/dc_stream.c

211

core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true);

sys/dev/drm/amd/display/dc/core/dc_stream.c

222

return true;

sys/dev/drm/amd/display/dc/core/dc_stream.c

260

core_dc->hwss.pipe_control_lock(core_dc, pipe_to_program, true);

sys/dev/drm/amd/display/dc/core/dc_stream.c

269

return true;

sys/dev/drm/amd/display/dc/core/dc_stream.c

315

ret = true;

sys/dev/drm/amd/display/dc/core/dc_surface.c

43

plane_state->gamma_correction->is_identity = true;

sys/dev/drm/amd/display/dc/dce/dce_abm.c

314

return true;

sys/dev/drm/amd/display/dc/dce/dce_abm.c

341

return true;

sys/dev/drm/amd/display/dc/dce/dce_abm.c

400

return true;

sys/dev/drm/amd/display/dc/dce/dce_abm.c

424

return true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

116

found = true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

151

limit_freq_to_48_khz = true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

157

limit_freq_to_88_2_khz = true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

162

limit_freq_to_174_4_khz = true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

216

limit_freq_to_48_khz = true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

218

limit_freq_to_88_2_khz = true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

220

limit_freq_to_96_khz = true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

222

limit_freq_to_174_4_khz = true;

sys/dev/drm/amd/display/dc/dce/dce_audio.c

532

is_ac3_supported = true;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

445

ctx->transaction_complete = true;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

446

ctx->operation_succeeded = true;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

558

ctx.operation_succeeded = true;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

614

ctx->operation_succeeded = true;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

635

ctx->transaction_complete = true;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

746

ctx.operation_succeeded = true;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

837

bool mot_used = true;

sys/dev/drm/amd/display/dc/dce/dce_aux.c

896

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1217

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1292

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1317

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

1351

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

168

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

240

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

279

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

452

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

703

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

744

true))

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

749

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

892

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

915

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

953

return true;

sys/dev/drm/amd/display/dc/dce/dce_clock_source.c

965

return true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

259

pxl_clk_params.flags.SET_DISPCLK_DFS_BYPASS = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

401

clk_dce->dfs_bypass_enabled = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

422

clk_dce->ss_on_dprefclk = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

446

clk_dce->ss_on_dprefclk = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

559

true);

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

593

send_request_to_increase = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

598

send_request_to_lower = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

608

send_request_to_lower = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

615

send_request_to_lower = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

623

send_request_to_lower = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

645

send_request_to_lower = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

726

clk_dce->dfs_bypass_active = true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

736

return true;

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

933

clk_dce->dfs_bypass_enabled = true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

139

if (wait == true) {

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

266

return true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

281

return true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

407

return true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

439

return true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

484

return true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

550

if (wait == true) {

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

60

return true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

688

return true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

731

return true;

sys/dev/drm/amd/display/dc/dce/dce_dmcu.c

89

return true;

sys/dev/drm/amd/display/dc/dce/dce_hwseq.c

206

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

300

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

404

pool->i2c_hw_buffer_in_use = true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

540

result = true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c

559

result = true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

110

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

137

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

154

write_bit_to_ddc(ddc_handle, SDA, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

158

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

192

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

221

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

230

write_bit_to_ddc(ddc_handle, SDA, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

234

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

255

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

260

write_bit_to_ddc(ddc_handle, SDA, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

266

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

29

#define SDA true

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

292

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

315

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

331

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

336

write_bit_to_ddc(ddc_handle, SDA, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

345

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

358

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

394

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

495

return true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

508

result = true;

sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c

96

return true;

sys/dev/drm/amd/display/dc/dce/dce_ipp.c

49

REG_UPDATE(CUR_UPDATE, CURSOR_UPDATE_LOCK, true);

sys/dev/drm/amd/display/dc/dce/dce_ipp.c

75

REG_UPDATE(CUR_UPDATE, CURSOR_UPDATE_LOCK, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

203

disable_prbs_symbols(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

220

enable_phy_bypass_mode(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

304

enable_phy_bypass_mode(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

324

enable_phy_bypass_mode(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

336

disable_prbs_symbols(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

341

enable_phy_bypass_mode(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

369

enable_phy_bypass_mode(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

415

set_link_training_complete(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

442

set_link_training_complete(enc110, true);

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

624

return true;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

658

return true;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

668

return true;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

810

pixel_encoding == PIXEL_ENCODING_RGB) ? true : false;

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

813

is_valid = true;

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

127

return true;

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

684

return true;

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

729

return true;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1017

REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1542

dce110_se_enable_audio_clock(enc, true);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1560

dce110_se_enable_audio_clock(enc, true);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

954

REG_UPDATE(DP_STEER_FIFO, DP_STEER_FIFO_RESET, true);

sys/dev/drm/amd/display/dc/dce/dce_transform.c

1074

return true;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

1359

xfm_dce->prescaler_on = true;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

146

return true;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

388

filter_updated = true;

sys/dev/drm/amd/display/dc/dce/dce_transform.c

924

scl_data->taps.h_taps_c = decide_taps(scl_data->ratios.horz_c, in_taps->h_taps, true);

sys/dev/drm/amd/display/dc/dce/dce_transform.c

925

scl_data->taps.v_taps_c = decide_taps(scl_data->ratios.vert_c, in_taps->v_taps, true);

sys/dev/drm/amd/display/dc/dce/dce_transform.c

950

return true;

sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c

103

return true;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

1048

return true;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

556

.flags.bits.IS_HBR2_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

557

.flags.bits.IS_TPS3_CAPABLE = true

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

774

at_least_one_pipe = true;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

786

return true;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

806

return true;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

887

dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_EXTERNAL, NULL, true);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

899

dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], true);

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

975

dc->caps.dual_link_dvi = true;

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

976

dc->caps.disable_dp_clk_share = true;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

242

compressor->is_enabled = true;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

266

wait_for_fbc_state_changed(cp110, true);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

305

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

316

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

465

result = true;

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

531

compressor->base.options.bits.FBC_SUPPORT = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1021

pipe_ctx->stream_res.stream_enc, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1038

if (option == FREE_ACQUIRED_RESOURCE && dc->caps.dynamic_audio == true) {

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1095

link->dc->hwss.edp_backlight_control(link, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1215

audio_output->pll_info.ss_enabled = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1322

pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1335

true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1512

true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1592

context->streams[i]->apply_edp_fast_boot_optimization = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1593

apply_edp_fast_boot_optimization = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1846

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1908

pipe_ctx_old->stream_res.tg->funcs->set_blank(pipe_ctx_old->stream_res.tg, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

200

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2028

dcb->funcs->set_scratch_critical_state(dcb, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2154

blank_target = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2157

blank_target = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2172

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2245

rc = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

234

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2363

true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2377

dc->hwss.edp_power_control(link, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2389

tg->funcs->set_blank(tg, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2617

dce_enable_fe_clock(dc->hwseq, mi->inst, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2621

== true) {

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2633

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

273

bool result = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2739

dc->hwss.pipe_control_lock(dc, pipe_ctx, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2808

== true) {

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

330

fmt.sign = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

372

fmt.sign = true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

415

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

591

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

600

xfm->funcs->opp_power_on_regamma_lut(xfm, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

617

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

713

pipe_ctx->stream_res.stream_enc->id, true);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

830

edp_hpd_high = true;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

483

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

503

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

576

const unsigned int *pte_chroma = get_dvmm_hw_setting(tiling_info, format, true);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

376

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

458

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

505

power_on_lut(xfm, true, false, true);

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

514

power_on_lut(xfm, false, false, true);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1058

true,

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1132

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1228

dc->caps.is_apu = true;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1239

dce110_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_EXTERNAL, NULL, true);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1391

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

483

hws->wa.blnd_crtc_trigger = true;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

572

.flags.bits.IS_HBR2_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

573

.flags.bits.IS_TPS3_CAPABLE = true

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

826

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

831

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

874

result = true;

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

983

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1162

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1406

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

146

result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1976

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2077

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2112

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2168

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2196

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

347

tg110->base.funcs->enable_advanced_request(tg, true, &patched_crtc_timing);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

188

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

78

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

97

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

179

is_scaling_needed = true;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

188

is_scaling_needed = true;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

519

return true;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

597

filter_updated = true;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

712

xfm_dce->prescaler_on = true;

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

716

return true;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

278

return true;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

400

compressor->is_enabled = true;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

410

wait_for_fbc_state_changed(cp110, true);

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

450

return true;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

461

return true;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

794

compressor->base.options.bits.FBC_SUPPORT = true;

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

795

compressor->base.options.bits.LPT_SUPPORT = true;

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

124

return true;

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

150

return true;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1161

dc->caps.dual_link_dvi = true;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1202

CLOCK_SOURCE_ID_DP_DTO, &clk_src_regs[0], true);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

1336

return true;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

557

.ycbcr420_supported = true,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

558

.flags.bits.IS_HBR2_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

559

.flags.bits.IS_HBR3_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

560

.flags.bits.IS_TPS3_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

561

.flags.bits.IS_TPS4_CAPABLE = true

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

828

result = true;

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

932

return true;

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

165

return true;

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

191

return true;

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

245

dh_data->dchub_initialzied = true;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

1114

return true;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

447

.disable_clock_gate = true,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

491

return true;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

615

.ycbcr420_supported = true,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

616

.flags.bits.IS_HBR2_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

617

.flags.bits.IS_HBR3_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

618

.flags.bits.IS_TPS3_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

619

.flags.bits.IS_TPS4_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

934

dc->caps.dual_link_dvi = true;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

935

dc->caps.psp_setup_panel_mode = true;

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

972

&clk_src_regs[0], true);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

1141

return true;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

126

return true;

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

155

result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true);

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

789

return true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1036

dc->caps.disable_dp_clk_share = true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1045

return true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1095

dc->caps.is_apu = true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1106

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_EXTERNAL, NULL, true);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1118

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], true);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1246

dc->caps.disable_dp_clk_share = true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1255

return true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1305

dc->caps.is_apu = true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1316

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_EXTERNAL, NULL, true);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1326

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL1, &clk_src_regs[0], true);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1452

dc->caps.disable_dp_clk_share = true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

1461

return true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

657

.flags.bits.IS_HBR2_CAPABLE = true,

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

658

.flags.bits.IS_TPS3_CAPABLE = true

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

807

return true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

827

return true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

885

dc->caps.dual_link_dvi = true;

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

896

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_EXTERNAL, NULL, true);

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

908

dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

171

if (fixpoint == true)

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

185

if (hw_points_num == 0 || rgb_resulted == NULL || fixpoint == true)

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

186

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

189

fmt.sign = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

232

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

400

if (fixpoint == true) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

417

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_cm_common.c

570

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

209

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

248

dpp1_cm_power_on_regamma_lut(dpp_base, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

336

is_float = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

368

force_disable_cursor = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

374

force_disable_cursor = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

380

force_disable_cursor = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c

404

== true) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

355

RGAM_MEM_PWR_FORCE, power_on == true ? 0:1);

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

388

CM_RGAM_LUT_WRITE_SEL, is_ram_a == true ? 0:1);

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

609

SHARED_MEM_PWR_DIS, power_on == true ? 0:1);

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

671

*ram_a_inuse = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

672

ret = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

675

ret = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

693

is_ram_a == true ? 0:1);

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

713

bool is_ram_a = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

715

dpp1_power_on_degamma_lut(dpp_base, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

718

if (is_ram_a == true)

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

762

*ram_a_inuse = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

763

in_use = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

767

in_use = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

155

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

164

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

103

return enable ? true : false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

207

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

221

forced_pstate_allow = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

591

dh_data->dchub_initialzied = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

635

standard_swizzle = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

643

display_swizzle = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

652

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

657

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

662

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

667

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

672

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

687

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

693

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

698

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

744

true; /* half 128b request */

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

748

true; /* half 128b request */

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

825

output->grph.rgb.independent_64b_blks = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

829

output->capable = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c

832

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

478

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

709

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

712

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1029

dc->hwss.edp_power_control(link, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1049

tg->funcs->set_blank(tg, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1075

dc->res_pool->opps[i]->mpcc_disconnect_pending[pipe_ctx->plane_res.mpcc_inst] = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1130

enable_power_gating_plane(dc->hwseq, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1179

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1223

bool result = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1262

result = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1300

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1345

rc = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1640

pipe_ctx->plane_res.hubp->funcs->hubp_clk_cntl(pipe_ctx->plane_res.hubp, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1645

true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1700

if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1715

if (pipe_ctx->stream->csc_color_matrix.enable_adjustment == true) {

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1739

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1741

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1748

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1750

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1757

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1759

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1761

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1773

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2065

true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2208

fmt.sign = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2356

dcn10_pipe_control_lock(dc, top_pipe_to_program, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2360

dc->hwss.blank_pixel_data(dc, top_pipe_to_program, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2392

removed_pipe[i] = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2438

true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2510

non_stereo_timing = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2545

flags.PROGRAM_STEREO == 1 ? true:false,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2588

hubp->funcs->set_blank(hubp, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2607

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2695

fmt.sign = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

530

dpp_pg_control(hws, plane_id, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

531

hubp_pg_control(hws, plane_id, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

547

hubp->funcs->set_blank(hubp, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

581

hubp_pg_control(hws, 0, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

586

hws->wa_state.DEGVIDCN10_253_applied = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

627

tg->funcs->set_blank_data_double_buffer(tg, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

656

pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

675

true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

699

pipe_ctx->stream_res.tg->funcs->set_blank(pipe_ctx->stream_res.tg, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

782

bool need_recover = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

795

need_recover = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

819

hubp->funcs->set_hubp_blank_en(hubp, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

823

hubbub1_soft_reset(dc->res_pool->hubbub, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

832

hubp->funcs->hubp_disable_control(hubp, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

842

hubp->funcs->hubp_disable_control(hubp, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

854

hubp->funcs->set_hubp_blank_en(hubp, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

857

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

898

opp->mpcc_disconnect_pending[pipe_ctx->plane_res.mpcc_inst] = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

900

dc->optimized_required = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

948

hubp->power_gated = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

999

enable_power_gating_plane(dc->hwseq, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

173

disable_prbs_symbols(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

190

enable_phy_bypass_mode(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

269

enable_phy_bypass_mode(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

289

enable_phy_bypass_mode(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

301

disable_prbs_symbols(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

306

enable_phy_bypass_mode(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

334

enable_phy_bypass_mode(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

382

set_link_training_complete(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

409

set_link_training_complete(enc10, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

568

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

602

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

612

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

755

is_valid = (stream->timing.pixel_encoding == PIXEL_ENCODING_RGB) ? true : false;

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

758

is_valid = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

137

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

274

found = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

293

found = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1185

ret = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1270

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1282

optc1_set_blank_data_double_buffer(optc, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1321

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1350

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1372

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

374

optc1_set_blank_data_double_buffer(optc, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

477

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

500

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

568

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

645

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1223

dc->caps.is_apu = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1226

dc->caps.force_dp_tps4_for_cp2520 = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1275

&clk_src_regs[0], true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1330

dc->debug.disable_dmcu = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1473

return true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

523

.sanity_checks = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

524

.disable_dmcu = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

527

.clock_trace = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

539

.force_single_disp_pipe_split = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

541

.voltage_align_fclk = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

542

.disable_stereo_support = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

543

.vsr_support = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

545

.az_endpoint_mute_only = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

551

.disable_dmcu = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

553

.timing_trace = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

554

.clock_trace = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

555

.disable_stutter = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

556

.disable_pplib_clock_request = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

557

.disable_pplib_wm_range = true

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

724

.ycbcr420_supported = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

725

.flags.bits.IS_HBR2_CAPABLE = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

726

.flags.bits.IS_HBR3_CAPABLE = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

727

.flags.bits.IS_TPS3_CAPABLE = true,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

728

.flags.bits.IS_TPS4_CAPABLE = true

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

830

hws->wa.DEGVIDCN10_253 = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

831

hws->wa.false_optc_underflow = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

832

hws->wa.DEGVIDCN10_254 = true;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1380

enc1_se_enable_audio_clock(enc, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

1398

enc1_se_enable_audio_clock(enc, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

814

REG_UPDATE(DP_STEER_FIFO, DP_STEER_FIFO_RESET, true);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

877

REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true);

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

109

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

112

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

124

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

127

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

130

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

133

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

145

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

148

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

151

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

154

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

157

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

160

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

163

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

167

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

186

bool result = true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

52

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

55

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

58

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

61

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

64

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

67

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

70

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

82

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

85

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

88

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

91

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

94

return true;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c

97

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

104

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

107

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

110

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

113

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

116

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

119

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

131

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

134

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

146

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

149

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

152

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

155

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

167

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

170

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

173

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

176

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

179

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

182

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

185

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

189

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

208

bool result = true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

74

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

77

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

80

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

83

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

86

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

89

return true;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c

92

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

106

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

109

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

112

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

115

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

118

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

121

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

133

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

136

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

148

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

151

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

154

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

157

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

174

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

177

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

180

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

183

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

186

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

189

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

192

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

196

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

215

bool result = true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

76

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

79

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

82

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

85

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

88

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

91

return true;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c

94

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

104

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

107

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

110

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

113

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

116

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

119

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

131

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

134

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

146

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

149

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

152

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

155

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

167

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

170

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

173

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

176

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

179

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

182

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

185

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

189

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

208

bool result = true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

74

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

77

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

80

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

83

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

86

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

89

return true;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c

92

return true;

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

63

return true;

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

71

return true;

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

75

return true;

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

80

return true;

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

83

return true;

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

87

return true;

sys/dev/drm/amd/display/dc/gpio/hw_factory.c

92

return true;

sys/dev/drm/amd/display/dc/gpio/hw_translate.c

63

return true;

sys/dev/drm/amd/display/dc/gpio/hw_translate.c

71

return true;

sys/dev/drm/amd/display/dc/gpio/hw_translate.c

77

return true;

sys/dev/drm/amd/display/dc/gpio/hw_translate.c

80

return true;

sys/dev/drm/amd/display/dc/gpio/hw_translate.c

84

return true;

sys/dev/drm/amd/display/dc/gpio/hw_translate.c

89

return true;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

147

ctx->transaction_complete = true;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

148

ctx->operation_succeeded = true;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

261

ctx.operation_succeeded = true;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

342

ctx->operation_succeeded = true;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

363

ctx->transaction_complete = true;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

475

ctx.operation_succeeded = true;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

568

bool mot_used = true;

sys/dev/drm/amd/display/dc/i2caux/aux_engine.c

95

return true;

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

185

return true;

sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c

264

last_transaction = true; \

sys/dev/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c

107

i2caux_dce110->i2c_hw_buffer_in_use = true;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

294

return true;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

446

last_transaction = true;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c

125

non_generic = true;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c

141

i2caux_dce80->i2c_hw_buffer_in_use = true;

sys/dev/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c

206

bool use_i2c_sw_engine = true;

sys/dev/drm/amd/display/dc/i2caux/i2c_engine.c

89

return true;

sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c

114

bool first_iteration = true;

sys/dev/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c

230

result = true;

sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c

147

result = true;

sys/dev/drm/amd/display/dc/i2caux/i2c_hw_engine.c

203

return true;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

115

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

120

write_bit_to_ddc(ddc_handle, SDA, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

129

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

142

return true;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

166

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

171

write_bit_to_ddc(ddc_handle, SDA, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

177

return true;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

203

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

219

write_bit_to_ddc(ddc_handle, SDA, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

223

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

256

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

284

write_bit_to_ddc(ddc_handle, SCL, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

293

write_bit_to_ddc(ddc_handle, SDA, true);

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

297

return true;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

319

return true;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

342

return true;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

415

operation_succeeded = true;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

476

return true;

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

50

#define SDA true

sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c

95

return true;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

162

result = true;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

224

result = true;

sys/dev/drm/amd/display/dc/i2caux/i2caux.c

292

return true;

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

218

return true;

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

61

return true;

sys/dev/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

64

return true;

sys/dev/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

64

return true;

sys/dev/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

134

return true;

sys/dev/drm/amd/display/dc/irq/irq_service.c

123

return true;

sys/dev/drm/amd/display/dc/irq/irq_service.c

157

return true;

sys/dev/drm/amd/display/dc/virtual/virtual_link_encoder.c

119

return true;

sys/dev/drm/amd/display/dc/virtual/virtual_link_encoder.c

33

const struct dc_stream_state *stream) { return true; }

sys/dev/drm/amd/display/dc/virtual/virtual_stream_encoder.c

118

return true;

sys/dev/drm/amd/display/include/grph_object_id.h

302

return true;

sys/dev/drm/amd/display/include/logger_interface.h

72

static bool print_not_impl = true; \

sys/dev/drm/amd/display/include/logger_interface.h

73

if (print_not_impl == true) { \

sys/dev/drm/amd/display/include/signal_types.h

81

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1168

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1299

build_coefficients(&coeff, true);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1353

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1375

if (output_tf->type == TF_TYPE_PREDEFINED && canRomBeUsed == true &&

sys/dev/drm/amd/display/modules/color/color_gamma.c

1378

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1435

coordinates_x, tf == TRANSFER_FUNCTION_SRGB ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1446

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1505

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1559

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1589

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1635

tf == TRANSFER_FUNCTION_SRGB ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1649

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1685

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1707

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1724

coordinates_x, trans == TRANSFER_FUNCTION_SRGB ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1730

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1744

trans == TRANSFER_FUNCTION_HLG12 ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1750

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1773

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1790

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1803

coordinates_x, trans == TRANSFER_FUNCTION_SRGB ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1809

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

1823

trans == TRANSFER_FUNCTION_HLG12 ? true:false);

sys/dev/drm/amd/display/modules/color/color_gamma.c

1829

ret = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

252

uint32_t index = is_2_4 == true ? 0:1;

sys/dev/drm/amd/display/modules/color/color_gamma.c

424

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

433

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

442

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

540

return true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

622

pq_initialized = true;

sys/dev/drm/amd/display/modules/color/color_gamma.c

669

de_pq_initialized = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

1083

return true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

179

target_duration_in_us) ? true : false;

sys/dev/drm/amd/display/modules/freesync/freesync.c

207

in_out_vrr->fixed.ramping_done = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

220

in_out_vrr->fixed.ramping_done = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

276

in_out_vrr->btr.btr_active = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

286

in_out_vrr->fixed.fixed_active = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

388

update = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

399

in_out_vrr->fixed.fixed_active = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

402

update = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

432

return true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

436

return true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

438

return true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

440

return true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

454

return true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

477

return true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

631

infopacket->valid = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

659

infopacket->valid = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

673

infopacket->valid = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

691

infopacket->valid = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

785

in_out_vrr->supported = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

828

in_out_vrr->fixed.fixed_active = true;

sys/dev/drm/amd/display/modules/freesync/freesync.c

830

in_out_vrr->fixed.fixed_active = true;

sys/dev/drm/amd/display/modules/info_packet/info_packet.c

100

info_packet->valid = true;

sys/dev/drm/amd/display/modules/info_packet/info_packet.c

174

info_packet->valid = true;

sys/dev/drm/amd/display/modules/info_packet/info_packet.c

55

stereo3dSupport = true;

sys/dev/drm/amd/display/modules/info_packet/info_packet.c

90

info_packet->valid = true;

sys/dev/drm/amd/include/amd_pcie_helpers.h

31

return true;

sys/dev/drm/amd/include/amd_pcie_helpers.h

39

return true;

sys/dev/drm/amd/include/linux/chash.h

250

__chash_table_copy_out(&(*tbl).table, key, value, true)

sys/dev/drm/amd/powerplay/amd_powerplay.c

322

hwmgr->en_umd_pstate = true;

sys/dev/drm/amd/powerplay/amd_powerplay.c

51

hwmgr->pm_en = (amdgpu_dpm && hwmgr->not_vf) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

254

((struct amdgpu_device *)hwmgr->adev)->pm.dpm_enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

447

hwmgr->od_enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/hwmgr.c

91

hwmgr->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

521

(voltage_info, voltage_type, voltage_mode)) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

588

return true;

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

198

return true;

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

90

voltage_type, voltage_mode)) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

127

bNegated = true;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

262

bNEGATED = true;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

321

return true;

sys/dev/drm/amd/powerplay/hwmgr/ppevvmath.h

329

return true;

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1601

hwmgr->need_pp_table_upload = true;

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

721

ps->display.limitRefreshrate = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

113

smu10_data->need_min_deep_sleep_dcefclk = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

1142

data->water_marks_exist = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

118

smu10_data->gfx_off_controled_by_driver = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

257

smu10_data->vcn_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

258

smu10_data->isp_tileA_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

259

smu10_data->isp_tileB_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

264

true);

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

300

return true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

427

result = smum_smc_table_manager(hwmgr, (uint8_t *)table, SMU10_CLOCKTABLE, true);

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

808

data->cc6_setting_changed = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

991

latency_required = true;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

995

latency_required = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

122

smu7_update_uvd_dpm(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

150

smu7_update_vce_dpm(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1194

PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1202

PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1233

PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1256

protection = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1260

protection = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1265

protection = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1319

data->pcie_performance_request = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1472

smu7_avfs_control(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1474

smu7_avfs_control(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1570

data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1571

data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1572

data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1577

data->enable_tdc_limit_feature = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1578

data->enable_pkg_pwr_tracking_feature = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

1580

data->ulv_supported = hwmgr->feature_mask & PP_ULV_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

2875

return true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3247

ps->dc_compatible = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3260

data->use_pcie_performance_levels = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3283

data->use_pcie_power_saving_levels = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3395

ps->dc_compatible = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3408

data->use_pcie_performance_levels = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3433

data->use_pcie_power_saving_levels = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3692

data->pspp_notify_required = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3708

PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3720

PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3792

dpm_table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3859

PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3871

PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4141

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4144

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4150

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4807

return true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

792

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

807

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

840

entries[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

852

entries[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

1007

result = smu7_enable_didt(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu7_powertune.c

1070

data->cac_enabled = (0 == smc_result) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

143

hwmgr->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

177

hwmgr->fan_ctrl_enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

35

fan_speed_info->supports_percent_read = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

36

fan_speed_info->supports_percent_write = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

42

fan_speed_info->supports_rpm_read = true;

sys/dev/drm/amd/powerplay/hwmgr/smu7_thermal.c

43

fan_speed_info->supports_rpm_write = true;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1051

smu8_ps->need_dfs_bypass = true;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1071

smu8_nbdpm_pstate_enable_disable(hwmgr, false, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1232

smu8_nbdpm_pstate_enable_disable(hwmgr, true, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1241

smu8_nbdpm_pstate_enable_disable(hwmgr, false, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1461

hw_data->cc6_settings.cc6_setting_changed = true;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1865

smu8_enable_disable_uvd_dpm(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1867

smu8_enable_disable_uvd_dpm(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1925

smu8_dpm_update_uvd_dpm(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1953

data->vce_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1964

smu8_enable_disable_vce_dpm(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

671

data->acp_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

814

smu8_nbdpm_pstate_enable_disable(hwmgr, true, true);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

842

data->is_nb_dpm_enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

857

disable_switch = hw_data->cc6_settings.nb_pstate_switch_disable ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

858

enable_low_mem_state = hw_data->cc6_settings.nb_pstate_switch_disable ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

863

smu8_nbdpm_pstate_enable_disable(hwmgr, true, disable_switch);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

225

found = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1007

found = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

104

hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

106

hwmgr->feature_mask & PP_SOCCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

108

hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

110

hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

113

hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK ? false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1213

dpm_table->dpm_levels[dpm_table->count].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

122

hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

125

hwmgr->feature_mask & PP_ULV_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

128

hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1350

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1366

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

137

hwmgr->feature_mask & PP_AVFS_MASK ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

1380

(i == 0) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2266

if (0 == vega10_enable_smc_features(hwmgr, true,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2268

data->smu_features[GNLD_DPM_PREFETCHER].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2280

if (0 == vega10_enable_smc_features(hwmgr, true,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2282

data->smu_features[GNLD_ACG].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2347

true,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2351

data->smu_features[GNLD_AVFS].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2373

vega10_avfs_enable(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2375

vega10_avfs_enable(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2576

data->vbios_boot_state.bsoc_vddc_lock = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2611

result = vega10_avfs_enable(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2629

true,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2633

data->smu_features[GNLD_THERMAL].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2667

true,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2671

data->smu_features[GNLD_VR0HOT].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2676

true,

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2680

data->smu_features[GNLD_VR1HOT].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2693

true, data->smu_features[GNLD_ULV].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2696

data->smu_features[GNLD_ULV].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2723

true, data->smu_features[GNLD_DS_GFXCLK].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2726

data->smu_features[GNLD_DS_GFXCLK].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2731

true, data->smu_features[GNLD_DS_SOCCLK].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2734

data->smu_features[GNLD_DS_SOCCLK].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2739

true, data->smu_features[GNLD_DS_LCLK].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2742

data->smu_features[GNLD_DS_LCLK].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2747

true, data->smu_features[GNLD_DS_DCEFCLK].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2750

data->smu_features[GNLD_DS_DCEFCLK].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2801

if(data->smu_features[GNLD_LED_DISPLAY].supported == true){

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2843

data->smu_features[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2850

true, feature_mask)) {

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2858

if(data->smu_features[GNLD_LED_DISPLAY].supported == true){

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2860

true, data->smu_features[GNLD_LED_DISPLAY].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2862

data->smu_features[GNLD_LED_DISPLAY].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2874

true, data->smu_features[GNLD_ACDC].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2877

data->smu_features[GNLD_ACDC].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

2906

vega10_enable_disable_PCC_limit_feature(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3085

ps->dc_compatible = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3352

dpm_table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3371

dpm_table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3555

data->dpm_table.gfx_table.dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3559

data->dpm_table.mem_table.dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3854

vega10_notify_smc_display_change(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

414

data->smu_features[GNLD_DPM_PREFETCHER].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

417

data->smu_features[GNLD_DPM_GFXCLK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

420

data->smu_features[GNLD_DPM_UCLK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

423

data->smu_features[GNLD_DPM_SOCCLK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

426

data->smu_features[GNLD_DPM_UVD].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

429

data->smu_features[GNLD_DPM_VCE].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

432

data->smu_features[GNLD_DPM_LINK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

435

data->smu_features[GNLD_DPM_DCEFCLK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

439

data->smu_features[GNLD_DS_GFXCLK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

440

data->smu_features[GNLD_DS_SOCCLK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

441

data->smu_features[GNLD_DS_LCLK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

442

data->smu_features[GNLD_DS_DCEFCLK].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

446

data->smu_features[GNLD_PPT].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4466

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4470

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

449

data->smu_features[GNLD_TDC].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

452

data->smu_features[GNLD_THERMAL].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

455

data->smu_features[GNLD_FAN_CONTROL].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

458

data->smu_features[GNLD_FW_CTF].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

461

data->smu_features[GNLD_AVFS].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

464

data->smu_features[GNLD_LED_DISPLAY].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

467

data->smu_features[GNLD_VR1HOT].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

470

data->smu_features[GNLD_VR0HOT].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

476

data->smu_features[GNLD_ACG].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

478

data->smu_features[GNLD_DIDT].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4781

return true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

488

data->smu_features[GNLD_PCC_LIMIT].supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1012

vega10_didt_set_mask(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1075

vega10_didt_set_mask(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1123

vega10_didt_set_mask(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1233

result = vega10_enable_smc_features(hwmgr, true, data->smu_features[GNLD_DIDT].smu_feature_bitmap);

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1235

data->smu_features[GNLD_DIDT].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1353

true, data->smu_features[GNLD_PPT].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

1359

true, data->smu_features[GNLD_TDC].smu_feature_bitmap),

sys/dev/drm/amd/powerplay/hwmgr/vega10_powertune.c

967

vega10_didt_set_mask(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

170

hwmgr->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

189

hwmgr, true,

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

194

data->smu_features[GNLD_FAN_CONTROL].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

436

true,

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

440

data->smu_features[GNLD_FW_CTF].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

46

fan_speed_info->supports_percent_read = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

47

fan_speed_info->supports_percent_write = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

54

fan_speed_info->supports_rpm_read = true;

sys/dev/drm/amd/powerplay/hwmgr/vega10_thermal.c

55

fan_speed_info->supports_rpm_write = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1000

table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1178

vega12_get_clock_ranges(hwmgr, &gfx_clk, PPCLK_GFXCLK, true) == 0,

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1201

vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, true) == 0,

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

1402

vega12_notify_smc_display_change(hwmgr, true);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2174

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2178

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

353

false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

427

data->gfxoff_controlled_by_driver = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

526

dpm_table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

787

data->uvd_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

788

data->vce_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

812

enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

838

enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ? true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

979

table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

49

fan_speed_info->supports_rpm_read = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

50

fan_speed_info->supports_rpm_write = true;

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

76

hwmgr, true,

sys/dev/drm/amd/powerplay/hwmgr/vega12_thermal.c

81

data->smu_features[GNLD_FAN_CONTROL].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1106

ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, true);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1253

ret = smum_smc_table_manager(hwmgr, (uint8_t *)(&od_table), TABLE_OVERDRIVE, true);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1533

data->uvd_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1534

data->vce_power_gated = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1630

table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1657

table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1883

ret = vega20_get_clock_ranges(hwmgr, &gfx_clk, PPCLK_GFXCLK, true);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1909

ret = vega20_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, true);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1924

ret = smum_smc_table_manager(hwmgr, (uint8_t *)&metrics_table, TABLE_SMU_METRICS, true);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1958

ret = smum_smc_table_manager(hwmgr, (uint8_t *)&metrics_table, TABLE_SMU_METRICS, true);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2602

data->gfxclk_overdrive = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2649

data->memclk_overdrive = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

2728

TABLE_OVERDRIVE, true);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3197

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

3202

is_update_required = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

361

false : true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

525

dpm_table->dpm_levels[i].enabled = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

828

true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

886

true : false;

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

702

od_supported = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

171

fan_speed_info->supports_percent_read = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

172

fan_speed_info->supports_percent_write = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

173

fan_speed_info->supports_rpm_read = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

174

fan_speed_info->supports_rpm_write = true;

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

68

hwmgr, true,

sys/dev/drm/amd/powerplay/hwmgr/vega20_thermal.c

74

data->smu_features[GNLD_FAN_CONTROL].enabled = true;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2445

bool result = true;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

782

vol_found = true;

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

798

vol_found = true;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1211

mem_level->StutterEnable = true;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

2544

? true : false;

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

330

return true;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2375

bool result = true;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

2660

? true : false;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

556

vol_found = true;

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

576

vol_found = true;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1112

mem_level->StutterEnable = true;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1716

data->apply_avfs_cks_off_voltage = (avfs_params.ucEnableApplyAVFS_CKS_OFF_Voltage == 1) ? true : false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

2397

? true : false;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

328

return true;

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

586

hwmgr->avfs_supported = true;

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

405

TASK_TYPE_UCODE_SAVE, true);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

434

TASK_TYPE_UCODE_SAVE, true);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

477

TASK_TYPE_UCODE_LOAD, true);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

490

TASK_TYPE_INITIALIZE, true);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

517

SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_G, true);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

530

TASK_TYPE_INITIALIZE, true);

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

869

return true;

sys/dev/drm/amd/powerplay/smumgr/smu8_smumgr.c

878

return true;

sys/dev/drm/amd/powerplay/smumgr/smu9_smumgr.c

50

return true;

sys/dev/drm/amd/powerplay/smumgr/smumgr.c

190

return true;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2835

bool result = true;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3142

? true : false;

sys/dev/drm/amd/powerplay/smumgr/vega10_smumgr.c

120

return true;

sys/dev/drm/amd/powerplay/smumgr/vega12_smumgr.c

177

return true;

sys/dev/drm/amd/powerplay/smumgr/vega20_smumgr.c

558

return true;

sys/dev/drm/amd/powerplay/smumgr/vega20_smumgr.c

59

return true;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1018

mem_level->StutterEnable = true;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1564

return true;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1670

(avfs_params.ucEnableApplyAVFS_CKS_OFF_Voltage == 1) ? true : false;

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

301

? true : false;

sys/dev/drm/drm_atomic.c

1080

return config->funcs->atomic_commit(state->dev, state, true);

sys/dev/drm/drm_atomic.c

1173

__drm_state_dump(dev, &p, true);

sys/dev/drm/drm_atomic.c

507

return true;

sys/dev/drm/drm_atomic.c

84

state->allow_modeset = true;

sys/dev/drm/drm_atomic_helper.c

1708

ret = drm_atomic_helper_wait_for_fences(dev, state, true);

sys/dev/drm/drm_atomic_helper.c

1719

ret = drm_atomic_helper_swap_state(state, true);

sys/dev/drm/drm_atomic_helper.c

1801

bool completed = true;

sys/dev/drm/drm_atomic_helper.c

1978

commit->abort_completion = true;

sys/dev/drm/drm_atomic_helper.c

269

crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

2766

state->legacy_cursor_update = true;

sys/dev/drm/drm_atomic_helper.c

2804

plane_state->state->legacy_cursor_update = true;

sys/dev/drm/drm_atomic_helper.c

292

crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

2938

ret = handle_conflicting_encoders(state, true);

sys/dev/drm/drm_atomic_helper.c

297

crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

2994

crtc_state->active = true;

sys/dev/drm/drm_atomic_helper.c

3136

ret = __drm_atomic_helper_disable_all(dev, &ctx, true);

sys/dev/drm/drm_atomic_helper.c

375

crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

603

new_crtc_state->mode_changed = true;

sys/dev/drm/drm_atomic_helper.c

618

new_crtc_state->mode_changed = true;

sys/dev/drm/drm_atomic_helper.c

619

new_crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

625

new_crtc_state->active_changed = true;

sys/dev/drm/drm_atomic_helper.c

660

new_crtc_state->connectors_changed = true;

sys/dev/drm/drm_atomic_helper.c

782

drm_rect_debug_print("src: ", &plane_state->src, true);

sys/dev/drm/drm_atomic_helper.c

82

crtc_state->planes_changed = true;

sys/dev/drm/drm_atomic_helper.c

91

crtc_state->planes_changed = true;

sys/dev/drm/drm_atomic_uapi.c

148

state->enable = true;

sys/dev/drm/drm_atomic_uapi.c

87

state->enable = true;

sys/dev/drm/drm_atomic_uapi.c

911

active = true;

sys/dev/drm/drm_auth.c

163

ret = drm_set_master(dev, fpriv, true);

sys/dev/drm/drm_blend.c

463

crtc_state->zpos_changed = true;

sys/dev/drm/drm_blend.c

503

new_crtc_state->zpos_changed = true;

sys/dev/drm/drm_bridge.c

193

bool ret = true;

sys/dev/drm/drm_bridge.c

196

return true;

sys/dev/drm/drm_connector.c

1709

return true;

sys/dev/drm/drm_connector.c

355

return true;

sys/dev/drm/drm_crtc_helper.c

1025

crtc_state->planes_changed = true;

sys/dev/drm/drm_crtc_helper.c

1026

crtc_state->mode_changed = true;

sys/dev/drm/drm_crtc_helper.c

110

return true;

sys/dev/drm/drm_crtc_helper.c

143

return true;

sys/dev/drm/drm_crtc_helper.c

282

bool ret = true;

sys/dev/drm/drm_crtc_helper.c

289

return true;

sys/dev/drm/drm_crtc_helper.c

606

mode_changed = true;

sys/dev/drm/drm_crtc_helper.c

608

mode_changed = true;

sys/dev/drm/drm_crtc_helper.c

610

fb_changed = true;

sys/dev/drm/drm_crtc_helper.c

614

fb_changed = true;

sys/dev/drm/drm_crtc_helper.c

620

mode_changed = true;

sys/dev/drm/drm_crtc_helper.c

650

mode_changed = true;

sys/dev/drm/drm_crtc_helper.c

659

mode_changed = true;

sys/dev/drm/drm_crtc_helper.c

700

mode_changed = true;

sys/dev/drm/drm_crtc_helper.c

716

mode_changed = true;

sys/dev/drm/drm_dp_dual_mode_helper.c

316

*enabled = true;

sys/dev/drm/drm_dp_helper.c

1279

{ OUI(0x00, 0x22, 0xb9), DEVICE_ID_ANY, true, BIT(DP_DPCD_QUIRK_CONSTANT_N) },

sys/dev/drm/drm_dp_helper.c

76

return true;

sys/dev/drm/drm_dp_helper.c

91

return true;

sys/dev/drm/drm_dp_mst_topology.c

1090

send_link = true;

sys/dev/drm/drm_dp_mst_topology.c

1160

created = true;

sys/dev/drm/drm_dp_mst_topology.c

1197

if (ret == true)

sys/dev/drm/drm_dp_mst_topology.c

1249

dowork = true;

sys/dev/drm/drm_dp_mst_topology.c

1258

dowork = true;

sys/dev/drm/drm_dp_mst_topology.c

1396

return true;

sys/dev/drm/drm_dp_mst_topology.c

1581

ret = process_single_tx_qlock(mgr, txmsg, true);

sys/dev/drm/drm_dp_mst_topology.c

1613

mstb->link_address_sent = true;

sys/dev/drm/drm_dp_mst_topology.c

197

return true;

sys/dev/drm/drm_dp_mst_topology.c

2100

return true;

sys/dev/drm/drm_dp_mst_topology.c

2278

ret = drm_dp_sideband_msg_build(msg, replyblock, len, true);

sys/dev/drm/drm_dp_mst_topology.c

2307

return true;

sys/dev/drm/drm_dp_mst_topology.c

2375

if (!drm_dp_get_one_sb_msg(mgr, true)) {

sys/dev/drm/drm_dp_mst_topology.c

2459

*handled = true;

sys/dev/drm/drm_dp_mst_topology.c

2464

*handled = true;

sys/dev/drm/drm_dp_mst_topology.c

2469

*handled = true;

sys/dev/drm/drm_dp_mst_topology.c

2710

return true;

sys/dev/drm/drm_dp_mst_topology.c

2724

return true;

sys/dev/drm/drm_dp_mst_topology.c

2987

return true;

sys/dev/drm/drm_dp_mst_topology.c

3128

send_hotplug = true;

sys/dev/drm/drm_dp_mst_topology.c

3292

reading = true;

sys/dev/drm/drm_dp_mst_topology.c

358

msg->have_somt = true;

sys/dev/drm/drm_dp_mst_topology.c

361

msg->have_eomt = true;

sys/dev/drm/drm_dp_mst_topology.c

378

return true;

sys/dev/drm/drm_dp_mst_topology.c

427

return true;

sys/dev/drm/drm_dp_mst_topology.c

447

return true;

sys/dev/drm/drm_dp_mst_topology.c

461

return true;

sys/dev/drm/drm_dp_mst_topology.c

480

return true;

sys/dev/drm/drm_dp_mst_topology.c

502

return true;

sys/dev/drm/drm_dp_mst_topology.c

524

return true;

sys/dev/drm/drm_dp_mst_topology.c

542

return true;

sys/dev/drm/drm_dp_mst_topology.c

560

return true;

sys/dev/drm/drm_dp_mst_topology.c

622

return true;

sys/dev/drm/drm_dp_mst_topology.c

645

return true;

sys/dev/drm/drm_dp_mst_topology.c

698

msg->path_msg = true;

sys/dev/drm/drm_dp_mst_topology.c

717

msg->path_msg = true;

sys/dev/drm/drm_dp_mst_topology.c

733

msg->path_msg = true;

sys/dev/drm/drm_dp_mst_topology.c

898

wake_tx = true;

sys/dev/drm/drm_dp_mst_topology.c

903

wake_tx = true;

sys/dev/drm/drm_drv.c

1097

drm_core_init_complete = true;

sys/dev/drm/drm_drv.c

1326

found = true;

sys/dev/drm/drm_drv.c

382

return true;

sys/dev/drm/drm_drv.c

421

dev->unplugged = true;

sys/dev/drm/drm_drv.c

896

dev->registered = true;

sys/dev/drm/drm_edid.c

1377

return true;

sys/dev/drm/drm_edid.c

1416

*edid_corrupt = true;

sys/dev/drm/drm_edid.c

1421

*edid_corrupt = true;

sys/dev/drm/drm_edid.c

1429

*edid_corrupt = true;

sys/dev/drm/drm_edid.c

1459

return true;

sys/dev/drm/drm_edid.c

1493

if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))

sys/dev/drm/drm_edid.c

1496

return true;

sys/dev/drm/drm_edid.c

1992

*(bool *)data = true;

sys/dev/drm/drm_edid.c

2162

true);

sys/dev/drm/drm_edid.c

2292

mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);

sys/dev/drm/drm_edid.c

2430

return true;

sys/dev/drm/drm_edid.c

2446

ok = true;

sys/dev/drm/drm_edid.c

2854

.preferred = true,

sys/dev/drm/drm_edid.c

2969

return true;

sys/dev/drm/drm_edid.c

3607

info->has_hdmi_infoframe = true;

sys/dev/drm/drm_edid.c

3689

return true;

sys/dev/drm/drm_edid.c

3703

return true;

sys/dev/drm/drm_edid.c

4206

return true;

sys/dev/drm/drm_edid.c

4248

has_audio = true;

sys/dev/drm/drm_edid.c

4331

display->has_hdmi_infoframe = true;

sys/dev/drm/drm_edid.c

4334

hdmi->scdc.supported = true;

sys/dev/drm/drm_edid.c

4336

hdmi->scdc.read_request = true;

sys/dev/drm/drm_edid.c

4360

scdc->scrambling.supported = true;

sys/dev/drm/drm_edid.c

4364

scdc->scrambling.low_rates = true;

sys/dev/drm/drm_edid.c

5120

connector->has_tile = true;

sys/dev/drm/drm_edid.c

5122

connector->tile_is_single_monitor = true;

sys/dev/drm/drm_edid.c

5211

ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);

sys/dev/drm/drm_encoder.c

200

uses_atomic = true;

sys/dev/drm/drm_encoder_slave.c

146

return true;

sys/dev/drm/drm_fb_helper.c

1833

ret = restore_fbdev_mode_atomic(fb_helper, true);

sys/dev/drm/drm_fb_helper.c

1969

bool lastv = true, lasth = true;

sys/dev/drm/drm_fb_helper.c

2207

enabled[i] = drm_connector_enabled(connector, true);

sys/dev/drm/drm_fb_helper.c

2248

can_clone = true;

sys/dev/drm/drm_fb_helper.c

2272

return true;

sys/dev/drm/drm_fb_helper.c

2276

can_clone = true;

sys/dev/drm/drm_fb_helper.c

2298

return true;

sys/dev/drm/drm_fb_helper.c

2405

return true;

sys/dev/drm/drm_fb_helper.c

2416

return true;

sys/dev/drm/drm_fb_helper.c

2722

fb_helper->deferred_setup = true;

sys/dev/drm/drm_fb_helper.c

2863

fb_helper->delayed_hotplug = true;

sys/dev/drm/drm_fb_helper.c

47

static bool drm_fbdev_emulation = true;

sys/dev/drm/drm_fb_helper.c

517

return restore_fbdev_mode_atomic(fb_helper, true);

sys/dev/drm/drm_fb_helper.c

584

return true;

sys/dev/drm/drm_fb_helper.c

609

error = true;

sys/dev/drm/drm_fb_helper.c

621

if (ret == true)

sys/dev/drm/drm_fourcc.c

167

{ .format = DRM_FORMAT_ARGB4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

168

{ .format = DRM_FORMAT_ABGR4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

169

{ .format = DRM_FORMAT_RGBA4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

170

{ .format = DRM_FORMAT_BGRA4444, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

175

{ .format = DRM_FORMAT_ARGB1555, .depth = 15, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

176

{ .format = DRM_FORMAT_ABGR1555, .depth = 15, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

177

{ .format = DRM_FORMAT_RGBA5551, .depth = 15, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

178

{ .format = DRM_FORMAT_BGRA5551, .depth = 15, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

187

{ .format = DRM_FORMAT_RGB565_A8, .depth = 24, .num_planes = 2, .cpp = { 2, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

188

{ .format = DRM_FORMAT_BGR565_A8, .depth = 24, .num_planes = 2, .cpp = { 2, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

193

{ .format = DRM_FORMAT_ARGB2101010, .depth = 30, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

194

{ .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

195

{ .format = DRM_FORMAT_RGBA1010102, .depth = 30, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

196

{ .format = DRM_FORMAT_BGRA1010102, .depth = 30, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

197

{ .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

198

{ .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

199

{ .format = DRM_FORMAT_RGBA8888, .depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

200

{ .format = DRM_FORMAT_BGRA8888, .depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

201

{ .format = DRM_FORMAT_RGB888_A8, .depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

202

{ .format = DRM_FORMAT_BGR888_A8, .depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

203

{ .format = DRM_FORMAT_XRGB8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

204

{ .format = DRM_FORMAT_XBGR8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

205

{ .format = DRM_FORMAT_RGBX8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

206

{ .format = DRM_FORMAT_BGRX8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

sys/dev/drm/drm_fourcc.c

207

{ .format = DRM_FORMAT_YUV410, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 4, .vsub = 4, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

208

{ .format = DRM_FORMAT_YVU410, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 4, .vsub = 4, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

209

{ .format = DRM_FORMAT_YUV411, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 4, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

210

{ .format = DRM_FORMAT_YVU411, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 4, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

211

{ .format = DRM_FORMAT_YUV420, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 2, .vsub = 2, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

212

{ .format = DRM_FORMAT_YVU420, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 2, .vsub = 2, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

213

{ .format = DRM_FORMAT_YUV422, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 2, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

214

{ .format = DRM_FORMAT_YVU422, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 2, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

215

{ .format = DRM_FORMAT_YUV444, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 1, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

216

{ .format = DRM_FORMAT_YVU444, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 1, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

217

{ .format = DRM_FORMAT_NV12, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

218

{ .format = DRM_FORMAT_NV21, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

219

{ .format = DRM_FORMAT_NV16, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

220

{ .format = DRM_FORMAT_NV61, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

221

{ .format = DRM_FORMAT_NV24, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

222

{ .format = DRM_FORMAT_NV42, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

223

{ .format = DRM_FORMAT_YUYV, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

224

{ .format = DRM_FORMAT_YVYU, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

225

{ .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

226

{ .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },

sys/dev/drm/drm_fourcc.c

227

{ .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },

sys/dev/drm/drm_framebuffer.c

928

disable_crtcs = true;

sys/dev/drm/drm_gem.c

295

final = true;

sys/dev/drm/drm_gem.c

583

obj->on_map = true;

sys/dev/drm/drm_ioctl.c

899

return true;

sys/dev/drm/drm_irq.c

118

dev->irq_enabled = true;

sys/dev/drm/drm_mipi_dsi.c

398

return true;

sys/dev/drm/drm_mipi_dsi.c

430

return true;

sys/dev/drm/drm_mm.c

206

leftmost = true;

sys/dev/drm/drm_mm.c

258

bool first = true;

sys/dev/drm/drm_mm.c

445

node->allocated = true;

sys/dev/drm/drm_mm.c

564

node->allocated = true;

sys/dev/drm/drm_mm.c

646

new->allocated = true;

sys/dev/drm/drm_mm.c

756

node->scanned_block = true;

sys/dev/drm/drm_mm.c

812

return true;

sys/dev/drm/drm_mode_object.c

120

return true;

sys/dev/drm/drm_mode_object.c

74

return __drm_mode_object_add(dev, obj, obj_type, true, NULL);

sys/dev/drm/drm_modes.c

1010

return true;

sys/dev/drm/drm_modes.c

1035

return true;

sys/dev/drm/drm_modes.c

1378

found_it = true;

sys/dev/drm/drm_modes.c

1466

refresh_specified = true;

sys/dev/drm/drm_modes.c

1475

bpp_specified = true;

sys/dev/drm/drm_modes.c

1483

yres_specified = true;

sys/dev/drm/drm_modes.c

1489

was_digit = true;

sys/dev/drm/drm_modes.c

1494

cvt = true;

sys/dev/drm/drm_modes.c

1499

rb = true;

sys/dev/drm/drm_modes.c

1504

margins = true;

sys/dev/drm/drm_modes.c

1509

interlace = true;

sys/dev/drm/drm_modes.c

1545

res_specified = true;

sys/dev/drm/drm_modes.c

1561

mode->specified = true;

sys/dev/drm/drm_modes.c

1567

mode->refresh_specified = true;

sys/dev/drm/drm_modes.c

1572

mode->bpp_specified = true;

sys/dev/drm/drm_modes.c

1581

return true;

sys/dev/drm/drm_modeset_helper.c

123

primary->format_default = true;

sys/dev/drm/drm_modeset_lock.c

206

ctx->interruptible = true;

sys/dev/drm/drm_modeset_lock.c

317

return modeset_lock(contended, ctx, ctx->interruptible, true);

sys/dev/drm/drm_probe_helper.c

236

poll = true;

sys/dev/drm/drm_probe_helper.c

251

poll = true;

sys/dev/drm/drm_probe_helper.c

396

bool verbose_prune = true;

sys/dev/drm/drm_probe_helper.c

430

ret = drm_helper_probe_detect(connector, &ctx, true);

sys/dev/drm/drm_probe_helper.c

460

dev->mode_config.delayed_event = true;

sys/dev/drm/drm_probe_helper.c

587

repoll = true;

sys/dev/drm/drm_probe_helper.c

609

repoll = true;

sys/dev/drm/drm_probe_helper.c

642

changed = true;

sys/dev/drm/drm_probe_helper.c

65

static bool drm_kms_helper_poll = true;

sys/dev/drm/drm_probe_helper.c

725

dev->mode_config.poll_enabled = true;

sys/dev/drm/drm_probe_helper.c

790

changed = true;

sys/dev/drm/drm_property.c

577

true, drm_property_free_blob);

sys/dev/drm/drm_property.c

73

return true;

sys/dev/drm/drm_property.c

748

return true;

sys/dev/drm/drm_property.c

836

found = true;

sys/dev/drm/drm_property.c

885

return true;

sys/dev/drm/drm_property.c

892

return true;

sys/dev/drm/drm_property.c

903

return true;

sys/dev/drm/drm_property.c

908

return true;

sys/dev/drm/drm_property.c

915

return true;

sys/dev/drm/drm_property.c

924

return true;

sys/dev/drm/drm_scdc_helper.c

186

return true;

sys/dev/drm/drm_scdc_helper.c

247

return true;

sys/dev/drm/drm_simple_kms_helper.c

144

false, true);

sys/dev/drm/drm_vblank.c

1710

drm_update_vblank_count(dev, pipe, true);

sys/dev/drm/drm_vblank.c

1732

return true;

sys/dev/drm/drm_vblank.c

680

return true;

sys/dev/drm/drm_vblank.c

691

return true;

sys/dev/drm/drm_vblank.c

967

WRITE_ONCE(vblank->enabled, true);

sys/dev/drm/i915/dvo_ch7017.c

236

return true;

sys/dev/drm/i915/dvo_ch7017.c

371

return true;

sys/dev/drm/i915/dvo_ch7xxx.c

162

return true;

sys/dev/drm/i915/dvo_ch7xxx.c

189

return true;

sys/dev/drm/i915/dvo_ch7xxx.c

213

ch7xxx->quiet = true;

sys/dev/drm/i915/dvo_ch7xxx.c

239

return true;

sys/dev/drm/i915/dvo_ch7xxx.c

329

return true;

sys/dev/drm/i915/dvo_ivch.c

222

return true;

sys/dev/drm/i915/dvo_ivch.c

251

return true;

sys/dev/drm/i915/dvo_ivch.c

275

priv->quiet = true;

sys/dev/drm/i915/dvo_ivch.c

303

return true;

sys/dev/drm/i915/dvo_ivch.c

391

return true;

sys/dev/drm/i915/dvo_ns2501.c

419

return true;

sys/dev/drm/i915/dvo_ns2501.c

454

return true;

sys/dev/drm/i915/dvo_ns2501.c

484

ns->quiet = true;

sys/dev/drm/i915/dvo_ns2501.c

507

return true;

sys/dev/drm/i915/dvo_sil164.c

121

return true;

sys/dev/drm/i915/dvo_sil164.c

145

sil->quiet = true;

sys/dev/drm/i915/dvo_sil164.c

167

return true;

sys/dev/drm/i915/dvo_sil164.c

239

return true;

sys/dev/drm/i915/dvo_sil164.c

95

return true;

sys/dev/drm/i915/dvo_tfp410.c

120

return true;

sys/dev/drm/i915/dvo_tfp410.c

146

return true;

sys/dev/drm/i915/dvo_tfp410.c

181

tfp->quiet = true;

sys/dev/drm/i915/dvo_tfp410.c

197

return true;

sys/dev/drm/i915/dvo_tfp410.c

260

return true;

sys/dev/drm/i915/gvt/mpt.h

175

p->writeprotection = true;

sys/dev/drm/i915/i915_cmd_parser.c

1134

return true;

sys/dev/drm/i915/i915_cmd_parser.c

1235

return true;

sys/dev/drm/i915/i915_cmd_parser.c

1361

active = true;

sys/dev/drm/i915/i915_cmd_parser.c

205

#define F true

sys/dev/drm/i915/i915_cmd_parser.c

637

{ ivb_master_regs, ARRAY_SIZE(ivb_master_regs), true },

sys/dev/drm/i915/i915_cmd_parser.c

642

{ ivb_master_regs, ARRAY_SIZE(ivb_master_regs), true },

sys/dev/drm/i915/i915_cmd_parser.c

648

{ hsw_master_regs, ARRAY_SIZE(hsw_master_regs), true },

sys/dev/drm/i915/i915_cmd_parser.c

653

{ hsw_master_regs, ARRAY_SIZE(hsw_master_regs), true },

sys/dev/drm/i915/i915_cmd_parser.c

716

bool ret = true;

sys/dev/drm/i915/i915_cmd_parser.c

719

return true;

sys/dev/drm/i915/i915_cmd_parser.c

752

bool ret = true;

sys/dev/drm/i915/i915_cmd_parser.c

782

return true;

sys/dev/drm/i915/i915_drv.c

1142

return true;

sys/dev/drm/i915/i915_drv.c

1144

return true;

sys/dev/drm/i915/i915_drv.c

1146

return true;

sys/dev/drm/i915/i915_drv.c

1148

return true;

sys/dev/drm/i915/i915_drv.c

1288

dram_info->valid = true;

sys/dev/drm/i915/i915_drv.c

129

shown_bug_once = true;

sys/dev/drm/i915/i915_drv.c

1374

dram_info->valid = true;

sys/dev/drm/i915/i915_drv.c

1947

return true;

sys/dev/drm/i915/i915_drv.c

2007

intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true);

sys/dev/drm/i915/i915_drv.c

2459

i915_gem_reset_engine(engine, active_request, true);

sys/dev/drm/i915/i915_drv.c

2535

return i915_drm_suspend_late(dev, true);

sys/dev/drm/i915/i915_drv.c

2583

ret = i915_drm_suspend_late(dev, true);

sys/dev/drm/i915/i915_drv.c

2922

err = vlv_force_gfx_clock(dev_priv, true);

sys/dev/drm/i915/i915_drv.c

2941

vlv_allow_gt_wake(dev_priv, true);

sys/dev/drm/i915/i915_drv.c

2959

ret = vlv_force_gfx_clock(dev_priv, true);

sys/dev/drm/i915/i915_drv.c

2964

err = vlv_allow_gt_wake(dev_priv, true);

sys/dev/drm/i915/i915_drv.c

3041

dev_priv->runtime_pm.suspended = true;

sys/dev/drm/i915/i915_drv.c

3097

bxt_display_core_init(dev_priv, true);

sys/dev/drm/i915/i915_drv.c

3104

ret = vlv_resume_prepare(dev_priv, true);

sys/dev/drm/i915/i915_drv.c

558

dev_priv->mchbar_need_disable = true;

sys/dev/drm/i915/i915_drv.c

75

return true;

sys/dev/drm/i915/i915_drv.h

1225

return true;

sys/dev/drm/i915/i915_drv.h

143

return true;

sys/dev/drm/i915/i915_drv.h

2314

for ((__iter) = __sgt_iter((__sgt)->sgl, true); \

sys/dev/drm/i915/i915_drv.h

2317

(__iter) = __sgt_iter(__sg_next((__iter).sgp), true), 0 : 0)

sys/dev/drm/i915/i915_drv.h

2736

return true;

sys/dev/drm/i915/i915_drv.h

3607

#define I915_READ8(reg) dev_priv->uncore.funcs.mmio_readb(dev_priv, (reg), true)

sys/dev/drm/i915/i915_drv.h

3608

#define I915_WRITE8(reg, val) dev_priv->uncore.funcs.mmio_writeb(dev_priv, (reg), (val), true)

sys/dev/drm/i915/i915_drv.h

3610

#define I915_READ16(reg) dev_priv->uncore.funcs.mmio_readw(dev_priv, (reg), true)

sys/dev/drm/i915/i915_drv.h

3611

#define I915_WRITE16(reg, val) dev_priv->uncore.funcs.mmio_writew(dev_priv, (reg), (val), true)

sys/dev/drm/i915/i915_drv.h

3615

#define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)

sys/dev/drm/i915/i915_drv.h

3616

#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)

sys/dev/drm/i915/i915_drv.h

3634

#define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)

sys/dev/drm/i915/i915_drv.h

3778

return true;

sys/dev/drm/i915/i915_drv.h

3794

return true;

sys/dev/drm/i915/i915_drv.h

3843

return true;

sys/dev/drm/i915/i915_gem.c

1023

ret = i915_gem_object_set_to_cpu_domain(obj, true);

sys/dev/drm/i915/i915_gem.c

1050

obj->mm.dirty = true;

sys/dev/drm/i915/i915_gem.c

1437

ret = i915_gem_object_set_to_gtt_domain(obj, true);

sys/dev/drm/i915/i915_gem.c

2278

trace_i915_gem_object_fault(obj, page_offset, true, write);

sys/dev/drm/i915/i915_gem.c

232

i915->gt.awake = true;

sys/dev/drm/i915/i915_gem.c

2594

reg->dirty = true;

sys/dev/drm/i915/i915_gem.c

2737

__i915_gem_object_release_shmem(obj, pages, true);

sys/dev/drm/i915/i915_gem.c

2857

return true;

sys/dev/drm/i915/i915_gem.c

3071

obj->mm.quirked = true;

sys/dev/drm/i915/i915_gem.c

368

obj->cache_dirty = true;

sys/dev/drm/i915/i915_gem.c

3761

return true;

sys/dev/drm/i915/i915_gem.c

3794

if (dma_fence_default_wait(&rq->fence, true,

sys/dev/drm/i915/i915_gem.c

3821

return true;

sys/dev/drm/i915/i915_gem.c

4327

obj->mm.dirty = true;

sys/dev/drm/i915/i915_gem.c

4390

obj->mm.dirty = true;

sys/dev/drm/i915/i915_gem.c

4520

obj->cache_dirty = true; /* Always invalidate stale cachelines */

sys/dev/drm/i915/i915_gem.c

5063

obj->mm.quirked = true;

sys/dev/drm/i915/i915_gem.c

5245

return true;

sys/dev/drm/i915/i915_gem.c

6359

WARN_ON(i915_gem_object_set_to_cpu_domain(obj, true));

sys/dev/drm/i915/i915_gem.c

67

return true;

sys/dev/drm/i915/i915_gem.c

881

obj->cache_dirty = true;

sys/dev/drm/i915/i915_gem_batch_pool.c

105

if (!reservation_object_test_signaled_rcu(resv, true))

sys/dev/drm/i915/i915_gem_batch_pool.c

127

true));

sys/dev/drm/i915/i915_gem_clflush.c

162

true, I915_FENCE_TIMEOUT,

sys/dev/drm/i915/i915_gem_clflush.c

177

return true;

sys/dev/drm/i915/i915_gem_context.c

683

any_active = true;

sys/dev/drm/i915/i915_gem_context.c

713

return true;

sys/dev/drm/i915/i915_gem_evict.c

53

return true;

sys/dev/drm/i915/i915_gem_execbuffer.c

1036

err = i915_gem_object_set_to_gtt_domain(obj, true);

sys/dev/drm/i915/i915_gem_execbuffer.c

1185

err = i915_request_await_object(rq, vma->obj, true);

sys/dev/drm/i915/i915_gem_execbuffer.c

1195

GEM_BUG_ON(!reservation_object_test_signaled_rcu(batch->resv, true));

sys/dev/drm/i915/i915_gem_execbuffer.c

1269

!reservation_object_test_signaled_rcu(vma->resv, true))) {

sys/dev/drm/i915/i915_gem_execbuffer.c

1905

return true;

sys/dev/drm/i915/i915_gem_execbuffer.c

369

return true;

sys/dev/drm/i915/i915_gem_execbuffer.c

372

return true;

sys/dev/drm/i915/i915_gem_execbuffer.c

376

return true;

sys/dev/drm/i915/i915_gem_execbuffer.c

380

return true;

sys/dev/drm/i915/i915_gem_execbuffer.c

384

return true;

sys/dev/drm/i915/i915_gem_execbuffer.c

388

return true;

sys/dev/drm/i915/i915_gem_execbuffer.c

582

return true;

sys/dev/drm/i915/i915_gem_gtt.c

1077

ret = true;

sys/dev/drm/i915/i915_gem_gtt.c

1151

maybe_64K = true;

sys/dev/drm/i915/i915_gem_gtt.c

1558

found = true;

sys/dev/drm/i915/i915_gem_gtt.c

1670

ppgtt->vm.pt_kmap_wc = true;

sys/dev/drm/i915/i915_gem_gtt.c

1705

gen8_ppgtt_notify_vgt(ppgtt, true);

sys/dev/drm/i915/i915_gem_gtt.c

1867

ppgtt->scan_for_unused_pt = true;

sys/dev/drm/i915/i915_gem_gtt.c

1949

flush = true;

sys/dev/drm/i915/i915_gem_gtt.c

2302

vm->closed = true;

sys/dev/drm/i915/i915_gem_gtt.c

2314

vm->closed = true;

sys/dev/drm/i915/i915_gem_gtt.c

2998

ggtt->vm.closed = true;

sys/dev/drm/i915/i915_gem_gtt.c

3634

ggtt->vm.is_ggtt = true;

sys/dev/drm/i915/i915_gem_gtt.c

3708

ggtt->vm.closed = true; /* skip rewriting PTE on VMA unbind */

sys/dev/drm/i915/i915_gem_gtt.c

555

vm_free_pages_release(vm, true);

sys/dev/drm/i915/i915_gem_gtt.c

877

return true;

sys/dev/drm/i915/i915_gem_gtt.h

454

(pt = (pd)->page_table[iter], true); \

sys/dev/drm/i915/i915_gem_gtt.h

462

(pt = (pd)->page_table[iter], true); \

sys/dev/drm/i915/i915_gem_gtt.h

528

(pt = (pd)->page_table[iter], true); \

sys/dev/drm/i915/i915_gem_gtt.h

536

(pd = (pdp)->page_directory[iter], true); \

sys/dev/drm/i915/i915_gem_gtt.h

544

(pdp = (pml4)->pdps[iter], true); \

sys/dev/drm/i915/i915_gem_object.h

364

obj->base.vma_node.readonly = true;

sys/dev/drm/i915/i915_gem_shrinker.c

420

return true;

sys/dev/drm/i915/i915_gem_shrinker.c

44

return true;

sys/dev/drm/i915/i915_gem_shrinker.c

52

*unlock = true;

sys/dev/drm/i915/i915_gem_shrinker.c

60

*unlock = true;

sys/dev/drm/i915/i915_gem_shrinker.c

61

return true;

sys/dev/drm/i915/i915_gem_tiling.c

143

return true;

sys/dev/drm/i915/i915_gem_tiling.c

174

return true;

sys/dev/drm/i915/i915_gem_tiling.c

184

return true;

sys/dev/drm/i915/i915_gem_tiling.c

194

return true;

sys/dev/drm/i915/i915_gem_tiling.c

280

obj->mm.quirked = true;

sys/dev/drm/i915/i915_gem_tiling.c

293

vma->fence->dirty = true;

sys/dev/drm/i915/i915_gem_userptr.c

103

mo->attached = true;

sys/dev/drm/i915/i915_gem_userptr.c

676

__i915_gem_userptr_set_active(obj, true);

sys/dev/drm/i915/i915_gpu_error.c

108

return true;

sys/dev/drm/i915/i915_gpu_error.c

1610

&vm->active_list, true);

sys/dev/drm/i915/i915_gpu_error.c

1612

&vm->inactive_list, true);

sys/dev/drm/i915/i915_gpu_error.c

1904

warned = true;

sys/dev/drm/i915/i915_gpu_error.c

232

return true;

sys/dev/drm/i915/i915_gpu_error.c

332

return true;

sys/dev/drm/i915/i915_gpu_error.c

91

return true;

sys/dev/drm/i915/i915_irq.c

1101

return true;

sys/dev/drm/i915/i915_irq.c

1499

tasklet = true;

sys/dev/drm/i915/i915_irq.c

1771

drm_crtc_add_crc_entry(&crtc->base, true,

sys/dev/drm/i915/i915_irq.c

1967

blc_event = true;

sys/dev/drm/i915/i915_irq.c

1991

blc_event = true;

sys/dev/drm/i915/i915_irq.c

2738

found = true;

sys/dev/drm/i915/i915_irq.c

2746

found = true;

sys/dev/drm/i915/i915_irq.c

2791

found = true;

sys/dev/drm/i915/i915_irq.c

2799

found = true;

sys/dev/drm/i915/i915_irq.c

2806

found = true;

sys/dev/drm/i915/i915_irq.c

2812

found = true;

sys/dev/drm/i915/i915_irq.c

291

return true;

sys/dev/drm/i915/i915_irq.c

4101

dev_priv->display_irqs_enabled = true;

sys/dev/drm/i915/i915_irq.c

4829

dev->vblank_disable_immediate = true;

sys/dev/drm/i915/i915_irq.c

4837

dev_priv->display_irqs_enabled = true;

sys/dev/drm/i915/i915_irq.c

4952

dev_priv->runtime_pm.irqs_enabled = true;

sys/dev/drm/i915/i915_irq.c

4994

dev_priv->runtime_pm.irqs_enabled = true;

sys/dev/drm/i915/i915_irq.c

501

rps->interrupts_enabled = true;

sys/dev/drm/i915/i915_irq.c

553

dev_priv->guc.interrupts_enabled = true;

sys/dev/drm/i915/i915_memcpy.c

90

return true;

sys/dev/drm/i915/i915_params.h

60

param(bool, enable_hangcheck, true) \

sys/dev/drm/i915/i915_params.h

65

param(bool, error_capture, true) \

sys/dev/drm/i915/i915_params.h

67

param(bool, verbose_state_checks, true) \

sys/dev/drm/i915/i915_params.h

69

param(bool, enable_dp_mst, true) \

sys/dev/drm/i915/i915_pci.c

113

.has_snoop = true, \

sys/dev/drm/i915/i915_pci.c

114

.has_coherent_ggtt = true, \

sys/dev/drm/i915/i915_pci.c

183

.has_snoop = true, \

sys/dev/drm/i915/i915_pci.c

184

.has_coherent_ggtt = true, \

sys/dev/drm/i915/i915_pci.c

226

.has_snoop = true, \

sys/dev/drm/i915/i915_pci.c

227

.has_coherent_ggtt = true, \

sys/dev/drm/i915/i915_pci.c

251

.has_coherent_ggtt = true, \

sys/dev/drm/i915/i915_pci.c

296

.has_coherent_ggtt = true, \

sys/dev/drm/i915/i915_pci.c

356

.has_snoop = true,

sys/dev/drm/i915/i915_pci.c

449

.has_snoop = true,

sys/dev/drm/i915/i915_pci.c

525

.has_snoop = true, \

sys/dev/drm/i915/i915_pci.c

753

bool use_kms = true;

sys/dev/drm/i915/i915_pci.c

76

.has_snoop = true, \

sys/dev/drm/i915/i915_perf.c

1752

ce->state->obj->mm.dirty = true;

sys/dev/drm/i915/i915_perf.c

2277

dev_priv->perf.oa.pollin = true;

sys/dev/drm/i915/i915_perf.c

2365

stream->enabled = true;

sys/dev/drm/i915/i915_perf.c

2548

bool privileged_op = true;

sys/dev/drm/i915/i915_perf.c

277

static u32 i915_perf_stream_paranoid = true;

sys/dev/drm/i915/i915_perf.c

2778

props->oa_periodic = true;

sys/dev/drm/i915/i915_perf.c

2980

return true;

sys/dev/drm/i915/i915_perf.c

3508

dev_priv->perf.initialized = true;

sys/dev/drm/i915/i915_pmu.c

129

if (!i915->pmu.timer_enabled && pmu_needs_timer(i915, true)) {

sys/dev/drm/i915/i915_pmu.c

130

i915->pmu.timer_enabled = true;

sys/dev/drm/i915/i915_pmu.c

156

return true;

sys/dev/drm/i915/i915_pmu.c

671

i915->pmu.timer_enabled &= pmu_needs_timer(i915, true);

sys/dev/drm/i915/i915_pmu.c

763

return cpumap_print_to_pagebuf(true, buf, &i915_pmu_cpumask);

sys/dev/drm/i915/i915_request.c

1185

return true;

sys/dev/drm/i915/i915_request.c

1259

return true;

sys/dev/drm/i915/i915_request.c

62

return intel_engine_enable_signaling(to_request(fence), true);

sys/dev/drm/i915/i915_sw_fence.c

253

return true;

sys/dev/drm/i915/i915_sw_fence.c

260

return true;

sys/dev/drm/i915/i915_vgpu.c

80

dev_priv->vgpu.active = true;

sys/dev/drm/i915/i915_vma.c

105

obj->mm.dirty = true; /* be paranoid */

sys/dev/drm/i915/i915_vma.c

436

return true;

sys/dev/drm/i915/i915_vma.c

440

return true;

sys/dev/drm/i915/i915_vma.c

443

return true;

sys/dev/drm/i915/i915_vma.c

447

return true;

sys/dev/drm/i915/i915_vma.c

451

return true;

sys/dev/drm/i915/i915_vma.c

499

return true;

sys/dev/drm/i915/i915_vma.c

513

return true;

sys/dev/drm/i915/i915_vma.c

91

if (reservation_object_test_signaled_rcu(obj->resv, true))

sys/dev/drm/i915/intel_acpi.c

143

return true;

sys/dev/drm/i915/intel_atomic.c

131

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_atomic.c

300

crtc_state->base.planes_changed = true;

sys/dev/drm/i915/intel_audio.c

251

return true;

sys/dev/drm/i915/intel_audio.c

993

dev_priv->audio_component_registered = true;

sys/dev/drm/i915/intel_bios.c

1586

dev_priv->vbt.backlight.present = true;

sys/dev/drm/i915/intel_bios.c

1816

return true;

sys/dev/drm/i915/intel_bios.c

1835

return true;

sys/dev/drm/i915/intel_bios.c

1855

return true;

sys/dev/drm/i915/intel_bios.c

1877

return true;

sys/dev/drm/i915/intel_bios.c

1885

return true;

sys/dev/drm/i915/intel_bios.c

1926

return true;

sys/dev/drm/i915/intel_bios.c

1963

return true;

sys/dev/drm/i915/intel_bios.c

1994

return true;

sys/dev/drm/i915/intel_bios.c

1999

return true;

sys/dev/drm/i915/intel_bios.c

2014

return true;

sys/dev/drm/i915/intel_bios.c

2047

return true;

sys/dev/drm/i915/intel_bios.c

2086

return true;

sys/dev/drm/i915/intel_bios.c

2091

return true;

sys/dev/drm/i915/intel_bios.c

2096

return true;

sys/dev/drm/i915/intel_bios.c

2133

return true;

sys/dev/drm/i915/intel_bios.c

2138

return true;

sys/dev/drm/i915/intel_bios.c

2143

return true;

sys/dev/drm/i915/intel_bios.c

2148

return true;

sys/dev/drm/i915/intel_bios.c

2153

return true;

sys/dev/drm/i915/intel_breadcrumbs.c

313

b->irq_armed = true;

sys/dev/drm/i915/intel_breadcrumbs.c

323

return true;

sys/dev/drm/i915/intel_breadcrumbs.c

338

enabled = true;

sys/dev/drm/i915/intel_breadcrumbs.c

414

first = true;

sys/dev/drm/i915/intel_breadcrumbs.c

626

bool do_schedule = true;

sys/dev/drm/i915/intel_breadcrumbs.c

764

return true;

sys/dev/drm/i915/intel_breadcrumbs.c

790

return true;

sys/dev/drm/i915/intel_color.c

379

reenable_ips = true;

sys/dev/drm/i915/intel_color.c

673

true,

sys/dev/drm/i915/intel_crt.c

246

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);

sys/dev/drm/i915/intel_crt.c

291

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_crt.c

292

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);

sys/dev/drm/i915/intel_crt.c

357

return true;

sys/dev/drm/i915/intel_crt.c

370

pipe_config->has_pch_encoder = true;

sys/dev/drm/i915/intel_crt.c

372

return true;

sys/dev/drm/i915/intel_crt.c

391

pipe_config->has_pch_encoder = true;

sys/dev/drm/i915/intel_crt.c

406

return true;

sys/dev/drm/i915/intel_crt.c

448

ret = true;

sys/dev/drm/i915/intel_crt.c

498

ret = true;

sys/dev/drm/i915/intel_crt.c

548

ret = true;

sys/dev/drm/i915/intel_crt.c

567

intel_gmbus_force_bit(i2c, true);

sys/dev/drm/i915/intel_crt.c

615

ret = true;

sys/dev/drm/i915/intel_crt.c

695

restore_vblank = true;

sys/dev/drm/i915/intel_ddi.c

1799

if (state == true)

sys/dev/drm/i915/intel_ddi.c

2038

ret = true;

sys/dev/drm/i915/intel_ddi.c

2054

ret = true;

sys/dev/drm/i915/intel_ddi.c

2946

intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);

sys/dev/drm/i915/intel_ddi.c

2994

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_ddi.c

3013

wait = true;

sys/dev/drm/i915/intel_ddi.c

3308

wait = true;

sys/dev/drm/i915/intel_ddi.c

3406

pipe_config->has_hdmi_sink = true;

sys/dev/drm/i915/intel_ddi.c

3410

pipe_config->has_infoframe = true;

sys/dev/drm/i915/intel_ddi.c

3414

pipe_config->hdmi_scrambling = true;

sys/dev/drm/i915/intel_ddi.c

3416

pipe_config->hdmi_high_tmds_clock_ratio = true;

sys/dev/drm/i915/intel_ddi.c

3563

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_ddi.c

3718

return true;

sys/dev/drm/i915/intel_ddi.c

3727

return true;

sys/dev/drm/i915/intel_ddi.c

3782

init_dp = true;

sys/dev/drm/i915/intel_ddi.c

3783

init_lspcon = true;

sys/dev/drm/i915/intel_device_info.c

827

invalid = true;

sys/dev/drm/i915/intel_display.c

1001

found = true;

sys/dev/drm/i915/intel_display.c

10091

return true;

sys/dev/drm/i915/intel_display.c

10407

crtc_state->base.active = crtc_state->base.enable = true;

sys/dev/drm/i915/intel_display.c

10441

return true;

sys/dev/drm/i915/intel_display.c

10693

return true;

sys/dev/drm/i915/intel_display.c

10704

return true;

sys/dev/drm/i915/intel_display.c

10770

pipe_config->fb_changed = true;

sys/dev/drm/i915/intel_display.c

10787

pipe_config->update_wm_pre = true;

sys/dev/drm/i915/intel_display.c

10791

pipe_config->disable_cxsr = true;

sys/dev/drm/i915/intel_display.c

10794

pipe_config->update_wm_post = true;

sys/dev/drm/i915/intel_display.c

10798

pipe_config->disable_cxsr = true;

sys/dev/drm/i915/intel_display.c

10802

pipe_config->update_wm_pre = true;

sys/dev/drm/i915/intel_display.c

10803

pipe_config->update_wm_post = true;

sys/dev/drm/i915/intel_display.c

10819

pipe_config->disable_lp_wm = true;

sys/dev/drm/i915/intel_display.c

1082

wait_for_pipe_scanline_moving(crtc, true);

sys/dev/drm/i915/intel_display.c

10851

return true;

sys/dev/drm/i915/intel_display.c

10867

pipe_config->update_wm_post = true;

sys/dev/drm/i915/intel_display.c

10887

crtc_state->planes_changed = true;

sys/dev/drm/i915/intel_display.c

11212

bool ret = true;

sys/dev/drm/i915/intel_display.c

11319

bool retry = true;

sys/dev/drm/i915/intel_display.c

11445

return true;

sys/dev/drm/i915/intel_display.c

11453

return true;

sys/dev/drm/i915/intel_display.c

11464

return true;

sys/dev/drm/i915/intel_display.c

11502

return true;

sys/dev/drm/i915/intel_display.c

11534

bool ret = true;

sys/dev/drm/i915/intel_display.c

1154

#define assert_fdi_tx_enabled(d, p) assert_fdi_tx(d, p, true)

sys/dev/drm/i915/intel_display.c

1169

#define assert_fdi_rx_enabled(d, p) assert_fdi_rx(d, p, true)

sys/dev/drm/i915/intel_display.c

11997

found = true;

sys/dev/drm/i915/intel_display.c

12001

found = enabled = true;

sys/dev/drm/i915/intel_display.c

1207

bool locked = true;

sys/dev/drm/i915/intel_display.c

12400

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_display.c

12427

intel_state->modeset = true;

sys/dev/drm/i915/intel_display.c

12529

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_display.c

12544

any_ms = true;

sys/dev/drm/i915/intel_display.c

12558

pipe_config, true)) {

sys/dev/drm/i915/intel_display.c

12560

pipe_config->update_pipe = true;

sys/dev/drm/i915/intel_display.c

12564

any_ms = true;

sys/dev/drm/i915/intel_display.c

1269

state = true;

sys/dev/drm/i915/intel_display.c

12715

vbl_wait = true;

sys/dev/drm/i915/intel_display.c

12723

progress = true;

sys/dev/drm/i915/intel_display.c

1298

#define assert_plane_enabled(p) assert_plane(p, true)

sys/dev/drm/i915/intel_display.c

13060

ret = drm_atomic_helper_swap_state(state, true);

sys/dev/drm/i915/intel_display.c

13331

intel_rps_mark_interactive(dev_priv, true);

sys/dev/drm/i915/intel_display.c

13332

intel_state->rps_interactive = true;

sys/dev/drm/i915/intel_display.c

13445

intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true);

sys/dev/drm/i915/intel_display.c

13451

intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder, true);

sys/dev/drm/i915/intel_display.c

13559

return true;

sys/dev/drm/i915/intel_display.c

13570

return true;

sys/dev/drm/i915/intel_display.c

13576

return true;

sys/dev/drm/i915/intel_display.c

13793

return true;

sys/dev/drm/i915/intel_display.c

14215

return true;

sys/dev/drm/i915/intel_display.c

14240

return true;

sys/dev/drm/i915/intel_display.c

15224

intel_state->skip_intermediate_wm = true;

sys/dev/drm/i915/intel_display.c

15239

WARN(true, "Could not determine valid watermarks for inherited state\n");

sys/dev/drm/i915/intel_display.c

15247

cs->wm.need_postvbl_update = true;

sys/dev/drm/i915/intel_display.c

15311

crtc_state->color_mgmt_changed = true;

sys/dev/drm/i915/intel_display.c

15350

dev->mode_config.allow_fb_modifiers = true;

sys/dev/drm/i915/intel_display.c

15604

return true;

sys/dev/drm/i915/intel_display.c

15675

crtc->cpu_fifo_underrun_disabled = true;

sys/dev/drm/i915/intel_display.c

15686

crtc->pch_fifo_underrun_disabled = true;

sys/dev/drm/i915/intel_display.c

2771

return true;

sys/dev/drm/i915/intel_display.c

2932

dev_priv->preserve_bios_swizzle = true;

sys/dev/drm/i915/intel_display.c

3022

return true;

sys/dev/drm/i915/intel_display.c

3374

false, true);

sys/dev/drm/i915/intel_display.c

3783

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_display.c

3788

to_intel_atomic_state(state)->skip_intermediate_wm = true;

sys/dev/drm/i915/intel_display.c

3944

ironlake_pfit_disable(crtc, true);

sys/dev/drm/i915/intel_display.c

4474

try_wait_for_completion(&commit->cleanup_done) : true;

sys/dev/drm/i915/intel_display.c

4482

return true;

sys/dev/drm/i915/intel_display.c

4674

cpt_set_fdi_bc_bifurcation(dev, true);

sys/dev/drm/i915/intel_display.c

4678

cpt_set_fdi_bc_bifurcation(dev, true);

sys/dev/drm/i915/intel_display.c

4928

need_scaling = true;

sys/dev/drm/i915/intel_display.c

4931

need_scaling = true;

sys/dev/drm/i915/intel_display.c

5047

fb ? true : false, fb ? fb->format->format : 0);

sys/dev/drm/i915/intel_display.c

5265

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_display.c

5311

return true;

sys/dev/drm/i915/intel_display.c

5323

return true;

sys/dev/drm/i915/intel_display.c

5331

return true;

sys/dev/drm/i915/intel_display.c

5347

return true;

sys/dev/drm/i915/intel_display.c

5428

skl_wa_clkgate(dev_priv, crtc->pipe, true);

sys/dev/drm/i915/intel_display.c

5429

skl_wa_528(dev_priv, crtc->pipe, true);

sys/dev/drm/i915/intel_display.c

5559

intel_opregion_notify_encoder(encoder, true);

sys/dev/drm/i915/intel_display.c

5666

intel_crtc->active = true;

sys/dev/drm/i915/intel_display.c

5713

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_display.c

5714

intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_display.c

5803

intel_crtc->active = true;

sys/dev/drm/i915/intel_display.c

5809

glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);

sys/dev/drm/i915/intel_display.c

5851

intel_ddi_set_vc_payload_alloc(pipe_config, true);

sys/dev/drm/i915/intel_display.c

5942

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_display.c

5943

intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_display.c

6148

intel_crtc->active = true;

sys/dev/drm/i915/intel_display.c

6150

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_display.c

6211

intel_crtc->active = true;

sys/dev/drm/i915/intel_display.c

6214

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/i915/intel_display.c

644

return true;

sys/dev/drm/i915/intel_display.c

6611

needs_recompute = true;

sys/dev/drm/i915/intel_display.c

6612

pipe_config->bw_constrained = true;

sys/dev/drm/i915/intel_display.c

6649

return true;

sys/dev/drm/i915/intel_display.c

6674

return true;

sys/dev/drm/i915/intel_display.c

6752

pipe_config->double_wide = true;

sys/dev/drm/i915/intel_display.c

8006

pipe_config->limited_color_range = true;

sys/dev/drm/i915/intel_display.c

8072

ret = true;

sys/dev/drm/i915/intel_display.c

8096

has_panel = true;

sys/dev/drm/i915/intel_display.c

8097

has_lvds = true;

sys/dev/drm/i915/intel_display.c

8100

has_panel = true;

sys/dev/drm/i915/intel_display.c

8102

has_cpu_edp = true;

sys/dev/drm/i915/intel_display.c

8114

can_ssc = true;

sys/dev/drm/i915/intel_display.c

8126

using_ssc_source = true;

sys/dev/drm/i915/intel_display.c

8355

with_spread = true;

sys/dev/drm/i915/intel_display.c

836

found = true;

sys/dev/drm/i915/intel_display.c

8483

has_vga = true;

sys/dev/drm/i915/intel_display.c

8492

lpt_enable_clkout_dp(dev_priv, true, true);

sys/dev/drm/i915/intel_display.c

879

return true;

sys/dev/drm/i915/intel_display.c

8873

pipe_config->pch_pfit.enabled = true;

sys/dev/drm/i915/intel_display.c

9025

pipe_config->pch_pfit.enabled = true;

sys/dev/drm/i915/intel_display.c

9078

pipe_config->limited_color_range = true;

sys/dev/drm/i915/intel_display.c

9084

pipe_config->has_pch_encoder = true;

sys/dev/drm/i915/intel_display.c

9128

ret = true;

sys/dev/drm/i915/intel_display.c

9337

hsw_disable_lcpll(dev_priv, true, true);

sys/dev/drm/i915/intel_display.c

936

found = true;

sys/dev/drm/i915/intel_display.c

9642

pipe_config->has_pch_encoder = true;

sys/dev/drm/i915/intel_display.c

9674

active = true;

sys/dev/drm/i915/intel_display.c

9725

pipe_config->ips_enabled = true;

sys/dev/drm/i915/intel_display.c

9847

true, true);

sys/dev/drm/i915/intel_dp.c

1774

pipe_config->clock_set = true;

sys/dev/drm/i915/intel_dp.c

1949

return true;

sys/dev/drm/i915/intel_dp.c

2019

return true;

sys/dev/drm/i915/intel_dp.c

2039

pipe_config->has_pch_encoder = true;

sys/dev/drm/i915/intel_dp.c

2105

pipe_config->has_drrs = true;

sys/dev/drm/i915/intel_dp.c

2119

return true;

sys/dev/drm/i915/intel_dp.c

2340

intel_dp->want_panel_vdd = true;

sys/dev/drm/i915/intel_dp.c

2718

#define assert_edp_pll_enabled(d) assert_edp_pll((d), true)

sys/dev/drm/i915/intel_dp.c

2844

return true;

sys/dev/drm/i915/intel_dp.c

2944

pipe_config->limited_color_range = true;

sys/dev/drm/i915/intel_dp.c

3055

chv_data_lane_soft_reset(encoder, old_crtc_state, true);

sys/dev/drm/i915/intel_dp.c

3189

edp_panel_vdd_off(intel_dp, true);

sys/dev/drm/i915/intel_dp.c

3340

intel_dp_init_panel_power_sequencer_registers(intel_dp, true);

sys/dev/drm/i915/intel_dp.c

3577

uniq_trans_scale = true;

sys/dev/drm/i915/intel_dp.c

3880

intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);

sys/dev/drm/i915/intel_dp.c

3881

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);

sys/dev/drm/i915/intel_dp.c

3977

intel_dp->use_rate_select = true;

sys/dev/drm/i915/intel_dp.c

3983

return true;

sys/dev/drm/i915/intel_dp.c

4022

return true; /* native DP sink */

sys/dev/drm/i915/intel_dp.c

4025

return true; /* no per-port downstream info */

sys/dev/drm/i915/intel_dp.c

4032

return true;

sys/dev/drm/i915/intel_dp.c

4295

if (bret == true) {

sys/dev/drm/i915/intel_dp.c

4320

if (bret == true) {

sys/dev/drm/i915/intel_dp.c

4420

intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true);

sys/dev/drm/i915/intel_dp.c

4423

intel_crtc_pch_transcoder(crtc), true);

sys/dev/drm/i915/intel_dp.c

4539

return true;

sys/dev/drm/i915/intel_dp.c

4846

return true;

sys/dev/drm/i915/intel_dp.c

4877

return true;

sys/dev/drm/i915/intel_dp.c

4944

return true;

sys/dev/drm/i915/intel_dp.c

5132

intel_dp->detect_done = true;

sys/dev/drm/i915/intel_dp.c

558

return true;

sys/dev/drm/i915/intel_dp.c

5615

intel_dp->reset_link_params = true;

sys/dev/drm/i915/intel_dp.c

5679

intel_dp->reset_link_params = true;

sys/dev/drm/i915/intel_dp.c

5735

return true;

sys/dev/drm/i915/intel_dp.c

574

return true;

sys/dev/drm/i915/intel_dp.c

6427

return true;

sys/dev/drm/i915/intel_dp.c

6521

return true;

sys/dev/drm/i915/intel_dp.c

6582

intel_dp->reset_link_params = true;

sys/dev/drm/i915/intel_dp.c

6624

connector->interlace_allowed = true;

sys/dev/drm/i915/intel_dp.c

6671

return true;

sys/dev/drm/i915/intel_dp.c

6753

return true;

sys/dev/drm/i915/intel_dp.c

748

!chv_phy_powergate_ch(dev_priv, phy, ch, true);

sys/dev/drm/i915/intel_dp.c

849

intel_dp_init_panel_power_sequencer_registers(intel_dp, true);

sys/dev/drm/i915/intel_dp.c

903

return true;

sys/dev/drm/i915/intel_dp.c

992

intel_dp->pps_reset = true;

sys/dev/drm/i915/intel_dp_aux_backlight.c

173

return true;

sys/dev/drm/i915/intel_dp_aux_backlight.c

218

set_aux_backlight_enable(intel_dp, true);

sys/dev/drm/i915/intel_dp_aux_backlight.c

258

return true;

sys/dev/drm/i915/intel_dp_link_training.c

124

return true;

sys/dev/drm/i915/intel_dp_link_training.c

200

return true;

sys/dev/drm/i915/intel_dp_link_training.c

229

max_vswing_reached = true;

sys/dev/drm/i915/intel_dp_link_training.c

319

channel_eq = true;

sys/dev/drm/i915/intel_dp_link_training.c

347

intel_dp->link_trained = true;

sys/dev/drm/i915/intel_dp_mst.c

106

return true;

sys/dev/drm/i915/intel_dp_mst.c

242

drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);

sys/dev/drm/i915/intel_dp_mst.c

296

return true;

sys/dev/drm/i915/intel_dp_mst.c

435

return true;

sys/dev/drm/i915/intel_dp_mst.c

581

return true;

sys/dev/drm/i915/intel_dp_mst.c

591

intel_dp->can_mst = true;

sys/dev/drm/i915/intel_dp_mst.c

74

pipe_config->has_audio = true;

sys/dev/drm/i915/intel_dpio_phy.c

158

.dual_channel = true,

sys/dev/drm/i915/intel_dpio_phy.c

331

return true;

sys/dev/drm/i915/intel_dpio_phy.c

470

was_enabled = true;

sys/dev/drm/i915/intel_dpio_phy.c

498

return true;

sys/dev/drm/i915/intel_dpio_phy.c

530

ok = true;

sys/dev/drm/i915/intel_dpio_phy.c

797

!chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true);

sys/dev/drm/i915/intel_dpio_phy.c

799

chv_phy_powergate_lanes(encoder, true, lane_mask);

sys/dev/drm/i915/intel_dpio_phy.c

804

chv_data_lane_soft_reset(encoder, crtc_state, true);

sys/dev/drm/i915/intel_dpll_mgr.c

1018

ret = true;

sys/dev/drm/i915/intel_dpll_mgr.c

1048

ret = true;

sys/dev/drm/i915/intel_dpll_mgr.c

1299

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

1336

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

1373

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

1650

ret = true;

sys/dev/drm/i915/intel_dpll_mgr.c

1710

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

1791

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

194

pll->on = true;

sys/dev/drm/i915/intel_dpll_mgr.c

2120

ret = true;

sys/dev/drm/i915/intel_dpll_mgr.c

2273

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

2303

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

2345

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

2511

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

2519

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

2552

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

2699

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

2870

return true;

sys/dev/drm/i915/intel_dpll_mgr.c

3021

ret = true;

sys/dev/drm/i915/intel_dpll_mgr.c

67

state->dpll_set = true;

sys/dev/drm/i915/intel_dpll_mgr.c

887

return true;

sys/dev/drm/i915/intel_dpll_mgr.h

329

#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)

sys/dev/drm/i915/intel_drv.h

1279

return true;

sys/dev/drm/i915/intel_drv.h

1313

return true;

sys/dev/drm/i915/intel_drv.h

1625

#define assert_pll_enabled(d, p) assert_pll(d, p, true)

sys/dev/drm/i915/intel_drv.h

1628

#define assert_dsi_pll_enabled(d) assert_dsi_pll(d, true)

sys/dev/drm/i915/intel_drv.h

1632

#define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)

sys/dev/drm/i915/intel_drv.h

1635

#define assert_pipe_enabled(d, p) assert_pipe(d, p, true)

sys/dev/drm/i915/intel_dsi_vbt.c

241

map->init = true;

sys/dev/drm/i915/intel_dsi_vbt.c

799

return true;

sys/dev/drm/i915/intel_dvo.c

205

intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);

sys/dev/drm/i915/intel_dvo.c

259

return true;

sys/dev/drm/i915/intel_dvo.c

469

intel_gmbus_force_bit(i2c, true);

sys/dev/drm/i915/intel_dvo.c

541

intel_dvo->panel_wants_dither = true;

sys/dev/drm/i915/intel_engine_cs.c

1162

return true;

sys/dev/drm/i915/intel_engine_cs.c

1264

skip = true;

sys/dev/drm/i915/intel_engine_cs.c

306

DRIVER_CAPS(dev_priv)->has_logical_contexts = true;

sys/dev/drm/i915/intel_engine_cs.c

898

bool idle = true;

sys/dev/drm/i915/intel_engine_cs.c

902

return true;

sys/dev/drm/i915/intel_engine_cs.c

931

return true;

sys/dev/drm/i915/intel_engine_cs.c

938

return true;

sys/dev/drm/i915/intel_engine_cs.c

968

return true;

sys/dev/drm/i915/intel_engine_cs.c

981

return true;

sys/dev/drm/i915/intel_engine_cs.c

988

return true;

sys/dev/drm/i915/intel_fbc.c

1046

crtc_state->enable_fbc = true;

sys/dev/drm/i915/intel_fbc.c

1047

crtc_chosen = true;

sys/dev/drm/i915/intel_fbc.c

1105

fbc->enabled = true;

sys/dev/drm/i915/intel_fbc.c

1167

fbc->underrun_detected = true;

sys/dev/drm/i915/intel_fbc.c

1286

return true;

sys/dev/drm/i915/intel_fbc.c

362

fbc->active = true;

sys/dev/drm/i915/intel_fbc.c

424

return true;

sys/dev/drm/i915/intel_fbc.c

597

return true;

sys/dev/drm/i915/intel_fbc.c

606

return true;

sys/dev/drm/i915/intel_fbc.c

615

return true;

sys/dev/drm/i915/intel_fbc.c

789

return true;

sys/dev/drm/i915/intel_fbc.c

811

return true;

sys/dev/drm/i915/intel_fbc.c

865

fbc->flip_pending = true;

sys/dev/drm/i915/intel_fbdev.c

214

prealloc = true;

sys/dev/drm/i915/intel_fbdev.c

283

info->skip_vt_switch = true;

sys/dev/drm/i915/intel_fbdev.c

366

bool fallback = true, ret = true;

sys/dev/drm/i915/intel_fbdev.c

516

fallback = true;

sys/dev/drm/i915/intel_fbdev.c

678

return true;

sys/dev/drm/i915/intel_fbdev.c

691

true);

sys/dev/drm/i915/intel_fbdev.c

870

ifbdev->hpd_waiting = true;

sys/dev/drm/i915/intel_fifo_underrun.c

66

return true;

sys/dev/drm/i915/intel_fifo_underrun.c

84

return true;

sys/dev/drm/i915/intel_frontbuffer.h

65

return true;

sys/dev/drm/i915/intel_guc_ct.c

700

found = true;

sys/dev/drm/i915/intel_guc_ct.c

749

return true;

sys/dev/drm/i915/intel_guc_ct.c

877

DRM_INFO("CT: %s\n", enableddisabled(true));

sys/dev/drm/i915/intel_guc_log.c

200

overflow = true;

sys/dev/drm/i915/intel_guc_log.c

355

ret = i915_gem_object_set_to_wc_domain(log->vma->obj, true);

sys/dev/drm/i915/intel_guc_submission.c

219

WARN_ONCE(true, "Doorbell never became invalid after disable\n");

sys/dev/drm/i915/intel_guc_submission.c

768

submit = true;

sys/dev/drm/i915/intel_guc_submission.c

890

return true;

sys/dev/drm/i915/intel_guc_submission.c

906

return true;

sys/dev/drm/i915/intel_gvt.c

45

return true;

sys/dev/drm/i915/intel_gvt.c

47

return true;

sys/dev/drm/i915/intel_gvt.c

49

return true;

sys/dev/drm/i915/intel_gvt.c

51

return true;

sys/dev/drm/i915/intel_hangcheck.c

186

return true;

sys/dev/drm/i915/intel_hdcp.c

179

return true;

sys/dev/drm/i915/intel_hdcp.c

553

ret = shim->toggle_signalling(intel_dig_port, true);

sys/dev/drm/i915/intel_hdcp.c

825

crtc_state->mode_changed = true;

sys/dev/drm/i915/intel_hdmi.c

1120

return true;

sys/dev/drm/i915/intel_hdmi.c

1146

intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);

sys/dev/drm/i915/intel_hdmi.c

1218

pipe_config->has_hdmi_sink = true;

sys/dev/drm/i915/intel_hdmi.c

1221

pipe_config->has_infoframe = true;

sys/dev/drm/i915/intel_hdmi.c

1224

pipe_config->has_audio = true;

sys/dev/drm/i915/intel_hdmi.c

1228

pipe_config->limited_color_range = true;

sys/dev/drm/i915/intel_hdmi.c

1437

intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);

sys/dev/drm/i915/intel_hdmi.c

1438

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);

sys/dev/drm/i915/intel_hdmi.c

1575

status = hdmi_port_clock_valid(hdmi, clock, true, force_dvi);

sys/dev/drm/i915/intel_hdmi.c

1581

true, force_dvi);

sys/dev/drm/i915/intel_hdmi.c

1586

true, force_dvi);

sys/dev/drm/i915/intel_hdmi.c

1651

return true;

sys/dev/drm/i915/intel_hdmi.c

1672

config->ycbcr420 = true;

sys/dev/drm/i915/intel_hdmi.c

1683

return true;

sys/dev/drm/i915/intel_hdmi.c

1709

pipe_config->has_infoframe = true;

sys/dev/drm/i915/intel_hdmi.c

1739

pipe_config->has_pch_encoder = true;

sys/dev/drm/i915/intel_hdmi.c

1755

true, force_dvi) == MODE_OK) {

sys/dev/drm/i915/intel_hdmi.c

1763

true, force_dvi) == MODE_OK) {

sys/dev/drm/i915/intel_hdmi.c

1795

pipe_config->hdmi_scrambling = true;

sys/dev/drm/i915/intel_hdmi.c

1798

pipe_config->hdmi_scrambling = true;

sys/dev/drm/i915/intel_hdmi.c

1799

pipe_config->hdmi_high_tmds_clock_ratio = true;

sys/dev/drm/i915/intel_hdmi.c

1803

return true;

sys/dev/drm/i915/intel_hdmi.c

1886

intel_gmbus_force_bit(i2c, true);

sys/dev/drm/i915/intel_hdmi.c

1903

connected = true;

sys/dev/drm/i915/intel_hdmi.c

2050

chv_data_lane_soft_reset(encoder, old_crtc_state, true);

sys/dev/drm/i915/intel_hdmi.c

2156

return true;

sys/dev/drm/i915/intel_hdmi.c

2374

connector->ycbcr_420_allowed = true;

sys/dev/drm/i915/intel_hotplug.c

151

storm = true;

sys/dev/drm/i915/intel_hotplug.c

195

hpd_disabled = true;

sys/dev/drm/i915/intel_hotplug.c

272

return true;

sys/dev/drm/i915/intel_hotplug.c

431

queue_dig = true;

sys/dev/drm/i915/intel_hotplug.c

473

long_hpd = true;

sys/dev/drm/i915/intel_hotplug.c

474

queue_hp = true;

sys/dev/drm/i915/intel_hotplug.c

482

storm_detected = true;

sys/dev/drm/i915/intel_hotplug.c

606

WRITE_ONCE(dev_priv->hotplug.poll_enabled, true);

sys/dev/drm/i915/intel_hotplug.c

652

ret = true;

sys/dev/drm/i915/intel_i2c.c

283

pnv_gmbus_clock_gating(dev_priv, true);

sys/dev/drm/i915/intel_i2c.c

384

extra_byte_added = true;

sys/dev/drm/i915/intel_i2c.c

690

bxt_gmbus_clock_gating(dev_priv, true);

sys/dev/drm/i915/intel_i2c.c

693

pch_gmbus_clock_gating(dev_priv, true);

sys/dev/drm/i915/intel_lpe_audio.c

191

lpe_present = true;

sys/dev/drm/i915/intel_lrc.c

1325

err = i915_gem_object_set_to_wc_domain(vma->obj, true);

sys/dev/drm/i915/intel_lrc.c

1805

unexpected = true;

sys/dev/drm/i915/intel_lrc.c

2192

vf_flush_wa = true;

sys/dev/drm/i915/intel_lrc.c

2196

dc_flush_wa = true;

sys/dev/drm/i915/intel_lrc.c

268

bool first = true;

sys/dev/drm/i915/intel_lrc.c

2765

ret = i915_gem_object_set_to_cpu_domain(ctx_obj, true);

sys/dev/drm/i915/intel_lrc.c

2777

ctx_obj->mm.dirty = true;

sys/dev/drm/i915/intel_lrc.c

306

execlists->no_priolist = true;

sys/dev/drm/i915/intel_lrc.c

543

return true;

sys/dev/drm/i915/intel_lrc.c

746

submit = true;

sys/dev/drm/i915/intel_lspcon.c

130

return true;

sys/dev/drm/i915/intel_lspcon.c

162

lspcon->active = true;

sys/dev/drm/i915/intel_lspcon.c

163

return true;

sys/dev/drm/i915/intel_lspcon.c

253

return true;

sys/dev/drm/i915/intel_lvds.c

435

pipe_config->has_pch_encoder = true;

sys/dev/drm/i915/intel_lvds.c

451

return true;

sys/dev/drm/i915/intel_lvds.c

808

return true;

sys/dev/drm/i915/intel_lvds.c

811

return true;

sys/dev/drm/i915/intel_lvds.c

837

return true;

sys/dev/drm/i915/intel_lvds.c

845

return true;

sys/dev/drm/i915/intel_mocs.c

185

result = true;

sys/dev/drm/i915/intel_mocs.c

189

result = true;

sys/dev/drm/i915/intel_opregion.c

874

requested_callbacks = true;

sys/dev/drm/i915/intel_overlay.c

1124

overlay->pfit_active = true;

sys/dev/drm/i915/intel_overlay.c

1195

return true;

sys/dev/drm/i915/intel_overlay.c

1207

return true;

sys/dev/drm/i915/intel_overlay.c

1358

overlay->color_key_enabled = true;

sys/dev/drm/i915/intel_overlay.c

1371

ret = i915_gem_object_set_to_gtt_domain(overlay->reg_bo, true);

sys/dev/drm/i915/intel_overlay.c

264

overlay->active = true;

sys/dev/drm/i915/intel_overlay.c

378

i830_overlay_clock_gating(dev_priv, true);

sys/dev/drm/i915/intel_overlay.c

640

scale_changed = true;

sys/dev/drm/i915/intel_panel.c

1117

panel->backlight.enabled = true;

sys/dev/drm/i915/intel_panel.c

1875

panel->backlight.present = true;

sys/dev/drm/i915/intel_pm.c

1472

new_crtc_state->wm.need_postvbl_update = true;

sys/dev/drm/i915/intel_pm.c

1483

wm->cxsr = true;

sys/dev/drm/i915/intel_pm.c

1484

wm->hpll_en = true;

sys/dev/drm/i915/intel_pm.c

1485

wm->fbc_en = true;

sys/dev/drm/i915/intel_pm.c

1531

if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))

sys/dev/drm/i915/intel_pm.c

1536

if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))

sys/dev/drm/i915/intel_pm.c

1537

_intel_set_memory_cxsr(dev_priv, true);

sys/dev/drm/i915/intel_pm.c

1867

crtc_state->fifo_changed = true;

sys/dev/drm/i915/intel_pm.c

1886

crtc_state->fifo_changed = true;

sys/dev/drm/i915/intel_pm.c

2080

new_crtc_state->wm.need_postvbl_update = true;

sys/dev/drm/i915/intel_pm.c

2092

wm->cxsr = true;

sys/dev/drm/i915/intel_pm.c

2144

if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))

sys/dev/drm/i915/intel_pm.c

2149

if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))

sys/dev/drm/i915/intel_pm.c

2150

_intel_set_memory_cxsr(dev_priv, true);

sys/dev/drm/i915/intel_pm.c

2153

chv_set_memory_pm5(dev_priv, true);

sys/dev/drm/i915/intel_pm.c

2156

chv_set_memory_dvfs(dev_priv, true);

sys/dev/drm/i915/intel_pm.c

2235

cxsr_enabled = true;

sys/dev/drm/i915/intel_pm.c

2256

intel_set_memory_cxsr(dev_priv, true);

sys/dev/drm/i915/intel_pm.c

2401

intel_set_memory_cxsr(dev_priv, true);

sys/dev/drm/i915/intel_pm.c

2688

max->spr = ilk_plane_wm_max(dev, level, config, ddb_partitioning, true);

sys/dev/drm/i915/intel_pm.c

2698

max->spr = ilk_plane_wm_reg_max(dev_priv, level, true);

sys/dev/drm/i915/intel_pm.c

2738

result->enable = true;

sys/dev/drm/i915/intel_pm.c

2776

result->enable = true;

sys/dev/drm/i915/intel_pm.c

2994

return true;

sys/dev/drm/i915/intel_pm.c

3094

return true;

sys/dev/drm/i915/intel_pm.c

3231

newstate->wm.need_postvbl_update = true;

sys/dev/drm/i915/intel_pm.c

3245

ret_wm->enable = true;

sys/dev/drm/i915/intel_pm.c

3510

changed = true;

sys/dev/drm/i915/intel_pm.c

3515

changed = true;

sys/dev/drm/i915/intel_pm.c

3520

changed = true;

sys/dev/drm/i915/intel_pm.c

3643

return true;

sys/dev/drm/i915/intel_pm.c

3653

return true;

sys/dev/drm/i915/intel_pm.c

3657

return true;

sys/dev/drm/i915/intel_pm.c

3777

return true;

sys/dev/drm/i915/intel_pm.c

3818

return true;

sys/dev/drm/i915/intel_pm.c

4809

result->plane_en = true;

sys/dev/drm/i915/intel_pm.c

4863

wm->is_planar = true;

sys/dev/drm/i915/intel_pm.c

4938

trans_wm->plane_en = true;

sys/dev/drm/i915/intel_pm.c

4991

wm->is_planar = true;

sys/dev/drm/i915/intel_pm.c

5103

return true;

sys/dev/drm/i915/intel_pm.c

5125

return true;

sys/dev/drm/i915/intel_pm.c

5147

*changed = true;

sys/dev/drm/i915/intel_pm.c

5276

(*changed) = true;

sys/dev/drm/i915/intel_pm.c

5287

(*changed) = true;

sys/dev/drm/i915/intel_pm.c

5400

intel_cstate->update_wm_pre = true;

sys/dev/drm/i915/intel_pm.c

5605

dev_priv->wm.distrust_bios_wm = true;

sys/dev/drm/i915/intel_pm.c

5648

active->wm[0].enable = true;

sys/dev/drm/i915/intel_pm.c

5662

active->wm[level].enable = true;

sys/dev/drm/i915/intel_pm.c

6181

dev_priv->ipc_enabled = true;

sys/dev/drm/i915/intel_pm.c

6214

return true;

sys/dev/drm/i915/intel_pm.c

6664

rq->waitboost = true;

sys/dev/drm/i915/intel_pm.c

6748

bool enable_rc6 = true;

sys/dev/drm/i915/intel_pm.c

8027

bool ret = true;

sys/dev/drm/i915/intel_pm.c

8055

bool ret = true;

sys/dev/drm/i915/intel_pm.c

8101

bool ret = true;

sys/dev/drm/i915/intel_pm.c

8319

dev_priv->gt_pm.rps.enabled = true; /* force RPS disabling */

sys/dev/drm/i915/intel_pm.c

8320

dev_priv->gt_pm.rc6.enabled = true; /* force RC6 disabling */

sys/dev/drm/i915/intel_pm.c

8402

i915->gt_pm.llc_pstate.enabled = true;

sys/dev/drm/i915/intel_pm.c

8423

dev_priv->gt_pm.rc6.enabled = true;

sys/dev/drm/i915/intel_pm.c

8456

rps->enabled = true;

sys/dev/drm/i915/intel_pm.c

905

intel_set_memory_cxsr(dev_priv, true);

sys/dev/drm/i915/intel_psr.c

234

dev_priv->psr.sink_support = true;

sys/dev/drm/i915/intel_psr.c

476

return true;

sys/dev/drm/i915/intel_psr.c

533

crtc_state->has_psr = true;

sys/dev/drm/i915/intel_psr.c

553

dev_priv->psr.active = true;

sys/dev/drm/i915/intel_psr.c

615

dev_priv->psr.enabled = true;

sys/dev/drm/i915/intel_psr.c

648

dev_priv->psr.prepared = true;

sys/dev/drm/i915/intel_psr.c

67

return true;

sys/dev/drm/i915/intel_psr.c

822

return true;

sys/dev/drm/i915/intel_psr.c

825

return true;

sys/dev/drm/i915/intel_ringbuffer.c

1085

ret = i915_gem_object_set_to_gtt_domain(vma->obj, true);

sys/dev/drm/i915/intel_ringbuffer.c

1087

ret = i915_gem_object_set_to_cpu_domain(vma->obj, true);

sys/dev/drm/i915/intel_ringbuffer.c

1272

err = i915_gem_object_set_to_gtt_domain(vma->obj, true);

sys/dev/drm/i915/intel_ringbuffer.c

1584

force_restore = true;

sys/dev/drm/i915/intel_ringbuffer.h

1190

return true;

sys/dev/drm/i915/intel_ringbuffer.h

845

return true;

sys/dev/drm/i915/intel_runtime_pm.c

1052

vlv_set_power_well(dev_priv, power_well, true);

sys/dev/drm/i915/intel_runtime_pm.c

1071

vlv_set_power_well(dev_priv, power_well, true);

sys/dev/drm/i915/intel_runtime_pm.c

1233

vlv_set_power_well(dev_priv, power_well, true);

sys/dev/drm/i915/intel_runtime_pm.c

1303

dev_priv->chv_phy_assert[phy] = true;

sys/dev/drm/i915/intel_runtime_pm.c

1497

chv_set_pipe_power_well(dev_priv, power_well, true);

sys/dev/drm/i915/intel_runtime_pm.c

1574

is_enabled = true;

sys/dev/drm/i915/intel_runtime_pm.c

160

power_well->hw_enabled = true;

sys/dev/drm/i915/intel_runtime_pm.c

209

is_enabled = true;

sys/dev/drm/i915/intel_runtime_pm.c

2118

.hsw.has_vga = true,

sys/dev/drm/i915/intel_runtime_pm.c

2140

.hsw.has_vga = true,

sys/dev/drm/i915/intel_runtime_pm.c

2310

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2339

.hsw.has_vga = true,

sys/dev/drm/i915/intel_runtime_pm.c

2340

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2401

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2419

.hsw.has_vga = true,

sys/dev/drm/i915/intel_runtime_pm.c

2420

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2460

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2478

.hsw.has_vga = true,

sys/dev/drm/i915/intel_runtime_pm.c

2479

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2588

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2646

.hsw.has_vga = true,

sys/dev/drm/i915/intel_runtime_pm.c

2647

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2748

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2765

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2777

.hsw.has_vga = true,

sys/dev/drm/i915/intel_runtime_pm.c

2778

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

2949

.hsw.has_fuses = true,

sys/dev/drm/i915/intel_runtime_pm.c

3156

return true;

sys/dev/drm/i915/intel_runtime_pm.c

3161

intel_dbuf_slice_set(dev_priv, DBUF_CTL, true);

sys/dev/drm/i915/intel_runtime_pm.c

3191

ret = intel_dbuf_slice_set(dev_priv, DBUF_CTL_S2, true);

sys/dev/drm/i915/intel_runtime_pm.c

3661

dev_priv->chv_phy_assert[DPIO_PHY0] = true;

sys/dev/drm/i915/intel_runtime_pm.c

3683

dev_priv->chv_phy_assert[DPIO_PHY1] = true;

sys/dev/drm/i915/intel_runtime_pm.c

3742

power_domains->initializing = true;

sys/dev/drm/i915/intel_runtime_pm.c

3883

power_domains->display_core_suspended = true;

sys/dev/drm/i915/intel_runtime_pm.c

3901

intel_power_domains_init_hw(dev_priv, true);

sys/dev/drm/i915/intel_runtime_pm.c

3979

dump_domain_info = true;

sys/dev/drm/i915/intel_runtime_pm.c

3988

dumped = true;

sys/dev/drm/i915/intel_runtime_pm.c

4063

return true;

sys/dev/drm/i915/intel_runtime_pm.c

838

return true;

sys/dev/drm/i915/intel_runtime_pm.c

912

vlv_set_power_well(dev_priv, power_well, true);

sys/dev/drm/i915/intel_runtime_pm.c

943

enabled = true;

sys/dev/drm/i915/intel_sdvo.c

1048

return true;

sys/dev/drm/i915/intel_sdvo.c

1081

return true;

sys/dev/drm/i915/intel_sdvo.c

1109

pipe_config->clock_set = true;

sys/dev/drm/i915/intel_sdvo.c

1128

pipe_config->has_pch_encoder = true;

sys/dev/drm/i915/intel_sdvo.c

1144

pipe_config->sdvo_tv_clock = true;

sys/dev/drm/i915/intel_sdvo.c

1171

pipe_config->has_audio = true;

sys/dev/drm/i915/intel_sdvo.c

1182

pipe_config->limited_color_range = true;

sys/dev/drm/i915/intel_sdvo.c

1186

pipe_config->limited_color_range = true;

sys/dev/drm/i915/intel_sdvo.c

1197

return true;

sys/dev/drm/i915/intel_sdvo.c

1513

pipe_config->limited_color_range = true;

sys/dev/drm/i915/intel_sdvo.c

1516

pipe_config->has_audio = true;

sys/dev/drm/i915/intel_sdvo.c

1521

pipe_config->has_hdmi_sink = true;

sys/dev/drm/i915/intel_sdvo.c

1569

intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);

sys/dev/drm/i915/intel_sdvo.c

1570

intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);

sys/dev/drm/i915/intel_sdvo.c

1691

return true;

sys/dev/drm/i915/intel_sdvo.c

2146

crtc_state->connectors_changed = true;

sys/dev/drm/i915/intel_sdvo.c

2256

crtc_state->connectors_changed = true;

sys/dev/drm/i915/intel_sdvo.c

2375

intel_gmbus_force_bit(sdvo->i2c, true);

sys/dev/drm/i915/intel_sdvo.c

2538

intel_sdvo_connector->is_hdmi = true;

sys/dev/drm/i915/intel_sdvo.c

2549

return true;

sys/dev/drm/i915/intel_sdvo.c

2585

return true;

sys/dev/drm/i915/intel_sdvo.c

2625

return true;

sys/dev/drm/i915/intel_sdvo.c

267

return true;

sys/dev/drm/i915/intel_sdvo.c

2677

return true;

sys/dev/drm/i915/intel_sdvo.c

2738

return true;

sys/dev/drm/i915/intel_sdvo.c

2796

return true;

sys/dev/drm/i915/intel_sdvo.c

2929

return true;

sys/dev/drm/i915/intel_sdvo.c

2943

return true;

sys/dev/drm/i915/intel_sdvo.c

2963

return true;

sys/dev/drm/i915/intel_sdvo.c

2971

return true;

sys/dev/drm/i915/intel_sdvo.c

3110

intel_sdvo->caps.output_flags) != true) {

sys/dev/drm/i915/intel_sdvo.c

3165

return true;

sys/dev/drm/i915/intel_sdvo.c

443

int i, ret = true;

sys/dev/drm/i915/intel_sdvo.c

509

return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);

sys/dev/drm/i915/intel_sdvo.c

581

return true;

sys/dev/drm/i915/intel_sdvo.c

649

return true;

sys/dev/drm/i915/intel_sdvo.c

707

return true;

sys/dev/drm/i915/intel_sprite.c

1141

true, true);

sys/dev/drm/i915/intel_sprite.c

1199

true, true);

sys/dev/drm/i915/intel_sprite.c

1337

true, true);

sys/dev/drm/i915/intel_sprite.c

1582

return true;

sys/dev/drm/i915/intel_sprite.c

1609

return true;

sys/dev/drm/i915/intel_sprite.c

1641

return true;

sys/dev/drm/i915/intel_sprite.c

1674

return true;

sys/dev/drm/i915/intel_sprite.c

1685

return true;

sys/dev/drm/i915/intel_sprite.c

1691

return true;

sys/dev/drm/i915/intel_sprite.c

1749

return true;

sys/dev/drm/i915/intel_sprite.c

336

uv_rgb_hphase = skl_scaler_calc_phase(2, hscale, true);

sys/dev/drm/i915/intel_tv.c

1318

if (tv_mode->progressive == true && tv_mode->nbr_end < 720) {

sys/dev/drm/i915/intel_tv.c

1415

new_crtc_state->connectors_changed = true;

sys/dev/drm/i915/intel_tv.c

394

.veq_ena = true, .veq_start_f1 = 0,

sys/dev/drm/i915/intel_tv.c

400

.burst_ena = true,

sys/dev/drm/i915/intel_tv.c

436

.veq_ena = true, .veq_start_f1 = 0,

sys/dev/drm/i915/intel_tv.c

442

.burst_ena = true,

sys/dev/drm/i915/intel_tv.c

479

.veq_ena = true, .veq_start_f1 = 0,

sys/dev/drm/i915/intel_tv.c

485

.burst_ena = true,

sys/dev/drm/i915/intel_tv.c

522

.veq_ena = true, .veq_start_f1 = 0,

sys/dev/drm/i915/intel_tv.c

528

.burst_ena = true,

sys/dev/drm/i915/intel_tv.c

540

.pal_burst = true,

sys/dev/drm/i915/intel_tv.c

566

.veq_ena = true, .veq_start_f1 = 0,

sys/dev/drm/i915/intel_tv.c

572

.burst_ena = true,

sys/dev/drm/i915/intel_tv.c

585

.pal_burst = true,

sys/dev/drm/i915/intel_tv.c

610

.veq_ena = true, .veq_start_f1 = 0,

sys/dev/drm/i915/intel_tv.c

616

.burst_ena = true,

sys/dev/drm/i915/intel_tv.c

628

.pal_burst = true,

sys/dev/drm/i915/intel_tv.c

647

.progressive = true, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

671

.progressive = true, .trilevel_sync = false,

sys/dev/drm/i915/intel_tv.c

695

.progressive = true, .trilevel_sync = true,

sys/dev/drm/i915/intel_tv.c

719

.progressive = true, .trilevel_sync = true,

sys/dev/drm/i915/intel_tv.c

744

.progressive = false, .trilevel_sync = true,

sys/dev/drm/i915/intel_tv.c

749

.veq_ena = true, .veq_start_f1 = 4,

sys/dev/drm/i915/intel_tv.c

770

.progressive = false, .trilevel_sync = true,

sys/dev/drm/i915/intel_tv.c

775

.veq_ena = true, .veq_start_f1 = 4,

sys/dev/drm/i915/intel_tv.c

900

return true;

sys/dev/drm/i915/intel_uncore.c

1156

unclaimed_reg_debug(dev_priv, reg, true, true)

sys/dev/drm/i915/intel_uncore.c

1159

unclaimed_reg_debug(dev_priv, reg, true, false); \

sys/dev/drm/i915/intel_uncore.c

1227

trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \

sys/dev/drm/i915/intel_uncore.c

1265

trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \

sys/dev/drm/i915/intel_uncore.c

1268

unclaimed_reg_debug(dev_priv, reg, false, true)

sys/dev/drm/i915/intel_uncore.c

2301

ret = true;

sys/dev/drm/i915/intel_uncore.c

488

return true;

sys/dev/drm/i915/intel_uncore.c

502

return true;

sys/dev/drm/i915/intel_uncore.c

612

domain->active = true;

sys/dev/drm/i915/intel_uncore.c

731

domain->active = true;

sys/dev/drm/i915/vlv_dsi.c

1080

active = true;

sys/dev/drm/i915/vlv_dsi.c

355

pipe_config->clock_set = true;

sys/dev/drm/i915/vlv_dsi.c

357

return true;

sys/dev/drm/i915/vlv_dsi.c

811

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

sys/dev/drm/include/asm/bug.h

77

__warned_once = true; \

sys/dev/drm/include/drm/drmP.h

178

return true;

sys/dev/drm/include/drm/drm_cache.h

71

return true;

sys/dev/drm/include/drm/drm_drv.h

662

return true;

sys/dev/drm/include/drm/drm_lease.h

35

return true;

sys/dev/drm/include/drm/drm_print.h

375

__print_once = true; \

sys/dev/drm/include/linux/completion.h

100

awakened = true;

sys/dev/drm/include/linux/completion.h

153

ret = true;

sys/dev/drm/include/linux/completion.h

93

timeout_expired = true;

sys/dev/drm/include/linux/dma-fence.h

119

return true;

sys/dev/drm/include/linux/dma-fence.h

123

return true;

sys/dev/drm/include/linux/dma-fence.h

133

return true;

sys/dev/drm/include/linux/dma-fence.h

137

return true;

sys/dev/drm/include/linux/hashtable.h

61

return true;

sys/dev/drm/include/linux/interval_tree_generic.h

77

bool min_entry = true; \

sys/dev/drm/include/linux/irq_work.h

50

return true;

sys/dev/drm/include/linux/jump_label.h

39

*flag = true;

sys/dev/drm/include/linux/pci.h

407

return true;

sys/dev/drm/include/linux/pci.h

480

return true;

sys/dev/drm/include/linux/printk.h

105

__printed_once = true; \

sys/dev/drm/include/linux/printk.h

96

__print_once = true; \

sys/dev/drm/include/linux/scatterlist.h

297

return (true);

sys/dev/drm/include/linux/wait.h

144

interrupted = true; \

sys/dev/drm/include/linux/wait.h

148

timeout_expired = true; \

sys/dev/drm/include/linux/wait.h

201

retval = __wait_event_common(wq, condition, 0, PCATCH, true); \

sys/dev/drm/linux_dmi.c

46

return true;

sys/dev/drm/linux_dmi.c

51

return true;

sys/dev/drm/linux_dmi.c

56

return true;

sys/dev/drm/linux_dmi.c

61

return true;

sys/dev/drm/linux_fence-array.c

116

return true;

sys/dev/drm/linux_fence.c

165

return true;

sys/dev/drm/linux_hdmi.c

1047

frame->itc = ptr[2] & 0x80 ? true : false;

sys/dev/drm/linux_hdmi.c

1139

frame->downmix_inhibit = ptr[4] & 0x80 ? true : false;

sys/dev/drm/linux_hrtimer.c

104

timer->is_rel = true;

sys/dev/drm/linux_hrtimer.c

113

timer->active = true;

sys/dev/drm/linux_hrtimer.c

132

timer->cancel = true;

sys/dev/drm/linux_hrtimer.c

49

timer->running = true;

sys/dev/drm/linux_hrtimer.c

63

timer->active = true;

sys/dev/drm/linux_radix.c

111

return (true);

sys/dev/drm/linux_reservation.c

539

ret = true;

sys/dev/drm/linux_workqueue.c

140

work->on_queue = true;

sys/dev/drm/linux_workqueue.c

144

ret = true;

sys/dev/drm/linux_workqueue.c

271

wq->is_draining = true;

sys/dev/drm/linux_workqueue.c

332

ret = true;

sys/dev/drm/linux_workqueue.c

361

ret = true;

sys/dev/drm/linux_workqueue.c

375

work->canceled = true;

sys/dev/drm/linux_workqueue.c

376

ret = true;

sys/dev/drm/linux_workqueue.c

399

return _cancel_work(work, true);

sys/dev/drm/linux_workqueue.c

409

work->canceled = true;

sys/dev/drm/linux_workqueue.c

420

work->canceled = true;

sys/dev/drm/linux_workqueue.c

423

return _cancel_work(work, true);

sys/dev/drm/linux_workqueue.c

87

work->running = true;

sys/dev/drm/linux_workqueue.c

97

if (didcan == true)

sys/dev/drm/radeon/atom.c

1384

return true;

sys/dev/drm/radeon/atom.c

1401

return true;

sys/dev/drm/radeon/atom.c

636

ctx->abort = true;

sys/dev/drm/radeon/atom.c

739

ctx->abort = true;

sys/dev/drm/radeon/atombios_crtc.c

1057

return true;

sys/dev/drm/radeon/atombios_crtc.c

1245

bypass_lut = true;

sys/dev/drm/radeon/atombios_crtc.c

1255

bypass_lut = true;

sys/dev/drm/radeon/atombios_crtc.c

1552

bypass_lut = true;

sys/dev/drm/radeon/atombios_crtc.c

2039

is_tvcv = true;

sys/dev/drm/radeon/atombios_crtc.c

2107

return true;

sys/dev/drm/radeon/atombios_crtc.c

273

radeon_crtc->enabled = true;

sys/dev/drm/radeon/atombios_crtc.c

99

is_tv = true;

sys/dev/drm/radeon/atombios_dp.c

105

radeon_atom_copy_swap(base, send, send_bytes, true);

sys/dev/drm/radeon/atombios_dp.c

246

radeon_connector->ddc_bus->has_aux = true;

sys/dev/drm/radeon/atombios_dp.c

402

return true;

sys/dev/drm/radeon/atombios_dp.c

516

return true;

sys/dev/drm/radeon/atombios_dp.c

694

clock_recovery = true;

sys/dev/drm/radeon/atombios_dp.c

757

channel_eq = true;

sys/dev/drm/radeon/atombios_dp.c

816

dp_info.use_dpencoder = true;

sys/dev/drm/radeon/atombios_dp.c

837

dp_info.tp3_supported = true;

sys/dev/drm/radeon/atombios_encoders.c

1120

is_dp = true;

sys/dev/drm/radeon/atombios_encoders.c

1476

return true;

sys/dev/drm/radeon/atombios_encoders.c

1482

return true;

sys/dev/drm/radeon/atombios_encoders.c

1737

travis_quirk = true;

sys/dev/drm/radeon/atombios_encoders.c

1770

radeon_dig_connector->edp_on = true;

sys/dev/drm/radeon/atombios_encoders.c

1907

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/atombios_encoders.c

2344

atombios_yuv_setup(encoder, true);

sys/dev/drm/radeon/atombios_encoders.c

2435

return true;

sys/dev/drm/radeon/atombios_encoders.c

2565

radeon_atom_output_lock(encoder, true);

sys/dev/drm/radeon/atombios_encoders.c

2766

dig->coherent_mode = true;

sys/dev/drm/radeon/atombios_encoders.c

2770

dig->linkb = true;

sys/dev/drm/radeon/atombios_encoders.c

2894

radeon_encoder->is_ext_encoder = true;

sys/dev/drm/radeon/atombios_encoders.c

401

return true;

sys/dev/drm/radeon/btc_dpm.c

1619

return true;

sys/dev/drm/radeon/btc_dpm.c

1720

eg_pi->uvd_enabled = true;

sys/dev/drm/radeon/btc_dpm.c

1803

return true;

sys/dev/drm/radeon/btc_dpm.c

1854

bool result = true;

sys/dev/drm/radeon/btc_dpm.c

2086

return true;

sys/dev/drm/radeon/btc_dpm.c

2103

disable_mclk_switching = true;

sys/dev/drm/radeon/btc_dpm.c

2243

ps->dc_compatible = true;

sys/dev/drm/radeon/btc_dpm.c

2393

rv770_enable_voltage_control(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2416

rv770_enable_backbias(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2419

cypress_enable_spread_spectrum(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2422

rv770_enable_thermal_protection(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2434

btc_enable_dynamic_pcie_gen2(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2465

cypress_enable_sclk_control(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2468

cypress_enable_mclk_control(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2473

btc_cg_clock_gating_enable(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2476

btc_mg_clock_gating_enable(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2479

btc_ls_clock_gating_enable(rdev, true);

sys/dev/drm/radeon/btc_dpm.c

2481

rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/radeon/btc_dpm.c

2628

eg_pi->smu_uvd_hs = true;

sys/dev/drm/radeon/btc_dpm.c

2647

pi->gfx_clock_gating = true;

sys/dev/drm/radeon/btc_dpm.c

2649

pi->mg_clock_gating = true;

sys/dev/drm/radeon/btc_dpm.c

2650

pi->mgcgtssm = true;

sys/dev/drm/radeon/btc_dpm.c

2654

pi->dynamic_pcie_gen2 = true;

sys/dev/drm/radeon/btc_dpm.c

2657

pi->thermal_protection = true;

sys/dev/drm/radeon/btc_dpm.c

2661

pi->display_gap = true;

sys/dev/drm/radeon/btc_dpm.c

2664

pi->dcodt = true;

sys/dev/drm/radeon/btc_dpm.c

2668

pi->ulps = true;

sys/dev/drm/radeon/btc_dpm.c

2670

eg_pi->dynamic_ac_timing = true;

sys/dev/drm/radeon/btc_dpm.c

2671

eg_pi->abm = true;

sys/dev/drm/radeon/btc_dpm.c

2672

eg_pi->mcls = true;

sys/dev/drm/radeon/btc_dpm.c

2673

eg_pi->light_sleep = true;

sys/dev/drm/radeon/btc_dpm.c

2674

eg_pi->memory_transition = true;

sys/dev/drm/radeon/btc_dpm.c

2683

eg_pi->dll_default_on = true;

sys/dev/drm/radeon/ci_dpm.c

1092

pi->fan_is_controlled_by_smc = true;

sys/dev/drm/radeon/ci_dpm.c

1260

pi->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/radeon/ci_dpm.c

1295

ret = ci_thermal_enable_alert(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

1427

want_thermal_protection = true;

sys/dev/drm/radeon/ci_dpm.c

1431

want_thermal_protection = true;

sys/dev/drm/radeon/ci_dpm.c

1436

want_thermal_protection = true;

sys/dev/drm/radeon/ci_dpm.c

1583

ret = ci_enable_sclk_mclk_dpm(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

2378

voltage_found = true;

sys/dev/drm/radeon/ci_dpm.c

2395

voltage_found = true;

sys/dev/drm/radeon/ci_dpm.c

244

pi->caps_power_containment = true;

sys/dev/drm/radeon/ci_dpm.c

252

pi->caps_cac = true;

sys/dev/drm/radeon/ci_dpm.c

2538

patch = ((tmp & 0x0000f00) == 0x300) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

256

pi->enable_bapm_feature = true;

sys/dev/drm/radeon/ci_dpm.c

257

pi->enable_tdc_limit_feature = true;

sys/dev/drm/radeon/ci_dpm.c

258

pi->enable_pkg_pwr_tracking_feature = true;

sys/dev/drm/radeon/ci_dpm.c

2968

memory_level->StutterEnable = true;

sys/dev/drm/radeon/ci_dpm.c

2979

memory_level->EdcReadEnable = true;

sys/dev/drm/radeon/ci_dpm.c

2983

memory_level->EdcWriteEnable = true;

sys/dev/drm/radeon/ci_dpm.c

2986

if (si_get_mclk_frequency_ratio(memory_clock, true) >=

sys/dev/drm/radeon/ci_dpm.c

2988

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

2990

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

2996

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

3424

dpm_table->dpm_levels[index].enabled = true;

sys/dev/drm/radeon/ci_dpm.c

3521

(i == 0) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

3534

(i == 0) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

3544

pi->dpm_table.vddc_table.dpm_levels[i].enabled = true;

sys/dev/drm/radeon/ci_dpm.c

3553

pi->dpm_table.vddci_table.dpm_levels[i].enabled = true;

sys/dev/drm/radeon/ci_dpm.c

3563

pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true;

sys/dev/drm/radeon/ci_dpm.c

3748

dpm_table->dpm_levels[i].enabled = true;

sys/dev/drm/radeon/ci_dpm.c

3767

pcie_table->dpm_levels[i].enabled = true;

sys/dev/drm/radeon/ci_dpm.c

3993

pi->uvd_enabled = true;

sys/dev/drm/radeon/ci_dpm.c

4167

ret = ci_enable_vce_dpm(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

4170

cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true);

sys/dev/drm/radeon/ci_dpm.c

4443

bool result = true;

sys/dev/drm/radeon/ci_dpm.c

4576

patch = ((tmp & 0x0000f00) == 0x300) ? true : false;

sys/dev/drm/radeon/ci_dpm.c

4918

pi->pspp_notify_required = true;

sys/dev/drm/radeon/ci_dpm.c

5134

pi->mem_gddr5 = true;

sys/dev/drm/radeon/ci_dpm.c

5219

ci_enable_spread_spectrum(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5221

ci_enable_thermal_protection(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5269

ci_enable_sclk_control(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5270

ret = ci_enable_ulv(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5275

ret = ci_enable_ds_master_switch(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5285

ret = ci_enable_didt(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5290

ret = ci_enable_smc_cac(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5295

ret = ci_enable_power_containment(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5307

ci_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/radeon/ci_dpm.c

5309

ret = ci_enable_thermal_based_sclk_dpm(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5332

ret = ci_thermal_enable_alert(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5347

ci_dpm_powergate_uvd(rdev, true);

sys/dev/drm/radeon/ci_dpm.c

5534

pi->ulv.supported = true;

sys/dev/drm/radeon/ci_dpm.c

5549

pi->use_pcie_powersaving_levels = true;

sys/dev/drm/radeon/ci_dpm.c

5560

pi->use_pcie_performance_levels = true;

sys/dev/drm/radeon/ci_dpm.c

5812

pi->caps_sclk_ds = true;

sys/dev/drm/radeon/ci_dpm.c

5825

pi->caps_uvd_dpm = true;

sys/dev/drm/radeon/ci_dpm.c

5826

pi->caps_vce_dpm = true;

sys/dev/drm/radeon/ci_dpm.c

5944

pi->vddc_phase_shed_control = true;

sys/dev/drm/radeon/ci_dpm.c

5955

pi->caps_sclk_ss_support = true;

sys/dev/drm/radeon/ci_dpm.c

5956

pi->caps_mclk_ss_support = true;

sys/dev/drm/radeon/ci_dpm.c

5957

pi->dynamic_ss = true;

sys/dev/drm/radeon/ci_dpm.c

5961

pi->dynamic_ss = true;

sys/dev/drm/radeon/ci_dpm.c

5965

pi->thermal_protection = true;

sys/dev/drm/radeon/ci_dpm.c

5969

pi->caps_dynamic_ac_timing = true;

sys/dev/drm/radeon/ci_dpm.c

5979

pi->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/radeon/ci_dpm.c

704

pi->cac_enabled = true;

sys/dev/drm/radeon/ci_dpm.c

778

return true;

sys/dev/drm/radeon/ci_dpm.c

784

return true;

sys/dev/drm/radeon/ci_dpm.c

790

return true;

sys/dev/drm/radeon/ci_dpm.c

796

return true;

sys/dev/drm/radeon/ci_dpm.c

802

return true;

sys/dev/drm/radeon/ci_dpm.c

808

return true;

sys/dev/drm/radeon/ci_dpm.c

814

return true;

sys/dev/drm/radeon/ci_dpm.c

820

return true;

sys/dev/drm/radeon/ci_dpm.c

823

return true;

sys/dev/drm/radeon/ci_dpm.c

849

disable_mclk_switching = true;

sys/dev/drm/radeon/ci_dpm.c

854

pi->battery_state = true;

sys/dev/drm/radeon/ci_dpm.c

958

rdev->irq.dpm_thermal = true;

sys/dev/drm/radeon/ci_smc.c

161

return true;

sys/dev/drm/radeon/cik.c

1982

new_smc = true;

sys/dev/drm/radeon/cik.c

1998

new_smc = true;

sys/dev/drm/radeon/cik.c

2271

rdev->new_fw = true;

sys/dev/drm/radeon/cik.c

3455

rdev->scratch.free[i] = true;

sys/dev/drm/radeon/cik.c

3655

return true;

sys/dev/drm/radeon/cik.c

4007

cik_cp_gfx_enable(rdev, true);

sys/dev/drm/radeon/cik.c

4126

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = true;

sys/dev/drm/radeon/cik.c

4345

cik_cp_compute_enable(rdev, true);

sys/dev/drm/radeon/cik.c

4421

PAGE_SIZE, true,

sys/dev/drm/radeon/cik.c

4538

bool use_doorbell = true;

sys/dev/drm/radeon/cik.c

4592

PAGE_SIZE, true,

sys/dev/drm/radeon/cik.c

4762

rdev->ring[idx].ready = true;

sys/dev/drm/radeon/cik.c

4814

cik_enable_gui_idle_interrupt(rdev, true);

sys/dev/drm/radeon/cik.c

5247

r600_set_bios_scratch_engine_hung(rdev, true);

sys/dev/drm/radeon/cik.c

5360

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/cik.c

5551

rdev->gart.ready = true;

sys/dev/drm/radeon/cik.c

5922

cik_enable_gui_idle_interrupt(rdev, true);

sys/dev/drm/radeon/cik.c

6024

cik_enable_gui_idle_interrupt(rdev, true);

sys/dev/drm/radeon/cik.c

6313

cik_enable_mgcg(rdev, true);

sys/dev/drm/radeon/cik.c

6314

cik_enable_cgcg(rdev, true);

sys/dev/drm/radeon/cik.c

6319

cik_enable_gui_idle_interrupt(rdev, true);

sys/dev/drm/radeon/cik.c

6356

cik_update_cg(rdev, RADEON_CG_BLOCK_GFX, true);

sys/dev/drm/radeon/cik.c

6365

RADEON_CG_BLOCK_HDP), true);

sys/dev/drm/radeon/cik.c

6794

cik_enable_sck_slowdown_on_pu(rdev, true);

sys/dev/drm/radeon/cik.c

6795

cik_enable_sck_slowdown_on_pd(rdev, true);

sys/dev/drm/radeon/cik.c

6798

cik_enable_cp_pg(rdev, true);

sys/dev/drm/radeon/cik.c

6799

cik_enable_gds_pg(rdev, true);

sys/dev/drm/radeon/cik.c

6802

cik_update_gfx_pg(rdev, true);

sys/dev/drm/radeon/cik.c

6848

rdev->ih.enabled = true;

sys/dev/drm/radeon/cik.c

7616

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/cik.c

7646

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/cik.c

7676

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/cik.c

7706

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/cik.c

7736

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/cik.c

7766

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/cik.c

7805

queue_hotplug = true;

sys/dev/drm/radeon/cik.c

7814

queue_hotplug = true;

sys/dev/drm/radeon/cik.c

7823

queue_hotplug = true;

sys/dev/drm/radeon/cik.c

7832

queue_hotplug = true;

sys/dev/drm/radeon/cik.c

7841

queue_hotplug = true;

sys/dev/drm/radeon/cik.c

7850

queue_hotplug = true;

sys/dev/drm/radeon/cik.c

7859

queue_dp = true;

sys/dev/drm/radeon/cik.c

7868

queue_dp = true;

sys/dev/drm/radeon/cik.c

7877

queue_dp = true;

sys/dev/drm/radeon/cik.c

7886

queue_dp = true;

sys/dev/drm/radeon/cik.c

7895

queue_dp = true;

sys/dev/drm/radeon/cik.c

7904

queue_dp = true;

sys/dev/drm/radeon/cik.c

7985

queue_reset = true;

sys/dev/drm/radeon/cik.c

7989

queue_reset = true;

sys/dev/drm/radeon/cik.c

7993

queue_reset = true;

sys/dev/drm/radeon/cik.c

8008

queue_reset = true;

sys/dev/drm/radeon/cik.c

8012

queue_reset = true;

sys/dev/drm/radeon/cik.c

8016

queue_reset = true;

sys/dev/drm/radeon/cik.c

8057

queue_thermal = true;

sys/dev/drm/radeon/cik.c

8061

rdev->pm.dpm.thermal.high_to_low = true;

sys/dev/drm/radeon/cik.c

8062

queue_thermal = true;

sys/dev/drm/radeon/cik.c

8077

queue_reset = true;

sys/dev/drm/radeon/cik.c

8081

queue_reset = true;

sys/dev/drm/radeon/cik.c

8085

queue_reset = true;

sys/dev/drm/radeon/cik.c

8092

queue_reset = true;

sys/dev/drm/radeon/cik.c

8096

queue_reset = true;

sys/dev/drm/radeon/cik.c

8100

queue_reset = true;

sys/dev/drm/radeon/cik.c

8121

rdev->needs_reset = true;

sys/dev/drm/radeon/cik.c

8522

rdev->accel_working = true;

sys/dev/drm/radeon/cik.c

8691

rdev->accel_working = true;

sys/dev/drm/radeon/cik.c

9192

return true;

sys/dev/drm/radeon/cik.c

9212

return true;

sys/dev/drm/radeon/cik.c

9247

return true;

sys/dev/drm/radeon/cik.c

9299

wm_high.interlaced = true;

sys/dev/drm/radeon/cik.c

9325

radeon_dpm_get_mclk(rdev, true) * 10;

sys/dev/drm/radeon/cik.c

9327

radeon_dpm_get_sclk(rdev, true) * 10;

sys/dev/drm/radeon/cik.c

9339

wm_low.interlaced = true;

sys/dev/drm/radeon/cik.c

9768

clk_req_support = true;

sys/dev/drm/radeon/cik_sdma.c

238

return true;

sys/dev/drm/radeon/cik_sdma.c

422

ring->ready = true;

sys/dev/drm/radeon/cik_sdma.c

535

cik_sdma_enable(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1821

rv770_enable_voltage_control(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1847

rv770_enable_backbias(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1850

cypress_enable_spread_spectrum(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1853

rv770_enable_thermal_protection(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1865

cypress_enable_dynamic_pcie_gen2(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1900

cypress_enable_sclk_control(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1903

cypress_enable_mclk_control(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1908

cypress_gfx_clock_gating_enable(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1911

cypress_mg_clock_gating_enable(rdev, true);

sys/dev/drm/radeon/cypress_dpm.c

1913

rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/radeon/cypress_dpm.c

2096

pi->gfx_clock_gating = true;

sys/dev/drm/radeon/cypress_dpm.c

2098

pi->mg_clock_gating = true;

sys/dev/drm/radeon/cypress_dpm.c

2099

pi->mgcgtssm = true;

sys/dev/drm/radeon/cypress_dpm.c

2103

pi->dynamic_pcie_gen2 = true;

sys/dev/drm/radeon/cypress_dpm.c

2106

pi->thermal_protection = true;

sys/dev/drm/radeon/cypress_dpm.c

2110

pi->display_gap = true;

sys/dev/drm/radeon/cypress_dpm.c

2113

pi->dcodt = true;

sys/dev/drm/radeon/cypress_dpm.c

2117

pi->ulps = true;

sys/dev/drm/radeon/cypress_dpm.c

2119

eg_pi->dynamic_ac_timing = true;

sys/dev/drm/radeon/cypress_dpm.c

2120

eg_pi->abm = true;

sys/dev/drm/radeon/cypress_dpm.c

2121

eg_pi->mcls = true;

sys/dev/drm/radeon/cypress_dpm.c

2122

eg_pi->light_sleep = true;

sys/dev/drm/radeon/cypress_dpm.c

2123

eg_pi->memory_transition = true;

sys/dev/drm/radeon/cypress_dpm.c

2134

eg_pi->dll_default_on = true;

sys/dev/drm/radeon/cypress_dpm.c

2165

return true;

sys/dev/drm/radeon/cypress_dpm.c

316

eg_pi->pcie_performance_request_registered = true;

sys/dev/drm/radeon/cypress_dpm.c

341

pi->pcie_gen2 = true;

sys/dev/drm/radeon/cypress_dpm.c

346

cypress_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, true);

sys/dev/drm/radeon/cypress_dpm.c

431

strobe_mode = true;

sys/dev/drm/radeon/cypress_dpm.c

720

if (cypress_get_mclk_frequency_ratio(rdev, pl->mclk, true) >=

sys/dev/drm/radeon/cypress_dpm.c

722

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/cypress_dpm.c

724

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/cypress_dpm.c

739

true,

sys/dev/drm/radeon/cypress_dpm.c

740

true);

sys/dev/drm/radeon/dce6_afmt.c

82

rdev->audio.pin[i].connected = true;

sys/dev/drm/radeon/evergreen.c

1336

return true;

sys/dev/drm/radeon/evergreen.c

1349

return true;

sys/dev/drm/radeon/evergreen.c

2094

return true;

sys/dev/drm/radeon/evergreen.c

2103

return true;

sys/dev/drm/radeon/evergreen.c

2129

return true;

sys/dev/drm/radeon/evergreen.c

2178

wm_high.interlaced = true;

sys/dev/drm/radeon/evergreen.c

2191

radeon_dpm_get_mclk(rdev, true) * 10;

sys/dev/drm/radeon/evergreen.c

2193

radeon_dpm_get_sclk(rdev, true) * 10;

sys/dev/drm/radeon/evergreen.c

2205

wm_low.interlaced = true;

sys/dev/drm/radeon/evergreen.c

2433

rdev->gart.ready = true;

sys/dev/drm/radeon/evergreen.c

2566

found_crtc = true;

sys/dev/drm/radeon/evergreen.c

2591

is_enabled = true;

sys/dev/drm/radeon/evergreen.c

2663

save->crtc_enabled[i] = true;

sys/dev/drm/radeon/evergreen.c

3103

ring->ready = true;

sys/dev/drm/radeon/evergreen.c

3698

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/evergreen.c

3805

return true;

sys/dev/drm/radeon/evergreen.c

4045

r600_set_bios_scratch_engine_hung(rdev, true);

sys/dev/drm/radeon/evergreen.c

4155

r = radeon_bo_create(rdev, dws * 4, PAGE_SIZE, true,

sys/dev/drm/radeon/evergreen.c

4234

r = radeon_bo_create(rdev, dws * 4, PAGE_SIZE, true,

sys/dev/drm/radeon/evergreen.c

4311

PAGE_SIZE, true,

sys/dev/drm/radeon/evergreen.c

4740

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/evergreen.c

4780

queue_hotplug = true;

sys/dev/drm/radeon/evergreen.c

4786

queue_dp = true;

sys/dev/drm/radeon/evergreen.c

4813

queue_hdmi = true;

sys/dev/drm/radeon/evergreen.c

4869

queue_thermal = true;

sys/dev/drm/radeon/evergreen.c

4873

rdev->pm.dpm.thermal.high_to_low = true;

sys/dev/drm/radeon/evergreen.c

4874

queue_thermal = true;

sys/dev/drm/radeon/evergreen.c

5123

rdev->accel_working = true;

sys/dev/drm/radeon/evergreen.c

5261

rdev->accel_working = true;

sys/dev/drm/radeon/evergreen.c

5408

disable_l0s = true;

sys/dev/drm/radeon/evergreen.c

5416

fusion_platform = true; /* XXX also dGPUs in a fusion system */

sys/dev/drm/radeon/evergreen_cs.c

1151

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1193

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1197

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1201

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1205

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1209

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1221

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1233

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1245

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1257

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1261

track->streamout_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1265

track->streamout_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1281

track->streamout_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1290

track->streamout_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1303

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1307

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1337

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1345

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1367

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

138

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1385

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1397

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1405

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1418

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1427

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1459

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1487

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

154

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1563

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1579

track->cb_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1591

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1598

track->db_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

164

track->streamout_dirty = true;

sys/dev/drm/radeon/evergreen_cs.c

1765

return true;

sys/dev/drm/radeon/evergreen_cs.c

3228

return true;

sys/dev/drm/radeon/evergreen_cs.c

3339

return true;

sys/dev/drm/radeon/kv_dpm.c

1252

ret = kv_enable_ulv(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1258

ret = kv_enable_didt(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1263

ret = kv_enable_smc_cac(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1293

kv_enable_thermal_int(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1297

kv_dpm_powergate_acp(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1298

kv_dpm_powergate_samu(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1299

kv_dpm_powergate_vce(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1300

kv_dpm_powergate_uvd(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1502

kv_enable_vce_dpm(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1506

cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true);

sys/dev/drm/radeon/kv_dpm.c

1507

kv_dpm_powergate_vce(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1630

cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);

sys/dev/drm/radeon/kv_dpm.c

1669

kv_update_samu_dpm(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1692

kv_update_acp_dpm(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1797

pi->nb_dpm_enabled = true;

sys/dev/drm/radeon/kv_dpm.c

1891

kv_enable_nb_dpm(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1904

kv_freeze_sclk_dpm(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1916

kv_enable_nb_dpm(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1933

sumo_take_smu_control(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

1953

kv_freeze_sclk_dpm(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

2182

ps->need_dfs_bypass = true;

sys/dev/drm/radeon/kv_dpm.c

2223

pi->battery_state = true;

sys/dev/drm/radeon/kv_dpm.c

2367

kv_dpm_power_level_enabled_for_throttle(rdev, i, true);

sys/dev/drm/radeon/kv_dpm.c

2384

kv_dpm_power_level_enabled_for_throttle(rdev, i, true);

sys/dev/drm/radeon/kv_dpm.c

2400

kv_dpm_power_level_enable(rdev, i, true);

sys/dev/drm/radeon/kv_dpm.c

2521

pi->sys_info.nb_dpm_enable = true;

sys/dev/drm/radeon/kv_dpm.c

2533

pi->caps_enable_dfs_bypass = true;

sys/dev/drm/radeon/kv_dpm.c

2744

pi->enable_nb_dpm = true;

sys/dev/drm/radeon/kv_dpm.c

2746

pi->caps_power_containment = true;

sys/dev/drm/radeon/kv_dpm.c

2747

pi->caps_cac = true;

sys/dev/drm/radeon/kv_dpm.c

2750

pi->caps_sq_ramping = true;

sys/dev/drm/radeon/kv_dpm.c

2751

pi->caps_db_ramping = true;

sys/dev/drm/radeon/kv_dpm.c

2752

pi->caps_td_ramping = true;

sys/dev/drm/radeon/kv_dpm.c

2753

pi->caps_tcp_ramping = true;

sys/dev/drm/radeon/kv_dpm.c

2756

pi->caps_sclk_ds = true;

sys/dev/drm/radeon/kv_dpm.c

2757

pi->enable_auto_thermal_throttling = true;

sys/dev/drm/radeon/kv_dpm.c

2762

pi->bapm_enable = true;

sys/dev/drm/radeon/kv_dpm.c

2768

pi->bapm_enable = true;

sys/dev/drm/radeon/kv_dpm.c

2773

pi->caps_uvd_pg = true;

sys/dev/drm/radeon/kv_dpm.c

2774

pi->caps_uvd_dpm = true;

sys/dev/drm/radeon/kv_dpm.c

2791

pi->enable_dpm = true;

sys/dev/drm/radeon/kv_dpm.c

441

pi->cac_enabled = true;

sys/dev/drm/radeon/kv_dpm.c

647

kv_smc_dpm_enable(rdev, true);

sys/dev/drm/radeon/kv_dpm.c

725

kv_dpm_power_level_enable(rdev, i, true);

sys/dev/drm/radeon/kv_dpm.c

739

kv_dpm_power_level_enable(rdev, i, true);

sys/dev/drm/radeon/ni.c

1364

rdev->gart.ready = true;

sys/dev/drm/radeon/ni.c

1579

cayman_cp_enable(rdev, true);

sys/dev/drm/radeon/ni.c

1738

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = true;

sys/dev/drm/radeon/ni.c

1978

r600_set_bios_scratch_engine_hung(rdev, true);

sys/dev/drm/radeon/ni.c

2331

rdev->accel_working = true;

sys/dev/drm/radeon/ni.c

2455

rdev->accel_working = true;

sys/dev/drm/radeon/ni_dma.c

246

ring->ready = true;

sys/dev/drm/radeon/ni_dpm.c

107

true

sys/dev/drm/radeon/ni_dpm.c

176

true

sys/dev/drm/radeon/ni_dpm.c

2347

if (cypress_get_mclk_frequency_ratio(rdev, pl->mclk, true) >=

sys/dev/drm/radeon/ni_dpm.c

2349

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ni_dpm.c

2351

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/ni_dpm.c

245

true

sys/dev/drm/radeon/ni_dpm.c

2612

ni_pi->pc_enabled = true;

sys/dev/drm/radeon/ni_dpm.c

2770

bool result = true;

sys/dev/drm/radeon/ni_dpm.c

3400

ni_pi->cac_enabled = (PPSMC_Result_OK == smc_result) ? true : false;

sys/dev/drm/radeon/ni_dpm.c

3428

eg_pi->pcie_performance_request_registered = true;

sys/dev/drm/radeon/ni_dpm.c

3448

pi->pcie_gen2 = true;

sys/dev/drm/radeon/ni_dpm.c

3453

ni_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, true);

sys/dev/drm/radeon/ni_dpm.c

3601

rv770_enable_voltage_control(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3614

cypress_enable_spread_spectrum(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3616

rv770_enable_thermal_protection(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3625

ni_enable_dynamic_pcie_gen2(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3685

cypress_enable_sclk_control(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3687

cypress_enable_mclk_control(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3690

ni_gfx_clockgating_enable(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3692

ni_mg_clockgating_enable(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3694

ni_ls_clockgating_enable(rdev, true);

sys/dev/drm/radeon/ni_dpm.c

3696

rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/radeon/ni_dpm.c

3836

ret = ni_enable_smc_cac(rdev, new_ps, true);

sys/dev/drm/radeon/ni_dpm.c

3841

ret = ni_enable_power_containment(rdev, new_ps, true);

sys/dev/drm/radeon/ni_dpm.c

3950

pi->acpi_pcie_gen2 = true;

sys/dev/drm/radeon/ni_dpm.c

3956

eg_pi->ulv.supported = true;

sys/dev/drm/radeon/ni_dpm.c

4124

eg_pi->smu_uvd_hs = true;

sys/dev/drm/radeon/ni_dpm.c

4154

pi->gfx_clock_gating = true;

sys/dev/drm/radeon/ni_dpm.c

4156

pi->mg_clock_gating = true;

sys/dev/drm/radeon/ni_dpm.c

4157

pi->mgcgtssm = true;

sys/dev/drm/radeon/ni_dpm.c

4161

pi->dynamic_pcie_gen2 = true;

sys/dev/drm/radeon/ni_dpm.c

4164

pi->thermal_protection = true;

sys/dev/drm/radeon/ni_dpm.c

4168

pi->display_gap = true;

sys/dev/drm/radeon/ni_dpm.c

4170

pi->dcodt = true;

sys/dev/drm/radeon/ni_dpm.c

4172

pi->ulps = true;

sys/dev/drm/radeon/ni_dpm.c

4174

eg_pi->dynamic_ac_timing = true;

sys/dev/drm/radeon/ni_dpm.c

4175

eg_pi->abm = true;

sys/dev/drm/radeon/ni_dpm.c

4176

eg_pi->mcls = true;

sys/dev/drm/radeon/ni_dpm.c

4177

eg_pi->light_sleep = true;

sys/dev/drm/radeon/ni_dpm.c

4178

eg_pi->memory_transition = true;

sys/dev/drm/radeon/ni_dpm.c

4233

ni_pi->enable_power_containment = true;

sys/dev/drm/radeon/ni_dpm.c

4234

ni_pi->enable_cac = true;

sys/dev/drm/radeon/ni_dpm.c

4235

ni_pi->enable_sq_ramping = true;

sys/dev/drm/radeon/ni_dpm.c

4243

ni_pi->cac_configuration_required = true;

sys/dev/drm/radeon/ni_dpm.c

4246

ni_pi->support_cac_long_term_average = true;

sys/dev/drm/radeon/ni_dpm.c

4255

ni_pi->use_power_boost_limit = true;

sys/dev/drm/radeon/ni_dpm.c

779

return true;

sys/dev/drm/radeon/ni_dpm.c

797

disable_mclk_switching = true;

sys/dev/drm/radeon/ni_dpm.c

894

ps->dc_compatible = true;

sys/dev/drm/radeon/r100.c

1227

ring->ready = true;

sys/dev/drm/radeon/r100.c

1607

track->zb_dirty = true;

sys/dev/drm/radeon/r100.c

1620

track->cb_dirty = true;

sys/dev/drm/radeon/r100.c

1646

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1664

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1682

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1700

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1704

track->cb_dirty = true;

sys/dev/drm/radeon/r100.c

1705

track->zb_dirty = true;

sys/dev/drm/radeon/r100.c

1728

track->cb_dirty = true;

sys/dev/drm/radeon/r100.c

1732

track->zb_dirty = true;

sys/dev/drm/radeon/r100.c

1757

track->cb_dirty = true;

sys/dev/drm/radeon/r100.c

1758

track->zb_dirty = true;

sys/dev/drm/radeon/r100.c

1776

track->zb_dirty = true;

sys/dev/drm/radeon/r100.c

1793

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1808

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1815

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1829

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1882

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

1893

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

210

rdev->pm.dynpm_can_upclock = true;

sys/dev/drm/radeon/r100.c

211

rdev->pm.dynpm_can_downclock = true;

sys/dev/drm/radeon/r100.c

2388

track->cb_dirty = true;

sys/dev/drm/radeon/r100.c

2389

track->zb_dirty = true;

sys/dev/drm/radeon/r100.c

2390

track->tex_dirty = true;

sys/dev/drm/radeon/r100.c

2391

track->aa_dirty = true;

sys/dev/drm/radeon/r100.c

2416

track->z_enabled = true;

sys/dev/drm/radeon/r100.c

2449

track->textures[i].roundup_w = true;

sys/dev/drm/radeon/r100.c

2450

track->textures[i].roundup_h = true;

sys/dev/drm/radeon/r100.c

2646

force_dac2 = true;

sys/dev/drm/radeon/r100.c

2663

force_dac2 = true;

sys/dev/drm/radeon/r100.c

2715

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r100.c

2717

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r100.c

2729

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r100.c

3977

rdev->accel_working = true;

sys/dev/drm/radeon/r100.c

4109

rdev->accel_working = true;

sys/dev/drm/radeon/r100.c

511

return true;

sys/dev/drm/radeon/r100.c

531

connected = true;

sys/dev/drm/radeon/r100.c

535

connected = true;

sys/dev/drm/radeon/r100.c

672

rdev->gart.ready = true;

sys/dev/drm/radeon/r100.c

75

return true;

sys/dev/drm/radeon/r100.c

785

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/r100.c

794

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/r100.c

80

return true;

sys/dev/drm/radeon/r100.c

801

queue_hotplug = true;

sys/dev/drm/radeon/r100.c

805

queue_hotplug = true;

sys/dev/drm/radeon/r100.c

98

return true;

sys/dev/drm/radeon/r200.c

190

track->zb_dirty = true;

sys/dev/drm/radeon/r200.c

203

track->cb_dirty = true;

sys/dev/drm/radeon/r200.c

232

track->tex_dirty = true;

sys/dev/drm/radeon/r200.c

276

track->tex_dirty = true;

sys/dev/drm/radeon/r200.c

280

track->cb_dirty = true;

sys/dev/drm/radeon/r200.c

281

track->zb_dirty = true;

sys/dev/drm/radeon/r200.c

305

track->cb_dirty = true;

sys/dev/drm/radeon/r200.c

309

track->zb_dirty = true;

sys/dev/drm/radeon/r200.c

339

track->cb_dirty = true;

sys/dev/drm/radeon/r200.c

340

track->zb_dirty = true;

sys/dev/drm/radeon/r200.c

358

track->zb_dirty = true;

sys/dev/drm/radeon/r200.c

375

track->tex_dirty = true;

sys/dev/drm/radeon/r200.c

400

track->tex_dirty = true;

sys/dev/drm/radeon/r200.c

410

track->tex_dirty = true;

sys/dev/drm/radeon/r200.c

427

track->tex_dirty = true;

sys/dev/drm/radeon/r200.c

466

track->tex_dirty = true;

sys/dev/drm/radeon/r200.c

483

track->textures[i].lookup_disable = true;

sys/dev/drm/radeon/r200.c

523

track->tex_dirty = true;

sys/dev/drm/radeon/r200.c

537

track->tex_dirty = true;

sys/dev/drm/radeon/r300.c

1003

track->tex_dirty = true;

sys/dev/drm/radeon/r300.c

1041

track->tex_dirty = true;

sys/dev/drm/radeon/r300.c

1071

track->tex_dirty = true;

sys/dev/drm/radeon/r300.c

1086

track->cb_dirty = true;

sys/dev/drm/radeon/r300.c

1100

track->cb_dirty = true;

sys/dev/drm/radeon/r300.c

1101

track->zb_dirty = true;

sys/dev/drm/radeon/r300.c

1113

track->cb_dirty = true;

sys/dev/drm/radeon/r300.c

1125

track->aa_dirty = true;

sys/dev/drm/radeon/r300.c

1130

track->aa_dirty = true;

sys/dev/drm/radeon/r300.c

1134

track->aa_dirty = true;

sys/dev/drm/radeon/r300.c

1459

rdev->accel_working = true;

sys/dev/drm/radeon/r300.c

1572

rdev->accel_working = true;

sys/dev/drm/radeon/r300.c

179

rdev->gart.ready = true;

sys/dev/drm/radeon/r300.c

472

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r300.c

668

track->cb_dirty = true;

sys/dev/drm/radeon/r300.c

681

track->zb_dirty = true;

sys/dev/drm/radeon/r300.c

725

track->tex_dirty = true;

sys/dev/drm/radeon/r300.c

752

track->cb_dirty = true;

sys/dev/drm/radeon/r300.c

753

track->zb_dirty = true;

sys/dev/drm/radeon/r300.c

763

track->cb_dirty = true;

sys/dev/drm/radeon/r300.c

828

track->cb_dirty = true;

sys/dev/drm/radeon/r300.c

833

track->z_enabled = true;

sys/dev/drm/radeon/r300.c

837

track->zb_dirty = true;

sys/dev/drm/radeon/r300.c

854

track->zb_dirty = true;

sys/dev/drm/radeon/r300.c

879

track->zb_dirty = true;

sys/dev/drm/radeon/r300.c

889

track->tex_dirty = true;

sys/dev/drm/radeon/r300.c

975

track->tex_dirty = true;

sys/dev/drm/radeon/r420.c

329

rdev->accel_working = true;

sys/dev/drm/radeon/r420.c

453

rdev->accel_working = true;

sys/dev/drm/radeon/r520.c

242

rdev->accel_working = true;

sys/dev/drm/radeon/r520.c

317

rdev->accel_working = true;

sys/dev/drm/radeon/r520.c

98

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r600.c

1173

rdev->gart.ready = true;

sys/dev/drm/radeon/r600.c

1432

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/r600.c

1488

rdev->fastfb_working = true;

sys/dev/drm/radeon/r600.c

1504

PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,

sys/dev/drm/radeon/r600.c

1603

return true;

sys/dev/drm/radeon/r600.c

1884

r600_set_bios_scratch_engine_hung(rdev, true);

sys/dev/drm/radeon/r600.c

2776

ring->ready = true;

sys/dev/drm/radeon/r600.c

2827

rdev->scratch.free[i] = true;

sys/dev/drm/radeon/r600.c

2957

return true;

sys/dev/drm/radeon/r600.c

3227

rdev->accel_working = true;

sys/dev/drm/radeon/r600.c

3335

rdev->accel_working = true;

sys/dev/drm/radeon/r600.c

3499

PAGE_SIZE, true,

sys/dev/drm/radeon/r600.c

356

rdev->pm.dynpm_can_upclock = true;

sys/dev/drm/radeon/r600.c

357

rdev->pm.dynpm_can_downclock = true;

sys/dev/drm/radeon/r600.c

3613

rdev->ih.enabled = true;

sys/dev/drm/radeon/r600.c

4154

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/r600.c

4184

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/r600.c

4223

queue_hotplug = true;

sys/dev/drm/radeon/r600.c

4231

queue_hotplug = true;

sys/dev/drm/radeon/r600.c

4239

queue_hotplug = true;

sys/dev/drm/radeon/r600.c

4247

queue_hotplug = true;

sys/dev/drm/radeon/r600.c

4255

queue_hotplug = true;

sys/dev/drm/radeon/r600.c

4263

queue_hotplug = true;

sys/dev/drm/radeon/r600.c

4279

queue_hdmi = true;

sys/dev/drm/radeon/r600.c

4288

queue_hdmi = true;

sys/dev/drm/radeon/r600.c

4318

queue_thermal = true;

sys/dev/drm/radeon/r600.c

4322

rdev->pm.dpm.thermal.high_to_low = true;

sys/dev/drm/radeon/r600.c

4323

queue_thermal = true;

sys/dev/drm/radeon/r600.c

790

return true;

sys/dev/drm/radeon/r600.c

802

connected = true;

sys/dev/drm/radeon/r600.c

806

connected = true;

sys/dev/drm/radeon/r600.c

810

connected = true;

sys/dev/drm/radeon/r600.c

814

connected = true;

sys/dev/drm/radeon/r600.c

819

connected = true;

sys/dev/drm/radeon/r600.c

823

connected = true;

sys/dev/drm/radeon/r600.c

832

connected = true;

sys/dev/drm/radeon/r600.c

836

connected = true;

sys/dev/drm/radeon/r600.c

840

connected = true;

sys/dev/drm/radeon/r600_cs.c

1030

track->db_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1054

track->db_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1058

track->db_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1063

track->db_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1067

track->streamout_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1071

track->streamout_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1088

track->streamout_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1097

track->streamout_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1110

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1119

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1124

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1154

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1166

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1179

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1218

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1249

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1263

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1286

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1299

track->db_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1311

track->db_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1317

track->db_dirty = true;

sys/dev/drm/radeon/r600_cs.c

1536

is_array = true;

sys/dev/drm/radeon/r600_cs.c

1539

is_array = true;

sys/dev/drm/radeon/r600_cs.c

1621

return true;

sys/dev/drm/radeon/r600_cs.c

184

return true;

sys/dev/drm/radeon/r600_cs.c

198

return true;

sys/dev/drm/radeon/r600_cs.c

326

track->cb_dirty = true;

sys/dev/drm/radeon/r600_cs.c

335

track->db_dirty = true;

sys/dev/drm/radeon/r600_cs.c

346

track->streamout_dirty = true;

sys/dev/drm/radeon/r600_dma.c

170

ring->ready = true;

sys/dev/drm/radeon/r600_dma.c

323

return true;

sys/dev/drm/radeon/r600_dpm.c

1026

rdev->pm.dpm.power_control = true;

sys/dev/drm/radeon/r600_dpm.c

299

return true;

sys/dev/drm/radeon/r600_dpm.c

691

r600_dynamicpm_enable(rdev, true);

sys/dev/drm/radeon/r600_dpm.c

696

r600_enable_spll_bypass(rdev, true);

sys/dev/drm/radeon/r600_dpm.c

701

r600_enable_spll_bypass(rdev, true);

sys/dev/drm/radeon/r600_dpm.c

706

r600_enable_sclk_control(rdev, true);

sys/dev/drm/radeon/r600_dpm.c

707

r600_enable_mclk_control(rdev, true);

sys/dev/drm/radeon/r600_dpm.c

728

return true;

sys/dev/drm/radeon/r600_dpm.c

730

return true;

sys/dev/drm/radeon/r600_dpm.c

732

return true;

sys/dev/drm/radeon/r600_dpm.c

734

return true;

sys/dev/drm/radeon/r600_dpm.c

736

return true;

sys/dev/drm/radeon/r600_dpm.c

776

return true;

sys/dev/drm/radeon/r600_dpm.c

797

rdev->irq.dpm_thermal = true;

sys/dev/drm/radeon/r600_dpm.c

916

rdev->pm.dpm.fan.ucode_fan_control = true;

sys/dev/drm/radeon/r600_hdmi.c

129

changed = true;

sys/dev/drm/radeon/radeon.h

2537

#define RREG32_IDX(reg) r100_mm_rreg(rdev, (reg), true)

sys/dev/drm/radeon/radeon.h

2540

#define WREG32_IDX(reg, v) r100_mm_wreg(rdev, (reg), (v), true)

sys/dev/drm/radeon/radeon.h

434

return true;

sys/dev/drm/radeon/radeon_acpi.c

277

n->enabled = true;

sys/dev/drm/radeon/radeon_acpi.c

284

n->enabled = true;

sys/dev/drm/radeon/radeon_acpi.c

528

return true;

sys/dev/drm/radeon/radeon_acpi.c

754

atif->functions.system_params = true;

sys/dev/drm/radeon/radeon_asic.c

2397

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2410

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2417

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2430

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2436

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2447

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2453

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2459

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2460

rdev->has_vce = true;

sys/dev/drm/radeon/radeon_asic.c

2481

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2482

rdev->has_vce = true;

sys/dev/drm/radeon/radeon_asic.c

2587

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2588

rdev->has_vce = true;

sys/dev/drm/radeon/radeon_asic.c

2688

rdev->has_uvd = true;

sys/dev/drm/radeon/radeon_asic.c

2689

rdev->has_vce = true;

sys/dev/drm/radeon/radeon_atombios.c

1010

bios_connectors[i].valid = true;

sys/dev/drm/radeon/radeon_atombios.c

102

i2c.hw_capable = true;

sys/dev/drm/radeon/radeon_atombios.c

107

i2c.mm_i2c = true;

sys/dev/drm/radeon/radeon_atombios.c

1089

return true;

sys/dev/drm/radeon/radeon_atombios.c

114

i2c.valid = true;

sys/dev/drm/radeon/radeon_atombios.c

1290

return true;

sys/dev/drm/radeon/radeon_atombios.c

1315

return true;

sys/dev/drm/radeon/radeon_atombios.c

1319

return true;

sys/dev/drm/radeon/radeon_atombios.c

1373

return true;

sys/dev/drm/radeon/radeon_atombios.c

1409

return true;

sys/dev/drm/radeon/radeon_atombios.c

1548

return true;

sys/dev/drm/radeon/radeon_atombios.c

1570

return true;

sys/dev/drm/radeon/radeon_atombios.c

1597

return true;

sys/dev/drm/radeon/radeon_atombios.c

1686

lvds->linkb = true;

sys/dev/drm/radeon/radeon_atombios.c

1747

bad_record = true;

sys/dev/drm/radeon/radeon_atombios.c

1883

return true;

sys/dev/drm/radeon/radeon_atombios.c

2157

true;

sys/dev/drm/radeon/radeon_atombios.c

218

gpio.valid = true;

sys/dev/drm/radeon/radeon_atombios.c

2193

true;

sys/dev/drm/radeon/radeon_atombios.c

2229

true;

sys/dev/drm/radeon/radeon_atombios.c

2240

true;

sys/dev/drm/radeon/radeon_atombios.c

2281

rdev->pm.no_fan = true;

sys/dev/drm/radeon/radeon_atombios.c

2567

return true;

sys/dev/drm/radeon/radeon_atombios.c

2853

dividers->enable_post_div = true;

sys/dev/drm/radeon/radeon_atombios.c

2870

true : false;

sys/dev/drm/radeon/radeon_atombios.c

2873

dividers->enable_post_div = (dividers->fb_div & 1) ? true : false;

sys/dev/drm/radeon/radeon_atombios.c

2882

ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false;

sys/dev/drm/radeon/radeon_atombios.c

2884

ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE) ? false : true;

sys/dev/drm/radeon/radeon_atombios.c

2902

ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN) ? true : false;

sys/dev/drm/radeon/radeon_atombios.c

2904

ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE) ? false : true;

sys/dev/drm/radeon/radeon_atombios.c

3457

return true;

sys/dev/drm/radeon/radeon_atombios.c

3464

return true;

sys/dev/drm/radeon/radeon_atombios.c

3476

return true;

sys/dev/drm/radeon/radeon_atombios.c

445

return true;

sys/dev/drm/radeon/radeon_atombios.c

729

router.ddc_valid = true;

sys/dev/drm/radeon/radeon_atombios.c

737

router.cd_valid = true;

sys/dev/drm/radeon/radeon_atombios.c

835

return true;

sys/dev/drm/radeon/radeon_audio.c

313

rdev->audio.enabled = true;

sys/dev/drm/radeon/radeon_audio.c

716

radeon_audio_set_mute(encoder, true);

sys/dev/drm/radeon/radeon_benchmark.c

109

r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, NULL, &dobj);

sys/dev/drm/radeon/radeon_benchmark.c

97

r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, NULL, &sobj);

sys/dev/drm/radeon/radeon_bios.c

105

return true;

sys/dev/drm/radeon/radeon_bios.c

162

return true;

sys/dev/drm/radeon/radeon_bios.c

256

found = true;

sys/dev/drm/radeon/radeon_bios.c

295

return true;

sys/dev/drm/radeon/radeon_bios.c

75

return true;

sys/dev/drm/radeon/radeon_bios.c

770

rdev->is_atom_bios = true;

sys/dev/drm/radeon/radeon_bios.c

776

return true;

sys/dev/drm/radeon/radeon_clocks.c

167

return true;

sys/dev/drm/radeon/radeon_combios.c

1154

lvds->use_bios_dividers = true;

sys/dev/drm/radeon/radeon_combios.c

1208

lvds->use_bios_dividers = true;

sys/dev/drm/radeon/radeon_combios.c

1323

return true;

sys/dev/drm/radeon/radeon_combios.c

1376

return true;

sys/dev/drm/radeon/radeon_combios.c

1400

return true;

sys/dev/drm/radeon/radeon_combios.c

1429

i2c_bus.valid = true;

sys/dev/drm/radeon/radeon_combios.c

1430

i2c_bus.hw_capable = true;

sys/dev/drm/radeon/radeon_combios.c

1431

i2c_bus.mm_i2c = true;

sys/dev/drm/radeon/radeon_combios.c

1444

return true;

sys/dev/drm/radeon/radeon_combios.c

2210

return true;

sys/dev/drm/radeon/radeon_combios.c

2238

return true;

sys/dev/drm/radeon/radeon_combios.c

2261

return true;

sys/dev/drm/radeon/radeon_combios.c

2621

return true;

sys/dev/drm/radeon/radeon_combios.c

2682

i2c_bus.valid = true;

sys/dev/drm/radeon/radeon_combios.c

2683

i2c_bus.hw_capable = true;

sys/dev/drm/radeon/radeon_combios.c

2684

i2c_bus.mm_i2c = true;

sys/dev/drm/radeon/radeon_combios.c

2743

true;

sys/dev/drm/radeon/radeon_combios.c

2747

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = true;

sys/dev/drm/radeon/radeon_combios.c

2944

return true;

sys/dev/drm/radeon/radeon_combios.c

2999

return true;

sys/dev/drm/radeon/radeon_combios.c

388

return true;

sys/dev/drm/radeon/radeon_combios.c

558

i2c.hw_capable = true;

sys/dev/drm/radeon/radeon_combios.c

569

i2c.hw_capable = true;

sys/dev/drm/radeon/radeon_combios.c

582

i2c.hw_capable = true;

sys/dev/drm/radeon/radeon_combios.c

594

i2c.hw_capable = true;

sys/dev/drm/radeon/radeon_combios.c

608

i2c.hw_capable = true;

sys/dev/drm/radeon/radeon_combios.c

631

i2c.valid = true;

sys/dev/drm/radeon/radeon_combios.c

690

i2c.valid = true;

sys/dev/drm/radeon/radeon_combios.c

691

i2c.hw_capable = true;

sys/dev/drm/radeon/radeon_combios.c

692

i2c.mm_i2c = true;

sys/dev/drm/radeon/radeon_combios.c

803

return true;

sys/dev/drm/radeon/radeon_combios.c

821

return true;

sys/dev/drm/radeon/radeon_connectors.c

1088

radeon_connector->detected_by_load = true;

sys/dev/drm/radeon/radeon_connectors.c

1093

ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);

sys/dev/drm/radeon/radeon_connectors.c

1232

return true;

sys/dev/drm/radeon/radeon_connectors.c

1270

force = true;

sys/dev/drm/radeon/radeon_connectors.c

1289

radeon_connector->detected_hpd_without_ddc = true;

sys/dev/drm/radeon/radeon_connectors.c

1313

broken_edid = true; /* defer use_digital to later */

sys/dev/drm/radeon/radeon_connectors.c

1357

if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))

sys/dev/drm/radeon/radeon_connectors.c

1394

radeon_connector->detected_by_load = true;

sys/dev/drm/radeon/radeon_connectors.c

1399

radeon_connector->use_digital = true;

sys/dev/drm/radeon/radeon_connectors.c

1412

ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);

sys/dev/drm/radeon/radeon_connectors.c

1425

radeon_connector->use_digital = true;

sys/dev/drm/radeon/radeon_connectors.c

1460

if (radeon_connector->use_digital == true) {

sys/dev/drm/radeon/radeon_connectors.c

1486

radeon_connector->use_digital = true;

sys/dev/drm/radeon/radeon_connectors.c

1644

found = true;

sys/dev/drm/radeon/radeon_connectors.c

1658

return true;

sys/dev/drm/radeon/radeon_connectors.c

1729

if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */

sys/dev/drm/radeon/radeon_connectors.c

1910

radeon_connector->shared_ddc = true;

sys/dev/drm/radeon/radeon_connectors.c

1911

shared_ddc = true;

sys/dev/drm/radeon/radeon_connectors.c

1928

is_dp_bridge = true;

sys/dev/drm/radeon/radeon_connectors.c

1964

has_aux = true;

sys/dev/drm/radeon/radeon_connectors.c

1976

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

1977

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

1978

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2029

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2031

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2035

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2065

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2079

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2080

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2090

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2104

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2105

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2149

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2158

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2160

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2209

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2211

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2226

has_aux = true;

sys/dev/drm/radeon/radeon_connectors.c

2261

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2276

has_aux = true;

sys/dev/drm/radeon/radeon_connectors.c

2292

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2401

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2407

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2408

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2418

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2424

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2425

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2437

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

2443

connector->interlace_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2445

connector->doublescan_allowed = true;

sys/dev/drm/radeon/radeon_connectors.c

2454

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_connectors.c

257

connected = true;

sys/dev/drm/radeon/radeon_connectors.c

446

if (priority == true) {

sys/dev/drm/radeon/radeon_connectors.c

494

mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);

sys/dev/drm/radeon/radeon_connectors.c

577

new_coherent_mode = val ? true : false;

sys/dev/drm/radeon/radeon_connectors.c

687

radeon_connector->dac_load_detect = true;

sys/dev/drm/radeon/radeon_cs.c

164

need_mmap_lock = true;

sys/dev/drm/radeon/radeon_cs.c

485

r = radeon_ib_schedule(rdev, &parser->ib, NULL, true);

sys/dev/drm/radeon/radeon_cs.c

579

r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib, true);

sys/dev/drm/radeon/radeon_cs.c

581

r = radeon_ib_schedule(rdev, &parser->ib, NULL, true);

sys/dev/drm/radeon/radeon_cs.c

625

parser->const_ib.is_const_ib = true;

sys/dev/drm/radeon/radeon_cs.c

715

radeon_cs_parser_fini(&parser, r, true);

sys/dev/drm/radeon/radeon_cs.c

804

return true;

sys/dev/drm/radeon/radeon_cursor.c

257

radeon_crtc->cursor_out_of_bounds = true;

sys/dev/drm/radeon/radeon_cursor.c

267

radeon_lock_cursor(crtc, true);

sys/dev/drm/radeon/radeon_cursor.c

324

radeon_lock_cursor(crtc, true);

sys/dev/drm/radeon/radeon_cursor.c

375

radeon_lock_cursor(crtc, true);

sys/dev/drm/radeon/radeon_device.c

1227

radeon_resume_kms(dev, true, true);

sys/dev/drm/radeon/radeon_device.c

1235

radeon_suspend_kms(dev, true, true, false);

sys/dev/drm/radeon/radeon_device.c

1374

rdev->need_dma32 = true;

sys/dev/drm/radeon/radeon_device.c

1377

rdev->need_dma32 = true;

sys/dev/drm/radeon/radeon_device.c

1380

rdev->need_dma32 = true;

sys/dev/drm/radeon/radeon_device.c

1386

rdev->need_dma32 = true;

sys/dev/drm/radeon/radeon_device.c

1452

runtime = true;

sys/dev/drm/radeon/radeon_device.c

1503

rdev->fictitious_range_registered = true;

sys/dev/drm/radeon/radeon_device.c

155

return true;

sys/dev/drm/radeon/radeon_device.c

1561

rdev->shutdown = true;

sys/dev/drm/radeon/radeon_device.c

1683

rdev->asic->asic_reset(rdev, true);

sys/dev/drm/radeon/radeon_device.c

1865

saved = true;

sys/dev/drm/radeon/radeon_device.c

1918

rdev->in_reset = true;

sys/dev/drm/radeon/radeon_device.c

271

rdev->scratch.free[i] = true;

sys/dev/drm/radeon/radeon_device.c

313

rdev->scratch.free[i] = true;

sys/dev/drm/radeon/radeon_device.c

457

r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,

sys/dev/drm/radeon/radeon_device.c

502

rdev->wb.enabled = true;

sys/dev/drm/radeon/radeon_device.c

505

rdev->wb.use_event = true;

sys/dev/drm/radeon/radeon_device.c

511

rdev->wb.enabled = true;

sys/dev/drm/radeon/radeon_device.c

512

rdev->wb.use_event = true;

sys/dev/drm/radeon/radeon_device.c

684

return true;

sys/dev/drm/radeon/radeon_device.c

689

return true;

sys/dev/drm/radeon/radeon_device.c

695

return true;

sys/dev/drm/radeon/radeon_device.c

707

return true;

sys/dev/drm/radeon/radeon_device.c

753

return true;

sys/dev/drm/radeon/radeon_device.c

761

return true;

sys/dev/drm/radeon/radeon_display.c

1580

rdev->mode_info.mode_config_initialized = true;

sys/dev/drm/radeon/radeon_display.c

1585

rdev->ddev->mode_config.async_page_flip = true;

sys/dev/drm/radeon/radeon_display.c

1674

return true;

sys/dev/drm/radeon/radeon_display.c

1690

bool first = true;

sys/dev/drm/radeon/radeon_display.c

1769

return true;

sys/dev/drm/radeon/radeon_display.c

1816

bool in_vbl = true;

sys/dev/drm/radeon/radeon_display.c

637

active = true;

sys/dev/drm/radeon/radeon_display.c

645

rdev->have_disp_power_ref = true;

sys/dev/drm/radeon/radeon_dp_auxch.c

77

is_write = true;

sys/dev/drm/radeon/radeon_dp_mst.c

280

radeon_connector->is_mst_connector = true;

sys/dev/drm/radeon/radeon_dp_mst.c

425

mst_enc->fe_from_be = true;

sys/dev/drm/radeon/radeon_dp_mst.c

456

radeon_connector->mst_port->hpd.hpd, true);

sys/dev/drm/radeon/radeon_dp_mst.c

458

mst_enc->enc_active = true;

sys/dev/drm/radeon/radeon_dp_mst.c

537

return true;

sys/dev/drm/radeon/radeon_dp_mst.c

651

radeon_encoder->is_mst_encoder = true;

sys/dev/drm/radeon/radeon_dp_mst.c

692

dig_connector->is_mst = true;

sys/dev/drm/radeon/radeon_drv.c

480

return radeon_suspend_kms(drm_dev, true, true, false);

sys/dev/drm/radeon/radeon_drv.c

495

return radeon_resume_kms(drm_dev, true, true);

sys/dev/drm/radeon/radeon_drv.c

502

return radeon_suspend_kms(drm_dev, false, true, true);

sys/dev/drm/radeon/radeon_drv.c

509

return radeon_resume_kms(drm_dev, false, true);

sys/dev/drm/radeon/radeon_drv.c

847

return -radeon_suspend_kms(dev, true, true, false);

sys/dev/drm/radeon/radeon_drv.c

856

return -radeon_resume_kms(dev, true, true);

sys/dev/drm/radeon/radeon_encoders.c

167

use_bl = true;

sys/dev/drm/radeon/radeon_encoders.c

182

use_bl = true;

sys/dev/drm/radeon/radeon_encoders.c

383

return true;

sys/dev/drm/radeon/radeon_encoders.c

388

return true;

sys/dev/drm/radeon/radeon_encoders.c

408

return true;

sys/dev/drm/radeon/radeon_encoders.c

413

return true;

sys/dev/drm/radeon/radeon_encoders.c

439

return true;

sys/dev/drm/radeon/radeon_fb.c

158

0, true, &gobj);

sys/dev/drm/radeon/radeon_fb.c

433

return true;

sys/dev/drm/radeon/radeon_fence.c

1010

rdev->needs_reset = true;

sys/dev/drm/radeon/radeon_fence.c

242

wake = true;

sys/dev/drm/radeon/radeon_fence.c

306

rdev->needs_reset = true;

sys/dev/drm/radeon/radeon_fence.c

345

return true;

sys/dev/drm/radeon/radeon_fence.c

350

return true;

sys/dev/drm/radeon/radeon_fence.c

363

return true;

sys/dev/drm/radeon/radeon_fence.c

371

return true;

sys/dev/drm/radeon/radeon_fence.c

410

rdev->fence_drv[fence->ring].delayed_irq = true;

sys/dev/drm/radeon/radeon_fence.c

421

return true;

sys/dev/drm/radeon/radeon_fence.c

435

return true;

sys/dev/drm/radeon/radeon_fence.c

443

return true;

sys/dev/drm/radeon/radeon_fence.c

465

return true;

sys/dev/drm/radeon/radeon_fence.c

778

return true;

sys/dev/drm/radeon/radeon_fence.c

860

rdev->fence_drv[ring].initialized = true;

sys/dev/drm/radeon/radeon_gart.c

133

PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,

sys/dev/drm/radeon/radeon_gem.c

117

r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);

sys/dev/drm/radeon/radeon_gem.c

193

r = radeon_bo_reserve(rbo, true);

sys/dev/drm/radeon/radeon_gem.c

294

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/radeon/radeon_gem.c

346

r = radeon_bo_reserve(bo, true);

sys/dev/drm/radeon/radeon_gem.c

456

r = reservation_object_test_signaled_rcu(robj->tbo.resv, true);

sys/dev/drm/radeon/radeon_gem.c

485

ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);

sys/dev/drm/radeon/radeon_gem.c

566

tv.shared = true;

sys/dev/drm/radeon/radeon_gem.c

573

r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);

sys/dev/drm/radeon/radeon_i2c.c

85

return true;

sys/dev/drm/radeon/radeon_ib.c

223

rdev->ib_pool_ready = true;

sys/dev/drm/radeon/radeon_irq_kms.c

227

return true;

sys/dev/drm/radeon/radeon_irq_kms.c

236

return true;

sys/dev/drm/radeon/radeon_irq_kms.c

242

return true;

sys/dev/drm/radeon/radeon_irq_kms.c

248

return true;

sys/dev/drm/radeon/radeon_irq_kms.c

254

return true;

sys/dev/drm/radeon/radeon_irq_kms.c

258

return true;

sys/dev/drm/radeon/radeon_irq_kms.c

269

return true;

sys/dev/drm/radeon/radeon_irq_kms.c

274

return true;

sys/dev/drm/radeon/radeon_irq_kms.c

293

rdev->ddev->vblank_disable_immediate = true;

sys/dev/drm/radeon/radeon_irq_kms.c

317

rdev->irq.installed = true;

sys/dev/drm/radeon/radeon_irq_kms.c

480

rdev->irq.afmt[block] = true;

sys/dev/drm/radeon/radeon_kms.c

590

*value = true;

sys/dev/drm/radeon/radeon_kms.c

846

rdev->irq.crtc_vblank_int[crtc] = true;

sys/dev/drm/radeon/radeon_legacy_crtc.c

1029

return true;

sys/dev/drm/radeon/radeon_legacy_crtc.c

324

radeon_crtc->enabled = true;

sys/dev/drm/radeon/radeon_legacy_crtc.c

54

bool hscale = true, vscale = true;

sys/dev/drm/radeon/radeon_legacy_crtc.c

592

is_tv = true;

sys/dev/drm/radeon/radeon_legacy_crtc.c

727

return true;

sys/dev/drm/radeon/radeon_legacy_crtc.c

787

is_tv = true;

sys/dev/drm/radeon/radeon_legacy_crtc.c

803

use_bios_divs = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1047

is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1122

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1124

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1133

radeon_atom_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1135

radeon_combios_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1146

radeon_atom_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1148

radeon_combios_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1166

is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false;

sys/dev/drm/radeon/radeon_legacy_encoders.c

127

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

129

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

1360

found = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1363

found = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1426

found = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1429

found = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1500

found = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

1542

bool color = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

157

radeon_atom_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

159

radeon_combios_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

258

return true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

413

pdata->negative = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

554

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

556

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

565

radeon_atom_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

567

radeon_combios_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

648

bool color = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

751

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

753

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

762

radeon_atom_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

764

radeon_combios_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

775

radeon_atom_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

777

radeon_combios_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

79

is_mac = true;

sys/dev/drm/radeon/radeon_legacy_encoders.c

917

radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

919

radeon_combios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);

sys/dev/drm/radeon/radeon_legacy_encoders.c

928

radeon_atom_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_legacy_encoders.c

930

radeon_combios_output_lock(encoder, true);

sys/dev/drm/radeon/radeon_mn.c

162

r = radeon_bo_reserve(bo, true);

sys/dev/drm/radeon/radeon_mn.c

169

true, false, MAX_SCHEDULE_TIMEOUT);

sys/dev/drm/radeon/radeon_object.c

533

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/radeon/radeon_object.c

541

r = ttm_eu_reserve_buffers(ticket, head, true, &duplicates);

sys/dev/drm/radeon/radeon_object.c

847

r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);

sys/dev/drm/radeon/radeon_object.c

853

r = ttm_bo_wait(&bo->tbo, true, no_wait);

sys/dev/drm/radeon/radeon_object.c

91

return true;

sys/dev/drm/radeon/radeon_pm.c

1199

rdev->pm.dpm.uvd_active = true;

sys/dev/drm/radeon/radeon_pm.c

1229

rdev->pm.dpm.vce_active = true;

sys/dev/drm/radeon/radeon_pm.c

1326

rdev->pm.dpm_enabled = true;

sys/dev/drm/radeon/radeon_pm.c

1362

rdev->pm.dynpm_can_upclock = true;

sys/dev/drm/radeon/radeon_pm.c

1363

rdev->pm.dynpm_can_downclock = true;

sys/dev/drm/radeon/radeon_pm.c

1457

rdev->pm.dpm_enabled = true;

sys/dev/drm/radeon/radeon_pm.c

1516

disable_dpm = true;

sys/dev/drm/radeon/radeon_pm.c

1618

rdev->pm.sysfs_initialized = true;

sys/dev/drm/radeon/radeon_pm.c

1646

rdev->pm.sysfs_initialized = true;

sys/dev/drm/radeon/radeon_pm.c

1845

rdev->pm.dpm.ac_power = true;

sys/dev/drm/radeon/radeon_pm.c

1866

bool in_vbl = true;

sys/dev/drm/radeon/radeon_pm.c

206

misc_after = true;

sys/dev/drm/radeon/radeon_pm.c

225

radeon_pm_debug_check_in_vbl(rdev, true);

sys/dev/drm/radeon/radeon_pm.c

234

radeon_pm_debug_check_in_vbl(rdev, true);

sys/dev/drm/radeon/radeon_pm.c

76

rdev->pm.dpm.ac_power = true;

sys/dev/drm/radeon/radeon_pm.c

897

rdev->pm.dpm.thermal_active = true;

sys/dev/drm/radeon/radeon_pm.c

909

true : false;

sys/dev/drm/radeon/radeon_ring.c

263

return true;

sys/dev/drm/radeon/radeon_ring.c

385

r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,

sys/dev/drm/radeon/radeon_ring.c

64

return true;

sys/dev/drm/radeon/radeon_sa.c

209

return true;

sys/dev/drm/radeon/radeon_sa.c

232

return true;

sys/dev/drm/radeon/radeon_sa.c

241

return true;

sys/dev/drm/radeon/radeon_sa.c

258

return true;

sys/dev/drm/radeon/radeon_sa.c

307

return true;

sys/dev/drm/radeon/radeon_sa.c

67

r = radeon_bo_create(rdev, size, align, true,

sys/dev/drm/radeon/radeon_semaphore.c

74

return true;

sys/dev/drm/radeon/radeon_semaphore.c

88

if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, true)) {

sys/dev/drm/radeon/radeon_semaphore.c

93

return true;

sys/dev/drm/radeon/radeon_sync.c

106

r = dma_fence_wait(f, true);

sys/dev/drm/radeon/radeon_sync.c

119

r = dma_fence_wait(f, true);

sys/dev/drm/radeon/radeon_test.c

522

return true;

sys/dev/drm/radeon/radeon_test.c

69

r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,

sys/dev/drm/radeon/radeon_test.c

89

r = radeon_bo_create(rdev, size, PAGE_SIZE, true,

sys/dev/drm/radeon/radeon_ttm.c

109

rdev->mman.mem_global_referenced = true;

sys/dev/drm/radeon/radeon_ttm.c

348

r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);

sys/dev/drm/radeon/radeon_ttm.c

389

r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);

sys/dev/drm/radeon/radeon_ttm.c

493

mem->bus.is_iomem = true;

sys/dev/drm/radeon/radeon_ttm.c

912

rdev->mman.initialized = true;

sys/dev/drm/radeon/radeon_ttm.c

923

r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,

sys/dev/drm/radeon/radeon_uvd.c

153

rdev->uvd.fw_header_present = true;

sys/dev/drm/radeon/radeon_uvd.c

187

r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true,

sys/dev/drm/radeon/radeon_uvd.c

636

*has_msg_cmd = true;

sys/dev/drm/radeon/radeon_uvd.c

789

r = radeon_bo_reserve(rdev->uvd.vcpu_bo, true);

sys/dev/drm/radeon/radeon_uvd.c

825

r = radeon_bo_reserve(rdev->uvd.vcpu_bo, true);

sys/dev/drm/radeon/radeon_uvd.c

910

radeon_dpm_enable_uvd(rdev, true);

sys/dev/drm/radeon/radeon_vce.c

142

r = radeon_bo_create(rdev, size, PAGE_SIZE, true,

sys/dev/drm/radeon/radeon_vce.c

301

radeon_dpm_enable_vce(rdev, true);

sys/dev/drm/radeon/radeon_vce.c

542

*allocated = true;

sys/dev/drm/radeon/radeon_vce.c

595

created = true;

sys/dev/drm/radeon/radeon_vce.c

628

destroyed = true;

sys/dev/drm/radeon/radeon_vce.c

709

return true;

sys/dev/drm/radeon/radeon_vm.c

1028

ib.fence->is_vm_update = true;

sys/dev/drm/radeon/radeon_vm.c

1206

r = radeon_bo_create(rdev, pd_size, align, true,

sys/dev/drm/radeon/radeon_vm.c

145

list[0].tv.shared = true;

sys/dev/drm/radeon/radeon_vm.c

157

list[idx].tv.shared = true;

sys/dev/drm/radeon/radeon_vm.c

390

struct ttm_operation_ctx ctx = { true, false };

sys/dev/drm/radeon/radeon_vm.c

421

ib.fence->is_vm_update = true;

sys/dev/drm/radeon/radeon_vm.c

551

RADEON_GPU_PAGE_SIZE, true,

sys/dev/drm/radeon/radeon_vm.c

705

radeon_sync_resv(rdev, &ib.sync, pd->tbo.resv, true);

sys/dev/drm/radeon/radeon_vm.c

712

ib.fence->is_vm_update = true;

sys/dev/drm/radeon/radeon_vm.c

833

radeon_sync_resv(rdev, &ib->sync, pt->tbo.resv, true);

sys/dev/drm/radeon/radeon_vm.c

896

radeon_bo_fence(vm->page_tables[i].bo, fence, true);

sys/dev/drm/radeon/radeon_vm.c

94

rdev->vm_manager.enabled = true;

sys/dev/drm/radeon/rs400.c

188

rdev->gart.ready = true;

sys/dev/drm/radeon/rs400.c

268

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rs400.c

477

rdev->accel_working = true;

sys/dev/drm/radeon/rs400.c

568

rdev->accel_working = true;

sys/dev/drm/radeon/rs600.c

1054

rdev->accel_working = true;

sys/dev/drm/radeon/rs600.c

1147

rdev->accel_working = true;

sys/dev/drm/radeon/rs600.c

356

connected = true;

sys/dev/drm/radeon/rs600.c

361

connected = true;

sys/dev/drm/radeon/rs600.c

58

return true;

sys/dev/drm/radeon/rs600.c

610

rdev->gart.ready = true;

sys/dev/drm/radeon/rs600.c

71

return true;

sys/dev/drm/radeon/rs600.c

789

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/rs600.c

798

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/rs600.c

805

queue_hotplug = true;

sys/dev/drm/radeon/rs600.c

809

queue_hotplug = true;

sys/dev/drm/radeon/rs600.c

813

queue_hdmi = true;

sys/dev/drm/radeon/rs600.c

873

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rs690.c

155

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rs690.c

192

rdev->fastfb_working = true;

sys/dev/drm/radeon/rs690.c

628

rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, true);

sys/dev/drm/radeon/rs690.c

629

rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, true);

sys/dev/drm/radeon/rs690.c

770

rdev->accel_working = true;

sys/dev/drm/radeon/rs690.c

864

rdev->accel_working = true;

sys/dev/drm/radeon/rs780_dpm.c

1064

rs780_clk_scaling_enable(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

1068

rs780_voltage_scaling_enable(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

166

r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true);

sys/dev/drm/radeon/rs780_dpm.c

180

r600_dynamicpm_enable(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

185

r600_enable_spll_bypass(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

190

r600_enable_spll_bypass(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

195

r600_enable_sclk_control(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

276

rs780_voltage_scaling_enable(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

506

rs780_clk_scaling_enable(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

617

rs780_clk_scaling_enable(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

625

r600_gfx_clockgating_enable(rdev, true);

sys/dev/drm/radeon/rs780_dpm.c

869

pi->gfx_clock_gating = true;

sys/dev/drm/radeon/rs780_dpm.c

883

(pi->num_of_cycles_in_period & 0x8000) ? true : false;

sys/dev/drm/radeon/rs780_dpm.c

893

pi->voltage_control = true;

sys/dev/drm/radeon/rs780_dpm.c

900

(pi->num_of_cycles_in_period & 0x8000) ? true : false;

sys/dev/drm/radeon/rs780_dpm.c

91

r600_engine_clock_entry_enable_post_divider(rdev, 0, true);

sys/dev/drm/radeon/rs780_dpm.c

910

(pi->system_config & 0x4) ? true : false;

sys/dev/drm/radeon/rs780_dpm.c

911

pi->voltage_control = true;

sys/dev/drm/radeon/rs780_dpm.c

98

r600_engine_clock_entry_enable(rdev, 0, true);

sys/dev/drm/radeon/rv515.c

179

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rv515.c

306

save->crtc_enabled[i] = true;

sys/dev/drm/radeon/rv515.c

586

rdev->accel_working = true;

sys/dev/drm/radeon/rv515.c

690

rdev->accel_working = true;

sys/dev/drm/radeon/rv6xx_dpm.c

1341

r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1349

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1364

want_thermal_protection = true;

sys/dev/drm/radeon/rv6xx_dpm.c

1369

want_thermal_protection = true;

sys/dev/drm/radeon/rv6xx_dpm.c

1375

want_thermal_protection = true;

sys/dev/drm/radeon/rv6xx_dpm.c

1476

rv6xx_enable_dynamic_spread_spectrum(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1501

rv6xx_enable_bif_dynamic_pcie_gen2(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1503

r600_enable_dynamic_pcie_gen2(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1555

rv6xx_enable_backbias(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1558

rv6xx_enable_spread_spectrum(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1571

rv6xx_enable_display_gap(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1593

r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1594

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1595

r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1597

rv6xx_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1605

rv6xx_enable_dynamic_pcie_gen2(rdev, boot_ps, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1608

r600_gfx_clockgating_enable(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1621

r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1622

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1640

rv6xx_enable_static_voltage_control(rdev, boot_ps, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1669

r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1706

r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true);

sys/dev/drm/radeon/rv6xx_dpm.c

171

r600_engine_clock_entry_enable(rdev, step_index, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1716

r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1726

rv6xx_enable_dynamic_voltage_control(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1730

rv6xx_enable_dynamic_backbias_control(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1733

rv6xx_enable_dynamic_pcie_gen2(rdev, new_ps, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1746

rv6xx_enable_thermal_protection(rdev, true);

sys/dev/drm/radeon/rv6xx_dpm.c

180

r600_engine_clock_entry_enable_post_divider(rdev, step_index, true);

sys/dev/drm/radeon/rv6xx_dpm.c

1979

pi->gfx_clock_gating = true;

sys/dev/drm/radeon/rv6xx_dpm.c

1990

pi->dynamic_ss = true;

sys/dev/drm/radeon/rv6xx_dpm.c

1994

pi->dynamic_pcie_gen2 = true;

sys/dev/drm/radeon/rv6xx_dpm.c

1998

pi->thermal_protection = true;

sys/dev/drm/radeon/rv6xx_dpm.c

2002

pi->display_gap = true;

sys/dev/drm/radeon/rv6xx_dpm.c

2144

r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true);

sys/dev/drm/radeon/rv6xx_dpm.c

492

(state->high.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

494

(state->high.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

496

(state->medium.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

498

(state->low.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

501

(state->high.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

503

(state->medium.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

505

(state->low.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? true : false;

sys/dev/drm/radeon/rv6xx_dpm.c

578

rv6xx_enable_engine_spread_spectrum(rdev, level, true);

sys/dev/drm/radeon/rv6xx_dpm.c

612

rv6xx_memory_clock_entry_enable_post_divider(rdev, entry, true);

sys/dev/drm/radeon/rv6xx_dpm.c

696

rv6xx_enable_memory_spread_spectrum(rdev, true);

sys/dev/drm/radeon/rv770.c

1644

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/rv770.c

1866

rdev->accel_working = true;

sys/dev/drm/radeon/rv770.c

1979

rdev->accel_working = true;

sys/dev/drm/radeon/rv770.c

936

rdev->gart.ready = true;

sys/dev/drm/radeon/rv770_dpm.c

1603

pi->mem_gddr5 = true;

sys/dev/drm/radeon/rv770_dpm.c

1618

pi->pcie_gen2 = true;

sys/dev/drm/radeon/rv770_dpm.c

1624

pi->boot_in_gen2 = true;

sys/dev/drm/radeon/rv770_dpm.c

176

dpm_en = true;

sys/dev/drm/radeon/rv770_dpm.c

1762

current_use_dc = true;

sys/dev/drm/radeon/rv770_dpm.c

1765

new_use_dc = true;

sys/dev/drm/radeon/rv770_dpm.c

178

cg_en = true;

sys/dev/drm/radeon/rv770_dpm.c

1791

current_use_dc = true;

sys/dev/drm/radeon/rv770_dpm.c

1794

new_use_dc = true;

sys/dev/drm/radeon/rv770_dpm.c

1829

want_thermal_protection = true;

sys/dev/drm/radeon/rv770_dpm.c

1834

want_thermal_protection = true;

sys/dev/drm/radeon/rv770_dpm.c

1840

want_thermal_protection = true;

sys/dev/drm/radeon/rv770_dpm.c

1911

rv770_enable_voltage_control(rdev, true);

sys/dev/drm/radeon/rv770_dpm.c

1931

rv770_enable_backbias(rdev, true);

sys/dev/drm/radeon/rv770_dpm.c

1933

rv770_enable_spread_spectrum(rdev, true);

sys/dev/drm/radeon/rv770_dpm.c

1936

rv770_enable_thermal_protection(rdev, true);

sys/dev/drm/radeon/rv770_dpm.c

1949

rv770_enable_dynamic_pcie_gen2(rdev, true);

sys/dev/drm/radeon/rv770_dpm.c

1971

rv770_gfx_clock_gating_enable(rdev, true);

sys/dev/drm/radeon/rv770_dpm.c

1974

rv770_mg_clock_gating_enable(rdev, true);

sys/dev/drm/radeon/rv770_dpm.c

1976

rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/radeon/rv770_dpm.c

1992

rdev->irq.dpm_thermal = true;

sys/dev/drm/radeon/rv770_dpm.c

212

return true;

sys/dev/drm/radeon/rv770_dpm.c

2234

pi->acpi_pcie_gen2 = true;

sys/dev/drm/radeon/rv770_dpm.c

2241

eg_pi->ulv.supported = true;

sys/dev/drm/radeon/rv770_dpm.c

2342

pi->dynamic_ss = true;

sys/dev/drm/radeon/rv770_dpm.c

2406

pi->gfx_clock_gating = true;

sys/dev/drm/radeon/rv770_dpm.c

2408

pi->mg_clock_gating = true;

sys/dev/drm/radeon/rv770_dpm.c

2409

pi->mgcgtssm = true;

sys/dev/drm/radeon/rv770_dpm.c

2411

pi->dynamic_pcie_gen2 = true;

sys/dev/drm/radeon/rv770_dpm.c

2414

pi->thermal_protection = true;

sys/dev/drm/radeon/rv770_dpm.c

2418

pi->display_gap = true;

sys/dev/drm/radeon/rv770_dpm.c

2421

pi->dcodt = true;

sys/dev/drm/radeon/rv770_dpm.c

2425

pi->ulps = true;

sys/dev/drm/radeon/rv770_dpm.c

2586

return true;

sys/dev/drm/radeon/rv770_dpm.c

795

rv740_enable_mclk_spread_spectrum(rdev, true);

sys/dev/drm/radeon/rv770_smc.c

419

return true;

sys/dev/drm/radeon/si.c

1692

new_smc = true;

sys/dev/drm/radeon/si.c

1713

new_smc = true;

sys/dev/drm/radeon/si.c

1732

new_smc = true;

sys/dev/drm/radeon/si.c

1750

new_smc = true;

sys/dev/drm/radeon/si.c

1753

banks2_fw = true;

sys/dev/drm/radeon/si.c

1767

si58_fw = true;

sys/dev/drm/radeon/si.c

1933

rdev->new_fw = true;

sys/dev/drm/radeon/si.c

2244

return true;

sys/dev/drm/radeon/si.c

2253

return true;

sys/dev/drm/radeon/si.c

2279

return true;

sys/dev/drm/radeon/si.c

2331

wm_high.interlaced = true;

sys/dev/drm/radeon/si.c

2344

radeon_dpm_get_mclk(rdev, true) * 10;

sys/dev/drm/radeon/si.c

2346

radeon_dpm_get_sclk(rdev, true) * 10;

sys/dev/drm/radeon/si.c

2358

wm_low.interlaced = true;

sys/dev/drm/radeon/si.c

3355

rdev->scratch.free[i] = true;

sys/dev/drm/radeon/si.c

3573

si_cp_enable(rdev, true);

sys/dev/drm/radeon/si.c

3733

rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = true;

sys/dev/drm/radeon/si.c

3734

rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = true;

sys/dev/drm/radeon/si.c

3735

rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = true;

sys/dev/drm/radeon/si.c

3752

si_enable_gui_idle_interrupt(rdev, true);

sys/dev/drm/radeon/si.c

4085

r600_set_bios_scratch_engine_hung(rdev, true);

sys/dev/drm/radeon/si.c

4198

rdev->mc.vram_is_ddr = true;

sys/dev/drm/radeon/si.c

4355

rdev->gart.ready = true;

sys/dev/drm/radeon/si.c

4401

return true;

sys/dev/drm/radeon/si.c

4405

return true;

sys/dev/drm/radeon/si.c

4436

return true;

sys/dev/drm/radeon/si.c

5180

bool hw_mode = true;

sys/dev/drm/radeon/si.c

5349

si_enable_gui_idle_interrupt(rdev, true);

sys/dev/drm/radeon/si.c

5610

si_enable_mgcg(rdev, true);

sys/dev/drm/radeon/si.c

5611

si_enable_cgcg(rdev, true);

sys/dev/drm/radeon/si.c

5616

si_enable_gui_idle_interrupt(rdev, true);

sys/dev/drm/radeon/si.c

5650

RADEON_CG_BLOCK_HDP), true);

sys/dev/drm/radeon/si.c

5652

si_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);

sys/dev/drm/radeon/si.c

5774

si_enable_dma_pg(rdev, true);

sys/dev/drm/radeon/si.c

5775

si_enable_gfx_cgpg(rdev, true);

sys/dev/drm/radeon/si.c

5818

si_enable_gui_idle_interrupt(rdev, true);

sys/dev/drm/radeon/si.c

5830

return true;

sys/dev/drm/radeon/si.c

5915

rdev->ih.enabled = true;

sys/dev/drm/radeon/si.c

6287

rdev->pm.vblank_sync = true;

sys/dev/drm/radeon/si.c

6327

queue_hotplug = true;

sys/dev/drm/radeon/si.c

6333

queue_dp = true;

sys/dev/drm/radeon/si.c

6401

queue_thermal = true;

sys/dev/drm/radeon/si.c

6405

rdev->pm.dpm.thermal.high_to_low = true;

sys/dev/drm/radeon/si.c

6406

queue_thermal = true;

sys/dev/drm/radeon/si.c

6774

rdev->accel_working = true;

sys/dev/drm/radeon/si.c

6914

rdev->accel_working = true;

sys/dev/drm/radeon/si.c

7384

clk_req_support = true;

sys/dev/drm/radeon/si_dpm.c

1027

true

sys/dev/drm/radeon/si_dpm.c

1063

true

sys/dev/drm/radeon/si_dpm.c

1081

true

sys/dev/drm/radeon/si_dpm.c

1099

true

sys/dev/drm/radeon/si_dpm.c

1554

true

sys/dev/drm/radeon/si_dpm.c

1585

true

sys/dev/drm/radeon/si_dpm.c

1621

true

sys/dev/drm/radeon/si_dpm.c

1639

true

sys/dev/drm/radeon/si_dpm.c

1736

true

sys/dev/drm/radeon/si_dpm.c

1882

si_pi->dte_data.enable_dte_by_default = true;

sys/dev/drm/radeon/si_dpm.c

1892

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

1896

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

1900

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

1903

if (si_pi->dte_data.enable_dte_by_default == true)

sys/dev/drm/radeon/si_dpm.c

1916

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

1925

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

1934

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

1960

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

2007

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

2018

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

2028

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

2036

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

2052

update_dte_from_pl2 = true;

sys/dev/drm/radeon/si_dpm.c

2064

ni_pi->enable_power_containment= true;

sys/dev/drm/radeon/si_dpm.c

2065

ni_pi->enable_cac = true;

sys/dev/drm/radeon/si_dpm.c

2067

si_pi->enable_dte = true;

sys/dev/drm/radeon/si_dpm.c

2072

ni_pi->enable_sq_ramping = true;

sys/dev/drm/radeon/si_dpm.c

2075

ni_pi->driver_calculate_cac_leakage = true;

sys/dev/drm/radeon/si_dpm.c

2076

ni_pi->cac_configuration_required = true;

sys/dev/drm/radeon/si_dpm.c

2079

ni_pi->support_cac_long_term_average = true;

sys/dev/drm/radeon/si_dpm.c

2282

return true;

sys/dev/drm/radeon/si_dpm.c

233

true

sys/dev/drm/radeon/si_dpm.c

2454

ni_pi->pc_enabled = true;

sys/dev/drm/radeon/si_dpm.c

270

true

sys/dev/drm/radeon/si_dpm.c

2822

ni_pi->cac_enabled = true;

sys/dev/drm/radeon/si_dpm.c

289

true

sys/dev/drm/radeon/si_dpm.c

3006

disable_sclk_switching = true;

sys/dev/drm/radeon/si_dpm.c

3021

disable_mclk_switching = true;

sys/dev/drm/radeon/si_dpm.c

3024

disable_mclk_switching = true;

sys/dev/drm/radeon/si_dpm.c

3025

disable_sclk_switching = true;

sys/dev/drm/radeon/si_dpm.c

307

true

sys/dev/drm/radeon/si_dpm.c

3178

ps->dc_compatible = true;

sys/dev/drm/radeon/si_dpm.c

3230

ret = true;

sys/dev/drm/radeon/si_dpm.c

325

true

sys/dev/drm/radeon/si_dpm.c

3293

want_thermal_protection = true;

sys/dev/drm/radeon/si_dpm.c

3297

want_thermal_protection = true;

sys/dev/drm/radeon/si_dpm.c

3302

want_thermal_protection = true;

sys/dev/drm/radeon/si_dpm.c

3372

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_tdr_is_about_to_happen, true);

sys/dev/drm/radeon/si_dpm.c

343

true

sys/dev/drm/radeon/si_dpm.c

3869

strobe_mode = true;

sys/dev/drm/radeon/si_dpm.c

3919

return true;

sys/dev/drm/radeon/si_dpm.c

4166

voltage_found = true;

sys/dev/drm/radeon/si_dpm.c

4181

voltage_found = true;

sys/dev/drm/radeon/si_dpm.c

5024

if (si_get_mclk_frequency_ratio(pl->mclk, true) >=

sys/dev/drm/radeon/si_dpm.c

5026

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/si_dpm.c

5028

dll_state_on = ((RREG32(MC_SEQ_MISC6) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/si_dpm.c

5036

dll_state_on = ((RREG32(MC_SEQ_MISC5) >> 1) & 0x1) ? true : false;

sys/dev/drm/radeon/si_dpm.c

5174

return true;

sys/dev/drm/radeon/si_dpm.c

5209

eg_pi->uvd_enabled = true;

sys/dev/drm/radeon/si_dpm.c

535

true

sys/dev/drm/radeon/si_dpm.c

5430

bool result = true;

sys/dev/drm/radeon/si_dpm.c

571

true

sys/dev/drm/radeon/si_dpm.c

5780

si_pi->pspp_notify_required = true;

sys/dev/drm/radeon/si_dpm.c

589

true

sys/dev/drm/radeon/si_dpm.c

5941

vce_v1_0_enable_mgcg(rdev, true);

sys/dev/drm/radeon/si_dpm.c

5977

rdev->irq.dpm_thermal = true;

sys/dev/drm/radeon/si_dpm.c

607

true

sys/dev/drm/radeon/si_dpm.c

6114

si_pi->fan_is_controlled_by_smc = true;

sys/dev/drm/radeon/si_dpm.c

6287

si_pi->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/radeon/si_dpm.c

6322

ret = si_thermal_enable_alert(rdev, true);

sys/dev/drm/radeon/si_dpm.c

6360

si_enable_voltage_control(rdev, true);

sys/dev/drm/radeon/si_dpm.c

6376

si_enable_spread_spectrum(rdev, true);

sys/dev/drm/radeon/si_dpm.c

6378

si_enable_thermal_protection(rdev, true);

sys/dev/drm/radeon/si_dpm.c

6456

si_enable_sclk_control(rdev, true);

sys/dev/drm/radeon/si_dpm.c

6459

si_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);

sys/dev/drm/radeon/si_dpm.c

6478

ret = si_thermal_enable_alert(rdev, true);

sys/dev/drm/radeon/si_dpm.c

6642

ret = si_enable_smc_cac(rdev, new_ps, true);

sys/dev/drm/radeon/si_dpm.c

6647

ret = si_enable_power_containment(rdev, new_ps, true);

sys/dev/drm/radeon/si_dpm.c

7035

pi->gfx_clock_gating = true;

sys/dev/drm/radeon/si_dpm.c

7037

eg_pi->sclk_deep_sleep = true;

sys/dev/drm/radeon/si_dpm.c

7041

pi->thermal_protection = true;

sys/dev/drm/radeon/si_dpm.c

7045

eg_pi->dynamic_ac_timing = true;

sys/dev/drm/radeon/si_dpm.c

7047

eg_pi->light_sleep = true;

sys/dev/drm/radeon/si_dpm.c

7073

si_pi->fan_ctrl_is_in_default_mode = true;

sys/dev/drm/radeon/si_smc.c

167

return true;

sys/dev/drm/radeon/sumo_dpm.c

1224

sumo_enable_voltage_scaling(rdev, true);

sys/dev/drm/radeon/sumo_dpm.c

1231

sumo_enable_sclk_ds(rdev, true);

sys/dev/drm/radeon/sumo_dpm.c

1253

rdev->irq.dpm_thermal = true;

sys/dev/drm/radeon/sumo_dpm.c

1328

sumo_enable_boost(rdev, new_ps, true);

sys/dev/drm/radeon/sumo_dpm.c

1366

sumo_take_smu_control(rdev, true);

sys/dev/drm/radeon/sumo_dpm.c

1712

pi->sys_info.enable_boost = true;

sys/dev/drm/radeon/sumo_dpm.c

1755

pi->disable_gfx_power_gating_in_uvd = true;

sys/dev/drm/radeon/sumo_dpm.c

1758

pi->enable_alt_vddnb = true;

sys/dev/drm/radeon/sumo_dpm.c

1759

pi->enable_sclk_ds = true;

sys/dev/drm/radeon/sumo_dpm.c

1761

pi->enable_dynamic_patch_ps = true;

sys/dev/drm/radeon/sumo_dpm.c

1768

pi->enable_gfx_power_gating = true;

sys/dev/drm/radeon/sumo_dpm.c

1769

pi->enable_gfx_clock_gating = true;

sys/dev/drm/radeon/sumo_dpm.c

1770

pi->enable_mg_clock_gating = true;

sys/dev/drm/radeon/sumo_dpm.c

1771

pi->enable_auto_thermal_throttling = true;

sys/dev/drm/radeon/sumo_dpm.c

1791

pi->enable_dpm = true;

sys/dev/drm/radeon/sumo_dpm.c

1915

sumo_power_level_enable(rdev, ps->num_levels - 1, true);

sys/dev/drm/radeon/sumo_dpm.c

1927

sumo_power_level_enable(rdev, 0, true);

sys/dev/drm/radeon/sumo_dpm.c

1938

sumo_power_level_enable(rdev, i, true);

sys/dev/drm/radeon/sumo_dpm.c

1941

sumo_enable_boost(rdev, rps, true);

sys/dev/drm/radeon/sumo_dpm.c

296

sumo_mg_clockgating_enable(rdev, true);

sys/dev/drm/radeon/sumo_dpm.c

298

sumo_gfx_clockgating_enable(rdev, true);

sys/dev/drm/radeon/sumo_dpm.c

300

sumo_gfx_powergating_enable(rdev, true);

sys/dev/drm/radeon/sumo_dpm.c

605

return true;

sys/dev/drm/radeon/sumo_dpm.c

632

sumo_set_forced_mode(rdev, true);

sys/dev/drm/radeon/sumo_dpm.c

663

sumo_power_level_enable(rdev, 0, true);

sys/dev/drm/radeon/sumo_dpm.c

724

sumo_boost_state_enable(rdev, true);

sys/dev/drm/radeon/sumo_dpm.c

766

sumo_power_level_enable(rdev, i, true);

sys/dev/drm/radeon/sumo_dpm.c

832

sumo_gfx_powergating_enable(rdev, true);

sys/dev/drm/radeon/sumo_smc.c

103

return_code = true;

sys/dev/drm/radeon/trinity_dpm.c

1005

vce_v1_0_enable_mgcg(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

1148

rdev->irq.dpm_thermal = true;

sys/dev/drm/radeon/trinity_dpm.c

1290

sumo_take_smu_control(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

1660

trinity_dce_enable_voltage_adjustment(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

1972

pi->enable_bapm = true;

sys/dev/drm/radeon/trinity_dpm.c

1978

pi->enable_bapm = true;

sys/dev/drm/radeon/trinity_dpm.c

1980

pi->enable_nbps_policy = true;

sys/dev/drm/radeon/trinity_dpm.c

1981

pi->enable_sclk_ds = true;

sys/dev/drm/radeon/trinity_dpm.c

1982

pi->enable_gfx_power_gating = true;

sys/dev/drm/radeon/trinity_dpm.c

1983

pi->enable_gfx_clock_gating = true;

sys/dev/drm/radeon/trinity_dpm.c

1987

pi->enable_auto_thermal_throttling = true;

sys/dev/drm/radeon/trinity_dpm.c

1989

pi->uvd_dpm = true; /* ??? */

sys/dev/drm/radeon/trinity_dpm.c

2010

pi->enable_dpm = true;

sys/dev/drm/radeon/trinity_dpm.c

561

trinity_ls_clockgating_enable(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

562

trinity_mg_clockgating_enable(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

565

trinity_gfx_clockgating_enable(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

567

trinity_gfx_dynamic_mgpg_enable(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

569

trinity_gfx_powergating_enable(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

754

return true;

sys/dev/drm/radeon/trinity_dpm.c

770

trinity_dpm_config(rdev, true);

sys/dev/drm/radeon/trinity_dpm.c

831

trinity_power_level_enable_disable(rdev, 0, true);

sys/dev/drm/radeon/trinity_dpm.c

855

trinity_power_level_enable_disable(rdev, i, true);

sys/dev/drm/radeon/trinity_dpm.c

868

trinity_power_level_enable_disable(rdev, 0, true);

sys/dev/drm/radeon/trinity_dpm.c

904

return true;

sys/dev/drm/radeon/trinity_dpm.c

921

return true;

sys/dev/drm/radeon/trinity_dpm.c

963

trinity_gfx_powergating_enable(rdev, true);

sys/dev/drm/radeon/uvd_v1_0.c

173

ring->ready = true;

sys/dev/drm/radeon/uvd_v2_2.c

88

return true;

sys/dev/drm/radeon/uvd_v3_1.c

56

return true;

sys/dev/drm/radeon/vce_v1_0.c

367

ring->ready = true;

sys/dev/drm/radeon/vce_v1_0.c

375

ring->ready = true;

sys/dev/drm/radeon/vce_v2_0.c

117

vce_v2_0_set_sw_cg(rdev, true);

sys/dev/drm/radeon/vce_v2_0.c

119

vce_v2_0_set_dyn_cg(rdev, true);

sys/dev/drm/scheduler/sched_entity.c

115

return true;

sys/dev/drm/scheduler/sched_entity.c

186

entity->stopped = true;

sys/dev/drm/scheduler/sched_entity.c

408

return true;

sys/dev/drm/scheduler/sched_entity.c

417

return true;

sys/dev/drm/scheduler/sched_entity.c

95

return true;

sys/dev/drm/scheduler/sched_main.c

178

return true;

sys/dev/drm/scheduler/sched_main.c

181

return true;

sys/dev/drm/scheduler/sched_main.c

361

found_guilty = true;

sys/dev/drm/scheduler/sched_main.c

516

return true;

sys/dev/drm/ttm/ttm_bo.c

1008

type_found = true;

sys/dev/drm/ttm/ttm_bo.c

1053

type_found = true;

sys/dev/drm/ttm/ttm_bo.c

1076

has_erestartsys = true;

sys/dev/drm/ttm/ttm_bo.c

1134

return true;

sys/dev/drm/ttm/ttm_bo.c

1145

return true;

sys/dev/drm/ttm/ttm_bo.c

1152

return true;

sys/dev/drm/ttm/ttm_bo.c

1185

ret = ttm_tt_create(bo, true);

sys/dev/drm/ttm/ttm_bo.c

1495

man->io_reserve_fastpath = true;

sys/dev/drm/ttm/ttm_bo.c

1511

man->has_type = true;

sys/dev/drm/ttm/ttm_bo.c

1512

man->use_type = true;

sys/dev/drm/ttm/ttm_bo.c

1603

if (ttm_bo_delayed_delete(bdev, true))

sys/dev/drm/ttm/ttm_bo.c

1680

return true;

sys/dev/drm/ttm/ttm_bo.c

1720

if (reservation_object_test_signaled_rcu(bo->resv, true))

sys/dev/drm/ttm/ttm_bo.c

1726

timeout = reservation_object_wait_timeout_rcu(bo->resv, true,

sys/dev/drm/ttm/ttm_bo.c

1747

ret = ttm_bo_reserve(bo, true, no_wait, NULL);

sys/dev/drm/ttm/ttm_bo.c

1750

ret = ttm_bo_wait(bo, true, no_wait);

sys/dev/drm/ttm/ttm_bo.c

1817

ret = ttm_bo_handle_move_mem(bo, &evict_mem, true, &ctx);

sys/dev/drm/ttm/ttm_bo.c

320

ret = ttm_mem_io_lock(old_man, true);

sys/dev/drm/ttm/ttm_bo.c

473

reservation_object_wait_timeout_rcu(bo->resv, true, false,

sys/dev/drm/ttm/ttm_bo.c

482

if (reservation_object_test_signaled_rcu(&bo->ttm_resv, true)) {

sys/dev/drm/ttm/ttm_bo.c

545

if (reservation_object_test_signaled_rcu(resv, true))

sys/dev/drm/ttm/ttm_bo.c

557

lret = reservation_object_wait_timeout_rcu(resv, true,

sys/dev/drm/ttm/ttm_bo.c

628

ttm_bo_cleanup_refs(bo, false, !remove_all, true);

sys/dev/drm/ttm/ttm_bo.c

631

ttm_bo_cleanup_refs(bo, false, !remove_all, true);

sys/dev/drm/ttm/ttm_bo.c

737

ret = ttm_bo_handle_move_mem(bo, &evict_mem, true, ctx);

sys/dev/drm/ttm/ttm_bo.c

744

bo->evicted = true;

sys/dev/drm/ttm/ttm_bo.c

759

return true;

sys/dev/drm/ttm/ttm_bo.c

783

ret = true;

sys/dev/drm/ttm/ttm_bo.c

962

return true;

sys/dev/drm/ttm/ttm_bo_util.c

185

mem->bus.io_reserved_vm = true;

sys/dev/drm/ttm/ttm_bo_vm.c

137

err = ttm_bo_reserve(bo, true, true, NULL);

sys/dev/drm/ttm/ttm_bo_vm.c

200

err = ttm_mem_io_lock(man, true);

sys/dev/drm/ttm/ttm_bo_vm.c

373

ret = ttm_bo_reserve(bo, true, false, NULL);

sys/dev/drm/ttm/ttm_bo_vm.c

552

ret = ttm_bo_reserve(bo, true, true, NULL);

sys/dev/drm/ttm/ttm_bo_vm.c

622

ret = ttm_mem_io_lock(man, true);

sys/dev/drm/ttm/ttm_bo_vm.c

76

(void) dma_fence_wait(bo->moving, true);

sys/dev/drm/ttm/ttm_bo_vm.c

86

ret = dma_fence_wait(bo->moving, true);

sys/dev/drm/ttm/ttm_memory.c

201

return true;

sys/dev/drm/ttm/ttm_memory.c

240

ttm_shrink(glob, true, 0ULL, &ctx);

sys/dev/drm/ttm/ttm_memory.c

394

needs_swapping = true;

sys/dev/drm/ttm/ttm_memory.c

455

return true;

sys/dev/drm/ttm/ttm_memory.c

511

memory, true)

sys/dev/drm/ttm/ttm_page_alloc.c

416

shrink_pages = ttm_page_pool_free(pool, nr_free_pool, true);

sys/dev/drm/ttm/ttm_page_alloc.c

599

pool->fill_lock = true;

sys/dev/drm/ttm/ttm_page_alloc.c

862

ttm_page_pool_free(&_manager->pools[i], FREE_ALL_PAGES, true);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

1118

shrink_pages = ttm_dma_page_pool_free(p->pool, nr_free, true);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

520

ttm_dma_page_pool_free(pool, FREE_ALL_PAGES, true);

sys/dev/drm/ttm/ttm_page_alloc_dma.c

911

gfp_t gfp_flags = ttm_dma_pool_gfp_flags(ttm_dma, true);

sys/dev/misc/evdev/cdev.c

207

client->ec_blocked = true;

sys/dev/misc/evdev/cdev.c

379

client->ec_async = true;

sys/dev/misc/evdev/cdev.c

669

client->ec_revoked = true;

sys/dev/misc/evdev/evdev.c

824

evdev->ev_report_opened = true;

sys/dev/misc/evdev/evdev.c

849

evdev->ev_report_opened = true;

sys/dev/misc/evdev/evdev_mt.c

423

return (true);

sys/dev/misc/evdev/evdev_mt.c

433

return (true);

sys/dev/misc/evdev/evdev_mt.c

438

return (true);

sys/dev/misc/evdev/evdev_mt.c

445

return (true);

sys/dev/misc/psm/psm.c

1800

is_pointing_stick = true;

sys/dev/misc/psm/psm.c

1807

is_pointing_stick = true;

sys/dev/netif/ath/ath/if_ath.c

531

ah->config.no_pll_pwrsave = true;

sys/dev/netif/ath/ath_hal/ah_osdep.h

46

#ifndef true

sys/dev/netif/ig_hal/e1000_phy.c

3635

return __e1000_read_phy_reg_hv(hw, offset, data, TRUE, true);

sys/dev/netif/ig_hal/e1000_phy.c

3761

return __e1000_write_phy_reg_hv(hw, offset, data, TRUE, true);

sys/dev/netif/iwm/if_iwm.c

3313

return true;

sys/dev/netif/iwm/if_iwm.c

3421

return true;

sys/dev/netif/iwm/if_iwm.c

3469

return true;

sys/dev/netif/iwn/if_iwn_chip_cfg.h

122

.bt_sco_disable = true, /* bt_sco_disable */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

132

.no_multi_vaps = true, /* no_multi_vaps */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

144

.shadow_ram_support = true, /* shadow_ram_support */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

147

.bt_sco_disable = true, /* bt_sco_disable XXX unknown? */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

158

.no_multi_vaps = true, /* no_multi_vaps - XXX should work on fixing! */

sys/dev/netif/iwn/if_iwn_chip_cfg.h

168

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

171

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

174

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

181

.support_hostap = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

191

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

193

.bt_session_2 = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

194

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

197

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

204

.support_hostap = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

228

.no_multi_vaps = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

237

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

238

.shadow_reg_enable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

243

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

250

.no_multi_vaps = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

258

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

259

.shadow_reg_enable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

261

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

264

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

271

.no_multi_vaps = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

279

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

280

.shadow_reg_enable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

282

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

285

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

293

.no_multi_vaps = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

302

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

303

.shadow_reg_enable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

305

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

306

.additional_nic_config = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

308

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

314

.no_multi_vaps = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

322

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

323

.shadow_reg_enable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

325

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

326

.additional_nic_config = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

328

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

334

.no_multi_vaps = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

344

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

345

.shadow_reg_enable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

347

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

350

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

358

.no_multi_vaps = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

370

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

371

.shadow_reg_enable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

373

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

374

.additional_nic_config = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

376

.enhanced_TX_power = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

384

.no_multi_vaps = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

394

.shadow_ram_support = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

397

.bt_sco_disable = true,

sys/dev/netif/iwn/if_iwn_chip_cfg.h

407

.no_multi_vaps = true,

sys/dev/netif/ix/if_ix.c

5129

hw->phy.reset_disable = true;

sys/dev/netif/ix/if_ix.c

564

hw->mac.ops.setup_eee(hw, true);

sys/dev/netif/re/if_re.c

580

return true;

sys/dev/powermng/amdsmn/amdsmn.c

208

return (true);

sys/dev/powermng/amdtemp/amdtemp.c

160

{ VENDORID_AMD, DEVICEID_AMD_MISC0F, true },

sys/dev/powermng/amdtemp/amdtemp.c

161

{ VENDORID_AMD, DEVICEID_AMD_MISC10, true },

sys/dev/powermng/amdtemp/amdtemp.c

162

{ VENDORID_AMD, DEVICEID_AMD_MISC11, true },

sys/dev/powermng/amdtemp/amdtemp.c

163

{ VENDORID_AMD, DEVICEID_AMD_MISC14, true },

sys/dev/powermng/amdtemp/amdtemp.c

164

{ VENDORID_AMD, DEVICEID_AMD_MISC15, true },

sys/dev/powermng/amdtemp/amdtemp.c

165

{ VENDORID_AMD, DEVICEID_AMD_MISC15_M10H, true },

sys/dev/powermng/amdtemp/amdtemp.c

166

{ VENDORID_AMD, DEVICEID_AMD_MISC15_M30H, true },

sys/dev/powermng/amdtemp/amdtemp.c

168

{ VENDORID_AMD, DEVICEID_AMD_MISC16, true },

sys/dev/powermng/amdtemp/amdtemp.c

169

{ VENDORID_AMD, DEVICEID_AMD_MISC16_M30H, true },

sys/dev/powermng/amdtemp/amdtemp.c

302

return (true);

sys/dev/powermng/amdtemp/amdtemp.c

505

needsmn = true;

sys/dev/powermng/amdtemp/amdtemp.c

528

needsmn = true;

sys/dev/powermng/amdtemp/amdtemp.c

968

return (amdtemp_decode_fam10h_to_17h(sc->sc_offset, val, true));

sys/dev/raid/mpr/mpr_mapping.c

2375

return (true);

sys/dev/raid/tws/tws.c

459

sc->is64bit = (sizeof(bus_addr_t) == 8) ? true : false;

sys/dev/raid/tws/tws_cam.c

542

sc->obfl_q_overrun = true;

sys/dev/raid/tws/tws_hdm.c

138

sc->obfl_q_overrun = true;

sys/dev/raid/tws/tws_hdm.c

141

sc->sense_bufs[i].posted = true;

sys/dev/raid/tws/tws_hdm.c

375

return(true);

sys/dev/raid/tws/tws_hdm.c

380

return(true);

sys/dev/raid/tws/tws_hdm.c

414

return(true);

sys/dev/raid/tws/tws_hdm.c

480

return(true);

sys/dev/video/vga/vga_switcheroo.c

1152

delay = true;

sys/dev/video/vga/vga_switcheroo.c

1157

delay = true;

sys/dev/video/vga/vga_switcheroo.c

1167

just_mux = true;

sys/dev/video/vga/vga_switcheroo.c

1172

just_mux = true;

sys/dev/video/vga/vga_switcheroo.c

1211

vgasr_priv->delayed_switch_active = true;

sys/dev/video/vga/vga_switcheroo.c

224

vgasr_priv->active = true;

sys/dev/video/vga/vga_switcheroo.c

448

return true;

sys/dev/video/vga/vga_switcheroo.c

770

new_client->active = true;

sys/dev/video/vga/vga_switcheroo.c

785

return true;

sys/dev/video/vga/vga_switcheroo.c

843

delay = true;

sys/dev/video/vga/vga_switcheroo.c

848

delay = true;

sys/dev/video/vga/vga_switcheroo.c

858

just_mux = true;

sys/dev/video/vga/vga_switcheroo.c

862

just_mux = true;

sys/dev/video/vga/vga_switcheroo.c

901

vgasr_priv.delayed_switch_active = true;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1635

mmio_read->readless_supported = true;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

1758

admin_queue->running_state = true;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

230

queue->comp_ctx[command_id].occupied = true;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

267

comp_ctx = get_comp_ctxt(admin_queue, cmd_id, true);

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

610

llq_info->inline_header = true;

sys/dev/virtual/amazon/ena/ena-com/ena_com.c

899

return true;

sys/dev/virtual/amazon/ena/ena-com/ena_com.h

991

ena_dev->adaptive_coalescing = true;

sys/dev/virtual/amazon/ena/ena-com/ena_eth_com.c

282

return true;

sys/dev/virtual/amazon/ena/ena.c

1108

bool print_once = true;

sys/dev/virtual/amazon/ena/ena.c

1812

true);

sys/dev/virtual/amazon/ena/ena.c

1844

adapter->msix_enabled = true;

sys/dev/virtual/amazon/ena/ena.c

1955

irq->requested = true;

sys/dev/virtual/amazon/ena/ena.c

2022

irq->requested = true;

sys/dev/virtual/amazon/ena/ena.c

2167

ena_com_update_intr_reg(&intr_reg, 0, 0, true);

sys/dev/virtual/amazon/ena/ena.c

2290

adapter->up = true;

sys/dev/virtual/amazon/ena/ena.c

2658

offload = true;

sys/dev/virtual/amazon/ena/ena.c

2661

offload = true;

sys/dev/virtual/amazon/ena/ena.c

2664

offload = true;

sys/dev/virtual/amazon/ena/ena.c

2870

tx_info->print_once = true;

sys/dev/virtual/amazon/ena/ena.c

3120

adapter->rss_support = true;

sys/dev/virtual/amazon/ena/ena.c

3220

rc = ena_com_admin_init(ena_dev, &aenq_handlers, true);

sys/dev/virtual/amazon/ena/ena.c

3232

ena_com_set_admin_polling_mode(ena_dev, true);

sys/dev/virtual/amazon/ena/ena.c

3343

adapter->trigger_reset = true;

sys/dev/virtual/amazon/ena/ena.c

3358

adapter->trigger_reset = true;

sys/dev/virtual/amazon/ena/ena.c

3391

tx_buf->print_once = true;

sys/dev/virtual/amazon/ena/ena.c

3406

adapter->trigger_reset = true;

sys/dev/virtual/amazon/ena/ena.c

3779

adapter->running = true;

sys/dev/virtual/amazon/ena/ena.c

714

rx_ring->adapter->trigger_reset = true;

sys/dev/virtual/nvmm/nvmm.c

144

vcpu->present = true;

sys/dev/virtual/nvmm/nvmm.c

158

(vaddr_t)vcpu->comm + NVMM_COMM_PAGE_SIZE, true);

sys/dev/virtual/nvmm/nvmm.c

299

error = nvmm_machine_get(owner, args->machid, &mach, true);

sys/dev/virtual/nvmm/nvmm.c

350

error = nvmm_machine_get(owner, args->machid, &mach, true);

sys/dev/virtual/nvmm/nvmm.c

387

args->cpuid * NVMM_COMM_PAGE_SIZE, true /* wired */,

sys/dev/virtual/nvmm/nvmm.c

388

false /* !fixed */, true /* shared */, PROT_READ | PROT_WRITE,

sys/dev/virtual/nvmm/nvmm.c

402

false /* !fixed */, true /* shared */, PROT_READ | PROT_WRITE,

sys/dev/virtual/nvmm/nvmm.c

70

mach->present = true;

sys/dev/virtual/nvmm/nvmm.c

704

hmapping->present = true;

sys/dev/virtual/nvmm/nvmm.c

746

error = nvmm_machine_get(owner, args->machid, &mach, true);

sys/dev/virtual/nvmm/nvmm.c

767

hmapping->vmobj, 0, false /* !wired */, true /* fixed */,

sys/dev/virtual/nvmm/nvmm.c

768

true /* shared */, PROT_READ | PROT_WRITE, PROT_READ | PROT_WRITE);

sys/dev/virtual/nvmm/nvmm.c

781

error = nvmm_machine_get(owner, args->machid, &mach, true);

sys/dev/virtual/nvmm/nvmm.c

850

false /* !wired */, true /* fixed */, false /* !shared */,

sys/dev/virtual/nvmm/nvmm.c

918

error = nvmm_machine_get(owner, ctl.machid, &mach, true);

sys/dev/virtual/nvmm/nvmm_os.h

222

#define os_cpuset_init(s) kcpuset_create(s, true)

sys/dev/virtual/nvmm/nvmm_os.h

301

return true;

sys/dev/virtual/nvmm/nvmm_os.h

304

return true;

sys/dev/virtual/nvmm/nvmm_os.h

309

return true;

sys/dev/virtual/nvmm/nvmm_os.h

312

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86.c

473

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_internal.h

189

#define x86_save_fpu(a, m) fpu_area_save(a, m, true)

sys/dev/virtual/nvmm/x86/nvmm_x86_internal.h

190

#define x86_restore_fpu(a, m) fpu_area_restore(a, m, true)

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1185

cpudata->gtlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1298

cpudata->gtlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1306

cpudata->gtsc_want_update = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1320

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1324

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1547

cpudata->gtlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1578

cpudata->htlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1601

cpudata->evt_pending = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1633

cpudata->gtsc_want_update = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1728

svm_event_waitexit_disable(vcpu, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1894

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1897

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1901

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1908

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

1928

cpudata->gtlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2026

cpudata->gtsc_want_update = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2044

svm_event_waitexit_enable(vcpu, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2046

svm_event_waitexit_disable(vcpu, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2219

cpudata->shared_asid = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2340

svm_vcpu_msr_allow(cpudata->msrbm, MSR_STAR, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2341

svm_vcpu_msr_allow(cpudata->msrbm, MSR_LSTAR, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2342

svm_vcpu_msr_allow(cpudata->msrbm, MSR_CSTAR, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2343

svm_vcpu_msr_allow(cpudata->msrbm, MSR_SFMASK, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2344

svm_vcpu_msr_allow(cpudata->msrbm, MSR_KERNELGSBASE, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2345

svm_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_CS, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2346

svm_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_ESP, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2347

svm_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_EIP, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2348

svm_vcpu_msr_allow(cpudata->msrbm, MSR_FSBASE, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2349

svm_vcpu_msr_allow(cpudata->msrbm, MSR_GSBASE, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2350

svm_vcpu_msr_allow(cpudata->msrbm, MSR_CR_PAT, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2351

svm_vcpu_msr_allow(cpudata->msrbm, MSR_TSC, true, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2493

cpudata->cpuidpresent[i] = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2630

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

2727

os_ipi_broadcast(svm_change_cpu, (void *)true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

675

cpudata->nmi_window_exit = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

680

cpudata->int_window_exit = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

715

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

770

svm_event_waitexit_enable(vcpu, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_svm.c

785

cpudata->evt_pending = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1064

cpudata->nmi_window_exit = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1067

cpudata->int_window_exit = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1102

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1159

vmx_event_waitexit_enable(vcpu, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1175

cpudata->evt_pending = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1696

cpudata->gtlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1736

cpudata->gtlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1754

write = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1931

cpudata->gtsc_want_update = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1957

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

1961

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2186

cpudata->gtlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2262

cpudata->evt_pending = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2302

cpudata->gtsc_want_update = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2388

launched = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2455

vmx_event_waitexit_disable(vcpu, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2589

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2593

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2597

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2605

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2628

cpudata->gtlb_want_flush = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2724

cpudata->gtsc_want_update = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2752

vmx_event_waitexit_enable(vcpu, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2754

vmx_event_waitexit_disable(vcpu, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2971

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_EFER, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2972

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_STAR, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2973

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_LSTAR, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2974

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_CSTAR, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2975

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_SFMASK, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2976

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_KERNELGSBASE, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2977

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_CS, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2978

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_ESP, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2979

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_EIP, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2980

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_FSBASE, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2981

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_GSBASE, true, true);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

2982

vmx_vcpu_msr_allow(cpudata->msrbm, MSR_TSC, true, false);

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3181

cpudata->cpuidpresent[i] = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3464

vmx_ept_has_ad = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3481

vmx_cpu_has_arch_cap = true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3485

return true;

sys/dev/virtual/nvmm/x86/nvmm_x86_vmx.c

3634

os_ipi_broadcast(vmx_change_cpu, (void *)true);

sys/dev/virtual/virtio/balloon/virtio_balloon.c

591

sc->vtballoon_update_stats = true;

sys/kern/kern_fork.c

1339

any_signaled = true;

sys/kern/kern_fork.c

1365

while (true) {

sys/kern/kern_fork.c

1371

any_signaled = true;

sys/kern/kern_fork.c

1386

any_signaled = true;

sys/kern/kern_fork.c

1438

visited = true;

sys/kern/kern_kthread.c

117

ret = _kthread_create(func, arg, tdp, cpu, true, fmt, ap);

sys/kern/kern_kthread.c

99

ret = _kthread_create(func, arg, tdp, -1, true, fmt, ap);

sys/kern/kern_sig.c

1754

timevalid = true;

sys/kern/subr_gtaskqueue.c

345

in_net_epoch = true;

sys/kern/sys_mqueue.c

397

destroy = true;

sys/kern/vfs_syscalls.c

4185

return (kern_fsync(uap->fd, true));

sys/libprop/prop_array.c

194

rv = true;

sys/libprop/prop_array.c

312

return (true);

sys/libprop/prop_array.c

506

rv = true;

sys/libprop/prop_array.c

619

return (true);

sys/libprop/prop_array.c

659

rv = true;

sys/libprop/prop_array.c

781

return (true);

sys/libprop/prop_array.c

788

return (true);

sys/libprop/prop_array.c

825

return (true);

sys/libprop/prop_array.c

845

return (true);

sys/libprop/prop_array.c

855

return (true);

sys/libprop/prop_array_util.c

102

return (true); \

sys/libprop/prop_array_util.c

127

return (true); \

sys/libprop/prop_array_util.c

217

return (*cpp == NULL ? false : true); \

sys/libprop/prop_array_util.c

57

return (true);

sys/libprop/prop_bool.c

117

_prop_bool_true.pb_value = true;

sys/libprop/prop_bool.c

212

return (true);

sys/libprop/prop_bool.c

215

val = true;

sys/libprop/prop_bool.c

221

return (true);

sys/libprop/prop_data.c

175

return (true);

sys/libprop/prop_data.c

529

return (true);

sys/libprop/prop_data.c

556

return (true);

sys/libprop/prop_data.c

567

return (true);

sys/libprop/prop_data.c

575

return (true);

sys/libprop/prop_data.c

578

return (true);

sys/libprop/prop_data.c

582

return (true);

sys/libprop/prop_data.c

590

return (true);

sys/libprop/prop_data.c

595

return (true);

sys/libprop/prop_data.c

599

return (true);

sys/libprop/prop_data.c

605

return (true);

sys/libprop/prop_data.c

611

return (true);

sys/libprop/prop_data.c

627

return (true);

sys/libprop/prop_dictionary.c

1021

rv = true;

sys/libprop/prop_dictionary.c

1044

rv = true;

sys/libprop/prop_dictionary.c

1058

rv = true;

sys/libprop/prop_dictionary.c

1257

return (true);

sys/libprop/prop_dictionary.c

1261

return (true);

sys/libprop/prop_dictionary.c

1265

return (true);

sys/libprop/prop_dictionary.c

1271

return (true);

sys/libprop/prop_dictionary.c

1298

return (true);

sys/libprop/prop_dictionary.c

1325

return (true);

sys/libprop/prop_dictionary.c

1363

return (true);

sys/libprop/prop_dictionary.c

260

return (true);

sys/libprop/prop_dictionary.c

456

po = _prop_dictionary_get_keysym(pd, pdk, true);

sys/libprop/prop_dictionary.c

478

rv = true;

sys/libprop/prop_dictionary.c

600

return (true);

sys/libprop/prop_dictionary.c

797

rv = true;

sys/libprop/prop_dictionary.c

848

bool rv = true;

sys/libprop/prop_dictionary.c

941

po = _prop_dictionary_get(pd, key, true);

sys/libprop/prop_dictionary.c

998

rv = true;

sys/libprop/prop_dictionary_util.c

114

return (true); \

sys/libprop/prop_dictionary_util.c

139

return (true); \

sys/libprop/prop_dictionary_util.c

197

return (*cpp == NULL ? false : true); \

sys/libprop/prop_dictionary_util.c

52

return true;

sys/libprop/prop_dictionary_util.c

69

return (true);

sys/libprop/prop_ingest.c

158

return (true);

sys/libprop/prop_number.c

213

return (true);

sys/libprop/prop_number.c

351

pnv.pnv_is_unsigned = true;

sys/libprop/prop_number.c

523

pnv->pnv_is_unsigned = true;

sys/libprop/prop_number.c

526

return (true);

sys/libprop/prop_number.c

549

return (true);

sys/libprop/prop_number.c

568

return (true);

sys/libprop/prop_number.c

579

return (true);

sys/libprop/prop_number.c

582

return (true);

sys/libprop/prop_number.c

586

return (true);

sys/libprop/prop_number.c

591

return (true);

sys/libprop/prop_number.c

594

return (true);

sys/libprop/prop_object.c

1167

return true;

sys/libprop/prop_object.c

1177

*error_flag = true;

sys/libprop/prop_object.c

124

return (true);

sys/libprop/prop_object.c

143

return (true);

sys/libprop/prop_object.c

168

return (true);

sys/libprop/prop_object.c

187

return (true);

sys/libprop/prop_object.c

225

return (true);

sys/libprop/prop_object.c

255

return (true);

sys/libprop/prop_object.c

276

return (true);

sys/libprop/prop_object.c

292

return (true);

sys/libprop/prop_object.c

346

return (true);

sys/libprop/prop_object.c

440

ctx->poic_is_empty_element = true;

sys/libprop/prop_object.c

454

return (true);

sys/libprop/prop_object.c

495

return (true);

sys/libprop/prop_object.c

571

return (true);

sys/libprop/prop_object.c

887

return (true);

sys/libprop/prop_object.c

940

need_guard = true;

sys/libprop/prop_object_impl.h

237

x = true; \

sys/libprop/prop_rb.c

1200

return true;

sys/libprop/prop_rb.c

1240

rb_tree_check_node(rbt, self, NULL, true);

sys/libprop/prop_rb.c

238

KASSERT(rb_tree_check_node(rbt, self, NULL, true));

sys/libprop/prop_rb.c

469

KASSERT(was_root || rb_tree_check_node(rbt, father, NULL, true));

sys/libprop/prop_rb.c

521

KASSERT(rb_tree_check_node(rbt, standin_son, NULL, true));

sys/libprop/prop_rb.c

57

#define rb_tree_check_node(a, b, c, d) true

sys/libprop/prop_rb.c

618

KASSERT(rb_tree_check_node(rbt, standin, NULL, true));

sys/libprop/prop_rb.c

669

KASSERT(was_root || rb_tree_check_node(rbt, father, NULL, true));

sys/libprop/prop_rb.c

670

KASSERT(rb_tree_check_node(rbt, son, NULL, true));

sys/libprop/prop_rb.c

827

KASSERT(rb_tree_check_node(rbt, brother, NULL, true));

sys/libprop/prop_rb.c

886

KASSERT(rb_tree_check_node(rbt, parent, NULL, true));

sys/libprop/prop_stack.c

102

return true;

sys/libprop/prop_stack.c

117

return true;

sys/libprop/prop_stack.c

62

return true;

sys/libprop/prop_stack.c

76

return true;

sys/libprop/prop_string.c

107

return (true);

sys/libprop/prop_string.c

354

return (true);

sys/libprop/prop_string.c

387

return (true);

sys/libprop/prop_string.c

434

return (true);

sys/libprop/prop_string.c

439

return (true);

sys/libprop/prop_string.c

444

return (true);

sys/libprop/prop_string.c

448

return (true);

sys/libprop/prop_string.c

454

return (true);

sys/libprop/prop_string.c

461

return (true);

sys/libprop/prop_string.c

467

return (true);

sys/libprop/prop_string.c

474

return (true);

sys/net/if_clone.c

289

return (true);

sys/net/radix.c

1138

stopping = true;

sys/net/radix.c

1158

stopping = true;

sys/net/radix.c

214

equal = true;

sys/net/radix.c

229

return (true);

sys/net/radix.c

252

x = rn_addmask(mask, true, head->rnh_treetop->rn_offset,

sys/net/radix.c

298

return (true);

sys/net/radix.c

484

*dupentry = true;

sys/net/radix.c

610

isnormal = true;

sys/net/radix.c

650

return (true);

sys/net/radix.c

656

return (true);

sys/net/radix.c

87

static bool rn_debug = true;

sys/net/radix.c

896

if ((x = rn_addmask(mask, true, head_off,

sys/net/route.c

1782

n = rn_addmask(mask, search, true, rn_cpumaskhead(mycpuid));

sys/net/wg/if_wg.c

1217

atomic_store_bool(&peer->p_enabled, true);

sys/net/wg/if_wg.c

1288

true);

sys/net/wg/if_wg.c

1409

wg_timers_run_send_initiation(peer, true);

sys/net/wg/if_wg.c

2026

if (noise_keypair_should_refresh(peer->p_remote, true))

sys/net/wg/if_wg.c

2545

new_peer = true;

sys/net/wg/if_wg.c

2951

bool ret = true;

sys/net/wg/if_wg.c

2964

return (true);

sys/net/wg/if_wg.c

424

ok = true;

sys/net/wg/if_wg.c

533

return (true);

sys/net/wg/selftest/allowedips.c

41

return (true);

sys/net/wg/selftest/allowedips.c

452

ret = true;

sys/net/wg/selftest/allowedips.c

476

return (true);

sys/net/wg/selftest/allowedips.c

650

success = true;

sys/net/wg/selftest/allowedips.c

745

found_a = true;

sys/net/wg/selftest/allowedips.c

748

found_b = true;

sys/net/wg/selftest/allowedips.c

751

found_c = true;

sys/net/wg/selftest/allowedips.c

754

found_d = true;

sys/net/wg/selftest/allowedips.c

757

found_e = true;

sys/net/wg/selftest/allowedips.c

759

found_other = true;

sys/net/wg/selftest/allowedips.c

786

bool ret = true;

sys/net/wg/selftest/cookie.c

122

ret = true;

sys/net/wg/selftest/cookie.c

157

ret = true;

sys/net/wg/selftest/cookie.c

206

ret = true;

sys/net/wg/selftest/cookie.c

328

ret = true;

sys/net/wg/selftest/cookie.c

339

bool ret = true;

sys/net/wg/selftest/counter.c

44

bool success = true;

sys/net/wg/wg_cookie.c

146

return (true);

sys/net/wg/wg_cookie.c

338

cm->cm_cookie_valid = true;

sys/net/wg/wg_cookie.c

354

cm->cm_mac1_sent = true;

sys/net/wg/wg_cookie.c

458

rl->rl_initialized = true;

sys/net/wg/wg_cookie.c

470

ratelimit_gc(rl, true);

sys/net/wg/wg_noise.c

1079

ok = true;

sys/net/wg/wg_noise.c

1212

ok = true;

sys/net/wg/wg_noise.c

1309

kp->kp_can_send = true;

sys/net/wg/wg_noise.c

1366

kp->kp_index.i_is_keypair = true;

sys/net/wg/wg_noise.c

1384

return (true);

sys/net/wg/wg_noise.c

1490

return (true);

sys/net/wg/wg_noise.c

1505

return (true);

sys/net/wg/wg_noise.c

1577

return (true);

sys/net/wg/wg_noise.c

250

return (true);

sys/net/wg/wg_noise.c

464

r->r_entry_inserted = true;

sys/net/wg/wg_noise.c

569

return noise_remote_index_lookup(l, idx, true);

sys/net/wg/wg_noise.c

582

return (true);

sys/net/wg/wg_noise.c

652

has_psk = true;

sys/net/wg/wg_noise.c

808

return (true);

sys/net/wg/wg_noise.c

879

return (true);

sys/netinet/if_ether.c

779

do_rtmsg = true;

sys/netinet/if_ether.c

784

do_rtmsg = true;

sys/netinet/if_ether.c

812

do_rtmsg = true;

sys/netinet/if_ether.c

838

do_rtmsg = true;

sys/platform/pc64/x86_64/efirt.c

302

return true;

sys/platform/vkernel64/platform/init.c

432

usage_help(true);

sys/vfs/autofs/autofs.c

164

return (true);

sys/vfs/autofs/autofs.c

206

ar->ar_wildcards = true;

sys/vfs/autofs/autofs.c

207

ar->ar_done = true;

sys/vfs/autofs/autofs.c

482

ar->ar_in_progress = true;

sys/vfs/autofs/autofs.c

518

ar->ar_done = true;

sys/vfs/autofs/autofs.c

544

autofs_softc->sc_dev_opened = true;

sys/vfs/autofs/autofs.h

168

anp->an_cached = true;

sys/vfs/autofs/autofs_vfsops.c

224

ar->ar_done = true;

sys/vfs/autofs/autofs_vfsops.c

226

found = true;

sys/vfs/autofs/autofs_vnops.c

155

if (test_fs_root(vp) == true)

sys/vfs/autofs/autofs_vnops.c

164

if (nlookup_fs_root(anp, &nvp) == true)

sys/vfs/autofs/autofs_vnops.c

59

return (true);

sys/vfs/autofs/autofs_vnops.c

76

if (test_fs_root(vp) == true)

sys/vfs/autofs/autofs_vnops.c

85

return (error ? false : true);

sys/vfs/devfs/devfs_core.c

1951

callback(alias->name, alias->dev_target, true, arg);

sys/vfs/fuse/fuse_util.c

151

res = true;

sys/vfs/fuse/fuse_util.c

154

res = true;

sys/vfs/fuse/fuse_util.c

97

res = true;

sys/vfs/fuse/fuse_vnops.c

2162

fnp->closed = true;

test/crypto/cryptoapi/cryptoapi_test.c

367

benchmark = true;

test/illumos/oclo/oclo.c

1194

bool ret = true;

test/illumos/oclo/oclo.c

1197

if (!oclo_flags_match(&oclo_rtdata[i], true)) {

test/illumos/oclo/oclo.c

147

return (true);

test/illumos/oclo/oclo.c

180

return (true);

test/illumos/oclo/oclo.c

410

oclo_dup_common(c, 0, true);

test/illumos/oclo/oclo.c

416

oclo_dup_common(c, FD_CLOEXEC, true);

test/illumos/oclo/oclo.c

422

oclo_dup_common(c, FD_CLOFORK, true);

test/illumos/oclo/oclo.c

428

oclo_dup_common(c, FD_CLOEXEC | FD_CLOFORK, true);

test/illumos/oclo/oclo.c

547

oclo_accept_common(c, 0, true);

test/illumos/oclo/oclo.c

553

oclo_accept_common(c, FD_CLOFORK, true);

test/illumos/oclo/oclo.c

559

oclo_accept_common(c, FD_CLOEXEC, true);

test/illumos/oclo/oclo.c

565

oclo_accept_common(c, FD_CLOEXEC | FD_CLOFORK, true);

test/illumos/oclo/oclo_errors.c

58

return (true);

test/illumos/oclo/ocloexec_verify.c

101

return (true);

test/illumos/oclo/ocloexec_verify.c

65

return (true);

test/nvmm/demo/smallkern/main.c

267

print_state(true, "TSS created");

test/nvmm/demo/smallkern/main.c

269

print_state(true, "IDT created");

test/nvmm/demo/smallkern/main.c

282

print_state(true, "APICBASE is correct");

test/nvmm/demo/smallkern/main.c

289

print_state(true, "PG_NX is disabled");

test/nvmm/demo/smallkern/main.c

297

print_state(true, "Running on cpu120");

test/nvmm/demo/smallkern/main.c

309

print_state(true, "LAPIC information matches");

test/nvmm/demo/toyvirt/main.c

108

has_nmi_pending = true;

test/nvmm/demo/toyvirt/main.c

96

has_int_pending = true;

test/nvmm/demo/toyvirt/toydev.c

73

static bool new_line = true;

test/testcases/libnvmm/h_io_assist.c

348

{ "test1 - INB", &test1_begin, &test1_end, "12", true },

test/testcases/libnvmm/h_io_assist.c

349

{ "test2 - INW", &test2_begin, &test2_end, "1234", true },

test/testcases/libnvmm/h_io_assist.c

350

{ "test3 - INL", &test3_begin, &test3_end, "12345678", true },

test/testcases/libnvmm/h_io_assist.c

351

{ "test4 - INSB+REP", &test4_begin, &test4_end, "12345", true },

test/testcases/libnvmm/h_io_assist.c

353

"Comment est votre blanquette", true },

test/testcases/libnvmm/h_io_assist.c

355

"123456789abcdefghijklmnopqrs", true },

tools/tools/netrate/kq_sendrecv/kq_sendcli/kq_sendcli.c

207

bindcpu = true;

tools/tools/netrate/kq_sendrecv/kq_sendcli/kq_sendcli.c

215

do_sendfile = true;

usr.bin/backlight/backlight.c

105

quiet = true;

usr.bin/bc/bc.y

106

static bool do_fork = true;

usr.bin/bc/bc.y

276

st_has_continue = true;

usr.bin/calendar/calendar.c

150

return true;

usr.bin/calendar/calendar.c

157

return true;

usr.bin/calendar/calendar.c

196

Options.allmode = true;

usr.bin/calendar/calendar.c

237

L_flag = true;

usr.bin/calendar/calendar.c

382

reaped = true;

usr.bin/calendar/calendar.c

532

return true;

usr.bin/calendar/chinese.c

382

{ "Yǔshuǐ", "雨水", true, 330 },

usr.bin/calendar/chinese.c

384

{ "Chūnfēn", "春分", true, 0 },

usr.bin/calendar/chinese.c

386

{ "Gǔyǔ", "谷雨", true, 30 },

usr.bin/calendar/chinese.c

388

{ "Xiǎomǎn", "小满", true, 60 },

usr.bin/calendar/chinese.c

390

{ "Xiàzhì", "夏至", true, 90 },

usr.bin/calendar/chinese.c

392

{ "Dàshǔ", "大暑", true, 120 },

usr.bin/calendar/chinese.c

394

{ "Chǔshǔ", "处暑", true, 150 },

usr.bin/calendar/chinese.c

396

{ "Qiūfēn", "秋分", true, 180 },

usr.bin/calendar/chinese.c

398

{ "Shuāngjiàng", "霜降", true, 210 },

usr.bin/calendar/chinese.c

400

{ "Xiǎoxuě", "小雪", true, 240 },

usr.bin/calendar/chinese.c

402

{ "Dōngzhì", "冬至", true, 270 },

usr.bin/calendar/chinese.c

404

{ "Dàhán", "大寒", true, 300 },

usr.bin/calendar/io.c

176

return true;

usr.bin/calendar/io.c

180

return true;

usr.bin/calendar/io.c

229

return true;

usr.bin/calendar/io.c

242

return true;

usr.bin/calendar/io.c

253

*skip = true;

usr.bin/calendar/io.c

255

return true;

usr.bin/calendar/io.c

317

locale_changed = true;

usr.bin/calendar/io.c

321

var_handled = true;

usr.bin/calendar/io.c

329

calendar_changed = true;

usr.bin/calendar/io.c

332

var_handled = true;

usr.bin/calendar/io.c

337

var_handled = true;

usr.bin/calendar/io.c

346

var_handled = true;

usr.bin/calendar/io.c

415

return true;

usr.bin/calendar/io.c

437

return true;

usr.bin/calendar/io.c

457

return true;

usr.bin/calendar/io.c

489

return true;

usr.bin/calendar/io.c

522

cfile->rewinded = true;

usr.bin/calendar/io.c

545

return true;

usr.bin/calendar/io.c

562

return true;

usr.bin/calendar/io.c

654

assert(Options.allmode == true);

usr.bin/calendar/parsedata.c

157

return true;

usr.bin/calendar/parsedata.c

161

return true;

usr.bin/calendar/parsedata.c

167

return true;

usr.bin/calendar/parsedata.c

170

return true;

usr.bin/calendar/parsedata.c

193

if (is_onlydigits(p1, false) && is_onlydigits(p2, true)) {

usr.bin/calendar/parsedata.c

210

return true;

usr.bin/calendar/parsedata.c

218

return true;

usr.bin/calendar/parsedata.c

228

return true;

usr.bin/calendar/parsedata.c

231

return true;

usr.bin/calendar/parsedata.c

253

return true;

usr.bin/calendar/parsedata.c

258

return true;

usr.bin/calendar/parsedata.c

263

return true;

usr.bin/calendar/parsedata.c

266

return true;

usr.bin/calendar/parsedata.c

418

return (true);

usr.bin/calendar/parsedata.c

425

return (true);

usr.bin/calendar/parsedata.c

432

return (true);

usr.bin/calendar/parsedata.c

438

return (true);

usr.bin/calendar/parsedata.c

457

return (true);

usr.bin/calendar/parsedata.c

464

return (true);

usr.bin/calendar/parsedata.c

471

return (true);

usr.bin/calendar/parsedata.c

477

return (true);

usr.bin/calendar/parsedata.c

489

return (true);

usr.bin/calendar/parsedata.c

493

return (true);

usr.bin/calendar/parsedata.c

513

parsed = true;

usr.bin/calendar/parsedata.c

521

parsed = true;

usr.bin/calendar/parsedata.c

587

return true;

usr.bin/calendar/parsedata.c

625

return true;

usr.bin/calendar/parsedata.c

680

return true;

usr.bin/calendar/parsedata.c

725

return true;

usr.bin/calendar/parsedata.c

754

return true;

usr.bin/calendar/sun.c

320

alpha, true);

usr.bin/calendar/utils.c

188

return true;

usr.bin/cmp/cmp.c

109

special = true;

usr.bin/cmp/cmp.c

122

special = true;

usr.bin/cmp/cmp.c

136

zflag = true;

usr.bin/cmp/cmp.c

161

special = true;

usr.bin/cmp/cmp.c

170

special = true;

usr.bin/cmp/cmp.c

81

lflag = true;

usr.bin/cmp/cmp.c

84

sflag = true;

usr.bin/cmp/cmp.c

87

lflag = true;

usr.bin/cmp/cmp.c

88

xflag = true;

usr.bin/cmp/cmp.c

91

zflag = true;

usr.bin/dc/bcode.c

1197

neg = true;

usr.bin/dc/bcode.c

226

bmachine.interrupted = true;

usr.bin/dc/dc.c

64

extended_regs = true;

usr.bin/dc/inout.c

200

sign = true;

usr.bin/dc/inout.c

205

dot = true;

usr.bin/dc/inout.c

250

escape = true;

usr.bin/dfregress/testcase.c

370

return _testcase_get_interpreter(testcase, true);

usr.bin/getaddrinfo/getaddrinfo.c

202

return true;

usr.bin/getaddrinfo/getaddrinfo.c

210

return true;

usr.bin/getaddrinfo/getaddrinfo.c

244

return true;

usr.bin/getaddrinfo/getaddrinfo.c

253

return true;

usr.bin/head/head.c

76

qflag = true;

usr.bin/head/head.c

80

vflag = true;

usr.bin/head/head.c

95

first = true;

usr.bin/iconv/iconv.c

171

opt_c = true;

usr.bin/iconv/iconv.c

174

opt_s = true;

usr.bin/indent/args.c

100

{"bc", PRO_BOOL, true, OFF, &opt.leave_comma},

usr.bin/indent/args.c

101

{"bl", PRO_BOOL, true, OFF, &opt.btype_2},

usr.bin/indent/args.c

102

{"br", PRO_BOOL, true, ON, &opt.btype_2},

usr.bin/indent/args.c

104

{"cdb", PRO_BOOL, true, ON, &opt.comment_delimiter_on_blankline},

usr.bin/indent/args.c

106

{"ce", PRO_BOOL, true, ON, &opt.cuddle_else},

usr.bin/indent/args.c

115

{"ei", PRO_BOOL, true, ON, &opt.else_if},

usr.bin/indent/args.c

116

{"fbs", PRO_BOOL, true, ON, &opt.function_brace_split},

usr.bin/indent/args.c

117

{"fc1", PRO_BOOL, true, ON, &opt.format_col1_comments},

usr.bin/indent/args.c

118

{"fcb", PRO_BOOL, true, ON, &opt.format_block_comments},

usr.bin/indent/args.c

119

{"ip", PRO_BOOL, true, ON, &opt.indent_parameters},

usr.bin/indent/args.c

124

{"lp", PRO_BOOL, true, ON, &opt.lineup_to_parens},

usr.bin/indent/args.c

131

{"nbc", PRO_BOOL, true, ON, &opt.leave_comma},

usr.bin/indent/args.c

133

{"ncdb", PRO_BOOL, true, OFF, &opt.comment_delimiter_on_blankline},

usr.bin/indent/args.c

134

{"nce", PRO_BOOL, true, OFF, &opt.cuddle_else},

usr.bin/indent/args.c

138

{"nei", PRO_BOOL, true, OFF, &opt.else_if},

usr.bin/indent/args.c

139

{"nfbs", PRO_BOOL, true, OFF, &opt.function_brace_split},

usr.bin/indent/args.c

140

{"nfc1", PRO_BOOL, true, OFF, &opt.format_col1_comments},

usr.bin/indent/args.c

141

{"nfcb", PRO_BOOL, true, OFF, &opt.format_block_comments},

usr.bin/indent/args.c

142

{"nip", PRO_BOOL, true, OFF, &opt.indent_parameters},

usr.bin/indent/args.c

144

{"nlp", PRO_BOOL, true, OFF, &opt.lineup_to_parens},

usr.bin/indent/args.c

147

{"npsl", PRO_BOOL, true, OFF, &opt.procnames_start_line},

usr.bin/indent/args.c

148

{"nsc", PRO_BOOL, true, OFF, &opt.star_comment_cont},

usr.bin/indent/args.c

150

{"nut", PRO_BOOL, true, OFF, &opt.use_tabs},

usr.bin/indent/args.c

153

{"psl", PRO_BOOL, true, ON, &opt.procnames_start_line},

usr.bin/indent/args.c

154

{"sc", PRO_BOOL, true, ON, &opt.star_comment_cont},

usr.bin/indent/args.c

159

{"ut", PRO_BOOL, true, ON, &opt.use_tabs},

usr.bin/indent/args.c

312

*p->p_obj = true;

usr.bin/indent/indent.c

1003

force_nl = true;

usr.bin/indent/indent.c

1004

ps.last_u_d = true;

usr.bin/indent/indent.c

1019

ps.want_blank = true;

usr.bin/indent/indent.c

1049

ps.dumped_decl_indent = true;

usr.bin/indent/indent.c

1058

force_nl = true;

usr.bin/indent/indent.c

117

ps.last_nl = true; /* this is true if the last thing scanned was

usr.bin/indent/indent.c

156

ps.bl_line = true;

usr.bin/indent/indent.c

338

comment_buffered = true;

usr.bin/indent/indent.c

514

ps.in_stmt = true; /* turn on flag which causes an extra level of

usr.bin/indent/indent.c

547

ps.use_ff = true; /* a form feed is treated much like a newline */

usr.bin/indent/indent.c

574

ps.dumped_decl_indent = true;

usr.bin/indent/indent.c

607

ps.last_u_d = true;

usr.bin/indent/indent.c

611

ps.want_blank = true;

usr.bin/indent/indent.c

625

force_nl = true;/* must force newline after if */

usr.bin/indent/indent.c

626

ps.last_u_d = true; /* inform lexi that a following

usr.bin/indent/indent.c

651

ps.dumped_decl_indent = true;

usr.bin/indent/indent.c

676

ps.want_blank = true;

usr.bin/indent/indent.c

682

ps.want_blank = true;

usr.bin/indent/indent.c

692

ps.want_blank = true;

usr.bin/indent/indent.c

696

scase = true; /* so we can process the later colon properly */

usr.bin/indent/indent.c

705

ps.want_blank = true;

usr.bin/indent/indent.c

755

ps.dumped_decl_indent = true;

usr.bin/indent/indent.c

778

ps.want_blank = true;

usr.bin/indent/indent.c

784

force_nl = true;/* force newline after an end of stmt */

usr.bin/indent/indent.c

791

force_nl = true;/* force other stuff on same line as '{' onto

usr.bin/indent/indent.c

810

ps.want_blank = true;

usr.bin/indent/indent.c

879

ps.want_blank = true;

usr.bin/indent/indent.c

886

ps.in_decl = true;

usr.bin/indent/indent.c

897

sp_sw = true;

usr.bin/indent/indent.c

903

sp_sw = true; /* the interesting stuff is done after the

usr.bin/indent/indent.c

922

force_nl = true;/* also, following stuff must go onto new line */

usr.bin/indent/indent.c

933

force_nl = true;/* also, following stuff must go onto new line */

usr.bin/indent/indent.c

960

ps.in_or_st = true; /* this might be a structure or initialization

usr.bin/indent/indent.c

997

ps.dumped_decl_indent = true;

usr.bin/indent/io.c

303

had_eof = true;

usr.bin/indent/io.c

77

ps.bl_line = true;

usr.bin/indent/lexi.c

248

state->last_u_d = true;

usr.bin/indent/lexi.c

270

state->last_u_d = true;

usr.bin/indent/lexi.c

275

state->last_u_d = true;

usr.bin/indent/lexi.c

342

state->last_u_d = true;

usr.bin/indent/lexi.c

347

state->last_u_d = true; /* will make "int a -1" work */

usr.bin/indent/lexi.c

363

state->last_nl = true; /* remember that we just had a newline */

usr.bin/indent/lexi.c

404

unary_delim = true;

usr.bin/indent/lexi.c

419

unary_delim = true;

usr.bin/indent/lexi.c

425

unary_delim = true;

usr.bin/indent/lexi.c

429

unary_delim = true;

usr.bin/indent/lexi.c

434

unary_delim = true;

usr.bin/indent/lexi.c

444

unary_delim = true;

usr.bin/indent/lexi.c

451

state->last_nl = true; /* remember this so we can set 'state->col_1'

usr.bin/indent/lexi.c

457

unary_delim = true;

usr.bin/indent/lexi.c

469

unary_delim = true;

usr.bin/indent/lexi.c

503

unary_delim = true;

usr.bin/indent/lexi.c

518

unary_delim = true;

usr.bin/indent/lexi.c

522

unary_delim = true;

usr.bin/indent/lexi.c

573

unary_delim = true;

usr.bin/indent/parse.c

74

break_comma = true; /* while in declaration, newline should be

usr.bin/indent/pr_comment.c

106

ps.box_com = true; /* A comment with a '-' or '*' immediately

usr.bin/indent/pr_comment.c

203

ps.use_ff = true;

usr.bin/indent/pr_comment.c

99

ps.box_com = true;

usr.bin/msgs/msgs.c

84

#define YES true

usr.bin/netstat/mbuf.c

46

#define YES true

usr.bin/patch/inp.c

132

return true;

usr.bin/patch/inp.c

166

return true;

usr.bin/patch/inp.c

167

makedirs(filename, true);

usr.bin/patch/inp.c

232

last_line_missing_eol = true;

usr.bin/patch/inp.c

278

return true; /* plan a will work */

usr.bin/patch/inp.c

308

last_line_missing_eol = true;

usr.bin/patch/inp.c

312

found_revision = true;

usr.bin/patch/inp.c

425

return true;

usr.bin/patch/inp.c

428

return true;

usr.bin/patch/inp.c

432

return true;

usr.bin/patch/inp.c

90

using_plan_a = true; /* maybe the next one is smaller */

usr.bin/patch/patch.c

1031

dump_line(last_frozen_line, true);

usr.bin/patch/patch.c

1048

copy_till(input_lines, true); /* dump remainder of file */

usr.bin/patch/patch.c

1115

return true;

usr.bin/patch/patch.c

1139

return true; /* actually, this is not reached */

usr.bin/patch/patch.c

1155

*remove = true;

usr.bin/patch/patch.c

1167

skip_rest_of_patch = true;

usr.bin/patch/patch.c

1173

skip_rest_of_patch = true;

usr.bin/patch/patch.c

1196

skip_rest_of_patch = true;

usr.bin/patch/patch.c

1199

reverse_seen = true;

usr.bin/patch/patch.c

1210

*remove = true;

usr.bin/patch/patch.c

232

patch_seen = true;

usr.bin/patch/patch.c

234

warn_on_invalid_line = true;

usr.bin/patch/patch.c

328

skip_rest_of_patch = true;

usr.bin/patch/patch.c

341

skip_rest_of_patch = true;

usr.bin/patch/patch.c

343

reverse_seen = true;

usr.bin/patch/patch.c

421

toutkeep = true;

usr.bin/patch/patch.c

470

trejkeep = true;

usr.bin/patch/patch.c

55

bool using_plan_a = true; /* try to keep everything in memory */

usr.bin/patch/patch.c

584

check_only = true;

usr.bin/patch/patch.c

591

do_defines = true;

usr.bin/patch/patch.c

605

remove_empty_files = true;

usr.bin/patch/patch.c

608

force = true;

usr.bin/patch/patch.c

619

canonicalize = true;

usr.bin/patch/patch.c

625

noreverse = true;

usr.bin/patch/patch.c

639

reverse = true;

usr.bin/patch/patch.c

640

reverse_flag_specified = true;

usr.bin/patch/patch.c

646

batch = true;

usr.bin/patch/patch.c

656

Vflag = true;

usr.bin/patch/patch.c

80

bool verbose = true;

usr.bin/patch/pch.c

1076

len = pgets(true);

usr.bin/patch/pch.c

1121

len = pgets(true);

usr.bin/patch/pch.c

1143

len = pgets(true);

usr.bin/patch/pch.c

1160

len = pgets(true);

usr.bin/patch/pch.c

1208

return true;

usr.bin/patch/pch.c

1294

blankline = true;

usr.bin/patch/pch.c

1357

return true;

usr.bin/patch/pch.c

1472

if (pgets(true) == 0) {

usr.bin/patch/pch.c

1491

pgets(true) == 0)

usr.bin/patch/pch.c

1497

while (pgets(true)) {

usr.bin/patch/pch.c

1519

toutkeep = true;

usr.bin/patch/pch.c

168

out_of_mem = true; /* whatever is null will be allocated again */

usr.bin/patch/pch.c

186

nonempty_patchf_seen = true;

usr.bin/patch/pch.c

214

skip_rest_of_patch = true;

usr.bin/patch/pch.c

215

return true;

usr.bin/patch/pch.c

238

skip_rest_of_patch = true;

usr.bin/patch/pch.c

239

return true;

usr.bin/patch/pch.c

242

return true;

usr.bin/patch/pch.c

372

ok_to_create_file = true;

usr.bin/patch/pch.c

383

ok_to_create_file = true;

usr.bin/patch/pch.c

456

bestguess = posix_name(names, true);

usr.bin/patch/pch.c

458

bestguess = best_name(names, true);

usr.bin/patch/pch.c

525

return true;

usr.bin/patch/pch.c

571

repl_could_be_missing = true;

usr.bin/patch/pch.c

577

len = pgets(true);

usr.bin/patch/pch.c

587

len = pgets(true);

usr.bin/patch/pch.c

595

repl_missing = true;

usr.bin/patch/pch.c

611

repl_missing = true;

usr.bin/patch/pch.c

620

repl_missing = true;

usr.bin/patch/pch.c

683

repl_missing = true;

usr.bin/patch/pch.c

750

repl_missing = true;

usr.bin/patch/pch.c

777

repl_missing = true;

usr.bin/patch/pch.c

796

repl_missing = true;

usr.bin/patch/pch.c

810

repl_missing = true;

usr.bin/patch/pch.c

912

len = pgets(true);

usr.bin/patch/pch.c

972

len = pgets(true);

usr.bin/patch/util.c

197

out_of_mem = true;

usr.bin/patch/util.c

370

*exists = true;

usr.bin/sdiff/sdiff.c

276

Iflag = true;

usr.bin/sdiff/sdiff.c

281

lflag = true;

usr.bin/sdiff/sdiff.c

287

sflag = true;

usr.bin/sdiff/sdiff.c

290

tflag = true;

usr.bin/sdiff/sdiff.c

602

sflag = true;

usr.bin/sed/compile.c

406

return (true);

usr.bin/sort/bwstring.c

866

*empty = true;

usr.bin/sort/bwstring.c

872

*empty = true;

usr.bin/sort/bwstring.c

886

*empty = true;

usr.bin/sort/bwstring.c

892

*empty = true;

usr.bin/sort/coll.c

1148

kv1->hint->v.gh.notnum = true;

usr.bin/sort/coll.c

1156

key1_read = true;

usr.bin/sort/coll.c

1165

kv2->hint->v.gh.notnum = true;

usr.bin/sort/coll.c

1173

key2_read = true;

usr.bin/sort/coll.c

1298

key1_read = true;

usr.bin/sort/coll.c

1304

key2_read = true;

usr.bin/sort/coll.c

1310

key1_read = true;

usr.bin/sort/coll.c

1315

key2_read = true;

usr.bin/sort/coll.c

244

*empty_key = true;

usr.bin/sort/coll.c

258

*empty_field = true;

usr.bin/sort/coll.c

262

bool pb = true;

usr.bin/sort/coll.c

278

*empty_field = true;

usr.bin/sort/coll.c

292

*empty_field = true;

usr.bin/sort/coll.c

310

*empty_key = true;

usr.bin/sort/coll.c

832

key1_read = true;

usr.bin/sort/coll.c

835

kv1->hint->v.nh.empty=true;

usr.bin/sort/coll.c

839

kv1->hint->v.nh.neg = (sign1 < 0) ? true : false;

usr.bin/sort/coll.c

845

key2_read = true;

usr.bin/sort/coll.c

848

kv2->hint->v.nh.empty=true;

usr.bin/sort/coll.c

852

kv2->hint->v.nh.neg = (sign2 < 0) ? true : false;

usr.bin/sort/coll.c

970

return (numcoll_impl(kv1, kv2, offset, true));

usr.bin/sort/file.c

1159

file_list_init(&new_fl, true);

usr.bin/sort/file.c

180

ret = true;

usr.bin/sort/sort.c

1080

sort_opts_vals.cflag = true;

usr.bin/sort/sort.c

1086

sort_opts_vals.csilentflag = true;

usr.bin/sort/sort.c

1092

sort_opts_vals.cflag = true;

usr.bin/sort/sort.c

1093

sort_opts_vals.csilentflag = true;

usr.bin/sort/sort.c

1097

sort_opts_vals.complex_sort = true;

usr.bin/sort/sort.c

1098

sort_opts_vals.kflag = true;

usr.bin/sort/sort.c

1114

sort_opts_vals.mflag = true;

usr.bin/sort/sort.c

1121

sort_opts_vals.sflag = true;

usr.bin/sort/sort.c

1141

sort_opts_vals.tflag = true;

usr.bin/sort/sort.c

1159

sort_opts_vals.uflag = true;

usr.bin/sort/sort.c

1161

sort_opts_vals.sflag = true;

usr.bin/sort/sort.c

1164

sort_opts_vals.zflag = true;

usr.bin/sort/sort.c

1200

use_mmap = true;

usr.bin/sort/sort.c

1235

debug_sort = true;

usr.bin/sort/sort.c

1242

usage(true);

usr.bin/sort/sort.c

1349

file_list_init(&fl, true);

usr.bin/sort/sort.c

1388

file_list_populate(&fl, argc, argv, true);

usr.bin/sort/sort.c

217

return (true);

usr.bin/sort/sort.c

365

gnusort_numeric_compatibility = true;

usr.bin/sort/sort.c

376

byte_sort = true;

usr.bin/sort/sort.c

382

byte_sort = true;

usr.bin/sort/sort.c

555

found_others = true;

usr.bin/sort/sort.c

561

mef_flags[i] = true;

usr.bin/sort/sort.c

562

found_this = true;

usr.bin/sort/sort.c

591

sm->bflag = true;

usr.bin/sort/sort.c

594

sm->dflag = true;

usr.bin/sort/sort.c

597

sm->fflag = true;

usr.bin/sort/sort.c

600

sm->gflag = true;

usr.bin/sort/sort.c

601

need_hint = true;

usr.bin/sort/sort.c

604

sm->iflag = true;

usr.bin/sort/sort.c

608

sm->Rflag = true;

usr.bin/sort/sort.c

609

need_random = true;

usr.bin/sort/sort.c

614

sm->Mflag = true;

usr.bin/sort/sort.c

615

need_hint = true;

usr.bin/sort/sort.c

618

sm->nflag = true;

usr.bin/sort/sort.c

619

need_hint = true;

usr.bin/sort/sort.c

620

print_symbols_on_debug = true;

usr.bin/sort/sort.c

623

sm->rflag = true;

usr.bin/sort/sort.c

626

sm->Vflag = true;

usr.bin/sort/sort.c

629

sm->hflag = true;

usr.bin/sort/sort.c

630

need_hint = true;

usr.bin/sort/sort.c

631

print_symbols_on_debug = true;

usr.bin/sort/sort.c

636

sort_opts_vals.complex_sort = true;

usr.bin/sort/sort.c

639

return (true);

usr.bin/sort/sort.c

733

ks->pos2b = true;

usr.bin/sort/sort.c

735

ks->pos1b = true;

usr.bin/sort/sort.c

788

ret = parse_pos(pos2, ks, mef_flags, true);

usr.bin/sort/vsort.c

84

expect_alpha = true;

usr.bin/sort/vsort.c

86

sfx = true;

usr.bin/split/split.c

107

dflag = true;

usr.bin/timeout/timeout.c

303

foreground = true;

usr.bin/timeout/timeout.c

306

do_second_kill = true;

usr.bin/timeout/timeout.c

310

preserve = true;

usr.bin/timeout/timeout.c

316

verbose = true;

usr.bin/timeout/timeout.c

400

child_done = true;

usr.bin/timeout/timeout.c

432

timedout = true;

usr.bin/tr/cmap.c

112

return (true);

usr.bin/tr/cmap.c

143

cm->cm_havecache = true;

usr.bin/tr/cmap.c

82

return (true);

usr.bin/tr/cmap.c

89

return (true);

usr.bin/tr/cset.c

141

return (true);

usr.bin/tr/cset.c

156

return (cs->cs_invert ^ true);

usr.bin/tr/cset.c

176

cs->cs_havecache = true;

usr.bin/tr/cset.c

187

cs->cs_invert ^= true;

usr.bin/tr/cset.c

209

return (true);

usr.bin/tr/cset.c

85

return (true);

usr.bin/tr/cset.c

98

return (true);

usr.bin/tr/tr.c

337

cset_addclass(cs, wctype("rune"), true);

usr.bin/unifdef/unifdef.c

1091

constexpr = killconsts ? false : true;

usr.bin/unifdef/unifdef.c

1511

return (true);

usr.bin/unifdef/unifdef.c

268

addsym1(true, true, optarg);

usr.bin/unifdef/unifdef.c

270

addsym1(true, false, optarg);

usr.bin/unifdef/unifdef.c

275

addsym1(false, true, optarg);

usr.bin/unifdef/unifdef.c

284

lnblank = true;

usr.bin/unifdef/unifdef.c

287

compblank = true;

usr.bin/unifdef/unifdef.c

290

complement = true;

usr.bin/unifdef/unifdef.c

293

debugging = true;

usr.bin/unifdef/unifdef.c

296

iocccok = true;

usr.bin/unifdef/unifdef.c

305

strictlogic = true;

usr.bin/unifdef/unifdef.c

308

killconsts = true;

usr.bin/unifdef/unifdef.c

311

inplace = true;

usr.bin/unifdef/unifdef.c

314

inplace = true;

usr.bin/unifdef/unifdef.c

318

lnnum = true;

usr.bin/unifdef/unifdef.c

324

symlist = true;

usr.bin/unifdef/unifdef.c

327

symlist = symdepth = true;

usr.bin/unifdef/unifdef.c

330

text = true;

usr.bin/unifdef/unifdef.c

545

static void print (void) { flushline(true); }

usr.bin/unifdef/unifdef.c

638

ignoring[depth] = true;

usr.bin/unifdef/unifdef.c

645

altered = true;

usr.bin/unifdef/unifdef.c

708

altered = true;

usr.bin/unifdef/unifdef.c

757

zerosyms = true;

usr.bin/unifdef/unifdef.c

996

defparen = true;

usr.bin/units/units.c

710

readfile = true;

usr.bin/units/units.c

717

quiet = true;

usr.bin/units/units.c

720

verbose = true;

usr.bin/window/parser1.c

115

p_statementlist(flag && true);

usr.bin/window/parser1.c

124

p_statementlist(flag && !true);

usr.bin/window/parser1.c

87

char true = 0;

usr.bin/window/parser1.c

98

true = !true && t.v_num != 0;

usr.bin/window/parser3.c

109

if ((flag && true ? p_expr1(v, 1) : p_expr1(&t, 0)) < 0)

usr.bin/window/parser3.c

117

return flag && !true ? p_expr1(v, 1) : p_expr1(&t, 0);

usr.bin/window/parser3.c

126

char true = 0;

usr.bin/window/parser3.c

135

v->v_num = true = true || v->v_num != 0;

usr.bin/window/parser3.c

149

if (p_expr2(v, flag && !true) < 0)

usr.bin/window/parser3.c

160

char true = 1;

usr.bin/window/parser3.c

169

v->v_num = true = true && v->v_num != 0;

usr.bin/window/parser3.c

183

if (p_expr3_10(3, v, flag && true) < 0)

usr.bin/window/parser3.c

88

char true = 0;

usr.bin/window/parser3.c

96

true = v->v_num != 0;

usr.bin/xargs/strnsubst.c

73

error = true;

usr.sbin/autofs/automount.c

281

flush = true;

usr.sbin/autofs/automount.c

284

force_unmount = true;

usr.sbin/autofs/automount.c

290

do_unmount = true;

usr.sbin/autofs/automountd.c

133

wildcard_found = true;

usr.sbin/autofs/automountd.c

157

done(EIO, true);

usr.sbin/autofs/automountd.c

254

done(0, true);

usr.sbin/autofs/automountd.c

446

dont_daemonize = true;

usr.sbin/autofs/automountd.c

450

incomplete_hierarchy = true;

usr.sbin/autofs/automountd.c

533

nchildren -= wait_for_children(true);

usr.sbin/autofs/automountd.c

84

bool first = true;

usr.sbin/autofs/autounmountd.c

139

af->af_mark = true;

usr.sbin/autofs/autounmountd.c

276

dont_daemonize = true;

usr.sbin/autofs/common.c

1030

*wildcards = true;

usr.sbin/autofs/common.c

1060

*wildcards = true;

usr.sbin/autofs/common.c

1156

node_expand_includes(root, true);

usr.sbin/autofs/common.c

335

backslashed = true;

usr.sbin/autofs/common.c

454

return (true);

usr.sbin/autofs/common.c

481

return (true);

usr.sbin/autofs/common.c

530

node_expand_maps(n, true);

usr.sbin/autofs/common.c

934

return (true);

usr.sbin/autofs/defined.c

78

backslashed = true;

usr.sbin/autofs/defined.c

96

bracketed = true;

usr.sbin/efibootmgr/efibootmgr.c

1096

set_boot_to_fw_ui(true);

usr.sbin/efibootmgr/efibootmgr.c

205

opts.set_inactive = true;

usr.sbin/efibootmgr/efibootmgr.c

208

opts.set_active = true;

usr.sbin/efibootmgr/efibootmgr.c

211

opts.has_bootnum = true;

usr.sbin/efibootmgr/efibootmgr.c

215

opts.delete = true;

usr.sbin/efibootmgr/efibootmgr.c

218

opts.copy = true;

usr.sbin/efibootmgr/efibootmgr.c

222

opts.create = true;

usr.sbin/efibootmgr/efibootmgr.c

225

opts.dry_run = true;

usr.sbin/efibootmgr/efibootmgr.c

228

opts.device_path = true;

usr.sbin/efibootmgr/efibootmgr.c

235

opts.esp_device = true;

usr.sbin/efibootmgr/efibootmgr.c

238

opts.no_fw_ui = true;

usr.sbin/efibootmgr/efibootmgr.c

241

opts.fw_ui = true;

usr.sbin/efibootmgr/efibootmgr.c

261

opts.delete_bootnext = true;

usr.sbin/efibootmgr/efibootmgr.c

264

opts.set_bootnext = true;

usr.sbin/efibootmgr/efibootmgr.c

267

opts.once = true;

usr.sbin/efibootmgr/efibootmgr.c

274

opts.unix_path = true;

usr.sbin/efibootmgr/efibootmgr.c

277

opts.del_timeout = true;

usr.sbin/efibootmgr/efibootmgr.c

280

opts.set_timeout = true;

usr.sbin/efibootmgr/efibootmgr.c

284

opts.verbose = true;

usr.sbin/efibootmgr/efibootmgr.c

832

return true;

usr.sbin/fstyp/exfat.c

299

eod = true;

usr.sbin/fstyp/fstyp.c

192

show_label = true;

usr.sbin/fstyp/fstyp.c

195

ignore_type = true;

usr.sbin/fstyp/fstyp.c

198

show_unmountable = true;

usr.sbin/fstyp/fstyp.c

240

if (show_unmountable == false && fstypes[i].unmountable == true)

usr.sbin/fstyp/fstyp.c

254

if (show_unmountable == false && fsvtypes[i].unmountable == true)

usr.sbin/fstyp/fstyp.c

63

{ "apfs", &fstyp_apfs, true, NULL },

usr.sbin/fstyp/fstyp.c

84

{ "hammer(partial)", &fsvtyp_hammer_partial, true, NULL },

usr.sbin/fstyp/fstyp.c

86

{ "hammer2(partial)", &fsvtyp_hammer2_partial, true, NULL },

usr.sbin/fstyp/hammer2.c

211

*res = true;

usr.sbin/fstyp/hammer2.c

216

*res = true;

usr.sbin/makefs/ffs.c

288

((ffs_opt_t *)fsopts->fs_specific)->min_inodes = true;

usr.sbin/makefs/hammer2.c

1297

prev_was_c = true;

usr.sbin/makefs/hammer2.c

1314

prev_was_c = true;

usr.sbin/makefs/hammer2.c

1352

return true;

usr.sbin/makefs/hammer2.c

2240

found = true;

usr.sbin/makefs/hammer2/hammer2_vnops.c

1440

hammer2_update_time(&ip->meta.mtime, true);

usr.sbin/makefs/hammer2/hammer2_vnops.c

1765

hammer2_update_time(&mtime, true);

usr.sbin/makefs/hammer2/hammer2_vnops.c

1905

hammer2_update_time(&cmtime, true);

usr.sbin/makefs/hammer2/hammer2_vnops.c

2022

hammer2_update_time(&mtime, true);

usr.sbin/makefs/hammer2/hammer2_vnops.c

2131

hammer2_update_time(&mtime, true);

usr.sbin/makefs/hammer2/hammer2_vnops.c

2272

hammer2_update_time(&mtime, true);

usr.sbin/makefs/mtree.c

1020

error = read_mtree_spec1(fp, true, pathspec);

usr.sbin/makefs/mtree.c

895

if (def == true) {

usr.sbin/makefs/mtree.c

933

if (def == true) {

usr.sbin/mpsutil/mps_flash.c

135

bios = true;

usr.sbin/mpsutil/mps_flash.c

61

bios = true;

usr.sbin/mtree/only.c

134

loaded = true;

usr.sbin/mtree/only.c

143

return true;

usr.sbin/mtree/only.c

76

return true;

usr.sbin/pw/pw_group.c

331

matchFound = true;

usr.sbin/sshlockout/sshlockout.c

184

return true;

usr.sbin/sshlockout/sshlockout.c

202

return true;

usr.sbin/sshlockout/sshlockout.c

221

return true;

usr.sbin/tcpdrop/tcpdrop.c

190

return (true);

usr.sbin/tcpdrop/tcpdrop.c

202

return (true);

usr.sbin/tcpdrop/tcpdrop.c

213

ok = true;

usr.sbin/tcpdrop/tcpdrop.c

274

ok = true;

usr.sbin/tcpdrop/tcpdrop.c

284

infamily = true;

usr.sbin/tcpdrop/tcpdrop.c

78

dropall = true;

usr.sbin/tcpdrop/tcpdrop.c

81

tcpdrop_list_commands = true;

usr.sbin/uefisign/uefisign.c

349

Vflag = true;

usr.sbin/uefisign/uefisign.c

361

vflag = true;